expr.c (emit_block_move_via_movmem): Only use 6 operand variant if there are exactly...
[gcc.git] / gcc / expr.c
1 /* Convert tree expression to rtl instructions, for GNU compiler.
2 Copyright (C) 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011
4 Free Software Foundation, Inc.
5
6 This file is part of GCC.
7
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
11 version.
12
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
21
22 #include "config.h"
23 #include "system.h"
24 #include "coretypes.h"
25 #include "tm.h"
26 #include "machmode.h"
27 #include "rtl.h"
28 #include "tree.h"
29 #include "flags.h"
30 #include "regs.h"
31 #include "hard-reg-set.h"
32 #include "except.h"
33 #include "function.h"
34 #include "insn-config.h"
35 #include "insn-attr.h"
36 /* Include expr.h after insn-config.h so we get HAVE_conditional_move. */
37 #include "expr.h"
38 #include "optabs.h"
39 #include "libfuncs.h"
40 #include "recog.h"
41 #include "reload.h"
42 #include "output.h"
43 #include "typeclass.h"
44 #include "toplev.h"
45 #include "langhooks.h"
46 #include "intl.h"
47 #include "tm_p.h"
48 #include "tree-iterator.h"
49 #include "tree-pass.h"
50 #include "tree-flow.h"
51 #include "target.h"
52 #include "timevar.h"
53 #include "df.h"
54 #include "diagnostic.h"
55 #include "ssaexpand.h"
56 #include "target-globals.h"
57
58 /* Decide whether a function's arguments should be processed
59 from first to last or from last to first.
60
61 They should if the stack and args grow in opposite directions, but
62 only if we have push insns. */
63
64 #ifdef PUSH_ROUNDING
65
66 #ifndef PUSH_ARGS_REVERSED
67 #if defined (STACK_GROWS_DOWNWARD) != defined (ARGS_GROW_DOWNWARD)
68 #define PUSH_ARGS_REVERSED /* If it's last to first. */
69 #endif
70 #endif
71
72 #endif
73
74 #ifndef STACK_PUSH_CODE
75 #ifdef STACK_GROWS_DOWNWARD
76 #define STACK_PUSH_CODE PRE_DEC
77 #else
78 #define STACK_PUSH_CODE PRE_INC
79 #endif
80 #endif
81
82
83 /* If this is nonzero, we do not bother generating VOLATILE
84 around volatile memory references, and we are willing to
85 output indirect addresses. If cse is to follow, we reject
86 indirect addresses so a useful potential cse is generated;
87 if it is used only once, instruction combination will produce
88 the same indirect address eventually. */
89 int cse_not_expected;
90
91 /* This structure is used by move_by_pieces to describe the move to
92 be performed. */
93 struct move_by_pieces_d
94 {
95 rtx to;
96 rtx to_addr;
97 int autinc_to;
98 int explicit_inc_to;
99 rtx from;
100 rtx from_addr;
101 int autinc_from;
102 int explicit_inc_from;
103 unsigned HOST_WIDE_INT len;
104 HOST_WIDE_INT offset;
105 int reverse;
106 };
107
108 /* This structure is used by store_by_pieces to describe the clear to
109 be performed. */
110
111 struct store_by_pieces_d
112 {
113 rtx to;
114 rtx to_addr;
115 int autinc_to;
116 int explicit_inc_to;
117 unsigned HOST_WIDE_INT len;
118 HOST_WIDE_INT offset;
119 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode);
120 void *constfundata;
121 int reverse;
122 };
123
124 static unsigned HOST_WIDE_INT move_by_pieces_ninsns (unsigned HOST_WIDE_INT,
125 unsigned int,
126 unsigned int);
127 static void move_by_pieces_1 (rtx (*) (rtx, ...), enum machine_mode,
128 struct move_by_pieces_d *);
129 static bool block_move_libcall_safe_for_call_parm (void);
130 static bool emit_block_move_via_movmem (rtx, rtx, rtx, unsigned, unsigned, HOST_WIDE_INT);
131 static tree emit_block_move_libcall_fn (int);
132 static void emit_block_move_via_loop (rtx, rtx, rtx, unsigned);
133 static rtx clear_by_pieces_1 (void *, HOST_WIDE_INT, enum machine_mode);
134 static void clear_by_pieces (rtx, unsigned HOST_WIDE_INT, unsigned int);
135 static void store_by_pieces_1 (struct store_by_pieces_d *, unsigned int);
136 static void store_by_pieces_2 (rtx (*) (rtx, ...), enum machine_mode,
137 struct store_by_pieces_d *);
138 static tree clear_storage_libcall_fn (int);
139 static rtx compress_float_constant (rtx, rtx);
140 static rtx get_subtarget (rtx);
141 static void store_constructor_field (rtx, unsigned HOST_WIDE_INT,
142 HOST_WIDE_INT, enum machine_mode,
143 tree, tree, int, alias_set_type);
144 static void store_constructor (tree, rtx, int, HOST_WIDE_INT);
145 static rtx store_field (rtx, HOST_WIDE_INT, HOST_WIDE_INT, enum machine_mode,
146 tree, tree, alias_set_type, bool);
147
148 static unsigned HOST_WIDE_INT highest_pow2_factor_for_target (const_tree, const_tree);
149
150 static int is_aligning_offset (const_tree, const_tree);
151 static void expand_operands (tree, tree, rtx, rtx*, rtx*,
152 enum expand_modifier);
153 static rtx reduce_to_bit_field_precision (rtx, rtx, tree);
154 static rtx do_store_flag (sepops, rtx, enum machine_mode);
155 #ifdef PUSH_ROUNDING
156 static void emit_single_push_insn (enum machine_mode, rtx, tree);
157 #endif
158 static void do_tablejump (rtx, enum machine_mode, rtx, rtx, rtx);
159 static rtx const_vector_from_tree (tree);
160 static void write_complex_part (rtx, rtx, bool);
161
162 /* This macro is used to determine whether move_by_pieces should be called
163 to perform a structure copy. */
164 #ifndef MOVE_BY_PIECES_P
165 #define MOVE_BY_PIECES_P(SIZE, ALIGN) \
166 (move_by_pieces_ninsns (SIZE, ALIGN, MOVE_MAX_PIECES + 1) \
167 < (unsigned int) MOVE_RATIO (optimize_insn_for_speed_p ()))
168 #endif
169
170 /* This macro is used to determine whether clear_by_pieces should be
171 called to clear storage. */
172 #ifndef CLEAR_BY_PIECES_P
173 #define CLEAR_BY_PIECES_P(SIZE, ALIGN) \
174 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
175 < (unsigned int) CLEAR_RATIO (optimize_insn_for_speed_p ()))
176 #endif
177
178 /* This macro is used to determine whether store_by_pieces should be
179 called to "memset" storage with byte values other than zero. */
180 #ifndef SET_BY_PIECES_P
181 #define SET_BY_PIECES_P(SIZE, ALIGN) \
182 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
183 < (unsigned int) SET_RATIO (optimize_insn_for_speed_p ()))
184 #endif
185
186 /* This macro is used to determine whether store_by_pieces should be
187 called to "memcpy" storage when the source is a constant string. */
188 #ifndef STORE_BY_PIECES_P
189 #define STORE_BY_PIECES_P(SIZE, ALIGN) \
190 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
191 < (unsigned int) MOVE_RATIO (optimize_insn_for_speed_p ()))
192 #endif
193
194 /* SLOW_UNALIGNED_ACCESS is nonzero if unaligned accesses are very slow. */
195
196 #ifndef SLOW_UNALIGNED_ACCESS
197 #define SLOW_UNALIGNED_ACCESS(MODE, ALIGN) STRICT_ALIGNMENT
198 #endif
199 \f
200 /* This is run to set up which modes can be used
201 directly in memory and to initialize the block move optab. It is run
202 at the beginning of compilation and when the target is reinitialized. */
203
204 void
205 init_expr_target (void)
206 {
207 rtx insn, pat;
208 enum machine_mode mode;
209 int num_clobbers;
210 rtx mem, mem1;
211 rtx reg;
212
213 /* Try indexing by frame ptr and try by stack ptr.
214 It is known that on the Convex the stack ptr isn't a valid index.
215 With luck, one or the other is valid on any machine. */
216 mem = gen_rtx_MEM (VOIDmode, stack_pointer_rtx);
217 mem1 = gen_rtx_MEM (VOIDmode, frame_pointer_rtx);
218
219 /* A scratch register we can modify in-place below to avoid
220 useless RTL allocations. */
221 reg = gen_rtx_REG (VOIDmode, -1);
222
223 insn = rtx_alloc (INSN);
224 pat = gen_rtx_SET (VOIDmode, NULL_RTX, NULL_RTX);
225 PATTERN (insn) = pat;
226
227 for (mode = VOIDmode; (int) mode < NUM_MACHINE_MODES;
228 mode = (enum machine_mode) ((int) mode + 1))
229 {
230 int regno;
231
232 direct_load[(int) mode] = direct_store[(int) mode] = 0;
233 PUT_MODE (mem, mode);
234 PUT_MODE (mem1, mode);
235 PUT_MODE (reg, mode);
236
237 /* See if there is some register that can be used in this mode and
238 directly loaded or stored from memory. */
239
240 if (mode != VOIDmode && mode != BLKmode)
241 for (regno = 0; regno < FIRST_PSEUDO_REGISTER
242 && (direct_load[(int) mode] == 0 || direct_store[(int) mode] == 0);
243 regno++)
244 {
245 if (! HARD_REGNO_MODE_OK (regno, mode))
246 continue;
247
248 SET_REGNO (reg, regno);
249
250 SET_SRC (pat) = mem;
251 SET_DEST (pat) = reg;
252 if (recog (pat, insn, &num_clobbers) >= 0)
253 direct_load[(int) mode] = 1;
254
255 SET_SRC (pat) = mem1;
256 SET_DEST (pat) = reg;
257 if (recog (pat, insn, &num_clobbers) >= 0)
258 direct_load[(int) mode] = 1;
259
260 SET_SRC (pat) = reg;
261 SET_DEST (pat) = mem;
262 if (recog (pat, insn, &num_clobbers) >= 0)
263 direct_store[(int) mode] = 1;
264
265 SET_SRC (pat) = reg;
266 SET_DEST (pat) = mem1;
267 if (recog (pat, insn, &num_clobbers) >= 0)
268 direct_store[(int) mode] = 1;
269 }
270 }
271
272 mem = gen_rtx_MEM (VOIDmode, gen_rtx_raw_REG (Pmode, 10000));
273
274 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
275 mode = GET_MODE_WIDER_MODE (mode))
276 {
277 enum machine_mode srcmode;
278 for (srcmode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); srcmode != mode;
279 srcmode = GET_MODE_WIDER_MODE (srcmode))
280 {
281 enum insn_code ic;
282
283 ic = can_extend_p (mode, srcmode, 0);
284 if (ic == CODE_FOR_nothing)
285 continue;
286
287 PUT_MODE (mem, srcmode);
288
289 if (insn_operand_matches (ic, 1, mem))
290 float_extend_from_mem[mode][srcmode] = true;
291 }
292 }
293 }
294
295 /* This is run at the start of compiling a function. */
296
297 void
298 init_expr (void)
299 {
300 memset (&crtl->expr, 0, sizeof (crtl->expr));
301 }
302 \f
303 /* Copy data from FROM to TO, where the machine modes are not the same.
304 Both modes may be integer, or both may be floating, or both may be
305 fixed-point.
306 UNSIGNEDP should be nonzero if FROM is an unsigned type.
307 This causes zero-extension instead of sign-extension. */
308
309 void
310 convert_move (rtx to, rtx from, int unsignedp)
311 {
312 enum machine_mode to_mode = GET_MODE (to);
313 enum machine_mode from_mode = GET_MODE (from);
314 int to_real = SCALAR_FLOAT_MODE_P (to_mode);
315 int from_real = SCALAR_FLOAT_MODE_P (from_mode);
316 enum insn_code code;
317 rtx libcall;
318
319 /* rtx code for making an equivalent value. */
320 enum rtx_code equiv_code = (unsignedp < 0 ? UNKNOWN
321 : (unsignedp ? ZERO_EXTEND : SIGN_EXTEND));
322
323
324 gcc_assert (to_real == from_real);
325 gcc_assert (to_mode != BLKmode);
326 gcc_assert (from_mode != BLKmode);
327
328 /* If the source and destination are already the same, then there's
329 nothing to do. */
330 if (to == from)
331 return;
332
333 /* If FROM is a SUBREG that indicates that we have already done at least
334 the required extension, strip it. We don't handle such SUBREGs as
335 TO here. */
336
337 if (GET_CODE (from) == SUBREG && SUBREG_PROMOTED_VAR_P (from)
338 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (from)))
339 >= GET_MODE_SIZE (to_mode))
340 && SUBREG_PROMOTED_UNSIGNED_P (from) == unsignedp)
341 from = gen_lowpart (to_mode, from), from_mode = to_mode;
342
343 gcc_assert (GET_CODE (to) != SUBREG || !SUBREG_PROMOTED_VAR_P (to));
344
345 if (to_mode == from_mode
346 || (from_mode == VOIDmode && CONSTANT_P (from)))
347 {
348 emit_move_insn (to, from);
349 return;
350 }
351
352 if (VECTOR_MODE_P (to_mode) || VECTOR_MODE_P (from_mode))
353 {
354 gcc_assert (GET_MODE_BITSIZE (from_mode) == GET_MODE_BITSIZE (to_mode));
355
356 if (VECTOR_MODE_P (to_mode))
357 from = simplify_gen_subreg (to_mode, from, GET_MODE (from), 0);
358 else
359 to = simplify_gen_subreg (from_mode, to, GET_MODE (to), 0);
360
361 emit_move_insn (to, from);
362 return;
363 }
364
365 if (GET_CODE (to) == CONCAT && GET_CODE (from) == CONCAT)
366 {
367 convert_move (XEXP (to, 0), XEXP (from, 0), unsignedp);
368 convert_move (XEXP (to, 1), XEXP (from, 1), unsignedp);
369 return;
370 }
371
372 if (to_real)
373 {
374 rtx value, insns;
375 convert_optab tab;
376
377 gcc_assert ((GET_MODE_PRECISION (from_mode)
378 != GET_MODE_PRECISION (to_mode))
379 || (DECIMAL_FLOAT_MODE_P (from_mode)
380 != DECIMAL_FLOAT_MODE_P (to_mode)));
381
382 if (GET_MODE_PRECISION (from_mode) == GET_MODE_PRECISION (to_mode))
383 /* Conversion between decimal float and binary float, same size. */
384 tab = DECIMAL_FLOAT_MODE_P (from_mode) ? trunc_optab : sext_optab;
385 else if (GET_MODE_PRECISION (from_mode) < GET_MODE_PRECISION (to_mode))
386 tab = sext_optab;
387 else
388 tab = trunc_optab;
389
390 /* Try converting directly if the insn is supported. */
391
392 code = convert_optab_handler (tab, to_mode, from_mode);
393 if (code != CODE_FOR_nothing)
394 {
395 emit_unop_insn (code, to, from,
396 tab == sext_optab ? FLOAT_EXTEND : FLOAT_TRUNCATE);
397 return;
398 }
399
400 /* Otherwise use a libcall. */
401 libcall = convert_optab_libfunc (tab, to_mode, from_mode);
402
403 /* Is this conversion implemented yet? */
404 gcc_assert (libcall);
405
406 start_sequence ();
407 value = emit_library_call_value (libcall, NULL_RTX, LCT_CONST, to_mode,
408 1, from, from_mode);
409 insns = get_insns ();
410 end_sequence ();
411 emit_libcall_block (insns, to, value,
412 tab == trunc_optab ? gen_rtx_FLOAT_TRUNCATE (to_mode,
413 from)
414 : gen_rtx_FLOAT_EXTEND (to_mode, from));
415 return;
416 }
417
418 /* Handle pointer conversion. */ /* SPEE 900220. */
419 /* Targets are expected to provide conversion insns between PxImode and
420 xImode for all MODE_PARTIAL_INT modes they use, but no others. */
421 if (GET_MODE_CLASS (to_mode) == MODE_PARTIAL_INT)
422 {
423 enum machine_mode full_mode
424 = smallest_mode_for_size (GET_MODE_BITSIZE (to_mode), MODE_INT);
425
426 gcc_assert (convert_optab_handler (trunc_optab, to_mode, full_mode)
427 != CODE_FOR_nothing);
428
429 if (full_mode != from_mode)
430 from = convert_to_mode (full_mode, from, unsignedp);
431 emit_unop_insn (convert_optab_handler (trunc_optab, to_mode, full_mode),
432 to, from, UNKNOWN);
433 return;
434 }
435 if (GET_MODE_CLASS (from_mode) == MODE_PARTIAL_INT)
436 {
437 rtx new_from;
438 enum machine_mode full_mode
439 = smallest_mode_for_size (GET_MODE_BITSIZE (from_mode), MODE_INT);
440
441 gcc_assert (convert_optab_handler (sext_optab, full_mode, from_mode)
442 != CODE_FOR_nothing);
443
444 if (to_mode == full_mode)
445 {
446 emit_unop_insn (convert_optab_handler (sext_optab, full_mode,
447 from_mode),
448 to, from, UNKNOWN);
449 return;
450 }
451
452 new_from = gen_reg_rtx (full_mode);
453 emit_unop_insn (convert_optab_handler (sext_optab, full_mode, from_mode),
454 new_from, from, UNKNOWN);
455
456 /* else proceed to integer conversions below. */
457 from_mode = full_mode;
458 from = new_from;
459 }
460
461 /* Make sure both are fixed-point modes or both are not. */
462 gcc_assert (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode) ==
463 ALL_SCALAR_FIXED_POINT_MODE_P (to_mode));
464 if (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode))
465 {
466 /* If we widen from_mode to to_mode and they are in the same class,
467 we won't saturate the result.
468 Otherwise, always saturate the result to play safe. */
469 if (GET_MODE_CLASS (from_mode) == GET_MODE_CLASS (to_mode)
470 && GET_MODE_SIZE (from_mode) < GET_MODE_SIZE (to_mode))
471 expand_fixed_convert (to, from, 0, 0);
472 else
473 expand_fixed_convert (to, from, 0, 1);
474 return;
475 }
476
477 /* Now both modes are integers. */
478
479 /* Handle expanding beyond a word. */
480 if (GET_MODE_BITSIZE (from_mode) < GET_MODE_BITSIZE (to_mode)
481 && GET_MODE_BITSIZE (to_mode) > BITS_PER_WORD)
482 {
483 rtx insns;
484 rtx lowpart;
485 rtx fill_value;
486 rtx lowfrom;
487 int i;
488 enum machine_mode lowpart_mode;
489 int nwords = CEIL (GET_MODE_SIZE (to_mode), UNITS_PER_WORD);
490
491 /* Try converting directly if the insn is supported. */
492 if ((code = can_extend_p (to_mode, from_mode, unsignedp))
493 != CODE_FOR_nothing)
494 {
495 /* If FROM is a SUBREG, put it into a register. Do this
496 so that we always generate the same set of insns for
497 better cse'ing; if an intermediate assignment occurred,
498 we won't be doing the operation directly on the SUBREG. */
499 if (optimize > 0 && GET_CODE (from) == SUBREG)
500 from = force_reg (from_mode, from);
501 emit_unop_insn (code, to, from, equiv_code);
502 return;
503 }
504 /* Next, try converting via full word. */
505 else if (GET_MODE_BITSIZE (from_mode) < BITS_PER_WORD
506 && ((code = can_extend_p (to_mode, word_mode, unsignedp))
507 != CODE_FOR_nothing))
508 {
509 rtx word_to = gen_reg_rtx (word_mode);
510 if (REG_P (to))
511 {
512 if (reg_overlap_mentioned_p (to, from))
513 from = force_reg (from_mode, from);
514 emit_clobber (to);
515 }
516 convert_move (word_to, from, unsignedp);
517 emit_unop_insn (code, to, word_to, equiv_code);
518 return;
519 }
520
521 /* No special multiword conversion insn; do it by hand. */
522 start_sequence ();
523
524 /* Since we will turn this into a no conflict block, we must ensure
525 that the source does not overlap the target. */
526
527 if (reg_overlap_mentioned_p (to, from))
528 from = force_reg (from_mode, from);
529
530 /* Get a copy of FROM widened to a word, if necessary. */
531 if (GET_MODE_BITSIZE (from_mode) < BITS_PER_WORD)
532 lowpart_mode = word_mode;
533 else
534 lowpart_mode = from_mode;
535
536 lowfrom = convert_to_mode (lowpart_mode, from, unsignedp);
537
538 lowpart = gen_lowpart (lowpart_mode, to);
539 emit_move_insn (lowpart, lowfrom);
540
541 /* Compute the value to put in each remaining word. */
542 if (unsignedp)
543 fill_value = const0_rtx;
544 else
545 fill_value = emit_store_flag (gen_reg_rtx (word_mode),
546 LT, lowfrom, const0_rtx,
547 VOIDmode, 0, -1);
548
549 /* Fill the remaining words. */
550 for (i = GET_MODE_SIZE (lowpart_mode) / UNITS_PER_WORD; i < nwords; i++)
551 {
552 int index = (WORDS_BIG_ENDIAN ? nwords - i - 1 : i);
553 rtx subword = operand_subword (to, index, 1, to_mode);
554
555 gcc_assert (subword);
556
557 if (fill_value != subword)
558 emit_move_insn (subword, fill_value);
559 }
560
561 insns = get_insns ();
562 end_sequence ();
563
564 emit_insn (insns);
565 return;
566 }
567
568 /* Truncating multi-word to a word or less. */
569 if (GET_MODE_BITSIZE (from_mode) > BITS_PER_WORD
570 && GET_MODE_BITSIZE (to_mode) <= BITS_PER_WORD)
571 {
572 if (!((MEM_P (from)
573 && ! MEM_VOLATILE_P (from)
574 && direct_load[(int) to_mode]
575 && ! mode_dependent_address_p (XEXP (from, 0)))
576 || REG_P (from)
577 || GET_CODE (from) == SUBREG))
578 from = force_reg (from_mode, from);
579 convert_move (to, gen_lowpart (word_mode, from), 0);
580 return;
581 }
582
583 /* Now follow all the conversions between integers
584 no more than a word long. */
585
586 /* For truncation, usually we can just refer to FROM in a narrower mode. */
587 if (GET_MODE_BITSIZE (to_mode) < GET_MODE_BITSIZE (from_mode)
588 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (to_mode),
589 GET_MODE_BITSIZE (from_mode)))
590 {
591 if (!((MEM_P (from)
592 && ! MEM_VOLATILE_P (from)
593 && direct_load[(int) to_mode]
594 && ! mode_dependent_address_p (XEXP (from, 0)))
595 || REG_P (from)
596 || GET_CODE (from) == SUBREG))
597 from = force_reg (from_mode, from);
598 if (REG_P (from) && REGNO (from) < FIRST_PSEUDO_REGISTER
599 && ! HARD_REGNO_MODE_OK (REGNO (from), to_mode))
600 from = copy_to_reg (from);
601 emit_move_insn (to, gen_lowpart (to_mode, from));
602 return;
603 }
604
605 /* Handle extension. */
606 if (GET_MODE_BITSIZE (to_mode) > GET_MODE_BITSIZE (from_mode))
607 {
608 /* Convert directly if that works. */
609 if ((code = can_extend_p (to_mode, from_mode, unsignedp))
610 != CODE_FOR_nothing)
611 {
612 emit_unop_insn (code, to, from, equiv_code);
613 return;
614 }
615 else
616 {
617 enum machine_mode intermediate;
618 rtx tmp;
619 tree shift_amount;
620
621 /* Search for a mode to convert via. */
622 for (intermediate = from_mode; intermediate != VOIDmode;
623 intermediate = GET_MODE_WIDER_MODE (intermediate))
624 if (((can_extend_p (to_mode, intermediate, unsignedp)
625 != CODE_FOR_nothing)
626 || (GET_MODE_SIZE (to_mode) < GET_MODE_SIZE (intermediate)
627 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (to_mode),
628 GET_MODE_BITSIZE (intermediate))))
629 && (can_extend_p (intermediate, from_mode, unsignedp)
630 != CODE_FOR_nothing))
631 {
632 convert_move (to, convert_to_mode (intermediate, from,
633 unsignedp), unsignedp);
634 return;
635 }
636
637 /* No suitable intermediate mode.
638 Generate what we need with shifts. */
639 shift_amount = build_int_cst (NULL_TREE,
640 GET_MODE_BITSIZE (to_mode)
641 - GET_MODE_BITSIZE (from_mode));
642 from = gen_lowpart (to_mode, force_reg (from_mode, from));
643 tmp = expand_shift (LSHIFT_EXPR, to_mode, from, shift_amount,
644 to, unsignedp);
645 tmp = expand_shift (RSHIFT_EXPR, to_mode, tmp, shift_amount,
646 to, unsignedp);
647 if (tmp != to)
648 emit_move_insn (to, tmp);
649 return;
650 }
651 }
652
653 /* Support special truncate insns for certain modes. */
654 if (convert_optab_handler (trunc_optab, to_mode,
655 from_mode) != CODE_FOR_nothing)
656 {
657 emit_unop_insn (convert_optab_handler (trunc_optab, to_mode, from_mode),
658 to, from, UNKNOWN);
659 return;
660 }
661
662 /* Handle truncation of volatile memrefs, and so on;
663 the things that couldn't be truncated directly,
664 and for which there was no special instruction.
665
666 ??? Code above formerly short-circuited this, for most integer
667 mode pairs, with a force_reg in from_mode followed by a recursive
668 call to this routine. Appears always to have been wrong. */
669 if (GET_MODE_BITSIZE (to_mode) < GET_MODE_BITSIZE (from_mode))
670 {
671 rtx temp = force_reg (to_mode, gen_lowpart (to_mode, from));
672 emit_move_insn (to, temp);
673 return;
674 }
675
676 /* Mode combination is not recognized. */
677 gcc_unreachable ();
678 }
679
680 /* Return an rtx for a value that would result
681 from converting X to mode MODE.
682 Both X and MODE may be floating, or both integer.
683 UNSIGNEDP is nonzero if X is an unsigned value.
684 This can be done by referring to a part of X in place
685 or by copying to a new temporary with conversion. */
686
687 rtx
688 convert_to_mode (enum machine_mode mode, rtx x, int unsignedp)
689 {
690 return convert_modes (mode, VOIDmode, x, unsignedp);
691 }
692
693 /* Return an rtx for a value that would result
694 from converting X from mode OLDMODE to mode MODE.
695 Both modes may be floating, or both integer.
696 UNSIGNEDP is nonzero if X is an unsigned value.
697
698 This can be done by referring to a part of X in place
699 or by copying to a new temporary with conversion.
700
701 You can give VOIDmode for OLDMODE, if you are sure X has a nonvoid mode. */
702
703 rtx
704 convert_modes (enum machine_mode mode, enum machine_mode oldmode, rtx x, int unsignedp)
705 {
706 rtx temp;
707
708 /* If FROM is a SUBREG that indicates that we have already done at least
709 the required extension, strip it. */
710
711 if (GET_CODE (x) == SUBREG && SUBREG_PROMOTED_VAR_P (x)
712 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) >= GET_MODE_SIZE (mode)
713 && SUBREG_PROMOTED_UNSIGNED_P (x) == unsignedp)
714 x = gen_lowpart (mode, x);
715
716 if (GET_MODE (x) != VOIDmode)
717 oldmode = GET_MODE (x);
718
719 if (mode == oldmode)
720 return x;
721
722 /* There is one case that we must handle specially: If we are converting
723 a CONST_INT into a mode whose size is twice HOST_BITS_PER_WIDE_INT and
724 we are to interpret the constant as unsigned, gen_lowpart will do
725 the wrong if the constant appears negative. What we want to do is
726 make the high-order word of the constant zero, not all ones. */
727
728 if (unsignedp && GET_MODE_CLASS (mode) == MODE_INT
729 && GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT
730 && CONST_INT_P (x) && INTVAL (x) < 0)
731 {
732 double_int val = uhwi_to_double_int (INTVAL (x));
733
734 /* We need to zero extend VAL. */
735 if (oldmode != VOIDmode)
736 val = double_int_zext (val, GET_MODE_BITSIZE (oldmode));
737
738 return immed_double_int_const (val, mode);
739 }
740
741 /* We can do this with a gen_lowpart if both desired and current modes
742 are integer, and this is either a constant integer, a register, or a
743 non-volatile MEM. Except for the constant case where MODE is no
744 wider than HOST_BITS_PER_WIDE_INT, we must be narrowing the operand. */
745
746 if ((CONST_INT_P (x)
747 && GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
748 || (GET_MODE_CLASS (mode) == MODE_INT
749 && GET_MODE_CLASS (oldmode) == MODE_INT
750 && (GET_CODE (x) == CONST_DOUBLE
751 || (GET_MODE_SIZE (mode) <= GET_MODE_SIZE (oldmode)
752 && ((MEM_P (x) && ! MEM_VOLATILE_P (x)
753 && direct_load[(int) mode])
754 || (REG_P (x)
755 && (! HARD_REGISTER_P (x)
756 || HARD_REGNO_MODE_OK (REGNO (x), mode))
757 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (mode),
758 GET_MODE_BITSIZE (GET_MODE (x)))))))))
759 {
760 /* ?? If we don't know OLDMODE, we have to assume here that
761 X does not need sign- or zero-extension. This may not be
762 the case, but it's the best we can do. */
763 if (CONST_INT_P (x) && oldmode != VOIDmode
764 && GET_MODE_SIZE (mode) > GET_MODE_SIZE (oldmode))
765 {
766 HOST_WIDE_INT val = INTVAL (x);
767 int width = GET_MODE_BITSIZE (oldmode);
768
769 /* We must sign or zero-extend in this case. Start by
770 zero-extending, then sign extend if we need to. */
771 val &= ((HOST_WIDE_INT) 1 << width) - 1;
772 if (! unsignedp
773 && (val & ((HOST_WIDE_INT) 1 << (width - 1))))
774 val |= (HOST_WIDE_INT) (-1) << width;
775
776 return gen_int_mode (val, mode);
777 }
778
779 return gen_lowpart (mode, x);
780 }
781
782 /* Converting from integer constant into mode is always equivalent to an
783 subreg operation. */
784 if (VECTOR_MODE_P (mode) && GET_MODE (x) == VOIDmode)
785 {
786 gcc_assert (GET_MODE_BITSIZE (mode) == GET_MODE_BITSIZE (oldmode));
787 return simplify_gen_subreg (mode, x, oldmode, 0);
788 }
789
790 temp = gen_reg_rtx (mode);
791 convert_move (temp, x, unsignedp);
792 return temp;
793 }
794 \f
795 /* Return the largest alignment we can use for doing a move (or store)
796 of MAX_PIECES. ALIGN is the largest alignment we could use. */
797
798 static unsigned int
799 alignment_for_piecewise_move (unsigned int max_pieces, unsigned int align)
800 {
801 enum machine_mode tmode;
802
803 tmode = mode_for_size (max_pieces * BITS_PER_UNIT, MODE_INT, 1);
804 if (align >= GET_MODE_ALIGNMENT (tmode))
805 align = GET_MODE_ALIGNMENT (tmode);
806 else
807 {
808 enum machine_mode tmode, xmode;
809
810 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT), xmode = tmode;
811 tmode != VOIDmode;
812 xmode = tmode, tmode = GET_MODE_WIDER_MODE (tmode))
813 if (GET_MODE_SIZE (tmode) > max_pieces
814 || SLOW_UNALIGNED_ACCESS (tmode, align))
815 break;
816
817 align = MAX (align, GET_MODE_ALIGNMENT (xmode));
818 }
819
820 return align;
821 }
822
823 /* Return the widest integer mode no wider than SIZE. If no such mode
824 can be found, return VOIDmode. */
825
826 static enum machine_mode
827 widest_int_mode_for_size (unsigned int size)
828 {
829 enum machine_mode tmode, mode = VOIDmode;
830
831 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT);
832 tmode != VOIDmode; tmode = GET_MODE_WIDER_MODE (tmode))
833 if (GET_MODE_SIZE (tmode) < size)
834 mode = tmode;
835
836 return mode;
837 }
838
839 /* STORE_MAX_PIECES is the number of bytes at a time that we can
840 store efficiently. Due to internal GCC limitations, this is
841 MOVE_MAX_PIECES limited by the number of bytes GCC can represent
842 for an immediate constant. */
843
844 #define STORE_MAX_PIECES MIN (MOVE_MAX_PIECES, 2 * sizeof (HOST_WIDE_INT))
845
846 /* Determine whether the LEN bytes can be moved by using several move
847 instructions. Return nonzero if a call to move_by_pieces should
848 succeed. */
849
850 int
851 can_move_by_pieces (unsigned HOST_WIDE_INT len,
852 unsigned int align ATTRIBUTE_UNUSED)
853 {
854 return MOVE_BY_PIECES_P (len, align);
855 }
856
857 /* Generate several move instructions to copy LEN bytes from block FROM to
858 block TO. (These are MEM rtx's with BLKmode).
859
860 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
861 used to push FROM to the stack.
862
863 ALIGN is maximum stack alignment we can assume.
864
865 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
866 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
867 stpcpy. */
868
869 rtx
870 move_by_pieces (rtx to, rtx from, unsigned HOST_WIDE_INT len,
871 unsigned int align, int endp)
872 {
873 struct move_by_pieces_d data;
874 enum machine_mode to_addr_mode, from_addr_mode
875 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (from));
876 rtx to_addr, from_addr = XEXP (from, 0);
877 unsigned int max_size = MOVE_MAX_PIECES + 1;
878 enum insn_code icode;
879
880 align = MIN (to ? MEM_ALIGN (to) : align, MEM_ALIGN (from));
881
882 data.offset = 0;
883 data.from_addr = from_addr;
884 if (to)
885 {
886 to_addr_mode = targetm.addr_space.address_mode (MEM_ADDR_SPACE (to));
887 to_addr = XEXP (to, 0);
888 data.to = to;
889 data.autinc_to
890 = (GET_CODE (to_addr) == PRE_INC || GET_CODE (to_addr) == PRE_DEC
891 || GET_CODE (to_addr) == POST_INC || GET_CODE (to_addr) == POST_DEC);
892 data.reverse
893 = (GET_CODE (to_addr) == PRE_DEC || GET_CODE (to_addr) == POST_DEC);
894 }
895 else
896 {
897 to_addr_mode = VOIDmode;
898 to_addr = NULL_RTX;
899 data.to = NULL_RTX;
900 data.autinc_to = 1;
901 #ifdef STACK_GROWS_DOWNWARD
902 data.reverse = 1;
903 #else
904 data.reverse = 0;
905 #endif
906 }
907 data.to_addr = to_addr;
908 data.from = from;
909 data.autinc_from
910 = (GET_CODE (from_addr) == PRE_INC || GET_CODE (from_addr) == PRE_DEC
911 || GET_CODE (from_addr) == POST_INC
912 || GET_CODE (from_addr) == POST_DEC);
913
914 data.explicit_inc_from = 0;
915 data.explicit_inc_to = 0;
916 if (data.reverse) data.offset = len;
917 data.len = len;
918
919 /* If copying requires more than two move insns,
920 copy addresses to registers (to make displacements shorter)
921 and use post-increment if available. */
922 if (!(data.autinc_from && data.autinc_to)
923 && move_by_pieces_ninsns (len, align, max_size) > 2)
924 {
925 /* Find the mode of the largest move...
926 MODE might not be used depending on the definitions of the
927 USE_* macros below. */
928 enum machine_mode mode ATTRIBUTE_UNUSED
929 = widest_int_mode_for_size (max_size);
930
931 if (USE_LOAD_PRE_DECREMENT (mode) && data.reverse && ! data.autinc_from)
932 {
933 data.from_addr = copy_to_mode_reg (from_addr_mode,
934 plus_constant (from_addr, len));
935 data.autinc_from = 1;
936 data.explicit_inc_from = -1;
937 }
938 if (USE_LOAD_POST_INCREMENT (mode) && ! data.autinc_from)
939 {
940 data.from_addr = copy_to_mode_reg (from_addr_mode, from_addr);
941 data.autinc_from = 1;
942 data.explicit_inc_from = 1;
943 }
944 if (!data.autinc_from && CONSTANT_P (from_addr))
945 data.from_addr = copy_to_mode_reg (from_addr_mode, from_addr);
946 if (USE_STORE_PRE_DECREMENT (mode) && data.reverse && ! data.autinc_to)
947 {
948 data.to_addr = copy_to_mode_reg (to_addr_mode,
949 plus_constant (to_addr, len));
950 data.autinc_to = 1;
951 data.explicit_inc_to = -1;
952 }
953 if (USE_STORE_POST_INCREMENT (mode) && ! data.reverse && ! data.autinc_to)
954 {
955 data.to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
956 data.autinc_to = 1;
957 data.explicit_inc_to = 1;
958 }
959 if (!data.autinc_to && CONSTANT_P (to_addr))
960 data.to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
961 }
962
963 align = alignment_for_piecewise_move (MOVE_MAX_PIECES, align);
964
965 /* First move what we can in the largest integer mode, then go to
966 successively smaller modes. */
967
968 while (max_size > 1)
969 {
970 enum machine_mode mode = widest_int_mode_for_size (max_size);
971
972 if (mode == VOIDmode)
973 break;
974
975 icode = optab_handler (mov_optab, mode);
976 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
977 move_by_pieces_1 (GEN_FCN (icode), mode, &data);
978
979 max_size = GET_MODE_SIZE (mode);
980 }
981
982 /* The code above should have handled everything. */
983 gcc_assert (!data.len);
984
985 if (endp)
986 {
987 rtx to1;
988
989 gcc_assert (!data.reverse);
990 if (data.autinc_to)
991 {
992 if (endp == 2)
993 {
994 if (HAVE_POST_INCREMENT && data.explicit_inc_to > 0)
995 emit_insn (gen_add2_insn (data.to_addr, constm1_rtx));
996 else
997 data.to_addr = copy_to_mode_reg (to_addr_mode,
998 plus_constant (data.to_addr,
999 -1));
1000 }
1001 to1 = adjust_automodify_address (data.to, QImode, data.to_addr,
1002 data.offset);
1003 }
1004 else
1005 {
1006 if (endp == 2)
1007 --data.offset;
1008 to1 = adjust_address (data.to, QImode, data.offset);
1009 }
1010 return to1;
1011 }
1012 else
1013 return data.to;
1014 }
1015
1016 /* Return number of insns required to move L bytes by pieces.
1017 ALIGN (in bits) is maximum alignment we can assume. */
1018
1019 static unsigned HOST_WIDE_INT
1020 move_by_pieces_ninsns (unsigned HOST_WIDE_INT l, unsigned int align,
1021 unsigned int max_size)
1022 {
1023 unsigned HOST_WIDE_INT n_insns = 0;
1024
1025 align = alignment_for_piecewise_move (MOVE_MAX_PIECES, align);
1026
1027 while (max_size > 1)
1028 {
1029 enum machine_mode mode;
1030 enum insn_code icode;
1031
1032 mode = widest_int_mode_for_size (max_size);
1033
1034 if (mode == VOIDmode)
1035 break;
1036
1037 icode = optab_handler (mov_optab, mode);
1038 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
1039 n_insns += l / GET_MODE_SIZE (mode), l %= GET_MODE_SIZE (mode);
1040
1041 max_size = GET_MODE_SIZE (mode);
1042 }
1043
1044 gcc_assert (!l);
1045 return n_insns;
1046 }
1047
1048 /* Subroutine of move_by_pieces. Move as many bytes as appropriate
1049 with move instructions for mode MODE. GENFUN is the gen_... function
1050 to make a move insn for that mode. DATA has all the other info. */
1051
1052 static void
1053 move_by_pieces_1 (rtx (*genfun) (rtx, ...), enum machine_mode mode,
1054 struct move_by_pieces_d *data)
1055 {
1056 unsigned int size = GET_MODE_SIZE (mode);
1057 rtx to1 = NULL_RTX, from1;
1058
1059 while (data->len >= size)
1060 {
1061 if (data->reverse)
1062 data->offset -= size;
1063
1064 if (data->to)
1065 {
1066 if (data->autinc_to)
1067 to1 = adjust_automodify_address (data->to, mode, data->to_addr,
1068 data->offset);
1069 else
1070 to1 = adjust_address (data->to, mode, data->offset);
1071 }
1072
1073 if (data->autinc_from)
1074 from1 = adjust_automodify_address (data->from, mode, data->from_addr,
1075 data->offset);
1076 else
1077 from1 = adjust_address (data->from, mode, data->offset);
1078
1079 if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0)
1080 emit_insn (gen_add2_insn (data->to_addr,
1081 GEN_INT (-(HOST_WIDE_INT)size)));
1082 if (HAVE_PRE_DECREMENT && data->explicit_inc_from < 0)
1083 emit_insn (gen_add2_insn (data->from_addr,
1084 GEN_INT (-(HOST_WIDE_INT)size)));
1085
1086 if (data->to)
1087 emit_insn ((*genfun) (to1, from1));
1088 else
1089 {
1090 #ifdef PUSH_ROUNDING
1091 emit_single_push_insn (mode, from1, NULL);
1092 #else
1093 gcc_unreachable ();
1094 #endif
1095 }
1096
1097 if (HAVE_POST_INCREMENT && data->explicit_inc_to > 0)
1098 emit_insn (gen_add2_insn (data->to_addr, GEN_INT (size)));
1099 if (HAVE_POST_INCREMENT && data->explicit_inc_from > 0)
1100 emit_insn (gen_add2_insn (data->from_addr, GEN_INT (size)));
1101
1102 if (! data->reverse)
1103 data->offset += size;
1104
1105 data->len -= size;
1106 }
1107 }
1108 \f
1109 /* Emit code to move a block Y to a block X. This may be done with
1110 string-move instructions, with multiple scalar move instructions,
1111 or with a library call.
1112
1113 Both X and Y must be MEM rtx's (perhaps inside VOLATILE) with mode BLKmode.
1114 SIZE is an rtx that says how long they are.
1115 ALIGN is the maximum alignment we can assume they have.
1116 METHOD describes what kind of copy this is, and what mechanisms may be used.
1117
1118 Return the address of the new block, if memcpy is called and returns it,
1119 0 otherwise. */
1120
1121 rtx
1122 emit_block_move_hints (rtx x, rtx y, rtx size, enum block_op_methods method,
1123 unsigned int expected_align, HOST_WIDE_INT expected_size)
1124 {
1125 bool may_use_call;
1126 rtx retval = 0;
1127 unsigned int align;
1128
1129 gcc_assert (size);
1130 if (CONST_INT_P (size)
1131 && INTVAL (size) == 0)
1132 return 0;
1133
1134 switch (method)
1135 {
1136 case BLOCK_OP_NORMAL:
1137 case BLOCK_OP_TAILCALL:
1138 may_use_call = true;
1139 break;
1140
1141 case BLOCK_OP_CALL_PARM:
1142 may_use_call = block_move_libcall_safe_for_call_parm ();
1143
1144 /* Make inhibit_defer_pop nonzero around the library call
1145 to force it to pop the arguments right away. */
1146 NO_DEFER_POP;
1147 break;
1148
1149 case BLOCK_OP_NO_LIBCALL:
1150 may_use_call = false;
1151 break;
1152
1153 default:
1154 gcc_unreachable ();
1155 }
1156
1157 gcc_assert (MEM_P (x) && MEM_P (y));
1158 align = MIN (MEM_ALIGN (x), MEM_ALIGN (y));
1159 gcc_assert (align >= BITS_PER_UNIT);
1160
1161 /* Make sure we've got BLKmode addresses; store_one_arg can decide that
1162 block copy is more efficient for other large modes, e.g. DCmode. */
1163 x = adjust_address (x, BLKmode, 0);
1164 y = adjust_address (y, BLKmode, 0);
1165
1166 /* Set MEM_SIZE as appropriate for this block copy. The main place this
1167 can be incorrect is coming from __builtin_memcpy. */
1168 if (CONST_INT_P (size))
1169 {
1170 x = shallow_copy_rtx (x);
1171 y = shallow_copy_rtx (y);
1172 set_mem_size (x, size);
1173 set_mem_size (y, size);
1174 }
1175
1176 if (CONST_INT_P (size) && MOVE_BY_PIECES_P (INTVAL (size), align))
1177 move_by_pieces (x, y, INTVAL (size), align, 0);
1178 else if (emit_block_move_via_movmem (x, y, size, align,
1179 expected_align, expected_size))
1180 ;
1181 else if (may_use_call
1182 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (x))
1183 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (y)))
1184 retval = emit_block_move_via_libcall (x, y, size,
1185 method == BLOCK_OP_TAILCALL);
1186 else
1187 emit_block_move_via_loop (x, y, size, align);
1188
1189 if (method == BLOCK_OP_CALL_PARM)
1190 OK_DEFER_POP;
1191
1192 return retval;
1193 }
1194
1195 rtx
1196 emit_block_move (rtx x, rtx y, rtx size, enum block_op_methods method)
1197 {
1198 return emit_block_move_hints (x, y, size, method, 0, -1);
1199 }
1200
1201 /* A subroutine of emit_block_move. Returns true if calling the
1202 block move libcall will not clobber any parameters which may have
1203 already been placed on the stack. */
1204
1205 static bool
1206 block_move_libcall_safe_for_call_parm (void)
1207 {
1208 #if defined (REG_PARM_STACK_SPACE)
1209 tree fn;
1210 #endif
1211
1212 /* If arguments are pushed on the stack, then they're safe. */
1213 if (PUSH_ARGS)
1214 return true;
1215
1216 /* If registers go on the stack anyway, any argument is sure to clobber
1217 an outgoing argument. */
1218 #if defined (REG_PARM_STACK_SPACE)
1219 fn = emit_block_move_libcall_fn (false);
1220 /* Avoid set but not used warning if *REG_PARM_STACK_SPACE doesn't
1221 depend on its argument. */
1222 (void) fn;
1223 if (OUTGOING_REG_PARM_STACK_SPACE ((!fn ? NULL_TREE : TREE_TYPE (fn)))
1224 && REG_PARM_STACK_SPACE (fn) != 0)
1225 return false;
1226 #endif
1227
1228 /* If any argument goes in memory, then it might clobber an outgoing
1229 argument. */
1230 {
1231 CUMULATIVE_ARGS args_so_far;
1232 tree fn, arg;
1233
1234 fn = emit_block_move_libcall_fn (false);
1235 INIT_CUMULATIVE_ARGS (args_so_far, TREE_TYPE (fn), NULL_RTX, 0, 3);
1236
1237 arg = TYPE_ARG_TYPES (TREE_TYPE (fn));
1238 for ( ; arg != void_list_node ; arg = TREE_CHAIN (arg))
1239 {
1240 enum machine_mode mode = TYPE_MODE (TREE_VALUE (arg));
1241 rtx tmp = targetm.calls.function_arg (&args_so_far, mode,
1242 NULL_TREE, true);
1243 if (!tmp || !REG_P (tmp))
1244 return false;
1245 if (targetm.calls.arg_partial_bytes (&args_so_far, mode, NULL, 1))
1246 return false;
1247 targetm.calls.function_arg_advance (&args_so_far, mode,
1248 NULL_TREE, true);
1249 }
1250 }
1251 return true;
1252 }
1253
1254 /* A subroutine of emit_block_move. Expand a movmem pattern;
1255 return true if successful. */
1256
1257 static bool
1258 emit_block_move_via_movmem (rtx x, rtx y, rtx size, unsigned int align,
1259 unsigned int expected_align, HOST_WIDE_INT expected_size)
1260 {
1261 int save_volatile_ok = volatile_ok;
1262 enum machine_mode mode;
1263
1264 if (expected_align < align)
1265 expected_align = align;
1266
1267 /* Since this is a move insn, we don't care about volatility. */
1268 volatile_ok = 1;
1269
1270 /* Try the most limited insn first, because there's no point
1271 including more than one in the machine description unless
1272 the more limited one has some advantage. */
1273
1274 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
1275 mode = GET_MODE_WIDER_MODE (mode))
1276 {
1277 enum insn_code code = direct_optab_handler (movmem_optab, mode);
1278
1279 if (code != CODE_FOR_nothing
1280 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
1281 here because if SIZE is less than the mode mask, as it is
1282 returned by the macro, it will definitely be less than the
1283 actual mode mask. */
1284 && ((CONST_INT_P (size)
1285 && ((unsigned HOST_WIDE_INT) INTVAL (size)
1286 <= (GET_MODE_MASK (mode) >> 1)))
1287 || GET_MODE_BITSIZE (mode) >= BITS_PER_WORD))
1288 {
1289 struct expand_operand ops[6];
1290 unsigned int nops;
1291
1292 /* ??? When called via emit_block_move_for_call, it'd be
1293 nice if there were some way to inform the backend, so
1294 that it doesn't fail the expansion because it thinks
1295 emitting the libcall would be more efficient. */
1296 nops = insn_data[(int) code].n_operands;
1297 /* ??? n_operands includes match_scratches; find some other
1298 way to select the 6 operand variant, or force all targets
1299 to have exactly 6 operands. */
1300 gcc_assert (nops >= 4 && nops <= 6);
1301
1302 create_fixed_operand (&ops[0], x);
1303 create_fixed_operand (&ops[1], y);
1304 /* The check above guarantees that this size conversion is valid. */
1305 create_convert_operand_to (&ops[2], size, mode, true);
1306 create_integer_operand (&ops[3], align / BITS_PER_UNIT);
1307 if (nops == 6)
1308 {
1309 create_integer_operand (&ops[4], expected_align / BITS_PER_UNIT);
1310 create_integer_operand (&ops[5], expected_size);
1311 }
1312 if (maybe_expand_insn (code, nops, ops))
1313 {
1314 volatile_ok = save_volatile_ok;
1315 return true;
1316 }
1317 }
1318 }
1319
1320 volatile_ok = save_volatile_ok;
1321 return false;
1322 }
1323
1324 /* A subroutine of emit_block_move. Expand a call to memcpy.
1325 Return the return value from memcpy, 0 otherwise. */
1326
1327 rtx
1328 emit_block_move_via_libcall (rtx dst, rtx src, rtx size, bool tailcall)
1329 {
1330 rtx dst_addr, src_addr;
1331 tree call_expr, fn, src_tree, dst_tree, size_tree;
1332 enum machine_mode size_mode;
1333 rtx retval;
1334
1335 /* Emit code to copy the addresses of DST and SRC and SIZE into new
1336 pseudos. We can then place those new pseudos into a VAR_DECL and
1337 use them later. */
1338
1339 dst_addr = copy_to_mode_reg (Pmode, XEXP (dst, 0));
1340 src_addr = copy_to_mode_reg (Pmode, XEXP (src, 0));
1341
1342 dst_addr = convert_memory_address (ptr_mode, dst_addr);
1343 src_addr = convert_memory_address (ptr_mode, src_addr);
1344
1345 dst_tree = make_tree (ptr_type_node, dst_addr);
1346 src_tree = make_tree (ptr_type_node, src_addr);
1347
1348 size_mode = TYPE_MODE (sizetype);
1349
1350 size = convert_to_mode (size_mode, size, 1);
1351 size = copy_to_mode_reg (size_mode, size);
1352
1353 /* It is incorrect to use the libcall calling conventions to call
1354 memcpy in this context. This could be a user call to memcpy and
1355 the user may wish to examine the return value from memcpy. For
1356 targets where libcalls and normal calls have different conventions
1357 for returning pointers, we could end up generating incorrect code. */
1358
1359 size_tree = make_tree (sizetype, size);
1360
1361 fn = emit_block_move_libcall_fn (true);
1362 call_expr = build_call_expr (fn, 3, dst_tree, src_tree, size_tree);
1363 CALL_EXPR_TAILCALL (call_expr) = tailcall;
1364
1365 retval = expand_normal (call_expr);
1366
1367 return retval;
1368 }
1369
1370 /* A subroutine of emit_block_move_via_libcall. Create the tree node
1371 for the function we use for block copies. The first time FOR_CALL
1372 is true, we call assemble_external. */
1373
1374 static GTY(()) tree block_move_fn;
1375
1376 void
1377 init_block_move_fn (const char *asmspec)
1378 {
1379 if (!block_move_fn)
1380 {
1381 tree args, fn;
1382
1383 fn = get_identifier ("memcpy");
1384 args = build_function_type_list (ptr_type_node, ptr_type_node,
1385 const_ptr_type_node, sizetype,
1386 NULL_TREE);
1387
1388 fn = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL, fn, args);
1389 DECL_EXTERNAL (fn) = 1;
1390 TREE_PUBLIC (fn) = 1;
1391 DECL_ARTIFICIAL (fn) = 1;
1392 TREE_NOTHROW (fn) = 1;
1393 DECL_VISIBILITY (fn) = VISIBILITY_DEFAULT;
1394 DECL_VISIBILITY_SPECIFIED (fn) = 1;
1395
1396 block_move_fn = fn;
1397 }
1398
1399 if (asmspec)
1400 set_user_assembler_name (block_move_fn, asmspec);
1401 }
1402
1403 static tree
1404 emit_block_move_libcall_fn (int for_call)
1405 {
1406 static bool emitted_extern;
1407
1408 if (!block_move_fn)
1409 init_block_move_fn (NULL);
1410
1411 if (for_call && !emitted_extern)
1412 {
1413 emitted_extern = true;
1414 make_decl_rtl (block_move_fn);
1415 assemble_external (block_move_fn);
1416 }
1417
1418 return block_move_fn;
1419 }
1420
1421 /* A subroutine of emit_block_move. Copy the data via an explicit
1422 loop. This is used only when libcalls are forbidden. */
1423 /* ??? It'd be nice to copy in hunks larger than QImode. */
1424
1425 static void
1426 emit_block_move_via_loop (rtx x, rtx y, rtx size,
1427 unsigned int align ATTRIBUTE_UNUSED)
1428 {
1429 rtx cmp_label, top_label, iter, x_addr, y_addr, tmp;
1430 enum machine_mode x_addr_mode
1431 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (x));
1432 enum machine_mode y_addr_mode
1433 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (y));
1434 enum machine_mode iter_mode;
1435
1436 iter_mode = GET_MODE (size);
1437 if (iter_mode == VOIDmode)
1438 iter_mode = word_mode;
1439
1440 top_label = gen_label_rtx ();
1441 cmp_label = gen_label_rtx ();
1442 iter = gen_reg_rtx (iter_mode);
1443
1444 emit_move_insn (iter, const0_rtx);
1445
1446 x_addr = force_operand (XEXP (x, 0), NULL_RTX);
1447 y_addr = force_operand (XEXP (y, 0), NULL_RTX);
1448 do_pending_stack_adjust ();
1449
1450 emit_jump (cmp_label);
1451 emit_label (top_label);
1452
1453 tmp = convert_modes (x_addr_mode, iter_mode, iter, true);
1454 x_addr = gen_rtx_PLUS (x_addr_mode, x_addr, tmp);
1455
1456 if (x_addr_mode != y_addr_mode)
1457 tmp = convert_modes (y_addr_mode, iter_mode, iter, true);
1458 y_addr = gen_rtx_PLUS (y_addr_mode, y_addr, tmp);
1459
1460 x = change_address (x, QImode, x_addr);
1461 y = change_address (y, QImode, y_addr);
1462
1463 emit_move_insn (x, y);
1464
1465 tmp = expand_simple_binop (iter_mode, PLUS, iter, const1_rtx, iter,
1466 true, OPTAB_LIB_WIDEN);
1467 if (tmp != iter)
1468 emit_move_insn (iter, tmp);
1469
1470 emit_label (cmp_label);
1471
1472 emit_cmp_and_jump_insns (iter, size, LT, NULL_RTX, iter_mode,
1473 true, top_label);
1474 }
1475 \f
1476 /* Copy all or part of a value X into registers starting at REGNO.
1477 The number of registers to be filled is NREGS. */
1478
1479 void
1480 move_block_to_reg (int regno, rtx x, int nregs, enum machine_mode mode)
1481 {
1482 int i;
1483 #ifdef HAVE_load_multiple
1484 rtx pat;
1485 rtx last;
1486 #endif
1487
1488 if (nregs == 0)
1489 return;
1490
1491 if (CONSTANT_P (x) && ! LEGITIMATE_CONSTANT_P (x))
1492 x = validize_mem (force_const_mem (mode, x));
1493
1494 /* See if the machine can do this with a load multiple insn. */
1495 #ifdef HAVE_load_multiple
1496 if (HAVE_load_multiple)
1497 {
1498 last = get_last_insn ();
1499 pat = gen_load_multiple (gen_rtx_REG (word_mode, regno), x,
1500 GEN_INT (nregs));
1501 if (pat)
1502 {
1503 emit_insn (pat);
1504 return;
1505 }
1506 else
1507 delete_insns_since (last);
1508 }
1509 #endif
1510
1511 for (i = 0; i < nregs; i++)
1512 emit_move_insn (gen_rtx_REG (word_mode, regno + i),
1513 operand_subword_force (x, i, mode));
1514 }
1515
1516 /* Copy all or part of a BLKmode value X out of registers starting at REGNO.
1517 The number of registers to be filled is NREGS. */
1518
1519 void
1520 move_block_from_reg (int regno, rtx x, int nregs)
1521 {
1522 int i;
1523
1524 if (nregs == 0)
1525 return;
1526
1527 /* See if the machine can do this with a store multiple insn. */
1528 #ifdef HAVE_store_multiple
1529 if (HAVE_store_multiple)
1530 {
1531 rtx last = get_last_insn ();
1532 rtx pat = gen_store_multiple (x, gen_rtx_REG (word_mode, regno),
1533 GEN_INT (nregs));
1534 if (pat)
1535 {
1536 emit_insn (pat);
1537 return;
1538 }
1539 else
1540 delete_insns_since (last);
1541 }
1542 #endif
1543
1544 for (i = 0; i < nregs; i++)
1545 {
1546 rtx tem = operand_subword (x, i, 1, BLKmode);
1547
1548 gcc_assert (tem);
1549
1550 emit_move_insn (tem, gen_rtx_REG (word_mode, regno + i));
1551 }
1552 }
1553
1554 /* Generate a PARALLEL rtx for a new non-consecutive group of registers from
1555 ORIG, where ORIG is a non-consecutive group of registers represented by
1556 a PARALLEL. The clone is identical to the original except in that the
1557 original set of registers is replaced by a new set of pseudo registers.
1558 The new set has the same modes as the original set. */
1559
1560 rtx
1561 gen_group_rtx (rtx orig)
1562 {
1563 int i, length;
1564 rtx *tmps;
1565
1566 gcc_assert (GET_CODE (orig) == PARALLEL);
1567
1568 length = XVECLEN (orig, 0);
1569 tmps = XALLOCAVEC (rtx, length);
1570
1571 /* Skip a NULL entry in first slot. */
1572 i = XEXP (XVECEXP (orig, 0, 0), 0) ? 0 : 1;
1573
1574 if (i)
1575 tmps[0] = 0;
1576
1577 for (; i < length; i++)
1578 {
1579 enum machine_mode mode = GET_MODE (XEXP (XVECEXP (orig, 0, i), 0));
1580 rtx offset = XEXP (XVECEXP (orig, 0, i), 1);
1581
1582 tmps[i] = gen_rtx_EXPR_LIST (VOIDmode, gen_reg_rtx (mode), offset);
1583 }
1584
1585 return gen_rtx_PARALLEL (GET_MODE (orig), gen_rtvec_v (length, tmps));
1586 }
1587
1588 /* A subroutine of emit_group_load. Arguments as for emit_group_load,
1589 except that values are placed in TMPS[i], and must later be moved
1590 into corresponding XEXP (XVECEXP (DST, 0, i), 0) element. */
1591
1592 static void
1593 emit_group_load_1 (rtx *tmps, rtx dst, rtx orig_src, tree type, int ssize)
1594 {
1595 rtx src;
1596 int start, i;
1597 enum machine_mode m = GET_MODE (orig_src);
1598
1599 gcc_assert (GET_CODE (dst) == PARALLEL);
1600
1601 if (m != VOIDmode
1602 && !SCALAR_INT_MODE_P (m)
1603 && !MEM_P (orig_src)
1604 && GET_CODE (orig_src) != CONCAT)
1605 {
1606 enum machine_mode imode = int_mode_for_mode (GET_MODE (orig_src));
1607 if (imode == BLKmode)
1608 src = assign_stack_temp (GET_MODE (orig_src), ssize, 0);
1609 else
1610 src = gen_reg_rtx (imode);
1611 if (imode != BLKmode)
1612 src = gen_lowpart (GET_MODE (orig_src), src);
1613 emit_move_insn (src, orig_src);
1614 /* ...and back again. */
1615 if (imode != BLKmode)
1616 src = gen_lowpart (imode, src);
1617 emit_group_load_1 (tmps, dst, src, type, ssize);
1618 return;
1619 }
1620
1621 /* Check for a NULL entry, used to indicate that the parameter goes
1622 both on the stack and in registers. */
1623 if (XEXP (XVECEXP (dst, 0, 0), 0))
1624 start = 0;
1625 else
1626 start = 1;
1627
1628 /* Process the pieces. */
1629 for (i = start; i < XVECLEN (dst, 0); i++)
1630 {
1631 enum machine_mode mode = GET_MODE (XEXP (XVECEXP (dst, 0, i), 0));
1632 HOST_WIDE_INT bytepos = INTVAL (XEXP (XVECEXP (dst, 0, i), 1));
1633 unsigned int bytelen = GET_MODE_SIZE (mode);
1634 int shift = 0;
1635
1636 /* Handle trailing fragments that run over the size of the struct. */
1637 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
1638 {
1639 /* Arrange to shift the fragment to where it belongs.
1640 extract_bit_field loads to the lsb of the reg. */
1641 if (
1642 #ifdef BLOCK_REG_PADDING
1643 BLOCK_REG_PADDING (GET_MODE (orig_src), type, i == start)
1644 == (BYTES_BIG_ENDIAN ? upward : downward)
1645 #else
1646 BYTES_BIG_ENDIAN
1647 #endif
1648 )
1649 shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT;
1650 bytelen = ssize - bytepos;
1651 gcc_assert (bytelen > 0);
1652 }
1653
1654 /* If we won't be loading directly from memory, protect the real source
1655 from strange tricks we might play; but make sure that the source can
1656 be loaded directly into the destination. */
1657 src = orig_src;
1658 if (!MEM_P (orig_src)
1659 && (!CONSTANT_P (orig_src)
1660 || (GET_MODE (orig_src) != mode
1661 && GET_MODE (orig_src) != VOIDmode)))
1662 {
1663 if (GET_MODE (orig_src) == VOIDmode)
1664 src = gen_reg_rtx (mode);
1665 else
1666 src = gen_reg_rtx (GET_MODE (orig_src));
1667
1668 emit_move_insn (src, orig_src);
1669 }
1670
1671 /* Optimize the access just a bit. */
1672 if (MEM_P (src)
1673 && (! SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (src))
1674 || MEM_ALIGN (src) >= GET_MODE_ALIGNMENT (mode))
1675 && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0
1676 && bytelen == GET_MODE_SIZE (mode))
1677 {
1678 tmps[i] = gen_reg_rtx (mode);
1679 emit_move_insn (tmps[i], adjust_address (src, mode, bytepos));
1680 }
1681 else if (COMPLEX_MODE_P (mode)
1682 && GET_MODE (src) == mode
1683 && bytelen == GET_MODE_SIZE (mode))
1684 /* Let emit_move_complex do the bulk of the work. */
1685 tmps[i] = src;
1686 else if (GET_CODE (src) == CONCAT)
1687 {
1688 unsigned int slen = GET_MODE_SIZE (GET_MODE (src));
1689 unsigned int slen0 = GET_MODE_SIZE (GET_MODE (XEXP (src, 0)));
1690
1691 if ((bytepos == 0 && bytelen == slen0)
1692 || (bytepos != 0 && bytepos + bytelen <= slen))
1693 {
1694 /* The following assumes that the concatenated objects all
1695 have the same size. In this case, a simple calculation
1696 can be used to determine the object and the bit field
1697 to be extracted. */
1698 tmps[i] = XEXP (src, bytepos / slen0);
1699 if (! CONSTANT_P (tmps[i])
1700 && (!REG_P (tmps[i]) || GET_MODE (tmps[i]) != mode))
1701 tmps[i] = extract_bit_field (tmps[i], bytelen * BITS_PER_UNIT,
1702 (bytepos % slen0) * BITS_PER_UNIT,
1703 1, false, NULL_RTX, mode, mode);
1704 }
1705 else
1706 {
1707 rtx mem;
1708
1709 gcc_assert (!bytepos);
1710 mem = assign_stack_temp (GET_MODE (src), slen, 0);
1711 emit_move_insn (mem, src);
1712 tmps[i] = extract_bit_field (mem, bytelen * BITS_PER_UNIT,
1713 0, 1, false, NULL_RTX, mode, mode);
1714 }
1715 }
1716 /* FIXME: A SIMD parallel will eventually lead to a subreg of a
1717 SIMD register, which is currently broken. While we get GCC
1718 to emit proper RTL for these cases, let's dump to memory. */
1719 else if (VECTOR_MODE_P (GET_MODE (dst))
1720 && REG_P (src))
1721 {
1722 int slen = GET_MODE_SIZE (GET_MODE (src));
1723 rtx mem;
1724
1725 mem = assign_stack_temp (GET_MODE (src), slen, 0);
1726 emit_move_insn (mem, src);
1727 tmps[i] = adjust_address (mem, mode, (int) bytepos);
1728 }
1729 else if (CONSTANT_P (src) && GET_MODE (dst) != BLKmode
1730 && XVECLEN (dst, 0) > 1)
1731 tmps[i] = simplify_gen_subreg (mode, src, GET_MODE(dst), bytepos);
1732 else if (CONSTANT_P (src))
1733 {
1734 HOST_WIDE_INT len = (HOST_WIDE_INT) bytelen;
1735
1736 if (len == ssize)
1737 tmps[i] = src;
1738 else
1739 {
1740 rtx first, second;
1741
1742 gcc_assert (2 * len == ssize);
1743 split_double (src, &first, &second);
1744 if (i)
1745 tmps[i] = second;
1746 else
1747 tmps[i] = first;
1748 }
1749 }
1750 else if (REG_P (src) && GET_MODE (src) == mode)
1751 tmps[i] = src;
1752 else
1753 tmps[i] = extract_bit_field (src, bytelen * BITS_PER_UNIT,
1754 bytepos * BITS_PER_UNIT, 1, false, NULL_RTX,
1755 mode, mode);
1756
1757 if (shift)
1758 tmps[i] = expand_shift (LSHIFT_EXPR, mode, tmps[i],
1759 build_int_cst (NULL_TREE, shift), tmps[i], 0);
1760 }
1761 }
1762
1763 /* Emit code to move a block SRC of type TYPE to a block DST,
1764 where DST is non-consecutive registers represented by a PARALLEL.
1765 SSIZE represents the total size of block ORIG_SRC in bytes, or -1
1766 if not known. */
1767
1768 void
1769 emit_group_load (rtx dst, rtx src, tree type, int ssize)
1770 {
1771 rtx *tmps;
1772 int i;
1773
1774 tmps = XALLOCAVEC (rtx, XVECLEN (dst, 0));
1775 emit_group_load_1 (tmps, dst, src, type, ssize);
1776
1777 /* Copy the extracted pieces into the proper (probable) hard regs. */
1778 for (i = 0; i < XVECLEN (dst, 0); i++)
1779 {
1780 rtx d = XEXP (XVECEXP (dst, 0, i), 0);
1781 if (d == NULL)
1782 continue;
1783 emit_move_insn (d, tmps[i]);
1784 }
1785 }
1786
1787 /* Similar, but load SRC into new pseudos in a format that looks like
1788 PARALLEL. This can later be fed to emit_group_move to get things
1789 in the right place. */
1790
1791 rtx
1792 emit_group_load_into_temps (rtx parallel, rtx src, tree type, int ssize)
1793 {
1794 rtvec vec;
1795 int i;
1796
1797 vec = rtvec_alloc (XVECLEN (parallel, 0));
1798 emit_group_load_1 (&RTVEC_ELT (vec, 0), parallel, src, type, ssize);
1799
1800 /* Convert the vector to look just like the original PARALLEL, except
1801 with the computed values. */
1802 for (i = 0; i < XVECLEN (parallel, 0); i++)
1803 {
1804 rtx e = XVECEXP (parallel, 0, i);
1805 rtx d = XEXP (e, 0);
1806
1807 if (d)
1808 {
1809 d = force_reg (GET_MODE (d), RTVEC_ELT (vec, i));
1810 e = alloc_EXPR_LIST (REG_NOTE_KIND (e), d, XEXP (e, 1));
1811 }
1812 RTVEC_ELT (vec, i) = e;
1813 }
1814
1815 return gen_rtx_PARALLEL (GET_MODE (parallel), vec);
1816 }
1817
1818 /* Emit code to move a block SRC to block DST, where SRC and DST are
1819 non-consecutive groups of registers, each represented by a PARALLEL. */
1820
1821 void
1822 emit_group_move (rtx dst, rtx src)
1823 {
1824 int i;
1825
1826 gcc_assert (GET_CODE (src) == PARALLEL
1827 && GET_CODE (dst) == PARALLEL
1828 && XVECLEN (src, 0) == XVECLEN (dst, 0));
1829
1830 /* Skip first entry if NULL. */
1831 for (i = XEXP (XVECEXP (src, 0, 0), 0) ? 0 : 1; i < XVECLEN (src, 0); i++)
1832 emit_move_insn (XEXP (XVECEXP (dst, 0, i), 0),
1833 XEXP (XVECEXP (src, 0, i), 0));
1834 }
1835
1836 /* Move a group of registers represented by a PARALLEL into pseudos. */
1837
1838 rtx
1839 emit_group_move_into_temps (rtx src)
1840 {
1841 rtvec vec = rtvec_alloc (XVECLEN (src, 0));
1842 int i;
1843
1844 for (i = 0; i < XVECLEN (src, 0); i++)
1845 {
1846 rtx e = XVECEXP (src, 0, i);
1847 rtx d = XEXP (e, 0);
1848
1849 if (d)
1850 e = alloc_EXPR_LIST (REG_NOTE_KIND (e), copy_to_reg (d), XEXP (e, 1));
1851 RTVEC_ELT (vec, i) = e;
1852 }
1853
1854 return gen_rtx_PARALLEL (GET_MODE (src), vec);
1855 }
1856
1857 /* Emit code to move a block SRC to a block ORIG_DST of type TYPE,
1858 where SRC is non-consecutive registers represented by a PARALLEL.
1859 SSIZE represents the total size of block ORIG_DST, or -1 if not
1860 known. */
1861
1862 void
1863 emit_group_store (rtx orig_dst, rtx src, tree type ATTRIBUTE_UNUSED, int ssize)
1864 {
1865 rtx *tmps, dst;
1866 int start, finish, i;
1867 enum machine_mode m = GET_MODE (orig_dst);
1868
1869 gcc_assert (GET_CODE (src) == PARALLEL);
1870
1871 if (!SCALAR_INT_MODE_P (m)
1872 && !MEM_P (orig_dst) && GET_CODE (orig_dst) != CONCAT)
1873 {
1874 enum machine_mode imode = int_mode_for_mode (GET_MODE (orig_dst));
1875 if (imode == BLKmode)
1876 dst = assign_stack_temp (GET_MODE (orig_dst), ssize, 0);
1877 else
1878 dst = gen_reg_rtx (imode);
1879 emit_group_store (dst, src, type, ssize);
1880 if (imode != BLKmode)
1881 dst = gen_lowpart (GET_MODE (orig_dst), dst);
1882 emit_move_insn (orig_dst, dst);
1883 return;
1884 }
1885
1886 /* Check for a NULL entry, used to indicate that the parameter goes
1887 both on the stack and in registers. */
1888 if (XEXP (XVECEXP (src, 0, 0), 0))
1889 start = 0;
1890 else
1891 start = 1;
1892 finish = XVECLEN (src, 0);
1893
1894 tmps = XALLOCAVEC (rtx, finish);
1895
1896 /* Copy the (probable) hard regs into pseudos. */
1897 for (i = start; i < finish; i++)
1898 {
1899 rtx reg = XEXP (XVECEXP (src, 0, i), 0);
1900 if (!REG_P (reg) || REGNO (reg) < FIRST_PSEUDO_REGISTER)
1901 {
1902 tmps[i] = gen_reg_rtx (GET_MODE (reg));
1903 emit_move_insn (tmps[i], reg);
1904 }
1905 else
1906 tmps[i] = reg;
1907 }
1908
1909 /* If we won't be storing directly into memory, protect the real destination
1910 from strange tricks we might play. */
1911 dst = orig_dst;
1912 if (GET_CODE (dst) == PARALLEL)
1913 {
1914 rtx temp;
1915
1916 /* We can get a PARALLEL dst if there is a conditional expression in
1917 a return statement. In that case, the dst and src are the same,
1918 so no action is necessary. */
1919 if (rtx_equal_p (dst, src))
1920 return;
1921
1922 /* It is unclear if we can ever reach here, but we may as well handle
1923 it. Allocate a temporary, and split this into a store/load to/from
1924 the temporary. */
1925
1926 temp = assign_stack_temp (GET_MODE (dst), ssize, 0);
1927 emit_group_store (temp, src, type, ssize);
1928 emit_group_load (dst, temp, type, ssize);
1929 return;
1930 }
1931 else if (!MEM_P (dst) && GET_CODE (dst) != CONCAT)
1932 {
1933 enum machine_mode outer = GET_MODE (dst);
1934 enum machine_mode inner;
1935 HOST_WIDE_INT bytepos;
1936 bool done = false;
1937 rtx temp;
1938
1939 if (!REG_P (dst) || REGNO (dst) < FIRST_PSEUDO_REGISTER)
1940 dst = gen_reg_rtx (outer);
1941
1942 /* Make life a bit easier for combine. */
1943 /* If the first element of the vector is the low part
1944 of the destination mode, use a paradoxical subreg to
1945 initialize the destination. */
1946 if (start < finish)
1947 {
1948 inner = GET_MODE (tmps[start]);
1949 bytepos = subreg_lowpart_offset (inner, outer);
1950 if (INTVAL (XEXP (XVECEXP (src, 0, start), 1)) == bytepos)
1951 {
1952 temp = simplify_gen_subreg (outer, tmps[start],
1953 inner, 0);
1954 if (temp)
1955 {
1956 emit_move_insn (dst, temp);
1957 done = true;
1958 start++;
1959 }
1960 }
1961 }
1962
1963 /* If the first element wasn't the low part, try the last. */
1964 if (!done
1965 && start < finish - 1)
1966 {
1967 inner = GET_MODE (tmps[finish - 1]);
1968 bytepos = subreg_lowpart_offset (inner, outer);
1969 if (INTVAL (XEXP (XVECEXP (src, 0, finish - 1), 1)) == bytepos)
1970 {
1971 temp = simplify_gen_subreg (outer, tmps[finish - 1],
1972 inner, 0);
1973 if (temp)
1974 {
1975 emit_move_insn (dst, temp);
1976 done = true;
1977 finish--;
1978 }
1979 }
1980 }
1981
1982 /* Otherwise, simply initialize the result to zero. */
1983 if (!done)
1984 emit_move_insn (dst, CONST0_RTX (outer));
1985 }
1986
1987 /* Process the pieces. */
1988 for (i = start; i < finish; i++)
1989 {
1990 HOST_WIDE_INT bytepos = INTVAL (XEXP (XVECEXP (src, 0, i), 1));
1991 enum machine_mode mode = GET_MODE (tmps[i]);
1992 unsigned int bytelen = GET_MODE_SIZE (mode);
1993 unsigned int adj_bytelen = bytelen;
1994 rtx dest = dst;
1995
1996 /* Handle trailing fragments that run over the size of the struct. */
1997 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
1998 adj_bytelen = ssize - bytepos;
1999
2000 if (GET_CODE (dst) == CONCAT)
2001 {
2002 if (bytepos + adj_bytelen
2003 <= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0))))
2004 dest = XEXP (dst, 0);
2005 else if (bytepos >= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0))))
2006 {
2007 bytepos -= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0)));
2008 dest = XEXP (dst, 1);
2009 }
2010 else
2011 {
2012 enum machine_mode dest_mode = GET_MODE (dest);
2013 enum machine_mode tmp_mode = GET_MODE (tmps[i]);
2014
2015 gcc_assert (bytepos == 0 && XVECLEN (src, 0));
2016
2017 if (GET_MODE_ALIGNMENT (dest_mode)
2018 >= GET_MODE_ALIGNMENT (tmp_mode))
2019 {
2020 dest = assign_stack_temp (dest_mode,
2021 GET_MODE_SIZE (dest_mode),
2022 0);
2023 emit_move_insn (adjust_address (dest,
2024 tmp_mode,
2025 bytepos),
2026 tmps[i]);
2027 dst = dest;
2028 }
2029 else
2030 {
2031 dest = assign_stack_temp (tmp_mode,
2032 GET_MODE_SIZE (tmp_mode),
2033 0);
2034 emit_move_insn (dest, tmps[i]);
2035 dst = adjust_address (dest, dest_mode, bytepos);
2036 }
2037 break;
2038 }
2039 }
2040
2041 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
2042 {
2043 /* store_bit_field always takes its value from the lsb.
2044 Move the fragment to the lsb if it's not already there. */
2045 if (
2046 #ifdef BLOCK_REG_PADDING
2047 BLOCK_REG_PADDING (GET_MODE (orig_dst), type, i == start)
2048 == (BYTES_BIG_ENDIAN ? upward : downward)
2049 #else
2050 BYTES_BIG_ENDIAN
2051 #endif
2052 )
2053 {
2054 int shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT;
2055 tmps[i] = expand_shift (RSHIFT_EXPR, mode, tmps[i],
2056 build_int_cst (NULL_TREE, shift),
2057 tmps[i], 0);
2058 }
2059 bytelen = adj_bytelen;
2060 }
2061
2062 /* Optimize the access just a bit. */
2063 if (MEM_P (dest)
2064 && (! SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (dest))
2065 || MEM_ALIGN (dest) >= GET_MODE_ALIGNMENT (mode))
2066 && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0
2067 && bytelen == GET_MODE_SIZE (mode))
2068 emit_move_insn (adjust_address (dest, mode, bytepos), tmps[i]);
2069 else
2070 store_bit_field (dest, bytelen * BITS_PER_UNIT, bytepos * BITS_PER_UNIT,
2071 mode, tmps[i]);
2072 }
2073
2074 /* Copy from the pseudo into the (probable) hard reg. */
2075 if (orig_dst != dst)
2076 emit_move_insn (orig_dst, dst);
2077 }
2078
2079 /* Generate code to copy a BLKmode object of TYPE out of a
2080 set of registers starting with SRCREG into TGTBLK. If TGTBLK
2081 is null, a stack temporary is created. TGTBLK is returned.
2082
2083 The purpose of this routine is to handle functions that return
2084 BLKmode structures in registers. Some machines (the PA for example)
2085 want to return all small structures in registers regardless of the
2086 structure's alignment. */
2087
2088 rtx
2089 copy_blkmode_from_reg (rtx tgtblk, rtx srcreg, tree type)
2090 {
2091 unsigned HOST_WIDE_INT bytes = int_size_in_bytes (type);
2092 rtx src = NULL, dst = NULL;
2093 unsigned HOST_WIDE_INT bitsize = MIN (TYPE_ALIGN (type), BITS_PER_WORD);
2094 unsigned HOST_WIDE_INT bitpos, xbitpos, padding_correction = 0;
2095 enum machine_mode copy_mode;
2096
2097 if (tgtblk == 0)
2098 {
2099 tgtblk = assign_temp (build_qualified_type (type,
2100 (TYPE_QUALS (type)
2101 | TYPE_QUAL_CONST)),
2102 0, 1, 1);
2103 preserve_temp_slots (tgtblk);
2104 }
2105
2106 /* This code assumes srcreg is at least a full word. If it isn't, copy it
2107 into a new pseudo which is a full word. */
2108
2109 if (GET_MODE (srcreg) != BLKmode
2110 && GET_MODE_SIZE (GET_MODE (srcreg)) < UNITS_PER_WORD)
2111 srcreg = convert_to_mode (word_mode, srcreg, TYPE_UNSIGNED (type));
2112
2113 /* If the structure doesn't take up a whole number of words, see whether
2114 SRCREG is padded on the left or on the right. If it's on the left,
2115 set PADDING_CORRECTION to the number of bits to skip.
2116
2117 In most ABIs, the structure will be returned at the least end of
2118 the register, which translates to right padding on little-endian
2119 targets and left padding on big-endian targets. The opposite
2120 holds if the structure is returned at the most significant
2121 end of the register. */
2122 if (bytes % UNITS_PER_WORD != 0
2123 && (targetm.calls.return_in_msb (type)
2124 ? !BYTES_BIG_ENDIAN
2125 : BYTES_BIG_ENDIAN))
2126 padding_correction
2127 = (BITS_PER_WORD - ((bytes % UNITS_PER_WORD) * BITS_PER_UNIT));
2128
2129 /* Copy the structure BITSIZE bits at a time. If the target lives in
2130 memory, take care of not reading/writing past its end by selecting
2131 a copy mode suited to BITSIZE. This should always be possible given
2132 how it is computed.
2133
2134 We could probably emit more efficient code for machines which do not use
2135 strict alignment, but it doesn't seem worth the effort at the current
2136 time. */
2137
2138 copy_mode = word_mode;
2139 if (MEM_P (tgtblk))
2140 {
2141 enum machine_mode mem_mode = mode_for_size (bitsize, MODE_INT, 1);
2142 if (mem_mode != BLKmode)
2143 copy_mode = mem_mode;
2144 }
2145
2146 for (bitpos = 0, xbitpos = padding_correction;
2147 bitpos < bytes * BITS_PER_UNIT;
2148 bitpos += bitsize, xbitpos += bitsize)
2149 {
2150 /* We need a new source operand each time xbitpos is on a
2151 word boundary and when xbitpos == padding_correction
2152 (the first time through). */
2153 if (xbitpos % BITS_PER_WORD == 0
2154 || xbitpos == padding_correction)
2155 src = operand_subword_force (srcreg, xbitpos / BITS_PER_WORD,
2156 GET_MODE (srcreg));
2157
2158 /* We need a new destination operand each time bitpos is on
2159 a word boundary. */
2160 if (bitpos % BITS_PER_WORD == 0)
2161 dst = operand_subword (tgtblk, bitpos / BITS_PER_WORD, 1, BLKmode);
2162
2163 /* Use xbitpos for the source extraction (right justified) and
2164 bitpos for the destination store (left justified). */
2165 store_bit_field (dst, bitsize, bitpos % BITS_PER_WORD, copy_mode,
2166 extract_bit_field (src, bitsize,
2167 xbitpos % BITS_PER_WORD, 1, false,
2168 NULL_RTX, copy_mode, copy_mode));
2169 }
2170
2171 return tgtblk;
2172 }
2173
2174 /* Add a USE expression for REG to the (possibly empty) list pointed
2175 to by CALL_FUSAGE. REG must denote a hard register. */
2176
2177 void
2178 use_reg (rtx *call_fusage, rtx reg)
2179 {
2180 gcc_assert (REG_P (reg) && REGNO (reg) < FIRST_PSEUDO_REGISTER);
2181
2182 *call_fusage
2183 = gen_rtx_EXPR_LIST (VOIDmode,
2184 gen_rtx_USE (VOIDmode, reg), *call_fusage);
2185 }
2186
2187 /* Add USE expressions to *CALL_FUSAGE for each of NREGS consecutive regs,
2188 starting at REGNO. All of these registers must be hard registers. */
2189
2190 void
2191 use_regs (rtx *call_fusage, int regno, int nregs)
2192 {
2193 int i;
2194
2195 gcc_assert (regno + nregs <= FIRST_PSEUDO_REGISTER);
2196
2197 for (i = 0; i < nregs; i++)
2198 use_reg (call_fusage, regno_reg_rtx[regno + i]);
2199 }
2200
2201 /* Add USE expressions to *CALL_FUSAGE for each REG contained in the
2202 PARALLEL REGS. This is for calls that pass values in multiple
2203 non-contiguous locations. The Irix 6 ABI has examples of this. */
2204
2205 void
2206 use_group_regs (rtx *call_fusage, rtx regs)
2207 {
2208 int i;
2209
2210 for (i = 0; i < XVECLEN (regs, 0); i++)
2211 {
2212 rtx reg = XEXP (XVECEXP (regs, 0, i), 0);
2213
2214 /* A NULL entry means the parameter goes both on the stack and in
2215 registers. This can also be a MEM for targets that pass values
2216 partially on the stack and partially in registers. */
2217 if (reg != 0 && REG_P (reg))
2218 use_reg (call_fusage, reg);
2219 }
2220 }
2221
2222 /* Return the defining gimple statement for SSA_NAME NAME if it is an
2223 assigment and the code of the expresion on the RHS is CODE. Return
2224 NULL otherwise. */
2225
2226 static gimple
2227 get_def_for_expr (tree name, enum tree_code code)
2228 {
2229 gimple def_stmt;
2230
2231 if (TREE_CODE (name) != SSA_NAME)
2232 return NULL;
2233
2234 def_stmt = get_gimple_for_ssa_name (name);
2235 if (!def_stmt
2236 || gimple_assign_rhs_code (def_stmt) != code)
2237 return NULL;
2238
2239 return def_stmt;
2240 }
2241 \f
2242
2243 /* Determine whether the LEN bytes generated by CONSTFUN can be
2244 stored to memory using several move instructions. CONSTFUNDATA is
2245 a pointer which will be passed as argument in every CONSTFUN call.
2246 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
2247 a memset operation and false if it's a copy of a constant string.
2248 Return nonzero if a call to store_by_pieces should succeed. */
2249
2250 int
2251 can_store_by_pieces (unsigned HOST_WIDE_INT len,
2252 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode),
2253 void *constfundata, unsigned int align, bool memsetp)
2254 {
2255 unsigned HOST_WIDE_INT l;
2256 unsigned int max_size;
2257 HOST_WIDE_INT offset = 0;
2258 enum machine_mode mode;
2259 enum insn_code icode;
2260 int reverse;
2261 /* cst is set but not used if LEGITIMATE_CONSTANT doesn't use it. */
2262 rtx cst ATTRIBUTE_UNUSED;
2263
2264 if (len == 0)
2265 return 1;
2266
2267 if (! (memsetp
2268 ? SET_BY_PIECES_P (len, align)
2269 : STORE_BY_PIECES_P (len, align)))
2270 return 0;
2271
2272 align = alignment_for_piecewise_move (STORE_MAX_PIECES, align);
2273
2274 /* We would first store what we can in the largest integer mode, then go to
2275 successively smaller modes. */
2276
2277 for (reverse = 0;
2278 reverse <= (HAVE_PRE_DECREMENT || HAVE_POST_DECREMENT);
2279 reverse++)
2280 {
2281 l = len;
2282 max_size = STORE_MAX_PIECES + 1;
2283 while (max_size > 1)
2284 {
2285 mode = widest_int_mode_for_size (max_size);
2286
2287 if (mode == VOIDmode)
2288 break;
2289
2290 icode = optab_handler (mov_optab, mode);
2291 if (icode != CODE_FOR_nothing
2292 && align >= GET_MODE_ALIGNMENT (mode))
2293 {
2294 unsigned int size = GET_MODE_SIZE (mode);
2295
2296 while (l >= size)
2297 {
2298 if (reverse)
2299 offset -= size;
2300
2301 cst = (*constfun) (constfundata, offset, mode);
2302 if (!LEGITIMATE_CONSTANT_P (cst))
2303 return 0;
2304
2305 if (!reverse)
2306 offset += size;
2307
2308 l -= size;
2309 }
2310 }
2311
2312 max_size = GET_MODE_SIZE (mode);
2313 }
2314
2315 /* The code above should have handled everything. */
2316 gcc_assert (!l);
2317 }
2318
2319 return 1;
2320 }
2321
2322 /* Generate several move instructions to store LEN bytes generated by
2323 CONSTFUN to block TO. (A MEM rtx with BLKmode). CONSTFUNDATA is a
2324 pointer which will be passed as argument in every CONSTFUN call.
2325 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
2326 a memset operation and false if it's a copy of a constant string.
2327 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
2328 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
2329 stpcpy. */
2330
2331 rtx
2332 store_by_pieces (rtx to, unsigned HOST_WIDE_INT len,
2333 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode),
2334 void *constfundata, unsigned int align, bool memsetp, int endp)
2335 {
2336 enum machine_mode to_addr_mode
2337 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (to));
2338 struct store_by_pieces_d data;
2339
2340 if (len == 0)
2341 {
2342 gcc_assert (endp != 2);
2343 return to;
2344 }
2345
2346 gcc_assert (memsetp
2347 ? SET_BY_PIECES_P (len, align)
2348 : STORE_BY_PIECES_P (len, align));
2349 data.constfun = constfun;
2350 data.constfundata = constfundata;
2351 data.len = len;
2352 data.to = to;
2353 store_by_pieces_1 (&data, align);
2354 if (endp)
2355 {
2356 rtx to1;
2357
2358 gcc_assert (!data.reverse);
2359 if (data.autinc_to)
2360 {
2361 if (endp == 2)
2362 {
2363 if (HAVE_POST_INCREMENT && data.explicit_inc_to > 0)
2364 emit_insn (gen_add2_insn (data.to_addr, constm1_rtx));
2365 else
2366 data.to_addr = copy_to_mode_reg (to_addr_mode,
2367 plus_constant (data.to_addr,
2368 -1));
2369 }
2370 to1 = adjust_automodify_address (data.to, QImode, data.to_addr,
2371 data.offset);
2372 }
2373 else
2374 {
2375 if (endp == 2)
2376 --data.offset;
2377 to1 = adjust_address (data.to, QImode, data.offset);
2378 }
2379 return to1;
2380 }
2381 else
2382 return data.to;
2383 }
2384
2385 /* Generate several move instructions to clear LEN bytes of block TO. (A MEM
2386 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
2387
2388 static void
2389 clear_by_pieces (rtx to, unsigned HOST_WIDE_INT len, unsigned int align)
2390 {
2391 struct store_by_pieces_d data;
2392
2393 if (len == 0)
2394 return;
2395
2396 data.constfun = clear_by_pieces_1;
2397 data.constfundata = NULL;
2398 data.len = len;
2399 data.to = to;
2400 store_by_pieces_1 (&data, align);
2401 }
2402
2403 /* Callback routine for clear_by_pieces.
2404 Return const0_rtx unconditionally. */
2405
2406 static rtx
2407 clear_by_pieces_1 (void *data ATTRIBUTE_UNUSED,
2408 HOST_WIDE_INT offset ATTRIBUTE_UNUSED,
2409 enum machine_mode mode ATTRIBUTE_UNUSED)
2410 {
2411 return const0_rtx;
2412 }
2413
2414 /* Subroutine of clear_by_pieces and store_by_pieces.
2415 Generate several move instructions to store LEN bytes of block TO. (A MEM
2416 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
2417
2418 static void
2419 store_by_pieces_1 (struct store_by_pieces_d *data ATTRIBUTE_UNUSED,
2420 unsigned int align ATTRIBUTE_UNUSED)
2421 {
2422 enum machine_mode to_addr_mode
2423 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (data->to));
2424 rtx to_addr = XEXP (data->to, 0);
2425 unsigned int max_size = STORE_MAX_PIECES + 1;
2426 enum insn_code icode;
2427
2428 data->offset = 0;
2429 data->to_addr = to_addr;
2430 data->autinc_to
2431 = (GET_CODE (to_addr) == PRE_INC || GET_CODE (to_addr) == PRE_DEC
2432 || GET_CODE (to_addr) == POST_INC || GET_CODE (to_addr) == POST_DEC);
2433
2434 data->explicit_inc_to = 0;
2435 data->reverse
2436 = (GET_CODE (to_addr) == PRE_DEC || GET_CODE (to_addr) == POST_DEC);
2437 if (data->reverse)
2438 data->offset = data->len;
2439
2440 /* If storing requires more than two move insns,
2441 copy addresses to registers (to make displacements shorter)
2442 and use post-increment if available. */
2443 if (!data->autinc_to
2444 && move_by_pieces_ninsns (data->len, align, max_size) > 2)
2445 {
2446 /* Determine the main mode we'll be using.
2447 MODE might not be used depending on the definitions of the
2448 USE_* macros below. */
2449 enum machine_mode mode ATTRIBUTE_UNUSED
2450 = widest_int_mode_for_size (max_size);
2451
2452 if (USE_STORE_PRE_DECREMENT (mode) && data->reverse && ! data->autinc_to)
2453 {
2454 data->to_addr = copy_to_mode_reg (to_addr_mode,
2455 plus_constant (to_addr, data->len));
2456 data->autinc_to = 1;
2457 data->explicit_inc_to = -1;
2458 }
2459
2460 if (USE_STORE_POST_INCREMENT (mode) && ! data->reverse
2461 && ! data->autinc_to)
2462 {
2463 data->to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
2464 data->autinc_to = 1;
2465 data->explicit_inc_to = 1;
2466 }
2467
2468 if ( !data->autinc_to && CONSTANT_P (to_addr))
2469 data->to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
2470 }
2471
2472 align = alignment_for_piecewise_move (STORE_MAX_PIECES, align);
2473
2474 /* First store what we can in the largest integer mode, then go to
2475 successively smaller modes. */
2476
2477 while (max_size > 1)
2478 {
2479 enum machine_mode mode = widest_int_mode_for_size (max_size);
2480
2481 if (mode == VOIDmode)
2482 break;
2483
2484 icode = optab_handler (mov_optab, mode);
2485 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
2486 store_by_pieces_2 (GEN_FCN (icode), mode, data);
2487
2488 max_size = GET_MODE_SIZE (mode);
2489 }
2490
2491 /* The code above should have handled everything. */
2492 gcc_assert (!data->len);
2493 }
2494
2495 /* Subroutine of store_by_pieces_1. Store as many bytes as appropriate
2496 with move instructions for mode MODE. GENFUN is the gen_... function
2497 to make a move insn for that mode. DATA has all the other info. */
2498
2499 static void
2500 store_by_pieces_2 (rtx (*genfun) (rtx, ...), enum machine_mode mode,
2501 struct store_by_pieces_d *data)
2502 {
2503 unsigned int size = GET_MODE_SIZE (mode);
2504 rtx to1, cst;
2505
2506 while (data->len >= size)
2507 {
2508 if (data->reverse)
2509 data->offset -= size;
2510
2511 if (data->autinc_to)
2512 to1 = adjust_automodify_address (data->to, mode, data->to_addr,
2513 data->offset);
2514 else
2515 to1 = adjust_address (data->to, mode, data->offset);
2516
2517 if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0)
2518 emit_insn (gen_add2_insn (data->to_addr,
2519 GEN_INT (-(HOST_WIDE_INT) size)));
2520
2521 cst = (*data->constfun) (data->constfundata, data->offset, mode);
2522 emit_insn ((*genfun) (to1, cst));
2523
2524 if (HAVE_POST_INCREMENT && data->explicit_inc_to > 0)
2525 emit_insn (gen_add2_insn (data->to_addr, GEN_INT (size)));
2526
2527 if (! data->reverse)
2528 data->offset += size;
2529
2530 data->len -= size;
2531 }
2532 }
2533 \f
2534 /* Write zeros through the storage of OBJECT. If OBJECT has BLKmode, SIZE is
2535 its length in bytes. */
2536
2537 rtx
2538 clear_storage_hints (rtx object, rtx size, enum block_op_methods method,
2539 unsigned int expected_align, HOST_WIDE_INT expected_size)
2540 {
2541 enum machine_mode mode = GET_MODE (object);
2542 unsigned int align;
2543
2544 gcc_assert (method == BLOCK_OP_NORMAL || method == BLOCK_OP_TAILCALL);
2545
2546 /* If OBJECT is not BLKmode and SIZE is the same size as its mode,
2547 just move a zero. Otherwise, do this a piece at a time. */
2548 if (mode != BLKmode
2549 && CONST_INT_P (size)
2550 && INTVAL (size) == (HOST_WIDE_INT) GET_MODE_SIZE (mode))
2551 {
2552 rtx zero = CONST0_RTX (mode);
2553 if (zero != NULL)
2554 {
2555 emit_move_insn (object, zero);
2556 return NULL;
2557 }
2558
2559 if (COMPLEX_MODE_P (mode))
2560 {
2561 zero = CONST0_RTX (GET_MODE_INNER (mode));
2562 if (zero != NULL)
2563 {
2564 write_complex_part (object, zero, 0);
2565 write_complex_part (object, zero, 1);
2566 return NULL;
2567 }
2568 }
2569 }
2570
2571 if (size == const0_rtx)
2572 return NULL;
2573
2574 align = MEM_ALIGN (object);
2575
2576 if (CONST_INT_P (size)
2577 && CLEAR_BY_PIECES_P (INTVAL (size), align))
2578 clear_by_pieces (object, INTVAL (size), align);
2579 else if (set_storage_via_setmem (object, size, const0_rtx, align,
2580 expected_align, expected_size))
2581 ;
2582 else if (ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (object)))
2583 return set_storage_via_libcall (object, size, const0_rtx,
2584 method == BLOCK_OP_TAILCALL);
2585 else
2586 gcc_unreachable ();
2587
2588 return NULL;
2589 }
2590
2591 rtx
2592 clear_storage (rtx object, rtx size, enum block_op_methods method)
2593 {
2594 return clear_storage_hints (object, size, method, 0, -1);
2595 }
2596
2597
2598 /* A subroutine of clear_storage. Expand a call to memset.
2599 Return the return value of memset, 0 otherwise. */
2600
2601 rtx
2602 set_storage_via_libcall (rtx object, rtx size, rtx val, bool tailcall)
2603 {
2604 tree call_expr, fn, object_tree, size_tree, val_tree;
2605 enum machine_mode size_mode;
2606 rtx retval;
2607
2608 /* Emit code to copy OBJECT and SIZE into new pseudos. We can then
2609 place those into new pseudos into a VAR_DECL and use them later. */
2610
2611 object = copy_to_mode_reg (Pmode, XEXP (object, 0));
2612
2613 size_mode = TYPE_MODE (sizetype);
2614 size = convert_to_mode (size_mode, size, 1);
2615 size = copy_to_mode_reg (size_mode, size);
2616
2617 /* It is incorrect to use the libcall calling conventions to call
2618 memset in this context. This could be a user call to memset and
2619 the user may wish to examine the return value from memset. For
2620 targets where libcalls and normal calls have different conventions
2621 for returning pointers, we could end up generating incorrect code. */
2622
2623 object_tree = make_tree (ptr_type_node, object);
2624 if (!CONST_INT_P (val))
2625 val = convert_to_mode (TYPE_MODE (integer_type_node), val, 1);
2626 size_tree = make_tree (sizetype, size);
2627 val_tree = make_tree (integer_type_node, val);
2628
2629 fn = clear_storage_libcall_fn (true);
2630 call_expr = build_call_expr (fn, 3, object_tree, val_tree, size_tree);
2631 CALL_EXPR_TAILCALL (call_expr) = tailcall;
2632
2633 retval = expand_normal (call_expr);
2634
2635 return retval;
2636 }
2637
2638 /* A subroutine of set_storage_via_libcall. Create the tree node
2639 for the function we use for block clears. The first time FOR_CALL
2640 is true, we call assemble_external. */
2641
2642 tree block_clear_fn;
2643
2644 void
2645 init_block_clear_fn (const char *asmspec)
2646 {
2647 if (!block_clear_fn)
2648 {
2649 tree fn, args;
2650
2651 fn = get_identifier ("memset");
2652 args = build_function_type_list (ptr_type_node, ptr_type_node,
2653 integer_type_node, sizetype,
2654 NULL_TREE);
2655
2656 fn = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL, fn, args);
2657 DECL_EXTERNAL (fn) = 1;
2658 TREE_PUBLIC (fn) = 1;
2659 DECL_ARTIFICIAL (fn) = 1;
2660 TREE_NOTHROW (fn) = 1;
2661 DECL_VISIBILITY (fn) = VISIBILITY_DEFAULT;
2662 DECL_VISIBILITY_SPECIFIED (fn) = 1;
2663
2664 block_clear_fn = fn;
2665 }
2666
2667 if (asmspec)
2668 set_user_assembler_name (block_clear_fn, asmspec);
2669 }
2670
2671 static tree
2672 clear_storage_libcall_fn (int for_call)
2673 {
2674 static bool emitted_extern;
2675
2676 if (!block_clear_fn)
2677 init_block_clear_fn (NULL);
2678
2679 if (for_call && !emitted_extern)
2680 {
2681 emitted_extern = true;
2682 make_decl_rtl (block_clear_fn);
2683 assemble_external (block_clear_fn);
2684 }
2685
2686 return block_clear_fn;
2687 }
2688 \f
2689 /* Expand a setmem pattern; return true if successful. */
2690
2691 bool
2692 set_storage_via_setmem (rtx object, rtx size, rtx val, unsigned int align,
2693 unsigned int expected_align, HOST_WIDE_INT expected_size)
2694 {
2695 /* Try the most limited insn first, because there's no point
2696 including more than one in the machine description unless
2697 the more limited one has some advantage. */
2698
2699 enum machine_mode mode;
2700
2701 if (expected_align < align)
2702 expected_align = align;
2703
2704 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
2705 mode = GET_MODE_WIDER_MODE (mode))
2706 {
2707 enum insn_code code = direct_optab_handler (setmem_optab, mode);
2708
2709 if (code != CODE_FOR_nothing
2710 /* We don't need MODE to be narrower than
2711 BITS_PER_HOST_WIDE_INT here because if SIZE is less than
2712 the mode mask, as it is returned by the macro, it will
2713 definitely be less than the actual mode mask. */
2714 && ((CONST_INT_P (size)
2715 && ((unsigned HOST_WIDE_INT) INTVAL (size)
2716 <= (GET_MODE_MASK (mode) >> 1)))
2717 || GET_MODE_BITSIZE (mode) >= BITS_PER_WORD))
2718 {
2719 struct expand_operand ops[6];
2720 unsigned int nops;
2721
2722 nops = insn_data[(int) code].n_operands;
2723 /* ??? n_operands includes match_scratches; find some other
2724 way to select the 6 operand variant, or force all targets
2725 to have exactly 6 operands. */
2726 gcc_assert (nops >= 4 && nops <= 6);
2727
2728 create_fixed_operand (&ops[0], object);
2729 /* The check above guarantees that this size conversion is valid. */
2730 create_convert_operand_to (&ops[1], size, mode, true);
2731 create_convert_operand_from (&ops[2], val, byte_mode, true);
2732 create_integer_operand (&ops[3], align / BITS_PER_UNIT);
2733 if (nops == 6)
2734 {
2735 create_integer_operand (&ops[4], expected_align / BITS_PER_UNIT);
2736 create_integer_operand (&ops[5], expected_size);
2737 }
2738 if (maybe_expand_insn (code, nops, ops))
2739 return true;
2740 }
2741 }
2742
2743 return false;
2744 }
2745
2746 \f
2747 /* Write to one of the components of the complex value CPLX. Write VAL to
2748 the real part if IMAG_P is false, and the imaginary part if its true. */
2749
2750 static void
2751 write_complex_part (rtx cplx, rtx val, bool imag_p)
2752 {
2753 enum machine_mode cmode;
2754 enum machine_mode imode;
2755 unsigned ibitsize;
2756
2757 if (GET_CODE (cplx) == CONCAT)
2758 {
2759 emit_move_insn (XEXP (cplx, imag_p), val);
2760 return;
2761 }
2762
2763 cmode = GET_MODE (cplx);
2764 imode = GET_MODE_INNER (cmode);
2765 ibitsize = GET_MODE_BITSIZE (imode);
2766
2767 /* For MEMs simplify_gen_subreg may generate an invalid new address
2768 because, e.g., the original address is considered mode-dependent
2769 by the target, which restricts simplify_subreg from invoking
2770 adjust_address_nv. Instead of preparing fallback support for an
2771 invalid address, we call adjust_address_nv directly. */
2772 if (MEM_P (cplx))
2773 {
2774 emit_move_insn (adjust_address_nv (cplx, imode,
2775 imag_p ? GET_MODE_SIZE (imode) : 0),
2776 val);
2777 return;
2778 }
2779
2780 /* If the sub-object is at least word sized, then we know that subregging
2781 will work. This special case is important, since store_bit_field
2782 wants to operate on integer modes, and there's rarely an OImode to
2783 correspond to TCmode. */
2784 if (ibitsize >= BITS_PER_WORD
2785 /* For hard regs we have exact predicates. Assume we can split
2786 the original object if it spans an even number of hard regs.
2787 This special case is important for SCmode on 64-bit platforms
2788 where the natural size of floating-point regs is 32-bit. */
2789 || (REG_P (cplx)
2790 && REGNO (cplx) < FIRST_PSEUDO_REGISTER
2791 && hard_regno_nregs[REGNO (cplx)][cmode] % 2 == 0))
2792 {
2793 rtx part = simplify_gen_subreg (imode, cplx, cmode,
2794 imag_p ? GET_MODE_SIZE (imode) : 0);
2795 if (part)
2796 {
2797 emit_move_insn (part, val);
2798 return;
2799 }
2800 else
2801 /* simplify_gen_subreg may fail for sub-word MEMs. */
2802 gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD);
2803 }
2804
2805 store_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0, imode, val);
2806 }
2807
2808 /* Extract one of the components of the complex value CPLX. Extract the
2809 real part if IMAG_P is false, and the imaginary part if it's true. */
2810
2811 static rtx
2812 read_complex_part (rtx cplx, bool imag_p)
2813 {
2814 enum machine_mode cmode, imode;
2815 unsigned ibitsize;
2816
2817 if (GET_CODE (cplx) == CONCAT)
2818 return XEXP (cplx, imag_p);
2819
2820 cmode = GET_MODE (cplx);
2821 imode = GET_MODE_INNER (cmode);
2822 ibitsize = GET_MODE_BITSIZE (imode);
2823
2824 /* Special case reads from complex constants that got spilled to memory. */
2825 if (MEM_P (cplx) && GET_CODE (XEXP (cplx, 0)) == SYMBOL_REF)
2826 {
2827 tree decl = SYMBOL_REF_DECL (XEXP (cplx, 0));
2828 if (decl && TREE_CODE (decl) == COMPLEX_CST)
2829 {
2830 tree part = imag_p ? TREE_IMAGPART (decl) : TREE_REALPART (decl);
2831 if (CONSTANT_CLASS_P (part))
2832 return expand_expr (part, NULL_RTX, imode, EXPAND_NORMAL);
2833 }
2834 }
2835
2836 /* For MEMs simplify_gen_subreg may generate an invalid new address
2837 because, e.g., the original address is considered mode-dependent
2838 by the target, which restricts simplify_subreg from invoking
2839 adjust_address_nv. Instead of preparing fallback support for an
2840 invalid address, we call adjust_address_nv directly. */
2841 if (MEM_P (cplx))
2842 return adjust_address_nv (cplx, imode,
2843 imag_p ? GET_MODE_SIZE (imode) : 0);
2844
2845 /* If the sub-object is at least word sized, then we know that subregging
2846 will work. This special case is important, since extract_bit_field
2847 wants to operate on integer modes, and there's rarely an OImode to
2848 correspond to TCmode. */
2849 if (ibitsize >= BITS_PER_WORD
2850 /* For hard regs we have exact predicates. Assume we can split
2851 the original object if it spans an even number of hard regs.
2852 This special case is important for SCmode on 64-bit platforms
2853 where the natural size of floating-point regs is 32-bit. */
2854 || (REG_P (cplx)
2855 && REGNO (cplx) < FIRST_PSEUDO_REGISTER
2856 && hard_regno_nregs[REGNO (cplx)][cmode] % 2 == 0))
2857 {
2858 rtx ret = simplify_gen_subreg (imode, cplx, cmode,
2859 imag_p ? GET_MODE_SIZE (imode) : 0);
2860 if (ret)
2861 return ret;
2862 else
2863 /* simplify_gen_subreg may fail for sub-word MEMs. */
2864 gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD);
2865 }
2866
2867 return extract_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0,
2868 true, false, NULL_RTX, imode, imode);
2869 }
2870 \f
2871 /* A subroutine of emit_move_insn_1. Yet another lowpart generator.
2872 NEW_MODE and OLD_MODE are the same size. Return NULL if X cannot be
2873 represented in NEW_MODE. If FORCE is true, this will never happen, as
2874 we'll force-create a SUBREG if needed. */
2875
2876 static rtx
2877 emit_move_change_mode (enum machine_mode new_mode,
2878 enum machine_mode old_mode, rtx x, bool force)
2879 {
2880 rtx ret;
2881
2882 if (push_operand (x, GET_MODE (x)))
2883 {
2884 ret = gen_rtx_MEM (new_mode, XEXP (x, 0));
2885 MEM_COPY_ATTRIBUTES (ret, x);
2886 }
2887 else if (MEM_P (x))
2888 {
2889 /* We don't have to worry about changing the address since the
2890 size in bytes is supposed to be the same. */
2891 if (reload_in_progress)
2892 {
2893 /* Copy the MEM to change the mode and move any
2894 substitutions from the old MEM to the new one. */
2895 ret = adjust_address_nv (x, new_mode, 0);
2896 copy_replacements (x, ret);
2897 }
2898 else
2899 ret = adjust_address (x, new_mode, 0);
2900 }
2901 else
2902 {
2903 /* Note that we do want simplify_subreg's behavior of validating
2904 that the new mode is ok for a hard register. If we were to use
2905 simplify_gen_subreg, we would create the subreg, but would
2906 probably run into the target not being able to implement it. */
2907 /* Except, of course, when FORCE is true, when this is exactly what
2908 we want. Which is needed for CCmodes on some targets. */
2909 if (force)
2910 ret = simplify_gen_subreg (new_mode, x, old_mode, 0);
2911 else
2912 ret = simplify_subreg (new_mode, x, old_mode, 0);
2913 }
2914
2915 return ret;
2916 }
2917
2918 /* A subroutine of emit_move_insn_1. Generate a move from Y into X using
2919 an integer mode of the same size as MODE. Returns the instruction
2920 emitted, or NULL if such a move could not be generated. */
2921
2922 static rtx
2923 emit_move_via_integer (enum machine_mode mode, rtx x, rtx y, bool force)
2924 {
2925 enum machine_mode imode;
2926 enum insn_code code;
2927
2928 /* There must exist a mode of the exact size we require. */
2929 imode = int_mode_for_mode (mode);
2930 if (imode == BLKmode)
2931 return NULL_RTX;
2932
2933 /* The target must support moves in this mode. */
2934 code = optab_handler (mov_optab, imode);
2935 if (code == CODE_FOR_nothing)
2936 return NULL_RTX;
2937
2938 x = emit_move_change_mode (imode, mode, x, force);
2939 if (x == NULL_RTX)
2940 return NULL_RTX;
2941 y = emit_move_change_mode (imode, mode, y, force);
2942 if (y == NULL_RTX)
2943 return NULL_RTX;
2944 return emit_insn (GEN_FCN (code) (x, y));
2945 }
2946
2947 /* A subroutine of emit_move_insn_1. X is a push_operand in MODE.
2948 Return an equivalent MEM that does not use an auto-increment. */
2949
2950 static rtx
2951 emit_move_resolve_push (enum machine_mode mode, rtx x)
2952 {
2953 enum rtx_code code = GET_CODE (XEXP (x, 0));
2954 HOST_WIDE_INT adjust;
2955 rtx temp;
2956
2957 adjust = GET_MODE_SIZE (mode);
2958 #ifdef PUSH_ROUNDING
2959 adjust = PUSH_ROUNDING (adjust);
2960 #endif
2961 if (code == PRE_DEC || code == POST_DEC)
2962 adjust = -adjust;
2963 else if (code == PRE_MODIFY || code == POST_MODIFY)
2964 {
2965 rtx expr = XEXP (XEXP (x, 0), 1);
2966 HOST_WIDE_INT val;
2967
2968 gcc_assert (GET_CODE (expr) == PLUS || GET_CODE (expr) == MINUS);
2969 gcc_assert (CONST_INT_P (XEXP (expr, 1)));
2970 val = INTVAL (XEXP (expr, 1));
2971 if (GET_CODE (expr) == MINUS)
2972 val = -val;
2973 gcc_assert (adjust == val || adjust == -val);
2974 adjust = val;
2975 }
2976
2977 /* Do not use anti_adjust_stack, since we don't want to update
2978 stack_pointer_delta. */
2979 temp = expand_simple_binop (Pmode, PLUS, stack_pointer_rtx,
2980 GEN_INT (adjust), stack_pointer_rtx,
2981 0, OPTAB_LIB_WIDEN);
2982 if (temp != stack_pointer_rtx)
2983 emit_move_insn (stack_pointer_rtx, temp);
2984
2985 switch (code)
2986 {
2987 case PRE_INC:
2988 case PRE_DEC:
2989 case PRE_MODIFY:
2990 temp = stack_pointer_rtx;
2991 break;
2992 case POST_INC:
2993 case POST_DEC:
2994 case POST_MODIFY:
2995 temp = plus_constant (stack_pointer_rtx, -adjust);
2996 break;
2997 default:
2998 gcc_unreachable ();
2999 }
3000
3001 return replace_equiv_address (x, temp);
3002 }
3003
3004 /* A subroutine of emit_move_complex. Generate a move from Y into X.
3005 X is known to satisfy push_operand, and MODE is known to be complex.
3006 Returns the last instruction emitted. */
3007
3008 rtx
3009 emit_move_complex_push (enum machine_mode mode, rtx x, rtx y)
3010 {
3011 enum machine_mode submode = GET_MODE_INNER (mode);
3012 bool imag_first;
3013
3014 #ifdef PUSH_ROUNDING
3015 unsigned int submodesize = GET_MODE_SIZE (submode);
3016
3017 /* In case we output to the stack, but the size is smaller than the
3018 machine can push exactly, we need to use move instructions. */
3019 if (PUSH_ROUNDING (submodesize) != submodesize)
3020 {
3021 x = emit_move_resolve_push (mode, x);
3022 return emit_move_insn (x, y);
3023 }
3024 #endif
3025
3026 /* Note that the real part always precedes the imag part in memory
3027 regardless of machine's endianness. */
3028 switch (GET_CODE (XEXP (x, 0)))
3029 {
3030 case PRE_DEC:
3031 case POST_DEC:
3032 imag_first = true;
3033 break;
3034 case PRE_INC:
3035 case POST_INC:
3036 imag_first = false;
3037 break;
3038 default:
3039 gcc_unreachable ();
3040 }
3041
3042 emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)),
3043 read_complex_part (y, imag_first));
3044 return emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)),
3045 read_complex_part (y, !imag_first));
3046 }
3047
3048 /* A subroutine of emit_move_complex. Perform the move from Y to X
3049 via two moves of the parts. Returns the last instruction emitted. */
3050
3051 rtx
3052 emit_move_complex_parts (rtx x, rtx y)
3053 {
3054 /* Show the output dies here. This is necessary for SUBREGs
3055 of pseudos since we cannot track their lifetimes correctly;
3056 hard regs shouldn't appear here except as return values. */
3057 if (!reload_completed && !reload_in_progress
3058 && REG_P (x) && !reg_overlap_mentioned_p (x, y))
3059 emit_clobber (x);
3060
3061 write_complex_part (x, read_complex_part (y, false), false);
3062 write_complex_part (x, read_complex_part (y, true), true);
3063
3064 return get_last_insn ();
3065 }
3066
3067 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3068 MODE is known to be complex. Returns the last instruction emitted. */
3069
3070 static rtx
3071 emit_move_complex (enum machine_mode mode, rtx x, rtx y)
3072 {
3073 bool try_int;
3074
3075 /* Need to take special care for pushes, to maintain proper ordering
3076 of the data, and possibly extra padding. */
3077 if (push_operand (x, mode))
3078 return emit_move_complex_push (mode, x, y);
3079
3080 /* See if we can coerce the target into moving both values at once. */
3081
3082 /* Move floating point as parts. */
3083 if (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
3084 && optab_handler (mov_optab, GET_MODE_INNER (mode)) != CODE_FOR_nothing)
3085 try_int = false;
3086 /* Not possible if the values are inherently not adjacent. */
3087 else if (GET_CODE (x) == CONCAT || GET_CODE (y) == CONCAT)
3088 try_int = false;
3089 /* Is possible if both are registers (or subregs of registers). */
3090 else if (register_operand (x, mode) && register_operand (y, mode))
3091 try_int = true;
3092 /* If one of the operands is a memory, and alignment constraints
3093 are friendly enough, we may be able to do combined memory operations.
3094 We do not attempt this if Y is a constant because that combination is
3095 usually better with the by-parts thing below. */
3096 else if ((MEM_P (x) ? !CONSTANT_P (y) : MEM_P (y))
3097 && (!STRICT_ALIGNMENT
3098 || get_mode_alignment (mode) == BIGGEST_ALIGNMENT))
3099 try_int = true;
3100 else
3101 try_int = false;
3102
3103 if (try_int)
3104 {
3105 rtx ret;
3106
3107 /* For memory to memory moves, optimal behavior can be had with the
3108 existing block move logic. */
3109 if (MEM_P (x) && MEM_P (y))
3110 {
3111 emit_block_move (x, y, GEN_INT (GET_MODE_SIZE (mode)),
3112 BLOCK_OP_NO_LIBCALL);
3113 return get_last_insn ();
3114 }
3115
3116 ret = emit_move_via_integer (mode, x, y, true);
3117 if (ret)
3118 return ret;
3119 }
3120
3121 return emit_move_complex_parts (x, y);
3122 }
3123
3124 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3125 MODE is known to be MODE_CC. Returns the last instruction emitted. */
3126
3127 static rtx
3128 emit_move_ccmode (enum machine_mode mode, rtx x, rtx y)
3129 {
3130 rtx ret;
3131
3132 /* Assume all MODE_CC modes are equivalent; if we have movcc, use it. */
3133 if (mode != CCmode)
3134 {
3135 enum insn_code code = optab_handler (mov_optab, CCmode);
3136 if (code != CODE_FOR_nothing)
3137 {
3138 x = emit_move_change_mode (CCmode, mode, x, true);
3139 y = emit_move_change_mode (CCmode, mode, y, true);
3140 return emit_insn (GEN_FCN (code) (x, y));
3141 }
3142 }
3143
3144 /* Otherwise, find the MODE_INT mode of the same width. */
3145 ret = emit_move_via_integer (mode, x, y, false);
3146 gcc_assert (ret != NULL);
3147 return ret;
3148 }
3149
3150 /* Return true if word I of OP lies entirely in the
3151 undefined bits of a paradoxical subreg. */
3152
3153 static bool
3154 undefined_operand_subword_p (const_rtx op, int i)
3155 {
3156 enum machine_mode innermode, innermostmode;
3157 int offset;
3158 if (GET_CODE (op) != SUBREG)
3159 return false;
3160 innermode = GET_MODE (op);
3161 innermostmode = GET_MODE (SUBREG_REG (op));
3162 offset = i * UNITS_PER_WORD + SUBREG_BYTE (op);
3163 /* The SUBREG_BYTE represents offset, as if the value were stored in
3164 memory, except for a paradoxical subreg where we define
3165 SUBREG_BYTE to be 0; undo this exception as in
3166 simplify_subreg. */
3167 if (SUBREG_BYTE (op) == 0
3168 && GET_MODE_SIZE (innermostmode) < GET_MODE_SIZE (innermode))
3169 {
3170 int difference = (GET_MODE_SIZE (innermostmode) - GET_MODE_SIZE (innermode));
3171 if (WORDS_BIG_ENDIAN)
3172 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
3173 if (BYTES_BIG_ENDIAN)
3174 offset += difference % UNITS_PER_WORD;
3175 }
3176 if (offset >= GET_MODE_SIZE (innermostmode)
3177 || offset <= -GET_MODE_SIZE (word_mode))
3178 return true;
3179 return false;
3180 }
3181
3182 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3183 MODE is any multi-word or full-word mode that lacks a move_insn
3184 pattern. Note that you will get better code if you define such
3185 patterns, even if they must turn into multiple assembler instructions. */
3186
3187 static rtx
3188 emit_move_multi_word (enum machine_mode mode, rtx x, rtx y)
3189 {
3190 rtx last_insn = 0;
3191 rtx seq, inner;
3192 bool need_clobber;
3193 int i;
3194
3195 gcc_assert (GET_MODE_SIZE (mode) >= UNITS_PER_WORD);
3196
3197 /* If X is a push on the stack, do the push now and replace
3198 X with a reference to the stack pointer. */
3199 if (push_operand (x, mode))
3200 x = emit_move_resolve_push (mode, x);
3201
3202 /* If we are in reload, see if either operand is a MEM whose address
3203 is scheduled for replacement. */
3204 if (reload_in_progress && MEM_P (x)
3205 && (inner = find_replacement (&XEXP (x, 0))) != XEXP (x, 0))
3206 x = replace_equiv_address_nv (x, inner);
3207 if (reload_in_progress && MEM_P (y)
3208 && (inner = find_replacement (&XEXP (y, 0))) != XEXP (y, 0))
3209 y = replace_equiv_address_nv (y, inner);
3210
3211 start_sequence ();
3212
3213 need_clobber = false;
3214 for (i = 0;
3215 i < (GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD;
3216 i++)
3217 {
3218 rtx xpart = operand_subword (x, i, 1, mode);
3219 rtx ypart;
3220
3221 /* Do not generate code for a move if it would come entirely
3222 from the undefined bits of a paradoxical subreg. */
3223 if (undefined_operand_subword_p (y, i))
3224 continue;
3225
3226 ypart = operand_subword (y, i, 1, mode);
3227
3228 /* If we can't get a part of Y, put Y into memory if it is a
3229 constant. Otherwise, force it into a register. Then we must
3230 be able to get a part of Y. */
3231 if (ypart == 0 && CONSTANT_P (y))
3232 {
3233 y = use_anchored_address (force_const_mem (mode, y));
3234 ypart = operand_subword (y, i, 1, mode);
3235 }
3236 else if (ypart == 0)
3237 ypart = operand_subword_force (y, i, mode);
3238
3239 gcc_assert (xpart && ypart);
3240
3241 need_clobber |= (GET_CODE (xpart) == SUBREG);
3242
3243 last_insn = emit_move_insn (xpart, ypart);
3244 }
3245
3246 seq = get_insns ();
3247 end_sequence ();
3248
3249 /* Show the output dies here. This is necessary for SUBREGs
3250 of pseudos since we cannot track their lifetimes correctly;
3251 hard regs shouldn't appear here except as return values.
3252 We never want to emit such a clobber after reload. */
3253 if (x != y
3254 && ! (reload_in_progress || reload_completed)
3255 && need_clobber != 0)
3256 emit_clobber (x);
3257
3258 emit_insn (seq);
3259
3260 return last_insn;
3261 }
3262
3263 /* Low level part of emit_move_insn.
3264 Called just like emit_move_insn, but assumes X and Y
3265 are basically valid. */
3266
3267 rtx
3268 emit_move_insn_1 (rtx x, rtx y)
3269 {
3270 enum machine_mode mode = GET_MODE (x);
3271 enum insn_code code;
3272
3273 gcc_assert ((unsigned int) mode < (unsigned int) MAX_MACHINE_MODE);
3274
3275 code = optab_handler (mov_optab, mode);
3276 if (code != CODE_FOR_nothing)
3277 return emit_insn (GEN_FCN (code) (x, y));
3278
3279 /* Expand complex moves by moving real part and imag part. */
3280 if (COMPLEX_MODE_P (mode))
3281 return emit_move_complex (mode, x, y);
3282
3283 if (GET_MODE_CLASS (mode) == MODE_DECIMAL_FLOAT
3284 || ALL_FIXED_POINT_MODE_P (mode))
3285 {
3286 rtx result = emit_move_via_integer (mode, x, y, true);
3287
3288 /* If we can't find an integer mode, use multi words. */
3289 if (result)
3290 return result;
3291 else
3292 return emit_move_multi_word (mode, x, y);
3293 }
3294
3295 if (GET_MODE_CLASS (mode) == MODE_CC)
3296 return emit_move_ccmode (mode, x, y);
3297
3298 /* Try using a move pattern for the corresponding integer mode. This is
3299 only safe when simplify_subreg can convert MODE constants into integer
3300 constants. At present, it can only do this reliably if the value
3301 fits within a HOST_WIDE_INT. */
3302 if (!CONSTANT_P (y) || GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
3303 {
3304 rtx ret = emit_move_via_integer (mode, x, y, false);
3305 if (ret)
3306 return ret;
3307 }
3308
3309 return emit_move_multi_word (mode, x, y);
3310 }
3311
3312 /* Generate code to copy Y into X.
3313 Both Y and X must have the same mode, except that
3314 Y can be a constant with VOIDmode.
3315 This mode cannot be BLKmode; use emit_block_move for that.
3316
3317 Return the last instruction emitted. */
3318
3319 rtx
3320 emit_move_insn (rtx x, rtx y)
3321 {
3322 enum machine_mode mode = GET_MODE (x);
3323 rtx y_cst = NULL_RTX;
3324 rtx last_insn, set;
3325
3326 gcc_assert (mode != BLKmode
3327 && (GET_MODE (y) == mode || GET_MODE (y) == VOIDmode));
3328
3329 if (CONSTANT_P (y))
3330 {
3331 if (optimize
3332 && SCALAR_FLOAT_MODE_P (GET_MODE (x))
3333 && (last_insn = compress_float_constant (x, y)))
3334 return last_insn;
3335
3336 y_cst = y;
3337
3338 if (!LEGITIMATE_CONSTANT_P (y))
3339 {
3340 y = force_const_mem (mode, y);
3341
3342 /* If the target's cannot_force_const_mem prevented the spill,
3343 assume that the target's move expanders will also take care
3344 of the non-legitimate constant. */
3345 if (!y)
3346 y = y_cst;
3347 else
3348 y = use_anchored_address (y);
3349 }
3350 }
3351
3352 /* If X or Y are memory references, verify that their addresses are valid
3353 for the machine. */
3354 if (MEM_P (x)
3355 && (! memory_address_addr_space_p (GET_MODE (x), XEXP (x, 0),
3356 MEM_ADDR_SPACE (x))
3357 && ! push_operand (x, GET_MODE (x))))
3358 x = validize_mem (x);
3359
3360 if (MEM_P (y)
3361 && ! memory_address_addr_space_p (GET_MODE (y), XEXP (y, 0),
3362 MEM_ADDR_SPACE (y)))
3363 y = validize_mem (y);
3364
3365 gcc_assert (mode != BLKmode);
3366
3367 last_insn = emit_move_insn_1 (x, y);
3368
3369 if (y_cst && REG_P (x)
3370 && (set = single_set (last_insn)) != NULL_RTX
3371 && SET_DEST (set) == x
3372 && ! rtx_equal_p (y_cst, SET_SRC (set)))
3373 set_unique_reg_note (last_insn, REG_EQUAL, copy_rtx (y_cst));
3374
3375 return last_insn;
3376 }
3377
3378 /* If Y is representable exactly in a narrower mode, and the target can
3379 perform the extension directly from constant or memory, then emit the
3380 move as an extension. */
3381
3382 static rtx
3383 compress_float_constant (rtx x, rtx y)
3384 {
3385 enum machine_mode dstmode = GET_MODE (x);
3386 enum machine_mode orig_srcmode = GET_MODE (y);
3387 enum machine_mode srcmode;
3388 REAL_VALUE_TYPE r;
3389 int oldcost, newcost;
3390 bool speed = optimize_insn_for_speed_p ();
3391
3392 REAL_VALUE_FROM_CONST_DOUBLE (r, y);
3393
3394 if (LEGITIMATE_CONSTANT_P (y))
3395 oldcost = rtx_cost (y, SET, speed);
3396 else
3397 oldcost = rtx_cost (force_const_mem (dstmode, y), SET, speed);
3398
3399 for (srcmode = GET_CLASS_NARROWEST_MODE (GET_MODE_CLASS (orig_srcmode));
3400 srcmode != orig_srcmode;
3401 srcmode = GET_MODE_WIDER_MODE (srcmode))
3402 {
3403 enum insn_code ic;
3404 rtx trunc_y, last_insn;
3405
3406 /* Skip if the target can't extend this way. */
3407 ic = can_extend_p (dstmode, srcmode, 0);
3408 if (ic == CODE_FOR_nothing)
3409 continue;
3410
3411 /* Skip if the narrowed value isn't exact. */
3412 if (! exact_real_truncate (srcmode, &r))
3413 continue;
3414
3415 trunc_y = CONST_DOUBLE_FROM_REAL_VALUE (r, srcmode);
3416
3417 if (LEGITIMATE_CONSTANT_P (trunc_y))
3418 {
3419 /* Skip if the target needs extra instructions to perform
3420 the extension. */
3421 if (!insn_operand_matches (ic, 1, trunc_y))
3422 continue;
3423 /* This is valid, but may not be cheaper than the original. */
3424 newcost = rtx_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y), SET, speed);
3425 if (oldcost < newcost)
3426 continue;
3427 }
3428 else if (float_extend_from_mem[dstmode][srcmode])
3429 {
3430 trunc_y = force_const_mem (srcmode, trunc_y);
3431 /* This is valid, but may not be cheaper than the original. */
3432 newcost = rtx_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y), SET, speed);
3433 if (oldcost < newcost)
3434 continue;
3435 trunc_y = validize_mem (trunc_y);
3436 }
3437 else
3438 continue;
3439
3440 /* For CSE's benefit, force the compressed constant pool entry
3441 into a new pseudo. This constant may be used in different modes,
3442 and if not, combine will put things back together for us. */
3443 trunc_y = force_reg (srcmode, trunc_y);
3444 emit_unop_insn (ic, x, trunc_y, UNKNOWN);
3445 last_insn = get_last_insn ();
3446
3447 if (REG_P (x))
3448 set_unique_reg_note (last_insn, REG_EQUAL, y);
3449
3450 return last_insn;
3451 }
3452
3453 return NULL_RTX;
3454 }
3455 \f
3456 /* Pushing data onto the stack. */
3457
3458 /* Push a block of length SIZE (perhaps variable)
3459 and return an rtx to address the beginning of the block.
3460 The value may be virtual_outgoing_args_rtx.
3461
3462 EXTRA is the number of bytes of padding to push in addition to SIZE.
3463 BELOW nonzero means this padding comes at low addresses;
3464 otherwise, the padding comes at high addresses. */
3465
3466 rtx
3467 push_block (rtx size, int extra, int below)
3468 {
3469 rtx temp;
3470
3471 size = convert_modes (Pmode, ptr_mode, size, 1);
3472 if (CONSTANT_P (size))
3473 anti_adjust_stack (plus_constant (size, extra));
3474 else if (REG_P (size) && extra == 0)
3475 anti_adjust_stack (size);
3476 else
3477 {
3478 temp = copy_to_mode_reg (Pmode, size);
3479 if (extra != 0)
3480 temp = expand_binop (Pmode, add_optab, temp, GEN_INT (extra),
3481 temp, 0, OPTAB_LIB_WIDEN);
3482 anti_adjust_stack (temp);
3483 }
3484
3485 #ifndef STACK_GROWS_DOWNWARD
3486 if (0)
3487 #else
3488 if (1)
3489 #endif
3490 {
3491 temp = virtual_outgoing_args_rtx;
3492 if (extra != 0 && below)
3493 temp = plus_constant (temp, extra);
3494 }
3495 else
3496 {
3497 if (CONST_INT_P (size))
3498 temp = plus_constant (virtual_outgoing_args_rtx,
3499 -INTVAL (size) - (below ? 0 : extra));
3500 else if (extra != 0 && !below)
3501 temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx,
3502 negate_rtx (Pmode, plus_constant (size, extra)));
3503 else
3504 temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx,
3505 negate_rtx (Pmode, size));
3506 }
3507
3508 return memory_address (GET_CLASS_NARROWEST_MODE (MODE_INT), temp);
3509 }
3510
3511 #ifdef PUSH_ROUNDING
3512
3513 /* Emit single push insn. */
3514
3515 static void
3516 emit_single_push_insn (enum machine_mode mode, rtx x, tree type)
3517 {
3518 rtx dest_addr;
3519 unsigned rounded_size = PUSH_ROUNDING (GET_MODE_SIZE (mode));
3520 rtx dest;
3521 enum insn_code icode;
3522
3523 stack_pointer_delta += PUSH_ROUNDING (GET_MODE_SIZE (mode));
3524 /* If there is push pattern, use it. Otherwise try old way of throwing
3525 MEM representing push operation to move expander. */
3526 icode = optab_handler (push_optab, mode);
3527 if (icode != CODE_FOR_nothing)
3528 {
3529 struct expand_operand ops[1];
3530
3531 create_input_operand (&ops[0], x, mode);
3532 if (maybe_expand_insn (icode, 1, ops))
3533 return;
3534 }
3535 if (GET_MODE_SIZE (mode) == rounded_size)
3536 dest_addr = gen_rtx_fmt_e (STACK_PUSH_CODE, Pmode, stack_pointer_rtx);
3537 /* If we are to pad downward, adjust the stack pointer first and
3538 then store X into the stack location using an offset. This is
3539 because emit_move_insn does not know how to pad; it does not have
3540 access to type. */
3541 else if (FUNCTION_ARG_PADDING (mode, type) == downward)
3542 {
3543 unsigned padding_size = rounded_size - GET_MODE_SIZE (mode);
3544 HOST_WIDE_INT offset;
3545
3546 emit_move_insn (stack_pointer_rtx,
3547 expand_binop (Pmode,
3548 #ifdef STACK_GROWS_DOWNWARD
3549 sub_optab,
3550 #else
3551 add_optab,
3552 #endif
3553 stack_pointer_rtx,
3554 GEN_INT (rounded_size),
3555 NULL_RTX, 0, OPTAB_LIB_WIDEN));
3556
3557 offset = (HOST_WIDE_INT) padding_size;
3558 #ifdef STACK_GROWS_DOWNWARD
3559 if (STACK_PUSH_CODE == POST_DEC)
3560 /* We have already decremented the stack pointer, so get the
3561 previous value. */
3562 offset += (HOST_WIDE_INT) rounded_size;
3563 #else
3564 if (STACK_PUSH_CODE == POST_INC)
3565 /* We have already incremented the stack pointer, so get the
3566 previous value. */
3567 offset -= (HOST_WIDE_INT) rounded_size;
3568 #endif
3569 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx, GEN_INT (offset));
3570 }
3571 else
3572 {
3573 #ifdef STACK_GROWS_DOWNWARD
3574 /* ??? This seems wrong if STACK_PUSH_CODE == POST_DEC. */
3575 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
3576 GEN_INT (-(HOST_WIDE_INT) rounded_size));
3577 #else
3578 /* ??? This seems wrong if STACK_PUSH_CODE == POST_INC. */
3579 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
3580 GEN_INT (rounded_size));
3581 #endif
3582 dest_addr = gen_rtx_PRE_MODIFY (Pmode, stack_pointer_rtx, dest_addr);
3583 }
3584
3585 dest = gen_rtx_MEM (mode, dest_addr);
3586
3587 if (type != 0)
3588 {
3589 set_mem_attributes (dest, type, 1);
3590
3591 if (flag_optimize_sibling_calls)
3592 /* Function incoming arguments may overlap with sibling call
3593 outgoing arguments and we cannot allow reordering of reads
3594 from function arguments with stores to outgoing arguments
3595 of sibling calls. */
3596 set_mem_alias_set (dest, 0);
3597 }
3598 emit_move_insn (dest, x);
3599 }
3600 #endif
3601
3602 /* Generate code to push X onto the stack, assuming it has mode MODE and
3603 type TYPE.
3604 MODE is redundant except when X is a CONST_INT (since they don't
3605 carry mode info).
3606 SIZE is an rtx for the size of data to be copied (in bytes),
3607 needed only if X is BLKmode.
3608
3609 ALIGN (in bits) is maximum alignment we can assume.
3610
3611 If PARTIAL and REG are both nonzero, then copy that many of the first
3612 bytes of X into registers starting with REG, and push the rest of X.
3613 The amount of space pushed is decreased by PARTIAL bytes.
3614 REG must be a hard register in this case.
3615 If REG is zero but PARTIAL is not, take any all others actions for an
3616 argument partially in registers, but do not actually load any
3617 registers.
3618
3619 EXTRA is the amount in bytes of extra space to leave next to this arg.
3620 This is ignored if an argument block has already been allocated.
3621
3622 On a machine that lacks real push insns, ARGS_ADDR is the address of
3623 the bottom of the argument block for this call. We use indexing off there
3624 to store the arg. On machines with push insns, ARGS_ADDR is 0 when a
3625 argument block has not been preallocated.
3626
3627 ARGS_SO_FAR is the size of args previously pushed for this call.
3628
3629 REG_PARM_STACK_SPACE is nonzero if functions require stack space
3630 for arguments passed in registers. If nonzero, it will be the number
3631 of bytes required. */
3632
3633 void
3634 emit_push_insn (rtx x, enum machine_mode mode, tree type, rtx size,
3635 unsigned int align, int partial, rtx reg, int extra,
3636 rtx args_addr, rtx args_so_far, int reg_parm_stack_space,
3637 rtx alignment_pad)
3638 {
3639 rtx xinner;
3640 enum direction stack_direction
3641 #ifdef STACK_GROWS_DOWNWARD
3642 = downward;
3643 #else
3644 = upward;
3645 #endif
3646
3647 /* Decide where to pad the argument: `downward' for below,
3648 `upward' for above, or `none' for don't pad it.
3649 Default is below for small data on big-endian machines; else above. */
3650 enum direction where_pad = FUNCTION_ARG_PADDING (mode, type);
3651
3652 /* Invert direction if stack is post-decrement.
3653 FIXME: why? */
3654 if (STACK_PUSH_CODE == POST_DEC)
3655 if (where_pad != none)
3656 where_pad = (where_pad == downward ? upward : downward);
3657
3658 xinner = x;
3659
3660 if (mode == BLKmode
3661 || (STRICT_ALIGNMENT && align < GET_MODE_ALIGNMENT (mode)))
3662 {
3663 /* Copy a block into the stack, entirely or partially. */
3664
3665 rtx temp;
3666 int used;
3667 int offset;
3668 int skip;
3669
3670 offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT);
3671 used = partial - offset;
3672
3673 if (mode != BLKmode)
3674 {
3675 /* A value is to be stored in an insufficiently aligned
3676 stack slot; copy via a suitably aligned slot if
3677 necessary. */
3678 size = GEN_INT (GET_MODE_SIZE (mode));
3679 if (!MEM_P (xinner))
3680 {
3681 temp = assign_temp (type, 0, 1, 1);
3682 emit_move_insn (temp, xinner);
3683 xinner = temp;
3684 }
3685 }
3686
3687 gcc_assert (size);
3688
3689 /* USED is now the # of bytes we need not copy to the stack
3690 because registers will take care of them. */
3691
3692 if (partial != 0)
3693 xinner = adjust_address (xinner, BLKmode, used);
3694
3695 /* If the partial register-part of the arg counts in its stack size,
3696 skip the part of stack space corresponding to the registers.
3697 Otherwise, start copying to the beginning of the stack space,
3698 by setting SKIP to 0. */
3699 skip = (reg_parm_stack_space == 0) ? 0 : used;
3700
3701 #ifdef PUSH_ROUNDING
3702 /* Do it with several push insns if that doesn't take lots of insns
3703 and if there is no difficulty with push insns that skip bytes
3704 on the stack for alignment purposes. */
3705 if (args_addr == 0
3706 && PUSH_ARGS
3707 && CONST_INT_P (size)
3708 && skip == 0
3709 && MEM_ALIGN (xinner) >= align
3710 && (MOVE_BY_PIECES_P ((unsigned) INTVAL (size) - used, align))
3711 /* Here we avoid the case of a structure whose weak alignment
3712 forces many pushes of a small amount of data,
3713 and such small pushes do rounding that causes trouble. */
3714 && ((! SLOW_UNALIGNED_ACCESS (word_mode, align))
3715 || align >= BIGGEST_ALIGNMENT
3716 || (PUSH_ROUNDING (align / BITS_PER_UNIT)
3717 == (align / BITS_PER_UNIT)))
3718 && (HOST_WIDE_INT) PUSH_ROUNDING (INTVAL (size)) == INTVAL (size))
3719 {
3720 /* Push padding now if padding above and stack grows down,
3721 or if padding below and stack grows up.
3722 But if space already allocated, this has already been done. */
3723 if (extra && args_addr == 0
3724 && where_pad != none && where_pad != stack_direction)
3725 anti_adjust_stack (GEN_INT (extra));
3726
3727 move_by_pieces (NULL, xinner, INTVAL (size) - used, align, 0);
3728 }
3729 else
3730 #endif /* PUSH_ROUNDING */
3731 {
3732 rtx target;
3733
3734 /* Otherwise make space on the stack and copy the data
3735 to the address of that space. */
3736
3737 /* Deduct words put into registers from the size we must copy. */
3738 if (partial != 0)
3739 {
3740 if (CONST_INT_P (size))
3741 size = GEN_INT (INTVAL (size) - used);
3742 else
3743 size = expand_binop (GET_MODE (size), sub_optab, size,
3744 GEN_INT (used), NULL_RTX, 0,
3745 OPTAB_LIB_WIDEN);
3746 }
3747
3748 /* Get the address of the stack space.
3749 In this case, we do not deal with EXTRA separately.
3750 A single stack adjust will do. */
3751 if (! args_addr)
3752 {
3753 temp = push_block (size, extra, where_pad == downward);
3754 extra = 0;
3755 }
3756 else if (CONST_INT_P (args_so_far))
3757 temp = memory_address (BLKmode,
3758 plus_constant (args_addr,
3759 skip + INTVAL (args_so_far)));
3760 else
3761 temp = memory_address (BLKmode,
3762 plus_constant (gen_rtx_PLUS (Pmode,
3763 args_addr,
3764 args_so_far),
3765 skip));
3766
3767 if (!ACCUMULATE_OUTGOING_ARGS)
3768 {
3769 /* If the source is referenced relative to the stack pointer,
3770 copy it to another register to stabilize it. We do not need
3771 to do this if we know that we won't be changing sp. */
3772
3773 if (reg_mentioned_p (virtual_stack_dynamic_rtx, temp)
3774 || reg_mentioned_p (virtual_outgoing_args_rtx, temp))
3775 temp = copy_to_reg (temp);
3776 }
3777
3778 target = gen_rtx_MEM (BLKmode, temp);
3779
3780 /* We do *not* set_mem_attributes here, because incoming arguments
3781 may overlap with sibling call outgoing arguments and we cannot
3782 allow reordering of reads from function arguments with stores
3783 to outgoing arguments of sibling calls. We do, however, want
3784 to record the alignment of the stack slot. */
3785 /* ALIGN may well be better aligned than TYPE, e.g. due to
3786 PARM_BOUNDARY. Assume the caller isn't lying. */
3787 set_mem_align (target, align);
3788
3789 emit_block_move (target, xinner, size, BLOCK_OP_CALL_PARM);
3790 }
3791 }
3792 else if (partial > 0)
3793 {
3794 /* Scalar partly in registers. */
3795
3796 int size = GET_MODE_SIZE (mode) / UNITS_PER_WORD;
3797 int i;
3798 int not_stack;
3799 /* # bytes of start of argument
3800 that we must make space for but need not store. */
3801 int offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT);
3802 int args_offset = INTVAL (args_so_far);
3803 int skip;
3804
3805 /* Push padding now if padding above and stack grows down,
3806 or if padding below and stack grows up.
3807 But if space already allocated, this has already been done. */
3808 if (extra && args_addr == 0
3809 && where_pad != none && where_pad != stack_direction)
3810 anti_adjust_stack (GEN_INT (extra));
3811
3812 /* If we make space by pushing it, we might as well push
3813 the real data. Otherwise, we can leave OFFSET nonzero
3814 and leave the space uninitialized. */
3815 if (args_addr == 0)
3816 offset = 0;
3817
3818 /* Now NOT_STACK gets the number of words that we don't need to
3819 allocate on the stack. Convert OFFSET to words too. */
3820 not_stack = (partial - offset) / UNITS_PER_WORD;
3821 offset /= UNITS_PER_WORD;
3822
3823 /* If the partial register-part of the arg counts in its stack size,
3824 skip the part of stack space corresponding to the registers.
3825 Otherwise, start copying to the beginning of the stack space,
3826 by setting SKIP to 0. */
3827 skip = (reg_parm_stack_space == 0) ? 0 : not_stack;
3828
3829 if (CONSTANT_P (x) && ! LEGITIMATE_CONSTANT_P (x))
3830 x = validize_mem (force_const_mem (mode, x));
3831
3832 /* If X is a hard register in a non-integer mode, copy it into a pseudo;
3833 SUBREGs of such registers are not allowed. */
3834 if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER
3835 && GET_MODE_CLASS (GET_MODE (x)) != MODE_INT))
3836 x = copy_to_reg (x);
3837
3838 /* Loop over all the words allocated on the stack for this arg. */
3839 /* We can do it by words, because any scalar bigger than a word
3840 has a size a multiple of a word. */
3841 #ifndef PUSH_ARGS_REVERSED
3842 for (i = not_stack; i < size; i++)
3843 #else
3844 for (i = size - 1; i >= not_stack; i--)
3845 #endif
3846 if (i >= not_stack + offset)
3847 emit_push_insn (operand_subword_force (x, i, mode),
3848 word_mode, NULL_TREE, NULL_RTX, align, 0, NULL_RTX,
3849 0, args_addr,
3850 GEN_INT (args_offset + ((i - not_stack + skip)
3851 * UNITS_PER_WORD)),
3852 reg_parm_stack_space, alignment_pad);
3853 }
3854 else
3855 {
3856 rtx addr;
3857 rtx dest;
3858
3859 /* Push padding now if padding above and stack grows down,
3860 or if padding below and stack grows up.
3861 But if space already allocated, this has already been done. */
3862 if (extra && args_addr == 0
3863 && where_pad != none && where_pad != stack_direction)
3864 anti_adjust_stack (GEN_INT (extra));
3865
3866 #ifdef PUSH_ROUNDING
3867 if (args_addr == 0 && PUSH_ARGS)
3868 emit_single_push_insn (mode, x, type);
3869 else
3870 #endif
3871 {
3872 if (CONST_INT_P (args_so_far))
3873 addr
3874 = memory_address (mode,
3875 plus_constant (args_addr,
3876 INTVAL (args_so_far)));
3877 else
3878 addr = memory_address (mode, gen_rtx_PLUS (Pmode, args_addr,
3879 args_so_far));
3880 dest = gen_rtx_MEM (mode, addr);
3881
3882 /* We do *not* set_mem_attributes here, because incoming arguments
3883 may overlap with sibling call outgoing arguments and we cannot
3884 allow reordering of reads from function arguments with stores
3885 to outgoing arguments of sibling calls. We do, however, want
3886 to record the alignment of the stack slot. */
3887 /* ALIGN may well be better aligned than TYPE, e.g. due to
3888 PARM_BOUNDARY. Assume the caller isn't lying. */
3889 set_mem_align (dest, align);
3890
3891 emit_move_insn (dest, x);
3892 }
3893 }
3894
3895 /* If part should go in registers, copy that part
3896 into the appropriate registers. Do this now, at the end,
3897 since mem-to-mem copies above may do function calls. */
3898 if (partial > 0 && reg != 0)
3899 {
3900 /* Handle calls that pass values in multiple non-contiguous locations.
3901 The Irix 6 ABI has examples of this. */
3902 if (GET_CODE (reg) == PARALLEL)
3903 emit_group_load (reg, x, type, -1);
3904 else
3905 {
3906 gcc_assert (partial % UNITS_PER_WORD == 0);
3907 move_block_to_reg (REGNO (reg), x, partial / UNITS_PER_WORD, mode);
3908 }
3909 }
3910
3911 if (extra && args_addr == 0 && where_pad == stack_direction)
3912 anti_adjust_stack (GEN_INT (extra));
3913
3914 if (alignment_pad && args_addr == 0)
3915 anti_adjust_stack (alignment_pad);
3916 }
3917 \f
3918 /* Return X if X can be used as a subtarget in a sequence of arithmetic
3919 operations. */
3920
3921 static rtx
3922 get_subtarget (rtx x)
3923 {
3924 return (optimize
3925 || x == 0
3926 /* Only registers can be subtargets. */
3927 || !REG_P (x)
3928 /* Don't use hard regs to avoid extending their life. */
3929 || REGNO (x) < FIRST_PSEUDO_REGISTER
3930 ? 0 : x);
3931 }
3932
3933 /* A subroutine of expand_assignment. Optimize FIELD op= VAL, where
3934 FIELD is a bitfield. Returns true if the optimization was successful,
3935 and there's nothing else to do. */
3936
3937 static bool
3938 optimize_bitfield_assignment_op (unsigned HOST_WIDE_INT bitsize,
3939 unsigned HOST_WIDE_INT bitpos,
3940 enum machine_mode mode1, rtx str_rtx,
3941 tree to, tree src)
3942 {
3943 enum machine_mode str_mode = GET_MODE (str_rtx);
3944 unsigned int str_bitsize = GET_MODE_BITSIZE (str_mode);
3945 tree op0, op1;
3946 rtx value, result;
3947 optab binop;
3948 gimple srcstmt;
3949 enum tree_code code;
3950
3951 if (mode1 != VOIDmode
3952 || bitsize >= BITS_PER_WORD
3953 || str_bitsize > BITS_PER_WORD
3954 || TREE_SIDE_EFFECTS (to)
3955 || TREE_THIS_VOLATILE (to))
3956 return false;
3957
3958 STRIP_NOPS (src);
3959 if (TREE_CODE (src) != SSA_NAME)
3960 return false;
3961 if (TREE_CODE (TREE_TYPE (src)) != INTEGER_TYPE)
3962 return false;
3963
3964 srcstmt = get_gimple_for_ssa_name (src);
3965 if (!srcstmt
3966 || TREE_CODE_CLASS (gimple_assign_rhs_code (srcstmt)) != tcc_binary)
3967 return false;
3968
3969 code = gimple_assign_rhs_code (srcstmt);
3970
3971 op0 = gimple_assign_rhs1 (srcstmt);
3972
3973 /* If OP0 is an SSA_NAME, then we want to walk the use-def chain
3974 to find its initialization. Hopefully the initialization will
3975 be from a bitfield load. */
3976 if (TREE_CODE (op0) == SSA_NAME)
3977 {
3978 gimple op0stmt = get_gimple_for_ssa_name (op0);
3979
3980 /* We want to eventually have OP0 be the same as TO, which
3981 should be a bitfield. */
3982 if (!op0stmt
3983 || !is_gimple_assign (op0stmt)
3984 || gimple_assign_rhs_code (op0stmt) != TREE_CODE (to))
3985 return false;
3986 op0 = gimple_assign_rhs1 (op0stmt);
3987 }
3988
3989 op1 = gimple_assign_rhs2 (srcstmt);
3990
3991 if (!operand_equal_p (to, op0, 0))
3992 return false;
3993
3994 if (MEM_P (str_rtx))
3995 {
3996 unsigned HOST_WIDE_INT offset1;
3997
3998 if (str_bitsize == 0 || str_bitsize > BITS_PER_WORD)
3999 str_mode = word_mode;
4000 str_mode = get_best_mode (bitsize, bitpos,
4001 MEM_ALIGN (str_rtx), str_mode, 0);
4002 if (str_mode == VOIDmode)
4003 return false;
4004 str_bitsize = GET_MODE_BITSIZE (str_mode);
4005
4006 offset1 = bitpos;
4007 bitpos %= str_bitsize;
4008 offset1 = (offset1 - bitpos) / BITS_PER_UNIT;
4009 str_rtx = adjust_address (str_rtx, str_mode, offset1);
4010 }
4011 else if (!REG_P (str_rtx) && GET_CODE (str_rtx) != SUBREG)
4012 return false;
4013
4014 /* If the bit field covers the whole REG/MEM, store_field
4015 will likely generate better code. */
4016 if (bitsize >= str_bitsize)
4017 return false;
4018
4019 /* We can't handle fields split across multiple entities. */
4020 if (bitpos + bitsize > str_bitsize)
4021 return false;
4022
4023 if (BYTES_BIG_ENDIAN)
4024 bitpos = str_bitsize - bitpos - bitsize;
4025
4026 switch (code)
4027 {
4028 case PLUS_EXPR:
4029 case MINUS_EXPR:
4030 /* For now, just optimize the case of the topmost bitfield
4031 where we don't need to do any masking and also
4032 1 bit bitfields where xor can be used.
4033 We might win by one instruction for the other bitfields
4034 too if insv/extv instructions aren't used, so that
4035 can be added later. */
4036 if (bitpos + bitsize != str_bitsize
4037 && (bitsize != 1 || TREE_CODE (op1) != INTEGER_CST))
4038 break;
4039
4040 value = expand_expr (op1, NULL_RTX, str_mode, EXPAND_NORMAL);
4041 value = convert_modes (str_mode,
4042 TYPE_MODE (TREE_TYPE (op1)), value,
4043 TYPE_UNSIGNED (TREE_TYPE (op1)));
4044
4045 /* We may be accessing data outside the field, which means
4046 we can alias adjacent data. */
4047 if (MEM_P (str_rtx))
4048 {
4049 str_rtx = shallow_copy_rtx (str_rtx);
4050 set_mem_alias_set (str_rtx, 0);
4051 set_mem_expr (str_rtx, 0);
4052 }
4053
4054 binop = code == PLUS_EXPR ? add_optab : sub_optab;
4055 if (bitsize == 1 && bitpos + bitsize != str_bitsize)
4056 {
4057 value = expand_and (str_mode, value, const1_rtx, NULL);
4058 binop = xor_optab;
4059 }
4060 value = expand_shift (LSHIFT_EXPR, str_mode, value,
4061 build_int_cst (NULL_TREE, bitpos),
4062 NULL_RTX, 1);
4063 result = expand_binop (str_mode, binop, str_rtx,
4064 value, str_rtx, 1, OPTAB_WIDEN);
4065 if (result != str_rtx)
4066 emit_move_insn (str_rtx, result);
4067 return true;
4068
4069 case BIT_IOR_EXPR:
4070 case BIT_XOR_EXPR:
4071 if (TREE_CODE (op1) != INTEGER_CST)
4072 break;
4073 value = expand_expr (op1, NULL_RTX, GET_MODE (str_rtx), EXPAND_NORMAL);
4074 value = convert_modes (GET_MODE (str_rtx),
4075 TYPE_MODE (TREE_TYPE (op1)), value,
4076 TYPE_UNSIGNED (TREE_TYPE (op1)));
4077
4078 /* We may be accessing data outside the field, which means
4079 we can alias adjacent data. */
4080 if (MEM_P (str_rtx))
4081 {
4082 str_rtx = shallow_copy_rtx (str_rtx);
4083 set_mem_alias_set (str_rtx, 0);
4084 set_mem_expr (str_rtx, 0);
4085 }
4086
4087 binop = code == BIT_IOR_EXPR ? ior_optab : xor_optab;
4088 if (bitpos + bitsize != GET_MODE_BITSIZE (GET_MODE (str_rtx)))
4089 {
4090 rtx mask = GEN_INT (((unsigned HOST_WIDE_INT) 1 << bitsize)
4091 - 1);
4092 value = expand_and (GET_MODE (str_rtx), value, mask,
4093 NULL_RTX);
4094 }
4095 value = expand_shift (LSHIFT_EXPR, GET_MODE (str_rtx), value,
4096 build_int_cst (NULL_TREE, bitpos),
4097 NULL_RTX, 1);
4098 result = expand_binop (GET_MODE (str_rtx), binop, str_rtx,
4099 value, str_rtx, 1, OPTAB_WIDEN);
4100 if (result != str_rtx)
4101 emit_move_insn (str_rtx, result);
4102 return true;
4103
4104 default:
4105 break;
4106 }
4107
4108 return false;
4109 }
4110
4111
4112 /* Expand an assignment that stores the value of FROM into TO. If NONTEMPORAL
4113 is true, try generating a nontemporal store. */
4114
4115 void
4116 expand_assignment (tree to, tree from, bool nontemporal)
4117 {
4118 rtx to_rtx = 0;
4119 rtx result;
4120 enum machine_mode mode;
4121 int align;
4122 enum insn_code icode;
4123
4124 /* Don't crash if the lhs of the assignment was erroneous. */
4125 if (TREE_CODE (to) == ERROR_MARK)
4126 {
4127 result = expand_normal (from);
4128 return;
4129 }
4130
4131 /* Optimize away no-op moves without side-effects. */
4132 if (operand_equal_p (to, from, 0))
4133 return;
4134
4135 mode = TYPE_MODE (TREE_TYPE (to));
4136 if ((TREE_CODE (to) == MEM_REF
4137 || TREE_CODE (to) == TARGET_MEM_REF)
4138 && mode != BLKmode
4139 && ((align = MAX (TYPE_ALIGN (TREE_TYPE (to)),
4140 get_object_alignment (to, BIGGEST_ALIGNMENT)))
4141 < (signed) GET_MODE_ALIGNMENT (mode))
4142 && ((icode = optab_handler (movmisalign_optab, mode))
4143 != CODE_FOR_nothing))
4144 {
4145 struct expand_operand ops[2];
4146 enum machine_mode address_mode;
4147 rtx reg, op0, mem;
4148
4149 reg = expand_expr (from, NULL_RTX, VOIDmode, EXPAND_NORMAL);
4150 reg = force_not_mem (reg);
4151
4152 if (TREE_CODE (to) == MEM_REF)
4153 {
4154 addr_space_t as
4155 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (to, 1))));
4156 tree base = TREE_OPERAND (to, 0);
4157 address_mode = targetm.addr_space.address_mode (as);
4158 op0 = expand_expr (base, NULL_RTX, VOIDmode, EXPAND_NORMAL);
4159 op0 = convert_memory_address_addr_space (address_mode, op0, as);
4160 if (!integer_zerop (TREE_OPERAND (to, 1)))
4161 {
4162 rtx off
4163 = immed_double_int_const (mem_ref_offset (to), address_mode);
4164 op0 = simplify_gen_binary (PLUS, address_mode, op0, off);
4165 }
4166 op0 = memory_address_addr_space (mode, op0, as);
4167 mem = gen_rtx_MEM (mode, op0);
4168 set_mem_attributes (mem, to, 0);
4169 set_mem_addr_space (mem, as);
4170 }
4171 else if (TREE_CODE (to) == TARGET_MEM_REF)
4172 {
4173 addr_space_t as = TYPE_ADDR_SPACE (TREE_TYPE (to));
4174 struct mem_address addr;
4175
4176 get_address_description (to, &addr);
4177 op0 = addr_for_mem_ref (&addr, as, true);
4178 op0 = memory_address_addr_space (mode, op0, as);
4179 mem = gen_rtx_MEM (mode, op0);
4180 set_mem_attributes (mem, to, 0);
4181 set_mem_addr_space (mem, as);
4182 }
4183 else
4184 gcc_unreachable ();
4185 if (TREE_THIS_VOLATILE (to))
4186 MEM_VOLATILE_P (mem) = 1;
4187
4188 create_fixed_operand (&ops[0], mem);
4189 create_input_operand (&ops[1], reg, mode);
4190 /* The movmisalign<mode> pattern cannot fail, else the assignment would
4191 silently be omitted. */
4192 expand_insn (icode, 2, ops);
4193 return;
4194 }
4195
4196 /* Assignment of a structure component needs special treatment
4197 if the structure component's rtx is not simply a MEM.
4198 Assignment of an array element at a constant index, and assignment of
4199 an array element in an unaligned packed structure field, has the same
4200 problem. */
4201 if (handled_component_p (to)
4202 /* ??? We only need to handle MEM_REF here if the access is not
4203 a full access of the base object. */
4204 || (TREE_CODE (to) == MEM_REF
4205 && TREE_CODE (TREE_OPERAND (to, 0)) == ADDR_EXPR)
4206 || TREE_CODE (TREE_TYPE (to)) == ARRAY_TYPE)
4207 {
4208 enum machine_mode mode1;
4209 HOST_WIDE_INT bitsize, bitpos;
4210 tree offset;
4211 int unsignedp;
4212 int volatilep = 0;
4213 tree tem;
4214
4215 push_temp_slots ();
4216 tem = get_inner_reference (to, &bitsize, &bitpos, &offset, &mode1,
4217 &unsignedp, &volatilep, true);
4218
4219 /* If we are going to use store_bit_field and extract_bit_field,
4220 make sure to_rtx will be safe for multiple use. */
4221
4222 to_rtx = expand_normal (tem);
4223
4224 /* If the bitfield is volatile, we want to access it in the
4225 field's mode, not the computed mode.
4226 If a MEM has VOIDmode (external with incomplete type),
4227 use BLKmode for it instead. */
4228 if (MEM_P (to_rtx))
4229 {
4230 if (volatilep && flag_strict_volatile_bitfields > 0)
4231 to_rtx = adjust_address (to_rtx, mode1, 0);
4232 else if (GET_MODE (to_rtx) == VOIDmode)
4233 to_rtx = adjust_address (to_rtx, BLKmode, 0);
4234 }
4235
4236 if (offset != 0)
4237 {
4238 enum machine_mode address_mode;
4239 rtx offset_rtx;
4240
4241 if (!MEM_P (to_rtx))
4242 {
4243 /* We can get constant negative offsets into arrays with broken
4244 user code. Translate this to a trap instead of ICEing. */
4245 gcc_assert (TREE_CODE (offset) == INTEGER_CST);
4246 expand_builtin_trap ();
4247 to_rtx = gen_rtx_MEM (BLKmode, const0_rtx);
4248 }
4249
4250 offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode, EXPAND_SUM);
4251 address_mode
4252 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (to_rtx));
4253 if (GET_MODE (offset_rtx) != address_mode)
4254 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
4255
4256 /* A constant address in TO_RTX can have VOIDmode, we must not try
4257 to call force_reg for that case. Avoid that case. */
4258 if (MEM_P (to_rtx)
4259 && GET_MODE (to_rtx) == BLKmode
4260 && GET_MODE (XEXP (to_rtx, 0)) != VOIDmode
4261 && bitsize > 0
4262 && (bitpos % bitsize) == 0
4263 && (bitsize % GET_MODE_ALIGNMENT (mode1)) == 0
4264 && MEM_ALIGN (to_rtx) == GET_MODE_ALIGNMENT (mode1))
4265 {
4266 to_rtx = adjust_address (to_rtx, mode1, bitpos / BITS_PER_UNIT);
4267 bitpos = 0;
4268 }
4269
4270 to_rtx = offset_address (to_rtx, offset_rtx,
4271 highest_pow2_factor_for_target (to,
4272 offset));
4273 }
4274
4275 /* No action is needed if the target is not a memory and the field
4276 lies completely outside that target. This can occur if the source
4277 code contains an out-of-bounds access to a small array. */
4278 if (!MEM_P (to_rtx)
4279 && GET_MODE (to_rtx) != BLKmode
4280 && (unsigned HOST_WIDE_INT) bitpos
4281 >= GET_MODE_BITSIZE (GET_MODE (to_rtx)))
4282 {
4283 expand_normal (from);
4284 result = NULL;
4285 }
4286 /* Handle expand_expr of a complex value returning a CONCAT. */
4287 else if (GET_CODE (to_rtx) == CONCAT)
4288 {
4289 if (COMPLEX_MODE_P (TYPE_MODE (TREE_TYPE (from))))
4290 {
4291 gcc_assert (bitpos == 0);
4292 result = store_expr (from, to_rtx, false, nontemporal);
4293 }
4294 else
4295 {
4296 gcc_assert (bitpos == 0 || bitpos == GET_MODE_BITSIZE (mode1));
4297 result = store_expr (from, XEXP (to_rtx, bitpos != 0), false,
4298 nontemporal);
4299 }
4300 }
4301 else
4302 {
4303 if (MEM_P (to_rtx))
4304 {
4305 /* If the field is at offset zero, we could have been given the
4306 DECL_RTX of the parent struct. Don't munge it. */
4307 to_rtx = shallow_copy_rtx (to_rtx);
4308
4309 set_mem_attributes_minus_bitpos (to_rtx, to, 0, bitpos);
4310
4311 /* Deal with volatile and readonly fields. The former is only
4312 done for MEM. Also set MEM_KEEP_ALIAS_SET_P if needed. */
4313 if (volatilep)
4314 MEM_VOLATILE_P (to_rtx) = 1;
4315 if (component_uses_parent_alias_set (to))
4316 MEM_KEEP_ALIAS_SET_P (to_rtx) = 1;
4317 }
4318
4319 if (optimize_bitfield_assignment_op (bitsize, bitpos, mode1,
4320 to_rtx, to, from))
4321 result = NULL;
4322 else
4323 result = store_field (to_rtx, bitsize, bitpos, mode1, from,
4324 TREE_TYPE (tem), get_alias_set (to),
4325 nontemporal);
4326 }
4327
4328 if (result)
4329 preserve_temp_slots (result);
4330 free_temp_slots ();
4331 pop_temp_slots ();
4332 return;
4333 }
4334
4335 /* If the rhs is a function call and its value is not an aggregate,
4336 call the function before we start to compute the lhs.
4337 This is needed for correct code for cases such as
4338 val = setjmp (buf) on machines where reference to val
4339 requires loading up part of an address in a separate insn.
4340
4341 Don't do this if TO is a VAR_DECL or PARM_DECL whose DECL_RTL is REG
4342 since it might be a promoted variable where the zero- or sign- extension
4343 needs to be done. Handling this in the normal way is safe because no
4344 computation is done before the call. The same is true for SSA names. */
4345 if (TREE_CODE (from) == CALL_EXPR && ! aggregate_value_p (from, from)
4346 && COMPLETE_TYPE_P (TREE_TYPE (from))
4347 && TREE_CODE (TYPE_SIZE (TREE_TYPE (from))) == INTEGER_CST
4348 && ! (((TREE_CODE (to) == VAR_DECL || TREE_CODE (to) == PARM_DECL)
4349 && REG_P (DECL_RTL (to)))
4350 || TREE_CODE (to) == SSA_NAME))
4351 {
4352 rtx value;
4353
4354 push_temp_slots ();
4355 value = expand_normal (from);
4356 if (to_rtx == 0)
4357 to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
4358
4359 /* Handle calls that return values in multiple non-contiguous locations.
4360 The Irix 6 ABI has examples of this. */
4361 if (GET_CODE (to_rtx) == PARALLEL)
4362 emit_group_load (to_rtx, value, TREE_TYPE (from),
4363 int_size_in_bytes (TREE_TYPE (from)));
4364 else if (GET_MODE (to_rtx) == BLKmode)
4365 emit_block_move (to_rtx, value, expr_size (from), BLOCK_OP_NORMAL);
4366 else
4367 {
4368 if (POINTER_TYPE_P (TREE_TYPE (to)))
4369 value = convert_memory_address_addr_space
4370 (GET_MODE (to_rtx), value,
4371 TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (to))));
4372
4373 emit_move_insn (to_rtx, value);
4374 }
4375 preserve_temp_slots (to_rtx);
4376 free_temp_slots ();
4377 pop_temp_slots ();
4378 return;
4379 }
4380
4381 /* Ordinary treatment. Expand TO to get a REG or MEM rtx.
4382 Don't re-expand if it was expanded already (in COMPONENT_REF case). */
4383
4384 if (to_rtx == 0)
4385 to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
4386
4387 /* Don't move directly into a return register. */
4388 if (TREE_CODE (to) == RESULT_DECL
4389 && (REG_P (to_rtx) || GET_CODE (to_rtx) == PARALLEL))
4390 {
4391 rtx temp;
4392
4393 push_temp_slots ();
4394 temp = expand_expr (from, NULL_RTX, GET_MODE (to_rtx), EXPAND_NORMAL);
4395
4396 if (GET_CODE (to_rtx) == PARALLEL)
4397 emit_group_load (to_rtx, temp, TREE_TYPE (from),
4398 int_size_in_bytes (TREE_TYPE (from)));
4399 else
4400 emit_move_insn (to_rtx, temp);
4401
4402 preserve_temp_slots (to_rtx);
4403 free_temp_slots ();
4404 pop_temp_slots ();
4405 return;
4406 }
4407
4408 /* In case we are returning the contents of an object which overlaps
4409 the place the value is being stored, use a safe function when copying
4410 a value through a pointer into a structure value return block. */
4411 if (TREE_CODE (to) == RESULT_DECL
4412 && TREE_CODE (from) == INDIRECT_REF
4413 && ADDR_SPACE_GENERIC_P
4414 (TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (from, 0)))))
4415 && refs_may_alias_p (to, from)
4416 && cfun->returns_struct
4417 && !cfun->returns_pcc_struct)
4418 {
4419 rtx from_rtx, size;
4420
4421 push_temp_slots ();
4422 size = expr_size (from);
4423 from_rtx = expand_normal (from);
4424
4425 emit_library_call (memmove_libfunc, LCT_NORMAL,
4426 VOIDmode, 3, XEXP (to_rtx, 0), Pmode,
4427 XEXP (from_rtx, 0), Pmode,
4428 convert_to_mode (TYPE_MODE (sizetype),
4429 size, TYPE_UNSIGNED (sizetype)),
4430 TYPE_MODE (sizetype));
4431
4432 preserve_temp_slots (to_rtx);
4433 free_temp_slots ();
4434 pop_temp_slots ();
4435 return;
4436 }
4437
4438 /* Compute FROM and store the value in the rtx we got. */
4439
4440 push_temp_slots ();
4441 result = store_expr (from, to_rtx, 0, nontemporal);
4442 preserve_temp_slots (result);
4443 free_temp_slots ();
4444 pop_temp_slots ();
4445 return;
4446 }
4447
4448 /* Emits nontemporal store insn that moves FROM to TO. Returns true if this
4449 succeeded, false otherwise. */
4450
4451 bool
4452 emit_storent_insn (rtx to, rtx from)
4453 {
4454 struct expand_operand ops[2];
4455 enum machine_mode mode = GET_MODE (to);
4456 enum insn_code code = optab_handler (storent_optab, mode);
4457
4458 if (code == CODE_FOR_nothing)
4459 return false;
4460
4461 create_fixed_operand (&ops[0], to);
4462 create_input_operand (&ops[1], from, mode);
4463 return maybe_expand_insn (code, 2, ops);
4464 }
4465
4466 /* Generate code for computing expression EXP,
4467 and storing the value into TARGET.
4468
4469 If the mode is BLKmode then we may return TARGET itself.
4470 It turns out that in BLKmode it doesn't cause a problem.
4471 because C has no operators that could combine two different
4472 assignments into the same BLKmode object with different values
4473 with no sequence point. Will other languages need this to
4474 be more thorough?
4475
4476 If CALL_PARAM_P is nonzero, this is a store into a call param on the
4477 stack, and block moves may need to be treated specially.
4478
4479 If NONTEMPORAL is true, try using a nontemporal store instruction. */
4480
4481 rtx
4482 store_expr (tree exp, rtx target, int call_param_p, bool nontemporal)
4483 {
4484 rtx temp;
4485 rtx alt_rtl = NULL_RTX;
4486 location_t loc = EXPR_LOCATION (exp);
4487
4488 if (VOID_TYPE_P (TREE_TYPE (exp)))
4489 {
4490 /* C++ can generate ?: expressions with a throw expression in one
4491 branch and an rvalue in the other. Here, we resolve attempts to
4492 store the throw expression's nonexistent result. */
4493 gcc_assert (!call_param_p);
4494 expand_expr (exp, const0_rtx, VOIDmode, EXPAND_NORMAL);
4495 return NULL_RTX;
4496 }
4497 if (TREE_CODE (exp) == COMPOUND_EXPR)
4498 {
4499 /* Perform first part of compound expression, then assign from second
4500 part. */
4501 expand_expr (TREE_OPERAND (exp, 0), const0_rtx, VOIDmode,
4502 call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL);
4503 return store_expr (TREE_OPERAND (exp, 1), target, call_param_p,
4504 nontemporal);
4505 }
4506 else if (TREE_CODE (exp) == COND_EXPR && GET_MODE (target) == BLKmode)
4507 {
4508 /* For conditional expression, get safe form of the target. Then
4509 test the condition, doing the appropriate assignment on either
4510 side. This avoids the creation of unnecessary temporaries.
4511 For non-BLKmode, it is more efficient not to do this. */
4512
4513 rtx lab1 = gen_label_rtx (), lab2 = gen_label_rtx ();
4514
4515 do_pending_stack_adjust ();
4516 NO_DEFER_POP;
4517 jumpifnot (TREE_OPERAND (exp, 0), lab1, -1);
4518 store_expr (TREE_OPERAND (exp, 1), target, call_param_p,
4519 nontemporal);
4520 emit_jump_insn (gen_jump (lab2));
4521 emit_barrier ();
4522 emit_label (lab1);
4523 store_expr (TREE_OPERAND (exp, 2), target, call_param_p,
4524 nontemporal);
4525 emit_label (lab2);
4526 OK_DEFER_POP;
4527
4528 return NULL_RTX;
4529 }
4530 else if (GET_CODE (target) == SUBREG && SUBREG_PROMOTED_VAR_P (target))
4531 /* If this is a scalar in a register that is stored in a wider mode
4532 than the declared mode, compute the result into its declared mode
4533 and then convert to the wider mode. Our value is the computed
4534 expression. */
4535 {
4536 rtx inner_target = 0;
4537
4538 /* We can do the conversion inside EXP, which will often result
4539 in some optimizations. Do the conversion in two steps: first
4540 change the signedness, if needed, then the extend. But don't
4541 do this if the type of EXP is a subtype of something else
4542 since then the conversion might involve more than just
4543 converting modes. */
4544 if (INTEGRAL_TYPE_P (TREE_TYPE (exp))
4545 && TREE_TYPE (TREE_TYPE (exp)) == 0
4546 && GET_MODE_PRECISION (GET_MODE (target))
4547 == TYPE_PRECISION (TREE_TYPE (exp)))
4548 {
4549 if (TYPE_UNSIGNED (TREE_TYPE (exp))
4550 != SUBREG_PROMOTED_UNSIGNED_P (target))
4551 {
4552 /* Some types, e.g. Fortran's logical*4, won't have a signed
4553 version, so use the mode instead. */
4554 tree ntype
4555 = (signed_or_unsigned_type_for
4556 (SUBREG_PROMOTED_UNSIGNED_P (target), TREE_TYPE (exp)));
4557 if (ntype == NULL)
4558 ntype = lang_hooks.types.type_for_mode
4559 (TYPE_MODE (TREE_TYPE (exp)),
4560 SUBREG_PROMOTED_UNSIGNED_P (target));
4561
4562 exp = fold_convert_loc (loc, ntype, exp);
4563 }
4564
4565 exp = fold_convert_loc (loc, lang_hooks.types.type_for_mode
4566 (GET_MODE (SUBREG_REG (target)),
4567 SUBREG_PROMOTED_UNSIGNED_P (target)),
4568 exp);
4569
4570 inner_target = SUBREG_REG (target);
4571 }
4572
4573 temp = expand_expr (exp, inner_target, VOIDmode,
4574 call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL);
4575
4576 /* If TEMP is a VOIDmode constant, use convert_modes to make
4577 sure that we properly convert it. */
4578 if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode)
4579 {
4580 temp = convert_modes (GET_MODE (target), TYPE_MODE (TREE_TYPE (exp)),
4581 temp, SUBREG_PROMOTED_UNSIGNED_P (target));
4582 temp = convert_modes (GET_MODE (SUBREG_REG (target)),
4583 GET_MODE (target), temp,
4584 SUBREG_PROMOTED_UNSIGNED_P (target));
4585 }
4586
4587 convert_move (SUBREG_REG (target), temp,
4588 SUBREG_PROMOTED_UNSIGNED_P (target));
4589
4590 return NULL_RTX;
4591 }
4592 else if ((TREE_CODE (exp) == STRING_CST
4593 || (TREE_CODE (exp) == MEM_REF
4594 && TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR
4595 && TREE_CODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0))
4596 == STRING_CST
4597 && integer_zerop (TREE_OPERAND (exp, 1))))
4598 && !nontemporal && !call_param_p
4599 && MEM_P (target))
4600 {
4601 /* Optimize initialization of an array with a STRING_CST. */
4602 HOST_WIDE_INT exp_len, str_copy_len;
4603 rtx dest_mem;
4604 tree str = TREE_CODE (exp) == STRING_CST
4605 ? exp : TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
4606
4607 exp_len = int_expr_size (exp);
4608 if (exp_len <= 0)
4609 goto normal_expr;
4610
4611 if (TREE_STRING_LENGTH (str) <= 0)
4612 goto normal_expr;
4613
4614 str_copy_len = strlen (TREE_STRING_POINTER (str));
4615 if (str_copy_len < TREE_STRING_LENGTH (str) - 1)
4616 goto normal_expr;
4617
4618 str_copy_len = TREE_STRING_LENGTH (str);
4619 if ((STORE_MAX_PIECES & (STORE_MAX_PIECES - 1)) == 0
4620 && TREE_STRING_POINTER (str)[TREE_STRING_LENGTH (str) - 1] == '\0')
4621 {
4622 str_copy_len += STORE_MAX_PIECES - 1;
4623 str_copy_len &= ~(STORE_MAX_PIECES - 1);
4624 }
4625 str_copy_len = MIN (str_copy_len, exp_len);
4626 if (!can_store_by_pieces (str_copy_len, builtin_strncpy_read_str,
4627 CONST_CAST (char *, TREE_STRING_POINTER (str)),
4628 MEM_ALIGN (target), false))
4629 goto normal_expr;
4630
4631 dest_mem = target;
4632
4633 dest_mem = store_by_pieces (dest_mem,
4634 str_copy_len, builtin_strncpy_read_str,
4635 CONST_CAST (char *,
4636 TREE_STRING_POINTER (str)),
4637 MEM_ALIGN (target), false,
4638 exp_len > str_copy_len ? 1 : 0);
4639 if (exp_len > str_copy_len)
4640 clear_storage (adjust_address (dest_mem, BLKmode, 0),
4641 GEN_INT (exp_len - str_copy_len),
4642 BLOCK_OP_NORMAL);
4643 return NULL_RTX;
4644 }
4645 else
4646 {
4647 rtx tmp_target;
4648
4649 normal_expr:
4650 /* If we want to use a nontemporal store, force the value to
4651 register first. */
4652 tmp_target = nontemporal ? NULL_RTX : target;
4653 temp = expand_expr_real (exp, tmp_target, GET_MODE (target),
4654 (call_param_p
4655 ? EXPAND_STACK_PARM : EXPAND_NORMAL),
4656 &alt_rtl);
4657 }
4658
4659 /* If TEMP is a VOIDmode constant and the mode of the type of EXP is not
4660 the same as that of TARGET, adjust the constant. This is needed, for
4661 example, in case it is a CONST_DOUBLE and we want only a word-sized
4662 value. */
4663 if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode
4664 && TREE_CODE (exp) != ERROR_MARK
4665 && GET_MODE (target) != TYPE_MODE (TREE_TYPE (exp)))
4666 temp = convert_modes (GET_MODE (target), TYPE_MODE (TREE_TYPE (exp)),
4667 temp, TYPE_UNSIGNED (TREE_TYPE (exp)));
4668
4669 /* If value was not generated in the target, store it there.
4670 Convert the value to TARGET's type first if necessary and emit the
4671 pending incrementations that have been queued when expanding EXP.
4672 Note that we cannot emit the whole queue blindly because this will
4673 effectively disable the POST_INC optimization later.
4674
4675 If TEMP and TARGET compare equal according to rtx_equal_p, but
4676 one or both of them are volatile memory refs, we have to distinguish
4677 two cases:
4678 - expand_expr has used TARGET. In this case, we must not generate
4679 another copy. This can be detected by TARGET being equal according
4680 to == .
4681 - expand_expr has not used TARGET - that means that the source just
4682 happens to have the same RTX form. Since temp will have been created
4683 by expand_expr, it will compare unequal according to == .
4684 We must generate a copy in this case, to reach the correct number
4685 of volatile memory references. */
4686
4687 if ((! rtx_equal_p (temp, target)
4688 || (temp != target && (side_effects_p (temp)
4689 || side_effects_p (target))))
4690 && TREE_CODE (exp) != ERROR_MARK
4691 /* If store_expr stores a DECL whose DECL_RTL(exp) == TARGET,
4692 but TARGET is not valid memory reference, TEMP will differ
4693 from TARGET although it is really the same location. */
4694 && !(alt_rtl
4695 && rtx_equal_p (alt_rtl, target)
4696 && !side_effects_p (alt_rtl)
4697 && !side_effects_p (target))
4698 /* If there's nothing to copy, don't bother. Don't call
4699 expr_size unless necessary, because some front-ends (C++)
4700 expr_size-hook must not be given objects that are not
4701 supposed to be bit-copied or bit-initialized. */
4702 && expr_size (exp) != const0_rtx)
4703 {
4704 if (GET_MODE (temp) != GET_MODE (target)
4705 && GET_MODE (temp) != VOIDmode)
4706 {
4707 int unsignedp = TYPE_UNSIGNED (TREE_TYPE (exp));
4708 if (GET_MODE (target) == BLKmode
4709 && GET_MODE (temp) == BLKmode)
4710 emit_block_move (target, temp, expr_size (exp),
4711 (call_param_p
4712 ? BLOCK_OP_CALL_PARM
4713 : BLOCK_OP_NORMAL));
4714 else if (GET_MODE (target) == BLKmode)
4715 store_bit_field (target, INTVAL (expr_size (exp)) * BITS_PER_UNIT,
4716 0, GET_MODE (temp), temp);
4717 else
4718 convert_move (target, temp, unsignedp);
4719 }
4720
4721 else if (GET_MODE (temp) == BLKmode && TREE_CODE (exp) == STRING_CST)
4722 {
4723 /* Handle copying a string constant into an array. The string
4724 constant may be shorter than the array. So copy just the string's
4725 actual length, and clear the rest. First get the size of the data
4726 type of the string, which is actually the size of the target. */
4727 rtx size = expr_size (exp);
4728
4729 if (CONST_INT_P (size)
4730 && INTVAL (size) < TREE_STRING_LENGTH (exp))
4731 emit_block_move (target, temp, size,
4732 (call_param_p
4733 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
4734 else
4735 {
4736 enum machine_mode pointer_mode
4737 = targetm.addr_space.pointer_mode (MEM_ADDR_SPACE (target));
4738 enum machine_mode address_mode
4739 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (target));
4740
4741 /* Compute the size of the data to copy from the string. */
4742 tree copy_size
4743 = size_binop_loc (loc, MIN_EXPR,
4744 make_tree (sizetype, size),
4745 size_int (TREE_STRING_LENGTH (exp)));
4746 rtx copy_size_rtx
4747 = expand_expr (copy_size, NULL_RTX, VOIDmode,
4748 (call_param_p
4749 ? EXPAND_STACK_PARM : EXPAND_NORMAL));
4750 rtx label = 0;
4751
4752 /* Copy that much. */
4753 copy_size_rtx = convert_to_mode (pointer_mode, copy_size_rtx,
4754 TYPE_UNSIGNED (sizetype));
4755 emit_block_move (target, temp, copy_size_rtx,
4756 (call_param_p
4757 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
4758
4759 /* Figure out how much is left in TARGET that we have to clear.
4760 Do all calculations in pointer_mode. */
4761 if (CONST_INT_P (copy_size_rtx))
4762 {
4763 size = plus_constant (size, -INTVAL (copy_size_rtx));
4764 target = adjust_address (target, BLKmode,
4765 INTVAL (copy_size_rtx));
4766 }
4767 else
4768 {
4769 size = expand_binop (TYPE_MODE (sizetype), sub_optab, size,
4770 copy_size_rtx, NULL_RTX, 0,
4771 OPTAB_LIB_WIDEN);
4772
4773 if (GET_MODE (copy_size_rtx) != address_mode)
4774 copy_size_rtx = convert_to_mode (address_mode,
4775 copy_size_rtx,
4776 TYPE_UNSIGNED (sizetype));
4777
4778 target = offset_address (target, copy_size_rtx,
4779 highest_pow2_factor (copy_size));
4780 label = gen_label_rtx ();
4781 emit_cmp_and_jump_insns (size, const0_rtx, LT, NULL_RTX,
4782 GET_MODE (size), 0, label);
4783 }
4784
4785 if (size != const0_rtx)
4786 clear_storage (target, size, BLOCK_OP_NORMAL);
4787
4788 if (label)
4789 emit_label (label);
4790 }
4791 }
4792 /* Handle calls that return values in multiple non-contiguous locations.
4793 The Irix 6 ABI has examples of this. */
4794 else if (GET_CODE (target) == PARALLEL)
4795 emit_group_load (target, temp, TREE_TYPE (exp),
4796 int_size_in_bytes (TREE_TYPE (exp)));
4797 else if (GET_MODE (temp) == BLKmode)
4798 emit_block_move (target, temp, expr_size (exp),
4799 (call_param_p
4800 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
4801 else if (nontemporal
4802 && emit_storent_insn (target, temp))
4803 /* If we managed to emit a nontemporal store, there is nothing else to
4804 do. */
4805 ;
4806 else
4807 {
4808 temp = force_operand (temp, target);
4809 if (temp != target)
4810 emit_move_insn (target, temp);
4811 }
4812 }
4813
4814 return NULL_RTX;
4815 }
4816 \f
4817 /* Helper for categorize_ctor_elements. Identical interface. */
4818
4819 static bool
4820 categorize_ctor_elements_1 (const_tree ctor, HOST_WIDE_INT *p_nz_elts,
4821 HOST_WIDE_INT *p_elt_count,
4822 bool *p_must_clear)
4823 {
4824 unsigned HOST_WIDE_INT idx;
4825 HOST_WIDE_INT nz_elts, elt_count;
4826 tree value, purpose;
4827
4828 /* Whether CTOR is a valid constant initializer, in accordance with what
4829 initializer_constant_valid_p does. If inferred from the constructor
4830 elements, true until proven otherwise. */
4831 bool const_from_elts_p = constructor_static_from_elts_p (ctor);
4832 bool const_p = const_from_elts_p ? true : TREE_STATIC (ctor);
4833
4834 nz_elts = 0;
4835 elt_count = 0;
4836
4837 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (ctor), idx, purpose, value)
4838 {
4839 HOST_WIDE_INT mult = 1;
4840
4841 if (TREE_CODE (purpose) == RANGE_EXPR)
4842 {
4843 tree lo_index = TREE_OPERAND (purpose, 0);
4844 tree hi_index = TREE_OPERAND (purpose, 1);
4845
4846 if (host_integerp (lo_index, 1) && host_integerp (hi_index, 1))
4847 mult = (tree_low_cst (hi_index, 1)
4848 - tree_low_cst (lo_index, 1) + 1);
4849 }
4850
4851 switch (TREE_CODE (value))
4852 {
4853 case CONSTRUCTOR:
4854 {
4855 HOST_WIDE_INT nz = 0, ic = 0;
4856
4857 bool const_elt_p
4858 = categorize_ctor_elements_1 (value, &nz, &ic, p_must_clear);
4859
4860 nz_elts += mult * nz;
4861 elt_count += mult * ic;
4862
4863 if (const_from_elts_p && const_p)
4864 const_p = const_elt_p;
4865 }
4866 break;
4867
4868 case INTEGER_CST:
4869 case REAL_CST:
4870 case FIXED_CST:
4871 if (!initializer_zerop (value))
4872 nz_elts += mult;
4873 elt_count += mult;
4874 break;
4875
4876 case STRING_CST:
4877 nz_elts += mult * TREE_STRING_LENGTH (value);
4878 elt_count += mult * TREE_STRING_LENGTH (value);
4879 break;
4880
4881 case COMPLEX_CST:
4882 if (!initializer_zerop (TREE_REALPART (value)))
4883 nz_elts += mult;
4884 if (!initializer_zerop (TREE_IMAGPART (value)))
4885 nz_elts += mult;
4886 elt_count += mult;
4887 break;
4888
4889 case VECTOR_CST:
4890 {
4891 tree v;
4892 for (v = TREE_VECTOR_CST_ELTS (value); v; v = TREE_CHAIN (v))
4893 {
4894 if (!initializer_zerop (TREE_VALUE (v)))
4895 nz_elts += mult;
4896 elt_count += mult;
4897 }
4898 }
4899 break;
4900
4901 default:
4902 {
4903 HOST_WIDE_INT tc = count_type_elements (TREE_TYPE (value), true);
4904 if (tc < 1)
4905 tc = 1;
4906 nz_elts += mult * tc;
4907 elt_count += mult * tc;
4908
4909 if (const_from_elts_p && const_p)
4910 const_p = initializer_constant_valid_p (value, TREE_TYPE (value))
4911 != NULL_TREE;
4912 }
4913 break;
4914 }
4915 }
4916
4917 if (!*p_must_clear
4918 && (TREE_CODE (TREE_TYPE (ctor)) == UNION_TYPE
4919 || TREE_CODE (TREE_TYPE (ctor)) == QUAL_UNION_TYPE))
4920 {
4921 tree init_sub_type;
4922 bool clear_this = true;
4923
4924 if (!VEC_empty (constructor_elt, CONSTRUCTOR_ELTS (ctor)))
4925 {
4926 /* We don't expect more than one element of the union to be
4927 initialized. Not sure what we should do otherwise... */
4928 gcc_assert (VEC_length (constructor_elt, CONSTRUCTOR_ELTS (ctor))
4929 == 1);
4930
4931 init_sub_type = TREE_TYPE (VEC_index (constructor_elt,
4932 CONSTRUCTOR_ELTS (ctor),
4933 0)->value);
4934
4935 /* ??? We could look at each element of the union, and find the
4936 largest element. Which would avoid comparing the size of the
4937 initialized element against any tail padding in the union.
4938 Doesn't seem worth the effort... */
4939 if (simple_cst_equal (TYPE_SIZE (TREE_TYPE (ctor)),
4940 TYPE_SIZE (init_sub_type)) == 1)
4941 {
4942 /* And now we have to find out if the element itself is fully
4943 constructed. E.g. for union { struct { int a, b; } s; } u
4944 = { .s = { .a = 1 } }. */
4945 if (elt_count == count_type_elements (init_sub_type, false))
4946 clear_this = false;
4947 }
4948 }
4949
4950 *p_must_clear = clear_this;
4951 }
4952
4953 *p_nz_elts += nz_elts;
4954 *p_elt_count += elt_count;
4955
4956 return const_p;
4957 }
4958
4959 /* Examine CTOR to discover:
4960 * how many scalar fields are set to nonzero values,
4961 and place it in *P_NZ_ELTS;
4962 * how many scalar fields in total are in CTOR,
4963 and place it in *P_ELT_COUNT.
4964 * if a type is a union, and the initializer from the constructor
4965 is not the largest element in the union, then set *p_must_clear.
4966
4967 Return whether or not CTOR is a valid static constant initializer, the same
4968 as "initializer_constant_valid_p (CTOR, TREE_TYPE (CTOR)) != 0". */
4969
4970 bool
4971 categorize_ctor_elements (const_tree ctor, HOST_WIDE_INT *p_nz_elts,
4972 HOST_WIDE_INT *p_elt_count,
4973 bool *p_must_clear)
4974 {
4975 *p_nz_elts = 0;
4976 *p_elt_count = 0;
4977 *p_must_clear = false;
4978
4979 return
4980 categorize_ctor_elements_1 (ctor, p_nz_elts, p_elt_count, p_must_clear);
4981 }
4982
4983 /* Count the number of scalars in TYPE. Return -1 on overflow or
4984 variable-sized. If ALLOW_FLEXARR is true, don't count flexible
4985 array member at the end of the structure. */
4986
4987 HOST_WIDE_INT
4988 count_type_elements (const_tree type, bool allow_flexarr)
4989 {
4990 const HOST_WIDE_INT max = ~((HOST_WIDE_INT)1 << (HOST_BITS_PER_WIDE_INT-1));
4991 switch (TREE_CODE (type))
4992 {
4993 case ARRAY_TYPE:
4994 {
4995 tree telts = array_type_nelts (type);
4996 if (telts && host_integerp (telts, 1))
4997 {
4998 HOST_WIDE_INT n = tree_low_cst (telts, 1) + 1;
4999 HOST_WIDE_INT m = count_type_elements (TREE_TYPE (type), false);
5000 if (n == 0)
5001 return 0;
5002 else if (max / n > m)
5003 return n * m;
5004 }
5005 return -1;
5006 }
5007
5008 case RECORD_TYPE:
5009 {
5010 HOST_WIDE_INT n = 0, t;
5011 tree f;
5012
5013 for (f = TYPE_FIELDS (type); f ; f = DECL_CHAIN (f))
5014 if (TREE_CODE (f) == FIELD_DECL)
5015 {
5016 t = count_type_elements (TREE_TYPE (f), false);
5017 if (t < 0)
5018 {
5019 /* Check for structures with flexible array member. */
5020 tree tf = TREE_TYPE (f);
5021 if (allow_flexarr
5022 && DECL_CHAIN (f) == NULL
5023 && TREE_CODE (tf) == ARRAY_TYPE
5024 && TYPE_DOMAIN (tf)
5025 && TYPE_MIN_VALUE (TYPE_DOMAIN (tf))
5026 && integer_zerop (TYPE_MIN_VALUE (TYPE_DOMAIN (tf)))
5027 && !TYPE_MAX_VALUE (TYPE_DOMAIN (tf))
5028 && int_size_in_bytes (type) >= 0)
5029 break;
5030
5031 return -1;
5032 }
5033 n += t;
5034 }
5035
5036 return n;
5037 }
5038
5039 case UNION_TYPE:
5040 case QUAL_UNION_TYPE:
5041 return -1;
5042
5043 case COMPLEX_TYPE:
5044 return 2;
5045
5046 case VECTOR_TYPE:
5047 return TYPE_VECTOR_SUBPARTS (type);
5048
5049 case INTEGER_TYPE:
5050 case REAL_TYPE:
5051 case FIXED_POINT_TYPE:
5052 case ENUMERAL_TYPE:
5053 case BOOLEAN_TYPE:
5054 case POINTER_TYPE:
5055 case OFFSET_TYPE:
5056 case REFERENCE_TYPE:
5057 return 1;
5058
5059 case ERROR_MARK:
5060 return 0;
5061
5062 case VOID_TYPE:
5063 case METHOD_TYPE:
5064 case FUNCTION_TYPE:
5065 case LANG_TYPE:
5066 default:
5067 gcc_unreachable ();
5068 }
5069 }
5070
5071 /* Return 1 if EXP contains mostly (3/4) zeros. */
5072
5073 static int
5074 mostly_zeros_p (const_tree exp)
5075 {
5076 if (TREE_CODE (exp) == CONSTRUCTOR)
5077
5078 {
5079 HOST_WIDE_INT nz_elts, count, elts;
5080 bool must_clear;
5081
5082 categorize_ctor_elements (exp, &nz_elts, &count, &must_clear);
5083 if (must_clear)
5084 return 1;
5085
5086 elts = count_type_elements (TREE_TYPE (exp), false);
5087
5088 return nz_elts < elts / 4;
5089 }
5090
5091 return initializer_zerop (exp);
5092 }
5093
5094 /* Return 1 if EXP contains all zeros. */
5095
5096 static int
5097 all_zeros_p (const_tree exp)
5098 {
5099 if (TREE_CODE (exp) == CONSTRUCTOR)
5100
5101 {
5102 HOST_WIDE_INT nz_elts, count;
5103 bool must_clear;
5104
5105 categorize_ctor_elements (exp, &nz_elts, &count, &must_clear);
5106 return nz_elts == 0;
5107 }
5108
5109 return initializer_zerop (exp);
5110 }
5111 \f
5112 /* Helper function for store_constructor.
5113 TARGET, BITSIZE, BITPOS, MODE, EXP are as for store_field.
5114 TYPE is the type of the CONSTRUCTOR, not the element type.
5115 CLEARED is as for store_constructor.
5116 ALIAS_SET is the alias set to use for any stores.
5117
5118 This provides a recursive shortcut back to store_constructor when it isn't
5119 necessary to go through store_field. This is so that we can pass through
5120 the cleared field to let store_constructor know that we may not have to
5121 clear a substructure if the outer structure has already been cleared. */
5122
5123 static void
5124 store_constructor_field (rtx target, unsigned HOST_WIDE_INT bitsize,
5125 HOST_WIDE_INT bitpos, enum machine_mode mode,
5126 tree exp, tree type, int cleared,
5127 alias_set_type alias_set)
5128 {
5129 if (TREE_CODE (exp) == CONSTRUCTOR
5130 /* We can only call store_constructor recursively if the size and
5131 bit position are on a byte boundary. */
5132 && bitpos % BITS_PER_UNIT == 0
5133 && (bitsize > 0 && bitsize % BITS_PER_UNIT == 0)
5134 /* If we have a nonzero bitpos for a register target, then we just
5135 let store_field do the bitfield handling. This is unlikely to
5136 generate unnecessary clear instructions anyways. */
5137 && (bitpos == 0 || MEM_P (target)))
5138 {
5139 if (MEM_P (target))
5140 target
5141 = adjust_address (target,
5142 GET_MODE (target) == BLKmode
5143 || 0 != (bitpos
5144 % GET_MODE_ALIGNMENT (GET_MODE (target)))
5145 ? BLKmode : VOIDmode, bitpos / BITS_PER_UNIT);
5146
5147
5148 /* Update the alias set, if required. */
5149 if (MEM_P (target) && ! MEM_KEEP_ALIAS_SET_P (target)
5150 && MEM_ALIAS_SET (target) != 0)
5151 {
5152 target = copy_rtx (target);
5153 set_mem_alias_set (target, alias_set);
5154 }
5155
5156 store_constructor (exp, target, cleared, bitsize / BITS_PER_UNIT);
5157 }
5158 else
5159 store_field (target, bitsize, bitpos, mode, exp, type, alias_set, false);
5160 }
5161
5162 /* Store the value of constructor EXP into the rtx TARGET.
5163 TARGET is either a REG or a MEM; we know it cannot conflict, since
5164 safe_from_p has been called.
5165 CLEARED is true if TARGET is known to have been zero'd.
5166 SIZE is the number of bytes of TARGET we are allowed to modify: this
5167 may not be the same as the size of EXP if we are assigning to a field
5168 which has been packed to exclude padding bits. */
5169
5170 static void
5171 store_constructor (tree exp, rtx target, int cleared, HOST_WIDE_INT size)
5172 {
5173 tree type = TREE_TYPE (exp);
5174 #ifdef WORD_REGISTER_OPERATIONS
5175 HOST_WIDE_INT exp_size = int_size_in_bytes (type);
5176 #endif
5177
5178 switch (TREE_CODE (type))
5179 {
5180 case RECORD_TYPE:
5181 case UNION_TYPE:
5182 case QUAL_UNION_TYPE:
5183 {
5184 unsigned HOST_WIDE_INT idx;
5185 tree field, value;
5186
5187 /* If size is zero or the target is already cleared, do nothing. */
5188 if (size == 0 || cleared)
5189 cleared = 1;
5190 /* We either clear the aggregate or indicate the value is dead. */
5191 else if ((TREE_CODE (type) == UNION_TYPE
5192 || TREE_CODE (type) == QUAL_UNION_TYPE)
5193 && ! CONSTRUCTOR_ELTS (exp))
5194 /* If the constructor is empty, clear the union. */
5195 {
5196 clear_storage (target, expr_size (exp), BLOCK_OP_NORMAL);
5197 cleared = 1;
5198 }
5199
5200 /* If we are building a static constructor into a register,
5201 set the initial value as zero so we can fold the value into
5202 a constant. But if more than one register is involved,
5203 this probably loses. */
5204 else if (REG_P (target) && TREE_STATIC (exp)
5205 && GET_MODE_SIZE (GET_MODE (target)) <= UNITS_PER_WORD)
5206 {
5207 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
5208 cleared = 1;
5209 }
5210
5211 /* If the constructor has fewer fields than the structure or
5212 if we are initializing the structure to mostly zeros, clear
5213 the whole structure first. Don't do this if TARGET is a
5214 register whose mode size isn't equal to SIZE since
5215 clear_storage can't handle this case. */
5216 else if (size > 0
5217 && (((int)VEC_length (constructor_elt, CONSTRUCTOR_ELTS (exp))
5218 != fields_length (type))
5219 || mostly_zeros_p (exp))
5220 && (!REG_P (target)
5221 || ((HOST_WIDE_INT) GET_MODE_SIZE (GET_MODE (target))
5222 == size)))
5223 {
5224 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
5225 cleared = 1;
5226 }
5227
5228 if (REG_P (target) && !cleared)
5229 emit_clobber (target);
5230
5231 /* Store each element of the constructor into the
5232 corresponding field of TARGET. */
5233 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), idx, field, value)
5234 {
5235 enum machine_mode mode;
5236 HOST_WIDE_INT bitsize;
5237 HOST_WIDE_INT bitpos = 0;
5238 tree offset;
5239 rtx to_rtx = target;
5240
5241 /* Just ignore missing fields. We cleared the whole
5242 structure, above, if any fields are missing. */
5243 if (field == 0)
5244 continue;
5245
5246 if (cleared && initializer_zerop (value))
5247 continue;
5248
5249 if (host_integerp (DECL_SIZE (field), 1))
5250 bitsize = tree_low_cst (DECL_SIZE (field), 1);
5251 else
5252 bitsize = -1;
5253
5254 mode = DECL_MODE (field);
5255 if (DECL_BIT_FIELD (field))
5256 mode = VOIDmode;
5257
5258 offset = DECL_FIELD_OFFSET (field);
5259 if (host_integerp (offset, 0)
5260 && host_integerp (bit_position (field), 0))
5261 {
5262 bitpos = int_bit_position (field);
5263 offset = 0;
5264 }
5265 else
5266 bitpos = tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 0);
5267
5268 if (offset)
5269 {
5270 enum machine_mode address_mode;
5271 rtx offset_rtx;
5272
5273 offset
5274 = SUBSTITUTE_PLACEHOLDER_IN_EXPR (offset,
5275 make_tree (TREE_TYPE (exp),
5276 target));
5277
5278 offset_rtx = expand_normal (offset);
5279 gcc_assert (MEM_P (to_rtx));
5280
5281 address_mode
5282 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (to_rtx));
5283 if (GET_MODE (offset_rtx) != address_mode)
5284 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
5285
5286 to_rtx = offset_address (to_rtx, offset_rtx,
5287 highest_pow2_factor (offset));
5288 }
5289
5290 #ifdef WORD_REGISTER_OPERATIONS
5291 /* If this initializes a field that is smaller than a
5292 word, at the start of a word, try to widen it to a full
5293 word. This special case allows us to output C++ member
5294 function initializations in a form that the optimizers
5295 can understand. */
5296 if (REG_P (target)
5297 && bitsize < BITS_PER_WORD
5298 && bitpos % BITS_PER_WORD == 0
5299 && GET_MODE_CLASS (mode) == MODE_INT
5300 && TREE_CODE (value) == INTEGER_CST
5301 && exp_size >= 0
5302 && bitpos + BITS_PER_WORD <= exp_size * BITS_PER_UNIT)
5303 {
5304 tree type = TREE_TYPE (value);
5305
5306 if (TYPE_PRECISION (type) < BITS_PER_WORD)
5307 {
5308 type = lang_hooks.types.type_for_size
5309 (BITS_PER_WORD, TYPE_UNSIGNED (type));
5310 value = fold_convert (type, value);
5311 }
5312
5313 if (BYTES_BIG_ENDIAN)
5314 value
5315 = fold_build2 (LSHIFT_EXPR, type, value,
5316 build_int_cst (type,
5317 BITS_PER_WORD - bitsize));
5318 bitsize = BITS_PER_WORD;
5319 mode = word_mode;
5320 }
5321 #endif
5322
5323 if (MEM_P (to_rtx) && !MEM_KEEP_ALIAS_SET_P (to_rtx)
5324 && DECL_NONADDRESSABLE_P (field))
5325 {
5326 to_rtx = copy_rtx (to_rtx);
5327 MEM_KEEP_ALIAS_SET_P (to_rtx) = 1;
5328 }
5329
5330 store_constructor_field (to_rtx, bitsize, bitpos, mode,
5331 value, type, cleared,
5332 get_alias_set (TREE_TYPE (field)));
5333 }
5334 break;
5335 }
5336 case ARRAY_TYPE:
5337 {
5338 tree value, index;
5339 unsigned HOST_WIDE_INT i;
5340 int need_to_clear;
5341 tree domain;
5342 tree elttype = TREE_TYPE (type);
5343 int const_bounds_p;
5344 HOST_WIDE_INT minelt = 0;
5345 HOST_WIDE_INT maxelt = 0;
5346
5347 domain = TYPE_DOMAIN (type);
5348 const_bounds_p = (TYPE_MIN_VALUE (domain)
5349 && TYPE_MAX_VALUE (domain)
5350 && host_integerp (TYPE_MIN_VALUE (domain), 0)
5351 && host_integerp (TYPE_MAX_VALUE (domain), 0));
5352
5353 /* If we have constant bounds for the range of the type, get them. */
5354 if (const_bounds_p)
5355 {
5356 minelt = tree_low_cst (TYPE_MIN_VALUE (domain), 0);
5357 maxelt = tree_low_cst (TYPE_MAX_VALUE (domain), 0);
5358 }
5359
5360 /* If the constructor has fewer elements than the array, clear
5361 the whole array first. Similarly if this is static
5362 constructor of a non-BLKmode object. */
5363 if (cleared)
5364 need_to_clear = 0;
5365 else if (REG_P (target) && TREE_STATIC (exp))
5366 need_to_clear = 1;
5367 else
5368 {
5369 unsigned HOST_WIDE_INT idx;
5370 tree index, value;
5371 HOST_WIDE_INT count = 0, zero_count = 0;
5372 need_to_clear = ! const_bounds_p;
5373
5374 /* This loop is a more accurate version of the loop in
5375 mostly_zeros_p (it handles RANGE_EXPR in an index). It
5376 is also needed to check for missing elements. */
5377 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), idx, index, value)
5378 {
5379 HOST_WIDE_INT this_node_count;
5380
5381 if (need_to_clear)
5382 break;
5383
5384 if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR)
5385 {
5386 tree lo_index = TREE_OPERAND (index, 0);
5387 tree hi_index = TREE_OPERAND (index, 1);
5388
5389 if (! host_integerp (lo_index, 1)
5390 || ! host_integerp (hi_index, 1))
5391 {
5392 need_to_clear = 1;
5393 break;
5394 }
5395
5396 this_node_count = (tree_low_cst (hi_index, 1)
5397 - tree_low_cst (lo_index, 1) + 1);
5398 }
5399 else
5400 this_node_count = 1;
5401
5402 count += this_node_count;
5403 if (mostly_zeros_p (value))
5404 zero_count += this_node_count;
5405 }
5406
5407 /* Clear the entire array first if there are any missing
5408 elements, or if the incidence of zero elements is >=
5409 75%. */
5410 if (! need_to_clear
5411 && (count < maxelt - minelt + 1
5412 || 4 * zero_count >= 3 * count))
5413 need_to_clear = 1;
5414 }
5415
5416 if (need_to_clear && size > 0)
5417 {
5418 if (REG_P (target))
5419 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
5420 else
5421 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
5422 cleared = 1;
5423 }
5424
5425 if (!cleared && REG_P (target))
5426 /* Inform later passes that the old value is dead. */
5427 emit_clobber (target);
5428
5429 /* Store each element of the constructor into the
5430 corresponding element of TARGET, determined by counting the
5431 elements. */
5432 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), i, index, value)
5433 {
5434 enum machine_mode mode;
5435 HOST_WIDE_INT bitsize;
5436 HOST_WIDE_INT bitpos;
5437 rtx xtarget = target;
5438
5439 if (cleared && initializer_zerop (value))
5440 continue;
5441
5442 mode = TYPE_MODE (elttype);
5443 if (mode == BLKmode)
5444 bitsize = (host_integerp (TYPE_SIZE (elttype), 1)
5445 ? tree_low_cst (TYPE_SIZE (elttype), 1)
5446 : -1);
5447 else
5448 bitsize = GET_MODE_BITSIZE (mode);
5449
5450 if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR)
5451 {
5452 tree lo_index = TREE_OPERAND (index, 0);
5453 tree hi_index = TREE_OPERAND (index, 1);
5454 rtx index_r, pos_rtx;
5455 HOST_WIDE_INT lo, hi, count;
5456 tree position;
5457
5458 /* If the range is constant and "small", unroll the loop. */
5459 if (const_bounds_p
5460 && host_integerp (lo_index, 0)
5461 && host_integerp (hi_index, 0)
5462 && (lo = tree_low_cst (lo_index, 0),
5463 hi = tree_low_cst (hi_index, 0),
5464 count = hi - lo + 1,
5465 (!MEM_P (target)
5466 || count <= 2
5467 || (host_integerp (TYPE_SIZE (elttype), 1)
5468 && (tree_low_cst (TYPE_SIZE (elttype), 1) * count
5469 <= 40 * 8)))))
5470 {
5471 lo -= minelt; hi -= minelt;
5472 for (; lo <= hi; lo++)
5473 {
5474 bitpos = lo * tree_low_cst (TYPE_SIZE (elttype), 0);
5475
5476 if (MEM_P (target)
5477 && !MEM_KEEP_ALIAS_SET_P (target)
5478 && TREE_CODE (type) == ARRAY_TYPE
5479 && TYPE_NONALIASED_COMPONENT (type))
5480 {
5481 target = copy_rtx (target);
5482 MEM_KEEP_ALIAS_SET_P (target) = 1;
5483 }
5484
5485 store_constructor_field
5486 (target, bitsize, bitpos, mode, value, type, cleared,
5487 get_alias_set (elttype));
5488 }
5489 }
5490 else
5491 {
5492 rtx loop_start = gen_label_rtx ();
5493 rtx loop_end = gen_label_rtx ();
5494 tree exit_cond;
5495
5496 expand_normal (hi_index);
5497
5498 index = build_decl (EXPR_LOCATION (exp),
5499 VAR_DECL, NULL_TREE, domain);
5500 index_r = gen_reg_rtx (promote_decl_mode (index, NULL));
5501 SET_DECL_RTL (index, index_r);
5502 store_expr (lo_index, index_r, 0, false);
5503
5504 /* Build the head of the loop. */
5505 do_pending_stack_adjust ();
5506 emit_label (loop_start);
5507
5508 /* Assign value to element index. */
5509 position =
5510 fold_convert (ssizetype,
5511 fold_build2 (MINUS_EXPR,
5512 TREE_TYPE (index),
5513 index,
5514 TYPE_MIN_VALUE (domain)));
5515
5516 position =
5517 size_binop (MULT_EXPR, position,
5518 fold_convert (ssizetype,
5519 TYPE_SIZE_UNIT (elttype)));
5520
5521 pos_rtx = expand_normal (position);
5522 xtarget = offset_address (target, pos_rtx,
5523 highest_pow2_factor (position));
5524 xtarget = adjust_address (xtarget, mode, 0);
5525 if (TREE_CODE (value) == CONSTRUCTOR)
5526 store_constructor (value, xtarget, cleared,
5527 bitsize / BITS_PER_UNIT);
5528 else
5529 store_expr (value, xtarget, 0, false);
5530
5531 /* Generate a conditional jump to exit the loop. */
5532 exit_cond = build2 (LT_EXPR, integer_type_node,
5533 index, hi_index);
5534 jumpif (exit_cond, loop_end, -1);
5535
5536 /* Update the loop counter, and jump to the head of
5537 the loop. */
5538 expand_assignment (index,
5539 build2 (PLUS_EXPR, TREE_TYPE (index),
5540 index, integer_one_node),
5541 false);
5542
5543 emit_jump (loop_start);
5544
5545 /* Build the end of the loop. */
5546 emit_label (loop_end);
5547 }
5548 }
5549 else if ((index != 0 && ! host_integerp (index, 0))
5550 || ! host_integerp (TYPE_SIZE (elttype), 1))
5551 {
5552 tree position;
5553
5554 if (index == 0)
5555 index = ssize_int (1);
5556
5557 if (minelt)
5558 index = fold_convert (ssizetype,
5559 fold_build2 (MINUS_EXPR,
5560 TREE_TYPE (index),
5561 index,
5562 TYPE_MIN_VALUE (domain)));
5563
5564 position =
5565 size_binop (MULT_EXPR, index,
5566 fold_convert (ssizetype,
5567 TYPE_SIZE_UNIT (elttype)));
5568 xtarget = offset_address (target,
5569 expand_normal (position),
5570 highest_pow2_factor (position));
5571 xtarget = adjust_address (xtarget, mode, 0);
5572 store_expr (value, xtarget, 0, false);
5573 }
5574 else
5575 {
5576 if (index != 0)
5577 bitpos = ((tree_low_cst (index, 0) - minelt)
5578 * tree_low_cst (TYPE_SIZE (elttype), 1));
5579 else
5580 bitpos = (i * tree_low_cst (TYPE_SIZE (elttype), 1));
5581
5582 if (MEM_P (target) && !MEM_KEEP_ALIAS_SET_P (target)
5583 && TREE_CODE (type) == ARRAY_TYPE
5584 && TYPE_NONALIASED_COMPONENT (type))
5585 {
5586 target = copy_rtx (target);
5587 MEM_KEEP_ALIAS_SET_P (target) = 1;
5588 }
5589 store_constructor_field (target, bitsize, bitpos, mode, value,
5590 type, cleared, get_alias_set (elttype));
5591 }
5592 }
5593 break;
5594 }
5595
5596 case VECTOR_TYPE:
5597 {
5598 unsigned HOST_WIDE_INT idx;
5599 constructor_elt *ce;
5600 int i;
5601 int need_to_clear;
5602 int icode = 0;
5603 tree elttype = TREE_TYPE (type);
5604 int elt_size = tree_low_cst (TYPE_SIZE (elttype), 1);
5605 enum machine_mode eltmode = TYPE_MODE (elttype);
5606 HOST_WIDE_INT bitsize;
5607 HOST_WIDE_INT bitpos;
5608 rtvec vector = NULL;
5609 unsigned n_elts;
5610 alias_set_type alias;
5611
5612 gcc_assert (eltmode != BLKmode);
5613
5614 n_elts = TYPE_VECTOR_SUBPARTS (type);
5615 if (REG_P (target) && VECTOR_MODE_P (GET_MODE (target)))
5616 {
5617 enum machine_mode mode = GET_MODE (target);
5618
5619 icode = (int) optab_handler (vec_init_optab, mode);
5620 if (icode != CODE_FOR_nothing)
5621 {
5622 unsigned int i;
5623
5624 vector = rtvec_alloc (n_elts);
5625 for (i = 0; i < n_elts; i++)
5626 RTVEC_ELT (vector, i) = CONST0_RTX (GET_MODE_INNER (mode));
5627 }
5628 }
5629
5630 /* If the constructor has fewer elements than the vector,
5631 clear the whole array first. Similarly if this is static
5632 constructor of a non-BLKmode object. */
5633 if (cleared)
5634 need_to_clear = 0;
5635 else if (REG_P (target) && TREE_STATIC (exp))
5636 need_to_clear = 1;
5637 else
5638 {
5639 unsigned HOST_WIDE_INT count = 0, zero_count = 0;
5640 tree value;
5641
5642 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value)
5643 {
5644 int n_elts_here = tree_low_cst
5645 (int_const_binop (TRUNC_DIV_EXPR,
5646 TYPE_SIZE (TREE_TYPE (value)),
5647 TYPE_SIZE (elttype), 0), 1);
5648
5649 count += n_elts_here;
5650 if (mostly_zeros_p (value))
5651 zero_count += n_elts_here;
5652 }
5653
5654 /* Clear the entire vector first if there are any missing elements,
5655 or if the incidence of zero elements is >= 75%. */
5656 need_to_clear = (count < n_elts || 4 * zero_count >= 3 * count);
5657 }
5658
5659 if (need_to_clear && size > 0 && !vector)
5660 {
5661 if (REG_P (target))
5662 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
5663 else
5664 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
5665 cleared = 1;
5666 }
5667
5668 /* Inform later passes that the old value is dead. */
5669 if (!cleared && !vector && REG_P (target))
5670 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
5671
5672 if (MEM_P (target))
5673 alias = MEM_ALIAS_SET (target);
5674 else
5675 alias = get_alias_set (elttype);
5676
5677 /* Store each element of the constructor into the corresponding
5678 element of TARGET, determined by counting the elements. */
5679 for (idx = 0, i = 0;
5680 VEC_iterate (constructor_elt, CONSTRUCTOR_ELTS (exp), idx, ce);
5681 idx++, i += bitsize / elt_size)
5682 {
5683 HOST_WIDE_INT eltpos;
5684 tree value = ce->value;
5685
5686 bitsize = tree_low_cst (TYPE_SIZE (TREE_TYPE (value)), 1);
5687 if (cleared && initializer_zerop (value))
5688 continue;
5689
5690 if (ce->index)
5691 eltpos = tree_low_cst (ce->index, 1);
5692 else
5693 eltpos = i;
5694
5695 if (vector)
5696 {
5697 /* Vector CONSTRUCTORs should only be built from smaller
5698 vectors in the case of BLKmode vectors. */
5699 gcc_assert (TREE_CODE (TREE_TYPE (value)) != VECTOR_TYPE);
5700 RTVEC_ELT (vector, eltpos)
5701 = expand_normal (value);
5702 }
5703 else
5704 {
5705 enum machine_mode value_mode =
5706 TREE_CODE (TREE_TYPE (value)) == VECTOR_TYPE
5707 ? TYPE_MODE (TREE_TYPE (value))
5708 : eltmode;
5709 bitpos = eltpos * elt_size;
5710 store_constructor_field (target, bitsize, bitpos,
5711 value_mode, value, type,
5712 cleared, alias);
5713 }
5714 }
5715
5716 if (vector)
5717 emit_insn (GEN_FCN (icode)
5718 (target,
5719 gen_rtx_PARALLEL (GET_MODE (target), vector)));
5720 break;
5721 }
5722
5723 default:
5724 gcc_unreachable ();
5725 }
5726 }
5727
5728 /* Store the value of EXP (an expression tree)
5729 into a subfield of TARGET which has mode MODE and occupies
5730 BITSIZE bits, starting BITPOS bits from the start of TARGET.
5731 If MODE is VOIDmode, it means that we are storing into a bit-field.
5732
5733 Always return const0_rtx unless we have something particular to
5734 return.
5735
5736 TYPE is the type of the underlying object,
5737
5738 ALIAS_SET is the alias set for the destination. This value will
5739 (in general) be different from that for TARGET, since TARGET is a
5740 reference to the containing structure.
5741
5742 If NONTEMPORAL is true, try generating a nontemporal store. */
5743
5744 static rtx
5745 store_field (rtx target, HOST_WIDE_INT bitsize, HOST_WIDE_INT bitpos,
5746 enum machine_mode mode, tree exp, tree type,
5747 alias_set_type alias_set, bool nontemporal)
5748 {
5749 if (TREE_CODE (exp) == ERROR_MARK)
5750 return const0_rtx;
5751
5752 /* If we have nothing to store, do nothing unless the expression has
5753 side-effects. */
5754 if (bitsize == 0)
5755 return expand_expr (exp, const0_rtx, VOIDmode, EXPAND_NORMAL);
5756
5757 /* If we are storing into an unaligned field of an aligned union that is
5758 in a register, we may have the mode of TARGET being an integer mode but
5759 MODE == BLKmode. In that case, get an aligned object whose size and
5760 alignment are the same as TARGET and store TARGET into it (we can avoid
5761 the store if the field being stored is the entire width of TARGET). Then
5762 call ourselves recursively to store the field into a BLKmode version of
5763 that object. Finally, load from the object into TARGET. This is not
5764 very efficient in general, but should only be slightly more expensive
5765 than the otherwise-required unaligned accesses. Perhaps this can be
5766 cleaned up later. It's tempting to make OBJECT readonly, but it's set
5767 twice, once with emit_move_insn and once via store_field. */
5768
5769 if (mode == BLKmode
5770 && (REG_P (target) || GET_CODE (target) == SUBREG))
5771 {
5772 rtx object = assign_temp (type, 0, 1, 1);
5773 rtx blk_object = adjust_address (object, BLKmode, 0);
5774
5775 if (bitsize != (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (target)))
5776 emit_move_insn (object, target);
5777
5778 store_field (blk_object, bitsize, bitpos, mode, exp, type, alias_set,
5779 nontemporal);
5780
5781 emit_move_insn (target, object);
5782
5783 /* We want to return the BLKmode version of the data. */
5784 return blk_object;
5785 }
5786
5787 if (GET_CODE (target) == CONCAT)
5788 {
5789 /* We're storing into a struct containing a single __complex. */
5790
5791 gcc_assert (!bitpos);
5792 return store_expr (exp, target, 0, nontemporal);
5793 }
5794
5795 /* If the structure is in a register or if the component
5796 is a bit field, we cannot use addressing to access it.
5797 Use bit-field techniques or SUBREG to store in it. */
5798
5799 if (mode == VOIDmode
5800 || (mode != BLKmode && ! direct_store[(int) mode]
5801 && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
5802 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT)
5803 || REG_P (target)
5804 || GET_CODE (target) == SUBREG
5805 /* If the field isn't aligned enough to store as an ordinary memref,
5806 store it as a bit field. */
5807 || (mode != BLKmode
5808 && ((((MEM_ALIGN (target) < GET_MODE_ALIGNMENT (mode))
5809 || bitpos % GET_MODE_ALIGNMENT (mode))
5810 && SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (target)))
5811 || (bitpos % BITS_PER_UNIT != 0)))
5812 /* If the RHS and field are a constant size and the size of the
5813 RHS isn't the same size as the bitfield, we must use bitfield
5814 operations. */
5815 || (bitsize >= 0
5816 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
5817 && compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)), bitsize) != 0)
5818 /* If we are expanding a MEM_REF of a non-BLKmode non-addressable
5819 decl we must use bitfield operations. */
5820 || (bitsize >= 0
5821 && TREE_CODE (exp) == MEM_REF
5822 && TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR
5823 && DECL_P (TREE_OPERAND (TREE_OPERAND (exp, 0), 0))
5824 && !TREE_ADDRESSABLE (TREE_OPERAND (TREE_OPERAND (exp, 0),0 ))
5825 && DECL_MODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0)) != BLKmode))
5826 {
5827 rtx temp;
5828 gimple nop_def;
5829
5830 /* If EXP is a NOP_EXPR of precision less than its mode, then that
5831 implies a mask operation. If the precision is the same size as
5832 the field we're storing into, that mask is redundant. This is
5833 particularly common with bit field assignments generated by the
5834 C front end. */
5835 nop_def = get_def_for_expr (exp, NOP_EXPR);
5836 if (nop_def)
5837 {
5838 tree type = TREE_TYPE (exp);
5839 if (INTEGRAL_TYPE_P (type)
5840 && TYPE_PRECISION (type) < GET_MODE_BITSIZE (TYPE_MODE (type))
5841 && bitsize == TYPE_PRECISION (type))
5842 {
5843 tree op = gimple_assign_rhs1 (nop_def);
5844 type = TREE_TYPE (op);
5845 if (INTEGRAL_TYPE_P (type) && TYPE_PRECISION (type) >= bitsize)
5846 exp = op;
5847 }
5848 }
5849
5850 temp = expand_normal (exp);
5851
5852 /* If BITSIZE is narrower than the size of the type of EXP
5853 we will be narrowing TEMP. Normally, what's wanted are the
5854 low-order bits. However, if EXP's type is a record and this is
5855 big-endian machine, we want the upper BITSIZE bits. */
5856 if (BYTES_BIG_ENDIAN && GET_MODE_CLASS (GET_MODE (temp)) == MODE_INT
5857 && bitsize < (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (temp))
5858 && TREE_CODE (TREE_TYPE (exp)) == RECORD_TYPE)
5859 temp = expand_shift (RSHIFT_EXPR, GET_MODE (temp), temp,
5860 size_int (GET_MODE_BITSIZE (GET_MODE (temp))
5861 - bitsize),
5862 NULL_RTX, 1);
5863
5864 /* Unless MODE is VOIDmode or BLKmode, convert TEMP to
5865 MODE. */
5866 if (mode != VOIDmode && mode != BLKmode
5867 && mode != TYPE_MODE (TREE_TYPE (exp)))
5868 temp = convert_modes (mode, TYPE_MODE (TREE_TYPE (exp)), temp, 1);
5869
5870 /* If the modes of TEMP and TARGET are both BLKmode, both
5871 must be in memory and BITPOS must be aligned on a byte
5872 boundary. If so, we simply do a block copy. Likewise
5873 for a BLKmode-like TARGET. */
5874 if (GET_MODE (temp) == BLKmode
5875 && (GET_MODE (target) == BLKmode
5876 || (MEM_P (target)
5877 && GET_MODE_CLASS (GET_MODE (target)) == MODE_INT
5878 && (bitpos % BITS_PER_UNIT) == 0
5879 && (bitsize % BITS_PER_UNIT) == 0)))
5880 {
5881 gcc_assert (MEM_P (target) && MEM_P (temp)
5882 && (bitpos % BITS_PER_UNIT) == 0);
5883
5884 target = adjust_address (target, VOIDmode, bitpos / BITS_PER_UNIT);
5885 emit_block_move (target, temp,
5886 GEN_INT ((bitsize + BITS_PER_UNIT - 1)
5887 / BITS_PER_UNIT),
5888 BLOCK_OP_NORMAL);
5889
5890 return const0_rtx;
5891 }
5892
5893 /* Store the value in the bitfield. */
5894 store_bit_field (target, bitsize, bitpos, mode, temp);
5895
5896 return const0_rtx;
5897 }
5898 else
5899 {
5900 /* Now build a reference to just the desired component. */
5901 rtx to_rtx = adjust_address (target, mode, bitpos / BITS_PER_UNIT);
5902
5903 if (to_rtx == target)
5904 to_rtx = copy_rtx (to_rtx);
5905
5906 if (!MEM_SCALAR_P (to_rtx))
5907 MEM_IN_STRUCT_P (to_rtx) = 1;
5908 if (!MEM_KEEP_ALIAS_SET_P (to_rtx) && MEM_ALIAS_SET (to_rtx) != 0)
5909 set_mem_alias_set (to_rtx, alias_set);
5910
5911 return store_expr (exp, to_rtx, 0, nontemporal);
5912 }
5913 }
5914 \f
5915 /* Given an expression EXP that may be a COMPONENT_REF, a BIT_FIELD_REF,
5916 an ARRAY_REF, or an ARRAY_RANGE_REF, look for nested operations of these
5917 codes and find the ultimate containing object, which we return.
5918
5919 We set *PBITSIZE to the size in bits that we want, *PBITPOS to the
5920 bit position, and *PUNSIGNEDP to the signedness of the field.
5921 If the position of the field is variable, we store a tree
5922 giving the variable offset (in units) in *POFFSET.
5923 This offset is in addition to the bit position.
5924 If the position is not variable, we store 0 in *POFFSET.
5925
5926 If any of the extraction expressions is volatile,
5927 we store 1 in *PVOLATILEP. Otherwise we don't change that.
5928
5929 If the field is a non-BLKmode bit-field, *PMODE is set to VOIDmode.
5930 Otherwise, it is a mode that can be used to access the field.
5931
5932 If the field describes a variable-sized object, *PMODE is set to
5933 BLKmode and *PBITSIZE is set to -1. An access cannot be made in
5934 this case, but the address of the object can be found.
5935
5936 If KEEP_ALIGNING is true and the target is STRICT_ALIGNMENT, we don't
5937 look through nodes that serve as markers of a greater alignment than
5938 the one that can be deduced from the expression. These nodes make it
5939 possible for front-ends to prevent temporaries from being created by
5940 the middle-end on alignment considerations. For that purpose, the
5941 normal operating mode at high-level is to always pass FALSE so that
5942 the ultimate containing object is really returned; moreover, the
5943 associated predicate handled_component_p will always return TRUE
5944 on these nodes, thus indicating that they are essentially handled
5945 by get_inner_reference. TRUE should only be passed when the caller
5946 is scanning the expression in order to build another representation
5947 and specifically knows how to handle these nodes; as such, this is
5948 the normal operating mode in the RTL expanders. */
5949
5950 tree
5951 get_inner_reference (tree exp, HOST_WIDE_INT *pbitsize,
5952 HOST_WIDE_INT *pbitpos, tree *poffset,
5953 enum machine_mode *pmode, int *punsignedp,
5954 int *pvolatilep, bool keep_aligning)
5955 {
5956 tree size_tree = 0;
5957 enum machine_mode mode = VOIDmode;
5958 bool blkmode_bitfield = false;
5959 tree offset = size_zero_node;
5960 double_int bit_offset = double_int_zero;
5961
5962 /* First get the mode, signedness, and size. We do this from just the
5963 outermost expression. */
5964 *pbitsize = -1;
5965 if (TREE_CODE (exp) == COMPONENT_REF)
5966 {
5967 tree field = TREE_OPERAND (exp, 1);
5968 size_tree = DECL_SIZE (field);
5969 if (!DECL_BIT_FIELD (field))
5970 mode = DECL_MODE (field);
5971 else if (DECL_MODE (field) == BLKmode)
5972 blkmode_bitfield = true;
5973 else if (TREE_THIS_VOLATILE (exp)
5974 && flag_strict_volatile_bitfields > 0)
5975 /* Volatile bitfields should be accessed in the mode of the
5976 field's type, not the mode computed based on the bit
5977 size. */
5978 mode = TYPE_MODE (DECL_BIT_FIELD_TYPE (field));
5979
5980 *punsignedp = DECL_UNSIGNED (field);
5981 }
5982 else if (TREE_CODE (exp) == BIT_FIELD_REF)
5983 {
5984 size_tree = TREE_OPERAND (exp, 1);
5985 *punsignedp = (! INTEGRAL_TYPE_P (TREE_TYPE (exp))
5986 || TYPE_UNSIGNED (TREE_TYPE (exp)));
5987
5988 /* For vector types, with the correct size of access, use the mode of
5989 inner type. */
5990 if (TREE_CODE (TREE_TYPE (TREE_OPERAND (exp, 0))) == VECTOR_TYPE
5991 && TREE_TYPE (exp) == TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0)))
5992 && tree_int_cst_equal (size_tree, TYPE_SIZE (TREE_TYPE (exp))))
5993 mode = TYPE_MODE (TREE_TYPE (exp));
5994 }
5995 else
5996 {
5997 mode = TYPE_MODE (TREE_TYPE (exp));
5998 *punsignedp = TYPE_UNSIGNED (TREE_TYPE (exp));
5999
6000 if (mode == BLKmode)
6001 size_tree = TYPE_SIZE (TREE_TYPE (exp));
6002 else
6003 *pbitsize = GET_MODE_BITSIZE (mode);
6004 }
6005
6006 if (size_tree != 0)
6007 {
6008 if (! host_integerp (size_tree, 1))
6009 mode = BLKmode, *pbitsize = -1;
6010 else
6011 *pbitsize = tree_low_cst (size_tree, 1);
6012 }
6013
6014 /* Compute cumulative bit-offset for nested component-refs and array-refs,
6015 and find the ultimate containing object. */
6016 while (1)
6017 {
6018 switch (TREE_CODE (exp))
6019 {
6020 case BIT_FIELD_REF:
6021 bit_offset
6022 = double_int_add (bit_offset,
6023 tree_to_double_int (TREE_OPERAND (exp, 2)));
6024 break;
6025
6026 case COMPONENT_REF:
6027 {
6028 tree field = TREE_OPERAND (exp, 1);
6029 tree this_offset = component_ref_field_offset (exp);
6030
6031 /* If this field hasn't been filled in yet, don't go past it.
6032 This should only happen when folding expressions made during
6033 type construction. */
6034 if (this_offset == 0)
6035 break;
6036
6037 offset = size_binop (PLUS_EXPR, offset, this_offset);
6038 bit_offset = double_int_add (bit_offset,
6039 tree_to_double_int
6040 (DECL_FIELD_BIT_OFFSET (field)));
6041
6042 /* ??? Right now we don't do anything with DECL_OFFSET_ALIGN. */
6043 }
6044 break;
6045
6046 case ARRAY_REF:
6047 case ARRAY_RANGE_REF:
6048 {
6049 tree index = TREE_OPERAND (exp, 1);
6050 tree low_bound = array_ref_low_bound (exp);
6051 tree unit_size = array_ref_element_size (exp);
6052
6053 /* We assume all arrays have sizes that are a multiple of a byte.
6054 First subtract the lower bound, if any, in the type of the
6055 index, then convert to sizetype and multiply by the size of
6056 the array element. */
6057 if (! integer_zerop (low_bound))
6058 index = fold_build2 (MINUS_EXPR, TREE_TYPE (index),
6059 index, low_bound);
6060
6061 offset = size_binop (PLUS_EXPR, offset,
6062 size_binop (MULT_EXPR,
6063 fold_convert (sizetype, index),
6064 unit_size));
6065 }
6066 break;
6067
6068 case REALPART_EXPR:
6069 break;
6070
6071 case IMAGPART_EXPR:
6072 bit_offset = double_int_add (bit_offset,
6073 uhwi_to_double_int (*pbitsize));
6074 break;
6075
6076 case VIEW_CONVERT_EXPR:
6077 if (keep_aligning && STRICT_ALIGNMENT
6078 && (TYPE_ALIGN (TREE_TYPE (exp))
6079 > TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (exp, 0))))
6080 && (TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (exp, 0)))
6081 < BIGGEST_ALIGNMENT)
6082 && (TYPE_ALIGN_OK (TREE_TYPE (exp))
6083 || TYPE_ALIGN_OK (TREE_TYPE (TREE_OPERAND (exp, 0)))))
6084 goto done;
6085 break;
6086
6087 case MEM_REF:
6088 /* Hand back the decl for MEM[&decl, off]. */
6089 if (TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR)
6090 {
6091 tree off = TREE_OPERAND (exp, 1);
6092 if (!integer_zerop (off))
6093 {
6094 double_int boff, coff = mem_ref_offset (exp);
6095 boff = double_int_lshift (coff,
6096 BITS_PER_UNIT == 8
6097 ? 3 : exact_log2 (BITS_PER_UNIT),
6098 HOST_BITS_PER_DOUBLE_INT, true);
6099 bit_offset = double_int_add (bit_offset, boff);
6100 }
6101 exp = TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
6102 }
6103 goto done;
6104
6105 default:
6106 goto done;
6107 }
6108
6109 /* If any reference in the chain is volatile, the effect is volatile. */
6110 if (TREE_THIS_VOLATILE (exp))
6111 *pvolatilep = 1;
6112
6113 exp = TREE_OPERAND (exp, 0);
6114 }
6115 done:
6116
6117 /* If OFFSET is constant, see if we can return the whole thing as a
6118 constant bit position. Make sure to handle overflow during
6119 this conversion. */
6120 if (host_integerp (offset, 0))
6121 {
6122 double_int tem = double_int_lshift (tree_to_double_int (offset),
6123 BITS_PER_UNIT == 8
6124 ? 3 : exact_log2 (BITS_PER_UNIT),
6125 HOST_BITS_PER_DOUBLE_INT, true);
6126 tem = double_int_add (tem, bit_offset);
6127 if (double_int_fits_in_shwi_p (tem))
6128 {
6129 *pbitpos = double_int_to_shwi (tem);
6130 *poffset = offset = NULL_TREE;
6131 }
6132 }
6133
6134 /* Otherwise, split it up. */
6135 if (offset)
6136 {
6137 *pbitpos = double_int_to_shwi (bit_offset);
6138 *poffset = offset;
6139 }
6140
6141 /* We can use BLKmode for a byte-aligned BLKmode bitfield. */
6142 if (mode == VOIDmode
6143 && blkmode_bitfield
6144 && (*pbitpos % BITS_PER_UNIT) == 0
6145 && (*pbitsize % BITS_PER_UNIT) == 0)
6146 *pmode = BLKmode;
6147 else
6148 *pmode = mode;
6149
6150 return exp;
6151 }
6152
6153 /* Given an expression EXP that may be a COMPONENT_REF, an ARRAY_REF or an
6154 ARRAY_RANGE_REF, look for whether EXP or any nested component-refs within
6155 EXP is marked as PACKED. */
6156
6157 bool
6158 contains_packed_reference (const_tree exp)
6159 {
6160 bool packed_p = false;
6161
6162 while (1)
6163 {
6164 switch (TREE_CODE (exp))
6165 {
6166 case COMPONENT_REF:
6167 {
6168 tree field = TREE_OPERAND (exp, 1);
6169 packed_p = DECL_PACKED (field)
6170 || TYPE_PACKED (TREE_TYPE (field))
6171 || TYPE_PACKED (TREE_TYPE (exp));
6172 if (packed_p)
6173 goto done;
6174 }
6175 break;
6176
6177 case BIT_FIELD_REF:
6178 case ARRAY_REF:
6179 case ARRAY_RANGE_REF:
6180 case REALPART_EXPR:
6181 case IMAGPART_EXPR:
6182 case VIEW_CONVERT_EXPR:
6183 break;
6184
6185 default:
6186 goto done;
6187 }
6188 exp = TREE_OPERAND (exp, 0);
6189 }
6190 done:
6191 return packed_p;
6192 }
6193
6194 /* Return a tree of sizetype representing the size, in bytes, of the element
6195 of EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6196
6197 tree
6198 array_ref_element_size (tree exp)
6199 {
6200 tree aligned_size = TREE_OPERAND (exp, 3);
6201 tree elmt_type = TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0)));
6202 location_t loc = EXPR_LOCATION (exp);
6203
6204 /* If a size was specified in the ARRAY_REF, it's the size measured
6205 in alignment units of the element type. So multiply by that value. */
6206 if (aligned_size)
6207 {
6208 /* ??? tree_ssa_useless_type_conversion will eliminate casts to
6209 sizetype from another type of the same width and signedness. */
6210 if (TREE_TYPE (aligned_size) != sizetype)
6211 aligned_size = fold_convert_loc (loc, sizetype, aligned_size);
6212 return size_binop_loc (loc, MULT_EXPR, aligned_size,
6213 size_int (TYPE_ALIGN_UNIT (elmt_type)));
6214 }
6215
6216 /* Otherwise, take the size from that of the element type. Substitute
6217 any PLACEHOLDER_EXPR that we have. */
6218 else
6219 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_SIZE_UNIT (elmt_type), exp);
6220 }
6221
6222 /* Return a tree representing the lower bound of the array mentioned in
6223 EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6224
6225 tree
6226 array_ref_low_bound (tree exp)
6227 {
6228 tree domain_type = TYPE_DOMAIN (TREE_TYPE (TREE_OPERAND (exp, 0)));
6229
6230 /* If a lower bound is specified in EXP, use it. */
6231 if (TREE_OPERAND (exp, 2))
6232 return TREE_OPERAND (exp, 2);
6233
6234 /* Otherwise, if there is a domain type and it has a lower bound, use it,
6235 substituting for a PLACEHOLDER_EXPR as needed. */
6236 if (domain_type && TYPE_MIN_VALUE (domain_type))
6237 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_MIN_VALUE (domain_type), exp);
6238
6239 /* Otherwise, return a zero of the appropriate type. */
6240 return build_int_cst (TREE_TYPE (TREE_OPERAND (exp, 1)), 0);
6241 }
6242
6243 /* Return a tree representing the upper bound of the array mentioned in
6244 EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6245
6246 tree
6247 array_ref_up_bound (tree exp)
6248 {
6249 tree domain_type = TYPE_DOMAIN (TREE_TYPE (TREE_OPERAND (exp, 0)));
6250
6251 /* If there is a domain type and it has an upper bound, use it, substituting
6252 for a PLACEHOLDER_EXPR as needed. */
6253 if (domain_type && TYPE_MAX_VALUE (domain_type))
6254 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_MAX_VALUE (domain_type), exp);
6255
6256 /* Otherwise fail. */
6257 return NULL_TREE;
6258 }
6259
6260 /* Return a tree representing the offset, in bytes, of the field referenced
6261 by EXP. This does not include any offset in DECL_FIELD_BIT_OFFSET. */
6262
6263 tree
6264 component_ref_field_offset (tree exp)
6265 {
6266 tree aligned_offset = TREE_OPERAND (exp, 2);
6267 tree field = TREE_OPERAND (exp, 1);
6268 location_t loc = EXPR_LOCATION (exp);
6269
6270 /* If an offset was specified in the COMPONENT_REF, it's the offset measured
6271 in units of DECL_OFFSET_ALIGN / BITS_PER_UNIT. So multiply by that
6272 value. */
6273 if (aligned_offset)
6274 {
6275 /* ??? tree_ssa_useless_type_conversion will eliminate casts to
6276 sizetype from another type of the same width and signedness. */
6277 if (TREE_TYPE (aligned_offset) != sizetype)
6278 aligned_offset = fold_convert_loc (loc, sizetype, aligned_offset);
6279 return size_binop_loc (loc, MULT_EXPR, aligned_offset,
6280 size_int (DECL_OFFSET_ALIGN (field)
6281 / BITS_PER_UNIT));
6282 }
6283
6284 /* Otherwise, take the offset from that of the field. Substitute
6285 any PLACEHOLDER_EXPR that we have. */
6286 else
6287 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (DECL_FIELD_OFFSET (field), exp);
6288 }
6289
6290 /* Alignment in bits the TARGET of an assignment may be assumed to have. */
6291
6292 static unsigned HOST_WIDE_INT
6293 target_align (const_tree target)
6294 {
6295 /* We might have a chain of nested references with intermediate misaligning
6296 bitfields components, so need to recurse to find out. */
6297
6298 unsigned HOST_WIDE_INT this_align, outer_align;
6299
6300 switch (TREE_CODE (target))
6301 {
6302 case BIT_FIELD_REF:
6303 return 1;
6304
6305 case COMPONENT_REF:
6306 this_align = DECL_ALIGN (TREE_OPERAND (target, 1));
6307 outer_align = target_align (TREE_OPERAND (target, 0));
6308 return MIN (this_align, outer_align);
6309
6310 case ARRAY_REF:
6311 case ARRAY_RANGE_REF:
6312 this_align = TYPE_ALIGN (TREE_TYPE (target));
6313 outer_align = target_align (TREE_OPERAND (target, 0));
6314 return MIN (this_align, outer_align);
6315
6316 CASE_CONVERT:
6317 case NON_LVALUE_EXPR:
6318 case VIEW_CONVERT_EXPR:
6319 this_align = TYPE_ALIGN (TREE_TYPE (target));
6320 outer_align = target_align (TREE_OPERAND (target, 0));
6321 return MAX (this_align, outer_align);
6322
6323 default:
6324 return TYPE_ALIGN (TREE_TYPE (target));
6325 }
6326 }
6327
6328 \f
6329 /* Given an rtx VALUE that may contain additions and multiplications, return
6330 an equivalent value that just refers to a register, memory, or constant.
6331 This is done by generating instructions to perform the arithmetic and
6332 returning a pseudo-register containing the value.
6333
6334 The returned value may be a REG, SUBREG, MEM or constant. */
6335
6336 rtx
6337 force_operand (rtx value, rtx target)
6338 {
6339 rtx op1, op2;
6340 /* Use subtarget as the target for operand 0 of a binary operation. */
6341 rtx subtarget = get_subtarget (target);
6342 enum rtx_code code = GET_CODE (value);
6343
6344 /* Check for subreg applied to an expression produced by loop optimizer. */
6345 if (code == SUBREG
6346 && !REG_P (SUBREG_REG (value))
6347 && !MEM_P (SUBREG_REG (value)))
6348 {
6349 value
6350 = simplify_gen_subreg (GET_MODE (value),
6351 force_reg (GET_MODE (SUBREG_REG (value)),
6352 force_operand (SUBREG_REG (value),
6353 NULL_RTX)),
6354 GET_MODE (SUBREG_REG (value)),
6355 SUBREG_BYTE (value));
6356 code = GET_CODE (value);
6357 }
6358
6359 /* Check for a PIC address load. */
6360 if ((code == PLUS || code == MINUS)
6361 && XEXP (value, 0) == pic_offset_table_rtx
6362 && (GET_CODE (XEXP (value, 1)) == SYMBOL_REF
6363 || GET_CODE (XEXP (value, 1)) == LABEL_REF
6364 || GET_CODE (XEXP (value, 1)) == CONST))
6365 {
6366 if (!subtarget)
6367 subtarget = gen_reg_rtx (GET_MODE (value));
6368 emit_move_insn (subtarget, value);
6369 return subtarget;
6370 }
6371
6372 if (ARITHMETIC_P (value))
6373 {
6374 op2 = XEXP (value, 1);
6375 if (!CONSTANT_P (op2) && !(REG_P (op2) && op2 != subtarget))
6376 subtarget = 0;
6377 if (code == MINUS && CONST_INT_P (op2))
6378 {
6379 code = PLUS;
6380 op2 = negate_rtx (GET_MODE (value), op2);
6381 }
6382
6383 /* Check for an addition with OP2 a constant integer and our first
6384 operand a PLUS of a virtual register and something else. In that
6385 case, we want to emit the sum of the virtual register and the
6386 constant first and then add the other value. This allows virtual
6387 register instantiation to simply modify the constant rather than
6388 creating another one around this addition. */
6389 if (code == PLUS && CONST_INT_P (op2)
6390 && GET_CODE (XEXP (value, 0)) == PLUS
6391 && REG_P (XEXP (XEXP (value, 0), 0))
6392 && REGNO (XEXP (XEXP (value, 0), 0)) >= FIRST_VIRTUAL_REGISTER
6393 && REGNO (XEXP (XEXP (value, 0), 0)) <= LAST_VIRTUAL_REGISTER)
6394 {
6395 rtx temp = expand_simple_binop (GET_MODE (value), code,
6396 XEXP (XEXP (value, 0), 0), op2,
6397 subtarget, 0, OPTAB_LIB_WIDEN);
6398 return expand_simple_binop (GET_MODE (value), code, temp,
6399 force_operand (XEXP (XEXP (value,
6400 0), 1), 0),
6401 target, 0, OPTAB_LIB_WIDEN);
6402 }
6403
6404 op1 = force_operand (XEXP (value, 0), subtarget);
6405 op2 = force_operand (op2, NULL_RTX);
6406 switch (code)
6407 {
6408 case MULT:
6409 return expand_mult (GET_MODE (value), op1, op2, target, 1);
6410 case DIV:
6411 if (!INTEGRAL_MODE_P (GET_MODE (value)))
6412 return expand_simple_binop (GET_MODE (value), code, op1, op2,
6413 target, 1, OPTAB_LIB_WIDEN);
6414 else
6415 return expand_divmod (0,
6416 FLOAT_MODE_P (GET_MODE (value))
6417 ? RDIV_EXPR : TRUNC_DIV_EXPR,
6418 GET_MODE (value), op1, op2, target, 0);
6419 case MOD:
6420 return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2,
6421 target, 0);
6422 case UDIV:
6423 return expand_divmod (0, TRUNC_DIV_EXPR, GET_MODE (value), op1, op2,
6424 target, 1);
6425 case UMOD:
6426 return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2,
6427 target, 1);
6428 case ASHIFTRT:
6429 return expand_simple_binop (GET_MODE (value), code, op1, op2,
6430 target, 0, OPTAB_LIB_WIDEN);
6431 default:
6432 return expand_simple_binop (GET_MODE (value), code, op1, op2,
6433 target, 1, OPTAB_LIB_WIDEN);
6434 }
6435 }
6436 if (UNARY_P (value))
6437 {
6438 if (!target)
6439 target = gen_reg_rtx (GET_MODE (value));
6440 op1 = force_operand (XEXP (value, 0), NULL_RTX);
6441 switch (code)
6442 {
6443 case ZERO_EXTEND:
6444 case SIGN_EXTEND:
6445 case TRUNCATE:
6446 case FLOAT_EXTEND:
6447 case FLOAT_TRUNCATE:
6448 convert_move (target, op1, code == ZERO_EXTEND);
6449 return target;
6450
6451 case FIX:
6452 case UNSIGNED_FIX:
6453 expand_fix (target, op1, code == UNSIGNED_FIX);
6454 return target;
6455
6456 case FLOAT:
6457 case UNSIGNED_FLOAT:
6458 expand_float (target, op1, code == UNSIGNED_FLOAT);
6459 return target;
6460
6461 default:
6462 return expand_simple_unop (GET_MODE (value), code, op1, target, 0);
6463 }
6464 }
6465
6466 #ifdef INSN_SCHEDULING
6467 /* On machines that have insn scheduling, we want all memory reference to be
6468 explicit, so we need to deal with such paradoxical SUBREGs. */
6469 if (GET_CODE (value) == SUBREG && MEM_P (SUBREG_REG (value))
6470 && (GET_MODE_SIZE (GET_MODE (value))
6471 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (value)))))
6472 value
6473 = simplify_gen_subreg (GET_MODE (value),
6474 force_reg (GET_MODE (SUBREG_REG (value)),
6475 force_operand (SUBREG_REG (value),
6476 NULL_RTX)),
6477 GET_MODE (SUBREG_REG (value)),
6478 SUBREG_BYTE (value));
6479 #endif
6480
6481 return value;
6482 }
6483 \f
6484 /* Subroutine of expand_expr: return nonzero iff there is no way that
6485 EXP can reference X, which is being modified. TOP_P is nonzero if this
6486 call is going to be used to determine whether we need a temporary
6487 for EXP, as opposed to a recursive call to this function.
6488
6489 It is always safe for this routine to return zero since it merely
6490 searches for optimization opportunities. */
6491
6492 int
6493 safe_from_p (const_rtx x, tree exp, int top_p)
6494 {
6495 rtx exp_rtl = 0;
6496 int i, nops;
6497
6498 if (x == 0
6499 /* If EXP has varying size, we MUST use a target since we currently
6500 have no way of allocating temporaries of variable size
6501 (except for arrays that have TYPE_ARRAY_MAX_SIZE set).
6502 So we assume here that something at a higher level has prevented a
6503 clash. This is somewhat bogus, but the best we can do. Only
6504 do this when X is BLKmode and when we are at the top level. */
6505 || (top_p && TREE_TYPE (exp) != 0 && COMPLETE_TYPE_P (TREE_TYPE (exp))
6506 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) != INTEGER_CST
6507 && (TREE_CODE (TREE_TYPE (exp)) != ARRAY_TYPE
6508 || TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp)) == NULL_TREE
6509 || TREE_CODE (TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp)))
6510 != INTEGER_CST)
6511 && GET_MODE (x) == BLKmode)
6512 /* If X is in the outgoing argument area, it is always safe. */
6513 || (MEM_P (x)
6514 && (XEXP (x, 0) == virtual_outgoing_args_rtx
6515 || (GET_CODE (XEXP (x, 0)) == PLUS
6516 && XEXP (XEXP (x, 0), 0) == virtual_outgoing_args_rtx))))
6517 return 1;
6518
6519 /* If this is a subreg of a hard register, declare it unsafe, otherwise,
6520 find the underlying pseudo. */
6521 if (GET_CODE (x) == SUBREG)
6522 {
6523 x = SUBREG_REG (x);
6524 if (REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
6525 return 0;
6526 }
6527
6528 /* Now look at our tree code and possibly recurse. */
6529 switch (TREE_CODE_CLASS (TREE_CODE (exp)))
6530 {
6531 case tcc_declaration:
6532 exp_rtl = DECL_RTL_IF_SET (exp);
6533 break;
6534
6535 case tcc_constant:
6536 return 1;
6537
6538 case tcc_exceptional:
6539 if (TREE_CODE (exp) == TREE_LIST)
6540 {
6541 while (1)
6542 {
6543 if (TREE_VALUE (exp) && !safe_from_p (x, TREE_VALUE (exp), 0))
6544 return 0;
6545 exp = TREE_CHAIN (exp);
6546 if (!exp)
6547 return 1;
6548 if (TREE_CODE (exp) != TREE_LIST)
6549 return safe_from_p (x, exp, 0);
6550 }
6551 }
6552 else if (TREE_CODE (exp) == CONSTRUCTOR)
6553 {
6554 constructor_elt *ce;
6555 unsigned HOST_WIDE_INT idx;
6556
6557 FOR_EACH_VEC_ELT (constructor_elt, CONSTRUCTOR_ELTS (exp), idx, ce)
6558 if ((ce->index != NULL_TREE && !safe_from_p (x, ce->index, 0))
6559 || !safe_from_p (x, ce->value, 0))
6560 return 0;
6561 return 1;
6562 }
6563 else if (TREE_CODE (exp) == ERROR_MARK)
6564 return 1; /* An already-visited SAVE_EXPR? */
6565 else
6566 return 0;
6567
6568 case tcc_statement:
6569 /* The only case we look at here is the DECL_INITIAL inside a
6570 DECL_EXPR. */
6571 return (TREE_CODE (exp) != DECL_EXPR
6572 || TREE_CODE (DECL_EXPR_DECL (exp)) != VAR_DECL
6573 || !DECL_INITIAL (DECL_EXPR_DECL (exp))
6574 || safe_from_p (x, DECL_INITIAL (DECL_EXPR_DECL (exp)), 0));
6575
6576 case tcc_binary:
6577 case tcc_comparison:
6578 if (!safe_from_p (x, TREE_OPERAND (exp, 1), 0))
6579 return 0;
6580 /* Fall through. */
6581
6582 case tcc_unary:
6583 return safe_from_p (x, TREE_OPERAND (exp, 0), 0);
6584
6585 case tcc_expression:
6586 case tcc_reference:
6587 case tcc_vl_exp:
6588 /* Now do code-specific tests. EXP_RTL is set to any rtx we find in
6589 the expression. If it is set, we conflict iff we are that rtx or
6590 both are in memory. Otherwise, we check all operands of the
6591 expression recursively. */
6592
6593 switch (TREE_CODE (exp))
6594 {
6595 case ADDR_EXPR:
6596 /* If the operand is static or we are static, we can't conflict.
6597 Likewise if we don't conflict with the operand at all. */
6598 if (staticp (TREE_OPERAND (exp, 0))
6599 || TREE_STATIC (exp)
6600 || safe_from_p (x, TREE_OPERAND (exp, 0), 0))
6601 return 1;
6602
6603 /* Otherwise, the only way this can conflict is if we are taking
6604 the address of a DECL a that address if part of X, which is
6605 very rare. */
6606 exp = TREE_OPERAND (exp, 0);
6607 if (DECL_P (exp))
6608 {
6609 if (!DECL_RTL_SET_P (exp)
6610 || !MEM_P (DECL_RTL (exp)))
6611 return 0;
6612 else
6613 exp_rtl = XEXP (DECL_RTL (exp), 0);
6614 }
6615 break;
6616
6617 case MEM_REF:
6618 if (MEM_P (x)
6619 && alias_sets_conflict_p (MEM_ALIAS_SET (x),
6620 get_alias_set (exp)))
6621 return 0;
6622 break;
6623
6624 case CALL_EXPR:
6625 /* Assume that the call will clobber all hard registers and
6626 all of memory. */
6627 if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
6628 || MEM_P (x))
6629 return 0;
6630 break;
6631
6632 case WITH_CLEANUP_EXPR:
6633 case CLEANUP_POINT_EXPR:
6634 /* Lowered by gimplify.c. */
6635 gcc_unreachable ();
6636
6637 case SAVE_EXPR:
6638 return safe_from_p (x, TREE_OPERAND (exp, 0), 0);
6639
6640 default:
6641 break;
6642 }
6643
6644 /* If we have an rtx, we do not need to scan our operands. */
6645 if (exp_rtl)
6646 break;
6647
6648 nops = TREE_OPERAND_LENGTH (exp);
6649 for (i = 0; i < nops; i++)
6650 if (TREE_OPERAND (exp, i) != 0
6651 && ! safe_from_p (x, TREE_OPERAND (exp, i), 0))
6652 return 0;
6653
6654 break;
6655
6656 case tcc_type:
6657 /* Should never get a type here. */
6658 gcc_unreachable ();
6659 }
6660
6661 /* If we have an rtl, find any enclosed object. Then see if we conflict
6662 with it. */
6663 if (exp_rtl)
6664 {
6665 if (GET_CODE (exp_rtl) == SUBREG)
6666 {
6667 exp_rtl = SUBREG_REG (exp_rtl);
6668 if (REG_P (exp_rtl)
6669 && REGNO (exp_rtl) < FIRST_PSEUDO_REGISTER)
6670 return 0;
6671 }
6672
6673 /* If the rtl is X, then it is not safe. Otherwise, it is unless both
6674 are memory and they conflict. */
6675 return ! (rtx_equal_p (x, exp_rtl)
6676 || (MEM_P (x) && MEM_P (exp_rtl)
6677 && true_dependence (exp_rtl, VOIDmode, x,
6678 rtx_addr_varies_p)));
6679 }
6680
6681 /* If we reach here, it is safe. */
6682 return 1;
6683 }
6684
6685 \f
6686 /* Return the highest power of two that EXP is known to be a multiple of.
6687 This is used in updating alignment of MEMs in array references. */
6688
6689 unsigned HOST_WIDE_INT
6690 highest_pow2_factor (const_tree exp)
6691 {
6692 unsigned HOST_WIDE_INT c0, c1;
6693
6694 switch (TREE_CODE (exp))
6695 {
6696 case INTEGER_CST:
6697 /* We can find the lowest bit that's a one. If the low
6698 HOST_BITS_PER_WIDE_INT bits are zero, return BIGGEST_ALIGNMENT.
6699 We need to handle this case since we can find it in a COND_EXPR,
6700 a MIN_EXPR, or a MAX_EXPR. If the constant overflows, we have an
6701 erroneous program, so return BIGGEST_ALIGNMENT to avoid any
6702 later ICE. */
6703 if (TREE_OVERFLOW (exp))
6704 return BIGGEST_ALIGNMENT;
6705 else
6706 {
6707 /* Note: tree_low_cst is intentionally not used here,
6708 we don't care about the upper bits. */
6709 c0 = TREE_INT_CST_LOW (exp);
6710 c0 &= -c0;
6711 return c0 ? c0 : BIGGEST_ALIGNMENT;
6712 }
6713 break;
6714
6715 case PLUS_EXPR: case MINUS_EXPR: case MIN_EXPR: case MAX_EXPR:
6716 c0 = highest_pow2_factor (TREE_OPERAND (exp, 0));
6717 c1 = highest_pow2_factor (TREE_OPERAND (exp, 1));
6718 return MIN (c0, c1);
6719
6720 case MULT_EXPR:
6721 c0 = highest_pow2_factor (TREE_OPERAND (exp, 0));
6722 c1 = highest_pow2_factor (TREE_OPERAND (exp, 1));
6723 return c0 * c1;
6724
6725 case ROUND_DIV_EXPR: case TRUNC_DIV_EXPR: case FLOOR_DIV_EXPR:
6726 case CEIL_DIV_EXPR:
6727 if (integer_pow2p (TREE_OPERAND (exp, 1))
6728 && host_integerp (TREE_OPERAND (exp, 1), 1))
6729 {
6730 c0 = highest_pow2_factor (TREE_OPERAND (exp, 0));
6731 c1 = tree_low_cst (TREE_OPERAND (exp, 1), 1);
6732 return MAX (1, c0 / c1);
6733 }
6734 break;
6735
6736 case BIT_AND_EXPR:
6737 /* The highest power of two of a bit-and expression is the maximum of
6738 that of its operands. We typically get here for a complex LHS and
6739 a constant negative power of two on the RHS to force an explicit
6740 alignment, so don't bother looking at the LHS. */
6741 return highest_pow2_factor (TREE_OPERAND (exp, 1));
6742
6743 CASE_CONVERT:
6744 case SAVE_EXPR:
6745 return highest_pow2_factor (TREE_OPERAND (exp, 0));
6746
6747 case COMPOUND_EXPR:
6748 return highest_pow2_factor (TREE_OPERAND (exp, 1));
6749
6750 case COND_EXPR:
6751 c0 = highest_pow2_factor (TREE_OPERAND (exp, 1));
6752 c1 = highest_pow2_factor (TREE_OPERAND (exp, 2));
6753 return MIN (c0, c1);
6754
6755 default:
6756 break;
6757 }
6758
6759 return 1;
6760 }
6761
6762 /* Similar, except that the alignment requirements of TARGET are
6763 taken into account. Assume it is at least as aligned as its
6764 type, unless it is a COMPONENT_REF in which case the layout of
6765 the structure gives the alignment. */
6766
6767 static unsigned HOST_WIDE_INT
6768 highest_pow2_factor_for_target (const_tree target, const_tree exp)
6769 {
6770 unsigned HOST_WIDE_INT talign = target_align (target) / BITS_PER_UNIT;
6771 unsigned HOST_WIDE_INT factor = highest_pow2_factor (exp);
6772
6773 return MAX (factor, talign);
6774 }
6775 \f
6776 /* Subroutine of expand_expr. Expand the two operands of a binary
6777 expression EXP0 and EXP1 placing the results in OP0 and OP1.
6778 The value may be stored in TARGET if TARGET is nonzero. The
6779 MODIFIER argument is as documented by expand_expr. */
6780
6781 static void
6782 expand_operands (tree exp0, tree exp1, rtx target, rtx *op0, rtx *op1,
6783 enum expand_modifier modifier)
6784 {
6785 if (! safe_from_p (target, exp1, 1))
6786 target = 0;
6787 if (operand_equal_p (exp0, exp1, 0))
6788 {
6789 *op0 = expand_expr (exp0, target, VOIDmode, modifier);
6790 *op1 = copy_rtx (*op0);
6791 }
6792 else
6793 {
6794 /* If we need to preserve evaluation order, copy exp0 into its own
6795 temporary variable so that it can't be clobbered by exp1. */
6796 if (flag_evaluation_order && TREE_SIDE_EFFECTS (exp1))
6797 exp0 = save_expr (exp0);
6798 *op0 = expand_expr (exp0, target, VOIDmode, modifier);
6799 *op1 = expand_expr (exp1, NULL_RTX, VOIDmode, modifier);
6800 }
6801 }
6802
6803 \f
6804 /* Return a MEM that contains constant EXP. DEFER is as for
6805 output_constant_def and MODIFIER is as for expand_expr. */
6806
6807 static rtx
6808 expand_expr_constant (tree exp, int defer, enum expand_modifier modifier)
6809 {
6810 rtx mem;
6811
6812 mem = output_constant_def (exp, defer);
6813 if (modifier != EXPAND_INITIALIZER)
6814 mem = use_anchored_address (mem);
6815 return mem;
6816 }
6817
6818 /* A subroutine of expand_expr_addr_expr. Evaluate the address of EXP.
6819 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
6820
6821 static rtx
6822 expand_expr_addr_expr_1 (tree exp, rtx target, enum machine_mode tmode,
6823 enum expand_modifier modifier, addr_space_t as)
6824 {
6825 rtx result, subtarget;
6826 tree inner, offset;
6827 HOST_WIDE_INT bitsize, bitpos;
6828 int volatilep, unsignedp;
6829 enum machine_mode mode1;
6830
6831 /* If we are taking the address of a constant and are at the top level,
6832 we have to use output_constant_def since we can't call force_const_mem
6833 at top level. */
6834 /* ??? This should be considered a front-end bug. We should not be
6835 generating ADDR_EXPR of something that isn't an LVALUE. The only
6836 exception here is STRING_CST. */
6837 if (CONSTANT_CLASS_P (exp))
6838 return XEXP (expand_expr_constant (exp, 0, modifier), 0);
6839
6840 /* Everything must be something allowed by is_gimple_addressable. */
6841 switch (TREE_CODE (exp))
6842 {
6843 case INDIRECT_REF:
6844 /* This case will happen via recursion for &a->b. */
6845 return expand_expr (TREE_OPERAND (exp, 0), target, tmode, modifier);
6846
6847 case MEM_REF:
6848 {
6849 tree tem = TREE_OPERAND (exp, 0);
6850 if (!integer_zerop (TREE_OPERAND (exp, 1)))
6851 tem = build2 (POINTER_PLUS_EXPR, TREE_TYPE (TREE_OPERAND (exp, 1)),
6852 tem,
6853 double_int_to_tree (sizetype, mem_ref_offset (exp)));
6854 return expand_expr (tem, target, tmode, modifier);
6855 }
6856
6857 case CONST_DECL:
6858 /* Expand the initializer like constants above. */
6859 return XEXP (expand_expr_constant (DECL_INITIAL (exp), 0, modifier), 0);
6860
6861 case REALPART_EXPR:
6862 /* The real part of the complex number is always first, therefore
6863 the address is the same as the address of the parent object. */
6864 offset = 0;
6865 bitpos = 0;
6866 inner = TREE_OPERAND (exp, 0);
6867 break;
6868
6869 case IMAGPART_EXPR:
6870 /* The imaginary part of the complex number is always second.
6871 The expression is therefore always offset by the size of the
6872 scalar type. */
6873 offset = 0;
6874 bitpos = GET_MODE_BITSIZE (TYPE_MODE (TREE_TYPE (exp)));
6875 inner = TREE_OPERAND (exp, 0);
6876 break;
6877
6878 default:
6879 /* If the object is a DECL, then expand it for its rtl. Don't bypass
6880 expand_expr, as that can have various side effects; LABEL_DECLs for
6881 example, may not have their DECL_RTL set yet. Expand the rtl of
6882 CONSTRUCTORs too, which should yield a memory reference for the
6883 constructor's contents. Assume language specific tree nodes can
6884 be expanded in some interesting way. */
6885 gcc_assert (TREE_CODE (exp) < LAST_AND_UNUSED_TREE_CODE);
6886 if (DECL_P (exp)
6887 || TREE_CODE (exp) == CONSTRUCTOR
6888 || TREE_CODE (exp) == COMPOUND_LITERAL_EXPR)
6889 {
6890 result = expand_expr (exp, target, tmode,
6891 modifier == EXPAND_INITIALIZER
6892 ? EXPAND_INITIALIZER : EXPAND_CONST_ADDRESS);
6893
6894 /* If the DECL isn't in memory, then the DECL wasn't properly
6895 marked TREE_ADDRESSABLE, which will be either a front-end
6896 or a tree optimizer bug. */
6897 gcc_assert (MEM_P (result));
6898 result = XEXP (result, 0);
6899
6900 /* ??? Is this needed anymore? */
6901 if (DECL_P (exp) && !TREE_USED (exp) == 0)
6902 {
6903 assemble_external (exp);
6904 TREE_USED (exp) = 1;
6905 }
6906
6907 if (modifier != EXPAND_INITIALIZER
6908 && modifier != EXPAND_CONST_ADDRESS)
6909 result = force_operand (result, target);
6910 return result;
6911 }
6912
6913 /* Pass FALSE as the last argument to get_inner_reference although
6914 we are expanding to RTL. The rationale is that we know how to
6915 handle "aligning nodes" here: we can just bypass them because
6916 they won't change the final object whose address will be returned
6917 (they actually exist only for that purpose). */
6918 inner = get_inner_reference (exp, &bitsize, &bitpos, &offset,
6919 &mode1, &unsignedp, &volatilep, false);
6920 break;
6921 }
6922
6923 /* We must have made progress. */
6924 gcc_assert (inner != exp);
6925
6926 subtarget = offset || bitpos ? NULL_RTX : target;
6927 /* For VIEW_CONVERT_EXPR, where the outer alignment is bigger than
6928 inner alignment, force the inner to be sufficiently aligned. */
6929 if (CONSTANT_CLASS_P (inner)
6930 && TYPE_ALIGN (TREE_TYPE (inner)) < TYPE_ALIGN (TREE_TYPE (exp)))
6931 {
6932 inner = copy_node (inner);
6933 TREE_TYPE (inner) = copy_node (TREE_TYPE (inner));
6934 TYPE_ALIGN (TREE_TYPE (inner)) = TYPE_ALIGN (TREE_TYPE (exp));
6935 TYPE_USER_ALIGN (TREE_TYPE (inner)) = 1;
6936 }
6937 result = expand_expr_addr_expr_1 (inner, subtarget, tmode, modifier, as);
6938
6939 if (offset)
6940 {
6941 rtx tmp;
6942
6943 if (modifier != EXPAND_NORMAL)
6944 result = force_operand (result, NULL);
6945 tmp = expand_expr (offset, NULL_RTX, tmode,
6946 modifier == EXPAND_INITIALIZER
6947 ? EXPAND_INITIALIZER : EXPAND_NORMAL);
6948
6949 result = convert_memory_address_addr_space (tmode, result, as);
6950 tmp = convert_memory_address_addr_space (tmode, tmp, as);
6951
6952 if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
6953 result = simplify_gen_binary (PLUS, tmode, result, tmp);
6954 else
6955 {
6956 subtarget = bitpos ? NULL_RTX : target;
6957 result = expand_simple_binop (tmode, PLUS, result, tmp, subtarget,
6958 1, OPTAB_LIB_WIDEN);
6959 }
6960 }
6961
6962 if (bitpos)
6963 {
6964 /* Someone beforehand should have rejected taking the address
6965 of such an object. */
6966 gcc_assert ((bitpos % BITS_PER_UNIT) == 0);
6967
6968 result = plus_constant (result, bitpos / BITS_PER_UNIT);
6969 if (modifier < EXPAND_SUM)
6970 result = force_operand (result, target);
6971 }
6972
6973 return result;
6974 }
6975
6976 /* A subroutine of expand_expr. Evaluate EXP, which is an ADDR_EXPR.
6977 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
6978
6979 static rtx
6980 expand_expr_addr_expr (tree exp, rtx target, enum machine_mode tmode,
6981 enum expand_modifier modifier)
6982 {
6983 addr_space_t as = ADDR_SPACE_GENERIC;
6984 enum machine_mode address_mode = Pmode;
6985 enum machine_mode pointer_mode = ptr_mode;
6986 enum machine_mode rmode;
6987 rtx result;
6988
6989 /* Target mode of VOIDmode says "whatever's natural". */
6990 if (tmode == VOIDmode)
6991 tmode = TYPE_MODE (TREE_TYPE (exp));
6992
6993 if (POINTER_TYPE_P (TREE_TYPE (exp)))
6994 {
6995 as = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (exp)));
6996 address_mode = targetm.addr_space.address_mode (as);
6997 pointer_mode = targetm.addr_space.pointer_mode (as);
6998 }
6999
7000 /* We can get called with some Weird Things if the user does silliness
7001 like "(short) &a". In that case, convert_memory_address won't do
7002 the right thing, so ignore the given target mode. */
7003 if (tmode != address_mode && tmode != pointer_mode)
7004 tmode = address_mode;
7005
7006 result = expand_expr_addr_expr_1 (TREE_OPERAND (exp, 0), target,
7007 tmode, modifier, as);
7008
7009 /* Despite expand_expr claims concerning ignoring TMODE when not
7010 strictly convenient, stuff breaks if we don't honor it. Note
7011 that combined with the above, we only do this for pointer modes. */
7012 rmode = GET_MODE (result);
7013 if (rmode == VOIDmode)
7014 rmode = tmode;
7015 if (rmode != tmode)
7016 result = convert_memory_address_addr_space (tmode, result, as);
7017
7018 return result;
7019 }
7020
7021 /* Generate code for computing CONSTRUCTOR EXP.
7022 An rtx for the computed value is returned. If AVOID_TEMP_MEM
7023 is TRUE, instead of creating a temporary variable in memory
7024 NULL is returned and the caller needs to handle it differently. */
7025
7026 static rtx
7027 expand_constructor (tree exp, rtx target, enum expand_modifier modifier,
7028 bool avoid_temp_mem)
7029 {
7030 tree type = TREE_TYPE (exp);
7031 enum machine_mode mode = TYPE_MODE (type);
7032
7033 /* Try to avoid creating a temporary at all. This is possible
7034 if all of the initializer is zero.
7035 FIXME: try to handle all [0..255] initializers we can handle
7036 with memset. */
7037 if (TREE_STATIC (exp)
7038 && !TREE_ADDRESSABLE (exp)
7039 && target != 0 && mode == BLKmode
7040 && all_zeros_p (exp))
7041 {
7042 clear_storage (target, expr_size (exp), BLOCK_OP_NORMAL);
7043 return target;
7044 }
7045
7046 /* All elts simple constants => refer to a constant in memory. But
7047 if this is a non-BLKmode mode, let it store a field at a time
7048 since that should make a CONST_INT or CONST_DOUBLE when we
7049 fold. Likewise, if we have a target we can use, it is best to
7050 store directly into the target unless the type is large enough
7051 that memcpy will be used. If we are making an initializer and
7052 all operands are constant, put it in memory as well.
7053
7054 FIXME: Avoid trying to fill vector constructors piece-meal.
7055 Output them with output_constant_def below unless we're sure
7056 they're zeros. This should go away when vector initializers
7057 are treated like VECTOR_CST instead of arrays. */
7058 if ((TREE_STATIC (exp)
7059 && ((mode == BLKmode
7060 && ! (target != 0 && safe_from_p (target, exp, 1)))
7061 || TREE_ADDRESSABLE (exp)
7062 || (host_integerp (TYPE_SIZE_UNIT (type), 1)
7063 && (! MOVE_BY_PIECES_P
7064 (tree_low_cst (TYPE_SIZE_UNIT (type), 1),
7065 TYPE_ALIGN (type)))
7066 && ! mostly_zeros_p (exp))))
7067 || ((modifier == EXPAND_INITIALIZER || modifier == EXPAND_CONST_ADDRESS)
7068 && TREE_CONSTANT (exp)))
7069 {
7070 rtx constructor;
7071
7072 if (avoid_temp_mem)
7073 return NULL_RTX;
7074
7075 constructor = expand_expr_constant (exp, 1, modifier);
7076
7077 if (modifier != EXPAND_CONST_ADDRESS
7078 && modifier != EXPAND_INITIALIZER
7079 && modifier != EXPAND_SUM)
7080 constructor = validize_mem (constructor);
7081
7082 return constructor;
7083 }
7084
7085 /* Handle calls that pass values in multiple non-contiguous
7086 locations. The Irix 6 ABI has examples of this. */
7087 if (target == 0 || ! safe_from_p (target, exp, 1)
7088 || GET_CODE (target) == PARALLEL || modifier == EXPAND_STACK_PARM)
7089 {
7090 if (avoid_temp_mem)
7091 return NULL_RTX;
7092
7093 target
7094 = assign_temp (build_qualified_type (type, (TYPE_QUALS (type)
7095 | (TREE_READONLY (exp)
7096 * TYPE_QUAL_CONST))),
7097 0, TREE_ADDRESSABLE (exp), 1);
7098 }
7099
7100 store_constructor (exp, target, 0, int_expr_size (exp));
7101 return target;
7102 }
7103
7104
7105 /* expand_expr: generate code for computing expression EXP.
7106 An rtx for the computed value is returned. The value is never null.
7107 In the case of a void EXP, const0_rtx is returned.
7108
7109 The value may be stored in TARGET if TARGET is nonzero.
7110 TARGET is just a suggestion; callers must assume that
7111 the rtx returned may not be the same as TARGET.
7112
7113 If TARGET is CONST0_RTX, it means that the value will be ignored.
7114
7115 If TMODE is not VOIDmode, it suggests generating the
7116 result in mode TMODE. But this is done only when convenient.
7117 Otherwise, TMODE is ignored and the value generated in its natural mode.
7118 TMODE is just a suggestion; callers must assume that
7119 the rtx returned may not have mode TMODE.
7120
7121 Note that TARGET may have neither TMODE nor MODE. In that case, it
7122 probably will not be used.
7123
7124 If MODIFIER is EXPAND_SUM then when EXP is an addition
7125 we can return an rtx of the form (MULT (REG ...) (CONST_INT ...))
7126 or a nest of (PLUS ...) and (MINUS ...) where the terms are
7127 products as above, or REG or MEM, or constant.
7128 Ordinarily in such cases we would output mul or add instructions
7129 and then return a pseudo reg containing the sum.
7130
7131 EXPAND_INITIALIZER is much like EXPAND_SUM except that
7132 it also marks a label as absolutely required (it can't be dead).
7133 It also makes a ZERO_EXTEND or SIGN_EXTEND instead of emitting extend insns.
7134 This is used for outputting expressions used in initializers.
7135
7136 EXPAND_CONST_ADDRESS says that it is okay to return a MEM
7137 with a constant address even if that address is not normally legitimate.
7138 EXPAND_INITIALIZER and EXPAND_SUM also have this effect.
7139
7140 EXPAND_STACK_PARM is used when expanding to a TARGET on the stack for
7141 a call parameter. Such targets require special care as we haven't yet
7142 marked TARGET so that it's safe from being trashed by libcalls. We
7143 don't want to use TARGET for anything but the final result;
7144 Intermediate values must go elsewhere. Additionally, calls to
7145 emit_block_move will be flagged with BLOCK_OP_CALL_PARM.
7146
7147 If EXP is a VAR_DECL whose DECL_RTL was a MEM with an invalid
7148 address, and ALT_RTL is non-NULL, then *ALT_RTL is set to the
7149 DECL_RTL of the VAR_DECL. *ALT_RTL is also set if EXP is a
7150 COMPOUND_EXPR whose second argument is such a VAR_DECL, and so on
7151 recursively. */
7152
7153 rtx
7154 expand_expr_real (tree exp, rtx target, enum machine_mode tmode,
7155 enum expand_modifier modifier, rtx *alt_rtl)
7156 {
7157 rtx ret;
7158
7159 /* Handle ERROR_MARK before anybody tries to access its type. */
7160 if (TREE_CODE (exp) == ERROR_MARK
7161 || (TREE_CODE (TREE_TYPE (exp)) == ERROR_MARK))
7162 {
7163 ret = CONST0_RTX (tmode);
7164 return ret ? ret : const0_rtx;
7165 }
7166
7167 /* If this is an expression of some kind and it has an associated line
7168 number, then emit the line number before expanding the expression.
7169
7170 We need to save and restore the file and line information so that
7171 errors discovered during expansion are emitted with the right
7172 information. It would be better of the diagnostic routines
7173 used the file/line information embedded in the tree nodes rather
7174 than globals. */
7175 if (cfun && EXPR_HAS_LOCATION (exp))
7176 {
7177 location_t saved_location = input_location;
7178 location_t saved_curr_loc = get_curr_insn_source_location ();
7179 tree saved_block = get_curr_insn_block ();
7180 input_location = EXPR_LOCATION (exp);
7181 set_curr_insn_source_location (input_location);
7182
7183 /* Record where the insns produced belong. */
7184 set_curr_insn_block (TREE_BLOCK (exp));
7185
7186 ret = expand_expr_real_1 (exp, target, tmode, modifier, alt_rtl);
7187
7188 input_location = saved_location;
7189 set_curr_insn_block (saved_block);
7190 set_curr_insn_source_location (saved_curr_loc);
7191 }
7192 else
7193 {
7194 ret = expand_expr_real_1 (exp, target, tmode, modifier, alt_rtl);
7195 }
7196
7197 return ret;
7198 }
7199
7200 rtx
7201 expand_expr_real_2 (sepops ops, rtx target, enum machine_mode tmode,
7202 enum expand_modifier modifier)
7203 {
7204 rtx op0, op1, op2, temp;
7205 tree type;
7206 int unsignedp;
7207 enum machine_mode mode;
7208 enum tree_code code = ops->code;
7209 optab this_optab;
7210 rtx subtarget, original_target;
7211 int ignore;
7212 bool reduce_bit_field;
7213 location_t loc = ops->location;
7214 tree treeop0, treeop1, treeop2;
7215 #define REDUCE_BIT_FIELD(expr) (reduce_bit_field \
7216 ? reduce_to_bit_field_precision ((expr), \
7217 target, \
7218 type) \
7219 : (expr))
7220
7221 type = ops->type;
7222 mode = TYPE_MODE (type);
7223 unsignedp = TYPE_UNSIGNED (type);
7224
7225 treeop0 = ops->op0;
7226 treeop1 = ops->op1;
7227 treeop2 = ops->op2;
7228
7229 /* We should be called only on simple (binary or unary) expressions,
7230 exactly those that are valid in gimple expressions that aren't
7231 GIMPLE_SINGLE_RHS (or invalid). */
7232 gcc_assert (get_gimple_rhs_class (code) == GIMPLE_UNARY_RHS
7233 || get_gimple_rhs_class (code) == GIMPLE_BINARY_RHS
7234 || get_gimple_rhs_class (code) == GIMPLE_TERNARY_RHS);
7235
7236 ignore = (target == const0_rtx
7237 || ((CONVERT_EXPR_CODE_P (code)
7238 || code == COND_EXPR || code == VIEW_CONVERT_EXPR)
7239 && TREE_CODE (type) == VOID_TYPE));
7240
7241 /* We should be called only if we need the result. */
7242 gcc_assert (!ignore);
7243
7244 /* An operation in what may be a bit-field type needs the
7245 result to be reduced to the precision of the bit-field type,
7246 which is narrower than that of the type's mode. */
7247 reduce_bit_field = (TREE_CODE (type) == INTEGER_TYPE
7248 && GET_MODE_PRECISION (mode) > TYPE_PRECISION (type));
7249
7250 if (reduce_bit_field && modifier == EXPAND_STACK_PARM)
7251 target = 0;
7252
7253 /* Use subtarget as the target for operand 0 of a binary operation. */
7254 subtarget = get_subtarget (target);
7255 original_target = target;
7256
7257 switch (code)
7258 {
7259 case NON_LVALUE_EXPR:
7260 case PAREN_EXPR:
7261 CASE_CONVERT:
7262 if (treeop0 == error_mark_node)
7263 return const0_rtx;
7264
7265 if (TREE_CODE (type) == UNION_TYPE)
7266 {
7267 tree valtype = TREE_TYPE (treeop0);
7268
7269 /* If both input and output are BLKmode, this conversion isn't doing
7270 anything except possibly changing memory attribute. */
7271 if (mode == BLKmode && TYPE_MODE (valtype) == BLKmode)
7272 {
7273 rtx result = expand_expr (treeop0, target, tmode,
7274 modifier);
7275
7276 result = copy_rtx (result);
7277 set_mem_attributes (result, type, 0);
7278 return result;
7279 }
7280
7281 if (target == 0)
7282 {
7283 if (TYPE_MODE (type) != BLKmode)
7284 target = gen_reg_rtx (TYPE_MODE (type));
7285 else
7286 target = assign_temp (type, 0, 1, 1);
7287 }
7288
7289 if (MEM_P (target))
7290 /* Store data into beginning of memory target. */
7291 store_expr (treeop0,
7292 adjust_address (target, TYPE_MODE (valtype), 0),
7293 modifier == EXPAND_STACK_PARM,
7294 false);
7295
7296 else
7297 {
7298 gcc_assert (REG_P (target));
7299
7300 /* Store this field into a union of the proper type. */
7301 store_field (target,
7302 MIN ((int_size_in_bytes (TREE_TYPE
7303 (treeop0))
7304 * BITS_PER_UNIT),
7305 (HOST_WIDE_INT) GET_MODE_BITSIZE (mode)),
7306 0, TYPE_MODE (valtype), treeop0,
7307 type, 0, false);
7308 }
7309
7310 /* Return the entire union. */
7311 return target;
7312 }
7313
7314 if (mode == TYPE_MODE (TREE_TYPE (treeop0)))
7315 {
7316 op0 = expand_expr (treeop0, target, VOIDmode,
7317 modifier);
7318
7319 /* If the signedness of the conversion differs and OP0 is
7320 a promoted SUBREG, clear that indication since we now
7321 have to do the proper extension. */
7322 if (TYPE_UNSIGNED (TREE_TYPE (treeop0)) != unsignedp
7323 && GET_CODE (op0) == SUBREG)
7324 SUBREG_PROMOTED_VAR_P (op0) = 0;
7325
7326 return REDUCE_BIT_FIELD (op0);
7327 }
7328
7329 op0 = expand_expr (treeop0, NULL_RTX, mode,
7330 modifier == EXPAND_SUM ? EXPAND_NORMAL : modifier);
7331 if (GET_MODE (op0) == mode)
7332 ;
7333
7334 /* If OP0 is a constant, just convert it into the proper mode. */
7335 else if (CONSTANT_P (op0))
7336 {
7337 tree inner_type = TREE_TYPE (treeop0);
7338 enum machine_mode inner_mode = TYPE_MODE (inner_type);
7339
7340 if (modifier == EXPAND_INITIALIZER)
7341 op0 = simplify_gen_subreg (mode, op0, inner_mode,
7342 subreg_lowpart_offset (mode,
7343 inner_mode));
7344 else
7345 op0= convert_modes (mode, inner_mode, op0,
7346 TYPE_UNSIGNED (inner_type));
7347 }
7348
7349 else if (modifier == EXPAND_INITIALIZER)
7350 op0 = gen_rtx_fmt_e (unsignedp ? ZERO_EXTEND : SIGN_EXTEND, mode, op0);
7351
7352 else if (target == 0)
7353 op0 = convert_to_mode (mode, op0,
7354 TYPE_UNSIGNED (TREE_TYPE
7355 (treeop0)));
7356 else
7357 {
7358 convert_move (target, op0,
7359 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
7360 op0 = target;
7361 }
7362
7363 return REDUCE_BIT_FIELD (op0);
7364
7365 case ADDR_SPACE_CONVERT_EXPR:
7366 {
7367 tree treeop0_type = TREE_TYPE (treeop0);
7368 addr_space_t as_to;
7369 addr_space_t as_from;
7370
7371 gcc_assert (POINTER_TYPE_P (type));
7372 gcc_assert (POINTER_TYPE_P (treeop0_type));
7373
7374 as_to = TYPE_ADDR_SPACE (TREE_TYPE (type));
7375 as_from = TYPE_ADDR_SPACE (TREE_TYPE (treeop0_type));
7376
7377 /* Conversions between pointers to the same address space should
7378 have been implemented via CONVERT_EXPR / NOP_EXPR. */
7379 gcc_assert (as_to != as_from);
7380
7381 /* Ask target code to handle conversion between pointers
7382 to overlapping address spaces. */
7383 if (targetm.addr_space.subset_p (as_to, as_from)
7384 || targetm.addr_space.subset_p (as_from, as_to))
7385 {
7386 op0 = expand_expr (treeop0, NULL_RTX, VOIDmode, modifier);
7387 op0 = targetm.addr_space.convert (op0, treeop0_type, type);
7388 gcc_assert (op0);
7389 return op0;
7390 }
7391
7392 /* For disjoint address spaces, converting anything but
7393 a null pointer invokes undefined behaviour. We simply
7394 always return a null pointer here. */
7395 return CONST0_RTX (mode);
7396 }
7397
7398 case POINTER_PLUS_EXPR:
7399 /* Even though the sizetype mode and the pointer's mode can be different
7400 expand is able to handle this correctly and get the correct result out
7401 of the PLUS_EXPR code. */
7402 /* Make sure to sign-extend the sizetype offset in a POINTER_PLUS_EXPR
7403 if sizetype precision is smaller than pointer precision. */
7404 if (TYPE_PRECISION (sizetype) < TYPE_PRECISION (type))
7405 treeop1 = fold_convert_loc (loc, type,
7406 fold_convert_loc (loc, ssizetype,
7407 treeop1));
7408 case PLUS_EXPR:
7409 /* If we are adding a constant, a VAR_DECL that is sp, fp, or ap, and
7410 something else, make sure we add the register to the constant and
7411 then to the other thing. This case can occur during strength
7412 reduction and doing it this way will produce better code if the
7413 frame pointer or argument pointer is eliminated.
7414
7415 fold-const.c will ensure that the constant is always in the inner
7416 PLUS_EXPR, so the only case we need to do anything about is if
7417 sp, ap, or fp is our second argument, in which case we must swap
7418 the innermost first argument and our second argument. */
7419
7420 if (TREE_CODE (treeop0) == PLUS_EXPR
7421 && TREE_CODE (TREE_OPERAND (treeop0, 1)) == INTEGER_CST
7422 && TREE_CODE (treeop1) == VAR_DECL
7423 && (DECL_RTL (treeop1) == frame_pointer_rtx
7424 || DECL_RTL (treeop1) == stack_pointer_rtx
7425 || DECL_RTL (treeop1) == arg_pointer_rtx))
7426 {
7427 tree t = treeop1;
7428
7429 treeop1 = TREE_OPERAND (treeop0, 0);
7430 TREE_OPERAND (treeop0, 0) = t;
7431 }
7432
7433 /* If the result is to be ptr_mode and we are adding an integer to
7434 something, we might be forming a constant. So try to use
7435 plus_constant. If it produces a sum and we can't accept it,
7436 use force_operand. This allows P = &ARR[const] to generate
7437 efficient code on machines where a SYMBOL_REF is not a valid
7438 address.
7439
7440 If this is an EXPAND_SUM call, always return the sum. */
7441 if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER
7442 || (mode == ptr_mode && (unsignedp || ! flag_trapv)))
7443 {
7444 if (modifier == EXPAND_STACK_PARM)
7445 target = 0;
7446 if (TREE_CODE (treeop0) == INTEGER_CST
7447 && GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT
7448 && TREE_CONSTANT (treeop1))
7449 {
7450 rtx constant_part;
7451
7452 op1 = expand_expr (treeop1, subtarget, VOIDmode,
7453 EXPAND_SUM);
7454 /* Use immed_double_const to ensure that the constant is
7455 truncated according to the mode of OP1, then sign extended
7456 to a HOST_WIDE_INT. Using the constant directly can result
7457 in non-canonical RTL in a 64x32 cross compile. */
7458 constant_part
7459 = immed_double_const (TREE_INT_CST_LOW (treeop0),
7460 (HOST_WIDE_INT) 0,
7461 TYPE_MODE (TREE_TYPE (treeop1)));
7462 op1 = plus_constant (op1, INTVAL (constant_part));
7463 if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
7464 op1 = force_operand (op1, target);
7465 return REDUCE_BIT_FIELD (op1);
7466 }
7467
7468 else if (TREE_CODE (treeop1) == INTEGER_CST
7469 && GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT
7470 && TREE_CONSTANT (treeop0))
7471 {
7472 rtx constant_part;
7473
7474 op0 = expand_expr (treeop0, subtarget, VOIDmode,
7475 (modifier == EXPAND_INITIALIZER
7476 ? EXPAND_INITIALIZER : EXPAND_SUM));
7477 if (! CONSTANT_P (op0))
7478 {
7479 op1 = expand_expr (treeop1, NULL_RTX,
7480 VOIDmode, modifier);
7481 /* Return a PLUS if modifier says it's OK. */
7482 if (modifier == EXPAND_SUM
7483 || modifier == EXPAND_INITIALIZER)
7484 return simplify_gen_binary (PLUS, mode, op0, op1);
7485 goto binop2;
7486 }
7487 /* Use immed_double_const to ensure that the constant is
7488 truncated according to the mode of OP1, then sign extended
7489 to a HOST_WIDE_INT. Using the constant directly can result
7490 in non-canonical RTL in a 64x32 cross compile. */
7491 constant_part
7492 = immed_double_const (TREE_INT_CST_LOW (treeop1),
7493 (HOST_WIDE_INT) 0,
7494 TYPE_MODE (TREE_TYPE (treeop0)));
7495 op0 = plus_constant (op0, INTVAL (constant_part));
7496 if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
7497 op0 = force_operand (op0, target);
7498 return REDUCE_BIT_FIELD (op0);
7499 }
7500 }
7501
7502 /* Use TER to expand pointer addition of a negated value
7503 as pointer subtraction. */
7504 if ((POINTER_TYPE_P (TREE_TYPE (treeop0))
7505 || (TREE_CODE (TREE_TYPE (treeop0)) == VECTOR_TYPE
7506 && POINTER_TYPE_P (TREE_TYPE (TREE_TYPE (treeop0)))))
7507 && TREE_CODE (treeop1) == SSA_NAME
7508 && TYPE_MODE (TREE_TYPE (treeop0))
7509 == TYPE_MODE (TREE_TYPE (treeop1)))
7510 {
7511 gimple def = get_def_for_expr (treeop1, NEGATE_EXPR);
7512 if (def)
7513 {
7514 treeop1 = gimple_assign_rhs1 (def);
7515 code = MINUS_EXPR;
7516 goto do_minus;
7517 }
7518 }
7519
7520 /* No sense saving up arithmetic to be done
7521 if it's all in the wrong mode to form part of an address.
7522 And force_operand won't know whether to sign-extend or
7523 zero-extend. */
7524 if ((modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
7525 || mode != ptr_mode)
7526 {
7527 expand_operands (treeop0, treeop1,
7528 subtarget, &op0, &op1, EXPAND_NORMAL);
7529 if (op0 == const0_rtx)
7530 return op1;
7531 if (op1 == const0_rtx)
7532 return op0;
7533 goto binop2;
7534 }
7535
7536 expand_operands (treeop0, treeop1,
7537 subtarget, &op0, &op1, modifier);
7538 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1));
7539
7540 case MINUS_EXPR:
7541 do_minus:
7542 /* For initializers, we are allowed to return a MINUS of two
7543 symbolic constants. Here we handle all cases when both operands
7544 are constant. */
7545 /* Handle difference of two symbolic constants,
7546 for the sake of an initializer. */
7547 if ((modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
7548 && really_constant_p (treeop0)
7549 && really_constant_p (treeop1))
7550 {
7551 expand_operands (treeop0, treeop1,
7552 NULL_RTX, &op0, &op1, modifier);
7553
7554 /* If the last operand is a CONST_INT, use plus_constant of
7555 the negated constant. Else make the MINUS. */
7556 if (CONST_INT_P (op1))
7557 return REDUCE_BIT_FIELD (plus_constant (op0, - INTVAL (op1)));
7558 else
7559 return REDUCE_BIT_FIELD (gen_rtx_MINUS (mode, op0, op1));
7560 }
7561
7562 /* No sense saving up arithmetic to be done
7563 if it's all in the wrong mode to form part of an address.
7564 And force_operand won't know whether to sign-extend or
7565 zero-extend. */
7566 if ((modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
7567 || mode != ptr_mode)
7568 goto binop;
7569
7570 expand_operands (treeop0, treeop1,
7571 subtarget, &op0, &op1, modifier);
7572
7573 /* Convert A - const to A + (-const). */
7574 if (CONST_INT_P (op1))
7575 {
7576 op1 = negate_rtx (mode, op1);
7577 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1));
7578 }
7579
7580 goto binop2;
7581
7582 case WIDEN_MULT_PLUS_EXPR:
7583 case WIDEN_MULT_MINUS_EXPR:
7584 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
7585 op2 = expand_normal (treeop2);
7586 target = expand_widen_pattern_expr (ops, op0, op1, op2,
7587 target, unsignedp);
7588 return target;
7589
7590 case WIDEN_MULT_EXPR:
7591 /* If first operand is constant, swap them.
7592 Thus the following special case checks need only
7593 check the second operand. */
7594 if (TREE_CODE (treeop0) == INTEGER_CST)
7595 {
7596 tree t1 = treeop0;
7597 treeop0 = treeop1;
7598 treeop1 = t1;
7599 }
7600
7601 /* First, check if we have a multiplication of one signed and one
7602 unsigned operand. */
7603 if (TREE_CODE (treeop1) != INTEGER_CST
7604 && (TYPE_UNSIGNED (TREE_TYPE (treeop0))
7605 != TYPE_UNSIGNED (TREE_TYPE (treeop1))))
7606 {
7607 enum machine_mode innermode = TYPE_MODE (TREE_TYPE (treeop0));
7608 this_optab = usmul_widen_optab;
7609 if (mode == GET_MODE_2XWIDER_MODE (innermode))
7610 {
7611 if (optab_handler (this_optab, mode) != CODE_FOR_nothing)
7612 {
7613 if (TYPE_UNSIGNED (TREE_TYPE (treeop0)))
7614 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1,
7615 EXPAND_NORMAL);
7616 else
7617 expand_operands (treeop0, treeop1, NULL_RTX, &op1, &op0,
7618 EXPAND_NORMAL);
7619 goto binop3;
7620 }
7621 }
7622 }
7623 /* Check for a multiplication with matching signedness. */
7624 else if ((TREE_CODE (treeop1) == INTEGER_CST
7625 && int_fits_type_p (treeop1, TREE_TYPE (treeop0)))
7626 || (TYPE_UNSIGNED (TREE_TYPE (treeop1))
7627 == TYPE_UNSIGNED (TREE_TYPE (treeop0))))
7628 {
7629 tree op0type = TREE_TYPE (treeop0);
7630 enum machine_mode innermode = TYPE_MODE (op0type);
7631 bool zextend_p = TYPE_UNSIGNED (op0type);
7632 optab other_optab = zextend_p ? smul_widen_optab : umul_widen_optab;
7633 this_optab = zextend_p ? umul_widen_optab : smul_widen_optab;
7634
7635 if (mode == GET_MODE_2XWIDER_MODE (innermode)
7636 && TREE_CODE (treeop0) != INTEGER_CST)
7637 {
7638 if (optab_handler (this_optab, mode) != CODE_FOR_nothing)
7639 {
7640 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1,
7641 EXPAND_NORMAL);
7642 temp = expand_widening_mult (mode, op0, op1, target,
7643 unsignedp, this_optab);
7644 return REDUCE_BIT_FIELD (temp);
7645 }
7646 if (optab_handler (other_optab, mode) != CODE_FOR_nothing
7647 && innermode == word_mode)
7648 {
7649 rtx htem, hipart;
7650 op0 = expand_normal (treeop0);
7651 if (TREE_CODE (treeop1) == INTEGER_CST)
7652 op1 = convert_modes (innermode, mode,
7653 expand_normal (treeop1), unsignedp);
7654 else
7655 op1 = expand_normal (treeop1);
7656 temp = expand_binop (mode, other_optab, op0, op1, target,
7657 unsignedp, OPTAB_LIB_WIDEN);
7658 hipart = gen_highpart (innermode, temp);
7659 htem = expand_mult_highpart_adjust (innermode, hipart,
7660 op0, op1, hipart,
7661 zextend_p);
7662 if (htem != hipart)
7663 emit_move_insn (hipart, htem);
7664 return REDUCE_BIT_FIELD (temp);
7665 }
7666 }
7667 }
7668 treeop0 = fold_build1 (CONVERT_EXPR, type, treeop0);
7669 treeop1 = fold_build1 (CONVERT_EXPR, type, treeop1);
7670 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
7671 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, target, unsignedp));
7672
7673 case FMA_EXPR:
7674 {
7675 optab opt = fma_optab;
7676 gimple def0, def2;
7677
7678 /* If there is no insn for FMA, emit it as __builtin_fma{,f,l}
7679 call. */
7680 if (optab_handler (fma_optab, mode) == CODE_FOR_nothing)
7681 {
7682 tree fn = mathfn_built_in (TREE_TYPE (treeop0), BUILT_IN_FMA);
7683 tree call_expr;
7684
7685 gcc_assert (fn != NULL_TREE);
7686 call_expr = build_call_expr (fn, 3, treeop0, treeop1, treeop2);
7687 return expand_builtin (call_expr, target, subtarget, mode, false);
7688 }
7689
7690 def0 = get_def_for_expr (treeop0, NEGATE_EXPR);
7691 def2 = get_def_for_expr (treeop2, NEGATE_EXPR);
7692
7693 op0 = op2 = NULL;
7694
7695 if (def0 && def2
7696 && optab_handler (fnms_optab, mode) != CODE_FOR_nothing)
7697 {
7698 opt = fnms_optab;
7699 op0 = expand_normal (gimple_assign_rhs1 (def0));
7700 op2 = expand_normal (gimple_assign_rhs1 (def2));
7701 }
7702 else if (def0
7703 && optab_handler (fnma_optab, mode) != CODE_FOR_nothing)
7704 {
7705 opt = fnma_optab;
7706 op0 = expand_normal (gimple_assign_rhs1 (def0));
7707 }
7708 else if (def2
7709 && optab_handler (fms_optab, mode) != CODE_FOR_nothing)
7710 {
7711 opt = fms_optab;
7712 op2 = expand_normal (gimple_assign_rhs1 (def2));
7713 }
7714
7715 if (op0 == NULL)
7716 op0 = expand_expr (treeop0, subtarget, VOIDmode, EXPAND_NORMAL);
7717 if (op2 == NULL)
7718 op2 = expand_normal (treeop2);
7719 op1 = expand_normal (treeop1);
7720
7721 return expand_ternary_op (TYPE_MODE (type), opt,
7722 op0, op1, op2, target, 0);
7723 }
7724
7725 case MULT_EXPR:
7726 /* If this is a fixed-point operation, then we cannot use the code
7727 below because "expand_mult" doesn't support sat/no-sat fixed-point
7728 multiplications. */
7729 if (ALL_FIXED_POINT_MODE_P (mode))
7730 goto binop;
7731
7732 /* If first operand is constant, swap them.
7733 Thus the following special case checks need only
7734 check the second operand. */
7735 if (TREE_CODE (treeop0) == INTEGER_CST)
7736 {
7737 tree t1 = treeop0;
7738 treeop0 = treeop1;
7739 treeop1 = t1;
7740 }
7741
7742 /* Attempt to return something suitable for generating an
7743 indexed address, for machines that support that. */
7744
7745 if (modifier == EXPAND_SUM && mode == ptr_mode
7746 && host_integerp (treeop1, 0))
7747 {
7748 tree exp1 = treeop1;
7749
7750 op0 = expand_expr (treeop0, subtarget, VOIDmode,
7751 EXPAND_SUM);
7752
7753 if (!REG_P (op0))
7754 op0 = force_operand (op0, NULL_RTX);
7755 if (!REG_P (op0))
7756 op0 = copy_to_mode_reg (mode, op0);
7757
7758 return REDUCE_BIT_FIELD (gen_rtx_MULT (mode, op0,
7759 gen_int_mode (tree_low_cst (exp1, 0),
7760 TYPE_MODE (TREE_TYPE (exp1)))));
7761 }
7762
7763 if (modifier == EXPAND_STACK_PARM)
7764 target = 0;
7765
7766 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
7767 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, target, unsignedp));
7768
7769 case TRUNC_DIV_EXPR:
7770 case FLOOR_DIV_EXPR:
7771 case CEIL_DIV_EXPR:
7772 case ROUND_DIV_EXPR:
7773 case EXACT_DIV_EXPR:
7774 /* If this is a fixed-point operation, then we cannot use the code
7775 below because "expand_divmod" doesn't support sat/no-sat fixed-point
7776 divisions. */
7777 if (ALL_FIXED_POINT_MODE_P (mode))
7778 goto binop;
7779
7780 if (modifier == EXPAND_STACK_PARM)
7781 target = 0;
7782 /* Possible optimization: compute the dividend with EXPAND_SUM
7783 then if the divisor is constant can optimize the case
7784 where some terms of the dividend have coeffs divisible by it. */
7785 expand_operands (treeop0, treeop1,
7786 subtarget, &op0, &op1, EXPAND_NORMAL);
7787 return expand_divmod (0, code, mode, op0, op1, target, unsignedp);
7788
7789 case RDIV_EXPR:
7790 goto binop;
7791
7792 case TRUNC_MOD_EXPR:
7793 case FLOOR_MOD_EXPR:
7794 case CEIL_MOD_EXPR:
7795 case ROUND_MOD_EXPR:
7796 if (modifier == EXPAND_STACK_PARM)
7797 target = 0;
7798 expand_operands (treeop0, treeop1,
7799 subtarget, &op0, &op1, EXPAND_NORMAL);
7800 return expand_divmod (1, code, mode, op0, op1, target, unsignedp);
7801
7802 case FIXED_CONVERT_EXPR:
7803 op0 = expand_normal (treeop0);
7804 if (target == 0 || modifier == EXPAND_STACK_PARM)
7805 target = gen_reg_rtx (mode);
7806
7807 if ((TREE_CODE (TREE_TYPE (treeop0)) == INTEGER_TYPE
7808 && TYPE_UNSIGNED (TREE_TYPE (treeop0)))
7809 || (TREE_CODE (type) == INTEGER_TYPE && TYPE_UNSIGNED (type)))
7810 expand_fixed_convert (target, op0, 1, TYPE_SATURATING (type));
7811 else
7812 expand_fixed_convert (target, op0, 0, TYPE_SATURATING (type));
7813 return target;
7814
7815 case FIX_TRUNC_EXPR:
7816 op0 = expand_normal (treeop0);
7817 if (target == 0 || modifier == EXPAND_STACK_PARM)
7818 target = gen_reg_rtx (mode);
7819 expand_fix (target, op0, unsignedp);
7820 return target;
7821
7822 case FLOAT_EXPR:
7823 op0 = expand_normal (treeop0);
7824 if (target == 0 || modifier == EXPAND_STACK_PARM)
7825 target = gen_reg_rtx (mode);
7826 /* expand_float can't figure out what to do if FROM has VOIDmode.
7827 So give it the correct mode. With -O, cse will optimize this. */
7828 if (GET_MODE (op0) == VOIDmode)
7829 op0 = copy_to_mode_reg (TYPE_MODE (TREE_TYPE (treeop0)),
7830 op0);
7831 expand_float (target, op0,
7832 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
7833 return target;
7834
7835 case NEGATE_EXPR:
7836 op0 = expand_expr (treeop0, subtarget,
7837 VOIDmode, EXPAND_NORMAL);
7838 if (modifier == EXPAND_STACK_PARM)
7839 target = 0;
7840 temp = expand_unop (mode,
7841 optab_for_tree_code (NEGATE_EXPR, type,
7842 optab_default),
7843 op0, target, 0);
7844 gcc_assert (temp);
7845 return REDUCE_BIT_FIELD (temp);
7846
7847 case ABS_EXPR:
7848 op0 = expand_expr (treeop0, subtarget,
7849 VOIDmode, EXPAND_NORMAL);
7850 if (modifier == EXPAND_STACK_PARM)
7851 target = 0;
7852
7853 /* ABS_EXPR is not valid for complex arguments. */
7854 gcc_assert (GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
7855 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT);
7856
7857 /* Unsigned abs is simply the operand. Testing here means we don't
7858 risk generating incorrect code below. */
7859 if (TYPE_UNSIGNED (type))
7860 return op0;
7861
7862 return expand_abs (mode, op0, target, unsignedp,
7863 safe_from_p (target, treeop0, 1));
7864
7865 case MAX_EXPR:
7866 case MIN_EXPR:
7867 target = original_target;
7868 if (target == 0
7869 || modifier == EXPAND_STACK_PARM
7870 || (MEM_P (target) && MEM_VOLATILE_P (target))
7871 || GET_MODE (target) != mode
7872 || (REG_P (target)
7873 && REGNO (target) < FIRST_PSEUDO_REGISTER))
7874 target = gen_reg_rtx (mode);
7875 expand_operands (treeop0, treeop1,
7876 target, &op0, &op1, EXPAND_NORMAL);
7877
7878 /* First try to do it with a special MIN or MAX instruction.
7879 If that does not win, use a conditional jump to select the proper
7880 value. */
7881 this_optab = optab_for_tree_code (code, type, optab_default);
7882 temp = expand_binop (mode, this_optab, op0, op1, target, unsignedp,
7883 OPTAB_WIDEN);
7884 if (temp != 0)
7885 return temp;
7886
7887 /* At this point, a MEM target is no longer useful; we will get better
7888 code without it. */
7889
7890 if (! REG_P (target))
7891 target = gen_reg_rtx (mode);
7892
7893 /* If op1 was placed in target, swap op0 and op1. */
7894 if (target != op0 && target == op1)
7895 {
7896 temp = op0;
7897 op0 = op1;
7898 op1 = temp;
7899 }
7900
7901 /* We generate better code and avoid problems with op1 mentioning
7902 target by forcing op1 into a pseudo if it isn't a constant. */
7903 if (! CONSTANT_P (op1))
7904 op1 = force_reg (mode, op1);
7905
7906 {
7907 enum rtx_code comparison_code;
7908 rtx cmpop1 = op1;
7909
7910 if (code == MAX_EXPR)
7911 comparison_code = unsignedp ? GEU : GE;
7912 else
7913 comparison_code = unsignedp ? LEU : LE;
7914
7915 /* Canonicalize to comparisons against 0. */
7916 if (op1 == const1_rtx)
7917 {
7918 /* Converting (a >= 1 ? a : 1) into (a > 0 ? a : 1)
7919 or (a != 0 ? a : 1) for unsigned.
7920 For MIN we are safe converting (a <= 1 ? a : 1)
7921 into (a <= 0 ? a : 1) */
7922 cmpop1 = const0_rtx;
7923 if (code == MAX_EXPR)
7924 comparison_code = unsignedp ? NE : GT;
7925 }
7926 if (op1 == constm1_rtx && !unsignedp)
7927 {
7928 /* Converting (a >= -1 ? a : -1) into (a >= 0 ? a : -1)
7929 and (a <= -1 ? a : -1) into (a < 0 ? a : -1) */
7930 cmpop1 = const0_rtx;
7931 if (code == MIN_EXPR)
7932 comparison_code = LT;
7933 }
7934 #ifdef HAVE_conditional_move
7935 /* Use a conditional move if possible. */
7936 if (can_conditionally_move_p (mode))
7937 {
7938 rtx insn;
7939
7940 /* ??? Same problem as in expmed.c: emit_conditional_move
7941 forces a stack adjustment via compare_from_rtx, and we
7942 lose the stack adjustment if the sequence we are about
7943 to create is discarded. */
7944 do_pending_stack_adjust ();
7945
7946 start_sequence ();
7947
7948 /* Try to emit the conditional move. */
7949 insn = emit_conditional_move (target, comparison_code,
7950 op0, cmpop1, mode,
7951 op0, op1, mode,
7952 unsignedp);
7953
7954 /* If we could do the conditional move, emit the sequence,
7955 and return. */
7956 if (insn)
7957 {
7958 rtx seq = get_insns ();
7959 end_sequence ();
7960 emit_insn (seq);
7961 return target;
7962 }
7963
7964 /* Otherwise discard the sequence and fall back to code with
7965 branches. */
7966 end_sequence ();
7967 }
7968 #endif
7969 if (target != op0)
7970 emit_move_insn (target, op0);
7971
7972 temp = gen_label_rtx ();
7973 do_compare_rtx_and_jump (target, cmpop1, comparison_code,
7974 unsignedp, mode, NULL_RTX, NULL_RTX, temp,
7975 -1);
7976 }
7977 emit_move_insn (target, op1);
7978 emit_label (temp);
7979 return target;
7980
7981 case BIT_NOT_EXPR:
7982 op0 = expand_expr (treeop0, subtarget,
7983 VOIDmode, EXPAND_NORMAL);
7984 if (modifier == EXPAND_STACK_PARM)
7985 target = 0;
7986 temp = expand_unop (mode, one_cmpl_optab, op0, target, 1);
7987 gcc_assert (temp);
7988 return temp;
7989
7990 /* ??? Can optimize bitwise operations with one arg constant.
7991 Can optimize (a bitwise1 n) bitwise2 (a bitwise3 b)
7992 and (a bitwise1 b) bitwise2 b (etc)
7993 but that is probably not worth while. */
7994
7995 /* BIT_AND_EXPR is for bitwise anding. TRUTH_AND_EXPR is for anding two
7996 boolean values when we want in all cases to compute both of them. In
7997 general it is fastest to do TRUTH_AND_EXPR by computing both operands
7998 as actual zero-or-1 values and then bitwise anding. In cases where
7999 there cannot be any side effects, better code would be made by
8000 treating TRUTH_AND_EXPR like TRUTH_ANDIF_EXPR; but the question is
8001 how to recognize those cases. */
8002
8003 case TRUTH_AND_EXPR:
8004 code = BIT_AND_EXPR;
8005 case BIT_AND_EXPR:
8006 goto binop;
8007
8008 case TRUTH_OR_EXPR:
8009 code = BIT_IOR_EXPR;
8010 case BIT_IOR_EXPR:
8011 goto binop;
8012
8013 case TRUTH_XOR_EXPR:
8014 code = BIT_XOR_EXPR;
8015 case BIT_XOR_EXPR:
8016 goto binop;
8017
8018 case LROTATE_EXPR:
8019 case RROTATE_EXPR:
8020 gcc_assert (VECTOR_MODE_P (TYPE_MODE (type))
8021 || (GET_MODE_PRECISION (TYPE_MODE (type))
8022 == TYPE_PRECISION (type)));
8023 /* fall through */
8024
8025 case LSHIFT_EXPR:
8026 case RSHIFT_EXPR:
8027 /* If this is a fixed-point operation, then we cannot use the code
8028 below because "expand_shift" doesn't support sat/no-sat fixed-point
8029 shifts. */
8030 if (ALL_FIXED_POINT_MODE_P (mode))
8031 goto binop;
8032
8033 if (! safe_from_p (subtarget, treeop1, 1))
8034 subtarget = 0;
8035 if (modifier == EXPAND_STACK_PARM)
8036 target = 0;
8037 op0 = expand_expr (treeop0, subtarget,
8038 VOIDmode, EXPAND_NORMAL);
8039 temp = expand_shift (code, mode, op0, treeop1, target,
8040 unsignedp);
8041 if (code == LSHIFT_EXPR)
8042 temp = REDUCE_BIT_FIELD (temp);
8043 return temp;
8044
8045 /* Could determine the answer when only additive constants differ. Also,
8046 the addition of one can be handled by changing the condition. */
8047 case LT_EXPR:
8048 case LE_EXPR:
8049 case GT_EXPR:
8050 case GE_EXPR:
8051 case EQ_EXPR:
8052 case NE_EXPR:
8053 case UNORDERED_EXPR:
8054 case ORDERED_EXPR:
8055 case UNLT_EXPR:
8056 case UNLE_EXPR:
8057 case UNGT_EXPR:
8058 case UNGE_EXPR:
8059 case UNEQ_EXPR:
8060 case LTGT_EXPR:
8061 temp = do_store_flag (ops,
8062 modifier != EXPAND_STACK_PARM ? target : NULL_RTX,
8063 tmode != VOIDmode ? tmode : mode);
8064 if (temp)
8065 return temp;
8066
8067 /* Use a compare and a jump for BLKmode comparisons, or for function
8068 type comparisons is HAVE_canonicalize_funcptr_for_compare. */
8069
8070 if ((target == 0
8071 || modifier == EXPAND_STACK_PARM
8072 || ! safe_from_p (target, treeop0, 1)
8073 || ! safe_from_p (target, treeop1, 1)
8074 /* Make sure we don't have a hard reg (such as function's return
8075 value) live across basic blocks, if not optimizing. */
8076 || (!optimize && REG_P (target)
8077 && REGNO (target) < FIRST_PSEUDO_REGISTER)))
8078 target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode);
8079
8080 emit_move_insn (target, const0_rtx);
8081
8082 op1 = gen_label_rtx ();
8083 jumpifnot_1 (code, treeop0, treeop1, op1, -1);
8084
8085 emit_move_insn (target, const1_rtx);
8086
8087 emit_label (op1);
8088 return target;
8089
8090 case TRUTH_NOT_EXPR:
8091 if (modifier == EXPAND_STACK_PARM)
8092 target = 0;
8093 op0 = expand_expr (treeop0, target,
8094 VOIDmode, EXPAND_NORMAL);
8095 /* The parser is careful to generate TRUTH_NOT_EXPR
8096 only with operands that are always zero or one. */
8097 temp = expand_binop (mode, xor_optab, op0, const1_rtx,
8098 target, 1, OPTAB_LIB_WIDEN);
8099 gcc_assert (temp);
8100 return temp;
8101
8102 case COMPLEX_EXPR:
8103 /* Get the rtx code of the operands. */
8104 op0 = expand_normal (treeop0);
8105 op1 = expand_normal (treeop1);
8106
8107 if (!target)
8108 target = gen_reg_rtx (TYPE_MODE (type));
8109
8110 /* Move the real (op0) and imaginary (op1) parts to their location. */
8111 write_complex_part (target, op0, false);
8112 write_complex_part (target, op1, true);
8113
8114 return target;
8115
8116 case WIDEN_SUM_EXPR:
8117 {
8118 tree oprnd0 = treeop0;
8119 tree oprnd1 = treeop1;
8120
8121 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8122 target = expand_widen_pattern_expr (ops, op0, NULL_RTX, op1,
8123 target, unsignedp);
8124 return target;
8125 }
8126
8127 case REDUC_MAX_EXPR:
8128 case REDUC_MIN_EXPR:
8129 case REDUC_PLUS_EXPR:
8130 {
8131 op0 = expand_normal (treeop0);
8132 this_optab = optab_for_tree_code (code, type, optab_default);
8133 temp = expand_unop (mode, this_optab, op0, target, unsignedp);
8134 gcc_assert (temp);
8135 return temp;
8136 }
8137
8138 case VEC_EXTRACT_EVEN_EXPR:
8139 case VEC_EXTRACT_ODD_EXPR:
8140 {
8141 expand_operands (treeop0, treeop1,
8142 NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8143 this_optab = optab_for_tree_code (code, type, optab_default);
8144 temp = expand_binop (mode, this_optab, op0, op1, target, unsignedp,
8145 OPTAB_WIDEN);
8146 gcc_assert (temp);
8147 return temp;
8148 }
8149
8150 case VEC_INTERLEAVE_HIGH_EXPR:
8151 case VEC_INTERLEAVE_LOW_EXPR:
8152 {
8153 expand_operands (treeop0, treeop1,
8154 NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8155 this_optab = optab_for_tree_code (code, type, optab_default);
8156 temp = expand_binop (mode, this_optab, op0, op1, target, unsignedp,
8157 OPTAB_WIDEN);
8158 gcc_assert (temp);
8159 return temp;
8160 }
8161
8162 case VEC_LSHIFT_EXPR:
8163 case VEC_RSHIFT_EXPR:
8164 {
8165 target = expand_vec_shift_expr (ops, target);
8166 return target;
8167 }
8168
8169 case VEC_UNPACK_HI_EXPR:
8170 case VEC_UNPACK_LO_EXPR:
8171 {
8172 op0 = expand_normal (treeop0);
8173 this_optab = optab_for_tree_code (code, type, optab_default);
8174 temp = expand_widen_pattern_expr (ops, op0, NULL_RTX, NULL_RTX,
8175 target, unsignedp);
8176 gcc_assert (temp);
8177 return temp;
8178 }
8179
8180 case VEC_UNPACK_FLOAT_HI_EXPR:
8181 case VEC_UNPACK_FLOAT_LO_EXPR:
8182 {
8183 op0 = expand_normal (treeop0);
8184 /* The signedness is determined from input operand. */
8185 this_optab = optab_for_tree_code (code,
8186 TREE_TYPE (treeop0),
8187 optab_default);
8188 temp = expand_widen_pattern_expr
8189 (ops, op0, NULL_RTX, NULL_RTX,
8190 target, TYPE_UNSIGNED (TREE_TYPE (treeop0)));
8191
8192 gcc_assert (temp);
8193 return temp;
8194 }
8195
8196 case VEC_WIDEN_MULT_HI_EXPR:
8197 case VEC_WIDEN_MULT_LO_EXPR:
8198 {
8199 tree oprnd0 = treeop0;
8200 tree oprnd1 = treeop1;
8201
8202 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8203 target = expand_widen_pattern_expr (ops, op0, op1, NULL_RTX,
8204 target, unsignedp);
8205 gcc_assert (target);
8206 return target;
8207 }
8208
8209 case VEC_PACK_TRUNC_EXPR:
8210 case VEC_PACK_SAT_EXPR:
8211 case VEC_PACK_FIX_TRUNC_EXPR:
8212 mode = TYPE_MODE (TREE_TYPE (treeop0));
8213 goto binop;
8214
8215 case DOT_PROD_EXPR:
8216 {
8217 tree oprnd0 = treeop0;
8218 tree oprnd1 = treeop1;
8219 tree oprnd2 = treeop2;
8220 rtx op2;
8221
8222 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8223 op2 = expand_normal (oprnd2);
8224 target = expand_widen_pattern_expr (ops, op0, op1, op2,
8225 target, unsignedp);
8226 return target;
8227 }
8228
8229 case REALIGN_LOAD_EXPR:
8230 {
8231 tree oprnd0 = treeop0;
8232 tree oprnd1 = treeop1;
8233 tree oprnd2 = treeop2;
8234 rtx op2;
8235
8236 this_optab = optab_for_tree_code (code, type, optab_default);
8237 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8238 op2 = expand_normal (oprnd2);
8239 temp = expand_ternary_op (mode, this_optab, op0, op1, op2,
8240 target, unsignedp);
8241 gcc_assert (temp);
8242 return temp;
8243 }
8244
8245 default:
8246 gcc_unreachable ();
8247 }
8248
8249 /* Here to do an ordinary binary operator. */
8250 binop:
8251 expand_operands (treeop0, treeop1,
8252 subtarget, &op0, &op1, EXPAND_NORMAL);
8253 binop2:
8254 this_optab = optab_for_tree_code (code, type, optab_default);
8255 binop3:
8256 if (modifier == EXPAND_STACK_PARM)
8257 target = 0;
8258 temp = expand_binop (mode, this_optab, op0, op1, target,
8259 unsignedp, OPTAB_LIB_WIDEN);
8260 gcc_assert (temp);
8261 return REDUCE_BIT_FIELD (temp);
8262 }
8263 #undef REDUCE_BIT_FIELD
8264
8265 rtx
8266 expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode,
8267 enum expand_modifier modifier, rtx *alt_rtl)
8268 {
8269 rtx op0, op1, temp, decl_rtl;
8270 tree type;
8271 int unsignedp;
8272 enum machine_mode mode;
8273 enum tree_code code = TREE_CODE (exp);
8274 rtx subtarget, original_target;
8275 int ignore;
8276 tree context;
8277 bool reduce_bit_field;
8278 location_t loc = EXPR_LOCATION (exp);
8279 struct separate_ops ops;
8280 tree treeop0, treeop1, treeop2;
8281 tree ssa_name = NULL_TREE;
8282 gimple g;
8283
8284 type = TREE_TYPE (exp);
8285 mode = TYPE_MODE (type);
8286 unsignedp = TYPE_UNSIGNED (type);
8287
8288 treeop0 = treeop1 = treeop2 = NULL_TREE;
8289 if (!VL_EXP_CLASS_P (exp))
8290 switch (TREE_CODE_LENGTH (code))
8291 {
8292 default:
8293 case 3: treeop2 = TREE_OPERAND (exp, 2);
8294 case 2: treeop1 = TREE_OPERAND (exp, 1);
8295 case 1: treeop0 = TREE_OPERAND (exp, 0);
8296 case 0: break;
8297 }
8298 ops.code = code;
8299 ops.type = type;
8300 ops.op0 = treeop0;
8301 ops.op1 = treeop1;
8302 ops.op2 = treeop2;
8303 ops.location = loc;
8304
8305 ignore = (target == const0_rtx
8306 || ((CONVERT_EXPR_CODE_P (code)
8307 || code == COND_EXPR || code == VIEW_CONVERT_EXPR)
8308 && TREE_CODE (type) == VOID_TYPE));
8309
8310 /* An operation in what may be a bit-field type needs the
8311 result to be reduced to the precision of the bit-field type,
8312 which is narrower than that of the type's mode. */
8313 reduce_bit_field = (!ignore
8314 && TREE_CODE (type) == INTEGER_TYPE
8315 && GET_MODE_PRECISION (mode) > TYPE_PRECISION (type));
8316
8317 /* If we are going to ignore this result, we need only do something
8318 if there is a side-effect somewhere in the expression. If there
8319 is, short-circuit the most common cases here. Note that we must
8320 not call expand_expr with anything but const0_rtx in case this
8321 is an initial expansion of a size that contains a PLACEHOLDER_EXPR. */
8322
8323 if (ignore)
8324 {
8325 if (! TREE_SIDE_EFFECTS (exp))
8326 return const0_rtx;
8327
8328 /* Ensure we reference a volatile object even if value is ignored, but
8329 don't do this if all we are doing is taking its address. */
8330 if (TREE_THIS_VOLATILE (exp)
8331 && TREE_CODE (exp) != FUNCTION_DECL
8332 && mode != VOIDmode && mode != BLKmode
8333 && modifier != EXPAND_CONST_ADDRESS)
8334 {
8335 temp = expand_expr (exp, NULL_RTX, VOIDmode, modifier);
8336 if (MEM_P (temp))
8337 temp = copy_to_reg (temp);
8338 return const0_rtx;
8339 }
8340
8341 if (TREE_CODE_CLASS (code) == tcc_unary
8342 || code == COMPONENT_REF || code == INDIRECT_REF)
8343 return expand_expr (treeop0, const0_rtx, VOIDmode,
8344 modifier);
8345
8346 else if (TREE_CODE_CLASS (code) == tcc_binary
8347 || TREE_CODE_CLASS (code) == tcc_comparison
8348 || code == ARRAY_REF || code == ARRAY_RANGE_REF)
8349 {
8350 expand_expr (treeop0, const0_rtx, VOIDmode, modifier);
8351 expand_expr (treeop1, const0_rtx, VOIDmode, modifier);
8352 return const0_rtx;
8353 }
8354 else if (code == BIT_FIELD_REF)
8355 {
8356 expand_expr (treeop0, const0_rtx, VOIDmode, modifier);
8357 expand_expr (treeop1, const0_rtx, VOIDmode, modifier);
8358 expand_expr (treeop2, const0_rtx, VOIDmode, modifier);
8359 return const0_rtx;
8360 }
8361
8362 target = 0;
8363 }
8364
8365 if (reduce_bit_field && modifier == EXPAND_STACK_PARM)
8366 target = 0;
8367
8368 /* Use subtarget as the target for operand 0 of a binary operation. */
8369 subtarget = get_subtarget (target);
8370 original_target = target;
8371
8372 switch (code)
8373 {
8374 case LABEL_DECL:
8375 {
8376 tree function = decl_function_context (exp);
8377
8378 temp = label_rtx (exp);
8379 temp = gen_rtx_LABEL_REF (Pmode, temp);
8380
8381 if (function != current_function_decl
8382 && function != 0)
8383 LABEL_REF_NONLOCAL_P (temp) = 1;
8384
8385 temp = gen_rtx_MEM (FUNCTION_MODE, temp);
8386 return temp;
8387 }
8388
8389 case SSA_NAME:
8390 /* ??? ivopts calls expander, without any preparation from
8391 out-of-ssa. So fake instructions as if this was an access to the
8392 base variable. This unnecessarily allocates a pseudo, see how we can
8393 reuse it, if partition base vars have it set already. */
8394 if (!currently_expanding_to_rtl)
8395 return expand_expr_real_1 (SSA_NAME_VAR (exp), target, tmode, modifier,
8396 NULL);
8397
8398 g = get_gimple_for_ssa_name (exp);
8399 /* For EXPAND_INITIALIZER try harder to get something simpler. */
8400 if (g == NULL
8401 && modifier == EXPAND_INITIALIZER
8402 && !SSA_NAME_IS_DEFAULT_DEF (exp)
8403 && (optimize || DECL_IGNORED_P (SSA_NAME_VAR (exp)))
8404 && stmt_is_replaceable_p (SSA_NAME_DEF_STMT (exp)))
8405 g = SSA_NAME_DEF_STMT (exp);
8406 if (g)
8407 return expand_expr_real (gimple_assign_rhs_to_tree (g), target, tmode,
8408 modifier, NULL);
8409
8410 ssa_name = exp;
8411 decl_rtl = get_rtx_for_ssa_name (ssa_name);
8412 exp = SSA_NAME_VAR (ssa_name);
8413 goto expand_decl_rtl;
8414
8415 case PARM_DECL:
8416 case VAR_DECL:
8417 /* If a static var's type was incomplete when the decl was written,
8418 but the type is complete now, lay out the decl now. */
8419 if (DECL_SIZE (exp) == 0
8420 && COMPLETE_OR_UNBOUND_ARRAY_TYPE_P (TREE_TYPE (exp))
8421 && (TREE_STATIC (exp) || DECL_EXTERNAL (exp)))
8422 layout_decl (exp, 0);
8423
8424 /* ... fall through ... */
8425
8426 case FUNCTION_DECL:
8427 case RESULT_DECL:
8428 decl_rtl = DECL_RTL (exp);
8429 expand_decl_rtl:
8430 gcc_assert (decl_rtl);
8431 decl_rtl = copy_rtx (decl_rtl);
8432 /* Record writes to register variables. */
8433 if (modifier == EXPAND_WRITE && REG_P (decl_rtl)
8434 && REGNO (decl_rtl) < FIRST_PSEUDO_REGISTER)
8435 {
8436 int i = REGNO (decl_rtl);
8437 int nregs = hard_regno_nregs[i][GET_MODE (decl_rtl)];
8438 while (nregs)
8439 {
8440 SET_HARD_REG_BIT (crtl->asm_clobbers, i);
8441 i++;
8442 nregs--;
8443 }
8444 }
8445
8446 /* Ensure variable marked as used even if it doesn't go through
8447 a parser. If it hasn't be used yet, write out an external
8448 definition. */
8449 if (! TREE_USED (exp))
8450 {
8451 assemble_external (exp);
8452 TREE_USED (exp) = 1;
8453 }
8454
8455 /* Show we haven't gotten RTL for this yet. */
8456 temp = 0;
8457
8458 /* Variables inherited from containing functions should have
8459 been lowered by this point. */
8460 context = decl_function_context (exp);
8461 gcc_assert (!context
8462 || context == current_function_decl
8463 || TREE_STATIC (exp)
8464 || DECL_EXTERNAL (exp)
8465 /* ??? C++ creates functions that are not TREE_STATIC. */
8466 || TREE_CODE (exp) == FUNCTION_DECL);
8467
8468 /* This is the case of an array whose size is to be determined
8469 from its initializer, while the initializer is still being parsed.
8470 See expand_decl. */
8471
8472 if (MEM_P (decl_rtl) && REG_P (XEXP (decl_rtl, 0)))
8473 temp = validize_mem (decl_rtl);
8474
8475 /* If DECL_RTL is memory, we are in the normal case and the
8476 address is not valid, get the address into a register. */
8477
8478 else if (MEM_P (decl_rtl) && modifier != EXPAND_INITIALIZER)
8479 {
8480 if (alt_rtl)
8481 *alt_rtl = decl_rtl;
8482 decl_rtl = use_anchored_address (decl_rtl);
8483 if (modifier != EXPAND_CONST_ADDRESS
8484 && modifier != EXPAND_SUM
8485 && !memory_address_addr_space_p (DECL_MODE (exp),
8486 XEXP (decl_rtl, 0),
8487 MEM_ADDR_SPACE (decl_rtl)))
8488 temp = replace_equiv_address (decl_rtl,
8489 copy_rtx (XEXP (decl_rtl, 0)));
8490 }
8491
8492 /* If we got something, return it. But first, set the alignment
8493 if the address is a register. */
8494 if (temp != 0)
8495 {
8496 if (MEM_P (temp) && REG_P (XEXP (temp, 0)))
8497 mark_reg_pointer (XEXP (temp, 0), DECL_ALIGN (exp));
8498
8499 return temp;
8500 }
8501
8502 /* If the mode of DECL_RTL does not match that of the decl, it
8503 must be a promoted value. We return a SUBREG of the wanted mode,
8504 but mark it so that we know that it was already extended. */
8505 if (REG_P (decl_rtl) && GET_MODE (decl_rtl) != DECL_MODE (exp))
8506 {
8507 enum machine_mode pmode;
8508
8509 /* Get the signedness to be used for this variable. Ensure we get
8510 the same mode we got when the variable was declared. */
8511 if (code == SSA_NAME
8512 && (g = SSA_NAME_DEF_STMT (ssa_name))
8513 && gimple_code (g) == GIMPLE_CALL)
8514 pmode = promote_function_mode (type, mode, &unsignedp,
8515 TREE_TYPE
8516 (TREE_TYPE (gimple_call_fn (g))),
8517 2);
8518 else
8519 pmode = promote_decl_mode (exp, &unsignedp);
8520 gcc_assert (GET_MODE (decl_rtl) == pmode);
8521
8522 temp = gen_lowpart_SUBREG (mode, decl_rtl);
8523 SUBREG_PROMOTED_VAR_P (temp) = 1;
8524 SUBREG_PROMOTED_UNSIGNED_SET (temp, unsignedp);
8525 return temp;
8526 }
8527
8528 return decl_rtl;
8529
8530 case INTEGER_CST:
8531 temp = immed_double_const (TREE_INT_CST_LOW (exp),
8532 TREE_INT_CST_HIGH (exp), mode);
8533
8534 return temp;
8535
8536 case VECTOR_CST:
8537 {
8538 tree tmp = NULL_TREE;
8539 if (GET_MODE_CLASS (mode) == MODE_VECTOR_INT
8540 || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT
8541 || GET_MODE_CLASS (mode) == MODE_VECTOR_FRACT
8542 || GET_MODE_CLASS (mode) == MODE_VECTOR_UFRACT
8543 || GET_MODE_CLASS (mode) == MODE_VECTOR_ACCUM
8544 || GET_MODE_CLASS (mode) == MODE_VECTOR_UACCUM)
8545 return const_vector_from_tree (exp);
8546 if (GET_MODE_CLASS (mode) == MODE_INT)
8547 {
8548 tree type_for_mode = lang_hooks.types.type_for_mode (mode, 1);
8549 if (type_for_mode)
8550 tmp = fold_unary_loc (loc, VIEW_CONVERT_EXPR, type_for_mode, exp);
8551 }
8552 if (!tmp)
8553 tmp = build_constructor_from_list (type,
8554 TREE_VECTOR_CST_ELTS (exp));
8555 return expand_expr (tmp, ignore ? const0_rtx : target,
8556 tmode, modifier);
8557 }
8558
8559 case CONST_DECL:
8560 return expand_expr (DECL_INITIAL (exp), target, VOIDmode, modifier);
8561
8562 case REAL_CST:
8563 /* If optimized, generate immediate CONST_DOUBLE
8564 which will be turned into memory by reload if necessary.
8565
8566 We used to force a register so that loop.c could see it. But
8567 this does not allow gen_* patterns to perform optimizations with
8568 the constants. It also produces two insns in cases like "x = 1.0;".
8569 On most machines, floating-point constants are not permitted in
8570 many insns, so we'd end up copying it to a register in any case.
8571
8572 Now, we do the copying in expand_binop, if appropriate. */
8573 return CONST_DOUBLE_FROM_REAL_VALUE (TREE_REAL_CST (exp),
8574 TYPE_MODE (TREE_TYPE (exp)));
8575
8576 case FIXED_CST:
8577 return CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (exp),
8578 TYPE_MODE (TREE_TYPE (exp)));
8579
8580 case COMPLEX_CST:
8581 /* Handle evaluating a complex constant in a CONCAT target. */
8582 if (original_target && GET_CODE (original_target) == CONCAT)
8583 {
8584 enum machine_mode mode = TYPE_MODE (TREE_TYPE (TREE_TYPE (exp)));
8585 rtx rtarg, itarg;
8586
8587 rtarg = XEXP (original_target, 0);
8588 itarg = XEXP (original_target, 1);
8589
8590 /* Move the real and imaginary parts separately. */
8591 op0 = expand_expr (TREE_REALPART (exp), rtarg, mode, EXPAND_NORMAL);
8592 op1 = expand_expr (TREE_IMAGPART (exp), itarg, mode, EXPAND_NORMAL);
8593
8594 if (op0 != rtarg)
8595 emit_move_insn (rtarg, op0);
8596 if (op1 != itarg)
8597 emit_move_insn (itarg, op1);
8598
8599 return original_target;
8600 }
8601
8602 /* ... fall through ... */
8603
8604 case STRING_CST:
8605 temp = expand_expr_constant (exp, 1, modifier);
8606
8607 /* temp contains a constant address.
8608 On RISC machines where a constant address isn't valid,
8609 make some insns to get that address into a register. */
8610 if (modifier != EXPAND_CONST_ADDRESS
8611 && modifier != EXPAND_INITIALIZER
8612 && modifier != EXPAND_SUM
8613 && ! memory_address_addr_space_p (mode, XEXP (temp, 0),
8614 MEM_ADDR_SPACE (temp)))
8615 return replace_equiv_address (temp,
8616 copy_rtx (XEXP (temp, 0)));
8617 return temp;
8618
8619 case SAVE_EXPR:
8620 {
8621 tree val = treeop0;
8622 rtx ret = expand_expr_real_1 (val, target, tmode, modifier, alt_rtl);
8623
8624 if (!SAVE_EXPR_RESOLVED_P (exp))
8625 {
8626 /* We can indeed still hit this case, typically via builtin
8627 expanders calling save_expr immediately before expanding
8628 something. Assume this means that we only have to deal
8629 with non-BLKmode values. */
8630 gcc_assert (GET_MODE (ret) != BLKmode);
8631
8632 val = build_decl (EXPR_LOCATION (exp),
8633 VAR_DECL, NULL, TREE_TYPE (exp));
8634 DECL_ARTIFICIAL (val) = 1;
8635 DECL_IGNORED_P (val) = 1;
8636 treeop0 = val;
8637 TREE_OPERAND (exp, 0) = treeop0;
8638 SAVE_EXPR_RESOLVED_P (exp) = 1;
8639
8640 if (!CONSTANT_P (ret))
8641 ret = copy_to_reg (ret);
8642 SET_DECL_RTL (val, ret);
8643 }
8644
8645 return ret;
8646 }
8647
8648
8649 case CONSTRUCTOR:
8650 /* If we don't need the result, just ensure we evaluate any
8651 subexpressions. */
8652 if (ignore)
8653 {
8654 unsigned HOST_WIDE_INT idx;
8655 tree value;
8656
8657 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value)
8658 expand_expr (value, const0_rtx, VOIDmode, EXPAND_NORMAL);
8659
8660 return const0_rtx;
8661 }
8662
8663 return expand_constructor (exp, target, modifier, false);
8664
8665 case TARGET_MEM_REF:
8666 {
8667 addr_space_t as = TYPE_ADDR_SPACE (TREE_TYPE (exp));
8668 struct mem_address addr;
8669 int icode, align;
8670
8671 get_address_description (exp, &addr);
8672 op0 = addr_for_mem_ref (&addr, as, true);
8673 op0 = memory_address_addr_space (mode, op0, as);
8674 temp = gen_rtx_MEM (mode, op0);
8675 set_mem_attributes (temp, exp, 0);
8676 set_mem_addr_space (temp, as);
8677 align = MAX (TYPE_ALIGN (TREE_TYPE (exp)),
8678 get_object_alignment (exp, BIGGEST_ALIGNMENT));
8679 if (mode != BLKmode
8680 && (unsigned) align < GET_MODE_ALIGNMENT (mode)
8681 /* If the target does not have special handling for unaligned
8682 loads of mode then it can use regular moves for them. */
8683 && ((icode = optab_handler (movmisalign_optab, mode))
8684 != CODE_FOR_nothing))
8685 {
8686 rtx reg, insn;
8687
8688 /* We've already validated the memory, and we're creating a
8689 new pseudo destination. The predicates really can't fail. */
8690 reg = gen_reg_rtx (mode);
8691
8692 /* Nor can the insn generator. */
8693 insn = GEN_FCN (icode) (reg, temp);
8694 gcc_assert (insn != NULL_RTX);
8695 emit_insn (insn);
8696
8697 return reg;
8698 }
8699 return temp;
8700 }
8701
8702 case MEM_REF:
8703 {
8704 addr_space_t as
8705 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 1))));
8706 enum machine_mode address_mode;
8707 tree base = TREE_OPERAND (exp, 0);
8708 gimple def_stmt;
8709 int icode, align;
8710 /* Handle expansion of non-aliased memory with non-BLKmode. That
8711 might end up in a register. */
8712 if (TREE_CODE (base) == ADDR_EXPR)
8713 {
8714 HOST_WIDE_INT offset = mem_ref_offset (exp).low;
8715 tree bit_offset;
8716 base = TREE_OPERAND (base, 0);
8717 if (!DECL_P (base))
8718 {
8719 HOST_WIDE_INT off;
8720 base = get_addr_base_and_unit_offset (base, &off);
8721 gcc_assert (base);
8722 offset += off;
8723 }
8724 /* If we are expanding a MEM_REF of a non-BLKmode non-addressable
8725 decl we must use bitfield operations. */
8726 if (DECL_P (base)
8727 && !TREE_ADDRESSABLE (base)
8728 && DECL_MODE (base) != BLKmode
8729 && DECL_RTL_SET_P (base)
8730 && !MEM_P (DECL_RTL (base)))
8731 {
8732 tree bftype;
8733 if (offset == 0
8734 && host_integerp (TYPE_SIZE (TREE_TYPE (exp)), 1)
8735 && (GET_MODE_BITSIZE (DECL_MODE (base))
8736 == TREE_INT_CST_LOW (TYPE_SIZE (TREE_TYPE (exp)))))
8737 return expand_expr (build1 (VIEW_CONVERT_EXPR,
8738 TREE_TYPE (exp), base),
8739 target, tmode, modifier);
8740 bit_offset = bitsize_int (offset * BITS_PER_UNIT);
8741 bftype = TREE_TYPE (base);
8742 if (TYPE_MODE (TREE_TYPE (exp)) != BLKmode)
8743 bftype = TREE_TYPE (exp);
8744 return expand_expr (build3 (BIT_FIELD_REF, bftype,
8745 base,
8746 TYPE_SIZE (TREE_TYPE (exp)),
8747 bit_offset),
8748 target, tmode, modifier);
8749 }
8750 }
8751 address_mode = targetm.addr_space.address_mode (as);
8752 base = TREE_OPERAND (exp, 0);
8753 if ((def_stmt = get_def_for_expr (base, BIT_AND_EXPR)))
8754 {
8755 tree mask = gimple_assign_rhs2 (def_stmt);
8756 base = build2 (BIT_AND_EXPR, TREE_TYPE (base),
8757 gimple_assign_rhs1 (def_stmt), mask);
8758 TREE_OPERAND (exp, 0) = base;
8759 }
8760 align = MAX (TYPE_ALIGN (TREE_TYPE (exp)),
8761 get_object_alignment (exp, BIGGEST_ALIGNMENT));
8762 op0 = expand_expr (base, NULL_RTX, VOIDmode, EXPAND_SUM);
8763 op0 = memory_address_addr_space (address_mode, op0, as);
8764 if (!integer_zerop (TREE_OPERAND (exp, 1)))
8765 {
8766 rtx off
8767 = immed_double_int_const (mem_ref_offset (exp), address_mode);
8768 op0 = simplify_gen_binary (PLUS, address_mode, op0, off);
8769 }
8770 op0 = memory_address_addr_space (mode, op0, as);
8771 temp = gen_rtx_MEM (mode, op0);
8772 set_mem_attributes (temp, exp, 0);
8773 set_mem_addr_space (temp, as);
8774 if (TREE_THIS_VOLATILE (exp))
8775 MEM_VOLATILE_P (temp) = 1;
8776 if (mode != BLKmode
8777 && (unsigned) align < GET_MODE_ALIGNMENT (mode)
8778 /* If the target does not have special handling for unaligned
8779 loads of mode then it can use regular moves for them. */
8780 && ((icode = optab_handler (movmisalign_optab, mode))
8781 != CODE_FOR_nothing))
8782 {
8783 rtx reg, insn;
8784
8785 /* We've already validated the memory, and we're creating a
8786 new pseudo destination. The predicates really can't fail. */
8787 reg = gen_reg_rtx (mode);
8788
8789 /* Nor can the insn generator. */
8790 insn = GEN_FCN (icode) (reg, temp);
8791 emit_insn (insn);
8792
8793 return reg;
8794 }
8795 return temp;
8796 }
8797
8798 case ARRAY_REF:
8799
8800 {
8801 tree array = treeop0;
8802 tree index = treeop1;
8803
8804 /* Fold an expression like: "foo"[2].
8805 This is not done in fold so it won't happen inside &.
8806 Don't fold if this is for wide characters since it's too
8807 difficult to do correctly and this is a very rare case. */
8808
8809 if (modifier != EXPAND_CONST_ADDRESS
8810 && modifier != EXPAND_INITIALIZER
8811 && modifier != EXPAND_MEMORY)
8812 {
8813 tree t = fold_read_from_constant_string (exp);
8814
8815 if (t)
8816 return expand_expr (t, target, tmode, modifier);
8817 }
8818
8819 /* If this is a constant index into a constant array,
8820 just get the value from the array. Handle both the cases when
8821 we have an explicit constructor and when our operand is a variable
8822 that was declared const. */
8823
8824 if (modifier != EXPAND_CONST_ADDRESS
8825 && modifier != EXPAND_INITIALIZER
8826 && modifier != EXPAND_MEMORY
8827 && TREE_CODE (array) == CONSTRUCTOR
8828 && ! TREE_SIDE_EFFECTS (array)
8829 && TREE_CODE (index) == INTEGER_CST)
8830 {
8831 unsigned HOST_WIDE_INT ix;
8832 tree field, value;
8833
8834 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (array), ix,
8835 field, value)
8836 if (tree_int_cst_equal (field, index))
8837 {
8838 if (!TREE_SIDE_EFFECTS (value))
8839 return expand_expr (fold (value), target, tmode, modifier);
8840 break;
8841 }
8842 }
8843
8844 else if (optimize >= 1
8845 && modifier != EXPAND_CONST_ADDRESS
8846 && modifier != EXPAND_INITIALIZER
8847 && modifier != EXPAND_MEMORY
8848 && TREE_READONLY (array) && ! TREE_SIDE_EFFECTS (array)
8849 && TREE_CODE (array) == VAR_DECL && DECL_INITIAL (array)
8850 && TREE_CODE (DECL_INITIAL (array)) != ERROR_MARK
8851 && const_value_known_p (array))
8852 {
8853 if (TREE_CODE (index) == INTEGER_CST)
8854 {
8855 tree init = DECL_INITIAL (array);
8856
8857 if (TREE_CODE (init) == CONSTRUCTOR)
8858 {
8859 unsigned HOST_WIDE_INT ix;
8860 tree field, value;
8861
8862 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (init), ix,
8863 field, value)
8864 if (tree_int_cst_equal (field, index))
8865 {
8866 if (TREE_SIDE_EFFECTS (value))
8867 break;
8868
8869 if (TREE_CODE (value) == CONSTRUCTOR)
8870 {
8871 /* If VALUE is a CONSTRUCTOR, this
8872 optimization is only useful if
8873 this doesn't store the CONSTRUCTOR
8874 into memory. If it does, it is more
8875 efficient to just load the data from
8876 the array directly. */
8877 rtx ret = expand_constructor (value, target,
8878 modifier, true);
8879 if (ret == NULL_RTX)
8880 break;
8881 }
8882
8883 return expand_expr (fold (value), target, tmode,
8884 modifier);
8885 }
8886 }
8887 else if(TREE_CODE (init) == STRING_CST)
8888 {
8889 tree index1 = index;
8890 tree low_bound = array_ref_low_bound (exp);
8891 index1 = fold_convert_loc (loc, sizetype,
8892 treeop1);
8893
8894 /* Optimize the special-case of a zero lower bound.
8895
8896 We convert the low_bound to sizetype to avoid some problems
8897 with constant folding. (E.g. suppose the lower bound is 1,
8898 and its mode is QI. Without the conversion,l (ARRAY
8899 +(INDEX-(unsigned char)1)) becomes ((ARRAY+(-(unsigned char)1))
8900 +INDEX), which becomes (ARRAY+255+INDEX). Opps!) */
8901
8902 if (! integer_zerop (low_bound))
8903 index1 = size_diffop_loc (loc, index1,
8904 fold_convert_loc (loc, sizetype,
8905 low_bound));
8906
8907 if (0 > compare_tree_int (index1,
8908 TREE_STRING_LENGTH (init)))
8909 {
8910 tree type = TREE_TYPE (TREE_TYPE (init));
8911 enum machine_mode mode = TYPE_MODE (type);
8912
8913 if (GET_MODE_CLASS (mode) == MODE_INT
8914 && GET_MODE_SIZE (mode) == 1)
8915 return gen_int_mode (TREE_STRING_POINTER (init)
8916 [TREE_INT_CST_LOW (index1)],
8917 mode);
8918 }
8919 }
8920 }
8921 }
8922 }
8923 goto normal_inner_ref;
8924
8925 case COMPONENT_REF:
8926 /* If the operand is a CONSTRUCTOR, we can just extract the
8927 appropriate field if it is present. */
8928 if (TREE_CODE (treeop0) == CONSTRUCTOR)
8929 {
8930 unsigned HOST_WIDE_INT idx;
8931 tree field, value;
8932
8933 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (treeop0),
8934 idx, field, value)
8935 if (field == treeop1
8936 /* We can normally use the value of the field in the
8937 CONSTRUCTOR. However, if this is a bitfield in
8938 an integral mode that we can fit in a HOST_WIDE_INT,
8939 we must mask only the number of bits in the bitfield,
8940 since this is done implicitly by the constructor. If
8941 the bitfield does not meet either of those conditions,
8942 we can't do this optimization. */
8943 && (! DECL_BIT_FIELD (field)
8944 || ((GET_MODE_CLASS (DECL_MODE (field)) == MODE_INT)
8945 && (GET_MODE_BITSIZE (DECL_MODE (field))
8946 <= HOST_BITS_PER_WIDE_INT))))
8947 {
8948 if (DECL_BIT_FIELD (field)
8949 && modifier == EXPAND_STACK_PARM)
8950 target = 0;
8951 op0 = expand_expr (value, target, tmode, modifier);
8952 if (DECL_BIT_FIELD (field))
8953 {
8954 HOST_WIDE_INT bitsize = TREE_INT_CST_LOW (DECL_SIZE (field));
8955 enum machine_mode imode = TYPE_MODE (TREE_TYPE (field));
8956
8957 if (TYPE_UNSIGNED (TREE_TYPE (field)))
8958 {
8959 op1 = GEN_INT (((HOST_WIDE_INT) 1 << bitsize) - 1);
8960 op0 = expand_and (imode, op0, op1, target);
8961 }
8962 else
8963 {
8964 tree count
8965 = build_int_cst (NULL_TREE,
8966 GET_MODE_BITSIZE (imode) - bitsize);
8967
8968 op0 = expand_shift (LSHIFT_EXPR, imode, op0, count,
8969 target, 0);
8970 op0 = expand_shift (RSHIFT_EXPR, imode, op0, count,
8971 target, 0);
8972 }
8973 }
8974
8975 return op0;
8976 }
8977 }
8978 goto normal_inner_ref;
8979
8980 case BIT_FIELD_REF:
8981 case ARRAY_RANGE_REF:
8982 normal_inner_ref:
8983 {
8984 enum machine_mode mode1, mode2;
8985 HOST_WIDE_INT bitsize, bitpos;
8986 tree offset;
8987 int volatilep = 0, must_force_mem;
8988 bool packedp = false;
8989 tree tem = get_inner_reference (exp, &bitsize, &bitpos, &offset,
8990 &mode1, &unsignedp, &volatilep, true);
8991 rtx orig_op0, memloc;
8992
8993 /* If we got back the original object, something is wrong. Perhaps
8994 we are evaluating an expression too early. In any event, don't
8995 infinitely recurse. */
8996 gcc_assert (tem != exp);
8997
8998 if (TYPE_PACKED (TREE_TYPE (TREE_OPERAND (exp, 0)))
8999 || (TREE_CODE (TREE_OPERAND (exp, 1)) == FIELD_DECL
9000 && DECL_PACKED (TREE_OPERAND (exp, 1))))
9001 packedp = true;
9002
9003 /* If TEM's type is a union of variable size, pass TARGET to the inner
9004 computation, since it will need a temporary and TARGET is known
9005 to have to do. This occurs in unchecked conversion in Ada. */
9006 orig_op0 = op0
9007 = expand_expr (tem,
9008 (TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE
9009 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem)))
9010 != INTEGER_CST)
9011 && modifier != EXPAND_STACK_PARM
9012 ? target : NULL_RTX),
9013 VOIDmode,
9014 (modifier == EXPAND_INITIALIZER
9015 || modifier == EXPAND_CONST_ADDRESS
9016 || modifier == EXPAND_STACK_PARM)
9017 ? modifier : EXPAND_NORMAL);
9018
9019
9020 /* If the bitfield is volatile, we want to access it in the
9021 field's mode, not the computed mode.
9022 If a MEM has VOIDmode (external with incomplete type),
9023 use BLKmode for it instead. */
9024 if (MEM_P (op0))
9025 {
9026 if (volatilep && flag_strict_volatile_bitfields > 0)
9027 op0 = adjust_address (op0, mode1, 0);
9028 else if (GET_MODE (op0) == VOIDmode)
9029 op0 = adjust_address (op0, BLKmode, 0);
9030 }
9031
9032 mode2
9033 = CONSTANT_P (op0) ? TYPE_MODE (TREE_TYPE (tem)) : GET_MODE (op0);
9034
9035 /* If we have either an offset, a BLKmode result, or a reference
9036 outside the underlying object, we must force it to memory.
9037 Such a case can occur in Ada if we have unchecked conversion
9038 of an expression from a scalar type to an aggregate type or
9039 for an ARRAY_RANGE_REF whose type is BLKmode, or if we were
9040 passed a partially uninitialized object or a view-conversion
9041 to a larger size. */
9042 must_force_mem = (offset
9043 || mode1 == BLKmode
9044 || bitpos + bitsize > GET_MODE_BITSIZE (mode2));
9045
9046 /* Handle CONCAT first. */
9047 if (GET_CODE (op0) == CONCAT && !must_force_mem)
9048 {
9049 if (bitpos == 0
9050 && bitsize == GET_MODE_BITSIZE (GET_MODE (op0)))
9051 return op0;
9052 if (bitpos == 0
9053 && bitsize == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 0)))
9054 && bitsize)
9055 {
9056 op0 = XEXP (op0, 0);
9057 mode2 = GET_MODE (op0);
9058 }
9059 else if (bitpos == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 0)))
9060 && bitsize == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 1)))
9061 && bitpos
9062 && bitsize)
9063 {
9064 op0 = XEXP (op0, 1);
9065 bitpos = 0;
9066 mode2 = GET_MODE (op0);
9067 }
9068 else
9069 /* Otherwise force into memory. */
9070 must_force_mem = 1;
9071 }
9072
9073 /* If this is a constant, put it in a register if it is a legitimate
9074 constant and we don't need a memory reference. */
9075 if (CONSTANT_P (op0)
9076 && mode2 != BLKmode
9077 && LEGITIMATE_CONSTANT_P (op0)
9078 && !must_force_mem)
9079 op0 = force_reg (mode2, op0);
9080
9081 /* Otherwise, if this is a constant, try to force it to the constant
9082 pool. Note that back-ends, e.g. MIPS, may refuse to do so if it
9083 is a legitimate constant. */
9084 else if (CONSTANT_P (op0) && (memloc = force_const_mem (mode2, op0)))
9085 op0 = validize_mem (memloc);
9086
9087 /* Otherwise, if this is a constant or the object is not in memory
9088 and need be, put it there. */
9089 else if (CONSTANT_P (op0) || (!MEM_P (op0) && must_force_mem))
9090 {
9091 tree nt = build_qualified_type (TREE_TYPE (tem),
9092 (TYPE_QUALS (TREE_TYPE (tem))
9093 | TYPE_QUAL_CONST));
9094 memloc = assign_temp (nt, 1, 1, 1);
9095 emit_move_insn (memloc, op0);
9096 op0 = memloc;
9097 }
9098
9099 if (offset)
9100 {
9101 enum machine_mode address_mode;
9102 rtx offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode,
9103 EXPAND_SUM);
9104
9105 gcc_assert (MEM_P (op0));
9106
9107 address_mode
9108 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (op0));
9109 if (GET_MODE (offset_rtx) != address_mode)
9110 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
9111
9112 if (GET_MODE (op0) == BLKmode
9113 /* A constant address in OP0 can have VOIDmode, we must
9114 not try to call force_reg in that case. */
9115 && GET_MODE (XEXP (op0, 0)) != VOIDmode
9116 && bitsize != 0
9117 && (bitpos % bitsize) == 0
9118 && (bitsize % GET_MODE_ALIGNMENT (mode1)) == 0
9119 && MEM_ALIGN (op0) == GET_MODE_ALIGNMENT (mode1))
9120 {
9121 op0 = adjust_address (op0, mode1, bitpos / BITS_PER_UNIT);
9122 bitpos = 0;
9123 }
9124
9125 op0 = offset_address (op0, offset_rtx,
9126 highest_pow2_factor (offset));
9127 }
9128
9129 /* If OFFSET is making OP0 more aligned than BIGGEST_ALIGNMENT,
9130 record its alignment as BIGGEST_ALIGNMENT. */
9131 if (MEM_P (op0) && bitpos == 0 && offset != 0
9132 && is_aligning_offset (offset, tem))
9133 set_mem_align (op0, BIGGEST_ALIGNMENT);
9134
9135 /* Don't forget about volatility even if this is a bitfield. */
9136 if (MEM_P (op0) && volatilep && ! MEM_VOLATILE_P (op0))
9137 {
9138 if (op0 == orig_op0)
9139 op0 = copy_rtx (op0);
9140
9141 MEM_VOLATILE_P (op0) = 1;
9142 }
9143
9144 /* In cases where an aligned union has an unaligned object
9145 as a field, we might be extracting a BLKmode value from
9146 an integer-mode (e.g., SImode) object. Handle this case
9147 by doing the extract into an object as wide as the field
9148 (which we know to be the width of a basic mode), then
9149 storing into memory, and changing the mode to BLKmode. */
9150 if (mode1 == VOIDmode
9151 || REG_P (op0) || GET_CODE (op0) == SUBREG
9152 || (mode1 != BLKmode && ! direct_load[(int) mode1]
9153 && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
9154 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT
9155 && modifier != EXPAND_CONST_ADDRESS
9156 && modifier != EXPAND_INITIALIZER)
9157 /* If the field is volatile, we always want an aligned
9158 access. Only do this if the access is not already naturally
9159 aligned, otherwise "normal" (non-bitfield) volatile fields
9160 become non-addressable. */
9161 || (volatilep && flag_strict_volatile_bitfields > 0
9162 && (bitpos % GET_MODE_ALIGNMENT (mode) != 0))
9163 /* If the field isn't aligned enough to fetch as a memref,
9164 fetch it as a bit field. */
9165 || (mode1 != BLKmode
9166 && (((TYPE_ALIGN (TREE_TYPE (tem)) < GET_MODE_ALIGNMENT (mode)
9167 || (bitpos % GET_MODE_ALIGNMENT (mode) != 0)
9168 || (MEM_P (op0)
9169 && (MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode1)
9170 || (bitpos % GET_MODE_ALIGNMENT (mode1) != 0))))
9171 && ((modifier == EXPAND_CONST_ADDRESS
9172 || modifier == EXPAND_INITIALIZER)
9173 ? STRICT_ALIGNMENT
9174 : SLOW_UNALIGNED_ACCESS (mode1, MEM_ALIGN (op0))))
9175 || (bitpos % BITS_PER_UNIT != 0)))
9176 /* If the type and the field are a constant size and the
9177 size of the type isn't the same size as the bitfield,
9178 we must use bitfield operations. */
9179 || (bitsize >= 0
9180 && TYPE_SIZE (TREE_TYPE (exp))
9181 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
9182 && 0 != compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)),
9183 bitsize)))
9184 {
9185 enum machine_mode ext_mode = mode;
9186
9187 if (ext_mode == BLKmode
9188 && ! (target != 0 && MEM_P (op0)
9189 && MEM_P (target)
9190 && bitpos % BITS_PER_UNIT == 0))
9191 ext_mode = mode_for_size (bitsize, MODE_INT, 1);
9192
9193 if (ext_mode == BLKmode)
9194 {
9195 if (target == 0)
9196 target = assign_temp (type, 0, 1, 1);
9197
9198 if (bitsize == 0)
9199 return target;
9200
9201 /* In this case, BITPOS must start at a byte boundary and
9202 TARGET, if specified, must be a MEM. */
9203 gcc_assert (MEM_P (op0)
9204 && (!target || MEM_P (target))
9205 && !(bitpos % BITS_PER_UNIT));
9206
9207 emit_block_move (target,
9208 adjust_address (op0, VOIDmode,
9209 bitpos / BITS_PER_UNIT),
9210 GEN_INT ((bitsize + BITS_PER_UNIT - 1)
9211 / BITS_PER_UNIT),
9212 (modifier == EXPAND_STACK_PARM
9213 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
9214
9215 return target;
9216 }
9217
9218 op0 = validize_mem (op0);
9219
9220 if (MEM_P (op0) && REG_P (XEXP (op0, 0)))
9221 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
9222
9223 op0 = extract_bit_field (op0, bitsize, bitpos, unsignedp, packedp,
9224 (modifier == EXPAND_STACK_PARM
9225 ? NULL_RTX : target),
9226 ext_mode, ext_mode);
9227
9228 /* If the result is a record type and BITSIZE is narrower than
9229 the mode of OP0, an integral mode, and this is a big endian
9230 machine, we must put the field into the high-order bits. */
9231 if (TREE_CODE (type) == RECORD_TYPE && BYTES_BIG_ENDIAN
9232 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT
9233 && bitsize < (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (op0)))
9234 op0 = expand_shift (LSHIFT_EXPR, GET_MODE (op0), op0,
9235 size_int (GET_MODE_BITSIZE (GET_MODE (op0))
9236 - bitsize),
9237 op0, 1);
9238
9239 /* If the result type is BLKmode, store the data into a temporary
9240 of the appropriate type, but with the mode corresponding to the
9241 mode for the data we have (op0's mode). It's tempting to make
9242 this a constant type, since we know it's only being stored once,
9243 but that can cause problems if we are taking the address of this
9244 COMPONENT_REF because the MEM of any reference via that address
9245 will have flags corresponding to the type, which will not
9246 necessarily be constant. */
9247 if (mode == BLKmode)
9248 {
9249 HOST_WIDE_INT size = GET_MODE_BITSIZE (ext_mode);
9250 rtx new_rtx;
9251
9252 /* If the reference doesn't use the alias set of its type,
9253 we cannot create the temporary using that type. */
9254 if (component_uses_parent_alias_set (exp))
9255 {
9256 new_rtx = assign_stack_local (ext_mode, size, 0);
9257 set_mem_alias_set (new_rtx, get_alias_set (exp));
9258 }
9259 else
9260 new_rtx = assign_stack_temp_for_type (ext_mode, size, 0, type);
9261
9262 emit_move_insn (new_rtx, op0);
9263 op0 = copy_rtx (new_rtx);
9264 PUT_MODE (op0, BLKmode);
9265 set_mem_attributes (op0, exp, 1);
9266 }
9267
9268 return op0;
9269 }
9270
9271 /* If the result is BLKmode, use that to access the object
9272 now as well. */
9273 if (mode == BLKmode)
9274 mode1 = BLKmode;
9275
9276 /* Get a reference to just this component. */
9277 if (modifier == EXPAND_CONST_ADDRESS
9278 || modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
9279 op0 = adjust_address_nv (op0, mode1, bitpos / BITS_PER_UNIT);
9280 else
9281 op0 = adjust_address (op0, mode1, bitpos / BITS_PER_UNIT);
9282
9283 if (op0 == orig_op0)
9284 op0 = copy_rtx (op0);
9285
9286 set_mem_attributes (op0, exp, 0);
9287 if (REG_P (XEXP (op0, 0)))
9288 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
9289
9290 MEM_VOLATILE_P (op0) |= volatilep;
9291 if (mode == mode1 || mode1 == BLKmode || mode1 == tmode
9292 || modifier == EXPAND_CONST_ADDRESS
9293 || modifier == EXPAND_INITIALIZER)
9294 return op0;
9295 else if (target == 0)
9296 target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode);
9297
9298 convert_move (target, op0, unsignedp);
9299 return target;
9300 }
9301
9302 case OBJ_TYPE_REF:
9303 return expand_expr (OBJ_TYPE_REF_EXPR (exp), target, tmode, modifier);
9304
9305 case CALL_EXPR:
9306 /* All valid uses of __builtin_va_arg_pack () are removed during
9307 inlining. */
9308 if (CALL_EXPR_VA_ARG_PACK (exp))
9309 error ("%Kinvalid use of %<__builtin_va_arg_pack ()%>", exp);
9310 {
9311 tree fndecl = get_callee_fndecl (exp), attr;
9312
9313 if (fndecl
9314 && (attr = lookup_attribute ("error",
9315 DECL_ATTRIBUTES (fndecl))) != NULL)
9316 error ("%Kcall to %qs declared with attribute error: %s",
9317 exp, identifier_to_locale (lang_hooks.decl_printable_name (fndecl, 1)),
9318 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr))));
9319 if (fndecl
9320 && (attr = lookup_attribute ("warning",
9321 DECL_ATTRIBUTES (fndecl))) != NULL)
9322 warning_at (tree_nonartificial_location (exp),
9323 0, "%Kcall to %qs declared with attribute warning: %s",
9324 exp, identifier_to_locale (lang_hooks.decl_printable_name (fndecl, 1)),
9325 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr))));
9326
9327 /* Check for a built-in function. */
9328 if (fndecl && DECL_BUILT_IN (fndecl))
9329 {
9330 gcc_assert (DECL_BUILT_IN_CLASS (fndecl) != BUILT_IN_FRONTEND);
9331 return expand_builtin (exp, target, subtarget, tmode, ignore);
9332 }
9333 }
9334 return expand_call (exp, target, ignore);
9335
9336 case VIEW_CONVERT_EXPR:
9337 op0 = NULL_RTX;
9338
9339 /* If we are converting to BLKmode, try to avoid an intermediate
9340 temporary by fetching an inner memory reference. */
9341 if (mode == BLKmode
9342 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
9343 && TYPE_MODE (TREE_TYPE (treeop0)) != BLKmode
9344 && handled_component_p (treeop0))
9345 {
9346 enum machine_mode mode1;
9347 HOST_WIDE_INT bitsize, bitpos;
9348 tree offset;
9349 int unsignedp;
9350 int volatilep = 0;
9351 tree tem
9352 = get_inner_reference (treeop0, &bitsize, &bitpos,
9353 &offset, &mode1, &unsignedp, &volatilep,
9354 true);
9355 rtx orig_op0;
9356
9357 /* ??? We should work harder and deal with non-zero offsets. */
9358 if (!offset
9359 && (bitpos % BITS_PER_UNIT) == 0
9360 && bitsize >= 0
9361 && compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)), bitsize) == 0)
9362 {
9363 /* See the normal_inner_ref case for the rationale. */
9364 orig_op0
9365 = expand_expr (tem,
9366 (TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE
9367 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem)))
9368 != INTEGER_CST)
9369 && modifier != EXPAND_STACK_PARM
9370 ? target : NULL_RTX),
9371 VOIDmode,
9372 (modifier == EXPAND_INITIALIZER
9373 || modifier == EXPAND_CONST_ADDRESS
9374 || modifier == EXPAND_STACK_PARM)
9375 ? modifier : EXPAND_NORMAL);
9376
9377 if (MEM_P (orig_op0))
9378 {
9379 op0 = orig_op0;
9380
9381 /* Get a reference to just this component. */
9382 if (modifier == EXPAND_CONST_ADDRESS
9383 || modifier == EXPAND_SUM
9384 || modifier == EXPAND_INITIALIZER)
9385 op0 = adjust_address_nv (op0, mode, bitpos / BITS_PER_UNIT);
9386 else
9387 op0 = adjust_address (op0, mode, bitpos / BITS_PER_UNIT);
9388
9389 if (op0 == orig_op0)
9390 op0 = copy_rtx (op0);
9391
9392 set_mem_attributes (op0, treeop0, 0);
9393 if (REG_P (XEXP (op0, 0)))
9394 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
9395
9396 MEM_VOLATILE_P (op0) |= volatilep;
9397 }
9398 }
9399 }
9400
9401 if (!op0)
9402 op0 = expand_expr (treeop0,
9403 NULL_RTX, VOIDmode, modifier);
9404
9405 /* If the input and output modes are both the same, we are done. */
9406 if (mode == GET_MODE (op0))
9407 ;
9408 /* If neither mode is BLKmode, and both modes are the same size
9409 then we can use gen_lowpart. */
9410 else if (mode != BLKmode && GET_MODE (op0) != BLKmode
9411 && GET_MODE_SIZE (mode) == GET_MODE_SIZE (GET_MODE (op0))
9412 && !COMPLEX_MODE_P (GET_MODE (op0)))
9413 {
9414 if (GET_CODE (op0) == SUBREG)
9415 op0 = force_reg (GET_MODE (op0), op0);
9416 temp = gen_lowpart_common (mode, op0);
9417 if (temp)
9418 op0 = temp;
9419 else
9420 {
9421 if (!REG_P (op0) && !MEM_P (op0))
9422 op0 = force_reg (GET_MODE (op0), op0);
9423 op0 = gen_lowpart (mode, op0);
9424 }
9425 }
9426 /* If both types are integral, convert from one mode to the other. */
9427 else if (INTEGRAL_TYPE_P (type) && INTEGRAL_TYPE_P (TREE_TYPE (treeop0)))
9428 op0 = convert_modes (mode, GET_MODE (op0), op0,
9429 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
9430 /* As a last resort, spill op0 to memory, and reload it in a
9431 different mode. */
9432 else if (!MEM_P (op0))
9433 {
9434 /* If the operand is not a MEM, force it into memory. Since we
9435 are going to be changing the mode of the MEM, don't call
9436 force_const_mem for constants because we don't allow pool
9437 constants to change mode. */
9438 tree inner_type = TREE_TYPE (treeop0);
9439
9440 gcc_assert (!TREE_ADDRESSABLE (exp));
9441
9442 if (target == 0 || GET_MODE (target) != TYPE_MODE (inner_type))
9443 target
9444 = assign_stack_temp_for_type
9445 (TYPE_MODE (inner_type),
9446 GET_MODE_SIZE (TYPE_MODE (inner_type)), 0, inner_type);
9447
9448 emit_move_insn (target, op0);
9449 op0 = target;
9450 }
9451
9452 /* At this point, OP0 is in the correct mode. If the output type is
9453 such that the operand is known to be aligned, indicate that it is.
9454 Otherwise, we need only be concerned about alignment for non-BLKmode
9455 results. */
9456 if (MEM_P (op0))
9457 {
9458 op0 = copy_rtx (op0);
9459
9460 if (TYPE_ALIGN_OK (type))
9461 set_mem_align (op0, MAX (MEM_ALIGN (op0), TYPE_ALIGN (type)));
9462 else if (STRICT_ALIGNMENT
9463 && mode != BLKmode
9464 && MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode))
9465 {
9466 tree inner_type = TREE_TYPE (treeop0);
9467 HOST_WIDE_INT temp_size
9468 = MAX (int_size_in_bytes (inner_type),
9469 (HOST_WIDE_INT) GET_MODE_SIZE (mode));
9470 rtx new_rtx
9471 = assign_stack_temp_for_type (mode, temp_size, 0, type);
9472 rtx new_with_op0_mode
9473 = adjust_address (new_rtx, GET_MODE (op0), 0);
9474
9475 gcc_assert (!TREE_ADDRESSABLE (exp));
9476
9477 if (GET_MODE (op0) == BLKmode)
9478 emit_block_move (new_with_op0_mode, op0,
9479 GEN_INT (GET_MODE_SIZE (mode)),
9480 (modifier == EXPAND_STACK_PARM
9481 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
9482 else
9483 emit_move_insn (new_with_op0_mode, op0);
9484
9485 op0 = new_rtx;
9486 }
9487
9488 op0 = adjust_address (op0, mode, 0);
9489 }
9490
9491 return op0;
9492
9493 /* Use a compare and a jump for BLKmode comparisons, or for function
9494 type comparisons is HAVE_canonicalize_funcptr_for_compare. */
9495
9496 /* Although TRUTH_{AND,OR}IF_EXPR aren't present in GIMPLE, they
9497 are occassionally created by folding during expansion. */
9498 case TRUTH_ANDIF_EXPR:
9499 case TRUTH_ORIF_EXPR:
9500 if (! ignore
9501 && (target == 0
9502 || modifier == EXPAND_STACK_PARM
9503 || ! safe_from_p (target, treeop0, 1)
9504 || ! safe_from_p (target, treeop1, 1)
9505 /* Make sure we don't have a hard reg (such as function's return
9506 value) live across basic blocks, if not optimizing. */
9507 || (!optimize && REG_P (target)
9508 && REGNO (target) < FIRST_PSEUDO_REGISTER)))
9509 target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode);
9510
9511 if (target)
9512 emit_move_insn (target, const0_rtx);
9513
9514 op1 = gen_label_rtx ();
9515 jumpifnot_1 (code, treeop0, treeop1, op1, -1);
9516
9517 if (target)
9518 emit_move_insn (target, const1_rtx);
9519
9520 emit_label (op1);
9521 return ignore ? const0_rtx : target;
9522
9523 case STATEMENT_LIST:
9524 {
9525 tree_stmt_iterator iter;
9526
9527 gcc_assert (ignore);
9528
9529 for (iter = tsi_start (exp); !tsi_end_p (iter); tsi_next (&iter))
9530 expand_expr (tsi_stmt (iter), const0_rtx, VOIDmode, modifier);
9531 }
9532 return const0_rtx;
9533
9534 case COND_EXPR:
9535 /* A COND_EXPR with its type being VOID_TYPE represents a
9536 conditional jump and is handled in
9537 expand_gimple_cond_expr. */
9538 gcc_assert (!VOID_TYPE_P (type));
9539
9540 /* Note that COND_EXPRs whose type is a structure or union
9541 are required to be constructed to contain assignments of
9542 a temporary variable, so that we can evaluate them here
9543 for side effect only. If type is void, we must do likewise. */
9544
9545 gcc_assert (!TREE_ADDRESSABLE (type)
9546 && !ignore
9547 && TREE_TYPE (treeop1) != void_type_node
9548 && TREE_TYPE (treeop2) != void_type_node);
9549
9550 /* If we are not to produce a result, we have no target. Otherwise,
9551 if a target was specified use it; it will not be used as an
9552 intermediate target unless it is safe. If no target, use a
9553 temporary. */
9554
9555 if (modifier != EXPAND_STACK_PARM
9556 && original_target
9557 && safe_from_p (original_target, treeop0, 1)
9558 && GET_MODE (original_target) == mode
9559 #ifdef HAVE_conditional_move
9560 && (! can_conditionally_move_p (mode)
9561 || REG_P (original_target))
9562 #endif
9563 && !MEM_P (original_target))
9564 temp = original_target;
9565 else
9566 temp = assign_temp (type, 0, 0, 1);
9567
9568 do_pending_stack_adjust ();
9569 NO_DEFER_POP;
9570 op0 = gen_label_rtx ();
9571 op1 = gen_label_rtx ();
9572 jumpifnot (treeop0, op0, -1);
9573 store_expr (treeop1, temp,
9574 modifier == EXPAND_STACK_PARM,
9575 false);
9576
9577 emit_jump_insn (gen_jump (op1));
9578 emit_barrier ();
9579 emit_label (op0);
9580 store_expr (treeop2, temp,
9581 modifier == EXPAND_STACK_PARM,
9582 false);
9583
9584 emit_label (op1);
9585 OK_DEFER_POP;
9586 return temp;
9587
9588 case VEC_COND_EXPR:
9589 target = expand_vec_cond_expr (type, treeop0, treeop1, treeop2, target);
9590 return target;
9591
9592 case MODIFY_EXPR:
9593 {
9594 tree lhs = treeop0;
9595 tree rhs = treeop1;
9596 gcc_assert (ignore);
9597
9598 /* Check for |= or &= of a bitfield of size one into another bitfield
9599 of size 1. In this case, (unless we need the result of the
9600 assignment) we can do this more efficiently with a
9601 test followed by an assignment, if necessary.
9602
9603 ??? At this point, we can't get a BIT_FIELD_REF here. But if
9604 things change so we do, this code should be enhanced to
9605 support it. */
9606 if (TREE_CODE (lhs) == COMPONENT_REF
9607 && (TREE_CODE (rhs) == BIT_IOR_EXPR
9608 || TREE_CODE (rhs) == BIT_AND_EXPR)
9609 && TREE_OPERAND (rhs, 0) == lhs
9610 && TREE_CODE (TREE_OPERAND (rhs, 1)) == COMPONENT_REF
9611 && integer_onep (DECL_SIZE (TREE_OPERAND (lhs, 1)))
9612 && integer_onep (DECL_SIZE (TREE_OPERAND (TREE_OPERAND (rhs, 1), 1))))
9613 {
9614 rtx label = gen_label_rtx ();
9615 int value = TREE_CODE (rhs) == BIT_IOR_EXPR;
9616 do_jump (TREE_OPERAND (rhs, 1),
9617 value ? label : 0,
9618 value ? 0 : label, -1);
9619 expand_assignment (lhs, build_int_cst (TREE_TYPE (rhs), value),
9620 MOVE_NONTEMPORAL (exp));
9621 do_pending_stack_adjust ();
9622 emit_label (label);
9623 return const0_rtx;
9624 }
9625
9626 expand_assignment (lhs, rhs, MOVE_NONTEMPORAL (exp));
9627 return const0_rtx;
9628 }
9629
9630 case ADDR_EXPR:
9631 return expand_expr_addr_expr (exp, target, tmode, modifier);
9632
9633 case REALPART_EXPR:
9634 op0 = expand_normal (treeop0);
9635 return read_complex_part (op0, false);
9636
9637 case IMAGPART_EXPR:
9638 op0 = expand_normal (treeop0);
9639 return read_complex_part (op0, true);
9640
9641 case RETURN_EXPR:
9642 case LABEL_EXPR:
9643 case GOTO_EXPR:
9644 case SWITCH_EXPR:
9645 case ASM_EXPR:
9646 /* Expanded in cfgexpand.c. */
9647 gcc_unreachable ();
9648
9649 case TRY_CATCH_EXPR:
9650 case CATCH_EXPR:
9651 case EH_FILTER_EXPR:
9652 case TRY_FINALLY_EXPR:
9653 /* Lowered by tree-eh.c. */
9654 gcc_unreachable ();
9655
9656 case WITH_CLEANUP_EXPR:
9657 case CLEANUP_POINT_EXPR:
9658 case TARGET_EXPR:
9659 case CASE_LABEL_EXPR:
9660 case VA_ARG_EXPR:
9661 case BIND_EXPR:
9662 case INIT_EXPR:
9663 case CONJ_EXPR:
9664 case COMPOUND_EXPR:
9665 case PREINCREMENT_EXPR:
9666 case PREDECREMENT_EXPR:
9667 case POSTINCREMENT_EXPR:
9668 case POSTDECREMENT_EXPR:
9669 case LOOP_EXPR:
9670 case EXIT_EXPR:
9671 /* Lowered by gimplify.c. */
9672 gcc_unreachable ();
9673
9674 case FDESC_EXPR:
9675 /* Function descriptors are not valid except for as
9676 initialization constants, and should not be expanded. */
9677 gcc_unreachable ();
9678
9679 case WITH_SIZE_EXPR:
9680 /* WITH_SIZE_EXPR expands to its first argument. The caller should
9681 have pulled out the size to use in whatever context it needed. */
9682 return expand_expr_real (treeop0, original_target, tmode,
9683 modifier, alt_rtl);
9684
9685 case COMPOUND_LITERAL_EXPR:
9686 {
9687 /* Initialize the anonymous variable declared in the compound
9688 literal, then return the variable. */
9689 tree decl = COMPOUND_LITERAL_EXPR_DECL (exp);
9690
9691 /* Create RTL for this variable. */
9692 if (!DECL_RTL_SET_P (decl))
9693 {
9694 if (DECL_HARD_REGISTER (decl))
9695 /* The user specified an assembler name for this variable.
9696 Set that up now. */
9697 rest_of_decl_compilation (decl, 0, 0);
9698 else
9699 expand_decl (decl);
9700 }
9701
9702 return expand_expr_real (decl, original_target, tmode,
9703 modifier, alt_rtl);
9704 }
9705
9706 default:
9707 return expand_expr_real_2 (&ops, target, tmode, modifier);
9708 }
9709 }
9710 \f
9711 /* Subroutine of above: reduce EXP to the precision of TYPE (in the
9712 signedness of TYPE), possibly returning the result in TARGET. */
9713 static rtx
9714 reduce_to_bit_field_precision (rtx exp, rtx target, tree type)
9715 {
9716 HOST_WIDE_INT prec = TYPE_PRECISION (type);
9717 if (target && GET_MODE (target) != GET_MODE (exp))
9718 target = 0;
9719 /* For constant values, reduce using build_int_cst_type. */
9720 if (CONST_INT_P (exp))
9721 {
9722 HOST_WIDE_INT value = INTVAL (exp);
9723 tree t = build_int_cst_type (type, value);
9724 return expand_expr (t, target, VOIDmode, EXPAND_NORMAL);
9725 }
9726 else if (TYPE_UNSIGNED (type))
9727 {
9728 rtx mask = immed_double_int_const (double_int_mask (prec),
9729 GET_MODE (exp));
9730 return expand_and (GET_MODE (exp), exp, mask, target);
9731 }
9732 else
9733 {
9734 tree count = build_int_cst (NULL_TREE,
9735 GET_MODE_BITSIZE (GET_MODE (exp)) - prec);
9736 exp = expand_shift (LSHIFT_EXPR, GET_MODE (exp), exp, count, target, 0);
9737 return expand_shift (RSHIFT_EXPR, GET_MODE (exp), exp, count, target, 0);
9738 }
9739 }
9740 \f
9741 /* Subroutine of above: returns 1 if OFFSET corresponds to an offset that
9742 when applied to the address of EXP produces an address known to be
9743 aligned more than BIGGEST_ALIGNMENT. */
9744
9745 static int
9746 is_aligning_offset (const_tree offset, const_tree exp)
9747 {
9748 /* Strip off any conversions. */
9749 while (CONVERT_EXPR_P (offset))
9750 offset = TREE_OPERAND (offset, 0);
9751
9752 /* We must now have a BIT_AND_EXPR with a constant that is one less than
9753 power of 2 and which is larger than BIGGEST_ALIGNMENT. */
9754 if (TREE_CODE (offset) != BIT_AND_EXPR
9755 || !host_integerp (TREE_OPERAND (offset, 1), 1)
9756 || compare_tree_int (TREE_OPERAND (offset, 1),
9757 BIGGEST_ALIGNMENT / BITS_PER_UNIT) <= 0
9758 || !exact_log2 (tree_low_cst (TREE_OPERAND (offset, 1), 1) + 1) < 0)
9759 return 0;
9760
9761 /* Look at the first operand of BIT_AND_EXPR and strip any conversion.
9762 It must be NEGATE_EXPR. Then strip any more conversions. */
9763 offset = TREE_OPERAND (offset, 0);
9764 while (CONVERT_EXPR_P (offset))
9765 offset = TREE_OPERAND (offset, 0);
9766
9767 if (TREE_CODE (offset) != NEGATE_EXPR)
9768 return 0;
9769
9770 offset = TREE_OPERAND (offset, 0);
9771 while (CONVERT_EXPR_P (offset))
9772 offset = TREE_OPERAND (offset, 0);
9773
9774 /* This must now be the address of EXP. */
9775 return TREE_CODE (offset) == ADDR_EXPR && TREE_OPERAND (offset, 0) == exp;
9776 }
9777 \f
9778 /* Return the tree node if an ARG corresponds to a string constant or zero
9779 if it doesn't. If we return nonzero, set *PTR_OFFSET to the offset
9780 in bytes within the string that ARG is accessing. The type of the
9781 offset will be `sizetype'. */
9782
9783 tree
9784 string_constant (tree arg, tree *ptr_offset)
9785 {
9786 tree array, offset, lower_bound;
9787 STRIP_NOPS (arg);
9788
9789 if (TREE_CODE (arg) == ADDR_EXPR)
9790 {
9791 if (TREE_CODE (TREE_OPERAND (arg, 0)) == STRING_CST)
9792 {
9793 *ptr_offset = size_zero_node;
9794 return TREE_OPERAND (arg, 0);
9795 }
9796 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == VAR_DECL)
9797 {
9798 array = TREE_OPERAND (arg, 0);
9799 offset = size_zero_node;
9800 }
9801 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == ARRAY_REF)
9802 {
9803 array = TREE_OPERAND (TREE_OPERAND (arg, 0), 0);
9804 offset = TREE_OPERAND (TREE_OPERAND (arg, 0), 1);
9805 if (TREE_CODE (array) != STRING_CST
9806 && TREE_CODE (array) != VAR_DECL)
9807 return 0;
9808
9809 /* Check if the array has a nonzero lower bound. */
9810 lower_bound = array_ref_low_bound (TREE_OPERAND (arg, 0));
9811 if (!integer_zerop (lower_bound))
9812 {
9813 /* If the offset and base aren't both constants, return 0. */
9814 if (TREE_CODE (lower_bound) != INTEGER_CST)
9815 return 0;
9816 if (TREE_CODE (offset) != INTEGER_CST)
9817 return 0;
9818 /* Adjust offset by the lower bound. */
9819 offset = size_diffop (fold_convert (sizetype, offset),
9820 fold_convert (sizetype, lower_bound));
9821 }
9822 }
9823 else
9824 return 0;
9825 }
9826 else if (TREE_CODE (arg) == PLUS_EXPR || TREE_CODE (arg) == POINTER_PLUS_EXPR)
9827 {
9828 tree arg0 = TREE_OPERAND (arg, 0);
9829 tree arg1 = TREE_OPERAND (arg, 1);
9830
9831 STRIP_NOPS (arg0);
9832 STRIP_NOPS (arg1);
9833
9834 if (TREE_CODE (arg0) == ADDR_EXPR
9835 && (TREE_CODE (TREE_OPERAND (arg0, 0)) == STRING_CST
9836 || TREE_CODE (TREE_OPERAND (arg0, 0)) == VAR_DECL))
9837 {
9838 array = TREE_OPERAND (arg0, 0);
9839 offset = arg1;
9840 }
9841 else if (TREE_CODE (arg1) == ADDR_EXPR
9842 && (TREE_CODE (TREE_OPERAND (arg1, 0)) == STRING_CST
9843 || TREE_CODE (TREE_OPERAND (arg1, 0)) == VAR_DECL))
9844 {
9845 array = TREE_OPERAND (arg1, 0);
9846 offset = arg0;
9847 }
9848 else
9849 return 0;
9850 }
9851 else
9852 return 0;
9853
9854 if (TREE_CODE (array) == STRING_CST)
9855 {
9856 *ptr_offset = fold_convert (sizetype, offset);
9857 return array;
9858 }
9859 else if (TREE_CODE (array) == VAR_DECL
9860 || TREE_CODE (array) == CONST_DECL)
9861 {
9862 int length;
9863
9864 /* Variables initialized to string literals can be handled too. */
9865 if (!const_value_known_p (array)
9866 || !DECL_INITIAL (array)
9867 || TREE_CODE (DECL_INITIAL (array)) != STRING_CST)
9868 return 0;
9869
9870 /* Avoid const char foo[4] = "abcde"; */
9871 if (DECL_SIZE_UNIT (array) == NULL_TREE
9872 || TREE_CODE (DECL_SIZE_UNIT (array)) != INTEGER_CST
9873 || (length = TREE_STRING_LENGTH (DECL_INITIAL (array))) <= 0
9874 || compare_tree_int (DECL_SIZE_UNIT (array), length) < 0)
9875 return 0;
9876
9877 /* If variable is bigger than the string literal, OFFSET must be constant
9878 and inside of the bounds of the string literal. */
9879 offset = fold_convert (sizetype, offset);
9880 if (compare_tree_int (DECL_SIZE_UNIT (array), length) > 0
9881 && (! host_integerp (offset, 1)
9882 || compare_tree_int (offset, length) >= 0))
9883 return 0;
9884
9885 *ptr_offset = offset;
9886 return DECL_INITIAL (array);
9887 }
9888
9889 return 0;
9890 }
9891 \f
9892 /* Generate code to calculate OPS, and exploded expression
9893 using a store-flag instruction and return an rtx for the result.
9894 OPS reflects a comparison.
9895
9896 If TARGET is nonzero, store the result there if convenient.
9897
9898 Return zero if there is no suitable set-flag instruction
9899 available on this machine.
9900
9901 Once expand_expr has been called on the arguments of the comparison,
9902 we are committed to doing the store flag, since it is not safe to
9903 re-evaluate the expression. We emit the store-flag insn by calling
9904 emit_store_flag, but only expand the arguments if we have a reason
9905 to believe that emit_store_flag will be successful. If we think that
9906 it will, but it isn't, we have to simulate the store-flag with a
9907 set/jump/set sequence. */
9908
9909 static rtx
9910 do_store_flag (sepops ops, rtx target, enum machine_mode mode)
9911 {
9912 enum rtx_code code;
9913 tree arg0, arg1, type;
9914 tree tem;
9915 enum machine_mode operand_mode;
9916 int unsignedp;
9917 rtx op0, op1;
9918 rtx subtarget = target;
9919 location_t loc = ops->location;
9920
9921 arg0 = ops->op0;
9922 arg1 = ops->op1;
9923
9924 /* Don't crash if the comparison was erroneous. */
9925 if (arg0 == error_mark_node || arg1 == error_mark_node)
9926 return const0_rtx;
9927
9928 type = TREE_TYPE (arg0);
9929 operand_mode = TYPE_MODE (type);
9930 unsignedp = TYPE_UNSIGNED (type);
9931
9932 /* We won't bother with BLKmode store-flag operations because it would mean
9933 passing a lot of information to emit_store_flag. */
9934 if (operand_mode == BLKmode)
9935 return 0;
9936
9937 /* We won't bother with store-flag operations involving function pointers
9938 when function pointers must be canonicalized before comparisons. */
9939 #ifdef HAVE_canonicalize_funcptr_for_compare
9940 if (HAVE_canonicalize_funcptr_for_compare
9941 && ((TREE_CODE (TREE_TYPE (arg0)) == POINTER_TYPE
9942 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg0)))
9943 == FUNCTION_TYPE))
9944 || (TREE_CODE (TREE_TYPE (arg1)) == POINTER_TYPE
9945 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg1)))
9946 == FUNCTION_TYPE))))
9947 return 0;
9948 #endif
9949
9950 STRIP_NOPS (arg0);
9951 STRIP_NOPS (arg1);
9952
9953 /* Get the rtx comparison code to use. We know that EXP is a comparison
9954 operation of some type. Some comparisons against 1 and -1 can be
9955 converted to comparisons with zero. Do so here so that the tests
9956 below will be aware that we have a comparison with zero. These
9957 tests will not catch constants in the first operand, but constants
9958 are rarely passed as the first operand. */
9959
9960 switch (ops->code)
9961 {
9962 case EQ_EXPR:
9963 code = EQ;
9964 break;
9965 case NE_EXPR:
9966 code = NE;
9967 break;
9968 case LT_EXPR:
9969 if (integer_onep (arg1))
9970 arg1 = integer_zero_node, code = unsignedp ? LEU : LE;
9971 else
9972 code = unsignedp ? LTU : LT;
9973 break;
9974 case LE_EXPR:
9975 if (! unsignedp && integer_all_onesp (arg1))
9976 arg1 = integer_zero_node, code = LT;
9977 else
9978 code = unsignedp ? LEU : LE;
9979 break;
9980 case GT_EXPR:
9981 if (! unsignedp && integer_all_onesp (arg1))
9982 arg1 = integer_zero_node, code = GE;
9983 else
9984 code = unsignedp ? GTU : GT;
9985 break;
9986 case GE_EXPR:
9987 if (integer_onep (arg1))
9988 arg1 = integer_zero_node, code = unsignedp ? GTU : GT;
9989 else
9990 code = unsignedp ? GEU : GE;
9991 break;
9992
9993 case UNORDERED_EXPR:
9994 code = UNORDERED;
9995 break;
9996 case ORDERED_EXPR:
9997 code = ORDERED;
9998 break;
9999 case UNLT_EXPR:
10000 code = UNLT;
10001 break;
10002 case UNLE_EXPR:
10003 code = UNLE;
10004 break;
10005 case UNGT_EXPR:
10006 code = UNGT;
10007 break;
10008 case UNGE_EXPR:
10009 code = UNGE;
10010 break;
10011 case UNEQ_EXPR:
10012 code = UNEQ;
10013 break;
10014 case LTGT_EXPR:
10015 code = LTGT;
10016 break;
10017
10018 default:
10019 gcc_unreachable ();
10020 }
10021
10022 /* Put a constant second. */
10023 if (TREE_CODE (arg0) == REAL_CST || TREE_CODE (arg0) == INTEGER_CST
10024 || TREE_CODE (arg0) == FIXED_CST)
10025 {
10026 tem = arg0; arg0 = arg1; arg1 = tem;
10027 code = swap_condition (code);
10028 }
10029
10030 /* If this is an equality or inequality test of a single bit, we can
10031 do this by shifting the bit being tested to the low-order bit and
10032 masking the result with the constant 1. If the condition was EQ,
10033 we xor it with 1. This does not require an scc insn and is faster
10034 than an scc insn even if we have it.
10035
10036 The code to make this transformation was moved into fold_single_bit_test,
10037 so we just call into the folder and expand its result. */
10038
10039 if ((code == NE || code == EQ)
10040 && TREE_CODE (arg0) == BIT_AND_EXPR && integer_zerop (arg1)
10041 && integer_pow2p (TREE_OPERAND (arg0, 1)))
10042 {
10043 tree type = lang_hooks.types.type_for_mode (mode, unsignedp);
10044 return expand_expr (fold_single_bit_test (loc,
10045 code == NE ? NE_EXPR : EQ_EXPR,
10046 arg0, arg1, type),
10047 target, VOIDmode, EXPAND_NORMAL);
10048 }
10049
10050 if (! get_subtarget (target)
10051 || GET_MODE (subtarget) != operand_mode)
10052 subtarget = 0;
10053
10054 expand_operands (arg0, arg1, subtarget, &op0, &op1, EXPAND_NORMAL);
10055
10056 if (target == 0)
10057 target = gen_reg_rtx (mode);
10058
10059 /* Try a cstore if possible. */
10060 return emit_store_flag_force (target, code, op0, op1,
10061 operand_mode, unsignedp, 1);
10062 }
10063 \f
10064
10065 /* Stubs in case we haven't got a casesi insn. */
10066 #ifndef HAVE_casesi
10067 # define HAVE_casesi 0
10068 # define gen_casesi(a, b, c, d, e) (0)
10069 # define CODE_FOR_casesi CODE_FOR_nothing
10070 #endif
10071
10072 /* Attempt to generate a casesi instruction. Returns 1 if successful,
10073 0 otherwise (i.e. if there is no casesi instruction). */
10074 int
10075 try_casesi (tree index_type, tree index_expr, tree minval, tree range,
10076 rtx table_label ATTRIBUTE_UNUSED, rtx default_label,
10077 rtx fallback_label ATTRIBUTE_UNUSED)
10078 {
10079 struct expand_operand ops[5];
10080 enum machine_mode index_mode = SImode;
10081 int index_bits = GET_MODE_BITSIZE (index_mode);
10082 rtx op1, op2, index;
10083
10084 if (! HAVE_casesi)
10085 return 0;
10086
10087 /* Convert the index to SImode. */
10088 if (GET_MODE_BITSIZE (TYPE_MODE (index_type)) > GET_MODE_BITSIZE (index_mode))
10089 {
10090 enum machine_mode omode = TYPE_MODE (index_type);
10091 rtx rangertx = expand_normal (range);
10092
10093 /* We must handle the endpoints in the original mode. */
10094 index_expr = build2 (MINUS_EXPR, index_type,
10095 index_expr, minval);
10096 minval = integer_zero_node;
10097 index = expand_normal (index_expr);
10098 if (default_label)
10099 emit_cmp_and_jump_insns (rangertx, index, LTU, NULL_RTX,
10100 omode, 1, default_label);
10101 /* Now we can safely truncate. */
10102 index = convert_to_mode (index_mode, index, 0);
10103 }
10104 else
10105 {
10106 if (TYPE_MODE (index_type) != index_mode)
10107 {
10108 index_type = lang_hooks.types.type_for_size (index_bits, 0);
10109 index_expr = fold_convert (index_type, index_expr);
10110 }
10111
10112 index = expand_normal (index_expr);
10113 }
10114
10115 do_pending_stack_adjust ();
10116
10117 op1 = expand_normal (minval);
10118 op2 = expand_normal (range);
10119
10120 create_input_operand (&ops[0], index, index_mode);
10121 create_convert_operand_from_type (&ops[1], op1, TREE_TYPE (minval));
10122 create_convert_operand_from_type (&ops[2], op2, TREE_TYPE (range));
10123 create_fixed_operand (&ops[3], table_label);
10124 create_fixed_operand (&ops[4], (default_label
10125 ? default_label
10126 : fallback_label));
10127 expand_jump_insn (CODE_FOR_casesi, 5, ops);
10128 return 1;
10129 }
10130
10131 /* Attempt to generate a tablejump instruction; same concept. */
10132 #ifndef HAVE_tablejump
10133 #define HAVE_tablejump 0
10134 #define gen_tablejump(x, y) (0)
10135 #endif
10136
10137 /* Subroutine of the next function.
10138
10139 INDEX is the value being switched on, with the lowest value
10140 in the table already subtracted.
10141 MODE is its expected mode (needed if INDEX is constant).
10142 RANGE is the length of the jump table.
10143 TABLE_LABEL is a CODE_LABEL rtx for the table itself.
10144
10145 DEFAULT_LABEL is a CODE_LABEL rtx to jump to if the
10146 index value is out of range. */
10147
10148 static void
10149 do_tablejump (rtx index, enum machine_mode mode, rtx range, rtx table_label,
10150 rtx default_label)
10151 {
10152 rtx temp, vector;
10153
10154 if (INTVAL (range) > cfun->cfg->max_jumptable_ents)
10155 cfun->cfg->max_jumptable_ents = INTVAL (range);
10156
10157 /* Do an unsigned comparison (in the proper mode) between the index
10158 expression and the value which represents the length of the range.
10159 Since we just finished subtracting the lower bound of the range
10160 from the index expression, this comparison allows us to simultaneously
10161 check that the original index expression value is both greater than
10162 or equal to the minimum value of the range and less than or equal to
10163 the maximum value of the range. */
10164
10165 if (default_label)
10166 emit_cmp_and_jump_insns (index, range, GTU, NULL_RTX, mode, 1,
10167 default_label);
10168
10169 /* If index is in range, it must fit in Pmode.
10170 Convert to Pmode so we can index with it. */
10171 if (mode != Pmode)
10172 index = convert_to_mode (Pmode, index, 1);
10173
10174 /* Don't let a MEM slip through, because then INDEX that comes
10175 out of PIC_CASE_VECTOR_ADDRESS won't be a valid address,
10176 and break_out_memory_refs will go to work on it and mess it up. */
10177 #ifdef PIC_CASE_VECTOR_ADDRESS
10178 if (flag_pic && !REG_P (index))
10179 index = copy_to_mode_reg (Pmode, index);
10180 #endif
10181
10182 /* ??? The only correct use of CASE_VECTOR_MODE is the one inside the
10183 GET_MODE_SIZE, because this indicates how large insns are. The other
10184 uses should all be Pmode, because they are addresses. This code
10185 could fail if addresses and insns are not the same size. */
10186 index = gen_rtx_PLUS (Pmode,
10187 gen_rtx_MULT (Pmode, index,
10188 GEN_INT (GET_MODE_SIZE (CASE_VECTOR_MODE))),
10189 gen_rtx_LABEL_REF (Pmode, table_label));
10190 #ifdef PIC_CASE_VECTOR_ADDRESS
10191 if (flag_pic)
10192 index = PIC_CASE_VECTOR_ADDRESS (index);
10193 else
10194 #endif
10195 index = memory_address (CASE_VECTOR_MODE, index);
10196 temp = gen_reg_rtx (CASE_VECTOR_MODE);
10197 vector = gen_const_mem (CASE_VECTOR_MODE, index);
10198 convert_move (temp, vector, 0);
10199
10200 emit_jump_insn (gen_tablejump (temp, table_label));
10201
10202 /* If we are generating PIC code or if the table is PC-relative, the
10203 table and JUMP_INSN must be adjacent, so don't output a BARRIER. */
10204 if (! CASE_VECTOR_PC_RELATIVE && ! flag_pic)
10205 emit_barrier ();
10206 }
10207
10208 int
10209 try_tablejump (tree index_type, tree index_expr, tree minval, tree range,
10210 rtx table_label, rtx default_label)
10211 {
10212 rtx index;
10213
10214 if (! HAVE_tablejump)
10215 return 0;
10216
10217 index_expr = fold_build2 (MINUS_EXPR, index_type,
10218 fold_convert (index_type, index_expr),
10219 fold_convert (index_type, minval));
10220 index = expand_normal (index_expr);
10221 do_pending_stack_adjust ();
10222
10223 do_tablejump (index, TYPE_MODE (index_type),
10224 convert_modes (TYPE_MODE (index_type),
10225 TYPE_MODE (TREE_TYPE (range)),
10226 expand_normal (range),
10227 TYPE_UNSIGNED (TREE_TYPE (range))),
10228 table_label, default_label);
10229 return 1;
10230 }
10231
10232 /* Return a CONST_VECTOR rtx for a VECTOR_CST tree. */
10233 static rtx
10234 const_vector_from_tree (tree exp)
10235 {
10236 rtvec v;
10237 int units, i;
10238 tree link, elt;
10239 enum machine_mode inner, mode;
10240
10241 mode = TYPE_MODE (TREE_TYPE (exp));
10242
10243 if (initializer_zerop (exp))
10244 return CONST0_RTX (mode);
10245
10246 units = GET_MODE_NUNITS (mode);
10247 inner = GET_MODE_INNER (mode);
10248
10249 v = rtvec_alloc (units);
10250
10251 link = TREE_VECTOR_CST_ELTS (exp);
10252 for (i = 0; link; link = TREE_CHAIN (link), ++i)
10253 {
10254 elt = TREE_VALUE (link);
10255
10256 if (TREE_CODE (elt) == REAL_CST)
10257 RTVEC_ELT (v, i) = CONST_DOUBLE_FROM_REAL_VALUE (TREE_REAL_CST (elt),
10258 inner);
10259 else if (TREE_CODE (elt) == FIXED_CST)
10260 RTVEC_ELT (v, i) = CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (elt),
10261 inner);
10262 else
10263 RTVEC_ELT (v, i) = immed_double_int_const (tree_to_double_int (elt),
10264 inner);
10265 }
10266
10267 /* Initialize remaining elements to 0. */
10268 for (; i < units; ++i)
10269 RTVEC_ELT (v, i) = CONST0_RTX (inner);
10270
10271 return gen_rtx_CONST_VECTOR (mode, v);
10272 }
10273
10274 /* Build a decl for a personality function given a language prefix. */
10275
10276 tree
10277 build_personality_function (const char *lang)
10278 {
10279 const char *unwind_and_version;
10280 tree decl, type;
10281 char *name;
10282
10283 switch (targetm.except_unwind_info (&global_options))
10284 {
10285 case UI_NONE:
10286 return NULL;
10287 case UI_SJLJ:
10288 unwind_and_version = "_sj0";
10289 break;
10290 case UI_DWARF2:
10291 case UI_TARGET:
10292 unwind_and_version = "_v0";
10293 break;
10294 default:
10295 gcc_unreachable ();
10296 }
10297
10298 name = ACONCAT (("__", lang, "_personality", unwind_and_version, NULL));
10299
10300 type = build_function_type_list (integer_type_node, integer_type_node,
10301 long_long_unsigned_type_node,
10302 ptr_type_node, ptr_type_node, NULL_TREE);
10303 decl = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL,
10304 get_identifier (name), type);
10305 DECL_ARTIFICIAL (decl) = 1;
10306 DECL_EXTERNAL (decl) = 1;
10307 TREE_PUBLIC (decl) = 1;
10308
10309 /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with
10310 are the flags assigned by targetm.encode_section_info. */
10311 SET_SYMBOL_REF_DECL (XEXP (DECL_RTL (decl), 0), NULL);
10312
10313 return decl;
10314 }
10315
10316 /* Extracts the personality function of DECL and returns the corresponding
10317 libfunc. */
10318
10319 rtx
10320 get_personality_function (tree decl)
10321 {
10322 tree personality = DECL_FUNCTION_PERSONALITY (decl);
10323 enum eh_personality_kind pk;
10324
10325 pk = function_needs_eh_personality (DECL_STRUCT_FUNCTION (decl));
10326 if (pk == eh_personality_none)
10327 return NULL;
10328
10329 if (!personality
10330 && pk == eh_personality_any)
10331 personality = lang_hooks.eh_personality ();
10332
10333 if (pk == eh_personality_lang)
10334 gcc_assert (personality != NULL_TREE);
10335
10336 return XEXP (DECL_RTL (personality), 0);
10337 }
10338
10339 #include "gt-expr.h"