caller-save.c (init_caller_save): Base temporary register numbers on LAST_VIRTUAL_REG...
[gcc.git] / gcc / expr.c
1 /* Convert tree expression to rtl instructions, for GNU compiler.
2 Copyright (C) 1988-2015 Free Software Foundation, Inc.
3
4 This file is part of GCC.
5
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
9 version.
10
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
19
20 #include "config.h"
21 #include "system.h"
22 #include "coretypes.h"
23 #include "tm.h"
24 #include "machmode.h"
25 #include "rtl.h"
26 #include "hash-set.h"
27 #include "vec.h"
28 #include "double-int.h"
29 #include "input.h"
30 #include "alias.h"
31 #include "symtab.h"
32 #include "wide-int.h"
33 #include "inchash.h"
34 #include "tree.h"
35 #include "fold-const.h"
36 #include "stringpool.h"
37 #include "stor-layout.h"
38 #include "attribs.h"
39 #include "varasm.h"
40 #include "flags.h"
41 #include "regs.h"
42 #include "hard-reg-set.h"
43 #include "except.h"
44 #include "function.h"
45 #include "insn-config.h"
46 #include "insn-attr.h"
47 #include "hashtab.h"
48 #include "statistics.h"
49 #include "real.h"
50 #include "fixed-value.h"
51 #include "expmed.h"
52 #include "dojump.h"
53 #include "explow.h"
54 #include "calls.h"
55 #include "emit-rtl.h"
56 #include "stmt.h"
57 /* Include expr.h after insn-config.h so we get HAVE_conditional_move. */
58 #include "expr.h"
59 #include "insn-codes.h"
60 #include "optabs.h"
61 #include "libfuncs.h"
62 #include "recog.h"
63 #include "reload.h"
64 #include "typeclass.h"
65 #include "toplev.h"
66 #include "langhooks.h"
67 #include "intl.h"
68 #include "tm_p.h"
69 #include "tree-iterator.h"
70 #include "predict.h"
71 #include "dominance.h"
72 #include "cfg.h"
73 #include "basic-block.h"
74 #include "tree-ssa-alias.h"
75 #include "internal-fn.h"
76 #include "gimple-expr.h"
77 #include "is-a.h"
78 #include "gimple.h"
79 #include "gimple-ssa.h"
80 #include "hash-map.h"
81 #include "plugin-api.h"
82 #include "ipa-ref.h"
83 #include "cgraph.h"
84 #include "tree-ssanames.h"
85 #include "target.h"
86 #include "common/common-target.h"
87 #include "timevar.h"
88 #include "df.h"
89 #include "diagnostic.h"
90 #include "tree-ssa-live.h"
91 #include "tree-outof-ssa.h"
92 #include "target-globals.h"
93 #include "params.h"
94 #include "tree-ssa-address.h"
95 #include "cfgexpand.h"
96 #include "builtins.h"
97 #include "tree-chkp.h"
98 #include "rtl-chkp.h"
99 #include "ccmp.h"
100
101
102 /* If this is nonzero, we do not bother generating VOLATILE
103 around volatile memory references, and we are willing to
104 output indirect addresses. If cse is to follow, we reject
105 indirect addresses so a useful potential cse is generated;
106 if it is used only once, instruction combination will produce
107 the same indirect address eventually. */
108 int cse_not_expected;
109
110 /* This structure is used by move_by_pieces to describe the move to
111 be performed. */
112 struct move_by_pieces_d
113 {
114 rtx to;
115 rtx to_addr;
116 int autinc_to;
117 int explicit_inc_to;
118 rtx from;
119 rtx from_addr;
120 int autinc_from;
121 int explicit_inc_from;
122 unsigned HOST_WIDE_INT len;
123 HOST_WIDE_INT offset;
124 int reverse;
125 };
126
127 /* This structure is used by store_by_pieces to describe the clear to
128 be performed. */
129
130 struct store_by_pieces_d
131 {
132 rtx to;
133 rtx to_addr;
134 int autinc_to;
135 int explicit_inc_to;
136 unsigned HOST_WIDE_INT len;
137 HOST_WIDE_INT offset;
138 rtx (*constfun) (void *, HOST_WIDE_INT, machine_mode);
139 void *constfundata;
140 int reverse;
141 };
142
143 static void move_by_pieces_1 (insn_gen_fn, machine_mode,
144 struct move_by_pieces_d *);
145 static bool block_move_libcall_safe_for_call_parm (void);
146 static bool emit_block_move_via_movmem (rtx, rtx, rtx, unsigned, unsigned, HOST_WIDE_INT,
147 unsigned HOST_WIDE_INT, unsigned HOST_WIDE_INT,
148 unsigned HOST_WIDE_INT);
149 static tree emit_block_move_libcall_fn (int);
150 static void emit_block_move_via_loop (rtx, rtx, rtx, unsigned);
151 static rtx clear_by_pieces_1 (void *, HOST_WIDE_INT, machine_mode);
152 static void clear_by_pieces (rtx, unsigned HOST_WIDE_INT, unsigned int);
153 static void store_by_pieces_1 (struct store_by_pieces_d *, unsigned int);
154 static void store_by_pieces_2 (insn_gen_fn, machine_mode,
155 struct store_by_pieces_d *);
156 static tree clear_storage_libcall_fn (int);
157 static rtx_insn *compress_float_constant (rtx, rtx);
158 static rtx get_subtarget (rtx);
159 static void store_constructor_field (rtx, unsigned HOST_WIDE_INT,
160 HOST_WIDE_INT, machine_mode,
161 tree, int, alias_set_type);
162 static void store_constructor (tree, rtx, int, HOST_WIDE_INT);
163 static rtx store_field (rtx, HOST_WIDE_INT, HOST_WIDE_INT,
164 unsigned HOST_WIDE_INT, unsigned HOST_WIDE_INT,
165 machine_mode, tree, alias_set_type, bool);
166
167 static unsigned HOST_WIDE_INT highest_pow2_factor_for_target (const_tree, const_tree);
168
169 static int is_aligning_offset (const_tree, const_tree);
170 static rtx reduce_to_bit_field_precision (rtx, rtx, tree);
171 static rtx do_store_flag (sepops, rtx, machine_mode);
172 #ifdef PUSH_ROUNDING
173 static void emit_single_push_insn (machine_mode, rtx, tree);
174 #endif
175 static void do_tablejump (rtx, machine_mode, rtx, rtx, rtx, int);
176 static rtx const_vector_from_tree (tree);
177 static tree tree_expr_size (const_tree);
178 static HOST_WIDE_INT int_expr_size (tree);
179
180 \f
181 /* This is run to set up which modes can be used
182 directly in memory and to initialize the block move optab. It is run
183 at the beginning of compilation and when the target is reinitialized. */
184
185 void
186 init_expr_target (void)
187 {
188 rtx insn, pat;
189 machine_mode mode;
190 int num_clobbers;
191 rtx mem, mem1;
192 rtx reg;
193
194 /* Try indexing by frame ptr and try by stack ptr.
195 It is known that on the Convex the stack ptr isn't a valid index.
196 With luck, one or the other is valid on any machine. */
197 mem = gen_rtx_MEM (word_mode, stack_pointer_rtx);
198 mem1 = gen_rtx_MEM (word_mode, frame_pointer_rtx);
199
200 /* A scratch register we can modify in-place below to avoid
201 useless RTL allocations. */
202 reg = gen_rtx_REG (word_mode, LAST_VIRTUAL_REGISTER + 1);
203
204 insn = rtx_alloc (INSN);
205 pat = gen_rtx_SET (NULL_RTX, NULL_RTX);
206 PATTERN (insn) = pat;
207
208 for (mode = VOIDmode; (int) mode < NUM_MACHINE_MODES;
209 mode = (machine_mode) ((int) mode + 1))
210 {
211 int regno;
212
213 direct_load[(int) mode] = direct_store[(int) mode] = 0;
214 PUT_MODE (mem, mode);
215 PUT_MODE (mem1, mode);
216
217 /* See if there is some register that can be used in this mode and
218 directly loaded or stored from memory. */
219
220 if (mode != VOIDmode && mode != BLKmode)
221 for (regno = 0; regno < FIRST_PSEUDO_REGISTER
222 && (direct_load[(int) mode] == 0 || direct_store[(int) mode] == 0);
223 regno++)
224 {
225 if (! HARD_REGNO_MODE_OK (regno, mode))
226 continue;
227
228 set_mode_and_regno (reg, mode, regno);
229
230 SET_SRC (pat) = mem;
231 SET_DEST (pat) = reg;
232 if (recog (pat, insn, &num_clobbers) >= 0)
233 direct_load[(int) mode] = 1;
234
235 SET_SRC (pat) = mem1;
236 SET_DEST (pat) = reg;
237 if (recog (pat, insn, &num_clobbers) >= 0)
238 direct_load[(int) mode] = 1;
239
240 SET_SRC (pat) = reg;
241 SET_DEST (pat) = mem;
242 if (recog (pat, insn, &num_clobbers) >= 0)
243 direct_store[(int) mode] = 1;
244
245 SET_SRC (pat) = reg;
246 SET_DEST (pat) = mem1;
247 if (recog (pat, insn, &num_clobbers) >= 0)
248 direct_store[(int) mode] = 1;
249 }
250 }
251
252 mem = gen_rtx_MEM (VOIDmode, gen_raw_REG (Pmode, LAST_VIRTUAL_REGISTER + 1));
253
254 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
255 mode = GET_MODE_WIDER_MODE (mode))
256 {
257 machine_mode srcmode;
258 for (srcmode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); srcmode != mode;
259 srcmode = GET_MODE_WIDER_MODE (srcmode))
260 {
261 enum insn_code ic;
262
263 ic = can_extend_p (mode, srcmode, 0);
264 if (ic == CODE_FOR_nothing)
265 continue;
266
267 PUT_MODE (mem, srcmode);
268
269 if (insn_operand_matches (ic, 1, mem))
270 float_extend_from_mem[mode][srcmode] = true;
271 }
272 }
273 }
274
275 /* This is run at the start of compiling a function. */
276
277 void
278 init_expr (void)
279 {
280 memset (&crtl->expr, 0, sizeof (crtl->expr));
281 }
282 \f
283 /* Copy data from FROM to TO, where the machine modes are not the same.
284 Both modes may be integer, or both may be floating, or both may be
285 fixed-point.
286 UNSIGNEDP should be nonzero if FROM is an unsigned type.
287 This causes zero-extension instead of sign-extension. */
288
289 void
290 convert_move (rtx to, rtx from, int unsignedp)
291 {
292 machine_mode to_mode = GET_MODE (to);
293 machine_mode from_mode = GET_MODE (from);
294 int to_real = SCALAR_FLOAT_MODE_P (to_mode);
295 int from_real = SCALAR_FLOAT_MODE_P (from_mode);
296 enum insn_code code;
297 rtx libcall;
298
299 /* rtx code for making an equivalent value. */
300 enum rtx_code equiv_code = (unsignedp < 0 ? UNKNOWN
301 : (unsignedp ? ZERO_EXTEND : SIGN_EXTEND));
302
303
304 gcc_assert (to_real == from_real);
305 gcc_assert (to_mode != BLKmode);
306 gcc_assert (from_mode != BLKmode);
307
308 /* If the source and destination are already the same, then there's
309 nothing to do. */
310 if (to == from)
311 return;
312
313 /* If FROM is a SUBREG that indicates that we have already done at least
314 the required extension, strip it. We don't handle such SUBREGs as
315 TO here. */
316
317 if (GET_CODE (from) == SUBREG && SUBREG_PROMOTED_VAR_P (from)
318 && (GET_MODE_PRECISION (GET_MODE (SUBREG_REG (from)))
319 >= GET_MODE_PRECISION (to_mode))
320 && SUBREG_CHECK_PROMOTED_SIGN (from, unsignedp))
321 from = gen_lowpart (to_mode, from), from_mode = to_mode;
322
323 gcc_assert (GET_CODE (to) != SUBREG || !SUBREG_PROMOTED_VAR_P (to));
324
325 if (to_mode == from_mode
326 || (from_mode == VOIDmode && CONSTANT_P (from)))
327 {
328 emit_move_insn (to, from);
329 return;
330 }
331
332 if (VECTOR_MODE_P (to_mode) || VECTOR_MODE_P (from_mode))
333 {
334 gcc_assert (GET_MODE_BITSIZE (from_mode) == GET_MODE_BITSIZE (to_mode));
335
336 if (VECTOR_MODE_P (to_mode))
337 from = simplify_gen_subreg (to_mode, from, GET_MODE (from), 0);
338 else
339 to = simplify_gen_subreg (from_mode, to, GET_MODE (to), 0);
340
341 emit_move_insn (to, from);
342 return;
343 }
344
345 if (GET_CODE (to) == CONCAT && GET_CODE (from) == CONCAT)
346 {
347 convert_move (XEXP (to, 0), XEXP (from, 0), unsignedp);
348 convert_move (XEXP (to, 1), XEXP (from, 1), unsignedp);
349 return;
350 }
351
352 if (to_real)
353 {
354 rtx value;
355 rtx_insn *insns;
356 convert_optab tab;
357
358 gcc_assert ((GET_MODE_PRECISION (from_mode)
359 != GET_MODE_PRECISION (to_mode))
360 || (DECIMAL_FLOAT_MODE_P (from_mode)
361 != DECIMAL_FLOAT_MODE_P (to_mode)));
362
363 if (GET_MODE_PRECISION (from_mode) == GET_MODE_PRECISION (to_mode))
364 /* Conversion between decimal float and binary float, same size. */
365 tab = DECIMAL_FLOAT_MODE_P (from_mode) ? trunc_optab : sext_optab;
366 else if (GET_MODE_PRECISION (from_mode) < GET_MODE_PRECISION (to_mode))
367 tab = sext_optab;
368 else
369 tab = trunc_optab;
370
371 /* Try converting directly if the insn is supported. */
372
373 code = convert_optab_handler (tab, to_mode, from_mode);
374 if (code != CODE_FOR_nothing)
375 {
376 emit_unop_insn (code, to, from,
377 tab == sext_optab ? FLOAT_EXTEND : FLOAT_TRUNCATE);
378 return;
379 }
380
381 /* Otherwise use a libcall. */
382 libcall = convert_optab_libfunc (tab, to_mode, from_mode);
383
384 /* Is this conversion implemented yet? */
385 gcc_assert (libcall);
386
387 start_sequence ();
388 value = emit_library_call_value (libcall, NULL_RTX, LCT_CONST, to_mode,
389 1, from, from_mode);
390 insns = get_insns ();
391 end_sequence ();
392 emit_libcall_block (insns, to, value,
393 tab == trunc_optab ? gen_rtx_FLOAT_TRUNCATE (to_mode,
394 from)
395 : gen_rtx_FLOAT_EXTEND (to_mode, from));
396 return;
397 }
398
399 /* Handle pointer conversion. */ /* SPEE 900220. */
400 /* If the target has a converter from FROM_MODE to TO_MODE, use it. */
401 {
402 convert_optab ctab;
403
404 if (GET_MODE_PRECISION (from_mode) > GET_MODE_PRECISION (to_mode))
405 ctab = trunc_optab;
406 else if (unsignedp)
407 ctab = zext_optab;
408 else
409 ctab = sext_optab;
410
411 if (convert_optab_handler (ctab, to_mode, from_mode)
412 != CODE_FOR_nothing)
413 {
414 emit_unop_insn (convert_optab_handler (ctab, to_mode, from_mode),
415 to, from, UNKNOWN);
416 return;
417 }
418 }
419
420 /* Targets are expected to provide conversion insns between PxImode and
421 xImode for all MODE_PARTIAL_INT modes they use, but no others. */
422 if (GET_MODE_CLASS (to_mode) == MODE_PARTIAL_INT)
423 {
424 machine_mode full_mode
425 = smallest_mode_for_size (GET_MODE_BITSIZE (to_mode), MODE_INT);
426
427 gcc_assert (convert_optab_handler (trunc_optab, to_mode, full_mode)
428 != CODE_FOR_nothing);
429
430 if (full_mode != from_mode)
431 from = convert_to_mode (full_mode, from, unsignedp);
432 emit_unop_insn (convert_optab_handler (trunc_optab, to_mode, full_mode),
433 to, from, UNKNOWN);
434 return;
435 }
436 if (GET_MODE_CLASS (from_mode) == MODE_PARTIAL_INT)
437 {
438 rtx new_from;
439 machine_mode full_mode
440 = smallest_mode_for_size (GET_MODE_BITSIZE (from_mode), MODE_INT);
441 convert_optab ctab = unsignedp ? zext_optab : sext_optab;
442 enum insn_code icode;
443
444 icode = convert_optab_handler (ctab, full_mode, from_mode);
445 gcc_assert (icode != CODE_FOR_nothing);
446
447 if (to_mode == full_mode)
448 {
449 emit_unop_insn (icode, to, from, UNKNOWN);
450 return;
451 }
452
453 new_from = gen_reg_rtx (full_mode);
454 emit_unop_insn (icode, new_from, from, UNKNOWN);
455
456 /* else proceed to integer conversions below. */
457 from_mode = full_mode;
458 from = new_from;
459 }
460
461 /* Make sure both are fixed-point modes or both are not. */
462 gcc_assert (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode) ==
463 ALL_SCALAR_FIXED_POINT_MODE_P (to_mode));
464 if (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode))
465 {
466 /* If we widen from_mode to to_mode and they are in the same class,
467 we won't saturate the result.
468 Otherwise, always saturate the result to play safe. */
469 if (GET_MODE_CLASS (from_mode) == GET_MODE_CLASS (to_mode)
470 && GET_MODE_SIZE (from_mode) < GET_MODE_SIZE (to_mode))
471 expand_fixed_convert (to, from, 0, 0);
472 else
473 expand_fixed_convert (to, from, 0, 1);
474 return;
475 }
476
477 /* Now both modes are integers. */
478
479 /* Handle expanding beyond a word. */
480 if (GET_MODE_PRECISION (from_mode) < GET_MODE_PRECISION (to_mode)
481 && GET_MODE_PRECISION (to_mode) > BITS_PER_WORD)
482 {
483 rtx_insn *insns;
484 rtx lowpart;
485 rtx fill_value;
486 rtx lowfrom;
487 int i;
488 machine_mode lowpart_mode;
489 int nwords = CEIL (GET_MODE_SIZE (to_mode), UNITS_PER_WORD);
490
491 /* Try converting directly if the insn is supported. */
492 if ((code = can_extend_p (to_mode, from_mode, unsignedp))
493 != CODE_FOR_nothing)
494 {
495 /* If FROM is a SUBREG, put it into a register. Do this
496 so that we always generate the same set of insns for
497 better cse'ing; if an intermediate assignment occurred,
498 we won't be doing the operation directly on the SUBREG. */
499 if (optimize > 0 && GET_CODE (from) == SUBREG)
500 from = force_reg (from_mode, from);
501 emit_unop_insn (code, to, from, equiv_code);
502 return;
503 }
504 /* Next, try converting via full word. */
505 else if (GET_MODE_PRECISION (from_mode) < BITS_PER_WORD
506 && ((code = can_extend_p (to_mode, word_mode, unsignedp))
507 != CODE_FOR_nothing))
508 {
509 rtx word_to = gen_reg_rtx (word_mode);
510 if (REG_P (to))
511 {
512 if (reg_overlap_mentioned_p (to, from))
513 from = force_reg (from_mode, from);
514 emit_clobber (to);
515 }
516 convert_move (word_to, from, unsignedp);
517 emit_unop_insn (code, to, word_to, equiv_code);
518 return;
519 }
520
521 /* No special multiword conversion insn; do it by hand. */
522 start_sequence ();
523
524 /* Since we will turn this into a no conflict block, we must ensure the
525 the source does not overlap the target so force it into an isolated
526 register when maybe so. Likewise for any MEM input, since the
527 conversion sequence might require several references to it and we
528 must ensure we're getting the same value every time. */
529
530 if (MEM_P (from) || reg_overlap_mentioned_p (to, from))
531 from = force_reg (from_mode, from);
532
533 /* Get a copy of FROM widened to a word, if necessary. */
534 if (GET_MODE_PRECISION (from_mode) < BITS_PER_WORD)
535 lowpart_mode = word_mode;
536 else
537 lowpart_mode = from_mode;
538
539 lowfrom = convert_to_mode (lowpart_mode, from, unsignedp);
540
541 lowpart = gen_lowpart (lowpart_mode, to);
542 emit_move_insn (lowpart, lowfrom);
543
544 /* Compute the value to put in each remaining word. */
545 if (unsignedp)
546 fill_value = const0_rtx;
547 else
548 fill_value = emit_store_flag_force (gen_reg_rtx (word_mode),
549 LT, lowfrom, const0_rtx,
550 lowpart_mode, 0, -1);
551
552 /* Fill the remaining words. */
553 for (i = GET_MODE_SIZE (lowpart_mode) / UNITS_PER_WORD; i < nwords; i++)
554 {
555 int index = (WORDS_BIG_ENDIAN ? nwords - i - 1 : i);
556 rtx subword = operand_subword (to, index, 1, to_mode);
557
558 gcc_assert (subword);
559
560 if (fill_value != subword)
561 emit_move_insn (subword, fill_value);
562 }
563
564 insns = get_insns ();
565 end_sequence ();
566
567 emit_insn (insns);
568 return;
569 }
570
571 /* Truncating multi-word to a word or less. */
572 if (GET_MODE_PRECISION (from_mode) > BITS_PER_WORD
573 && GET_MODE_PRECISION (to_mode) <= BITS_PER_WORD)
574 {
575 if (!((MEM_P (from)
576 && ! MEM_VOLATILE_P (from)
577 && direct_load[(int) to_mode]
578 && ! mode_dependent_address_p (XEXP (from, 0),
579 MEM_ADDR_SPACE (from)))
580 || REG_P (from)
581 || GET_CODE (from) == SUBREG))
582 from = force_reg (from_mode, from);
583 convert_move (to, gen_lowpart (word_mode, from), 0);
584 return;
585 }
586
587 /* Now follow all the conversions between integers
588 no more than a word long. */
589
590 /* For truncation, usually we can just refer to FROM in a narrower mode. */
591 if (GET_MODE_BITSIZE (to_mode) < GET_MODE_BITSIZE (from_mode)
592 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode, from_mode))
593 {
594 if (!((MEM_P (from)
595 && ! MEM_VOLATILE_P (from)
596 && direct_load[(int) to_mode]
597 && ! mode_dependent_address_p (XEXP (from, 0),
598 MEM_ADDR_SPACE (from)))
599 || REG_P (from)
600 || GET_CODE (from) == SUBREG))
601 from = force_reg (from_mode, from);
602 if (REG_P (from) && REGNO (from) < FIRST_PSEUDO_REGISTER
603 && ! HARD_REGNO_MODE_OK (REGNO (from), to_mode))
604 from = copy_to_reg (from);
605 emit_move_insn (to, gen_lowpart (to_mode, from));
606 return;
607 }
608
609 /* Handle extension. */
610 if (GET_MODE_PRECISION (to_mode) > GET_MODE_PRECISION (from_mode))
611 {
612 /* Convert directly if that works. */
613 if ((code = can_extend_p (to_mode, from_mode, unsignedp))
614 != CODE_FOR_nothing)
615 {
616 emit_unop_insn (code, to, from, equiv_code);
617 return;
618 }
619 else
620 {
621 machine_mode intermediate;
622 rtx tmp;
623 int shift_amount;
624
625 /* Search for a mode to convert via. */
626 for (intermediate = from_mode; intermediate != VOIDmode;
627 intermediate = GET_MODE_WIDER_MODE (intermediate))
628 if (((can_extend_p (to_mode, intermediate, unsignedp)
629 != CODE_FOR_nothing)
630 || (GET_MODE_SIZE (to_mode) < GET_MODE_SIZE (intermediate)
631 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode, intermediate)))
632 && (can_extend_p (intermediate, from_mode, unsignedp)
633 != CODE_FOR_nothing))
634 {
635 convert_move (to, convert_to_mode (intermediate, from,
636 unsignedp), unsignedp);
637 return;
638 }
639
640 /* No suitable intermediate mode.
641 Generate what we need with shifts. */
642 shift_amount = (GET_MODE_PRECISION (to_mode)
643 - GET_MODE_PRECISION (from_mode));
644 from = gen_lowpart (to_mode, force_reg (from_mode, from));
645 tmp = expand_shift (LSHIFT_EXPR, to_mode, from, shift_amount,
646 to, unsignedp);
647 tmp = expand_shift (RSHIFT_EXPR, to_mode, tmp, shift_amount,
648 to, unsignedp);
649 if (tmp != to)
650 emit_move_insn (to, tmp);
651 return;
652 }
653 }
654
655 /* Support special truncate insns for certain modes. */
656 if (convert_optab_handler (trunc_optab, to_mode,
657 from_mode) != CODE_FOR_nothing)
658 {
659 emit_unop_insn (convert_optab_handler (trunc_optab, to_mode, from_mode),
660 to, from, UNKNOWN);
661 return;
662 }
663
664 /* Handle truncation of volatile memrefs, and so on;
665 the things that couldn't be truncated directly,
666 and for which there was no special instruction.
667
668 ??? Code above formerly short-circuited this, for most integer
669 mode pairs, with a force_reg in from_mode followed by a recursive
670 call to this routine. Appears always to have been wrong. */
671 if (GET_MODE_PRECISION (to_mode) < GET_MODE_PRECISION (from_mode))
672 {
673 rtx temp = force_reg (to_mode, gen_lowpart (to_mode, from));
674 emit_move_insn (to, temp);
675 return;
676 }
677
678 /* Mode combination is not recognized. */
679 gcc_unreachable ();
680 }
681
682 /* Return an rtx for a value that would result
683 from converting X to mode MODE.
684 Both X and MODE may be floating, or both integer.
685 UNSIGNEDP is nonzero if X is an unsigned value.
686 This can be done by referring to a part of X in place
687 or by copying to a new temporary with conversion. */
688
689 rtx
690 convert_to_mode (machine_mode mode, rtx x, int unsignedp)
691 {
692 return convert_modes (mode, VOIDmode, x, unsignedp);
693 }
694
695 /* Return an rtx for a value that would result
696 from converting X from mode OLDMODE to mode MODE.
697 Both modes may be floating, or both integer.
698 UNSIGNEDP is nonzero if X is an unsigned value.
699
700 This can be done by referring to a part of X in place
701 or by copying to a new temporary with conversion.
702
703 You can give VOIDmode for OLDMODE, if you are sure X has a nonvoid mode. */
704
705 rtx
706 convert_modes (machine_mode mode, machine_mode oldmode, rtx x, int unsignedp)
707 {
708 rtx temp;
709
710 /* If FROM is a SUBREG that indicates that we have already done at least
711 the required extension, strip it. */
712
713 if (GET_CODE (x) == SUBREG && SUBREG_PROMOTED_VAR_P (x)
714 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) >= GET_MODE_SIZE (mode)
715 && SUBREG_CHECK_PROMOTED_SIGN (x, unsignedp))
716 x = gen_lowpart (mode, SUBREG_REG (x));
717
718 if (GET_MODE (x) != VOIDmode)
719 oldmode = GET_MODE (x);
720
721 if (mode == oldmode)
722 return x;
723
724 if (CONST_SCALAR_INT_P (x) && GET_MODE_CLASS (mode) == MODE_INT)
725 {
726 /* If the caller did not tell us the old mode, then there is not
727 much to do with respect to canonicalization. We have to
728 assume that all the bits are significant. */
729 if (GET_MODE_CLASS (oldmode) != MODE_INT)
730 oldmode = MAX_MODE_INT;
731 wide_int w = wide_int::from (std::make_pair (x, oldmode),
732 GET_MODE_PRECISION (mode),
733 unsignedp ? UNSIGNED : SIGNED);
734 return immed_wide_int_const (w, mode);
735 }
736
737 /* We can do this with a gen_lowpart if both desired and current modes
738 are integer, and this is either a constant integer, a register, or a
739 non-volatile MEM. */
740 if (GET_MODE_CLASS (mode) == MODE_INT
741 && GET_MODE_CLASS (oldmode) == MODE_INT
742 && GET_MODE_PRECISION (mode) <= GET_MODE_PRECISION (oldmode)
743 && ((MEM_P (x) && !MEM_VOLATILE_P (x) && direct_load[(int) mode])
744 || (REG_P (x)
745 && (!HARD_REGISTER_P (x)
746 || HARD_REGNO_MODE_OK (REGNO (x), mode))
747 && TRULY_NOOP_TRUNCATION_MODES_P (mode, GET_MODE (x)))))
748
749 return gen_lowpart (mode, x);
750
751 /* Converting from integer constant into mode is always equivalent to an
752 subreg operation. */
753 if (VECTOR_MODE_P (mode) && GET_MODE (x) == VOIDmode)
754 {
755 gcc_assert (GET_MODE_BITSIZE (mode) == GET_MODE_BITSIZE (oldmode));
756 return simplify_gen_subreg (mode, x, oldmode, 0);
757 }
758
759 temp = gen_reg_rtx (mode);
760 convert_move (temp, x, unsignedp);
761 return temp;
762 }
763 \f
764 /* Return the largest alignment we can use for doing a move (or store)
765 of MAX_PIECES. ALIGN is the largest alignment we could use. */
766
767 static unsigned int
768 alignment_for_piecewise_move (unsigned int max_pieces, unsigned int align)
769 {
770 machine_mode tmode;
771
772 tmode = mode_for_size (max_pieces * BITS_PER_UNIT, MODE_INT, 1);
773 if (align >= GET_MODE_ALIGNMENT (tmode))
774 align = GET_MODE_ALIGNMENT (tmode);
775 else
776 {
777 machine_mode tmode, xmode;
778
779 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT), xmode = tmode;
780 tmode != VOIDmode;
781 xmode = tmode, tmode = GET_MODE_WIDER_MODE (tmode))
782 if (GET_MODE_SIZE (tmode) > max_pieces
783 || SLOW_UNALIGNED_ACCESS (tmode, align))
784 break;
785
786 align = MAX (align, GET_MODE_ALIGNMENT (xmode));
787 }
788
789 return align;
790 }
791
792 /* Return the widest integer mode no wider than SIZE. If no such mode
793 can be found, return VOIDmode. */
794
795 static machine_mode
796 widest_int_mode_for_size (unsigned int size)
797 {
798 machine_mode tmode, mode = VOIDmode;
799
800 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT);
801 tmode != VOIDmode; tmode = GET_MODE_WIDER_MODE (tmode))
802 if (GET_MODE_SIZE (tmode) < size)
803 mode = tmode;
804
805 return mode;
806 }
807
808 /* Determine whether the LEN bytes can be moved by using several move
809 instructions. Return nonzero if a call to move_by_pieces should
810 succeed. */
811
812 int
813 can_move_by_pieces (unsigned HOST_WIDE_INT len,
814 unsigned int align)
815 {
816 return targetm.use_by_pieces_infrastructure_p (len, align, MOVE_BY_PIECES,
817 optimize_insn_for_speed_p ());
818 }
819
820 /* Generate several move instructions to copy LEN bytes from block FROM to
821 block TO. (These are MEM rtx's with BLKmode).
822
823 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
824 used to push FROM to the stack.
825
826 ALIGN is maximum stack alignment we can assume.
827
828 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
829 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
830 stpcpy. */
831
832 rtx
833 move_by_pieces (rtx to, rtx from, unsigned HOST_WIDE_INT len,
834 unsigned int align, int endp)
835 {
836 struct move_by_pieces_d data;
837 machine_mode to_addr_mode;
838 machine_mode from_addr_mode = get_address_mode (from);
839 rtx to_addr, from_addr = XEXP (from, 0);
840 unsigned int max_size = MOVE_MAX_PIECES + 1;
841 enum insn_code icode;
842
843 align = MIN (to ? MEM_ALIGN (to) : align, MEM_ALIGN (from));
844
845 data.offset = 0;
846 data.from_addr = from_addr;
847 if (to)
848 {
849 to_addr_mode = get_address_mode (to);
850 to_addr = XEXP (to, 0);
851 data.to = to;
852 data.autinc_to
853 = (GET_CODE (to_addr) == PRE_INC || GET_CODE (to_addr) == PRE_DEC
854 || GET_CODE (to_addr) == POST_INC || GET_CODE (to_addr) == POST_DEC);
855 data.reverse
856 = (GET_CODE (to_addr) == PRE_DEC || GET_CODE (to_addr) == POST_DEC);
857 }
858 else
859 {
860 to_addr_mode = VOIDmode;
861 to_addr = NULL_RTX;
862 data.to = NULL_RTX;
863 data.autinc_to = 1;
864 if (STACK_GROWS_DOWNWARD)
865 data.reverse = 1;
866 else
867 data.reverse = 0;
868 }
869 data.to_addr = to_addr;
870 data.from = from;
871 data.autinc_from
872 = (GET_CODE (from_addr) == PRE_INC || GET_CODE (from_addr) == PRE_DEC
873 || GET_CODE (from_addr) == POST_INC
874 || GET_CODE (from_addr) == POST_DEC);
875
876 data.explicit_inc_from = 0;
877 data.explicit_inc_to = 0;
878 if (data.reverse) data.offset = len;
879 data.len = len;
880
881 /* If copying requires more than two move insns,
882 copy addresses to registers (to make displacements shorter)
883 and use post-increment if available. */
884 if (!(data.autinc_from && data.autinc_to)
885 && move_by_pieces_ninsns (len, align, max_size) > 2)
886 {
887 /* Find the mode of the largest move...
888 MODE might not be used depending on the definitions of the
889 USE_* macros below. */
890 machine_mode mode ATTRIBUTE_UNUSED
891 = widest_int_mode_for_size (max_size);
892
893 if (USE_LOAD_PRE_DECREMENT (mode) && data.reverse && ! data.autinc_from)
894 {
895 data.from_addr = copy_to_mode_reg (from_addr_mode,
896 plus_constant (from_addr_mode,
897 from_addr, len));
898 data.autinc_from = 1;
899 data.explicit_inc_from = -1;
900 }
901 if (USE_LOAD_POST_INCREMENT (mode) && ! data.autinc_from)
902 {
903 data.from_addr = copy_to_mode_reg (from_addr_mode, from_addr);
904 data.autinc_from = 1;
905 data.explicit_inc_from = 1;
906 }
907 if (!data.autinc_from && CONSTANT_P (from_addr))
908 data.from_addr = copy_to_mode_reg (from_addr_mode, from_addr);
909 if (USE_STORE_PRE_DECREMENT (mode) && data.reverse && ! data.autinc_to)
910 {
911 data.to_addr = copy_to_mode_reg (to_addr_mode,
912 plus_constant (to_addr_mode,
913 to_addr, len));
914 data.autinc_to = 1;
915 data.explicit_inc_to = -1;
916 }
917 if (USE_STORE_POST_INCREMENT (mode) && ! data.reverse && ! data.autinc_to)
918 {
919 data.to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
920 data.autinc_to = 1;
921 data.explicit_inc_to = 1;
922 }
923 if (!data.autinc_to && CONSTANT_P (to_addr))
924 data.to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
925 }
926
927 align = alignment_for_piecewise_move (MOVE_MAX_PIECES, align);
928
929 /* First move what we can in the largest integer mode, then go to
930 successively smaller modes. */
931
932 while (max_size > 1 && data.len > 0)
933 {
934 machine_mode mode = widest_int_mode_for_size (max_size);
935
936 if (mode == VOIDmode)
937 break;
938
939 icode = optab_handler (mov_optab, mode);
940 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
941 move_by_pieces_1 (GEN_FCN (icode), mode, &data);
942
943 max_size = GET_MODE_SIZE (mode);
944 }
945
946 /* The code above should have handled everything. */
947 gcc_assert (!data.len);
948
949 if (endp)
950 {
951 rtx to1;
952
953 gcc_assert (!data.reverse);
954 if (data.autinc_to)
955 {
956 if (endp == 2)
957 {
958 if (HAVE_POST_INCREMENT && data.explicit_inc_to > 0)
959 emit_insn (gen_add2_insn (data.to_addr, constm1_rtx));
960 else
961 data.to_addr = copy_to_mode_reg (to_addr_mode,
962 plus_constant (to_addr_mode,
963 data.to_addr,
964 -1));
965 }
966 to1 = adjust_automodify_address (data.to, QImode, data.to_addr,
967 data.offset);
968 }
969 else
970 {
971 if (endp == 2)
972 --data.offset;
973 to1 = adjust_address (data.to, QImode, data.offset);
974 }
975 return to1;
976 }
977 else
978 return data.to;
979 }
980
981 /* Return number of insns required to move L bytes by pieces.
982 ALIGN (in bits) is maximum alignment we can assume. */
983
984 unsigned HOST_WIDE_INT
985 move_by_pieces_ninsns (unsigned HOST_WIDE_INT l, unsigned int align,
986 unsigned int max_size)
987 {
988 unsigned HOST_WIDE_INT n_insns = 0;
989
990 align = alignment_for_piecewise_move (MOVE_MAX_PIECES, align);
991
992 while (max_size > 1 && l > 0)
993 {
994 machine_mode mode;
995 enum insn_code icode;
996
997 mode = widest_int_mode_for_size (max_size);
998
999 if (mode == VOIDmode)
1000 break;
1001
1002 icode = optab_handler (mov_optab, mode);
1003 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
1004 n_insns += l / GET_MODE_SIZE (mode), l %= GET_MODE_SIZE (mode);
1005
1006 max_size = GET_MODE_SIZE (mode);
1007 }
1008
1009 gcc_assert (!l);
1010 return n_insns;
1011 }
1012
1013 /* Subroutine of move_by_pieces. Move as many bytes as appropriate
1014 with move instructions for mode MODE. GENFUN is the gen_... function
1015 to make a move insn for that mode. DATA has all the other info. */
1016
1017 static void
1018 move_by_pieces_1 (insn_gen_fn genfun, machine_mode mode,
1019 struct move_by_pieces_d *data)
1020 {
1021 unsigned int size = GET_MODE_SIZE (mode);
1022 rtx to1 = NULL_RTX, from1;
1023
1024 while (data->len >= size)
1025 {
1026 if (data->reverse)
1027 data->offset -= size;
1028
1029 if (data->to)
1030 {
1031 if (data->autinc_to)
1032 to1 = adjust_automodify_address (data->to, mode, data->to_addr,
1033 data->offset);
1034 else
1035 to1 = adjust_address (data->to, mode, data->offset);
1036 }
1037
1038 if (data->autinc_from)
1039 from1 = adjust_automodify_address (data->from, mode, data->from_addr,
1040 data->offset);
1041 else
1042 from1 = adjust_address (data->from, mode, data->offset);
1043
1044 if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0)
1045 emit_insn (gen_add2_insn (data->to_addr,
1046 gen_int_mode (-(HOST_WIDE_INT) size,
1047 GET_MODE (data->to_addr))));
1048 if (HAVE_PRE_DECREMENT && data->explicit_inc_from < 0)
1049 emit_insn (gen_add2_insn (data->from_addr,
1050 gen_int_mode (-(HOST_WIDE_INT) size,
1051 GET_MODE (data->from_addr))));
1052
1053 if (data->to)
1054 emit_insn ((*genfun) (to1, from1));
1055 else
1056 {
1057 #ifdef PUSH_ROUNDING
1058 emit_single_push_insn (mode, from1, NULL);
1059 #else
1060 gcc_unreachable ();
1061 #endif
1062 }
1063
1064 if (HAVE_POST_INCREMENT && data->explicit_inc_to > 0)
1065 emit_insn (gen_add2_insn (data->to_addr,
1066 gen_int_mode (size,
1067 GET_MODE (data->to_addr))));
1068 if (HAVE_POST_INCREMENT && data->explicit_inc_from > 0)
1069 emit_insn (gen_add2_insn (data->from_addr,
1070 gen_int_mode (size,
1071 GET_MODE (data->from_addr))));
1072
1073 if (! data->reverse)
1074 data->offset += size;
1075
1076 data->len -= size;
1077 }
1078 }
1079 \f
1080 /* Emit code to move a block Y to a block X. This may be done with
1081 string-move instructions, with multiple scalar move instructions,
1082 or with a library call.
1083
1084 Both X and Y must be MEM rtx's (perhaps inside VOLATILE) with mode BLKmode.
1085 SIZE is an rtx that says how long they are.
1086 ALIGN is the maximum alignment we can assume they have.
1087 METHOD describes what kind of copy this is, and what mechanisms may be used.
1088 MIN_SIZE is the minimal size of block to move
1089 MAX_SIZE is the maximal size of block to move, if it can not be represented
1090 in unsigned HOST_WIDE_INT, than it is mask of all ones.
1091
1092 Return the address of the new block, if memcpy is called and returns it,
1093 0 otherwise. */
1094
1095 rtx
1096 emit_block_move_hints (rtx x, rtx y, rtx size, enum block_op_methods method,
1097 unsigned int expected_align, HOST_WIDE_INT expected_size,
1098 unsigned HOST_WIDE_INT min_size,
1099 unsigned HOST_WIDE_INT max_size,
1100 unsigned HOST_WIDE_INT probable_max_size)
1101 {
1102 bool may_use_call;
1103 rtx retval = 0;
1104 unsigned int align;
1105
1106 gcc_assert (size);
1107 if (CONST_INT_P (size)
1108 && INTVAL (size) == 0)
1109 return 0;
1110
1111 switch (method)
1112 {
1113 case BLOCK_OP_NORMAL:
1114 case BLOCK_OP_TAILCALL:
1115 may_use_call = true;
1116 break;
1117
1118 case BLOCK_OP_CALL_PARM:
1119 may_use_call = block_move_libcall_safe_for_call_parm ();
1120
1121 /* Make inhibit_defer_pop nonzero around the library call
1122 to force it to pop the arguments right away. */
1123 NO_DEFER_POP;
1124 break;
1125
1126 case BLOCK_OP_NO_LIBCALL:
1127 may_use_call = false;
1128 break;
1129
1130 default:
1131 gcc_unreachable ();
1132 }
1133
1134 gcc_assert (MEM_P (x) && MEM_P (y));
1135 align = MIN (MEM_ALIGN (x), MEM_ALIGN (y));
1136 gcc_assert (align >= BITS_PER_UNIT);
1137
1138 /* Make sure we've got BLKmode addresses; store_one_arg can decide that
1139 block copy is more efficient for other large modes, e.g. DCmode. */
1140 x = adjust_address (x, BLKmode, 0);
1141 y = adjust_address (y, BLKmode, 0);
1142
1143 /* Set MEM_SIZE as appropriate for this block copy. The main place this
1144 can be incorrect is coming from __builtin_memcpy. */
1145 if (CONST_INT_P (size))
1146 {
1147 x = shallow_copy_rtx (x);
1148 y = shallow_copy_rtx (y);
1149 set_mem_size (x, INTVAL (size));
1150 set_mem_size (y, INTVAL (size));
1151 }
1152
1153 if (CONST_INT_P (size) && can_move_by_pieces (INTVAL (size), align))
1154 move_by_pieces (x, y, INTVAL (size), align, 0);
1155 else if (emit_block_move_via_movmem (x, y, size, align,
1156 expected_align, expected_size,
1157 min_size, max_size, probable_max_size))
1158 ;
1159 else if (may_use_call
1160 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (x))
1161 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (y)))
1162 {
1163 /* Since x and y are passed to a libcall, mark the corresponding
1164 tree EXPR as addressable. */
1165 tree y_expr = MEM_EXPR (y);
1166 tree x_expr = MEM_EXPR (x);
1167 if (y_expr)
1168 mark_addressable (y_expr);
1169 if (x_expr)
1170 mark_addressable (x_expr);
1171 retval = emit_block_move_via_libcall (x, y, size,
1172 method == BLOCK_OP_TAILCALL);
1173 }
1174
1175 else
1176 emit_block_move_via_loop (x, y, size, align);
1177
1178 if (method == BLOCK_OP_CALL_PARM)
1179 OK_DEFER_POP;
1180
1181 return retval;
1182 }
1183
1184 rtx
1185 emit_block_move (rtx x, rtx y, rtx size, enum block_op_methods method)
1186 {
1187 unsigned HOST_WIDE_INT max, min = 0;
1188 if (GET_CODE (size) == CONST_INT)
1189 min = max = UINTVAL (size);
1190 else
1191 max = GET_MODE_MASK (GET_MODE (size));
1192 return emit_block_move_hints (x, y, size, method, 0, -1,
1193 min, max, max);
1194 }
1195
1196 /* A subroutine of emit_block_move. Returns true if calling the
1197 block move libcall will not clobber any parameters which may have
1198 already been placed on the stack. */
1199
1200 static bool
1201 block_move_libcall_safe_for_call_parm (void)
1202 {
1203 #if defined (REG_PARM_STACK_SPACE)
1204 tree fn;
1205 #endif
1206
1207 /* If arguments are pushed on the stack, then they're safe. */
1208 if (PUSH_ARGS)
1209 return true;
1210
1211 /* If registers go on the stack anyway, any argument is sure to clobber
1212 an outgoing argument. */
1213 #if defined (REG_PARM_STACK_SPACE)
1214 fn = emit_block_move_libcall_fn (false);
1215 /* Avoid set but not used warning if *REG_PARM_STACK_SPACE doesn't
1216 depend on its argument. */
1217 (void) fn;
1218 if (OUTGOING_REG_PARM_STACK_SPACE ((!fn ? NULL_TREE : TREE_TYPE (fn)))
1219 && REG_PARM_STACK_SPACE (fn) != 0)
1220 return false;
1221 #endif
1222
1223 /* If any argument goes in memory, then it might clobber an outgoing
1224 argument. */
1225 {
1226 CUMULATIVE_ARGS args_so_far_v;
1227 cumulative_args_t args_so_far;
1228 tree fn, arg;
1229
1230 fn = emit_block_move_libcall_fn (false);
1231 INIT_CUMULATIVE_ARGS (args_so_far_v, TREE_TYPE (fn), NULL_RTX, 0, 3);
1232 args_so_far = pack_cumulative_args (&args_so_far_v);
1233
1234 arg = TYPE_ARG_TYPES (TREE_TYPE (fn));
1235 for ( ; arg != void_list_node ; arg = TREE_CHAIN (arg))
1236 {
1237 machine_mode mode = TYPE_MODE (TREE_VALUE (arg));
1238 rtx tmp = targetm.calls.function_arg (args_so_far, mode,
1239 NULL_TREE, true);
1240 if (!tmp || !REG_P (tmp))
1241 return false;
1242 if (targetm.calls.arg_partial_bytes (args_so_far, mode, NULL, 1))
1243 return false;
1244 targetm.calls.function_arg_advance (args_so_far, mode,
1245 NULL_TREE, true);
1246 }
1247 }
1248 return true;
1249 }
1250
1251 /* A subroutine of emit_block_move. Expand a movmem pattern;
1252 return true if successful. */
1253
1254 static bool
1255 emit_block_move_via_movmem (rtx x, rtx y, rtx size, unsigned int align,
1256 unsigned int expected_align, HOST_WIDE_INT expected_size,
1257 unsigned HOST_WIDE_INT min_size,
1258 unsigned HOST_WIDE_INT max_size,
1259 unsigned HOST_WIDE_INT probable_max_size)
1260 {
1261 int save_volatile_ok = volatile_ok;
1262 machine_mode mode;
1263
1264 if (expected_align < align)
1265 expected_align = align;
1266 if (expected_size != -1)
1267 {
1268 if ((unsigned HOST_WIDE_INT)expected_size > probable_max_size)
1269 expected_size = probable_max_size;
1270 if ((unsigned HOST_WIDE_INT)expected_size < min_size)
1271 expected_size = min_size;
1272 }
1273
1274 /* Since this is a move insn, we don't care about volatility. */
1275 volatile_ok = 1;
1276
1277 /* Try the most limited insn first, because there's no point
1278 including more than one in the machine description unless
1279 the more limited one has some advantage. */
1280
1281 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
1282 mode = GET_MODE_WIDER_MODE (mode))
1283 {
1284 enum insn_code code = direct_optab_handler (movmem_optab, mode);
1285
1286 if (code != CODE_FOR_nothing
1287 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
1288 here because if SIZE is less than the mode mask, as it is
1289 returned by the macro, it will definitely be less than the
1290 actual mode mask. Since SIZE is within the Pmode address
1291 space, we limit MODE to Pmode. */
1292 && ((CONST_INT_P (size)
1293 && ((unsigned HOST_WIDE_INT) INTVAL (size)
1294 <= (GET_MODE_MASK (mode) >> 1)))
1295 || max_size <= (GET_MODE_MASK (mode) >> 1)
1296 || GET_MODE_BITSIZE (mode) >= GET_MODE_BITSIZE (Pmode)))
1297 {
1298 struct expand_operand ops[9];
1299 unsigned int nops;
1300
1301 /* ??? When called via emit_block_move_for_call, it'd be
1302 nice if there were some way to inform the backend, so
1303 that it doesn't fail the expansion because it thinks
1304 emitting the libcall would be more efficient. */
1305 nops = insn_data[(int) code].n_generator_args;
1306 gcc_assert (nops == 4 || nops == 6 || nops == 8 || nops == 9);
1307
1308 create_fixed_operand (&ops[0], x);
1309 create_fixed_operand (&ops[1], y);
1310 /* The check above guarantees that this size conversion is valid. */
1311 create_convert_operand_to (&ops[2], size, mode, true);
1312 create_integer_operand (&ops[3], align / BITS_PER_UNIT);
1313 if (nops >= 6)
1314 {
1315 create_integer_operand (&ops[4], expected_align / BITS_PER_UNIT);
1316 create_integer_operand (&ops[5], expected_size);
1317 }
1318 if (nops >= 8)
1319 {
1320 create_integer_operand (&ops[6], min_size);
1321 /* If we can not represent the maximal size,
1322 make parameter NULL. */
1323 if ((HOST_WIDE_INT) max_size != -1)
1324 create_integer_operand (&ops[7], max_size);
1325 else
1326 create_fixed_operand (&ops[7], NULL);
1327 }
1328 if (nops == 9)
1329 {
1330 /* If we can not represent the maximal size,
1331 make parameter NULL. */
1332 if ((HOST_WIDE_INT) probable_max_size != -1)
1333 create_integer_operand (&ops[8], probable_max_size);
1334 else
1335 create_fixed_operand (&ops[8], NULL);
1336 }
1337 if (maybe_expand_insn (code, nops, ops))
1338 {
1339 volatile_ok = save_volatile_ok;
1340 return true;
1341 }
1342 }
1343 }
1344
1345 volatile_ok = save_volatile_ok;
1346 return false;
1347 }
1348
1349 /* A subroutine of emit_block_move. Expand a call to memcpy.
1350 Return the return value from memcpy, 0 otherwise. */
1351
1352 rtx
1353 emit_block_move_via_libcall (rtx dst, rtx src, rtx size, bool tailcall)
1354 {
1355 rtx dst_addr, src_addr;
1356 tree call_expr, fn, src_tree, dst_tree, size_tree;
1357 machine_mode size_mode;
1358 rtx retval;
1359
1360 /* Emit code to copy the addresses of DST and SRC and SIZE into new
1361 pseudos. We can then place those new pseudos into a VAR_DECL and
1362 use them later. */
1363
1364 dst_addr = copy_addr_to_reg (XEXP (dst, 0));
1365 src_addr = copy_addr_to_reg (XEXP (src, 0));
1366
1367 dst_addr = convert_memory_address (ptr_mode, dst_addr);
1368 src_addr = convert_memory_address (ptr_mode, src_addr);
1369
1370 dst_tree = make_tree (ptr_type_node, dst_addr);
1371 src_tree = make_tree (ptr_type_node, src_addr);
1372
1373 size_mode = TYPE_MODE (sizetype);
1374
1375 size = convert_to_mode (size_mode, size, 1);
1376 size = copy_to_mode_reg (size_mode, size);
1377
1378 /* It is incorrect to use the libcall calling conventions to call
1379 memcpy in this context. This could be a user call to memcpy and
1380 the user may wish to examine the return value from memcpy. For
1381 targets where libcalls and normal calls have different conventions
1382 for returning pointers, we could end up generating incorrect code. */
1383
1384 size_tree = make_tree (sizetype, size);
1385
1386 fn = emit_block_move_libcall_fn (true);
1387 call_expr = build_call_expr (fn, 3, dst_tree, src_tree, size_tree);
1388 CALL_EXPR_TAILCALL (call_expr) = tailcall;
1389
1390 retval = expand_normal (call_expr);
1391
1392 return retval;
1393 }
1394
1395 /* A subroutine of emit_block_move_via_libcall. Create the tree node
1396 for the function we use for block copies. */
1397
1398 static GTY(()) tree block_move_fn;
1399
1400 void
1401 init_block_move_fn (const char *asmspec)
1402 {
1403 if (!block_move_fn)
1404 {
1405 tree args, fn, attrs, attr_args;
1406
1407 fn = get_identifier ("memcpy");
1408 args = build_function_type_list (ptr_type_node, ptr_type_node,
1409 const_ptr_type_node, sizetype,
1410 NULL_TREE);
1411
1412 fn = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL, fn, args);
1413 DECL_EXTERNAL (fn) = 1;
1414 TREE_PUBLIC (fn) = 1;
1415 DECL_ARTIFICIAL (fn) = 1;
1416 TREE_NOTHROW (fn) = 1;
1417 DECL_VISIBILITY (fn) = VISIBILITY_DEFAULT;
1418 DECL_VISIBILITY_SPECIFIED (fn) = 1;
1419
1420 attr_args = build_tree_list (NULL_TREE, build_string (1, "1"));
1421 attrs = tree_cons (get_identifier ("fn spec"), attr_args, NULL);
1422
1423 decl_attributes (&fn, attrs, ATTR_FLAG_BUILT_IN);
1424
1425 block_move_fn = fn;
1426 }
1427
1428 if (asmspec)
1429 set_user_assembler_name (block_move_fn, asmspec);
1430 }
1431
1432 static tree
1433 emit_block_move_libcall_fn (int for_call)
1434 {
1435 static bool emitted_extern;
1436
1437 if (!block_move_fn)
1438 init_block_move_fn (NULL);
1439
1440 if (for_call && !emitted_extern)
1441 {
1442 emitted_extern = true;
1443 make_decl_rtl (block_move_fn);
1444 }
1445
1446 return block_move_fn;
1447 }
1448
1449 /* A subroutine of emit_block_move. Copy the data via an explicit
1450 loop. This is used only when libcalls are forbidden. */
1451 /* ??? It'd be nice to copy in hunks larger than QImode. */
1452
1453 static void
1454 emit_block_move_via_loop (rtx x, rtx y, rtx size,
1455 unsigned int align ATTRIBUTE_UNUSED)
1456 {
1457 rtx_code_label *cmp_label, *top_label;
1458 rtx iter, x_addr, y_addr, tmp;
1459 machine_mode x_addr_mode = get_address_mode (x);
1460 machine_mode y_addr_mode = get_address_mode (y);
1461 machine_mode iter_mode;
1462
1463 iter_mode = GET_MODE (size);
1464 if (iter_mode == VOIDmode)
1465 iter_mode = word_mode;
1466
1467 top_label = gen_label_rtx ();
1468 cmp_label = gen_label_rtx ();
1469 iter = gen_reg_rtx (iter_mode);
1470
1471 emit_move_insn (iter, const0_rtx);
1472
1473 x_addr = force_operand (XEXP (x, 0), NULL_RTX);
1474 y_addr = force_operand (XEXP (y, 0), NULL_RTX);
1475 do_pending_stack_adjust ();
1476
1477 emit_jump (cmp_label);
1478 emit_label (top_label);
1479
1480 tmp = convert_modes (x_addr_mode, iter_mode, iter, true);
1481 x_addr = simplify_gen_binary (PLUS, x_addr_mode, x_addr, tmp);
1482
1483 if (x_addr_mode != y_addr_mode)
1484 tmp = convert_modes (y_addr_mode, iter_mode, iter, true);
1485 y_addr = simplify_gen_binary (PLUS, y_addr_mode, y_addr, tmp);
1486
1487 x = change_address (x, QImode, x_addr);
1488 y = change_address (y, QImode, y_addr);
1489
1490 emit_move_insn (x, y);
1491
1492 tmp = expand_simple_binop (iter_mode, PLUS, iter, const1_rtx, iter,
1493 true, OPTAB_LIB_WIDEN);
1494 if (tmp != iter)
1495 emit_move_insn (iter, tmp);
1496
1497 emit_label (cmp_label);
1498
1499 emit_cmp_and_jump_insns (iter, size, LT, NULL_RTX, iter_mode,
1500 true, top_label, REG_BR_PROB_BASE * 90 / 100);
1501 }
1502 \f
1503 /* Copy all or part of a value X into registers starting at REGNO.
1504 The number of registers to be filled is NREGS. */
1505
1506 void
1507 move_block_to_reg (int regno, rtx x, int nregs, machine_mode mode)
1508 {
1509 int i;
1510 rtx pat;
1511 rtx_insn *last;
1512
1513 if (nregs == 0)
1514 return;
1515
1516 if (CONSTANT_P (x) && !targetm.legitimate_constant_p (mode, x))
1517 x = validize_mem (force_const_mem (mode, x));
1518
1519 /* See if the machine can do this with a load multiple insn. */
1520 if (HAVE_load_multiple)
1521 {
1522 last = get_last_insn ();
1523 pat = gen_load_multiple (gen_rtx_REG (word_mode, regno), x,
1524 GEN_INT (nregs));
1525 if (pat)
1526 {
1527 emit_insn (pat);
1528 return;
1529 }
1530 else
1531 delete_insns_since (last);
1532 }
1533
1534 for (i = 0; i < nregs; i++)
1535 emit_move_insn (gen_rtx_REG (word_mode, regno + i),
1536 operand_subword_force (x, i, mode));
1537 }
1538
1539 /* Copy all or part of a BLKmode value X out of registers starting at REGNO.
1540 The number of registers to be filled is NREGS. */
1541
1542 void
1543 move_block_from_reg (int regno, rtx x, int nregs)
1544 {
1545 int i;
1546
1547 if (nregs == 0)
1548 return;
1549
1550 /* See if the machine can do this with a store multiple insn. */
1551 if (HAVE_store_multiple)
1552 {
1553 rtx_insn *last = get_last_insn ();
1554 rtx pat = gen_store_multiple (x, gen_rtx_REG (word_mode, regno),
1555 GEN_INT (nregs));
1556 if (pat)
1557 {
1558 emit_insn (pat);
1559 return;
1560 }
1561 else
1562 delete_insns_since (last);
1563 }
1564
1565 for (i = 0; i < nregs; i++)
1566 {
1567 rtx tem = operand_subword (x, i, 1, BLKmode);
1568
1569 gcc_assert (tem);
1570
1571 emit_move_insn (tem, gen_rtx_REG (word_mode, regno + i));
1572 }
1573 }
1574
1575 /* Generate a PARALLEL rtx for a new non-consecutive group of registers from
1576 ORIG, where ORIG is a non-consecutive group of registers represented by
1577 a PARALLEL. The clone is identical to the original except in that the
1578 original set of registers is replaced by a new set of pseudo registers.
1579 The new set has the same modes as the original set. */
1580
1581 rtx
1582 gen_group_rtx (rtx orig)
1583 {
1584 int i, length;
1585 rtx *tmps;
1586
1587 gcc_assert (GET_CODE (orig) == PARALLEL);
1588
1589 length = XVECLEN (orig, 0);
1590 tmps = XALLOCAVEC (rtx, length);
1591
1592 /* Skip a NULL entry in first slot. */
1593 i = XEXP (XVECEXP (orig, 0, 0), 0) ? 0 : 1;
1594
1595 if (i)
1596 tmps[0] = 0;
1597
1598 for (; i < length; i++)
1599 {
1600 machine_mode mode = GET_MODE (XEXP (XVECEXP (orig, 0, i), 0));
1601 rtx offset = XEXP (XVECEXP (orig, 0, i), 1);
1602
1603 tmps[i] = gen_rtx_EXPR_LIST (VOIDmode, gen_reg_rtx (mode), offset);
1604 }
1605
1606 return gen_rtx_PARALLEL (GET_MODE (orig), gen_rtvec_v (length, tmps));
1607 }
1608
1609 /* A subroutine of emit_group_load. Arguments as for emit_group_load,
1610 except that values are placed in TMPS[i], and must later be moved
1611 into corresponding XEXP (XVECEXP (DST, 0, i), 0) element. */
1612
1613 static void
1614 emit_group_load_1 (rtx *tmps, rtx dst, rtx orig_src, tree type, int ssize)
1615 {
1616 rtx src;
1617 int start, i;
1618 machine_mode m = GET_MODE (orig_src);
1619
1620 gcc_assert (GET_CODE (dst) == PARALLEL);
1621
1622 if (m != VOIDmode
1623 && !SCALAR_INT_MODE_P (m)
1624 && !MEM_P (orig_src)
1625 && GET_CODE (orig_src) != CONCAT)
1626 {
1627 machine_mode imode = int_mode_for_mode (GET_MODE (orig_src));
1628 if (imode == BLKmode)
1629 src = assign_stack_temp (GET_MODE (orig_src), ssize);
1630 else
1631 src = gen_reg_rtx (imode);
1632 if (imode != BLKmode)
1633 src = gen_lowpart (GET_MODE (orig_src), src);
1634 emit_move_insn (src, orig_src);
1635 /* ...and back again. */
1636 if (imode != BLKmode)
1637 src = gen_lowpart (imode, src);
1638 emit_group_load_1 (tmps, dst, src, type, ssize);
1639 return;
1640 }
1641
1642 /* Check for a NULL entry, used to indicate that the parameter goes
1643 both on the stack and in registers. */
1644 if (XEXP (XVECEXP (dst, 0, 0), 0))
1645 start = 0;
1646 else
1647 start = 1;
1648
1649 /* Process the pieces. */
1650 for (i = start; i < XVECLEN (dst, 0); i++)
1651 {
1652 machine_mode mode = GET_MODE (XEXP (XVECEXP (dst, 0, i), 0));
1653 HOST_WIDE_INT bytepos = INTVAL (XEXP (XVECEXP (dst, 0, i), 1));
1654 unsigned int bytelen = GET_MODE_SIZE (mode);
1655 int shift = 0;
1656
1657 /* Handle trailing fragments that run over the size of the struct. */
1658 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
1659 {
1660 /* Arrange to shift the fragment to where it belongs.
1661 extract_bit_field loads to the lsb of the reg. */
1662 if (
1663 #ifdef BLOCK_REG_PADDING
1664 BLOCK_REG_PADDING (GET_MODE (orig_src), type, i == start)
1665 == (BYTES_BIG_ENDIAN ? upward : downward)
1666 #else
1667 BYTES_BIG_ENDIAN
1668 #endif
1669 )
1670 shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT;
1671 bytelen = ssize - bytepos;
1672 gcc_assert (bytelen > 0);
1673 }
1674
1675 /* If we won't be loading directly from memory, protect the real source
1676 from strange tricks we might play; but make sure that the source can
1677 be loaded directly into the destination. */
1678 src = orig_src;
1679 if (!MEM_P (orig_src)
1680 && (!CONSTANT_P (orig_src)
1681 || (GET_MODE (orig_src) != mode
1682 && GET_MODE (orig_src) != VOIDmode)))
1683 {
1684 if (GET_MODE (orig_src) == VOIDmode)
1685 src = gen_reg_rtx (mode);
1686 else
1687 src = gen_reg_rtx (GET_MODE (orig_src));
1688
1689 emit_move_insn (src, orig_src);
1690 }
1691
1692 /* Optimize the access just a bit. */
1693 if (MEM_P (src)
1694 && (! SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (src))
1695 || MEM_ALIGN (src) >= GET_MODE_ALIGNMENT (mode))
1696 && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0
1697 && bytelen == GET_MODE_SIZE (mode))
1698 {
1699 tmps[i] = gen_reg_rtx (mode);
1700 emit_move_insn (tmps[i], adjust_address (src, mode, bytepos));
1701 }
1702 else if (COMPLEX_MODE_P (mode)
1703 && GET_MODE (src) == mode
1704 && bytelen == GET_MODE_SIZE (mode))
1705 /* Let emit_move_complex do the bulk of the work. */
1706 tmps[i] = src;
1707 else if (GET_CODE (src) == CONCAT)
1708 {
1709 unsigned int slen = GET_MODE_SIZE (GET_MODE (src));
1710 unsigned int slen0 = GET_MODE_SIZE (GET_MODE (XEXP (src, 0)));
1711
1712 if ((bytepos == 0 && bytelen == slen0)
1713 || (bytepos != 0 && bytepos + bytelen <= slen))
1714 {
1715 /* The following assumes that the concatenated objects all
1716 have the same size. In this case, a simple calculation
1717 can be used to determine the object and the bit field
1718 to be extracted. */
1719 tmps[i] = XEXP (src, bytepos / slen0);
1720 if (! CONSTANT_P (tmps[i])
1721 && (!REG_P (tmps[i]) || GET_MODE (tmps[i]) != mode))
1722 tmps[i] = extract_bit_field (tmps[i], bytelen * BITS_PER_UNIT,
1723 (bytepos % slen0) * BITS_PER_UNIT,
1724 1, NULL_RTX, mode, mode);
1725 }
1726 else
1727 {
1728 rtx mem;
1729
1730 gcc_assert (!bytepos);
1731 mem = assign_stack_temp (GET_MODE (src), slen);
1732 emit_move_insn (mem, src);
1733 tmps[i] = extract_bit_field (mem, bytelen * BITS_PER_UNIT,
1734 0, 1, NULL_RTX, mode, mode);
1735 }
1736 }
1737 /* FIXME: A SIMD parallel will eventually lead to a subreg of a
1738 SIMD register, which is currently broken. While we get GCC
1739 to emit proper RTL for these cases, let's dump to memory. */
1740 else if (VECTOR_MODE_P (GET_MODE (dst))
1741 && REG_P (src))
1742 {
1743 int slen = GET_MODE_SIZE (GET_MODE (src));
1744 rtx mem;
1745
1746 mem = assign_stack_temp (GET_MODE (src), slen);
1747 emit_move_insn (mem, src);
1748 tmps[i] = adjust_address (mem, mode, (int) bytepos);
1749 }
1750 else if (CONSTANT_P (src) && GET_MODE (dst) != BLKmode
1751 && XVECLEN (dst, 0) > 1)
1752 tmps[i] = simplify_gen_subreg (mode, src, GET_MODE (dst), bytepos);
1753 else if (CONSTANT_P (src))
1754 {
1755 HOST_WIDE_INT len = (HOST_WIDE_INT) bytelen;
1756
1757 if (len == ssize)
1758 tmps[i] = src;
1759 else
1760 {
1761 rtx first, second;
1762
1763 /* TODO: const_wide_int can have sizes other than this... */
1764 gcc_assert (2 * len == ssize);
1765 split_double (src, &first, &second);
1766 if (i)
1767 tmps[i] = second;
1768 else
1769 tmps[i] = first;
1770 }
1771 }
1772 else if (REG_P (src) && GET_MODE (src) == mode)
1773 tmps[i] = src;
1774 else
1775 tmps[i] = extract_bit_field (src, bytelen * BITS_PER_UNIT,
1776 bytepos * BITS_PER_UNIT, 1, NULL_RTX,
1777 mode, mode);
1778
1779 if (shift)
1780 tmps[i] = expand_shift (LSHIFT_EXPR, mode, tmps[i],
1781 shift, tmps[i], 0);
1782 }
1783 }
1784
1785 /* Emit code to move a block SRC of type TYPE to a block DST,
1786 where DST is non-consecutive registers represented by a PARALLEL.
1787 SSIZE represents the total size of block ORIG_SRC in bytes, or -1
1788 if not known. */
1789
1790 void
1791 emit_group_load (rtx dst, rtx src, tree type, int ssize)
1792 {
1793 rtx *tmps;
1794 int i;
1795
1796 tmps = XALLOCAVEC (rtx, XVECLEN (dst, 0));
1797 emit_group_load_1 (tmps, dst, src, type, ssize);
1798
1799 /* Copy the extracted pieces into the proper (probable) hard regs. */
1800 for (i = 0; i < XVECLEN (dst, 0); i++)
1801 {
1802 rtx d = XEXP (XVECEXP (dst, 0, i), 0);
1803 if (d == NULL)
1804 continue;
1805 emit_move_insn (d, tmps[i]);
1806 }
1807 }
1808
1809 /* Similar, but load SRC into new pseudos in a format that looks like
1810 PARALLEL. This can later be fed to emit_group_move to get things
1811 in the right place. */
1812
1813 rtx
1814 emit_group_load_into_temps (rtx parallel, rtx src, tree type, int ssize)
1815 {
1816 rtvec vec;
1817 int i;
1818
1819 vec = rtvec_alloc (XVECLEN (parallel, 0));
1820 emit_group_load_1 (&RTVEC_ELT (vec, 0), parallel, src, type, ssize);
1821
1822 /* Convert the vector to look just like the original PARALLEL, except
1823 with the computed values. */
1824 for (i = 0; i < XVECLEN (parallel, 0); i++)
1825 {
1826 rtx e = XVECEXP (parallel, 0, i);
1827 rtx d = XEXP (e, 0);
1828
1829 if (d)
1830 {
1831 d = force_reg (GET_MODE (d), RTVEC_ELT (vec, i));
1832 e = alloc_EXPR_LIST (REG_NOTE_KIND (e), d, XEXP (e, 1));
1833 }
1834 RTVEC_ELT (vec, i) = e;
1835 }
1836
1837 return gen_rtx_PARALLEL (GET_MODE (parallel), vec);
1838 }
1839
1840 /* Emit code to move a block SRC to block DST, where SRC and DST are
1841 non-consecutive groups of registers, each represented by a PARALLEL. */
1842
1843 void
1844 emit_group_move (rtx dst, rtx src)
1845 {
1846 int i;
1847
1848 gcc_assert (GET_CODE (src) == PARALLEL
1849 && GET_CODE (dst) == PARALLEL
1850 && XVECLEN (src, 0) == XVECLEN (dst, 0));
1851
1852 /* Skip first entry if NULL. */
1853 for (i = XEXP (XVECEXP (src, 0, 0), 0) ? 0 : 1; i < XVECLEN (src, 0); i++)
1854 emit_move_insn (XEXP (XVECEXP (dst, 0, i), 0),
1855 XEXP (XVECEXP (src, 0, i), 0));
1856 }
1857
1858 /* Move a group of registers represented by a PARALLEL into pseudos. */
1859
1860 rtx
1861 emit_group_move_into_temps (rtx src)
1862 {
1863 rtvec vec = rtvec_alloc (XVECLEN (src, 0));
1864 int i;
1865
1866 for (i = 0; i < XVECLEN (src, 0); i++)
1867 {
1868 rtx e = XVECEXP (src, 0, i);
1869 rtx d = XEXP (e, 0);
1870
1871 if (d)
1872 e = alloc_EXPR_LIST (REG_NOTE_KIND (e), copy_to_reg (d), XEXP (e, 1));
1873 RTVEC_ELT (vec, i) = e;
1874 }
1875
1876 return gen_rtx_PARALLEL (GET_MODE (src), vec);
1877 }
1878
1879 /* Emit code to move a block SRC to a block ORIG_DST of type TYPE,
1880 where SRC is non-consecutive registers represented by a PARALLEL.
1881 SSIZE represents the total size of block ORIG_DST, or -1 if not
1882 known. */
1883
1884 void
1885 emit_group_store (rtx orig_dst, rtx src, tree type ATTRIBUTE_UNUSED, int ssize)
1886 {
1887 rtx *tmps, dst;
1888 int start, finish, i;
1889 machine_mode m = GET_MODE (orig_dst);
1890
1891 gcc_assert (GET_CODE (src) == PARALLEL);
1892
1893 if (!SCALAR_INT_MODE_P (m)
1894 && !MEM_P (orig_dst) && GET_CODE (orig_dst) != CONCAT)
1895 {
1896 machine_mode imode = int_mode_for_mode (GET_MODE (orig_dst));
1897 if (imode == BLKmode)
1898 dst = assign_stack_temp (GET_MODE (orig_dst), ssize);
1899 else
1900 dst = gen_reg_rtx (imode);
1901 emit_group_store (dst, src, type, ssize);
1902 if (imode != BLKmode)
1903 dst = gen_lowpart (GET_MODE (orig_dst), dst);
1904 emit_move_insn (orig_dst, dst);
1905 return;
1906 }
1907
1908 /* Check for a NULL entry, used to indicate that the parameter goes
1909 both on the stack and in registers. */
1910 if (XEXP (XVECEXP (src, 0, 0), 0))
1911 start = 0;
1912 else
1913 start = 1;
1914 finish = XVECLEN (src, 0);
1915
1916 tmps = XALLOCAVEC (rtx, finish);
1917
1918 /* Copy the (probable) hard regs into pseudos. */
1919 for (i = start; i < finish; i++)
1920 {
1921 rtx reg = XEXP (XVECEXP (src, 0, i), 0);
1922 if (!REG_P (reg) || REGNO (reg) < FIRST_PSEUDO_REGISTER)
1923 {
1924 tmps[i] = gen_reg_rtx (GET_MODE (reg));
1925 emit_move_insn (tmps[i], reg);
1926 }
1927 else
1928 tmps[i] = reg;
1929 }
1930
1931 /* If we won't be storing directly into memory, protect the real destination
1932 from strange tricks we might play. */
1933 dst = orig_dst;
1934 if (GET_CODE (dst) == PARALLEL)
1935 {
1936 rtx temp;
1937
1938 /* We can get a PARALLEL dst if there is a conditional expression in
1939 a return statement. In that case, the dst and src are the same,
1940 so no action is necessary. */
1941 if (rtx_equal_p (dst, src))
1942 return;
1943
1944 /* It is unclear if we can ever reach here, but we may as well handle
1945 it. Allocate a temporary, and split this into a store/load to/from
1946 the temporary. */
1947 temp = assign_stack_temp (GET_MODE (dst), ssize);
1948 emit_group_store (temp, src, type, ssize);
1949 emit_group_load (dst, temp, type, ssize);
1950 return;
1951 }
1952 else if (!MEM_P (dst) && GET_CODE (dst) != CONCAT)
1953 {
1954 machine_mode outer = GET_MODE (dst);
1955 machine_mode inner;
1956 HOST_WIDE_INT bytepos;
1957 bool done = false;
1958 rtx temp;
1959
1960 if (!REG_P (dst) || REGNO (dst) < FIRST_PSEUDO_REGISTER)
1961 dst = gen_reg_rtx (outer);
1962
1963 /* Make life a bit easier for combine. */
1964 /* If the first element of the vector is the low part
1965 of the destination mode, use a paradoxical subreg to
1966 initialize the destination. */
1967 if (start < finish)
1968 {
1969 inner = GET_MODE (tmps[start]);
1970 bytepos = subreg_lowpart_offset (inner, outer);
1971 if (INTVAL (XEXP (XVECEXP (src, 0, start), 1)) == bytepos)
1972 {
1973 temp = simplify_gen_subreg (outer, tmps[start],
1974 inner, 0);
1975 if (temp)
1976 {
1977 emit_move_insn (dst, temp);
1978 done = true;
1979 start++;
1980 }
1981 }
1982 }
1983
1984 /* If the first element wasn't the low part, try the last. */
1985 if (!done
1986 && start < finish - 1)
1987 {
1988 inner = GET_MODE (tmps[finish - 1]);
1989 bytepos = subreg_lowpart_offset (inner, outer);
1990 if (INTVAL (XEXP (XVECEXP (src, 0, finish - 1), 1)) == bytepos)
1991 {
1992 temp = simplify_gen_subreg (outer, tmps[finish - 1],
1993 inner, 0);
1994 if (temp)
1995 {
1996 emit_move_insn (dst, temp);
1997 done = true;
1998 finish--;
1999 }
2000 }
2001 }
2002
2003 /* Otherwise, simply initialize the result to zero. */
2004 if (!done)
2005 emit_move_insn (dst, CONST0_RTX (outer));
2006 }
2007
2008 /* Process the pieces. */
2009 for (i = start; i < finish; i++)
2010 {
2011 HOST_WIDE_INT bytepos = INTVAL (XEXP (XVECEXP (src, 0, i), 1));
2012 machine_mode mode = GET_MODE (tmps[i]);
2013 unsigned int bytelen = GET_MODE_SIZE (mode);
2014 unsigned int adj_bytelen;
2015 rtx dest = dst;
2016
2017 /* Handle trailing fragments that run over the size of the struct. */
2018 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
2019 adj_bytelen = ssize - bytepos;
2020 else
2021 adj_bytelen = bytelen;
2022
2023 if (GET_CODE (dst) == CONCAT)
2024 {
2025 if (bytepos + adj_bytelen
2026 <= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0))))
2027 dest = XEXP (dst, 0);
2028 else if (bytepos >= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0))))
2029 {
2030 bytepos -= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0)));
2031 dest = XEXP (dst, 1);
2032 }
2033 else
2034 {
2035 machine_mode dest_mode = GET_MODE (dest);
2036 machine_mode tmp_mode = GET_MODE (tmps[i]);
2037
2038 gcc_assert (bytepos == 0 && XVECLEN (src, 0));
2039
2040 if (GET_MODE_ALIGNMENT (dest_mode)
2041 >= GET_MODE_ALIGNMENT (tmp_mode))
2042 {
2043 dest = assign_stack_temp (dest_mode,
2044 GET_MODE_SIZE (dest_mode));
2045 emit_move_insn (adjust_address (dest,
2046 tmp_mode,
2047 bytepos),
2048 tmps[i]);
2049 dst = dest;
2050 }
2051 else
2052 {
2053 dest = assign_stack_temp (tmp_mode,
2054 GET_MODE_SIZE (tmp_mode));
2055 emit_move_insn (dest, tmps[i]);
2056 dst = adjust_address (dest, dest_mode, bytepos);
2057 }
2058 break;
2059 }
2060 }
2061
2062 /* Handle trailing fragments that run over the size of the struct. */
2063 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
2064 {
2065 /* store_bit_field always takes its value from the lsb.
2066 Move the fragment to the lsb if it's not already there. */
2067 if (
2068 #ifdef BLOCK_REG_PADDING
2069 BLOCK_REG_PADDING (GET_MODE (orig_dst), type, i == start)
2070 == (BYTES_BIG_ENDIAN ? upward : downward)
2071 #else
2072 BYTES_BIG_ENDIAN
2073 #endif
2074 )
2075 {
2076 int shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT;
2077 tmps[i] = expand_shift (RSHIFT_EXPR, mode, tmps[i],
2078 shift, tmps[i], 0);
2079 }
2080
2081 /* Make sure not to write past the end of the struct. */
2082 store_bit_field (dest,
2083 adj_bytelen * BITS_PER_UNIT, bytepos * BITS_PER_UNIT,
2084 bytepos * BITS_PER_UNIT, ssize * BITS_PER_UNIT - 1,
2085 VOIDmode, tmps[i]);
2086 }
2087
2088 /* Optimize the access just a bit. */
2089 else if (MEM_P (dest)
2090 && (!SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (dest))
2091 || MEM_ALIGN (dest) >= GET_MODE_ALIGNMENT (mode))
2092 && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0
2093 && bytelen == GET_MODE_SIZE (mode))
2094 emit_move_insn (adjust_address (dest, mode, bytepos), tmps[i]);
2095
2096 else
2097 store_bit_field (dest, bytelen * BITS_PER_UNIT, bytepos * BITS_PER_UNIT,
2098 0, 0, mode, tmps[i]);
2099 }
2100
2101 /* Copy from the pseudo into the (probable) hard reg. */
2102 if (orig_dst != dst)
2103 emit_move_insn (orig_dst, dst);
2104 }
2105
2106 /* Return a form of X that does not use a PARALLEL. TYPE is the type
2107 of the value stored in X. */
2108
2109 rtx
2110 maybe_emit_group_store (rtx x, tree type)
2111 {
2112 machine_mode mode = TYPE_MODE (type);
2113 gcc_checking_assert (GET_MODE (x) == VOIDmode || GET_MODE (x) == mode);
2114 if (GET_CODE (x) == PARALLEL)
2115 {
2116 rtx result = gen_reg_rtx (mode);
2117 emit_group_store (result, x, type, int_size_in_bytes (type));
2118 return result;
2119 }
2120 return x;
2121 }
2122
2123 /* Copy a BLKmode object of TYPE out of a register SRCREG into TARGET.
2124
2125 This is used on targets that return BLKmode values in registers. */
2126
2127 void
2128 copy_blkmode_from_reg (rtx target, rtx srcreg, tree type)
2129 {
2130 unsigned HOST_WIDE_INT bytes = int_size_in_bytes (type);
2131 rtx src = NULL, dst = NULL;
2132 unsigned HOST_WIDE_INT bitsize = MIN (TYPE_ALIGN (type), BITS_PER_WORD);
2133 unsigned HOST_WIDE_INT bitpos, xbitpos, padding_correction = 0;
2134 machine_mode mode = GET_MODE (srcreg);
2135 machine_mode tmode = GET_MODE (target);
2136 machine_mode copy_mode;
2137
2138 /* BLKmode registers created in the back-end shouldn't have survived. */
2139 gcc_assert (mode != BLKmode);
2140
2141 /* If the structure doesn't take up a whole number of words, see whether
2142 SRCREG is padded on the left or on the right. If it's on the left,
2143 set PADDING_CORRECTION to the number of bits to skip.
2144
2145 In most ABIs, the structure will be returned at the least end of
2146 the register, which translates to right padding on little-endian
2147 targets and left padding on big-endian targets. The opposite
2148 holds if the structure is returned at the most significant
2149 end of the register. */
2150 if (bytes % UNITS_PER_WORD != 0
2151 && (targetm.calls.return_in_msb (type)
2152 ? !BYTES_BIG_ENDIAN
2153 : BYTES_BIG_ENDIAN))
2154 padding_correction
2155 = (BITS_PER_WORD - ((bytes % UNITS_PER_WORD) * BITS_PER_UNIT));
2156
2157 /* We can use a single move if we have an exact mode for the size. */
2158 else if (MEM_P (target)
2159 && (!SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (target))
2160 || MEM_ALIGN (target) >= GET_MODE_ALIGNMENT (mode))
2161 && bytes == GET_MODE_SIZE (mode))
2162 {
2163 emit_move_insn (adjust_address (target, mode, 0), srcreg);
2164 return;
2165 }
2166
2167 /* And if we additionally have the same mode for a register. */
2168 else if (REG_P (target)
2169 && GET_MODE (target) == mode
2170 && bytes == GET_MODE_SIZE (mode))
2171 {
2172 emit_move_insn (target, srcreg);
2173 return;
2174 }
2175
2176 /* This code assumes srcreg is at least a full word. If it isn't, copy it
2177 into a new pseudo which is a full word. */
2178 if (GET_MODE_SIZE (mode) < UNITS_PER_WORD)
2179 {
2180 srcreg = convert_to_mode (word_mode, srcreg, TYPE_UNSIGNED (type));
2181 mode = word_mode;
2182 }
2183
2184 /* Copy the structure BITSIZE bits at a time. If the target lives in
2185 memory, take care of not reading/writing past its end by selecting
2186 a copy mode suited to BITSIZE. This should always be possible given
2187 how it is computed.
2188
2189 If the target lives in register, make sure not to select a copy mode
2190 larger than the mode of the register.
2191
2192 We could probably emit more efficient code for machines which do not use
2193 strict alignment, but it doesn't seem worth the effort at the current
2194 time. */
2195
2196 copy_mode = word_mode;
2197 if (MEM_P (target))
2198 {
2199 machine_mode mem_mode = mode_for_size (bitsize, MODE_INT, 1);
2200 if (mem_mode != BLKmode)
2201 copy_mode = mem_mode;
2202 }
2203 else if (REG_P (target) && GET_MODE_BITSIZE (tmode) < BITS_PER_WORD)
2204 copy_mode = tmode;
2205
2206 for (bitpos = 0, xbitpos = padding_correction;
2207 bitpos < bytes * BITS_PER_UNIT;
2208 bitpos += bitsize, xbitpos += bitsize)
2209 {
2210 /* We need a new source operand each time xbitpos is on a
2211 word boundary and when xbitpos == padding_correction
2212 (the first time through). */
2213 if (xbitpos % BITS_PER_WORD == 0 || xbitpos == padding_correction)
2214 src = operand_subword_force (srcreg, xbitpos / BITS_PER_WORD, mode);
2215
2216 /* We need a new destination operand each time bitpos is on
2217 a word boundary. */
2218 if (REG_P (target) && GET_MODE_BITSIZE (tmode) < BITS_PER_WORD)
2219 dst = target;
2220 else if (bitpos % BITS_PER_WORD == 0)
2221 dst = operand_subword (target, bitpos / BITS_PER_WORD, 1, tmode);
2222
2223 /* Use xbitpos for the source extraction (right justified) and
2224 bitpos for the destination store (left justified). */
2225 store_bit_field (dst, bitsize, bitpos % BITS_PER_WORD, 0, 0, copy_mode,
2226 extract_bit_field (src, bitsize,
2227 xbitpos % BITS_PER_WORD, 1,
2228 NULL_RTX, copy_mode, copy_mode));
2229 }
2230 }
2231
2232 /* Copy BLKmode value SRC into a register of mode MODE. Return the
2233 register if it contains any data, otherwise return null.
2234
2235 This is used on targets that return BLKmode values in registers. */
2236
2237 rtx
2238 copy_blkmode_to_reg (machine_mode mode, tree src)
2239 {
2240 int i, n_regs;
2241 unsigned HOST_WIDE_INT bitpos, xbitpos, padding_correction = 0, bytes;
2242 unsigned int bitsize;
2243 rtx *dst_words, dst, x, src_word = NULL_RTX, dst_word = NULL_RTX;
2244 machine_mode dst_mode;
2245
2246 gcc_assert (TYPE_MODE (TREE_TYPE (src)) == BLKmode);
2247
2248 x = expand_normal (src);
2249
2250 bytes = int_size_in_bytes (TREE_TYPE (src));
2251 if (bytes == 0)
2252 return NULL_RTX;
2253
2254 /* If the structure doesn't take up a whole number of words, see
2255 whether the register value should be padded on the left or on
2256 the right. Set PADDING_CORRECTION to the number of padding
2257 bits needed on the left side.
2258
2259 In most ABIs, the structure will be returned at the least end of
2260 the register, which translates to right padding on little-endian
2261 targets and left padding on big-endian targets. The opposite
2262 holds if the structure is returned at the most significant
2263 end of the register. */
2264 if (bytes % UNITS_PER_WORD != 0
2265 && (targetm.calls.return_in_msb (TREE_TYPE (src))
2266 ? !BYTES_BIG_ENDIAN
2267 : BYTES_BIG_ENDIAN))
2268 padding_correction = (BITS_PER_WORD - ((bytes % UNITS_PER_WORD)
2269 * BITS_PER_UNIT));
2270
2271 n_regs = (bytes + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
2272 dst_words = XALLOCAVEC (rtx, n_regs);
2273 bitsize = MIN (TYPE_ALIGN (TREE_TYPE (src)), BITS_PER_WORD);
2274
2275 /* Copy the structure BITSIZE bits at a time. */
2276 for (bitpos = 0, xbitpos = padding_correction;
2277 bitpos < bytes * BITS_PER_UNIT;
2278 bitpos += bitsize, xbitpos += bitsize)
2279 {
2280 /* We need a new destination pseudo each time xbitpos is
2281 on a word boundary and when xbitpos == padding_correction
2282 (the first time through). */
2283 if (xbitpos % BITS_PER_WORD == 0
2284 || xbitpos == padding_correction)
2285 {
2286 /* Generate an appropriate register. */
2287 dst_word = gen_reg_rtx (word_mode);
2288 dst_words[xbitpos / BITS_PER_WORD] = dst_word;
2289
2290 /* Clear the destination before we move anything into it. */
2291 emit_move_insn (dst_word, CONST0_RTX (word_mode));
2292 }
2293
2294 /* We need a new source operand each time bitpos is on a word
2295 boundary. */
2296 if (bitpos % BITS_PER_WORD == 0)
2297 src_word = operand_subword_force (x, bitpos / BITS_PER_WORD, BLKmode);
2298
2299 /* Use bitpos for the source extraction (left justified) and
2300 xbitpos for the destination store (right justified). */
2301 store_bit_field (dst_word, bitsize, xbitpos % BITS_PER_WORD,
2302 0, 0, word_mode,
2303 extract_bit_field (src_word, bitsize,
2304 bitpos % BITS_PER_WORD, 1,
2305 NULL_RTX, word_mode, word_mode));
2306 }
2307
2308 if (mode == BLKmode)
2309 {
2310 /* Find the smallest integer mode large enough to hold the
2311 entire structure. */
2312 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
2313 mode != VOIDmode;
2314 mode = GET_MODE_WIDER_MODE (mode))
2315 /* Have we found a large enough mode? */
2316 if (GET_MODE_SIZE (mode) >= bytes)
2317 break;
2318
2319 /* A suitable mode should have been found. */
2320 gcc_assert (mode != VOIDmode);
2321 }
2322
2323 if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (word_mode))
2324 dst_mode = word_mode;
2325 else
2326 dst_mode = mode;
2327 dst = gen_reg_rtx (dst_mode);
2328
2329 for (i = 0; i < n_regs; i++)
2330 emit_move_insn (operand_subword (dst, i, 0, dst_mode), dst_words[i]);
2331
2332 if (mode != dst_mode)
2333 dst = gen_lowpart (mode, dst);
2334
2335 return dst;
2336 }
2337
2338 /* Add a USE expression for REG to the (possibly empty) list pointed
2339 to by CALL_FUSAGE. REG must denote a hard register. */
2340
2341 void
2342 use_reg_mode (rtx *call_fusage, rtx reg, machine_mode mode)
2343 {
2344 gcc_assert (REG_P (reg));
2345
2346 if (!HARD_REGISTER_P (reg))
2347 return;
2348
2349 *call_fusage
2350 = gen_rtx_EXPR_LIST (mode, gen_rtx_USE (VOIDmode, reg), *call_fusage);
2351 }
2352
2353 /* Add a CLOBBER expression for REG to the (possibly empty) list pointed
2354 to by CALL_FUSAGE. REG must denote a hard register. */
2355
2356 void
2357 clobber_reg_mode (rtx *call_fusage, rtx reg, machine_mode mode)
2358 {
2359 gcc_assert (REG_P (reg) && REGNO (reg) < FIRST_PSEUDO_REGISTER);
2360
2361 *call_fusage
2362 = gen_rtx_EXPR_LIST (mode, gen_rtx_CLOBBER (VOIDmode, reg), *call_fusage);
2363 }
2364
2365 /* Add USE expressions to *CALL_FUSAGE for each of NREGS consecutive regs,
2366 starting at REGNO. All of these registers must be hard registers. */
2367
2368 void
2369 use_regs (rtx *call_fusage, int regno, int nregs)
2370 {
2371 int i;
2372
2373 gcc_assert (regno + nregs <= FIRST_PSEUDO_REGISTER);
2374
2375 for (i = 0; i < nregs; i++)
2376 use_reg (call_fusage, regno_reg_rtx[regno + i]);
2377 }
2378
2379 /* Add USE expressions to *CALL_FUSAGE for each REG contained in the
2380 PARALLEL REGS. This is for calls that pass values in multiple
2381 non-contiguous locations. The Irix 6 ABI has examples of this. */
2382
2383 void
2384 use_group_regs (rtx *call_fusage, rtx regs)
2385 {
2386 int i;
2387
2388 for (i = 0; i < XVECLEN (regs, 0); i++)
2389 {
2390 rtx reg = XEXP (XVECEXP (regs, 0, i), 0);
2391
2392 /* A NULL entry means the parameter goes both on the stack and in
2393 registers. This can also be a MEM for targets that pass values
2394 partially on the stack and partially in registers. */
2395 if (reg != 0 && REG_P (reg))
2396 use_reg (call_fusage, reg);
2397 }
2398 }
2399
2400 /* Return the defining gimple statement for SSA_NAME NAME if it is an
2401 assigment and the code of the expresion on the RHS is CODE. Return
2402 NULL otherwise. */
2403
2404 static gimple
2405 get_def_for_expr (tree name, enum tree_code code)
2406 {
2407 gimple def_stmt;
2408
2409 if (TREE_CODE (name) != SSA_NAME)
2410 return NULL;
2411
2412 def_stmt = get_gimple_for_ssa_name (name);
2413 if (!def_stmt
2414 || gimple_assign_rhs_code (def_stmt) != code)
2415 return NULL;
2416
2417 return def_stmt;
2418 }
2419
2420 /* Return the defining gimple statement for SSA_NAME NAME if it is an
2421 assigment and the class of the expresion on the RHS is CLASS. Return
2422 NULL otherwise. */
2423
2424 static gimple
2425 get_def_for_expr_class (tree name, enum tree_code_class tclass)
2426 {
2427 gimple def_stmt;
2428
2429 if (TREE_CODE (name) != SSA_NAME)
2430 return NULL;
2431
2432 def_stmt = get_gimple_for_ssa_name (name);
2433 if (!def_stmt
2434 || TREE_CODE_CLASS (gimple_assign_rhs_code (def_stmt)) != tclass)
2435 return NULL;
2436
2437 return def_stmt;
2438 }
2439 \f
2440
2441 /* Determine whether the LEN bytes generated by CONSTFUN can be
2442 stored to memory using several move instructions. CONSTFUNDATA is
2443 a pointer which will be passed as argument in every CONSTFUN call.
2444 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
2445 a memset operation and false if it's a copy of a constant string.
2446 Return nonzero if a call to store_by_pieces should succeed. */
2447
2448 int
2449 can_store_by_pieces (unsigned HOST_WIDE_INT len,
2450 rtx (*constfun) (void *, HOST_WIDE_INT, machine_mode),
2451 void *constfundata, unsigned int align, bool memsetp)
2452 {
2453 unsigned HOST_WIDE_INT l;
2454 unsigned int max_size;
2455 HOST_WIDE_INT offset = 0;
2456 machine_mode mode;
2457 enum insn_code icode;
2458 int reverse;
2459 /* cst is set but not used if LEGITIMATE_CONSTANT doesn't use it. */
2460 rtx cst ATTRIBUTE_UNUSED;
2461
2462 if (len == 0)
2463 return 1;
2464
2465 if (!targetm.use_by_pieces_infrastructure_p (len, align,
2466 memsetp
2467 ? SET_BY_PIECES
2468 : STORE_BY_PIECES,
2469 optimize_insn_for_speed_p ()))
2470 return 0;
2471
2472 align = alignment_for_piecewise_move (STORE_MAX_PIECES, align);
2473
2474 /* We would first store what we can in the largest integer mode, then go to
2475 successively smaller modes. */
2476
2477 for (reverse = 0;
2478 reverse <= (HAVE_PRE_DECREMENT || HAVE_POST_DECREMENT);
2479 reverse++)
2480 {
2481 l = len;
2482 max_size = STORE_MAX_PIECES + 1;
2483 while (max_size > 1 && l > 0)
2484 {
2485 mode = widest_int_mode_for_size (max_size);
2486
2487 if (mode == VOIDmode)
2488 break;
2489
2490 icode = optab_handler (mov_optab, mode);
2491 if (icode != CODE_FOR_nothing
2492 && align >= GET_MODE_ALIGNMENT (mode))
2493 {
2494 unsigned int size = GET_MODE_SIZE (mode);
2495
2496 while (l >= size)
2497 {
2498 if (reverse)
2499 offset -= size;
2500
2501 cst = (*constfun) (constfundata, offset, mode);
2502 if (!targetm.legitimate_constant_p (mode, cst))
2503 return 0;
2504
2505 if (!reverse)
2506 offset += size;
2507
2508 l -= size;
2509 }
2510 }
2511
2512 max_size = GET_MODE_SIZE (mode);
2513 }
2514
2515 /* The code above should have handled everything. */
2516 gcc_assert (!l);
2517 }
2518
2519 return 1;
2520 }
2521
2522 /* Generate several move instructions to store LEN bytes generated by
2523 CONSTFUN to block TO. (A MEM rtx with BLKmode). CONSTFUNDATA is a
2524 pointer which will be passed as argument in every CONSTFUN call.
2525 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
2526 a memset operation and false if it's a copy of a constant string.
2527 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
2528 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
2529 stpcpy. */
2530
2531 rtx
2532 store_by_pieces (rtx to, unsigned HOST_WIDE_INT len,
2533 rtx (*constfun) (void *, HOST_WIDE_INT, machine_mode),
2534 void *constfundata, unsigned int align, bool memsetp, int endp)
2535 {
2536 machine_mode to_addr_mode = get_address_mode (to);
2537 struct store_by_pieces_d data;
2538
2539 if (len == 0)
2540 {
2541 gcc_assert (endp != 2);
2542 return to;
2543 }
2544
2545 gcc_assert (targetm.use_by_pieces_infrastructure_p
2546 (len, align,
2547 memsetp
2548 ? SET_BY_PIECES
2549 : STORE_BY_PIECES,
2550 optimize_insn_for_speed_p ()));
2551
2552 data.constfun = constfun;
2553 data.constfundata = constfundata;
2554 data.len = len;
2555 data.to = to;
2556 store_by_pieces_1 (&data, align);
2557 if (endp)
2558 {
2559 rtx to1;
2560
2561 gcc_assert (!data.reverse);
2562 if (data.autinc_to)
2563 {
2564 if (endp == 2)
2565 {
2566 if (HAVE_POST_INCREMENT && data.explicit_inc_to > 0)
2567 emit_insn (gen_add2_insn (data.to_addr, constm1_rtx));
2568 else
2569 data.to_addr = copy_to_mode_reg (to_addr_mode,
2570 plus_constant (to_addr_mode,
2571 data.to_addr,
2572 -1));
2573 }
2574 to1 = adjust_automodify_address (data.to, QImode, data.to_addr,
2575 data.offset);
2576 }
2577 else
2578 {
2579 if (endp == 2)
2580 --data.offset;
2581 to1 = adjust_address (data.to, QImode, data.offset);
2582 }
2583 return to1;
2584 }
2585 else
2586 return data.to;
2587 }
2588
2589 /* Generate several move instructions to clear LEN bytes of block TO. (A MEM
2590 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
2591
2592 static void
2593 clear_by_pieces (rtx to, unsigned HOST_WIDE_INT len, unsigned int align)
2594 {
2595 struct store_by_pieces_d data;
2596
2597 if (len == 0)
2598 return;
2599
2600 data.constfun = clear_by_pieces_1;
2601 data.constfundata = NULL;
2602 data.len = len;
2603 data.to = to;
2604 store_by_pieces_1 (&data, align);
2605 }
2606
2607 /* Callback routine for clear_by_pieces.
2608 Return const0_rtx unconditionally. */
2609
2610 static rtx
2611 clear_by_pieces_1 (void *data ATTRIBUTE_UNUSED,
2612 HOST_WIDE_INT offset ATTRIBUTE_UNUSED,
2613 machine_mode mode ATTRIBUTE_UNUSED)
2614 {
2615 return const0_rtx;
2616 }
2617
2618 /* Subroutine of clear_by_pieces and store_by_pieces.
2619 Generate several move instructions to store LEN bytes of block TO. (A MEM
2620 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
2621
2622 static void
2623 store_by_pieces_1 (struct store_by_pieces_d *data ATTRIBUTE_UNUSED,
2624 unsigned int align ATTRIBUTE_UNUSED)
2625 {
2626 machine_mode to_addr_mode = get_address_mode (data->to);
2627 rtx to_addr = XEXP (data->to, 0);
2628 unsigned int max_size = STORE_MAX_PIECES + 1;
2629 enum insn_code icode;
2630
2631 data->offset = 0;
2632 data->to_addr = to_addr;
2633 data->autinc_to
2634 = (GET_CODE (to_addr) == PRE_INC || GET_CODE (to_addr) == PRE_DEC
2635 || GET_CODE (to_addr) == POST_INC || GET_CODE (to_addr) == POST_DEC);
2636
2637 data->explicit_inc_to = 0;
2638 data->reverse
2639 = (GET_CODE (to_addr) == PRE_DEC || GET_CODE (to_addr) == POST_DEC);
2640 if (data->reverse)
2641 data->offset = data->len;
2642
2643 /* If storing requires more than two move insns,
2644 copy addresses to registers (to make displacements shorter)
2645 and use post-increment if available. */
2646 if (!data->autinc_to
2647 && move_by_pieces_ninsns (data->len, align, max_size) > 2)
2648 {
2649 /* Determine the main mode we'll be using.
2650 MODE might not be used depending on the definitions of the
2651 USE_* macros below. */
2652 machine_mode mode ATTRIBUTE_UNUSED
2653 = widest_int_mode_for_size (max_size);
2654
2655 if (USE_STORE_PRE_DECREMENT (mode) && data->reverse && ! data->autinc_to)
2656 {
2657 data->to_addr = copy_to_mode_reg (to_addr_mode,
2658 plus_constant (to_addr_mode,
2659 to_addr,
2660 data->len));
2661 data->autinc_to = 1;
2662 data->explicit_inc_to = -1;
2663 }
2664
2665 if (USE_STORE_POST_INCREMENT (mode) && ! data->reverse
2666 && ! data->autinc_to)
2667 {
2668 data->to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
2669 data->autinc_to = 1;
2670 data->explicit_inc_to = 1;
2671 }
2672
2673 if ( !data->autinc_to && CONSTANT_P (to_addr))
2674 data->to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
2675 }
2676
2677 align = alignment_for_piecewise_move (STORE_MAX_PIECES, align);
2678
2679 /* First store what we can in the largest integer mode, then go to
2680 successively smaller modes. */
2681
2682 while (max_size > 1 && data->len > 0)
2683 {
2684 machine_mode mode = widest_int_mode_for_size (max_size);
2685
2686 if (mode == VOIDmode)
2687 break;
2688
2689 icode = optab_handler (mov_optab, mode);
2690 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
2691 store_by_pieces_2 (GEN_FCN (icode), mode, data);
2692
2693 max_size = GET_MODE_SIZE (mode);
2694 }
2695
2696 /* The code above should have handled everything. */
2697 gcc_assert (!data->len);
2698 }
2699
2700 /* Subroutine of store_by_pieces_1. Store as many bytes as appropriate
2701 with move instructions for mode MODE. GENFUN is the gen_... function
2702 to make a move insn for that mode. DATA has all the other info. */
2703
2704 static void
2705 store_by_pieces_2 (insn_gen_fn genfun, machine_mode mode,
2706 struct store_by_pieces_d *data)
2707 {
2708 unsigned int size = GET_MODE_SIZE (mode);
2709 rtx to1, cst;
2710
2711 while (data->len >= size)
2712 {
2713 if (data->reverse)
2714 data->offset -= size;
2715
2716 if (data->autinc_to)
2717 to1 = adjust_automodify_address (data->to, mode, data->to_addr,
2718 data->offset);
2719 else
2720 to1 = adjust_address (data->to, mode, data->offset);
2721
2722 if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0)
2723 emit_insn (gen_add2_insn (data->to_addr,
2724 gen_int_mode (-(HOST_WIDE_INT) size,
2725 GET_MODE (data->to_addr))));
2726
2727 cst = (*data->constfun) (data->constfundata, data->offset, mode);
2728 emit_insn ((*genfun) (to1, cst));
2729
2730 if (HAVE_POST_INCREMENT && data->explicit_inc_to > 0)
2731 emit_insn (gen_add2_insn (data->to_addr,
2732 gen_int_mode (size,
2733 GET_MODE (data->to_addr))));
2734
2735 if (! data->reverse)
2736 data->offset += size;
2737
2738 data->len -= size;
2739 }
2740 }
2741 \f
2742 /* Write zeros through the storage of OBJECT. If OBJECT has BLKmode, SIZE is
2743 its length in bytes. */
2744
2745 rtx
2746 clear_storage_hints (rtx object, rtx size, enum block_op_methods method,
2747 unsigned int expected_align, HOST_WIDE_INT expected_size,
2748 unsigned HOST_WIDE_INT min_size,
2749 unsigned HOST_WIDE_INT max_size,
2750 unsigned HOST_WIDE_INT probable_max_size)
2751 {
2752 machine_mode mode = GET_MODE (object);
2753 unsigned int align;
2754
2755 gcc_assert (method == BLOCK_OP_NORMAL || method == BLOCK_OP_TAILCALL);
2756
2757 /* If OBJECT is not BLKmode and SIZE is the same size as its mode,
2758 just move a zero. Otherwise, do this a piece at a time. */
2759 if (mode != BLKmode
2760 && CONST_INT_P (size)
2761 && INTVAL (size) == (HOST_WIDE_INT) GET_MODE_SIZE (mode))
2762 {
2763 rtx zero = CONST0_RTX (mode);
2764 if (zero != NULL)
2765 {
2766 emit_move_insn (object, zero);
2767 return NULL;
2768 }
2769
2770 if (COMPLEX_MODE_P (mode))
2771 {
2772 zero = CONST0_RTX (GET_MODE_INNER (mode));
2773 if (zero != NULL)
2774 {
2775 write_complex_part (object, zero, 0);
2776 write_complex_part (object, zero, 1);
2777 return NULL;
2778 }
2779 }
2780 }
2781
2782 if (size == const0_rtx)
2783 return NULL;
2784
2785 align = MEM_ALIGN (object);
2786
2787 if (CONST_INT_P (size)
2788 && targetm.use_by_pieces_infrastructure_p (INTVAL (size), align,
2789 CLEAR_BY_PIECES,
2790 optimize_insn_for_speed_p ()))
2791 clear_by_pieces (object, INTVAL (size), align);
2792 else if (set_storage_via_setmem (object, size, const0_rtx, align,
2793 expected_align, expected_size,
2794 min_size, max_size, probable_max_size))
2795 ;
2796 else if (ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (object)))
2797 return set_storage_via_libcall (object, size, const0_rtx,
2798 method == BLOCK_OP_TAILCALL);
2799 else
2800 gcc_unreachable ();
2801
2802 return NULL;
2803 }
2804
2805 rtx
2806 clear_storage (rtx object, rtx size, enum block_op_methods method)
2807 {
2808 unsigned HOST_WIDE_INT max, min = 0;
2809 if (GET_CODE (size) == CONST_INT)
2810 min = max = UINTVAL (size);
2811 else
2812 max = GET_MODE_MASK (GET_MODE (size));
2813 return clear_storage_hints (object, size, method, 0, -1, min, max, max);
2814 }
2815
2816
2817 /* A subroutine of clear_storage. Expand a call to memset.
2818 Return the return value of memset, 0 otherwise. */
2819
2820 rtx
2821 set_storage_via_libcall (rtx object, rtx size, rtx val, bool tailcall)
2822 {
2823 tree call_expr, fn, object_tree, size_tree, val_tree;
2824 machine_mode size_mode;
2825 rtx retval;
2826
2827 /* Emit code to copy OBJECT and SIZE into new pseudos. We can then
2828 place those into new pseudos into a VAR_DECL and use them later. */
2829
2830 object = copy_addr_to_reg (XEXP (object, 0));
2831
2832 size_mode = TYPE_MODE (sizetype);
2833 size = convert_to_mode (size_mode, size, 1);
2834 size = copy_to_mode_reg (size_mode, size);
2835
2836 /* It is incorrect to use the libcall calling conventions to call
2837 memset in this context. This could be a user call to memset and
2838 the user may wish to examine the return value from memset. For
2839 targets where libcalls and normal calls have different conventions
2840 for returning pointers, we could end up generating incorrect code. */
2841
2842 object_tree = make_tree (ptr_type_node, object);
2843 if (!CONST_INT_P (val))
2844 val = convert_to_mode (TYPE_MODE (integer_type_node), val, 1);
2845 size_tree = make_tree (sizetype, size);
2846 val_tree = make_tree (integer_type_node, val);
2847
2848 fn = clear_storage_libcall_fn (true);
2849 call_expr = build_call_expr (fn, 3, object_tree, val_tree, size_tree);
2850 CALL_EXPR_TAILCALL (call_expr) = tailcall;
2851
2852 retval = expand_normal (call_expr);
2853
2854 return retval;
2855 }
2856
2857 /* A subroutine of set_storage_via_libcall. Create the tree node
2858 for the function we use for block clears. */
2859
2860 tree block_clear_fn;
2861
2862 void
2863 init_block_clear_fn (const char *asmspec)
2864 {
2865 if (!block_clear_fn)
2866 {
2867 tree fn, args;
2868
2869 fn = get_identifier ("memset");
2870 args = build_function_type_list (ptr_type_node, ptr_type_node,
2871 integer_type_node, sizetype,
2872 NULL_TREE);
2873
2874 fn = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL, fn, args);
2875 DECL_EXTERNAL (fn) = 1;
2876 TREE_PUBLIC (fn) = 1;
2877 DECL_ARTIFICIAL (fn) = 1;
2878 TREE_NOTHROW (fn) = 1;
2879 DECL_VISIBILITY (fn) = VISIBILITY_DEFAULT;
2880 DECL_VISIBILITY_SPECIFIED (fn) = 1;
2881
2882 block_clear_fn = fn;
2883 }
2884
2885 if (asmspec)
2886 set_user_assembler_name (block_clear_fn, asmspec);
2887 }
2888
2889 static tree
2890 clear_storage_libcall_fn (int for_call)
2891 {
2892 static bool emitted_extern;
2893
2894 if (!block_clear_fn)
2895 init_block_clear_fn (NULL);
2896
2897 if (for_call && !emitted_extern)
2898 {
2899 emitted_extern = true;
2900 make_decl_rtl (block_clear_fn);
2901 }
2902
2903 return block_clear_fn;
2904 }
2905 \f
2906 /* Expand a setmem pattern; return true if successful. */
2907
2908 bool
2909 set_storage_via_setmem (rtx object, rtx size, rtx val, unsigned int align,
2910 unsigned int expected_align, HOST_WIDE_INT expected_size,
2911 unsigned HOST_WIDE_INT min_size,
2912 unsigned HOST_WIDE_INT max_size,
2913 unsigned HOST_WIDE_INT probable_max_size)
2914 {
2915 /* Try the most limited insn first, because there's no point
2916 including more than one in the machine description unless
2917 the more limited one has some advantage. */
2918
2919 machine_mode mode;
2920
2921 if (expected_align < align)
2922 expected_align = align;
2923 if (expected_size != -1)
2924 {
2925 if ((unsigned HOST_WIDE_INT)expected_size > max_size)
2926 expected_size = max_size;
2927 if ((unsigned HOST_WIDE_INT)expected_size < min_size)
2928 expected_size = min_size;
2929 }
2930
2931 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
2932 mode = GET_MODE_WIDER_MODE (mode))
2933 {
2934 enum insn_code code = direct_optab_handler (setmem_optab, mode);
2935
2936 if (code != CODE_FOR_nothing
2937 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
2938 here because if SIZE is less than the mode mask, as it is
2939 returned by the macro, it will definitely be less than the
2940 actual mode mask. Since SIZE is within the Pmode address
2941 space, we limit MODE to Pmode. */
2942 && ((CONST_INT_P (size)
2943 && ((unsigned HOST_WIDE_INT) INTVAL (size)
2944 <= (GET_MODE_MASK (mode) >> 1)))
2945 || max_size <= (GET_MODE_MASK (mode) >> 1)
2946 || GET_MODE_BITSIZE (mode) >= GET_MODE_BITSIZE (Pmode)))
2947 {
2948 struct expand_operand ops[9];
2949 unsigned int nops;
2950
2951 nops = insn_data[(int) code].n_generator_args;
2952 gcc_assert (nops == 4 || nops == 6 || nops == 8 || nops == 9);
2953
2954 create_fixed_operand (&ops[0], object);
2955 /* The check above guarantees that this size conversion is valid. */
2956 create_convert_operand_to (&ops[1], size, mode, true);
2957 create_convert_operand_from (&ops[2], val, byte_mode, true);
2958 create_integer_operand (&ops[3], align / BITS_PER_UNIT);
2959 if (nops >= 6)
2960 {
2961 create_integer_operand (&ops[4], expected_align / BITS_PER_UNIT);
2962 create_integer_operand (&ops[5], expected_size);
2963 }
2964 if (nops >= 8)
2965 {
2966 create_integer_operand (&ops[6], min_size);
2967 /* If we can not represent the maximal size,
2968 make parameter NULL. */
2969 if ((HOST_WIDE_INT) max_size != -1)
2970 create_integer_operand (&ops[7], max_size);
2971 else
2972 create_fixed_operand (&ops[7], NULL);
2973 }
2974 if (nops == 9)
2975 {
2976 /* If we can not represent the maximal size,
2977 make parameter NULL. */
2978 if ((HOST_WIDE_INT) probable_max_size != -1)
2979 create_integer_operand (&ops[8], probable_max_size);
2980 else
2981 create_fixed_operand (&ops[8], NULL);
2982 }
2983 if (maybe_expand_insn (code, nops, ops))
2984 return true;
2985 }
2986 }
2987
2988 return false;
2989 }
2990
2991 \f
2992 /* Write to one of the components of the complex value CPLX. Write VAL to
2993 the real part if IMAG_P is false, and the imaginary part if its true. */
2994
2995 void
2996 write_complex_part (rtx cplx, rtx val, bool imag_p)
2997 {
2998 machine_mode cmode;
2999 machine_mode imode;
3000 unsigned ibitsize;
3001
3002 if (GET_CODE (cplx) == CONCAT)
3003 {
3004 emit_move_insn (XEXP (cplx, imag_p), val);
3005 return;
3006 }
3007
3008 cmode = GET_MODE (cplx);
3009 imode = GET_MODE_INNER (cmode);
3010 ibitsize = GET_MODE_BITSIZE (imode);
3011
3012 /* For MEMs simplify_gen_subreg may generate an invalid new address
3013 because, e.g., the original address is considered mode-dependent
3014 by the target, which restricts simplify_subreg from invoking
3015 adjust_address_nv. Instead of preparing fallback support for an
3016 invalid address, we call adjust_address_nv directly. */
3017 if (MEM_P (cplx))
3018 {
3019 emit_move_insn (adjust_address_nv (cplx, imode,
3020 imag_p ? GET_MODE_SIZE (imode) : 0),
3021 val);
3022 return;
3023 }
3024
3025 /* If the sub-object is at least word sized, then we know that subregging
3026 will work. This special case is important, since store_bit_field
3027 wants to operate on integer modes, and there's rarely an OImode to
3028 correspond to TCmode. */
3029 if (ibitsize >= BITS_PER_WORD
3030 /* For hard regs we have exact predicates. Assume we can split
3031 the original object if it spans an even number of hard regs.
3032 This special case is important for SCmode on 64-bit platforms
3033 where the natural size of floating-point regs is 32-bit. */
3034 || (REG_P (cplx)
3035 && REGNO (cplx) < FIRST_PSEUDO_REGISTER
3036 && REG_NREGS (cplx) % 2 == 0))
3037 {
3038 rtx part = simplify_gen_subreg (imode, cplx, cmode,
3039 imag_p ? GET_MODE_SIZE (imode) : 0);
3040 if (part)
3041 {
3042 emit_move_insn (part, val);
3043 return;
3044 }
3045 else
3046 /* simplify_gen_subreg may fail for sub-word MEMs. */
3047 gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD);
3048 }
3049
3050 store_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0, 0, 0, imode, val);
3051 }
3052
3053 /* Extract one of the components of the complex value CPLX. Extract the
3054 real part if IMAG_P is false, and the imaginary part if it's true. */
3055
3056 static rtx
3057 read_complex_part (rtx cplx, bool imag_p)
3058 {
3059 machine_mode cmode, imode;
3060 unsigned ibitsize;
3061
3062 if (GET_CODE (cplx) == CONCAT)
3063 return XEXP (cplx, imag_p);
3064
3065 cmode = GET_MODE (cplx);
3066 imode = GET_MODE_INNER (cmode);
3067 ibitsize = GET_MODE_BITSIZE (imode);
3068
3069 /* Special case reads from complex constants that got spilled to memory. */
3070 if (MEM_P (cplx) && GET_CODE (XEXP (cplx, 0)) == SYMBOL_REF)
3071 {
3072 tree decl = SYMBOL_REF_DECL (XEXP (cplx, 0));
3073 if (decl && TREE_CODE (decl) == COMPLEX_CST)
3074 {
3075 tree part = imag_p ? TREE_IMAGPART (decl) : TREE_REALPART (decl);
3076 if (CONSTANT_CLASS_P (part))
3077 return expand_expr (part, NULL_RTX, imode, EXPAND_NORMAL);
3078 }
3079 }
3080
3081 /* For MEMs simplify_gen_subreg may generate an invalid new address
3082 because, e.g., the original address is considered mode-dependent
3083 by the target, which restricts simplify_subreg from invoking
3084 adjust_address_nv. Instead of preparing fallback support for an
3085 invalid address, we call adjust_address_nv directly. */
3086 if (MEM_P (cplx))
3087 return adjust_address_nv (cplx, imode,
3088 imag_p ? GET_MODE_SIZE (imode) : 0);
3089
3090 /* If the sub-object is at least word sized, then we know that subregging
3091 will work. This special case is important, since extract_bit_field
3092 wants to operate on integer modes, and there's rarely an OImode to
3093 correspond to TCmode. */
3094 if (ibitsize >= BITS_PER_WORD
3095 /* For hard regs we have exact predicates. Assume we can split
3096 the original object if it spans an even number of hard regs.
3097 This special case is important for SCmode on 64-bit platforms
3098 where the natural size of floating-point regs is 32-bit. */
3099 || (REG_P (cplx)
3100 && REGNO (cplx) < FIRST_PSEUDO_REGISTER
3101 && REG_NREGS (cplx) % 2 == 0))
3102 {
3103 rtx ret = simplify_gen_subreg (imode, cplx, cmode,
3104 imag_p ? GET_MODE_SIZE (imode) : 0);
3105 if (ret)
3106 return ret;
3107 else
3108 /* simplify_gen_subreg may fail for sub-word MEMs. */
3109 gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD);
3110 }
3111
3112 return extract_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0,
3113 true, NULL_RTX, imode, imode);
3114 }
3115 \f
3116 /* A subroutine of emit_move_insn_1. Yet another lowpart generator.
3117 NEW_MODE and OLD_MODE are the same size. Return NULL if X cannot be
3118 represented in NEW_MODE. If FORCE is true, this will never happen, as
3119 we'll force-create a SUBREG if needed. */
3120
3121 static rtx
3122 emit_move_change_mode (machine_mode new_mode,
3123 machine_mode old_mode, rtx x, bool force)
3124 {
3125 rtx ret;
3126
3127 if (push_operand (x, GET_MODE (x)))
3128 {
3129 ret = gen_rtx_MEM (new_mode, XEXP (x, 0));
3130 MEM_COPY_ATTRIBUTES (ret, x);
3131 }
3132 else if (MEM_P (x))
3133 {
3134 /* We don't have to worry about changing the address since the
3135 size in bytes is supposed to be the same. */
3136 if (reload_in_progress)
3137 {
3138 /* Copy the MEM to change the mode and move any
3139 substitutions from the old MEM to the new one. */
3140 ret = adjust_address_nv (x, new_mode, 0);
3141 copy_replacements (x, ret);
3142 }
3143 else
3144 ret = adjust_address (x, new_mode, 0);
3145 }
3146 else
3147 {
3148 /* Note that we do want simplify_subreg's behavior of validating
3149 that the new mode is ok for a hard register. If we were to use
3150 simplify_gen_subreg, we would create the subreg, but would
3151 probably run into the target not being able to implement it. */
3152 /* Except, of course, when FORCE is true, when this is exactly what
3153 we want. Which is needed for CCmodes on some targets. */
3154 if (force)
3155 ret = simplify_gen_subreg (new_mode, x, old_mode, 0);
3156 else
3157 ret = simplify_subreg (new_mode, x, old_mode, 0);
3158 }
3159
3160 return ret;
3161 }
3162
3163 /* A subroutine of emit_move_insn_1. Generate a move from Y into X using
3164 an integer mode of the same size as MODE. Returns the instruction
3165 emitted, or NULL if such a move could not be generated. */
3166
3167 static rtx_insn *
3168 emit_move_via_integer (machine_mode mode, rtx x, rtx y, bool force)
3169 {
3170 machine_mode imode;
3171 enum insn_code code;
3172
3173 /* There must exist a mode of the exact size we require. */
3174 imode = int_mode_for_mode (mode);
3175 if (imode == BLKmode)
3176 return NULL;
3177
3178 /* The target must support moves in this mode. */
3179 code = optab_handler (mov_optab, imode);
3180 if (code == CODE_FOR_nothing)
3181 return NULL;
3182
3183 x = emit_move_change_mode (imode, mode, x, force);
3184 if (x == NULL_RTX)
3185 return NULL;
3186 y = emit_move_change_mode (imode, mode, y, force);
3187 if (y == NULL_RTX)
3188 return NULL;
3189 return emit_insn (GEN_FCN (code) (x, y));
3190 }
3191
3192 /* A subroutine of emit_move_insn_1. X is a push_operand in MODE.
3193 Return an equivalent MEM that does not use an auto-increment. */
3194
3195 rtx
3196 emit_move_resolve_push (machine_mode mode, rtx x)
3197 {
3198 enum rtx_code code = GET_CODE (XEXP (x, 0));
3199 HOST_WIDE_INT adjust;
3200 rtx temp;
3201
3202 adjust = GET_MODE_SIZE (mode);
3203 #ifdef PUSH_ROUNDING
3204 adjust = PUSH_ROUNDING (adjust);
3205 #endif
3206 if (code == PRE_DEC || code == POST_DEC)
3207 adjust = -adjust;
3208 else if (code == PRE_MODIFY || code == POST_MODIFY)
3209 {
3210 rtx expr = XEXP (XEXP (x, 0), 1);
3211 HOST_WIDE_INT val;
3212
3213 gcc_assert (GET_CODE (expr) == PLUS || GET_CODE (expr) == MINUS);
3214 gcc_assert (CONST_INT_P (XEXP (expr, 1)));
3215 val = INTVAL (XEXP (expr, 1));
3216 if (GET_CODE (expr) == MINUS)
3217 val = -val;
3218 gcc_assert (adjust == val || adjust == -val);
3219 adjust = val;
3220 }
3221
3222 /* Do not use anti_adjust_stack, since we don't want to update
3223 stack_pointer_delta. */
3224 temp = expand_simple_binop (Pmode, PLUS, stack_pointer_rtx,
3225 gen_int_mode (adjust, Pmode), stack_pointer_rtx,
3226 0, OPTAB_LIB_WIDEN);
3227 if (temp != stack_pointer_rtx)
3228 emit_move_insn (stack_pointer_rtx, temp);
3229
3230 switch (code)
3231 {
3232 case PRE_INC:
3233 case PRE_DEC:
3234 case PRE_MODIFY:
3235 temp = stack_pointer_rtx;
3236 break;
3237 case POST_INC:
3238 case POST_DEC:
3239 case POST_MODIFY:
3240 temp = plus_constant (Pmode, stack_pointer_rtx, -adjust);
3241 break;
3242 default:
3243 gcc_unreachable ();
3244 }
3245
3246 return replace_equiv_address (x, temp);
3247 }
3248
3249 /* A subroutine of emit_move_complex. Generate a move from Y into X.
3250 X is known to satisfy push_operand, and MODE is known to be complex.
3251 Returns the last instruction emitted. */
3252
3253 rtx_insn *
3254 emit_move_complex_push (machine_mode mode, rtx x, rtx y)
3255 {
3256 machine_mode submode = GET_MODE_INNER (mode);
3257 bool imag_first;
3258
3259 #ifdef PUSH_ROUNDING
3260 unsigned int submodesize = GET_MODE_SIZE (submode);
3261
3262 /* In case we output to the stack, but the size is smaller than the
3263 machine can push exactly, we need to use move instructions. */
3264 if (PUSH_ROUNDING (submodesize) != submodesize)
3265 {
3266 x = emit_move_resolve_push (mode, x);
3267 return emit_move_insn (x, y);
3268 }
3269 #endif
3270
3271 /* Note that the real part always precedes the imag part in memory
3272 regardless of machine's endianness. */
3273 switch (GET_CODE (XEXP (x, 0)))
3274 {
3275 case PRE_DEC:
3276 case POST_DEC:
3277 imag_first = true;
3278 break;
3279 case PRE_INC:
3280 case POST_INC:
3281 imag_first = false;
3282 break;
3283 default:
3284 gcc_unreachable ();
3285 }
3286
3287 emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)),
3288 read_complex_part (y, imag_first));
3289 return emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)),
3290 read_complex_part (y, !imag_first));
3291 }
3292
3293 /* A subroutine of emit_move_complex. Perform the move from Y to X
3294 via two moves of the parts. Returns the last instruction emitted. */
3295
3296 rtx_insn *
3297 emit_move_complex_parts (rtx x, rtx y)
3298 {
3299 /* Show the output dies here. This is necessary for SUBREGs
3300 of pseudos since we cannot track their lifetimes correctly;
3301 hard regs shouldn't appear here except as return values. */
3302 if (!reload_completed && !reload_in_progress
3303 && REG_P (x) && !reg_overlap_mentioned_p (x, y))
3304 emit_clobber (x);
3305
3306 write_complex_part (x, read_complex_part (y, false), false);
3307 write_complex_part (x, read_complex_part (y, true), true);
3308
3309 return get_last_insn ();
3310 }
3311
3312 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3313 MODE is known to be complex. Returns the last instruction emitted. */
3314
3315 static rtx_insn *
3316 emit_move_complex (machine_mode mode, rtx x, rtx y)
3317 {
3318 bool try_int;
3319
3320 /* Need to take special care for pushes, to maintain proper ordering
3321 of the data, and possibly extra padding. */
3322 if (push_operand (x, mode))
3323 return emit_move_complex_push (mode, x, y);
3324
3325 /* See if we can coerce the target into moving both values at once, except
3326 for floating point where we favor moving as parts if this is easy. */
3327 if (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
3328 && optab_handler (mov_optab, GET_MODE_INNER (mode)) != CODE_FOR_nothing
3329 && !(REG_P (x)
3330 && HARD_REGISTER_P (x)
3331 && REG_NREGS (x) == 1)
3332 && !(REG_P (y)
3333 && HARD_REGISTER_P (y)
3334 && REG_NREGS (y) == 1))
3335 try_int = false;
3336 /* Not possible if the values are inherently not adjacent. */
3337 else if (GET_CODE (x) == CONCAT || GET_CODE (y) == CONCAT)
3338 try_int = false;
3339 /* Is possible if both are registers (or subregs of registers). */
3340 else if (register_operand (x, mode) && register_operand (y, mode))
3341 try_int = true;
3342 /* If one of the operands is a memory, and alignment constraints
3343 are friendly enough, we may be able to do combined memory operations.
3344 We do not attempt this if Y is a constant because that combination is
3345 usually better with the by-parts thing below. */
3346 else if ((MEM_P (x) ? !CONSTANT_P (y) : MEM_P (y))
3347 && (!STRICT_ALIGNMENT
3348 || get_mode_alignment (mode) == BIGGEST_ALIGNMENT))
3349 try_int = true;
3350 else
3351 try_int = false;
3352
3353 if (try_int)
3354 {
3355 rtx_insn *ret;
3356
3357 /* For memory to memory moves, optimal behavior can be had with the
3358 existing block move logic. */
3359 if (MEM_P (x) && MEM_P (y))
3360 {
3361 emit_block_move (x, y, GEN_INT (GET_MODE_SIZE (mode)),
3362 BLOCK_OP_NO_LIBCALL);
3363 return get_last_insn ();
3364 }
3365
3366 ret = emit_move_via_integer (mode, x, y, true);
3367 if (ret)
3368 return ret;
3369 }
3370
3371 return emit_move_complex_parts (x, y);
3372 }
3373
3374 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3375 MODE is known to be MODE_CC. Returns the last instruction emitted. */
3376
3377 static rtx_insn *
3378 emit_move_ccmode (machine_mode mode, rtx x, rtx y)
3379 {
3380 rtx_insn *ret;
3381
3382 /* Assume all MODE_CC modes are equivalent; if we have movcc, use it. */
3383 if (mode != CCmode)
3384 {
3385 enum insn_code code = optab_handler (mov_optab, CCmode);
3386 if (code != CODE_FOR_nothing)
3387 {
3388 x = emit_move_change_mode (CCmode, mode, x, true);
3389 y = emit_move_change_mode (CCmode, mode, y, true);
3390 return emit_insn (GEN_FCN (code) (x, y));
3391 }
3392 }
3393
3394 /* Otherwise, find the MODE_INT mode of the same width. */
3395 ret = emit_move_via_integer (mode, x, y, false);
3396 gcc_assert (ret != NULL);
3397 return ret;
3398 }
3399
3400 /* Return true if word I of OP lies entirely in the
3401 undefined bits of a paradoxical subreg. */
3402
3403 static bool
3404 undefined_operand_subword_p (const_rtx op, int i)
3405 {
3406 machine_mode innermode, innermostmode;
3407 int offset;
3408 if (GET_CODE (op) != SUBREG)
3409 return false;
3410 innermode = GET_MODE (op);
3411 innermostmode = GET_MODE (SUBREG_REG (op));
3412 offset = i * UNITS_PER_WORD + SUBREG_BYTE (op);
3413 /* The SUBREG_BYTE represents offset, as if the value were stored in
3414 memory, except for a paradoxical subreg where we define
3415 SUBREG_BYTE to be 0; undo this exception as in
3416 simplify_subreg. */
3417 if (SUBREG_BYTE (op) == 0
3418 && GET_MODE_SIZE (innermostmode) < GET_MODE_SIZE (innermode))
3419 {
3420 int difference = (GET_MODE_SIZE (innermostmode) - GET_MODE_SIZE (innermode));
3421 if (WORDS_BIG_ENDIAN)
3422 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
3423 if (BYTES_BIG_ENDIAN)
3424 offset += difference % UNITS_PER_WORD;
3425 }
3426 if (offset >= GET_MODE_SIZE (innermostmode)
3427 || offset <= -GET_MODE_SIZE (word_mode))
3428 return true;
3429 return false;
3430 }
3431
3432 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3433 MODE is any multi-word or full-word mode that lacks a move_insn
3434 pattern. Note that you will get better code if you define such
3435 patterns, even if they must turn into multiple assembler instructions. */
3436
3437 static rtx_insn *
3438 emit_move_multi_word (machine_mode mode, rtx x, rtx y)
3439 {
3440 rtx_insn *last_insn = 0;
3441 rtx_insn *seq;
3442 rtx inner;
3443 bool need_clobber;
3444 int i;
3445
3446 gcc_assert (GET_MODE_SIZE (mode) >= UNITS_PER_WORD);
3447
3448 /* If X is a push on the stack, do the push now and replace
3449 X with a reference to the stack pointer. */
3450 if (push_operand (x, mode))
3451 x = emit_move_resolve_push (mode, x);
3452
3453 /* If we are in reload, see if either operand is a MEM whose address
3454 is scheduled for replacement. */
3455 if (reload_in_progress && MEM_P (x)
3456 && (inner = find_replacement (&XEXP (x, 0))) != XEXP (x, 0))
3457 x = replace_equiv_address_nv (x, inner);
3458 if (reload_in_progress && MEM_P (y)
3459 && (inner = find_replacement (&XEXP (y, 0))) != XEXP (y, 0))
3460 y = replace_equiv_address_nv (y, inner);
3461
3462 start_sequence ();
3463
3464 need_clobber = false;
3465 for (i = 0;
3466 i < (GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD;
3467 i++)
3468 {
3469 rtx xpart = operand_subword (x, i, 1, mode);
3470 rtx ypart;
3471
3472 /* Do not generate code for a move if it would come entirely
3473 from the undefined bits of a paradoxical subreg. */
3474 if (undefined_operand_subword_p (y, i))
3475 continue;
3476
3477 ypart = operand_subword (y, i, 1, mode);
3478
3479 /* If we can't get a part of Y, put Y into memory if it is a
3480 constant. Otherwise, force it into a register. Then we must
3481 be able to get a part of Y. */
3482 if (ypart == 0 && CONSTANT_P (y))
3483 {
3484 y = use_anchored_address (force_const_mem (mode, y));
3485 ypart = operand_subword (y, i, 1, mode);
3486 }
3487 else if (ypart == 0)
3488 ypart = operand_subword_force (y, i, mode);
3489
3490 gcc_assert (xpart && ypart);
3491
3492 need_clobber |= (GET_CODE (xpart) == SUBREG);
3493
3494 last_insn = emit_move_insn (xpart, ypart);
3495 }
3496
3497 seq = get_insns ();
3498 end_sequence ();
3499
3500 /* Show the output dies here. This is necessary for SUBREGs
3501 of pseudos since we cannot track their lifetimes correctly;
3502 hard regs shouldn't appear here except as return values.
3503 We never want to emit such a clobber after reload. */
3504 if (x != y
3505 && ! (reload_in_progress || reload_completed)
3506 && need_clobber != 0)
3507 emit_clobber (x);
3508
3509 emit_insn (seq);
3510
3511 return last_insn;
3512 }
3513
3514 /* Low level part of emit_move_insn.
3515 Called just like emit_move_insn, but assumes X and Y
3516 are basically valid. */
3517
3518 rtx_insn *
3519 emit_move_insn_1 (rtx x, rtx y)
3520 {
3521 machine_mode mode = GET_MODE (x);
3522 enum insn_code code;
3523
3524 gcc_assert ((unsigned int) mode < (unsigned int) MAX_MACHINE_MODE);
3525
3526 code = optab_handler (mov_optab, mode);
3527 if (code != CODE_FOR_nothing)
3528 return emit_insn (GEN_FCN (code) (x, y));
3529
3530 /* Expand complex moves by moving real part and imag part. */
3531 if (COMPLEX_MODE_P (mode))
3532 return emit_move_complex (mode, x, y);
3533
3534 if (GET_MODE_CLASS (mode) == MODE_DECIMAL_FLOAT
3535 || ALL_FIXED_POINT_MODE_P (mode))
3536 {
3537 rtx_insn *result = emit_move_via_integer (mode, x, y, true);
3538
3539 /* If we can't find an integer mode, use multi words. */
3540 if (result)
3541 return result;
3542 else
3543 return emit_move_multi_word (mode, x, y);
3544 }
3545
3546 if (GET_MODE_CLASS (mode) == MODE_CC)
3547 return emit_move_ccmode (mode, x, y);
3548
3549 /* Try using a move pattern for the corresponding integer mode. This is
3550 only safe when simplify_subreg can convert MODE constants into integer
3551 constants. At present, it can only do this reliably if the value
3552 fits within a HOST_WIDE_INT. */
3553 if (!CONSTANT_P (y) || GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
3554 {
3555 rtx_insn *ret = emit_move_via_integer (mode, x, y, lra_in_progress);
3556
3557 if (ret)
3558 {
3559 if (! lra_in_progress || recog (PATTERN (ret), ret, 0) >= 0)
3560 return ret;
3561 }
3562 }
3563
3564 return emit_move_multi_word (mode, x, y);
3565 }
3566
3567 /* Generate code to copy Y into X.
3568 Both Y and X must have the same mode, except that
3569 Y can be a constant with VOIDmode.
3570 This mode cannot be BLKmode; use emit_block_move for that.
3571
3572 Return the last instruction emitted. */
3573
3574 rtx_insn *
3575 emit_move_insn (rtx x, rtx y)
3576 {
3577 machine_mode mode = GET_MODE (x);
3578 rtx y_cst = NULL_RTX;
3579 rtx_insn *last_insn;
3580 rtx set;
3581
3582 gcc_assert (mode != BLKmode
3583 && (GET_MODE (y) == mode || GET_MODE (y) == VOIDmode));
3584
3585 if (CONSTANT_P (y))
3586 {
3587 if (optimize
3588 && SCALAR_FLOAT_MODE_P (GET_MODE (x))
3589 && (last_insn = compress_float_constant (x, y)))
3590 return last_insn;
3591
3592 y_cst = y;
3593
3594 if (!targetm.legitimate_constant_p (mode, y))
3595 {
3596 y = force_const_mem (mode, y);
3597
3598 /* If the target's cannot_force_const_mem prevented the spill,
3599 assume that the target's move expanders will also take care
3600 of the non-legitimate constant. */
3601 if (!y)
3602 y = y_cst;
3603 else
3604 y = use_anchored_address (y);
3605 }
3606 }
3607
3608 /* If X or Y are memory references, verify that their addresses are valid
3609 for the machine. */
3610 if (MEM_P (x)
3611 && (! memory_address_addr_space_p (GET_MODE (x), XEXP (x, 0),
3612 MEM_ADDR_SPACE (x))
3613 && ! push_operand (x, GET_MODE (x))))
3614 x = validize_mem (x);
3615
3616 if (MEM_P (y)
3617 && ! memory_address_addr_space_p (GET_MODE (y), XEXP (y, 0),
3618 MEM_ADDR_SPACE (y)))
3619 y = validize_mem (y);
3620
3621 gcc_assert (mode != BLKmode);
3622
3623 last_insn = emit_move_insn_1 (x, y);
3624
3625 if (y_cst && REG_P (x)
3626 && (set = single_set (last_insn)) != NULL_RTX
3627 && SET_DEST (set) == x
3628 && ! rtx_equal_p (y_cst, SET_SRC (set)))
3629 set_unique_reg_note (last_insn, REG_EQUAL, copy_rtx (y_cst));
3630
3631 return last_insn;
3632 }
3633
3634 /* Generate the body of an instruction to copy Y into X.
3635 It may be a list of insns, if one insn isn't enough. */
3636
3637 rtx_insn *
3638 gen_move_insn (rtx x, rtx y)
3639 {
3640 rtx_insn *seq;
3641
3642 start_sequence ();
3643 emit_move_insn_1 (x, y);
3644 seq = get_insns ();
3645 end_sequence ();
3646 return seq;
3647 }
3648
3649 /* Same as above, but return rtx (used as a callback, which must have
3650 prototype compatible with other functions returning rtx). */
3651
3652 rtx
3653 gen_move_insn_uncast (rtx x, rtx y)
3654 {
3655 return gen_move_insn (x, y);
3656 }
3657
3658 /* If Y is representable exactly in a narrower mode, and the target can
3659 perform the extension directly from constant or memory, then emit the
3660 move as an extension. */
3661
3662 static rtx_insn *
3663 compress_float_constant (rtx x, rtx y)
3664 {
3665 machine_mode dstmode = GET_MODE (x);
3666 machine_mode orig_srcmode = GET_MODE (y);
3667 machine_mode srcmode;
3668 REAL_VALUE_TYPE r;
3669 int oldcost, newcost;
3670 bool speed = optimize_insn_for_speed_p ();
3671
3672 REAL_VALUE_FROM_CONST_DOUBLE (r, y);
3673
3674 if (targetm.legitimate_constant_p (dstmode, y))
3675 oldcost = set_src_cost (y, speed);
3676 else
3677 oldcost = set_src_cost (force_const_mem (dstmode, y), speed);
3678
3679 for (srcmode = GET_CLASS_NARROWEST_MODE (GET_MODE_CLASS (orig_srcmode));
3680 srcmode != orig_srcmode;
3681 srcmode = GET_MODE_WIDER_MODE (srcmode))
3682 {
3683 enum insn_code ic;
3684 rtx trunc_y;
3685 rtx_insn *last_insn;
3686
3687 /* Skip if the target can't extend this way. */
3688 ic = can_extend_p (dstmode, srcmode, 0);
3689 if (ic == CODE_FOR_nothing)
3690 continue;
3691
3692 /* Skip if the narrowed value isn't exact. */
3693 if (! exact_real_truncate (srcmode, &r))
3694 continue;
3695
3696 trunc_y = CONST_DOUBLE_FROM_REAL_VALUE (r, srcmode);
3697
3698 if (targetm.legitimate_constant_p (srcmode, trunc_y))
3699 {
3700 /* Skip if the target needs extra instructions to perform
3701 the extension. */
3702 if (!insn_operand_matches (ic, 1, trunc_y))
3703 continue;
3704 /* This is valid, but may not be cheaper than the original. */
3705 newcost = set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y),
3706 speed);
3707 if (oldcost < newcost)
3708 continue;
3709 }
3710 else if (float_extend_from_mem[dstmode][srcmode])
3711 {
3712 trunc_y = force_const_mem (srcmode, trunc_y);
3713 /* This is valid, but may not be cheaper than the original. */
3714 newcost = set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y),
3715 speed);
3716 if (oldcost < newcost)
3717 continue;
3718 trunc_y = validize_mem (trunc_y);
3719 }
3720 else
3721 continue;
3722
3723 /* For CSE's benefit, force the compressed constant pool entry
3724 into a new pseudo. This constant may be used in different modes,
3725 and if not, combine will put things back together for us. */
3726 trunc_y = force_reg (srcmode, trunc_y);
3727
3728 /* If x is a hard register, perform the extension into a pseudo,
3729 so that e.g. stack realignment code is aware of it. */
3730 rtx target = x;
3731 if (REG_P (x) && HARD_REGISTER_P (x))
3732 target = gen_reg_rtx (dstmode);
3733
3734 emit_unop_insn (ic, target, trunc_y, UNKNOWN);
3735 last_insn = get_last_insn ();
3736
3737 if (REG_P (target))
3738 set_unique_reg_note (last_insn, REG_EQUAL, y);
3739
3740 if (target != x)
3741 return emit_move_insn (x, target);
3742 return last_insn;
3743 }
3744
3745 return NULL;
3746 }
3747 \f
3748 /* Pushing data onto the stack. */
3749
3750 /* Push a block of length SIZE (perhaps variable)
3751 and return an rtx to address the beginning of the block.
3752 The value may be virtual_outgoing_args_rtx.
3753
3754 EXTRA is the number of bytes of padding to push in addition to SIZE.
3755 BELOW nonzero means this padding comes at low addresses;
3756 otherwise, the padding comes at high addresses. */
3757
3758 rtx
3759 push_block (rtx size, int extra, int below)
3760 {
3761 rtx temp;
3762
3763 size = convert_modes (Pmode, ptr_mode, size, 1);
3764 if (CONSTANT_P (size))
3765 anti_adjust_stack (plus_constant (Pmode, size, extra));
3766 else if (REG_P (size) && extra == 0)
3767 anti_adjust_stack (size);
3768 else
3769 {
3770 temp = copy_to_mode_reg (Pmode, size);
3771 if (extra != 0)
3772 temp = expand_binop (Pmode, add_optab, temp,
3773 gen_int_mode (extra, Pmode),
3774 temp, 0, OPTAB_LIB_WIDEN);
3775 anti_adjust_stack (temp);
3776 }
3777
3778 if (STACK_GROWS_DOWNWARD)
3779 {
3780 temp = virtual_outgoing_args_rtx;
3781 if (extra != 0 && below)
3782 temp = plus_constant (Pmode, temp, extra);
3783 }
3784 else
3785 {
3786 if (CONST_INT_P (size))
3787 temp = plus_constant (Pmode, virtual_outgoing_args_rtx,
3788 -INTVAL (size) - (below ? 0 : extra));
3789 else if (extra != 0 && !below)
3790 temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx,
3791 negate_rtx (Pmode, plus_constant (Pmode, size,
3792 extra)));
3793 else
3794 temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx,
3795 negate_rtx (Pmode, size));
3796 }
3797
3798 return memory_address (GET_CLASS_NARROWEST_MODE (MODE_INT), temp);
3799 }
3800
3801 /* A utility routine that returns the base of an auto-inc memory, or NULL. */
3802
3803 static rtx
3804 mem_autoinc_base (rtx mem)
3805 {
3806 if (MEM_P (mem))
3807 {
3808 rtx addr = XEXP (mem, 0);
3809 if (GET_RTX_CLASS (GET_CODE (addr)) == RTX_AUTOINC)
3810 return XEXP (addr, 0);
3811 }
3812 return NULL;
3813 }
3814
3815 /* A utility routine used here, in reload, and in try_split. The insns
3816 after PREV up to and including LAST are known to adjust the stack,
3817 with a final value of END_ARGS_SIZE. Iterate backward from LAST
3818 placing notes as appropriate. PREV may be NULL, indicating the
3819 entire insn sequence prior to LAST should be scanned.
3820
3821 The set of allowed stack pointer modifications is small:
3822 (1) One or more auto-inc style memory references (aka pushes),
3823 (2) One or more addition/subtraction with the SP as destination,
3824 (3) A single move insn with the SP as destination,
3825 (4) A call_pop insn,
3826 (5) Noreturn call insns if !ACCUMULATE_OUTGOING_ARGS.
3827
3828 Insns in the sequence that do not modify the SP are ignored,
3829 except for noreturn calls.
3830
3831 The return value is the amount of adjustment that can be trivially
3832 verified, via immediate operand or auto-inc. If the adjustment
3833 cannot be trivially extracted, the return value is INT_MIN. */
3834
3835 HOST_WIDE_INT
3836 find_args_size_adjust (rtx_insn *insn)
3837 {
3838 rtx dest, set, pat;
3839 int i;
3840
3841 pat = PATTERN (insn);
3842 set = NULL;
3843
3844 /* Look for a call_pop pattern. */
3845 if (CALL_P (insn))
3846 {
3847 /* We have to allow non-call_pop patterns for the case
3848 of emit_single_push_insn of a TLS address. */
3849 if (GET_CODE (pat) != PARALLEL)
3850 return 0;
3851
3852 /* All call_pop have a stack pointer adjust in the parallel.
3853 The call itself is always first, and the stack adjust is
3854 usually last, so search from the end. */
3855 for (i = XVECLEN (pat, 0) - 1; i > 0; --i)
3856 {
3857 set = XVECEXP (pat, 0, i);
3858 if (GET_CODE (set) != SET)
3859 continue;
3860 dest = SET_DEST (set);
3861 if (dest == stack_pointer_rtx)
3862 break;
3863 }
3864 /* We'd better have found the stack pointer adjust. */
3865 if (i == 0)
3866 return 0;
3867 /* Fall through to process the extracted SET and DEST
3868 as if it was a standalone insn. */
3869 }
3870 else if (GET_CODE (pat) == SET)
3871 set = pat;
3872 else if ((set = single_set (insn)) != NULL)
3873 ;
3874 else if (GET_CODE (pat) == PARALLEL)
3875 {
3876 /* ??? Some older ports use a parallel with a stack adjust
3877 and a store for a PUSH_ROUNDING pattern, rather than a
3878 PRE/POST_MODIFY rtx. Don't force them to update yet... */
3879 /* ??? See h8300 and m68k, pushqi1. */
3880 for (i = XVECLEN (pat, 0) - 1; i >= 0; --i)
3881 {
3882 set = XVECEXP (pat, 0, i);
3883 if (GET_CODE (set) != SET)
3884 continue;
3885 dest = SET_DEST (set);
3886 if (dest == stack_pointer_rtx)
3887 break;
3888
3889 /* We do not expect an auto-inc of the sp in the parallel. */
3890 gcc_checking_assert (mem_autoinc_base (dest) != stack_pointer_rtx);
3891 gcc_checking_assert (mem_autoinc_base (SET_SRC (set))
3892 != stack_pointer_rtx);
3893 }
3894 if (i < 0)
3895 return 0;
3896 }
3897 else
3898 return 0;
3899
3900 dest = SET_DEST (set);
3901
3902 /* Look for direct modifications of the stack pointer. */
3903 if (REG_P (dest) && REGNO (dest) == STACK_POINTER_REGNUM)
3904 {
3905 /* Look for a trivial adjustment, otherwise assume nothing. */
3906 /* Note that the SPU restore_stack_block pattern refers to
3907 the stack pointer in V4SImode. Consider that non-trivial. */
3908 if (SCALAR_INT_MODE_P (GET_MODE (dest))
3909 && GET_CODE (SET_SRC (set)) == PLUS
3910 && XEXP (SET_SRC (set), 0) == stack_pointer_rtx
3911 && CONST_INT_P (XEXP (SET_SRC (set), 1)))
3912 return INTVAL (XEXP (SET_SRC (set), 1));
3913 /* ??? Reload can generate no-op moves, which will be cleaned
3914 up later. Recognize it and continue searching. */
3915 else if (rtx_equal_p (dest, SET_SRC (set)))
3916 return 0;
3917 else
3918 return HOST_WIDE_INT_MIN;
3919 }
3920 else
3921 {
3922 rtx mem, addr;
3923
3924 /* Otherwise only think about autoinc patterns. */
3925 if (mem_autoinc_base (dest) == stack_pointer_rtx)
3926 {
3927 mem = dest;
3928 gcc_checking_assert (mem_autoinc_base (SET_SRC (set))
3929 != stack_pointer_rtx);
3930 }
3931 else if (mem_autoinc_base (SET_SRC (set)) == stack_pointer_rtx)
3932 mem = SET_SRC (set);
3933 else
3934 return 0;
3935
3936 addr = XEXP (mem, 0);
3937 switch (GET_CODE (addr))
3938 {
3939 case PRE_INC:
3940 case POST_INC:
3941 return GET_MODE_SIZE (GET_MODE (mem));
3942 case PRE_DEC:
3943 case POST_DEC:
3944 return -GET_MODE_SIZE (GET_MODE (mem));
3945 case PRE_MODIFY:
3946 case POST_MODIFY:
3947 addr = XEXP (addr, 1);
3948 gcc_assert (GET_CODE (addr) == PLUS);
3949 gcc_assert (XEXP (addr, 0) == stack_pointer_rtx);
3950 gcc_assert (CONST_INT_P (XEXP (addr, 1)));
3951 return INTVAL (XEXP (addr, 1));
3952 default:
3953 gcc_unreachable ();
3954 }
3955 }
3956 }
3957
3958 int
3959 fixup_args_size_notes (rtx_insn *prev, rtx_insn *last, int end_args_size)
3960 {
3961 int args_size = end_args_size;
3962 bool saw_unknown = false;
3963 rtx_insn *insn;
3964
3965 for (insn = last; insn != prev; insn = PREV_INSN (insn))
3966 {
3967 HOST_WIDE_INT this_delta;
3968
3969 if (!NONDEBUG_INSN_P (insn))
3970 continue;
3971
3972 this_delta = find_args_size_adjust (insn);
3973 if (this_delta == 0)
3974 {
3975 if (!CALL_P (insn)
3976 || ACCUMULATE_OUTGOING_ARGS
3977 || find_reg_note (insn, REG_NORETURN, NULL_RTX) == NULL_RTX)
3978 continue;
3979 }
3980
3981 gcc_assert (!saw_unknown);
3982 if (this_delta == HOST_WIDE_INT_MIN)
3983 saw_unknown = true;
3984
3985 add_reg_note (insn, REG_ARGS_SIZE, GEN_INT (args_size));
3986 if (STACK_GROWS_DOWNWARD)
3987 this_delta = -(unsigned HOST_WIDE_INT) this_delta;
3988
3989 args_size -= this_delta;
3990 }
3991
3992 return saw_unknown ? INT_MIN : args_size;
3993 }
3994
3995 #ifdef PUSH_ROUNDING
3996 /* Emit single push insn. */
3997
3998 static void
3999 emit_single_push_insn_1 (machine_mode mode, rtx x, tree type)
4000 {
4001 rtx dest_addr;
4002 unsigned rounded_size = PUSH_ROUNDING (GET_MODE_SIZE (mode));
4003 rtx dest;
4004 enum insn_code icode;
4005
4006 stack_pointer_delta += PUSH_ROUNDING (GET_MODE_SIZE (mode));
4007 /* If there is push pattern, use it. Otherwise try old way of throwing
4008 MEM representing push operation to move expander. */
4009 icode = optab_handler (push_optab, mode);
4010 if (icode != CODE_FOR_nothing)
4011 {
4012 struct expand_operand ops[1];
4013
4014 create_input_operand (&ops[0], x, mode);
4015 if (maybe_expand_insn (icode, 1, ops))
4016 return;
4017 }
4018 if (GET_MODE_SIZE (mode) == rounded_size)
4019 dest_addr = gen_rtx_fmt_e (STACK_PUSH_CODE, Pmode, stack_pointer_rtx);
4020 /* If we are to pad downward, adjust the stack pointer first and
4021 then store X into the stack location using an offset. This is
4022 because emit_move_insn does not know how to pad; it does not have
4023 access to type. */
4024 else if (FUNCTION_ARG_PADDING (mode, type) == downward)
4025 {
4026 unsigned padding_size = rounded_size - GET_MODE_SIZE (mode);
4027 HOST_WIDE_INT offset;
4028
4029 emit_move_insn (stack_pointer_rtx,
4030 expand_binop (Pmode,
4031 STACK_GROWS_DOWNWARD ? sub_optab
4032 : add_optab,
4033 stack_pointer_rtx,
4034 gen_int_mode (rounded_size, Pmode),
4035 NULL_RTX, 0, OPTAB_LIB_WIDEN));
4036
4037 offset = (HOST_WIDE_INT) padding_size;
4038 if (STACK_GROWS_DOWNWARD && STACK_PUSH_CODE == POST_DEC)
4039 /* We have already decremented the stack pointer, so get the
4040 previous value. */
4041 offset += (HOST_WIDE_INT) rounded_size;
4042
4043 if (!STACK_GROWS_DOWNWARD && STACK_PUSH_CODE == POST_INC)
4044 /* We have already incremented the stack pointer, so get the
4045 previous value. */
4046 offset -= (HOST_WIDE_INT) rounded_size;
4047
4048 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
4049 gen_int_mode (offset, Pmode));
4050 }
4051 else
4052 {
4053 if (STACK_GROWS_DOWNWARD)
4054 /* ??? This seems wrong if STACK_PUSH_CODE == POST_DEC. */
4055 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
4056 gen_int_mode (-(HOST_WIDE_INT) rounded_size,
4057 Pmode));
4058 else
4059 /* ??? This seems wrong if STACK_PUSH_CODE == POST_INC. */
4060 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
4061 gen_int_mode (rounded_size, Pmode));
4062
4063 dest_addr = gen_rtx_PRE_MODIFY (Pmode, stack_pointer_rtx, dest_addr);
4064 }
4065
4066 dest = gen_rtx_MEM (mode, dest_addr);
4067
4068 if (type != 0)
4069 {
4070 set_mem_attributes (dest, type, 1);
4071
4072 if (cfun->tail_call_marked)
4073 /* Function incoming arguments may overlap with sibling call
4074 outgoing arguments and we cannot allow reordering of reads
4075 from function arguments with stores to outgoing arguments
4076 of sibling calls. */
4077 set_mem_alias_set (dest, 0);
4078 }
4079 emit_move_insn (dest, x);
4080 }
4081
4082 /* Emit and annotate a single push insn. */
4083
4084 static void
4085 emit_single_push_insn (machine_mode mode, rtx x, tree type)
4086 {
4087 int delta, old_delta = stack_pointer_delta;
4088 rtx_insn *prev = get_last_insn ();
4089 rtx_insn *last;
4090
4091 emit_single_push_insn_1 (mode, x, type);
4092
4093 last = get_last_insn ();
4094
4095 /* Notice the common case where we emitted exactly one insn. */
4096 if (PREV_INSN (last) == prev)
4097 {
4098 add_reg_note (last, REG_ARGS_SIZE, GEN_INT (stack_pointer_delta));
4099 return;
4100 }
4101
4102 delta = fixup_args_size_notes (prev, last, stack_pointer_delta);
4103 gcc_assert (delta == INT_MIN || delta == old_delta);
4104 }
4105 #endif
4106
4107 /* Generate code to push X onto the stack, assuming it has mode MODE and
4108 type TYPE.
4109 MODE is redundant except when X is a CONST_INT (since they don't
4110 carry mode info).
4111 SIZE is an rtx for the size of data to be copied (in bytes),
4112 needed only if X is BLKmode.
4113
4114 ALIGN (in bits) is maximum alignment we can assume.
4115
4116 If PARTIAL and REG are both nonzero, then copy that many of the first
4117 bytes of X into registers starting with REG, and push the rest of X.
4118 The amount of space pushed is decreased by PARTIAL bytes.
4119 REG must be a hard register in this case.
4120 If REG is zero but PARTIAL is not, take any all others actions for an
4121 argument partially in registers, but do not actually load any
4122 registers.
4123
4124 EXTRA is the amount in bytes of extra space to leave next to this arg.
4125 This is ignored if an argument block has already been allocated.
4126
4127 On a machine that lacks real push insns, ARGS_ADDR is the address of
4128 the bottom of the argument block for this call. We use indexing off there
4129 to store the arg. On machines with push insns, ARGS_ADDR is 0 when a
4130 argument block has not been preallocated.
4131
4132 ARGS_SO_FAR is the size of args previously pushed for this call.
4133
4134 REG_PARM_STACK_SPACE is nonzero if functions require stack space
4135 for arguments passed in registers. If nonzero, it will be the number
4136 of bytes required. */
4137
4138 void
4139 emit_push_insn (rtx x, machine_mode mode, tree type, rtx size,
4140 unsigned int align, int partial, rtx reg, int extra,
4141 rtx args_addr, rtx args_so_far, int reg_parm_stack_space,
4142 rtx alignment_pad)
4143 {
4144 rtx xinner;
4145 enum direction stack_direction = STACK_GROWS_DOWNWARD ? downward : upward;
4146
4147 /* Decide where to pad the argument: `downward' for below,
4148 `upward' for above, or `none' for don't pad it.
4149 Default is below for small data on big-endian machines; else above. */
4150 enum direction where_pad = FUNCTION_ARG_PADDING (mode, type);
4151
4152 /* Invert direction if stack is post-decrement.
4153 FIXME: why? */
4154 if (STACK_PUSH_CODE == POST_DEC)
4155 if (where_pad != none)
4156 where_pad = (where_pad == downward ? upward : downward);
4157
4158 xinner = x;
4159
4160 if (mode == BLKmode
4161 || (STRICT_ALIGNMENT && align < GET_MODE_ALIGNMENT (mode)))
4162 {
4163 /* Copy a block into the stack, entirely or partially. */
4164
4165 rtx temp;
4166 int used;
4167 int offset;
4168 int skip;
4169
4170 offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT);
4171 used = partial - offset;
4172
4173 if (mode != BLKmode)
4174 {
4175 /* A value is to be stored in an insufficiently aligned
4176 stack slot; copy via a suitably aligned slot if
4177 necessary. */
4178 size = GEN_INT (GET_MODE_SIZE (mode));
4179 if (!MEM_P (xinner))
4180 {
4181 temp = assign_temp (type, 1, 1);
4182 emit_move_insn (temp, xinner);
4183 xinner = temp;
4184 }
4185 }
4186
4187 gcc_assert (size);
4188
4189 /* USED is now the # of bytes we need not copy to the stack
4190 because registers will take care of them. */
4191
4192 if (partial != 0)
4193 xinner = adjust_address (xinner, BLKmode, used);
4194
4195 /* If the partial register-part of the arg counts in its stack size,
4196 skip the part of stack space corresponding to the registers.
4197 Otherwise, start copying to the beginning of the stack space,
4198 by setting SKIP to 0. */
4199 skip = (reg_parm_stack_space == 0) ? 0 : used;
4200
4201 #ifdef PUSH_ROUNDING
4202 /* Do it with several push insns if that doesn't take lots of insns
4203 and if there is no difficulty with push insns that skip bytes
4204 on the stack for alignment purposes. */
4205 if (args_addr == 0
4206 && PUSH_ARGS
4207 && CONST_INT_P (size)
4208 && skip == 0
4209 && MEM_ALIGN (xinner) >= align
4210 && can_move_by_pieces ((unsigned) INTVAL (size) - used, align)
4211 /* Here we avoid the case of a structure whose weak alignment
4212 forces many pushes of a small amount of data,
4213 and such small pushes do rounding that causes trouble. */
4214 && ((! SLOW_UNALIGNED_ACCESS (word_mode, align))
4215 || align >= BIGGEST_ALIGNMENT
4216 || (PUSH_ROUNDING (align / BITS_PER_UNIT)
4217 == (align / BITS_PER_UNIT)))
4218 && (HOST_WIDE_INT) PUSH_ROUNDING (INTVAL (size)) == INTVAL (size))
4219 {
4220 /* Push padding now if padding above and stack grows down,
4221 or if padding below and stack grows up.
4222 But if space already allocated, this has already been done. */
4223 if (extra && args_addr == 0
4224 && where_pad != none && where_pad != stack_direction)
4225 anti_adjust_stack (GEN_INT (extra));
4226
4227 move_by_pieces (NULL, xinner, INTVAL (size) - used, align, 0);
4228 }
4229 else
4230 #endif /* PUSH_ROUNDING */
4231 {
4232 rtx target;
4233
4234 /* Otherwise make space on the stack and copy the data
4235 to the address of that space. */
4236
4237 /* Deduct words put into registers from the size we must copy. */
4238 if (partial != 0)
4239 {
4240 if (CONST_INT_P (size))
4241 size = GEN_INT (INTVAL (size) - used);
4242 else
4243 size = expand_binop (GET_MODE (size), sub_optab, size,
4244 gen_int_mode (used, GET_MODE (size)),
4245 NULL_RTX, 0, OPTAB_LIB_WIDEN);
4246 }
4247
4248 /* Get the address of the stack space.
4249 In this case, we do not deal with EXTRA separately.
4250 A single stack adjust will do. */
4251 if (! args_addr)
4252 {
4253 temp = push_block (size, extra, where_pad == downward);
4254 extra = 0;
4255 }
4256 else if (CONST_INT_P (args_so_far))
4257 temp = memory_address (BLKmode,
4258 plus_constant (Pmode, args_addr,
4259 skip + INTVAL (args_so_far)));
4260 else
4261 temp = memory_address (BLKmode,
4262 plus_constant (Pmode,
4263 gen_rtx_PLUS (Pmode,
4264 args_addr,
4265 args_so_far),
4266 skip));
4267
4268 if (!ACCUMULATE_OUTGOING_ARGS)
4269 {
4270 /* If the source is referenced relative to the stack pointer,
4271 copy it to another register to stabilize it. We do not need
4272 to do this if we know that we won't be changing sp. */
4273
4274 if (reg_mentioned_p (virtual_stack_dynamic_rtx, temp)
4275 || reg_mentioned_p (virtual_outgoing_args_rtx, temp))
4276 temp = copy_to_reg (temp);
4277 }
4278
4279 target = gen_rtx_MEM (BLKmode, temp);
4280
4281 /* We do *not* set_mem_attributes here, because incoming arguments
4282 may overlap with sibling call outgoing arguments and we cannot
4283 allow reordering of reads from function arguments with stores
4284 to outgoing arguments of sibling calls. We do, however, want
4285 to record the alignment of the stack slot. */
4286 /* ALIGN may well be better aligned than TYPE, e.g. due to
4287 PARM_BOUNDARY. Assume the caller isn't lying. */
4288 set_mem_align (target, align);
4289
4290 emit_block_move (target, xinner, size, BLOCK_OP_CALL_PARM);
4291 }
4292 }
4293 else if (partial > 0)
4294 {
4295 /* Scalar partly in registers. */
4296
4297 int size = GET_MODE_SIZE (mode) / UNITS_PER_WORD;
4298 int i;
4299 int not_stack;
4300 /* # bytes of start of argument
4301 that we must make space for but need not store. */
4302 int offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT);
4303 int args_offset = INTVAL (args_so_far);
4304 int skip;
4305
4306 /* Push padding now if padding above and stack grows down,
4307 or if padding below and stack grows up.
4308 But if space already allocated, this has already been done. */
4309 if (extra && args_addr == 0
4310 && where_pad != none && where_pad != stack_direction)
4311 anti_adjust_stack (GEN_INT (extra));
4312
4313 /* If we make space by pushing it, we might as well push
4314 the real data. Otherwise, we can leave OFFSET nonzero
4315 and leave the space uninitialized. */
4316 if (args_addr == 0)
4317 offset = 0;
4318
4319 /* Now NOT_STACK gets the number of words that we don't need to
4320 allocate on the stack. Convert OFFSET to words too. */
4321 not_stack = (partial - offset) / UNITS_PER_WORD;
4322 offset /= UNITS_PER_WORD;
4323
4324 /* If the partial register-part of the arg counts in its stack size,
4325 skip the part of stack space corresponding to the registers.
4326 Otherwise, start copying to the beginning of the stack space,
4327 by setting SKIP to 0. */
4328 skip = (reg_parm_stack_space == 0) ? 0 : not_stack;
4329
4330 if (CONSTANT_P (x) && !targetm.legitimate_constant_p (mode, x))
4331 x = validize_mem (force_const_mem (mode, x));
4332
4333 /* If X is a hard register in a non-integer mode, copy it into a pseudo;
4334 SUBREGs of such registers are not allowed. */
4335 if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER
4336 && GET_MODE_CLASS (GET_MODE (x)) != MODE_INT))
4337 x = copy_to_reg (x);
4338
4339 /* Loop over all the words allocated on the stack for this arg. */
4340 /* We can do it by words, because any scalar bigger than a word
4341 has a size a multiple of a word. */
4342 for (i = size - 1; i >= not_stack; i--)
4343 if (i >= not_stack + offset)
4344 emit_push_insn (operand_subword_force (x, i, mode),
4345 word_mode, NULL_TREE, NULL_RTX, align, 0, NULL_RTX,
4346 0, args_addr,
4347 GEN_INT (args_offset + ((i - not_stack + skip)
4348 * UNITS_PER_WORD)),
4349 reg_parm_stack_space, alignment_pad);
4350 }
4351 else
4352 {
4353 rtx addr;
4354 rtx dest;
4355
4356 /* Push padding now if padding above and stack grows down,
4357 or if padding below and stack grows up.
4358 But if space already allocated, this has already been done. */
4359 if (extra && args_addr == 0
4360 && where_pad != none && where_pad != stack_direction)
4361 anti_adjust_stack (GEN_INT (extra));
4362
4363 #ifdef PUSH_ROUNDING
4364 if (args_addr == 0 && PUSH_ARGS)
4365 emit_single_push_insn (mode, x, type);
4366 else
4367 #endif
4368 {
4369 if (CONST_INT_P (args_so_far))
4370 addr
4371 = memory_address (mode,
4372 plus_constant (Pmode, args_addr,
4373 INTVAL (args_so_far)));
4374 else
4375 addr = memory_address (mode, gen_rtx_PLUS (Pmode, args_addr,
4376 args_so_far));
4377 dest = gen_rtx_MEM (mode, addr);
4378
4379 /* We do *not* set_mem_attributes here, because incoming arguments
4380 may overlap with sibling call outgoing arguments and we cannot
4381 allow reordering of reads from function arguments with stores
4382 to outgoing arguments of sibling calls. We do, however, want
4383 to record the alignment of the stack slot. */
4384 /* ALIGN may well be better aligned than TYPE, e.g. due to
4385 PARM_BOUNDARY. Assume the caller isn't lying. */
4386 set_mem_align (dest, align);
4387
4388 emit_move_insn (dest, x);
4389 }
4390 }
4391
4392 /* If part should go in registers, copy that part
4393 into the appropriate registers. Do this now, at the end,
4394 since mem-to-mem copies above may do function calls. */
4395 if (partial > 0 && reg != 0)
4396 {
4397 /* Handle calls that pass values in multiple non-contiguous locations.
4398 The Irix 6 ABI has examples of this. */
4399 if (GET_CODE (reg) == PARALLEL)
4400 emit_group_load (reg, x, type, -1);
4401 else
4402 {
4403 gcc_assert (partial % UNITS_PER_WORD == 0);
4404 move_block_to_reg (REGNO (reg), x, partial / UNITS_PER_WORD, mode);
4405 }
4406 }
4407
4408 if (extra && args_addr == 0 && where_pad == stack_direction)
4409 anti_adjust_stack (GEN_INT (extra));
4410
4411 if (alignment_pad && args_addr == 0)
4412 anti_adjust_stack (alignment_pad);
4413 }
4414 \f
4415 /* Return X if X can be used as a subtarget in a sequence of arithmetic
4416 operations. */
4417
4418 static rtx
4419 get_subtarget (rtx x)
4420 {
4421 return (optimize
4422 || x == 0
4423 /* Only registers can be subtargets. */
4424 || !REG_P (x)
4425 /* Don't use hard regs to avoid extending their life. */
4426 || REGNO (x) < FIRST_PSEUDO_REGISTER
4427 ? 0 : x);
4428 }
4429
4430 /* A subroutine of expand_assignment. Optimize FIELD op= VAL, where
4431 FIELD is a bitfield. Returns true if the optimization was successful,
4432 and there's nothing else to do. */
4433
4434 static bool
4435 optimize_bitfield_assignment_op (unsigned HOST_WIDE_INT bitsize,
4436 unsigned HOST_WIDE_INT bitpos,
4437 unsigned HOST_WIDE_INT bitregion_start,
4438 unsigned HOST_WIDE_INT bitregion_end,
4439 machine_mode mode1, rtx str_rtx,
4440 tree to, tree src)
4441 {
4442 machine_mode str_mode = GET_MODE (str_rtx);
4443 unsigned int str_bitsize = GET_MODE_BITSIZE (str_mode);
4444 tree op0, op1;
4445 rtx value, result;
4446 optab binop;
4447 gimple srcstmt;
4448 enum tree_code code;
4449
4450 if (mode1 != VOIDmode
4451 || bitsize >= BITS_PER_WORD
4452 || str_bitsize > BITS_PER_WORD
4453 || TREE_SIDE_EFFECTS (to)
4454 || TREE_THIS_VOLATILE (to))
4455 return false;
4456
4457 STRIP_NOPS (src);
4458 if (TREE_CODE (src) != SSA_NAME)
4459 return false;
4460 if (TREE_CODE (TREE_TYPE (src)) != INTEGER_TYPE)
4461 return false;
4462
4463 srcstmt = get_gimple_for_ssa_name (src);
4464 if (!srcstmt
4465 || TREE_CODE_CLASS (gimple_assign_rhs_code (srcstmt)) != tcc_binary)
4466 return false;
4467
4468 code = gimple_assign_rhs_code (srcstmt);
4469
4470 op0 = gimple_assign_rhs1 (srcstmt);
4471
4472 /* If OP0 is an SSA_NAME, then we want to walk the use-def chain
4473 to find its initialization. Hopefully the initialization will
4474 be from a bitfield load. */
4475 if (TREE_CODE (op0) == SSA_NAME)
4476 {
4477 gimple op0stmt = get_gimple_for_ssa_name (op0);
4478
4479 /* We want to eventually have OP0 be the same as TO, which
4480 should be a bitfield. */
4481 if (!op0stmt
4482 || !is_gimple_assign (op0stmt)
4483 || gimple_assign_rhs_code (op0stmt) != TREE_CODE (to))
4484 return false;
4485 op0 = gimple_assign_rhs1 (op0stmt);
4486 }
4487
4488 op1 = gimple_assign_rhs2 (srcstmt);
4489
4490 if (!operand_equal_p (to, op0, 0))
4491 return false;
4492
4493 if (MEM_P (str_rtx))
4494 {
4495 unsigned HOST_WIDE_INT offset1;
4496
4497 if (str_bitsize == 0 || str_bitsize > BITS_PER_WORD)
4498 str_mode = word_mode;
4499 str_mode = get_best_mode (bitsize, bitpos,
4500 bitregion_start, bitregion_end,
4501 MEM_ALIGN (str_rtx), str_mode, 0);
4502 if (str_mode == VOIDmode)
4503 return false;
4504 str_bitsize = GET_MODE_BITSIZE (str_mode);
4505
4506 offset1 = bitpos;
4507 bitpos %= str_bitsize;
4508 offset1 = (offset1 - bitpos) / BITS_PER_UNIT;
4509 str_rtx = adjust_address (str_rtx, str_mode, offset1);
4510 }
4511 else if (!REG_P (str_rtx) && GET_CODE (str_rtx) != SUBREG)
4512 return false;
4513
4514 /* If the bit field covers the whole REG/MEM, store_field
4515 will likely generate better code. */
4516 if (bitsize >= str_bitsize)
4517 return false;
4518
4519 /* We can't handle fields split across multiple entities. */
4520 if (bitpos + bitsize > str_bitsize)
4521 return false;
4522
4523 if (BYTES_BIG_ENDIAN)
4524 bitpos = str_bitsize - bitpos - bitsize;
4525
4526 switch (code)
4527 {
4528 case PLUS_EXPR:
4529 case MINUS_EXPR:
4530 /* For now, just optimize the case of the topmost bitfield
4531 where we don't need to do any masking and also
4532 1 bit bitfields where xor can be used.
4533 We might win by one instruction for the other bitfields
4534 too if insv/extv instructions aren't used, so that
4535 can be added later. */
4536 if (bitpos + bitsize != str_bitsize
4537 && (bitsize != 1 || TREE_CODE (op1) != INTEGER_CST))
4538 break;
4539
4540 value = expand_expr (op1, NULL_RTX, str_mode, EXPAND_NORMAL);
4541 value = convert_modes (str_mode,
4542 TYPE_MODE (TREE_TYPE (op1)), value,
4543 TYPE_UNSIGNED (TREE_TYPE (op1)));
4544
4545 /* We may be accessing data outside the field, which means
4546 we can alias adjacent data. */
4547 if (MEM_P (str_rtx))
4548 {
4549 str_rtx = shallow_copy_rtx (str_rtx);
4550 set_mem_alias_set (str_rtx, 0);
4551 set_mem_expr (str_rtx, 0);
4552 }
4553
4554 binop = code == PLUS_EXPR ? add_optab : sub_optab;
4555 if (bitsize == 1 && bitpos + bitsize != str_bitsize)
4556 {
4557 value = expand_and (str_mode, value, const1_rtx, NULL);
4558 binop = xor_optab;
4559 }
4560 value = expand_shift (LSHIFT_EXPR, str_mode, value, bitpos, NULL_RTX, 1);
4561 result = expand_binop (str_mode, binop, str_rtx,
4562 value, str_rtx, 1, OPTAB_WIDEN);
4563 if (result != str_rtx)
4564 emit_move_insn (str_rtx, result);
4565 return true;
4566
4567 case BIT_IOR_EXPR:
4568 case BIT_XOR_EXPR:
4569 if (TREE_CODE (op1) != INTEGER_CST)
4570 break;
4571 value = expand_expr (op1, NULL_RTX, str_mode, EXPAND_NORMAL);
4572 value = convert_modes (str_mode,
4573 TYPE_MODE (TREE_TYPE (op1)), value,
4574 TYPE_UNSIGNED (TREE_TYPE (op1)));
4575
4576 /* We may be accessing data outside the field, which means
4577 we can alias adjacent data. */
4578 if (MEM_P (str_rtx))
4579 {
4580 str_rtx = shallow_copy_rtx (str_rtx);
4581 set_mem_alias_set (str_rtx, 0);
4582 set_mem_expr (str_rtx, 0);
4583 }
4584
4585 binop = code == BIT_IOR_EXPR ? ior_optab : xor_optab;
4586 if (bitpos + bitsize != str_bitsize)
4587 {
4588 rtx mask = gen_int_mode (((unsigned HOST_WIDE_INT) 1 << bitsize) - 1,
4589 str_mode);
4590 value = expand_and (str_mode, value, mask, NULL_RTX);
4591 }
4592 value = expand_shift (LSHIFT_EXPR, str_mode, value, bitpos, NULL_RTX, 1);
4593 result = expand_binop (str_mode, binop, str_rtx,
4594 value, str_rtx, 1, OPTAB_WIDEN);
4595 if (result != str_rtx)
4596 emit_move_insn (str_rtx, result);
4597 return true;
4598
4599 default:
4600 break;
4601 }
4602
4603 return false;
4604 }
4605
4606 /* In the C++ memory model, consecutive bit fields in a structure are
4607 considered one memory location.
4608
4609 Given a COMPONENT_REF EXP at position (BITPOS, OFFSET), this function
4610 returns the bit range of consecutive bits in which this COMPONENT_REF
4611 belongs. The values are returned in *BITSTART and *BITEND. *BITPOS
4612 and *OFFSET may be adjusted in the process.
4613
4614 If the access does not need to be restricted, 0 is returned in both
4615 *BITSTART and *BITEND. */
4616
4617 static void
4618 get_bit_range (unsigned HOST_WIDE_INT *bitstart,
4619 unsigned HOST_WIDE_INT *bitend,
4620 tree exp,
4621 HOST_WIDE_INT *bitpos,
4622 tree *offset)
4623 {
4624 HOST_WIDE_INT bitoffset;
4625 tree field, repr;
4626
4627 gcc_assert (TREE_CODE (exp) == COMPONENT_REF);
4628
4629 field = TREE_OPERAND (exp, 1);
4630 repr = DECL_BIT_FIELD_REPRESENTATIVE (field);
4631 /* If we do not have a DECL_BIT_FIELD_REPRESENTATIVE there is no
4632 need to limit the range we can access. */
4633 if (!repr)
4634 {
4635 *bitstart = *bitend = 0;
4636 return;
4637 }
4638
4639 /* If we have a DECL_BIT_FIELD_REPRESENTATIVE but the enclosing record is
4640 part of a larger bit field, then the representative does not serve any
4641 useful purpose. This can occur in Ada. */
4642 if (handled_component_p (TREE_OPERAND (exp, 0)))
4643 {
4644 machine_mode rmode;
4645 HOST_WIDE_INT rbitsize, rbitpos;
4646 tree roffset;
4647 int unsignedp;
4648 int volatilep = 0;
4649 get_inner_reference (TREE_OPERAND (exp, 0), &rbitsize, &rbitpos,
4650 &roffset, &rmode, &unsignedp, &volatilep, false);
4651 if ((rbitpos % BITS_PER_UNIT) != 0)
4652 {
4653 *bitstart = *bitend = 0;
4654 return;
4655 }
4656 }
4657
4658 /* Compute the adjustment to bitpos from the offset of the field
4659 relative to the representative. DECL_FIELD_OFFSET of field and
4660 repr are the same by construction if they are not constants,
4661 see finish_bitfield_layout. */
4662 if (tree_fits_uhwi_p (DECL_FIELD_OFFSET (field))
4663 && tree_fits_uhwi_p (DECL_FIELD_OFFSET (repr)))
4664 bitoffset = (tree_to_uhwi (DECL_FIELD_OFFSET (field))
4665 - tree_to_uhwi (DECL_FIELD_OFFSET (repr))) * BITS_PER_UNIT;
4666 else
4667 bitoffset = 0;
4668 bitoffset += (tree_to_uhwi (DECL_FIELD_BIT_OFFSET (field))
4669 - tree_to_uhwi (DECL_FIELD_BIT_OFFSET (repr)));
4670
4671 /* If the adjustment is larger than bitpos, we would have a negative bit
4672 position for the lower bound and this may wreak havoc later. Adjust
4673 offset and bitpos to make the lower bound non-negative in that case. */
4674 if (bitoffset > *bitpos)
4675 {
4676 HOST_WIDE_INT adjust = bitoffset - *bitpos;
4677 gcc_assert ((adjust % BITS_PER_UNIT) == 0);
4678
4679 *bitpos += adjust;
4680 if (*offset == NULL_TREE)
4681 *offset = size_int (-adjust / BITS_PER_UNIT);
4682 else
4683 *offset
4684 = size_binop (MINUS_EXPR, *offset, size_int (adjust / BITS_PER_UNIT));
4685 *bitstart = 0;
4686 }
4687 else
4688 *bitstart = *bitpos - bitoffset;
4689
4690 *bitend = *bitstart + tree_to_uhwi (DECL_SIZE (repr)) - 1;
4691 }
4692
4693 /* Returns true if ADDR is an ADDR_EXPR of a DECL that does not reside
4694 in memory and has non-BLKmode. DECL_RTL must not be a MEM; if
4695 DECL_RTL was not set yet, return NORTL. */
4696
4697 static inline bool
4698 addr_expr_of_non_mem_decl_p_1 (tree addr, bool nortl)
4699 {
4700 if (TREE_CODE (addr) != ADDR_EXPR)
4701 return false;
4702
4703 tree base = TREE_OPERAND (addr, 0);
4704
4705 if (!DECL_P (base)
4706 || TREE_ADDRESSABLE (base)
4707 || DECL_MODE (base) == BLKmode)
4708 return false;
4709
4710 if (!DECL_RTL_SET_P (base))
4711 return nortl;
4712
4713 return (!MEM_P (DECL_RTL (base)));
4714 }
4715
4716 /* Returns true if the MEM_REF REF refers to an object that does not
4717 reside in memory and has non-BLKmode. */
4718
4719 static inline bool
4720 mem_ref_refers_to_non_mem_p (tree ref)
4721 {
4722 tree base = TREE_OPERAND (ref, 0);
4723 return addr_expr_of_non_mem_decl_p_1 (base, false);
4724 }
4725
4726 /* Expand an assignment that stores the value of FROM into TO. If NONTEMPORAL
4727 is true, try generating a nontemporal store. */
4728
4729 void
4730 expand_assignment (tree to, tree from, bool nontemporal)
4731 {
4732 rtx to_rtx = 0;
4733 rtx result;
4734 machine_mode mode;
4735 unsigned int align;
4736 enum insn_code icode;
4737
4738 /* Don't crash if the lhs of the assignment was erroneous. */
4739 if (TREE_CODE (to) == ERROR_MARK)
4740 {
4741 expand_normal (from);
4742 return;
4743 }
4744
4745 /* Optimize away no-op moves without side-effects. */
4746 if (operand_equal_p (to, from, 0))
4747 return;
4748
4749 /* Handle misaligned stores. */
4750 mode = TYPE_MODE (TREE_TYPE (to));
4751 if ((TREE_CODE (to) == MEM_REF
4752 || TREE_CODE (to) == TARGET_MEM_REF)
4753 && mode != BLKmode
4754 && !mem_ref_refers_to_non_mem_p (to)
4755 && ((align = get_object_alignment (to))
4756 < GET_MODE_ALIGNMENT (mode))
4757 && (((icode = optab_handler (movmisalign_optab, mode))
4758 != CODE_FOR_nothing)
4759 || SLOW_UNALIGNED_ACCESS (mode, align)))
4760 {
4761 rtx reg, mem;
4762
4763 reg = expand_expr (from, NULL_RTX, VOIDmode, EXPAND_NORMAL);
4764 reg = force_not_mem (reg);
4765 mem = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
4766
4767 if (icode != CODE_FOR_nothing)
4768 {
4769 struct expand_operand ops[2];
4770
4771 create_fixed_operand (&ops[0], mem);
4772 create_input_operand (&ops[1], reg, mode);
4773 /* The movmisalign<mode> pattern cannot fail, else the assignment
4774 would silently be omitted. */
4775 expand_insn (icode, 2, ops);
4776 }
4777 else
4778 store_bit_field (mem, GET_MODE_BITSIZE (mode), 0, 0, 0, mode, reg);
4779 return;
4780 }
4781
4782 /* Assignment of a structure component needs special treatment
4783 if the structure component's rtx is not simply a MEM.
4784 Assignment of an array element at a constant index, and assignment of
4785 an array element in an unaligned packed structure field, has the same
4786 problem. Same for (partially) storing into a non-memory object. */
4787 if (handled_component_p (to)
4788 || (TREE_CODE (to) == MEM_REF
4789 && mem_ref_refers_to_non_mem_p (to))
4790 || TREE_CODE (TREE_TYPE (to)) == ARRAY_TYPE)
4791 {
4792 machine_mode mode1;
4793 HOST_WIDE_INT bitsize, bitpos;
4794 unsigned HOST_WIDE_INT bitregion_start = 0;
4795 unsigned HOST_WIDE_INT bitregion_end = 0;
4796 tree offset;
4797 int unsignedp;
4798 int volatilep = 0;
4799 tree tem;
4800
4801 push_temp_slots ();
4802 tem = get_inner_reference (to, &bitsize, &bitpos, &offset, &mode1,
4803 &unsignedp, &volatilep, true);
4804
4805 /* Make sure bitpos is not negative, it can wreak havoc later. */
4806 if (bitpos < 0)
4807 {
4808 gcc_assert (offset == NULL_TREE);
4809 offset = size_int (bitpos >> (BITS_PER_UNIT == 8
4810 ? 3 : exact_log2 (BITS_PER_UNIT)));
4811 bitpos &= BITS_PER_UNIT - 1;
4812 }
4813
4814 if (TREE_CODE (to) == COMPONENT_REF
4815 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (to, 1)))
4816 get_bit_range (&bitregion_start, &bitregion_end, to, &bitpos, &offset);
4817 /* The C++ memory model naturally applies to byte-aligned fields.
4818 However, if we do not have a DECL_BIT_FIELD_TYPE but BITPOS or
4819 BITSIZE are not byte-aligned, there is no need to limit the range
4820 we can access. This can occur with packed structures in Ada. */
4821 else if (bitsize > 0
4822 && bitsize % BITS_PER_UNIT == 0
4823 && bitpos % BITS_PER_UNIT == 0)
4824 {
4825 bitregion_start = bitpos;
4826 bitregion_end = bitpos + bitsize - 1;
4827 }
4828
4829 to_rtx = expand_expr (tem, NULL_RTX, VOIDmode, EXPAND_WRITE);
4830
4831 /* If the field has a mode, we want to access it in the
4832 field's mode, not the computed mode.
4833 If a MEM has VOIDmode (external with incomplete type),
4834 use BLKmode for it instead. */
4835 if (MEM_P (to_rtx))
4836 {
4837 if (mode1 != VOIDmode)
4838 to_rtx = adjust_address (to_rtx, mode1, 0);
4839 else if (GET_MODE (to_rtx) == VOIDmode)
4840 to_rtx = adjust_address (to_rtx, BLKmode, 0);
4841 }
4842
4843 if (offset != 0)
4844 {
4845 machine_mode address_mode;
4846 rtx offset_rtx;
4847
4848 if (!MEM_P (to_rtx))
4849 {
4850 /* We can get constant negative offsets into arrays with broken
4851 user code. Translate this to a trap instead of ICEing. */
4852 gcc_assert (TREE_CODE (offset) == INTEGER_CST);
4853 expand_builtin_trap ();
4854 to_rtx = gen_rtx_MEM (BLKmode, const0_rtx);
4855 }
4856
4857 offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode, EXPAND_SUM);
4858 address_mode = get_address_mode (to_rtx);
4859 if (GET_MODE (offset_rtx) != address_mode)
4860 {
4861 /* We cannot be sure that the RTL in offset_rtx is valid outside
4862 of a memory address context, so force it into a register
4863 before attempting to convert it to the desired mode. */
4864 offset_rtx = force_operand (offset_rtx, NULL_RTX);
4865 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
4866 }
4867
4868 /* If we have an expression in OFFSET_RTX and a non-zero
4869 byte offset in BITPOS, adding the byte offset before the
4870 OFFSET_RTX results in better intermediate code, which makes
4871 later rtl optimization passes perform better.
4872
4873 We prefer intermediate code like this:
4874
4875 r124:DI=r123:DI+0x18
4876 [r124:DI]=r121:DI
4877
4878 ... instead of ...
4879
4880 r124:DI=r123:DI+0x10
4881 [r124:DI+0x8]=r121:DI
4882
4883 This is only done for aligned data values, as these can
4884 be expected to result in single move instructions. */
4885 if (mode1 != VOIDmode
4886 && bitpos != 0
4887 && bitsize > 0
4888 && (bitpos % bitsize) == 0
4889 && (bitsize % GET_MODE_ALIGNMENT (mode1)) == 0
4890 && MEM_ALIGN (to_rtx) >= GET_MODE_ALIGNMENT (mode1))
4891 {
4892 to_rtx = adjust_address (to_rtx, mode1, bitpos / BITS_PER_UNIT);
4893 bitregion_start = 0;
4894 if (bitregion_end >= (unsigned HOST_WIDE_INT) bitpos)
4895 bitregion_end -= bitpos;
4896 bitpos = 0;
4897 }
4898
4899 to_rtx = offset_address (to_rtx, offset_rtx,
4900 highest_pow2_factor_for_target (to,
4901 offset));
4902 }
4903
4904 /* No action is needed if the target is not a memory and the field
4905 lies completely outside that target. This can occur if the source
4906 code contains an out-of-bounds access to a small array. */
4907 if (!MEM_P (to_rtx)
4908 && GET_MODE (to_rtx) != BLKmode
4909 && (unsigned HOST_WIDE_INT) bitpos
4910 >= GET_MODE_PRECISION (GET_MODE (to_rtx)))
4911 {
4912 expand_normal (from);
4913 result = NULL;
4914 }
4915 /* Handle expand_expr of a complex value returning a CONCAT. */
4916 else if (GET_CODE (to_rtx) == CONCAT)
4917 {
4918 unsigned short mode_bitsize = GET_MODE_BITSIZE (GET_MODE (to_rtx));
4919 if (COMPLEX_MODE_P (TYPE_MODE (TREE_TYPE (from)))
4920 && bitpos == 0
4921 && bitsize == mode_bitsize)
4922 result = store_expr (from, to_rtx, false, nontemporal);
4923 else if (bitsize == mode_bitsize / 2
4924 && (bitpos == 0 || bitpos == mode_bitsize / 2))
4925 result = store_expr (from, XEXP (to_rtx, bitpos != 0), false,
4926 nontemporal);
4927 else if (bitpos + bitsize <= mode_bitsize / 2)
4928 result = store_field (XEXP (to_rtx, 0), bitsize, bitpos,
4929 bitregion_start, bitregion_end,
4930 mode1, from,
4931 get_alias_set (to), nontemporal);
4932 else if (bitpos >= mode_bitsize / 2)
4933 result = store_field (XEXP (to_rtx, 1), bitsize,
4934 bitpos - mode_bitsize / 2,
4935 bitregion_start, bitregion_end,
4936 mode1, from,
4937 get_alias_set (to), nontemporal);
4938 else if (bitpos == 0 && bitsize == mode_bitsize)
4939 {
4940 rtx from_rtx;
4941 result = expand_normal (from);
4942 from_rtx = simplify_gen_subreg (GET_MODE (to_rtx), result,
4943 TYPE_MODE (TREE_TYPE (from)), 0);
4944 emit_move_insn (XEXP (to_rtx, 0),
4945 read_complex_part (from_rtx, false));
4946 emit_move_insn (XEXP (to_rtx, 1),
4947 read_complex_part (from_rtx, true));
4948 }
4949 else
4950 {
4951 rtx temp = assign_stack_temp (GET_MODE (to_rtx),
4952 GET_MODE_SIZE (GET_MODE (to_rtx)));
4953 write_complex_part (temp, XEXP (to_rtx, 0), false);
4954 write_complex_part (temp, XEXP (to_rtx, 1), true);
4955 result = store_field (temp, bitsize, bitpos,
4956 bitregion_start, bitregion_end,
4957 mode1, from,
4958 get_alias_set (to), nontemporal);
4959 emit_move_insn (XEXP (to_rtx, 0), read_complex_part (temp, false));
4960 emit_move_insn (XEXP (to_rtx, 1), read_complex_part (temp, true));
4961 }
4962 }
4963 else
4964 {
4965 if (MEM_P (to_rtx))
4966 {
4967 /* If the field is at offset zero, we could have been given the
4968 DECL_RTX of the parent struct. Don't munge it. */
4969 to_rtx = shallow_copy_rtx (to_rtx);
4970 set_mem_attributes_minus_bitpos (to_rtx, to, 0, bitpos);
4971 if (volatilep)
4972 MEM_VOLATILE_P (to_rtx) = 1;
4973 }
4974
4975 if (optimize_bitfield_assignment_op (bitsize, bitpos,
4976 bitregion_start, bitregion_end,
4977 mode1,
4978 to_rtx, to, from))
4979 result = NULL;
4980 else
4981 result = store_field (to_rtx, bitsize, bitpos,
4982 bitregion_start, bitregion_end,
4983 mode1, from,
4984 get_alias_set (to), nontemporal);
4985 }
4986
4987 if (result)
4988 preserve_temp_slots (result);
4989 pop_temp_slots ();
4990 return;
4991 }
4992
4993 /* If the rhs is a function call and its value is not an aggregate,
4994 call the function before we start to compute the lhs.
4995 This is needed for correct code for cases such as
4996 val = setjmp (buf) on machines where reference to val
4997 requires loading up part of an address in a separate insn.
4998
4999 Don't do this if TO is a VAR_DECL or PARM_DECL whose DECL_RTL is REG
5000 since it might be a promoted variable where the zero- or sign- extension
5001 needs to be done. Handling this in the normal way is safe because no
5002 computation is done before the call. The same is true for SSA names. */
5003 if (TREE_CODE (from) == CALL_EXPR && ! aggregate_value_p (from, from)
5004 && COMPLETE_TYPE_P (TREE_TYPE (from))
5005 && TREE_CODE (TYPE_SIZE (TREE_TYPE (from))) == INTEGER_CST
5006 && ! (((TREE_CODE (to) == VAR_DECL
5007 || TREE_CODE (to) == PARM_DECL
5008 || TREE_CODE (to) == RESULT_DECL)
5009 && REG_P (DECL_RTL (to)))
5010 || TREE_CODE (to) == SSA_NAME))
5011 {
5012 rtx value;
5013 rtx bounds;
5014
5015 push_temp_slots ();
5016 value = expand_normal (from);
5017
5018 /* Split value and bounds to store them separately. */
5019 chkp_split_slot (value, &value, &bounds);
5020
5021 if (to_rtx == 0)
5022 to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
5023
5024 /* Handle calls that return values in multiple non-contiguous locations.
5025 The Irix 6 ABI has examples of this. */
5026 if (GET_CODE (to_rtx) == PARALLEL)
5027 {
5028 if (GET_CODE (value) == PARALLEL)
5029 emit_group_move (to_rtx, value);
5030 else
5031 emit_group_load (to_rtx, value, TREE_TYPE (from),
5032 int_size_in_bytes (TREE_TYPE (from)));
5033 }
5034 else if (GET_CODE (value) == PARALLEL)
5035 emit_group_store (to_rtx, value, TREE_TYPE (from),
5036 int_size_in_bytes (TREE_TYPE (from)));
5037 else if (GET_MODE (to_rtx) == BLKmode)
5038 {
5039 /* Handle calls that return BLKmode values in registers. */
5040 if (REG_P (value))
5041 copy_blkmode_from_reg (to_rtx, value, TREE_TYPE (from));
5042 else
5043 emit_block_move (to_rtx, value, expr_size (from), BLOCK_OP_NORMAL);
5044 }
5045 else
5046 {
5047 if (POINTER_TYPE_P (TREE_TYPE (to)))
5048 value = convert_memory_address_addr_space
5049 (GET_MODE (to_rtx), value,
5050 TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (to))));
5051
5052 emit_move_insn (to_rtx, value);
5053 }
5054
5055 /* Store bounds if required. */
5056 if (bounds
5057 && (BOUNDED_P (to) || chkp_type_has_pointer (TREE_TYPE (to))))
5058 {
5059 gcc_assert (MEM_P (to_rtx));
5060 chkp_emit_bounds_store (bounds, value, to_rtx);
5061 }
5062
5063 preserve_temp_slots (to_rtx);
5064 pop_temp_slots ();
5065 return;
5066 }
5067
5068 /* Ordinary treatment. Expand TO to get a REG or MEM rtx. */
5069 to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
5070
5071 /* Don't move directly into a return register. */
5072 if (TREE_CODE (to) == RESULT_DECL
5073 && (REG_P (to_rtx) || GET_CODE (to_rtx) == PARALLEL))
5074 {
5075 rtx temp;
5076
5077 push_temp_slots ();
5078
5079 /* If the source is itself a return value, it still is in a pseudo at
5080 this point so we can move it back to the return register directly. */
5081 if (REG_P (to_rtx)
5082 && TYPE_MODE (TREE_TYPE (from)) == BLKmode
5083 && TREE_CODE (from) != CALL_EXPR)
5084 temp = copy_blkmode_to_reg (GET_MODE (to_rtx), from);
5085 else
5086 temp = expand_expr (from, NULL_RTX, GET_MODE (to_rtx), EXPAND_NORMAL);
5087
5088 /* Handle calls that return values in multiple non-contiguous locations.
5089 The Irix 6 ABI has examples of this. */
5090 if (GET_CODE (to_rtx) == PARALLEL)
5091 {
5092 if (GET_CODE (temp) == PARALLEL)
5093 emit_group_move (to_rtx, temp);
5094 else
5095 emit_group_load (to_rtx, temp, TREE_TYPE (from),
5096 int_size_in_bytes (TREE_TYPE (from)));
5097 }
5098 else if (temp)
5099 emit_move_insn (to_rtx, temp);
5100
5101 preserve_temp_slots (to_rtx);
5102 pop_temp_slots ();
5103 return;
5104 }
5105
5106 /* In case we are returning the contents of an object which overlaps
5107 the place the value is being stored, use a safe function when copying
5108 a value through a pointer into a structure value return block. */
5109 if (TREE_CODE (to) == RESULT_DECL
5110 && TREE_CODE (from) == INDIRECT_REF
5111 && ADDR_SPACE_GENERIC_P
5112 (TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (from, 0)))))
5113 && refs_may_alias_p (to, from)
5114 && cfun->returns_struct
5115 && !cfun->returns_pcc_struct)
5116 {
5117 rtx from_rtx, size;
5118
5119 push_temp_slots ();
5120 size = expr_size (from);
5121 from_rtx = expand_normal (from);
5122
5123 emit_library_call (memmove_libfunc, LCT_NORMAL,
5124 VOIDmode, 3, XEXP (to_rtx, 0), Pmode,
5125 XEXP (from_rtx, 0), Pmode,
5126 convert_to_mode (TYPE_MODE (sizetype),
5127 size, TYPE_UNSIGNED (sizetype)),
5128 TYPE_MODE (sizetype));
5129
5130 preserve_temp_slots (to_rtx);
5131 pop_temp_slots ();
5132 return;
5133 }
5134
5135 /* Compute FROM and store the value in the rtx we got. */
5136
5137 push_temp_slots ();
5138 result = store_expr_with_bounds (from, to_rtx, 0, nontemporal, to);
5139 preserve_temp_slots (result);
5140 pop_temp_slots ();
5141 return;
5142 }
5143
5144 /* Emits nontemporal store insn that moves FROM to TO. Returns true if this
5145 succeeded, false otherwise. */
5146
5147 bool
5148 emit_storent_insn (rtx to, rtx from)
5149 {
5150 struct expand_operand ops[2];
5151 machine_mode mode = GET_MODE (to);
5152 enum insn_code code = optab_handler (storent_optab, mode);
5153
5154 if (code == CODE_FOR_nothing)
5155 return false;
5156
5157 create_fixed_operand (&ops[0], to);
5158 create_input_operand (&ops[1], from, mode);
5159 return maybe_expand_insn (code, 2, ops);
5160 }
5161
5162 /* Generate code for computing expression EXP,
5163 and storing the value into TARGET.
5164
5165 If the mode is BLKmode then we may return TARGET itself.
5166 It turns out that in BLKmode it doesn't cause a problem.
5167 because C has no operators that could combine two different
5168 assignments into the same BLKmode object with different values
5169 with no sequence point. Will other languages need this to
5170 be more thorough?
5171
5172 If CALL_PARAM_P is nonzero, this is a store into a call param on the
5173 stack, and block moves may need to be treated specially.
5174
5175 If NONTEMPORAL is true, try using a nontemporal store instruction.
5176
5177 If BTARGET is not NULL then computed bounds of EXP are
5178 associated with BTARGET. */
5179
5180 rtx
5181 store_expr_with_bounds (tree exp, rtx target, int call_param_p,
5182 bool nontemporal, tree btarget)
5183 {
5184 rtx temp;
5185 rtx alt_rtl = NULL_RTX;
5186 location_t loc = curr_insn_location ();
5187
5188 if (VOID_TYPE_P (TREE_TYPE (exp)))
5189 {
5190 /* C++ can generate ?: expressions with a throw expression in one
5191 branch and an rvalue in the other. Here, we resolve attempts to
5192 store the throw expression's nonexistent result. */
5193 gcc_assert (!call_param_p);
5194 expand_expr (exp, const0_rtx, VOIDmode, EXPAND_NORMAL);
5195 return NULL_RTX;
5196 }
5197 if (TREE_CODE (exp) == COMPOUND_EXPR)
5198 {
5199 /* Perform first part of compound expression, then assign from second
5200 part. */
5201 expand_expr (TREE_OPERAND (exp, 0), const0_rtx, VOIDmode,
5202 call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL);
5203 return store_expr_with_bounds (TREE_OPERAND (exp, 1), target,
5204 call_param_p, nontemporal, btarget);
5205 }
5206 else if (TREE_CODE (exp) == COND_EXPR && GET_MODE (target) == BLKmode)
5207 {
5208 /* For conditional expression, get safe form of the target. Then
5209 test the condition, doing the appropriate assignment on either
5210 side. This avoids the creation of unnecessary temporaries.
5211 For non-BLKmode, it is more efficient not to do this. */
5212
5213 rtx_code_label *lab1 = gen_label_rtx (), *lab2 = gen_label_rtx ();
5214
5215 do_pending_stack_adjust ();
5216 NO_DEFER_POP;
5217 jumpifnot (TREE_OPERAND (exp, 0), lab1, -1);
5218 store_expr_with_bounds (TREE_OPERAND (exp, 1), target, call_param_p,
5219 nontemporal, btarget);
5220 emit_jump_insn (gen_jump (lab2));
5221 emit_barrier ();
5222 emit_label (lab1);
5223 store_expr_with_bounds (TREE_OPERAND (exp, 2), target, call_param_p,
5224 nontemporal, btarget);
5225 emit_label (lab2);
5226 OK_DEFER_POP;
5227
5228 return NULL_RTX;
5229 }
5230 else if (GET_CODE (target) == SUBREG && SUBREG_PROMOTED_VAR_P (target))
5231 /* If this is a scalar in a register that is stored in a wider mode
5232 than the declared mode, compute the result into its declared mode
5233 and then convert to the wider mode. Our value is the computed
5234 expression. */
5235 {
5236 rtx inner_target = 0;
5237
5238 /* We can do the conversion inside EXP, which will often result
5239 in some optimizations. Do the conversion in two steps: first
5240 change the signedness, if needed, then the extend. But don't
5241 do this if the type of EXP is a subtype of something else
5242 since then the conversion might involve more than just
5243 converting modes. */
5244 if (INTEGRAL_TYPE_P (TREE_TYPE (exp))
5245 && TREE_TYPE (TREE_TYPE (exp)) == 0
5246 && GET_MODE_PRECISION (GET_MODE (target))
5247 == TYPE_PRECISION (TREE_TYPE (exp)))
5248 {
5249 if (!SUBREG_CHECK_PROMOTED_SIGN (target,
5250 TYPE_UNSIGNED (TREE_TYPE (exp))))
5251 {
5252 /* Some types, e.g. Fortran's logical*4, won't have a signed
5253 version, so use the mode instead. */
5254 tree ntype
5255 = (signed_or_unsigned_type_for
5256 (SUBREG_PROMOTED_SIGN (target), TREE_TYPE (exp)));
5257 if (ntype == NULL)
5258 ntype = lang_hooks.types.type_for_mode
5259 (TYPE_MODE (TREE_TYPE (exp)),
5260 SUBREG_PROMOTED_SIGN (target));
5261
5262 exp = fold_convert_loc (loc, ntype, exp);
5263 }
5264
5265 exp = fold_convert_loc (loc, lang_hooks.types.type_for_mode
5266 (GET_MODE (SUBREG_REG (target)),
5267 SUBREG_PROMOTED_SIGN (target)),
5268 exp);
5269
5270 inner_target = SUBREG_REG (target);
5271 }
5272
5273 temp = expand_expr (exp, inner_target, VOIDmode,
5274 call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL);
5275
5276 /* Handle bounds returned by call. */
5277 if (TREE_CODE (exp) == CALL_EXPR)
5278 {
5279 rtx bounds;
5280 chkp_split_slot (temp, &temp, &bounds);
5281 if (bounds && btarget)
5282 {
5283 gcc_assert (TREE_CODE (btarget) == SSA_NAME);
5284 rtx tmp = targetm.calls.load_returned_bounds (bounds);
5285 chkp_set_rtl_bounds (btarget, tmp);
5286 }
5287 }
5288
5289 /* If TEMP is a VOIDmode constant, use convert_modes to make
5290 sure that we properly convert it. */
5291 if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode)
5292 {
5293 temp = convert_modes (GET_MODE (target), TYPE_MODE (TREE_TYPE (exp)),
5294 temp, SUBREG_PROMOTED_SIGN (target));
5295 temp = convert_modes (GET_MODE (SUBREG_REG (target)),
5296 GET_MODE (target), temp,
5297 SUBREG_PROMOTED_SIGN (target));
5298 }
5299
5300 convert_move (SUBREG_REG (target), temp,
5301 SUBREG_PROMOTED_SIGN (target));
5302
5303 return NULL_RTX;
5304 }
5305 else if ((TREE_CODE (exp) == STRING_CST
5306 || (TREE_CODE (exp) == MEM_REF
5307 && TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR
5308 && TREE_CODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0))
5309 == STRING_CST
5310 && integer_zerop (TREE_OPERAND (exp, 1))))
5311 && !nontemporal && !call_param_p
5312 && MEM_P (target))
5313 {
5314 /* Optimize initialization of an array with a STRING_CST. */
5315 HOST_WIDE_INT exp_len, str_copy_len;
5316 rtx dest_mem;
5317 tree str = TREE_CODE (exp) == STRING_CST
5318 ? exp : TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
5319
5320 exp_len = int_expr_size (exp);
5321 if (exp_len <= 0)
5322 goto normal_expr;
5323
5324 if (TREE_STRING_LENGTH (str) <= 0)
5325 goto normal_expr;
5326
5327 str_copy_len = strlen (TREE_STRING_POINTER (str));
5328 if (str_copy_len < TREE_STRING_LENGTH (str) - 1)
5329 goto normal_expr;
5330
5331 str_copy_len = TREE_STRING_LENGTH (str);
5332 if ((STORE_MAX_PIECES & (STORE_MAX_PIECES - 1)) == 0
5333 && TREE_STRING_POINTER (str)[TREE_STRING_LENGTH (str) - 1] == '\0')
5334 {
5335 str_copy_len += STORE_MAX_PIECES - 1;
5336 str_copy_len &= ~(STORE_MAX_PIECES - 1);
5337 }
5338 str_copy_len = MIN (str_copy_len, exp_len);
5339 if (!can_store_by_pieces (str_copy_len, builtin_strncpy_read_str,
5340 CONST_CAST (char *, TREE_STRING_POINTER (str)),
5341 MEM_ALIGN (target), false))
5342 goto normal_expr;
5343
5344 dest_mem = target;
5345
5346 dest_mem = store_by_pieces (dest_mem,
5347 str_copy_len, builtin_strncpy_read_str,
5348 CONST_CAST (char *,
5349 TREE_STRING_POINTER (str)),
5350 MEM_ALIGN (target), false,
5351 exp_len > str_copy_len ? 1 : 0);
5352 if (exp_len > str_copy_len)
5353 clear_storage (adjust_address (dest_mem, BLKmode, 0),
5354 GEN_INT (exp_len - str_copy_len),
5355 BLOCK_OP_NORMAL);
5356 return NULL_RTX;
5357 }
5358 else
5359 {
5360 rtx tmp_target;
5361
5362 normal_expr:
5363 /* If we want to use a nontemporal store, force the value to
5364 register first. */
5365 tmp_target = nontemporal ? NULL_RTX : target;
5366 temp = expand_expr_real (exp, tmp_target, GET_MODE (target),
5367 (call_param_p
5368 ? EXPAND_STACK_PARM : EXPAND_NORMAL),
5369 &alt_rtl, false);
5370
5371 /* Handle bounds returned by call. */
5372 if (TREE_CODE (exp) == CALL_EXPR)
5373 {
5374 rtx bounds;
5375 chkp_split_slot (temp, &temp, &bounds);
5376 if (bounds && btarget)
5377 {
5378 gcc_assert (TREE_CODE (btarget) == SSA_NAME);
5379 rtx tmp = targetm.calls.load_returned_bounds (bounds);
5380 chkp_set_rtl_bounds (btarget, tmp);
5381 }
5382 }
5383 }
5384
5385 /* If TEMP is a VOIDmode constant and the mode of the type of EXP is not
5386 the same as that of TARGET, adjust the constant. This is needed, for
5387 example, in case it is a CONST_DOUBLE or CONST_WIDE_INT and we want
5388 only a word-sized value. */
5389 if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode
5390 && TREE_CODE (exp) != ERROR_MARK
5391 && GET_MODE (target) != TYPE_MODE (TREE_TYPE (exp)))
5392 temp = convert_modes (GET_MODE (target), TYPE_MODE (TREE_TYPE (exp)),
5393 temp, TYPE_UNSIGNED (TREE_TYPE (exp)));
5394
5395 /* If value was not generated in the target, store it there.
5396 Convert the value to TARGET's type first if necessary and emit the
5397 pending incrementations that have been queued when expanding EXP.
5398 Note that we cannot emit the whole queue blindly because this will
5399 effectively disable the POST_INC optimization later.
5400
5401 If TEMP and TARGET compare equal according to rtx_equal_p, but
5402 one or both of them are volatile memory refs, we have to distinguish
5403 two cases:
5404 - expand_expr has used TARGET. In this case, we must not generate
5405 another copy. This can be detected by TARGET being equal according
5406 to == .
5407 - expand_expr has not used TARGET - that means that the source just
5408 happens to have the same RTX form. Since temp will have been created
5409 by expand_expr, it will compare unequal according to == .
5410 We must generate a copy in this case, to reach the correct number
5411 of volatile memory references. */
5412
5413 if ((! rtx_equal_p (temp, target)
5414 || (temp != target && (side_effects_p (temp)
5415 || side_effects_p (target))))
5416 && TREE_CODE (exp) != ERROR_MARK
5417 /* If store_expr stores a DECL whose DECL_RTL(exp) == TARGET,
5418 but TARGET is not valid memory reference, TEMP will differ
5419 from TARGET although it is really the same location. */
5420 && !(alt_rtl
5421 && rtx_equal_p (alt_rtl, target)
5422 && !side_effects_p (alt_rtl)
5423 && !side_effects_p (target))
5424 /* If there's nothing to copy, don't bother. Don't call
5425 expr_size unless necessary, because some front-ends (C++)
5426 expr_size-hook must not be given objects that are not
5427 supposed to be bit-copied or bit-initialized. */
5428 && expr_size (exp) != const0_rtx)
5429 {
5430 if (GET_MODE (temp) != GET_MODE (target) && GET_MODE (temp) != VOIDmode)
5431 {
5432 if (GET_MODE (target) == BLKmode)
5433 {
5434 /* Handle calls that return BLKmode values in registers. */
5435 if (REG_P (temp) && TREE_CODE (exp) == CALL_EXPR)
5436 copy_blkmode_from_reg (target, temp, TREE_TYPE (exp));
5437 else
5438 store_bit_field (target,
5439 INTVAL (expr_size (exp)) * BITS_PER_UNIT,
5440 0, 0, 0, GET_MODE (temp), temp);
5441 }
5442 else
5443 convert_move (target, temp, TYPE_UNSIGNED (TREE_TYPE (exp)));
5444 }
5445
5446 else if (GET_MODE (temp) == BLKmode && TREE_CODE (exp) == STRING_CST)
5447 {
5448 /* Handle copying a string constant into an array. The string
5449 constant may be shorter than the array. So copy just the string's
5450 actual length, and clear the rest. First get the size of the data
5451 type of the string, which is actually the size of the target. */
5452 rtx size = expr_size (exp);
5453
5454 if (CONST_INT_P (size)
5455 && INTVAL (size) < TREE_STRING_LENGTH (exp))
5456 emit_block_move (target, temp, size,
5457 (call_param_p
5458 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5459 else
5460 {
5461 machine_mode pointer_mode
5462 = targetm.addr_space.pointer_mode (MEM_ADDR_SPACE (target));
5463 machine_mode address_mode = get_address_mode (target);
5464
5465 /* Compute the size of the data to copy from the string. */
5466 tree copy_size
5467 = size_binop_loc (loc, MIN_EXPR,
5468 make_tree (sizetype, size),
5469 size_int (TREE_STRING_LENGTH (exp)));
5470 rtx copy_size_rtx
5471 = expand_expr (copy_size, NULL_RTX, VOIDmode,
5472 (call_param_p
5473 ? EXPAND_STACK_PARM : EXPAND_NORMAL));
5474 rtx_code_label *label = 0;
5475
5476 /* Copy that much. */
5477 copy_size_rtx = convert_to_mode (pointer_mode, copy_size_rtx,
5478 TYPE_UNSIGNED (sizetype));
5479 emit_block_move (target, temp, copy_size_rtx,
5480 (call_param_p
5481 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5482
5483 /* Figure out how much is left in TARGET that we have to clear.
5484 Do all calculations in pointer_mode. */
5485 if (CONST_INT_P (copy_size_rtx))
5486 {
5487 size = plus_constant (address_mode, size,
5488 -INTVAL (copy_size_rtx));
5489 target = adjust_address (target, BLKmode,
5490 INTVAL (copy_size_rtx));
5491 }
5492 else
5493 {
5494 size = expand_binop (TYPE_MODE (sizetype), sub_optab, size,
5495 copy_size_rtx, NULL_RTX, 0,
5496 OPTAB_LIB_WIDEN);
5497
5498 if (GET_MODE (copy_size_rtx) != address_mode)
5499 copy_size_rtx = convert_to_mode (address_mode,
5500 copy_size_rtx,
5501 TYPE_UNSIGNED (sizetype));
5502
5503 target = offset_address (target, copy_size_rtx,
5504 highest_pow2_factor (copy_size));
5505 label = gen_label_rtx ();
5506 emit_cmp_and_jump_insns (size, const0_rtx, LT, NULL_RTX,
5507 GET_MODE (size), 0, label);
5508 }
5509
5510 if (size != const0_rtx)
5511 clear_storage (target, size, BLOCK_OP_NORMAL);
5512
5513 if (label)
5514 emit_label (label);
5515 }
5516 }
5517 /* Handle calls that return values in multiple non-contiguous locations.
5518 The Irix 6 ABI has examples of this. */
5519 else if (GET_CODE (target) == PARALLEL)
5520 {
5521 if (GET_CODE (temp) == PARALLEL)
5522 emit_group_move (target, temp);
5523 else
5524 emit_group_load (target, temp, TREE_TYPE (exp),
5525 int_size_in_bytes (TREE_TYPE (exp)));
5526 }
5527 else if (GET_CODE (temp) == PARALLEL)
5528 emit_group_store (target, temp, TREE_TYPE (exp),
5529 int_size_in_bytes (TREE_TYPE (exp)));
5530 else if (GET_MODE (temp) == BLKmode)
5531 emit_block_move (target, temp, expr_size (exp),
5532 (call_param_p
5533 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5534 /* If we emit a nontemporal store, there is nothing else to do. */
5535 else if (nontemporal && emit_storent_insn (target, temp))
5536 ;
5537 else
5538 {
5539 temp = force_operand (temp, target);
5540 if (temp != target)
5541 emit_move_insn (target, temp);
5542 }
5543 }
5544
5545 return NULL_RTX;
5546 }
5547
5548 /* Same as store_expr_with_bounds but ignoring bounds of EXP. */
5549 rtx
5550 store_expr (tree exp, rtx target, int call_param_p, bool nontemporal)
5551 {
5552 return store_expr_with_bounds (exp, target, call_param_p, nontemporal, NULL);
5553 }
5554 \f
5555 /* Return true if field F of structure TYPE is a flexible array. */
5556
5557 static bool
5558 flexible_array_member_p (const_tree f, const_tree type)
5559 {
5560 const_tree tf;
5561
5562 tf = TREE_TYPE (f);
5563 return (DECL_CHAIN (f) == NULL
5564 && TREE_CODE (tf) == ARRAY_TYPE
5565 && TYPE_DOMAIN (tf)
5566 && TYPE_MIN_VALUE (TYPE_DOMAIN (tf))
5567 && integer_zerop (TYPE_MIN_VALUE (TYPE_DOMAIN (tf)))
5568 && !TYPE_MAX_VALUE (TYPE_DOMAIN (tf))
5569 && int_size_in_bytes (type) >= 0);
5570 }
5571
5572 /* If FOR_CTOR_P, return the number of top-level elements that a constructor
5573 must have in order for it to completely initialize a value of type TYPE.
5574 Return -1 if the number isn't known.
5575
5576 If !FOR_CTOR_P, return an estimate of the number of scalars in TYPE. */
5577
5578 static HOST_WIDE_INT
5579 count_type_elements (const_tree type, bool for_ctor_p)
5580 {
5581 switch (TREE_CODE (type))
5582 {
5583 case ARRAY_TYPE:
5584 {
5585 tree nelts;
5586
5587 nelts = array_type_nelts (type);
5588 if (nelts && tree_fits_uhwi_p (nelts))
5589 {
5590 unsigned HOST_WIDE_INT n;
5591
5592 n = tree_to_uhwi (nelts) + 1;
5593 if (n == 0 || for_ctor_p)
5594 return n;
5595 else
5596 return n * count_type_elements (TREE_TYPE (type), false);
5597 }
5598 return for_ctor_p ? -1 : 1;
5599 }
5600
5601 case RECORD_TYPE:
5602 {
5603 unsigned HOST_WIDE_INT n;
5604 tree f;
5605
5606 n = 0;
5607 for (f = TYPE_FIELDS (type); f ; f = DECL_CHAIN (f))
5608 if (TREE_CODE (f) == FIELD_DECL)
5609 {
5610 if (!for_ctor_p)
5611 n += count_type_elements (TREE_TYPE (f), false);
5612 else if (!flexible_array_member_p (f, type))
5613 /* Don't count flexible arrays, which are not supposed
5614 to be initialized. */
5615 n += 1;
5616 }
5617
5618 return n;
5619 }
5620
5621 case UNION_TYPE:
5622 case QUAL_UNION_TYPE:
5623 {
5624 tree f;
5625 HOST_WIDE_INT n, m;
5626
5627 gcc_assert (!for_ctor_p);
5628 /* Estimate the number of scalars in each field and pick the
5629 maximum. Other estimates would do instead; the idea is simply
5630 to make sure that the estimate is not sensitive to the ordering
5631 of the fields. */
5632 n = 1;
5633 for (f = TYPE_FIELDS (type); f ; f = DECL_CHAIN (f))
5634 if (TREE_CODE (f) == FIELD_DECL)
5635 {
5636 m = count_type_elements (TREE_TYPE (f), false);
5637 /* If the field doesn't span the whole union, add an extra
5638 scalar for the rest. */
5639 if (simple_cst_equal (TYPE_SIZE (TREE_TYPE (f)),
5640 TYPE_SIZE (type)) != 1)
5641 m++;
5642 if (n < m)
5643 n = m;
5644 }
5645 return n;
5646 }
5647
5648 case COMPLEX_TYPE:
5649 return 2;
5650
5651 case VECTOR_TYPE:
5652 return TYPE_VECTOR_SUBPARTS (type);
5653
5654 case INTEGER_TYPE:
5655 case REAL_TYPE:
5656 case FIXED_POINT_TYPE:
5657 case ENUMERAL_TYPE:
5658 case BOOLEAN_TYPE:
5659 case POINTER_TYPE:
5660 case OFFSET_TYPE:
5661 case REFERENCE_TYPE:
5662 case NULLPTR_TYPE:
5663 return 1;
5664
5665 case ERROR_MARK:
5666 return 0;
5667
5668 case VOID_TYPE:
5669 case METHOD_TYPE:
5670 case FUNCTION_TYPE:
5671 case LANG_TYPE:
5672 default:
5673 gcc_unreachable ();
5674 }
5675 }
5676
5677 /* Helper for categorize_ctor_elements. Identical interface. */
5678
5679 static bool
5680 categorize_ctor_elements_1 (const_tree ctor, HOST_WIDE_INT *p_nz_elts,
5681 HOST_WIDE_INT *p_init_elts, bool *p_complete)
5682 {
5683 unsigned HOST_WIDE_INT idx;
5684 HOST_WIDE_INT nz_elts, init_elts, num_fields;
5685 tree value, purpose, elt_type;
5686
5687 /* Whether CTOR is a valid constant initializer, in accordance with what
5688 initializer_constant_valid_p does. If inferred from the constructor
5689 elements, true until proven otherwise. */
5690 bool const_from_elts_p = constructor_static_from_elts_p (ctor);
5691 bool const_p = const_from_elts_p ? true : TREE_STATIC (ctor);
5692
5693 nz_elts = 0;
5694 init_elts = 0;
5695 num_fields = 0;
5696 elt_type = NULL_TREE;
5697
5698 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (ctor), idx, purpose, value)
5699 {
5700 HOST_WIDE_INT mult = 1;
5701
5702 if (purpose && TREE_CODE (purpose) == RANGE_EXPR)
5703 {
5704 tree lo_index = TREE_OPERAND (purpose, 0);
5705 tree hi_index = TREE_OPERAND (purpose, 1);
5706
5707 if (tree_fits_uhwi_p (lo_index) && tree_fits_uhwi_p (hi_index))
5708 mult = (tree_to_uhwi (hi_index)
5709 - tree_to_uhwi (lo_index) + 1);
5710 }
5711 num_fields += mult;
5712 elt_type = TREE_TYPE (value);
5713
5714 switch (TREE_CODE (value))
5715 {
5716 case CONSTRUCTOR:
5717 {
5718 HOST_WIDE_INT nz = 0, ic = 0;
5719
5720 bool const_elt_p = categorize_ctor_elements_1 (value, &nz, &ic,
5721 p_complete);
5722
5723 nz_elts += mult * nz;
5724 init_elts += mult * ic;
5725
5726 if (const_from_elts_p && const_p)
5727 const_p = const_elt_p;
5728 }
5729 break;
5730
5731 case INTEGER_CST:
5732 case REAL_CST:
5733 case FIXED_CST:
5734 if (!initializer_zerop (value))
5735 nz_elts += mult;
5736 init_elts += mult;
5737 break;
5738
5739 case STRING_CST:
5740 nz_elts += mult * TREE_STRING_LENGTH (value);
5741 init_elts += mult * TREE_STRING_LENGTH (value);
5742 break;
5743
5744 case COMPLEX_CST:
5745 if (!initializer_zerop (TREE_REALPART (value)))
5746 nz_elts += mult;
5747 if (!initializer_zerop (TREE_IMAGPART (value)))
5748 nz_elts += mult;
5749 init_elts += mult;
5750 break;
5751
5752 case VECTOR_CST:
5753 {
5754 unsigned i;
5755 for (i = 0; i < VECTOR_CST_NELTS (value); ++i)
5756 {
5757 tree v = VECTOR_CST_ELT (value, i);
5758 if (!initializer_zerop (v))
5759 nz_elts += mult;
5760 init_elts += mult;
5761 }
5762 }
5763 break;
5764
5765 default:
5766 {
5767 HOST_WIDE_INT tc = count_type_elements (elt_type, false);
5768 nz_elts += mult * tc;
5769 init_elts += mult * tc;
5770
5771 if (const_from_elts_p && const_p)
5772 const_p = initializer_constant_valid_p (value, elt_type)
5773 != NULL_TREE;
5774 }
5775 break;
5776 }
5777 }
5778
5779 if (*p_complete && !complete_ctor_at_level_p (TREE_TYPE (ctor),
5780 num_fields, elt_type))
5781 *p_complete = false;
5782
5783 *p_nz_elts += nz_elts;
5784 *p_init_elts += init_elts;
5785
5786 return const_p;
5787 }
5788
5789 /* Examine CTOR to discover:
5790 * how many scalar fields are set to nonzero values,
5791 and place it in *P_NZ_ELTS;
5792 * how many scalar fields in total are in CTOR,
5793 and place it in *P_ELT_COUNT.
5794 * whether the constructor is complete -- in the sense that every
5795 meaningful byte is explicitly given a value --
5796 and place it in *P_COMPLETE.
5797
5798 Return whether or not CTOR is a valid static constant initializer, the same
5799 as "initializer_constant_valid_p (CTOR, TREE_TYPE (CTOR)) != 0". */
5800
5801 bool
5802 categorize_ctor_elements (const_tree ctor, HOST_WIDE_INT *p_nz_elts,
5803 HOST_WIDE_INT *p_init_elts, bool *p_complete)
5804 {
5805 *p_nz_elts = 0;
5806 *p_init_elts = 0;
5807 *p_complete = true;
5808
5809 return categorize_ctor_elements_1 (ctor, p_nz_elts, p_init_elts, p_complete);
5810 }
5811
5812 /* TYPE is initialized by a constructor with NUM_ELTS elements, the last
5813 of which had type LAST_TYPE. Each element was itself a complete
5814 initializer, in the sense that every meaningful byte was explicitly
5815 given a value. Return true if the same is true for the constructor
5816 as a whole. */
5817
5818 bool
5819 complete_ctor_at_level_p (const_tree type, HOST_WIDE_INT num_elts,
5820 const_tree last_type)
5821 {
5822 if (TREE_CODE (type) == UNION_TYPE
5823 || TREE_CODE (type) == QUAL_UNION_TYPE)
5824 {
5825 if (num_elts == 0)
5826 return false;
5827
5828 gcc_assert (num_elts == 1 && last_type);
5829
5830 /* ??? We could look at each element of the union, and find the
5831 largest element. Which would avoid comparing the size of the
5832 initialized element against any tail padding in the union.
5833 Doesn't seem worth the effort... */
5834 return simple_cst_equal (TYPE_SIZE (type), TYPE_SIZE (last_type)) == 1;
5835 }
5836
5837 return count_type_elements (type, true) == num_elts;
5838 }
5839
5840 /* Return 1 if EXP contains mostly (3/4) zeros. */
5841
5842 static int
5843 mostly_zeros_p (const_tree exp)
5844 {
5845 if (TREE_CODE (exp) == CONSTRUCTOR)
5846 {
5847 HOST_WIDE_INT nz_elts, init_elts;
5848 bool complete_p;
5849
5850 categorize_ctor_elements (exp, &nz_elts, &init_elts, &complete_p);
5851 return !complete_p || nz_elts < init_elts / 4;
5852 }
5853
5854 return initializer_zerop (exp);
5855 }
5856
5857 /* Return 1 if EXP contains all zeros. */
5858
5859 static int
5860 all_zeros_p (const_tree exp)
5861 {
5862 if (TREE_CODE (exp) == CONSTRUCTOR)
5863 {
5864 HOST_WIDE_INT nz_elts, init_elts;
5865 bool complete_p;
5866
5867 categorize_ctor_elements (exp, &nz_elts, &init_elts, &complete_p);
5868 return nz_elts == 0;
5869 }
5870
5871 return initializer_zerop (exp);
5872 }
5873 \f
5874 /* Helper function for store_constructor.
5875 TARGET, BITSIZE, BITPOS, MODE, EXP are as for store_field.
5876 CLEARED is as for store_constructor.
5877 ALIAS_SET is the alias set to use for any stores.
5878
5879 This provides a recursive shortcut back to store_constructor when it isn't
5880 necessary to go through store_field. This is so that we can pass through
5881 the cleared field to let store_constructor know that we may not have to
5882 clear a substructure if the outer structure has already been cleared. */
5883
5884 static void
5885 store_constructor_field (rtx target, unsigned HOST_WIDE_INT bitsize,
5886 HOST_WIDE_INT bitpos, machine_mode mode,
5887 tree exp, int cleared, alias_set_type alias_set)
5888 {
5889 if (TREE_CODE (exp) == CONSTRUCTOR
5890 /* We can only call store_constructor recursively if the size and
5891 bit position are on a byte boundary. */
5892 && bitpos % BITS_PER_UNIT == 0
5893 && (bitsize > 0 && bitsize % BITS_PER_UNIT == 0)
5894 /* If we have a nonzero bitpos for a register target, then we just
5895 let store_field do the bitfield handling. This is unlikely to
5896 generate unnecessary clear instructions anyways. */
5897 && (bitpos == 0 || MEM_P (target)))
5898 {
5899 if (MEM_P (target))
5900 target
5901 = adjust_address (target,
5902 GET_MODE (target) == BLKmode
5903 || 0 != (bitpos
5904 % GET_MODE_ALIGNMENT (GET_MODE (target)))
5905 ? BLKmode : VOIDmode, bitpos / BITS_PER_UNIT);
5906
5907
5908 /* Update the alias set, if required. */
5909 if (MEM_P (target) && ! MEM_KEEP_ALIAS_SET_P (target)
5910 && MEM_ALIAS_SET (target) != 0)
5911 {
5912 target = copy_rtx (target);
5913 set_mem_alias_set (target, alias_set);
5914 }
5915
5916 store_constructor (exp, target, cleared, bitsize / BITS_PER_UNIT);
5917 }
5918 else
5919 store_field (target, bitsize, bitpos, 0, 0, mode, exp, alias_set, false);
5920 }
5921
5922
5923 /* Returns the number of FIELD_DECLs in TYPE. */
5924
5925 static int
5926 fields_length (const_tree type)
5927 {
5928 tree t = TYPE_FIELDS (type);
5929 int count = 0;
5930
5931 for (; t; t = DECL_CHAIN (t))
5932 if (TREE_CODE (t) == FIELD_DECL)
5933 ++count;
5934
5935 return count;
5936 }
5937
5938
5939 /* Store the value of constructor EXP into the rtx TARGET.
5940 TARGET is either a REG or a MEM; we know it cannot conflict, since
5941 safe_from_p has been called.
5942 CLEARED is true if TARGET is known to have been zero'd.
5943 SIZE is the number of bytes of TARGET we are allowed to modify: this
5944 may not be the same as the size of EXP if we are assigning to a field
5945 which has been packed to exclude padding bits. */
5946
5947 static void
5948 store_constructor (tree exp, rtx target, int cleared, HOST_WIDE_INT size)
5949 {
5950 tree type = TREE_TYPE (exp);
5951 #ifdef WORD_REGISTER_OPERATIONS
5952 HOST_WIDE_INT exp_size = int_size_in_bytes (type);
5953 #endif
5954
5955 switch (TREE_CODE (type))
5956 {
5957 case RECORD_TYPE:
5958 case UNION_TYPE:
5959 case QUAL_UNION_TYPE:
5960 {
5961 unsigned HOST_WIDE_INT idx;
5962 tree field, value;
5963
5964 /* If size is zero or the target is already cleared, do nothing. */
5965 if (size == 0 || cleared)
5966 cleared = 1;
5967 /* We either clear the aggregate or indicate the value is dead. */
5968 else if ((TREE_CODE (type) == UNION_TYPE
5969 || TREE_CODE (type) == QUAL_UNION_TYPE)
5970 && ! CONSTRUCTOR_ELTS (exp))
5971 /* If the constructor is empty, clear the union. */
5972 {
5973 clear_storage (target, expr_size (exp), BLOCK_OP_NORMAL);
5974 cleared = 1;
5975 }
5976
5977 /* If we are building a static constructor into a register,
5978 set the initial value as zero so we can fold the value into
5979 a constant. But if more than one register is involved,
5980 this probably loses. */
5981 else if (REG_P (target) && TREE_STATIC (exp)
5982 && GET_MODE_SIZE (GET_MODE (target)) <= UNITS_PER_WORD)
5983 {
5984 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
5985 cleared = 1;
5986 }
5987
5988 /* If the constructor has fewer fields than the structure or
5989 if we are initializing the structure to mostly zeros, clear
5990 the whole structure first. Don't do this if TARGET is a
5991 register whose mode size isn't equal to SIZE since
5992 clear_storage can't handle this case. */
5993 else if (size > 0
5994 && (((int)vec_safe_length (CONSTRUCTOR_ELTS (exp))
5995 != fields_length (type))
5996 || mostly_zeros_p (exp))
5997 && (!REG_P (target)
5998 || ((HOST_WIDE_INT) GET_MODE_SIZE (GET_MODE (target))
5999 == size)))
6000 {
6001 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
6002 cleared = 1;
6003 }
6004
6005 if (REG_P (target) && !cleared)
6006 emit_clobber (target);
6007
6008 /* Store each element of the constructor into the
6009 corresponding field of TARGET. */
6010 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), idx, field, value)
6011 {
6012 machine_mode mode;
6013 HOST_WIDE_INT bitsize;
6014 HOST_WIDE_INT bitpos = 0;
6015 tree offset;
6016 rtx to_rtx = target;
6017
6018 /* Just ignore missing fields. We cleared the whole
6019 structure, above, if any fields are missing. */
6020 if (field == 0)
6021 continue;
6022
6023 if (cleared && initializer_zerop (value))
6024 continue;
6025
6026 if (tree_fits_uhwi_p (DECL_SIZE (field)))
6027 bitsize = tree_to_uhwi (DECL_SIZE (field));
6028 else
6029 bitsize = -1;
6030
6031 mode = DECL_MODE (field);
6032 if (DECL_BIT_FIELD (field))
6033 mode = VOIDmode;
6034
6035 offset = DECL_FIELD_OFFSET (field);
6036 if (tree_fits_shwi_p (offset)
6037 && tree_fits_shwi_p (bit_position (field)))
6038 {
6039 bitpos = int_bit_position (field);
6040 offset = 0;
6041 }
6042 else
6043 bitpos = tree_to_shwi (DECL_FIELD_BIT_OFFSET (field));
6044
6045 if (offset)
6046 {
6047 machine_mode address_mode;
6048 rtx offset_rtx;
6049
6050 offset
6051 = SUBSTITUTE_PLACEHOLDER_IN_EXPR (offset,
6052 make_tree (TREE_TYPE (exp),
6053 target));
6054
6055 offset_rtx = expand_normal (offset);
6056 gcc_assert (MEM_P (to_rtx));
6057
6058 address_mode = get_address_mode (to_rtx);
6059 if (GET_MODE (offset_rtx) != address_mode)
6060 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
6061
6062 to_rtx = offset_address (to_rtx, offset_rtx,
6063 highest_pow2_factor (offset));
6064 }
6065
6066 #ifdef WORD_REGISTER_OPERATIONS
6067 /* If this initializes a field that is smaller than a
6068 word, at the start of a word, try to widen it to a full
6069 word. This special case allows us to output C++ member
6070 function initializations in a form that the optimizers
6071 can understand. */
6072 if (REG_P (target)
6073 && bitsize < BITS_PER_WORD
6074 && bitpos % BITS_PER_WORD == 0
6075 && GET_MODE_CLASS (mode) == MODE_INT
6076 && TREE_CODE (value) == INTEGER_CST
6077 && exp_size >= 0
6078 && bitpos + BITS_PER_WORD <= exp_size * BITS_PER_UNIT)
6079 {
6080 tree type = TREE_TYPE (value);
6081
6082 if (TYPE_PRECISION (type) < BITS_PER_WORD)
6083 {
6084 type = lang_hooks.types.type_for_mode
6085 (word_mode, TYPE_UNSIGNED (type));
6086 value = fold_convert (type, value);
6087 }
6088
6089 if (BYTES_BIG_ENDIAN)
6090 value
6091 = fold_build2 (LSHIFT_EXPR, type, value,
6092 build_int_cst (type,
6093 BITS_PER_WORD - bitsize));
6094 bitsize = BITS_PER_WORD;
6095 mode = word_mode;
6096 }
6097 #endif
6098
6099 if (MEM_P (to_rtx) && !MEM_KEEP_ALIAS_SET_P (to_rtx)
6100 && DECL_NONADDRESSABLE_P (field))
6101 {
6102 to_rtx = copy_rtx (to_rtx);
6103 MEM_KEEP_ALIAS_SET_P (to_rtx) = 1;
6104 }
6105
6106 store_constructor_field (to_rtx, bitsize, bitpos, mode,
6107 value, cleared,
6108 get_alias_set (TREE_TYPE (field)));
6109 }
6110 break;
6111 }
6112 case ARRAY_TYPE:
6113 {
6114 tree value, index;
6115 unsigned HOST_WIDE_INT i;
6116 int need_to_clear;
6117 tree domain;
6118 tree elttype = TREE_TYPE (type);
6119 int const_bounds_p;
6120 HOST_WIDE_INT minelt = 0;
6121 HOST_WIDE_INT maxelt = 0;
6122
6123 domain = TYPE_DOMAIN (type);
6124 const_bounds_p = (TYPE_MIN_VALUE (domain)
6125 && TYPE_MAX_VALUE (domain)
6126 && tree_fits_shwi_p (TYPE_MIN_VALUE (domain))
6127 && tree_fits_shwi_p (TYPE_MAX_VALUE (domain)));
6128
6129 /* If we have constant bounds for the range of the type, get them. */
6130 if (const_bounds_p)
6131 {
6132 minelt = tree_to_shwi (TYPE_MIN_VALUE (domain));
6133 maxelt = tree_to_shwi (TYPE_MAX_VALUE (domain));
6134 }
6135
6136 /* If the constructor has fewer elements than the array, clear
6137 the whole array first. Similarly if this is static
6138 constructor of a non-BLKmode object. */
6139 if (cleared)
6140 need_to_clear = 0;
6141 else if (REG_P (target) && TREE_STATIC (exp))
6142 need_to_clear = 1;
6143 else
6144 {
6145 unsigned HOST_WIDE_INT idx;
6146 tree index, value;
6147 HOST_WIDE_INT count = 0, zero_count = 0;
6148 need_to_clear = ! const_bounds_p;
6149
6150 /* This loop is a more accurate version of the loop in
6151 mostly_zeros_p (it handles RANGE_EXPR in an index). It
6152 is also needed to check for missing elements. */
6153 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), idx, index, value)
6154 {
6155 HOST_WIDE_INT this_node_count;
6156
6157 if (need_to_clear)
6158 break;
6159
6160 if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR)
6161 {
6162 tree lo_index = TREE_OPERAND (index, 0);
6163 tree hi_index = TREE_OPERAND (index, 1);
6164
6165 if (! tree_fits_uhwi_p (lo_index)
6166 || ! tree_fits_uhwi_p (hi_index))
6167 {
6168 need_to_clear = 1;
6169 break;
6170 }
6171
6172 this_node_count = (tree_to_uhwi (hi_index)
6173 - tree_to_uhwi (lo_index) + 1);
6174 }
6175 else
6176 this_node_count = 1;
6177
6178 count += this_node_count;
6179 if (mostly_zeros_p (value))
6180 zero_count += this_node_count;
6181 }
6182
6183 /* Clear the entire array first if there are any missing
6184 elements, or if the incidence of zero elements is >=
6185 75%. */
6186 if (! need_to_clear
6187 && (count < maxelt - minelt + 1
6188 || 4 * zero_count >= 3 * count))
6189 need_to_clear = 1;
6190 }
6191
6192 if (need_to_clear && size > 0)
6193 {
6194 if (REG_P (target))
6195 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
6196 else
6197 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
6198 cleared = 1;
6199 }
6200
6201 if (!cleared && REG_P (target))
6202 /* Inform later passes that the old value is dead. */
6203 emit_clobber (target);
6204
6205 /* Store each element of the constructor into the
6206 corresponding element of TARGET, determined by counting the
6207 elements. */
6208 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), i, index, value)
6209 {
6210 machine_mode mode;
6211 HOST_WIDE_INT bitsize;
6212 HOST_WIDE_INT bitpos;
6213 rtx xtarget = target;
6214
6215 if (cleared && initializer_zerop (value))
6216 continue;
6217
6218 mode = TYPE_MODE (elttype);
6219 if (mode == BLKmode)
6220 bitsize = (tree_fits_uhwi_p (TYPE_SIZE (elttype))
6221 ? tree_to_uhwi (TYPE_SIZE (elttype))
6222 : -1);
6223 else
6224 bitsize = GET_MODE_BITSIZE (mode);
6225
6226 if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR)
6227 {
6228 tree lo_index = TREE_OPERAND (index, 0);
6229 tree hi_index = TREE_OPERAND (index, 1);
6230 rtx index_r, pos_rtx;
6231 HOST_WIDE_INT lo, hi, count;
6232 tree position;
6233
6234 /* If the range is constant and "small", unroll the loop. */
6235 if (const_bounds_p
6236 && tree_fits_shwi_p (lo_index)
6237 && tree_fits_shwi_p (hi_index)
6238 && (lo = tree_to_shwi (lo_index),
6239 hi = tree_to_shwi (hi_index),
6240 count = hi - lo + 1,
6241 (!MEM_P (target)
6242 || count <= 2
6243 || (tree_fits_uhwi_p (TYPE_SIZE (elttype))
6244 && (tree_to_uhwi (TYPE_SIZE (elttype)) * count
6245 <= 40 * 8)))))
6246 {
6247 lo -= minelt; hi -= minelt;
6248 for (; lo <= hi; lo++)
6249 {
6250 bitpos = lo * tree_to_shwi (TYPE_SIZE (elttype));
6251
6252 if (MEM_P (target)
6253 && !MEM_KEEP_ALIAS_SET_P (target)
6254 && TREE_CODE (type) == ARRAY_TYPE
6255 && TYPE_NONALIASED_COMPONENT (type))
6256 {
6257 target = copy_rtx (target);
6258 MEM_KEEP_ALIAS_SET_P (target) = 1;
6259 }
6260
6261 store_constructor_field
6262 (target, bitsize, bitpos, mode, value, cleared,
6263 get_alias_set (elttype));
6264 }
6265 }
6266 else
6267 {
6268 rtx_code_label *loop_start = gen_label_rtx ();
6269 rtx_code_label *loop_end = gen_label_rtx ();
6270 tree exit_cond;
6271
6272 expand_normal (hi_index);
6273
6274 index = build_decl (EXPR_LOCATION (exp),
6275 VAR_DECL, NULL_TREE, domain);
6276 index_r = gen_reg_rtx (promote_decl_mode (index, NULL));
6277 SET_DECL_RTL (index, index_r);
6278 store_expr (lo_index, index_r, 0, false);
6279
6280 /* Build the head of the loop. */
6281 do_pending_stack_adjust ();
6282 emit_label (loop_start);
6283
6284 /* Assign value to element index. */
6285 position =
6286 fold_convert (ssizetype,
6287 fold_build2 (MINUS_EXPR,
6288 TREE_TYPE (index),
6289 index,
6290 TYPE_MIN_VALUE (domain)));
6291
6292 position =
6293 size_binop (MULT_EXPR, position,
6294 fold_convert (ssizetype,
6295 TYPE_SIZE_UNIT (elttype)));
6296
6297 pos_rtx = expand_normal (position);
6298 xtarget = offset_address (target, pos_rtx,
6299 highest_pow2_factor (position));
6300 xtarget = adjust_address (xtarget, mode, 0);
6301 if (TREE_CODE (value) == CONSTRUCTOR)
6302 store_constructor (value, xtarget, cleared,
6303 bitsize / BITS_PER_UNIT);
6304 else
6305 store_expr (value, xtarget, 0, false);
6306
6307 /* Generate a conditional jump to exit the loop. */
6308 exit_cond = build2 (LT_EXPR, integer_type_node,
6309 index, hi_index);
6310 jumpif (exit_cond, loop_end, -1);
6311
6312 /* Update the loop counter, and jump to the head of
6313 the loop. */
6314 expand_assignment (index,
6315 build2 (PLUS_EXPR, TREE_TYPE (index),
6316 index, integer_one_node),
6317 false);
6318
6319 emit_jump (loop_start);
6320
6321 /* Build the end of the loop. */
6322 emit_label (loop_end);
6323 }
6324 }
6325 else if ((index != 0 && ! tree_fits_shwi_p (index))
6326 || ! tree_fits_uhwi_p (TYPE_SIZE (elttype)))
6327 {
6328 tree position;
6329
6330 if (index == 0)
6331 index = ssize_int (1);
6332
6333 if (minelt)
6334 index = fold_convert (ssizetype,
6335 fold_build2 (MINUS_EXPR,
6336 TREE_TYPE (index),
6337 index,
6338 TYPE_MIN_VALUE (domain)));
6339
6340 position =
6341 size_binop (MULT_EXPR, index,
6342 fold_convert (ssizetype,
6343 TYPE_SIZE_UNIT (elttype)));
6344 xtarget = offset_address (target,
6345 expand_normal (position),
6346 highest_pow2_factor (position));
6347 xtarget = adjust_address (xtarget, mode, 0);
6348 store_expr (value, xtarget, 0, false);
6349 }
6350 else
6351 {
6352 if (index != 0)
6353 bitpos = ((tree_to_shwi (index) - minelt)
6354 * tree_to_uhwi (TYPE_SIZE (elttype)));
6355 else
6356 bitpos = (i * tree_to_uhwi (TYPE_SIZE (elttype)));
6357
6358 if (MEM_P (target) && !MEM_KEEP_ALIAS_SET_P (target)
6359 && TREE_CODE (type) == ARRAY_TYPE
6360 && TYPE_NONALIASED_COMPONENT (type))
6361 {
6362 target = copy_rtx (target);
6363 MEM_KEEP_ALIAS_SET_P (target) = 1;
6364 }
6365 store_constructor_field (target, bitsize, bitpos, mode, value,
6366 cleared, get_alias_set (elttype));
6367 }
6368 }
6369 break;
6370 }
6371
6372 case VECTOR_TYPE:
6373 {
6374 unsigned HOST_WIDE_INT idx;
6375 constructor_elt *ce;
6376 int i;
6377 int need_to_clear;
6378 int icode = CODE_FOR_nothing;
6379 tree elttype = TREE_TYPE (type);
6380 int elt_size = tree_to_uhwi (TYPE_SIZE (elttype));
6381 machine_mode eltmode = TYPE_MODE (elttype);
6382 HOST_WIDE_INT bitsize;
6383 HOST_WIDE_INT bitpos;
6384 rtvec vector = NULL;
6385 unsigned n_elts;
6386 alias_set_type alias;
6387
6388 gcc_assert (eltmode != BLKmode);
6389
6390 n_elts = TYPE_VECTOR_SUBPARTS (type);
6391 if (REG_P (target) && VECTOR_MODE_P (GET_MODE (target)))
6392 {
6393 machine_mode mode = GET_MODE (target);
6394
6395 icode = (int) optab_handler (vec_init_optab, mode);
6396 /* Don't use vec_init<mode> if some elements have VECTOR_TYPE. */
6397 if (icode != CODE_FOR_nothing)
6398 {
6399 tree value;
6400
6401 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value)
6402 if (TREE_CODE (TREE_TYPE (value)) == VECTOR_TYPE)
6403 {
6404 icode = CODE_FOR_nothing;
6405 break;
6406 }
6407 }
6408 if (icode != CODE_FOR_nothing)
6409 {
6410 unsigned int i;
6411
6412 vector = rtvec_alloc (n_elts);
6413 for (i = 0; i < n_elts; i++)
6414 RTVEC_ELT (vector, i) = CONST0_RTX (GET_MODE_INNER (mode));
6415 }
6416 }
6417
6418 /* If the constructor has fewer elements than the vector,
6419 clear the whole array first. Similarly if this is static
6420 constructor of a non-BLKmode object. */
6421 if (cleared)
6422 need_to_clear = 0;
6423 else if (REG_P (target) && TREE_STATIC (exp))
6424 need_to_clear = 1;
6425 else
6426 {
6427 unsigned HOST_WIDE_INT count = 0, zero_count = 0;
6428 tree value;
6429
6430 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value)
6431 {
6432 int n_elts_here = tree_to_uhwi
6433 (int_const_binop (TRUNC_DIV_EXPR,
6434 TYPE_SIZE (TREE_TYPE (value)),
6435 TYPE_SIZE (elttype)));
6436
6437 count += n_elts_here;
6438 if (mostly_zeros_p (value))
6439 zero_count += n_elts_here;
6440 }
6441
6442 /* Clear the entire vector first if there are any missing elements,
6443 or if the incidence of zero elements is >= 75%. */
6444 need_to_clear = (count < n_elts || 4 * zero_count >= 3 * count);
6445 }
6446
6447 if (need_to_clear && size > 0 && !vector)
6448 {
6449 if (REG_P (target))
6450 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
6451 else
6452 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
6453 cleared = 1;
6454 }
6455
6456 /* Inform later passes that the old value is dead. */
6457 if (!cleared && !vector && REG_P (target))
6458 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
6459
6460 if (MEM_P (target))
6461 alias = MEM_ALIAS_SET (target);
6462 else
6463 alias = get_alias_set (elttype);
6464
6465 /* Store each element of the constructor into the corresponding
6466 element of TARGET, determined by counting the elements. */
6467 for (idx = 0, i = 0;
6468 vec_safe_iterate (CONSTRUCTOR_ELTS (exp), idx, &ce);
6469 idx++, i += bitsize / elt_size)
6470 {
6471 HOST_WIDE_INT eltpos;
6472 tree value = ce->value;
6473
6474 bitsize = tree_to_uhwi (TYPE_SIZE (TREE_TYPE (value)));
6475 if (cleared && initializer_zerop (value))
6476 continue;
6477
6478 if (ce->index)
6479 eltpos = tree_to_uhwi (ce->index);
6480 else
6481 eltpos = i;
6482
6483 if (vector)
6484 {
6485 /* vec_init<mode> should not be used if there are VECTOR_TYPE
6486 elements. */
6487 gcc_assert (TREE_CODE (TREE_TYPE (value)) != VECTOR_TYPE);
6488 RTVEC_ELT (vector, eltpos)
6489 = expand_normal (value);
6490 }
6491 else
6492 {
6493 machine_mode value_mode =
6494 TREE_CODE (TREE_TYPE (value)) == VECTOR_TYPE
6495 ? TYPE_MODE (TREE_TYPE (value))
6496 : eltmode;
6497 bitpos = eltpos * elt_size;
6498 store_constructor_field (target, bitsize, bitpos, value_mode,
6499 value, cleared, alias);
6500 }
6501 }
6502
6503 if (vector)
6504 emit_insn (GEN_FCN (icode)
6505 (target,
6506 gen_rtx_PARALLEL (GET_MODE (target), vector)));
6507 break;
6508 }
6509
6510 default:
6511 gcc_unreachable ();
6512 }
6513 }
6514
6515 /* Store the value of EXP (an expression tree)
6516 into a subfield of TARGET which has mode MODE and occupies
6517 BITSIZE bits, starting BITPOS bits from the start of TARGET.
6518 If MODE is VOIDmode, it means that we are storing into a bit-field.
6519
6520 BITREGION_START is bitpos of the first bitfield in this region.
6521 BITREGION_END is the bitpos of the ending bitfield in this region.
6522 These two fields are 0, if the C++ memory model does not apply,
6523 or we are not interested in keeping track of bitfield regions.
6524
6525 Always return const0_rtx unless we have something particular to
6526 return.
6527
6528 ALIAS_SET is the alias set for the destination. This value will
6529 (in general) be different from that for TARGET, since TARGET is a
6530 reference to the containing structure.
6531
6532 If NONTEMPORAL is true, try generating a nontemporal store. */
6533
6534 static rtx
6535 store_field (rtx target, HOST_WIDE_INT bitsize, HOST_WIDE_INT bitpos,
6536 unsigned HOST_WIDE_INT bitregion_start,
6537 unsigned HOST_WIDE_INT bitregion_end,
6538 machine_mode mode, tree exp,
6539 alias_set_type alias_set, bool nontemporal)
6540 {
6541 if (TREE_CODE (exp) == ERROR_MARK)
6542 return const0_rtx;
6543
6544 /* If we have nothing to store, do nothing unless the expression has
6545 side-effects. */
6546 if (bitsize == 0)
6547 return expand_expr (exp, const0_rtx, VOIDmode, EXPAND_NORMAL);
6548
6549 if (GET_CODE (target) == CONCAT)
6550 {
6551 /* We're storing into a struct containing a single __complex. */
6552
6553 gcc_assert (!bitpos);
6554 return store_expr (exp, target, 0, nontemporal);
6555 }
6556
6557 /* If the structure is in a register or if the component
6558 is a bit field, we cannot use addressing to access it.
6559 Use bit-field techniques or SUBREG to store in it. */
6560
6561 if (mode == VOIDmode
6562 || (mode != BLKmode && ! direct_store[(int) mode]
6563 && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
6564 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT)
6565 || REG_P (target)
6566 || GET_CODE (target) == SUBREG
6567 /* If the field isn't aligned enough to store as an ordinary memref,
6568 store it as a bit field. */
6569 || (mode != BLKmode
6570 && ((((MEM_ALIGN (target) < GET_MODE_ALIGNMENT (mode))
6571 || bitpos % GET_MODE_ALIGNMENT (mode))
6572 && SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (target)))
6573 || (bitpos % BITS_PER_UNIT != 0)))
6574 || (bitsize >= 0 && mode != BLKmode
6575 && GET_MODE_BITSIZE (mode) > bitsize)
6576 /* If the RHS and field are a constant size and the size of the
6577 RHS isn't the same size as the bitfield, we must use bitfield
6578 operations. */
6579 || (bitsize >= 0
6580 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
6581 && compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)), bitsize) != 0)
6582 /* If we are expanding a MEM_REF of a non-BLKmode non-addressable
6583 decl we must use bitfield operations. */
6584 || (bitsize >= 0
6585 && TREE_CODE (exp) == MEM_REF
6586 && TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR
6587 && DECL_P (TREE_OPERAND (TREE_OPERAND (exp, 0), 0))
6588 && !TREE_ADDRESSABLE (TREE_OPERAND (TREE_OPERAND (exp, 0),0 ))
6589 && DECL_MODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0)) != BLKmode))
6590 {
6591 rtx temp;
6592 gimple nop_def;
6593
6594 /* If EXP is a NOP_EXPR of precision less than its mode, then that
6595 implies a mask operation. If the precision is the same size as
6596 the field we're storing into, that mask is redundant. This is
6597 particularly common with bit field assignments generated by the
6598 C front end. */
6599 nop_def = get_def_for_expr (exp, NOP_EXPR);
6600 if (nop_def)
6601 {
6602 tree type = TREE_TYPE (exp);
6603 if (INTEGRAL_TYPE_P (type)
6604 && TYPE_PRECISION (type) < GET_MODE_BITSIZE (TYPE_MODE (type))
6605 && bitsize == TYPE_PRECISION (type))
6606 {
6607 tree op = gimple_assign_rhs1 (nop_def);
6608 type = TREE_TYPE (op);
6609 if (INTEGRAL_TYPE_P (type) && TYPE_PRECISION (type) >= bitsize)
6610 exp = op;
6611 }
6612 }
6613
6614 temp = expand_normal (exp);
6615
6616 /* If BITSIZE is narrower than the size of the type of EXP
6617 we will be narrowing TEMP. Normally, what's wanted are the
6618 low-order bits. However, if EXP's type is a record and this is
6619 big-endian machine, we want the upper BITSIZE bits. */
6620 if (BYTES_BIG_ENDIAN && GET_MODE_CLASS (GET_MODE (temp)) == MODE_INT
6621 && bitsize < (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (temp))
6622 && TREE_CODE (TREE_TYPE (exp)) == RECORD_TYPE)
6623 temp = expand_shift (RSHIFT_EXPR, GET_MODE (temp), temp,
6624 GET_MODE_BITSIZE (GET_MODE (temp)) - bitsize,
6625 NULL_RTX, 1);
6626
6627 /* Unless MODE is VOIDmode or BLKmode, convert TEMP to MODE. */
6628 if (mode != VOIDmode && mode != BLKmode
6629 && mode != TYPE_MODE (TREE_TYPE (exp)))
6630 temp = convert_modes (mode, TYPE_MODE (TREE_TYPE (exp)), temp, 1);
6631
6632 /* If TEMP is not a PARALLEL (see below) and its mode and that of TARGET
6633 are both BLKmode, both must be in memory and BITPOS must be aligned
6634 on a byte boundary. If so, we simply do a block copy. Likewise for
6635 a BLKmode-like TARGET. */
6636 if (GET_CODE (temp) != PARALLEL
6637 && GET_MODE (temp) == BLKmode
6638 && (GET_MODE (target) == BLKmode
6639 || (MEM_P (target)
6640 && GET_MODE_CLASS (GET_MODE (target)) == MODE_INT
6641 && (bitpos % BITS_PER_UNIT) == 0
6642 && (bitsize % BITS_PER_UNIT) == 0)))
6643 {
6644 gcc_assert (MEM_P (target) && MEM_P (temp)
6645 && (bitpos % BITS_PER_UNIT) == 0);
6646
6647 target = adjust_address (target, VOIDmode, bitpos / BITS_PER_UNIT);
6648 emit_block_move (target, temp,
6649 GEN_INT ((bitsize + BITS_PER_UNIT - 1)
6650 / BITS_PER_UNIT),
6651 BLOCK_OP_NORMAL);
6652
6653 return const0_rtx;
6654 }
6655
6656 /* Handle calls that return values in multiple non-contiguous locations.
6657 The Irix 6 ABI has examples of this. */
6658 if (GET_CODE (temp) == PARALLEL)
6659 {
6660 HOST_WIDE_INT size = int_size_in_bytes (TREE_TYPE (exp));
6661 rtx temp_target;
6662 if (mode == BLKmode || mode == VOIDmode)
6663 mode = smallest_mode_for_size (size * BITS_PER_UNIT, MODE_INT);
6664 temp_target = gen_reg_rtx (mode);
6665 emit_group_store (temp_target, temp, TREE_TYPE (exp), size);
6666 temp = temp_target;
6667 }
6668 else if (mode == BLKmode)
6669 {
6670 /* Handle calls that return BLKmode values in registers. */
6671 if (REG_P (temp) && TREE_CODE (exp) == CALL_EXPR)
6672 {
6673 rtx temp_target = gen_reg_rtx (GET_MODE (temp));
6674 copy_blkmode_from_reg (temp_target, temp, TREE_TYPE (exp));
6675 temp = temp_target;
6676 }
6677 else
6678 {
6679 HOST_WIDE_INT size = int_size_in_bytes (TREE_TYPE (exp));
6680 rtx temp_target;
6681 mode = smallest_mode_for_size (size * BITS_PER_UNIT, MODE_INT);
6682 temp_target = gen_reg_rtx (mode);
6683 temp_target
6684 = extract_bit_field (temp, size * BITS_PER_UNIT, 0, 1,
6685 temp_target, mode, mode);
6686 temp = temp_target;
6687 }
6688 }
6689
6690 /* Store the value in the bitfield. */
6691 store_bit_field (target, bitsize, bitpos,
6692 bitregion_start, bitregion_end,
6693 mode, temp);
6694
6695 return const0_rtx;
6696 }
6697 else
6698 {
6699 /* Now build a reference to just the desired component. */
6700 rtx to_rtx = adjust_address (target, mode, bitpos / BITS_PER_UNIT);
6701
6702 if (to_rtx == target)
6703 to_rtx = copy_rtx (to_rtx);
6704
6705 if (!MEM_KEEP_ALIAS_SET_P (to_rtx) && MEM_ALIAS_SET (to_rtx) != 0)
6706 set_mem_alias_set (to_rtx, alias_set);
6707
6708 return store_expr (exp, to_rtx, 0, nontemporal);
6709 }
6710 }
6711 \f
6712 /* Given an expression EXP that may be a COMPONENT_REF, a BIT_FIELD_REF,
6713 an ARRAY_REF, or an ARRAY_RANGE_REF, look for nested operations of these
6714 codes and find the ultimate containing object, which we return.
6715
6716 We set *PBITSIZE to the size in bits that we want, *PBITPOS to the
6717 bit position, and *PUNSIGNEDP to the signedness of the field.
6718 If the position of the field is variable, we store a tree
6719 giving the variable offset (in units) in *POFFSET.
6720 This offset is in addition to the bit position.
6721 If the position is not variable, we store 0 in *POFFSET.
6722
6723 If any of the extraction expressions is volatile,
6724 we store 1 in *PVOLATILEP. Otherwise we don't change that.
6725
6726 If the field is a non-BLKmode bit-field, *PMODE is set to VOIDmode.
6727 Otherwise, it is a mode that can be used to access the field.
6728
6729 If the field describes a variable-sized object, *PMODE is set to
6730 BLKmode and *PBITSIZE is set to -1. An access cannot be made in
6731 this case, but the address of the object can be found.
6732
6733 If KEEP_ALIGNING is true and the target is STRICT_ALIGNMENT, we don't
6734 look through nodes that serve as markers of a greater alignment than
6735 the one that can be deduced from the expression. These nodes make it
6736 possible for front-ends to prevent temporaries from being created by
6737 the middle-end on alignment considerations. For that purpose, the
6738 normal operating mode at high-level is to always pass FALSE so that
6739 the ultimate containing object is really returned; moreover, the
6740 associated predicate handled_component_p will always return TRUE
6741 on these nodes, thus indicating that they are essentially handled
6742 by get_inner_reference. TRUE should only be passed when the caller
6743 is scanning the expression in order to build another representation
6744 and specifically knows how to handle these nodes; as such, this is
6745 the normal operating mode in the RTL expanders. */
6746
6747 tree
6748 get_inner_reference (tree exp, HOST_WIDE_INT *pbitsize,
6749 HOST_WIDE_INT *pbitpos, tree *poffset,
6750 machine_mode *pmode, int *punsignedp,
6751 int *pvolatilep, bool keep_aligning)
6752 {
6753 tree size_tree = 0;
6754 machine_mode mode = VOIDmode;
6755 bool blkmode_bitfield = false;
6756 tree offset = size_zero_node;
6757 offset_int bit_offset = 0;
6758
6759 /* First get the mode, signedness, and size. We do this from just the
6760 outermost expression. */
6761 *pbitsize = -1;
6762 if (TREE_CODE (exp) == COMPONENT_REF)
6763 {
6764 tree field = TREE_OPERAND (exp, 1);
6765 size_tree = DECL_SIZE (field);
6766 if (flag_strict_volatile_bitfields > 0
6767 && TREE_THIS_VOLATILE (exp)
6768 && DECL_BIT_FIELD_TYPE (field)
6769 && DECL_MODE (field) != BLKmode)
6770 /* Volatile bitfields should be accessed in the mode of the
6771 field's type, not the mode computed based on the bit
6772 size. */
6773 mode = TYPE_MODE (DECL_BIT_FIELD_TYPE (field));
6774 else if (!DECL_BIT_FIELD (field))
6775 mode = DECL_MODE (field);
6776 else if (DECL_MODE (field) == BLKmode)
6777 blkmode_bitfield = true;
6778
6779 *punsignedp = DECL_UNSIGNED (field);
6780 }
6781 else if (TREE_CODE (exp) == BIT_FIELD_REF)
6782 {
6783 size_tree = TREE_OPERAND (exp, 1);
6784 *punsignedp = (! INTEGRAL_TYPE_P (TREE_TYPE (exp))
6785 || TYPE_UNSIGNED (TREE_TYPE (exp)));
6786
6787 /* For vector types, with the correct size of access, use the mode of
6788 inner type. */
6789 if (TREE_CODE (TREE_TYPE (TREE_OPERAND (exp, 0))) == VECTOR_TYPE
6790 && TREE_TYPE (exp) == TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0)))
6791 && tree_int_cst_equal (size_tree, TYPE_SIZE (TREE_TYPE (exp))))
6792 mode = TYPE_MODE (TREE_TYPE (exp));
6793 }
6794 else
6795 {
6796 mode = TYPE_MODE (TREE_TYPE (exp));
6797 *punsignedp = TYPE_UNSIGNED (TREE_TYPE (exp));
6798
6799 if (mode == BLKmode)
6800 size_tree = TYPE_SIZE (TREE_TYPE (exp));
6801 else
6802 *pbitsize = GET_MODE_BITSIZE (mode);
6803 }
6804
6805 if (size_tree != 0)
6806 {
6807 if (! tree_fits_uhwi_p (size_tree))
6808 mode = BLKmode, *pbitsize = -1;
6809 else
6810 *pbitsize = tree_to_uhwi (size_tree);
6811 }
6812
6813 /* Compute cumulative bit-offset for nested component-refs and array-refs,
6814 and find the ultimate containing object. */
6815 while (1)
6816 {
6817 switch (TREE_CODE (exp))
6818 {
6819 case BIT_FIELD_REF:
6820 bit_offset += wi::to_offset (TREE_OPERAND (exp, 2));
6821 break;
6822
6823 case COMPONENT_REF:
6824 {
6825 tree field = TREE_OPERAND (exp, 1);
6826 tree this_offset = component_ref_field_offset (exp);
6827
6828 /* If this field hasn't been filled in yet, don't go past it.
6829 This should only happen when folding expressions made during
6830 type construction. */
6831 if (this_offset == 0)
6832 break;
6833
6834 offset = size_binop (PLUS_EXPR, offset, this_offset);
6835 bit_offset += wi::to_offset (DECL_FIELD_BIT_OFFSET (field));
6836
6837 /* ??? Right now we don't do anything with DECL_OFFSET_ALIGN. */
6838 }
6839 break;
6840
6841 case ARRAY_REF:
6842 case ARRAY_RANGE_REF:
6843 {
6844 tree index = TREE_OPERAND (exp, 1);
6845 tree low_bound = array_ref_low_bound (exp);
6846 tree unit_size = array_ref_element_size (exp);
6847
6848 /* We assume all arrays have sizes that are a multiple of a byte.
6849 First subtract the lower bound, if any, in the type of the
6850 index, then convert to sizetype and multiply by the size of
6851 the array element. */
6852 if (! integer_zerop (low_bound))
6853 index = fold_build2 (MINUS_EXPR, TREE_TYPE (index),
6854 index, low_bound);
6855
6856 offset = size_binop (PLUS_EXPR, offset,
6857 size_binop (MULT_EXPR,
6858 fold_convert (sizetype, index),
6859 unit_size));
6860 }
6861 break;
6862
6863 case REALPART_EXPR:
6864 break;
6865
6866 case IMAGPART_EXPR:
6867 bit_offset += *pbitsize;
6868 break;
6869
6870 case VIEW_CONVERT_EXPR:
6871 if (keep_aligning && STRICT_ALIGNMENT
6872 && (TYPE_ALIGN (TREE_TYPE (exp))
6873 > TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (exp, 0))))
6874 && (TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (exp, 0)))
6875 < BIGGEST_ALIGNMENT)
6876 && (TYPE_ALIGN_OK (TREE_TYPE (exp))
6877 || TYPE_ALIGN_OK (TREE_TYPE (TREE_OPERAND (exp, 0)))))
6878 goto done;
6879 break;
6880
6881 case MEM_REF:
6882 /* Hand back the decl for MEM[&decl, off]. */
6883 if (TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR)
6884 {
6885 tree off = TREE_OPERAND (exp, 1);
6886 if (!integer_zerop (off))
6887 {
6888 offset_int boff, coff = mem_ref_offset (exp);
6889 boff = wi::lshift (coff, LOG2_BITS_PER_UNIT);
6890 bit_offset += boff;
6891 }
6892 exp = TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
6893 }
6894 goto done;
6895
6896 default:
6897 goto done;
6898 }
6899
6900 /* If any reference in the chain is volatile, the effect is volatile. */
6901 if (TREE_THIS_VOLATILE (exp))
6902 *pvolatilep = 1;
6903
6904 exp = TREE_OPERAND (exp, 0);
6905 }
6906 done:
6907
6908 /* If OFFSET is constant, see if we can return the whole thing as a
6909 constant bit position. Make sure to handle overflow during
6910 this conversion. */
6911 if (TREE_CODE (offset) == INTEGER_CST)
6912 {
6913 offset_int tem = wi::sext (wi::to_offset (offset),
6914 TYPE_PRECISION (sizetype));
6915 tem = wi::lshift (tem, LOG2_BITS_PER_UNIT);
6916 tem += bit_offset;
6917 if (wi::fits_shwi_p (tem))
6918 {
6919 *pbitpos = tem.to_shwi ();
6920 *poffset = offset = NULL_TREE;
6921 }
6922 }
6923
6924 /* Otherwise, split it up. */
6925 if (offset)
6926 {
6927 /* Avoid returning a negative bitpos as this may wreak havoc later. */
6928 if (wi::neg_p (bit_offset) || !wi::fits_shwi_p (bit_offset))
6929 {
6930 offset_int mask = wi::mask <offset_int> (LOG2_BITS_PER_UNIT, false);
6931 offset_int tem = bit_offset.and_not (mask);
6932 /* TEM is the bitpos rounded to BITS_PER_UNIT towards -Inf.
6933 Subtract it to BIT_OFFSET and add it (scaled) to OFFSET. */
6934 bit_offset -= tem;
6935 tem = wi::arshift (tem, LOG2_BITS_PER_UNIT);
6936 offset = size_binop (PLUS_EXPR, offset,
6937 wide_int_to_tree (sizetype, tem));
6938 }
6939
6940 *pbitpos = bit_offset.to_shwi ();
6941 *poffset = offset;
6942 }
6943
6944 /* We can use BLKmode for a byte-aligned BLKmode bitfield. */
6945 if (mode == VOIDmode
6946 && blkmode_bitfield
6947 && (*pbitpos % BITS_PER_UNIT) == 0
6948 && (*pbitsize % BITS_PER_UNIT) == 0)
6949 *pmode = BLKmode;
6950 else
6951 *pmode = mode;
6952
6953 return exp;
6954 }
6955
6956 /* Return a tree of sizetype representing the size, in bytes, of the element
6957 of EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6958
6959 tree
6960 array_ref_element_size (tree exp)
6961 {
6962 tree aligned_size = TREE_OPERAND (exp, 3);
6963 tree elmt_type = TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0)));
6964 location_t loc = EXPR_LOCATION (exp);
6965
6966 /* If a size was specified in the ARRAY_REF, it's the size measured
6967 in alignment units of the element type. So multiply by that value. */
6968 if (aligned_size)
6969 {
6970 /* ??? tree_ssa_useless_type_conversion will eliminate casts to
6971 sizetype from another type of the same width and signedness. */
6972 if (TREE_TYPE (aligned_size) != sizetype)
6973 aligned_size = fold_convert_loc (loc, sizetype, aligned_size);
6974 return size_binop_loc (loc, MULT_EXPR, aligned_size,
6975 size_int (TYPE_ALIGN_UNIT (elmt_type)));
6976 }
6977
6978 /* Otherwise, take the size from that of the element type. Substitute
6979 any PLACEHOLDER_EXPR that we have. */
6980 else
6981 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_SIZE_UNIT (elmt_type), exp);
6982 }
6983
6984 /* Return a tree representing the lower bound of the array mentioned in
6985 EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6986
6987 tree
6988 array_ref_low_bound (tree exp)
6989 {
6990 tree domain_type = TYPE_DOMAIN (TREE_TYPE (TREE_OPERAND (exp, 0)));
6991
6992 /* If a lower bound is specified in EXP, use it. */
6993 if (TREE_OPERAND (exp, 2))
6994 return TREE_OPERAND (exp, 2);
6995
6996 /* Otherwise, if there is a domain type and it has a lower bound, use it,
6997 substituting for a PLACEHOLDER_EXPR as needed. */
6998 if (domain_type && TYPE_MIN_VALUE (domain_type))
6999 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_MIN_VALUE (domain_type), exp);
7000
7001 /* Otherwise, return a zero of the appropriate type. */
7002 return build_int_cst (TREE_TYPE (TREE_OPERAND (exp, 1)), 0);
7003 }
7004
7005 /* Returns true if REF is an array reference to an array at the end of
7006 a structure. If this is the case, the array may be allocated larger
7007 than its upper bound implies. */
7008
7009 bool
7010 array_at_struct_end_p (tree ref)
7011 {
7012 if (TREE_CODE (ref) != ARRAY_REF
7013 && TREE_CODE (ref) != ARRAY_RANGE_REF)
7014 return false;
7015
7016 while (handled_component_p (ref))
7017 {
7018 /* If the reference chain contains a component reference to a
7019 non-union type and there follows another field the reference
7020 is not at the end of a structure. */
7021 if (TREE_CODE (ref) == COMPONENT_REF
7022 && TREE_CODE (TREE_TYPE (TREE_OPERAND (ref, 0))) == RECORD_TYPE)
7023 {
7024 tree nextf = DECL_CHAIN (TREE_OPERAND (ref, 1));
7025 while (nextf && TREE_CODE (nextf) != FIELD_DECL)
7026 nextf = DECL_CHAIN (nextf);
7027 if (nextf)
7028 return false;
7029 }
7030
7031 ref = TREE_OPERAND (ref, 0);
7032 }
7033
7034 /* If the reference is based on a declared entity, the size of the array
7035 is constrained by its given domain. */
7036 if (DECL_P (ref))
7037 return false;
7038
7039 return true;
7040 }
7041
7042 /* Return a tree representing the upper bound of the array mentioned in
7043 EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
7044
7045 tree
7046 array_ref_up_bound (tree exp)
7047 {
7048 tree domain_type = TYPE_DOMAIN (TREE_TYPE (TREE_OPERAND (exp, 0)));
7049
7050 /* If there is a domain type and it has an upper bound, use it, substituting
7051 for a PLACEHOLDER_EXPR as needed. */
7052 if (domain_type && TYPE_MAX_VALUE (domain_type))
7053 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_MAX_VALUE (domain_type), exp);
7054
7055 /* Otherwise fail. */
7056 return NULL_TREE;
7057 }
7058
7059 /* Return a tree representing the offset, in bytes, of the field referenced
7060 by EXP. This does not include any offset in DECL_FIELD_BIT_OFFSET. */
7061
7062 tree
7063 component_ref_field_offset (tree exp)
7064 {
7065 tree aligned_offset = TREE_OPERAND (exp, 2);
7066 tree field = TREE_OPERAND (exp, 1);
7067 location_t loc = EXPR_LOCATION (exp);
7068
7069 /* If an offset was specified in the COMPONENT_REF, it's the offset measured
7070 in units of DECL_OFFSET_ALIGN / BITS_PER_UNIT. So multiply by that
7071 value. */
7072 if (aligned_offset)
7073 {
7074 /* ??? tree_ssa_useless_type_conversion will eliminate casts to
7075 sizetype from another type of the same width and signedness. */
7076 if (TREE_TYPE (aligned_offset) != sizetype)
7077 aligned_offset = fold_convert_loc (loc, sizetype, aligned_offset);
7078 return size_binop_loc (loc, MULT_EXPR, aligned_offset,
7079 size_int (DECL_OFFSET_ALIGN (field)
7080 / BITS_PER_UNIT));
7081 }
7082
7083 /* Otherwise, take the offset from that of the field. Substitute
7084 any PLACEHOLDER_EXPR that we have. */
7085 else
7086 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (DECL_FIELD_OFFSET (field), exp);
7087 }
7088
7089 /* Alignment in bits the TARGET of an assignment may be assumed to have. */
7090
7091 static unsigned HOST_WIDE_INT
7092 target_align (const_tree target)
7093 {
7094 /* We might have a chain of nested references with intermediate misaligning
7095 bitfields components, so need to recurse to find out. */
7096
7097 unsigned HOST_WIDE_INT this_align, outer_align;
7098
7099 switch (TREE_CODE (target))
7100 {
7101 case BIT_FIELD_REF:
7102 return 1;
7103
7104 case COMPONENT_REF:
7105 this_align = DECL_ALIGN (TREE_OPERAND (target, 1));
7106 outer_align = target_align (TREE_OPERAND (target, 0));
7107 return MIN (this_align, outer_align);
7108
7109 case ARRAY_REF:
7110 case ARRAY_RANGE_REF:
7111 this_align = TYPE_ALIGN (TREE_TYPE (target));
7112 outer_align = target_align (TREE_OPERAND (target, 0));
7113 return MIN (this_align, outer_align);
7114
7115 CASE_CONVERT:
7116 case NON_LVALUE_EXPR:
7117 case VIEW_CONVERT_EXPR:
7118 this_align = TYPE_ALIGN (TREE_TYPE (target));
7119 outer_align = target_align (TREE_OPERAND (target, 0));
7120 return MAX (this_align, outer_align);
7121
7122 default:
7123 return TYPE_ALIGN (TREE_TYPE (target));
7124 }
7125 }
7126
7127 \f
7128 /* Given an rtx VALUE that may contain additions and multiplications, return
7129 an equivalent value that just refers to a register, memory, or constant.
7130 This is done by generating instructions to perform the arithmetic and
7131 returning a pseudo-register containing the value.
7132
7133 The returned value may be a REG, SUBREG, MEM or constant. */
7134
7135 rtx
7136 force_operand (rtx value, rtx target)
7137 {
7138 rtx op1, op2;
7139 /* Use subtarget as the target for operand 0 of a binary operation. */
7140 rtx subtarget = get_subtarget (target);
7141 enum rtx_code code = GET_CODE (value);
7142
7143 /* Check for subreg applied to an expression produced by loop optimizer. */
7144 if (code == SUBREG
7145 && !REG_P (SUBREG_REG (value))
7146 && !MEM_P (SUBREG_REG (value)))
7147 {
7148 value
7149 = simplify_gen_subreg (GET_MODE (value),
7150 force_reg (GET_MODE (SUBREG_REG (value)),
7151 force_operand (SUBREG_REG (value),
7152 NULL_RTX)),
7153 GET_MODE (SUBREG_REG (value)),
7154 SUBREG_BYTE (value));
7155 code = GET_CODE (value);
7156 }
7157
7158 /* Check for a PIC address load. */
7159 if ((code == PLUS || code == MINUS)
7160 && XEXP (value, 0) == pic_offset_table_rtx
7161 && (GET_CODE (XEXP (value, 1)) == SYMBOL_REF
7162 || GET_CODE (XEXP (value, 1)) == LABEL_REF
7163 || GET_CODE (XEXP (value, 1)) == CONST))
7164 {
7165 if (!subtarget)
7166 subtarget = gen_reg_rtx (GET_MODE (value));
7167 emit_move_insn (subtarget, value);
7168 return subtarget;
7169 }
7170
7171 if (ARITHMETIC_P (value))
7172 {
7173 op2 = XEXP (value, 1);
7174 if (!CONSTANT_P (op2) && !(REG_P (op2) && op2 != subtarget))
7175 subtarget = 0;
7176 if (code == MINUS && CONST_INT_P (op2))
7177 {
7178 code = PLUS;
7179 op2 = negate_rtx (GET_MODE (value), op2);
7180 }
7181
7182 /* Check for an addition with OP2 a constant integer and our first
7183 operand a PLUS of a virtual register and something else. In that
7184 case, we want to emit the sum of the virtual register and the
7185 constant first and then add the other value. This allows virtual
7186 register instantiation to simply modify the constant rather than
7187 creating another one around this addition. */
7188 if (code == PLUS && CONST_INT_P (op2)
7189 && GET_CODE (XEXP (value, 0)) == PLUS
7190 && REG_P (XEXP (XEXP (value, 0), 0))
7191 && REGNO (XEXP (XEXP (value, 0), 0)) >= FIRST_VIRTUAL_REGISTER
7192 && REGNO (XEXP (XEXP (value, 0), 0)) <= LAST_VIRTUAL_REGISTER)
7193 {
7194 rtx temp = expand_simple_binop (GET_MODE (value), code,
7195 XEXP (XEXP (value, 0), 0), op2,
7196 subtarget, 0, OPTAB_LIB_WIDEN);
7197 return expand_simple_binop (GET_MODE (value), code, temp,
7198 force_operand (XEXP (XEXP (value,
7199 0), 1), 0),
7200 target, 0, OPTAB_LIB_WIDEN);
7201 }
7202
7203 op1 = force_operand (XEXP (value, 0), subtarget);
7204 op2 = force_operand (op2, NULL_RTX);
7205 switch (code)
7206 {
7207 case MULT:
7208 return expand_mult (GET_MODE (value), op1, op2, target, 1);
7209 case DIV:
7210 if (!INTEGRAL_MODE_P (GET_MODE (value)))
7211 return expand_simple_binop (GET_MODE (value), code, op1, op2,
7212 target, 1, OPTAB_LIB_WIDEN);
7213 else
7214 return expand_divmod (0,
7215 FLOAT_MODE_P (GET_MODE (value))
7216 ? RDIV_EXPR : TRUNC_DIV_EXPR,
7217 GET_MODE (value), op1, op2, target, 0);
7218 case MOD:
7219 return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2,
7220 target, 0);
7221 case UDIV:
7222 return expand_divmod (0, TRUNC_DIV_EXPR, GET_MODE (value), op1, op2,
7223 target, 1);
7224 case UMOD:
7225 return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2,
7226 target, 1);
7227 case ASHIFTRT:
7228 return expand_simple_binop (GET_MODE (value), code, op1, op2,
7229 target, 0, OPTAB_LIB_WIDEN);
7230 default:
7231 return expand_simple_binop (GET_MODE (value), code, op1, op2,
7232 target, 1, OPTAB_LIB_WIDEN);
7233 }
7234 }
7235 if (UNARY_P (value))
7236 {
7237 if (!target)
7238 target = gen_reg_rtx (GET_MODE (value));
7239 op1 = force_operand (XEXP (value, 0), NULL_RTX);
7240 switch (code)
7241 {
7242 case ZERO_EXTEND:
7243 case SIGN_EXTEND:
7244 case TRUNCATE:
7245 case FLOAT_EXTEND:
7246 case FLOAT_TRUNCATE:
7247 convert_move (target, op1, code == ZERO_EXTEND);
7248 return target;
7249
7250 case FIX:
7251 case UNSIGNED_FIX:
7252 expand_fix (target, op1, code == UNSIGNED_FIX);
7253 return target;
7254
7255 case FLOAT:
7256 case UNSIGNED_FLOAT:
7257 expand_float (target, op1, code == UNSIGNED_FLOAT);
7258 return target;
7259
7260 default:
7261 return expand_simple_unop (GET_MODE (value), code, op1, target, 0);
7262 }
7263 }
7264
7265 #ifdef INSN_SCHEDULING
7266 /* On machines that have insn scheduling, we want all memory reference to be
7267 explicit, so we need to deal with such paradoxical SUBREGs. */
7268 if (paradoxical_subreg_p (value) && MEM_P (SUBREG_REG (value)))
7269 value
7270 = simplify_gen_subreg (GET_MODE (value),
7271 force_reg (GET_MODE (SUBREG_REG (value)),
7272 force_operand (SUBREG_REG (value),
7273 NULL_RTX)),
7274 GET_MODE (SUBREG_REG (value)),
7275 SUBREG_BYTE (value));
7276 #endif
7277
7278 return value;
7279 }
7280 \f
7281 /* Subroutine of expand_expr: return nonzero iff there is no way that
7282 EXP can reference X, which is being modified. TOP_P is nonzero if this
7283 call is going to be used to determine whether we need a temporary
7284 for EXP, as opposed to a recursive call to this function.
7285
7286 It is always safe for this routine to return zero since it merely
7287 searches for optimization opportunities. */
7288
7289 int
7290 safe_from_p (const_rtx x, tree exp, int top_p)
7291 {
7292 rtx exp_rtl = 0;
7293 int i, nops;
7294
7295 if (x == 0
7296 /* If EXP has varying size, we MUST use a target since we currently
7297 have no way of allocating temporaries of variable size
7298 (except for arrays that have TYPE_ARRAY_MAX_SIZE set).
7299 So we assume here that something at a higher level has prevented a
7300 clash. This is somewhat bogus, but the best we can do. Only
7301 do this when X is BLKmode and when we are at the top level. */
7302 || (top_p && TREE_TYPE (exp) != 0 && COMPLETE_TYPE_P (TREE_TYPE (exp))
7303 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) != INTEGER_CST
7304 && (TREE_CODE (TREE_TYPE (exp)) != ARRAY_TYPE
7305 || TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp)) == NULL_TREE
7306 || TREE_CODE (TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp)))
7307 != INTEGER_CST)
7308 && GET_MODE (x) == BLKmode)
7309 /* If X is in the outgoing argument area, it is always safe. */
7310 || (MEM_P (x)
7311 && (XEXP (x, 0) == virtual_outgoing_args_rtx
7312 || (GET_CODE (XEXP (x, 0)) == PLUS
7313 && XEXP (XEXP (x, 0), 0) == virtual_outgoing_args_rtx))))
7314 return 1;
7315
7316 /* If this is a subreg of a hard register, declare it unsafe, otherwise,
7317 find the underlying pseudo. */
7318 if (GET_CODE (x) == SUBREG)
7319 {
7320 x = SUBREG_REG (x);
7321 if (REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
7322 return 0;
7323 }
7324
7325 /* Now look at our tree code and possibly recurse. */
7326 switch (TREE_CODE_CLASS (TREE_CODE (exp)))
7327 {
7328 case tcc_declaration:
7329 exp_rtl = DECL_RTL_IF_SET (exp);
7330 break;
7331
7332 case tcc_constant:
7333 return 1;
7334
7335 case tcc_exceptional:
7336 if (TREE_CODE (exp) == TREE_LIST)
7337 {
7338 while (1)
7339 {
7340 if (TREE_VALUE (exp) && !safe_from_p (x, TREE_VALUE (exp), 0))
7341 return 0;
7342 exp = TREE_CHAIN (exp);
7343 if (!exp)
7344 return 1;
7345 if (TREE_CODE (exp) != TREE_LIST)
7346 return safe_from_p (x, exp, 0);
7347 }
7348 }
7349 else if (TREE_CODE (exp) == CONSTRUCTOR)
7350 {
7351 constructor_elt *ce;
7352 unsigned HOST_WIDE_INT idx;
7353
7354 FOR_EACH_VEC_SAFE_ELT (CONSTRUCTOR_ELTS (exp), idx, ce)
7355 if ((ce->index != NULL_TREE && !safe_from_p (x, ce->index, 0))
7356 || !safe_from_p (x, ce->value, 0))
7357 return 0;
7358 return 1;
7359 }
7360 else if (TREE_CODE (exp) == ERROR_MARK)
7361 return 1; /* An already-visited SAVE_EXPR? */
7362 else
7363 return 0;
7364
7365 case tcc_statement:
7366 /* The only case we look at here is the DECL_INITIAL inside a
7367 DECL_EXPR. */
7368 return (TREE_CODE (exp) != DECL_EXPR
7369 || TREE_CODE (DECL_EXPR_DECL (exp)) != VAR_DECL
7370 || !DECL_INITIAL (DECL_EXPR_DECL (exp))
7371 || safe_from_p (x, DECL_INITIAL (DECL_EXPR_DECL (exp)), 0));
7372
7373 case tcc_binary:
7374 case tcc_comparison:
7375 if (!safe_from_p (x, TREE_OPERAND (exp, 1), 0))
7376 return 0;
7377 /* Fall through. */
7378
7379 case tcc_unary:
7380 return safe_from_p (x, TREE_OPERAND (exp, 0), 0);
7381
7382 case tcc_expression:
7383 case tcc_reference:
7384 case tcc_vl_exp:
7385 /* Now do code-specific tests. EXP_RTL is set to any rtx we find in
7386 the expression. If it is set, we conflict iff we are that rtx or
7387 both are in memory. Otherwise, we check all operands of the
7388 expression recursively. */
7389
7390 switch (TREE_CODE (exp))
7391 {
7392 case ADDR_EXPR:
7393 /* If the operand is static or we are static, we can't conflict.
7394 Likewise if we don't conflict with the operand at all. */
7395 if (staticp (TREE_OPERAND (exp, 0))
7396 || TREE_STATIC (exp)
7397 || safe_from_p (x, TREE_OPERAND (exp, 0), 0))
7398 return 1;
7399
7400 /* Otherwise, the only way this can conflict is if we are taking
7401 the address of a DECL a that address if part of X, which is
7402 very rare. */
7403 exp = TREE_OPERAND (exp, 0);
7404 if (DECL_P (exp))
7405 {
7406 if (!DECL_RTL_SET_P (exp)
7407 || !MEM_P (DECL_RTL (exp)))
7408 return 0;
7409 else
7410 exp_rtl = XEXP (DECL_RTL (exp), 0);
7411 }
7412 break;
7413
7414 case MEM_REF:
7415 if (MEM_P (x)
7416 && alias_sets_conflict_p (MEM_ALIAS_SET (x),
7417 get_alias_set (exp)))
7418 return 0;
7419 break;
7420
7421 case CALL_EXPR:
7422 /* Assume that the call will clobber all hard registers and
7423 all of memory. */
7424 if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
7425 || MEM_P (x))
7426 return 0;
7427 break;
7428
7429 case WITH_CLEANUP_EXPR:
7430 case CLEANUP_POINT_EXPR:
7431 /* Lowered by gimplify.c. */
7432 gcc_unreachable ();
7433
7434 case SAVE_EXPR:
7435 return safe_from_p (x, TREE_OPERAND (exp, 0), 0);
7436
7437 default:
7438 break;
7439 }
7440
7441 /* If we have an rtx, we do not need to scan our operands. */
7442 if (exp_rtl)
7443 break;
7444
7445 nops = TREE_OPERAND_LENGTH (exp);
7446 for (i = 0; i < nops; i++)
7447 if (TREE_OPERAND (exp, i) != 0
7448 && ! safe_from_p (x, TREE_OPERAND (exp, i), 0))
7449 return 0;
7450
7451 break;
7452
7453 case tcc_type:
7454 /* Should never get a type here. */
7455 gcc_unreachable ();
7456 }
7457
7458 /* If we have an rtl, find any enclosed object. Then see if we conflict
7459 with it. */
7460 if (exp_rtl)
7461 {
7462 if (GET_CODE (exp_rtl) == SUBREG)
7463 {
7464 exp_rtl = SUBREG_REG (exp_rtl);
7465 if (REG_P (exp_rtl)
7466 && REGNO (exp_rtl) < FIRST_PSEUDO_REGISTER)
7467 return 0;
7468 }
7469
7470 /* If the rtl is X, then it is not safe. Otherwise, it is unless both
7471 are memory and they conflict. */
7472 return ! (rtx_equal_p (x, exp_rtl)
7473 || (MEM_P (x) && MEM_P (exp_rtl)
7474 && true_dependence (exp_rtl, VOIDmode, x)));
7475 }
7476
7477 /* If we reach here, it is safe. */
7478 return 1;
7479 }
7480
7481 \f
7482 /* Return the highest power of two that EXP is known to be a multiple of.
7483 This is used in updating alignment of MEMs in array references. */
7484
7485 unsigned HOST_WIDE_INT
7486 highest_pow2_factor (const_tree exp)
7487 {
7488 unsigned HOST_WIDE_INT ret;
7489 int trailing_zeros = tree_ctz (exp);
7490 if (trailing_zeros >= HOST_BITS_PER_WIDE_INT)
7491 return BIGGEST_ALIGNMENT;
7492 ret = (unsigned HOST_WIDE_INT) 1 << trailing_zeros;
7493 if (ret > BIGGEST_ALIGNMENT)
7494 return BIGGEST_ALIGNMENT;
7495 return ret;
7496 }
7497
7498 /* Similar, except that the alignment requirements of TARGET are
7499 taken into account. Assume it is at least as aligned as its
7500 type, unless it is a COMPONENT_REF in which case the layout of
7501 the structure gives the alignment. */
7502
7503 static unsigned HOST_WIDE_INT
7504 highest_pow2_factor_for_target (const_tree target, const_tree exp)
7505 {
7506 unsigned HOST_WIDE_INT talign = target_align (target) / BITS_PER_UNIT;
7507 unsigned HOST_WIDE_INT factor = highest_pow2_factor (exp);
7508
7509 return MAX (factor, talign);
7510 }
7511 \f
7512 /* Convert the tree comparison code TCODE to the rtl one where the
7513 signedness is UNSIGNEDP. */
7514
7515 static enum rtx_code
7516 convert_tree_comp_to_rtx (enum tree_code tcode, int unsignedp)
7517 {
7518 enum rtx_code code;
7519 switch (tcode)
7520 {
7521 case EQ_EXPR:
7522 code = EQ;
7523 break;
7524 case NE_EXPR:
7525 code = NE;
7526 break;
7527 case LT_EXPR:
7528 code = unsignedp ? LTU : LT;
7529 break;
7530 case LE_EXPR:
7531 code = unsignedp ? LEU : LE;
7532 break;
7533 case GT_EXPR:
7534 code = unsignedp ? GTU : GT;
7535 break;
7536 case GE_EXPR:
7537 code = unsignedp ? GEU : GE;
7538 break;
7539 case UNORDERED_EXPR:
7540 code = UNORDERED;
7541 break;
7542 case ORDERED_EXPR:
7543 code = ORDERED;
7544 break;
7545 case UNLT_EXPR:
7546 code = UNLT;
7547 break;
7548 case UNLE_EXPR:
7549 code = UNLE;
7550 break;
7551 case UNGT_EXPR:
7552 code = UNGT;
7553 break;
7554 case UNGE_EXPR:
7555 code = UNGE;
7556 break;
7557 case UNEQ_EXPR:
7558 code = UNEQ;
7559 break;
7560 case LTGT_EXPR:
7561 code = LTGT;
7562 break;
7563
7564 default:
7565 gcc_unreachable ();
7566 }
7567 return code;
7568 }
7569
7570 /* Subroutine of expand_expr. Expand the two operands of a binary
7571 expression EXP0 and EXP1 placing the results in OP0 and OP1.
7572 The value may be stored in TARGET if TARGET is nonzero. The
7573 MODIFIER argument is as documented by expand_expr. */
7574
7575 void
7576 expand_operands (tree exp0, tree exp1, rtx target, rtx *op0, rtx *op1,
7577 enum expand_modifier modifier)
7578 {
7579 if (! safe_from_p (target, exp1, 1))
7580 target = 0;
7581 if (operand_equal_p (exp0, exp1, 0))
7582 {
7583 *op0 = expand_expr (exp0, target, VOIDmode, modifier);
7584 *op1 = copy_rtx (*op0);
7585 }
7586 else
7587 {
7588 /* If we need to preserve evaluation order, copy exp0 into its own
7589 temporary variable so that it can't be clobbered by exp1. */
7590 if (flag_evaluation_order && TREE_SIDE_EFFECTS (exp1))
7591 exp0 = save_expr (exp0);
7592 *op0 = expand_expr (exp0, target, VOIDmode, modifier);
7593 *op1 = expand_expr (exp1, NULL_RTX, VOIDmode, modifier);
7594 }
7595 }
7596
7597 \f
7598 /* Return a MEM that contains constant EXP. DEFER is as for
7599 output_constant_def and MODIFIER is as for expand_expr. */
7600
7601 static rtx
7602 expand_expr_constant (tree exp, int defer, enum expand_modifier modifier)
7603 {
7604 rtx mem;
7605
7606 mem = output_constant_def (exp, defer);
7607 if (modifier != EXPAND_INITIALIZER)
7608 mem = use_anchored_address (mem);
7609 return mem;
7610 }
7611
7612 /* A subroutine of expand_expr_addr_expr. Evaluate the address of EXP.
7613 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
7614
7615 static rtx
7616 expand_expr_addr_expr_1 (tree exp, rtx target, machine_mode tmode,
7617 enum expand_modifier modifier, addr_space_t as)
7618 {
7619 rtx result, subtarget;
7620 tree inner, offset;
7621 HOST_WIDE_INT bitsize, bitpos;
7622 int volatilep, unsignedp;
7623 machine_mode mode1;
7624
7625 /* If we are taking the address of a constant and are at the top level,
7626 we have to use output_constant_def since we can't call force_const_mem
7627 at top level. */
7628 /* ??? This should be considered a front-end bug. We should not be
7629 generating ADDR_EXPR of something that isn't an LVALUE. The only
7630 exception here is STRING_CST. */
7631 if (CONSTANT_CLASS_P (exp))
7632 {
7633 result = XEXP (expand_expr_constant (exp, 0, modifier), 0);
7634 if (modifier < EXPAND_SUM)
7635 result = force_operand (result, target);
7636 return result;
7637 }
7638
7639 /* Everything must be something allowed by is_gimple_addressable. */
7640 switch (TREE_CODE (exp))
7641 {
7642 case INDIRECT_REF:
7643 /* This case will happen via recursion for &a->b. */
7644 return expand_expr (TREE_OPERAND (exp, 0), target, tmode, modifier);
7645
7646 case MEM_REF:
7647 {
7648 tree tem = TREE_OPERAND (exp, 0);
7649 if (!integer_zerop (TREE_OPERAND (exp, 1)))
7650 tem = fold_build_pointer_plus (tem, TREE_OPERAND (exp, 1));
7651 return expand_expr (tem, target, tmode, modifier);
7652 }
7653
7654 case CONST_DECL:
7655 /* Expand the initializer like constants above. */
7656 result = XEXP (expand_expr_constant (DECL_INITIAL (exp),
7657 0, modifier), 0);
7658 if (modifier < EXPAND_SUM)
7659 result = force_operand (result, target);
7660 return result;
7661
7662 case REALPART_EXPR:
7663 /* The real part of the complex number is always first, therefore
7664 the address is the same as the address of the parent object. */
7665 offset = 0;
7666 bitpos = 0;
7667 inner = TREE_OPERAND (exp, 0);
7668 break;
7669
7670 case IMAGPART_EXPR:
7671 /* The imaginary part of the complex number is always second.
7672 The expression is therefore always offset by the size of the
7673 scalar type. */
7674 offset = 0;
7675 bitpos = GET_MODE_BITSIZE (TYPE_MODE (TREE_TYPE (exp)));
7676 inner = TREE_OPERAND (exp, 0);
7677 break;
7678
7679 case COMPOUND_LITERAL_EXPR:
7680 /* Allow COMPOUND_LITERAL_EXPR in initializers or coming from
7681 initializers, if e.g. rtl_for_decl_init is called on DECL_INITIAL
7682 with COMPOUND_LITERAL_EXPRs in it, or ARRAY_REF on a const static
7683 array with address of COMPOUND_LITERAL_EXPR in DECL_INITIAL;
7684 the initializers aren't gimplified. */
7685 if (COMPOUND_LITERAL_EXPR_DECL (exp)
7686 && TREE_STATIC (COMPOUND_LITERAL_EXPR_DECL (exp)))
7687 return expand_expr_addr_expr_1 (COMPOUND_LITERAL_EXPR_DECL (exp),
7688 target, tmode, modifier, as);
7689 /* FALLTHRU */
7690 default:
7691 /* If the object is a DECL, then expand it for its rtl. Don't bypass
7692 expand_expr, as that can have various side effects; LABEL_DECLs for
7693 example, may not have their DECL_RTL set yet. Expand the rtl of
7694 CONSTRUCTORs too, which should yield a memory reference for the
7695 constructor's contents. Assume language specific tree nodes can
7696 be expanded in some interesting way. */
7697 gcc_assert (TREE_CODE (exp) < LAST_AND_UNUSED_TREE_CODE);
7698 if (DECL_P (exp)
7699 || TREE_CODE (exp) == CONSTRUCTOR
7700 || TREE_CODE (exp) == COMPOUND_LITERAL_EXPR)
7701 {
7702 result = expand_expr (exp, target, tmode,
7703 modifier == EXPAND_INITIALIZER
7704 ? EXPAND_INITIALIZER : EXPAND_CONST_ADDRESS);
7705
7706 /* If the DECL isn't in memory, then the DECL wasn't properly
7707 marked TREE_ADDRESSABLE, which will be either a front-end
7708 or a tree optimizer bug. */
7709
7710 if (TREE_ADDRESSABLE (exp)
7711 && ! MEM_P (result)
7712 && ! targetm.calls.allocate_stack_slots_for_args ())
7713 {
7714 error ("local frame unavailable (naked function?)");
7715 return result;
7716 }
7717 else
7718 gcc_assert (MEM_P (result));
7719 result = XEXP (result, 0);
7720
7721 /* ??? Is this needed anymore? */
7722 if (DECL_P (exp))
7723 TREE_USED (exp) = 1;
7724
7725 if (modifier != EXPAND_INITIALIZER
7726 && modifier != EXPAND_CONST_ADDRESS
7727 && modifier != EXPAND_SUM)
7728 result = force_operand (result, target);
7729 return result;
7730 }
7731
7732 /* Pass FALSE as the last argument to get_inner_reference although
7733 we are expanding to RTL. The rationale is that we know how to
7734 handle "aligning nodes" here: we can just bypass them because
7735 they won't change the final object whose address will be returned
7736 (they actually exist only for that purpose). */
7737 inner = get_inner_reference (exp, &bitsize, &bitpos, &offset,
7738 &mode1, &unsignedp, &volatilep, false);
7739 break;
7740 }
7741
7742 /* We must have made progress. */
7743 gcc_assert (inner != exp);
7744
7745 subtarget = offset || bitpos ? NULL_RTX : target;
7746 /* For VIEW_CONVERT_EXPR, where the outer alignment is bigger than
7747 inner alignment, force the inner to be sufficiently aligned. */
7748 if (CONSTANT_CLASS_P (inner)
7749 && TYPE_ALIGN (TREE_TYPE (inner)) < TYPE_ALIGN (TREE_TYPE (exp)))
7750 {
7751 inner = copy_node (inner);
7752 TREE_TYPE (inner) = copy_node (TREE_TYPE (inner));
7753 TYPE_ALIGN (TREE_TYPE (inner)) = TYPE_ALIGN (TREE_TYPE (exp));
7754 TYPE_USER_ALIGN (TREE_TYPE (inner)) = 1;
7755 }
7756 result = expand_expr_addr_expr_1 (inner, subtarget, tmode, modifier, as);
7757
7758 if (offset)
7759 {
7760 rtx tmp;
7761
7762 if (modifier != EXPAND_NORMAL)
7763 result = force_operand (result, NULL);
7764 tmp = expand_expr (offset, NULL_RTX, tmode,
7765 modifier == EXPAND_INITIALIZER
7766 ? EXPAND_INITIALIZER : EXPAND_NORMAL);
7767
7768 /* expand_expr is allowed to return an object in a mode other
7769 than TMODE. If it did, we need to convert. */
7770 if (GET_MODE (tmp) != VOIDmode && tmode != GET_MODE (tmp))
7771 tmp = convert_modes (tmode, GET_MODE (tmp),
7772 tmp, TYPE_UNSIGNED (TREE_TYPE (offset)));
7773 result = convert_memory_address_addr_space (tmode, result, as);
7774 tmp = convert_memory_address_addr_space (tmode, tmp, as);
7775
7776 if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
7777 result = simplify_gen_binary (PLUS, tmode, result, tmp);
7778 else
7779 {
7780 subtarget = bitpos ? NULL_RTX : target;
7781 result = expand_simple_binop (tmode, PLUS, result, tmp, subtarget,
7782 1, OPTAB_LIB_WIDEN);
7783 }
7784 }
7785
7786 if (bitpos)
7787 {
7788 /* Someone beforehand should have rejected taking the address
7789 of such an object. */
7790 gcc_assert ((bitpos % BITS_PER_UNIT) == 0);
7791
7792 result = convert_memory_address_addr_space (tmode, result, as);
7793 result = plus_constant (tmode, result, bitpos / BITS_PER_UNIT);
7794 if (modifier < EXPAND_SUM)
7795 result = force_operand (result, target);
7796 }
7797
7798 return result;
7799 }
7800
7801 /* A subroutine of expand_expr. Evaluate EXP, which is an ADDR_EXPR.
7802 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
7803
7804 static rtx
7805 expand_expr_addr_expr (tree exp, rtx target, machine_mode tmode,
7806 enum expand_modifier modifier)
7807 {
7808 addr_space_t as = ADDR_SPACE_GENERIC;
7809 machine_mode address_mode = Pmode;
7810 machine_mode pointer_mode = ptr_mode;
7811 machine_mode rmode;
7812 rtx result;
7813
7814 /* Target mode of VOIDmode says "whatever's natural". */
7815 if (tmode == VOIDmode)
7816 tmode = TYPE_MODE (TREE_TYPE (exp));
7817
7818 if (POINTER_TYPE_P (TREE_TYPE (exp)))
7819 {
7820 as = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (exp)));
7821 address_mode = targetm.addr_space.address_mode (as);
7822 pointer_mode = targetm.addr_space.pointer_mode (as);
7823 }
7824
7825 /* We can get called with some Weird Things if the user does silliness
7826 like "(short) &a". In that case, convert_memory_address won't do
7827 the right thing, so ignore the given target mode. */
7828 if (tmode != address_mode && tmode != pointer_mode)
7829 tmode = address_mode;
7830
7831 result = expand_expr_addr_expr_1 (TREE_OPERAND (exp, 0), target,
7832 tmode, modifier, as);
7833
7834 /* Despite expand_expr claims concerning ignoring TMODE when not
7835 strictly convenient, stuff breaks if we don't honor it. Note
7836 that combined with the above, we only do this for pointer modes. */
7837 rmode = GET_MODE (result);
7838 if (rmode == VOIDmode)
7839 rmode = tmode;
7840 if (rmode != tmode)
7841 result = convert_memory_address_addr_space (tmode, result, as);
7842
7843 return result;
7844 }
7845
7846 /* Generate code for computing CONSTRUCTOR EXP.
7847 An rtx for the computed value is returned. If AVOID_TEMP_MEM
7848 is TRUE, instead of creating a temporary variable in memory
7849 NULL is returned and the caller needs to handle it differently. */
7850
7851 static rtx
7852 expand_constructor (tree exp, rtx target, enum expand_modifier modifier,
7853 bool avoid_temp_mem)
7854 {
7855 tree type = TREE_TYPE (exp);
7856 machine_mode mode = TYPE_MODE (type);
7857
7858 /* Try to avoid creating a temporary at all. This is possible
7859 if all of the initializer is zero.
7860 FIXME: try to handle all [0..255] initializers we can handle
7861 with memset. */
7862 if (TREE_STATIC (exp)
7863 && !TREE_ADDRESSABLE (exp)
7864 && target != 0 && mode == BLKmode
7865 && all_zeros_p (exp))
7866 {
7867 clear_storage (target, expr_size (exp), BLOCK_OP_NORMAL);
7868 return target;
7869 }
7870
7871 /* All elts simple constants => refer to a constant in memory. But
7872 if this is a non-BLKmode mode, let it store a field at a time
7873 since that should make a CONST_INT, CONST_WIDE_INT or
7874 CONST_DOUBLE when we fold. Likewise, if we have a target we can
7875 use, it is best to store directly into the target unless the type
7876 is large enough that memcpy will be used. If we are making an
7877 initializer and all operands are constant, put it in memory as
7878 well.
7879
7880 FIXME: Avoid trying to fill vector constructors piece-meal.
7881 Output them with output_constant_def below unless we're sure
7882 they're zeros. This should go away when vector initializers
7883 are treated like VECTOR_CST instead of arrays. */
7884 if ((TREE_STATIC (exp)
7885 && ((mode == BLKmode
7886 && ! (target != 0 && safe_from_p (target, exp, 1)))
7887 || TREE_ADDRESSABLE (exp)
7888 || (tree_fits_uhwi_p (TYPE_SIZE_UNIT (type))
7889 && (! can_move_by_pieces
7890 (tree_to_uhwi (TYPE_SIZE_UNIT (type)),
7891 TYPE_ALIGN (type)))
7892 && ! mostly_zeros_p (exp))))
7893 || ((modifier == EXPAND_INITIALIZER || modifier == EXPAND_CONST_ADDRESS)
7894 && TREE_CONSTANT (exp)))
7895 {
7896 rtx constructor;
7897
7898 if (avoid_temp_mem)
7899 return NULL_RTX;
7900
7901 constructor = expand_expr_constant (exp, 1, modifier);
7902
7903 if (modifier != EXPAND_CONST_ADDRESS
7904 && modifier != EXPAND_INITIALIZER
7905 && modifier != EXPAND_SUM)
7906 constructor = validize_mem (constructor);
7907
7908 return constructor;
7909 }
7910
7911 /* Handle calls that pass values in multiple non-contiguous
7912 locations. The Irix 6 ABI has examples of this. */
7913 if (target == 0 || ! safe_from_p (target, exp, 1)
7914 || GET_CODE (target) == PARALLEL || modifier == EXPAND_STACK_PARM)
7915 {
7916 if (avoid_temp_mem)
7917 return NULL_RTX;
7918
7919 target = assign_temp (type, TREE_ADDRESSABLE (exp), 1);
7920 }
7921
7922 store_constructor (exp, target, 0, int_expr_size (exp));
7923 return target;
7924 }
7925
7926
7927 /* expand_expr: generate code for computing expression EXP.
7928 An rtx for the computed value is returned. The value is never null.
7929 In the case of a void EXP, const0_rtx is returned.
7930
7931 The value may be stored in TARGET if TARGET is nonzero.
7932 TARGET is just a suggestion; callers must assume that
7933 the rtx returned may not be the same as TARGET.
7934
7935 If TARGET is CONST0_RTX, it means that the value will be ignored.
7936
7937 If TMODE is not VOIDmode, it suggests generating the
7938 result in mode TMODE. But this is done only when convenient.
7939 Otherwise, TMODE is ignored and the value generated in its natural mode.
7940 TMODE is just a suggestion; callers must assume that
7941 the rtx returned may not have mode TMODE.
7942
7943 Note that TARGET may have neither TMODE nor MODE. In that case, it
7944 probably will not be used.
7945
7946 If MODIFIER is EXPAND_SUM then when EXP is an addition
7947 we can return an rtx of the form (MULT (REG ...) (CONST_INT ...))
7948 or a nest of (PLUS ...) and (MINUS ...) where the terms are
7949 products as above, or REG or MEM, or constant.
7950 Ordinarily in such cases we would output mul or add instructions
7951 and then return a pseudo reg containing the sum.
7952
7953 EXPAND_INITIALIZER is much like EXPAND_SUM except that
7954 it also marks a label as absolutely required (it can't be dead).
7955 It also makes a ZERO_EXTEND or SIGN_EXTEND instead of emitting extend insns.
7956 This is used for outputting expressions used in initializers.
7957
7958 EXPAND_CONST_ADDRESS says that it is okay to return a MEM
7959 with a constant address even if that address is not normally legitimate.
7960 EXPAND_INITIALIZER and EXPAND_SUM also have this effect.
7961
7962 EXPAND_STACK_PARM is used when expanding to a TARGET on the stack for
7963 a call parameter. Such targets require special care as we haven't yet
7964 marked TARGET so that it's safe from being trashed by libcalls. We
7965 don't want to use TARGET for anything but the final result;
7966 Intermediate values must go elsewhere. Additionally, calls to
7967 emit_block_move will be flagged with BLOCK_OP_CALL_PARM.
7968
7969 If EXP is a VAR_DECL whose DECL_RTL was a MEM with an invalid
7970 address, and ALT_RTL is non-NULL, then *ALT_RTL is set to the
7971 DECL_RTL of the VAR_DECL. *ALT_RTL is also set if EXP is a
7972 COMPOUND_EXPR whose second argument is such a VAR_DECL, and so on
7973 recursively.
7974
7975 If INNER_REFERENCE_P is true, we are expanding an inner reference.
7976 In this case, we don't adjust a returned MEM rtx that wouldn't be
7977 sufficiently aligned for its mode; instead, it's up to the caller
7978 to deal with it afterwards. This is used to make sure that unaligned
7979 base objects for which out-of-bounds accesses are supported, for
7980 example record types with trailing arrays, aren't realigned behind
7981 the back of the caller.
7982 The normal operating mode is to pass FALSE for this parameter. */
7983
7984 rtx
7985 expand_expr_real (tree exp, rtx target, machine_mode tmode,
7986 enum expand_modifier modifier, rtx *alt_rtl,
7987 bool inner_reference_p)
7988 {
7989 rtx ret;
7990
7991 /* Handle ERROR_MARK before anybody tries to access its type. */
7992 if (TREE_CODE (exp) == ERROR_MARK
7993 || (TREE_CODE (TREE_TYPE (exp)) == ERROR_MARK))
7994 {
7995 ret = CONST0_RTX (tmode);
7996 return ret ? ret : const0_rtx;
7997 }
7998
7999 ret = expand_expr_real_1 (exp, target, tmode, modifier, alt_rtl,
8000 inner_reference_p);
8001 return ret;
8002 }
8003
8004 /* Try to expand the conditional expression which is represented by
8005 TREEOP0 ? TREEOP1 : TREEOP2 using conditonal moves. If succeseds
8006 return the rtl reg which repsents the result. Otherwise return
8007 NULL_RTL. */
8008
8009 static rtx
8010 expand_cond_expr_using_cmove (tree treeop0 ATTRIBUTE_UNUSED,
8011 tree treeop1 ATTRIBUTE_UNUSED,
8012 tree treeop2 ATTRIBUTE_UNUSED)
8013 {
8014 rtx insn;
8015 rtx op00, op01, op1, op2;
8016 enum rtx_code comparison_code;
8017 machine_mode comparison_mode;
8018 gimple srcstmt;
8019 rtx temp;
8020 tree type = TREE_TYPE (treeop1);
8021 int unsignedp = TYPE_UNSIGNED (type);
8022 machine_mode mode = TYPE_MODE (type);
8023 machine_mode orig_mode = mode;
8024
8025 /* If we cannot do a conditional move on the mode, try doing it
8026 with the promoted mode. */
8027 if (!can_conditionally_move_p (mode))
8028 {
8029 mode = promote_mode (type, mode, &unsignedp);
8030 if (!can_conditionally_move_p (mode))
8031 return NULL_RTX;
8032 temp = assign_temp (type, 0, 0); /* Use promoted mode for temp. */
8033 }
8034 else
8035 temp = assign_temp (type, 0, 1);
8036
8037 start_sequence ();
8038 expand_operands (treeop1, treeop2,
8039 temp, &op1, &op2, EXPAND_NORMAL);
8040
8041 if (TREE_CODE (treeop0) == SSA_NAME
8042 && (srcstmt = get_def_for_expr_class (treeop0, tcc_comparison)))
8043 {
8044 tree type = TREE_TYPE (gimple_assign_rhs1 (srcstmt));
8045 enum tree_code cmpcode = gimple_assign_rhs_code (srcstmt);
8046 op00 = expand_normal (gimple_assign_rhs1 (srcstmt));
8047 op01 = expand_normal (gimple_assign_rhs2 (srcstmt));
8048 comparison_mode = TYPE_MODE (type);
8049 unsignedp = TYPE_UNSIGNED (type);
8050 comparison_code = convert_tree_comp_to_rtx (cmpcode, unsignedp);
8051 }
8052 else if (COMPARISON_CLASS_P (treeop0))
8053 {
8054 tree type = TREE_TYPE (TREE_OPERAND (treeop0, 0));
8055 enum tree_code cmpcode = TREE_CODE (treeop0);
8056 op00 = expand_normal (TREE_OPERAND (treeop0, 0));
8057 op01 = expand_normal (TREE_OPERAND (treeop0, 1));
8058 unsignedp = TYPE_UNSIGNED (type);
8059 comparison_mode = TYPE_MODE (type);
8060 comparison_code = convert_tree_comp_to_rtx (cmpcode, unsignedp);
8061 }
8062 else
8063 {
8064 op00 = expand_normal (treeop0);
8065 op01 = const0_rtx;
8066 comparison_code = NE;
8067 comparison_mode = GET_MODE (op00);
8068 if (comparison_mode == VOIDmode)
8069 comparison_mode = TYPE_MODE (TREE_TYPE (treeop0));
8070 }
8071
8072 if (GET_MODE (op1) != mode)
8073 op1 = gen_lowpart (mode, op1);
8074
8075 if (GET_MODE (op2) != mode)
8076 op2 = gen_lowpart (mode, op2);
8077
8078 /* Try to emit the conditional move. */
8079 insn = emit_conditional_move (temp, comparison_code,
8080 op00, op01, comparison_mode,
8081 op1, op2, mode,
8082 unsignedp);
8083
8084 /* If we could do the conditional move, emit the sequence,
8085 and return. */
8086 if (insn)
8087 {
8088 rtx_insn *seq = get_insns ();
8089 end_sequence ();
8090 emit_insn (seq);
8091 return convert_modes (orig_mode, mode, temp, 0);
8092 }
8093
8094 /* Otherwise discard the sequence and fall back to code with
8095 branches. */
8096 end_sequence ();
8097 return NULL_RTX;
8098 }
8099
8100 rtx
8101 expand_expr_real_2 (sepops ops, rtx target, machine_mode tmode,
8102 enum expand_modifier modifier)
8103 {
8104 rtx op0, op1, op2, temp;
8105 rtx_code_label *lab;
8106 tree type;
8107 int unsignedp;
8108 machine_mode mode;
8109 enum tree_code code = ops->code;
8110 optab this_optab;
8111 rtx subtarget, original_target;
8112 int ignore;
8113 bool reduce_bit_field;
8114 location_t loc = ops->location;
8115 tree treeop0, treeop1, treeop2;
8116 #define REDUCE_BIT_FIELD(expr) (reduce_bit_field \
8117 ? reduce_to_bit_field_precision ((expr), \
8118 target, \
8119 type) \
8120 : (expr))
8121
8122 type = ops->type;
8123 mode = TYPE_MODE (type);
8124 unsignedp = TYPE_UNSIGNED (type);
8125
8126 treeop0 = ops->op0;
8127 treeop1 = ops->op1;
8128 treeop2 = ops->op2;
8129
8130 /* We should be called only on simple (binary or unary) expressions,
8131 exactly those that are valid in gimple expressions that aren't
8132 GIMPLE_SINGLE_RHS (or invalid). */
8133 gcc_assert (get_gimple_rhs_class (code) == GIMPLE_UNARY_RHS
8134 || get_gimple_rhs_class (code) == GIMPLE_BINARY_RHS
8135 || get_gimple_rhs_class (code) == GIMPLE_TERNARY_RHS);
8136
8137 ignore = (target == const0_rtx
8138 || ((CONVERT_EXPR_CODE_P (code)
8139 || code == COND_EXPR || code == VIEW_CONVERT_EXPR)
8140 && TREE_CODE (type) == VOID_TYPE));
8141
8142 /* We should be called only if we need the result. */
8143 gcc_assert (!ignore);
8144
8145 /* An operation in what may be a bit-field type needs the
8146 result to be reduced to the precision of the bit-field type,
8147 which is narrower than that of the type's mode. */
8148 reduce_bit_field = (INTEGRAL_TYPE_P (type)
8149 && GET_MODE_PRECISION (mode) > TYPE_PRECISION (type));
8150
8151 if (reduce_bit_field && modifier == EXPAND_STACK_PARM)
8152 target = 0;
8153
8154 /* Use subtarget as the target for operand 0 of a binary operation. */
8155 subtarget = get_subtarget (target);
8156 original_target = target;
8157
8158 switch (code)
8159 {
8160 case NON_LVALUE_EXPR:
8161 case PAREN_EXPR:
8162 CASE_CONVERT:
8163 if (treeop0 == error_mark_node)
8164 return const0_rtx;
8165
8166 if (TREE_CODE (type) == UNION_TYPE)
8167 {
8168 tree valtype = TREE_TYPE (treeop0);
8169
8170 /* If both input and output are BLKmode, this conversion isn't doing
8171 anything except possibly changing memory attribute. */
8172 if (mode == BLKmode && TYPE_MODE (valtype) == BLKmode)
8173 {
8174 rtx result = expand_expr (treeop0, target, tmode,
8175 modifier);
8176
8177 result = copy_rtx (result);
8178 set_mem_attributes (result, type, 0);
8179 return result;
8180 }
8181
8182 if (target == 0)
8183 {
8184 if (TYPE_MODE (type) != BLKmode)
8185 target = gen_reg_rtx (TYPE_MODE (type));
8186 else
8187 target = assign_temp (type, 1, 1);
8188 }
8189
8190 if (MEM_P (target))
8191 /* Store data into beginning of memory target. */
8192 store_expr (treeop0,
8193 adjust_address (target, TYPE_MODE (valtype), 0),
8194 modifier == EXPAND_STACK_PARM,
8195 false);
8196
8197 else
8198 {
8199 gcc_assert (REG_P (target));
8200
8201 /* Store this field into a union of the proper type. */
8202 store_field (target,
8203 MIN ((int_size_in_bytes (TREE_TYPE
8204 (treeop0))
8205 * BITS_PER_UNIT),
8206 (HOST_WIDE_INT) GET_MODE_BITSIZE (mode)),
8207 0, 0, 0, TYPE_MODE (valtype), treeop0, 0, false);
8208 }
8209
8210 /* Return the entire union. */
8211 return target;
8212 }
8213
8214 if (mode == TYPE_MODE (TREE_TYPE (treeop0)))
8215 {
8216 op0 = expand_expr (treeop0, target, VOIDmode,
8217 modifier);
8218
8219 /* If the signedness of the conversion differs and OP0 is
8220 a promoted SUBREG, clear that indication since we now
8221 have to do the proper extension. */
8222 if (TYPE_UNSIGNED (TREE_TYPE (treeop0)) != unsignedp
8223 && GET_CODE (op0) == SUBREG)
8224 SUBREG_PROMOTED_VAR_P (op0) = 0;
8225
8226 return REDUCE_BIT_FIELD (op0);
8227 }
8228
8229 op0 = expand_expr (treeop0, NULL_RTX, mode,
8230 modifier == EXPAND_SUM ? EXPAND_NORMAL : modifier);
8231 if (GET_MODE (op0) == mode)
8232 ;
8233
8234 /* If OP0 is a constant, just convert it into the proper mode. */
8235 else if (CONSTANT_P (op0))
8236 {
8237 tree inner_type = TREE_TYPE (treeop0);
8238 machine_mode inner_mode = GET_MODE (op0);
8239
8240 if (inner_mode == VOIDmode)
8241 inner_mode = TYPE_MODE (inner_type);
8242
8243 if (modifier == EXPAND_INITIALIZER)
8244 op0 = simplify_gen_subreg (mode, op0, inner_mode,
8245 subreg_lowpart_offset (mode,
8246 inner_mode));
8247 else
8248 op0= convert_modes (mode, inner_mode, op0,
8249 TYPE_UNSIGNED (inner_type));
8250 }
8251
8252 else if (modifier == EXPAND_INITIALIZER)
8253 op0 = gen_rtx_fmt_e (unsignedp ? ZERO_EXTEND : SIGN_EXTEND, mode, op0);
8254
8255 else if (target == 0)
8256 op0 = convert_to_mode (mode, op0,
8257 TYPE_UNSIGNED (TREE_TYPE
8258 (treeop0)));
8259 else
8260 {
8261 convert_move (target, op0,
8262 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
8263 op0 = target;
8264 }
8265
8266 return REDUCE_BIT_FIELD (op0);
8267
8268 case ADDR_SPACE_CONVERT_EXPR:
8269 {
8270 tree treeop0_type = TREE_TYPE (treeop0);
8271 addr_space_t as_to;
8272 addr_space_t as_from;
8273
8274 gcc_assert (POINTER_TYPE_P (type));
8275 gcc_assert (POINTER_TYPE_P (treeop0_type));
8276
8277 as_to = TYPE_ADDR_SPACE (TREE_TYPE (type));
8278 as_from = TYPE_ADDR_SPACE (TREE_TYPE (treeop0_type));
8279
8280 /* Conversions between pointers to the same address space should
8281 have been implemented via CONVERT_EXPR / NOP_EXPR. */
8282 gcc_assert (as_to != as_from);
8283
8284 /* Ask target code to handle conversion between pointers
8285 to overlapping address spaces. */
8286 if (targetm.addr_space.subset_p (as_to, as_from)
8287 || targetm.addr_space.subset_p (as_from, as_to))
8288 {
8289 op0 = expand_expr (treeop0, NULL_RTX, VOIDmode, modifier);
8290 op0 = targetm.addr_space.convert (op0, treeop0_type, type);
8291 gcc_assert (op0);
8292 return op0;
8293 }
8294
8295 /* For disjoint address spaces, converting anything but
8296 a null pointer invokes undefined behaviour. We simply
8297 always return a null pointer here. */
8298 return CONST0_RTX (mode);
8299 }
8300
8301 case POINTER_PLUS_EXPR:
8302 /* Even though the sizetype mode and the pointer's mode can be different
8303 expand is able to handle this correctly and get the correct result out
8304 of the PLUS_EXPR code. */
8305 /* Make sure to sign-extend the sizetype offset in a POINTER_PLUS_EXPR
8306 if sizetype precision is smaller than pointer precision. */
8307 if (TYPE_PRECISION (sizetype) < TYPE_PRECISION (type))
8308 treeop1 = fold_convert_loc (loc, type,
8309 fold_convert_loc (loc, ssizetype,
8310 treeop1));
8311 /* If sizetype precision is larger than pointer precision, truncate the
8312 offset to have matching modes. */
8313 else if (TYPE_PRECISION (sizetype) > TYPE_PRECISION (type))
8314 treeop1 = fold_convert_loc (loc, type, treeop1);
8315
8316 case PLUS_EXPR:
8317 /* If we are adding a constant, a VAR_DECL that is sp, fp, or ap, and
8318 something else, make sure we add the register to the constant and
8319 then to the other thing. This case can occur during strength
8320 reduction and doing it this way will produce better code if the
8321 frame pointer or argument pointer is eliminated.
8322
8323 fold-const.c will ensure that the constant is always in the inner
8324 PLUS_EXPR, so the only case we need to do anything about is if
8325 sp, ap, or fp is our second argument, in which case we must swap
8326 the innermost first argument and our second argument. */
8327
8328 if (TREE_CODE (treeop0) == PLUS_EXPR
8329 && TREE_CODE (TREE_OPERAND (treeop0, 1)) == INTEGER_CST
8330 && TREE_CODE (treeop1) == VAR_DECL
8331 && (DECL_RTL (treeop1) == frame_pointer_rtx
8332 || DECL_RTL (treeop1) == stack_pointer_rtx
8333 || DECL_RTL (treeop1) == arg_pointer_rtx))
8334 {
8335 gcc_unreachable ();
8336 }
8337
8338 /* If the result is to be ptr_mode and we are adding an integer to
8339 something, we might be forming a constant. So try to use
8340 plus_constant. If it produces a sum and we can't accept it,
8341 use force_operand. This allows P = &ARR[const] to generate
8342 efficient code on machines where a SYMBOL_REF is not a valid
8343 address.
8344
8345 If this is an EXPAND_SUM call, always return the sum. */
8346 if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER
8347 || (mode == ptr_mode && (unsignedp || ! flag_trapv)))
8348 {
8349 if (modifier == EXPAND_STACK_PARM)
8350 target = 0;
8351 if (TREE_CODE (treeop0) == INTEGER_CST
8352 && GET_MODE_PRECISION (mode) <= HOST_BITS_PER_WIDE_INT
8353 && TREE_CONSTANT (treeop1))
8354 {
8355 rtx constant_part;
8356 HOST_WIDE_INT wc;
8357 machine_mode wmode = TYPE_MODE (TREE_TYPE (treeop1));
8358
8359 op1 = expand_expr (treeop1, subtarget, VOIDmode,
8360 EXPAND_SUM);
8361 /* Use wi::shwi to ensure that the constant is
8362 truncated according to the mode of OP1, then sign extended
8363 to a HOST_WIDE_INT. Using the constant directly can result
8364 in non-canonical RTL in a 64x32 cross compile. */
8365 wc = TREE_INT_CST_LOW (treeop0);
8366 constant_part =
8367 immed_wide_int_const (wi::shwi (wc, wmode), wmode);
8368 op1 = plus_constant (mode, op1, INTVAL (constant_part));
8369 if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8370 op1 = force_operand (op1, target);
8371 return REDUCE_BIT_FIELD (op1);
8372 }
8373
8374 else if (TREE_CODE (treeop1) == INTEGER_CST
8375 && GET_MODE_PRECISION (mode) <= HOST_BITS_PER_WIDE_INT
8376 && TREE_CONSTANT (treeop0))
8377 {
8378 rtx constant_part;
8379 HOST_WIDE_INT wc;
8380 machine_mode wmode = TYPE_MODE (TREE_TYPE (treeop0));
8381
8382 op0 = expand_expr (treeop0, subtarget, VOIDmode,
8383 (modifier == EXPAND_INITIALIZER
8384 ? EXPAND_INITIALIZER : EXPAND_SUM));
8385 if (! CONSTANT_P (op0))
8386 {
8387 op1 = expand_expr (treeop1, NULL_RTX,
8388 VOIDmode, modifier);
8389 /* Return a PLUS if modifier says it's OK. */
8390 if (modifier == EXPAND_SUM
8391 || modifier == EXPAND_INITIALIZER)
8392 return simplify_gen_binary (PLUS, mode, op0, op1);
8393 goto binop2;
8394 }
8395 /* Use wi::shwi to ensure that the constant is
8396 truncated according to the mode of OP1, then sign extended
8397 to a HOST_WIDE_INT. Using the constant directly can result
8398 in non-canonical RTL in a 64x32 cross compile. */
8399 wc = TREE_INT_CST_LOW (treeop1);
8400 constant_part
8401 = immed_wide_int_const (wi::shwi (wc, wmode), wmode);
8402 op0 = plus_constant (mode, op0, INTVAL (constant_part));
8403 if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8404 op0 = force_operand (op0, target);
8405 return REDUCE_BIT_FIELD (op0);
8406 }
8407 }
8408
8409 /* Use TER to expand pointer addition of a negated value
8410 as pointer subtraction. */
8411 if ((POINTER_TYPE_P (TREE_TYPE (treeop0))
8412 || (TREE_CODE (TREE_TYPE (treeop0)) == VECTOR_TYPE
8413 && POINTER_TYPE_P (TREE_TYPE (TREE_TYPE (treeop0)))))
8414 && TREE_CODE (treeop1) == SSA_NAME
8415 && TYPE_MODE (TREE_TYPE (treeop0))
8416 == TYPE_MODE (TREE_TYPE (treeop1)))
8417 {
8418 gimple def = get_def_for_expr (treeop1, NEGATE_EXPR);
8419 if (def)
8420 {
8421 treeop1 = gimple_assign_rhs1 (def);
8422 code = MINUS_EXPR;
8423 goto do_minus;
8424 }
8425 }
8426
8427 /* No sense saving up arithmetic to be done
8428 if it's all in the wrong mode to form part of an address.
8429 And force_operand won't know whether to sign-extend or
8430 zero-extend. */
8431 if ((modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8432 || mode != ptr_mode)
8433 {
8434 expand_operands (treeop0, treeop1,
8435 subtarget, &op0, &op1, EXPAND_NORMAL);
8436 if (op0 == const0_rtx)
8437 return op1;
8438 if (op1 == const0_rtx)
8439 return op0;
8440 goto binop2;
8441 }
8442
8443 expand_operands (treeop0, treeop1,
8444 subtarget, &op0, &op1, modifier);
8445 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1));
8446
8447 case MINUS_EXPR:
8448 do_minus:
8449 /* For initializers, we are allowed to return a MINUS of two
8450 symbolic constants. Here we handle all cases when both operands
8451 are constant. */
8452 /* Handle difference of two symbolic constants,
8453 for the sake of an initializer. */
8454 if ((modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
8455 && really_constant_p (treeop0)
8456 && really_constant_p (treeop1))
8457 {
8458 expand_operands (treeop0, treeop1,
8459 NULL_RTX, &op0, &op1, modifier);
8460
8461 /* If the last operand is a CONST_INT, use plus_constant of
8462 the negated constant. Else make the MINUS. */
8463 if (CONST_INT_P (op1))
8464 return REDUCE_BIT_FIELD (plus_constant (mode, op0,
8465 -INTVAL (op1)));
8466 else
8467 return REDUCE_BIT_FIELD (gen_rtx_MINUS (mode, op0, op1));
8468 }
8469
8470 /* No sense saving up arithmetic to be done
8471 if it's all in the wrong mode to form part of an address.
8472 And force_operand won't know whether to sign-extend or
8473 zero-extend. */
8474 if ((modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8475 || mode != ptr_mode)
8476 goto binop;
8477
8478 expand_operands (treeop0, treeop1,
8479 subtarget, &op0, &op1, modifier);
8480
8481 /* Convert A - const to A + (-const). */
8482 if (CONST_INT_P (op1))
8483 {
8484 op1 = negate_rtx (mode, op1);
8485 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1));
8486 }
8487
8488 goto binop2;
8489
8490 case WIDEN_MULT_PLUS_EXPR:
8491 case WIDEN_MULT_MINUS_EXPR:
8492 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8493 op2 = expand_normal (treeop2);
8494 target = expand_widen_pattern_expr (ops, op0, op1, op2,
8495 target, unsignedp);
8496 return target;
8497
8498 case WIDEN_MULT_EXPR:
8499 /* If first operand is constant, swap them.
8500 Thus the following special case checks need only
8501 check the second operand. */
8502 if (TREE_CODE (treeop0) == INTEGER_CST)
8503 {
8504 tree t1 = treeop0;
8505 treeop0 = treeop1;
8506 treeop1 = t1;
8507 }
8508
8509 /* First, check if we have a multiplication of one signed and one
8510 unsigned operand. */
8511 if (TREE_CODE (treeop1) != INTEGER_CST
8512 && (TYPE_UNSIGNED (TREE_TYPE (treeop0))
8513 != TYPE_UNSIGNED (TREE_TYPE (treeop1))))
8514 {
8515 machine_mode innermode = TYPE_MODE (TREE_TYPE (treeop0));
8516 this_optab = usmul_widen_optab;
8517 if (find_widening_optab_handler (this_optab, mode, innermode, 0)
8518 != CODE_FOR_nothing)
8519 {
8520 if (TYPE_UNSIGNED (TREE_TYPE (treeop0)))
8521 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1,
8522 EXPAND_NORMAL);
8523 else
8524 expand_operands (treeop0, treeop1, NULL_RTX, &op1, &op0,
8525 EXPAND_NORMAL);
8526 /* op0 and op1 might still be constant, despite the above
8527 != INTEGER_CST check. Handle it. */
8528 if (GET_MODE (op0) == VOIDmode && GET_MODE (op1) == VOIDmode)
8529 {
8530 op0 = convert_modes (innermode, mode, op0, true);
8531 op1 = convert_modes (innermode, mode, op1, false);
8532 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1,
8533 target, unsignedp));
8534 }
8535 goto binop3;
8536 }
8537 }
8538 /* Check for a multiplication with matching signedness. */
8539 else if ((TREE_CODE (treeop1) == INTEGER_CST
8540 && int_fits_type_p (treeop1, TREE_TYPE (treeop0)))
8541 || (TYPE_UNSIGNED (TREE_TYPE (treeop1))
8542 == TYPE_UNSIGNED (TREE_TYPE (treeop0))))
8543 {
8544 tree op0type = TREE_TYPE (treeop0);
8545 machine_mode innermode = TYPE_MODE (op0type);
8546 bool zextend_p = TYPE_UNSIGNED (op0type);
8547 optab other_optab = zextend_p ? smul_widen_optab : umul_widen_optab;
8548 this_optab = zextend_p ? umul_widen_optab : smul_widen_optab;
8549
8550 if (TREE_CODE (treeop0) != INTEGER_CST)
8551 {
8552 if (find_widening_optab_handler (this_optab, mode, innermode, 0)
8553 != CODE_FOR_nothing)
8554 {
8555 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1,
8556 EXPAND_NORMAL);
8557 /* op0 and op1 might still be constant, despite the above
8558 != INTEGER_CST check. Handle it. */
8559 if (GET_MODE (op0) == VOIDmode && GET_MODE (op1) == VOIDmode)
8560 {
8561 widen_mult_const:
8562 op0 = convert_modes (innermode, mode, op0, zextend_p);
8563 op1
8564 = convert_modes (innermode, mode, op1,
8565 TYPE_UNSIGNED (TREE_TYPE (treeop1)));
8566 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1,
8567 target,
8568 unsignedp));
8569 }
8570 temp = expand_widening_mult (mode, op0, op1, target,
8571 unsignedp, this_optab);
8572 return REDUCE_BIT_FIELD (temp);
8573 }
8574 if (find_widening_optab_handler (other_optab, mode, innermode, 0)
8575 != CODE_FOR_nothing
8576 && innermode == word_mode)
8577 {
8578 rtx htem, hipart;
8579 op0 = expand_normal (treeop0);
8580 if (TREE_CODE (treeop1) == INTEGER_CST)
8581 op1 = convert_modes (innermode, mode,
8582 expand_normal (treeop1),
8583 TYPE_UNSIGNED (TREE_TYPE (treeop1)));
8584 else
8585 op1 = expand_normal (treeop1);
8586 /* op0 and op1 might still be constant, despite the above
8587 != INTEGER_CST check. Handle it. */
8588 if (GET_MODE (op0) == VOIDmode && GET_MODE (op1) == VOIDmode)
8589 goto widen_mult_const;
8590 temp = expand_binop (mode, other_optab, op0, op1, target,
8591 unsignedp, OPTAB_LIB_WIDEN);
8592 hipart = gen_highpart (innermode, temp);
8593 htem = expand_mult_highpart_adjust (innermode, hipart,
8594 op0, op1, hipart,
8595 zextend_p);
8596 if (htem != hipart)
8597 emit_move_insn (hipart, htem);
8598 return REDUCE_BIT_FIELD (temp);
8599 }
8600 }
8601 }
8602 treeop0 = fold_build1 (CONVERT_EXPR, type, treeop0);
8603 treeop1 = fold_build1 (CONVERT_EXPR, type, treeop1);
8604 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
8605 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, target, unsignedp));
8606
8607 case FMA_EXPR:
8608 {
8609 optab opt = fma_optab;
8610 gimple def0, def2;
8611
8612 /* If there is no insn for FMA, emit it as __builtin_fma{,f,l}
8613 call. */
8614 if (optab_handler (fma_optab, mode) == CODE_FOR_nothing)
8615 {
8616 tree fn = mathfn_built_in (TREE_TYPE (treeop0), BUILT_IN_FMA);
8617 tree call_expr;
8618
8619 gcc_assert (fn != NULL_TREE);
8620 call_expr = build_call_expr (fn, 3, treeop0, treeop1, treeop2);
8621 return expand_builtin (call_expr, target, subtarget, mode, false);
8622 }
8623
8624 def0 = get_def_for_expr (treeop0, NEGATE_EXPR);
8625 /* The multiplication is commutative - look at its 2nd operand
8626 if the first isn't fed by a negate. */
8627 if (!def0)
8628 {
8629 def0 = get_def_for_expr (treeop1, NEGATE_EXPR);
8630 /* Swap operands if the 2nd operand is fed by a negate. */
8631 if (def0)
8632 {
8633 tree tem = treeop0;
8634 treeop0 = treeop1;
8635 treeop1 = tem;
8636 }
8637 }
8638 def2 = get_def_for_expr (treeop2, NEGATE_EXPR);
8639
8640 op0 = op2 = NULL;
8641
8642 if (def0 && def2
8643 && optab_handler (fnms_optab, mode) != CODE_FOR_nothing)
8644 {
8645 opt = fnms_optab;
8646 op0 = expand_normal (gimple_assign_rhs1 (def0));
8647 op2 = expand_normal (gimple_assign_rhs1 (def2));
8648 }
8649 else if (def0
8650 && optab_handler (fnma_optab, mode) != CODE_FOR_nothing)
8651 {
8652 opt = fnma_optab;
8653 op0 = expand_normal (gimple_assign_rhs1 (def0));
8654 }
8655 else if (def2
8656 && optab_handler (fms_optab, mode) != CODE_FOR_nothing)
8657 {
8658 opt = fms_optab;
8659 op2 = expand_normal (gimple_assign_rhs1 (def2));
8660 }
8661
8662 if (op0 == NULL)
8663 op0 = expand_expr (treeop0, subtarget, VOIDmode, EXPAND_NORMAL);
8664 if (op2 == NULL)
8665 op2 = expand_normal (treeop2);
8666 op1 = expand_normal (treeop1);
8667
8668 return expand_ternary_op (TYPE_MODE (type), opt,
8669 op0, op1, op2, target, 0);
8670 }
8671
8672 case MULT_EXPR:
8673 /* If this is a fixed-point operation, then we cannot use the code
8674 below because "expand_mult" doesn't support sat/no-sat fixed-point
8675 multiplications. */
8676 if (ALL_FIXED_POINT_MODE_P (mode))
8677 goto binop;
8678
8679 /* If first operand is constant, swap them.
8680 Thus the following special case checks need only
8681 check the second operand. */
8682 if (TREE_CODE (treeop0) == INTEGER_CST)
8683 {
8684 tree t1 = treeop0;
8685 treeop0 = treeop1;
8686 treeop1 = t1;
8687 }
8688
8689 /* Attempt to return something suitable for generating an
8690 indexed address, for machines that support that. */
8691
8692 if (modifier == EXPAND_SUM && mode == ptr_mode
8693 && tree_fits_shwi_p (treeop1))
8694 {
8695 tree exp1 = treeop1;
8696
8697 op0 = expand_expr (treeop0, subtarget, VOIDmode,
8698 EXPAND_SUM);
8699
8700 if (!REG_P (op0))
8701 op0 = force_operand (op0, NULL_RTX);
8702 if (!REG_P (op0))
8703 op0 = copy_to_mode_reg (mode, op0);
8704
8705 return REDUCE_BIT_FIELD (gen_rtx_MULT (mode, op0,
8706 gen_int_mode (tree_to_shwi (exp1),
8707 TYPE_MODE (TREE_TYPE (exp1)))));
8708 }
8709
8710 if (modifier == EXPAND_STACK_PARM)
8711 target = 0;
8712
8713 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
8714 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, target, unsignedp));
8715
8716 case TRUNC_DIV_EXPR:
8717 case FLOOR_DIV_EXPR:
8718 case CEIL_DIV_EXPR:
8719 case ROUND_DIV_EXPR:
8720 case EXACT_DIV_EXPR:
8721 /* If this is a fixed-point operation, then we cannot use the code
8722 below because "expand_divmod" doesn't support sat/no-sat fixed-point
8723 divisions. */
8724 if (ALL_FIXED_POINT_MODE_P (mode))
8725 goto binop;
8726
8727 if (modifier == EXPAND_STACK_PARM)
8728 target = 0;
8729 /* Possible optimization: compute the dividend with EXPAND_SUM
8730 then if the divisor is constant can optimize the case
8731 where some terms of the dividend have coeffs divisible by it. */
8732 expand_operands (treeop0, treeop1,
8733 subtarget, &op0, &op1, EXPAND_NORMAL);
8734 return expand_divmod (0, code, mode, op0, op1, target, unsignedp);
8735
8736 case RDIV_EXPR:
8737 goto binop;
8738
8739 case MULT_HIGHPART_EXPR:
8740 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
8741 temp = expand_mult_highpart (mode, op0, op1, target, unsignedp);
8742 gcc_assert (temp);
8743 return temp;
8744
8745 case TRUNC_MOD_EXPR:
8746 case FLOOR_MOD_EXPR:
8747 case CEIL_MOD_EXPR:
8748 case ROUND_MOD_EXPR:
8749 if (modifier == EXPAND_STACK_PARM)
8750 target = 0;
8751 expand_operands (treeop0, treeop1,
8752 subtarget, &op0, &op1, EXPAND_NORMAL);
8753 return expand_divmod (1, code, mode, op0, op1, target, unsignedp);
8754
8755 case FIXED_CONVERT_EXPR:
8756 op0 = expand_normal (treeop0);
8757 if (target == 0 || modifier == EXPAND_STACK_PARM)
8758 target = gen_reg_rtx (mode);
8759
8760 if ((TREE_CODE (TREE_TYPE (treeop0)) == INTEGER_TYPE
8761 && TYPE_UNSIGNED (TREE_TYPE (treeop0)))
8762 || (TREE_CODE (type) == INTEGER_TYPE && TYPE_UNSIGNED (type)))
8763 expand_fixed_convert (target, op0, 1, TYPE_SATURATING (type));
8764 else
8765 expand_fixed_convert (target, op0, 0, TYPE_SATURATING (type));
8766 return target;
8767
8768 case FIX_TRUNC_EXPR:
8769 op0 = expand_normal (treeop0);
8770 if (target == 0 || modifier == EXPAND_STACK_PARM)
8771 target = gen_reg_rtx (mode);
8772 expand_fix (target, op0, unsignedp);
8773 return target;
8774
8775 case FLOAT_EXPR:
8776 op0 = expand_normal (treeop0);
8777 if (target == 0 || modifier == EXPAND_STACK_PARM)
8778 target = gen_reg_rtx (mode);
8779 /* expand_float can't figure out what to do if FROM has VOIDmode.
8780 So give it the correct mode. With -O, cse will optimize this. */
8781 if (GET_MODE (op0) == VOIDmode)
8782 op0 = copy_to_mode_reg (TYPE_MODE (TREE_TYPE (treeop0)),
8783 op0);
8784 expand_float (target, op0,
8785 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
8786 return target;
8787
8788 case NEGATE_EXPR:
8789 op0 = expand_expr (treeop0, subtarget,
8790 VOIDmode, EXPAND_NORMAL);
8791 if (modifier == EXPAND_STACK_PARM)
8792 target = 0;
8793 temp = expand_unop (mode,
8794 optab_for_tree_code (NEGATE_EXPR, type,
8795 optab_default),
8796 op0, target, 0);
8797 gcc_assert (temp);
8798 return REDUCE_BIT_FIELD (temp);
8799
8800 case ABS_EXPR:
8801 op0 = expand_expr (treeop0, subtarget,
8802 VOIDmode, EXPAND_NORMAL);
8803 if (modifier == EXPAND_STACK_PARM)
8804 target = 0;
8805
8806 /* ABS_EXPR is not valid for complex arguments. */
8807 gcc_assert (GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
8808 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT);
8809
8810 /* Unsigned abs is simply the operand. Testing here means we don't
8811 risk generating incorrect code below. */
8812 if (TYPE_UNSIGNED (type))
8813 return op0;
8814
8815 return expand_abs (mode, op0, target, unsignedp,
8816 safe_from_p (target, treeop0, 1));
8817
8818 case MAX_EXPR:
8819 case MIN_EXPR:
8820 target = original_target;
8821 if (target == 0
8822 || modifier == EXPAND_STACK_PARM
8823 || (MEM_P (target) && MEM_VOLATILE_P (target))
8824 || GET_MODE (target) != mode
8825 || (REG_P (target)
8826 && REGNO (target) < FIRST_PSEUDO_REGISTER))
8827 target = gen_reg_rtx (mode);
8828 expand_operands (treeop0, treeop1,
8829 target, &op0, &op1, EXPAND_NORMAL);
8830
8831 /* First try to do it with a special MIN or MAX instruction.
8832 If that does not win, use a conditional jump to select the proper
8833 value. */
8834 this_optab = optab_for_tree_code (code, type, optab_default);
8835 temp = expand_binop (mode, this_optab, op0, op1, target, unsignedp,
8836 OPTAB_WIDEN);
8837 if (temp != 0)
8838 return temp;
8839
8840 /* At this point, a MEM target is no longer useful; we will get better
8841 code without it. */
8842
8843 if (! REG_P (target))
8844 target = gen_reg_rtx (mode);
8845
8846 /* If op1 was placed in target, swap op0 and op1. */
8847 if (target != op0 && target == op1)
8848 std::swap (op0, op1);
8849
8850 /* We generate better code and avoid problems with op1 mentioning
8851 target by forcing op1 into a pseudo if it isn't a constant. */
8852 if (! CONSTANT_P (op1))
8853 op1 = force_reg (mode, op1);
8854
8855 {
8856 enum rtx_code comparison_code;
8857 rtx cmpop1 = op1;
8858
8859 if (code == MAX_EXPR)
8860 comparison_code = unsignedp ? GEU : GE;
8861 else
8862 comparison_code = unsignedp ? LEU : LE;
8863
8864 /* Canonicalize to comparisons against 0. */
8865 if (op1 == const1_rtx)
8866 {
8867 /* Converting (a >= 1 ? a : 1) into (a > 0 ? a : 1)
8868 or (a != 0 ? a : 1) for unsigned.
8869 For MIN we are safe converting (a <= 1 ? a : 1)
8870 into (a <= 0 ? a : 1) */
8871 cmpop1 = const0_rtx;
8872 if (code == MAX_EXPR)
8873 comparison_code = unsignedp ? NE : GT;
8874 }
8875 if (op1 == constm1_rtx && !unsignedp)
8876 {
8877 /* Converting (a >= -1 ? a : -1) into (a >= 0 ? a : -1)
8878 and (a <= -1 ? a : -1) into (a < 0 ? a : -1) */
8879 cmpop1 = const0_rtx;
8880 if (code == MIN_EXPR)
8881 comparison_code = LT;
8882 }
8883
8884 /* Use a conditional move if possible. */
8885 if (can_conditionally_move_p (mode))
8886 {
8887 rtx insn;
8888
8889 start_sequence ();
8890
8891 /* Try to emit the conditional move. */
8892 insn = emit_conditional_move (target, comparison_code,
8893 op0, cmpop1, mode,
8894 op0, op1, mode,
8895 unsignedp);
8896
8897 /* If we could do the conditional move, emit the sequence,
8898 and return. */
8899 if (insn)
8900 {
8901 rtx_insn *seq = get_insns ();
8902 end_sequence ();
8903 emit_insn (seq);
8904 return target;
8905 }
8906
8907 /* Otherwise discard the sequence and fall back to code with
8908 branches. */
8909 end_sequence ();
8910 }
8911
8912 if (target != op0)
8913 emit_move_insn (target, op0);
8914
8915 lab = gen_label_rtx ();
8916 do_compare_rtx_and_jump (target, cmpop1, comparison_code,
8917 unsignedp, mode, NULL_RTX, NULL, lab,
8918 -1);
8919 }
8920 emit_move_insn (target, op1);
8921 emit_label (lab);
8922 return target;
8923
8924 case BIT_NOT_EXPR:
8925 op0 = expand_expr (treeop0, subtarget,
8926 VOIDmode, EXPAND_NORMAL);
8927 if (modifier == EXPAND_STACK_PARM)
8928 target = 0;
8929 /* In case we have to reduce the result to bitfield precision
8930 for unsigned bitfield expand this as XOR with a proper constant
8931 instead. */
8932 if (reduce_bit_field && TYPE_UNSIGNED (type))
8933 {
8934 wide_int mask = wi::mask (TYPE_PRECISION (type),
8935 false, GET_MODE_PRECISION (mode));
8936
8937 temp = expand_binop (mode, xor_optab, op0,
8938 immed_wide_int_const (mask, mode),
8939 target, 1, OPTAB_LIB_WIDEN);
8940 }
8941 else
8942 temp = expand_unop (mode, one_cmpl_optab, op0, target, 1);
8943 gcc_assert (temp);
8944 return temp;
8945
8946 /* ??? Can optimize bitwise operations with one arg constant.
8947 Can optimize (a bitwise1 n) bitwise2 (a bitwise3 b)
8948 and (a bitwise1 b) bitwise2 b (etc)
8949 but that is probably not worth while. */
8950
8951 case BIT_AND_EXPR:
8952 case BIT_IOR_EXPR:
8953 case BIT_XOR_EXPR:
8954 goto binop;
8955
8956 case LROTATE_EXPR:
8957 case RROTATE_EXPR:
8958 gcc_assert (VECTOR_MODE_P (TYPE_MODE (type))
8959 || (GET_MODE_PRECISION (TYPE_MODE (type))
8960 == TYPE_PRECISION (type)));
8961 /* fall through */
8962
8963 case LSHIFT_EXPR:
8964 case RSHIFT_EXPR:
8965 /* If this is a fixed-point operation, then we cannot use the code
8966 below because "expand_shift" doesn't support sat/no-sat fixed-point
8967 shifts. */
8968 if (ALL_FIXED_POINT_MODE_P (mode))
8969 goto binop;
8970
8971 if (! safe_from_p (subtarget, treeop1, 1))
8972 subtarget = 0;
8973 if (modifier == EXPAND_STACK_PARM)
8974 target = 0;
8975 op0 = expand_expr (treeop0, subtarget,
8976 VOIDmode, EXPAND_NORMAL);
8977 temp = expand_variable_shift (code, mode, op0, treeop1, target,
8978 unsignedp);
8979 if (code == LSHIFT_EXPR)
8980 temp = REDUCE_BIT_FIELD (temp);
8981 return temp;
8982
8983 /* Could determine the answer when only additive constants differ. Also,
8984 the addition of one can be handled by changing the condition. */
8985 case LT_EXPR:
8986 case LE_EXPR:
8987 case GT_EXPR:
8988 case GE_EXPR:
8989 case EQ_EXPR:
8990 case NE_EXPR:
8991 case UNORDERED_EXPR:
8992 case ORDERED_EXPR:
8993 case UNLT_EXPR:
8994 case UNLE_EXPR:
8995 case UNGT_EXPR:
8996 case UNGE_EXPR:
8997 case UNEQ_EXPR:
8998 case LTGT_EXPR:
8999 {
9000 temp = do_store_flag (ops,
9001 modifier != EXPAND_STACK_PARM ? target : NULL_RTX,
9002 tmode != VOIDmode ? tmode : mode);
9003 if (temp)
9004 return temp;
9005
9006 /* Use a compare and a jump for BLKmode comparisons, or for function
9007 type comparisons is HAVE_canonicalize_funcptr_for_compare. */
9008
9009 if ((target == 0
9010 || modifier == EXPAND_STACK_PARM
9011 || ! safe_from_p (target, treeop0, 1)
9012 || ! safe_from_p (target, treeop1, 1)
9013 /* Make sure we don't have a hard reg (such as function's return
9014 value) live across basic blocks, if not optimizing. */
9015 || (!optimize && REG_P (target)
9016 && REGNO (target) < FIRST_PSEUDO_REGISTER)))
9017 target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode);
9018
9019 emit_move_insn (target, const0_rtx);
9020
9021 rtx_code_label *lab1 = gen_label_rtx ();
9022 jumpifnot_1 (code, treeop0, treeop1, lab1, -1);
9023
9024 if (TYPE_PRECISION (type) == 1 && !TYPE_UNSIGNED (type))
9025 emit_move_insn (target, constm1_rtx);
9026 else
9027 emit_move_insn (target, const1_rtx);
9028
9029 emit_label (lab1);
9030 return target;
9031 }
9032 case COMPLEX_EXPR:
9033 /* Get the rtx code of the operands. */
9034 op0 = expand_normal (treeop0);
9035 op1 = expand_normal (treeop1);
9036
9037 if (!target)
9038 target = gen_reg_rtx (TYPE_MODE (type));
9039 else
9040 /* If target overlaps with op1, then either we need to force
9041 op1 into a pseudo (if target also overlaps with op0),
9042 or write the complex parts in reverse order. */
9043 switch (GET_CODE (target))
9044 {
9045 case CONCAT:
9046 if (reg_overlap_mentioned_p (XEXP (target, 0), op1))
9047 {
9048 if (reg_overlap_mentioned_p (XEXP (target, 1), op0))
9049 {
9050 complex_expr_force_op1:
9051 temp = gen_reg_rtx (GET_MODE_INNER (GET_MODE (target)));
9052 emit_move_insn (temp, op1);
9053 op1 = temp;
9054 break;
9055 }
9056 complex_expr_swap_order:
9057 /* Move the imaginary (op1) and real (op0) parts to their
9058 location. */
9059 write_complex_part (target, op1, true);
9060 write_complex_part (target, op0, false);
9061
9062 return target;
9063 }
9064 break;
9065 case MEM:
9066 temp = adjust_address_nv (target,
9067 GET_MODE_INNER (GET_MODE (target)), 0);
9068 if (reg_overlap_mentioned_p (temp, op1))
9069 {
9070 machine_mode imode = GET_MODE_INNER (GET_MODE (target));
9071 temp = adjust_address_nv (target, imode,
9072 GET_MODE_SIZE (imode));
9073 if (reg_overlap_mentioned_p (temp, op0))
9074 goto complex_expr_force_op1;
9075 goto complex_expr_swap_order;
9076 }
9077 break;
9078 default:
9079 if (reg_overlap_mentioned_p (target, op1))
9080 {
9081 if (reg_overlap_mentioned_p (target, op0))
9082 goto complex_expr_force_op1;
9083 goto complex_expr_swap_order;
9084 }
9085 break;
9086 }
9087
9088 /* Move the real (op0) and imaginary (op1) parts to their location. */
9089 write_complex_part (target, op0, false);
9090 write_complex_part (target, op1, true);
9091
9092 return target;
9093
9094 case WIDEN_SUM_EXPR:
9095 {
9096 tree oprnd0 = treeop0;
9097 tree oprnd1 = treeop1;
9098
9099 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
9100 target = expand_widen_pattern_expr (ops, op0, NULL_RTX, op1,
9101 target, unsignedp);
9102 return target;
9103 }
9104
9105 case REDUC_MAX_EXPR:
9106 case REDUC_MIN_EXPR:
9107 case REDUC_PLUS_EXPR:
9108 {
9109 op0 = expand_normal (treeop0);
9110 this_optab = optab_for_tree_code (code, type, optab_default);
9111 machine_mode vec_mode = TYPE_MODE (TREE_TYPE (treeop0));
9112
9113 if (optab_handler (this_optab, vec_mode) != CODE_FOR_nothing)
9114 {
9115 struct expand_operand ops[2];
9116 enum insn_code icode = optab_handler (this_optab, vec_mode);
9117
9118 create_output_operand (&ops[0], target, mode);
9119 create_input_operand (&ops[1], op0, vec_mode);
9120 if (maybe_expand_insn (icode, 2, ops))
9121 {
9122 target = ops[0].value;
9123 if (GET_MODE (target) != mode)
9124 return gen_lowpart (tmode, target);
9125 return target;
9126 }
9127 }
9128 /* Fall back to optab with vector result, and then extract scalar. */
9129 this_optab = scalar_reduc_to_vector (this_optab, type);
9130 temp = expand_unop (vec_mode, this_optab, op0, NULL_RTX, unsignedp);
9131 gcc_assert (temp);
9132 /* The tree code produces a scalar result, but (somewhat by convention)
9133 the optab produces a vector with the result in element 0 if
9134 little-endian, or element N-1 if big-endian. So pull the scalar
9135 result out of that element. */
9136 int index = BYTES_BIG_ENDIAN ? GET_MODE_NUNITS (vec_mode) - 1 : 0;
9137 int bitsize = GET_MODE_BITSIZE (GET_MODE_INNER (vec_mode));
9138 temp = extract_bit_field (temp, bitsize, bitsize * index, unsignedp,
9139 target, mode, mode);
9140 gcc_assert (temp);
9141 return temp;
9142 }
9143
9144 case VEC_UNPACK_HI_EXPR:
9145 case VEC_UNPACK_LO_EXPR:
9146 {
9147 op0 = expand_normal (treeop0);
9148 temp = expand_widen_pattern_expr (ops, op0, NULL_RTX, NULL_RTX,
9149 target, unsignedp);
9150 gcc_assert (temp);
9151 return temp;
9152 }
9153
9154 case VEC_UNPACK_FLOAT_HI_EXPR:
9155 case VEC_UNPACK_FLOAT_LO_EXPR:
9156 {
9157 op0 = expand_normal (treeop0);
9158 /* The signedness is determined from input operand. */
9159 temp = expand_widen_pattern_expr
9160 (ops, op0, NULL_RTX, NULL_RTX,
9161 target, TYPE_UNSIGNED (TREE_TYPE (treeop0)));
9162
9163 gcc_assert (temp);
9164 return temp;
9165 }
9166
9167 case VEC_WIDEN_MULT_HI_EXPR:
9168 case VEC_WIDEN_MULT_LO_EXPR:
9169 case VEC_WIDEN_MULT_EVEN_EXPR:
9170 case VEC_WIDEN_MULT_ODD_EXPR:
9171 case VEC_WIDEN_LSHIFT_HI_EXPR:
9172 case VEC_WIDEN_LSHIFT_LO_EXPR:
9173 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
9174 target = expand_widen_pattern_expr (ops, op0, op1, NULL_RTX,
9175 target, unsignedp);
9176 gcc_assert (target);
9177 return target;
9178
9179 case VEC_PACK_TRUNC_EXPR:
9180 case VEC_PACK_SAT_EXPR:
9181 case VEC_PACK_FIX_TRUNC_EXPR:
9182 mode = TYPE_MODE (TREE_TYPE (treeop0));
9183 goto binop;
9184
9185 case VEC_PERM_EXPR:
9186 expand_operands (treeop0, treeop1, target, &op0, &op1, EXPAND_NORMAL);
9187 op2 = expand_normal (treeop2);
9188
9189 /* Careful here: if the target doesn't support integral vector modes,
9190 a constant selection vector could wind up smooshed into a normal
9191 integral constant. */
9192 if (CONSTANT_P (op2) && GET_CODE (op2) != CONST_VECTOR)
9193 {
9194 tree sel_type = TREE_TYPE (treeop2);
9195 machine_mode vmode
9196 = mode_for_vector (TYPE_MODE (TREE_TYPE (sel_type)),
9197 TYPE_VECTOR_SUBPARTS (sel_type));
9198 gcc_assert (GET_MODE_CLASS (vmode) == MODE_VECTOR_INT);
9199 op2 = simplify_subreg (vmode, op2, TYPE_MODE (sel_type), 0);
9200 gcc_assert (op2 && GET_CODE (op2) == CONST_VECTOR);
9201 }
9202 else
9203 gcc_assert (GET_MODE_CLASS (GET_MODE (op2)) == MODE_VECTOR_INT);
9204
9205 temp = expand_vec_perm (mode, op0, op1, op2, target);
9206 gcc_assert (temp);
9207 return temp;
9208
9209 case DOT_PROD_EXPR:
9210 {
9211 tree oprnd0 = treeop0;
9212 tree oprnd1 = treeop1;
9213 tree oprnd2 = treeop2;
9214 rtx op2;
9215
9216 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
9217 op2 = expand_normal (oprnd2);
9218 target = expand_widen_pattern_expr (ops, op0, op1, op2,
9219 target, unsignedp);
9220 return target;
9221 }
9222
9223 case SAD_EXPR:
9224 {
9225 tree oprnd0 = treeop0;
9226 tree oprnd1 = treeop1;
9227 tree oprnd2 = treeop2;
9228 rtx op2;
9229
9230 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
9231 op2 = expand_normal (oprnd2);
9232 target = expand_widen_pattern_expr (ops, op0, op1, op2,
9233 target, unsignedp);
9234 return target;
9235 }
9236
9237 case REALIGN_LOAD_EXPR:
9238 {
9239 tree oprnd0 = treeop0;
9240 tree oprnd1 = treeop1;
9241 tree oprnd2 = treeop2;
9242 rtx op2;
9243
9244 this_optab = optab_for_tree_code (code, type, optab_default);
9245 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
9246 op2 = expand_normal (oprnd2);
9247 temp = expand_ternary_op (mode, this_optab, op0, op1, op2,
9248 target, unsignedp);
9249 gcc_assert (temp);
9250 return temp;
9251 }
9252
9253 case COND_EXPR:
9254 {
9255 /* A COND_EXPR with its type being VOID_TYPE represents a
9256 conditional jump and is handled in
9257 expand_gimple_cond_expr. */
9258 gcc_assert (!VOID_TYPE_P (type));
9259
9260 /* Note that COND_EXPRs whose type is a structure or union
9261 are required to be constructed to contain assignments of
9262 a temporary variable, so that we can evaluate them here
9263 for side effect only. If type is void, we must do likewise. */
9264
9265 gcc_assert (!TREE_ADDRESSABLE (type)
9266 && !ignore
9267 && TREE_TYPE (treeop1) != void_type_node
9268 && TREE_TYPE (treeop2) != void_type_node);
9269
9270 temp = expand_cond_expr_using_cmove (treeop0, treeop1, treeop2);
9271 if (temp)
9272 return temp;
9273
9274 /* If we are not to produce a result, we have no target. Otherwise,
9275 if a target was specified use it; it will not be used as an
9276 intermediate target unless it is safe. If no target, use a
9277 temporary. */
9278
9279 if (modifier != EXPAND_STACK_PARM
9280 && original_target
9281 && safe_from_p (original_target, treeop0, 1)
9282 && GET_MODE (original_target) == mode
9283 && !MEM_P (original_target))
9284 temp = original_target;
9285 else
9286 temp = assign_temp (type, 0, 1);
9287
9288 do_pending_stack_adjust ();
9289 NO_DEFER_POP;
9290 rtx_code_label *lab0 = gen_label_rtx ();
9291 rtx_code_label *lab1 = gen_label_rtx ();
9292 jumpifnot (treeop0, lab0, -1);
9293 store_expr (treeop1, temp,
9294 modifier == EXPAND_STACK_PARM,
9295 false);
9296
9297 emit_jump_insn (gen_jump (lab1));
9298 emit_barrier ();
9299 emit_label (lab0);
9300 store_expr (treeop2, temp,
9301 modifier == EXPAND_STACK_PARM,
9302 false);
9303
9304 emit_label (lab1);
9305 OK_DEFER_POP;
9306 return temp;
9307 }
9308
9309 case VEC_COND_EXPR:
9310 target = expand_vec_cond_expr (type, treeop0, treeop1, treeop2, target);
9311 return target;
9312
9313 default:
9314 gcc_unreachable ();
9315 }
9316
9317 /* Here to do an ordinary binary operator. */
9318 binop:
9319 expand_operands (treeop0, treeop1,
9320 subtarget, &op0, &op1, EXPAND_NORMAL);
9321 binop2:
9322 this_optab = optab_for_tree_code (code, type, optab_default);
9323 binop3:
9324 if (modifier == EXPAND_STACK_PARM)
9325 target = 0;
9326 temp = expand_binop (mode, this_optab, op0, op1, target,
9327 unsignedp, OPTAB_LIB_WIDEN);
9328 gcc_assert (temp);
9329 /* Bitwise operations do not need bitfield reduction as we expect their
9330 operands being properly truncated. */
9331 if (code == BIT_XOR_EXPR
9332 || code == BIT_AND_EXPR
9333 || code == BIT_IOR_EXPR)
9334 return temp;
9335 return REDUCE_BIT_FIELD (temp);
9336 }
9337 #undef REDUCE_BIT_FIELD
9338
9339
9340 /* Return TRUE if expression STMT is suitable for replacement.
9341 Never consider memory loads as replaceable, because those don't ever lead
9342 into constant expressions. */
9343
9344 static bool
9345 stmt_is_replaceable_p (gimple stmt)
9346 {
9347 if (ssa_is_replaceable_p (stmt))
9348 {
9349 /* Don't move around loads. */
9350 if (!gimple_assign_single_p (stmt)
9351 || is_gimple_val (gimple_assign_rhs1 (stmt)))
9352 return true;
9353 }
9354 return false;
9355 }
9356
9357 rtx
9358 expand_expr_real_1 (tree exp, rtx target, machine_mode tmode,
9359 enum expand_modifier modifier, rtx *alt_rtl,
9360 bool inner_reference_p)
9361 {
9362 rtx op0, op1, temp, decl_rtl;
9363 tree type;
9364 int unsignedp;
9365 machine_mode mode;
9366 enum tree_code code = TREE_CODE (exp);
9367 rtx subtarget, original_target;
9368 int ignore;
9369 tree context;
9370 bool reduce_bit_field;
9371 location_t loc = EXPR_LOCATION (exp);
9372 struct separate_ops ops;
9373 tree treeop0, treeop1, treeop2;
9374 tree ssa_name = NULL_TREE;
9375 gimple g;
9376
9377 type = TREE_TYPE (exp);
9378 mode = TYPE_MODE (type);
9379 unsignedp = TYPE_UNSIGNED (type);
9380
9381 treeop0 = treeop1 = treeop2 = NULL_TREE;
9382 if (!VL_EXP_CLASS_P (exp))
9383 switch (TREE_CODE_LENGTH (code))
9384 {
9385 default:
9386 case 3: treeop2 = TREE_OPERAND (exp, 2);
9387 case 2: treeop1 = TREE_OPERAND (exp, 1);
9388 case 1: treeop0 = TREE_OPERAND (exp, 0);
9389 case 0: break;
9390 }
9391 ops.code = code;
9392 ops.type = type;
9393 ops.op0 = treeop0;
9394 ops.op1 = treeop1;
9395 ops.op2 = treeop2;
9396 ops.location = loc;
9397
9398 ignore = (target == const0_rtx
9399 || ((CONVERT_EXPR_CODE_P (code)
9400 || code == COND_EXPR || code == VIEW_CONVERT_EXPR)
9401 && TREE_CODE (type) == VOID_TYPE));
9402
9403 /* An operation in what may be a bit-field type needs the
9404 result to be reduced to the precision of the bit-field type,
9405 which is narrower than that of the type's mode. */
9406 reduce_bit_field = (!ignore
9407 && INTEGRAL_TYPE_P (type)
9408 && GET_MODE_PRECISION (mode) > TYPE_PRECISION (type));
9409
9410 /* If we are going to ignore this result, we need only do something
9411 if there is a side-effect somewhere in the expression. If there
9412 is, short-circuit the most common cases here. Note that we must
9413 not call expand_expr with anything but const0_rtx in case this
9414 is an initial expansion of a size that contains a PLACEHOLDER_EXPR. */
9415
9416 if (ignore)
9417 {
9418 if (! TREE_SIDE_EFFECTS (exp))
9419 return const0_rtx;
9420
9421 /* Ensure we reference a volatile object even if value is ignored, but
9422 don't do this if all we are doing is taking its address. */
9423 if (TREE_THIS_VOLATILE (exp)
9424 && TREE_CODE (exp) != FUNCTION_DECL
9425 && mode != VOIDmode && mode != BLKmode
9426 && modifier != EXPAND_CONST_ADDRESS)
9427 {
9428 temp = expand_expr (exp, NULL_RTX, VOIDmode, modifier);
9429 if (MEM_P (temp))
9430 copy_to_reg (temp);
9431 return const0_rtx;
9432 }
9433
9434 if (TREE_CODE_CLASS (code) == tcc_unary
9435 || code == BIT_FIELD_REF
9436 || code == COMPONENT_REF
9437 || code == INDIRECT_REF)
9438 return expand_expr (treeop0, const0_rtx, VOIDmode,
9439 modifier);
9440
9441 else if (TREE_CODE_CLASS (code) == tcc_binary
9442 || TREE_CODE_CLASS (code) == tcc_comparison
9443 || code == ARRAY_REF || code == ARRAY_RANGE_REF)
9444 {
9445 expand_expr (treeop0, const0_rtx, VOIDmode, modifier);
9446 expand_expr (treeop1, const0_rtx, VOIDmode, modifier);
9447 return const0_rtx;
9448 }
9449
9450 target = 0;
9451 }
9452
9453 if (reduce_bit_field && modifier == EXPAND_STACK_PARM)
9454 target = 0;
9455
9456 /* Use subtarget as the target for operand 0 of a binary operation. */
9457 subtarget = get_subtarget (target);
9458 original_target = target;
9459
9460 switch (code)
9461 {
9462 case LABEL_DECL:
9463 {
9464 tree function = decl_function_context (exp);
9465
9466 temp = label_rtx (exp);
9467 temp = gen_rtx_LABEL_REF (Pmode, temp);
9468
9469 if (function != current_function_decl
9470 && function != 0)
9471 LABEL_REF_NONLOCAL_P (temp) = 1;
9472
9473 temp = gen_rtx_MEM (FUNCTION_MODE, temp);
9474 return temp;
9475 }
9476
9477 case SSA_NAME:
9478 /* ??? ivopts calls expander, without any preparation from
9479 out-of-ssa. So fake instructions as if this was an access to the
9480 base variable. This unnecessarily allocates a pseudo, see how we can
9481 reuse it, if partition base vars have it set already. */
9482 if (!currently_expanding_to_rtl)
9483 {
9484 tree var = SSA_NAME_VAR (exp);
9485 if (var && DECL_RTL_SET_P (var))
9486 return DECL_RTL (var);
9487 return gen_raw_REG (TYPE_MODE (TREE_TYPE (exp)),
9488 LAST_VIRTUAL_REGISTER + 1);
9489 }
9490
9491 g = get_gimple_for_ssa_name (exp);
9492 /* For EXPAND_INITIALIZER try harder to get something simpler. */
9493 if (g == NULL
9494 && modifier == EXPAND_INITIALIZER
9495 && !SSA_NAME_IS_DEFAULT_DEF (exp)
9496 && (optimize || DECL_IGNORED_P (SSA_NAME_VAR (exp)))
9497 && stmt_is_replaceable_p (SSA_NAME_DEF_STMT (exp)))
9498 g = SSA_NAME_DEF_STMT (exp);
9499 if (g)
9500 {
9501 rtx r;
9502 ops.code = gimple_assign_rhs_code (g);
9503 switch (get_gimple_rhs_class (ops.code))
9504 {
9505 case GIMPLE_TERNARY_RHS:
9506 ops.op2 = gimple_assign_rhs3 (g);
9507 /* Fallthru */
9508 case GIMPLE_BINARY_RHS:
9509 ops.op1 = gimple_assign_rhs2 (g);
9510
9511 /* Try to expand conditonal compare. */
9512 if (targetm.gen_ccmp_first)
9513 {
9514 gcc_checking_assert (targetm.gen_ccmp_next != NULL);
9515 r = expand_ccmp_expr (g);
9516 if (r)
9517 break;
9518 }
9519 /* Fallthru */
9520 case GIMPLE_UNARY_RHS:
9521 ops.op0 = gimple_assign_rhs1 (g);
9522 ops.type = TREE_TYPE (gimple_assign_lhs (g));
9523 ops.location = gimple_location (g);
9524 r = expand_expr_real_2 (&ops, target, tmode, modifier);
9525 break;
9526 case GIMPLE_SINGLE_RHS:
9527 {
9528 location_t saved_loc = curr_insn_location ();
9529 set_curr_insn_location (gimple_location (g));
9530 r = expand_expr_real (gimple_assign_rhs1 (g), target,
9531 tmode, modifier, NULL, inner_reference_p);
9532 set_curr_insn_location (saved_loc);
9533 break;
9534 }
9535 default:
9536 gcc_unreachable ();
9537 }
9538 if (REG_P (r) && !REG_EXPR (r))
9539 set_reg_attrs_for_decl_rtl (SSA_NAME_VAR (exp), r);
9540 return r;
9541 }
9542
9543 ssa_name = exp;
9544 decl_rtl = get_rtx_for_ssa_name (ssa_name);
9545 exp = SSA_NAME_VAR (ssa_name);
9546 goto expand_decl_rtl;
9547
9548 case PARM_DECL:
9549 case VAR_DECL:
9550 /* If a static var's type was incomplete when the decl was written,
9551 but the type is complete now, lay out the decl now. */
9552 if (DECL_SIZE (exp) == 0
9553 && COMPLETE_OR_UNBOUND_ARRAY_TYPE_P (TREE_TYPE (exp))
9554 && (TREE_STATIC (exp) || DECL_EXTERNAL (exp)))
9555 layout_decl (exp, 0);
9556
9557 /* ... fall through ... */
9558
9559 case FUNCTION_DECL:
9560 case RESULT_DECL:
9561 decl_rtl = DECL_RTL (exp);
9562 expand_decl_rtl:
9563 gcc_assert (decl_rtl);
9564 decl_rtl = copy_rtx (decl_rtl);
9565 /* Record writes to register variables. */
9566 if (modifier == EXPAND_WRITE
9567 && REG_P (decl_rtl)
9568 && HARD_REGISTER_P (decl_rtl))
9569 add_to_hard_reg_set (&crtl->asm_clobbers,
9570 GET_MODE (decl_rtl), REGNO (decl_rtl));
9571
9572 /* Ensure variable marked as used even if it doesn't go through
9573 a parser. If it hasn't be used yet, write out an external
9574 definition. */
9575 TREE_USED (exp) = 1;
9576
9577 /* Show we haven't gotten RTL for this yet. */
9578 temp = 0;
9579
9580 /* Variables inherited from containing functions should have
9581 been lowered by this point. */
9582 context = decl_function_context (exp);
9583 gcc_assert (SCOPE_FILE_SCOPE_P (context)
9584 || context == current_function_decl
9585 || TREE_STATIC (exp)
9586 || DECL_EXTERNAL (exp)
9587 /* ??? C++ creates functions that are not TREE_STATIC. */
9588 || TREE_CODE (exp) == FUNCTION_DECL);
9589
9590 /* This is the case of an array whose size is to be determined
9591 from its initializer, while the initializer is still being parsed.
9592 ??? We aren't parsing while expanding anymore. */
9593
9594 if (MEM_P (decl_rtl) && REG_P (XEXP (decl_rtl, 0)))
9595 temp = validize_mem (decl_rtl);
9596
9597 /* If DECL_RTL is memory, we are in the normal case and the
9598 address is not valid, get the address into a register. */
9599
9600 else if (MEM_P (decl_rtl) && modifier != EXPAND_INITIALIZER)
9601 {
9602 if (alt_rtl)
9603 *alt_rtl = decl_rtl;
9604 decl_rtl = use_anchored_address (decl_rtl);
9605 if (modifier != EXPAND_CONST_ADDRESS
9606 && modifier != EXPAND_SUM
9607 && !memory_address_addr_space_p (DECL_MODE (exp),
9608 XEXP (decl_rtl, 0),
9609 MEM_ADDR_SPACE (decl_rtl)))
9610 temp = replace_equiv_address (decl_rtl,
9611 copy_rtx (XEXP (decl_rtl, 0)));
9612 }
9613
9614 /* If we got something, return it. But first, set the alignment
9615 if the address is a register. */
9616 if (temp != 0)
9617 {
9618 if (MEM_P (temp) && REG_P (XEXP (temp, 0)))
9619 mark_reg_pointer (XEXP (temp, 0), DECL_ALIGN (exp));
9620
9621 return temp;
9622 }
9623
9624 /* If the mode of DECL_RTL does not match that of the decl,
9625 there are two cases: we are dealing with a BLKmode value
9626 that is returned in a register, or we are dealing with
9627 a promoted value. In the latter case, return a SUBREG
9628 of the wanted mode, but mark it so that we know that it
9629 was already extended. */
9630 if (REG_P (decl_rtl)
9631 && DECL_MODE (exp) != BLKmode
9632 && GET_MODE (decl_rtl) != DECL_MODE (exp))
9633 {
9634 machine_mode pmode;
9635
9636 /* Get the signedness to be used for this variable. Ensure we get
9637 the same mode we got when the variable was declared. */
9638 if (code == SSA_NAME
9639 && (g = SSA_NAME_DEF_STMT (ssa_name))
9640 && gimple_code (g) == GIMPLE_CALL
9641 && !gimple_call_internal_p (g))
9642 pmode = promote_function_mode (type, mode, &unsignedp,
9643 gimple_call_fntype (g),
9644 2);
9645 else
9646 pmode = promote_decl_mode (exp, &unsignedp);
9647 gcc_assert (GET_MODE (decl_rtl) == pmode);
9648
9649 temp = gen_lowpart_SUBREG (mode, decl_rtl);
9650 SUBREG_PROMOTED_VAR_P (temp) = 1;
9651 SUBREG_PROMOTED_SET (temp, unsignedp);
9652 return temp;
9653 }
9654
9655 return decl_rtl;
9656
9657 case INTEGER_CST:
9658 /* Given that TYPE_PRECISION (type) is not always equal to
9659 GET_MODE_PRECISION (TYPE_MODE (type)), we need to extend from
9660 the former to the latter according to the signedness of the
9661 type. */
9662 temp = immed_wide_int_const (wide_int::from
9663 (exp,
9664 GET_MODE_PRECISION (TYPE_MODE (type)),
9665 TYPE_SIGN (type)),
9666 TYPE_MODE (type));
9667 return temp;
9668
9669 case VECTOR_CST:
9670 {
9671 tree tmp = NULL_TREE;
9672 if (GET_MODE_CLASS (mode) == MODE_VECTOR_INT
9673 || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT
9674 || GET_MODE_CLASS (mode) == MODE_VECTOR_FRACT
9675 || GET_MODE_CLASS (mode) == MODE_VECTOR_UFRACT
9676 || GET_MODE_CLASS (mode) == MODE_VECTOR_ACCUM
9677 || GET_MODE_CLASS (mode) == MODE_VECTOR_UACCUM)
9678 return const_vector_from_tree (exp);
9679 if (GET_MODE_CLASS (mode) == MODE_INT)
9680 {
9681 tree type_for_mode = lang_hooks.types.type_for_mode (mode, 1);
9682 if (type_for_mode)
9683 tmp = fold_unary_loc (loc, VIEW_CONVERT_EXPR, type_for_mode, exp);
9684 }
9685 if (!tmp)
9686 {
9687 vec<constructor_elt, va_gc> *v;
9688 unsigned i;
9689 vec_alloc (v, VECTOR_CST_NELTS (exp));
9690 for (i = 0; i < VECTOR_CST_NELTS (exp); ++i)
9691 CONSTRUCTOR_APPEND_ELT (v, NULL_TREE, VECTOR_CST_ELT (exp, i));
9692 tmp = build_constructor (type, v);
9693 }
9694 return expand_expr (tmp, ignore ? const0_rtx : target,
9695 tmode, modifier);
9696 }
9697
9698 case CONST_DECL:
9699 return expand_expr (DECL_INITIAL (exp), target, VOIDmode, modifier);
9700
9701 case REAL_CST:
9702 /* If optimized, generate immediate CONST_DOUBLE
9703 which will be turned into memory by reload if necessary.
9704
9705 We used to force a register so that loop.c could see it. But
9706 this does not allow gen_* patterns to perform optimizations with
9707 the constants. It also produces two insns in cases like "x = 1.0;".
9708 On most machines, floating-point constants are not permitted in
9709 many insns, so we'd end up copying it to a register in any case.
9710
9711 Now, we do the copying in expand_binop, if appropriate. */
9712 return CONST_DOUBLE_FROM_REAL_VALUE (TREE_REAL_CST (exp),
9713 TYPE_MODE (TREE_TYPE (exp)));
9714
9715 case FIXED_CST:
9716 return CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (exp),
9717 TYPE_MODE (TREE_TYPE (exp)));
9718
9719 case COMPLEX_CST:
9720 /* Handle evaluating a complex constant in a CONCAT target. */
9721 if (original_target && GET_CODE (original_target) == CONCAT)
9722 {
9723 machine_mode mode = TYPE_MODE (TREE_TYPE (TREE_TYPE (exp)));
9724 rtx rtarg, itarg;
9725
9726 rtarg = XEXP (original_target, 0);
9727 itarg = XEXP (original_target, 1);
9728
9729 /* Move the real and imaginary parts separately. */
9730 op0 = expand_expr (TREE_REALPART (exp), rtarg, mode, EXPAND_NORMAL);
9731 op1 = expand_expr (TREE_IMAGPART (exp), itarg, mode, EXPAND_NORMAL);
9732
9733 if (op0 != rtarg)
9734 emit_move_insn (rtarg, op0);
9735 if (op1 != itarg)
9736 emit_move_insn (itarg, op1);
9737
9738 return original_target;
9739 }
9740
9741 /* ... fall through ... */
9742
9743 case STRING_CST:
9744 temp = expand_expr_constant (exp, 1, modifier);
9745
9746 /* temp contains a constant address.
9747 On RISC machines where a constant address isn't valid,
9748 make some insns to get that address into a register. */
9749 if (modifier != EXPAND_CONST_ADDRESS
9750 && modifier != EXPAND_INITIALIZER
9751 && modifier != EXPAND_SUM
9752 && ! memory_address_addr_space_p (mode, XEXP (temp, 0),
9753 MEM_ADDR_SPACE (temp)))
9754 return replace_equiv_address (temp,
9755 copy_rtx (XEXP (temp, 0)));
9756 return temp;
9757
9758 case SAVE_EXPR:
9759 {
9760 tree val = treeop0;
9761 rtx ret = expand_expr_real_1 (val, target, tmode, modifier, alt_rtl,
9762 inner_reference_p);
9763
9764 if (!SAVE_EXPR_RESOLVED_P (exp))
9765 {
9766 /* We can indeed still hit this case, typically via builtin
9767 expanders calling save_expr immediately before expanding
9768 something. Assume this means that we only have to deal
9769 with non-BLKmode values. */
9770 gcc_assert (GET_MODE (ret) != BLKmode);
9771
9772 val = build_decl (curr_insn_location (),
9773 VAR_DECL, NULL, TREE_TYPE (exp));
9774 DECL_ARTIFICIAL (val) = 1;
9775 DECL_IGNORED_P (val) = 1;
9776 treeop0 = val;
9777 TREE_OPERAND (exp, 0) = treeop0;
9778 SAVE_EXPR_RESOLVED_P (exp) = 1;
9779
9780 if (!CONSTANT_P (ret))
9781 ret = copy_to_reg (ret);
9782 SET_DECL_RTL (val, ret);
9783 }
9784
9785 return ret;
9786 }
9787
9788
9789 case CONSTRUCTOR:
9790 /* If we don't need the result, just ensure we evaluate any
9791 subexpressions. */
9792 if (ignore)
9793 {
9794 unsigned HOST_WIDE_INT idx;
9795 tree value;
9796
9797 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value)
9798 expand_expr (value, const0_rtx, VOIDmode, EXPAND_NORMAL);
9799
9800 return const0_rtx;
9801 }
9802
9803 return expand_constructor (exp, target, modifier, false);
9804
9805 case TARGET_MEM_REF:
9806 {
9807 addr_space_t as
9808 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0))));
9809 enum insn_code icode;
9810 unsigned int align;
9811
9812 op0 = addr_for_mem_ref (exp, as, true);
9813 op0 = memory_address_addr_space (mode, op0, as);
9814 temp = gen_rtx_MEM (mode, op0);
9815 set_mem_attributes (temp, exp, 0);
9816 set_mem_addr_space (temp, as);
9817 align = get_object_alignment (exp);
9818 if (modifier != EXPAND_WRITE
9819 && modifier != EXPAND_MEMORY
9820 && mode != BLKmode
9821 && align < GET_MODE_ALIGNMENT (mode)
9822 /* If the target does not have special handling for unaligned
9823 loads of mode then it can use regular moves for them. */
9824 && ((icode = optab_handler (movmisalign_optab, mode))
9825 != CODE_FOR_nothing))
9826 {
9827 struct expand_operand ops[2];
9828
9829 /* We've already validated the memory, and we're creating a
9830 new pseudo destination. The predicates really can't fail,
9831 nor can the generator. */
9832 create_output_operand (&ops[0], NULL_RTX, mode);
9833 create_fixed_operand (&ops[1], temp);
9834 expand_insn (icode, 2, ops);
9835 temp = ops[0].value;
9836 }
9837 return temp;
9838 }
9839
9840 case MEM_REF:
9841 {
9842 addr_space_t as
9843 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0))));
9844 machine_mode address_mode;
9845 tree base = TREE_OPERAND (exp, 0);
9846 gimple def_stmt;
9847 enum insn_code icode;
9848 unsigned align;
9849 /* Handle expansion of non-aliased memory with non-BLKmode. That
9850 might end up in a register. */
9851 if (mem_ref_refers_to_non_mem_p (exp))
9852 {
9853 HOST_WIDE_INT offset = mem_ref_offset (exp).to_short_addr ();
9854 base = TREE_OPERAND (base, 0);
9855 if (offset == 0
9856 && tree_fits_uhwi_p (TYPE_SIZE (type))
9857 && (GET_MODE_BITSIZE (DECL_MODE (base))
9858 == tree_to_uhwi (TYPE_SIZE (type))))
9859 return expand_expr (build1 (VIEW_CONVERT_EXPR, type, base),
9860 target, tmode, modifier);
9861 if (TYPE_MODE (type) == BLKmode)
9862 {
9863 temp = assign_stack_temp (DECL_MODE (base),
9864 GET_MODE_SIZE (DECL_MODE (base)));
9865 store_expr (base, temp, 0, false);
9866 temp = adjust_address (temp, BLKmode, offset);
9867 set_mem_size (temp, int_size_in_bytes (type));
9868 return temp;
9869 }
9870 exp = build3 (BIT_FIELD_REF, type, base, TYPE_SIZE (type),
9871 bitsize_int (offset * BITS_PER_UNIT));
9872 return expand_expr (exp, target, tmode, modifier);
9873 }
9874 address_mode = targetm.addr_space.address_mode (as);
9875 base = TREE_OPERAND (exp, 0);
9876 if ((def_stmt = get_def_for_expr (base, BIT_AND_EXPR)))
9877 {
9878 tree mask = gimple_assign_rhs2 (def_stmt);
9879 base = build2 (BIT_AND_EXPR, TREE_TYPE (base),
9880 gimple_assign_rhs1 (def_stmt), mask);
9881 TREE_OPERAND (exp, 0) = base;
9882 }
9883 align = get_object_alignment (exp);
9884 op0 = expand_expr (base, NULL_RTX, VOIDmode, EXPAND_SUM);
9885 op0 = memory_address_addr_space (mode, op0, as);
9886 if (!integer_zerop (TREE_OPERAND (exp, 1)))
9887 {
9888 rtx off = immed_wide_int_const (mem_ref_offset (exp), address_mode);
9889 op0 = simplify_gen_binary (PLUS, address_mode, op0, off);
9890 op0 = memory_address_addr_space (mode, op0, as);
9891 }
9892 temp = gen_rtx_MEM (mode, op0);
9893 set_mem_attributes (temp, exp, 0);
9894 set_mem_addr_space (temp, as);
9895 if (TREE_THIS_VOLATILE (exp))
9896 MEM_VOLATILE_P (temp) = 1;
9897 if (modifier != EXPAND_WRITE
9898 && modifier != EXPAND_MEMORY
9899 && !inner_reference_p
9900 && mode != BLKmode
9901 && align < GET_MODE_ALIGNMENT (mode))
9902 {
9903 if ((icode = optab_handler (movmisalign_optab, mode))
9904 != CODE_FOR_nothing)
9905 {
9906 struct expand_operand ops[2];
9907
9908 /* We've already validated the memory, and we're creating a
9909 new pseudo destination. The predicates really can't fail,
9910 nor can the generator. */
9911 create_output_operand (&ops[0], NULL_RTX, mode);
9912 create_fixed_operand (&ops[1], temp);
9913 expand_insn (icode, 2, ops);
9914 temp = ops[0].value;
9915 }
9916 else if (SLOW_UNALIGNED_ACCESS (mode, align))
9917 temp = extract_bit_field (temp, GET_MODE_BITSIZE (mode),
9918 0, TYPE_UNSIGNED (TREE_TYPE (exp)),
9919 (modifier == EXPAND_STACK_PARM
9920 ? NULL_RTX : target),
9921 mode, mode);
9922 }
9923 return temp;
9924 }
9925
9926 case ARRAY_REF:
9927
9928 {
9929 tree array = treeop0;
9930 tree index = treeop1;
9931 tree init;
9932
9933 /* Fold an expression like: "foo"[2].
9934 This is not done in fold so it won't happen inside &.
9935 Don't fold if this is for wide characters since it's too
9936 difficult to do correctly and this is a very rare case. */
9937
9938 if (modifier != EXPAND_CONST_ADDRESS
9939 && modifier != EXPAND_INITIALIZER
9940 && modifier != EXPAND_MEMORY)
9941 {
9942 tree t = fold_read_from_constant_string (exp);
9943
9944 if (t)
9945 return expand_expr (t, target, tmode, modifier);
9946 }
9947
9948 /* If this is a constant index into a constant array,
9949 just get the value from the array. Handle both the cases when
9950 we have an explicit constructor and when our operand is a variable
9951 that was declared const. */
9952
9953 if (modifier != EXPAND_CONST_ADDRESS
9954 && modifier != EXPAND_INITIALIZER
9955 && modifier != EXPAND_MEMORY
9956 && TREE_CODE (array) == CONSTRUCTOR
9957 && ! TREE_SIDE_EFFECTS (array)
9958 && TREE_CODE (index) == INTEGER_CST)
9959 {
9960 unsigned HOST_WIDE_INT ix;
9961 tree field, value;
9962
9963 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (array), ix,
9964 field, value)
9965 if (tree_int_cst_equal (field, index))
9966 {
9967 if (!TREE_SIDE_EFFECTS (value))
9968 return expand_expr (fold (value), target, tmode, modifier);
9969 break;
9970 }
9971 }
9972
9973 else if (optimize >= 1
9974 && modifier != EXPAND_CONST_ADDRESS
9975 && modifier != EXPAND_INITIALIZER
9976 && modifier != EXPAND_MEMORY
9977 && TREE_READONLY (array) && ! TREE_SIDE_EFFECTS (array)
9978 && TREE_CODE (index) == INTEGER_CST
9979 && (TREE_CODE (array) == VAR_DECL
9980 || TREE_CODE (array) == CONST_DECL)
9981 && (init = ctor_for_folding (array)) != error_mark_node)
9982 {
9983 if (init == NULL_TREE)
9984 {
9985 tree value = build_zero_cst (type);
9986 if (TREE_CODE (value) == CONSTRUCTOR)
9987 {
9988 /* If VALUE is a CONSTRUCTOR, this optimization is only
9989 useful if this doesn't store the CONSTRUCTOR into
9990 memory. If it does, it is more efficient to just
9991 load the data from the array directly. */
9992 rtx ret = expand_constructor (value, target,
9993 modifier, true);
9994 if (ret == NULL_RTX)
9995 value = NULL_TREE;
9996 }
9997
9998 if (value)
9999 return expand_expr (value, target, tmode, modifier);
10000 }
10001 else if (TREE_CODE (init) == CONSTRUCTOR)
10002 {
10003 unsigned HOST_WIDE_INT ix;
10004 tree field, value;
10005
10006 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (init), ix,
10007 field, value)
10008 if (tree_int_cst_equal (field, index))
10009 {
10010 if (TREE_SIDE_EFFECTS (value))
10011 break;
10012
10013 if (TREE_CODE (value) == CONSTRUCTOR)
10014 {
10015 /* If VALUE is a CONSTRUCTOR, this
10016 optimization is only useful if
10017 this doesn't store the CONSTRUCTOR
10018 into memory. If it does, it is more
10019 efficient to just load the data from
10020 the array directly. */
10021 rtx ret = expand_constructor (value, target,
10022 modifier, true);
10023 if (ret == NULL_RTX)
10024 break;
10025 }
10026
10027 return
10028 expand_expr (fold (value), target, tmode, modifier);
10029 }
10030 }
10031 else if (TREE_CODE (init) == STRING_CST)
10032 {
10033 tree low_bound = array_ref_low_bound (exp);
10034 tree index1 = fold_convert_loc (loc, sizetype, treeop1);
10035
10036 /* Optimize the special case of a zero lower bound.
10037
10038 We convert the lower bound to sizetype to avoid problems
10039 with constant folding. E.g. suppose the lower bound is
10040 1 and its mode is QI. Without the conversion
10041 (ARRAY + (INDEX - (unsigned char)1))
10042 becomes
10043 (ARRAY + (-(unsigned char)1) + INDEX)
10044 which becomes
10045 (ARRAY + 255 + INDEX). Oops! */
10046 if (!integer_zerop (low_bound))
10047 index1 = size_diffop_loc (loc, index1,
10048 fold_convert_loc (loc, sizetype,
10049 low_bound));
10050
10051 if (compare_tree_int (index1, TREE_STRING_LENGTH (init)) < 0)
10052 {
10053 tree type = TREE_TYPE (TREE_TYPE (init));
10054 machine_mode mode = TYPE_MODE (type);
10055
10056 if (GET_MODE_CLASS (mode) == MODE_INT
10057 && GET_MODE_SIZE (mode) == 1)
10058 return gen_int_mode (TREE_STRING_POINTER (init)
10059 [TREE_INT_CST_LOW (index1)],
10060 mode);
10061 }
10062 }
10063 }
10064 }
10065 goto normal_inner_ref;
10066
10067 case COMPONENT_REF:
10068 /* If the operand is a CONSTRUCTOR, we can just extract the
10069 appropriate field if it is present. */
10070 if (TREE_CODE (treeop0) == CONSTRUCTOR)
10071 {
10072 unsigned HOST_WIDE_INT idx;
10073 tree field, value;
10074
10075 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (treeop0),
10076 idx, field, value)
10077 if (field == treeop1
10078 /* We can normally use the value of the field in the
10079 CONSTRUCTOR. However, if this is a bitfield in
10080 an integral mode that we can fit in a HOST_WIDE_INT,
10081 we must mask only the number of bits in the bitfield,
10082 since this is done implicitly by the constructor. If
10083 the bitfield does not meet either of those conditions,
10084 we can't do this optimization. */
10085 && (! DECL_BIT_FIELD (field)
10086 || ((GET_MODE_CLASS (DECL_MODE (field)) == MODE_INT)
10087 && (GET_MODE_PRECISION (DECL_MODE (field))
10088 <= HOST_BITS_PER_WIDE_INT))))
10089 {
10090 if (DECL_BIT_FIELD (field)
10091 && modifier == EXPAND_STACK_PARM)
10092 target = 0;
10093 op0 = expand_expr (value, target, tmode, modifier);
10094 if (DECL_BIT_FIELD (field))
10095 {
10096 HOST_WIDE_INT bitsize = TREE_INT_CST_LOW (DECL_SIZE (field));
10097 machine_mode imode = TYPE_MODE (TREE_TYPE (field));
10098
10099 if (TYPE_UNSIGNED (TREE_TYPE (field)))
10100 {
10101 op1 = gen_int_mode (((HOST_WIDE_INT) 1 << bitsize) - 1,
10102 imode);
10103 op0 = expand_and (imode, op0, op1, target);
10104 }
10105 else
10106 {
10107 int count = GET_MODE_PRECISION (imode) - bitsize;
10108
10109 op0 = expand_shift (LSHIFT_EXPR, imode, op0, count,
10110 target, 0);
10111 op0 = expand_shift (RSHIFT_EXPR, imode, op0, count,
10112 target, 0);
10113 }
10114 }
10115
10116 return op0;
10117 }
10118 }
10119 goto normal_inner_ref;
10120
10121 case BIT_FIELD_REF:
10122 case ARRAY_RANGE_REF:
10123 normal_inner_ref:
10124 {
10125 machine_mode mode1, mode2;
10126 HOST_WIDE_INT bitsize, bitpos;
10127 tree offset;
10128 int volatilep = 0, must_force_mem;
10129 tree tem = get_inner_reference (exp, &bitsize, &bitpos, &offset,
10130 &mode1, &unsignedp, &volatilep, true);
10131 rtx orig_op0, memloc;
10132 bool clear_mem_expr = false;
10133
10134 /* If we got back the original object, something is wrong. Perhaps
10135 we are evaluating an expression too early. In any event, don't
10136 infinitely recurse. */
10137 gcc_assert (tem != exp);
10138
10139 /* If TEM's type is a union of variable size, pass TARGET to the inner
10140 computation, since it will need a temporary and TARGET is known
10141 to have to do. This occurs in unchecked conversion in Ada. */
10142 orig_op0 = op0
10143 = expand_expr_real (tem,
10144 (TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE
10145 && COMPLETE_TYPE_P (TREE_TYPE (tem))
10146 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem)))
10147 != INTEGER_CST)
10148 && modifier != EXPAND_STACK_PARM
10149 ? target : NULL_RTX),
10150 VOIDmode,
10151 modifier == EXPAND_SUM ? EXPAND_NORMAL : modifier,
10152 NULL, true);
10153
10154 /* If the field has a mode, we want to access it in the
10155 field's mode, not the computed mode.
10156 If a MEM has VOIDmode (external with incomplete type),
10157 use BLKmode for it instead. */
10158 if (MEM_P (op0))
10159 {
10160 if (mode1 != VOIDmode)
10161 op0 = adjust_address (op0, mode1, 0);
10162 else if (GET_MODE (op0) == VOIDmode)
10163 op0 = adjust_address (op0, BLKmode, 0);
10164 }
10165
10166 mode2
10167 = CONSTANT_P (op0) ? TYPE_MODE (TREE_TYPE (tem)) : GET_MODE (op0);
10168
10169 /* If we have either an offset, a BLKmode result, or a reference
10170 outside the underlying object, we must force it to memory.
10171 Such a case can occur in Ada if we have unchecked conversion
10172 of an expression from a scalar type to an aggregate type or
10173 for an ARRAY_RANGE_REF whose type is BLKmode, or if we were
10174 passed a partially uninitialized object or a view-conversion
10175 to a larger size. */
10176 must_force_mem = (offset
10177 || mode1 == BLKmode
10178 || bitpos + bitsize > GET_MODE_BITSIZE (mode2));
10179
10180 /* Handle CONCAT first. */
10181 if (GET_CODE (op0) == CONCAT && !must_force_mem)
10182 {
10183 if (bitpos == 0
10184 && bitsize == GET_MODE_BITSIZE (GET_MODE (op0)))
10185 return op0;
10186 if (bitpos == 0
10187 && bitsize == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 0)))
10188 && bitsize)
10189 {
10190 op0 = XEXP (op0, 0);
10191 mode2 = GET_MODE (op0);
10192 }
10193 else if (bitpos == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 0)))
10194 && bitsize == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 1)))
10195 && bitpos
10196 && bitsize)
10197 {
10198 op0 = XEXP (op0, 1);
10199 bitpos = 0;
10200 mode2 = GET_MODE (op0);
10201 }
10202 else
10203 /* Otherwise force into memory. */
10204 must_force_mem = 1;
10205 }
10206
10207 /* If this is a constant, put it in a register if it is a legitimate
10208 constant and we don't need a memory reference. */
10209 if (CONSTANT_P (op0)
10210 && mode2 != BLKmode
10211 && targetm.legitimate_constant_p (mode2, op0)
10212 && !must_force_mem)
10213 op0 = force_reg (mode2, op0);
10214
10215 /* Otherwise, if this is a constant, try to force it to the constant
10216 pool. Note that back-ends, e.g. MIPS, may refuse to do so if it
10217 is a legitimate constant. */
10218 else if (CONSTANT_P (op0) && (memloc = force_const_mem (mode2, op0)))
10219 op0 = validize_mem (memloc);
10220
10221 /* Otherwise, if this is a constant or the object is not in memory
10222 and need be, put it there. */
10223 else if (CONSTANT_P (op0) || (!MEM_P (op0) && must_force_mem))
10224 {
10225 memloc = assign_temp (TREE_TYPE (tem), 1, 1);
10226 emit_move_insn (memloc, op0);
10227 op0 = memloc;
10228 clear_mem_expr = true;
10229 }
10230
10231 if (offset)
10232 {
10233 machine_mode address_mode;
10234 rtx offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode,
10235 EXPAND_SUM);
10236
10237 gcc_assert (MEM_P (op0));
10238
10239 address_mode = get_address_mode (op0);
10240 if (GET_MODE (offset_rtx) != address_mode)
10241 {
10242 /* We cannot be sure that the RTL in offset_rtx is valid outside
10243 of a memory address context, so force it into a register
10244 before attempting to convert it to the desired mode. */
10245 offset_rtx = force_operand (offset_rtx, NULL_RTX);
10246 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
10247 }
10248
10249 /* See the comment in expand_assignment for the rationale. */
10250 if (mode1 != VOIDmode
10251 && bitpos != 0
10252 && bitsize > 0
10253 && (bitpos % bitsize) == 0
10254 && (bitsize % GET_MODE_ALIGNMENT (mode1)) == 0
10255 && MEM_ALIGN (op0) >= GET_MODE_ALIGNMENT (mode1))
10256 {
10257 op0 = adjust_address (op0, mode1, bitpos / BITS_PER_UNIT);
10258 bitpos = 0;
10259 }
10260
10261 op0 = offset_address (op0, offset_rtx,
10262 highest_pow2_factor (offset));
10263 }
10264
10265 /* If OFFSET is making OP0 more aligned than BIGGEST_ALIGNMENT,
10266 record its alignment as BIGGEST_ALIGNMENT. */
10267 if (MEM_P (op0) && bitpos == 0 && offset != 0
10268 && is_aligning_offset (offset, tem))
10269 set_mem_align (op0, BIGGEST_ALIGNMENT);
10270
10271 /* Don't forget about volatility even if this is a bitfield. */
10272 if (MEM_P (op0) && volatilep && ! MEM_VOLATILE_P (op0))
10273 {
10274 if (op0 == orig_op0)
10275 op0 = copy_rtx (op0);
10276
10277 MEM_VOLATILE_P (op0) = 1;
10278 }
10279
10280 /* In cases where an aligned union has an unaligned object
10281 as a field, we might be extracting a BLKmode value from
10282 an integer-mode (e.g., SImode) object. Handle this case
10283 by doing the extract into an object as wide as the field
10284 (which we know to be the width of a basic mode), then
10285 storing into memory, and changing the mode to BLKmode. */
10286 if (mode1 == VOIDmode
10287 || REG_P (op0) || GET_CODE (op0) == SUBREG
10288 || (mode1 != BLKmode && ! direct_load[(int) mode1]
10289 && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
10290 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT
10291 && modifier != EXPAND_CONST_ADDRESS
10292 && modifier != EXPAND_INITIALIZER
10293 && modifier != EXPAND_MEMORY)
10294 /* If the bitfield is volatile and the bitsize
10295 is narrower than the access size of the bitfield,
10296 we need to extract bitfields from the access. */
10297 || (volatilep && TREE_CODE (exp) == COMPONENT_REF
10298 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (exp, 1))
10299 && mode1 != BLKmode
10300 && bitsize < GET_MODE_SIZE (mode1) * BITS_PER_UNIT)
10301 /* If the field isn't aligned enough to fetch as a memref,
10302 fetch it as a bit field. */
10303 || (mode1 != BLKmode
10304 && (((TYPE_ALIGN (TREE_TYPE (tem)) < GET_MODE_ALIGNMENT (mode)
10305 || (bitpos % GET_MODE_ALIGNMENT (mode) != 0)
10306 || (MEM_P (op0)
10307 && (MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode1)
10308 || (bitpos % GET_MODE_ALIGNMENT (mode1) != 0))))
10309 && modifier != EXPAND_MEMORY
10310 && ((modifier == EXPAND_CONST_ADDRESS
10311 || modifier == EXPAND_INITIALIZER)
10312 ? STRICT_ALIGNMENT
10313 : SLOW_UNALIGNED_ACCESS (mode1, MEM_ALIGN (op0))))
10314 || (bitpos % BITS_PER_UNIT != 0)))
10315 /* If the type and the field are a constant size and the
10316 size of the type isn't the same size as the bitfield,
10317 we must use bitfield operations. */
10318 || (bitsize >= 0
10319 && TYPE_SIZE (TREE_TYPE (exp))
10320 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
10321 && 0 != compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)),
10322 bitsize)))
10323 {
10324 machine_mode ext_mode = mode;
10325
10326 if (ext_mode == BLKmode
10327 && ! (target != 0 && MEM_P (op0)
10328 && MEM_P (target)
10329 && bitpos % BITS_PER_UNIT == 0))
10330 ext_mode = mode_for_size (bitsize, MODE_INT, 1);
10331
10332 if (ext_mode == BLKmode)
10333 {
10334 if (target == 0)
10335 target = assign_temp (type, 1, 1);
10336
10337 /* ??? Unlike the similar test a few lines below, this one is
10338 very likely obsolete. */
10339 if (bitsize == 0)
10340 return target;
10341
10342 /* In this case, BITPOS must start at a byte boundary and
10343 TARGET, if specified, must be a MEM. */
10344 gcc_assert (MEM_P (op0)
10345 && (!target || MEM_P (target))
10346 && !(bitpos % BITS_PER_UNIT));
10347
10348 emit_block_move (target,
10349 adjust_address (op0, VOIDmode,
10350 bitpos / BITS_PER_UNIT),
10351 GEN_INT ((bitsize + BITS_PER_UNIT - 1)
10352 / BITS_PER_UNIT),
10353 (modifier == EXPAND_STACK_PARM
10354 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
10355
10356 return target;
10357 }
10358
10359 /* If we have nothing to extract, the result will be 0 for targets
10360 with SHIFT_COUNT_TRUNCATED == 0 and garbage otherwise. Always
10361 return 0 for the sake of consistency, as reading a zero-sized
10362 bitfield is valid in Ada and the value is fully specified. */
10363 if (bitsize == 0)
10364 return const0_rtx;
10365
10366 op0 = validize_mem (op0);
10367
10368 if (MEM_P (op0) && REG_P (XEXP (op0, 0)))
10369 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
10370
10371 op0 = extract_bit_field (op0, bitsize, bitpos, unsignedp,
10372 (modifier == EXPAND_STACK_PARM
10373 ? NULL_RTX : target),
10374 ext_mode, ext_mode);
10375
10376 /* If the result is a record type and BITSIZE is narrower than
10377 the mode of OP0, an integral mode, and this is a big endian
10378 machine, we must put the field into the high-order bits. */
10379 if (TREE_CODE (type) == RECORD_TYPE && BYTES_BIG_ENDIAN
10380 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT
10381 && bitsize < (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (op0)))
10382 op0 = expand_shift (LSHIFT_EXPR, GET_MODE (op0), op0,
10383 GET_MODE_BITSIZE (GET_MODE (op0))
10384 - bitsize, op0, 1);
10385
10386 /* If the result type is BLKmode, store the data into a temporary
10387 of the appropriate type, but with the mode corresponding to the
10388 mode for the data we have (op0's mode). */
10389 if (mode == BLKmode)
10390 {
10391 rtx new_rtx
10392 = assign_stack_temp_for_type (ext_mode,
10393 GET_MODE_BITSIZE (ext_mode),
10394 type);
10395 emit_move_insn (new_rtx, op0);
10396 op0 = copy_rtx (new_rtx);
10397 PUT_MODE (op0, BLKmode);
10398 }
10399
10400 return op0;
10401 }
10402
10403 /* If the result is BLKmode, use that to access the object
10404 now as well. */
10405 if (mode == BLKmode)
10406 mode1 = BLKmode;
10407
10408 /* Get a reference to just this component. */
10409 if (modifier == EXPAND_CONST_ADDRESS
10410 || modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
10411 op0 = adjust_address_nv (op0, mode1, bitpos / BITS_PER_UNIT);
10412 else
10413 op0 = adjust_address (op0, mode1, bitpos / BITS_PER_UNIT);
10414
10415 if (op0 == orig_op0)
10416 op0 = copy_rtx (op0);
10417
10418 set_mem_attributes (op0, exp, 0);
10419
10420 if (REG_P (XEXP (op0, 0)))
10421 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
10422
10423 /* If op0 is a temporary because the original expressions was forced
10424 to memory, clear MEM_EXPR so that the original expression cannot
10425 be marked as addressable through MEM_EXPR of the temporary. */
10426 if (clear_mem_expr)
10427 set_mem_expr (op0, NULL_TREE);
10428
10429 MEM_VOLATILE_P (op0) |= volatilep;
10430 if (mode == mode1 || mode1 == BLKmode || mode1 == tmode
10431 || modifier == EXPAND_CONST_ADDRESS
10432 || modifier == EXPAND_INITIALIZER)
10433 return op0;
10434
10435 if (target == 0)
10436 target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode);
10437
10438 convert_move (target, op0, unsignedp);
10439 return target;
10440 }
10441
10442 case OBJ_TYPE_REF:
10443 return expand_expr (OBJ_TYPE_REF_EXPR (exp), target, tmode, modifier);
10444
10445 case CALL_EXPR:
10446 /* All valid uses of __builtin_va_arg_pack () are removed during
10447 inlining. */
10448 if (CALL_EXPR_VA_ARG_PACK (exp))
10449 error ("%Kinvalid use of %<__builtin_va_arg_pack ()%>", exp);
10450 {
10451 tree fndecl = get_callee_fndecl (exp), attr;
10452
10453 if (fndecl
10454 && (attr = lookup_attribute ("error",
10455 DECL_ATTRIBUTES (fndecl))) != NULL)
10456 error ("%Kcall to %qs declared with attribute error: %s",
10457 exp, identifier_to_locale (lang_hooks.decl_printable_name (fndecl, 1)),
10458 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr))));
10459 if (fndecl
10460 && (attr = lookup_attribute ("warning",
10461 DECL_ATTRIBUTES (fndecl))) != NULL)
10462 warning_at (tree_nonartificial_location (exp),
10463 0, "%Kcall to %qs declared with attribute warning: %s",
10464 exp, identifier_to_locale (lang_hooks.decl_printable_name (fndecl, 1)),
10465 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr))));
10466
10467 /* Check for a built-in function. */
10468 if (fndecl && DECL_BUILT_IN (fndecl))
10469 {
10470 gcc_assert (DECL_BUILT_IN_CLASS (fndecl) != BUILT_IN_FRONTEND);
10471 if (CALL_WITH_BOUNDS_P (exp))
10472 return expand_builtin_with_bounds (exp, target, subtarget,
10473 tmode, ignore);
10474 else
10475 return expand_builtin (exp, target, subtarget, tmode, ignore);
10476 }
10477 }
10478 return expand_call (exp, target, ignore);
10479
10480 case VIEW_CONVERT_EXPR:
10481 op0 = NULL_RTX;
10482
10483 /* If we are converting to BLKmode, try to avoid an intermediate
10484 temporary by fetching an inner memory reference. */
10485 if (mode == BLKmode
10486 && TREE_CODE (TYPE_SIZE (type)) == INTEGER_CST
10487 && TYPE_MODE (TREE_TYPE (treeop0)) != BLKmode
10488 && handled_component_p (treeop0))
10489 {
10490 machine_mode mode1;
10491 HOST_WIDE_INT bitsize, bitpos;
10492 tree offset;
10493 int unsignedp;
10494 int volatilep = 0;
10495 tree tem
10496 = get_inner_reference (treeop0, &bitsize, &bitpos,
10497 &offset, &mode1, &unsignedp, &volatilep,
10498 true);
10499 rtx orig_op0;
10500
10501 /* ??? We should work harder and deal with non-zero offsets. */
10502 if (!offset
10503 && (bitpos % BITS_PER_UNIT) == 0
10504 && bitsize >= 0
10505 && compare_tree_int (TYPE_SIZE (type), bitsize) == 0)
10506 {
10507 /* See the normal_inner_ref case for the rationale. */
10508 orig_op0
10509 = expand_expr_real (tem,
10510 (TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE
10511 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem)))
10512 != INTEGER_CST)
10513 && modifier != EXPAND_STACK_PARM
10514 ? target : NULL_RTX),
10515 VOIDmode,
10516 modifier == EXPAND_SUM ? EXPAND_NORMAL : modifier,
10517 NULL, true);
10518
10519 if (MEM_P (orig_op0))
10520 {
10521 op0 = orig_op0;
10522
10523 /* Get a reference to just this component. */
10524 if (modifier == EXPAND_CONST_ADDRESS
10525 || modifier == EXPAND_SUM
10526 || modifier == EXPAND_INITIALIZER)
10527 op0 = adjust_address_nv (op0, mode, bitpos / BITS_PER_UNIT);
10528 else
10529 op0 = adjust_address (op0, mode, bitpos / BITS_PER_UNIT);
10530
10531 if (op0 == orig_op0)
10532 op0 = copy_rtx (op0);
10533
10534 set_mem_attributes (op0, treeop0, 0);
10535 if (REG_P (XEXP (op0, 0)))
10536 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
10537
10538 MEM_VOLATILE_P (op0) |= volatilep;
10539 }
10540 }
10541 }
10542
10543 if (!op0)
10544 op0 = expand_expr_real (treeop0, NULL_RTX, VOIDmode, modifier,
10545 NULL, inner_reference_p);
10546
10547 /* If the input and output modes are both the same, we are done. */
10548 if (mode == GET_MODE (op0))
10549 ;
10550 /* If neither mode is BLKmode, and both modes are the same size
10551 then we can use gen_lowpart. */
10552 else if (mode != BLKmode && GET_MODE (op0) != BLKmode
10553 && (GET_MODE_PRECISION (mode)
10554 == GET_MODE_PRECISION (GET_MODE (op0)))
10555 && !COMPLEX_MODE_P (GET_MODE (op0)))
10556 {
10557 if (GET_CODE (op0) == SUBREG)
10558 op0 = force_reg (GET_MODE (op0), op0);
10559 temp = gen_lowpart_common (mode, op0);
10560 if (temp)
10561 op0 = temp;
10562 else
10563 {
10564 if (!REG_P (op0) && !MEM_P (op0))
10565 op0 = force_reg (GET_MODE (op0), op0);
10566 op0 = gen_lowpart (mode, op0);
10567 }
10568 }
10569 /* If both types are integral, convert from one mode to the other. */
10570 else if (INTEGRAL_TYPE_P (type) && INTEGRAL_TYPE_P (TREE_TYPE (treeop0)))
10571 op0 = convert_modes (mode, GET_MODE (op0), op0,
10572 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
10573 /* If the output type is a bit-field type, do an extraction. */
10574 else if (reduce_bit_field)
10575 return extract_bit_field (op0, TYPE_PRECISION (type), 0,
10576 TYPE_UNSIGNED (type), NULL_RTX,
10577 mode, mode);
10578 /* As a last resort, spill op0 to memory, and reload it in a
10579 different mode. */
10580 else if (!MEM_P (op0))
10581 {
10582 /* If the operand is not a MEM, force it into memory. Since we
10583 are going to be changing the mode of the MEM, don't call
10584 force_const_mem for constants because we don't allow pool
10585 constants to change mode. */
10586 tree inner_type = TREE_TYPE (treeop0);
10587
10588 gcc_assert (!TREE_ADDRESSABLE (exp));
10589
10590 if (target == 0 || GET_MODE (target) != TYPE_MODE (inner_type))
10591 target
10592 = assign_stack_temp_for_type
10593 (TYPE_MODE (inner_type),
10594 GET_MODE_SIZE (TYPE_MODE (inner_type)), inner_type);
10595
10596 emit_move_insn (target, op0);
10597 op0 = target;
10598 }
10599
10600 /* If OP0 is (now) a MEM, we need to deal with alignment issues. If the
10601 output type is such that the operand is known to be aligned, indicate
10602 that it is. Otherwise, we need only be concerned about alignment for
10603 non-BLKmode results. */
10604 if (MEM_P (op0))
10605 {
10606 enum insn_code icode;
10607
10608 if (TYPE_ALIGN_OK (type))
10609 {
10610 /* ??? Copying the MEM without substantially changing it might
10611 run afoul of the code handling volatile memory references in
10612 store_expr, which assumes that TARGET is returned unmodified
10613 if it has been used. */
10614 op0 = copy_rtx (op0);
10615 set_mem_align (op0, MAX (MEM_ALIGN (op0), TYPE_ALIGN (type)));
10616 }
10617 else if (modifier != EXPAND_WRITE
10618 && modifier != EXPAND_MEMORY
10619 && !inner_reference_p
10620 && mode != BLKmode
10621 && MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode))
10622 {
10623 /* If the target does have special handling for unaligned
10624 loads of mode then use them. */
10625 if ((icode = optab_handler (movmisalign_optab, mode))
10626 != CODE_FOR_nothing)
10627 {
10628 rtx reg, insn;
10629
10630 op0 = adjust_address (op0, mode, 0);
10631 /* We've already validated the memory, and we're creating a
10632 new pseudo destination. The predicates really can't
10633 fail. */
10634 reg = gen_reg_rtx (mode);
10635
10636 /* Nor can the insn generator. */
10637 insn = GEN_FCN (icode) (reg, op0);
10638 emit_insn (insn);
10639 return reg;
10640 }
10641 else if (STRICT_ALIGNMENT)
10642 {
10643 tree inner_type = TREE_TYPE (treeop0);
10644 HOST_WIDE_INT temp_size
10645 = MAX (int_size_in_bytes (inner_type),
10646 (HOST_WIDE_INT) GET_MODE_SIZE (mode));
10647 rtx new_rtx
10648 = assign_stack_temp_for_type (mode, temp_size, type);
10649 rtx new_with_op0_mode
10650 = adjust_address (new_rtx, GET_MODE (op0), 0);
10651
10652 gcc_assert (!TREE_ADDRESSABLE (exp));
10653
10654 if (GET_MODE (op0) == BLKmode)
10655 emit_block_move (new_with_op0_mode, op0,
10656 GEN_INT (GET_MODE_SIZE (mode)),
10657 (modifier == EXPAND_STACK_PARM
10658 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
10659 else
10660 emit_move_insn (new_with_op0_mode, op0);
10661
10662 op0 = new_rtx;
10663 }
10664 }
10665
10666 op0 = adjust_address (op0, mode, 0);
10667 }
10668
10669 return op0;
10670
10671 case MODIFY_EXPR:
10672 {
10673 tree lhs = treeop0;
10674 tree rhs = treeop1;
10675 gcc_assert (ignore);
10676
10677 /* Check for |= or &= of a bitfield of size one into another bitfield
10678 of size 1. In this case, (unless we need the result of the
10679 assignment) we can do this more efficiently with a
10680 test followed by an assignment, if necessary.
10681
10682 ??? At this point, we can't get a BIT_FIELD_REF here. But if
10683 things change so we do, this code should be enhanced to
10684 support it. */
10685 if (TREE_CODE (lhs) == COMPONENT_REF
10686 && (TREE_CODE (rhs) == BIT_IOR_EXPR
10687 || TREE_CODE (rhs) == BIT_AND_EXPR)
10688 && TREE_OPERAND (rhs, 0) == lhs
10689 && TREE_CODE (TREE_OPERAND (rhs, 1)) == COMPONENT_REF
10690 && integer_onep (DECL_SIZE (TREE_OPERAND (lhs, 1)))
10691 && integer_onep (DECL_SIZE (TREE_OPERAND (TREE_OPERAND (rhs, 1), 1))))
10692 {
10693 rtx_code_label *label = gen_label_rtx ();
10694 int value = TREE_CODE (rhs) == BIT_IOR_EXPR;
10695 do_jump (TREE_OPERAND (rhs, 1),
10696 value ? label : 0,
10697 value ? 0 : label, -1);
10698 expand_assignment (lhs, build_int_cst (TREE_TYPE (rhs), value),
10699 false);
10700 do_pending_stack_adjust ();
10701 emit_label (label);
10702 return const0_rtx;
10703 }
10704
10705 expand_assignment (lhs, rhs, false);
10706 return const0_rtx;
10707 }
10708
10709 case ADDR_EXPR:
10710 return expand_expr_addr_expr (exp, target, tmode, modifier);
10711
10712 case REALPART_EXPR:
10713 op0 = expand_normal (treeop0);
10714 return read_complex_part (op0, false);
10715
10716 case IMAGPART_EXPR:
10717 op0 = expand_normal (treeop0);
10718 return read_complex_part (op0, true);
10719
10720 case RETURN_EXPR:
10721 case LABEL_EXPR:
10722 case GOTO_EXPR:
10723 case SWITCH_EXPR:
10724 case ASM_EXPR:
10725 /* Expanded in cfgexpand.c. */
10726 gcc_unreachable ();
10727
10728 case TRY_CATCH_EXPR:
10729 case CATCH_EXPR:
10730 case EH_FILTER_EXPR:
10731 case TRY_FINALLY_EXPR:
10732 /* Lowered by tree-eh.c. */
10733 gcc_unreachable ();
10734
10735 case WITH_CLEANUP_EXPR:
10736 case CLEANUP_POINT_EXPR:
10737 case TARGET_EXPR:
10738 case CASE_LABEL_EXPR:
10739 case VA_ARG_EXPR:
10740 case BIND_EXPR:
10741 case INIT_EXPR:
10742 case CONJ_EXPR:
10743 case COMPOUND_EXPR:
10744 case PREINCREMENT_EXPR:
10745 case PREDECREMENT_EXPR:
10746 case POSTINCREMENT_EXPR:
10747 case POSTDECREMENT_EXPR:
10748 case LOOP_EXPR:
10749 case EXIT_EXPR:
10750 case COMPOUND_LITERAL_EXPR:
10751 /* Lowered by gimplify.c. */
10752 gcc_unreachable ();
10753
10754 case FDESC_EXPR:
10755 /* Function descriptors are not valid except for as
10756 initialization constants, and should not be expanded. */
10757 gcc_unreachable ();
10758
10759 case WITH_SIZE_EXPR:
10760 /* WITH_SIZE_EXPR expands to its first argument. The caller should
10761 have pulled out the size to use in whatever context it needed. */
10762 return expand_expr_real (treeop0, original_target, tmode,
10763 modifier, alt_rtl, inner_reference_p);
10764
10765 default:
10766 return expand_expr_real_2 (&ops, target, tmode, modifier);
10767 }
10768 }
10769 \f
10770 /* Subroutine of above: reduce EXP to the precision of TYPE (in the
10771 signedness of TYPE), possibly returning the result in TARGET. */
10772 static rtx
10773 reduce_to_bit_field_precision (rtx exp, rtx target, tree type)
10774 {
10775 HOST_WIDE_INT prec = TYPE_PRECISION (type);
10776 if (target && GET_MODE (target) != GET_MODE (exp))
10777 target = 0;
10778 /* For constant values, reduce using build_int_cst_type. */
10779 if (CONST_INT_P (exp))
10780 {
10781 HOST_WIDE_INT value = INTVAL (exp);
10782 tree t = build_int_cst_type (type, value);
10783 return expand_expr (t, target, VOIDmode, EXPAND_NORMAL);
10784 }
10785 else if (TYPE_UNSIGNED (type))
10786 {
10787 machine_mode mode = GET_MODE (exp);
10788 rtx mask = immed_wide_int_const
10789 (wi::mask (prec, false, GET_MODE_PRECISION (mode)), mode);
10790 return expand_and (mode, exp, mask, target);
10791 }
10792 else
10793 {
10794 int count = GET_MODE_PRECISION (GET_MODE (exp)) - prec;
10795 exp = expand_shift (LSHIFT_EXPR, GET_MODE (exp),
10796 exp, count, target, 0);
10797 return expand_shift (RSHIFT_EXPR, GET_MODE (exp),
10798 exp, count, target, 0);
10799 }
10800 }
10801 \f
10802 /* Subroutine of above: returns 1 if OFFSET corresponds to an offset that
10803 when applied to the address of EXP produces an address known to be
10804 aligned more than BIGGEST_ALIGNMENT. */
10805
10806 static int
10807 is_aligning_offset (const_tree offset, const_tree exp)
10808 {
10809 /* Strip off any conversions. */
10810 while (CONVERT_EXPR_P (offset))
10811 offset = TREE_OPERAND (offset, 0);
10812
10813 /* We must now have a BIT_AND_EXPR with a constant that is one less than
10814 power of 2 and which is larger than BIGGEST_ALIGNMENT. */
10815 if (TREE_CODE (offset) != BIT_AND_EXPR
10816 || !tree_fits_uhwi_p (TREE_OPERAND (offset, 1))
10817 || compare_tree_int (TREE_OPERAND (offset, 1),
10818 BIGGEST_ALIGNMENT / BITS_PER_UNIT) <= 0
10819 || exact_log2 (tree_to_uhwi (TREE_OPERAND (offset, 1)) + 1) < 0)
10820 return 0;
10821
10822 /* Look at the first operand of BIT_AND_EXPR and strip any conversion.
10823 It must be NEGATE_EXPR. Then strip any more conversions. */
10824 offset = TREE_OPERAND (offset, 0);
10825 while (CONVERT_EXPR_P (offset))
10826 offset = TREE_OPERAND (offset, 0);
10827
10828 if (TREE_CODE (offset) != NEGATE_EXPR)
10829 return 0;
10830
10831 offset = TREE_OPERAND (offset, 0);
10832 while (CONVERT_EXPR_P (offset))
10833 offset = TREE_OPERAND (offset, 0);
10834
10835 /* This must now be the address of EXP. */
10836 return TREE_CODE (offset) == ADDR_EXPR && TREE_OPERAND (offset, 0) == exp;
10837 }
10838 \f
10839 /* Return the tree node if an ARG corresponds to a string constant or zero
10840 if it doesn't. If we return nonzero, set *PTR_OFFSET to the offset
10841 in bytes within the string that ARG is accessing. The type of the
10842 offset will be `sizetype'. */
10843
10844 tree
10845 string_constant (tree arg, tree *ptr_offset)
10846 {
10847 tree array, offset, lower_bound;
10848 STRIP_NOPS (arg);
10849
10850 if (TREE_CODE (arg) == ADDR_EXPR)
10851 {
10852 if (TREE_CODE (TREE_OPERAND (arg, 0)) == STRING_CST)
10853 {
10854 *ptr_offset = size_zero_node;
10855 return TREE_OPERAND (arg, 0);
10856 }
10857 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == VAR_DECL)
10858 {
10859 array = TREE_OPERAND (arg, 0);
10860 offset = size_zero_node;
10861 }
10862 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == ARRAY_REF)
10863 {
10864 array = TREE_OPERAND (TREE_OPERAND (arg, 0), 0);
10865 offset = TREE_OPERAND (TREE_OPERAND (arg, 0), 1);
10866 if (TREE_CODE (array) != STRING_CST
10867 && TREE_CODE (array) != VAR_DECL)
10868 return 0;
10869
10870 /* Check if the array has a nonzero lower bound. */
10871 lower_bound = array_ref_low_bound (TREE_OPERAND (arg, 0));
10872 if (!integer_zerop (lower_bound))
10873 {
10874 /* If the offset and base aren't both constants, return 0. */
10875 if (TREE_CODE (lower_bound) != INTEGER_CST)
10876 return 0;
10877 if (TREE_CODE (offset) != INTEGER_CST)
10878 return 0;
10879 /* Adjust offset by the lower bound. */
10880 offset = size_diffop (fold_convert (sizetype, offset),
10881 fold_convert (sizetype, lower_bound));
10882 }
10883 }
10884 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == MEM_REF)
10885 {
10886 array = TREE_OPERAND (TREE_OPERAND (arg, 0), 0);
10887 offset = TREE_OPERAND (TREE_OPERAND (arg, 0), 1);
10888 if (TREE_CODE (array) != ADDR_EXPR)
10889 return 0;
10890 array = TREE_OPERAND (array, 0);
10891 if (TREE_CODE (array) != STRING_CST
10892 && TREE_CODE (array) != VAR_DECL)
10893 return 0;
10894 }
10895 else
10896 return 0;
10897 }
10898 else if (TREE_CODE (arg) == PLUS_EXPR || TREE_CODE (arg) == POINTER_PLUS_EXPR)
10899 {
10900 tree arg0 = TREE_OPERAND (arg, 0);
10901 tree arg1 = TREE_OPERAND (arg, 1);
10902
10903 STRIP_NOPS (arg0);
10904 STRIP_NOPS (arg1);
10905
10906 if (TREE_CODE (arg0) == ADDR_EXPR
10907 && (TREE_CODE (TREE_OPERAND (arg0, 0)) == STRING_CST
10908 || TREE_CODE (TREE_OPERAND (arg0, 0)) == VAR_DECL))
10909 {
10910 array = TREE_OPERAND (arg0, 0);
10911 offset = arg1;
10912 }
10913 else if (TREE_CODE (arg1) == ADDR_EXPR
10914 && (TREE_CODE (TREE_OPERAND (arg1, 0)) == STRING_CST
10915 || TREE_CODE (TREE_OPERAND (arg1, 0)) == VAR_DECL))
10916 {
10917 array = TREE_OPERAND (arg1, 0);
10918 offset = arg0;
10919 }
10920 else
10921 return 0;
10922 }
10923 else
10924 return 0;
10925
10926 if (TREE_CODE (array) == STRING_CST)
10927 {
10928 *ptr_offset = fold_convert (sizetype, offset);
10929 return array;
10930 }
10931 else if (TREE_CODE (array) == VAR_DECL
10932 || TREE_CODE (array) == CONST_DECL)
10933 {
10934 int length;
10935 tree init = ctor_for_folding (array);
10936
10937 /* Variables initialized to string literals can be handled too. */
10938 if (init == error_mark_node
10939 || !init
10940 || TREE_CODE (init) != STRING_CST)
10941 return 0;
10942
10943 /* Avoid const char foo[4] = "abcde"; */
10944 if (DECL_SIZE_UNIT (array) == NULL_TREE
10945 || TREE_CODE (DECL_SIZE_UNIT (array)) != INTEGER_CST
10946 || (length = TREE_STRING_LENGTH (init)) <= 0
10947 || compare_tree_int (DECL_SIZE_UNIT (array), length) < 0)
10948 return 0;
10949
10950 /* If variable is bigger than the string literal, OFFSET must be constant
10951 and inside of the bounds of the string literal. */
10952 offset = fold_convert (sizetype, offset);
10953 if (compare_tree_int (DECL_SIZE_UNIT (array), length) > 0
10954 && (! tree_fits_uhwi_p (offset)
10955 || compare_tree_int (offset, length) >= 0))
10956 return 0;
10957
10958 *ptr_offset = offset;
10959 return init;
10960 }
10961
10962 return 0;
10963 }
10964 \f
10965 /* Generate code to calculate OPS, and exploded expression
10966 using a store-flag instruction and return an rtx for the result.
10967 OPS reflects a comparison.
10968
10969 If TARGET is nonzero, store the result there if convenient.
10970
10971 Return zero if there is no suitable set-flag instruction
10972 available on this machine.
10973
10974 Once expand_expr has been called on the arguments of the comparison,
10975 we are committed to doing the store flag, since it is not safe to
10976 re-evaluate the expression. We emit the store-flag insn by calling
10977 emit_store_flag, but only expand the arguments if we have a reason
10978 to believe that emit_store_flag will be successful. If we think that
10979 it will, but it isn't, we have to simulate the store-flag with a
10980 set/jump/set sequence. */
10981
10982 static rtx
10983 do_store_flag (sepops ops, rtx target, machine_mode mode)
10984 {
10985 enum rtx_code code;
10986 tree arg0, arg1, type;
10987 tree tem;
10988 machine_mode operand_mode;
10989 int unsignedp;
10990 rtx op0, op1;
10991 rtx subtarget = target;
10992 location_t loc = ops->location;
10993
10994 arg0 = ops->op0;
10995 arg1 = ops->op1;
10996
10997 /* Don't crash if the comparison was erroneous. */
10998 if (arg0 == error_mark_node || arg1 == error_mark_node)
10999 return const0_rtx;
11000
11001 type = TREE_TYPE (arg0);
11002 operand_mode = TYPE_MODE (type);
11003 unsignedp = TYPE_UNSIGNED (type);
11004
11005 /* We won't bother with BLKmode store-flag operations because it would mean
11006 passing a lot of information to emit_store_flag. */
11007 if (operand_mode == BLKmode)
11008 return 0;
11009
11010 /* We won't bother with store-flag operations involving function pointers
11011 when function pointers must be canonicalized before comparisons. */
11012 #ifdef HAVE_canonicalize_funcptr_for_compare
11013 if (HAVE_canonicalize_funcptr_for_compare
11014 && ((TREE_CODE (TREE_TYPE (arg0)) == POINTER_TYPE
11015 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg0)))
11016 == FUNCTION_TYPE))
11017 || (TREE_CODE (TREE_TYPE (arg1)) == POINTER_TYPE
11018 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg1)))
11019 == FUNCTION_TYPE))))
11020 return 0;
11021 #endif
11022
11023 STRIP_NOPS (arg0);
11024 STRIP_NOPS (arg1);
11025
11026 /* For vector typed comparisons emit code to generate the desired
11027 all-ones or all-zeros mask. Conveniently use the VEC_COND_EXPR
11028 expander for this. */
11029 if (TREE_CODE (ops->type) == VECTOR_TYPE)
11030 {
11031 tree ifexp = build2 (ops->code, ops->type, arg0, arg1);
11032 tree if_true = constant_boolean_node (true, ops->type);
11033 tree if_false = constant_boolean_node (false, ops->type);
11034 return expand_vec_cond_expr (ops->type, ifexp, if_true, if_false, target);
11035 }
11036
11037 /* Get the rtx comparison code to use. We know that EXP is a comparison
11038 operation of some type. Some comparisons against 1 and -1 can be
11039 converted to comparisons with zero. Do so here so that the tests
11040 below will be aware that we have a comparison with zero. These
11041 tests will not catch constants in the first operand, but constants
11042 are rarely passed as the first operand. */
11043
11044 switch (ops->code)
11045 {
11046 case EQ_EXPR:
11047 code = EQ;
11048 break;
11049 case NE_EXPR:
11050 code = NE;
11051 break;
11052 case LT_EXPR:
11053 if (integer_onep (arg1))
11054 arg1 = integer_zero_node, code = unsignedp ? LEU : LE;
11055 else
11056 code = unsignedp ? LTU : LT;
11057 break;
11058 case LE_EXPR:
11059 if (! unsignedp && integer_all_onesp (arg1))
11060 arg1 = integer_zero_node, code = LT;
11061 else
11062 code = unsignedp ? LEU : LE;
11063 break;
11064 case GT_EXPR:
11065 if (! unsignedp && integer_all_onesp (arg1))
11066 arg1 = integer_zero_node, code = GE;
11067 else
11068 code = unsignedp ? GTU : GT;
11069 break;
11070 case GE_EXPR:
11071 if (integer_onep (arg1))
11072 arg1 = integer_zero_node, code = unsignedp ? GTU : GT;
11073 else
11074 code = unsignedp ? GEU : GE;
11075 break;
11076
11077 case UNORDERED_EXPR:
11078 code = UNORDERED;
11079 break;
11080 case ORDERED_EXPR:
11081 code = ORDERED;
11082 break;
11083 case UNLT_EXPR:
11084 code = UNLT;
11085 break;
11086 case UNLE_EXPR:
11087 code = UNLE;
11088 break;
11089 case UNGT_EXPR:
11090 code = UNGT;
11091 break;
11092 case UNGE_EXPR:
11093 code = UNGE;
11094 break;
11095 case UNEQ_EXPR:
11096 code = UNEQ;
11097 break;
11098 case LTGT_EXPR:
11099 code = LTGT;
11100 break;
11101
11102 default:
11103 gcc_unreachable ();
11104 }
11105
11106 /* Put a constant second. */
11107 if (TREE_CODE (arg0) == REAL_CST || TREE_CODE (arg0) == INTEGER_CST
11108 || TREE_CODE (arg0) == FIXED_CST)
11109 {
11110 tem = arg0; arg0 = arg1; arg1 = tem;
11111 code = swap_condition (code);
11112 }
11113
11114 /* If this is an equality or inequality test of a single bit, we can
11115 do this by shifting the bit being tested to the low-order bit and
11116 masking the result with the constant 1. If the condition was EQ,
11117 we xor it with 1. This does not require an scc insn and is faster
11118 than an scc insn even if we have it.
11119
11120 The code to make this transformation was moved into fold_single_bit_test,
11121 so we just call into the folder and expand its result. */
11122
11123 if ((code == NE || code == EQ)
11124 && integer_zerop (arg1)
11125 && (TYPE_PRECISION (ops->type) != 1 || TYPE_UNSIGNED (ops->type)))
11126 {
11127 gimple srcstmt = get_def_for_expr (arg0, BIT_AND_EXPR);
11128 if (srcstmt
11129 && integer_pow2p (gimple_assign_rhs2 (srcstmt)))
11130 {
11131 enum tree_code tcode = code == NE ? NE_EXPR : EQ_EXPR;
11132 tree type = lang_hooks.types.type_for_mode (mode, unsignedp);
11133 tree temp = fold_build2_loc (loc, BIT_AND_EXPR, TREE_TYPE (arg1),
11134 gimple_assign_rhs1 (srcstmt),
11135 gimple_assign_rhs2 (srcstmt));
11136 temp = fold_single_bit_test (loc, tcode, temp, arg1, type);
11137 if (temp)
11138 return expand_expr (temp, target, VOIDmode, EXPAND_NORMAL);
11139 }
11140 }
11141
11142 if (! get_subtarget (target)
11143 || GET_MODE (subtarget) != operand_mode)
11144 subtarget = 0;
11145
11146 expand_operands (arg0, arg1, subtarget, &op0, &op1, EXPAND_NORMAL);
11147
11148 if (target == 0)
11149 target = gen_reg_rtx (mode);
11150
11151 /* Try a cstore if possible. */
11152 return emit_store_flag_force (target, code, op0, op1,
11153 operand_mode, unsignedp,
11154 (TYPE_PRECISION (ops->type) == 1
11155 && !TYPE_UNSIGNED (ops->type)) ? -1 : 1);
11156 }
11157 \f
11158
11159 /* Stubs in case we haven't got a casesi insn. */
11160 #ifndef HAVE_casesi
11161 # define HAVE_casesi 0
11162 # define gen_casesi(a, b, c, d, e) (0)
11163 # define CODE_FOR_casesi CODE_FOR_nothing
11164 #endif
11165
11166 /* Attempt to generate a casesi instruction. Returns 1 if successful,
11167 0 otherwise (i.e. if there is no casesi instruction).
11168
11169 DEFAULT_PROBABILITY is the probability of jumping to the default
11170 label. */
11171 int
11172 try_casesi (tree index_type, tree index_expr, tree minval, tree range,
11173 rtx table_label, rtx default_label, rtx fallback_label,
11174 int default_probability)
11175 {
11176 struct expand_operand ops[5];
11177 machine_mode index_mode = SImode;
11178 rtx op1, op2, index;
11179
11180 if (! HAVE_casesi)
11181 return 0;
11182
11183 /* Convert the index to SImode. */
11184 if (GET_MODE_BITSIZE (TYPE_MODE (index_type)) > GET_MODE_BITSIZE (index_mode))
11185 {
11186 machine_mode omode = TYPE_MODE (index_type);
11187 rtx rangertx = expand_normal (range);
11188
11189 /* We must handle the endpoints in the original mode. */
11190 index_expr = build2 (MINUS_EXPR, index_type,
11191 index_expr, minval);
11192 minval = integer_zero_node;
11193 index = expand_normal (index_expr);
11194 if (default_label)
11195 emit_cmp_and_jump_insns (rangertx, index, LTU, NULL_RTX,
11196 omode, 1, default_label,
11197 default_probability);
11198 /* Now we can safely truncate. */
11199 index = convert_to_mode (index_mode, index, 0);
11200 }
11201 else
11202 {
11203 if (TYPE_MODE (index_type) != index_mode)
11204 {
11205 index_type = lang_hooks.types.type_for_mode (index_mode, 0);
11206 index_expr = fold_convert (index_type, index_expr);
11207 }
11208
11209 index = expand_normal (index_expr);
11210 }
11211
11212 do_pending_stack_adjust ();
11213
11214 op1 = expand_normal (minval);
11215 op2 = expand_normal (range);
11216
11217 create_input_operand (&ops[0], index, index_mode);
11218 create_convert_operand_from_type (&ops[1], op1, TREE_TYPE (minval));
11219 create_convert_operand_from_type (&ops[2], op2, TREE_TYPE (range));
11220 create_fixed_operand (&ops[3], table_label);
11221 create_fixed_operand (&ops[4], (default_label
11222 ? default_label
11223 : fallback_label));
11224 expand_jump_insn (CODE_FOR_casesi, 5, ops);
11225 return 1;
11226 }
11227
11228 /* Attempt to generate a tablejump instruction; same concept. */
11229 /* Subroutine of the next function.
11230
11231 INDEX is the value being switched on, with the lowest value
11232 in the table already subtracted.
11233 MODE is its expected mode (needed if INDEX is constant).
11234 RANGE is the length of the jump table.
11235 TABLE_LABEL is a CODE_LABEL rtx for the table itself.
11236
11237 DEFAULT_LABEL is a CODE_LABEL rtx to jump to if the
11238 index value is out of range.
11239 DEFAULT_PROBABILITY is the probability of jumping to
11240 the default label. */
11241
11242 static void
11243 do_tablejump (rtx index, machine_mode mode, rtx range, rtx table_label,
11244 rtx default_label, int default_probability)
11245 {
11246 rtx temp, vector;
11247
11248 if (INTVAL (range) > cfun->cfg->max_jumptable_ents)
11249 cfun->cfg->max_jumptable_ents = INTVAL (range);
11250
11251 /* Do an unsigned comparison (in the proper mode) between the index
11252 expression and the value which represents the length of the range.
11253 Since we just finished subtracting the lower bound of the range
11254 from the index expression, this comparison allows us to simultaneously
11255 check that the original index expression value is both greater than
11256 or equal to the minimum value of the range and less than or equal to
11257 the maximum value of the range. */
11258
11259 if (default_label)
11260 emit_cmp_and_jump_insns (index, range, GTU, NULL_RTX, mode, 1,
11261 default_label, default_probability);
11262
11263
11264 /* If index is in range, it must fit in Pmode.
11265 Convert to Pmode so we can index with it. */
11266 if (mode != Pmode)
11267 index = convert_to_mode (Pmode, index, 1);
11268
11269 /* Don't let a MEM slip through, because then INDEX that comes
11270 out of PIC_CASE_VECTOR_ADDRESS won't be a valid address,
11271 and break_out_memory_refs will go to work on it and mess it up. */
11272 #ifdef PIC_CASE_VECTOR_ADDRESS
11273 if (flag_pic && !REG_P (index))
11274 index = copy_to_mode_reg (Pmode, index);
11275 #endif
11276
11277 /* ??? The only correct use of CASE_VECTOR_MODE is the one inside the
11278 GET_MODE_SIZE, because this indicates how large insns are. The other
11279 uses should all be Pmode, because they are addresses. This code
11280 could fail if addresses and insns are not the same size. */
11281 index = simplify_gen_binary (MULT, Pmode, index,
11282 gen_int_mode (GET_MODE_SIZE (CASE_VECTOR_MODE),
11283 Pmode));
11284 index = simplify_gen_binary (PLUS, Pmode, index,
11285 gen_rtx_LABEL_REF (Pmode, table_label));
11286
11287 #ifdef PIC_CASE_VECTOR_ADDRESS
11288 if (flag_pic)
11289 index = PIC_CASE_VECTOR_ADDRESS (index);
11290 else
11291 #endif
11292 index = memory_address (CASE_VECTOR_MODE, index);
11293 temp = gen_reg_rtx (CASE_VECTOR_MODE);
11294 vector = gen_const_mem (CASE_VECTOR_MODE, index);
11295 convert_move (temp, vector, 0);
11296
11297 emit_jump_insn (gen_tablejump (temp, table_label));
11298
11299 /* If we are generating PIC code or if the table is PC-relative, the
11300 table and JUMP_INSN must be adjacent, so don't output a BARRIER. */
11301 if (! CASE_VECTOR_PC_RELATIVE && ! flag_pic)
11302 emit_barrier ();
11303 }
11304
11305 int
11306 try_tablejump (tree index_type, tree index_expr, tree minval, tree range,
11307 rtx table_label, rtx default_label, int default_probability)
11308 {
11309 rtx index;
11310
11311 if (! HAVE_tablejump)
11312 return 0;
11313
11314 index_expr = fold_build2 (MINUS_EXPR, index_type,
11315 fold_convert (index_type, index_expr),
11316 fold_convert (index_type, minval));
11317 index = expand_normal (index_expr);
11318 do_pending_stack_adjust ();
11319
11320 do_tablejump (index, TYPE_MODE (index_type),
11321 convert_modes (TYPE_MODE (index_type),
11322 TYPE_MODE (TREE_TYPE (range)),
11323 expand_normal (range),
11324 TYPE_UNSIGNED (TREE_TYPE (range))),
11325 table_label, default_label, default_probability);
11326 return 1;
11327 }
11328
11329 /* Return a CONST_VECTOR rtx for a VECTOR_CST tree. */
11330 static rtx
11331 const_vector_from_tree (tree exp)
11332 {
11333 rtvec v;
11334 unsigned i;
11335 int units;
11336 tree elt;
11337 machine_mode inner, mode;
11338
11339 mode = TYPE_MODE (TREE_TYPE (exp));
11340
11341 if (initializer_zerop (exp))
11342 return CONST0_RTX (mode);
11343
11344 units = GET_MODE_NUNITS (mode);
11345 inner = GET_MODE_INNER (mode);
11346
11347 v = rtvec_alloc (units);
11348
11349 for (i = 0; i < VECTOR_CST_NELTS (exp); ++i)
11350 {
11351 elt = VECTOR_CST_ELT (exp, i);
11352
11353 if (TREE_CODE (elt) == REAL_CST)
11354 RTVEC_ELT (v, i) = CONST_DOUBLE_FROM_REAL_VALUE (TREE_REAL_CST (elt),
11355 inner);
11356 else if (TREE_CODE (elt) == FIXED_CST)
11357 RTVEC_ELT (v, i) = CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (elt),
11358 inner);
11359 else
11360 RTVEC_ELT (v, i) = immed_wide_int_const (elt, inner);
11361 }
11362
11363 return gen_rtx_CONST_VECTOR (mode, v);
11364 }
11365
11366 /* Build a decl for a personality function given a language prefix. */
11367
11368 tree
11369 build_personality_function (const char *lang)
11370 {
11371 const char *unwind_and_version;
11372 tree decl, type;
11373 char *name;
11374
11375 switch (targetm_common.except_unwind_info (&global_options))
11376 {
11377 case UI_NONE:
11378 return NULL;
11379 case UI_SJLJ:
11380 unwind_and_version = "_sj0";
11381 break;
11382 case UI_DWARF2:
11383 case UI_TARGET:
11384 unwind_and_version = "_v0";
11385 break;
11386 case UI_SEH:
11387 unwind_and_version = "_seh0";
11388 break;
11389 default:
11390 gcc_unreachable ();
11391 }
11392
11393 name = ACONCAT (("__", lang, "_personality", unwind_and_version, NULL));
11394
11395 type = build_function_type_list (integer_type_node, integer_type_node,
11396 long_long_unsigned_type_node,
11397 ptr_type_node, ptr_type_node, NULL_TREE);
11398 decl = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL,
11399 get_identifier (name), type);
11400 DECL_ARTIFICIAL (decl) = 1;
11401 DECL_EXTERNAL (decl) = 1;
11402 TREE_PUBLIC (decl) = 1;
11403
11404 /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with
11405 are the flags assigned by targetm.encode_section_info. */
11406 SET_SYMBOL_REF_DECL (XEXP (DECL_RTL (decl), 0), NULL);
11407
11408 return decl;
11409 }
11410
11411 /* Extracts the personality function of DECL and returns the corresponding
11412 libfunc. */
11413
11414 rtx
11415 get_personality_function (tree decl)
11416 {
11417 tree personality = DECL_FUNCTION_PERSONALITY (decl);
11418 enum eh_personality_kind pk;
11419
11420 pk = function_needs_eh_personality (DECL_STRUCT_FUNCTION (decl));
11421 if (pk == eh_personality_none)
11422 return NULL;
11423
11424 if (!personality
11425 && pk == eh_personality_any)
11426 personality = lang_hooks.eh_personality ();
11427
11428 if (pk == eh_personality_lang)
11429 gcc_assert (personality != NULL_TREE);
11430
11431 return XEXP (DECL_RTL (personality), 0);
11432 }
11433
11434 /* Returns a tree for the size of EXP in bytes. */
11435
11436 static tree
11437 tree_expr_size (const_tree exp)
11438 {
11439 if (DECL_P (exp)
11440 && DECL_SIZE_UNIT (exp) != 0)
11441 return DECL_SIZE_UNIT (exp);
11442 else
11443 return size_in_bytes (TREE_TYPE (exp));
11444 }
11445
11446 /* Return an rtx for the size in bytes of the value of EXP. */
11447
11448 rtx
11449 expr_size (tree exp)
11450 {
11451 tree size;
11452
11453 if (TREE_CODE (exp) == WITH_SIZE_EXPR)
11454 size = TREE_OPERAND (exp, 1);
11455 else
11456 {
11457 size = tree_expr_size (exp);
11458 gcc_assert (size);
11459 gcc_assert (size == SUBSTITUTE_PLACEHOLDER_IN_EXPR (size, exp));
11460 }
11461
11462 return expand_expr (size, NULL_RTX, TYPE_MODE (sizetype), EXPAND_NORMAL);
11463 }
11464
11465 /* Return a wide integer for the size in bytes of the value of EXP, or -1
11466 if the size can vary or is larger than an integer. */
11467
11468 static HOST_WIDE_INT
11469 int_expr_size (tree exp)
11470 {
11471 tree size;
11472
11473 if (TREE_CODE (exp) == WITH_SIZE_EXPR)
11474 size = TREE_OPERAND (exp, 1);
11475 else
11476 {
11477 size = tree_expr_size (exp);
11478 gcc_assert (size);
11479 }
11480
11481 if (size == 0 || !tree_fits_shwi_p (size))
11482 return -1;
11483
11484 return tree_to_shwi (size);
11485 }
11486
11487 #include "gt-expr.h"