expr.c (emit_group_store): Corrected BITFIELD_END parameter.
[gcc.git] / gcc / expr.c
1 /* Convert tree expression to rtl instructions, for GNU compiler.
2 Copyright (C) 1988-2013 Free Software Foundation, Inc.
3
4 This file is part of GCC.
5
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
9 version.
10
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
19
20 #include "config.h"
21 #include "system.h"
22 #include "coretypes.h"
23 #include "tm.h"
24 #include "machmode.h"
25 #include "rtl.h"
26 #include "tree.h"
27 #include "stringpool.h"
28 #include "stor-layout.h"
29 #include "attribs.h"
30 #include "varasm.h"
31 #include "flags.h"
32 #include "regs.h"
33 #include "hard-reg-set.h"
34 #include "except.h"
35 #include "function.h"
36 #include "insn-config.h"
37 #include "insn-attr.h"
38 /* Include expr.h after insn-config.h so we get HAVE_conditional_move. */
39 #include "expr.h"
40 #include "optabs.h"
41 #include "libfuncs.h"
42 #include "recog.h"
43 #include "reload.h"
44 #include "typeclass.h"
45 #include "toplev.h"
46 #include "langhooks.h"
47 #include "intl.h"
48 #include "tm_p.h"
49 #include "tree-iterator.h"
50 #include "basic-block.h"
51 #include "tree-ssa-alias.h"
52 #include "internal-fn.h"
53 #include "gimple-expr.h"
54 #include "is-a.h"
55 #include "gimple.h"
56 #include "gimple-ssa.h"
57 #include "cgraph.h"
58 #include "tree-ssanames.h"
59 #include "target.h"
60 #include "common/common-target.h"
61 #include "timevar.h"
62 #include "df.h"
63 #include "diagnostic.h"
64 #include "tree-ssa-live.h"
65 #include "tree-outof-ssa.h"
66 #include "target-globals.h"
67 #include "params.h"
68 #include "tree-ssa-address.h"
69 #include "cfgexpand.h"
70
71 /* Decide whether a function's arguments should be processed
72 from first to last or from last to first.
73
74 They should if the stack and args grow in opposite directions, but
75 only if we have push insns. */
76
77 #ifdef PUSH_ROUNDING
78
79 #ifndef PUSH_ARGS_REVERSED
80 #if defined (STACK_GROWS_DOWNWARD) != defined (ARGS_GROW_DOWNWARD)
81 #define PUSH_ARGS_REVERSED /* If it's last to first. */
82 #endif
83 #endif
84
85 #endif
86
87 #ifndef STACK_PUSH_CODE
88 #ifdef STACK_GROWS_DOWNWARD
89 #define STACK_PUSH_CODE PRE_DEC
90 #else
91 #define STACK_PUSH_CODE PRE_INC
92 #endif
93 #endif
94
95
96 /* If this is nonzero, we do not bother generating VOLATILE
97 around volatile memory references, and we are willing to
98 output indirect addresses. If cse is to follow, we reject
99 indirect addresses so a useful potential cse is generated;
100 if it is used only once, instruction combination will produce
101 the same indirect address eventually. */
102 int cse_not_expected;
103
104 /* This structure is used by move_by_pieces to describe the move to
105 be performed. */
106 struct move_by_pieces_d
107 {
108 rtx to;
109 rtx to_addr;
110 int autinc_to;
111 int explicit_inc_to;
112 rtx from;
113 rtx from_addr;
114 int autinc_from;
115 int explicit_inc_from;
116 unsigned HOST_WIDE_INT len;
117 HOST_WIDE_INT offset;
118 int reverse;
119 };
120
121 /* This structure is used by store_by_pieces to describe the clear to
122 be performed. */
123
124 struct store_by_pieces_d
125 {
126 rtx to;
127 rtx to_addr;
128 int autinc_to;
129 int explicit_inc_to;
130 unsigned HOST_WIDE_INT len;
131 HOST_WIDE_INT offset;
132 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode);
133 void *constfundata;
134 int reverse;
135 };
136
137 static void move_by_pieces_1 (insn_gen_fn, machine_mode,
138 struct move_by_pieces_d *);
139 static bool block_move_libcall_safe_for_call_parm (void);
140 static bool emit_block_move_via_movmem (rtx, rtx, rtx, unsigned, unsigned, HOST_WIDE_INT,
141 unsigned HOST_WIDE_INT, unsigned HOST_WIDE_INT,
142 unsigned HOST_WIDE_INT);
143 static tree emit_block_move_libcall_fn (int);
144 static void emit_block_move_via_loop (rtx, rtx, rtx, unsigned);
145 static rtx clear_by_pieces_1 (void *, HOST_WIDE_INT, enum machine_mode);
146 static void clear_by_pieces (rtx, unsigned HOST_WIDE_INT, unsigned int);
147 static void store_by_pieces_1 (struct store_by_pieces_d *, unsigned int);
148 static void store_by_pieces_2 (insn_gen_fn, machine_mode,
149 struct store_by_pieces_d *);
150 static tree clear_storage_libcall_fn (int);
151 static rtx compress_float_constant (rtx, rtx);
152 static rtx get_subtarget (rtx);
153 static void store_constructor_field (rtx, unsigned HOST_WIDE_INT,
154 HOST_WIDE_INT, enum machine_mode,
155 tree, int, alias_set_type);
156 static void store_constructor (tree, rtx, int, HOST_WIDE_INT);
157 static rtx store_field (rtx, HOST_WIDE_INT, HOST_WIDE_INT,
158 unsigned HOST_WIDE_INT, unsigned HOST_WIDE_INT,
159 enum machine_mode, tree, alias_set_type, bool);
160
161 static unsigned HOST_WIDE_INT highest_pow2_factor_for_target (const_tree, const_tree);
162
163 static int is_aligning_offset (const_tree, const_tree);
164 static void expand_operands (tree, tree, rtx, rtx*, rtx*,
165 enum expand_modifier);
166 static rtx reduce_to_bit_field_precision (rtx, rtx, tree);
167 static rtx do_store_flag (sepops, rtx, enum machine_mode);
168 #ifdef PUSH_ROUNDING
169 static void emit_single_push_insn (enum machine_mode, rtx, tree);
170 #endif
171 static void do_tablejump (rtx, enum machine_mode, rtx, rtx, rtx, int);
172 static rtx const_vector_from_tree (tree);
173 static void write_complex_part (rtx, rtx, bool);
174
175 /* This macro is used to determine whether move_by_pieces should be called
176 to perform a structure copy. */
177 #ifndef MOVE_BY_PIECES_P
178 #define MOVE_BY_PIECES_P(SIZE, ALIGN) \
179 (move_by_pieces_ninsns (SIZE, ALIGN, MOVE_MAX_PIECES + 1) \
180 < (unsigned int) MOVE_RATIO (optimize_insn_for_speed_p ()))
181 #endif
182
183 /* This macro is used to determine whether clear_by_pieces should be
184 called to clear storage. */
185 #ifndef CLEAR_BY_PIECES_P
186 #define CLEAR_BY_PIECES_P(SIZE, ALIGN) \
187 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
188 < (unsigned int) CLEAR_RATIO (optimize_insn_for_speed_p ()))
189 #endif
190
191 /* This macro is used to determine whether store_by_pieces should be
192 called to "memset" storage with byte values other than zero. */
193 #ifndef SET_BY_PIECES_P
194 #define SET_BY_PIECES_P(SIZE, ALIGN) \
195 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
196 < (unsigned int) SET_RATIO (optimize_insn_for_speed_p ()))
197 #endif
198
199 /* This macro is used to determine whether store_by_pieces should be
200 called to "memcpy" storage when the source is a constant string. */
201 #ifndef STORE_BY_PIECES_P
202 #define STORE_BY_PIECES_P(SIZE, ALIGN) \
203 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
204 < (unsigned int) MOVE_RATIO (optimize_insn_for_speed_p ()))
205 #endif
206 \f
207 /* This is run to set up which modes can be used
208 directly in memory and to initialize the block move optab. It is run
209 at the beginning of compilation and when the target is reinitialized. */
210
211 void
212 init_expr_target (void)
213 {
214 rtx insn, pat;
215 enum machine_mode mode;
216 int num_clobbers;
217 rtx mem, mem1;
218 rtx reg;
219
220 /* Try indexing by frame ptr and try by stack ptr.
221 It is known that on the Convex the stack ptr isn't a valid index.
222 With luck, one or the other is valid on any machine. */
223 mem = gen_rtx_MEM (VOIDmode, stack_pointer_rtx);
224 mem1 = gen_rtx_MEM (VOIDmode, frame_pointer_rtx);
225
226 /* A scratch register we can modify in-place below to avoid
227 useless RTL allocations. */
228 reg = gen_rtx_REG (VOIDmode, -1);
229
230 insn = rtx_alloc (INSN);
231 pat = gen_rtx_SET (VOIDmode, NULL_RTX, NULL_RTX);
232 PATTERN (insn) = pat;
233
234 for (mode = VOIDmode; (int) mode < NUM_MACHINE_MODES;
235 mode = (enum machine_mode) ((int) mode + 1))
236 {
237 int regno;
238
239 direct_load[(int) mode] = direct_store[(int) mode] = 0;
240 PUT_MODE (mem, mode);
241 PUT_MODE (mem1, mode);
242 PUT_MODE (reg, mode);
243
244 /* See if there is some register that can be used in this mode and
245 directly loaded or stored from memory. */
246
247 if (mode != VOIDmode && mode != BLKmode)
248 for (regno = 0; regno < FIRST_PSEUDO_REGISTER
249 && (direct_load[(int) mode] == 0 || direct_store[(int) mode] == 0);
250 regno++)
251 {
252 if (! HARD_REGNO_MODE_OK (regno, mode))
253 continue;
254
255 SET_REGNO (reg, regno);
256
257 SET_SRC (pat) = mem;
258 SET_DEST (pat) = reg;
259 if (recog (pat, insn, &num_clobbers) >= 0)
260 direct_load[(int) mode] = 1;
261
262 SET_SRC (pat) = mem1;
263 SET_DEST (pat) = reg;
264 if (recog (pat, insn, &num_clobbers) >= 0)
265 direct_load[(int) mode] = 1;
266
267 SET_SRC (pat) = reg;
268 SET_DEST (pat) = mem;
269 if (recog (pat, insn, &num_clobbers) >= 0)
270 direct_store[(int) mode] = 1;
271
272 SET_SRC (pat) = reg;
273 SET_DEST (pat) = mem1;
274 if (recog (pat, insn, &num_clobbers) >= 0)
275 direct_store[(int) mode] = 1;
276 }
277 }
278
279 mem = gen_rtx_MEM (VOIDmode, gen_rtx_raw_REG (Pmode, 10000));
280
281 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
282 mode = GET_MODE_WIDER_MODE (mode))
283 {
284 enum machine_mode srcmode;
285 for (srcmode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); srcmode != mode;
286 srcmode = GET_MODE_WIDER_MODE (srcmode))
287 {
288 enum insn_code ic;
289
290 ic = can_extend_p (mode, srcmode, 0);
291 if (ic == CODE_FOR_nothing)
292 continue;
293
294 PUT_MODE (mem, srcmode);
295
296 if (insn_operand_matches (ic, 1, mem))
297 float_extend_from_mem[mode][srcmode] = true;
298 }
299 }
300 }
301
302 /* This is run at the start of compiling a function. */
303
304 void
305 init_expr (void)
306 {
307 memset (&crtl->expr, 0, sizeof (crtl->expr));
308 }
309 \f
310 /* Copy data from FROM to TO, where the machine modes are not the same.
311 Both modes may be integer, or both may be floating, or both may be
312 fixed-point.
313 UNSIGNEDP should be nonzero if FROM is an unsigned type.
314 This causes zero-extension instead of sign-extension. */
315
316 void
317 convert_move (rtx to, rtx from, int unsignedp)
318 {
319 enum machine_mode to_mode = GET_MODE (to);
320 enum machine_mode from_mode = GET_MODE (from);
321 int to_real = SCALAR_FLOAT_MODE_P (to_mode);
322 int from_real = SCALAR_FLOAT_MODE_P (from_mode);
323 enum insn_code code;
324 rtx libcall;
325
326 /* rtx code for making an equivalent value. */
327 enum rtx_code equiv_code = (unsignedp < 0 ? UNKNOWN
328 : (unsignedp ? ZERO_EXTEND : SIGN_EXTEND));
329
330
331 gcc_assert (to_real == from_real);
332 gcc_assert (to_mode != BLKmode);
333 gcc_assert (from_mode != BLKmode);
334
335 /* If the source and destination are already the same, then there's
336 nothing to do. */
337 if (to == from)
338 return;
339
340 /* If FROM is a SUBREG that indicates that we have already done at least
341 the required extension, strip it. We don't handle such SUBREGs as
342 TO here. */
343
344 if (GET_CODE (from) == SUBREG && SUBREG_PROMOTED_VAR_P (from)
345 && (GET_MODE_PRECISION (GET_MODE (SUBREG_REG (from)))
346 >= GET_MODE_PRECISION (to_mode))
347 && SUBREG_PROMOTED_UNSIGNED_P (from) == unsignedp)
348 from = gen_lowpart (to_mode, from), from_mode = to_mode;
349
350 gcc_assert (GET_CODE (to) != SUBREG || !SUBREG_PROMOTED_VAR_P (to));
351
352 if (to_mode == from_mode
353 || (from_mode == VOIDmode && CONSTANT_P (from)))
354 {
355 emit_move_insn (to, from);
356 return;
357 }
358
359 if (VECTOR_MODE_P (to_mode) || VECTOR_MODE_P (from_mode))
360 {
361 gcc_assert (GET_MODE_BITSIZE (from_mode) == GET_MODE_BITSIZE (to_mode));
362
363 if (VECTOR_MODE_P (to_mode))
364 from = simplify_gen_subreg (to_mode, from, GET_MODE (from), 0);
365 else
366 to = simplify_gen_subreg (from_mode, to, GET_MODE (to), 0);
367
368 emit_move_insn (to, from);
369 return;
370 }
371
372 if (GET_CODE (to) == CONCAT && GET_CODE (from) == CONCAT)
373 {
374 convert_move (XEXP (to, 0), XEXP (from, 0), unsignedp);
375 convert_move (XEXP (to, 1), XEXP (from, 1), unsignedp);
376 return;
377 }
378
379 if (to_real)
380 {
381 rtx value, insns;
382 convert_optab tab;
383
384 gcc_assert ((GET_MODE_PRECISION (from_mode)
385 != GET_MODE_PRECISION (to_mode))
386 || (DECIMAL_FLOAT_MODE_P (from_mode)
387 != DECIMAL_FLOAT_MODE_P (to_mode)));
388
389 if (GET_MODE_PRECISION (from_mode) == GET_MODE_PRECISION (to_mode))
390 /* Conversion between decimal float and binary float, same size. */
391 tab = DECIMAL_FLOAT_MODE_P (from_mode) ? trunc_optab : sext_optab;
392 else if (GET_MODE_PRECISION (from_mode) < GET_MODE_PRECISION (to_mode))
393 tab = sext_optab;
394 else
395 tab = trunc_optab;
396
397 /* Try converting directly if the insn is supported. */
398
399 code = convert_optab_handler (tab, to_mode, from_mode);
400 if (code != CODE_FOR_nothing)
401 {
402 emit_unop_insn (code, to, from,
403 tab == sext_optab ? FLOAT_EXTEND : FLOAT_TRUNCATE);
404 return;
405 }
406
407 /* Otherwise use a libcall. */
408 libcall = convert_optab_libfunc (tab, to_mode, from_mode);
409
410 /* Is this conversion implemented yet? */
411 gcc_assert (libcall);
412
413 start_sequence ();
414 value = emit_library_call_value (libcall, NULL_RTX, LCT_CONST, to_mode,
415 1, from, from_mode);
416 insns = get_insns ();
417 end_sequence ();
418 emit_libcall_block (insns, to, value,
419 tab == trunc_optab ? gen_rtx_FLOAT_TRUNCATE (to_mode,
420 from)
421 : gen_rtx_FLOAT_EXTEND (to_mode, from));
422 return;
423 }
424
425 /* Handle pointer conversion. */ /* SPEE 900220. */
426 /* Targets are expected to provide conversion insns between PxImode and
427 xImode for all MODE_PARTIAL_INT modes they use, but no others. */
428 if (GET_MODE_CLASS (to_mode) == MODE_PARTIAL_INT)
429 {
430 enum machine_mode full_mode
431 = smallest_mode_for_size (GET_MODE_BITSIZE (to_mode), MODE_INT);
432
433 gcc_assert (convert_optab_handler (trunc_optab, to_mode, full_mode)
434 != CODE_FOR_nothing);
435
436 if (full_mode != from_mode)
437 from = convert_to_mode (full_mode, from, unsignedp);
438 emit_unop_insn (convert_optab_handler (trunc_optab, to_mode, full_mode),
439 to, from, UNKNOWN);
440 return;
441 }
442 if (GET_MODE_CLASS (from_mode) == MODE_PARTIAL_INT)
443 {
444 rtx new_from;
445 enum machine_mode full_mode
446 = smallest_mode_for_size (GET_MODE_BITSIZE (from_mode), MODE_INT);
447 convert_optab ctab = unsignedp ? zext_optab : sext_optab;
448 enum insn_code icode;
449
450 icode = convert_optab_handler (ctab, full_mode, from_mode);
451 gcc_assert (icode != CODE_FOR_nothing);
452
453 if (to_mode == full_mode)
454 {
455 emit_unop_insn (icode, to, from, UNKNOWN);
456 return;
457 }
458
459 new_from = gen_reg_rtx (full_mode);
460 emit_unop_insn (icode, new_from, from, UNKNOWN);
461
462 /* else proceed to integer conversions below. */
463 from_mode = full_mode;
464 from = new_from;
465 }
466
467 /* Make sure both are fixed-point modes or both are not. */
468 gcc_assert (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode) ==
469 ALL_SCALAR_FIXED_POINT_MODE_P (to_mode));
470 if (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode))
471 {
472 /* If we widen from_mode to to_mode and they are in the same class,
473 we won't saturate the result.
474 Otherwise, always saturate the result to play safe. */
475 if (GET_MODE_CLASS (from_mode) == GET_MODE_CLASS (to_mode)
476 && GET_MODE_SIZE (from_mode) < GET_MODE_SIZE (to_mode))
477 expand_fixed_convert (to, from, 0, 0);
478 else
479 expand_fixed_convert (to, from, 0, 1);
480 return;
481 }
482
483 /* Now both modes are integers. */
484
485 /* Handle expanding beyond a word. */
486 if (GET_MODE_PRECISION (from_mode) < GET_MODE_PRECISION (to_mode)
487 && GET_MODE_PRECISION (to_mode) > BITS_PER_WORD)
488 {
489 rtx insns;
490 rtx lowpart;
491 rtx fill_value;
492 rtx lowfrom;
493 int i;
494 enum machine_mode lowpart_mode;
495 int nwords = CEIL (GET_MODE_SIZE (to_mode), UNITS_PER_WORD);
496
497 /* Try converting directly if the insn is supported. */
498 if ((code = can_extend_p (to_mode, from_mode, unsignedp))
499 != CODE_FOR_nothing)
500 {
501 /* If FROM is a SUBREG, put it into a register. Do this
502 so that we always generate the same set of insns for
503 better cse'ing; if an intermediate assignment occurred,
504 we won't be doing the operation directly on the SUBREG. */
505 if (optimize > 0 && GET_CODE (from) == SUBREG)
506 from = force_reg (from_mode, from);
507 emit_unop_insn (code, to, from, equiv_code);
508 return;
509 }
510 /* Next, try converting via full word. */
511 else if (GET_MODE_PRECISION (from_mode) < BITS_PER_WORD
512 && ((code = can_extend_p (to_mode, word_mode, unsignedp))
513 != CODE_FOR_nothing))
514 {
515 rtx word_to = gen_reg_rtx (word_mode);
516 if (REG_P (to))
517 {
518 if (reg_overlap_mentioned_p (to, from))
519 from = force_reg (from_mode, from);
520 emit_clobber (to);
521 }
522 convert_move (word_to, from, unsignedp);
523 emit_unop_insn (code, to, word_to, equiv_code);
524 return;
525 }
526
527 /* No special multiword conversion insn; do it by hand. */
528 start_sequence ();
529
530 /* Since we will turn this into a no conflict block, we must ensure the
531 the source does not overlap the target so force it into an isolated
532 register when maybe so. Likewise for any MEM input, since the
533 conversion sequence might require several references to it and we
534 must ensure we're getting the same value every time. */
535
536 if (MEM_P (from) || reg_overlap_mentioned_p (to, from))
537 from = force_reg (from_mode, from);
538
539 /* Get a copy of FROM widened to a word, if necessary. */
540 if (GET_MODE_PRECISION (from_mode) < BITS_PER_WORD)
541 lowpart_mode = word_mode;
542 else
543 lowpart_mode = from_mode;
544
545 lowfrom = convert_to_mode (lowpart_mode, from, unsignedp);
546
547 lowpart = gen_lowpart (lowpart_mode, to);
548 emit_move_insn (lowpart, lowfrom);
549
550 /* Compute the value to put in each remaining word. */
551 if (unsignedp)
552 fill_value = const0_rtx;
553 else
554 fill_value = emit_store_flag (gen_reg_rtx (word_mode),
555 LT, lowfrom, const0_rtx,
556 VOIDmode, 0, -1);
557
558 /* Fill the remaining words. */
559 for (i = GET_MODE_SIZE (lowpart_mode) / UNITS_PER_WORD; i < nwords; i++)
560 {
561 int index = (WORDS_BIG_ENDIAN ? nwords - i - 1 : i);
562 rtx subword = operand_subword (to, index, 1, to_mode);
563
564 gcc_assert (subword);
565
566 if (fill_value != subword)
567 emit_move_insn (subword, fill_value);
568 }
569
570 insns = get_insns ();
571 end_sequence ();
572
573 emit_insn (insns);
574 return;
575 }
576
577 /* Truncating multi-word to a word or less. */
578 if (GET_MODE_PRECISION (from_mode) > BITS_PER_WORD
579 && GET_MODE_PRECISION (to_mode) <= BITS_PER_WORD)
580 {
581 if (!((MEM_P (from)
582 && ! MEM_VOLATILE_P (from)
583 && direct_load[(int) to_mode]
584 && ! mode_dependent_address_p (XEXP (from, 0),
585 MEM_ADDR_SPACE (from)))
586 || REG_P (from)
587 || GET_CODE (from) == SUBREG))
588 from = force_reg (from_mode, from);
589 convert_move (to, gen_lowpart (word_mode, from), 0);
590 return;
591 }
592
593 /* Now follow all the conversions between integers
594 no more than a word long. */
595
596 /* For truncation, usually we can just refer to FROM in a narrower mode. */
597 if (GET_MODE_BITSIZE (to_mode) < GET_MODE_BITSIZE (from_mode)
598 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode, from_mode))
599 {
600 if (!((MEM_P (from)
601 && ! MEM_VOLATILE_P (from)
602 && direct_load[(int) to_mode]
603 && ! mode_dependent_address_p (XEXP (from, 0),
604 MEM_ADDR_SPACE (from)))
605 || REG_P (from)
606 || GET_CODE (from) == SUBREG))
607 from = force_reg (from_mode, from);
608 if (REG_P (from) && REGNO (from) < FIRST_PSEUDO_REGISTER
609 && ! HARD_REGNO_MODE_OK (REGNO (from), to_mode))
610 from = copy_to_reg (from);
611 emit_move_insn (to, gen_lowpart (to_mode, from));
612 return;
613 }
614
615 /* Handle extension. */
616 if (GET_MODE_PRECISION (to_mode) > GET_MODE_PRECISION (from_mode))
617 {
618 /* Convert directly if that works. */
619 if ((code = can_extend_p (to_mode, from_mode, unsignedp))
620 != CODE_FOR_nothing)
621 {
622 emit_unop_insn (code, to, from, equiv_code);
623 return;
624 }
625 else
626 {
627 enum machine_mode intermediate;
628 rtx tmp;
629 int shift_amount;
630
631 /* Search for a mode to convert via. */
632 for (intermediate = from_mode; intermediate != VOIDmode;
633 intermediate = GET_MODE_WIDER_MODE (intermediate))
634 if (((can_extend_p (to_mode, intermediate, unsignedp)
635 != CODE_FOR_nothing)
636 || (GET_MODE_SIZE (to_mode) < GET_MODE_SIZE (intermediate)
637 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode, intermediate)))
638 && (can_extend_p (intermediate, from_mode, unsignedp)
639 != CODE_FOR_nothing))
640 {
641 convert_move (to, convert_to_mode (intermediate, from,
642 unsignedp), unsignedp);
643 return;
644 }
645
646 /* No suitable intermediate mode.
647 Generate what we need with shifts. */
648 shift_amount = (GET_MODE_PRECISION (to_mode)
649 - GET_MODE_PRECISION (from_mode));
650 from = gen_lowpart (to_mode, force_reg (from_mode, from));
651 tmp = expand_shift (LSHIFT_EXPR, to_mode, from, shift_amount,
652 to, unsignedp);
653 tmp = expand_shift (RSHIFT_EXPR, to_mode, tmp, shift_amount,
654 to, unsignedp);
655 if (tmp != to)
656 emit_move_insn (to, tmp);
657 return;
658 }
659 }
660
661 /* Support special truncate insns for certain modes. */
662 if (convert_optab_handler (trunc_optab, to_mode,
663 from_mode) != CODE_FOR_nothing)
664 {
665 emit_unop_insn (convert_optab_handler (trunc_optab, to_mode, from_mode),
666 to, from, UNKNOWN);
667 return;
668 }
669
670 /* Handle truncation of volatile memrefs, and so on;
671 the things that couldn't be truncated directly,
672 and for which there was no special instruction.
673
674 ??? Code above formerly short-circuited this, for most integer
675 mode pairs, with a force_reg in from_mode followed by a recursive
676 call to this routine. Appears always to have been wrong. */
677 if (GET_MODE_PRECISION (to_mode) < GET_MODE_PRECISION (from_mode))
678 {
679 rtx temp = force_reg (to_mode, gen_lowpart (to_mode, from));
680 emit_move_insn (to, temp);
681 return;
682 }
683
684 /* Mode combination is not recognized. */
685 gcc_unreachable ();
686 }
687
688 /* Return an rtx for a value that would result
689 from converting X to mode MODE.
690 Both X and MODE may be floating, or both integer.
691 UNSIGNEDP is nonzero if X is an unsigned value.
692 This can be done by referring to a part of X in place
693 or by copying to a new temporary with conversion. */
694
695 rtx
696 convert_to_mode (enum machine_mode mode, rtx x, int unsignedp)
697 {
698 return convert_modes (mode, VOIDmode, x, unsignedp);
699 }
700
701 /* Return an rtx for a value that would result
702 from converting X from mode OLDMODE to mode MODE.
703 Both modes may be floating, or both integer.
704 UNSIGNEDP is nonzero if X is an unsigned value.
705
706 This can be done by referring to a part of X in place
707 or by copying to a new temporary with conversion.
708
709 You can give VOIDmode for OLDMODE, if you are sure X has a nonvoid mode. */
710
711 rtx
712 convert_modes (enum machine_mode mode, enum machine_mode oldmode, rtx x, int unsignedp)
713 {
714 rtx temp;
715
716 /* If FROM is a SUBREG that indicates that we have already done at least
717 the required extension, strip it. */
718
719 if (GET_CODE (x) == SUBREG && SUBREG_PROMOTED_VAR_P (x)
720 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) >= GET_MODE_SIZE (mode)
721 && SUBREG_PROMOTED_UNSIGNED_P (x) == unsignedp)
722 x = gen_lowpart (mode, x);
723
724 if (GET_MODE (x) != VOIDmode)
725 oldmode = GET_MODE (x);
726
727 if (mode == oldmode)
728 return x;
729
730 /* There is one case that we must handle specially: If we are converting
731 a CONST_INT into a mode whose size is twice HOST_BITS_PER_WIDE_INT and
732 we are to interpret the constant as unsigned, gen_lowpart will do
733 the wrong if the constant appears negative. What we want to do is
734 make the high-order word of the constant zero, not all ones. */
735
736 if (unsignedp && GET_MODE_CLASS (mode) == MODE_INT
737 && GET_MODE_BITSIZE (mode) == HOST_BITS_PER_DOUBLE_INT
738 && CONST_INT_P (x) && INTVAL (x) < 0)
739 {
740 double_int val = double_int::from_uhwi (INTVAL (x));
741
742 /* We need to zero extend VAL. */
743 if (oldmode != VOIDmode)
744 val = val.zext (GET_MODE_BITSIZE (oldmode));
745
746 return immed_double_int_const (val, mode);
747 }
748
749 /* We can do this with a gen_lowpart if both desired and current modes
750 are integer, and this is either a constant integer, a register, or a
751 non-volatile MEM. Except for the constant case where MODE is no
752 wider than HOST_BITS_PER_WIDE_INT, we must be narrowing the operand. */
753
754 if ((CONST_INT_P (x)
755 && GET_MODE_PRECISION (mode) <= HOST_BITS_PER_WIDE_INT)
756 || (GET_MODE_CLASS (mode) == MODE_INT
757 && GET_MODE_CLASS (oldmode) == MODE_INT
758 && (CONST_DOUBLE_AS_INT_P (x)
759 || (GET_MODE_PRECISION (mode) <= GET_MODE_PRECISION (oldmode)
760 && ((MEM_P (x) && ! MEM_VOLATILE_P (x)
761 && direct_load[(int) mode])
762 || (REG_P (x)
763 && (! HARD_REGISTER_P (x)
764 || HARD_REGNO_MODE_OK (REGNO (x), mode))
765 && TRULY_NOOP_TRUNCATION_MODES_P (mode,
766 GET_MODE (x))))))))
767 {
768 /* ?? If we don't know OLDMODE, we have to assume here that
769 X does not need sign- or zero-extension. This may not be
770 the case, but it's the best we can do. */
771 if (CONST_INT_P (x) && oldmode != VOIDmode
772 && GET_MODE_PRECISION (mode) > GET_MODE_PRECISION (oldmode))
773 {
774 HOST_WIDE_INT val = INTVAL (x);
775
776 /* We must sign or zero-extend in this case. Start by
777 zero-extending, then sign extend if we need to. */
778 val &= GET_MODE_MASK (oldmode);
779 if (! unsignedp
780 && val_signbit_known_set_p (oldmode, val))
781 val |= ~GET_MODE_MASK (oldmode);
782
783 return gen_int_mode (val, mode);
784 }
785
786 return gen_lowpart (mode, x);
787 }
788
789 /* Converting from integer constant into mode is always equivalent to an
790 subreg operation. */
791 if (VECTOR_MODE_P (mode) && GET_MODE (x) == VOIDmode)
792 {
793 gcc_assert (GET_MODE_BITSIZE (mode) == GET_MODE_BITSIZE (oldmode));
794 return simplify_gen_subreg (mode, x, oldmode, 0);
795 }
796
797 temp = gen_reg_rtx (mode);
798 convert_move (temp, x, unsignedp);
799 return temp;
800 }
801 \f
802 /* Return the largest alignment we can use for doing a move (or store)
803 of MAX_PIECES. ALIGN is the largest alignment we could use. */
804
805 static unsigned int
806 alignment_for_piecewise_move (unsigned int max_pieces, unsigned int align)
807 {
808 enum machine_mode tmode;
809
810 tmode = mode_for_size (max_pieces * BITS_PER_UNIT, MODE_INT, 1);
811 if (align >= GET_MODE_ALIGNMENT (tmode))
812 align = GET_MODE_ALIGNMENT (tmode);
813 else
814 {
815 enum machine_mode tmode, xmode;
816
817 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT), xmode = tmode;
818 tmode != VOIDmode;
819 xmode = tmode, tmode = GET_MODE_WIDER_MODE (tmode))
820 if (GET_MODE_SIZE (tmode) > max_pieces
821 || SLOW_UNALIGNED_ACCESS (tmode, align))
822 break;
823
824 align = MAX (align, GET_MODE_ALIGNMENT (xmode));
825 }
826
827 return align;
828 }
829
830 /* Return the widest integer mode no wider than SIZE. If no such mode
831 can be found, return VOIDmode. */
832
833 static enum machine_mode
834 widest_int_mode_for_size (unsigned int size)
835 {
836 enum machine_mode tmode, mode = VOIDmode;
837
838 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT);
839 tmode != VOIDmode; tmode = GET_MODE_WIDER_MODE (tmode))
840 if (GET_MODE_SIZE (tmode) < size)
841 mode = tmode;
842
843 return mode;
844 }
845
846 /* STORE_MAX_PIECES is the number of bytes at a time that we can
847 store efficiently. Due to internal GCC limitations, this is
848 MOVE_MAX_PIECES limited by the number of bytes GCC can represent
849 for an immediate constant. */
850
851 #define STORE_MAX_PIECES MIN (MOVE_MAX_PIECES, 2 * sizeof (HOST_WIDE_INT))
852
853 /* Determine whether the LEN bytes can be moved by using several move
854 instructions. Return nonzero if a call to move_by_pieces should
855 succeed. */
856
857 int
858 can_move_by_pieces (unsigned HOST_WIDE_INT len ATTRIBUTE_UNUSED,
859 unsigned int align ATTRIBUTE_UNUSED)
860 {
861 return MOVE_BY_PIECES_P (len, align);
862 }
863
864 /* Generate several move instructions to copy LEN bytes from block FROM to
865 block TO. (These are MEM rtx's with BLKmode).
866
867 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
868 used to push FROM to the stack.
869
870 ALIGN is maximum stack alignment we can assume.
871
872 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
873 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
874 stpcpy. */
875
876 rtx
877 move_by_pieces (rtx to, rtx from, unsigned HOST_WIDE_INT len,
878 unsigned int align, int endp)
879 {
880 struct move_by_pieces_d data;
881 enum machine_mode to_addr_mode;
882 enum machine_mode from_addr_mode = get_address_mode (from);
883 rtx to_addr, from_addr = XEXP (from, 0);
884 unsigned int max_size = MOVE_MAX_PIECES + 1;
885 enum insn_code icode;
886
887 align = MIN (to ? MEM_ALIGN (to) : align, MEM_ALIGN (from));
888
889 data.offset = 0;
890 data.from_addr = from_addr;
891 if (to)
892 {
893 to_addr_mode = get_address_mode (to);
894 to_addr = XEXP (to, 0);
895 data.to = to;
896 data.autinc_to
897 = (GET_CODE (to_addr) == PRE_INC || GET_CODE (to_addr) == PRE_DEC
898 || GET_CODE (to_addr) == POST_INC || GET_CODE (to_addr) == POST_DEC);
899 data.reverse
900 = (GET_CODE (to_addr) == PRE_DEC || GET_CODE (to_addr) == POST_DEC);
901 }
902 else
903 {
904 to_addr_mode = VOIDmode;
905 to_addr = NULL_RTX;
906 data.to = NULL_RTX;
907 data.autinc_to = 1;
908 #ifdef STACK_GROWS_DOWNWARD
909 data.reverse = 1;
910 #else
911 data.reverse = 0;
912 #endif
913 }
914 data.to_addr = to_addr;
915 data.from = from;
916 data.autinc_from
917 = (GET_CODE (from_addr) == PRE_INC || GET_CODE (from_addr) == PRE_DEC
918 || GET_CODE (from_addr) == POST_INC
919 || GET_CODE (from_addr) == POST_DEC);
920
921 data.explicit_inc_from = 0;
922 data.explicit_inc_to = 0;
923 if (data.reverse) data.offset = len;
924 data.len = len;
925
926 /* If copying requires more than two move insns,
927 copy addresses to registers (to make displacements shorter)
928 and use post-increment if available. */
929 if (!(data.autinc_from && data.autinc_to)
930 && move_by_pieces_ninsns (len, align, max_size) > 2)
931 {
932 /* Find the mode of the largest move...
933 MODE might not be used depending on the definitions of the
934 USE_* macros below. */
935 enum machine_mode mode ATTRIBUTE_UNUSED
936 = widest_int_mode_for_size (max_size);
937
938 if (USE_LOAD_PRE_DECREMENT (mode) && data.reverse && ! data.autinc_from)
939 {
940 data.from_addr = copy_to_mode_reg (from_addr_mode,
941 plus_constant (from_addr_mode,
942 from_addr, len));
943 data.autinc_from = 1;
944 data.explicit_inc_from = -1;
945 }
946 if (USE_LOAD_POST_INCREMENT (mode) && ! data.autinc_from)
947 {
948 data.from_addr = copy_to_mode_reg (from_addr_mode, from_addr);
949 data.autinc_from = 1;
950 data.explicit_inc_from = 1;
951 }
952 if (!data.autinc_from && CONSTANT_P (from_addr))
953 data.from_addr = copy_to_mode_reg (from_addr_mode, from_addr);
954 if (USE_STORE_PRE_DECREMENT (mode) && data.reverse && ! data.autinc_to)
955 {
956 data.to_addr = copy_to_mode_reg (to_addr_mode,
957 plus_constant (to_addr_mode,
958 to_addr, len));
959 data.autinc_to = 1;
960 data.explicit_inc_to = -1;
961 }
962 if (USE_STORE_POST_INCREMENT (mode) && ! data.reverse && ! data.autinc_to)
963 {
964 data.to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
965 data.autinc_to = 1;
966 data.explicit_inc_to = 1;
967 }
968 if (!data.autinc_to && CONSTANT_P (to_addr))
969 data.to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
970 }
971
972 align = alignment_for_piecewise_move (MOVE_MAX_PIECES, align);
973
974 /* First move what we can in the largest integer mode, then go to
975 successively smaller modes. */
976
977 while (max_size > 1 && data.len > 0)
978 {
979 enum machine_mode mode = widest_int_mode_for_size (max_size);
980
981 if (mode == VOIDmode)
982 break;
983
984 icode = optab_handler (mov_optab, mode);
985 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
986 move_by_pieces_1 (GEN_FCN (icode), mode, &data);
987
988 max_size = GET_MODE_SIZE (mode);
989 }
990
991 /* The code above should have handled everything. */
992 gcc_assert (!data.len);
993
994 if (endp)
995 {
996 rtx to1;
997
998 gcc_assert (!data.reverse);
999 if (data.autinc_to)
1000 {
1001 if (endp == 2)
1002 {
1003 if (HAVE_POST_INCREMENT && data.explicit_inc_to > 0)
1004 emit_insn (gen_add2_insn (data.to_addr, constm1_rtx));
1005 else
1006 data.to_addr = copy_to_mode_reg (to_addr_mode,
1007 plus_constant (to_addr_mode,
1008 data.to_addr,
1009 -1));
1010 }
1011 to1 = adjust_automodify_address (data.to, QImode, data.to_addr,
1012 data.offset);
1013 }
1014 else
1015 {
1016 if (endp == 2)
1017 --data.offset;
1018 to1 = adjust_address (data.to, QImode, data.offset);
1019 }
1020 return to1;
1021 }
1022 else
1023 return data.to;
1024 }
1025
1026 /* Return number of insns required to move L bytes by pieces.
1027 ALIGN (in bits) is maximum alignment we can assume. */
1028
1029 unsigned HOST_WIDE_INT
1030 move_by_pieces_ninsns (unsigned HOST_WIDE_INT l, unsigned int align,
1031 unsigned int max_size)
1032 {
1033 unsigned HOST_WIDE_INT n_insns = 0;
1034
1035 align = alignment_for_piecewise_move (MOVE_MAX_PIECES, align);
1036
1037 while (max_size > 1 && l > 0)
1038 {
1039 enum machine_mode mode;
1040 enum insn_code icode;
1041
1042 mode = widest_int_mode_for_size (max_size);
1043
1044 if (mode == VOIDmode)
1045 break;
1046
1047 icode = optab_handler (mov_optab, mode);
1048 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
1049 n_insns += l / GET_MODE_SIZE (mode), l %= GET_MODE_SIZE (mode);
1050
1051 max_size = GET_MODE_SIZE (mode);
1052 }
1053
1054 gcc_assert (!l);
1055 return n_insns;
1056 }
1057
1058 /* Subroutine of move_by_pieces. Move as many bytes as appropriate
1059 with move instructions for mode MODE. GENFUN is the gen_... function
1060 to make a move insn for that mode. DATA has all the other info. */
1061
1062 static void
1063 move_by_pieces_1 (insn_gen_fn genfun, machine_mode mode,
1064 struct move_by_pieces_d *data)
1065 {
1066 unsigned int size = GET_MODE_SIZE (mode);
1067 rtx to1 = NULL_RTX, from1;
1068
1069 while (data->len >= size)
1070 {
1071 if (data->reverse)
1072 data->offset -= size;
1073
1074 if (data->to)
1075 {
1076 if (data->autinc_to)
1077 to1 = adjust_automodify_address (data->to, mode, data->to_addr,
1078 data->offset);
1079 else
1080 to1 = adjust_address (data->to, mode, data->offset);
1081 }
1082
1083 if (data->autinc_from)
1084 from1 = adjust_automodify_address (data->from, mode, data->from_addr,
1085 data->offset);
1086 else
1087 from1 = adjust_address (data->from, mode, data->offset);
1088
1089 if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0)
1090 emit_insn (gen_add2_insn (data->to_addr,
1091 gen_int_mode (-(HOST_WIDE_INT) size,
1092 GET_MODE (data->to_addr))));
1093 if (HAVE_PRE_DECREMENT && data->explicit_inc_from < 0)
1094 emit_insn (gen_add2_insn (data->from_addr,
1095 gen_int_mode (-(HOST_WIDE_INT) size,
1096 GET_MODE (data->from_addr))));
1097
1098 if (data->to)
1099 emit_insn ((*genfun) (to1, from1));
1100 else
1101 {
1102 #ifdef PUSH_ROUNDING
1103 emit_single_push_insn (mode, from1, NULL);
1104 #else
1105 gcc_unreachable ();
1106 #endif
1107 }
1108
1109 if (HAVE_POST_INCREMENT && data->explicit_inc_to > 0)
1110 emit_insn (gen_add2_insn (data->to_addr,
1111 gen_int_mode (size,
1112 GET_MODE (data->to_addr))));
1113 if (HAVE_POST_INCREMENT && data->explicit_inc_from > 0)
1114 emit_insn (gen_add2_insn (data->from_addr,
1115 gen_int_mode (size,
1116 GET_MODE (data->from_addr))));
1117
1118 if (! data->reverse)
1119 data->offset += size;
1120
1121 data->len -= size;
1122 }
1123 }
1124 \f
1125 /* Emit code to move a block Y to a block X. This may be done with
1126 string-move instructions, with multiple scalar move instructions,
1127 or with a library call.
1128
1129 Both X and Y must be MEM rtx's (perhaps inside VOLATILE) with mode BLKmode.
1130 SIZE is an rtx that says how long they are.
1131 ALIGN is the maximum alignment we can assume they have.
1132 METHOD describes what kind of copy this is, and what mechanisms may be used.
1133 MIN_SIZE is the minimal size of block to move
1134 MAX_SIZE is the maximal size of block to move, if it can not be represented
1135 in unsigned HOST_WIDE_INT, than it is mask of all ones.
1136
1137 Return the address of the new block, if memcpy is called and returns it,
1138 0 otherwise. */
1139
1140 rtx
1141 emit_block_move_hints (rtx x, rtx y, rtx size, enum block_op_methods method,
1142 unsigned int expected_align, HOST_WIDE_INT expected_size,
1143 unsigned HOST_WIDE_INT min_size,
1144 unsigned HOST_WIDE_INT max_size,
1145 unsigned HOST_WIDE_INT probable_max_size)
1146 {
1147 bool may_use_call;
1148 rtx retval = 0;
1149 unsigned int align;
1150
1151 gcc_assert (size);
1152 if (CONST_INT_P (size)
1153 && INTVAL (size) == 0)
1154 return 0;
1155
1156 switch (method)
1157 {
1158 case BLOCK_OP_NORMAL:
1159 case BLOCK_OP_TAILCALL:
1160 may_use_call = true;
1161 break;
1162
1163 case BLOCK_OP_CALL_PARM:
1164 may_use_call = block_move_libcall_safe_for_call_parm ();
1165
1166 /* Make inhibit_defer_pop nonzero around the library call
1167 to force it to pop the arguments right away. */
1168 NO_DEFER_POP;
1169 break;
1170
1171 case BLOCK_OP_NO_LIBCALL:
1172 may_use_call = false;
1173 break;
1174
1175 default:
1176 gcc_unreachable ();
1177 }
1178
1179 gcc_assert (MEM_P (x) && MEM_P (y));
1180 align = MIN (MEM_ALIGN (x), MEM_ALIGN (y));
1181 gcc_assert (align >= BITS_PER_UNIT);
1182
1183 /* Make sure we've got BLKmode addresses; store_one_arg can decide that
1184 block copy is more efficient for other large modes, e.g. DCmode. */
1185 x = adjust_address (x, BLKmode, 0);
1186 y = adjust_address (y, BLKmode, 0);
1187
1188 /* Set MEM_SIZE as appropriate for this block copy. The main place this
1189 can be incorrect is coming from __builtin_memcpy. */
1190 if (CONST_INT_P (size))
1191 {
1192 x = shallow_copy_rtx (x);
1193 y = shallow_copy_rtx (y);
1194 set_mem_size (x, INTVAL (size));
1195 set_mem_size (y, INTVAL (size));
1196 }
1197
1198 if (CONST_INT_P (size) && MOVE_BY_PIECES_P (INTVAL (size), align))
1199 move_by_pieces (x, y, INTVAL (size), align, 0);
1200 else if (emit_block_move_via_movmem (x, y, size, align,
1201 expected_align, expected_size,
1202 min_size, max_size, probable_max_size))
1203 ;
1204 else if (may_use_call
1205 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (x))
1206 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (y)))
1207 {
1208 /* Since x and y are passed to a libcall, mark the corresponding
1209 tree EXPR as addressable. */
1210 tree y_expr = MEM_EXPR (y);
1211 tree x_expr = MEM_EXPR (x);
1212 if (y_expr)
1213 mark_addressable (y_expr);
1214 if (x_expr)
1215 mark_addressable (x_expr);
1216 retval = emit_block_move_via_libcall (x, y, size,
1217 method == BLOCK_OP_TAILCALL);
1218 }
1219
1220 else
1221 emit_block_move_via_loop (x, y, size, align);
1222
1223 if (method == BLOCK_OP_CALL_PARM)
1224 OK_DEFER_POP;
1225
1226 return retval;
1227 }
1228
1229 rtx
1230 emit_block_move (rtx x, rtx y, rtx size, enum block_op_methods method)
1231 {
1232 unsigned HOST_WIDE_INT max, min = 0;
1233 if (GET_CODE (size) == CONST_INT)
1234 min = max = UINTVAL (size);
1235 else
1236 max = GET_MODE_MASK (GET_MODE (size));
1237 return emit_block_move_hints (x, y, size, method, 0, -1,
1238 min, max, max);
1239 }
1240
1241 /* A subroutine of emit_block_move. Returns true if calling the
1242 block move libcall will not clobber any parameters which may have
1243 already been placed on the stack. */
1244
1245 static bool
1246 block_move_libcall_safe_for_call_parm (void)
1247 {
1248 #if defined (REG_PARM_STACK_SPACE)
1249 tree fn;
1250 #endif
1251
1252 /* If arguments are pushed on the stack, then they're safe. */
1253 if (PUSH_ARGS)
1254 return true;
1255
1256 /* If registers go on the stack anyway, any argument is sure to clobber
1257 an outgoing argument. */
1258 #if defined (REG_PARM_STACK_SPACE)
1259 fn = emit_block_move_libcall_fn (false);
1260 /* Avoid set but not used warning if *REG_PARM_STACK_SPACE doesn't
1261 depend on its argument. */
1262 (void) fn;
1263 if (OUTGOING_REG_PARM_STACK_SPACE ((!fn ? NULL_TREE : TREE_TYPE (fn)))
1264 && REG_PARM_STACK_SPACE (fn) != 0)
1265 return false;
1266 #endif
1267
1268 /* If any argument goes in memory, then it might clobber an outgoing
1269 argument. */
1270 {
1271 CUMULATIVE_ARGS args_so_far_v;
1272 cumulative_args_t args_so_far;
1273 tree fn, arg;
1274
1275 fn = emit_block_move_libcall_fn (false);
1276 INIT_CUMULATIVE_ARGS (args_so_far_v, TREE_TYPE (fn), NULL_RTX, 0, 3);
1277 args_so_far = pack_cumulative_args (&args_so_far_v);
1278
1279 arg = TYPE_ARG_TYPES (TREE_TYPE (fn));
1280 for ( ; arg != void_list_node ; arg = TREE_CHAIN (arg))
1281 {
1282 enum machine_mode mode = TYPE_MODE (TREE_VALUE (arg));
1283 rtx tmp = targetm.calls.function_arg (args_so_far, mode,
1284 NULL_TREE, true);
1285 if (!tmp || !REG_P (tmp))
1286 return false;
1287 if (targetm.calls.arg_partial_bytes (args_so_far, mode, NULL, 1))
1288 return false;
1289 targetm.calls.function_arg_advance (args_so_far, mode,
1290 NULL_TREE, true);
1291 }
1292 }
1293 return true;
1294 }
1295
1296 /* A subroutine of emit_block_move. Expand a movmem pattern;
1297 return true if successful. */
1298
1299 static bool
1300 emit_block_move_via_movmem (rtx x, rtx y, rtx size, unsigned int align,
1301 unsigned int expected_align, HOST_WIDE_INT expected_size,
1302 unsigned HOST_WIDE_INT min_size,
1303 unsigned HOST_WIDE_INT max_size,
1304 unsigned HOST_WIDE_INT probable_max_size)
1305 {
1306 int save_volatile_ok = volatile_ok;
1307 enum machine_mode mode;
1308
1309 if (expected_align < align)
1310 expected_align = align;
1311 if (expected_size != -1)
1312 {
1313 if ((unsigned HOST_WIDE_INT)expected_size > probable_max_size)
1314 expected_size = probable_max_size;
1315 if ((unsigned HOST_WIDE_INT)expected_size < min_size)
1316 expected_size = min_size;
1317 }
1318
1319 /* Since this is a move insn, we don't care about volatility. */
1320 volatile_ok = 1;
1321
1322 /* Try the most limited insn first, because there's no point
1323 including more than one in the machine description unless
1324 the more limited one has some advantage. */
1325
1326 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
1327 mode = GET_MODE_WIDER_MODE (mode))
1328 {
1329 enum insn_code code = direct_optab_handler (movmem_optab, mode);
1330
1331 if (code != CODE_FOR_nothing
1332 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
1333 here because if SIZE is less than the mode mask, as it is
1334 returned by the macro, it will definitely be less than the
1335 actual mode mask. Since SIZE is within the Pmode address
1336 space, we limit MODE to Pmode. */
1337 && ((CONST_INT_P (size)
1338 && ((unsigned HOST_WIDE_INT) INTVAL (size)
1339 <= (GET_MODE_MASK (mode) >> 1)))
1340 || max_size <= (GET_MODE_MASK (mode) >> 1)
1341 || GET_MODE_BITSIZE (mode) >= GET_MODE_BITSIZE (Pmode)))
1342 {
1343 struct expand_operand ops[9];
1344 unsigned int nops;
1345
1346 /* ??? When called via emit_block_move_for_call, it'd be
1347 nice if there were some way to inform the backend, so
1348 that it doesn't fail the expansion because it thinks
1349 emitting the libcall would be more efficient. */
1350 nops = insn_data[(int) code].n_generator_args;
1351 gcc_assert (nops == 4 || nops == 6 || nops == 8 || nops == 9);
1352
1353 create_fixed_operand (&ops[0], x);
1354 create_fixed_operand (&ops[1], y);
1355 /* The check above guarantees that this size conversion is valid. */
1356 create_convert_operand_to (&ops[2], size, mode, true);
1357 create_integer_operand (&ops[3], align / BITS_PER_UNIT);
1358 if (nops >= 6)
1359 {
1360 create_integer_operand (&ops[4], expected_align / BITS_PER_UNIT);
1361 create_integer_operand (&ops[5], expected_size);
1362 }
1363 if (nops >= 8)
1364 {
1365 create_integer_operand (&ops[6], min_size);
1366 /* If we can not represent the maximal size,
1367 make parameter NULL. */
1368 if ((HOST_WIDE_INT) max_size != -1)
1369 create_integer_operand (&ops[7], max_size);
1370 else
1371 create_fixed_operand (&ops[7], NULL);
1372 }
1373 if (nops == 9)
1374 {
1375 /* If we can not represent the maximal size,
1376 make parameter NULL. */
1377 if ((HOST_WIDE_INT) probable_max_size != -1)
1378 create_integer_operand (&ops[8], probable_max_size);
1379 else
1380 create_fixed_operand (&ops[8], NULL);
1381 }
1382 if (maybe_expand_insn (code, nops, ops))
1383 {
1384 volatile_ok = save_volatile_ok;
1385 return true;
1386 }
1387 }
1388 }
1389
1390 volatile_ok = save_volatile_ok;
1391 return false;
1392 }
1393
1394 /* A subroutine of emit_block_move. Expand a call to memcpy.
1395 Return the return value from memcpy, 0 otherwise. */
1396
1397 rtx
1398 emit_block_move_via_libcall (rtx dst, rtx src, rtx size, bool tailcall)
1399 {
1400 rtx dst_addr, src_addr;
1401 tree call_expr, fn, src_tree, dst_tree, size_tree;
1402 enum machine_mode size_mode;
1403 rtx retval;
1404
1405 /* Emit code to copy the addresses of DST and SRC and SIZE into new
1406 pseudos. We can then place those new pseudos into a VAR_DECL and
1407 use them later. */
1408
1409 dst_addr = copy_addr_to_reg (XEXP (dst, 0));
1410 src_addr = copy_addr_to_reg (XEXP (src, 0));
1411
1412 dst_addr = convert_memory_address (ptr_mode, dst_addr);
1413 src_addr = convert_memory_address (ptr_mode, src_addr);
1414
1415 dst_tree = make_tree (ptr_type_node, dst_addr);
1416 src_tree = make_tree (ptr_type_node, src_addr);
1417
1418 size_mode = TYPE_MODE (sizetype);
1419
1420 size = convert_to_mode (size_mode, size, 1);
1421 size = copy_to_mode_reg (size_mode, size);
1422
1423 /* It is incorrect to use the libcall calling conventions to call
1424 memcpy in this context. This could be a user call to memcpy and
1425 the user may wish to examine the return value from memcpy. For
1426 targets where libcalls and normal calls have different conventions
1427 for returning pointers, we could end up generating incorrect code. */
1428
1429 size_tree = make_tree (sizetype, size);
1430
1431 fn = emit_block_move_libcall_fn (true);
1432 call_expr = build_call_expr (fn, 3, dst_tree, src_tree, size_tree);
1433 CALL_EXPR_TAILCALL (call_expr) = tailcall;
1434
1435 retval = expand_normal (call_expr);
1436
1437 return retval;
1438 }
1439
1440 /* A subroutine of emit_block_move_via_libcall. Create the tree node
1441 for the function we use for block copies. */
1442
1443 static GTY(()) tree block_move_fn;
1444
1445 void
1446 init_block_move_fn (const char *asmspec)
1447 {
1448 if (!block_move_fn)
1449 {
1450 tree args, fn, attrs, attr_args;
1451
1452 fn = get_identifier ("memcpy");
1453 args = build_function_type_list (ptr_type_node, ptr_type_node,
1454 const_ptr_type_node, sizetype,
1455 NULL_TREE);
1456
1457 fn = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL, fn, args);
1458 DECL_EXTERNAL (fn) = 1;
1459 TREE_PUBLIC (fn) = 1;
1460 DECL_ARTIFICIAL (fn) = 1;
1461 TREE_NOTHROW (fn) = 1;
1462 DECL_VISIBILITY (fn) = VISIBILITY_DEFAULT;
1463 DECL_VISIBILITY_SPECIFIED (fn) = 1;
1464
1465 attr_args = build_tree_list (NULL_TREE, build_string (1, "1"));
1466 attrs = tree_cons (get_identifier ("fn spec"), attr_args, NULL);
1467
1468 decl_attributes (&fn, attrs, ATTR_FLAG_BUILT_IN);
1469
1470 block_move_fn = fn;
1471 }
1472
1473 if (asmspec)
1474 set_user_assembler_name (block_move_fn, asmspec);
1475 }
1476
1477 static tree
1478 emit_block_move_libcall_fn (int for_call)
1479 {
1480 static bool emitted_extern;
1481
1482 if (!block_move_fn)
1483 init_block_move_fn (NULL);
1484
1485 if (for_call && !emitted_extern)
1486 {
1487 emitted_extern = true;
1488 make_decl_rtl (block_move_fn);
1489 }
1490
1491 return block_move_fn;
1492 }
1493
1494 /* A subroutine of emit_block_move. Copy the data via an explicit
1495 loop. This is used only when libcalls are forbidden. */
1496 /* ??? It'd be nice to copy in hunks larger than QImode. */
1497
1498 static void
1499 emit_block_move_via_loop (rtx x, rtx y, rtx size,
1500 unsigned int align ATTRIBUTE_UNUSED)
1501 {
1502 rtx cmp_label, top_label, iter, x_addr, y_addr, tmp;
1503 enum machine_mode x_addr_mode = get_address_mode (x);
1504 enum machine_mode y_addr_mode = get_address_mode (y);
1505 enum machine_mode iter_mode;
1506
1507 iter_mode = GET_MODE (size);
1508 if (iter_mode == VOIDmode)
1509 iter_mode = word_mode;
1510
1511 top_label = gen_label_rtx ();
1512 cmp_label = gen_label_rtx ();
1513 iter = gen_reg_rtx (iter_mode);
1514
1515 emit_move_insn (iter, const0_rtx);
1516
1517 x_addr = force_operand (XEXP (x, 0), NULL_RTX);
1518 y_addr = force_operand (XEXP (y, 0), NULL_RTX);
1519 do_pending_stack_adjust ();
1520
1521 emit_jump (cmp_label);
1522 emit_label (top_label);
1523
1524 tmp = convert_modes (x_addr_mode, iter_mode, iter, true);
1525 x_addr = simplify_gen_binary (PLUS, x_addr_mode, x_addr, tmp);
1526
1527 if (x_addr_mode != y_addr_mode)
1528 tmp = convert_modes (y_addr_mode, iter_mode, iter, true);
1529 y_addr = simplify_gen_binary (PLUS, y_addr_mode, y_addr, tmp);
1530
1531 x = change_address (x, QImode, x_addr);
1532 y = change_address (y, QImode, y_addr);
1533
1534 emit_move_insn (x, y);
1535
1536 tmp = expand_simple_binop (iter_mode, PLUS, iter, const1_rtx, iter,
1537 true, OPTAB_LIB_WIDEN);
1538 if (tmp != iter)
1539 emit_move_insn (iter, tmp);
1540
1541 emit_label (cmp_label);
1542
1543 emit_cmp_and_jump_insns (iter, size, LT, NULL_RTX, iter_mode,
1544 true, top_label, REG_BR_PROB_BASE * 90 / 100);
1545 }
1546 \f
1547 /* Copy all or part of a value X into registers starting at REGNO.
1548 The number of registers to be filled is NREGS. */
1549
1550 void
1551 move_block_to_reg (int regno, rtx x, int nregs, enum machine_mode mode)
1552 {
1553 int i;
1554 #ifdef HAVE_load_multiple
1555 rtx pat;
1556 rtx last;
1557 #endif
1558
1559 if (nregs == 0)
1560 return;
1561
1562 if (CONSTANT_P (x) && !targetm.legitimate_constant_p (mode, x))
1563 x = validize_mem (force_const_mem (mode, x));
1564
1565 /* See if the machine can do this with a load multiple insn. */
1566 #ifdef HAVE_load_multiple
1567 if (HAVE_load_multiple)
1568 {
1569 last = get_last_insn ();
1570 pat = gen_load_multiple (gen_rtx_REG (word_mode, regno), x,
1571 GEN_INT (nregs));
1572 if (pat)
1573 {
1574 emit_insn (pat);
1575 return;
1576 }
1577 else
1578 delete_insns_since (last);
1579 }
1580 #endif
1581
1582 for (i = 0; i < nregs; i++)
1583 emit_move_insn (gen_rtx_REG (word_mode, regno + i),
1584 operand_subword_force (x, i, mode));
1585 }
1586
1587 /* Copy all or part of a BLKmode value X out of registers starting at REGNO.
1588 The number of registers to be filled is NREGS. */
1589
1590 void
1591 move_block_from_reg (int regno, rtx x, int nregs)
1592 {
1593 int i;
1594
1595 if (nregs == 0)
1596 return;
1597
1598 /* See if the machine can do this with a store multiple insn. */
1599 #ifdef HAVE_store_multiple
1600 if (HAVE_store_multiple)
1601 {
1602 rtx last = get_last_insn ();
1603 rtx pat = gen_store_multiple (x, gen_rtx_REG (word_mode, regno),
1604 GEN_INT (nregs));
1605 if (pat)
1606 {
1607 emit_insn (pat);
1608 return;
1609 }
1610 else
1611 delete_insns_since (last);
1612 }
1613 #endif
1614
1615 for (i = 0; i < nregs; i++)
1616 {
1617 rtx tem = operand_subword (x, i, 1, BLKmode);
1618
1619 gcc_assert (tem);
1620
1621 emit_move_insn (tem, gen_rtx_REG (word_mode, regno + i));
1622 }
1623 }
1624
1625 /* Generate a PARALLEL rtx for a new non-consecutive group of registers from
1626 ORIG, where ORIG is a non-consecutive group of registers represented by
1627 a PARALLEL. The clone is identical to the original except in that the
1628 original set of registers is replaced by a new set of pseudo registers.
1629 The new set has the same modes as the original set. */
1630
1631 rtx
1632 gen_group_rtx (rtx orig)
1633 {
1634 int i, length;
1635 rtx *tmps;
1636
1637 gcc_assert (GET_CODE (orig) == PARALLEL);
1638
1639 length = XVECLEN (orig, 0);
1640 tmps = XALLOCAVEC (rtx, length);
1641
1642 /* Skip a NULL entry in first slot. */
1643 i = XEXP (XVECEXP (orig, 0, 0), 0) ? 0 : 1;
1644
1645 if (i)
1646 tmps[0] = 0;
1647
1648 for (; i < length; i++)
1649 {
1650 enum machine_mode mode = GET_MODE (XEXP (XVECEXP (orig, 0, i), 0));
1651 rtx offset = XEXP (XVECEXP (orig, 0, i), 1);
1652
1653 tmps[i] = gen_rtx_EXPR_LIST (VOIDmode, gen_reg_rtx (mode), offset);
1654 }
1655
1656 return gen_rtx_PARALLEL (GET_MODE (orig), gen_rtvec_v (length, tmps));
1657 }
1658
1659 /* A subroutine of emit_group_load. Arguments as for emit_group_load,
1660 except that values are placed in TMPS[i], and must later be moved
1661 into corresponding XEXP (XVECEXP (DST, 0, i), 0) element. */
1662
1663 static void
1664 emit_group_load_1 (rtx *tmps, rtx dst, rtx orig_src, tree type, int ssize)
1665 {
1666 rtx src;
1667 int start, i;
1668 enum machine_mode m = GET_MODE (orig_src);
1669
1670 gcc_assert (GET_CODE (dst) == PARALLEL);
1671
1672 if (m != VOIDmode
1673 && !SCALAR_INT_MODE_P (m)
1674 && !MEM_P (orig_src)
1675 && GET_CODE (orig_src) != CONCAT)
1676 {
1677 enum machine_mode imode = int_mode_for_mode (GET_MODE (orig_src));
1678 if (imode == BLKmode)
1679 src = assign_stack_temp (GET_MODE (orig_src), ssize);
1680 else
1681 src = gen_reg_rtx (imode);
1682 if (imode != BLKmode)
1683 src = gen_lowpart (GET_MODE (orig_src), src);
1684 emit_move_insn (src, orig_src);
1685 /* ...and back again. */
1686 if (imode != BLKmode)
1687 src = gen_lowpart (imode, src);
1688 emit_group_load_1 (tmps, dst, src, type, ssize);
1689 return;
1690 }
1691
1692 /* Check for a NULL entry, used to indicate that the parameter goes
1693 both on the stack and in registers. */
1694 if (XEXP (XVECEXP (dst, 0, 0), 0))
1695 start = 0;
1696 else
1697 start = 1;
1698
1699 /* Process the pieces. */
1700 for (i = start; i < XVECLEN (dst, 0); i++)
1701 {
1702 enum machine_mode mode = GET_MODE (XEXP (XVECEXP (dst, 0, i), 0));
1703 HOST_WIDE_INT bytepos = INTVAL (XEXP (XVECEXP (dst, 0, i), 1));
1704 unsigned int bytelen = GET_MODE_SIZE (mode);
1705 int shift = 0;
1706
1707 /* Handle trailing fragments that run over the size of the struct. */
1708 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
1709 {
1710 /* Arrange to shift the fragment to where it belongs.
1711 extract_bit_field loads to the lsb of the reg. */
1712 if (
1713 #ifdef BLOCK_REG_PADDING
1714 BLOCK_REG_PADDING (GET_MODE (orig_src), type, i == start)
1715 == (BYTES_BIG_ENDIAN ? upward : downward)
1716 #else
1717 BYTES_BIG_ENDIAN
1718 #endif
1719 )
1720 shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT;
1721 bytelen = ssize - bytepos;
1722 gcc_assert (bytelen > 0);
1723 }
1724
1725 /* If we won't be loading directly from memory, protect the real source
1726 from strange tricks we might play; but make sure that the source can
1727 be loaded directly into the destination. */
1728 src = orig_src;
1729 if (!MEM_P (orig_src)
1730 && (!CONSTANT_P (orig_src)
1731 || (GET_MODE (orig_src) != mode
1732 && GET_MODE (orig_src) != VOIDmode)))
1733 {
1734 if (GET_MODE (orig_src) == VOIDmode)
1735 src = gen_reg_rtx (mode);
1736 else
1737 src = gen_reg_rtx (GET_MODE (orig_src));
1738
1739 emit_move_insn (src, orig_src);
1740 }
1741
1742 /* Optimize the access just a bit. */
1743 if (MEM_P (src)
1744 && (! SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (src))
1745 || MEM_ALIGN (src) >= GET_MODE_ALIGNMENT (mode))
1746 && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0
1747 && bytelen == GET_MODE_SIZE (mode))
1748 {
1749 tmps[i] = gen_reg_rtx (mode);
1750 emit_move_insn (tmps[i], adjust_address (src, mode, bytepos));
1751 }
1752 else if (COMPLEX_MODE_P (mode)
1753 && GET_MODE (src) == mode
1754 && bytelen == GET_MODE_SIZE (mode))
1755 /* Let emit_move_complex do the bulk of the work. */
1756 tmps[i] = src;
1757 else if (GET_CODE (src) == CONCAT)
1758 {
1759 unsigned int slen = GET_MODE_SIZE (GET_MODE (src));
1760 unsigned int slen0 = GET_MODE_SIZE (GET_MODE (XEXP (src, 0)));
1761
1762 if ((bytepos == 0 && bytelen == slen0)
1763 || (bytepos != 0 && bytepos + bytelen <= slen))
1764 {
1765 /* The following assumes that the concatenated objects all
1766 have the same size. In this case, a simple calculation
1767 can be used to determine the object and the bit field
1768 to be extracted. */
1769 tmps[i] = XEXP (src, bytepos / slen0);
1770 if (! CONSTANT_P (tmps[i])
1771 && (!REG_P (tmps[i]) || GET_MODE (tmps[i]) != mode))
1772 tmps[i] = extract_bit_field (tmps[i], bytelen * BITS_PER_UNIT,
1773 (bytepos % slen0) * BITS_PER_UNIT,
1774 1, NULL_RTX, mode, mode);
1775 }
1776 else
1777 {
1778 rtx mem;
1779
1780 gcc_assert (!bytepos);
1781 mem = assign_stack_temp (GET_MODE (src), slen);
1782 emit_move_insn (mem, src);
1783 tmps[i] = extract_bit_field (mem, bytelen * BITS_PER_UNIT,
1784 0, 1, NULL_RTX, mode, mode);
1785 }
1786 }
1787 /* FIXME: A SIMD parallel will eventually lead to a subreg of a
1788 SIMD register, which is currently broken. While we get GCC
1789 to emit proper RTL for these cases, let's dump to memory. */
1790 else if (VECTOR_MODE_P (GET_MODE (dst))
1791 && REG_P (src))
1792 {
1793 int slen = GET_MODE_SIZE (GET_MODE (src));
1794 rtx mem;
1795
1796 mem = assign_stack_temp (GET_MODE (src), slen);
1797 emit_move_insn (mem, src);
1798 tmps[i] = adjust_address (mem, mode, (int) bytepos);
1799 }
1800 else if (CONSTANT_P (src) && GET_MODE (dst) != BLKmode
1801 && XVECLEN (dst, 0) > 1)
1802 tmps[i] = simplify_gen_subreg (mode, src, GET_MODE (dst), bytepos);
1803 else if (CONSTANT_P (src))
1804 {
1805 HOST_WIDE_INT len = (HOST_WIDE_INT) bytelen;
1806
1807 if (len == ssize)
1808 tmps[i] = src;
1809 else
1810 {
1811 rtx first, second;
1812
1813 gcc_assert (2 * len == ssize);
1814 split_double (src, &first, &second);
1815 if (i)
1816 tmps[i] = second;
1817 else
1818 tmps[i] = first;
1819 }
1820 }
1821 else if (REG_P (src) && GET_MODE (src) == mode)
1822 tmps[i] = src;
1823 else
1824 tmps[i] = extract_bit_field (src, bytelen * BITS_PER_UNIT,
1825 bytepos * BITS_PER_UNIT, 1, NULL_RTX,
1826 mode, mode);
1827
1828 if (shift)
1829 tmps[i] = expand_shift (LSHIFT_EXPR, mode, tmps[i],
1830 shift, tmps[i], 0);
1831 }
1832 }
1833
1834 /* Emit code to move a block SRC of type TYPE to a block DST,
1835 where DST is non-consecutive registers represented by a PARALLEL.
1836 SSIZE represents the total size of block ORIG_SRC in bytes, or -1
1837 if not known. */
1838
1839 void
1840 emit_group_load (rtx dst, rtx src, tree type, int ssize)
1841 {
1842 rtx *tmps;
1843 int i;
1844
1845 tmps = XALLOCAVEC (rtx, XVECLEN (dst, 0));
1846 emit_group_load_1 (tmps, dst, src, type, ssize);
1847
1848 /* Copy the extracted pieces into the proper (probable) hard regs. */
1849 for (i = 0; i < XVECLEN (dst, 0); i++)
1850 {
1851 rtx d = XEXP (XVECEXP (dst, 0, i), 0);
1852 if (d == NULL)
1853 continue;
1854 emit_move_insn (d, tmps[i]);
1855 }
1856 }
1857
1858 /* Similar, but load SRC into new pseudos in a format that looks like
1859 PARALLEL. This can later be fed to emit_group_move to get things
1860 in the right place. */
1861
1862 rtx
1863 emit_group_load_into_temps (rtx parallel, rtx src, tree type, int ssize)
1864 {
1865 rtvec vec;
1866 int i;
1867
1868 vec = rtvec_alloc (XVECLEN (parallel, 0));
1869 emit_group_load_1 (&RTVEC_ELT (vec, 0), parallel, src, type, ssize);
1870
1871 /* Convert the vector to look just like the original PARALLEL, except
1872 with the computed values. */
1873 for (i = 0; i < XVECLEN (parallel, 0); i++)
1874 {
1875 rtx e = XVECEXP (parallel, 0, i);
1876 rtx d = XEXP (e, 0);
1877
1878 if (d)
1879 {
1880 d = force_reg (GET_MODE (d), RTVEC_ELT (vec, i));
1881 e = alloc_EXPR_LIST (REG_NOTE_KIND (e), d, XEXP (e, 1));
1882 }
1883 RTVEC_ELT (vec, i) = e;
1884 }
1885
1886 return gen_rtx_PARALLEL (GET_MODE (parallel), vec);
1887 }
1888
1889 /* Emit code to move a block SRC to block DST, where SRC and DST are
1890 non-consecutive groups of registers, each represented by a PARALLEL. */
1891
1892 void
1893 emit_group_move (rtx dst, rtx src)
1894 {
1895 int i;
1896
1897 gcc_assert (GET_CODE (src) == PARALLEL
1898 && GET_CODE (dst) == PARALLEL
1899 && XVECLEN (src, 0) == XVECLEN (dst, 0));
1900
1901 /* Skip first entry if NULL. */
1902 for (i = XEXP (XVECEXP (src, 0, 0), 0) ? 0 : 1; i < XVECLEN (src, 0); i++)
1903 emit_move_insn (XEXP (XVECEXP (dst, 0, i), 0),
1904 XEXP (XVECEXP (src, 0, i), 0));
1905 }
1906
1907 /* Move a group of registers represented by a PARALLEL into pseudos. */
1908
1909 rtx
1910 emit_group_move_into_temps (rtx src)
1911 {
1912 rtvec vec = rtvec_alloc (XVECLEN (src, 0));
1913 int i;
1914
1915 for (i = 0; i < XVECLEN (src, 0); i++)
1916 {
1917 rtx e = XVECEXP (src, 0, i);
1918 rtx d = XEXP (e, 0);
1919
1920 if (d)
1921 e = alloc_EXPR_LIST (REG_NOTE_KIND (e), copy_to_reg (d), XEXP (e, 1));
1922 RTVEC_ELT (vec, i) = e;
1923 }
1924
1925 return gen_rtx_PARALLEL (GET_MODE (src), vec);
1926 }
1927
1928 /* Emit code to move a block SRC to a block ORIG_DST of type TYPE,
1929 where SRC is non-consecutive registers represented by a PARALLEL.
1930 SSIZE represents the total size of block ORIG_DST, or -1 if not
1931 known. */
1932
1933 void
1934 emit_group_store (rtx orig_dst, rtx src, tree type ATTRIBUTE_UNUSED, int ssize)
1935 {
1936 rtx *tmps, dst;
1937 int start, finish, i;
1938 enum machine_mode m = GET_MODE (orig_dst);
1939
1940 gcc_assert (GET_CODE (src) == PARALLEL);
1941
1942 if (!SCALAR_INT_MODE_P (m)
1943 && !MEM_P (orig_dst) && GET_CODE (orig_dst) != CONCAT)
1944 {
1945 enum machine_mode imode = int_mode_for_mode (GET_MODE (orig_dst));
1946 if (imode == BLKmode)
1947 dst = assign_stack_temp (GET_MODE (orig_dst), ssize);
1948 else
1949 dst = gen_reg_rtx (imode);
1950 emit_group_store (dst, src, type, ssize);
1951 if (imode != BLKmode)
1952 dst = gen_lowpart (GET_MODE (orig_dst), dst);
1953 emit_move_insn (orig_dst, dst);
1954 return;
1955 }
1956
1957 /* Check for a NULL entry, used to indicate that the parameter goes
1958 both on the stack and in registers. */
1959 if (XEXP (XVECEXP (src, 0, 0), 0))
1960 start = 0;
1961 else
1962 start = 1;
1963 finish = XVECLEN (src, 0);
1964
1965 tmps = XALLOCAVEC (rtx, finish);
1966
1967 /* Copy the (probable) hard regs into pseudos. */
1968 for (i = start; i < finish; i++)
1969 {
1970 rtx reg = XEXP (XVECEXP (src, 0, i), 0);
1971 if (!REG_P (reg) || REGNO (reg) < FIRST_PSEUDO_REGISTER)
1972 {
1973 tmps[i] = gen_reg_rtx (GET_MODE (reg));
1974 emit_move_insn (tmps[i], reg);
1975 }
1976 else
1977 tmps[i] = reg;
1978 }
1979
1980 /* If we won't be storing directly into memory, protect the real destination
1981 from strange tricks we might play. */
1982 dst = orig_dst;
1983 if (GET_CODE (dst) == PARALLEL)
1984 {
1985 rtx temp;
1986
1987 /* We can get a PARALLEL dst if there is a conditional expression in
1988 a return statement. In that case, the dst and src are the same,
1989 so no action is necessary. */
1990 if (rtx_equal_p (dst, src))
1991 return;
1992
1993 /* It is unclear if we can ever reach here, but we may as well handle
1994 it. Allocate a temporary, and split this into a store/load to/from
1995 the temporary. */
1996
1997 temp = assign_stack_temp (GET_MODE (dst), ssize);
1998 emit_group_store (temp, src, type, ssize);
1999 emit_group_load (dst, temp, type, ssize);
2000 return;
2001 }
2002 else if (!MEM_P (dst) && GET_CODE (dst) != CONCAT)
2003 {
2004 enum machine_mode outer = GET_MODE (dst);
2005 enum machine_mode inner;
2006 HOST_WIDE_INT bytepos;
2007 bool done = false;
2008 rtx temp;
2009
2010 if (!REG_P (dst) || REGNO (dst) < FIRST_PSEUDO_REGISTER)
2011 dst = gen_reg_rtx (outer);
2012
2013 /* Make life a bit easier for combine. */
2014 /* If the first element of the vector is the low part
2015 of the destination mode, use a paradoxical subreg to
2016 initialize the destination. */
2017 if (start < finish)
2018 {
2019 inner = GET_MODE (tmps[start]);
2020 bytepos = subreg_lowpart_offset (inner, outer);
2021 if (INTVAL (XEXP (XVECEXP (src, 0, start), 1)) == bytepos)
2022 {
2023 temp = simplify_gen_subreg (outer, tmps[start],
2024 inner, 0);
2025 if (temp)
2026 {
2027 emit_move_insn (dst, temp);
2028 done = true;
2029 start++;
2030 }
2031 }
2032 }
2033
2034 /* If the first element wasn't the low part, try the last. */
2035 if (!done
2036 && start < finish - 1)
2037 {
2038 inner = GET_MODE (tmps[finish - 1]);
2039 bytepos = subreg_lowpart_offset (inner, outer);
2040 if (INTVAL (XEXP (XVECEXP (src, 0, finish - 1), 1)) == bytepos)
2041 {
2042 temp = simplify_gen_subreg (outer, tmps[finish - 1],
2043 inner, 0);
2044 if (temp)
2045 {
2046 emit_move_insn (dst, temp);
2047 done = true;
2048 finish--;
2049 }
2050 }
2051 }
2052
2053 /* Otherwise, simply initialize the result to zero. */
2054 if (!done)
2055 emit_move_insn (dst, CONST0_RTX (outer));
2056 }
2057
2058 /* Process the pieces. */
2059 for (i = start; i < finish; i++)
2060 {
2061 HOST_WIDE_INT bytepos = INTVAL (XEXP (XVECEXP (src, 0, i), 1));
2062 enum machine_mode mode = GET_MODE (tmps[i]);
2063 unsigned int bytelen = GET_MODE_SIZE (mode);
2064 unsigned int adj_bytelen;
2065 rtx dest = dst;
2066
2067 /* Handle trailing fragments that run over the size of the struct. */
2068 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
2069 adj_bytelen = ssize - bytepos;
2070 else
2071 adj_bytelen = bytelen;
2072
2073 if (GET_CODE (dst) == CONCAT)
2074 {
2075 if (bytepos + adj_bytelen
2076 <= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0))))
2077 dest = XEXP (dst, 0);
2078 else if (bytepos >= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0))))
2079 {
2080 bytepos -= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0)));
2081 dest = XEXP (dst, 1);
2082 }
2083 else
2084 {
2085 enum machine_mode dest_mode = GET_MODE (dest);
2086 enum machine_mode tmp_mode = GET_MODE (tmps[i]);
2087
2088 gcc_assert (bytepos == 0 && XVECLEN (src, 0));
2089
2090 if (GET_MODE_ALIGNMENT (dest_mode)
2091 >= GET_MODE_ALIGNMENT (tmp_mode))
2092 {
2093 dest = assign_stack_temp (dest_mode,
2094 GET_MODE_SIZE (dest_mode));
2095 emit_move_insn (adjust_address (dest,
2096 tmp_mode,
2097 bytepos),
2098 tmps[i]);
2099 dst = dest;
2100 }
2101 else
2102 {
2103 dest = assign_stack_temp (tmp_mode,
2104 GET_MODE_SIZE (tmp_mode));
2105 emit_move_insn (dest, tmps[i]);
2106 dst = adjust_address (dest, dest_mode, bytepos);
2107 }
2108 break;
2109 }
2110 }
2111
2112 /* Handle trailing fragments that run over the size of the struct. */
2113 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
2114 {
2115 /* store_bit_field always takes its value from the lsb.
2116 Move the fragment to the lsb if it's not already there. */
2117 if (
2118 #ifdef BLOCK_REG_PADDING
2119 BLOCK_REG_PADDING (GET_MODE (orig_dst), type, i == start)
2120 == (BYTES_BIG_ENDIAN ? upward : downward)
2121 #else
2122 BYTES_BIG_ENDIAN
2123 #endif
2124 )
2125 {
2126 int shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT;
2127 tmps[i] = expand_shift (RSHIFT_EXPR, mode, tmps[i],
2128 shift, tmps[i], 0);
2129 }
2130
2131 /* Make sure not to write past the end of the struct. */
2132 store_bit_field (dest,
2133 adj_bytelen * BITS_PER_UNIT, bytepos * BITS_PER_UNIT,
2134 bytepos * BITS_PER_UNIT, ssize * BITS_PER_UNIT - 1,
2135 VOIDmode, tmps[i]);
2136 }
2137
2138 /* Optimize the access just a bit. */
2139 else if (MEM_P (dest)
2140 && (!SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (dest))
2141 || MEM_ALIGN (dest) >= GET_MODE_ALIGNMENT (mode))
2142 && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0
2143 && bytelen == GET_MODE_SIZE (mode))
2144 emit_move_insn (adjust_address (dest, mode, bytepos), tmps[i]);
2145
2146 else
2147 store_bit_field (dest, bytelen * BITS_PER_UNIT, bytepos * BITS_PER_UNIT,
2148 0, 0, mode, tmps[i]);
2149 }
2150
2151 /* Copy from the pseudo into the (probable) hard reg. */
2152 if (orig_dst != dst)
2153 emit_move_insn (orig_dst, dst);
2154 }
2155
2156 /* Return a form of X that does not use a PARALLEL. TYPE is the type
2157 of the value stored in X. */
2158
2159 rtx
2160 maybe_emit_group_store (rtx x, tree type)
2161 {
2162 enum machine_mode mode = TYPE_MODE (type);
2163 gcc_checking_assert (GET_MODE (x) == VOIDmode || GET_MODE (x) == mode);
2164 if (GET_CODE (x) == PARALLEL)
2165 {
2166 rtx result = gen_reg_rtx (mode);
2167 emit_group_store (result, x, type, int_size_in_bytes (type));
2168 return result;
2169 }
2170 return x;
2171 }
2172
2173 /* Copy a BLKmode object of TYPE out of a register SRCREG into TARGET.
2174
2175 This is used on targets that return BLKmode values in registers. */
2176
2177 void
2178 copy_blkmode_from_reg (rtx target, rtx srcreg, tree type)
2179 {
2180 unsigned HOST_WIDE_INT bytes = int_size_in_bytes (type);
2181 rtx src = NULL, dst = NULL;
2182 unsigned HOST_WIDE_INT bitsize = MIN (TYPE_ALIGN (type), BITS_PER_WORD);
2183 unsigned HOST_WIDE_INT bitpos, xbitpos, padding_correction = 0;
2184 enum machine_mode mode = GET_MODE (srcreg);
2185 enum machine_mode tmode = GET_MODE (target);
2186 enum machine_mode copy_mode;
2187
2188 /* BLKmode registers created in the back-end shouldn't have survived. */
2189 gcc_assert (mode != BLKmode);
2190
2191 /* If the structure doesn't take up a whole number of words, see whether
2192 SRCREG is padded on the left or on the right. If it's on the left,
2193 set PADDING_CORRECTION to the number of bits to skip.
2194
2195 In most ABIs, the structure will be returned at the least end of
2196 the register, which translates to right padding on little-endian
2197 targets and left padding on big-endian targets. The opposite
2198 holds if the structure is returned at the most significant
2199 end of the register. */
2200 if (bytes % UNITS_PER_WORD != 0
2201 && (targetm.calls.return_in_msb (type)
2202 ? !BYTES_BIG_ENDIAN
2203 : BYTES_BIG_ENDIAN))
2204 padding_correction
2205 = (BITS_PER_WORD - ((bytes % UNITS_PER_WORD) * BITS_PER_UNIT));
2206
2207 /* We can use a single move if we have an exact mode for the size. */
2208 else if (MEM_P (target)
2209 && (!SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (target))
2210 || MEM_ALIGN (target) >= GET_MODE_ALIGNMENT (mode))
2211 && bytes == GET_MODE_SIZE (mode))
2212 {
2213 emit_move_insn (adjust_address (target, mode, 0), srcreg);
2214 return;
2215 }
2216
2217 /* And if we additionally have the same mode for a register. */
2218 else if (REG_P (target)
2219 && GET_MODE (target) == mode
2220 && bytes == GET_MODE_SIZE (mode))
2221 {
2222 emit_move_insn (target, srcreg);
2223 return;
2224 }
2225
2226 /* This code assumes srcreg is at least a full word. If it isn't, copy it
2227 into a new pseudo which is a full word. */
2228 if (GET_MODE_SIZE (mode) < UNITS_PER_WORD)
2229 {
2230 srcreg = convert_to_mode (word_mode, srcreg, TYPE_UNSIGNED (type));
2231 mode = word_mode;
2232 }
2233
2234 /* Copy the structure BITSIZE bits at a time. If the target lives in
2235 memory, take care of not reading/writing past its end by selecting
2236 a copy mode suited to BITSIZE. This should always be possible given
2237 how it is computed.
2238
2239 If the target lives in register, make sure not to select a copy mode
2240 larger than the mode of the register.
2241
2242 We could probably emit more efficient code for machines which do not use
2243 strict alignment, but it doesn't seem worth the effort at the current
2244 time. */
2245
2246 copy_mode = word_mode;
2247 if (MEM_P (target))
2248 {
2249 enum machine_mode mem_mode = mode_for_size (bitsize, MODE_INT, 1);
2250 if (mem_mode != BLKmode)
2251 copy_mode = mem_mode;
2252 }
2253 else if (REG_P (target) && GET_MODE_BITSIZE (tmode) < BITS_PER_WORD)
2254 copy_mode = tmode;
2255
2256 for (bitpos = 0, xbitpos = padding_correction;
2257 bitpos < bytes * BITS_PER_UNIT;
2258 bitpos += bitsize, xbitpos += bitsize)
2259 {
2260 /* We need a new source operand each time xbitpos is on a
2261 word boundary and when xbitpos == padding_correction
2262 (the first time through). */
2263 if (xbitpos % BITS_PER_WORD == 0 || xbitpos == padding_correction)
2264 src = operand_subword_force (srcreg, xbitpos / BITS_PER_WORD, mode);
2265
2266 /* We need a new destination operand each time bitpos is on
2267 a word boundary. */
2268 if (REG_P (target) && GET_MODE_BITSIZE (tmode) < BITS_PER_WORD)
2269 dst = target;
2270 else if (bitpos % BITS_PER_WORD == 0)
2271 dst = operand_subword (target, bitpos / BITS_PER_WORD, 1, tmode);
2272
2273 /* Use xbitpos for the source extraction (right justified) and
2274 bitpos for the destination store (left justified). */
2275 store_bit_field (dst, bitsize, bitpos % BITS_PER_WORD, 0, 0, copy_mode,
2276 extract_bit_field (src, bitsize,
2277 xbitpos % BITS_PER_WORD, 1,
2278 NULL_RTX, copy_mode, copy_mode));
2279 }
2280 }
2281
2282 /* Copy BLKmode value SRC into a register of mode MODE. Return the
2283 register if it contains any data, otherwise return null.
2284
2285 This is used on targets that return BLKmode values in registers. */
2286
2287 rtx
2288 copy_blkmode_to_reg (enum machine_mode mode, tree src)
2289 {
2290 int i, n_regs;
2291 unsigned HOST_WIDE_INT bitpos, xbitpos, padding_correction = 0, bytes;
2292 unsigned int bitsize;
2293 rtx *dst_words, dst, x, src_word = NULL_RTX, dst_word = NULL_RTX;
2294 enum machine_mode dst_mode;
2295
2296 gcc_assert (TYPE_MODE (TREE_TYPE (src)) == BLKmode);
2297
2298 x = expand_normal (src);
2299
2300 bytes = int_size_in_bytes (TREE_TYPE (src));
2301 if (bytes == 0)
2302 return NULL_RTX;
2303
2304 /* If the structure doesn't take up a whole number of words, see
2305 whether the register value should be padded on the left or on
2306 the right. Set PADDING_CORRECTION to the number of padding
2307 bits needed on the left side.
2308
2309 In most ABIs, the structure will be returned at the least end of
2310 the register, which translates to right padding on little-endian
2311 targets and left padding on big-endian targets. The opposite
2312 holds if the structure is returned at the most significant
2313 end of the register. */
2314 if (bytes % UNITS_PER_WORD != 0
2315 && (targetm.calls.return_in_msb (TREE_TYPE (src))
2316 ? !BYTES_BIG_ENDIAN
2317 : BYTES_BIG_ENDIAN))
2318 padding_correction = (BITS_PER_WORD - ((bytes % UNITS_PER_WORD)
2319 * BITS_PER_UNIT));
2320
2321 n_regs = (bytes + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
2322 dst_words = XALLOCAVEC (rtx, n_regs);
2323 bitsize = MIN (TYPE_ALIGN (TREE_TYPE (src)), BITS_PER_WORD);
2324
2325 /* Copy the structure BITSIZE bits at a time. */
2326 for (bitpos = 0, xbitpos = padding_correction;
2327 bitpos < bytes * BITS_PER_UNIT;
2328 bitpos += bitsize, xbitpos += bitsize)
2329 {
2330 /* We need a new destination pseudo each time xbitpos is
2331 on a word boundary and when xbitpos == padding_correction
2332 (the first time through). */
2333 if (xbitpos % BITS_PER_WORD == 0
2334 || xbitpos == padding_correction)
2335 {
2336 /* Generate an appropriate register. */
2337 dst_word = gen_reg_rtx (word_mode);
2338 dst_words[xbitpos / BITS_PER_WORD] = dst_word;
2339
2340 /* Clear the destination before we move anything into it. */
2341 emit_move_insn (dst_word, CONST0_RTX (word_mode));
2342 }
2343
2344 /* We need a new source operand each time bitpos is on a word
2345 boundary. */
2346 if (bitpos % BITS_PER_WORD == 0)
2347 src_word = operand_subword_force (x, bitpos / BITS_PER_WORD, BLKmode);
2348
2349 /* Use bitpos for the source extraction (left justified) and
2350 xbitpos for the destination store (right justified). */
2351 store_bit_field (dst_word, bitsize, xbitpos % BITS_PER_WORD,
2352 0, 0, word_mode,
2353 extract_bit_field (src_word, bitsize,
2354 bitpos % BITS_PER_WORD, 1,
2355 NULL_RTX, word_mode, word_mode));
2356 }
2357
2358 if (mode == BLKmode)
2359 {
2360 /* Find the smallest integer mode large enough to hold the
2361 entire structure. */
2362 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
2363 mode != VOIDmode;
2364 mode = GET_MODE_WIDER_MODE (mode))
2365 /* Have we found a large enough mode? */
2366 if (GET_MODE_SIZE (mode) >= bytes)
2367 break;
2368
2369 /* A suitable mode should have been found. */
2370 gcc_assert (mode != VOIDmode);
2371 }
2372
2373 if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (word_mode))
2374 dst_mode = word_mode;
2375 else
2376 dst_mode = mode;
2377 dst = gen_reg_rtx (dst_mode);
2378
2379 for (i = 0; i < n_regs; i++)
2380 emit_move_insn (operand_subword (dst, i, 0, dst_mode), dst_words[i]);
2381
2382 if (mode != dst_mode)
2383 dst = gen_lowpart (mode, dst);
2384
2385 return dst;
2386 }
2387
2388 /* Add a USE expression for REG to the (possibly empty) list pointed
2389 to by CALL_FUSAGE. REG must denote a hard register. */
2390
2391 void
2392 use_reg_mode (rtx *call_fusage, rtx reg, enum machine_mode mode)
2393 {
2394 gcc_assert (REG_P (reg) && REGNO (reg) < FIRST_PSEUDO_REGISTER);
2395
2396 *call_fusage
2397 = gen_rtx_EXPR_LIST (mode, gen_rtx_USE (VOIDmode, reg), *call_fusage);
2398 }
2399
2400 /* Add USE expressions to *CALL_FUSAGE for each of NREGS consecutive regs,
2401 starting at REGNO. All of these registers must be hard registers. */
2402
2403 void
2404 use_regs (rtx *call_fusage, int regno, int nregs)
2405 {
2406 int i;
2407
2408 gcc_assert (regno + nregs <= FIRST_PSEUDO_REGISTER);
2409
2410 for (i = 0; i < nregs; i++)
2411 use_reg (call_fusage, regno_reg_rtx[regno + i]);
2412 }
2413
2414 /* Add USE expressions to *CALL_FUSAGE for each REG contained in the
2415 PARALLEL REGS. This is for calls that pass values in multiple
2416 non-contiguous locations. The Irix 6 ABI has examples of this. */
2417
2418 void
2419 use_group_regs (rtx *call_fusage, rtx regs)
2420 {
2421 int i;
2422
2423 for (i = 0; i < XVECLEN (regs, 0); i++)
2424 {
2425 rtx reg = XEXP (XVECEXP (regs, 0, i), 0);
2426
2427 /* A NULL entry means the parameter goes both on the stack and in
2428 registers. This can also be a MEM for targets that pass values
2429 partially on the stack and partially in registers. */
2430 if (reg != 0 && REG_P (reg))
2431 use_reg (call_fusage, reg);
2432 }
2433 }
2434
2435 /* Return the defining gimple statement for SSA_NAME NAME if it is an
2436 assigment and the code of the expresion on the RHS is CODE. Return
2437 NULL otherwise. */
2438
2439 static gimple
2440 get_def_for_expr (tree name, enum tree_code code)
2441 {
2442 gimple def_stmt;
2443
2444 if (TREE_CODE (name) != SSA_NAME)
2445 return NULL;
2446
2447 def_stmt = get_gimple_for_ssa_name (name);
2448 if (!def_stmt
2449 || gimple_assign_rhs_code (def_stmt) != code)
2450 return NULL;
2451
2452 return def_stmt;
2453 }
2454
2455 #ifdef HAVE_conditional_move
2456 /* Return the defining gimple statement for SSA_NAME NAME if it is an
2457 assigment and the class of the expresion on the RHS is CLASS. Return
2458 NULL otherwise. */
2459
2460 static gimple
2461 get_def_for_expr_class (tree name, enum tree_code_class tclass)
2462 {
2463 gimple def_stmt;
2464
2465 if (TREE_CODE (name) != SSA_NAME)
2466 return NULL;
2467
2468 def_stmt = get_gimple_for_ssa_name (name);
2469 if (!def_stmt
2470 || TREE_CODE_CLASS (gimple_assign_rhs_code (def_stmt)) != tclass)
2471 return NULL;
2472
2473 return def_stmt;
2474 }
2475 #endif
2476 \f
2477
2478 /* Determine whether the LEN bytes generated by CONSTFUN can be
2479 stored to memory using several move instructions. CONSTFUNDATA is
2480 a pointer which will be passed as argument in every CONSTFUN call.
2481 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
2482 a memset operation and false if it's a copy of a constant string.
2483 Return nonzero if a call to store_by_pieces should succeed. */
2484
2485 int
2486 can_store_by_pieces (unsigned HOST_WIDE_INT len,
2487 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode),
2488 void *constfundata, unsigned int align, bool memsetp)
2489 {
2490 unsigned HOST_WIDE_INT l;
2491 unsigned int max_size;
2492 HOST_WIDE_INT offset = 0;
2493 enum machine_mode mode;
2494 enum insn_code icode;
2495 int reverse;
2496 /* cst is set but not used if LEGITIMATE_CONSTANT doesn't use it. */
2497 rtx cst ATTRIBUTE_UNUSED;
2498
2499 if (len == 0)
2500 return 1;
2501
2502 if (! (memsetp
2503 ? SET_BY_PIECES_P (len, align)
2504 : STORE_BY_PIECES_P (len, align)))
2505 return 0;
2506
2507 align = alignment_for_piecewise_move (STORE_MAX_PIECES, align);
2508
2509 /* We would first store what we can in the largest integer mode, then go to
2510 successively smaller modes. */
2511
2512 for (reverse = 0;
2513 reverse <= (HAVE_PRE_DECREMENT || HAVE_POST_DECREMENT);
2514 reverse++)
2515 {
2516 l = len;
2517 max_size = STORE_MAX_PIECES + 1;
2518 while (max_size > 1 && l > 0)
2519 {
2520 mode = widest_int_mode_for_size (max_size);
2521
2522 if (mode == VOIDmode)
2523 break;
2524
2525 icode = optab_handler (mov_optab, mode);
2526 if (icode != CODE_FOR_nothing
2527 && align >= GET_MODE_ALIGNMENT (mode))
2528 {
2529 unsigned int size = GET_MODE_SIZE (mode);
2530
2531 while (l >= size)
2532 {
2533 if (reverse)
2534 offset -= size;
2535
2536 cst = (*constfun) (constfundata, offset, mode);
2537 if (!targetm.legitimate_constant_p (mode, cst))
2538 return 0;
2539
2540 if (!reverse)
2541 offset += size;
2542
2543 l -= size;
2544 }
2545 }
2546
2547 max_size = GET_MODE_SIZE (mode);
2548 }
2549
2550 /* The code above should have handled everything. */
2551 gcc_assert (!l);
2552 }
2553
2554 return 1;
2555 }
2556
2557 /* Generate several move instructions to store LEN bytes generated by
2558 CONSTFUN to block TO. (A MEM rtx with BLKmode). CONSTFUNDATA is a
2559 pointer which will be passed as argument in every CONSTFUN call.
2560 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
2561 a memset operation and false if it's a copy of a constant string.
2562 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
2563 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
2564 stpcpy. */
2565
2566 rtx
2567 store_by_pieces (rtx to, unsigned HOST_WIDE_INT len,
2568 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode),
2569 void *constfundata, unsigned int align, bool memsetp, int endp)
2570 {
2571 enum machine_mode to_addr_mode = get_address_mode (to);
2572 struct store_by_pieces_d data;
2573
2574 if (len == 0)
2575 {
2576 gcc_assert (endp != 2);
2577 return to;
2578 }
2579
2580 gcc_assert (memsetp
2581 ? SET_BY_PIECES_P (len, align)
2582 : STORE_BY_PIECES_P (len, align));
2583 data.constfun = constfun;
2584 data.constfundata = constfundata;
2585 data.len = len;
2586 data.to = to;
2587 store_by_pieces_1 (&data, align);
2588 if (endp)
2589 {
2590 rtx to1;
2591
2592 gcc_assert (!data.reverse);
2593 if (data.autinc_to)
2594 {
2595 if (endp == 2)
2596 {
2597 if (HAVE_POST_INCREMENT && data.explicit_inc_to > 0)
2598 emit_insn (gen_add2_insn (data.to_addr, constm1_rtx));
2599 else
2600 data.to_addr = copy_to_mode_reg (to_addr_mode,
2601 plus_constant (to_addr_mode,
2602 data.to_addr,
2603 -1));
2604 }
2605 to1 = adjust_automodify_address (data.to, QImode, data.to_addr,
2606 data.offset);
2607 }
2608 else
2609 {
2610 if (endp == 2)
2611 --data.offset;
2612 to1 = adjust_address (data.to, QImode, data.offset);
2613 }
2614 return to1;
2615 }
2616 else
2617 return data.to;
2618 }
2619
2620 /* Generate several move instructions to clear LEN bytes of block TO. (A MEM
2621 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
2622
2623 static void
2624 clear_by_pieces (rtx to, unsigned HOST_WIDE_INT len, unsigned int align)
2625 {
2626 struct store_by_pieces_d data;
2627
2628 if (len == 0)
2629 return;
2630
2631 data.constfun = clear_by_pieces_1;
2632 data.constfundata = NULL;
2633 data.len = len;
2634 data.to = to;
2635 store_by_pieces_1 (&data, align);
2636 }
2637
2638 /* Callback routine for clear_by_pieces.
2639 Return const0_rtx unconditionally. */
2640
2641 static rtx
2642 clear_by_pieces_1 (void *data ATTRIBUTE_UNUSED,
2643 HOST_WIDE_INT offset ATTRIBUTE_UNUSED,
2644 enum machine_mode mode ATTRIBUTE_UNUSED)
2645 {
2646 return const0_rtx;
2647 }
2648
2649 /* Subroutine of clear_by_pieces and store_by_pieces.
2650 Generate several move instructions to store LEN bytes of block TO. (A MEM
2651 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
2652
2653 static void
2654 store_by_pieces_1 (struct store_by_pieces_d *data ATTRIBUTE_UNUSED,
2655 unsigned int align ATTRIBUTE_UNUSED)
2656 {
2657 enum machine_mode to_addr_mode = get_address_mode (data->to);
2658 rtx to_addr = XEXP (data->to, 0);
2659 unsigned int max_size = STORE_MAX_PIECES + 1;
2660 enum insn_code icode;
2661
2662 data->offset = 0;
2663 data->to_addr = to_addr;
2664 data->autinc_to
2665 = (GET_CODE (to_addr) == PRE_INC || GET_CODE (to_addr) == PRE_DEC
2666 || GET_CODE (to_addr) == POST_INC || GET_CODE (to_addr) == POST_DEC);
2667
2668 data->explicit_inc_to = 0;
2669 data->reverse
2670 = (GET_CODE (to_addr) == PRE_DEC || GET_CODE (to_addr) == POST_DEC);
2671 if (data->reverse)
2672 data->offset = data->len;
2673
2674 /* If storing requires more than two move insns,
2675 copy addresses to registers (to make displacements shorter)
2676 and use post-increment if available. */
2677 if (!data->autinc_to
2678 && move_by_pieces_ninsns (data->len, align, max_size) > 2)
2679 {
2680 /* Determine the main mode we'll be using.
2681 MODE might not be used depending on the definitions of the
2682 USE_* macros below. */
2683 enum machine_mode mode ATTRIBUTE_UNUSED
2684 = widest_int_mode_for_size (max_size);
2685
2686 if (USE_STORE_PRE_DECREMENT (mode) && data->reverse && ! data->autinc_to)
2687 {
2688 data->to_addr = copy_to_mode_reg (to_addr_mode,
2689 plus_constant (to_addr_mode,
2690 to_addr,
2691 data->len));
2692 data->autinc_to = 1;
2693 data->explicit_inc_to = -1;
2694 }
2695
2696 if (USE_STORE_POST_INCREMENT (mode) && ! data->reverse
2697 && ! data->autinc_to)
2698 {
2699 data->to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
2700 data->autinc_to = 1;
2701 data->explicit_inc_to = 1;
2702 }
2703
2704 if ( !data->autinc_to && CONSTANT_P (to_addr))
2705 data->to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
2706 }
2707
2708 align = alignment_for_piecewise_move (STORE_MAX_PIECES, align);
2709
2710 /* First store what we can in the largest integer mode, then go to
2711 successively smaller modes. */
2712
2713 while (max_size > 1 && data->len > 0)
2714 {
2715 enum machine_mode mode = widest_int_mode_for_size (max_size);
2716
2717 if (mode == VOIDmode)
2718 break;
2719
2720 icode = optab_handler (mov_optab, mode);
2721 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
2722 store_by_pieces_2 (GEN_FCN (icode), mode, data);
2723
2724 max_size = GET_MODE_SIZE (mode);
2725 }
2726
2727 /* The code above should have handled everything. */
2728 gcc_assert (!data->len);
2729 }
2730
2731 /* Subroutine of store_by_pieces_1. Store as many bytes as appropriate
2732 with move instructions for mode MODE. GENFUN is the gen_... function
2733 to make a move insn for that mode. DATA has all the other info. */
2734
2735 static void
2736 store_by_pieces_2 (insn_gen_fn genfun, machine_mode mode,
2737 struct store_by_pieces_d *data)
2738 {
2739 unsigned int size = GET_MODE_SIZE (mode);
2740 rtx to1, cst;
2741
2742 while (data->len >= size)
2743 {
2744 if (data->reverse)
2745 data->offset -= size;
2746
2747 if (data->autinc_to)
2748 to1 = adjust_automodify_address (data->to, mode, data->to_addr,
2749 data->offset);
2750 else
2751 to1 = adjust_address (data->to, mode, data->offset);
2752
2753 if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0)
2754 emit_insn (gen_add2_insn (data->to_addr,
2755 gen_int_mode (-(HOST_WIDE_INT) size,
2756 GET_MODE (data->to_addr))));
2757
2758 cst = (*data->constfun) (data->constfundata, data->offset, mode);
2759 emit_insn ((*genfun) (to1, cst));
2760
2761 if (HAVE_POST_INCREMENT && data->explicit_inc_to > 0)
2762 emit_insn (gen_add2_insn (data->to_addr,
2763 gen_int_mode (size,
2764 GET_MODE (data->to_addr))));
2765
2766 if (! data->reverse)
2767 data->offset += size;
2768
2769 data->len -= size;
2770 }
2771 }
2772 \f
2773 /* Write zeros through the storage of OBJECT. If OBJECT has BLKmode, SIZE is
2774 its length in bytes. */
2775
2776 rtx
2777 clear_storage_hints (rtx object, rtx size, enum block_op_methods method,
2778 unsigned int expected_align, HOST_WIDE_INT expected_size,
2779 unsigned HOST_WIDE_INT min_size,
2780 unsigned HOST_WIDE_INT max_size,
2781 unsigned HOST_WIDE_INT probable_max_size)
2782 {
2783 enum machine_mode mode = GET_MODE (object);
2784 unsigned int align;
2785
2786 gcc_assert (method == BLOCK_OP_NORMAL || method == BLOCK_OP_TAILCALL);
2787
2788 /* If OBJECT is not BLKmode and SIZE is the same size as its mode,
2789 just move a zero. Otherwise, do this a piece at a time. */
2790 if (mode != BLKmode
2791 && CONST_INT_P (size)
2792 && INTVAL (size) == (HOST_WIDE_INT) GET_MODE_SIZE (mode))
2793 {
2794 rtx zero = CONST0_RTX (mode);
2795 if (zero != NULL)
2796 {
2797 emit_move_insn (object, zero);
2798 return NULL;
2799 }
2800
2801 if (COMPLEX_MODE_P (mode))
2802 {
2803 zero = CONST0_RTX (GET_MODE_INNER (mode));
2804 if (zero != NULL)
2805 {
2806 write_complex_part (object, zero, 0);
2807 write_complex_part (object, zero, 1);
2808 return NULL;
2809 }
2810 }
2811 }
2812
2813 if (size == const0_rtx)
2814 return NULL;
2815
2816 align = MEM_ALIGN (object);
2817
2818 if (CONST_INT_P (size)
2819 && CLEAR_BY_PIECES_P (INTVAL (size), align))
2820 clear_by_pieces (object, INTVAL (size), align);
2821 else if (set_storage_via_setmem (object, size, const0_rtx, align,
2822 expected_align, expected_size,
2823 min_size, max_size, probable_max_size))
2824 ;
2825 else if (ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (object)))
2826 return set_storage_via_libcall (object, size, const0_rtx,
2827 method == BLOCK_OP_TAILCALL);
2828 else
2829 gcc_unreachable ();
2830
2831 return NULL;
2832 }
2833
2834 rtx
2835 clear_storage (rtx object, rtx size, enum block_op_methods method)
2836 {
2837 unsigned HOST_WIDE_INT max, min = 0;
2838 if (GET_CODE (size) == CONST_INT)
2839 min = max = UINTVAL (size);
2840 else
2841 max = GET_MODE_MASK (GET_MODE (size));
2842 return clear_storage_hints (object, size, method, 0, -1, min, max, max);
2843 }
2844
2845
2846 /* A subroutine of clear_storage. Expand a call to memset.
2847 Return the return value of memset, 0 otherwise. */
2848
2849 rtx
2850 set_storage_via_libcall (rtx object, rtx size, rtx val, bool tailcall)
2851 {
2852 tree call_expr, fn, object_tree, size_tree, val_tree;
2853 enum machine_mode size_mode;
2854 rtx retval;
2855
2856 /* Emit code to copy OBJECT and SIZE into new pseudos. We can then
2857 place those into new pseudos into a VAR_DECL and use them later. */
2858
2859 object = copy_addr_to_reg (XEXP (object, 0));
2860
2861 size_mode = TYPE_MODE (sizetype);
2862 size = convert_to_mode (size_mode, size, 1);
2863 size = copy_to_mode_reg (size_mode, size);
2864
2865 /* It is incorrect to use the libcall calling conventions to call
2866 memset in this context. This could be a user call to memset and
2867 the user may wish to examine the return value from memset. For
2868 targets where libcalls and normal calls have different conventions
2869 for returning pointers, we could end up generating incorrect code. */
2870
2871 object_tree = make_tree (ptr_type_node, object);
2872 if (!CONST_INT_P (val))
2873 val = convert_to_mode (TYPE_MODE (integer_type_node), val, 1);
2874 size_tree = make_tree (sizetype, size);
2875 val_tree = make_tree (integer_type_node, val);
2876
2877 fn = clear_storage_libcall_fn (true);
2878 call_expr = build_call_expr (fn, 3, object_tree, val_tree, size_tree);
2879 CALL_EXPR_TAILCALL (call_expr) = tailcall;
2880
2881 retval = expand_normal (call_expr);
2882
2883 return retval;
2884 }
2885
2886 /* A subroutine of set_storage_via_libcall. Create the tree node
2887 for the function we use for block clears. */
2888
2889 tree block_clear_fn;
2890
2891 void
2892 init_block_clear_fn (const char *asmspec)
2893 {
2894 if (!block_clear_fn)
2895 {
2896 tree fn, args;
2897
2898 fn = get_identifier ("memset");
2899 args = build_function_type_list (ptr_type_node, ptr_type_node,
2900 integer_type_node, sizetype,
2901 NULL_TREE);
2902
2903 fn = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL, fn, args);
2904 DECL_EXTERNAL (fn) = 1;
2905 TREE_PUBLIC (fn) = 1;
2906 DECL_ARTIFICIAL (fn) = 1;
2907 TREE_NOTHROW (fn) = 1;
2908 DECL_VISIBILITY (fn) = VISIBILITY_DEFAULT;
2909 DECL_VISIBILITY_SPECIFIED (fn) = 1;
2910
2911 block_clear_fn = fn;
2912 }
2913
2914 if (asmspec)
2915 set_user_assembler_name (block_clear_fn, asmspec);
2916 }
2917
2918 static tree
2919 clear_storage_libcall_fn (int for_call)
2920 {
2921 static bool emitted_extern;
2922
2923 if (!block_clear_fn)
2924 init_block_clear_fn (NULL);
2925
2926 if (for_call && !emitted_extern)
2927 {
2928 emitted_extern = true;
2929 make_decl_rtl (block_clear_fn);
2930 }
2931
2932 return block_clear_fn;
2933 }
2934 \f
2935 /* Expand a setmem pattern; return true if successful. */
2936
2937 bool
2938 set_storage_via_setmem (rtx object, rtx size, rtx val, unsigned int align,
2939 unsigned int expected_align, HOST_WIDE_INT expected_size,
2940 unsigned HOST_WIDE_INT min_size,
2941 unsigned HOST_WIDE_INT max_size,
2942 unsigned HOST_WIDE_INT probable_max_size)
2943 {
2944 /* Try the most limited insn first, because there's no point
2945 including more than one in the machine description unless
2946 the more limited one has some advantage. */
2947
2948 enum machine_mode mode;
2949
2950 if (expected_align < align)
2951 expected_align = align;
2952 if (expected_size != -1)
2953 {
2954 if ((unsigned HOST_WIDE_INT)expected_size > max_size)
2955 expected_size = max_size;
2956 if ((unsigned HOST_WIDE_INT)expected_size < min_size)
2957 expected_size = min_size;
2958 }
2959
2960 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
2961 mode = GET_MODE_WIDER_MODE (mode))
2962 {
2963 enum insn_code code = direct_optab_handler (setmem_optab, mode);
2964
2965 if (code != CODE_FOR_nothing
2966 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
2967 here because if SIZE is less than the mode mask, as it is
2968 returned by the macro, it will definitely be less than the
2969 actual mode mask. Since SIZE is within the Pmode address
2970 space, we limit MODE to Pmode. */
2971 && ((CONST_INT_P (size)
2972 && ((unsigned HOST_WIDE_INT) INTVAL (size)
2973 <= (GET_MODE_MASK (mode) >> 1)))
2974 || max_size <= (GET_MODE_MASK (mode) >> 1)
2975 || GET_MODE_BITSIZE (mode) >= GET_MODE_BITSIZE (Pmode)))
2976 {
2977 struct expand_operand ops[9];
2978 unsigned int nops;
2979
2980 nops = insn_data[(int) code].n_generator_args;
2981 gcc_assert (nops == 4 || nops == 6 || nops == 8 || nops == 9);
2982
2983 create_fixed_operand (&ops[0], object);
2984 /* The check above guarantees that this size conversion is valid. */
2985 create_convert_operand_to (&ops[1], size, mode, true);
2986 create_convert_operand_from (&ops[2], val, byte_mode, true);
2987 create_integer_operand (&ops[3], align / BITS_PER_UNIT);
2988 if (nops >= 6)
2989 {
2990 create_integer_operand (&ops[4], expected_align / BITS_PER_UNIT);
2991 create_integer_operand (&ops[5], expected_size);
2992 }
2993 if (nops >= 8)
2994 {
2995 create_integer_operand (&ops[6], min_size);
2996 /* If we can not represent the maximal size,
2997 make parameter NULL. */
2998 if ((HOST_WIDE_INT) max_size != -1)
2999 create_integer_operand (&ops[7], max_size);
3000 else
3001 create_fixed_operand (&ops[7], NULL);
3002 }
3003 if (nops == 9)
3004 {
3005 /* If we can not represent the maximal size,
3006 make parameter NULL. */
3007 if ((HOST_WIDE_INT) probable_max_size != -1)
3008 create_integer_operand (&ops[8], probable_max_size);
3009 else
3010 create_fixed_operand (&ops[8], NULL);
3011 }
3012 if (maybe_expand_insn (code, nops, ops))
3013 return true;
3014 }
3015 }
3016
3017 return false;
3018 }
3019
3020 \f
3021 /* Write to one of the components of the complex value CPLX. Write VAL to
3022 the real part if IMAG_P is false, and the imaginary part if its true. */
3023
3024 static void
3025 write_complex_part (rtx cplx, rtx val, bool imag_p)
3026 {
3027 enum machine_mode cmode;
3028 enum machine_mode imode;
3029 unsigned ibitsize;
3030
3031 if (GET_CODE (cplx) == CONCAT)
3032 {
3033 emit_move_insn (XEXP (cplx, imag_p), val);
3034 return;
3035 }
3036
3037 cmode = GET_MODE (cplx);
3038 imode = GET_MODE_INNER (cmode);
3039 ibitsize = GET_MODE_BITSIZE (imode);
3040
3041 /* For MEMs simplify_gen_subreg may generate an invalid new address
3042 because, e.g., the original address is considered mode-dependent
3043 by the target, which restricts simplify_subreg from invoking
3044 adjust_address_nv. Instead of preparing fallback support for an
3045 invalid address, we call adjust_address_nv directly. */
3046 if (MEM_P (cplx))
3047 {
3048 emit_move_insn (adjust_address_nv (cplx, imode,
3049 imag_p ? GET_MODE_SIZE (imode) : 0),
3050 val);
3051 return;
3052 }
3053
3054 /* If the sub-object is at least word sized, then we know that subregging
3055 will work. This special case is important, since store_bit_field
3056 wants to operate on integer modes, and there's rarely an OImode to
3057 correspond to TCmode. */
3058 if (ibitsize >= BITS_PER_WORD
3059 /* For hard regs we have exact predicates. Assume we can split
3060 the original object if it spans an even number of hard regs.
3061 This special case is important for SCmode on 64-bit platforms
3062 where the natural size of floating-point regs is 32-bit. */
3063 || (REG_P (cplx)
3064 && REGNO (cplx) < FIRST_PSEUDO_REGISTER
3065 && hard_regno_nregs[REGNO (cplx)][cmode] % 2 == 0))
3066 {
3067 rtx part = simplify_gen_subreg (imode, cplx, cmode,
3068 imag_p ? GET_MODE_SIZE (imode) : 0);
3069 if (part)
3070 {
3071 emit_move_insn (part, val);
3072 return;
3073 }
3074 else
3075 /* simplify_gen_subreg may fail for sub-word MEMs. */
3076 gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD);
3077 }
3078
3079 store_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0, 0, 0, imode, val);
3080 }
3081
3082 /* Extract one of the components of the complex value CPLX. Extract the
3083 real part if IMAG_P is false, and the imaginary part if it's true. */
3084
3085 static rtx
3086 read_complex_part (rtx cplx, bool imag_p)
3087 {
3088 enum machine_mode cmode, imode;
3089 unsigned ibitsize;
3090
3091 if (GET_CODE (cplx) == CONCAT)
3092 return XEXP (cplx, imag_p);
3093
3094 cmode = GET_MODE (cplx);
3095 imode = GET_MODE_INNER (cmode);
3096 ibitsize = GET_MODE_BITSIZE (imode);
3097
3098 /* Special case reads from complex constants that got spilled to memory. */
3099 if (MEM_P (cplx) && GET_CODE (XEXP (cplx, 0)) == SYMBOL_REF)
3100 {
3101 tree decl = SYMBOL_REF_DECL (XEXP (cplx, 0));
3102 if (decl && TREE_CODE (decl) == COMPLEX_CST)
3103 {
3104 tree part = imag_p ? TREE_IMAGPART (decl) : TREE_REALPART (decl);
3105 if (CONSTANT_CLASS_P (part))
3106 return expand_expr (part, NULL_RTX, imode, EXPAND_NORMAL);
3107 }
3108 }
3109
3110 /* For MEMs simplify_gen_subreg may generate an invalid new address
3111 because, e.g., the original address is considered mode-dependent
3112 by the target, which restricts simplify_subreg from invoking
3113 adjust_address_nv. Instead of preparing fallback support for an
3114 invalid address, we call adjust_address_nv directly. */
3115 if (MEM_P (cplx))
3116 return adjust_address_nv (cplx, imode,
3117 imag_p ? GET_MODE_SIZE (imode) : 0);
3118
3119 /* If the sub-object is at least word sized, then we know that subregging
3120 will work. This special case is important, since extract_bit_field
3121 wants to operate on integer modes, and there's rarely an OImode to
3122 correspond to TCmode. */
3123 if (ibitsize >= BITS_PER_WORD
3124 /* For hard regs we have exact predicates. Assume we can split
3125 the original object if it spans an even number of hard regs.
3126 This special case is important for SCmode on 64-bit platforms
3127 where the natural size of floating-point regs is 32-bit. */
3128 || (REG_P (cplx)
3129 && REGNO (cplx) < FIRST_PSEUDO_REGISTER
3130 && hard_regno_nregs[REGNO (cplx)][cmode] % 2 == 0))
3131 {
3132 rtx ret = simplify_gen_subreg (imode, cplx, cmode,
3133 imag_p ? GET_MODE_SIZE (imode) : 0);
3134 if (ret)
3135 return ret;
3136 else
3137 /* simplify_gen_subreg may fail for sub-word MEMs. */
3138 gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD);
3139 }
3140
3141 return extract_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0,
3142 true, NULL_RTX, imode, imode);
3143 }
3144 \f
3145 /* A subroutine of emit_move_insn_1. Yet another lowpart generator.
3146 NEW_MODE and OLD_MODE are the same size. Return NULL if X cannot be
3147 represented in NEW_MODE. If FORCE is true, this will never happen, as
3148 we'll force-create a SUBREG if needed. */
3149
3150 static rtx
3151 emit_move_change_mode (enum machine_mode new_mode,
3152 enum machine_mode old_mode, rtx x, bool force)
3153 {
3154 rtx ret;
3155
3156 if (push_operand (x, GET_MODE (x)))
3157 {
3158 ret = gen_rtx_MEM (new_mode, XEXP (x, 0));
3159 MEM_COPY_ATTRIBUTES (ret, x);
3160 }
3161 else if (MEM_P (x))
3162 {
3163 /* We don't have to worry about changing the address since the
3164 size in bytes is supposed to be the same. */
3165 if (reload_in_progress)
3166 {
3167 /* Copy the MEM to change the mode and move any
3168 substitutions from the old MEM to the new one. */
3169 ret = adjust_address_nv (x, new_mode, 0);
3170 copy_replacements (x, ret);
3171 }
3172 else
3173 ret = adjust_address (x, new_mode, 0);
3174 }
3175 else
3176 {
3177 /* Note that we do want simplify_subreg's behavior of validating
3178 that the new mode is ok for a hard register. If we were to use
3179 simplify_gen_subreg, we would create the subreg, but would
3180 probably run into the target not being able to implement it. */
3181 /* Except, of course, when FORCE is true, when this is exactly what
3182 we want. Which is needed for CCmodes on some targets. */
3183 if (force)
3184 ret = simplify_gen_subreg (new_mode, x, old_mode, 0);
3185 else
3186 ret = simplify_subreg (new_mode, x, old_mode, 0);
3187 }
3188
3189 return ret;
3190 }
3191
3192 /* A subroutine of emit_move_insn_1. Generate a move from Y into X using
3193 an integer mode of the same size as MODE. Returns the instruction
3194 emitted, or NULL if such a move could not be generated. */
3195
3196 static rtx
3197 emit_move_via_integer (enum machine_mode mode, rtx x, rtx y, bool force)
3198 {
3199 enum machine_mode imode;
3200 enum insn_code code;
3201
3202 /* There must exist a mode of the exact size we require. */
3203 imode = int_mode_for_mode (mode);
3204 if (imode == BLKmode)
3205 return NULL_RTX;
3206
3207 /* The target must support moves in this mode. */
3208 code = optab_handler (mov_optab, imode);
3209 if (code == CODE_FOR_nothing)
3210 return NULL_RTX;
3211
3212 x = emit_move_change_mode (imode, mode, x, force);
3213 if (x == NULL_RTX)
3214 return NULL_RTX;
3215 y = emit_move_change_mode (imode, mode, y, force);
3216 if (y == NULL_RTX)
3217 return NULL_RTX;
3218 return emit_insn (GEN_FCN (code) (x, y));
3219 }
3220
3221 /* A subroutine of emit_move_insn_1. X is a push_operand in MODE.
3222 Return an equivalent MEM that does not use an auto-increment. */
3223
3224 static rtx
3225 emit_move_resolve_push (enum machine_mode mode, rtx x)
3226 {
3227 enum rtx_code code = GET_CODE (XEXP (x, 0));
3228 HOST_WIDE_INT adjust;
3229 rtx temp;
3230
3231 adjust = GET_MODE_SIZE (mode);
3232 #ifdef PUSH_ROUNDING
3233 adjust = PUSH_ROUNDING (adjust);
3234 #endif
3235 if (code == PRE_DEC || code == POST_DEC)
3236 adjust = -adjust;
3237 else if (code == PRE_MODIFY || code == POST_MODIFY)
3238 {
3239 rtx expr = XEXP (XEXP (x, 0), 1);
3240 HOST_WIDE_INT val;
3241
3242 gcc_assert (GET_CODE (expr) == PLUS || GET_CODE (expr) == MINUS);
3243 gcc_assert (CONST_INT_P (XEXP (expr, 1)));
3244 val = INTVAL (XEXP (expr, 1));
3245 if (GET_CODE (expr) == MINUS)
3246 val = -val;
3247 gcc_assert (adjust == val || adjust == -val);
3248 adjust = val;
3249 }
3250
3251 /* Do not use anti_adjust_stack, since we don't want to update
3252 stack_pointer_delta. */
3253 temp = expand_simple_binop (Pmode, PLUS, stack_pointer_rtx,
3254 gen_int_mode (adjust, Pmode), stack_pointer_rtx,
3255 0, OPTAB_LIB_WIDEN);
3256 if (temp != stack_pointer_rtx)
3257 emit_move_insn (stack_pointer_rtx, temp);
3258
3259 switch (code)
3260 {
3261 case PRE_INC:
3262 case PRE_DEC:
3263 case PRE_MODIFY:
3264 temp = stack_pointer_rtx;
3265 break;
3266 case POST_INC:
3267 case POST_DEC:
3268 case POST_MODIFY:
3269 temp = plus_constant (Pmode, stack_pointer_rtx, -adjust);
3270 break;
3271 default:
3272 gcc_unreachable ();
3273 }
3274
3275 return replace_equiv_address (x, temp);
3276 }
3277
3278 /* A subroutine of emit_move_complex. Generate a move from Y into X.
3279 X is known to satisfy push_operand, and MODE is known to be complex.
3280 Returns the last instruction emitted. */
3281
3282 rtx
3283 emit_move_complex_push (enum machine_mode mode, rtx x, rtx y)
3284 {
3285 enum machine_mode submode = GET_MODE_INNER (mode);
3286 bool imag_first;
3287
3288 #ifdef PUSH_ROUNDING
3289 unsigned int submodesize = GET_MODE_SIZE (submode);
3290
3291 /* In case we output to the stack, but the size is smaller than the
3292 machine can push exactly, we need to use move instructions. */
3293 if (PUSH_ROUNDING (submodesize) != submodesize)
3294 {
3295 x = emit_move_resolve_push (mode, x);
3296 return emit_move_insn (x, y);
3297 }
3298 #endif
3299
3300 /* Note that the real part always precedes the imag part in memory
3301 regardless of machine's endianness. */
3302 switch (GET_CODE (XEXP (x, 0)))
3303 {
3304 case PRE_DEC:
3305 case POST_DEC:
3306 imag_first = true;
3307 break;
3308 case PRE_INC:
3309 case POST_INC:
3310 imag_first = false;
3311 break;
3312 default:
3313 gcc_unreachable ();
3314 }
3315
3316 emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)),
3317 read_complex_part (y, imag_first));
3318 return emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)),
3319 read_complex_part (y, !imag_first));
3320 }
3321
3322 /* A subroutine of emit_move_complex. Perform the move from Y to X
3323 via two moves of the parts. Returns the last instruction emitted. */
3324
3325 rtx
3326 emit_move_complex_parts (rtx x, rtx y)
3327 {
3328 /* Show the output dies here. This is necessary for SUBREGs
3329 of pseudos since we cannot track their lifetimes correctly;
3330 hard regs shouldn't appear here except as return values. */
3331 if (!reload_completed && !reload_in_progress
3332 && REG_P (x) && !reg_overlap_mentioned_p (x, y))
3333 emit_clobber (x);
3334
3335 write_complex_part (x, read_complex_part (y, false), false);
3336 write_complex_part (x, read_complex_part (y, true), true);
3337
3338 return get_last_insn ();
3339 }
3340
3341 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3342 MODE is known to be complex. Returns the last instruction emitted. */
3343
3344 static rtx
3345 emit_move_complex (enum machine_mode mode, rtx x, rtx y)
3346 {
3347 bool try_int;
3348
3349 /* Need to take special care for pushes, to maintain proper ordering
3350 of the data, and possibly extra padding. */
3351 if (push_operand (x, mode))
3352 return emit_move_complex_push (mode, x, y);
3353
3354 /* See if we can coerce the target into moving both values at once, except
3355 for floating point where we favor moving as parts if this is easy. */
3356 if (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
3357 && optab_handler (mov_optab, GET_MODE_INNER (mode)) != CODE_FOR_nothing
3358 && !(REG_P (x)
3359 && HARD_REGISTER_P (x)
3360 && hard_regno_nregs[REGNO (x)][mode] == 1)
3361 && !(REG_P (y)
3362 && HARD_REGISTER_P (y)
3363 && hard_regno_nregs[REGNO (y)][mode] == 1))
3364 try_int = false;
3365 /* Not possible if the values are inherently not adjacent. */
3366 else if (GET_CODE (x) == CONCAT || GET_CODE (y) == CONCAT)
3367 try_int = false;
3368 /* Is possible if both are registers (or subregs of registers). */
3369 else if (register_operand (x, mode) && register_operand (y, mode))
3370 try_int = true;
3371 /* If one of the operands is a memory, and alignment constraints
3372 are friendly enough, we may be able to do combined memory operations.
3373 We do not attempt this if Y is a constant because that combination is
3374 usually better with the by-parts thing below. */
3375 else if ((MEM_P (x) ? !CONSTANT_P (y) : MEM_P (y))
3376 && (!STRICT_ALIGNMENT
3377 || get_mode_alignment (mode) == BIGGEST_ALIGNMENT))
3378 try_int = true;
3379 else
3380 try_int = false;
3381
3382 if (try_int)
3383 {
3384 rtx ret;
3385
3386 /* For memory to memory moves, optimal behavior can be had with the
3387 existing block move logic. */
3388 if (MEM_P (x) && MEM_P (y))
3389 {
3390 emit_block_move (x, y, GEN_INT (GET_MODE_SIZE (mode)),
3391 BLOCK_OP_NO_LIBCALL);
3392 return get_last_insn ();
3393 }
3394
3395 ret = emit_move_via_integer (mode, x, y, true);
3396 if (ret)
3397 return ret;
3398 }
3399
3400 return emit_move_complex_parts (x, y);
3401 }
3402
3403 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3404 MODE is known to be MODE_CC. Returns the last instruction emitted. */
3405
3406 static rtx
3407 emit_move_ccmode (enum machine_mode mode, rtx x, rtx y)
3408 {
3409 rtx ret;
3410
3411 /* Assume all MODE_CC modes are equivalent; if we have movcc, use it. */
3412 if (mode != CCmode)
3413 {
3414 enum insn_code code = optab_handler (mov_optab, CCmode);
3415 if (code != CODE_FOR_nothing)
3416 {
3417 x = emit_move_change_mode (CCmode, mode, x, true);
3418 y = emit_move_change_mode (CCmode, mode, y, true);
3419 return emit_insn (GEN_FCN (code) (x, y));
3420 }
3421 }
3422
3423 /* Otherwise, find the MODE_INT mode of the same width. */
3424 ret = emit_move_via_integer (mode, x, y, false);
3425 gcc_assert (ret != NULL);
3426 return ret;
3427 }
3428
3429 /* Return true if word I of OP lies entirely in the
3430 undefined bits of a paradoxical subreg. */
3431
3432 static bool
3433 undefined_operand_subword_p (const_rtx op, int i)
3434 {
3435 enum machine_mode innermode, innermostmode;
3436 int offset;
3437 if (GET_CODE (op) != SUBREG)
3438 return false;
3439 innermode = GET_MODE (op);
3440 innermostmode = GET_MODE (SUBREG_REG (op));
3441 offset = i * UNITS_PER_WORD + SUBREG_BYTE (op);
3442 /* The SUBREG_BYTE represents offset, as if the value were stored in
3443 memory, except for a paradoxical subreg where we define
3444 SUBREG_BYTE to be 0; undo this exception as in
3445 simplify_subreg. */
3446 if (SUBREG_BYTE (op) == 0
3447 && GET_MODE_SIZE (innermostmode) < GET_MODE_SIZE (innermode))
3448 {
3449 int difference = (GET_MODE_SIZE (innermostmode) - GET_MODE_SIZE (innermode));
3450 if (WORDS_BIG_ENDIAN)
3451 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
3452 if (BYTES_BIG_ENDIAN)
3453 offset += difference % UNITS_PER_WORD;
3454 }
3455 if (offset >= GET_MODE_SIZE (innermostmode)
3456 || offset <= -GET_MODE_SIZE (word_mode))
3457 return true;
3458 return false;
3459 }
3460
3461 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3462 MODE is any multi-word or full-word mode that lacks a move_insn
3463 pattern. Note that you will get better code if you define such
3464 patterns, even if they must turn into multiple assembler instructions. */
3465
3466 static rtx
3467 emit_move_multi_word (enum machine_mode mode, rtx x, rtx y)
3468 {
3469 rtx last_insn = 0;
3470 rtx seq, inner;
3471 bool need_clobber;
3472 int i;
3473
3474 gcc_assert (GET_MODE_SIZE (mode) >= UNITS_PER_WORD);
3475
3476 /* If X is a push on the stack, do the push now and replace
3477 X with a reference to the stack pointer. */
3478 if (push_operand (x, mode))
3479 x = emit_move_resolve_push (mode, x);
3480
3481 /* If we are in reload, see if either operand is a MEM whose address
3482 is scheduled for replacement. */
3483 if (reload_in_progress && MEM_P (x)
3484 && (inner = find_replacement (&XEXP (x, 0))) != XEXP (x, 0))
3485 x = replace_equiv_address_nv (x, inner);
3486 if (reload_in_progress && MEM_P (y)
3487 && (inner = find_replacement (&XEXP (y, 0))) != XEXP (y, 0))
3488 y = replace_equiv_address_nv (y, inner);
3489
3490 start_sequence ();
3491
3492 need_clobber = false;
3493 for (i = 0;
3494 i < (GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD;
3495 i++)
3496 {
3497 rtx xpart = operand_subword (x, i, 1, mode);
3498 rtx ypart;
3499
3500 /* Do not generate code for a move if it would come entirely
3501 from the undefined bits of a paradoxical subreg. */
3502 if (undefined_operand_subword_p (y, i))
3503 continue;
3504
3505 ypart = operand_subword (y, i, 1, mode);
3506
3507 /* If we can't get a part of Y, put Y into memory if it is a
3508 constant. Otherwise, force it into a register. Then we must
3509 be able to get a part of Y. */
3510 if (ypart == 0 && CONSTANT_P (y))
3511 {
3512 y = use_anchored_address (force_const_mem (mode, y));
3513 ypart = operand_subword (y, i, 1, mode);
3514 }
3515 else if (ypart == 0)
3516 ypart = operand_subword_force (y, i, mode);
3517
3518 gcc_assert (xpart && ypart);
3519
3520 need_clobber |= (GET_CODE (xpart) == SUBREG);
3521
3522 last_insn = emit_move_insn (xpart, ypart);
3523 }
3524
3525 seq = get_insns ();
3526 end_sequence ();
3527
3528 /* Show the output dies here. This is necessary for SUBREGs
3529 of pseudos since we cannot track their lifetimes correctly;
3530 hard regs shouldn't appear here except as return values.
3531 We never want to emit such a clobber after reload. */
3532 if (x != y
3533 && ! (reload_in_progress || reload_completed)
3534 && need_clobber != 0)
3535 emit_clobber (x);
3536
3537 emit_insn (seq);
3538
3539 return last_insn;
3540 }
3541
3542 /* Low level part of emit_move_insn.
3543 Called just like emit_move_insn, but assumes X and Y
3544 are basically valid. */
3545
3546 rtx
3547 emit_move_insn_1 (rtx x, rtx y)
3548 {
3549 enum machine_mode mode = GET_MODE (x);
3550 enum insn_code code;
3551
3552 gcc_assert ((unsigned int) mode < (unsigned int) MAX_MACHINE_MODE);
3553
3554 code = optab_handler (mov_optab, mode);
3555 if (code != CODE_FOR_nothing)
3556 return emit_insn (GEN_FCN (code) (x, y));
3557
3558 /* Expand complex moves by moving real part and imag part. */
3559 if (COMPLEX_MODE_P (mode))
3560 return emit_move_complex (mode, x, y);
3561
3562 if (GET_MODE_CLASS (mode) == MODE_DECIMAL_FLOAT
3563 || ALL_FIXED_POINT_MODE_P (mode))
3564 {
3565 rtx result = emit_move_via_integer (mode, x, y, true);
3566
3567 /* If we can't find an integer mode, use multi words. */
3568 if (result)
3569 return result;
3570 else
3571 return emit_move_multi_word (mode, x, y);
3572 }
3573
3574 if (GET_MODE_CLASS (mode) == MODE_CC)
3575 return emit_move_ccmode (mode, x, y);
3576
3577 /* Try using a move pattern for the corresponding integer mode. This is
3578 only safe when simplify_subreg can convert MODE constants into integer
3579 constants. At present, it can only do this reliably if the value
3580 fits within a HOST_WIDE_INT. */
3581 if (!CONSTANT_P (y) || GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
3582 {
3583 rtx ret = emit_move_via_integer (mode, x, y, lra_in_progress);
3584
3585 if (ret)
3586 {
3587 if (! lra_in_progress || recog (PATTERN (ret), ret, 0) >= 0)
3588 return ret;
3589 }
3590 }
3591
3592 return emit_move_multi_word (mode, x, y);
3593 }
3594
3595 /* Generate code to copy Y into X.
3596 Both Y and X must have the same mode, except that
3597 Y can be a constant with VOIDmode.
3598 This mode cannot be BLKmode; use emit_block_move for that.
3599
3600 Return the last instruction emitted. */
3601
3602 rtx
3603 emit_move_insn (rtx x, rtx y)
3604 {
3605 enum machine_mode mode = GET_MODE (x);
3606 rtx y_cst = NULL_RTX;
3607 rtx last_insn, set;
3608
3609 gcc_assert (mode != BLKmode
3610 && (GET_MODE (y) == mode || GET_MODE (y) == VOIDmode));
3611
3612 if (CONSTANT_P (y))
3613 {
3614 if (optimize
3615 && SCALAR_FLOAT_MODE_P (GET_MODE (x))
3616 && (last_insn = compress_float_constant (x, y)))
3617 return last_insn;
3618
3619 y_cst = y;
3620
3621 if (!targetm.legitimate_constant_p (mode, y))
3622 {
3623 y = force_const_mem (mode, y);
3624
3625 /* If the target's cannot_force_const_mem prevented the spill,
3626 assume that the target's move expanders will also take care
3627 of the non-legitimate constant. */
3628 if (!y)
3629 y = y_cst;
3630 else
3631 y = use_anchored_address (y);
3632 }
3633 }
3634
3635 /* If X or Y are memory references, verify that their addresses are valid
3636 for the machine. */
3637 if (MEM_P (x)
3638 && (! memory_address_addr_space_p (GET_MODE (x), XEXP (x, 0),
3639 MEM_ADDR_SPACE (x))
3640 && ! push_operand (x, GET_MODE (x))))
3641 x = validize_mem (x);
3642
3643 if (MEM_P (y)
3644 && ! memory_address_addr_space_p (GET_MODE (y), XEXP (y, 0),
3645 MEM_ADDR_SPACE (y)))
3646 y = validize_mem (y);
3647
3648 gcc_assert (mode != BLKmode);
3649
3650 last_insn = emit_move_insn_1 (x, y);
3651
3652 if (y_cst && REG_P (x)
3653 && (set = single_set (last_insn)) != NULL_RTX
3654 && SET_DEST (set) == x
3655 && ! rtx_equal_p (y_cst, SET_SRC (set)))
3656 set_unique_reg_note (last_insn, REG_EQUAL, copy_rtx (y_cst));
3657
3658 return last_insn;
3659 }
3660
3661 /* If Y is representable exactly in a narrower mode, and the target can
3662 perform the extension directly from constant or memory, then emit the
3663 move as an extension. */
3664
3665 static rtx
3666 compress_float_constant (rtx x, rtx y)
3667 {
3668 enum machine_mode dstmode = GET_MODE (x);
3669 enum machine_mode orig_srcmode = GET_MODE (y);
3670 enum machine_mode srcmode;
3671 REAL_VALUE_TYPE r;
3672 int oldcost, newcost;
3673 bool speed = optimize_insn_for_speed_p ();
3674
3675 REAL_VALUE_FROM_CONST_DOUBLE (r, y);
3676
3677 if (targetm.legitimate_constant_p (dstmode, y))
3678 oldcost = set_src_cost (y, speed);
3679 else
3680 oldcost = set_src_cost (force_const_mem (dstmode, y), speed);
3681
3682 for (srcmode = GET_CLASS_NARROWEST_MODE (GET_MODE_CLASS (orig_srcmode));
3683 srcmode != orig_srcmode;
3684 srcmode = GET_MODE_WIDER_MODE (srcmode))
3685 {
3686 enum insn_code ic;
3687 rtx trunc_y, last_insn;
3688
3689 /* Skip if the target can't extend this way. */
3690 ic = can_extend_p (dstmode, srcmode, 0);
3691 if (ic == CODE_FOR_nothing)
3692 continue;
3693
3694 /* Skip if the narrowed value isn't exact. */
3695 if (! exact_real_truncate (srcmode, &r))
3696 continue;
3697
3698 trunc_y = CONST_DOUBLE_FROM_REAL_VALUE (r, srcmode);
3699
3700 if (targetm.legitimate_constant_p (srcmode, trunc_y))
3701 {
3702 /* Skip if the target needs extra instructions to perform
3703 the extension. */
3704 if (!insn_operand_matches (ic, 1, trunc_y))
3705 continue;
3706 /* This is valid, but may not be cheaper than the original. */
3707 newcost = set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y),
3708 speed);
3709 if (oldcost < newcost)
3710 continue;
3711 }
3712 else if (float_extend_from_mem[dstmode][srcmode])
3713 {
3714 trunc_y = force_const_mem (srcmode, trunc_y);
3715 /* This is valid, but may not be cheaper than the original. */
3716 newcost = set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y),
3717 speed);
3718 if (oldcost < newcost)
3719 continue;
3720 trunc_y = validize_mem (trunc_y);
3721 }
3722 else
3723 continue;
3724
3725 /* For CSE's benefit, force the compressed constant pool entry
3726 into a new pseudo. This constant may be used in different modes,
3727 and if not, combine will put things back together for us. */
3728 trunc_y = force_reg (srcmode, trunc_y);
3729 emit_unop_insn (ic, x, trunc_y, UNKNOWN);
3730 last_insn = get_last_insn ();
3731
3732 if (REG_P (x))
3733 set_unique_reg_note (last_insn, REG_EQUAL, y);
3734
3735 return last_insn;
3736 }
3737
3738 return NULL_RTX;
3739 }
3740 \f
3741 /* Pushing data onto the stack. */
3742
3743 /* Push a block of length SIZE (perhaps variable)
3744 and return an rtx to address the beginning of the block.
3745 The value may be virtual_outgoing_args_rtx.
3746
3747 EXTRA is the number of bytes of padding to push in addition to SIZE.
3748 BELOW nonzero means this padding comes at low addresses;
3749 otherwise, the padding comes at high addresses. */
3750
3751 rtx
3752 push_block (rtx size, int extra, int below)
3753 {
3754 rtx temp;
3755
3756 size = convert_modes (Pmode, ptr_mode, size, 1);
3757 if (CONSTANT_P (size))
3758 anti_adjust_stack (plus_constant (Pmode, size, extra));
3759 else if (REG_P (size) && extra == 0)
3760 anti_adjust_stack (size);
3761 else
3762 {
3763 temp = copy_to_mode_reg (Pmode, size);
3764 if (extra != 0)
3765 temp = expand_binop (Pmode, add_optab, temp,
3766 gen_int_mode (extra, Pmode),
3767 temp, 0, OPTAB_LIB_WIDEN);
3768 anti_adjust_stack (temp);
3769 }
3770
3771 #ifndef STACK_GROWS_DOWNWARD
3772 if (0)
3773 #else
3774 if (1)
3775 #endif
3776 {
3777 temp = virtual_outgoing_args_rtx;
3778 if (extra != 0 && below)
3779 temp = plus_constant (Pmode, temp, extra);
3780 }
3781 else
3782 {
3783 if (CONST_INT_P (size))
3784 temp = plus_constant (Pmode, virtual_outgoing_args_rtx,
3785 -INTVAL (size) - (below ? 0 : extra));
3786 else if (extra != 0 && !below)
3787 temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx,
3788 negate_rtx (Pmode, plus_constant (Pmode, size,
3789 extra)));
3790 else
3791 temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx,
3792 negate_rtx (Pmode, size));
3793 }
3794
3795 return memory_address (GET_CLASS_NARROWEST_MODE (MODE_INT), temp);
3796 }
3797
3798 /* A utility routine that returns the base of an auto-inc memory, or NULL. */
3799
3800 static rtx
3801 mem_autoinc_base (rtx mem)
3802 {
3803 if (MEM_P (mem))
3804 {
3805 rtx addr = XEXP (mem, 0);
3806 if (GET_RTX_CLASS (GET_CODE (addr)) == RTX_AUTOINC)
3807 return XEXP (addr, 0);
3808 }
3809 return NULL;
3810 }
3811
3812 /* A utility routine used here, in reload, and in try_split. The insns
3813 after PREV up to and including LAST are known to adjust the stack,
3814 with a final value of END_ARGS_SIZE. Iterate backward from LAST
3815 placing notes as appropriate. PREV may be NULL, indicating the
3816 entire insn sequence prior to LAST should be scanned.
3817
3818 The set of allowed stack pointer modifications is small:
3819 (1) One or more auto-inc style memory references (aka pushes),
3820 (2) One or more addition/subtraction with the SP as destination,
3821 (3) A single move insn with the SP as destination,
3822 (4) A call_pop insn,
3823 (5) Noreturn call insns if !ACCUMULATE_OUTGOING_ARGS.
3824
3825 Insns in the sequence that do not modify the SP are ignored,
3826 except for noreturn calls.
3827
3828 The return value is the amount of adjustment that can be trivially
3829 verified, via immediate operand or auto-inc. If the adjustment
3830 cannot be trivially extracted, the return value is INT_MIN. */
3831
3832 HOST_WIDE_INT
3833 find_args_size_adjust (rtx insn)
3834 {
3835 rtx dest, set, pat;
3836 int i;
3837
3838 pat = PATTERN (insn);
3839 set = NULL;
3840
3841 /* Look for a call_pop pattern. */
3842 if (CALL_P (insn))
3843 {
3844 /* We have to allow non-call_pop patterns for the case
3845 of emit_single_push_insn of a TLS address. */
3846 if (GET_CODE (pat) != PARALLEL)
3847 return 0;
3848
3849 /* All call_pop have a stack pointer adjust in the parallel.
3850 The call itself is always first, and the stack adjust is
3851 usually last, so search from the end. */
3852 for (i = XVECLEN (pat, 0) - 1; i > 0; --i)
3853 {
3854 set = XVECEXP (pat, 0, i);
3855 if (GET_CODE (set) != SET)
3856 continue;
3857 dest = SET_DEST (set);
3858 if (dest == stack_pointer_rtx)
3859 break;
3860 }
3861 /* We'd better have found the stack pointer adjust. */
3862 if (i == 0)
3863 return 0;
3864 /* Fall through to process the extracted SET and DEST
3865 as if it was a standalone insn. */
3866 }
3867 else if (GET_CODE (pat) == SET)
3868 set = pat;
3869 else if ((set = single_set (insn)) != NULL)
3870 ;
3871 else if (GET_CODE (pat) == PARALLEL)
3872 {
3873 /* ??? Some older ports use a parallel with a stack adjust
3874 and a store for a PUSH_ROUNDING pattern, rather than a
3875 PRE/POST_MODIFY rtx. Don't force them to update yet... */
3876 /* ??? See h8300 and m68k, pushqi1. */
3877 for (i = XVECLEN (pat, 0) - 1; i >= 0; --i)
3878 {
3879 set = XVECEXP (pat, 0, i);
3880 if (GET_CODE (set) != SET)
3881 continue;
3882 dest = SET_DEST (set);
3883 if (dest == stack_pointer_rtx)
3884 break;
3885
3886 /* We do not expect an auto-inc of the sp in the parallel. */
3887 gcc_checking_assert (mem_autoinc_base (dest) != stack_pointer_rtx);
3888 gcc_checking_assert (mem_autoinc_base (SET_SRC (set))
3889 != stack_pointer_rtx);
3890 }
3891 if (i < 0)
3892 return 0;
3893 }
3894 else
3895 return 0;
3896
3897 dest = SET_DEST (set);
3898
3899 /* Look for direct modifications of the stack pointer. */
3900 if (REG_P (dest) && REGNO (dest) == STACK_POINTER_REGNUM)
3901 {
3902 /* Look for a trivial adjustment, otherwise assume nothing. */
3903 /* Note that the SPU restore_stack_block pattern refers to
3904 the stack pointer in V4SImode. Consider that non-trivial. */
3905 if (SCALAR_INT_MODE_P (GET_MODE (dest))
3906 && GET_CODE (SET_SRC (set)) == PLUS
3907 && XEXP (SET_SRC (set), 0) == stack_pointer_rtx
3908 && CONST_INT_P (XEXP (SET_SRC (set), 1)))
3909 return INTVAL (XEXP (SET_SRC (set), 1));
3910 /* ??? Reload can generate no-op moves, which will be cleaned
3911 up later. Recognize it and continue searching. */
3912 else if (rtx_equal_p (dest, SET_SRC (set)))
3913 return 0;
3914 else
3915 return HOST_WIDE_INT_MIN;
3916 }
3917 else
3918 {
3919 rtx mem, addr;
3920
3921 /* Otherwise only think about autoinc patterns. */
3922 if (mem_autoinc_base (dest) == stack_pointer_rtx)
3923 {
3924 mem = dest;
3925 gcc_checking_assert (mem_autoinc_base (SET_SRC (set))
3926 != stack_pointer_rtx);
3927 }
3928 else if (mem_autoinc_base (SET_SRC (set)) == stack_pointer_rtx)
3929 mem = SET_SRC (set);
3930 else
3931 return 0;
3932
3933 addr = XEXP (mem, 0);
3934 switch (GET_CODE (addr))
3935 {
3936 case PRE_INC:
3937 case POST_INC:
3938 return GET_MODE_SIZE (GET_MODE (mem));
3939 case PRE_DEC:
3940 case POST_DEC:
3941 return -GET_MODE_SIZE (GET_MODE (mem));
3942 case PRE_MODIFY:
3943 case POST_MODIFY:
3944 addr = XEXP (addr, 1);
3945 gcc_assert (GET_CODE (addr) == PLUS);
3946 gcc_assert (XEXP (addr, 0) == stack_pointer_rtx);
3947 gcc_assert (CONST_INT_P (XEXP (addr, 1)));
3948 return INTVAL (XEXP (addr, 1));
3949 default:
3950 gcc_unreachable ();
3951 }
3952 }
3953 }
3954
3955 int
3956 fixup_args_size_notes (rtx prev, rtx last, int end_args_size)
3957 {
3958 int args_size = end_args_size;
3959 bool saw_unknown = false;
3960 rtx insn;
3961
3962 for (insn = last; insn != prev; insn = PREV_INSN (insn))
3963 {
3964 HOST_WIDE_INT this_delta;
3965
3966 if (!NONDEBUG_INSN_P (insn))
3967 continue;
3968
3969 this_delta = find_args_size_adjust (insn);
3970 if (this_delta == 0)
3971 {
3972 if (!CALL_P (insn)
3973 || ACCUMULATE_OUTGOING_ARGS
3974 || find_reg_note (insn, REG_NORETURN, NULL_RTX) == NULL_RTX)
3975 continue;
3976 }
3977
3978 gcc_assert (!saw_unknown);
3979 if (this_delta == HOST_WIDE_INT_MIN)
3980 saw_unknown = true;
3981
3982 add_reg_note (insn, REG_ARGS_SIZE, GEN_INT (args_size));
3983 #ifdef STACK_GROWS_DOWNWARD
3984 this_delta = -(unsigned HOST_WIDE_INT) this_delta;
3985 #endif
3986 args_size -= this_delta;
3987 }
3988
3989 return saw_unknown ? INT_MIN : args_size;
3990 }
3991
3992 #ifdef PUSH_ROUNDING
3993 /* Emit single push insn. */
3994
3995 static void
3996 emit_single_push_insn_1 (enum machine_mode mode, rtx x, tree type)
3997 {
3998 rtx dest_addr;
3999 unsigned rounded_size = PUSH_ROUNDING (GET_MODE_SIZE (mode));
4000 rtx dest;
4001 enum insn_code icode;
4002
4003 stack_pointer_delta += PUSH_ROUNDING (GET_MODE_SIZE (mode));
4004 /* If there is push pattern, use it. Otherwise try old way of throwing
4005 MEM representing push operation to move expander. */
4006 icode = optab_handler (push_optab, mode);
4007 if (icode != CODE_FOR_nothing)
4008 {
4009 struct expand_operand ops[1];
4010
4011 create_input_operand (&ops[0], x, mode);
4012 if (maybe_expand_insn (icode, 1, ops))
4013 return;
4014 }
4015 if (GET_MODE_SIZE (mode) == rounded_size)
4016 dest_addr = gen_rtx_fmt_e (STACK_PUSH_CODE, Pmode, stack_pointer_rtx);
4017 /* If we are to pad downward, adjust the stack pointer first and
4018 then store X into the stack location using an offset. This is
4019 because emit_move_insn does not know how to pad; it does not have
4020 access to type. */
4021 else if (FUNCTION_ARG_PADDING (mode, type) == downward)
4022 {
4023 unsigned padding_size = rounded_size - GET_MODE_SIZE (mode);
4024 HOST_WIDE_INT offset;
4025
4026 emit_move_insn (stack_pointer_rtx,
4027 expand_binop (Pmode,
4028 #ifdef STACK_GROWS_DOWNWARD
4029 sub_optab,
4030 #else
4031 add_optab,
4032 #endif
4033 stack_pointer_rtx,
4034 gen_int_mode (rounded_size, Pmode),
4035 NULL_RTX, 0, OPTAB_LIB_WIDEN));
4036
4037 offset = (HOST_WIDE_INT) padding_size;
4038 #ifdef STACK_GROWS_DOWNWARD
4039 if (STACK_PUSH_CODE == POST_DEC)
4040 /* We have already decremented the stack pointer, so get the
4041 previous value. */
4042 offset += (HOST_WIDE_INT) rounded_size;
4043 #else
4044 if (STACK_PUSH_CODE == POST_INC)
4045 /* We have already incremented the stack pointer, so get the
4046 previous value. */
4047 offset -= (HOST_WIDE_INT) rounded_size;
4048 #endif
4049 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
4050 gen_int_mode (offset, Pmode));
4051 }
4052 else
4053 {
4054 #ifdef STACK_GROWS_DOWNWARD
4055 /* ??? This seems wrong if STACK_PUSH_CODE == POST_DEC. */
4056 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
4057 gen_int_mode (-(HOST_WIDE_INT) rounded_size,
4058 Pmode));
4059 #else
4060 /* ??? This seems wrong if STACK_PUSH_CODE == POST_INC. */
4061 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
4062 gen_int_mode (rounded_size, Pmode));
4063 #endif
4064 dest_addr = gen_rtx_PRE_MODIFY (Pmode, stack_pointer_rtx, dest_addr);
4065 }
4066
4067 dest = gen_rtx_MEM (mode, dest_addr);
4068
4069 if (type != 0)
4070 {
4071 set_mem_attributes (dest, type, 1);
4072
4073 if (flag_optimize_sibling_calls)
4074 /* Function incoming arguments may overlap with sibling call
4075 outgoing arguments and we cannot allow reordering of reads
4076 from function arguments with stores to outgoing arguments
4077 of sibling calls. */
4078 set_mem_alias_set (dest, 0);
4079 }
4080 emit_move_insn (dest, x);
4081 }
4082
4083 /* Emit and annotate a single push insn. */
4084
4085 static void
4086 emit_single_push_insn (enum machine_mode mode, rtx x, tree type)
4087 {
4088 int delta, old_delta = stack_pointer_delta;
4089 rtx prev = get_last_insn ();
4090 rtx last;
4091
4092 emit_single_push_insn_1 (mode, x, type);
4093
4094 last = get_last_insn ();
4095
4096 /* Notice the common case where we emitted exactly one insn. */
4097 if (PREV_INSN (last) == prev)
4098 {
4099 add_reg_note (last, REG_ARGS_SIZE, GEN_INT (stack_pointer_delta));
4100 return;
4101 }
4102
4103 delta = fixup_args_size_notes (prev, last, stack_pointer_delta);
4104 gcc_assert (delta == INT_MIN || delta == old_delta);
4105 }
4106 #endif
4107
4108 /* Generate code to push X onto the stack, assuming it has mode MODE and
4109 type TYPE.
4110 MODE is redundant except when X is a CONST_INT (since they don't
4111 carry mode info).
4112 SIZE is an rtx for the size of data to be copied (in bytes),
4113 needed only if X is BLKmode.
4114
4115 ALIGN (in bits) is maximum alignment we can assume.
4116
4117 If PARTIAL and REG are both nonzero, then copy that many of the first
4118 bytes of X into registers starting with REG, and push the rest of X.
4119 The amount of space pushed is decreased by PARTIAL bytes.
4120 REG must be a hard register in this case.
4121 If REG is zero but PARTIAL is not, take any all others actions for an
4122 argument partially in registers, but do not actually load any
4123 registers.
4124
4125 EXTRA is the amount in bytes of extra space to leave next to this arg.
4126 This is ignored if an argument block has already been allocated.
4127
4128 On a machine that lacks real push insns, ARGS_ADDR is the address of
4129 the bottom of the argument block for this call. We use indexing off there
4130 to store the arg. On machines with push insns, ARGS_ADDR is 0 when a
4131 argument block has not been preallocated.
4132
4133 ARGS_SO_FAR is the size of args previously pushed for this call.
4134
4135 REG_PARM_STACK_SPACE is nonzero if functions require stack space
4136 for arguments passed in registers. If nonzero, it will be the number
4137 of bytes required. */
4138
4139 void
4140 emit_push_insn (rtx x, enum machine_mode mode, tree type, rtx size,
4141 unsigned int align, int partial, rtx reg, int extra,
4142 rtx args_addr, rtx args_so_far, int reg_parm_stack_space,
4143 rtx alignment_pad)
4144 {
4145 rtx xinner;
4146 enum direction stack_direction
4147 #ifdef STACK_GROWS_DOWNWARD
4148 = downward;
4149 #else
4150 = upward;
4151 #endif
4152
4153 /* Decide where to pad the argument: `downward' for below,
4154 `upward' for above, or `none' for don't pad it.
4155 Default is below for small data on big-endian machines; else above. */
4156 enum direction where_pad = FUNCTION_ARG_PADDING (mode, type);
4157
4158 /* Invert direction if stack is post-decrement.
4159 FIXME: why? */
4160 if (STACK_PUSH_CODE == POST_DEC)
4161 if (where_pad != none)
4162 where_pad = (where_pad == downward ? upward : downward);
4163
4164 xinner = x;
4165
4166 if (mode == BLKmode
4167 || (STRICT_ALIGNMENT && align < GET_MODE_ALIGNMENT (mode)))
4168 {
4169 /* Copy a block into the stack, entirely or partially. */
4170
4171 rtx temp;
4172 int used;
4173 int offset;
4174 int skip;
4175
4176 offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT);
4177 used = partial - offset;
4178
4179 if (mode != BLKmode)
4180 {
4181 /* A value is to be stored in an insufficiently aligned
4182 stack slot; copy via a suitably aligned slot if
4183 necessary. */
4184 size = GEN_INT (GET_MODE_SIZE (mode));
4185 if (!MEM_P (xinner))
4186 {
4187 temp = assign_temp (type, 1, 1);
4188 emit_move_insn (temp, xinner);
4189 xinner = temp;
4190 }
4191 }
4192
4193 gcc_assert (size);
4194
4195 /* USED is now the # of bytes we need not copy to the stack
4196 because registers will take care of them. */
4197
4198 if (partial != 0)
4199 xinner = adjust_address (xinner, BLKmode, used);
4200
4201 /* If the partial register-part of the arg counts in its stack size,
4202 skip the part of stack space corresponding to the registers.
4203 Otherwise, start copying to the beginning of the stack space,
4204 by setting SKIP to 0. */
4205 skip = (reg_parm_stack_space == 0) ? 0 : used;
4206
4207 #ifdef PUSH_ROUNDING
4208 /* Do it with several push insns if that doesn't take lots of insns
4209 and if there is no difficulty with push insns that skip bytes
4210 on the stack for alignment purposes. */
4211 if (args_addr == 0
4212 && PUSH_ARGS
4213 && CONST_INT_P (size)
4214 && skip == 0
4215 && MEM_ALIGN (xinner) >= align
4216 && (MOVE_BY_PIECES_P ((unsigned) INTVAL (size) - used, align))
4217 /* Here we avoid the case of a structure whose weak alignment
4218 forces many pushes of a small amount of data,
4219 and such small pushes do rounding that causes trouble. */
4220 && ((! SLOW_UNALIGNED_ACCESS (word_mode, align))
4221 || align >= BIGGEST_ALIGNMENT
4222 || (PUSH_ROUNDING (align / BITS_PER_UNIT)
4223 == (align / BITS_PER_UNIT)))
4224 && (HOST_WIDE_INT) PUSH_ROUNDING (INTVAL (size)) == INTVAL (size))
4225 {
4226 /* Push padding now if padding above and stack grows down,
4227 or if padding below and stack grows up.
4228 But if space already allocated, this has already been done. */
4229 if (extra && args_addr == 0
4230 && where_pad != none && where_pad != stack_direction)
4231 anti_adjust_stack (GEN_INT (extra));
4232
4233 move_by_pieces (NULL, xinner, INTVAL (size) - used, align, 0);
4234 }
4235 else
4236 #endif /* PUSH_ROUNDING */
4237 {
4238 rtx target;
4239
4240 /* Otherwise make space on the stack and copy the data
4241 to the address of that space. */
4242
4243 /* Deduct words put into registers from the size we must copy. */
4244 if (partial != 0)
4245 {
4246 if (CONST_INT_P (size))
4247 size = GEN_INT (INTVAL (size) - used);
4248 else
4249 size = expand_binop (GET_MODE (size), sub_optab, size,
4250 gen_int_mode (used, GET_MODE (size)),
4251 NULL_RTX, 0, OPTAB_LIB_WIDEN);
4252 }
4253
4254 /* Get the address of the stack space.
4255 In this case, we do not deal with EXTRA separately.
4256 A single stack adjust will do. */
4257 if (! args_addr)
4258 {
4259 temp = push_block (size, extra, where_pad == downward);
4260 extra = 0;
4261 }
4262 else if (CONST_INT_P (args_so_far))
4263 temp = memory_address (BLKmode,
4264 plus_constant (Pmode, args_addr,
4265 skip + INTVAL (args_so_far)));
4266 else
4267 temp = memory_address (BLKmode,
4268 plus_constant (Pmode,
4269 gen_rtx_PLUS (Pmode,
4270 args_addr,
4271 args_so_far),
4272 skip));
4273
4274 if (!ACCUMULATE_OUTGOING_ARGS)
4275 {
4276 /* If the source is referenced relative to the stack pointer,
4277 copy it to another register to stabilize it. We do not need
4278 to do this if we know that we won't be changing sp. */
4279
4280 if (reg_mentioned_p (virtual_stack_dynamic_rtx, temp)
4281 || reg_mentioned_p (virtual_outgoing_args_rtx, temp))
4282 temp = copy_to_reg (temp);
4283 }
4284
4285 target = gen_rtx_MEM (BLKmode, temp);
4286
4287 /* We do *not* set_mem_attributes here, because incoming arguments
4288 may overlap with sibling call outgoing arguments and we cannot
4289 allow reordering of reads from function arguments with stores
4290 to outgoing arguments of sibling calls. We do, however, want
4291 to record the alignment of the stack slot. */
4292 /* ALIGN may well be better aligned than TYPE, e.g. due to
4293 PARM_BOUNDARY. Assume the caller isn't lying. */
4294 set_mem_align (target, align);
4295
4296 emit_block_move (target, xinner, size, BLOCK_OP_CALL_PARM);
4297 }
4298 }
4299 else if (partial > 0)
4300 {
4301 /* Scalar partly in registers. */
4302
4303 int size = GET_MODE_SIZE (mode) / UNITS_PER_WORD;
4304 int i;
4305 int not_stack;
4306 /* # bytes of start of argument
4307 that we must make space for but need not store. */
4308 int offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT);
4309 int args_offset = INTVAL (args_so_far);
4310 int skip;
4311
4312 /* Push padding now if padding above and stack grows down,
4313 or if padding below and stack grows up.
4314 But if space already allocated, this has already been done. */
4315 if (extra && args_addr == 0
4316 && where_pad != none && where_pad != stack_direction)
4317 anti_adjust_stack (GEN_INT (extra));
4318
4319 /* If we make space by pushing it, we might as well push
4320 the real data. Otherwise, we can leave OFFSET nonzero
4321 and leave the space uninitialized. */
4322 if (args_addr == 0)
4323 offset = 0;
4324
4325 /* Now NOT_STACK gets the number of words that we don't need to
4326 allocate on the stack. Convert OFFSET to words too. */
4327 not_stack = (partial - offset) / UNITS_PER_WORD;
4328 offset /= UNITS_PER_WORD;
4329
4330 /* If the partial register-part of the arg counts in its stack size,
4331 skip the part of stack space corresponding to the registers.
4332 Otherwise, start copying to the beginning of the stack space,
4333 by setting SKIP to 0. */
4334 skip = (reg_parm_stack_space == 0) ? 0 : not_stack;
4335
4336 if (CONSTANT_P (x) && !targetm.legitimate_constant_p (mode, x))
4337 x = validize_mem (force_const_mem (mode, x));
4338
4339 /* If X is a hard register in a non-integer mode, copy it into a pseudo;
4340 SUBREGs of such registers are not allowed. */
4341 if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER
4342 && GET_MODE_CLASS (GET_MODE (x)) != MODE_INT))
4343 x = copy_to_reg (x);
4344
4345 /* Loop over all the words allocated on the stack for this arg. */
4346 /* We can do it by words, because any scalar bigger than a word
4347 has a size a multiple of a word. */
4348 #ifndef PUSH_ARGS_REVERSED
4349 for (i = not_stack; i < size; i++)
4350 #else
4351 for (i = size - 1; i >= not_stack; i--)
4352 #endif
4353 if (i >= not_stack + offset)
4354 emit_push_insn (operand_subword_force (x, i, mode),
4355 word_mode, NULL_TREE, NULL_RTX, align, 0, NULL_RTX,
4356 0, args_addr,
4357 GEN_INT (args_offset + ((i - not_stack + skip)
4358 * UNITS_PER_WORD)),
4359 reg_parm_stack_space, alignment_pad);
4360 }
4361 else
4362 {
4363 rtx addr;
4364 rtx dest;
4365
4366 /* Push padding now if padding above and stack grows down,
4367 or if padding below and stack grows up.
4368 But if space already allocated, this has already been done. */
4369 if (extra && args_addr == 0
4370 && where_pad != none && where_pad != stack_direction)
4371 anti_adjust_stack (GEN_INT (extra));
4372
4373 #ifdef PUSH_ROUNDING
4374 if (args_addr == 0 && PUSH_ARGS)
4375 emit_single_push_insn (mode, x, type);
4376 else
4377 #endif
4378 {
4379 if (CONST_INT_P (args_so_far))
4380 addr
4381 = memory_address (mode,
4382 plus_constant (Pmode, args_addr,
4383 INTVAL (args_so_far)));
4384 else
4385 addr = memory_address (mode, gen_rtx_PLUS (Pmode, args_addr,
4386 args_so_far));
4387 dest = gen_rtx_MEM (mode, addr);
4388
4389 /* We do *not* set_mem_attributes here, because incoming arguments
4390 may overlap with sibling call outgoing arguments and we cannot
4391 allow reordering of reads from function arguments with stores
4392 to outgoing arguments of sibling calls. We do, however, want
4393 to record the alignment of the stack slot. */
4394 /* ALIGN may well be better aligned than TYPE, e.g. due to
4395 PARM_BOUNDARY. Assume the caller isn't lying. */
4396 set_mem_align (dest, align);
4397
4398 emit_move_insn (dest, x);
4399 }
4400 }
4401
4402 /* If part should go in registers, copy that part
4403 into the appropriate registers. Do this now, at the end,
4404 since mem-to-mem copies above may do function calls. */
4405 if (partial > 0 && reg != 0)
4406 {
4407 /* Handle calls that pass values in multiple non-contiguous locations.
4408 The Irix 6 ABI has examples of this. */
4409 if (GET_CODE (reg) == PARALLEL)
4410 emit_group_load (reg, x, type, -1);
4411 else
4412 {
4413 gcc_assert (partial % UNITS_PER_WORD == 0);
4414 move_block_to_reg (REGNO (reg), x, partial / UNITS_PER_WORD, mode);
4415 }
4416 }
4417
4418 if (extra && args_addr == 0 && where_pad == stack_direction)
4419 anti_adjust_stack (GEN_INT (extra));
4420
4421 if (alignment_pad && args_addr == 0)
4422 anti_adjust_stack (alignment_pad);
4423 }
4424 \f
4425 /* Return X if X can be used as a subtarget in a sequence of arithmetic
4426 operations. */
4427
4428 static rtx
4429 get_subtarget (rtx x)
4430 {
4431 return (optimize
4432 || x == 0
4433 /* Only registers can be subtargets. */
4434 || !REG_P (x)
4435 /* Don't use hard regs to avoid extending their life. */
4436 || REGNO (x) < FIRST_PSEUDO_REGISTER
4437 ? 0 : x);
4438 }
4439
4440 /* A subroutine of expand_assignment. Optimize FIELD op= VAL, where
4441 FIELD is a bitfield. Returns true if the optimization was successful,
4442 and there's nothing else to do. */
4443
4444 static bool
4445 optimize_bitfield_assignment_op (unsigned HOST_WIDE_INT bitsize,
4446 unsigned HOST_WIDE_INT bitpos,
4447 unsigned HOST_WIDE_INT bitregion_start,
4448 unsigned HOST_WIDE_INT bitregion_end,
4449 enum machine_mode mode1, rtx str_rtx,
4450 tree to, tree src)
4451 {
4452 enum machine_mode str_mode = GET_MODE (str_rtx);
4453 unsigned int str_bitsize = GET_MODE_BITSIZE (str_mode);
4454 tree op0, op1;
4455 rtx value, result;
4456 optab binop;
4457 gimple srcstmt;
4458 enum tree_code code;
4459
4460 if (mode1 != VOIDmode
4461 || bitsize >= BITS_PER_WORD
4462 || str_bitsize > BITS_PER_WORD
4463 || TREE_SIDE_EFFECTS (to)
4464 || TREE_THIS_VOLATILE (to))
4465 return false;
4466
4467 STRIP_NOPS (src);
4468 if (TREE_CODE (src) != SSA_NAME)
4469 return false;
4470 if (TREE_CODE (TREE_TYPE (src)) != INTEGER_TYPE)
4471 return false;
4472
4473 srcstmt = get_gimple_for_ssa_name (src);
4474 if (!srcstmt
4475 || TREE_CODE_CLASS (gimple_assign_rhs_code (srcstmt)) != tcc_binary)
4476 return false;
4477
4478 code = gimple_assign_rhs_code (srcstmt);
4479
4480 op0 = gimple_assign_rhs1 (srcstmt);
4481
4482 /* If OP0 is an SSA_NAME, then we want to walk the use-def chain
4483 to find its initialization. Hopefully the initialization will
4484 be from a bitfield load. */
4485 if (TREE_CODE (op0) == SSA_NAME)
4486 {
4487 gimple op0stmt = get_gimple_for_ssa_name (op0);
4488
4489 /* We want to eventually have OP0 be the same as TO, which
4490 should be a bitfield. */
4491 if (!op0stmt
4492 || !is_gimple_assign (op0stmt)
4493 || gimple_assign_rhs_code (op0stmt) != TREE_CODE (to))
4494 return false;
4495 op0 = gimple_assign_rhs1 (op0stmt);
4496 }
4497
4498 op1 = gimple_assign_rhs2 (srcstmt);
4499
4500 if (!operand_equal_p (to, op0, 0))
4501 return false;
4502
4503 if (MEM_P (str_rtx))
4504 {
4505 unsigned HOST_WIDE_INT offset1;
4506
4507 if (str_bitsize == 0 || str_bitsize > BITS_PER_WORD)
4508 str_mode = word_mode;
4509 str_mode = get_best_mode (bitsize, bitpos,
4510 bitregion_start, bitregion_end,
4511 MEM_ALIGN (str_rtx), str_mode, 0);
4512 if (str_mode == VOIDmode)
4513 return false;
4514 str_bitsize = GET_MODE_BITSIZE (str_mode);
4515
4516 offset1 = bitpos;
4517 bitpos %= str_bitsize;
4518 offset1 = (offset1 - bitpos) / BITS_PER_UNIT;
4519 str_rtx = adjust_address (str_rtx, str_mode, offset1);
4520 }
4521 else if (!REG_P (str_rtx) && GET_CODE (str_rtx) != SUBREG)
4522 return false;
4523
4524 /* If the bit field covers the whole REG/MEM, store_field
4525 will likely generate better code. */
4526 if (bitsize >= str_bitsize)
4527 return false;
4528
4529 /* We can't handle fields split across multiple entities. */
4530 if (bitpos + bitsize > str_bitsize)
4531 return false;
4532
4533 if (BYTES_BIG_ENDIAN)
4534 bitpos = str_bitsize - bitpos - bitsize;
4535
4536 switch (code)
4537 {
4538 case PLUS_EXPR:
4539 case MINUS_EXPR:
4540 /* For now, just optimize the case of the topmost bitfield
4541 where we don't need to do any masking and also
4542 1 bit bitfields where xor can be used.
4543 We might win by one instruction for the other bitfields
4544 too if insv/extv instructions aren't used, so that
4545 can be added later. */
4546 if (bitpos + bitsize != str_bitsize
4547 && (bitsize != 1 || TREE_CODE (op1) != INTEGER_CST))
4548 break;
4549
4550 value = expand_expr (op1, NULL_RTX, str_mode, EXPAND_NORMAL);
4551 value = convert_modes (str_mode,
4552 TYPE_MODE (TREE_TYPE (op1)), value,
4553 TYPE_UNSIGNED (TREE_TYPE (op1)));
4554
4555 /* We may be accessing data outside the field, which means
4556 we can alias adjacent data. */
4557 if (MEM_P (str_rtx))
4558 {
4559 str_rtx = shallow_copy_rtx (str_rtx);
4560 set_mem_alias_set (str_rtx, 0);
4561 set_mem_expr (str_rtx, 0);
4562 }
4563
4564 binop = code == PLUS_EXPR ? add_optab : sub_optab;
4565 if (bitsize == 1 && bitpos + bitsize != str_bitsize)
4566 {
4567 value = expand_and (str_mode, value, const1_rtx, NULL);
4568 binop = xor_optab;
4569 }
4570 value = expand_shift (LSHIFT_EXPR, str_mode, value, bitpos, NULL_RTX, 1);
4571 result = expand_binop (str_mode, binop, str_rtx,
4572 value, str_rtx, 1, OPTAB_WIDEN);
4573 if (result != str_rtx)
4574 emit_move_insn (str_rtx, result);
4575 return true;
4576
4577 case BIT_IOR_EXPR:
4578 case BIT_XOR_EXPR:
4579 if (TREE_CODE (op1) != INTEGER_CST)
4580 break;
4581 value = expand_expr (op1, NULL_RTX, str_mode, EXPAND_NORMAL);
4582 value = convert_modes (str_mode,
4583 TYPE_MODE (TREE_TYPE (op1)), value,
4584 TYPE_UNSIGNED (TREE_TYPE (op1)));
4585
4586 /* We may be accessing data outside the field, which means
4587 we can alias adjacent data. */
4588 if (MEM_P (str_rtx))
4589 {
4590 str_rtx = shallow_copy_rtx (str_rtx);
4591 set_mem_alias_set (str_rtx, 0);
4592 set_mem_expr (str_rtx, 0);
4593 }
4594
4595 binop = code == BIT_IOR_EXPR ? ior_optab : xor_optab;
4596 if (bitpos + bitsize != str_bitsize)
4597 {
4598 rtx mask = gen_int_mode (((unsigned HOST_WIDE_INT) 1 << bitsize) - 1,
4599 str_mode);
4600 value = expand_and (str_mode, value, mask, NULL_RTX);
4601 }
4602 value = expand_shift (LSHIFT_EXPR, str_mode, value, bitpos, NULL_RTX, 1);
4603 result = expand_binop (str_mode, binop, str_rtx,
4604 value, str_rtx, 1, OPTAB_WIDEN);
4605 if (result != str_rtx)
4606 emit_move_insn (str_rtx, result);
4607 return true;
4608
4609 default:
4610 break;
4611 }
4612
4613 return false;
4614 }
4615
4616 /* In the C++ memory model, consecutive bit fields in a structure are
4617 considered one memory location.
4618
4619 Given a COMPONENT_REF EXP at position (BITPOS, OFFSET), this function
4620 returns the bit range of consecutive bits in which this COMPONENT_REF
4621 belongs. The values are returned in *BITSTART and *BITEND. *BITPOS
4622 and *OFFSET may be adjusted in the process.
4623
4624 If the access does not need to be restricted, 0 is returned in both
4625 *BITSTART and *BITEND. */
4626
4627 static void
4628 get_bit_range (unsigned HOST_WIDE_INT *bitstart,
4629 unsigned HOST_WIDE_INT *bitend,
4630 tree exp,
4631 HOST_WIDE_INT *bitpos,
4632 tree *offset)
4633 {
4634 HOST_WIDE_INT bitoffset;
4635 tree field, repr;
4636
4637 gcc_assert (TREE_CODE (exp) == COMPONENT_REF);
4638
4639 field = TREE_OPERAND (exp, 1);
4640 repr = DECL_BIT_FIELD_REPRESENTATIVE (field);
4641 /* If we do not have a DECL_BIT_FIELD_REPRESENTATIVE there is no
4642 need to limit the range we can access. */
4643 if (!repr)
4644 {
4645 *bitstart = *bitend = 0;
4646 return;
4647 }
4648
4649 /* If we have a DECL_BIT_FIELD_REPRESENTATIVE but the enclosing record is
4650 part of a larger bit field, then the representative does not serve any
4651 useful purpose. This can occur in Ada. */
4652 if (handled_component_p (TREE_OPERAND (exp, 0)))
4653 {
4654 enum machine_mode rmode;
4655 HOST_WIDE_INT rbitsize, rbitpos;
4656 tree roffset;
4657 int unsignedp;
4658 int volatilep = 0;
4659 get_inner_reference (TREE_OPERAND (exp, 0), &rbitsize, &rbitpos,
4660 &roffset, &rmode, &unsignedp, &volatilep, false);
4661 if ((rbitpos % BITS_PER_UNIT) != 0)
4662 {
4663 *bitstart = *bitend = 0;
4664 return;
4665 }
4666 }
4667
4668 /* Compute the adjustment to bitpos from the offset of the field
4669 relative to the representative. DECL_FIELD_OFFSET of field and
4670 repr are the same by construction if they are not constants,
4671 see finish_bitfield_layout. */
4672 if (tree_fits_uhwi_p (DECL_FIELD_OFFSET (field))
4673 && tree_fits_uhwi_p (DECL_FIELD_OFFSET (repr)))
4674 bitoffset = (tree_to_uhwi (DECL_FIELD_OFFSET (field))
4675 - tree_to_uhwi (DECL_FIELD_OFFSET (repr))) * BITS_PER_UNIT;
4676 else
4677 bitoffset = 0;
4678 bitoffset += (tree_to_uhwi (DECL_FIELD_BIT_OFFSET (field))
4679 - tree_to_uhwi (DECL_FIELD_BIT_OFFSET (repr)));
4680
4681 /* If the adjustment is larger than bitpos, we would have a negative bit
4682 position for the lower bound and this may wreak havoc later. Adjust
4683 offset and bitpos to make the lower bound non-negative in that case. */
4684 if (bitoffset > *bitpos)
4685 {
4686 HOST_WIDE_INT adjust = bitoffset - *bitpos;
4687 gcc_assert ((adjust % BITS_PER_UNIT) == 0);
4688
4689 *bitpos += adjust;
4690 if (*offset == NULL_TREE)
4691 *offset = size_int (-adjust / BITS_PER_UNIT);
4692 else
4693 *offset
4694 = size_binop (MINUS_EXPR, *offset, size_int (adjust / BITS_PER_UNIT));
4695 *bitstart = 0;
4696 }
4697 else
4698 *bitstart = *bitpos - bitoffset;
4699
4700 *bitend = *bitstart + tree_to_uhwi (DECL_SIZE (repr)) - 1;
4701 }
4702
4703 /* Returns true if ADDR is an ADDR_EXPR of a DECL that does not reside
4704 in memory and has non-BLKmode. DECL_RTL must not be a MEM; if
4705 DECL_RTL was not set yet, return NORTL. */
4706
4707 static inline bool
4708 addr_expr_of_non_mem_decl_p_1 (tree addr, bool nortl)
4709 {
4710 if (TREE_CODE (addr) != ADDR_EXPR)
4711 return false;
4712
4713 tree base = TREE_OPERAND (addr, 0);
4714
4715 if (!DECL_P (base)
4716 || TREE_ADDRESSABLE (base)
4717 || DECL_MODE (base) == BLKmode)
4718 return false;
4719
4720 if (!DECL_RTL_SET_P (base))
4721 return nortl;
4722
4723 return (!MEM_P (DECL_RTL (base)));
4724 }
4725
4726 /* Returns true if the MEM_REF REF refers to an object that does not
4727 reside in memory and has non-BLKmode. */
4728
4729 static inline bool
4730 mem_ref_refers_to_non_mem_p (tree ref)
4731 {
4732 tree base = TREE_OPERAND (ref, 0);
4733 return addr_expr_of_non_mem_decl_p_1 (base, false);
4734 }
4735
4736 /* Expand an assignment that stores the value of FROM into TO. If NONTEMPORAL
4737 is true, try generating a nontemporal store. */
4738
4739 void
4740 expand_assignment (tree to, tree from, bool nontemporal)
4741 {
4742 rtx to_rtx = 0;
4743 rtx result;
4744 enum machine_mode mode;
4745 unsigned int align;
4746 enum insn_code icode;
4747
4748 /* Don't crash if the lhs of the assignment was erroneous. */
4749 if (TREE_CODE (to) == ERROR_MARK)
4750 {
4751 expand_normal (from);
4752 return;
4753 }
4754
4755 /* Optimize away no-op moves without side-effects. */
4756 if (operand_equal_p (to, from, 0))
4757 return;
4758
4759 /* Handle misaligned stores. */
4760 mode = TYPE_MODE (TREE_TYPE (to));
4761 if ((TREE_CODE (to) == MEM_REF
4762 || TREE_CODE (to) == TARGET_MEM_REF)
4763 && mode != BLKmode
4764 && !mem_ref_refers_to_non_mem_p (to)
4765 && ((align = get_object_alignment (to))
4766 < GET_MODE_ALIGNMENT (mode))
4767 && (((icode = optab_handler (movmisalign_optab, mode))
4768 != CODE_FOR_nothing)
4769 || SLOW_UNALIGNED_ACCESS (mode, align)))
4770 {
4771 rtx reg, mem;
4772
4773 reg = expand_expr (from, NULL_RTX, VOIDmode, EXPAND_NORMAL);
4774 reg = force_not_mem (reg);
4775 mem = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
4776
4777 if (icode != CODE_FOR_nothing)
4778 {
4779 struct expand_operand ops[2];
4780
4781 create_fixed_operand (&ops[0], mem);
4782 create_input_operand (&ops[1], reg, mode);
4783 /* The movmisalign<mode> pattern cannot fail, else the assignment
4784 would silently be omitted. */
4785 expand_insn (icode, 2, ops);
4786 }
4787 else
4788 store_bit_field (mem, GET_MODE_BITSIZE (mode), 0, 0, 0, mode, reg);
4789 return;
4790 }
4791
4792 /* Assignment of a structure component needs special treatment
4793 if the structure component's rtx is not simply a MEM.
4794 Assignment of an array element at a constant index, and assignment of
4795 an array element in an unaligned packed structure field, has the same
4796 problem. Same for (partially) storing into a non-memory object. */
4797 if (handled_component_p (to)
4798 || (TREE_CODE (to) == MEM_REF
4799 && mem_ref_refers_to_non_mem_p (to))
4800 || TREE_CODE (TREE_TYPE (to)) == ARRAY_TYPE)
4801 {
4802 enum machine_mode mode1;
4803 HOST_WIDE_INT bitsize, bitpos;
4804 unsigned HOST_WIDE_INT bitregion_start = 0;
4805 unsigned HOST_WIDE_INT bitregion_end = 0;
4806 tree offset;
4807 int unsignedp;
4808 int volatilep = 0;
4809 tree tem;
4810
4811 push_temp_slots ();
4812 tem = get_inner_reference (to, &bitsize, &bitpos, &offset, &mode1,
4813 &unsignedp, &volatilep, true);
4814
4815 /* Make sure bitpos is not negative, it can wreak havoc later. */
4816 if (bitpos < 0)
4817 {
4818 gcc_assert (offset == NULL_TREE);
4819 offset = size_int (bitpos >> (BITS_PER_UNIT == 8
4820 ? 3 : exact_log2 (BITS_PER_UNIT)));
4821 bitpos &= BITS_PER_UNIT - 1;
4822 }
4823
4824 if (TREE_CODE (to) == COMPONENT_REF
4825 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (to, 1)))
4826 get_bit_range (&bitregion_start, &bitregion_end, to, &bitpos, &offset);
4827
4828 to_rtx = expand_expr (tem, NULL_RTX, VOIDmode, EXPAND_WRITE);
4829
4830 /* If the bitfield is volatile, we want to access it in the
4831 field's mode, not the computed mode.
4832 If a MEM has VOIDmode (external with incomplete type),
4833 use BLKmode for it instead. */
4834 if (MEM_P (to_rtx))
4835 {
4836 if (volatilep && flag_strict_volatile_bitfields > 0)
4837 to_rtx = adjust_address (to_rtx, mode1, 0);
4838 else if (GET_MODE (to_rtx) == VOIDmode)
4839 to_rtx = adjust_address (to_rtx, BLKmode, 0);
4840 }
4841
4842 if (offset != 0)
4843 {
4844 enum machine_mode address_mode;
4845 rtx offset_rtx;
4846
4847 if (!MEM_P (to_rtx))
4848 {
4849 /* We can get constant negative offsets into arrays with broken
4850 user code. Translate this to a trap instead of ICEing. */
4851 gcc_assert (TREE_CODE (offset) == INTEGER_CST);
4852 expand_builtin_trap ();
4853 to_rtx = gen_rtx_MEM (BLKmode, const0_rtx);
4854 }
4855
4856 offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode, EXPAND_SUM);
4857 address_mode = get_address_mode (to_rtx);
4858 if (GET_MODE (offset_rtx) != address_mode)
4859 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
4860
4861 /* A constant address in TO_RTX can have VOIDmode, we must not try
4862 to call force_reg for that case. Avoid that case. */
4863 if (MEM_P (to_rtx)
4864 && GET_MODE (to_rtx) == BLKmode
4865 && GET_MODE (XEXP (to_rtx, 0)) != VOIDmode
4866 && bitsize > 0
4867 && (bitpos % bitsize) == 0
4868 && (bitsize % GET_MODE_ALIGNMENT (mode1)) == 0
4869 && MEM_ALIGN (to_rtx) == GET_MODE_ALIGNMENT (mode1))
4870 {
4871 to_rtx = adjust_address (to_rtx, mode1, bitpos / BITS_PER_UNIT);
4872 bitpos = 0;
4873 }
4874
4875 to_rtx = offset_address (to_rtx, offset_rtx,
4876 highest_pow2_factor_for_target (to,
4877 offset));
4878 }
4879
4880 /* No action is needed if the target is not a memory and the field
4881 lies completely outside that target. This can occur if the source
4882 code contains an out-of-bounds access to a small array. */
4883 if (!MEM_P (to_rtx)
4884 && GET_MODE (to_rtx) != BLKmode
4885 && (unsigned HOST_WIDE_INT) bitpos
4886 >= GET_MODE_PRECISION (GET_MODE (to_rtx)))
4887 {
4888 expand_normal (from);
4889 result = NULL;
4890 }
4891 /* Handle expand_expr of a complex value returning a CONCAT. */
4892 else if (GET_CODE (to_rtx) == CONCAT)
4893 {
4894 unsigned short mode_bitsize = GET_MODE_BITSIZE (GET_MODE (to_rtx));
4895 if (COMPLEX_MODE_P (TYPE_MODE (TREE_TYPE (from)))
4896 && bitpos == 0
4897 && bitsize == mode_bitsize)
4898 result = store_expr (from, to_rtx, false, nontemporal);
4899 else if (bitsize == mode_bitsize / 2
4900 && (bitpos == 0 || bitpos == mode_bitsize / 2))
4901 result = store_expr (from, XEXP (to_rtx, bitpos != 0), false,
4902 nontemporal);
4903 else if (bitpos + bitsize <= mode_bitsize / 2)
4904 result = store_field (XEXP (to_rtx, 0), bitsize, bitpos,
4905 bitregion_start, bitregion_end,
4906 mode1, from,
4907 get_alias_set (to), nontemporal);
4908 else if (bitpos >= mode_bitsize / 2)
4909 result = store_field (XEXP (to_rtx, 1), bitsize,
4910 bitpos - mode_bitsize / 2,
4911 bitregion_start, bitregion_end,
4912 mode1, from,
4913 get_alias_set (to), nontemporal);
4914 else if (bitpos == 0 && bitsize == mode_bitsize)
4915 {
4916 rtx from_rtx;
4917 result = expand_normal (from);
4918 from_rtx = simplify_gen_subreg (GET_MODE (to_rtx), result,
4919 TYPE_MODE (TREE_TYPE (from)), 0);
4920 emit_move_insn (XEXP (to_rtx, 0),
4921 read_complex_part (from_rtx, false));
4922 emit_move_insn (XEXP (to_rtx, 1),
4923 read_complex_part (from_rtx, true));
4924 }
4925 else
4926 {
4927 rtx temp = assign_stack_temp (GET_MODE (to_rtx),
4928 GET_MODE_SIZE (GET_MODE (to_rtx)));
4929 write_complex_part (temp, XEXP (to_rtx, 0), false);
4930 write_complex_part (temp, XEXP (to_rtx, 1), true);
4931 result = store_field (temp, bitsize, bitpos,
4932 bitregion_start, bitregion_end,
4933 mode1, from,
4934 get_alias_set (to), nontemporal);
4935 emit_move_insn (XEXP (to_rtx, 0), read_complex_part (temp, false));
4936 emit_move_insn (XEXP (to_rtx, 1), read_complex_part (temp, true));
4937 }
4938 }
4939 else
4940 {
4941 if (MEM_P (to_rtx))
4942 {
4943 /* If the field is at offset zero, we could have been given the
4944 DECL_RTX of the parent struct. Don't munge it. */
4945 to_rtx = shallow_copy_rtx (to_rtx);
4946 set_mem_attributes_minus_bitpos (to_rtx, to, 0, bitpos);
4947 if (volatilep)
4948 MEM_VOLATILE_P (to_rtx) = 1;
4949 }
4950
4951 if (optimize_bitfield_assignment_op (bitsize, bitpos,
4952 bitregion_start, bitregion_end,
4953 mode1,
4954 to_rtx, to, from))
4955 result = NULL;
4956 else
4957 result = store_field (to_rtx, bitsize, bitpos,
4958 bitregion_start, bitregion_end,
4959 mode1, from,
4960 get_alias_set (to), nontemporal);
4961 }
4962
4963 if (result)
4964 preserve_temp_slots (result);
4965 pop_temp_slots ();
4966 return;
4967 }
4968
4969 /* If the rhs is a function call and its value is not an aggregate,
4970 call the function before we start to compute the lhs.
4971 This is needed for correct code for cases such as
4972 val = setjmp (buf) on machines where reference to val
4973 requires loading up part of an address in a separate insn.
4974
4975 Don't do this if TO is a VAR_DECL or PARM_DECL whose DECL_RTL is REG
4976 since it might be a promoted variable where the zero- or sign- extension
4977 needs to be done. Handling this in the normal way is safe because no
4978 computation is done before the call. The same is true for SSA names. */
4979 if (TREE_CODE (from) == CALL_EXPR && ! aggregate_value_p (from, from)
4980 && COMPLETE_TYPE_P (TREE_TYPE (from))
4981 && TREE_CODE (TYPE_SIZE (TREE_TYPE (from))) == INTEGER_CST
4982 && ! (((TREE_CODE (to) == VAR_DECL
4983 || TREE_CODE (to) == PARM_DECL
4984 || TREE_CODE (to) == RESULT_DECL)
4985 && REG_P (DECL_RTL (to)))
4986 || TREE_CODE (to) == SSA_NAME))
4987 {
4988 rtx value;
4989
4990 push_temp_slots ();
4991 value = expand_normal (from);
4992 if (to_rtx == 0)
4993 to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
4994
4995 /* Handle calls that return values in multiple non-contiguous locations.
4996 The Irix 6 ABI has examples of this. */
4997 if (GET_CODE (to_rtx) == PARALLEL)
4998 {
4999 if (GET_CODE (value) == PARALLEL)
5000 emit_group_move (to_rtx, value);
5001 else
5002 emit_group_load (to_rtx, value, TREE_TYPE (from),
5003 int_size_in_bytes (TREE_TYPE (from)));
5004 }
5005 else if (GET_CODE (value) == PARALLEL)
5006 emit_group_store (to_rtx, value, TREE_TYPE (from),
5007 int_size_in_bytes (TREE_TYPE (from)));
5008 else if (GET_MODE (to_rtx) == BLKmode)
5009 {
5010 /* Handle calls that return BLKmode values in registers. */
5011 if (REG_P (value))
5012 copy_blkmode_from_reg (to_rtx, value, TREE_TYPE (from));
5013 else
5014 emit_block_move (to_rtx, value, expr_size (from), BLOCK_OP_NORMAL);
5015 }
5016 else
5017 {
5018 if (POINTER_TYPE_P (TREE_TYPE (to)))
5019 value = convert_memory_address_addr_space
5020 (GET_MODE (to_rtx), value,
5021 TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (to))));
5022
5023 emit_move_insn (to_rtx, value);
5024 }
5025 preserve_temp_slots (to_rtx);
5026 pop_temp_slots ();
5027 return;
5028 }
5029
5030 /* Ordinary treatment. Expand TO to get a REG or MEM rtx. */
5031 to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
5032
5033 /* Don't move directly into a return register. */
5034 if (TREE_CODE (to) == RESULT_DECL
5035 && (REG_P (to_rtx) || GET_CODE (to_rtx) == PARALLEL))
5036 {
5037 rtx temp;
5038
5039 push_temp_slots ();
5040
5041 /* If the source is itself a return value, it still is in a pseudo at
5042 this point so we can move it back to the return register directly. */
5043 if (REG_P (to_rtx)
5044 && TYPE_MODE (TREE_TYPE (from)) == BLKmode
5045 && TREE_CODE (from) != CALL_EXPR)
5046 temp = copy_blkmode_to_reg (GET_MODE (to_rtx), from);
5047 else
5048 temp = expand_expr (from, NULL_RTX, GET_MODE (to_rtx), EXPAND_NORMAL);
5049
5050 /* Handle calls that return values in multiple non-contiguous locations.
5051 The Irix 6 ABI has examples of this. */
5052 if (GET_CODE (to_rtx) == PARALLEL)
5053 {
5054 if (GET_CODE (temp) == PARALLEL)
5055 emit_group_move (to_rtx, temp);
5056 else
5057 emit_group_load (to_rtx, temp, TREE_TYPE (from),
5058 int_size_in_bytes (TREE_TYPE (from)));
5059 }
5060 else if (temp)
5061 emit_move_insn (to_rtx, temp);
5062
5063 preserve_temp_slots (to_rtx);
5064 pop_temp_slots ();
5065 return;
5066 }
5067
5068 /* In case we are returning the contents of an object which overlaps
5069 the place the value is being stored, use a safe function when copying
5070 a value through a pointer into a structure value return block. */
5071 if (TREE_CODE (to) == RESULT_DECL
5072 && TREE_CODE (from) == INDIRECT_REF
5073 && ADDR_SPACE_GENERIC_P
5074 (TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (from, 0)))))
5075 && refs_may_alias_p (to, from)
5076 && cfun->returns_struct
5077 && !cfun->returns_pcc_struct)
5078 {
5079 rtx from_rtx, size;
5080
5081 push_temp_slots ();
5082 size = expr_size (from);
5083 from_rtx = expand_normal (from);
5084
5085 emit_library_call (memmove_libfunc, LCT_NORMAL,
5086 VOIDmode, 3, XEXP (to_rtx, 0), Pmode,
5087 XEXP (from_rtx, 0), Pmode,
5088 convert_to_mode (TYPE_MODE (sizetype),
5089 size, TYPE_UNSIGNED (sizetype)),
5090 TYPE_MODE (sizetype));
5091
5092 preserve_temp_slots (to_rtx);
5093 pop_temp_slots ();
5094 return;
5095 }
5096
5097 /* Compute FROM and store the value in the rtx we got. */
5098
5099 push_temp_slots ();
5100 result = store_expr (from, to_rtx, 0, nontemporal);
5101 preserve_temp_slots (result);
5102 pop_temp_slots ();
5103 return;
5104 }
5105
5106 /* Emits nontemporal store insn that moves FROM to TO. Returns true if this
5107 succeeded, false otherwise. */
5108
5109 bool
5110 emit_storent_insn (rtx to, rtx from)
5111 {
5112 struct expand_operand ops[2];
5113 enum machine_mode mode = GET_MODE (to);
5114 enum insn_code code = optab_handler (storent_optab, mode);
5115
5116 if (code == CODE_FOR_nothing)
5117 return false;
5118
5119 create_fixed_operand (&ops[0], to);
5120 create_input_operand (&ops[1], from, mode);
5121 return maybe_expand_insn (code, 2, ops);
5122 }
5123
5124 /* Generate code for computing expression EXP,
5125 and storing the value into TARGET.
5126
5127 If the mode is BLKmode then we may return TARGET itself.
5128 It turns out that in BLKmode it doesn't cause a problem.
5129 because C has no operators that could combine two different
5130 assignments into the same BLKmode object with different values
5131 with no sequence point. Will other languages need this to
5132 be more thorough?
5133
5134 If CALL_PARAM_P is nonzero, this is a store into a call param on the
5135 stack, and block moves may need to be treated specially.
5136
5137 If NONTEMPORAL is true, try using a nontemporal store instruction. */
5138
5139 rtx
5140 store_expr (tree exp, rtx target, int call_param_p, bool nontemporal)
5141 {
5142 rtx temp;
5143 rtx alt_rtl = NULL_RTX;
5144 location_t loc = curr_insn_location ();
5145
5146 if (VOID_TYPE_P (TREE_TYPE (exp)))
5147 {
5148 /* C++ can generate ?: expressions with a throw expression in one
5149 branch and an rvalue in the other. Here, we resolve attempts to
5150 store the throw expression's nonexistent result. */
5151 gcc_assert (!call_param_p);
5152 expand_expr (exp, const0_rtx, VOIDmode, EXPAND_NORMAL);
5153 return NULL_RTX;
5154 }
5155 if (TREE_CODE (exp) == COMPOUND_EXPR)
5156 {
5157 /* Perform first part of compound expression, then assign from second
5158 part. */
5159 expand_expr (TREE_OPERAND (exp, 0), const0_rtx, VOIDmode,
5160 call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL);
5161 return store_expr (TREE_OPERAND (exp, 1), target, call_param_p,
5162 nontemporal);
5163 }
5164 else if (TREE_CODE (exp) == COND_EXPR && GET_MODE (target) == BLKmode)
5165 {
5166 /* For conditional expression, get safe form of the target. Then
5167 test the condition, doing the appropriate assignment on either
5168 side. This avoids the creation of unnecessary temporaries.
5169 For non-BLKmode, it is more efficient not to do this. */
5170
5171 rtx lab1 = gen_label_rtx (), lab2 = gen_label_rtx ();
5172
5173 do_pending_stack_adjust ();
5174 NO_DEFER_POP;
5175 jumpifnot (TREE_OPERAND (exp, 0), lab1, -1);
5176 store_expr (TREE_OPERAND (exp, 1), target, call_param_p,
5177 nontemporal);
5178 emit_jump_insn (gen_jump (lab2));
5179 emit_barrier ();
5180 emit_label (lab1);
5181 store_expr (TREE_OPERAND (exp, 2), target, call_param_p,
5182 nontemporal);
5183 emit_label (lab2);
5184 OK_DEFER_POP;
5185
5186 return NULL_RTX;
5187 }
5188 else if (GET_CODE (target) == SUBREG && SUBREG_PROMOTED_VAR_P (target))
5189 /* If this is a scalar in a register that is stored in a wider mode
5190 than the declared mode, compute the result into its declared mode
5191 and then convert to the wider mode. Our value is the computed
5192 expression. */
5193 {
5194 rtx inner_target = 0;
5195
5196 /* We can do the conversion inside EXP, which will often result
5197 in some optimizations. Do the conversion in two steps: first
5198 change the signedness, if needed, then the extend. But don't
5199 do this if the type of EXP is a subtype of something else
5200 since then the conversion might involve more than just
5201 converting modes. */
5202 if (INTEGRAL_TYPE_P (TREE_TYPE (exp))
5203 && TREE_TYPE (TREE_TYPE (exp)) == 0
5204 && GET_MODE_PRECISION (GET_MODE (target))
5205 == TYPE_PRECISION (TREE_TYPE (exp)))
5206 {
5207 if (TYPE_UNSIGNED (TREE_TYPE (exp))
5208 != SUBREG_PROMOTED_UNSIGNED_P (target))
5209 {
5210 /* Some types, e.g. Fortran's logical*4, won't have a signed
5211 version, so use the mode instead. */
5212 tree ntype
5213 = (signed_or_unsigned_type_for
5214 (SUBREG_PROMOTED_UNSIGNED_P (target), TREE_TYPE (exp)));
5215 if (ntype == NULL)
5216 ntype = lang_hooks.types.type_for_mode
5217 (TYPE_MODE (TREE_TYPE (exp)),
5218 SUBREG_PROMOTED_UNSIGNED_P (target));
5219
5220 exp = fold_convert_loc (loc, ntype, exp);
5221 }
5222
5223 exp = fold_convert_loc (loc, lang_hooks.types.type_for_mode
5224 (GET_MODE (SUBREG_REG (target)),
5225 SUBREG_PROMOTED_UNSIGNED_P (target)),
5226 exp);
5227
5228 inner_target = SUBREG_REG (target);
5229 }
5230
5231 temp = expand_expr (exp, inner_target, VOIDmode,
5232 call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL);
5233
5234 /* If TEMP is a VOIDmode constant, use convert_modes to make
5235 sure that we properly convert it. */
5236 if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode)
5237 {
5238 temp = convert_modes (GET_MODE (target), TYPE_MODE (TREE_TYPE (exp)),
5239 temp, SUBREG_PROMOTED_UNSIGNED_P (target));
5240 temp = convert_modes (GET_MODE (SUBREG_REG (target)),
5241 GET_MODE (target), temp,
5242 SUBREG_PROMOTED_UNSIGNED_P (target));
5243 }
5244
5245 convert_move (SUBREG_REG (target), temp,
5246 SUBREG_PROMOTED_UNSIGNED_P (target));
5247
5248 return NULL_RTX;
5249 }
5250 else if ((TREE_CODE (exp) == STRING_CST
5251 || (TREE_CODE (exp) == MEM_REF
5252 && TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR
5253 && TREE_CODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0))
5254 == STRING_CST
5255 && integer_zerop (TREE_OPERAND (exp, 1))))
5256 && !nontemporal && !call_param_p
5257 && MEM_P (target))
5258 {
5259 /* Optimize initialization of an array with a STRING_CST. */
5260 HOST_WIDE_INT exp_len, str_copy_len;
5261 rtx dest_mem;
5262 tree str = TREE_CODE (exp) == STRING_CST
5263 ? exp : TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
5264
5265 exp_len = int_expr_size (exp);
5266 if (exp_len <= 0)
5267 goto normal_expr;
5268
5269 if (TREE_STRING_LENGTH (str) <= 0)
5270 goto normal_expr;
5271
5272 str_copy_len = strlen (TREE_STRING_POINTER (str));
5273 if (str_copy_len < TREE_STRING_LENGTH (str) - 1)
5274 goto normal_expr;
5275
5276 str_copy_len = TREE_STRING_LENGTH (str);
5277 if ((STORE_MAX_PIECES & (STORE_MAX_PIECES - 1)) == 0
5278 && TREE_STRING_POINTER (str)[TREE_STRING_LENGTH (str) - 1] == '\0')
5279 {
5280 str_copy_len += STORE_MAX_PIECES - 1;
5281 str_copy_len &= ~(STORE_MAX_PIECES - 1);
5282 }
5283 str_copy_len = MIN (str_copy_len, exp_len);
5284 if (!can_store_by_pieces (str_copy_len, builtin_strncpy_read_str,
5285 CONST_CAST (char *, TREE_STRING_POINTER (str)),
5286 MEM_ALIGN (target), false))
5287 goto normal_expr;
5288
5289 dest_mem = target;
5290
5291 dest_mem = store_by_pieces (dest_mem,
5292 str_copy_len, builtin_strncpy_read_str,
5293 CONST_CAST (char *,
5294 TREE_STRING_POINTER (str)),
5295 MEM_ALIGN (target), false,
5296 exp_len > str_copy_len ? 1 : 0);
5297 if (exp_len > str_copy_len)
5298 clear_storage (adjust_address (dest_mem, BLKmode, 0),
5299 GEN_INT (exp_len - str_copy_len),
5300 BLOCK_OP_NORMAL);
5301 return NULL_RTX;
5302 }
5303 else
5304 {
5305 rtx tmp_target;
5306
5307 normal_expr:
5308 /* If we want to use a nontemporal store, force the value to
5309 register first. */
5310 tmp_target = nontemporal ? NULL_RTX : target;
5311 temp = expand_expr_real (exp, tmp_target, GET_MODE (target),
5312 (call_param_p
5313 ? EXPAND_STACK_PARM : EXPAND_NORMAL),
5314 &alt_rtl);
5315 }
5316
5317 /* If TEMP is a VOIDmode constant and the mode of the type of EXP is not
5318 the same as that of TARGET, adjust the constant. This is needed, for
5319 example, in case it is a CONST_DOUBLE and we want only a word-sized
5320 value. */
5321 if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode
5322 && TREE_CODE (exp) != ERROR_MARK
5323 && GET_MODE (target) != TYPE_MODE (TREE_TYPE (exp)))
5324 temp = convert_modes (GET_MODE (target), TYPE_MODE (TREE_TYPE (exp)),
5325 temp, TYPE_UNSIGNED (TREE_TYPE (exp)));
5326
5327 /* If value was not generated in the target, store it there.
5328 Convert the value to TARGET's type first if necessary and emit the
5329 pending incrementations that have been queued when expanding EXP.
5330 Note that we cannot emit the whole queue blindly because this will
5331 effectively disable the POST_INC optimization later.
5332
5333 If TEMP and TARGET compare equal according to rtx_equal_p, but
5334 one or both of them are volatile memory refs, we have to distinguish
5335 two cases:
5336 - expand_expr has used TARGET. In this case, we must not generate
5337 another copy. This can be detected by TARGET being equal according
5338 to == .
5339 - expand_expr has not used TARGET - that means that the source just
5340 happens to have the same RTX form. Since temp will have been created
5341 by expand_expr, it will compare unequal according to == .
5342 We must generate a copy in this case, to reach the correct number
5343 of volatile memory references. */
5344
5345 if ((! rtx_equal_p (temp, target)
5346 || (temp != target && (side_effects_p (temp)
5347 || side_effects_p (target))))
5348 && TREE_CODE (exp) != ERROR_MARK
5349 /* If store_expr stores a DECL whose DECL_RTL(exp) == TARGET,
5350 but TARGET is not valid memory reference, TEMP will differ
5351 from TARGET although it is really the same location. */
5352 && !(alt_rtl
5353 && rtx_equal_p (alt_rtl, target)
5354 && !side_effects_p (alt_rtl)
5355 && !side_effects_p (target))
5356 /* If there's nothing to copy, don't bother. Don't call
5357 expr_size unless necessary, because some front-ends (C++)
5358 expr_size-hook must not be given objects that are not
5359 supposed to be bit-copied or bit-initialized. */
5360 && expr_size (exp) != const0_rtx)
5361 {
5362 if (GET_MODE (temp) != GET_MODE (target) && GET_MODE (temp) != VOIDmode)
5363 {
5364 if (GET_MODE (target) == BLKmode)
5365 {
5366 /* Handle calls that return BLKmode values in registers. */
5367 if (REG_P (temp) && TREE_CODE (exp) == CALL_EXPR)
5368 copy_blkmode_from_reg (target, temp, TREE_TYPE (exp));
5369 else
5370 store_bit_field (target,
5371 INTVAL (expr_size (exp)) * BITS_PER_UNIT,
5372 0, 0, 0, GET_MODE (temp), temp);
5373 }
5374 else
5375 convert_move (target, temp, TYPE_UNSIGNED (TREE_TYPE (exp)));
5376 }
5377
5378 else if (GET_MODE (temp) == BLKmode && TREE_CODE (exp) == STRING_CST)
5379 {
5380 /* Handle copying a string constant into an array. The string
5381 constant may be shorter than the array. So copy just the string's
5382 actual length, and clear the rest. First get the size of the data
5383 type of the string, which is actually the size of the target. */
5384 rtx size = expr_size (exp);
5385
5386 if (CONST_INT_P (size)
5387 && INTVAL (size) < TREE_STRING_LENGTH (exp))
5388 emit_block_move (target, temp, size,
5389 (call_param_p
5390 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5391 else
5392 {
5393 enum machine_mode pointer_mode
5394 = targetm.addr_space.pointer_mode (MEM_ADDR_SPACE (target));
5395 enum machine_mode address_mode = get_address_mode (target);
5396
5397 /* Compute the size of the data to copy from the string. */
5398 tree copy_size
5399 = size_binop_loc (loc, MIN_EXPR,
5400 make_tree (sizetype, size),
5401 size_int (TREE_STRING_LENGTH (exp)));
5402 rtx copy_size_rtx
5403 = expand_expr (copy_size, NULL_RTX, VOIDmode,
5404 (call_param_p
5405 ? EXPAND_STACK_PARM : EXPAND_NORMAL));
5406 rtx label = 0;
5407
5408 /* Copy that much. */
5409 copy_size_rtx = convert_to_mode (pointer_mode, copy_size_rtx,
5410 TYPE_UNSIGNED (sizetype));
5411 emit_block_move (target, temp, copy_size_rtx,
5412 (call_param_p
5413 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5414
5415 /* Figure out how much is left in TARGET that we have to clear.
5416 Do all calculations in pointer_mode. */
5417 if (CONST_INT_P (copy_size_rtx))
5418 {
5419 size = plus_constant (address_mode, size,
5420 -INTVAL (copy_size_rtx));
5421 target = adjust_address (target, BLKmode,
5422 INTVAL (copy_size_rtx));
5423 }
5424 else
5425 {
5426 size = expand_binop (TYPE_MODE (sizetype), sub_optab, size,
5427 copy_size_rtx, NULL_RTX, 0,
5428 OPTAB_LIB_WIDEN);
5429
5430 if (GET_MODE (copy_size_rtx) != address_mode)
5431 copy_size_rtx = convert_to_mode (address_mode,
5432 copy_size_rtx,
5433 TYPE_UNSIGNED (sizetype));
5434
5435 target = offset_address (target, copy_size_rtx,
5436 highest_pow2_factor (copy_size));
5437 label = gen_label_rtx ();
5438 emit_cmp_and_jump_insns (size, const0_rtx, LT, NULL_RTX,
5439 GET_MODE (size), 0, label);
5440 }
5441
5442 if (size != const0_rtx)
5443 clear_storage (target, size, BLOCK_OP_NORMAL);
5444
5445 if (label)
5446 emit_label (label);
5447 }
5448 }
5449 /* Handle calls that return values in multiple non-contiguous locations.
5450 The Irix 6 ABI has examples of this. */
5451 else if (GET_CODE (target) == PARALLEL)
5452 {
5453 if (GET_CODE (temp) == PARALLEL)
5454 emit_group_move (target, temp);
5455 else
5456 emit_group_load (target, temp, TREE_TYPE (exp),
5457 int_size_in_bytes (TREE_TYPE (exp)));
5458 }
5459 else if (GET_CODE (temp) == PARALLEL)
5460 emit_group_store (target, temp, TREE_TYPE (exp),
5461 int_size_in_bytes (TREE_TYPE (exp)));
5462 else if (GET_MODE (temp) == BLKmode)
5463 emit_block_move (target, temp, expr_size (exp),
5464 (call_param_p
5465 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5466 /* If we emit a nontemporal store, there is nothing else to do. */
5467 else if (nontemporal && emit_storent_insn (target, temp))
5468 ;
5469 else
5470 {
5471 temp = force_operand (temp, target);
5472 if (temp != target)
5473 emit_move_insn (target, temp);
5474 }
5475 }
5476
5477 return NULL_RTX;
5478 }
5479 \f
5480 /* Return true if field F of structure TYPE is a flexible array. */
5481
5482 static bool
5483 flexible_array_member_p (const_tree f, const_tree type)
5484 {
5485 const_tree tf;
5486
5487 tf = TREE_TYPE (f);
5488 return (DECL_CHAIN (f) == NULL
5489 && TREE_CODE (tf) == ARRAY_TYPE
5490 && TYPE_DOMAIN (tf)
5491 && TYPE_MIN_VALUE (TYPE_DOMAIN (tf))
5492 && integer_zerop (TYPE_MIN_VALUE (TYPE_DOMAIN (tf)))
5493 && !TYPE_MAX_VALUE (TYPE_DOMAIN (tf))
5494 && int_size_in_bytes (type) >= 0);
5495 }
5496
5497 /* If FOR_CTOR_P, return the number of top-level elements that a constructor
5498 must have in order for it to completely initialize a value of type TYPE.
5499 Return -1 if the number isn't known.
5500
5501 If !FOR_CTOR_P, return an estimate of the number of scalars in TYPE. */
5502
5503 static HOST_WIDE_INT
5504 count_type_elements (const_tree type, bool for_ctor_p)
5505 {
5506 switch (TREE_CODE (type))
5507 {
5508 case ARRAY_TYPE:
5509 {
5510 tree nelts;
5511
5512 nelts = array_type_nelts (type);
5513 if (nelts && tree_fits_uhwi_p (nelts))
5514 {
5515 unsigned HOST_WIDE_INT n;
5516
5517 n = tree_to_uhwi (nelts) + 1;
5518 if (n == 0 || for_ctor_p)
5519 return n;
5520 else
5521 return n * count_type_elements (TREE_TYPE (type), false);
5522 }
5523 return for_ctor_p ? -1 : 1;
5524 }
5525
5526 case RECORD_TYPE:
5527 {
5528 unsigned HOST_WIDE_INT n;
5529 tree f;
5530
5531 n = 0;
5532 for (f = TYPE_FIELDS (type); f ; f = DECL_CHAIN (f))
5533 if (TREE_CODE (f) == FIELD_DECL)
5534 {
5535 if (!for_ctor_p)
5536 n += count_type_elements (TREE_TYPE (f), false);
5537 else if (!flexible_array_member_p (f, type))
5538 /* Don't count flexible arrays, which are not supposed
5539 to be initialized. */
5540 n += 1;
5541 }
5542
5543 return n;
5544 }
5545
5546 case UNION_TYPE:
5547 case QUAL_UNION_TYPE:
5548 {
5549 tree f;
5550 HOST_WIDE_INT n, m;
5551
5552 gcc_assert (!for_ctor_p);
5553 /* Estimate the number of scalars in each field and pick the
5554 maximum. Other estimates would do instead; the idea is simply
5555 to make sure that the estimate is not sensitive to the ordering
5556 of the fields. */
5557 n = 1;
5558 for (f = TYPE_FIELDS (type); f ; f = DECL_CHAIN (f))
5559 if (TREE_CODE (f) == FIELD_DECL)
5560 {
5561 m = count_type_elements (TREE_TYPE (f), false);
5562 /* If the field doesn't span the whole union, add an extra
5563 scalar for the rest. */
5564 if (simple_cst_equal (TYPE_SIZE (TREE_TYPE (f)),
5565 TYPE_SIZE (type)) != 1)
5566 m++;
5567 if (n < m)
5568 n = m;
5569 }
5570 return n;
5571 }
5572
5573 case COMPLEX_TYPE:
5574 return 2;
5575
5576 case VECTOR_TYPE:
5577 return TYPE_VECTOR_SUBPARTS (type);
5578
5579 case INTEGER_TYPE:
5580 case REAL_TYPE:
5581 case FIXED_POINT_TYPE:
5582 case ENUMERAL_TYPE:
5583 case BOOLEAN_TYPE:
5584 case POINTER_TYPE:
5585 case OFFSET_TYPE:
5586 case REFERENCE_TYPE:
5587 case NULLPTR_TYPE:
5588 return 1;
5589
5590 case ERROR_MARK:
5591 return 0;
5592
5593 case VOID_TYPE:
5594 case METHOD_TYPE:
5595 case FUNCTION_TYPE:
5596 case LANG_TYPE:
5597 default:
5598 gcc_unreachable ();
5599 }
5600 }
5601
5602 /* Helper for categorize_ctor_elements. Identical interface. */
5603
5604 static bool
5605 categorize_ctor_elements_1 (const_tree ctor, HOST_WIDE_INT *p_nz_elts,
5606 HOST_WIDE_INT *p_init_elts, bool *p_complete)
5607 {
5608 unsigned HOST_WIDE_INT idx;
5609 HOST_WIDE_INT nz_elts, init_elts, num_fields;
5610 tree value, purpose, elt_type;
5611
5612 /* Whether CTOR is a valid constant initializer, in accordance with what
5613 initializer_constant_valid_p does. If inferred from the constructor
5614 elements, true until proven otherwise. */
5615 bool const_from_elts_p = constructor_static_from_elts_p (ctor);
5616 bool const_p = const_from_elts_p ? true : TREE_STATIC (ctor);
5617
5618 nz_elts = 0;
5619 init_elts = 0;
5620 num_fields = 0;
5621 elt_type = NULL_TREE;
5622
5623 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (ctor), idx, purpose, value)
5624 {
5625 HOST_WIDE_INT mult = 1;
5626
5627 if (purpose && TREE_CODE (purpose) == RANGE_EXPR)
5628 {
5629 tree lo_index = TREE_OPERAND (purpose, 0);
5630 tree hi_index = TREE_OPERAND (purpose, 1);
5631
5632 if (tree_fits_uhwi_p (lo_index) && tree_fits_uhwi_p (hi_index))
5633 mult = (tree_to_uhwi (hi_index)
5634 - tree_to_uhwi (lo_index) + 1);
5635 }
5636 num_fields += mult;
5637 elt_type = TREE_TYPE (value);
5638
5639 switch (TREE_CODE (value))
5640 {
5641 case CONSTRUCTOR:
5642 {
5643 HOST_WIDE_INT nz = 0, ic = 0;
5644
5645 bool const_elt_p = categorize_ctor_elements_1 (value, &nz, &ic,
5646 p_complete);
5647
5648 nz_elts += mult * nz;
5649 init_elts += mult * ic;
5650
5651 if (const_from_elts_p && const_p)
5652 const_p = const_elt_p;
5653 }
5654 break;
5655
5656 case INTEGER_CST:
5657 case REAL_CST:
5658 case FIXED_CST:
5659 if (!initializer_zerop (value))
5660 nz_elts += mult;
5661 init_elts += mult;
5662 break;
5663
5664 case STRING_CST:
5665 nz_elts += mult * TREE_STRING_LENGTH (value);
5666 init_elts += mult * TREE_STRING_LENGTH (value);
5667 break;
5668
5669 case COMPLEX_CST:
5670 if (!initializer_zerop (TREE_REALPART (value)))
5671 nz_elts += mult;
5672 if (!initializer_zerop (TREE_IMAGPART (value)))
5673 nz_elts += mult;
5674 init_elts += mult;
5675 break;
5676
5677 case VECTOR_CST:
5678 {
5679 unsigned i;
5680 for (i = 0; i < VECTOR_CST_NELTS (value); ++i)
5681 {
5682 tree v = VECTOR_CST_ELT (value, i);
5683 if (!initializer_zerop (v))
5684 nz_elts += mult;
5685 init_elts += mult;
5686 }
5687 }
5688 break;
5689
5690 default:
5691 {
5692 HOST_WIDE_INT tc = count_type_elements (elt_type, false);
5693 nz_elts += mult * tc;
5694 init_elts += mult * tc;
5695
5696 if (const_from_elts_p && const_p)
5697 const_p = initializer_constant_valid_p (value, elt_type)
5698 != NULL_TREE;
5699 }
5700 break;
5701 }
5702 }
5703
5704 if (*p_complete && !complete_ctor_at_level_p (TREE_TYPE (ctor),
5705 num_fields, elt_type))
5706 *p_complete = false;
5707
5708 *p_nz_elts += nz_elts;
5709 *p_init_elts += init_elts;
5710
5711 return const_p;
5712 }
5713
5714 /* Examine CTOR to discover:
5715 * how many scalar fields are set to nonzero values,
5716 and place it in *P_NZ_ELTS;
5717 * how many scalar fields in total are in CTOR,
5718 and place it in *P_ELT_COUNT.
5719 * whether the constructor is complete -- in the sense that every
5720 meaningful byte is explicitly given a value --
5721 and place it in *P_COMPLETE.
5722
5723 Return whether or not CTOR is a valid static constant initializer, the same
5724 as "initializer_constant_valid_p (CTOR, TREE_TYPE (CTOR)) != 0". */
5725
5726 bool
5727 categorize_ctor_elements (const_tree ctor, HOST_WIDE_INT *p_nz_elts,
5728 HOST_WIDE_INT *p_init_elts, bool *p_complete)
5729 {
5730 *p_nz_elts = 0;
5731 *p_init_elts = 0;
5732 *p_complete = true;
5733
5734 return categorize_ctor_elements_1 (ctor, p_nz_elts, p_init_elts, p_complete);
5735 }
5736
5737 /* TYPE is initialized by a constructor with NUM_ELTS elements, the last
5738 of which had type LAST_TYPE. Each element was itself a complete
5739 initializer, in the sense that every meaningful byte was explicitly
5740 given a value. Return true if the same is true for the constructor
5741 as a whole. */
5742
5743 bool
5744 complete_ctor_at_level_p (const_tree type, HOST_WIDE_INT num_elts,
5745 const_tree last_type)
5746 {
5747 if (TREE_CODE (type) == UNION_TYPE
5748 || TREE_CODE (type) == QUAL_UNION_TYPE)
5749 {
5750 if (num_elts == 0)
5751 return false;
5752
5753 gcc_assert (num_elts == 1 && last_type);
5754
5755 /* ??? We could look at each element of the union, and find the
5756 largest element. Which would avoid comparing the size of the
5757 initialized element against any tail padding in the union.
5758 Doesn't seem worth the effort... */
5759 return simple_cst_equal (TYPE_SIZE (type), TYPE_SIZE (last_type)) == 1;
5760 }
5761
5762 return count_type_elements (type, true) == num_elts;
5763 }
5764
5765 /* Return 1 if EXP contains mostly (3/4) zeros. */
5766
5767 static int
5768 mostly_zeros_p (const_tree exp)
5769 {
5770 if (TREE_CODE (exp) == CONSTRUCTOR)
5771 {
5772 HOST_WIDE_INT nz_elts, init_elts;
5773 bool complete_p;
5774
5775 categorize_ctor_elements (exp, &nz_elts, &init_elts, &complete_p);
5776 return !complete_p || nz_elts < init_elts / 4;
5777 }
5778
5779 return initializer_zerop (exp);
5780 }
5781
5782 /* Return 1 if EXP contains all zeros. */
5783
5784 static int
5785 all_zeros_p (const_tree exp)
5786 {
5787 if (TREE_CODE (exp) == CONSTRUCTOR)
5788 {
5789 HOST_WIDE_INT nz_elts, init_elts;
5790 bool complete_p;
5791
5792 categorize_ctor_elements (exp, &nz_elts, &init_elts, &complete_p);
5793 return nz_elts == 0;
5794 }
5795
5796 return initializer_zerop (exp);
5797 }
5798 \f
5799 /* Helper function for store_constructor.
5800 TARGET, BITSIZE, BITPOS, MODE, EXP are as for store_field.
5801 CLEARED is as for store_constructor.
5802 ALIAS_SET is the alias set to use for any stores.
5803
5804 This provides a recursive shortcut back to store_constructor when it isn't
5805 necessary to go through store_field. This is so that we can pass through
5806 the cleared field to let store_constructor know that we may not have to
5807 clear a substructure if the outer structure has already been cleared. */
5808
5809 static void
5810 store_constructor_field (rtx target, unsigned HOST_WIDE_INT bitsize,
5811 HOST_WIDE_INT bitpos, enum machine_mode mode,
5812 tree exp, int cleared, alias_set_type alias_set)
5813 {
5814 if (TREE_CODE (exp) == CONSTRUCTOR
5815 /* We can only call store_constructor recursively if the size and
5816 bit position are on a byte boundary. */
5817 && bitpos % BITS_PER_UNIT == 0
5818 && (bitsize > 0 && bitsize % BITS_PER_UNIT == 0)
5819 /* If we have a nonzero bitpos for a register target, then we just
5820 let store_field do the bitfield handling. This is unlikely to
5821 generate unnecessary clear instructions anyways. */
5822 && (bitpos == 0 || MEM_P (target)))
5823 {
5824 if (MEM_P (target))
5825 target
5826 = adjust_address (target,
5827 GET_MODE (target) == BLKmode
5828 || 0 != (bitpos
5829 % GET_MODE_ALIGNMENT (GET_MODE (target)))
5830 ? BLKmode : VOIDmode, bitpos / BITS_PER_UNIT);
5831
5832
5833 /* Update the alias set, if required. */
5834 if (MEM_P (target) && ! MEM_KEEP_ALIAS_SET_P (target)
5835 && MEM_ALIAS_SET (target) != 0)
5836 {
5837 target = copy_rtx (target);
5838 set_mem_alias_set (target, alias_set);
5839 }
5840
5841 store_constructor (exp, target, cleared, bitsize / BITS_PER_UNIT);
5842 }
5843 else
5844 store_field (target, bitsize, bitpos, 0, 0, mode, exp, alias_set, false);
5845 }
5846
5847
5848 /* Returns the number of FIELD_DECLs in TYPE. */
5849
5850 static int
5851 fields_length (const_tree type)
5852 {
5853 tree t = TYPE_FIELDS (type);
5854 int count = 0;
5855
5856 for (; t; t = DECL_CHAIN (t))
5857 if (TREE_CODE (t) == FIELD_DECL)
5858 ++count;
5859
5860 return count;
5861 }
5862
5863
5864 /* Store the value of constructor EXP into the rtx TARGET.
5865 TARGET is either a REG or a MEM; we know it cannot conflict, since
5866 safe_from_p has been called.
5867 CLEARED is true if TARGET is known to have been zero'd.
5868 SIZE is the number of bytes of TARGET we are allowed to modify: this
5869 may not be the same as the size of EXP if we are assigning to a field
5870 which has been packed to exclude padding bits. */
5871
5872 static void
5873 store_constructor (tree exp, rtx target, int cleared, HOST_WIDE_INT size)
5874 {
5875 tree type = TREE_TYPE (exp);
5876 #ifdef WORD_REGISTER_OPERATIONS
5877 HOST_WIDE_INT exp_size = int_size_in_bytes (type);
5878 #endif
5879
5880 switch (TREE_CODE (type))
5881 {
5882 case RECORD_TYPE:
5883 case UNION_TYPE:
5884 case QUAL_UNION_TYPE:
5885 {
5886 unsigned HOST_WIDE_INT idx;
5887 tree field, value;
5888
5889 /* If size is zero or the target is already cleared, do nothing. */
5890 if (size == 0 || cleared)
5891 cleared = 1;
5892 /* We either clear the aggregate or indicate the value is dead. */
5893 else if ((TREE_CODE (type) == UNION_TYPE
5894 || TREE_CODE (type) == QUAL_UNION_TYPE)
5895 && ! CONSTRUCTOR_ELTS (exp))
5896 /* If the constructor is empty, clear the union. */
5897 {
5898 clear_storage (target, expr_size (exp), BLOCK_OP_NORMAL);
5899 cleared = 1;
5900 }
5901
5902 /* If we are building a static constructor into a register,
5903 set the initial value as zero so we can fold the value into
5904 a constant. But if more than one register is involved,
5905 this probably loses. */
5906 else if (REG_P (target) && TREE_STATIC (exp)
5907 && GET_MODE_SIZE (GET_MODE (target)) <= UNITS_PER_WORD)
5908 {
5909 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
5910 cleared = 1;
5911 }
5912
5913 /* If the constructor has fewer fields than the structure or
5914 if we are initializing the structure to mostly zeros, clear
5915 the whole structure first. Don't do this if TARGET is a
5916 register whose mode size isn't equal to SIZE since
5917 clear_storage can't handle this case. */
5918 else if (size > 0
5919 && (((int)vec_safe_length (CONSTRUCTOR_ELTS (exp))
5920 != fields_length (type))
5921 || mostly_zeros_p (exp))
5922 && (!REG_P (target)
5923 || ((HOST_WIDE_INT) GET_MODE_SIZE (GET_MODE (target))
5924 == size)))
5925 {
5926 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
5927 cleared = 1;
5928 }
5929
5930 if (REG_P (target) && !cleared)
5931 emit_clobber (target);
5932
5933 /* Store each element of the constructor into the
5934 corresponding field of TARGET. */
5935 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), idx, field, value)
5936 {
5937 enum machine_mode mode;
5938 HOST_WIDE_INT bitsize;
5939 HOST_WIDE_INT bitpos = 0;
5940 tree offset;
5941 rtx to_rtx = target;
5942
5943 /* Just ignore missing fields. We cleared the whole
5944 structure, above, if any fields are missing. */
5945 if (field == 0)
5946 continue;
5947
5948 if (cleared && initializer_zerop (value))
5949 continue;
5950
5951 if (tree_fits_uhwi_p (DECL_SIZE (field)))
5952 bitsize = tree_to_uhwi (DECL_SIZE (field));
5953 else
5954 bitsize = -1;
5955
5956 mode = DECL_MODE (field);
5957 if (DECL_BIT_FIELD (field))
5958 mode = VOIDmode;
5959
5960 offset = DECL_FIELD_OFFSET (field);
5961 if (tree_fits_shwi_p (offset)
5962 && tree_fits_shwi_p (bit_position (field)))
5963 {
5964 bitpos = int_bit_position (field);
5965 offset = 0;
5966 }
5967 else
5968 bitpos = tree_to_shwi (DECL_FIELD_BIT_OFFSET (field));
5969
5970 if (offset)
5971 {
5972 enum machine_mode address_mode;
5973 rtx offset_rtx;
5974
5975 offset
5976 = SUBSTITUTE_PLACEHOLDER_IN_EXPR (offset,
5977 make_tree (TREE_TYPE (exp),
5978 target));
5979
5980 offset_rtx = expand_normal (offset);
5981 gcc_assert (MEM_P (to_rtx));
5982
5983 address_mode = get_address_mode (to_rtx);
5984 if (GET_MODE (offset_rtx) != address_mode)
5985 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
5986
5987 to_rtx = offset_address (to_rtx, offset_rtx,
5988 highest_pow2_factor (offset));
5989 }
5990
5991 #ifdef WORD_REGISTER_OPERATIONS
5992 /* If this initializes a field that is smaller than a
5993 word, at the start of a word, try to widen it to a full
5994 word. This special case allows us to output C++ member
5995 function initializations in a form that the optimizers
5996 can understand. */
5997 if (REG_P (target)
5998 && bitsize < BITS_PER_WORD
5999 && bitpos % BITS_PER_WORD == 0
6000 && GET_MODE_CLASS (mode) == MODE_INT
6001 && TREE_CODE (value) == INTEGER_CST
6002 && exp_size >= 0
6003 && bitpos + BITS_PER_WORD <= exp_size * BITS_PER_UNIT)
6004 {
6005 tree type = TREE_TYPE (value);
6006
6007 if (TYPE_PRECISION (type) < BITS_PER_WORD)
6008 {
6009 type = lang_hooks.types.type_for_mode
6010 (word_mode, TYPE_UNSIGNED (type));
6011 value = fold_convert (type, value);
6012 }
6013
6014 if (BYTES_BIG_ENDIAN)
6015 value
6016 = fold_build2 (LSHIFT_EXPR, type, value,
6017 build_int_cst (type,
6018 BITS_PER_WORD - bitsize));
6019 bitsize = BITS_PER_WORD;
6020 mode = word_mode;
6021 }
6022 #endif
6023
6024 if (MEM_P (to_rtx) && !MEM_KEEP_ALIAS_SET_P (to_rtx)
6025 && DECL_NONADDRESSABLE_P (field))
6026 {
6027 to_rtx = copy_rtx (to_rtx);
6028 MEM_KEEP_ALIAS_SET_P (to_rtx) = 1;
6029 }
6030
6031 store_constructor_field (to_rtx, bitsize, bitpos, mode,
6032 value, cleared,
6033 get_alias_set (TREE_TYPE (field)));
6034 }
6035 break;
6036 }
6037 case ARRAY_TYPE:
6038 {
6039 tree value, index;
6040 unsigned HOST_WIDE_INT i;
6041 int need_to_clear;
6042 tree domain;
6043 tree elttype = TREE_TYPE (type);
6044 int const_bounds_p;
6045 HOST_WIDE_INT minelt = 0;
6046 HOST_WIDE_INT maxelt = 0;
6047
6048 domain = TYPE_DOMAIN (type);
6049 const_bounds_p = (TYPE_MIN_VALUE (domain)
6050 && TYPE_MAX_VALUE (domain)
6051 && tree_fits_shwi_p (TYPE_MIN_VALUE (domain))
6052 && tree_fits_shwi_p (TYPE_MAX_VALUE (domain)));
6053
6054 /* If we have constant bounds for the range of the type, get them. */
6055 if (const_bounds_p)
6056 {
6057 minelt = tree_to_shwi (TYPE_MIN_VALUE (domain));
6058 maxelt = tree_to_shwi (TYPE_MAX_VALUE (domain));
6059 }
6060
6061 /* If the constructor has fewer elements than the array, clear
6062 the whole array first. Similarly if this is static
6063 constructor of a non-BLKmode object. */
6064 if (cleared)
6065 need_to_clear = 0;
6066 else if (REG_P (target) && TREE_STATIC (exp))
6067 need_to_clear = 1;
6068 else
6069 {
6070 unsigned HOST_WIDE_INT idx;
6071 tree index, value;
6072 HOST_WIDE_INT count = 0, zero_count = 0;
6073 need_to_clear = ! const_bounds_p;
6074
6075 /* This loop is a more accurate version of the loop in
6076 mostly_zeros_p (it handles RANGE_EXPR in an index). It
6077 is also needed to check for missing elements. */
6078 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), idx, index, value)
6079 {
6080 HOST_WIDE_INT this_node_count;
6081
6082 if (need_to_clear)
6083 break;
6084
6085 if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR)
6086 {
6087 tree lo_index = TREE_OPERAND (index, 0);
6088 tree hi_index = TREE_OPERAND (index, 1);
6089
6090 if (! tree_fits_uhwi_p (lo_index)
6091 || ! tree_fits_uhwi_p (hi_index))
6092 {
6093 need_to_clear = 1;
6094 break;
6095 }
6096
6097 this_node_count = (tree_to_uhwi (hi_index)
6098 - tree_to_uhwi (lo_index) + 1);
6099 }
6100 else
6101 this_node_count = 1;
6102
6103 count += this_node_count;
6104 if (mostly_zeros_p (value))
6105 zero_count += this_node_count;
6106 }
6107
6108 /* Clear the entire array first if there are any missing
6109 elements, or if the incidence of zero elements is >=
6110 75%. */
6111 if (! need_to_clear
6112 && (count < maxelt - minelt + 1
6113 || 4 * zero_count >= 3 * count))
6114 need_to_clear = 1;
6115 }
6116
6117 if (need_to_clear && size > 0)
6118 {
6119 if (REG_P (target))
6120 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
6121 else
6122 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
6123 cleared = 1;
6124 }
6125
6126 if (!cleared && REG_P (target))
6127 /* Inform later passes that the old value is dead. */
6128 emit_clobber (target);
6129
6130 /* Store each element of the constructor into the
6131 corresponding element of TARGET, determined by counting the
6132 elements. */
6133 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), i, index, value)
6134 {
6135 enum machine_mode mode;
6136 HOST_WIDE_INT bitsize;
6137 HOST_WIDE_INT bitpos;
6138 rtx xtarget = target;
6139
6140 if (cleared && initializer_zerop (value))
6141 continue;
6142
6143 mode = TYPE_MODE (elttype);
6144 if (mode == BLKmode)
6145 bitsize = (tree_fits_uhwi_p (TYPE_SIZE (elttype))
6146 ? tree_to_uhwi (TYPE_SIZE (elttype))
6147 : -1);
6148 else
6149 bitsize = GET_MODE_BITSIZE (mode);
6150
6151 if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR)
6152 {
6153 tree lo_index = TREE_OPERAND (index, 0);
6154 tree hi_index = TREE_OPERAND (index, 1);
6155 rtx index_r, pos_rtx;
6156 HOST_WIDE_INT lo, hi, count;
6157 tree position;
6158
6159 /* If the range is constant and "small", unroll the loop. */
6160 if (const_bounds_p
6161 && tree_fits_shwi_p (lo_index)
6162 && tree_fits_shwi_p (hi_index)
6163 && (lo = tree_to_shwi (lo_index),
6164 hi = tree_to_shwi (hi_index),
6165 count = hi - lo + 1,
6166 (!MEM_P (target)
6167 || count <= 2
6168 || (tree_fits_uhwi_p (TYPE_SIZE (elttype))
6169 && (tree_to_uhwi (TYPE_SIZE (elttype)) * count
6170 <= 40 * 8)))))
6171 {
6172 lo -= minelt; hi -= minelt;
6173 for (; lo <= hi; lo++)
6174 {
6175 bitpos = lo * tree_to_shwi (TYPE_SIZE (elttype));
6176
6177 if (MEM_P (target)
6178 && !MEM_KEEP_ALIAS_SET_P (target)
6179 && TREE_CODE (type) == ARRAY_TYPE
6180 && TYPE_NONALIASED_COMPONENT (type))
6181 {
6182 target = copy_rtx (target);
6183 MEM_KEEP_ALIAS_SET_P (target) = 1;
6184 }
6185
6186 store_constructor_field
6187 (target, bitsize, bitpos, mode, value, cleared,
6188 get_alias_set (elttype));
6189 }
6190 }
6191 else
6192 {
6193 rtx loop_start = gen_label_rtx ();
6194 rtx loop_end = gen_label_rtx ();
6195 tree exit_cond;
6196
6197 expand_normal (hi_index);
6198
6199 index = build_decl (EXPR_LOCATION (exp),
6200 VAR_DECL, NULL_TREE, domain);
6201 index_r = gen_reg_rtx (promote_decl_mode (index, NULL));
6202 SET_DECL_RTL (index, index_r);
6203 store_expr (lo_index, index_r, 0, false);
6204
6205 /* Build the head of the loop. */
6206 do_pending_stack_adjust ();
6207 emit_label (loop_start);
6208
6209 /* Assign value to element index. */
6210 position =
6211 fold_convert (ssizetype,
6212 fold_build2 (MINUS_EXPR,
6213 TREE_TYPE (index),
6214 index,
6215 TYPE_MIN_VALUE (domain)));
6216
6217 position =
6218 size_binop (MULT_EXPR, position,
6219 fold_convert (ssizetype,
6220 TYPE_SIZE_UNIT (elttype)));
6221
6222 pos_rtx = expand_normal (position);
6223 xtarget = offset_address (target, pos_rtx,
6224 highest_pow2_factor (position));
6225 xtarget = adjust_address (xtarget, mode, 0);
6226 if (TREE_CODE (value) == CONSTRUCTOR)
6227 store_constructor (value, xtarget, cleared,
6228 bitsize / BITS_PER_UNIT);
6229 else
6230 store_expr (value, xtarget, 0, false);
6231
6232 /* Generate a conditional jump to exit the loop. */
6233 exit_cond = build2 (LT_EXPR, integer_type_node,
6234 index, hi_index);
6235 jumpif (exit_cond, loop_end, -1);
6236
6237 /* Update the loop counter, and jump to the head of
6238 the loop. */
6239 expand_assignment (index,
6240 build2 (PLUS_EXPR, TREE_TYPE (index),
6241 index, integer_one_node),
6242 false);
6243
6244 emit_jump (loop_start);
6245
6246 /* Build the end of the loop. */
6247 emit_label (loop_end);
6248 }
6249 }
6250 else if ((index != 0 && ! tree_fits_shwi_p (index))
6251 || ! tree_fits_uhwi_p (TYPE_SIZE (elttype)))
6252 {
6253 tree position;
6254
6255 if (index == 0)
6256 index = ssize_int (1);
6257
6258 if (minelt)
6259 index = fold_convert (ssizetype,
6260 fold_build2 (MINUS_EXPR,
6261 TREE_TYPE (index),
6262 index,
6263 TYPE_MIN_VALUE (domain)));
6264
6265 position =
6266 size_binop (MULT_EXPR, index,
6267 fold_convert (ssizetype,
6268 TYPE_SIZE_UNIT (elttype)));
6269 xtarget = offset_address (target,
6270 expand_normal (position),
6271 highest_pow2_factor (position));
6272 xtarget = adjust_address (xtarget, mode, 0);
6273 store_expr (value, xtarget, 0, false);
6274 }
6275 else
6276 {
6277 if (index != 0)
6278 bitpos = ((tree_to_shwi (index) - minelt)
6279 * tree_to_uhwi (TYPE_SIZE (elttype)));
6280 else
6281 bitpos = (i * tree_to_uhwi (TYPE_SIZE (elttype)));
6282
6283 if (MEM_P (target) && !MEM_KEEP_ALIAS_SET_P (target)
6284 && TREE_CODE (type) == ARRAY_TYPE
6285 && TYPE_NONALIASED_COMPONENT (type))
6286 {
6287 target = copy_rtx (target);
6288 MEM_KEEP_ALIAS_SET_P (target) = 1;
6289 }
6290 store_constructor_field (target, bitsize, bitpos, mode, value,
6291 cleared, get_alias_set (elttype));
6292 }
6293 }
6294 break;
6295 }
6296
6297 case VECTOR_TYPE:
6298 {
6299 unsigned HOST_WIDE_INT idx;
6300 constructor_elt *ce;
6301 int i;
6302 int need_to_clear;
6303 int icode = CODE_FOR_nothing;
6304 tree elttype = TREE_TYPE (type);
6305 int elt_size = tree_to_uhwi (TYPE_SIZE (elttype));
6306 enum machine_mode eltmode = TYPE_MODE (elttype);
6307 HOST_WIDE_INT bitsize;
6308 HOST_WIDE_INT bitpos;
6309 rtvec vector = NULL;
6310 unsigned n_elts;
6311 alias_set_type alias;
6312
6313 gcc_assert (eltmode != BLKmode);
6314
6315 n_elts = TYPE_VECTOR_SUBPARTS (type);
6316 if (REG_P (target) && VECTOR_MODE_P (GET_MODE (target)))
6317 {
6318 enum machine_mode mode = GET_MODE (target);
6319
6320 icode = (int) optab_handler (vec_init_optab, mode);
6321 /* Don't use vec_init<mode> if some elements have VECTOR_TYPE. */
6322 if (icode != CODE_FOR_nothing)
6323 {
6324 tree value;
6325
6326 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value)
6327 if (TREE_CODE (TREE_TYPE (value)) == VECTOR_TYPE)
6328 {
6329 icode = CODE_FOR_nothing;
6330 break;
6331 }
6332 }
6333 if (icode != CODE_FOR_nothing)
6334 {
6335 unsigned int i;
6336
6337 vector = rtvec_alloc (n_elts);
6338 for (i = 0; i < n_elts; i++)
6339 RTVEC_ELT (vector, i) = CONST0_RTX (GET_MODE_INNER (mode));
6340 }
6341 }
6342
6343 /* If the constructor has fewer elements than the vector,
6344 clear the whole array first. Similarly if this is static
6345 constructor of a non-BLKmode object. */
6346 if (cleared)
6347 need_to_clear = 0;
6348 else if (REG_P (target) && TREE_STATIC (exp))
6349 need_to_clear = 1;
6350 else
6351 {
6352 unsigned HOST_WIDE_INT count = 0, zero_count = 0;
6353 tree value;
6354
6355 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value)
6356 {
6357 int n_elts_here = tree_to_uhwi
6358 (int_const_binop (TRUNC_DIV_EXPR,
6359 TYPE_SIZE (TREE_TYPE (value)),
6360 TYPE_SIZE (elttype)));
6361
6362 count += n_elts_here;
6363 if (mostly_zeros_p (value))
6364 zero_count += n_elts_here;
6365 }
6366
6367 /* Clear the entire vector first if there are any missing elements,
6368 or if the incidence of zero elements is >= 75%. */
6369 need_to_clear = (count < n_elts || 4 * zero_count >= 3 * count);
6370 }
6371
6372 if (need_to_clear && size > 0 && !vector)
6373 {
6374 if (REG_P (target))
6375 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
6376 else
6377 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
6378 cleared = 1;
6379 }
6380
6381 /* Inform later passes that the old value is dead. */
6382 if (!cleared && !vector && REG_P (target))
6383 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
6384
6385 if (MEM_P (target))
6386 alias = MEM_ALIAS_SET (target);
6387 else
6388 alias = get_alias_set (elttype);
6389
6390 /* Store each element of the constructor into the corresponding
6391 element of TARGET, determined by counting the elements. */
6392 for (idx = 0, i = 0;
6393 vec_safe_iterate (CONSTRUCTOR_ELTS (exp), idx, &ce);
6394 idx++, i += bitsize / elt_size)
6395 {
6396 HOST_WIDE_INT eltpos;
6397 tree value = ce->value;
6398
6399 bitsize = tree_to_uhwi (TYPE_SIZE (TREE_TYPE (value)));
6400 if (cleared && initializer_zerop (value))
6401 continue;
6402
6403 if (ce->index)
6404 eltpos = tree_to_uhwi (ce->index);
6405 else
6406 eltpos = i;
6407
6408 if (vector)
6409 {
6410 /* vec_init<mode> should not be used if there are VECTOR_TYPE
6411 elements. */
6412 gcc_assert (TREE_CODE (TREE_TYPE (value)) != VECTOR_TYPE);
6413 RTVEC_ELT (vector, eltpos)
6414 = expand_normal (value);
6415 }
6416 else
6417 {
6418 enum machine_mode value_mode =
6419 TREE_CODE (TREE_TYPE (value)) == VECTOR_TYPE
6420 ? TYPE_MODE (TREE_TYPE (value))
6421 : eltmode;
6422 bitpos = eltpos * elt_size;
6423 store_constructor_field (target, bitsize, bitpos, value_mode,
6424 value, cleared, alias);
6425 }
6426 }
6427
6428 if (vector)
6429 emit_insn (GEN_FCN (icode)
6430 (target,
6431 gen_rtx_PARALLEL (GET_MODE (target), vector)));
6432 break;
6433 }
6434
6435 default:
6436 gcc_unreachable ();
6437 }
6438 }
6439
6440 /* Store the value of EXP (an expression tree)
6441 into a subfield of TARGET which has mode MODE and occupies
6442 BITSIZE bits, starting BITPOS bits from the start of TARGET.
6443 If MODE is VOIDmode, it means that we are storing into a bit-field.
6444
6445 BITREGION_START is bitpos of the first bitfield in this region.
6446 BITREGION_END is the bitpos of the ending bitfield in this region.
6447 These two fields are 0, if the C++ memory model does not apply,
6448 or we are not interested in keeping track of bitfield regions.
6449
6450 Always return const0_rtx unless we have something particular to
6451 return.
6452
6453 ALIAS_SET is the alias set for the destination. This value will
6454 (in general) be different from that for TARGET, since TARGET is a
6455 reference to the containing structure.
6456
6457 If NONTEMPORAL is true, try generating a nontemporal store. */
6458
6459 static rtx
6460 store_field (rtx target, HOST_WIDE_INT bitsize, HOST_WIDE_INT bitpos,
6461 unsigned HOST_WIDE_INT bitregion_start,
6462 unsigned HOST_WIDE_INT bitregion_end,
6463 enum machine_mode mode, tree exp,
6464 alias_set_type alias_set, bool nontemporal)
6465 {
6466 if (TREE_CODE (exp) == ERROR_MARK)
6467 return const0_rtx;
6468
6469 /* If we have nothing to store, do nothing unless the expression has
6470 side-effects. */
6471 if (bitsize == 0)
6472 return expand_expr (exp, const0_rtx, VOIDmode, EXPAND_NORMAL);
6473
6474 if (GET_CODE (target) == CONCAT)
6475 {
6476 /* We're storing into a struct containing a single __complex. */
6477
6478 gcc_assert (!bitpos);
6479 return store_expr (exp, target, 0, nontemporal);
6480 }
6481
6482 /* If the structure is in a register or if the component
6483 is a bit field, we cannot use addressing to access it.
6484 Use bit-field techniques or SUBREG to store in it. */
6485
6486 if (mode == VOIDmode
6487 || (mode != BLKmode && ! direct_store[(int) mode]
6488 && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
6489 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT)
6490 || REG_P (target)
6491 || GET_CODE (target) == SUBREG
6492 /* If the field isn't aligned enough to store as an ordinary memref,
6493 store it as a bit field. */
6494 || (mode != BLKmode
6495 && ((((MEM_ALIGN (target) < GET_MODE_ALIGNMENT (mode))
6496 || bitpos % GET_MODE_ALIGNMENT (mode))
6497 && SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (target)))
6498 || (bitpos % BITS_PER_UNIT != 0)))
6499 || (bitsize >= 0 && mode != BLKmode
6500 && GET_MODE_BITSIZE (mode) > bitsize)
6501 /* If the RHS and field are a constant size and the size of the
6502 RHS isn't the same size as the bitfield, we must use bitfield
6503 operations. */
6504 || (bitsize >= 0
6505 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
6506 && compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)), bitsize) != 0)
6507 /* If we are expanding a MEM_REF of a non-BLKmode non-addressable
6508 decl we must use bitfield operations. */
6509 || (bitsize >= 0
6510 && TREE_CODE (exp) == MEM_REF
6511 && TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR
6512 && DECL_P (TREE_OPERAND (TREE_OPERAND (exp, 0), 0))
6513 && !TREE_ADDRESSABLE (TREE_OPERAND (TREE_OPERAND (exp, 0),0 ))
6514 && DECL_MODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0)) != BLKmode))
6515 {
6516 rtx temp;
6517 gimple nop_def;
6518
6519 /* If EXP is a NOP_EXPR of precision less than its mode, then that
6520 implies a mask operation. If the precision is the same size as
6521 the field we're storing into, that mask is redundant. This is
6522 particularly common with bit field assignments generated by the
6523 C front end. */
6524 nop_def = get_def_for_expr (exp, NOP_EXPR);
6525 if (nop_def)
6526 {
6527 tree type = TREE_TYPE (exp);
6528 if (INTEGRAL_TYPE_P (type)
6529 && TYPE_PRECISION (type) < GET_MODE_BITSIZE (TYPE_MODE (type))
6530 && bitsize == TYPE_PRECISION (type))
6531 {
6532 tree op = gimple_assign_rhs1 (nop_def);
6533 type = TREE_TYPE (op);
6534 if (INTEGRAL_TYPE_P (type) && TYPE_PRECISION (type) >= bitsize)
6535 exp = op;
6536 }
6537 }
6538
6539 temp = expand_normal (exp);
6540
6541 /* If BITSIZE is narrower than the size of the type of EXP
6542 we will be narrowing TEMP. Normally, what's wanted are the
6543 low-order bits. However, if EXP's type is a record and this is
6544 big-endian machine, we want the upper BITSIZE bits. */
6545 if (BYTES_BIG_ENDIAN && GET_MODE_CLASS (GET_MODE (temp)) == MODE_INT
6546 && bitsize < (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (temp))
6547 && TREE_CODE (TREE_TYPE (exp)) == RECORD_TYPE)
6548 temp = expand_shift (RSHIFT_EXPR, GET_MODE (temp), temp,
6549 GET_MODE_BITSIZE (GET_MODE (temp)) - bitsize,
6550 NULL_RTX, 1);
6551
6552 /* Unless MODE is VOIDmode or BLKmode, convert TEMP to MODE. */
6553 if (mode != VOIDmode && mode != BLKmode
6554 && mode != TYPE_MODE (TREE_TYPE (exp)))
6555 temp = convert_modes (mode, TYPE_MODE (TREE_TYPE (exp)), temp, 1);
6556
6557 /* If the modes of TEMP and TARGET are both BLKmode, both
6558 must be in memory and BITPOS must be aligned on a byte
6559 boundary. If so, we simply do a block copy. Likewise
6560 for a BLKmode-like TARGET. */
6561 if (GET_MODE (temp) == BLKmode
6562 && (GET_MODE (target) == BLKmode
6563 || (MEM_P (target)
6564 && GET_MODE_CLASS (GET_MODE (target)) == MODE_INT
6565 && (bitpos % BITS_PER_UNIT) == 0
6566 && (bitsize % BITS_PER_UNIT) == 0)))
6567 {
6568 gcc_assert (MEM_P (target) && MEM_P (temp)
6569 && (bitpos % BITS_PER_UNIT) == 0);
6570
6571 target = adjust_address (target, VOIDmode, bitpos / BITS_PER_UNIT);
6572 emit_block_move (target, temp,
6573 GEN_INT ((bitsize + BITS_PER_UNIT - 1)
6574 / BITS_PER_UNIT),
6575 BLOCK_OP_NORMAL);
6576
6577 return const0_rtx;
6578 }
6579
6580 /* Handle calls that return values in multiple non-contiguous locations.
6581 The Irix 6 ABI has examples of this. */
6582 if (GET_CODE (temp) == PARALLEL)
6583 {
6584 HOST_WIDE_INT size = int_size_in_bytes (TREE_TYPE (exp));
6585 rtx temp_target;
6586 if (mode == BLKmode)
6587 mode = smallest_mode_for_size (size * BITS_PER_UNIT, MODE_INT);
6588 temp_target = gen_reg_rtx (mode);
6589 emit_group_store (temp_target, temp, TREE_TYPE (exp), size);
6590 temp = temp_target;
6591 }
6592 else if (mode == BLKmode)
6593 {
6594 /* Handle calls that return BLKmode values in registers. */
6595 if (REG_P (temp) && TREE_CODE (exp) == CALL_EXPR)
6596 {
6597 rtx temp_target = gen_reg_rtx (GET_MODE (temp));
6598 copy_blkmode_from_reg (temp_target, temp, TREE_TYPE (exp));
6599 temp = temp_target;
6600 }
6601 else
6602 {
6603 HOST_WIDE_INT size = int_size_in_bytes (TREE_TYPE (exp));
6604 rtx temp_target;
6605 mode = smallest_mode_for_size (size * BITS_PER_UNIT, MODE_INT);
6606 temp_target = gen_reg_rtx (mode);
6607 temp_target
6608 = extract_bit_field (temp, size * BITS_PER_UNIT, 0, 1,
6609 temp_target, mode, mode);
6610 temp = temp_target;
6611 }
6612 }
6613
6614 /* Store the value in the bitfield. */
6615 store_bit_field (target, bitsize, bitpos,
6616 bitregion_start, bitregion_end,
6617 mode, temp);
6618
6619 return const0_rtx;
6620 }
6621 else
6622 {
6623 /* Now build a reference to just the desired component. */
6624 rtx to_rtx = adjust_address (target, mode, bitpos / BITS_PER_UNIT);
6625
6626 if (to_rtx == target)
6627 to_rtx = copy_rtx (to_rtx);
6628
6629 if (!MEM_KEEP_ALIAS_SET_P (to_rtx) && MEM_ALIAS_SET (to_rtx) != 0)
6630 set_mem_alias_set (to_rtx, alias_set);
6631
6632 return store_expr (exp, to_rtx, 0, nontemporal);
6633 }
6634 }
6635 \f
6636 /* Given an expression EXP that may be a COMPONENT_REF, a BIT_FIELD_REF,
6637 an ARRAY_REF, or an ARRAY_RANGE_REF, look for nested operations of these
6638 codes and find the ultimate containing object, which we return.
6639
6640 We set *PBITSIZE to the size in bits that we want, *PBITPOS to the
6641 bit position, and *PUNSIGNEDP to the signedness of the field.
6642 If the position of the field is variable, we store a tree
6643 giving the variable offset (in units) in *POFFSET.
6644 This offset is in addition to the bit position.
6645 If the position is not variable, we store 0 in *POFFSET.
6646
6647 If any of the extraction expressions is volatile,
6648 we store 1 in *PVOLATILEP. Otherwise we don't change that.
6649
6650 If the field is a non-BLKmode bit-field, *PMODE is set to VOIDmode.
6651 Otherwise, it is a mode that can be used to access the field.
6652
6653 If the field describes a variable-sized object, *PMODE is set to
6654 BLKmode and *PBITSIZE is set to -1. An access cannot be made in
6655 this case, but the address of the object can be found.
6656
6657 If KEEP_ALIGNING is true and the target is STRICT_ALIGNMENT, we don't
6658 look through nodes that serve as markers of a greater alignment than
6659 the one that can be deduced from the expression. These nodes make it
6660 possible for front-ends to prevent temporaries from being created by
6661 the middle-end on alignment considerations. For that purpose, the
6662 normal operating mode at high-level is to always pass FALSE so that
6663 the ultimate containing object is really returned; moreover, the
6664 associated predicate handled_component_p will always return TRUE
6665 on these nodes, thus indicating that they are essentially handled
6666 by get_inner_reference. TRUE should only be passed when the caller
6667 is scanning the expression in order to build another representation
6668 and specifically knows how to handle these nodes; as such, this is
6669 the normal operating mode in the RTL expanders. */
6670
6671 tree
6672 get_inner_reference (tree exp, HOST_WIDE_INT *pbitsize,
6673 HOST_WIDE_INT *pbitpos, tree *poffset,
6674 enum machine_mode *pmode, int *punsignedp,
6675 int *pvolatilep, bool keep_aligning)
6676 {
6677 tree size_tree = 0;
6678 enum machine_mode mode = VOIDmode;
6679 bool blkmode_bitfield = false;
6680 tree offset = size_zero_node;
6681 double_int bit_offset = double_int_zero;
6682
6683 /* First get the mode, signedness, and size. We do this from just the
6684 outermost expression. */
6685 *pbitsize = -1;
6686 if (TREE_CODE (exp) == COMPONENT_REF)
6687 {
6688 tree field = TREE_OPERAND (exp, 1);
6689 size_tree = DECL_SIZE (field);
6690 if (flag_strict_volatile_bitfields > 0
6691 && TREE_THIS_VOLATILE (exp)
6692 && DECL_BIT_FIELD_TYPE (field)
6693 && DECL_MODE (field) != BLKmode)
6694 /* Volatile bitfields should be accessed in the mode of the
6695 field's type, not the mode computed based on the bit
6696 size. */
6697 mode = TYPE_MODE (DECL_BIT_FIELD_TYPE (field));
6698 else if (!DECL_BIT_FIELD (field))
6699 mode = DECL_MODE (field);
6700 else if (DECL_MODE (field) == BLKmode)
6701 blkmode_bitfield = true;
6702
6703 *punsignedp = DECL_UNSIGNED (field);
6704 }
6705 else if (TREE_CODE (exp) == BIT_FIELD_REF)
6706 {
6707 size_tree = TREE_OPERAND (exp, 1);
6708 *punsignedp = (! INTEGRAL_TYPE_P (TREE_TYPE (exp))
6709 || TYPE_UNSIGNED (TREE_TYPE (exp)));
6710
6711 /* For vector types, with the correct size of access, use the mode of
6712 inner type. */
6713 if (TREE_CODE (TREE_TYPE (TREE_OPERAND (exp, 0))) == VECTOR_TYPE
6714 && TREE_TYPE (exp) == TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0)))
6715 && tree_int_cst_equal (size_tree, TYPE_SIZE (TREE_TYPE (exp))))
6716 mode = TYPE_MODE (TREE_TYPE (exp));
6717 }
6718 else
6719 {
6720 mode = TYPE_MODE (TREE_TYPE (exp));
6721 *punsignedp = TYPE_UNSIGNED (TREE_TYPE (exp));
6722
6723 if (mode == BLKmode)
6724 size_tree = TYPE_SIZE (TREE_TYPE (exp));
6725 else
6726 *pbitsize = GET_MODE_BITSIZE (mode);
6727 }
6728
6729 if (size_tree != 0)
6730 {
6731 if (! tree_fits_uhwi_p (size_tree))
6732 mode = BLKmode, *pbitsize = -1;
6733 else
6734 *pbitsize = tree_to_uhwi (size_tree);
6735 }
6736
6737 /* Compute cumulative bit-offset for nested component-refs and array-refs,
6738 and find the ultimate containing object. */
6739 while (1)
6740 {
6741 switch (TREE_CODE (exp))
6742 {
6743 case BIT_FIELD_REF:
6744 bit_offset += tree_to_double_int (TREE_OPERAND (exp, 2));
6745 break;
6746
6747 case COMPONENT_REF:
6748 {
6749 tree field = TREE_OPERAND (exp, 1);
6750 tree this_offset = component_ref_field_offset (exp);
6751
6752 /* If this field hasn't been filled in yet, don't go past it.
6753 This should only happen when folding expressions made during
6754 type construction. */
6755 if (this_offset == 0)
6756 break;
6757
6758 offset = size_binop (PLUS_EXPR, offset, this_offset);
6759 bit_offset += tree_to_double_int (DECL_FIELD_BIT_OFFSET (field));
6760
6761 /* ??? Right now we don't do anything with DECL_OFFSET_ALIGN. */
6762 }
6763 break;
6764
6765 case ARRAY_REF:
6766 case ARRAY_RANGE_REF:
6767 {
6768 tree index = TREE_OPERAND (exp, 1);
6769 tree low_bound = array_ref_low_bound (exp);
6770 tree unit_size = array_ref_element_size (exp);
6771
6772 /* We assume all arrays have sizes that are a multiple of a byte.
6773 First subtract the lower bound, if any, in the type of the
6774 index, then convert to sizetype and multiply by the size of
6775 the array element. */
6776 if (! integer_zerop (low_bound))
6777 index = fold_build2 (MINUS_EXPR, TREE_TYPE (index),
6778 index, low_bound);
6779
6780 offset = size_binop (PLUS_EXPR, offset,
6781 size_binop (MULT_EXPR,
6782 fold_convert (sizetype, index),
6783 unit_size));
6784 }
6785 break;
6786
6787 case REALPART_EXPR:
6788 break;
6789
6790 case IMAGPART_EXPR:
6791 bit_offset += double_int::from_uhwi (*pbitsize);
6792 break;
6793
6794 case VIEW_CONVERT_EXPR:
6795 if (keep_aligning && STRICT_ALIGNMENT
6796 && (TYPE_ALIGN (TREE_TYPE (exp))
6797 > TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (exp, 0))))
6798 && (TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (exp, 0)))
6799 < BIGGEST_ALIGNMENT)
6800 && (TYPE_ALIGN_OK (TREE_TYPE (exp))
6801 || TYPE_ALIGN_OK (TREE_TYPE (TREE_OPERAND (exp, 0)))))
6802 goto done;
6803 break;
6804
6805 case MEM_REF:
6806 /* Hand back the decl for MEM[&decl, off]. */
6807 if (TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR)
6808 {
6809 tree off = TREE_OPERAND (exp, 1);
6810 if (!integer_zerop (off))
6811 {
6812 double_int boff, coff = mem_ref_offset (exp);
6813 boff = coff.lshift (BITS_PER_UNIT == 8
6814 ? 3 : exact_log2 (BITS_PER_UNIT));
6815 bit_offset += boff;
6816 }
6817 exp = TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
6818 }
6819 goto done;
6820
6821 default:
6822 goto done;
6823 }
6824
6825 /* If any reference in the chain is volatile, the effect is volatile. */
6826 if (TREE_THIS_VOLATILE (exp))
6827 *pvolatilep = 1;
6828
6829 exp = TREE_OPERAND (exp, 0);
6830 }
6831 done:
6832
6833 /* If OFFSET is constant, see if we can return the whole thing as a
6834 constant bit position. Make sure to handle overflow during
6835 this conversion. */
6836 if (TREE_CODE (offset) == INTEGER_CST)
6837 {
6838 double_int tem = tree_to_double_int (offset);
6839 tem = tem.sext (TYPE_PRECISION (sizetype));
6840 tem = tem.lshift (BITS_PER_UNIT == 8 ? 3 : exact_log2 (BITS_PER_UNIT));
6841 tem += bit_offset;
6842 if (tem.fits_shwi ())
6843 {
6844 *pbitpos = tem.to_shwi ();
6845 *poffset = offset = NULL_TREE;
6846 }
6847 }
6848
6849 /* Otherwise, split it up. */
6850 if (offset)
6851 {
6852 /* Avoid returning a negative bitpos as this may wreak havoc later. */
6853 if (bit_offset.is_negative ())
6854 {
6855 double_int mask
6856 = double_int::mask (BITS_PER_UNIT == 8
6857 ? 3 : exact_log2 (BITS_PER_UNIT));
6858 double_int tem = bit_offset.and_not (mask);
6859 /* TEM is the bitpos rounded to BITS_PER_UNIT towards -Inf.
6860 Subtract it to BIT_OFFSET and add it (scaled) to OFFSET. */
6861 bit_offset -= tem;
6862 tem = tem.arshift (BITS_PER_UNIT == 8
6863 ? 3 : exact_log2 (BITS_PER_UNIT),
6864 HOST_BITS_PER_DOUBLE_INT);
6865 offset = size_binop (PLUS_EXPR, offset,
6866 double_int_to_tree (sizetype, tem));
6867 }
6868
6869 *pbitpos = bit_offset.to_shwi ();
6870 *poffset = offset;
6871 }
6872
6873 /* We can use BLKmode for a byte-aligned BLKmode bitfield. */
6874 if (mode == VOIDmode
6875 && blkmode_bitfield
6876 && (*pbitpos % BITS_PER_UNIT) == 0
6877 && (*pbitsize % BITS_PER_UNIT) == 0)
6878 *pmode = BLKmode;
6879 else
6880 *pmode = mode;
6881
6882 return exp;
6883 }
6884
6885 /* Return a tree of sizetype representing the size, in bytes, of the element
6886 of EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6887
6888 tree
6889 array_ref_element_size (tree exp)
6890 {
6891 tree aligned_size = TREE_OPERAND (exp, 3);
6892 tree elmt_type = TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0)));
6893 location_t loc = EXPR_LOCATION (exp);
6894
6895 /* If a size was specified in the ARRAY_REF, it's the size measured
6896 in alignment units of the element type. So multiply by that value. */
6897 if (aligned_size)
6898 {
6899 /* ??? tree_ssa_useless_type_conversion will eliminate casts to
6900 sizetype from another type of the same width and signedness. */
6901 if (TREE_TYPE (aligned_size) != sizetype)
6902 aligned_size = fold_convert_loc (loc, sizetype, aligned_size);
6903 return size_binop_loc (loc, MULT_EXPR, aligned_size,
6904 size_int (TYPE_ALIGN_UNIT (elmt_type)));
6905 }
6906
6907 /* Otherwise, take the size from that of the element type. Substitute
6908 any PLACEHOLDER_EXPR that we have. */
6909 else
6910 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_SIZE_UNIT (elmt_type), exp);
6911 }
6912
6913 /* Return a tree representing the lower bound of the array mentioned in
6914 EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6915
6916 tree
6917 array_ref_low_bound (tree exp)
6918 {
6919 tree domain_type = TYPE_DOMAIN (TREE_TYPE (TREE_OPERAND (exp, 0)));
6920
6921 /* If a lower bound is specified in EXP, use it. */
6922 if (TREE_OPERAND (exp, 2))
6923 return TREE_OPERAND (exp, 2);
6924
6925 /* Otherwise, if there is a domain type and it has a lower bound, use it,
6926 substituting for a PLACEHOLDER_EXPR as needed. */
6927 if (domain_type && TYPE_MIN_VALUE (domain_type))
6928 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_MIN_VALUE (domain_type), exp);
6929
6930 /* Otherwise, return a zero of the appropriate type. */
6931 return build_int_cst (TREE_TYPE (TREE_OPERAND (exp, 1)), 0);
6932 }
6933
6934 /* Returns true if REF is an array reference to an array at the end of
6935 a structure. If this is the case, the array may be allocated larger
6936 than its upper bound implies. */
6937
6938 bool
6939 array_at_struct_end_p (tree ref)
6940 {
6941 if (TREE_CODE (ref) != ARRAY_REF
6942 && TREE_CODE (ref) != ARRAY_RANGE_REF)
6943 return false;
6944
6945 while (handled_component_p (ref))
6946 {
6947 /* If the reference chain contains a component reference to a
6948 non-union type and there follows another field the reference
6949 is not at the end of a structure. */
6950 if (TREE_CODE (ref) == COMPONENT_REF
6951 && TREE_CODE (TREE_TYPE (TREE_OPERAND (ref, 0))) == RECORD_TYPE)
6952 {
6953 tree nextf = DECL_CHAIN (TREE_OPERAND (ref, 1));
6954 while (nextf && TREE_CODE (nextf) != FIELD_DECL)
6955 nextf = DECL_CHAIN (nextf);
6956 if (nextf)
6957 return false;
6958 }
6959
6960 ref = TREE_OPERAND (ref, 0);
6961 }
6962
6963 /* If the reference is based on a declared entity, the size of the array
6964 is constrained by its given domain. */
6965 if (DECL_P (ref))
6966 return false;
6967
6968 return true;
6969 }
6970
6971 /* Return a tree representing the upper bound of the array mentioned in
6972 EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6973
6974 tree
6975 array_ref_up_bound (tree exp)
6976 {
6977 tree domain_type = TYPE_DOMAIN (TREE_TYPE (TREE_OPERAND (exp, 0)));
6978
6979 /* If there is a domain type and it has an upper bound, use it, substituting
6980 for a PLACEHOLDER_EXPR as needed. */
6981 if (domain_type && TYPE_MAX_VALUE (domain_type))
6982 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_MAX_VALUE (domain_type), exp);
6983
6984 /* Otherwise fail. */
6985 return NULL_TREE;
6986 }
6987
6988 /* Return a tree representing the offset, in bytes, of the field referenced
6989 by EXP. This does not include any offset in DECL_FIELD_BIT_OFFSET. */
6990
6991 tree
6992 component_ref_field_offset (tree exp)
6993 {
6994 tree aligned_offset = TREE_OPERAND (exp, 2);
6995 tree field = TREE_OPERAND (exp, 1);
6996 location_t loc = EXPR_LOCATION (exp);
6997
6998 /* If an offset was specified in the COMPONENT_REF, it's the offset measured
6999 in units of DECL_OFFSET_ALIGN / BITS_PER_UNIT. So multiply by that
7000 value. */
7001 if (aligned_offset)
7002 {
7003 /* ??? tree_ssa_useless_type_conversion will eliminate casts to
7004 sizetype from another type of the same width and signedness. */
7005 if (TREE_TYPE (aligned_offset) != sizetype)
7006 aligned_offset = fold_convert_loc (loc, sizetype, aligned_offset);
7007 return size_binop_loc (loc, MULT_EXPR, aligned_offset,
7008 size_int (DECL_OFFSET_ALIGN (field)
7009 / BITS_PER_UNIT));
7010 }
7011
7012 /* Otherwise, take the offset from that of the field. Substitute
7013 any PLACEHOLDER_EXPR that we have. */
7014 else
7015 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (DECL_FIELD_OFFSET (field), exp);
7016 }
7017
7018 /* Alignment in bits the TARGET of an assignment may be assumed to have. */
7019
7020 static unsigned HOST_WIDE_INT
7021 target_align (const_tree target)
7022 {
7023 /* We might have a chain of nested references with intermediate misaligning
7024 bitfields components, so need to recurse to find out. */
7025
7026 unsigned HOST_WIDE_INT this_align, outer_align;
7027
7028 switch (TREE_CODE (target))
7029 {
7030 case BIT_FIELD_REF:
7031 return 1;
7032
7033 case COMPONENT_REF:
7034 this_align = DECL_ALIGN (TREE_OPERAND (target, 1));
7035 outer_align = target_align (TREE_OPERAND (target, 0));
7036 return MIN (this_align, outer_align);
7037
7038 case ARRAY_REF:
7039 case ARRAY_RANGE_REF:
7040 this_align = TYPE_ALIGN (TREE_TYPE (target));
7041 outer_align = target_align (TREE_OPERAND (target, 0));
7042 return MIN (this_align, outer_align);
7043
7044 CASE_CONVERT:
7045 case NON_LVALUE_EXPR:
7046 case VIEW_CONVERT_EXPR:
7047 this_align = TYPE_ALIGN (TREE_TYPE (target));
7048 outer_align = target_align (TREE_OPERAND (target, 0));
7049 return MAX (this_align, outer_align);
7050
7051 default:
7052 return TYPE_ALIGN (TREE_TYPE (target));
7053 }
7054 }
7055
7056 \f
7057 /* Given an rtx VALUE that may contain additions and multiplications, return
7058 an equivalent value that just refers to a register, memory, or constant.
7059 This is done by generating instructions to perform the arithmetic and
7060 returning a pseudo-register containing the value.
7061
7062 The returned value may be a REG, SUBREG, MEM or constant. */
7063
7064 rtx
7065 force_operand (rtx value, rtx target)
7066 {
7067 rtx op1, op2;
7068 /* Use subtarget as the target for operand 0 of a binary operation. */
7069 rtx subtarget = get_subtarget (target);
7070 enum rtx_code code = GET_CODE (value);
7071
7072 /* Check for subreg applied to an expression produced by loop optimizer. */
7073 if (code == SUBREG
7074 && !REG_P (SUBREG_REG (value))
7075 && !MEM_P (SUBREG_REG (value)))
7076 {
7077 value
7078 = simplify_gen_subreg (GET_MODE (value),
7079 force_reg (GET_MODE (SUBREG_REG (value)),
7080 force_operand (SUBREG_REG (value),
7081 NULL_RTX)),
7082 GET_MODE (SUBREG_REG (value)),
7083 SUBREG_BYTE (value));
7084 code = GET_CODE (value);
7085 }
7086
7087 /* Check for a PIC address load. */
7088 if ((code == PLUS || code == MINUS)
7089 && XEXP (value, 0) == pic_offset_table_rtx
7090 && (GET_CODE (XEXP (value, 1)) == SYMBOL_REF
7091 || GET_CODE (XEXP (value, 1)) == LABEL_REF
7092 || GET_CODE (XEXP (value, 1)) == CONST))
7093 {
7094 if (!subtarget)
7095 subtarget = gen_reg_rtx (GET_MODE (value));
7096 emit_move_insn (subtarget, value);
7097 return subtarget;
7098 }
7099
7100 if (ARITHMETIC_P (value))
7101 {
7102 op2 = XEXP (value, 1);
7103 if (!CONSTANT_P (op2) && !(REG_P (op2) && op2 != subtarget))
7104 subtarget = 0;
7105 if (code == MINUS && CONST_INT_P (op2))
7106 {
7107 code = PLUS;
7108 op2 = negate_rtx (GET_MODE (value), op2);
7109 }
7110
7111 /* Check for an addition with OP2 a constant integer and our first
7112 operand a PLUS of a virtual register and something else. In that
7113 case, we want to emit the sum of the virtual register and the
7114 constant first and then add the other value. This allows virtual
7115 register instantiation to simply modify the constant rather than
7116 creating another one around this addition. */
7117 if (code == PLUS && CONST_INT_P (op2)
7118 && GET_CODE (XEXP (value, 0)) == PLUS
7119 && REG_P (XEXP (XEXP (value, 0), 0))
7120 && REGNO (XEXP (XEXP (value, 0), 0)) >= FIRST_VIRTUAL_REGISTER
7121 && REGNO (XEXP (XEXP (value, 0), 0)) <= LAST_VIRTUAL_REGISTER)
7122 {
7123 rtx temp = expand_simple_binop (GET_MODE (value), code,
7124 XEXP (XEXP (value, 0), 0), op2,
7125 subtarget, 0, OPTAB_LIB_WIDEN);
7126 return expand_simple_binop (GET_MODE (value), code, temp,
7127 force_operand (XEXP (XEXP (value,
7128 0), 1), 0),
7129 target, 0, OPTAB_LIB_WIDEN);
7130 }
7131
7132 op1 = force_operand (XEXP (value, 0), subtarget);
7133 op2 = force_operand (op2, NULL_RTX);
7134 switch (code)
7135 {
7136 case MULT:
7137 return expand_mult (GET_MODE (value), op1, op2, target, 1);
7138 case DIV:
7139 if (!INTEGRAL_MODE_P (GET_MODE (value)))
7140 return expand_simple_binop (GET_MODE (value), code, op1, op2,
7141 target, 1, OPTAB_LIB_WIDEN);
7142 else
7143 return expand_divmod (0,
7144 FLOAT_MODE_P (GET_MODE (value))
7145 ? RDIV_EXPR : TRUNC_DIV_EXPR,
7146 GET_MODE (value), op1, op2, target, 0);
7147 case MOD:
7148 return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2,
7149 target, 0);
7150 case UDIV:
7151 return expand_divmod (0, TRUNC_DIV_EXPR, GET_MODE (value), op1, op2,
7152 target, 1);
7153 case UMOD:
7154 return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2,
7155 target, 1);
7156 case ASHIFTRT:
7157 return expand_simple_binop (GET_MODE (value), code, op1, op2,
7158 target, 0, OPTAB_LIB_WIDEN);
7159 default:
7160 return expand_simple_binop (GET_MODE (value), code, op1, op2,
7161 target, 1, OPTAB_LIB_WIDEN);
7162 }
7163 }
7164 if (UNARY_P (value))
7165 {
7166 if (!target)
7167 target = gen_reg_rtx (GET_MODE (value));
7168 op1 = force_operand (XEXP (value, 0), NULL_RTX);
7169 switch (code)
7170 {
7171 case ZERO_EXTEND:
7172 case SIGN_EXTEND:
7173 case TRUNCATE:
7174 case FLOAT_EXTEND:
7175 case FLOAT_TRUNCATE:
7176 convert_move (target, op1, code == ZERO_EXTEND);
7177 return target;
7178
7179 case FIX:
7180 case UNSIGNED_FIX:
7181 expand_fix (target, op1, code == UNSIGNED_FIX);
7182 return target;
7183
7184 case FLOAT:
7185 case UNSIGNED_FLOAT:
7186 expand_float (target, op1, code == UNSIGNED_FLOAT);
7187 return target;
7188
7189 default:
7190 return expand_simple_unop (GET_MODE (value), code, op1, target, 0);
7191 }
7192 }
7193
7194 #ifdef INSN_SCHEDULING
7195 /* On machines that have insn scheduling, we want all memory reference to be
7196 explicit, so we need to deal with such paradoxical SUBREGs. */
7197 if (paradoxical_subreg_p (value) && MEM_P (SUBREG_REG (value)))
7198 value
7199 = simplify_gen_subreg (GET_MODE (value),
7200 force_reg (GET_MODE (SUBREG_REG (value)),
7201 force_operand (SUBREG_REG (value),
7202 NULL_RTX)),
7203 GET_MODE (SUBREG_REG (value)),
7204 SUBREG_BYTE (value));
7205 #endif
7206
7207 return value;
7208 }
7209 \f
7210 /* Subroutine of expand_expr: return nonzero iff there is no way that
7211 EXP can reference X, which is being modified. TOP_P is nonzero if this
7212 call is going to be used to determine whether we need a temporary
7213 for EXP, as opposed to a recursive call to this function.
7214
7215 It is always safe for this routine to return zero since it merely
7216 searches for optimization opportunities. */
7217
7218 int
7219 safe_from_p (const_rtx x, tree exp, int top_p)
7220 {
7221 rtx exp_rtl = 0;
7222 int i, nops;
7223
7224 if (x == 0
7225 /* If EXP has varying size, we MUST use a target since we currently
7226 have no way of allocating temporaries of variable size
7227 (except for arrays that have TYPE_ARRAY_MAX_SIZE set).
7228 So we assume here that something at a higher level has prevented a
7229 clash. This is somewhat bogus, but the best we can do. Only
7230 do this when X is BLKmode and when we are at the top level. */
7231 || (top_p && TREE_TYPE (exp) != 0 && COMPLETE_TYPE_P (TREE_TYPE (exp))
7232 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) != INTEGER_CST
7233 && (TREE_CODE (TREE_TYPE (exp)) != ARRAY_TYPE
7234 || TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp)) == NULL_TREE
7235 || TREE_CODE (TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp)))
7236 != INTEGER_CST)
7237 && GET_MODE (x) == BLKmode)
7238 /* If X is in the outgoing argument area, it is always safe. */
7239 || (MEM_P (x)
7240 && (XEXP (x, 0) == virtual_outgoing_args_rtx
7241 || (GET_CODE (XEXP (x, 0)) == PLUS
7242 && XEXP (XEXP (x, 0), 0) == virtual_outgoing_args_rtx))))
7243 return 1;
7244
7245 /* If this is a subreg of a hard register, declare it unsafe, otherwise,
7246 find the underlying pseudo. */
7247 if (GET_CODE (x) == SUBREG)
7248 {
7249 x = SUBREG_REG (x);
7250 if (REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
7251 return 0;
7252 }
7253
7254 /* Now look at our tree code and possibly recurse. */
7255 switch (TREE_CODE_CLASS (TREE_CODE (exp)))
7256 {
7257 case tcc_declaration:
7258 exp_rtl = DECL_RTL_IF_SET (exp);
7259 break;
7260
7261 case tcc_constant:
7262 return 1;
7263
7264 case tcc_exceptional:
7265 if (TREE_CODE (exp) == TREE_LIST)
7266 {
7267 while (1)
7268 {
7269 if (TREE_VALUE (exp) && !safe_from_p (x, TREE_VALUE (exp), 0))
7270 return 0;
7271 exp = TREE_CHAIN (exp);
7272 if (!exp)
7273 return 1;
7274 if (TREE_CODE (exp) != TREE_LIST)
7275 return safe_from_p (x, exp, 0);
7276 }
7277 }
7278 else if (TREE_CODE (exp) == CONSTRUCTOR)
7279 {
7280 constructor_elt *ce;
7281 unsigned HOST_WIDE_INT idx;
7282
7283 FOR_EACH_VEC_SAFE_ELT (CONSTRUCTOR_ELTS (exp), idx, ce)
7284 if ((ce->index != NULL_TREE && !safe_from_p (x, ce->index, 0))
7285 || !safe_from_p (x, ce->value, 0))
7286 return 0;
7287 return 1;
7288 }
7289 else if (TREE_CODE (exp) == ERROR_MARK)
7290 return 1; /* An already-visited SAVE_EXPR? */
7291 else
7292 return 0;
7293
7294 case tcc_statement:
7295 /* The only case we look at here is the DECL_INITIAL inside a
7296 DECL_EXPR. */
7297 return (TREE_CODE (exp) != DECL_EXPR
7298 || TREE_CODE (DECL_EXPR_DECL (exp)) != VAR_DECL
7299 || !DECL_INITIAL (DECL_EXPR_DECL (exp))
7300 || safe_from_p (x, DECL_INITIAL (DECL_EXPR_DECL (exp)), 0));
7301
7302 case tcc_binary:
7303 case tcc_comparison:
7304 if (!safe_from_p (x, TREE_OPERAND (exp, 1), 0))
7305 return 0;
7306 /* Fall through. */
7307
7308 case tcc_unary:
7309 return safe_from_p (x, TREE_OPERAND (exp, 0), 0);
7310
7311 case tcc_expression:
7312 case tcc_reference:
7313 case tcc_vl_exp:
7314 /* Now do code-specific tests. EXP_RTL is set to any rtx we find in
7315 the expression. If it is set, we conflict iff we are that rtx or
7316 both are in memory. Otherwise, we check all operands of the
7317 expression recursively. */
7318
7319 switch (TREE_CODE (exp))
7320 {
7321 case ADDR_EXPR:
7322 /* If the operand is static or we are static, we can't conflict.
7323 Likewise if we don't conflict with the operand at all. */
7324 if (staticp (TREE_OPERAND (exp, 0))
7325 || TREE_STATIC (exp)
7326 || safe_from_p (x, TREE_OPERAND (exp, 0), 0))
7327 return 1;
7328
7329 /* Otherwise, the only way this can conflict is if we are taking
7330 the address of a DECL a that address if part of X, which is
7331 very rare. */
7332 exp = TREE_OPERAND (exp, 0);
7333 if (DECL_P (exp))
7334 {
7335 if (!DECL_RTL_SET_P (exp)
7336 || !MEM_P (DECL_RTL (exp)))
7337 return 0;
7338 else
7339 exp_rtl = XEXP (DECL_RTL (exp), 0);
7340 }
7341 break;
7342
7343 case MEM_REF:
7344 if (MEM_P (x)
7345 && alias_sets_conflict_p (MEM_ALIAS_SET (x),
7346 get_alias_set (exp)))
7347 return 0;
7348 break;
7349
7350 case CALL_EXPR:
7351 /* Assume that the call will clobber all hard registers and
7352 all of memory. */
7353 if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
7354 || MEM_P (x))
7355 return 0;
7356 break;
7357
7358 case WITH_CLEANUP_EXPR:
7359 case CLEANUP_POINT_EXPR:
7360 /* Lowered by gimplify.c. */
7361 gcc_unreachable ();
7362
7363 case SAVE_EXPR:
7364 return safe_from_p (x, TREE_OPERAND (exp, 0), 0);
7365
7366 default:
7367 break;
7368 }
7369
7370 /* If we have an rtx, we do not need to scan our operands. */
7371 if (exp_rtl)
7372 break;
7373
7374 nops = TREE_OPERAND_LENGTH (exp);
7375 for (i = 0; i < nops; i++)
7376 if (TREE_OPERAND (exp, i) != 0
7377 && ! safe_from_p (x, TREE_OPERAND (exp, i), 0))
7378 return 0;
7379
7380 break;
7381
7382 case tcc_type:
7383 /* Should never get a type here. */
7384 gcc_unreachable ();
7385 }
7386
7387 /* If we have an rtl, find any enclosed object. Then see if we conflict
7388 with it. */
7389 if (exp_rtl)
7390 {
7391 if (GET_CODE (exp_rtl) == SUBREG)
7392 {
7393 exp_rtl = SUBREG_REG (exp_rtl);
7394 if (REG_P (exp_rtl)
7395 && REGNO (exp_rtl) < FIRST_PSEUDO_REGISTER)
7396 return 0;
7397 }
7398
7399 /* If the rtl is X, then it is not safe. Otherwise, it is unless both
7400 are memory and they conflict. */
7401 return ! (rtx_equal_p (x, exp_rtl)
7402 || (MEM_P (x) && MEM_P (exp_rtl)
7403 && true_dependence (exp_rtl, VOIDmode, x)));
7404 }
7405
7406 /* If we reach here, it is safe. */
7407 return 1;
7408 }
7409
7410 \f
7411 /* Return the highest power of two that EXP is known to be a multiple of.
7412 This is used in updating alignment of MEMs in array references. */
7413
7414 unsigned HOST_WIDE_INT
7415 highest_pow2_factor (const_tree exp)
7416 {
7417 unsigned HOST_WIDE_INT ret;
7418 int trailing_zeros = tree_ctz (exp);
7419 if (trailing_zeros >= HOST_BITS_PER_WIDE_INT)
7420 return BIGGEST_ALIGNMENT;
7421 ret = (unsigned HOST_WIDE_INT) 1 << trailing_zeros;
7422 if (ret > BIGGEST_ALIGNMENT)
7423 return BIGGEST_ALIGNMENT;
7424 return ret;
7425 }
7426
7427 /* Similar, except that the alignment requirements of TARGET are
7428 taken into account. Assume it is at least as aligned as its
7429 type, unless it is a COMPONENT_REF in which case the layout of
7430 the structure gives the alignment. */
7431
7432 static unsigned HOST_WIDE_INT
7433 highest_pow2_factor_for_target (const_tree target, const_tree exp)
7434 {
7435 unsigned HOST_WIDE_INT talign = target_align (target) / BITS_PER_UNIT;
7436 unsigned HOST_WIDE_INT factor = highest_pow2_factor (exp);
7437
7438 return MAX (factor, talign);
7439 }
7440 \f
7441 #ifdef HAVE_conditional_move
7442 /* Convert the tree comparison code TCODE to the rtl one where the
7443 signedness is UNSIGNEDP. */
7444
7445 static enum rtx_code
7446 convert_tree_comp_to_rtx (enum tree_code tcode, int unsignedp)
7447 {
7448 enum rtx_code code;
7449 switch (tcode)
7450 {
7451 case EQ_EXPR:
7452 code = EQ;
7453 break;
7454 case NE_EXPR:
7455 code = NE;
7456 break;
7457 case LT_EXPR:
7458 code = unsignedp ? LTU : LT;
7459 break;
7460 case LE_EXPR:
7461 code = unsignedp ? LEU : LE;
7462 break;
7463 case GT_EXPR:
7464 code = unsignedp ? GTU : GT;
7465 break;
7466 case GE_EXPR:
7467 code = unsignedp ? GEU : GE;
7468 break;
7469 case UNORDERED_EXPR:
7470 code = UNORDERED;
7471 break;
7472 case ORDERED_EXPR:
7473 code = ORDERED;
7474 break;
7475 case UNLT_EXPR:
7476 code = UNLT;
7477 break;
7478 case UNLE_EXPR:
7479 code = UNLE;
7480 break;
7481 case UNGT_EXPR:
7482 code = UNGT;
7483 break;
7484 case UNGE_EXPR:
7485 code = UNGE;
7486 break;
7487 case UNEQ_EXPR:
7488 code = UNEQ;
7489 break;
7490 case LTGT_EXPR:
7491 code = LTGT;
7492 break;
7493
7494 default:
7495 gcc_unreachable ();
7496 }
7497 return code;
7498 }
7499 #endif
7500
7501 /* Subroutine of expand_expr. Expand the two operands of a binary
7502 expression EXP0 and EXP1 placing the results in OP0 and OP1.
7503 The value may be stored in TARGET if TARGET is nonzero. The
7504 MODIFIER argument is as documented by expand_expr. */
7505
7506 static void
7507 expand_operands (tree exp0, tree exp1, rtx target, rtx *op0, rtx *op1,
7508 enum expand_modifier modifier)
7509 {
7510 if (! safe_from_p (target, exp1, 1))
7511 target = 0;
7512 if (operand_equal_p (exp0, exp1, 0))
7513 {
7514 *op0 = expand_expr (exp0, target, VOIDmode, modifier);
7515 *op1 = copy_rtx (*op0);
7516 }
7517 else
7518 {
7519 /* If we need to preserve evaluation order, copy exp0 into its own
7520 temporary variable so that it can't be clobbered by exp1. */
7521 if (flag_evaluation_order && TREE_SIDE_EFFECTS (exp1))
7522 exp0 = save_expr (exp0);
7523 *op0 = expand_expr (exp0, target, VOIDmode, modifier);
7524 *op1 = expand_expr (exp1, NULL_RTX, VOIDmode, modifier);
7525 }
7526 }
7527
7528 \f
7529 /* Return a MEM that contains constant EXP. DEFER is as for
7530 output_constant_def and MODIFIER is as for expand_expr. */
7531
7532 static rtx
7533 expand_expr_constant (tree exp, int defer, enum expand_modifier modifier)
7534 {
7535 rtx mem;
7536
7537 mem = output_constant_def (exp, defer);
7538 if (modifier != EXPAND_INITIALIZER)
7539 mem = use_anchored_address (mem);
7540 return mem;
7541 }
7542
7543 /* A subroutine of expand_expr_addr_expr. Evaluate the address of EXP.
7544 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
7545
7546 static rtx
7547 expand_expr_addr_expr_1 (tree exp, rtx target, enum machine_mode tmode,
7548 enum expand_modifier modifier, addr_space_t as)
7549 {
7550 rtx result, subtarget;
7551 tree inner, offset;
7552 HOST_WIDE_INT bitsize, bitpos;
7553 int volatilep, unsignedp;
7554 enum machine_mode mode1;
7555
7556 /* If we are taking the address of a constant and are at the top level,
7557 we have to use output_constant_def since we can't call force_const_mem
7558 at top level. */
7559 /* ??? This should be considered a front-end bug. We should not be
7560 generating ADDR_EXPR of something that isn't an LVALUE. The only
7561 exception here is STRING_CST. */
7562 if (CONSTANT_CLASS_P (exp))
7563 {
7564 result = XEXP (expand_expr_constant (exp, 0, modifier), 0);
7565 if (modifier < EXPAND_SUM)
7566 result = force_operand (result, target);
7567 return result;
7568 }
7569
7570 /* Everything must be something allowed by is_gimple_addressable. */
7571 switch (TREE_CODE (exp))
7572 {
7573 case INDIRECT_REF:
7574 /* This case will happen via recursion for &a->b. */
7575 return expand_expr (TREE_OPERAND (exp, 0), target, tmode, modifier);
7576
7577 case MEM_REF:
7578 {
7579 tree tem = TREE_OPERAND (exp, 0);
7580 if (!integer_zerop (TREE_OPERAND (exp, 1)))
7581 tem = fold_build_pointer_plus (tem, TREE_OPERAND (exp, 1));
7582 return expand_expr (tem, target, tmode, modifier);
7583 }
7584
7585 case CONST_DECL:
7586 /* Expand the initializer like constants above. */
7587 result = XEXP (expand_expr_constant (DECL_INITIAL (exp),
7588 0, modifier), 0);
7589 if (modifier < EXPAND_SUM)
7590 result = force_operand (result, target);
7591 return result;
7592
7593 case REALPART_EXPR:
7594 /* The real part of the complex number is always first, therefore
7595 the address is the same as the address of the parent object. */
7596 offset = 0;
7597 bitpos = 0;
7598 inner = TREE_OPERAND (exp, 0);
7599 break;
7600
7601 case IMAGPART_EXPR:
7602 /* The imaginary part of the complex number is always second.
7603 The expression is therefore always offset by the size of the
7604 scalar type. */
7605 offset = 0;
7606 bitpos = GET_MODE_BITSIZE (TYPE_MODE (TREE_TYPE (exp)));
7607 inner = TREE_OPERAND (exp, 0);
7608 break;
7609
7610 case COMPOUND_LITERAL_EXPR:
7611 /* Allow COMPOUND_LITERAL_EXPR in initializers, if e.g.
7612 rtl_for_decl_init is called on DECL_INITIAL with
7613 COMPOUNT_LITERAL_EXPRs in it, they aren't gimplified. */
7614 if (modifier == EXPAND_INITIALIZER
7615 && COMPOUND_LITERAL_EXPR_DECL (exp))
7616 return expand_expr_addr_expr_1 (COMPOUND_LITERAL_EXPR_DECL (exp),
7617 target, tmode, modifier, as);
7618 /* FALLTHRU */
7619 default:
7620 /* If the object is a DECL, then expand it for its rtl. Don't bypass
7621 expand_expr, as that can have various side effects; LABEL_DECLs for
7622 example, may not have their DECL_RTL set yet. Expand the rtl of
7623 CONSTRUCTORs too, which should yield a memory reference for the
7624 constructor's contents. Assume language specific tree nodes can
7625 be expanded in some interesting way. */
7626 gcc_assert (TREE_CODE (exp) < LAST_AND_UNUSED_TREE_CODE);
7627 if (DECL_P (exp)
7628 || TREE_CODE (exp) == CONSTRUCTOR
7629 || TREE_CODE (exp) == COMPOUND_LITERAL_EXPR)
7630 {
7631 result = expand_expr (exp, target, tmode,
7632 modifier == EXPAND_INITIALIZER
7633 ? EXPAND_INITIALIZER : EXPAND_CONST_ADDRESS);
7634
7635 /* If the DECL isn't in memory, then the DECL wasn't properly
7636 marked TREE_ADDRESSABLE, which will be either a front-end
7637 or a tree optimizer bug. */
7638
7639 if (TREE_ADDRESSABLE (exp)
7640 && ! MEM_P (result)
7641 && ! targetm.calls.allocate_stack_slots_for_args ())
7642 {
7643 error ("local frame unavailable (naked function?)");
7644 return result;
7645 }
7646 else
7647 gcc_assert (MEM_P (result));
7648 result = XEXP (result, 0);
7649
7650 /* ??? Is this needed anymore? */
7651 if (DECL_P (exp))
7652 TREE_USED (exp) = 1;
7653
7654 if (modifier != EXPAND_INITIALIZER
7655 && modifier != EXPAND_CONST_ADDRESS
7656 && modifier != EXPAND_SUM)
7657 result = force_operand (result, target);
7658 return result;
7659 }
7660
7661 /* Pass FALSE as the last argument to get_inner_reference although
7662 we are expanding to RTL. The rationale is that we know how to
7663 handle "aligning nodes" here: we can just bypass them because
7664 they won't change the final object whose address will be returned
7665 (they actually exist only for that purpose). */
7666 inner = get_inner_reference (exp, &bitsize, &bitpos, &offset,
7667 &mode1, &unsignedp, &volatilep, false);
7668 break;
7669 }
7670
7671 /* We must have made progress. */
7672 gcc_assert (inner != exp);
7673
7674 subtarget = offset || bitpos ? NULL_RTX : target;
7675 /* For VIEW_CONVERT_EXPR, where the outer alignment is bigger than
7676 inner alignment, force the inner to be sufficiently aligned. */
7677 if (CONSTANT_CLASS_P (inner)
7678 && TYPE_ALIGN (TREE_TYPE (inner)) < TYPE_ALIGN (TREE_TYPE (exp)))
7679 {
7680 inner = copy_node (inner);
7681 TREE_TYPE (inner) = copy_node (TREE_TYPE (inner));
7682 TYPE_ALIGN (TREE_TYPE (inner)) = TYPE_ALIGN (TREE_TYPE (exp));
7683 TYPE_USER_ALIGN (TREE_TYPE (inner)) = 1;
7684 }
7685 result = expand_expr_addr_expr_1 (inner, subtarget, tmode, modifier, as);
7686
7687 if (offset)
7688 {
7689 rtx tmp;
7690
7691 if (modifier != EXPAND_NORMAL)
7692 result = force_operand (result, NULL);
7693 tmp = expand_expr (offset, NULL_RTX, tmode,
7694 modifier == EXPAND_INITIALIZER
7695 ? EXPAND_INITIALIZER : EXPAND_NORMAL);
7696
7697 result = convert_memory_address_addr_space (tmode, result, as);
7698 tmp = convert_memory_address_addr_space (tmode, tmp, as);
7699
7700 if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
7701 result = simplify_gen_binary (PLUS, tmode, result, tmp);
7702 else
7703 {
7704 subtarget = bitpos ? NULL_RTX : target;
7705 result = expand_simple_binop (tmode, PLUS, result, tmp, subtarget,
7706 1, OPTAB_LIB_WIDEN);
7707 }
7708 }
7709
7710 if (bitpos)
7711 {
7712 /* Someone beforehand should have rejected taking the address
7713 of such an object. */
7714 gcc_assert ((bitpos % BITS_PER_UNIT) == 0);
7715
7716 result = convert_memory_address_addr_space (tmode, result, as);
7717 result = plus_constant (tmode, result, bitpos / BITS_PER_UNIT);
7718 if (modifier < EXPAND_SUM)
7719 result = force_operand (result, target);
7720 }
7721
7722 return result;
7723 }
7724
7725 /* A subroutine of expand_expr. Evaluate EXP, which is an ADDR_EXPR.
7726 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
7727
7728 static rtx
7729 expand_expr_addr_expr (tree exp, rtx target, enum machine_mode tmode,
7730 enum expand_modifier modifier)
7731 {
7732 addr_space_t as = ADDR_SPACE_GENERIC;
7733 enum machine_mode address_mode = Pmode;
7734 enum machine_mode pointer_mode = ptr_mode;
7735 enum machine_mode rmode;
7736 rtx result;
7737
7738 /* Target mode of VOIDmode says "whatever's natural". */
7739 if (tmode == VOIDmode)
7740 tmode = TYPE_MODE (TREE_TYPE (exp));
7741
7742 if (POINTER_TYPE_P (TREE_TYPE (exp)))
7743 {
7744 as = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (exp)));
7745 address_mode = targetm.addr_space.address_mode (as);
7746 pointer_mode = targetm.addr_space.pointer_mode (as);
7747 }
7748
7749 /* We can get called with some Weird Things if the user does silliness
7750 like "(short) &a". In that case, convert_memory_address won't do
7751 the right thing, so ignore the given target mode. */
7752 if (tmode != address_mode && tmode != pointer_mode)
7753 tmode = address_mode;
7754
7755 result = expand_expr_addr_expr_1 (TREE_OPERAND (exp, 0), target,
7756 tmode, modifier, as);
7757
7758 /* Despite expand_expr claims concerning ignoring TMODE when not
7759 strictly convenient, stuff breaks if we don't honor it. Note
7760 that combined with the above, we only do this for pointer modes. */
7761 rmode = GET_MODE (result);
7762 if (rmode == VOIDmode)
7763 rmode = tmode;
7764 if (rmode != tmode)
7765 result = convert_memory_address_addr_space (tmode, result, as);
7766
7767 return result;
7768 }
7769
7770 /* Generate code for computing CONSTRUCTOR EXP.
7771 An rtx for the computed value is returned. If AVOID_TEMP_MEM
7772 is TRUE, instead of creating a temporary variable in memory
7773 NULL is returned and the caller needs to handle it differently. */
7774
7775 static rtx
7776 expand_constructor (tree exp, rtx target, enum expand_modifier modifier,
7777 bool avoid_temp_mem)
7778 {
7779 tree type = TREE_TYPE (exp);
7780 enum machine_mode mode = TYPE_MODE (type);
7781
7782 /* Try to avoid creating a temporary at all. This is possible
7783 if all of the initializer is zero.
7784 FIXME: try to handle all [0..255] initializers we can handle
7785 with memset. */
7786 if (TREE_STATIC (exp)
7787 && !TREE_ADDRESSABLE (exp)
7788 && target != 0 && mode == BLKmode
7789 && all_zeros_p (exp))
7790 {
7791 clear_storage (target, expr_size (exp), BLOCK_OP_NORMAL);
7792 return target;
7793 }
7794
7795 /* All elts simple constants => refer to a constant in memory. But
7796 if this is a non-BLKmode mode, let it store a field at a time
7797 since that should make a CONST_INT or CONST_DOUBLE when we
7798 fold. Likewise, if we have a target we can use, it is best to
7799 store directly into the target unless the type is large enough
7800 that memcpy will be used. If we are making an initializer and
7801 all operands are constant, put it in memory as well.
7802
7803 FIXME: Avoid trying to fill vector constructors piece-meal.
7804 Output them with output_constant_def below unless we're sure
7805 they're zeros. This should go away when vector initializers
7806 are treated like VECTOR_CST instead of arrays. */
7807 if ((TREE_STATIC (exp)
7808 && ((mode == BLKmode
7809 && ! (target != 0 && safe_from_p (target, exp, 1)))
7810 || TREE_ADDRESSABLE (exp)
7811 || (tree_fits_uhwi_p (TYPE_SIZE_UNIT (type))
7812 && (! MOVE_BY_PIECES_P
7813 (tree_to_uhwi (TYPE_SIZE_UNIT (type)),
7814 TYPE_ALIGN (type)))
7815 && ! mostly_zeros_p (exp))))
7816 || ((modifier == EXPAND_INITIALIZER || modifier == EXPAND_CONST_ADDRESS)
7817 && TREE_CONSTANT (exp)))
7818 {
7819 rtx constructor;
7820
7821 if (avoid_temp_mem)
7822 return NULL_RTX;
7823
7824 constructor = expand_expr_constant (exp, 1, modifier);
7825
7826 if (modifier != EXPAND_CONST_ADDRESS
7827 && modifier != EXPAND_INITIALIZER
7828 && modifier != EXPAND_SUM)
7829 constructor = validize_mem (constructor);
7830
7831 return constructor;
7832 }
7833
7834 /* Handle calls that pass values in multiple non-contiguous
7835 locations. The Irix 6 ABI has examples of this. */
7836 if (target == 0 || ! safe_from_p (target, exp, 1)
7837 || GET_CODE (target) == PARALLEL || modifier == EXPAND_STACK_PARM)
7838 {
7839 if (avoid_temp_mem)
7840 return NULL_RTX;
7841
7842 target
7843 = assign_temp (build_qualified_type (type, (TYPE_QUALS (type)
7844 | (TREE_READONLY (exp)
7845 * TYPE_QUAL_CONST))),
7846 TREE_ADDRESSABLE (exp), 1);
7847 }
7848
7849 store_constructor (exp, target, 0, int_expr_size (exp));
7850 return target;
7851 }
7852
7853
7854 /* expand_expr: generate code for computing expression EXP.
7855 An rtx for the computed value is returned. The value is never null.
7856 In the case of a void EXP, const0_rtx is returned.
7857
7858 The value may be stored in TARGET if TARGET is nonzero.
7859 TARGET is just a suggestion; callers must assume that
7860 the rtx returned may not be the same as TARGET.
7861
7862 If TARGET is CONST0_RTX, it means that the value will be ignored.
7863
7864 If TMODE is not VOIDmode, it suggests generating the
7865 result in mode TMODE. But this is done only when convenient.
7866 Otherwise, TMODE is ignored and the value generated in its natural mode.
7867 TMODE is just a suggestion; callers must assume that
7868 the rtx returned may not have mode TMODE.
7869
7870 Note that TARGET may have neither TMODE nor MODE. In that case, it
7871 probably will not be used.
7872
7873 If MODIFIER is EXPAND_SUM then when EXP is an addition
7874 we can return an rtx of the form (MULT (REG ...) (CONST_INT ...))
7875 or a nest of (PLUS ...) and (MINUS ...) where the terms are
7876 products as above, or REG or MEM, or constant.
7877 Ordinarily in such cases we would output mul or add instructions
7878 and then return a pseudo reg containing the sum.
7879
7880 EXPAND_INITIALIZER is much like EXPAND_SUM except that
7881 it also marks a label as absolutely required (it can't be dead).
7882 It also makes a ZERO_EXTEND or SIGN_EXTEND instead of emitting extend insns.
7883 This is used for outputting expressions used in initializers.
7884
7885 EXPAND_CONST_ADDRESS says that it is okay to return a MEM
7886 with a constant address even if that address is not normally legitimate.
7887 EXPAND_INITIALIZER and EXPAND_SUM also have this effect.
7888
7889 EXPAND_STACK_PARM is used when expanding to a TARGET on the stack for
7890 a call parameter. Such targets require special care as we haven't yet
7891 marked TARGET so that it's safe from being trashed by libcalls. We
7892 don't want to use TARGET for anything but the final result;
7893 Intermediate values must go elsewhere. Additionally, calls to
7894 emit_block_move will be flagged with BLOCK_OP_CALL_PARM.
7895
7896 If EXP is a VAR_DECL whose DECL_RTL was a MEM with an invalid
7897 address, and ALT_RTL is non-NULL, then *ALT_RTL is set to the
7898 DECL_RTL of the VAR_DECL. *ALT_RTL is also set if EXP is a
7899 COMPOUND_EXPR whose second argument is such a VAR_DECL, and so on
7900 recursively. */
7901
7902 rtx
7903 expand_expr_real (tree exp, rtx target, enum machine_mode tmode,
7904 enum expand_modifier modifier, rtx *alt_rtl)
7905 {
7906 rtx ret;
7907
7908 /* Handle ERROR_MARK before anybody tries to access its type. */
7909 if (TREE_CODE (exp) == ERROR_MARK
7910 || (TREE_CODE (TREE_TYPE (exp)) == ERROR_MARK))
7911 {
7912 ret = CONST0_RTX (tmode);
7913 return ret ? ret : const0_rtx;
7914 }
7915
7916 ret = expand_expr_real_1 (exp, target, tmode, modifier, alt_rtl);
7917 return ret;
7918 }
7919
7920 /* Try to expand the conditional expression which is represented by
7921 TREEOP0 ? TREEOP1 : TREEOP2 using conditonal moves. If succeseds
7922 return the rtl reg which repsents the result. Otherwise return
7923 NULL_RTL. */
7924
7925 static rtx
7926 expand_cond_expr_using_cmove (tree treeop0 ATTRIBUTE_UNUSED,
7927 tree treeop1 ATTRIBUTE_UNUSED,
7928 tree treeop2 ATTRIBUTE_UNUSED)
7929 {
7930 #ifdef HAVE_conditional_move
7931 rtx insn;
7932 rtx op00, op01, op1, op2;
7933 enum rtx_code comparison_code;
7934 enum machine_mode comparison_mode;
7935 gimple srcstmt;
7936 rtx temp;
7937 tree type = TREE_TYPE (treeop1);
7938 int unsignedp = TYPE_UNSIGNED (type);
7939 enum machine_mode mode = TYPE_MODE (type);
7940 enum machine_mode orig_mode = mode;
7941
7942 /* If we cannot do a conditional move on the mode, try doing it
7943 with the promoted mode. */
7944 if (!can_conditionally_move_p (mode))
7945 {
7946 mode = promote_mode (type, mode, &unsignedp);
7947 if (!can_conditionally_move_p (mode))
7948 return NULL_RTX;
7949 temp = assign_temp (type, 0, 0); /* Use promoted mode for temp. */
7950 }
7951 else
7952 temp = assign_temp (type, 0, 1);
7953
7954 start_sequence ();
7955 expand_operands (treeop1, treeop2,
7956 temp, &op1, &op2, EXPAND_NORMAL);
7957
7958 if (TREE_CODE (treeop0) == SSA_NAME
7959 && (srcstmt = get_def_for_expr_class (treeop0, tcc_comparison)))
7960 {
7961 tree type = TREE_TYPE (gimple_assign_rhs1 (srcstmt));
7962 enum tree_code cmpcode = gimple_assign_rhs_code (srcstmt);
7963 op00 = expand_normal (gimple_assign_rhs1 (srcstmt));
7964 op01 = expand_normal (gimple_assign_rhs2 (srcstmt));
7965 comparison_mode = TYPE_MODE (type);
7966 unsignedp = TYPE_UNSIGNED (type);
7967 comparison_code = convert_tree_comp_to_rtx (cmpcode, unsignedp);
7968 }
7969 else if (TREE_CODE_CLASS (TREE_CODE (treeop0)) == tcc_comparison)
7970 {
7971 tree type = TREE_TYPE (TREE_OPERAND (treeop0, 0));
7972 enum tree_code cmpcode = TREE_CODE (treeop0);
7973 op00 = expand_normal (TREE_OPERAND (treeop0, 0));
7974 op01 = expand_normal (TREE_OPERAND (treeop0, 1));
7975 unsignedp = TYPE_UNSIGNED (type);
7976 comparison_mode = TYPE_MODE (type);
7977 comparison_code = convert_tree_comp_to_rtx (cmpcode, unsignedp);
7978 }
7979 else
7980 {
7981 op00 = expand_normal (treeop0);
7982 op01 = const0_rtx;
7983 comparison_code = NE;
7984 comparison_mode = TYPE_MODE (TREE_TYPE (treeop0));
7985 }
7986
7987 if (GET_MODE (op1) != mode)
7988 op1 = gen_lowpart (mode, op1);
7989
7990 if (GET_MODE (op2) != mode)
7991 op2 = gen_lowpart (mode, op2);
7992
7993 /* Try to emit the conditional move. */
7994 insn = emit_conditional_move (temp, comparison_code,
7995 op00, op01, comparison_mode,
7996 op1, op2, mode,
7997 unsignedp);
7998
7999 /* If we could do the conditional move, emit the sequence,
8000 and return. */
8001 if (insn)
8002 {
8003 rtx seq = get_insns ();
8004 end_sequence ();
8005 emit_insn (seq);
8006 return convert_modes (orig_mode, mode, temp, 0);
8007 }
8008
8009 /* Otherwise discard the sequence and fall back to code with
8010 branches. */
8011 end_sequence ();
8012 #endif
8013 return NULL_RTX;
8014 }
8015
8016 rtx
8017 expand_expr_real_2 (sepops ops, rtx target, enum machine_mode tmode,
8018 enum expand_modifier modifier)
8019 {
8020 rtx op0, op1, op2, temp;
8021 tree type;
8022 int unsignedp;
8023 enum machine_mode mode;
8024 enum tree_code code = ops->code;
8025 optab this_optab;
8026 rtx subtarget, original_target;
8027 int ignore;
8028 bool reduce_bit_field;
8029 location_t loc = ops->location;
8030 tree treeop0, treeop1, treeop2;
8031 #define REDUCE_BIT_FIELD(expr) (reduce_bit_field \
8032 ? reduce_to_bit_field_precision ((expr), \
8033 target, \
8034 type) \
8035 : (expr))
8036
8037 type = ops->type;
8038 mode = TYPE_MODE (type);
8039 unsignedp = TYPE_UNSIGNED (type);
8040
8041 treeop0 = ops->op0;
8042 treeop1 = ops->op1;
8043 treeop2 = ops->op2;
8044
8045 /* We should be called only on simple (binary or unary) expressions,
8046 exactly those that are valid in gimple expressions that aren't
8047 GIMPLE_SINGLE_RHS (or invalid). */
8048 gcc_assert (get_gimple_rhs_class (code) == GIMPLE_UNARY_RHS
8049 || get_gimple_rhs_class (code) == GIMPLE_BINARY_RHS
8050 || get_gimple_rhs_class (code) == GIMPLE_TERNARY_RHS);
8051
8052 ignore = (target == const0_rtx
8053 || ((CONVERT_EXPR_CODE_P (code)
8054 || code == COND_EXPR || code == VIEW_CONVERT_EXPR)
8055 && TREE_CODE (type) == VOID_TYPE));
8056
8057 /* We should be called only if we need the result. */
8058 gcc_assert (!ignore);
8059
8060 /* An operation in what may be a bit-field type needs the
8061 result to be reduced to the precision of the bit-field type,
8062 which is narrower than that of the type's mode. */
8063 reduce_bit_field = (INTEGRAL_TYPE_P (type)
8064 && GET_MODE_PRECISION (mode) > TYPE_PRECISION (type));
8065
8066 if (reduce_bit_field && modifier == EXPAND_STACK_PARM)
8067 target = 0;
8068
8069 /* Use subtarget as the target for operand 0 of a binary operation. */
8070 subtarget = get_subtarget (target);
8071 original_target = target;
8072
8073 switch (code)
8074 {
8075 case NON_LVALUE_EXPR:
8076 case PAREN_EXPR:
8077 CASE_CONVERT:
8078 if (treeop0 == error_mark_node)
8079 return const0_rtx;
8080
8081 if (TREE_CODE (type) == UNION_TYPE)
8082 {
8083 tree valtype = TREE_TYPE (treeop0);
8084
8085 /* If both input and output are BLKmode, this conversion isn't doing
8086 anything except possibly changing memory attribute. */
8087 if (mode == BLKmode && TYPE_MODE (valtype) == BLKmode)
8088 {
8089 rtx result = expand_expr (treeop0, target, tmode,
8090 modifier);
8091
8092 result = copy_rtx (result);
8093 set_mem_attributes (result, type, 0);
8094 return result;
8095 }
8096
8097 if (target == 0)
8098 {
8099 if (TYPE_MODE (type) != BLKmode)
8100 target = gen_reg_rtx (TYPE_MODE (type));
8101 else
8102 target = assign_temp (type, 1, 1);
8103 }
8104
8105 if (MEM_P (target))
8106 /* Store data into beginning of memory target. */
8107 store_expr (treeop0,
8108 adjust_address (target, TYPE_MODE (valtype), 0),
8109 modifier == EXPAND_STACK_PARM,
8110 false);
8111
8112 else
8113 {
8114 gcc_assert (REG_P (target));
8115
8116 /* Store this field into a union of the proper type. */
8117 store_field (target,
8118 MIN ((int_size_in_bytes (TREE_TYPE
8119 (treeop0))
8120 * BITS_PER_UNIT),
8121 (HOST_WIDE_INT) GET_MODE_BITSIZE (mode)),
8122 0, 0, 0, TYPE_MODE (valtype), treeop0, 0, false);
8123 }
8124
8125 /* Return the entire union. */
8126 return target;
8127 }
8128
8129 if (mode == TYPE_MODE (TREE_TYPE (treeop0)))
8130 {
8131 op0 = expand_expr (treeop0, target, VOIDmode,
8132 modifier);
8133
8134 /* If the signedness of the conversion differs and OP0 is
8135 a promoted SUBREG, clear that indication since we now
8136 have to do the proper extension. */
8137 if (TYPE_UNSIGNED (TREE_TYPE (treeop0)) != unsignedp
8138 && GET_CODE (op0) == SUBREG)
8139 SUBREG_PROMOTED_VAR_P (op0) = 0;
8140
8141 return REDUCE_BIT_FIELD (op0);
8142 }
8143
8144 op0 = expand_expr (treeop0, NULL_RTX, mode,
8145 modifier == EXPAND_SUM ? EXPAND_NORMAL : modifier);
8146 if (GET_MODE (op0) == mode)
8147 ;
8148
8149 /* If OP0 is a constant, just convert it into the proper mode. */
8150 else if (CONSTANT_P (op0))
8151 {
8152 tree inner_type = TREE_TYPE (treeop0);
8153 enum machine_mode inner_mode = GET_MODE (op0);
8154
8155 if (inner_mode == VOIDmode)
8156 inner_mode = TYPE_MODE (inner_type);
8157
8158 if (modifier == EXPAND_INITIALIZER)
8159 op0 = simplify_gen_subreg (mode, op0, inner_mode,
8160 subreg_lowpart_offset (mode,
8161 inner_mode));
8162 else
8163 op0= convert_modes (mode, inner_mode, op0,
8164 TYPE_UNSIGNED (inner_type));
8165 }
8166
8167 else if (modifier == EXPAND_INITIALIZER)
8168 op0 = gen_rtx_fmt_e (unsignedp ? ZERO_EXTEND : SIGN_EXTEND, mode, op0);
8169
8170 else if (target == 0)
8171 op0 = convert_to_mode (mode, op0,
8172 TYPE_UNSIGNED (TREE_TYPE
8173 (treeop0)));
8174 else
8175 {
8176 convert_move (target, op0,
8177 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
8178 op0 = target;
8179 }
8180
8181 return REDUCE_BIT_FIELD (op0);
8182
8183 case ADDR_SPACE_CONVERT_EXPR:
8184 {
8185 tree treeop0_type = TREE_TYPE (treeop0);
8186 addr_space_t as_to;
8187 addr_space_t as_from;
8188
8189 gcc_assert (POINTER_TYPE_P (type));
8190 gcc_assert (POINTER_TYPE_P (treeop0_type));
8191
8192 as_to = TYPE_ADDR_SPACE (TREE_TYPE (type));
8193 as_from = TYPE_ADDR_SPACE (TREE_TYPE (treeop0_type));
8194
8195 /* Conversions between pointers to the same address space should
8196 have been implemented via CONVERT_EXPR / NOP_EXPR. */
8197 gcc_assert (as_to != as_from);
8198
8199 /* Ask target code to handle conversion between pointers
8200 to overlapping address spaces. */
8201 if (targetm.addr_space.subset_p (as_to, as_from)
8202 || targetm.addr_space.subset_p (as_from, as_to))
8203 {
8204 op0 = expand_expr (treeop0, NULL_RTX, VOIDmode, modifier);
8205 op0 = targetm.addr_space.convert (op0, treeop0_type, type);
8206 gcc_assert (op0);
8207 return op0;
8208 }
8209
8210 /* For disjoint address spaces, converting anything but
8211 a null pointer invokes undefined behaviour. We simply
8212 always return a null pointer here. */
8213 return CONST0_RTX (mode);
8214 }
8215
8216 case POINTER_PLUS_EXPR:
8217 /* Even though the sizetype mode and the pointer's mode can be different
8218 expand is able to handle this correctly and get the correct result out
8219 of the PLUS_EXPR code. */
8220 /* Make sure to sign-extend the sizetype offset in a POINTER_PLUS_EXPR
8221 if sizetype precision is smaller than pointer precision. */
8222 if (TYPE_PRECISION (sizetype) < TYPE_PRECISION (type))
8223 treeop1 = fold_convert_loc (loc, type,
8224 fold_convert_loc (loc, ssizetype,
8225 treeop1));
8226 /* If sizetype precision is larger than pointer precision, truncate the
8227 offset to have matching modes. */
8228 else if (TYPE_PRECISION (sizetype) > TYPE_PRECISION (type))
8229 treeop1 = fold_convert_loc (loc, type, treeop1);
8230
8231 case PLUS_EXPR:
8232 /* If we are adding a constant, a VAR_DECL that is sp, fp, or ap, and
8233 something else, make sure we add the register to the constant and
8234 then to the other thing. This case can occur during strength
8235 reduction and doing it this way will produce better code if the
8236 frame pointer or argument pointer is eliminated.
8237
8238 fold-const.c will ensure that the constant is always in the inner
8239 PLUS_EXPR, so the only case we need to do anything about is if
8240 sp, ap, or fp is our second argument, in which case we must swap
8241 the innermost first argument and our second argument. */
8242
8243 if (TREE_CODE (treeop0) == PLUS_EXPR
8244 && TREE_CODE (TREE_OPERAND (treeop0, 1)) == INTEGER_CST
8245 && TREE_CODE (treeop1) == VAR_DECL
8246 && (DECL_RTL (treeop1) == frame_pointer_rtx
8247 || DECL_RTL (treeop1) == stack_pointer_rtx
8248 || DECL_RTL (treeop1) == arg_pointer_rtx))
8249 {
8250 gcc_unreachable ();
8251 }
8252
8253 /* If the result is to be ptr_mode and we are adding an integer to
8254 something, we might be forming a constant. So try to use
8255 plus_constant. If it produces a sum and we can't accept it,
8256 use force_operand. This allows P = &ARR[const] to generate
8257 efficient code on machines where a SYMBOL_REF is not a valid
8258 address.
8259
8260 If this is an EXPAND_SUM call, always return the sum. */
8261 if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER
8262 || (mode == ptr_mode && (unsignedp || ! flag_trapv)))
8263 {
8264 if (modifier == EXPAND_STACK_PARM)
8265 target = 0;
8266 if (TREE_CODE (treeop0) == INTEGER_CST
8267 && GET_MODE_PRECISION (mode) <= HOST_BITS_PER_WIDE_INT
8268 && TREE_CONSTANT (treeop1))
8269 {
8270 rtx constant_part;
8271
8272 op1 = expand_expr (treeop1, subtarget, VOIDmode,
8273 EXPAND_SUM);
8274 /* Use immed_double_const to ensure that the constant is
8275 truncated according to the mode of OP1, then sign extended
8276 to a HOST_WIDE_INT. Using the constant directly can result
8277 in non-canonical RTL in a 64x32 cross compile. */
8278 constant_part
8279 = immed_double_const (TREE_INT_CST_LOW (treeop0),
8280 (HOST_WIDE_INT) 0,
8281 TYPE_MODE (TREE_TYPE (treeop1)));
8282 op1 = plus_constant (mode, op1, INTVAL (constant_part));
8283 if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8284 op1 = force_operand (op1, target);
8285 return REDUCE_BIT_FIELD (op1);
8286 }
8287
8288 else if (TREE_CODE (treeop1) == INTEGER_CST
8289 && GET_MODE_PRECISION (mode) <= HOST_BITS_PER_WIDE_INT
8290 && TREE_CONSTANT (treeop0))
8291 {
8292 rtx constant_part;
8293
8294 op0 = expand_expr (treeop0, subtarget, VOIDmode,
8295 (modifier == EXPAND_INITIALIZER
8296 ? EXPAND_INITIALIZER : EXPAND_SUM));
8297 if (! CONSTANT_P (op0))
8298 {
8299 op1 = expand_expr (treeop1, NULL_RTX,
8300 VOIDmode, modifier);
8301 /* Return a PLUS if modifier says it's OK. */
8302 if (modifier == EXPAND_SUM
8303 || modifier == EXPAND_INITIALIZER)
8304 return simplify_gen_binary (PLUS, mode, op0, op1);
8305 goto binop2;
8306 }
8307 /* Use immed_double_const to ensure that the constant is
8308 truncated according to the mode of OP1, then sign extended
8309 to a HOST_WIDE_INT. Using the constant directly can result
8310 in non-canonical RTL in a 64x32 cross compile. */
8311 constant_part
8312 = immed_double_const (TREE_INT_CST_LOW (treeop1),
8313 (HOST_WIDE_INT) 0,
8314 TYPE_MODE (TREE_TYPE (treeop0)));
8315 op0 = plus_constant (mode, op0, INTVAL (constant_part));
8316 if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8317 op0 = force_operand (op0, target);
8318 return REDUCE_BIT_FIELD (op0);
8319 }
8320 }
8321
8322 /* Use TER to expand pointer addition of a negated value
8323 as pointer subtraction. */
8324 if ((POINTER_TYPE_P (TREE_TYPE (treeop0))
8325 || (TREE_CODE (TREE_TYPE (treeop0)) == VECTOR_TYPE
8326 && POINTER_TYPE_P (TREE_TYPE (TREE_TYPE (treeop0)))))
8327 && TREE_CODE (treeop1) == SSA_NAME
8328 && TYPE_MODE (TREE_TYPE (treeop0))
8329 == TYPE_MODE (TREE_TYPE (treeop1)))
8330 {
8331 gimple def = get_def_for_expr (treeop1, NEGATE_EXPR);
8332 if (def)
8333 {
8334 treeop1 = gimple_assign_rhs1 (def);
8335 code = MINUS_EXPR;
8336 goto do_minus;
8337 }
8338 }
8339
8340 /* No sense saving up arithmetic to be done
8341 if it's all in the wrong mode to form part of an address.
8342 And force_operand won't know whether to sign-extend or
8343 zero-extend. */
8344 if ((modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8345 || mode != ptr_mode)
8346 {
8347 expand_operands (treeop0, treeop1,
8348 subtarget, &op0, &op1, EXPAND_NORMAL);
8349 if (op0 == const0_rtx)
8350 return op1;
8351 if (op1 == const0_rtx)
8352 return op0;
8353 goto binop2;
8354 }
8355
8356 expand_operands (treeop0, treeop1,
8357 subtarget, &op0, &op1, modifier);
8358 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1));
8359
8360 case MINUS_EXPR:
8361 do_minus:
8362 /* For initializers, we are allowed to return a MINUS of two
8363 symbolic constants. Here we handle all cases when both operands
8364 are constant. */
8365 /* Handle difference of two symbolic constants,
8366 for the sake of an initializer. */
8367 if ((modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
8368 && really_constant_p (treeop0)
8369 && really_constant_p (treeop1))
8370 {
8371 expand_operands (treeop0, treeop1,
8372 NULL_RTX, &op0, &op1, modifier);
8373
8374 /* If the last operand is a CONST_INT, use plus_constant of
8375 the negated constant. Else make the MINUS. */
8376 if (CONST_INT_P (op1))
8377 return REDUCE_BIT_FIELD (plus_constant (mode, op0,
8378 -INTVAL (op1)));
8379 else
8380 return REDUCE_BIT_FIELD (gen_rtx_MINUS (mode, op0, op1));
8381 }
8382
8383 /* No sense saving up arithmetic to be done
8384 if it's all in the wrong mode to form part of an address.
8385 And force_operand won't know whether to sign-extend or
8386 zero-extend. */
8387 if ((modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8388 || mode != ptr_mode)
8389 goto binop;
8390
8391 expand_operands (treeop0, treeop1,
8392 subtarget, &op0, &op1, modifier);
8393
8394 /* Convert A - const to A + (-const). */
8395 if (CONST_INT_P (op1))
8396 {
8397 op1 = negate_rtx (mode, op1);
8398 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1));
8399 }
8400
8401 goto binop2;
8402
8403 case WIDEN_MULT_PLUS_EXPR:
8404 case WIDEN_MULT_MINUS_EXPR:
8405 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8406 op2 = expand_normal (treeop2);
8407 target = expand_widen_pattern_expr (ops, op0, op1, op2,
8408 target, unsignedp);
8409 return target;
8410
8411 case WIDEN_MULT_EXPR:
8412 /* If first operand is constant, swap them.
8413 Thus the following special case checks need only
8414 check the second operand. */
8415 if (TREE_CODE (treeop0) == INTEGER_CST)
8416 {
8417 tree t1 = treeop0;
8418 treeop0 = treeop1;
8419 treeop1 = t1;
8420 }
8421
8422 /* First, check if we have a multiplication of one signed and one
8423 unsigned operand. */
8424 if (TREE_CODE (treeop1) != INTEGER_CST
8425 && (TYPE_UNSIGNED (TREE_TYPE (treeop0))
8426 != TYPE_UNSIGNED (TREE_TYPE (treeop1))))
8427 {
8428 enum machine_mode innermode = TYPE_MODE (TREE_TYPE (treeop0));
8429 this_optab = usmul_widen_optab;
8430 if (find_widening_optab_handler (this_optab, mode, innermode, 0)
8431 != CODE_FOR_nothing)
8432 {
8433 if (TYPE_UNSIGNED (TREE_TYPE (treeop0)))
8434 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1,
8435 EXPAND_NORMAL);
8436 else
8437 expand_operands (treeop0, treeop1, NULL_RTX, &op1, &op0,
8438 EXPAND_NORMAL);
8439 /* op0 and op1 might still be constant, despite the above
8440 != INTEGER_CST check. Handle it. */
8441 if (GET_MODE (op0) == VOIDmode && GET_MODE (op1) == VOIDmode)
8442 {
8443 op0 = convert_modes (innermode, mode, op0, true);
8444 op1 = convert_modes (innermode, mode, op1, false);
8445 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1,
8446 target, unsignedp));
8447 }
8448 goto binop3;
8449 }
8450 }
8451 /* Check for a multiplication with matching signedness. */
8452 else if ((TREE_CODE (treeop1) == INTEGER_CST
8453 && int_fits_type_p (treeop1, TREE_TYPE (treeop0)))
8454 || (TYPE_UNSIGNED (TREE_TYPE (treeop1))
8455 == TYPE_UNSIGNED (TREE_TYPE (treeop0))))
8456 {
8457 tree op0type = TREE_TYPE (treeop0);
8458 enum machine_mode innermode = TYPE_MODE (op0type);
8459 bool zextend_p = TYPE_UNSIGNED (op0type);
8460 optab other_optab = zextend_p ? smul_widen_optab : umul_widen_optab;
8461 this_optab = zextend_p ? umul_widen_optab : smul_widen_optab;
8462
8463 if (TREE_CODE (treeop0) != INTEGER_CST)
8464 {
8465 if (find_widening_optab_handler (this_optab, mode, innermode, 0)
8466 != CODE_FOR_nothing)
8467 {
8468 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1,
8469 EXPAND_NORMAL);
8470 /* op0 and op1 might still be constant, despite the above
8471 != INTEGER_CST check. Handle it. */
8472 if (GET_MODE (op0) == VOIDmode && GET_MODE (op1) == VOIDmode)
8473 {
8474 widen_mult_const:
8475 op0 = convert_modes (innermode, mode, op0, zextend_p);
8476 op1
8477 = convert_modes (innermode, mode, op1,
8478 TYPE_UNSIGNED (TREE_TYPE (treeop1)));
8479 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1,
8480 target,
8481 unsignedp));
8482 }
8483 temp = expand_widening_mult (mode, op0, op1, target,
8484 unsignedp, this_optab);
8485 return REDUCE_BIT_FIELD (temp);
8486 }
8487 if (find_widening_optab_handler (other_optab, mode, innermode, 0)
8488 != CODE_FOR_nothing
8489 && innermode == word_mode)
8490 {
8491 rtx htem, hipart;
8492 op0 = expand_normal (treeop0);
8493 if (TREE_CODE (treeop1) == INTEGER_CST)
8494 op1 = convert_modes (innermode, mode,
8495 expand_normal (treeop1),
8496 TYPE_UNSIGNED (TREE_TYPE (treeop1)));
8497 else
8498 op1 = expand_normal (treeop1);
8499 /* op0 and op1 might still be constant, despite the above
8500 != INTEGER_CST check. Handle it. */
8501 if (GET_MODE (op0) == VOIDmode && GET_MODE (op1) == VOIDmode)
8502 goto widen_mult_const;
8503 temp = expand_binop (mode, other_optab, op0, op1, target,
8504 unsignedp, OPTAB_LIB_WIDEN);
8505 hipart = gen_highpart (innermode, temp);
8506 htem = expand_mult_highpart_adjust (innermode, hipart,
8507 op0, op1, hipart,
8508 zextend_p);
8509 if (htem != hipart)
8510 emit_move_insn (hipart, htem);
8511 return REDUCE_BIT_FIELD (temp);
8512 }
8513 }
8514 }
8515 treeop0 = fold_build1 (CONVERT_EXPR, type, treeop0);
8516 treeop1 = fold_build1 (CONVERT_EXPR, type, treeop1);
8517 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
8518 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, target, unsignedp));
8519
8520 case FMA_EXPR:
8521 {
8522 optab opt = fma_optab;
8523 gimple def0, def2;
8524
8525 /* If there is no insn for FMA, emit it as __builtin_fma{,f,l}
8526 call. */
8527 if (optab_handler (fma_optab, mode) == CODE_FOR_nothing)
8528 {
8529 tree fn = mathfn_built_in (TREE_TYPE (treeop0), BUILT_IN_FMA);
8530 tree call_expr;
8531
8532 gcc_assert (fn != NULL_TREE);
8533 call_expr = build_call_expr (fn, 3, treeop0, treeop1, treeop2);
8534 return expand_builtin (call_expr, target, subtarget, mode, false);
8535 }
8536
8537 def0 = get_def_for_expr (treeop0, NEGATE_EXPR);
8538 def2 = get_def_for_expr (treeop2, NEGATE_EXPR);
8539
8540 op0 = op2 = NULL;
8541
8542 if (def0 && def2
8543 && optab_handler (fnms_optab, mode) != CODE_FOR_nothing)
8544 {
8545 opt = fnms_optab;
8546 op0 = expand_normal (gimple_assign_rhs1 (def0));
8547 op2 = expand_normal (gimple_assign_rhs1 (def2));
8548 }
8549 else if (def0
8550 && optab_handler (fnma_optab, mode) != CODE_FOR_nothing)
8551 {
8552 opt = fnma_optab;
8553 op0 = expand_normal (gimple_assign_rhs1 (def0));
8554 }
8555 else if (def2
8556 && optab_handler (fms_optab, mode) != CODE_FOR_nothing)
8557 {
8558 opt = fms_optab;
8559 op2 = expand_normal (gimple_assign_rhs1 (def2));
8560 }
8561
8562 if (op0 == NULL)
8563 op0 = expand_expr (treeop0, subtarget, VOIDmode, EXPAND_NORMAL);
8564 if (op2 == NULL)
8565 op2 = expand_normal (treeop2);
8566 op1 = expand_normal (treeop1);
8567
8568 return expand_ternary_op (TYPE_MODE (type), opt,
8569 op0, op1, op2, target, 0);
8570 }
8571
8572 case MULT_EXPR:
8573 /* If this is a fixed-point operation, then we cannot use the code
8574 below because "expand_mult" doesn't support sat/no-sat fixed-point
8575 multiplications. */
8576 if (ALL_FIXED_POINT_MODE_P (mode))
8577 goto binop;
8578
8579 /* If first operand is constant, swap them.
8580 Thus the following special case checks need only
8581 check the second operand. */
8582 if (TREE_CODE (treeop0) == INTEGER_CST)
8583 {
8584 tree t1 = treeop0;
8585 treeop0 = treeop1;
8586 treeop1 = t1;
8587 }
8588
8589 /* Attempt to return something suitable for generating an
8590 indexed address, for machines that support that. */
8591
8592 if (modifier == EXPAND_SUM && mode == ptr_mode
8593 && tree_fits_shwi_p (treeop1))
8594 {
8595 tree exp1 = treeop1;
8596
8597 op0 = expand_expr (treeop0, subtarget, VOIDmode,
8598 EXPAND_SUM);
8599
8600 if (!REG_P (op0))
8601 op0 = force_operand (op0, NULL_RTX);
8602 if (!REG_P (op0))
8603 op0 = copy_to_mode_reg (mode, op0);
8604
8605 return REDUCE_BIT_FIELD (gen_rtx_MULT (mode, op0,
8606 gen_int_mode (tree_to_shwi (exp1),
8607 TYPE_MODE (TREE_TYPE (exp1)))));
8608 }
8609
8610 if (modifier == EXPAND_STACK_PARM)
8611 target = 0;
8612
8613 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
8614 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, target, unsignedp));
8615
8616 case TRUNC_DIV_EXPR:
8617 case FLOOR_DIV_EXPR:
8618 case CEIL_DIV_EXPR:
8619 case ROUND_DIV_EXPR:
8620 case EXACT_DIV_EXPR:
8621 /* If this is a fixed-point operation, then we cannot use the code
8622 below because "expand_divmod" doesn't support sat/no-sat fixed-point
8623 divisions. */
8624 if (ALL_FIXED_POINT_MODE_P (mode))
8625 goto binop;
8626
8627 if (modifier == EXPAND_STACK_PARM)
8628 target = 0;
8629 /* Possible optimization: compute the dividend with EXPAND_SUM
8630 then if the divisor is constant can optimize the case
8631 where some terms of the dividend have coeffs divisible by it. */
8632 expand_operands (treeop0, treeop1,
8633 subtarget, &op0, &op1, EXPAND_NORMAL);
8634 return expand_divmod (0, code, mode, op0, op1, target, unsignedp);
8635
8636 case RDIV_EXPR:
8637 goto binop;
8638
8639 case MULT_HIGHPART_EXPR:
8640 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
8641 temp = expand_mult_highpart (mode, op0, op1, target, unsignedp);
8642 gcc_assert (temp);
8643 return temp;
8644
8645 case TRUNC_MOD_EXPR:
8646 case FLOOR_MOD_EXPR:
8647 case CEIL_MOD_EXPR:
8648 case ROUND_MOD_EXPR:
8649 if (modifier == EXPAND_STACK_PARM)
8650 target = 0;
8651 expand_operands (treeop0, treeop1,
8652 subtarget, &op0, &op1, EXPAND_NORMAL);
8653 return expand_divmod (1, code, mode, op0, op1, target, unsignedp);
8654
8655 case FIXED_CONVERT_EXPR:
8656 op0 = expand_normal (treeop0);
8657 if (target == 0 || modifier == EXPAND_STACK_PARM)
8658 target = gen_reg_rtx (mode);
8659
8660 if ((TREE_CODE (TREE_TYPE (treeop0)) == INTEGER_TYPE
8661 && TYPE_UNSIGNED (TREE_TYPE (treeop0)))
8662 || (TREE_CODE (type) == INTEGER_TYPE && TYPE_UNSIGNED (type)))
8663 expand_fixed_convert (target, op0, 1, TYPE_SATURATING (type));
8664 else
8665 expand_fixed_convert (target, op0, 0, TYPE_SATURATING (type));
8666 return target;
8667
8668 case FIX_TRUNC_EXPR:
8669 op0 = expand_normal (treeop0);
8670 if (target == 0 || modifier == EXPAND_STACK_PARM)
8671 target = gen_reg_rtx (mode);
8672 expand_fix (target, op0, unsignedp);
8673 return target;
8674
8675 case FLOAT_EXPR:
8676 op0 = expand_normal (treeop0);
8677 if (target == 0 || modifier == EXPAND_STACK_PARM)
8678 target = gen_reg_rtx (mode);
8679 /* expand_float can't figure out what to do if FROM has VOIDmode.
8680 So give it the correct mode. With -O, cse will optimize this. */
8681 if (GET_MODE (op0) == VOIDmode)
8682 op0 = copy_to_mode_reg (TYPE_MODE (TREE_TYPE (treeop0)),
8683 op0);
8684 expand_float (target, op0,
8685 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
8686 return target;
8687
8688 case NEGATE_EXPR:
8689 op0 = expand_expr (treeop0, subtarget,
8690 VOIDmode, EXPAND_NORMAL);
8691 if (modifier == EXPAND_STACK_PARM)
8692 target = 0;
8693 temp = expand_unop (mode,
8694 optab_for_tree_code (NEGATE_EXPR, type,
8695 optab_default),
8696 op0, target, 0);
8697 gcc_assert (temp);
8698 return REDUCE_BIT_FIELD (temp);
8699
8700 case ABS_EXPR:
8701 op0 = expand_expr (treeop0, subtarget,
8702 VOIDmode, EXPAND_NORMAL);
8703 if (modifier == EXPAND_STACK_PARM)
8704 target = 0;
8705
8706 /* ABS_EXPR is not valid for complex arguments. */
8707 gcc_assert (GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
8708 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT);
8709
8710 /* Unsigned abs is simply the operand. Testing here means we don't
8711 risk generating incorrect code below. */
8712 if (TYPE_UNSIGNED (type))
8713 return op0;
8714
8715 return expand_abs (mode, op0, target, unsignedp,
8716 safe_from_p (target, treeop0, 1));
8717
8718 case MAX_EXPR:
8719 case MIN_EXPR:
8720 target = original_target;
8721 if (target == 0
8722 || modifier == EXPAND_STACK_PARM
8723 || (MEM_P (target) && MEM_VOLATILE_P (target))
8724 || GET_MODE (target) != mode
8725 || (REG_P (target)
8726 && REGNO (target) < FIRST_PSEUDO_REGISTER))
8727 target = gen_reg_rtx (mode);
8728 expand_operands (treeop0, treeop1,
8729 target, &op0, &op1, EXPAND_NORMAL);
8730
8731 /* First try to do it with a special MIN or MAX instruction.
8732 If that does not win, use a conditional jump to select the proper
8733 value. */
8734 this_optab = optab_for_tree_code (code, type, optab_default);
8735 temp = expand_binop (mode, this_optab, op0, op1, target, unsignedp,
8736 OPTAB_WIDEN);
8737 if (temp != 0)
8738 return temp;
8739
8740 /* At this point, a MEM target is no longer useful; we will get better
8741 code without it. */
8742
8743 if (! REG_P (target))
8744 target = gen_reg_rtx (mode);
8745
8746 /* If op1 was placed in target, swap op0 and op1. */
8747 if (target != op0 && target == op1)
8748 {
8749 temp = op0;
8750 op0 = op1;
8751 op1 = temp;
8752 }
8753
8754 /* We generate better code and avoid problems with op1 mentioning
8755 target by forcing op1 into a pseudo if it isn't a constant. */
8756 if (! CONSTANT_P (op1))
8757 op1 = force_reg (mode, op1);
8758
8759 {
8760 enum rtx_code comparison_code;
8761 rtx cmpop1 = op1;
8762
8763 if (code == MAX_EXPR)
8764 comparison_code = unsignedp ? GEU : GE;
8765 else
8766 comparison_code = unsignedp ? LEU : LE;
8767
8768 /* Canonicalize to comparisons against 0. */
8769 if (op1 == const1_rtx)
8770 {
8771 /* Converting (a >= 1 ? a : 1) into (a > 0 ? a : 1)
8772 or (a != 0 ? a : 1) for unsigned.
8773 For MIN we are safe converting (a <= 1 ? a : 1)
8774 into (a <= 0 ? a : 1) */
8775 cmpop1 = const0_rtx;
8776 if (code == MAX_EXPR)
8777 comparison_code = unsignedp ? NE : GT;
8778 }
8779 if (op1 == constm1_rtx && !unsignedp)
8780 {
8781 /* Converting (a >= -1 ? a : -1) into (a >= 0 ? a : -1)
8782 and (a <= -1 ? a : -1) into (a < 0 ? a : -1) */
8783 cmpop1 = const0_rtx;
8784 if (code == MIN_EXPR)
8785 comparison_code = LT;
8786 }
8787 #ifdef HAVE_conditional_move
8788 /* Use a conditional move if possible. */
8789 if (can_conditionally_move_p (mode))
8790 {
8791 rtx insn;
8792
8793 /* ??? Same problem as in expmed.c: emit_conditional_move
8794 forces a stack adjustment via compare_from_rtx, and we
8795 lose the stack adjustment if the sequence we are about
8796 to create is discarded. */
8797 do_pending_stack_adjust ();
8798
8799 start_sequence ();
8800
8801 /* Try to emit the conditional move. */
8802 insn = emit_conditional_move (target, comparison_code,
8803 op0, cmpop1, mode,
8804 op0, op1, mode,
8805 unsignedp);
8806
8807 /* If we could do the conditional move, emit the sequence,
8808 and return. */
8809 if (insn)
8810 {
8811 rtx seq = get_insns ();
8812 end_sequence ();
8813 emit_insn (seq);
8814 return target;
8815 }
8816
8817 /* Otherwise discard the sequence and fall back to code with
8818 branches. */
8819 end_sequence ();
8820 }
8821 #endif
8822 if (target != op0)
8823 emit_move_insn (target, op0);
8824
8825 temp = gen_label_rtx ();
8826 do_compare_rtx_and_jump (target, cmpop1, comparison_code,
8827 unsignedp, mode, NULL_RTX, NULL_RTX, temp,
8828 -1);
8829 }
8830 emit_move_insn (target, op1);
8831 emit_label (temp);
8832 return target;
8833
8834 case BIT_NOT_EXPR:
8835 op0 = expand_expr (treeop0, subtarget,
8836 VOIDmode, EXPAND_NORMAL);
8837 if (modifier == EXPAND_STACK_PARM)
8838 target = 0;
8839 /* In case we have to reduce the result to bitfield precision
8840 for unsigned bitfield expand this as XOR with a proper constant
8841 instead. */
8842 if (reduce_bit_field && TYPE_UNSIGNED (type))
8843 temp = expand_binop (mode, xor_optab, op0,
8844 immed_double_int_const
8845 (double_int::mask (TYPE_PRECISION (type)), mode),
8846 target, 1, OPTAB_LIB_WIDEN);
8847 else
8848 temp = expand_unop (mode, one_cmpl_optab, op0, target, 1);
8849 gcc_assert (temp);
8850 return temp;
8851
8852 /* ??? Can optimize bitwise operations with one arg constant.
8853 Can optimize (a bitwise1 n) bitwise2 (a bitwise3 b)
8854 and (a bitwise1 b) bitwise2 b (etc)
8855 but that is probably not worth while. */
8856
8857 case BIT_AND_EXPR:
8858 case BIT_IOR_EXPR:
8859 case BIT_XOR_EXPR:
8860 goto binop;
8861
8862 case LROTATE_EXPR:
8863 case RROTATE_EXPR:
8864 gcc_assert (VECTOR_MODE_P (TYPE_MODE (type))
8865 || (GET_MODE_PRECISION (TYPE_MODE (type))
8866 == TYPE_PRECISION (type)));
8867 /* fall through */
8868
8869 case LSHIFT_EXPR:
8870 case RSHIFT_EXPR:
8871 /* If this is a fixed-point operation, then we cannot use the code
8872 below because "expand_shift" doesn't support sat/no-sat fixed-point
8873 shifts. */
8874 if (ALL_FIXED_POINT_MODE_P (mode))
8875 goto binop;
8876
8877 if (! safe_from_p (subtarget, treeop1, 1))
8878 subtarget = 0;
8879 if (modifier == EXPAND_STACK_PARM)
8880 target = 0;
8881 op0 = expand_expr (treeop0, subtarget,
8882 VOIDmode, EXPAND_NORMAL);
8883 temp = expand_variable_shift (code, mode, op0, treeop1, target,
8884 unsignedp);
8885 if (code == LSHIFT_EXPR)
8886 temp = REDUCE_BIT_FIELD (temp);
8887 return temp;
8888
8889 /* Could determine the answer when only additive constants differ. Also,
8890 the addition of one can be handled by changing the condition. */
8891 case LT_EXPR:
8892 case LE_EXPR:
8893 case GT_EXPR:
8894 case GE_EXPR:
8895 case EQ_EXPR:
8896 case NE_EXPR:
8897 case UNORDERED_EXPR:
8898 case ORDERED_EXPR:
8899 case UNLT_EXPR:
8900 case UNLE_EXPR:
8901 case UNGT_EXPR:
8902 case UNGE_EXPR:
8903 case UNEQ_EXPR:
8904 case LTGT_EXPR:
8905 temp = do_store_flag (ops,
8906 modifier != EXPAND_STACK_PARM ? target : NULL_RTX,
8907 tmode != VOIDmode ? tmode : mode);
8908 if (temp)
8909 return temp;
8910
8911 /* Use a compare and a jump for BLKmode comparisons, or for function
8912 type comparisons is HAVE_canonicalize_funcptr_for_compare. */
8913
8914 if ((target == 0
8915 || modifier == EXPAND_STACK_PARM
8916 || ! safe_from_p (target, treeop0, 1)
8917 || ! safe_from_p (target, treeop1, 1)
8918 /* Make sure we don't have a hard reg (such as function's return
8919 value) live across basic blocks, if not optimizing. */
8920 || (!optimize && REG_P (target)
8921 && REGNO (target) < FIRST_PSEUDO_REGISTER)))
8922 target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode);
8923
8924 emit_move_insn (target, const0_rtx);
8925
8926 op1 = gen_label_rtx ();
8927 jumpifnot_1 (code, treeop0, treeop1, op1, -1);
8928
8929 if (TYPE_PRECISION (type) == 1 && !TYPE_UNSIGNED (type))
8930 emit_move_insn (target, constm1_rtx);
8931 else
8932 emit_move_insn (target, const1_rtx);
8933
8934 emit_label (op1);
8935 return target;
8936
8937 case COMPLEX_EXPR:
8938 /* Get the rtx code of the operands. */
8939 op0 = expand_normal (treeop0);
8940 op1 = expand_normal (treeop1);
8941
8942 if (!target)
8943 target = gen_reg_rtx (TYPE_MODE (type));
8944 else
8945 /* If target overlaps with op1, then either we need to force
8946 op1 into a pseudo (if target also overlaps with op0),
8947 or write the complex parts in reverse order. */
8948 switch (GET_CODE (target))
8949 {
8950 case CONCAT:
8951 if (reg_overlap_mentioned_p (XEXP (target, 0), op1))
8952 {
8953 if (reg_overlap_mentioned_p (XEXP (target, 1), op0))
8954 {
8955 complex_expr_force_op1:
8956 temp = gen_reg_rtx (GET_MODE_INNER (GET_MODE (target)));
8957 emit_move_insn (temp, op1);
8958 op1 = temp;
8959 break;
8960 }
8961 complex_expr_swap_order:
8962 /* Move the imaginary (op1) and real (op0) parts to their
8963 location. */
8964 write_complex_part (target, op1, true);
8965 write_complex_part (target, op0, false);
8966
8967 return target;
8968 }
8969 break;
8970 case MEM:
8971 temp = adjust_address_nv (target,
8972 GET_MODE_INNER (GET_MODE (target)), 0);
8973 if (reg_overlap_mentioned_p (temp, op1))
8974 {
8975 enum machine_mode imode = GET_MODE_INNER (GET_MODE (target));
8976 temp = adjust_address_nv (target, imode,
8977 GET_MODE_SIZE (imode));
8978 if (reg_overlap_mentioned_p (temp, op0))
8979 goto complex_expr_force_op1;
8980 goto complex_expr_swap_order;
8981 }
8982 break;
8983 default:
8984 if (reg_overlap_mentioned_p (target, op1))
8985 {
8986 if (reg_overlap_mentioned_p (target, op0))
8987 goto complex_expr_force_op1;
8988 goto complex_expr_swap_order;
8989 }
8990 break;
8991 }
8992
8993 /* Move the real (op0) and imaginary (op1) parts to their location. */
8994 write_complex_part (target, op0, false);
8995 write_complex_part (target, op1, true);
8996
8997 return target;
8998
8999 case WIDEN_SUM_EXPR:
9000 {
9001 tree oprnd0 = treeop0;
9002 tree oprnd1 = treeop1;
9003
9004 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
9005 target = expand_widen_pattern_expr (ops, op0, NULL_RTX, op1,
9006 target, unsignedp);
9007 return target;
9008 }
9009
9010 case REDUC_MAX_EXPR:
9011 case REDUC_MIN_EXPR:
9012 case REDUC_PLUS_EXPR:
9013 {
9014 op0 = expand_normal (treeop0);
9015 this_optab = optab_for_tree_code (code, type, optab_default);
9016 temp = expand_unop (mode, this_optab, op0, target, unsignedp);
9017 gcc_assert (temp);
9018 return temp;
9019 }
9020
9021 case VEC_LSHIFT_EXPR:
9022 case VEC_RSHIFT_EXPR:
9023 {
9024 target = expand_vec_shift_expr (ops, target);
9025 return target;
9026 }
9027
9028 case VEC_UNPACK_HI_EXPR:
9029 case VEC_UNPACK_LO_EXPR:
9030 {
9031 op0 = expand_normal (treeop0);
9032 temp = expand_widen_pattern_expr (ops, op0, NULL_RTX, NULL_RTX,
9033 target, unsignedp);
9034 gcc_assert (temp);
9035 return temp;
9036 }
9037
9038 case VEC_UNPACK_FLOAT_HI_EXPR:
9039 case VEC_UNPACK_FLOAT_LO_EXPR:
9040 {
9041 op0 = expand_normal (treeop0);
9042 /* The signedness is determined from input operand. */
9043 temp = expand_widen_pattern_expr
9044 (ops, op0, NULL_RTX, NULL_RTX,
9045 target, TYPE_UNSIGNED (TREE_TYPE (treeop0)));
9046
9047 gcc_assert (temp);
9048 return temp;
9049 }
9050
9051 case VEC_WIDEN_MULT_HI_EXPR:
9052 case VEC_WIDEN_MULT_LO_EXPR:
9053 case VEC_WIDEN_MULT_EVEN_EXPR:
9054 case VEC_WIDEN_MULT_ODD_EXPR:
9055 case VEC_WIDEN_LSHIFT_HI_EXPR:
9056 case VEC_WIDEN_LSHIFT_LO_EXPR:
9057 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
9058 target = expand_widen_pattern_expr (ops, op0, op1, NULL_RTX,
9059 target, unsignedp);
9060 gcc_assert (target);
9061 return target;
9062
9063 case VEC_PACK_TRUNC_EXPR:
9064 case VEC_PACK_SAT_EXPR:
9065 case VEC_PACK_FIX_TRUNC_EXPR:
9066 mode = TYPE_MODE (TREE_TYPE (treeop0));
9067 goto binop;
9068
9069 case VEC_PERM_EXPR:
9070 expand_operands (treeop0, treeop1, target, &op0, &op1, EXPAND_NORMAL);
9071 op2 = expand_normal (treeop2);
9072
9073 /* Careful here: if the target doesn't support integral vector modes,
9074 a constant selection vector could wind up smooshed into a normal
9075 integral constant. */
9076 if (CONSTANT_P (op2) && GET_CODE (op2) != CONST_VECTOR)
9077 {
9078 tree sel_type = TREE_TYPE (treeop2);
9079 enum machine_mode vmode
9080 = mode_for_vector (TYPE_MODE (TREE_TYPE (sel_type)),
9081 TYPE_VECTOR_SUBPARTS (sel_type));
9082 gcc_assert (GET_MODE_CLASS (vmode) == MODE_VECTOR_INT);
9083 op2 = simplify_subreg (vmode, op2, TYPE_MODE (sel_type), 0);
9084 gcc_assert (op2 && GET_CODE (op2) == CONST_VECTOR);
9085 }
9086 else
9087 gcc_assert (GET_MODE_CLASS (GET_MODE (op2)) == MODE_VECTOR_INT);
9088
9089 temp = expand_vec_perm (mode, op0, op1, op2, target);
9090 gcc_assert (temp);
9091 return temp;
9092
9093 case DOT_PROD_EXPR:
9094 {
9095 tree oprnd0 = treeop0;
9096 tree oprnd1 = treeop1;
9097 tree oprnd2 = treeop2;
9098 rtx op2;
9099
9100 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
9101 op2 = expand_normal (oprnd2);
9102 target = expand_widen_pattern_expr (ops, op0, op1, op2,
9103 target, unsignedp);
9104 return target;
9105 }
9106
9107 case REALIGN_LOAD_EXPR:
9108 {
9109 tree oprnd0 = treeop0;
9110 tree oprnd1 = treeop1;
9111 tree oprnd2 = treeop2;
9112 rtx op2;
9113
9114 this_optab = optab_for_tree_code (code, type, optab_default);
9115 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
9116 op2 = expand_normal (oprnd2);
9117 temp = expand_ternary_op (mode, this_optab, op0, op1, op2,
9118 target, unsignedp);
9119 gcc_assert (temp);
9120 return temp;
9121 }
9122
9123 case COND_EXPR:
9124 /* A COND_EXPR with its type being VOID_TYPE represents a
9125 conditional jump and is handled in
9126 expand_gimple_cond_expr. */
9127 gcc_assert (!VOID_TYPE_P (type));
9128
9129 /* Note that COND_EXPRs whose type is a structure or union
9130 are required to be constructed to contain assignments of
9131 a temporary variable, so that we can evaluate them here
9132 for side effect only. If type is void, we must do likewise. */
9133
9134 gcc_assert (!TREE_ADDRESSABLE (type)
9135 && !ignore
9136 && TREE_TYPE (treeop1) != void_type_node
9137 && TREE_TYPE (treeop2) != void_type_node);
9138
9139 temp = expand_cond_expr_using_cmove (treeop0, treeop1, treeop2);
9140 if (temp)
9141 return temp;
9142
9143 /* If we are not to produce a result, we have no target. Otherwise,
9144 if a target was specified use it; it will not be used as an
9145 intermediate target unless it is safe. If no target, use a
9146 temporary. */
9147
9148 if (modifier != EXPAND_STACK_PARM
9149 && original_target
9150 && safe_from_p (original_target, treeop0, 1)
9151 && GET_MODE (original_target) == mode
9152 && !MEM_P (original_target))
9153 temp = original_target;
9154 else
9155 temp = assign_temp (type, 0, 1);
9156
9157 do_pending_stack_adjust ();
9158 NO_DEFER_POP;
9159 op0 = gen_label_rtx ();
9160 op1 = gen_label_rtx ();
9161 jumpifnot (treeop0, op0, -1);
9162 store_expr (treeop1, temp,
9163 modifier == EXPAND_STACK_PARM,
9164 false);
9165
9166 emit_jump_insn (gen_jump (op1));
9167 emit_barrier ();
9168 emit_label (op0);
9169 store_expr (treeop2, temp,
9170 modifier == EXPAND_STACK_PARM,
9171 false);
9172
9173 emit_label (op1);
9174 OK_DEFER_POP;
9175 return temp;
9176
9177 case VEC_COND_EXPR:
9178 target = expand_vec_cond_expr (type, treeop0, treeop1, treeop2, target);
9179 return target;
9180
9181 default:
9182 gcc_unreachable ();
9183 }
9184
9185 /* Here to do an ordinary binary operator. */
9186 binop:
9187 expand_operands (treeop0, treeop1,
9188 subtarget, &op0, &op1, EXPAND_NORMAL);
9189 binop2:
9190 this_optab = optab_for_tree_code (code, type, optab_default);
9191 binop3:
9192 if (modifier == EXPAND_STACK_PARM)
9193 target = 0;
9194 temp = expand_binop (mode, this_optab, op0, op1, target,
9195 unsignedp, OPTAB_LIB_WIDEN);
9196 gcc_assert (temp);
9197 /* Bitwise operations do not need bitfield reduction as we expect their
9198 operands being properly truncated. */
9199 if (code == BIT_XOR_EXPR
9200 || code == BIT_AND_EXPR
9201 || code == BIT_IOR_EXPR)
9202 return temp;
9203 return REDUCE_BIT_FIELD (temp);
9204 }
9205 #undef REDUCE_BIT_FIELD
9206
9207
9208 /* Return TRUE if expression STMT is suitable for replacement.
9209 Never consider memory loads as replaceable, because those don't ever lead
9210 into constant expressions. */
9211
9212 static bool
9213 stmt_is_replaceable_p (gimple stmt)
9214 {
9215 if (ssa_is_replaceable_p (stmt))
9216 {
9217 /* Don't move around loads. */
9218 if (!gimple_assign_single_p (stmt)
9219 || is_gimple_val (gimple_assign_rhs1 (stmt)))
9220 return true;
9221 }
9222 return false;
9223 }
9224
9225 rtx
9226 expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode,
9227 enum expand_modifier modifier, rtx *alt_rtl)
9228 {
9229 rtx op0, op1, temp, decl_rtl;
9230 tree type;
9231 int unsignedp;
9232 enum machine_mode mode;
9233 enum tree_code code = TREE_CODE (exp);
9234 rtx subtarget, original_target;
9235 int ignore;
9236 tree context;
9237 bool reduce_bit_field;
9238 location_t loc = EXPR_LOCATION (exp);
9239 struct separate_ops ops;
9240 tree treeop0, treeop1, treeop2;
9241 tree ssa_name = NULL_TREE;
9242 gimple g;
9243
9244 type = TREE_TYPE (exp);
9245 mode = TYPE_MODE (type);
9246 unsignedp = TYPE_UNSIGNED (type);
9247
9248 treeop0 = treeop1 = treeop2 = NULL_TREE;
9249 if (!VL_EXP_CLASS_P (exp))
9250 switch (TREE_CODE_LENGTH (code))
9251 {
9252 default:
9253 case 3: treeop2 = TREE_OPERAND (exp, 2);
9254 case 2: treeop1 = TREE_OPERAND (exp, 1);
9255 case 1: treeop0 = TREE_OPERAND (exp, 0);
9256 case 0: break;
9257 }
9258 ops.code = code;
9259 ops.type = type;
9260 ops.op0 = treeop0;
9261 ops.op1 = treeop1;
9262 ops.op2 = treeop2;
9263 ops.location = loc;
9264
9265 ignore = (target == const0_rtx
9266 || ((CONVERT_EXPR_CODE_P (code)
9267 || code == COND_EXPR || code == VIEW_CONVERT_EXPR)
9268 && TREE_CODE (type) == VOID_TYPE));
9269
9270 /* An operation in what may be a bit-field type needs the
9271 result to be reduced to the precision of the bit-field type,
9272 which is narrower than that of the type's mode. */
9273 reduce_bit_field = (!ignore
9274 && INTEGRAL_TYPE_P (type)
9275 && GET_MODE_PRECISION (mode) > TYPE_PRECISION (type));
9276
9277 /* If we are going to ignore this result, we need only do something
9278 if there is a side-effect somewhere in the expression. If there
9279 is, short-circuit the most common cases here. Note that we must
9280 not call expand_expr with anything but const0_rtx in case this
9281 is an initial expansion of a size that contains a PLACEHOLDER_EXPR. */
9282
9283 if (ignore)
9284 {
9285 if (! TREE_SIDE_EFFECTS (exp))
9286 return const0_rtx;
9287
9288 /* Ensure we reference a volatile object even if value is ignored, but
9289 don't do this if all we are doing is taking its address. */
9290 if (TREE_THIS_VOLATILE (exp)
9291 && TREE_CODE (exp) != FUNCTION_DECL
9292 && mode != VOIDmode && mode != BLKmode
9293 && modifier != EXPAND_CONST_ADDRESS)
9294 {
9295 temp = expand_expr (exp, NULL_RTX, VOIDmode, modifier);
9296 if (MEM_P (temp))
9297 copy_to_reg (temp);
9298 return const0_rtx;
9299 }
9300
9301 if (TREE_CODE_CLASS (code) == tcc_unary
9302 || code == BIT_FIELD_REF
9303 || code == COMPONENT_REF
9304 || code == INDIRECT_REF)
9305 return expand_expr (treeop0, const0_rtx, VOIDmode,
9306 modifier);
9307
9308 else if (TREE_CODE_CLASS (code) == tcc_binary
9309 || TREE_CODE_CLASS (code) == tcc_comparison
9310 || code == ARRAY_REF || code == ARRAY_RANGE_REF)
9311 {
9312 expand_expr (treeop0, const0_rtx, VOIDmode, modifier);
9313 expand_expr (treeop1, const0_rtx, VOIDmode, modifier);
9314 return const0_rtx;
9315 }
9316
9317 target = 0;
9318 }
9319
9320 if (reduce_bit_field && modifier == EXPAND_STACK_PARM)
9321 target = 0;
9322
9323 /* Use subtarget as the target for operand 0 of a binary operation. */
9324 subtarget = get_subtarget (target);
9325 original_target = target;
9326
9327 switch (code)
9328 {
9329 case LABEL_DECL:
9330 {
9331 tree function = decl_function_context (exp);
9332
9333 temp = label_rtx (exp);
9334 temp = gen_rtx_LABEL_REF (Pmode, temp);
9335
9336 if (function != current_function_decl
9337 && function != 0)
9338 LABEL_REF_NONLOCAL_P (temp) = 1;
9339
9340 temp = gen_rtx_MEM (FUNCTION_MODE, temp);
9341 return temp;
9342 }
9343
9344 case SSA_NAME:
9345 /* ??? ivopts calls expander, without any preparation from
9346 out-of-ssa. So fake instructions as if this was an access to the
9347 base variable. This unnecessarily allocates a pseudo, see how we can
9348 reuse it, if partition base vars have it set already. */
9349 if (!currently_expanding_to_rtl)
9350 {
9351 tree var = SSA_NAME_VAR (exp);
9352 if (var && DECL_RTL_SET_P (var))
9353 return DECL_RTL (var);
9354 return gen_raw_REG (TYPE_MODE (TREE_TYPE (exp)),
9355 LAST_VIRTUAL_REGISTER + 1);
9356 }
9357
9358 g = get_gimple_for_ssa_name (exp);
9359 /* For EXPAND_INITIALIZER try harder to get something simpler. */
9360 if (g == NULL
9361 && modifier == EXPAND_INITIALIZER
9362 && !SSA_NAME_IS_DEFAULT_DEF (exp)
9363 && (optimize || DECL_IGNORED_P (SSA_NAME_VAR (exp)))
9364 && stmt_is_replaceable_p (SSA_NAME_DEF_STMT (exp)))
9365 g = SSA_NAME_DEF_STMT (exp);
9366 if (g)
9367 {
9368 rtx r;
9369 location_t saved_loc = curr_insn_location ();
9370
9371 set_curr_insn_location (gimple_location (g));
9372 r = expand_expr_real (gimple_assign_rhs_to_tree (g), target,
9373 tmode, modifier, NULL);
9374 set_curr_insn_location (saved_loc);
9375 if (REG_P (r) && !REG_EXPR (r))
9376 set_reg_attrs_for_decl_rtl (SSA_NAME_VAR (exp), r);
9377 return r;
9378 }
9379
9380 ssa_name = exp;
9381 decl_rtl = get_rtx_for_ssa_name (ssa_name);
9382 exp = SSA_NAME_VAR (ssa_name);
9383 goto expand_decl_rtl;
9384
9385 case PARM_DECL:
9386 case VAR_DECL:
9387 /* If a static var's type was incomplete when the decl was written,
9388 but the type is complete now, lay out the decl now. */
9389 if (DECL_SIZE (exp) == 0
9390 && COMPLETE_OR_UNBOUND_ARRAY_TYPE_P (TREE_TYPE (exp))
9391 && (TREE_STATIC (exp) || DECL_EXTERNAL (exp)))
9392 layout_decl (exp, 0);
9393
9394 /* ... fall through ... */
9395
9396 case FUNCTION_DECL:
9397 case RESULT_DECL:
9398 decl_rtl = DECL_RTL (exp);
9399 expand_decl_rtl:
9400 gcc_assert (decl_rtl);
9401 decl_rtl = copy_rtx (decl_rtl);
9402 /* Record writes to register variables. */
9403 if (modifier == EXPAND_WRITE
9404 && REG_P (decl_rtl)
9405 && HARD_REGISTER_P (decl_rtl))
9406 add_to_hard_reg_set (&crtl->asm_clobbers,
9407 GET_MODE (decl_rtl), REGNO (decl_rtl));
9408
9409 /* Ensure variable marked as used even if it doesn't go through
9410 a parser. If it hasn't be used yet, write out an external
9411 definition. */
9412 TREE_USED (exp) = 1;
9413
9414 /* Show we haven't gotten RTL for this yet. */
9415 temp = 0;
9416
9417 /* Variables inherited from containing functions should have
9418 been lowered by this point. */
9419 context = decl_function_context (exp);
9420 gcc_assert (SCOPE_FILE_SCOPE_P (context)
9421 || context == current_function_decl
9422 || TREE_STATIC (exp)
9423 || DECL_EXTERNAL (exp)
9424 /* ??? C++ creates functions that are not TREE_STATIC. */
9425 || TREE_CODE (exp) == FUNCTION_DECL);
9426
9427 /* This is the case of an array whose size is to be determined
9428 from its initializer, while the initializer is still being parsed.
9429 ??? We aren't parsing while expanding anymore. */
9430
9431 if (MEM_P (decl_rtl) && REG_P (XEXP (decl_rtl, 0)))
9432 temp = validize_mem (decl_rtl);
9433
9434 /* If DECL_RTL is memory, we are in the normal case and the
9435 address is not valid, get the address into a register. */
9436
9437 else if (MEM_P (decl_rtl) && modifier != EXPAND_INITIALIZER)
9438 {
9439 if (alt_rtl)
9440 *alt_rtl = decl_rtl;
9441 decl_rtl = use_anchored_address (decl_rtl);
9442 if (modifier != EXPAND_CONST_ADDRESS
9443 && modifier != EXPAND_SUM
9444 && !memory_address_addr_space_p (DECL_MODE (exp),
9445 XEXP (decl_rtl, 0),
9446 MEM_ADDR_SPACE (decl_rtl)))
9447 temp = replace_equiv_address (decl_rtl,
9448 copy_rtx (XEXP (decl_rtl, 0)));
9449 }
9450
9451 /* If we got something, return it. But first, set the alignment
9452 if the address is a register. */
9453 if (temp != 0)
9454 {
9455 if (MEM_P (temp) && REG_P (XEXP (temp, 0)))
9456 mark_reg_pointer (XEXP (temp, 0), DECL_ALIGN (exp));
9457
9458 return temp;
9459 }
9460
9461 /* If the mode of DECL_RTL does not match that of the decl,
9462 there are two cases: we are dealing with a BLKmode value
9463 that is returned in a register, or we are dealing with
9464 a promoted value. In the latter case, return a SUBREG
9465 of the wanted mode, but mark it so that we know that it
9466 was already extended. */
9467 if (REG_P (decl_rtl)
9468 && DECL_MODE (exp) != BLKmode
9469 && GET_MODE (decl_rtl) != DECL_MODE (exp))
9470 {
9471 enum machine_mode pmode;
9472
9473 /* Get the signedness to be used for this variable. Ensure we get
9474 the same mode we got when the variable was declared. */
9475 if (code == SSA_NAME
9476 && (g = SSA_NAME_DEF_STMT (ssa_name))
9477 && gimple_code (g) == GIMPLE_CALL)
9478 {
9479 gcc_assert (!gimple_call_internal_p (g));
9480 pmode = promote_function_mode (type, mode, &unsignedp,
9481 gimple_call_fntype (g),
9482 2);
9483 }
9484 else
9485 pmode = promote_decl_mode (exp, &unsignedp);
9486 gcc_assert (GET_MODE (decl_rtl) == pmode);
9487
9488 temp = gen_lowpart_SUBREG (mode, decl_rtl);
9489 SUBREG_PROMOTED_VAR_P (temp) = 1;
9490 SUBREG_PROMOTED_UNSIGNED_SET (temp, unsignedp);
9491 return temp;
9492 }
9493
9494 return decl_rtl;
9495
9496 case INTEGER_CST:
9497 temp = immed_double_const (TREE_INT_CST_LOW (exp),
9498 TREE_INT_CST_HIGH (exp), mode);
9499
9500 return temp;
9501
9502 case VECTOR_CST:
9503 {
9504 tree tmp = NULL_TREE;
9505 if (GET_MODE_CLASS (mode) == MODE_VECTOR_INT
9506 || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT
9507 || GET_MODE_CLASS (mode) == MODE_VECTOR_FRACT
9508 || GET_MODE_CLASS (mode) == MODE_VECTOR_UFRACT
9509 || GET_MODE_CLASS (mode) == MODE_VECTOR_ACCUM
9510 || GET_MODE_CLASS (mode) == MODE_VECTOR_UACCUM)
9511 return const_vector_from_tree (exp);
9512 if (GET_MODE_CLASS (mode) == MODE_INT)
9513 {
9514 tree type_for_mode = lang_hooks.types.type_for_mode (mode, 1);
9515 if (type_for_mode)
9516 tmp = fold_unary_loc (loc, VIEW_CONVERT_EXPR, type_for_mode, exp);
9517 }
9518 if (!tmp)
9519 {
9520 vec<constructor_elt, va_gc> *v;
9521 unsigned i;
9522 vec_alloc (v, VECTOR_CST_NELTS (exp));
9523 for (i = 0; i < VECTOR_CST_NELTS (exp); ++i)
9524 CONSTRUCTOR_APPEND_ELT (v, NULL_TREE, VECTOR_CST_ELT (exp, i));
9525 tmp = build_constructor (type, v);
9526 }
9527 return expand_expr (tmp, ignore ? const0_rtx : target,
9528 tmode, modifier);
9529 }
9530
9531 case CONST_DECL:
9532 return expand_expr (DECL_INITIAL (exp), target, VOIDmode, modifier);
9533
9534 case REAL_CST:
9535 /* If optimized, generate immediate CONST_DOUBLE
9536 which will be turned into memory by reload if necessary.
9537
9538 We used to force a register so that loop.c could see it. But
9539 this does not allow gen_* patterns to perform optimizations with
9540 the constants. It also produces two insns in cases like "x = 1.0;".
9541 On most machines, floating-point constants are not permitted in
9542 many insns, so we'd end up copying it to a register in any case.
9543
9544 Now, we do the copying in expand_binop, if appropriate. */
9545 return CONST_DOUBLE_FROM_REAL_VALUE (TREE_REAL_CST (exp),
9546 TYPE_MODE (TREE_TYPE (exp)));
9547
9548 case FIXED_CST:
9549 return CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (exp),
9550 TYPE_MODE (TREE_TYPE (exp)));
9551
9552 case COMPLEX_CST:
9553 /* Handle evaluating a complex constant in a CONCAT target. */
9554 if (original_target && GET_CODE (original_target) == CONCAT)
9555 {
9556 enum machine_mode mode = TYPE_MODE (TREE_TYPE (TREE_TYPE (exp)));
9557 rtx rtarg, itarg;
9558
9559 rtarg = XEXP (original_target, 0);
9560 itarg = XEXP (original_target, 1);
9561
9562 /* Move the real and imaginary parts separately. */
9563 op0 = expand_expr (TREE_REALPART (exp), rtarg, mode, EXPAND_NORMAL);
9564 op1 = expand_expr (TREE_IMAGPART (exp), itarg, mode, EXPAND_NORMAL);
9565
9566 if (op0 != rtarg)
9567 emit_move_insn (rtarg, op0);
9568 if (op1 != itarg)
9569 emit_move_insn (itarg, op1);
9570
9571 return original_target;
9572 }
9573
9574 /* ... fall through ... */
9575
9576 case STRING_CST:
9577 temp = expand_expr_constant (exp, 1, modifier);
9578
9579 /* temp contains a constant address.
9580 On RISC machines where a constant address isn't valid,
9581 make some insns to get that address into a register. */
9582 if (modifier != EXPAND_CONST_ADDRESS
9583 && modifier != EXPAND_INITIALIZER
9584 && modifier != EXPAND_SUM
9585 && ! memory_address_addr_space_p (mode, XEXP (temp, 0),
9586 MEM_ADDR_SPACE (temp)))
9587 return replace_equiv_address (temp,
9588 copy_rtx (XEXP (temp, 0)));
9589 return temp;
9590
9591 case SAVE_EXPR:
9592 {
9593 tree val = treeop0;
9594 rtx ret = expand_expr_real_1 (val, target, tmode, modifier, alt_rtl);
9595
9596 if (!SAVE_EXPR_RESOLVED_P (exp))
9597 {
9598 /* We can indeed still hit this case, typically via builtin
9599 expanders calling save_expr immediately before expanding
9600 something. Assume this means that we only have to deal
9601 with non-BLKmode values. */
9602 gcc_assert (GET_MODE (ret) != BLKmode);
9603
9604 val = build_decl (curr_insn_location (),
9605 VAR_DECL, NULL, TREE_TYPE (exp));
9606 DECL_ARTIFICIAL (val) = 1;
9607 DECL_IGNORED_P (val) = 1;
9608 treeop0 = val;
9609 TREE_OPERAND (exp, 0) = treeop0;
9610 SAVE_EXPR_RESOLVED_P (exp) = 1;
9611
9612 if (!CONSTANT_P (ret))
9613 ret = copy_to_reg (ret);
9614 SET_DECL_RTL (val, ret);
9615 }
9616
9617 return ret;
9618 }
9619
9620
9621 case CONSTRUCTOR:
9622 /* If we don't need the result, just ensure we evaluate any
9623 subexpressions. */
9624 if (ignore)
9625 {
9626 unsigned HOST_WIDE_INT idx;
9627 tree value;
9628
9629 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value)
9630 expand_expr (value, const0_rtx, VOIDmode, EXPAND_NORMAL);
9631
9632 return const0_rtx;
9633 }
9634
9635 return expand_constructor (exp, target, modifier, false);
9636
9637 case TARGET_MEM_REF:
9638 {
9639 addr_space_t as
9640 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0))));
9641 enum insn_code icode;
9642 unsigned int align;
9643
9644 op0 = addr_for_mem_ref (exp, as, true);
9645 op0 = memory_address_addr_space (mode, op0, as);
9646 temp = gen_rtx_MEM (mode, op0);
9647 set_mem_attributes (temp, exp, 0);
9648 set_mem_addr_space (temp, as);
9649 align = get_object_alignment (exp);
9650 if (modifier != EXPAND_WRITE
9651 && modifier != EXPAND_MEMORY
9652 && mode != BLKmode
9653 && align < GET_MODE_ALIGNMENT (mode)
9654 /* If the target does not have special handling for unaligned
9655 loads of mode then it can use regular moves for them. */
9656 && ((icode = optab_handler (movmisalign_optab, mode))
9657 != CODE_FOR_nothing))
9658 {
9659 struct expand_operand ops[2];
9660
9661 /* We've already validated the memory, and we're creating a
9662 new pseudo destination. The predicates really can't fail,
9663 nor can the generator. */
9664 create_output_operand (&ops[0], NULL_RTX, mode);
9665 create_fixed_operand (&ops[1], temp);
9666 expand_insn (icode, 2, ops);
9667 temp = ops[0].value;
9668 }
9669 return temp;
9670 }
9671
9672 case MEM_REF:
9673 {
9674 addr_space_t as
9675 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0))));
9676 enum machine_mode address_mode;
9677 tree base = TREE_OPERAND (exp, 0);
9678 gimple def_stmt;
9679 enum insn_code icode;
9680 unsigned align;
9681 /* Handle expansion of non-aliased memory with non-BLKmode. That
9682 might end up in a register. */
9683 if (mem_ref_refers_to_non_mem_p (exp))
9684 {
9685 HOST_WIDE_INT offset = mem_ref_offset (exp).low;
9686 base = TREE_OPERAND (base, 0);
9687 if (offset == 0
9688 && tree_fits_uhwi_p (TYPE_SIZE (type))
9689 && (GET_MODE_BITSIZE (DECL_MODE (base))
9690 == tree_to_uhwi (TYPE_SIZE (type))))
9691 return expand_expr (build1 (VIEW_CONVERT_EXPR, type, base),
9692 target, tmode, modifier);
9693 if (TYPE_MODE (type) == BLKmode)
9694 {
9695 temp = assign_stack_temp (DECL_MODE (base),
9696 GET_MODE_SIZE (DECL_MODE (base)));
9697 store_expr (base, temp, 0, false);
9698 temp = adjust_address (temp, BLKmode, offset);
9699 set_mem_size (temp, int_size_in_bytes (type));
9700 return temp;
9701 }
9702 exp = build3 (BIT_FIELD_REF, type, base, TYPE_SIZE (type),
9703 bitsize_int (offset * BITS_PER_UNIT));
9704 return expand_expr (exp, target, tmode, modifier);
9705 }
9706 address_mode = targetm.addr_space.address_mode (as);
9707 base = TREE_OPERAND (exp, 0);
9708 if ((def_stmt = get_def_for_expr (base, BIT_AND_EXPR)))
9709 {
9710 tree mask = gimple_assign_rhs2 (def_stmt);
9711 base = build2 (BIT_AND_EXPR, TREE_TYPE (base),
9712 gimple_assign_rhs1 (def_stmt), mask);
9713 TREE_OPERAND (exp, 0) = base;
9714 }
9715 align = get_object_alignment (exp);
9716 op0 = expand_expr (base, NULL_RTX, VOIDmode, EXPAND_SUM);
9717 op0 = memory_address_addr_space (mode, op0, as);
9718 if (!integer_zerop (TREE_OPERAND (exp, 1)))
9719 {
9720 rtx off
9721 = immed_double_int_const (mem_ref_offset (exp), address_mode);
9722 op0 = simplify_gen_binary (PLUS, address_mode, op0, off);
9723 op0 = memory_address_addr_space (mode, op0, as);
9724 }
9725 temp = gen_rtx_MEM (mode, op0);
9726 set_mem_attributes (temp, exp, 0);
9727 set_mem_addr_space (temp, as);
9728 if (TREE_THIS_VOLATILE (exp))
9729 MEM_VOLATILE_P (temp) = 1;
9730 if (modifier != EXPAND_WRITE
9731 && modifier != EXPAND_MEMORY
9732 && mode != BLKmode
9733 && align < GET_MODE_ALIGNMENT (mode))
9734 {
9735 if ((icode = optab_handler (movmisalign_optab, mode))
9736 != CODE_FOR_nothing)
9737 {
9738 struct expand_operand ops[2];
9739
9740 /* We've already validated the memory, and we're creating a
9741 new pseudo destination. The predicates really can't fail,
9742 nor can the generator. */
9743 create_output_operand (&ops[0], NULL_RTX, mode);
9744 create_fixed_operand (&ops[1], temp);
9745 expand_insn (icode, 2, ops);
9746 temp = ops[0].value;
9747 }
9748 else if (SLOW_UNALIGNED_ACCESS (mode, align))
9749 temp = extract_bit_field (temp, GET_MODE_BITSIZE (mode),
9750 0, TYPE_UNSIGNED (TREE_TYPE (exp)),
9751 (modifier == EXPAND_STACK_PARM
9752 ? NULL_RTX : target),
9753 mode, mode);
9754 }
9755 return temp;
9756 }
9757
9758 case ARRAY_REF:
9759
9760 {
9761 tree array = treeop0;
9762 tree index = treeop1;
9763 tree init;
9764
9765 /* Fold an expression like: "foo"[2].
9766 This is not done in fold so it won't happen inside &.
9767 Don't fold if this is for wide characters since it's too
9768 difficult to do correctly and this is a very rare case. */
9769
9770 if (modifier != EXPAND_CONST_ADDRESS
9771 && modifier != EXPAND_INITIALIZER
9772 && modifier != EXPAND_MEMORY)
9773 {
9774 tree t = fold_read_from_constant_string (exp);
9775
9776 if (t)
9777 return expand_expr (t, target, tmode, modifier);
9778 }
9779
9780 /* If this is a constant index into a constant array,
9781 just get the value from the array. Handle both the cases when
9782 we have an explicit constructor and when our operand is a variable
9783 that was declared const. */
9784
9785 if (modifier != EXPAND_CONST_ADDRESS
9786 && modifier != EXPAND_INITIALIZER
9787 && modifier != EXPAND_MEMORY
9788 && TREE_CODE (array) == CONSTRUCTOR
9789 && ! TREE_SIDE_EFFECTS (array)
9790 && TREE_CODE (index) == INTEGER_CST)
9791 {
9792 unsigned HOST_WIDE_INT ix;
9793 tree field, value;
9794
9795 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (array), ix,
9796 field, value)
9797 if (tree_int_cst_equal (field, index))
9798 {
9799 if (!TREE_SIDE_EFFECTS (value))
9800 return expand_expr (fold (value), target, tmode, modifier);
9801 break;
9802 }
9803 }
9804
9805 else if (optimize >= 1
9806 && modifier != EXPAND_CONST_ADDRESS
9807 && modifier != EXPAND_INITIALIZER
9808 && modifier != EXPAND_MEMORY
9809 && TREE_READONLY (array) && ! TREE_SIDE_EFFECTS (array)
9810 && TREE_CODE (index) == INTEGER_CST
9811 && (TREE_CODE (array) == VAR_DECL
9812 || TREE_CODE (array) == CONST_DECL)
9813 && (init = ctor_for_folding (array)) != error_mark_node)
9814 {
9815 if (TREE_CODE (init) == CONSTRUCTOR)
9816 {
9817 unsigned HOST_WIDE_INT ix;
9818 tree field, value;
9819
9820 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (init), ix,
9821 field, value)
9822 if (tree_int_cst_equal (field, index))
9823 {
9824 if (TREE_SIDE_EFFECTS (value))
9825 break;
9826
9827 if (TREE_CODE (value) == CONSTRUCTOR)
9828 {
9829 /* If VALUE is a CONSTRUCTOR, this
9830 optimization is only useful if
9831 this doesn't store the CONSTRUCTOR
9832 into memory. If it does, it is more
9833 efficient to just load the data from
9834 the array directly. */
9835 rtx ret = expand_constructor (value, target,
9836 modifier, true);
9837 if (ret == NULL_RTX)
9838 break;
9839 }
9840
9841 return
9842 expand_expr (fold (value), target, tmode, modifier);
9843 }
9844 }
9845 else if (TREE_CODE (init) == STRING_CST)
9846 {
9847 tree low_bound = array_ref_low_bound (exp);
9848 tree index1 = fold_convert_loc (loc, sizetype, treeop1);
9849
9850 /* Optimize the special case of a zero lower bound.
9851
9852 We convert the lower bound to sizetype to avoid problems
9853 with constant folding. E.g. suppose the lower bound is
9854 1 and its mode is QI. Without the conversion
9855 (ARRAY + (INDEX - (unsigned char)1))
9856 becomes
9857 (ARRAY + (-(unsigned char)1) + INDEX)
9858 which becomes
9859 (ARRAY + 255 + INDEX). Oops! */
9860 if (!integer_zerop (low_bound))
9861 index1 = size_diffop_loc (loc, index1,
9862 fold_convert_loc (loc, sizetype,
9863 low_bound));
9864
9865 if (compare_tree_int (index1, TREE_STRING_LENGTH (init)) < 0)
9866 {
9867 tree type = TREE_TYPE (TREE_TYPE (init));
9868 enum machine_mode mode = TYPE_MODE (type);
9869
9870 if (GET_MODE_CLASS (mode) == MODE_INT
9871 && GET_MODE_SIZE (mode) == 1)
9872 return gen_int_mode (TREE_STRING_POINTER (init)
9873 [TREE_INT_CST_LOW (index1)],
9874 mode);
9875 }
9876 }
9877 }
9878 }
9879 goto normal_inner_ref;
9880
9881 case COMPONENT_REF:
9882 /* If the operand is a CONSTRUCTOR, we can just extract the
9883 appropriate field if it is present. */
9884 if (TREE_CODE (treeop0) == CONSTRUCTOR)
9885 {
9886 unsigned HOST_WIDE_INT idx;
9887 tree field, value;
9888
9889 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (treeop0),
9890 idx, field, value)
9891 if (field == treeop1
9892 /* We can normally use the value of the field in the
9893 CONSTRUCTOR. However, if this is a bitfield in
9894 an integral mode that we can fit in a HOST_WIDE_INT,
9895 we must mask only the number of bits in the bitfield,
9896 since this is done implicitly by the constructor. If
9897 the bitfield does not meet either of those conditions,
9898 we can't do this optimization. */
9899 && (! DECL_BIT_FIELD (field)
9900 || ((GET_MODE_CLASS (DECL_MODE (field)) == MODE_INT)
9901 && (GET_MODE_PRECISION (DECL_MODE (field))
9902 <= HOST_BITS_PER_WIDE_INT))))
9903 {
9904 if (DECL_BIT_FIELD (field)
9905 && modifier == EXPAND_STACK_PARM)
9906 target = 0;
9907 op0 = expand_expr (value, target, tmode, modifier);
9908 if (DECL_BIT_FIELD (field))
9909 {
9910 HOST_WIDE_INT bitsize = TREE_INT_CST_LOW (DECL_SIZE (field));
9911 enum machine_mode imode = TYPE_MODE (TREE_TYPE (field));
9912
9913 if (TYPE_UNSIGNED (TREE_TYPE (field)))
9914 {
9915 op1 = gen_int_mode (((HOST_WIDE_INT) 1 << bitsize) - 1,
9916 imode);
9917 op0 = expand_and (imode, op0, op1, target);
9918 }
9919 else
9920 {
9921 int count = GET_MODE_PRECISION (imode) - bitsize;
9922
9923 op0 = expand_shift (LSHIFT_EXPR, imode, op0, count,
9924 target, 0);
9925 op0 = expand_shift (RSHIFT_EXPR, imode, op0, count,
9926 target, 0);
9927 }
9928 }
9929
9930 return op0;
9931 }
9932 }
9933 goto normal_inner_ref;
9934
9935 case BIT_FIELD_REF:
9936 case ARRAY_RANGE_REF:
9937 normal_inner_ref:
9938 {
9939 enum machine_mode mode1, mode2;
9940 HOST_WIDE_INT bitsize, bitpos;
9941 tree offset;
9942 int volatilep = 0, must_force_mem;
9943 tree tem = get_inner_reference (exp, &bitsize, &bitpos, &offset,
9944 &mode1, &unsignedp, &volatilep, true);
9945 rtx orig_op0, memloc;
9946 bool mem_attrs_from_type = false;
9947
9948 /* If we got back the original object, something is wrong. Perhaps
9949 we are evaluating an expression too early. In any event, don't
9950 infinitely recurse. */
9951 gcc_assert (tem != exp);
9952
9953 /* If TEM's type is a union of variable size, pass TARGET to the inner
9954 computation, since it will need a temporary and TARGET is known
9955 to have to do. This occurs in unchecked conversion in Ada. */
9956 orig_op0 = op0
9957 = expand_expr (tem,
9958 (TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE
9959 && COMPLETE_TYPE_P (TREE_TYPE (tem))
9960 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem)))
9961 != INTEGER_CST)
9962 && modifier != EXPAND_STACK_PARM
9963 ? target : NULL_RTX),
9964 VOIDmode,
9965 modifier == EXPAND_SUM ? EXPAND_NORMAL : modifier);
9966
9967 /* If the bitfield is volatile, we want to access it in the
9968 field's mode, not the computed mode.
9969 If a MEM has VOIDmode (external with incomplete type),
9970 use BLKmode for it instead. */
9971 if (MEM_P (op0))
9972 {
9973 if (volatilep && flag_strict_volatile_bitfields > 0)
9974 op0 = adjust_address (op0, mode1, 0);
9975 else if (GET_MODE (op0) == VOIDmode)
9976 op0 = adjust_address (op0, BLKmode, 0);
9977 }
9978
9979 mode2
9980 = CONSTANT_P (op0) ? TYPE_MODE (TREE_TYPE (tem)) : GET_MODE (op0);
9981
9982 /* If we have either an offset, a BLKmode result, or a reference
9983 outside the underlying object, we must force it to memory.
9984 Such a case can occur in Ada if we have unchecked conversion
9985 of an expression from a scalar type to an aggregate type or
9986 for an ARRAY_RANGE_REF whose type is BLKmode, or if we were
9987 passed a partially uninitialized object or a view-conversion
9988 to a larger size. */
9989 must_force_mem = (offset
9990 || mode1 == BLKmode
9991 || bitpos + bitsize > GET_MODE_BITSIZE (mode2));
9992
9993 /* Handle CONCAT first. */
9994 if (GET_CODE (op0) == CONCAT && !must_force_mem)
9995 {
9996 if (bitpos == 0
9997 && bitsize == GET_MODE_BITSIZE (GET_MODE (op0)))
9998 return op0;
9999 if (bitpos == 0
10000 && bitsize == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 0)))
10001 && bitsize)
10002 {
10003 op0 = XEXP (op0, 0);
10004 mode2 = GET_MODE (op0);
10005 }
10006 else if (bitpos == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 0)))
10007 && bitsize == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 1)))
10008 && bitpos
10009 && bitsize)
10010 {
10011 op0 = XEXP (op0, 1);
10012 bitpos = 0;
10013 mode2 = GET_MODE (op0);
10014 }
10015 else
10016 /* Otherwise force into memory. */
10017 must_force_mem = 1;
10018 }
10019
10020 /* If this is a constant, put it in a register if it is a legitimate
10021 constant and we don't need a memory reference. */
10022 if (CONSTANT_P (op0)
10023 && mode2 != BLKmode
10024 && targetm.legitimate_constant_p (mode2, op0)
10025 && !must_force_mem)
10026 op0 = force_reg (mode2, op0);
10027
10028 /* Otherwise, if this is a constant, try to force it to the constant
10029 pool. Note that back-ends, e.g. MIPS, may refuse to do so if it
10030 is a legitimate constant. */
10031 else if (CONSTANT_P (op0) && (memloc = force_const_mem (mode2, op0)))
10032 op0 = validize_mem (memloc);
10033
10034 /* Otherwise, if this is a constant or the object is not in memory
10035 and need be, put it there. */
10036 else if (CONSTANT_P (op0) || (!MEM_P (op0) && must_force_mem))
10037 {
10038 tree nt = build_qualified_type (TREE_TYPE (tem),
10039 (TYPE_QUALS (TREE_TYPE (tem))
10040 | TYPE_QUAL_CONST));
10041 memloc = assign_temp (nt, 1, 1);
10042 emit_move_insn (memloc, op0);
10043 op0 = memloc;
10044 mem_attrs_from_type = true;
10045 }
10046
10047 if (offset)
10048 {
10049 enum machine_mode address_mode;
10050 rtx offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode,
10051 EXPAND_SUM);
10052
10053 gcc_assert (MEM_P (op0));
10054
10055 address_mode = get_address_mode (op0);
10056 if (GET_MODE (offset_rtx) != address_mode)
10057 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
10058
10059 if (GET_MODE (op0) == BLKmode
10060 /* A constant address in OP0 can have VOIDmode, we must
10061 not try to call force_reg in that case. */
10062 && GET_MODE (XEXP (op0, 0)) != VOIDmode
10063 && bitsize != 0
10064 && (bitpos % bitsize) == 0
10065 && (bitsize % GET_MODE_ALIGNMENT (mode1)) == 0
10066 && MEM_ALIGN (op0) == GET_MODE_ALIGNMENT (mode1))
10067 {
10068 op0 = adjust_address (op0, mode1, bitpos / BITS_PER_UNIT);
10069 bitpos = 0;
10070 }
10071
10072 op0 = offset_address (op0, offset_rtx,
10073 highest_pow2_factor (offset));
10074 }
10075
10076 /* If OFFSET is making OP0 more aligned than BIGGEST_ALIGNMENT,
10077 record its alignment as BIGGEST_ALIGNMENT. */
10078 if (MEM_P (op0) && bitpos == 0 && offset != 0
10079 && is_aligning_offset (offset, tem))
10080 set_mem_align (op0, BIGGEST_ALIGNMENT);
10081
10082 /* Don't forget about volatility even if this is a bitfield. */
10083 if (MEM_P (op0) && volatilep && ! MEM_VOLATILE_P (op0))
10084 {
10085 if (op0 == orig_op0)
10086 op0 = copy_rtx (op0);
10087
10088 MEM_VOLATILE_P (op0) = 1;
10089 }
10090
10091 /* In cases where an aligned union has an unaligned object
10092 as a field, we might be extracting a BLKmode value from
10093 an integer-mode (e.g., SImode) object. Handle this case
10094 by doing the extract into an object as wide as the field
10095 (which we know to be the width of a basic mode), then
10096 storing into memory, and changing the mode to BLKmode. */
10097 if (mode1 == VOIDmode
10098 || REG_P (op0) || GET_CODE (op0) == SUBREG
10099 || (mode1 != BLKmode && ! direct_load[(int) mode1]
10100 && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
10101 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT
10102 && modifier != EXPAND_CONST_ADDRESS
10103 && modifier != EXPAND_INITIALIZER
10104 && modifier != EXPAND_MEMORY)
10105 /* If the field is volatile, we always want an aligned
10106 access. Do this in following two situations:
10107 1. the access is not already naturally
10108 aligned, otherwise "normal" (non-bitfield) volatile fields
10109 become non-addressable.
10110 2. the bitsize is narrower than the access size. Need
10111 to extract bitfields from the access. */
10112 || (volatilep && flag_strict_volatile_bitfields > 0
10113 && (bitpos % GET_MODE_ALIGNMENT (mode) != 0
10114 || (mode1 != BLKmode
10115 && bitsize < GET_MODE_SIZE (mode1) * BITS_PER_UNIT)))
10116 /* If the field isn't aligned enough to fetch as a memref,
10117 fetch it as a bit field. */
10118 || (mode1 != BLKmode
10119 && (((TYPE_ALIGN (TREE_TYPE (tem)) < GET_MODE_ALIGNMENT (mode)
10120 || (bitpos % GET_MODE_ALIGNMENT (mode) != 0)
10121 || (MEM_P (op0)
10122 && (MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode1)
10123 || (bitpos % GET_MODE_ALIGNMENT (mode1) != 0))))
10124 && modifier != EXPAND_MEMORY
10125 && ((modifier == EXPAND_CONST_ADDRESS
10126 || modifier == EXPAND_INITIALIZER)
10127 ? STRICT_ALIGNMENT
10128 : SLOW_UNALIGNED_ACCESS (mode1, MEM_ALIGN (op0))))
10129 || (bitpos % BITS_PER_UNIT != 0)))
10130 /* If the type and the field are a constant size and the
10131 size of the type isn't the same size as the bitfield,
10132 we must use bitfield operations. */
10133 || (bitsize >= 0
10134 && TYPE_SIZE (TREE_TYPE (exp))
10135 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
10136 && 0 != compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)),
10137 bitsize)))
10138 {
10139 enum machine_mode ext_mode = mode;
10140
10141 if (ext_mode == BLKmode
10142 && ! (target != 0 && MEM_P (op0)
10143 && MEM_P (target)
10144 && bitpos % BITS_PER_UNIT == 0))
10145 ext_mode = mode_for_size (bitsize, MODE_INT, 1);
10146
10147 if (ext_mode == BLKmode)
10148 {
10149 if (target == 0)
10150 target = assign_temp (type, 1, 1);
10151
10152 if (bitsize == 0)
10153 return target;
10154
10155 /* In this case, BITPOS must start at a byte boundary and
10156 TARGET, if specified, must be a MEM. */
10157 gcc_assert (MEM_P (op0)
10158 && (!target || MEM_P (target))
10159 && !(bitpos % BITS_PER_UNIT));
10160
10161 emit_block_move (target,
10162 adjust_address (op0, VOIDmode,
10163 bitpos / BITS_PER_UNIT),
10164 GEN_INT ((bitsize + BITS_PER_UNIT - 1)
10165 / BITS_PER_UNIT),
10166 (modifier == EXPAND_STACK_PARM
10167 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
10168
10169 return target;
10170 }
10171
10172 op0 = validize_mem (op0);
10173
10174 if (MEM_P (op0) && REG_P (XEXP (op0, 0)))
10175 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
10176
10177 op0 = extract_bit_field (op0, bitsize, bitpos, unsignedp,
10178 (modifier == EXPAND_STACK_PARM
10179 ? NULL_RTX : target),
10180 ext_mode, ext_mode);
10181
10182 /* If the result is a record type and BITSIZE is narrower than
10183 the mode of OP0, an integral mode, and this is a big endian
10184 machine, we must put the field into the high-order bits. */
10185 if (TREE_CODE (type) == RECORD_TYPE && BYTES_BIG_ENDIAN
10186 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT
10187 && bitsize < (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (op0)))
10188 op0 = expand_shift (LSHIFT_EXPR, GET_MODE (op0), op0,
10189 GET_MODE_BITSIZE (GET_MODE (op0))
10190 - bitsize, op0, 1);
10191
10192 /* If the result type is BLKmode, store the data into a temporary
10193 of the appropriate type, but with the mode corresponding to the
10194 mode for the data we have (op0's mode). It's tempting to make
10195 this a constant type, since we know it's only being stored once,
10196 but that can cause problems if we are taking the address of this
10197 COMPONENT_REF because the MEM of any reference via that address
10198 will have flags corresponding to the type, which will not
10199 necessarily be constant. */
10200 if (mode == BLKmode)
10201 {
10202 rtx new_rtx;
10203
10204 new_rtx = assign_stack_temp_for_type (ext_mode,
10205 GET_MODE_BITSIZE (ext_mode),
10206 type);
10207 emit_move_insn (new_rtx, op0);
10208 op0 = copy_rtx (new_rtx);
10209 PUT_MODE (op0, BLKmode);
10210 }
10211
10212 return op0;
10213 }
10214
10215 /* If the result is BLKmode, use that to access the object
10216 now as well. */
10217 if (mode == BLKmode)
10218 mode1 = BLKmode;
10219
10220 /* Get a reference to just this component. */
10221 if (modifier == EXPAND_CONST_ADDRESS
10222 || modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
10223 op0 = adjust_address_nv (op0, mode1, bitpos / BITS_PER_UNIT);
10224 else
10225 op0 = adjust_address (op0, mode1, bitpos / BITS_PER_UNIT);
10226
10227 if (op0 == orig_op0)
10228 op0 = copy_rtx (op0);
10229
10230 /* If op0 is a temporary because of forcing to memory, pass only the
10231 type to set_mem_attributes so that the original expression is never
10232 marked as ADDRESSABLE through MEM_EXPR of the temporary. */
10233 if (mem_attrs_from_type)
10234 set_mem_attributes (op0, type, 0);
10235 else
10236 set_mem_attributes (op0, exp, 0);
10237
10238 if (REG_P (XEXP (op0, 0)))
10239 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
10240
10241 MEM_VOLATILE_P (op0) |= volatilep;
10242 if (mode == mode1 || mode1 == BLKmode || mode1 == tmode
10243 || modifier == EXPAND_CONST_ADDRESS
10244 || modifier == EXPAND_INITIALIZER)
10245 return op0;
10246
10247 if (target == 0)
10248 target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode);
10249
10250 convert_move (target, op0, unsignedp);
10251 return target;
10252 }
10253
10254 case OBJ_TYPE_REF:
10255 return expand_expr (OBJ_TYPE_REF_EXPR (exp), target, tmode, modifier);
10256
10257 case CALL_EXPR:
10258 /* All valid uses of __builtin_va_arg_pack () are removed during
10259 inlining. */
10260 if (CALL_EXPR_VA_ARG_PACK (exp))
10261 error ("%Kinvalid use of %<__builtin_va_arg_pack ()%>", exp);
10262 {
10263 tree fndecl = get_callee_fndecl (exp), attr;
10264
10265 if (fndecl
10266 && (attr = lookup_attribute ("error",
10267 DECL_ATTRIBUTES (fndecl))) != NULL)
10268 error ("%Kcall to %qs declared with attribute error: %s",
10269 exp, identifier_to_locale (lang_hooks.decl_printable_name (fndecl, 1)),
10270 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr))));
10271 if (fndecl
10272 && (attr = lookup_attribute ("warning",
10273 DECL_ATTRIBUTES (fndecl))) != NULL)
10274 warning_at (tree_nonartificial_location (exp),
10275 0, "%Kcall to %qs declared with attribute warning: %s",
10276 exp, identifier_to_locale (lang_hooks.decl_printable_name (fndecl, 1)),
10277 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr))));
10278
10279 /* Check for a built-in function. */
10280 if (fndecl && DECL_BUILT_IN (fndecl))
10281 {
10282 gcc_assert (DECL_BUILT_IN_CLASS (fndecl) != BUILT_IN_FRONTEND);
10283 return expand_builtin (exp, target, subtarget, tmode, ignore);
10284 }
10285 }
10286 return expand_call (exp, target, ignore);
10287
10288 case VIEW_CONVERT_EXPR:
10289 op0 = NULL_RTX;
10290
10291 /* If we are converting to BLKmode, try to avoid an intermediate
10292 temporary by fetching an inner memory reference. */
10293 if (mode == BLKmode
10294 && TREE_CODE (TYPE_SIZE (type)) == INTEGER_CST
10295 && TYPE_MODE (TREE_TYPE (treeop0)) != BLKmode
10296 && handled_component_p (treeop0))
10297 {
10298 enum machine_mode mode1;
10299 HOST_WIDE_INT bitsize, bitpos;
10300 tree offset;
10301 int unsignedp;
10302 int volatilep = 0;
10303 tree tem
10304 = get_inner_reference (treeop0, &bitsize, &bitpos,
10305 &offset, &mode1, &unsignedp, &volatilep,
10306 true);
10307 rtx orig_op0;
10308
10309 /* ??? We should work harder and deal with non-zero offsets. */
10310 if (!offset
10311 && (bitpos % BITS_PER_UNIT) == 0
10312 && bitsize >= 0
10313 && compare_tree_int (TYPE_SIZE (type), bitsize) == 0)
10314 {
10315 /* See the normal_inner_ref case for the rationale. */
10316 orig_op0
10317 = expand_expr (tem,
10318 (TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE
10319 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem)))
10320 != INTEGER_CST)
10321 && modifier != EXPAND_STACK_PARM
10322 ? target : NULL_RTX),
10323 VOIDmode,
10324 modifier == EXPAND_SUM ? EXPAND_NORMAL : modifier);
10325
10326 if (MEM_P (orig_op0))
10327 {
10328 op0 = orig_op0;
10329
10330 /* Get a reference to just this component. */
10331 if (modifier == EXPAND_CONST_ADDRESS
10332 || modifier == EXPAND_SUM
10333 || modifier == EXPAND_INITIALIZER)
10334 op0 = adjust_address_nv (op0, mode, bitpos / BITS_PER_UNIT);
10335 else
10336 op0 = adjust_address (op0, mode, bitpos / BITS_PER_UNIT);
10337
10338 if (op0 == orig_op0)
10339 op0 = copy_rtx (op0);
10340
10341 set_mem_attributes (op0, treeop0, 0);
10342 if (REG_P (XEXP (op0, 0)))
10343 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
10344
10345 MEM_VOLATILE_P (op0) |= volatilep;
10346 }
10347 }
10348 }
10349
10350 if (!op0)
10351 op0 = expand_expr (treeop0, NULL_RTX, VOIDmode, modifier);
10352
10353 /* If the input and output modes are both the same, we are done. */
10354 if (mode == GET_MODE (op0))
10355 ;
10356 /* If neither mode is BLKmode, and both modes are the same size
10357 then we can use gen_lowpart. */
10358 else if (mode != BLKmode && GET_MODE (op0) != BLKmode
10359 && (GET_MODE_PRECISION (mode)
10360 == GET_MODE_PRECISION (GET_MODE (op0)))
10361 && !COMPLEX_MODE_P (GET_MODE (op0)))
10362 {
10363 if (GET_CODE (op0) == SUBREG)
10364 op0 = force_reg (GET_MODE (op0), op0);
10365 temp = gen_lowpart_common (mode, op0);
10366 if (temp)
10367 op0 = temp;
10368 else
10369 {
10370 if (!REG_P (op0) && !MEM_P (op0))
10371 op0 = force_reg (GET_MODE (op0), op0);
10372 op0 = gen_lowpart (mode, op0);
10373 }
10374 }
10375 /* If both types are integral, convert from one mode to the other. */
10376 else if (INTEGRAL_TYPE_P (type) && INTEGRAL_TYPE_P (TREE_TYPE (treeop0)))
10377 op0 = convert_modes (mode, GET_MODE (op0), op0,
10378 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
10379 /* As a last resort, spill op0 to memory, and reload it in a
10380 different mode. */
10381 else if (!MEM_P (op0))
10382 {
10383 /* If the operand is not a MEM, force it into memory. Since we
10384 are going to be changing the mode of the MEM, don't call
10385 force_const_mem for constants because we don't allow pool
10386 constants to change mode. */
10387 tree inner_type = TREE_TYPE (treeop0);
10388
10389 gcc_assert (!TREE_ADDRESSABLE (exp));
10390
10391 if (target == 0 || GET_MODE (target) != TYPE_MODE (inner_type))
10392 target
10393 = assign_stack_temp_for_type
10394 (TYPE_MODE (inner_type),
10395 GET_MODE_SIZE (TYPE_MODE (inner_type)), inner_type);
10396
10397 emit_move_insn (target, op0);
10398 op0 = target;
10399 }
10400
10401 /* At this point, OP0 is in the correct mode. If the output type is
10402 such that the operand is known to be aligned, indicate that it is.
10403 Otherwise, we need only be concerned about alignment for non-BLKmode
10404 results. */
10405 if (MEM_P (op0))
10406 {
10407 enum insn_code icode;
10408
10409 if (TYPE_ALIGN_OK (type))
10410 {
10411 /* ??? Copying the MEM without substantially changing it might
10412 run afoul of the code handling volatile memory references in
10413 store_expr, which assumes that TARGET is returned unmodified
10414 if it has been used. */
10415 op0 = copy_rtx (op0);
10416 set_mem_align (op0, MAX (MEM_ALIGN (op0), TYPE_ALIGN (type)));
10417 }
10418 else if (mode != BLKmode
10419 && MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode)
10420 /* If the target does have special handling for unaligned
10421 loads of mode then use them. */
10422 && ((icode = optab_handler (movmisalign_optab, mode))
10423 != CODE_FOR_nothing))
10424 {
10425 rtx reg, insn;
10426
10427 op0 = adjust_address (op0, mode, 0);
10428 /* We've already validated the memory, and we're creating a
10429 new pseudo destination. The predicates really can't
10430 fail. */
10431 reg = gen_reg_rtx (mode);
10432
10433 /* Nor can the insn generator. */
10434 insn = GEN_FCN (icode) (reg, op0);
10435 emit_insn (insn);
10436 return reg;
10437 }
10438 else if (STRICT_ALIGNMENT
10439 && mode != BLKmode
10440 && MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode))
10441 {
10442 tree inner_type = TREE_TYPE (treeop0);
10443 HOST_WIDE_INT temp_size
10444 = MAX (int_size_in_bytes (inner_type),
10445 (HOST_WIDE_INT) GET_MODE_SIZE (mode));
10446 rtx new_rtx
10447 = assign_stack_temp_for_type (mode, temp_size, type);
10448 rtx new_with_op0_mode
10449 = adjust_address (new_rtx, GET_MODE (op0), 0);
10450
10451 gcc_assert (!TREE_ADDRESSABLE (exp));
10452
10453 if (GET_MODE (op0) == BLKmode)
10454 emit_block_move (new_with_op0_mode, op0,
10455 GEN_INT (GET_MODE_SIZE (mode)),
10456 (modifier == EXPAND_STACK_PARM
10457 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
10458 else
10459 emit_move_insn (new_with_op0_mode, op0);
10460
10461 op0 = new_rtx;
10462 }
10463
10464 op0 = adjust_address (op0, mode, 0);
10465 }
10466
10467 return op0;
10468
10469 case MODIFY_EXPR:
10470 {
10471 tree lhs = treeop0;
10472 tree rhs = treeop1;
10473 gcc_assert (ignore);
10474
10475 /* Check for |= or &= of a bitfield of size one into another bitfield
10476 of size 1. In this case, (unless we need the result of the
10477 assignment) we can do this more efficiently with a
10478 test followed by an assignment, if necessary.
10479
10480 ??? At this point, we can't get a BIT_FIELD_REF here. But if
10481 things change so we do, this code should be enhanced to
10482 support it. */
10483 if (TREE_CODE (lhs) == COMPONENT_REF
10484 && (TREE_CODE (rhs) == BIT_IOR_EXPR
10485 || TREE_CODE (rhs) == BIT_AND_EXPR)
10486 && TREE_OPERAND (rhs, 0) == lhs
10487 && TREE_CODE (TREE_OPERAND (rhs, 1)) == COMPONENT_REF
10488 && integer_onep (DECL_SIZE (TREE_OPERAND (lhs, 1)))
10489 && integer_onep (DECL_SIZE (TREE_OPERAND (TREE_OPERAND (rhs, 1), 1))))
10490 {
10491 rtx label = gen_label_rtx ();
10492 int value = TREE_CODE (rhs) == BIT_IOR_EXPR;
10493 do_jump (TREE_OPERAND (rhs, 1),
10494 value ? label : 0,
10495 value ? 0 : label, -1);
10496 expand_assignment (lhs, build_int_cst (TREE_TYPE (rhs), value),
10497 false);
10498 do_pending_stack_adjust ();
10499 emit_label (label);
10500 return const0_rtx;
10501 }
10502
10503 expand_assignment (lhs, rhs, false);
10504 return const0_rtx;
10505 }
10506
10507 case ADDR_EXPR:
10508 return expand_expr_addr_expr (exp, target, tmode, modifier);
10509
10510 case REALPART_EXPR:
10511 op0 = expand_normal (treeop0);
10512 return read_complex_part (op0, false);
10513
10514 case IMAGPART_EXPR:
10515 op0 = expand_normal (treeop0);
10516 return read_complex_part (op0, true);
10517
10518 case RETURN_EXPR:
10519 case LABEL_EXPR:
10520 case GOTO_EXPR:
10521 case SWITCH_EXPR:
10522 case ASM_EXPR:
10523 /* Expanded in cfgexpand.c. */
10524 gcc_unreachable ();
10525
10526 case TRY_CATCH_EXPR:
10527 case CATCH_EXPR:
10528 case EH_FILTER_EXPR:
10529 case TRY_FINALLY_EXPR:
10530 /* Lowered by tree-eh.c. */
10531 gcc_unreachable ();
10532
10533 case WITH_CLEANUP_EXPR:
10534 case CLEANUP_POINT_EXPR:
10535 case TARGET_EXPR:
10536 case CASE_LABEL_EXPR:
10537 case VA_ARG_EXPR:
10538 case BIND_EXPR:
10539 case INIT_EXPR:
10540 case CONJ_EXPR:
10541 case COMPOUND_EXPR:
10542 case PREINCREMENT_EXPR:
10543 case PREDECREMENT_EXPR:
10544 case POSTINCREMENT_EXPR:
10545 case POSTDECREMENT_EXPR:
10546 case LOOP_EXPR:
10547 case EXIT_EXPR:
10548 case COMPOUND_LITERAL_EXPR:
10549 /* Lowered by gimplify.c. */
10550 gcc_unreachable ();
10551
10552 case FDESC_EXPR:
10553 /* Function descriptors are not valid except for as
10554 initialization constants, and should not be expanded. */
10555 gcc_unreachable ();
10556
10557 case WITH_SIZE_EXPR:
10558 /* WITH_SIZE_EXPR expands to its first argument. The caller should
10559 have pulled out the size to use in whatever context it needed. */
10560 return expand_expr_real (treeop0, original_target, tmode,
10561 modifier, alt_rtl);
10562
10563 default:
10564 return expand_expr_real_2 (&ops, target, tmode, modifier);
10565 }
10566 }
10567 \f
10568 /* Subroutine of above: reduce EXP to the precision of TYPE (in the
10569 signedness of TYPE), possibly returning the result in TARGET. */
10570 static rtx
10571 reduce_to_bit_field_precision (rtx exp, rtx target, tree type)
10572 {
10573 HOST_WIDE_INT prec = TYPE_PRECISION (type);
10574 if (target && GET_MODE (target) != GET_MODE (exp))
10575 target = 0;
10576 /* For constant values, reduce using build_int_cst_type. */
10577 if (CONST_INT_P (exp))
10578 {
10579 HOST_WIDE_INT value = INTVAL (exp);
10580 tree t = build_int_cst_type (type, value);
10581 return expand_expr (t, target, VOIDmode, EXPAND_NORMAL);
10582 }
10583 else if (TYPE_UNSIGNED (type))
10584 {
10585 rtx mask = immed_double_int_const (double_int::mask (prec),
10586 GET_MODE (exp));
10587 return expand_and (GET_MODE (exp), exp, mask, target);
10588 }
10589 else
10590 {
10591 int count = GET_MODE_PRECISION (GET_MODE (exp)) - prec;
10592 exp = expand_shift (LSHIFT_EXPR, GET_MODE (exp),
10593 exp, count, target, 0);
10594 return expand_shift (RSHIFT_EXPR, GET_MODE (exp),
10595 exp, count, target, 0);
10596 }
10597 }
10598 \f
10599 /* Subroutine of above: returns 1 if OFFSET corresponds to an offset that
10600 when applied to the address of EXP produces an address known to be
10601 aligned more than BIGGEST_ALIGNMENT. */
10602
10603 static int
10604 is_aligning_offset (const_tree offset, const_tree exp)
10605 {
10606 /* Strip off any conversions. */
10607 while (CONVERT_EXPR_P (offset))
10608 offset = TREE_OPERAND (offset, 0);
10609
10610 /* We must now have a BIT_AND_EXPR with a constant that is one less than
10611 power of 2 and which is larger than BIGGEST_ALIGNMENT. */
10612 if (TREE_CODE (offset) != BIT_AND_EXPR
10613 || !tree_fits_uhwi_p (TREE_OPERAND (offset, 1))
10614 || compare_tree_int (TREE_OPERAND (offset, 1),
10615 BIGGEST_ALIGNMENT / BITS_PER_UNIT) <= 0
10616 || !exact_log2 (tree_to_uhwi (TREE_OPERAND (offset, 1)) + 1) < 0)
10617 return 0;
10618
10619 /* Look at the first operand of BIT_AND_EXPR and strip any conversion.
10620 It must be NEGATE_EXPR. Then strip any more conversions. */
10621 offset = TREE_OPERAND (offset, 0);
10622 while (CONVERT_EXPR_P (offset))
10623 offset = TREE_OPERAND (offset, 0);
10624
10625 if (TREE_CODE (offset) != NEGATE_EXPR)
10626 return 0;
10627
10628 offset = TREE_OPERAND (offset, 0);
10629 while (CONVERT_EXPR_P (offset))
10630 offset = TREE_OPERAND (offset, 0);
10631
10632 /* This must now be the address of EXP. */
10633 return TREE_CODE (offset) == ADDR_EXPR && TREE_OPERAND (offset, 0) == exp;
10634 }
10635 \f
10636 /* Return the tree node if an ARG corresponds to a string constant or zero
10637 if it doesn't. If we return nonzero, set *PTR_OFFSET to the offset
10638 in bytes within the string that ARG is accessing. The type of the
10639 offset will be `sizetype'. */
10640
10641 tree
10642 string_constant (tree arg, tree *ptr_offset)
10643 {
10644 tree array, offset, lower_bound;
10645 STRIP_NOPS (arg);
10646
10647 if (TREE_CODE (arg) == ADDR_EXPR)
10648 {
10649 if (TREE_CODE (TREE_OPERAND (arg, 0)) == STRING_CST)
10650 {
10651 *ptr_offset = size_zero_node;
10652 return TREE_OPERAND (arg, 0);
10653 }
10654 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == VAR_DECL)
10655 {
10656 array = TREE_OPERAND (arg, 0);
10657 offset = size_zero_node;
10658 }
10659 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == ARRAY_REF)
10660 {
10661 array = TREE_OPERAND (TREE_OPERAND (arg, 0), 0);
10662 offset = TREE_OPERAND (TREE_OPERAND (arg, 0), 1);
10663 if (TREE_CODE (array) != STRING_CST
10664 && TREE_CODE (array) != VAR_DECL)
10665 return 0;
10666
10667 /* Check if the array has a nonzero lower bound. */
10668 lower_bound = array_ref_low_bound (TREE_OPERAND (arg, 0));
10669 if (!integer_zerop (lower_bound))
10670 {
10671 /* If the offset and base aren't both constants, return 0. */
10672 if (TREE_CODE (lower_bound) != INTEGER_CST)
10673 return 0;
10674 if (TREE_CODE (offset) != INTEGER_CST)
10675 return 0;
10676 /* Adjust offset by the lower bound. */
10677 offset = size_diffop (fold_convert (sizetype, offset),
10678 fold_convert (sizetype, lower_bound));
10679 }
10680 }
10681 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == MEM_REF)
10682 {
10683 array = TREE_OPERAND (TREE_OPERAND (arg, 0), 0);
10684 offset = TREE_OPERAND (TREE_OPERAND (arg, 0), 1);
10685 if (TREE_CODE (array) != ADDR_EXPR)
10686 return 0;
10687 array = TREE_OPERAND (array, 0);
10688 if (TREE_CODE (array) != STRING_CST
10689 && TREE_CODE (array) != VAR_DECL)
10690 return 0;
10691 }
10692 else
10693 return 0;
10694 }
10695 else if (TREE_CODE (arg) == PLUS_EXPR || TREE_CODE (arg) == POINTER_PLUS_EXPR)
10696 {
10697 tree arg0 = TREE_OPERAND (arg, 0);
10698 tree arg1 = TREE_OPERAND (arg, 1);
10699
10700 STRIP_NOPS (arg0);
10701 STRIP_NOPS (arg1);
10702
10703 if (TREE_CODE (arg0) == ADDR_EXPR
10704 && (TREE_CODE (TREE_OPERAND (arg0, 0)) == STRING_CST
10705 || TREE_CODE (TREE_OPERAND (arg0, 0)) == VAR_DECL))
10706 {
10707 array = TREE_OPERAND (arg0, 0);
10708 offset = arg1;
10709 }
10710 else if (TREE_CODE (arg1) == ADDR_EXPR
10711 && (TREE_CODE (TREE_OPERAND (arg1, 0)) == STRING_CST
10712 || TREE_CODE (TREE_OPERAND (arg1, 0)) == VAR_DECL))
10713 {
10714 array = TREE_OPERAND (arg1, 0);
10715 offset = arg0;
10716 }
10717 else
10718 return 0;
10719 }
10720 else
10721 return 0;
10722
10723 if (TREE_CODE (array) == STRING_CST)
10724 {
10725 *ptr_offset = fold_convert (sizetype, offset);
10726 return array;
10727 }
10728 else if (TREE_CODE (array) == VAR_DECL
10729 || TREE_CODE (array) == CONST_DECL)
10730 {
10731 int length;
10732 tree init = ctor_for_folding (array);
10733
10734 /* Variables initialized to string literals can be handled too. */
10735 if (init == error_mark_node
10736 || !init
10737 || TREE_CODE (init) != STRING_CST)
10738 return 0;
10739
10740 /* Avoid const char foo[4] = "abcde"; */
10741 if (DECL_SIZE_UNIT (array) == NULL_TREE
10742 || TREE_CODE (DECL_SIZE_UNIT (array)) != INTEGER_CST
10743 || (length = TREE_STRING_LENGTH (init)) <= 0
10744 || compare_tree_int (DECL_SIZE_UNIT (array), length) < 0)
10745 return 0;
10746
10747 /* If variable is bigger than the string literal, OFFSET must be constant
10748 and inside of the bounds of the string literal. */
10749 offset = fold_convert (sizetype, offset);
10750 if (compare_tree_int (DECL_SIZE_UNIT (array), length) > 0
10751 && (! tree_fits_uhwi_p (offset)
10752 || compare_tree_int (offset, length) >= 0))
10753 return 0;
10754
10755 *ptr_offset = offset;
10756 return init;
10757 }
10758
10759 return 0;
10760 }
10761 \f
10762 /* Generate code to calculate OPS, and exploded expression
10763 using a store-flag instruction and return an rtx for the result.
10764 OPS reflects a comparison.
10765
10766 If TARGET is nonzero, store the result there if convenient.
10767
10768 Return zero if there is no suitable set-flag instruction
10769 available on this machine.
10770
10771 Once expand_expr has been called on the arguments of the comparison,
10772 we are committed to doing the store flag, since it is not safe to
10773 re-evaluate the expression. We emit the store-flag insn by calling
10774 emit_store_flag, but only expand the arguments if we have a reason
10775 to believe that emit_store_flag will be successful. If we think that
10776 it will, but it isn't, we have to simulate the store-flag with a
10777 set/jump/set sequence. */
10778
10779 static rtx
10780 do_store_flag (sepops ops, rtx target, enum machine_mode mode)
10781 {
10782 enum rtx_code code;
10783 tree arg0, arg1, type;
10784 tree tem;
10785 enum machine_mode operand_mode;
10786 int unsignedp;
10787 rtx op0, op1;
10788 rtx subtarget = target;
10789 location_t loc = ops->location;
10790
10791 arg0 = ops->op0;
10792 arg1 = ops->op1;
10793
10794 /* Don't crash if the comparison was erroneous. */
10795 if (arg0 == error_mark_node || arg1 == error_mark_node)
10796 return const0_rtx;
10797
10798 type = TREE_TYPE (arg0);
10799 operand_mode = TYPE_MODE (type);
10800 unsignedp = TYPE_UNSIGNED (type);
10801
10802 /* We won't bother with BLKmode store-flag operations because it would mean
10803 passing a lot of information to emit_store_flag. */
10804 if (operand_mode == BLKmode)
10805 return 0;
10806
10807 /* We won't bother with store-flag operations involving function pointers
10808 when function pointers must be canonicalized before comparisons. */
10809 #ifdef HAVE_canonicalize_funcptr_for_compare
10810 if (HAVE_canonicalize_funcptr_for_compare
10811 && ((TREE_CODE (TREE_TYPE (arg0)) == POINTER_TYPE
10812 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg0)))
10813 == FUNCTION_TYPE))
10814 || (TREE_CODE (TREE_TYPE (arg1)) == POINTER_TYPE
10815 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg1)))
10816 == FUNCTION_TYPE))))
10817 return 0;
10818 #endif
10819
10820 STRIP_NOPS (arg0);
10821 STRIP_NOPS (arg1);
10822
10823 /* For vector typed comparisons emit code to generate the desired
10824 all-ones or all-zeros mask. Conveniently use the VEC_COND_EXPR
10825 expander for this. */
10826 if (TREE_CODE (ops->type) == VECTOR_TYPE)
10827 {
10828 tree ifexp = build2 (ops->code, ops->type, arg0, arg1);
10829 tree if_true = constant_boolean_node (true, ops->type);
10830 tree if_false = constant_boolean_node (false, ops->type);
10831 return expand_vec_cond_expr (ops->type, ifexp, if_true, if_false, target);
10832 }
10833
10834 /* Get the rtx comparison code to use. We know that EXP is a comparison
10835 operation of some type. Some comparisons against 1 and -1 can be
10836 converted to comparisons with zero. Do so here so that the tests
10837 below will be aware that we have a comparison with zero. These
10838 tests will not catch constants in the first operand, but constants
10839 are rarely passed as the first operand. */
10840
10841 switch (ops->code)
10842 {
10843 case EQ_EXPR:
10844 code = EQ;
10845 break;
10846 case NE_EXPR:
10847 code = NE;
10848 break;
10849 case LT_EXPR:
10850 if (integer_onep (arg1))
10851 arg1 = integer_zero_node, code = unsignedp ? LEU : LE;
10852 else
10853 code = unsignedp ? LTU : LT;
10854 break;
10855 case LE_EXPR:
10856 if (! unsignedp && integer_all_onesp (arg1))
10857 arg1 = integer_zero_node, code = LT;
10858 else
10859 code = unsignedp ? LEU : LE;
10860 break;
10861 case GT_EXPR:
10862 if (! unsignedp && integer_all_onesp (arg1))
10863 arg1 = integer_zero_node, code = GE;
10864 else
10865 code = unsignedp ? GTU : GT;
10866 break;
10867 case GE_EXPR:
10868 if (integer_onep (arg1))
10869 arg1 = integer_zero_node, code = unsignedp ? GTU : GT;
10870 else
10871 code = unsignedp ? GEU : GE;
10872 break;
10873
10874 case UNORDERED_EXPR:
10875 code = UNORDERED;
10876 break;
10877 case ORDERED_EXPR:
10878 code = ORDERED;
10879 break;
10880 case UNLT_EXPR:
10881 code = UNLT;
10882 break;
10883 case UNLE_EXPR:
10884 code = UNLE;
10885 break;
10886 case UNGT_EXPR:
10887 code = UNGT;
10888 break;
10889 case UNGE_EXPR:
10890 code = UNGE;
10891 break;
10892 case UNEQ_EXPR:
10893 code = UNEQ;
10894 break;
10895 case LTGT_EXPR:
10896 code = LTGT;
10897 break;
10898
10899 default:
10900 gcc_unreachable ();
10901 }
10902
10903 /* Put a constant second. */
10904 if (TREE_CODE (arg0) == REAL_CST || TREE_CODE (arg0) == INTEGER_CST
10905 || TREE_CODE (arg0) == FIXED_CST)
10906 {
10907 tem = arg0; arg0 = arg1; arg1 = tem;
10908 code = swap_condition (code);
10909 }
10910
10911 /* If this is an equality or inequality test of a single bit, we can
10912 do this by shifting the bit being tested to the low-order bit and
10913 masking the result with the constant 1. If the condition was EQ,
10914 we xor it with 1. This does not require an scc insn and is faster
10915 than an scc insn even if we have it.
10916
10917 The code to make this transformation was moved into fold_single_bit_test,
10918 so we just call into the folder and expand its result. */
10919
10920 if ((code == NE || code == EQ)
10921 && integer_zerop (arg1)
10922 && (TYPE_PRECISION (ops->type) != 1 || TYPE_UNSIGNED (ops->type)))
10923 {
10924 gimple srcstmt = get_def_for_expr (arg0, BIT_AND_EXPR);
10925 if (srcstmt
10926 && integer_pow2p (gimple_assign_rhs2 (srcstmt)))
10927 {
10928 enum tree_code tcode = code == NE ? NE_EXPR : EQ_EXPR;
10929 tree type = lang_hooks.types.type_for_mode (mode, unsignedp);
10930 tree temp = fold_build2_loc (loc, BIT_AND_EXPR, TREE_TYPE (arg1),
10931 gimple_assign_rhs1 (srcstmt),
10932 gimple_assign_rhs2 (srcstmt));
10933 temp = fold_single_bit_test (loc, tcode, temp, arg1, type);
10934 if (temp)
10935 return expand_expr (temp, target, VOIDmode, EXPAND_NORMAL);
10936 }
10937 }
10938
10939 if (! get_subtarget (target)
10940 || GET_MODE (subtarget) != operand_mode)
10941 subtarget = 0;
10942
10943 expand_operands (arg0, arg1, subtarget, &op0, &op1, EXPAND_NORMAL);
10944
10945 if (target == 0)
10946 target = gen_reg_rtx (mode);
10947
10948 /* Try a cstore if possible. */
10949 return emit_store_flag_force (target, code, op0, op1,
10950 operand_mode, unsignedp,
10951 (TYPE_PRECISION (ops->type) == 1
10952 && !TYPE_UNSIGNED (ops->type)) ? -1 : 1);
10953 }
10954 \f
10955
10956 /* Stubs in case we haven't got a casesi insn. */
10957 #ifndef HAVE_casesi
10958 # define HAVE_casesi 0
10959 # define gen_casesi(a, b, c, d, e) (0)
10960 # define CODE_FOR_casesi CODE_FOR_nothing
10961 #endif
10962
10963 /* Attempt to generate a casesi instruction. Returns 1 if successful,
10964 0 otherwise (i.e. if there is no casesi instruction).
10965
10966 DEFAULT_PROBABILITY is the probability of jumping to the default
10967 label. */
10968 int
10969 try_casesi (tree index_type, tree index_expr, tree minval, tree range,
10970 rtx table_label, rtx default_label, rtx fallback_label,
10971 int default_probability)
10972 {
10973 struct expand_operand ops[5];
10974 enum machine_mode index_mode = SImode;
10975 rtx op1, op2, index;
10976
10977 if (! HAVE_casesi)
10978 return 0;
10979
10980 /* Convert the index to SImode. */
10981 if (GET_MODE_BITSIZE (TYPE_MODE (index_type)) > GET_MODE_BITSIZE (index_mode))
10982 {
10983 enum machine_mode omode = TYPE_MODE (index_type);
10984 rtx rangertx = expand_normal (range);
10985
10986 /* We must handle the endpoints in the original mode. */
10987 index_expr = build2 (MINUS_EXPR, index_type,
10988 index_expr, minval);
10989 minval = integer_zero_node;
10990 index = expand_normal (index_expr);
10991 if (default_label)
10992 emit_cmp_and_jump_insns (rangertx, index, LTU, NULL_RTX,
10993 omode, 1, default_label,
10994 default_probability);
10995 /* Now we can safely truncate. */
10996 index = convert_to_mode (index_mode, index, 0);
10997 }
10998 else
10999 {
11000 if (TYPE_MODE (index_type) != index_mode)
11001 {
11002 index_type = lang_hooks.types.type_for_mode (index_mode, 0);
11003 index_expr = fold_convert (index_type, index_expr);
11004 }
11005
11006 index = expand_normal (index_expr);
11007 }
11008
11009 do_pending_stack_adjust ();
11010
11011 op1 = expand_normal (minval);
11012 op2 = expand_normal (range);
11013
11014 create_input_operand (&ops[0], index, index_mode);
11015 create_convert_operand_from_type (&ops[1], op1, TREE_TYPE (minval));
11016 create_convert_operand_from_type (&ops[2], op2, TREE_TYPE (range));
11017 create_fixed_operand (&ops[3], table_label);
11018 create_fixed_operand (&ops[4], (default_label
11019 ? default_label
11020 : fallback_label));
11021 expand_jump_insn (CODE_FOR_casesi, 5, ops);
11022 return 1;
11023 }
11024
11025 /* Attempt to generate a tablejump instruction; same concept. */
11026 #ifndef HAVE_tablejump
11027 #define HAVE_tablejump 0
11028 #define gen_tablejump(x, y) (0)
11029 #endif
11030
11031 /* Subroutine of the next function.
11032
11033 INDEX is the value being switched on, with the lowest value
11034 in the table already subtracted.
11035 MODE is its expected mode (needed if INDEX is constant).
11036 RANGE is the length of the jump table.
11037 TABLE_LABEL is a CODE_LABEL rtx for the table itself.
11038
11039 DEFAULT_LABEL is a CODE_LABEL rtx to jump to if the
11040 index value is out of range.
11041 DEFAULT_PROBABILITY is the probability of jumping to
11042 the default label. */
11043
11044 static void
11045 do_tablejump (rtx index, enum machine_mode mode, rtx range, rtx table_label,
11046 rtx default_label, int default_probability)
11047 {
11048 rtx temp, vector;
11049
11050 if (INTVAL (range) > cfun->cfg->max_jumptable_ents)
11051 cfun->cfg->max_jumptable_ents = INTVAL (range);
11052
11053 /* Do an unsigned comparison (in the proper mode) between the index
11054 expression and the value which represents the length of the range.
11055 Since we just finished subtracting the lower bound of the range
11056 from the index expression, this comparison allows us to simultaneously
11057 check that the original index expression value is both greater than
11058 or equal to the minimum value of the range and less than or equal to
11059 the maximum value of the range. */
11060
11061 if (default_label)
11062 emit_cmp_and_jump_insns (index, range, GTU, NULL_RTX, mode, 1,
11063 default_label, default_probability);
11064
11065
11066 /* If index is in range, it must fit in Pmode.
11067 Convert to Pmode so we can index with it. */
11068 if (mode != Pmode)
11069 index = convert_to_mode (Pmode, index, 1);
11070
11071 /* Don't let a MEM slip through, because then INDEX that comes
11072 out of PIC_CASE_VECTOR_ADDRESS won't be a valid address,
11073 and break_out_memory_refs will go to work on it and mess it up. */
11074 #ifdef PIC_CASE_VECTOR_ADDRESS
11075 if (flag_pic && !REG_P (index))
11076 index = copy_to_mode_reg (Pmode, index);
11077 #endif
11078
11079 /* ??? The only correct use of CASE_VECTOR_MODE is the one inside the
11080 GET_MODE_SIZE, because this indicates how large insns are. The other
11081 uses should all be Pmode, because they are addresses. This code
11082 could fail if addresses and insns are not the same size. */
11083 index = gen_rtx_PLUS
11084 (Pmode,
11085 gen_rtx_MULT (Pmode, index,
11086 gen_int_mode (GET_MODE_SIZE (CASE_VECTOR_MODE), Pmode)),
11087 gen_rtx_LABEL_REF (Pmode, table_label));
11088 #ifdef PIC_CASE_VECTOR_ADDRESS
11089 if (flag_pic)
11090 index = PIC_CASE_VECTOR_ADDRESS (index);
11091 else
11092 #endif
11093 index = memory_address (CASE_VECTOR_MODE, index);
11094 temp = gen_reg_rtx (CASE_VECTOR_MODE);
11095 vector = gen_const_mem (CASE_VECTOR_MODE, index);
11096 convert_move (temp, vector, 0);
11097
11098 emit_jump_insn (gen_tablejump (temp, table_label));
11099
11100 /* If we are generating PIC code or if the table is PC-relative, the
11101 table and JUMP_INSN must be adjacent, so don't output a BARRIER. */
11102 if (! CASE_VECTOR_PC_RELATIVE && ! flag_pic)
11103 emit_barrier ();
11104 }
11105
11106 int
11107 try_tablejump (tree index_type, tree index_expr, tree minval, tree range,
11108 rtx table_label, rtx default_label, int default_probability)
11109 {
11110 rtx index;
11111
11112 if (! HAVE_tablejump)
11113 return 0;
11114
11115 index_expr = fold_build2 (MINUS_EXPR, index_type,
11116 fold_convert (index_type, index_expr),
11117 fold_convert (index_type, minval));
11118 index = expand_normal (index_expr);
11119 do_pending_stack_adjust ();
11120
11121 do_tablejump (index, TYPE_MODE (index_type),
11122 convert_modes (TYPE_MODE (index_type),
11123 TYPE_MODE (TREE_TYPE (range)),
11124 expand_normal (range),
11125 TYPE_UNSIGNED (TREE_TYPE (range))),
11126 table_label, default_label, default_probability);
11127 return 1;
11128 }
11129
11130 /* Return a CONST_VECTOR rtx for a VECTOR_CST tree. */
11131 static rtx
11132 const_vector_from_tree (tree exp)
11133 {
11134 rtvec v;
11135 unsigned i;
11136 int units;
11137 tree elt;
11138 enum machine_mode inner, mode;
11139
11140 mode = TYPE_MODE (TREE_TYPE (exp));
11141
11142 if (initializer_zerop (exp))
11143 return CONST0_RTX (mode);
11144
11145 units = GET_MODE_NUNITS (mode);
11146 inner = GET_MODE_INNER (mode);
11147
11148 v = rtvec_alloc (units);
11149
11150 for (i = 0; i < VECTOR_CST_NELTS (exp); ++i)
11151 {
11152 elt = VECTOR_CST_ELT (exp, i);
11153
11154 if (TREE_CODE (elt) == REAL_CST)
11155 RTVEC_ELT (v, i) = CONST_DOUBLE_FROM_REAL_VALUE (TREE_REAL_CST (elt),
11156 inner);
11157 else if (TREE_CODE (elt) == FIXED_CST)
11158 RTVEC_ELT (v, i) = CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (elt),
11159 inner);
11160 else
11161 RTVEC_ELT (v, i) = immed_double_int_const (tree_to_double_int (elt),
11162 inner);
11163 }
11164
11165 return gen_rtx_CONST_VECTOR (mode, v);
11166 }
11167
11168 /* Build a decl for a personality function given a language prefix. */
11169
11170 tree
11171 build_personality_function (const char *lang)
11172 {
11173 const char *unwind_and_version;
11174 tree decl, type;
11175 char *name;
11176
11177 switch (targetm_common.except_unwind_info (&global_options))
11178 {
11179 case UI_NONE:
11180 return NULL;
11181 case UI_SJLJ:
11182 unwind_and_version = "_sj0";
11183 break;
11184 case UI_DWARF2:
11185 case UI_TARGET:
11186 unwind_and_version = "_v0";
11187 break;
11188 case UI_SEH:
11189 unwind_and_version = "_seh0";
11190 break;
11191 default:
11192 gcc_unreachable ();
11193 }
11194
11195 name = ACONCAT (("__", lang, "_personality", unwind_and_version, NULL));
11196
11197 type = build_function_type_list (integer_type_node, integer_type_node,
11198 long_long_unsigned_type_node,
11199 ptr_type_node, ptr_type_node, NULL_TREE);
11200 decl = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL,
11201 get_identifier (name), type);
11202 DECL_ARTIFICIAL (decl) = 1;
11203 DECL_EXTERNAL (decl) = 1;
11204 TREE_PUBLIC (decl) = 1;
11205
11206 /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with
11207 are the flags assigned by targetm.encode_section_info. */
11208 SET_SYMBOL_REF_DECL (XEXP (DECL_RTL (decl), 0), NULL);
11209
11210 return decl;
11211 }
11212
11213 /* Extracts the personality function of DECL and returns the corresponding
11214 libfunc. */
11215
11216 rtx
11217 get_personality_function (tree decl)
11218 {
11219 tree personality = DECL_FUNCTION_PERSONALITY (decl);
11220 enum eh_personality_kind pk;
11221
11222 pk = function_needs_eh_personality (DECL_STRUCT_FUNCTION (decl));
11223 if (pk == eh_personality_none)
11224 return NULL;
11225
11226 if (!personality
11227 && pk == eh_personality_any)
11228 personality = lang_hooks.eh_personality ();
11229
11230 if (pk == eh_personality_lang)
11231 gcc_assert (personality != NULL_TREE);
11232
11233 return XEXP (DECL_RTL (personality), 0);
11234 }
11235
11236 #include "gt-expr.h"