Force the creation of a CONST_VECTOR for expand_vec_perm.
[gcc.git] / gcc / expr.c
1 /* Convert tree expression to rtl instructions, for GNU compiler.
2 Copyright (C) 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011
4 Free Software Foundation, Inc.
5
6 This file is part of GCC.
7
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
11 version.
12
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
21
22 #include "config.h"
23 #include "system.h"
24 #include "coretypes.h"
25 #include "tm.h"
26 #include "machmode.h"
27 #include "rtl.h"
28 #include "tree.h"
29 #include "flags.h"
30 #include "regs.h"
31 #include "hard-reg-set.h"
32 #include "except.h"
33 #include "function.h"
34 #include "insn-config.h"
35 #include "insn-attr.h"
36 /* Include expr.h after insn-config.h so we get HAVE_conditional_move. */
37 #include "expr.h"
38 #include "optabs.h"
39 #include "libfuncs.h"
40 #include "recog.h"
41 #include "reload.h"
42 #include "output.h"
43 #include "typeclass.h"
44 #include "toplev.h"
45 #include "langhooks.h"
46 #include "intl.h"
47 #include "tm_p.h"
48 #include "tree-iterator.h"
49 #include "tree-pass.h"
50 #include "tree-flow.h"
51 #include "target.h"
52 #include "common/common-target.h"
53 #include "timevar.h"
54 #include "df.h"
55 #include "diagnostic.h"
56 #include "ssaexpand.h"
57 #include "target-globals.h"
58 #include "params.h"
59
60 /* Decide whether a function's arguments should be processed
61 from first to last or from last to first.
62
63 They should if the stack and args grow in opposite directions, but
64 only if we have push insns. */
65
66 #ifdef PUSH_ROUNDING
67
68 #ifndef PUSH_ARGS_REVERSED
69 #if defined (STACK_GROWS_DOWNWARD) != defined (ARGS_GROW_DOWNWARD)
70 #define PUSH_ARGS_REVERSED /* If it's last to first. */
71 #endif
72 #endif
73
74 #endif
75
76 #ifndef STACK_PUSH_CODE
77 #ifdef STACK_GROWS_DOWNWARD
78 #define STACK_PUSH_CODE PRE_DEC
79 #else
80 #define STACK_PUSH_CODE PRE_INC
81 #endif
82 #endif
83
84
85 /* If this is nonzero, we do not bother generating VOLATILE
86 around volatile memory references, and we are willing to
87 output indirect addresses. If cse is to follow, we reject
88 indirect addresses so a useful potential cse is generated;
89 if it is used only once, instruction combination will produce
90 the same indirect address eventually. */
91 int cse_not_expected;
92
93 /* This structure is used by move_by_pieces to describe the move to
94 be performed. */
95 struct move_by_pieces_d
96 {
97 rtx to;
98 rtx to_addr;
99 int autinc_to;
100 int explicit_inc_to;
101 rtx from;
102 rtx from_addr;
103 int autinc_from;
104 int explicit_inc_from;
105 unsigned HOST_WIDE_INT len;
106 HOST_WIDE_INT offset;
107 int reverse;
108 };
109
110 /* This structure is used by store_by_pieces to describe the clear to
111 be performed. */
112
113 struct store_by_pieces_d
114 {
115 rtx to;
116 rtx to_addr;
117 int autinc_to;
118 int explicit_inc_to;
119 unsigned HOST_WIDE_INT len;
120 HOST_WIDE_INT offset;
121 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode);
122 void *constfundata;
123 int reverse;
124 };
125
126 static unsigned HOST_WIDE_INT move_by_pieces_ninsns (unsigned HOST_WIDE_INT,
127 unsigned int,
128 unsigned int);
129 static void move_by_pieces_1 (rtx (*) (rtx, ...), enum machine_mode,
130 struct move_by_pieces_d *);
131 static bool block_move_libcall_safe_for_call_parm (void);
132 static bool emit_block_move_via_movmem (rtx, rtx, rtx, unsigned, unsigned, HOST_WIDE_INT);
133 static tree emit_block_move_libcall_fn (int);
134 static void emit_block_move_via_loop (rtx, rtx, rtx, unsigned);
135 static rtx clear_by_pieces_1 (void *, HOST_WIDE_INT, enum machine_mode);
136 static void clear_by_pieces (rtx, unsigned HOST_WIDE_INT, unsigned int);
137 static void store_by_pieces_1 (struct store_by_pieces_d *, unsigned int);
138 static void store_by_pieces_2 (rtx (*) (rtx, ...), enum machine_mode,
139 struct store_by_pieces_d *);
140 static tree clear_storage_libcall_fn (int);
141 static rtx compress_float_constant (rtx, rtx);
142 static rtx get_subtarget (rtx);
143 static void store_constructor_field (rtx, unsigned HOST_WIDE_INT,
144 HOST_WIDE_INT, enum machine_mode,
145 tree, tree, int, alias_set_type);
146 static void store_constructor (tree, rtx, int, HOST_WIDE_INT);
147 static rtx store_field (rtx, HOST_WIDE_INT, HOST_WIDE_INT,
148 unsigned HOST_WIDE_INT, unsigned HOST_WIDE_INT,
149 enum machine_mode,
150 tree, tree, alias_set_type, bool);
151
152 static unsigned HOST_WIDE_INT highest_pow2_factor_for_target (const_tree, const_tree);
153
154 static int is_aligning_offset (const_tree, const_tree);
155 static void expand_operands (tree, tree, rtx, rtx*, rtx*,
156 enum expand_modifier);
157 static rtx reduce_to_bit_field_precision (rtx, rtx, tree);
158 static rtx do_store_flag (sepops, rtx, enum machine_mode);
159 #ifdef PUSH_ROUNDING
160 static void emit_single_push_insn (enum machine_mode, rtx, tree);
161 #endif
162 static void do_tablejump (rtx, enum machine_mode, rtx, rtx, rtx);
163 static rtx const_vector_from_tree (tree);
164 static void write_complex_part (rtx, rtx, bool);
165
166 /* This macro is used to determine whether move_by_pieces should be called
167 to perform a structure copy. */
168 #ifndef MOVE_BY_PIECES_P
169 #define MOVE_BY_PIECES_P(SIZE, ALIGN) \
170 (move_by_pieces_ninsns (SIZE, ALIGN, MOVE_MAX_PIECES + 1) \
171 < (unsigned int) MOVE_RATIO (optimize_insn_for_speed_p ()))
172 #endif
173
174 /* This macro is used to determine whether clear_by_pieces should be
175 called to clear storage. */
176 #ifndef CLEAR_BY_PIECES_P
177 #define CLEAR_BY_PIECES_P(SIZE, ALIGN) \
178 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
179 < (unsigned int) CLEAR_RATIO (optimize_insn_for_speed_p ()))
180 #endif
181
182 /* This macro is used to determine whether store_by_pieces should be
183 called to "memset" storage with byte values other than zero. */
184 #ifndef SET_BY_PIECES_P
185 #define SET_BY_PIECES_P(SIZE, ALIGN) \
186 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
187 < (unsigned int) SET_RATIO (optimize_insn_for_speed_p ()))
188 #endif
189
190 /* This macro is used to determine whether store_by_pieces should be
191 called to "memcpy" storage when the source is a constant string. */
192 #ifndef STORE_BY_PIECES_P
193 #define STORE_BY_PIECES_P(SIZE, ALIGN) \
194 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
195 < (unsigned int) MOVE_RATIO (optimize_insn_for_speed_p ()))
196 #endif
197
198 /* SLOW_UNALIGNED_ACCESS is nonzero if unaligned accesses are very slow. */
199
200 #ifndef SLOW_UNALIGNED_ACCESS
201 #define SLOW_UNALIGNED_ACCESS(MODE, ALIGN) STRICT_ALIGNMENT
202 #endif
203 \f
204 /* This is run to set up which modes can be used
205 directly in memory and to initialize the block move optab. It is run
206 at the beginning of compilation and when the target is reinitialized. */
207
208 void
209 init_expr_target (void)
210 {
211 rtx insn, pat;
212 enum machine_mode mode;
213 int num_clobbers;
214 rtx mem, mem1;
215 rtx reg;
216
217 /* Try indexing by frame ptr and try by stack ptr.
218 It is known that on the Convex the stack ptr isn't a valid index.
219 With luck, one or the other is valid on any machine. */
220 mem = gen_rtx_MEM (VOIDmode, stack_pointer_rtx);
221 mem1 = gen_rtx_MEM (VOIDmode, frame_pointer_rtx);
222
223 /* A scratch register we can modify in-place below to avoid
224 useless RTL allocations. */
225 reg = gen_rtx_REG (VOIDmode, -1);
226
227 insn = rtx_alloc (INSN);
228 pat = gen_rtx_SET (VOIDmode, NULL_RTX, NULL_RTX);
229 PATTERN (insn) = pat;
230
231 for (mode = VOIDmode; (int) mode < NUM_MACHINE_MODES;
232 mode = (enum machine_mode) ((int) mode + 1))
233 {
234 int regno;
235
236 direct_load[(int) mode] = direct_store[(int) mode] = 0;
237 PUT_MODE (mem, mode);
238 PUT_MODE (mem1, mode);
239 PUT_MODE (reg, mode);
240
241 /* See if there is some register that can be used in this mode and
242 directly loaded or stored from memory. */
243
244 if (mode != VOIDmode && mode != BLKmode)
245 for (regno = 0; regno < FIRST_PSEUDO_REGISTER
246 && (direct_load[(int) mode] == 0 || direct_store[(int) mode] == 0);
247 regno++)
248 {
249 if (! HARD_REGNO_MODE_OK (regno, mode))
250 continue;
251
252 SET_REGNO (reg, regno);
253
254 SET_SRC (pat) = mem;
255 SET_DEST (pat) = reg;
256 if (recog (pat, insn, &num_clobbers) >= 0)
257 direct_load[(int) mode] = 1;
258
259 SET_SRC (pat) = mem1;
260 SET_DEST (pat) = reg;
261 if (recog (pat, insn, &num_clobbers) >= 0)
262 direct_load[(int) mode] = 1;
263
264 SET_SRC (pat) = reg;
265 SET_DEST (pat) = mem;
266 if (recog (pat, insn, &num_clobbers) >= 0)
267 direct_store[(int) mode] = 1;
268
269 SET_SRC (pat) = reg;
270 SET_DEST (pat) = mem1;
271 if (recog (pat, insn, &num_clobbers) >= 0)
272 direct_store[(int) mode] = 1;
273 }
274 }
275
276 mem = gen_rtx_MEM (VOIDmode, gen_rtx_raw_REG (Pmode, 10000));
277
278 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
279 mode = GET_MODE_WIDER_MODE (mode))
280 {
281 enum machine_mode srcmode;
282 for (srcmode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); srcmode != mode;
283 srcmode = GET_MODE_WIDER_MODE (srcmode))
284 {
285 enum insn_code ic;
286
287 ic = can_extend_p (mode, srcmode, 0);
288 if (ic == CODE_FOR_nothing)
289 continue;
290
291 PUT_MODE (mem, srcmode);
292
293 if (insn_operand_matches (ic, 1, mem))
294 float_extend_from_mem[mode][srcmode] = true;
295 }
296 }
297 }
298
299 /* This is run at the start of compiling a function. */
300
301 void
302 init_expr (void)
303 {
304 memset (&crtl->expr, 0, sizeof (crtl->expr));
305 }
306 \f
307 /* Copy data from FROM to TO, where the machine modes are not the same.
308 Both modes may be integer, or both may be floating, or both may be
309 fixed-point.
310 UNSIGNEDP should be nonzero if FROM is an unsigned type.
311 This causes zero-extension instead of sign-extension. */
312
313 void
314 convert_move (rtx to, rtx from, int unsignedp)
315 {
316 enum machine_mode to_mode = GET_MODE (to);
317 enum machine_mode from_mode = GET_MODE (from);
318 int to_real = SCALAR_FLOAT_MODE_P (to_mode);
319 int from_real = SCALAR_FLOAT_MODE_P (from_mode);
320 enum insn_code code;
321 rtx libcall;
322
323 /* rtx code for making an equivalent value. */
324 enum rtx_code equiv_code = (unsignedp < 0 ? UNKNOWN
325 : (unsignedp ? ZERO_EXTEND : SIGN_EXTEND));
326
327
328 gcc_assert (to_real == from_real);
329 gcc_assert (to_mode != BLKmode);
330 gcc_assert (from_mode != BLKmode);
331
332 /* If the source and destination are already the same, then there's
333 nothing to do. */
334 if (to == from)
335 return;
336
337 /* If FROM is a SUBREG that indicates that we have already done at least
338 the required extension, strip it. We don't handle such SUBREGs as
339 TO here. */
340
341 if (GET_CODE (from) == SUBREG && SUBREG_PROMOTED_VAR_P (from)
342 && (GET_MODE_PRECISION (GET_MODE (SUBREG_REG (from)))
343 >= GET_MODE_PRECISION (to_mode))
344 && SUBREG_PROMOTED_UNSIGNED_P (from) == unsignedp)
345 from = gen_lowpart (to_mode, from), from_mode = to_mode;
346
347 gcc_assert (GET_CODE (to) != SUBREG || !SUBREG_PROMOTED_VAR_P (to));
348
349 if (to_mode == from_mode
350 || (from_mode == VOIDmode && CONSTANT_P (from)))
351 {
352 emit_move_insn (to, from);
353 return;
354 }
355
356 if (VECTOR_MODE_P (to_mode) || VECTOR_MODE_P (from_mode))
357 {
358 gcc_assert (GET_MODE_BITSIZE (from_mode) == GET_MODE_BITSIZE (to_mode));
359
360 if (VECTOR_MODE_P (to_mode))
361 from = simplify_gen_subreg (to_mode, from, GET_MODE (from), 0);
362 else
363 to = simplify_gen_subreg (from_mode, to, GET_MODE (to), 0);
364
365 emit_move_insn (to, from);
366 return;
367 }
368
369 if (GET_CODE (to) == CONCAT && GET_CODE (from) == CONCAT)
370 {
371 convert_move (XEXP (to, 0), XEXP (from, 0), unsignedp);
372 convert_move (XEXP (to, 1), XEXP (from, 1), unsignedp);
373 return;
374 }
375
376 if (to_real)
377 {
378 rtx value, insns;
379 convert_optab tab;
380
381 gcc_assert ((GET_MODE_PRECISION (from_mode)
382 != GET_MODE_PRECISION (to_mode))
383 || (DECIMAL_FLOAT_MODE_P (from_mode)
384 != DECIMAL_FLOAT_MODE_P (to_mode)));
385
386 if (GET_MODE_PRECISION (from_mode) == GET_MODE_PRECISION (to_mode))
387 /* Conversion between decimal float and binary float, same size. */
388 tab = DECIMAL_FLOAT_MODE_P (from_mode) ? trunc_optab : sext_optab;
389 else if (GET_MODE_PRECISION (from_mode) < GET_MODE_PRECISION (to_mode))
390 tab = sext_optab;
391 else
392 tab = trunc_optab;
393
394 /* Try converting directly if the insn is supported. */
395
396 code = convert_optab_handler (tab, to_mode, from_mode);
397 if (code != CODE_FOR_nothing)
398 {
399 emit_unop_insn (code, to, from,
400 tab == sext_optab ? FLOAT_EXTEND : FLOAT_TRUNCATE);
401 return;
402 }
403
404 /* Otherwise use a libcall. */
405 libcall = convert_optab_libfunc (tab, to_mode, from_mode);
406
407 /* Is this conversion implemented yet? */
408 gcc_assert (libcall);
409
410 start_sequence ();
411 value = emit_library_call_value (libcall, NULL_RTX, LCT_CONST, to_mode,
412 1, from, from_mode);
413 insns = get_insns ();
414 end_sequence ();
415 emit_libcall_block (insns, to, value,
416 tab == trunc_optab ? gen_rtx_FLOAT_TRUNCATE (to_mode,
417 from)
418 : gen_rtx_FLOAT_EXTEND (to_mode, from));
419 return;
420 }
421
422 /* Handle pointer conversion. */ /* SPEE 900220. */
423 /* Targets are expected to provide conversion insns between PxImode and
424 xImode for all MODE_PARTIAL_INT modes they use, but no others. */
425 if (GET_MODE_CLASS (to_mode) == MODE_PARTIAL_INT)
426 {
427 enum machine_mode full_mode
428 = smallest_mode_for_size (GET_MODE_BITSIZE (to_mode), MODE_INT);
429
430 gcc_assert (convert_optab_handler (trunc_optab, to_mode, full_mode)
431 != CODE_FOR_nothing);
432
433 if (full_mode != from_mode)
434 from = convert_to_mode (full_mode, from, unsignedp);
435 emit_unop_insn (convert_optab_handler (trunc_optab, to_mode, full_mode),
436 to, from, UNKNOWN);
437 return;
438 }
439 if (GET_MODE_CLASS (from_mode) == MODE_PARTIAL_INT)
440 {
441 rtx new_from;
442 enum machine_mode full_mode
443 = smallest_mode_for_size (GET_MODE_BITSIZE (from_mode), MODE_INT);
444
445 gcc_assert (convert_optab_handler (sext_optab, full_mode, from_mode)
446 != CODE_FOR_nothing);
447
448 if (to_mode == full_mode)
449 {
450 emit_unop_insn (convert_optab_handler (sext_optab, full_mode,
451 from_mode),
452 to, from, UNKNOWN);
453 return;
454 }
455
456 new_from = gen_reg_rtx (full_mode);
457 emit_unop_insn (convert_optab_handler (sext_optab, full_mode, from_mode),
458 new_from, from, UNKNOWN);
459
460 /* else proceed to integer conversions below. */
461 from_mode = full_mode;
462 from = new_from;
463 }
464
465 /* Make sure both are fixed-point modes or both are not. */
466 gcc_assert (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode) ==
467 ALL_SCALAR_FIXED_POINT_MODE_P (to_mode));
468 if (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode))
469 {
470 /* If we widen from_mode to to_mode and they are in the same class,
471 we won't saturate the result.
472 Otherwise, always saturate the result to play safe. */
473 if (GET_MODE_CLASS (from_mode) == GET_MODE_CLASS (to_mode)
474 && GET_MODE_SIZE (from_mode) < GET_MODE_SIZE (to_mode))
475 expand_fixed_convert (to, from, 0, 0);
476 else
477 expand_fixed_convert (to, from, 0, 1);
478 return;
479 }
480
481 /* Now both modes are integers. */
482
483 /* Handle expanding beyond a word. */
484 if (GET_MODE_PRECISION (from_mode) < GET_MODE_PRECISION (to_mode)
485 && GET_MODE_PRECISION (to_mode) > BITS_PER_WORD)
486 {
487 rtx insns;
488 rtx lowpart;
489 rtx fill_value;
490 rtx lowfrom;
491 int i;
492 enum machine_mode lowpart_mode;
493 int nwords = CEIL (GET_MODE_SIZE (to_mode), UNITS_PER_WORD);
494
495 /* Try converting directly if the insn is supported. */
496 if ((code = can_extend_p (to_mode, from_mode, unsignedp))
497 != CODE_FOR_nothing)
498 {
499 /* If FROM is a SUBREG, put it into a register. Do this
500 so that we always generate the same set of insns for
501 better cse'ing; if an intermediate assignment occurred,
502 we won't be doing the operation directly on the SUBREG. */
503 if (optimize > 0 && GET_CODE (from) == SUBREG)
504 from = force_reg (from_mode, from);
505 emit_unop_insn (code, to, from, equiv_code);
506 return;
507 }
508 /* Next, try converting via full word. */
509 else if (GET_MODE_PRECISION (from_mode) < BITS_PER_WORD
510 && ((code = can_extend_p (to_mode, word_mode, unsignedp))
511 != CODE_FOR_nothing))
512 {
513 rtx word_to = gen_reg_rtx (word_mode);
514 if (REG_P (to))
515 {
516 if (reg_overlap_mentioned_p (to, from))
517 from = force_reg (from_mode, from);
518 emit_clobber (to);
519 }
520 convert_move (word_to, from, unsignedp);
521 emit_unop_insn (code, to, word_to, equiv_code);
522 return;
523 }
524
525 /* No special multiword conversion insn; do it by hand. */
526 start_sequence ();
527
528 /* Since we will turn this into a no conflict block, we must ensure
529 that the source does not overlap the target. */
530
531 if (reg_overlap_mentioned_p (to, from))
532 from = force_reg (from_mode, from);
533
534 /* Get a copy of FROM widened to a word, if necessary. */
535 if (GET_MODE_PRECISION (from_mode) < BITS_PER_WORD)
536 lowpart_mode = word_mode;
537 else
538 lowpart_mode = from_mode;
539
540 lowfrom = convert_to_mode (lowpart_mode, from, unsignedp);
541
542 lowpart = gen_lowpart (lowpart_mode, to);
543 emit_move_insn (lowpart, lowfrom);
544
545 /* Compute the value to put in each remaining word. */
546 if (unsignedp)
547 fill_value = const0_rtx;
548 else
549 fill_value = emit_store_flag (gen_reg_rtx (word_mode),
550 LT, lowfrom, const0_rtx,
551 VOIDmode, 0, -1);
552
553 /* Fill the remaining words. */
554 for (i = GET_MODE_SIZE (lowpart_mode) / UNITS_PER_WORD; i < nwords; i++)
555 {
556 int index = (WORDS_BIG_ENDIAN ? nwords - i - 1 : i);
557 rtx subword = operand_subword (to, index, 1, to_mode);
558
559 gcc_assert (subword);
560
561 if (fill_value != subword)
562 emit_move_insn (subword, fill_value);
563 }
564
565 insns = get_insns ();
566 end_sequence ();
567
568 emit_insn (insns);
569 return;
570 }
571
572 /* Truncating multi-word to a word or less. */
573 if (GET_MODE_PRECISION (from_mode) > BITS_PER_WORD
574 && GET_MODE_PRECISION (to_mode) <= BITS_PER_WORD)
575 {
576 if (!((MEM_P (from)
577 && ! MEM_VOLATILE_P (from)
578 && direct_load[(int) to_mode]
579 && ! mode_dependent_address_p (XEXP (from, 0)))
580 || REG_P (from)
581 || GET_CODE (from) == SUBREG))
582 from = force_reg (from_mode, from);
583 convert_move (to, gen_lowpart (word_mode, from), 0);
584 return;
585 }
586
587 /* Now follow all the conversions between integers
588 no more than a word long. */
589
590 /* For truncation, usually we can just refer to FROM in a narrower mode. */
591 if (GET_MODE_BITSIZE (to_mode) < GET_MODE_BITSIZE (from_mode)
592 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode, from_mode))
593 {
594 if (!((MEM_P (from)
595 && ! MEM_VOLATILE_P (from)
596 && direct_load[(int) to_mode]
597 && ! mode_dependent_address_p (XEXP (from, 0)))
598 || REG_P (from)
599 || GET_CODE (from) == SUBREG))
600 from = force_reg (from_mode, from);
601 if (REG_P (from) && REGNO (from) < FIRST_PSEUDO_REGISTER
602 && ! HARD_REGNO_MODE_OK (REGNO (from), to_mode))
603 from = copy_to_reg (from);
604 emit_move_insn (to, gen_lowpart (to_mode, from));
605 return;
606 }
607
608 /* Handle extension. */
609 if (GET_MODE_PRECISION (to_mode) > GET_MODE_PRECISION (from_mode))
610 {
611 /* Convert directly if that works. */
612 if ((code = can_extend_p (to_mode, from_mode, unsignedp))
613 != CODE_FOR_nothing)
614 {
615 emit_unop_insn (code, to, from, equiv_code);
616 return;
617 }
618 else
619 {
620 enum machine_mode intermediate;
621 rtx tmp;
622 int shift_amount;
623
624 /* Search for a mode to convert via. */
625 for (intermediate = from_mode; intermediate != VOIDmode;
626 intermediate = GET_MODE_WIDER_MODE (intermediate))
627 if (((can_extend_p (to_mode, intermediate, unsignedp)
628 != CODE_FOR_nothing)
629 || (GET_MODE_SIZE (to_mode) < GET_MODE_SIZE (intermediate)
630 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode, intermediate)))
631 && (can_extend_p (intermediate, from_mode, unsignedp)
632 != CODE_FOR_nothing))
633 {
634 convert_move (to, convert_to_mode (intermediate, from,
635 unsignedp), unsignedp);
636 return;
637 }
638
639 /* No suitable intermediate mode.
640 Generate what we need with shifts. */
641 shift_amount = (GET_MODE_PRECISION (to_mode)
642 - GET_MODE_PRECISION (from_mode));
643 from = gen_lowpart (to_mode, force_reg (from_mode, from));
644 tmp = expand_shift (LSHIFT_EXPR, to_mode, from, shift_amount,
645 to, unsignedp);
646 tmp = expand_shift (RSHIFT_EXPR, to_mode, tmp, shift_amount,
647 to, unsignedp);
648 if (tmp != to)
649 emit_move_insn (to, tmp);
650 return;
651 }
652 }
653
654 /* Support special truncate insns for certain modes. */
655 if (convert_optab_handler (trunc_optab, to_mode,
656 from_mode) != CODE_FOR_nothing)
657 {
658 emit_unop_insn (convert_optab_handler (trunc_optab, to_mode, from_mode),
659 to, from, UNKNOWN);
660 return;
661 }
662
663 /* Handle truncation of volatile memrefs, and so on;
664 the things that couldn't be truncated directly,
665 and for which there was no special instruction.
666
667 ??? Code above formerly short-circuited this, for most integer
668 mode pairs, with a force_reg in from_mode followed by a recursive
669 call to this routine. Appears always to have been wrong. */
670 if (GET_MODE_PRECISION (to_mode) < GET_MODE_PRECISION (from_mode))
671 {
672 rtx temp = force_reg (to_mode, gen_lowpart (to_mode, from));
673 emit_move_insn (to, temp);
674 return;
675 }
676
677 /* Mode combination is not recognized. */
678 gcc_unreachable ();
679 }
680
681 /* Return an rtx for a value that would result
682 from converting X to mode MODE.
683 Both X and MODE may be floating, or both integer.
684 UNSIGNEDP is nonzero if X is an unsigned value.
685 This can be done by referring to a part of X in place
686 or by copying to a new temporary with conversion. */
687
688 rtx
689 convert_to_mode (enum machine_mode mode, rtx x, int unsignedp)
690 {
691 return convert_modes (mode, VOIDmode, x, unsignedp);
692 }
693
694 /* Return an rtx for a value that would result
695 from converting X from mode OLDMODE to mode MODE.
696 Both modes may be floating, or both integer.
697 UNSIGNEDP is nonzero if X is an unsigned value.
698
699 This can be done by referring to a part of X in place
700 or by copying to a new temporary with conversion.
701
702 You can give VOIDmode for OLDMODE, if you are sure X has a nonvoid mode. */
703
704 rtx
705 convert_modes (enum machine_mode mode, enum machine_mode oldmode, rtx x, int unsignedp)
706 {
707 rtx temp;
708
709 /* If FROM is a SUBREG that indicates that we have already done at least
710 the required extension, strip it. */
711
712 if (GET_CODE (x) == SUBREG && SUBREG_PROMOTED_VAR_P (x)
713 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) >= GET_MODE_SIZE (mode)
714 && SUBREG_PROMOTED_UNSIGNED_P (x) == unsignedp)
715 x = gen_lowpart (mode, x);
716
717 if (GET_MODE (x) != VOIDmode)
718 oldmode = GET_MODE (x);
719
720 if (mode == oldmode)
721 return x;
722
723 /* There is one case that we must handle specially: If we are converting
724 a CONST_INT into a mode whose size is twice HOST_BITS_PER_WIDE_INT and
725 we are to interpret the constant as unsigned, gen_lowpart will do
726 the wrong if the constant appears negative. What we want to do is
727 make the high-order word of the constant zero, not all ones. */
728
729 if (unsignedp && GET_MODE_CLASS (mode) == MODE_INT
730 && GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT
731 && CONST_INT_P (x) && INTVAL (x) < 0)
732 {
733 double_int val = uhwi_to_double_int (INTVAL (x));
734
735 /* We need to zero extend VAL. */
736 if (oldmode != VOIDmode)
737 val = double_int_zext (val, GET_MODE_BITSIZE (oldmode));
738
739 return immed_double_int_const (val, mode);
740 }
741
742 /* We can do this with a gen_lowpart if both desired and current modes
743 are integer, and this is either a constant integer, a register, or a
744 non-volatile MEM. Except for the constant case where MODE is no
745 wider than HOST_BITS_PER_WIDE_INT, we must be narrowing the operand. */
746
747 if ((CONST_INT_P (x)
748 && GET_MODE_PRECISION (mode) <= HOST_BITS_PER_WIDE_INT)
749 || (GET_MODE_CLASS (mode) == MODE_INT
750 && GET_MODE_CLASS (oldmode) == MODE_INT
751 && (GET_CODE (x) == CONST_DOUBLE
752 || (GET_MODE_PRECISION (mode) <= GET_MODE_PRECISION (oldmode)
753 && ((MEM_P (x) && ! MEM_VOLATILE_P (x)
754 && direct_load[(int) mode])
755 || (REG_P (x)
756 && (! HARD_REGISTER_P (x)
757 || HARD_REGNO_MODE_OK (REGNO (x), mode))
758 && TRULY_NOOP_TRUNCATION_MODES_P (mode,
759 GET_MODE (x))))))))
760 {
761 /* ?? If we don't know OLDMODE, we have to assume here that
762 X does not need sign- or zero-extension. This may not be
763 the case, but it's the best we can do. */
764 if (CONST_INT_P (x) && oldmode != VOIDmode
765 && GET_MODE_PRECISION (mode) > GET_MODE_PRECISION (oldmode))
766 {
767 HOST_WIDE_INT val = INTVAL (x);
768
769 /* We must sign or zero-extend in this case. Start by
770 zero-extending, then sign extend if we need to. */
771 val &= GET_MODE_MASK (oldmode);
772 if (! unsignedp
773 && val_signbit_known_set_p (oldmode, val))
774 val |= ~GET_MODE_MASK (oldmode);
775
776 return gen_int_mode (val, mode);
777 }
778
779 return gen_lowpart (mode, x);
780 }
781
782 /* Converting from integer constant into mode is always equivalent to an
783 subreg operation. */
784 if (VECTOR_MODE_P (mode) && GET_MODE (x) == VOIDmode)
785 {
786 gcc_assert (GET_MODE_BITSIZE (mode) == GET_MODE_BITSIZE (oldmode));
787 return simplify_gen_subreg (mode, x, oldmode, 0);
788 }
789
790 temp = gen_reg_rtx (mode);
791 convert_move (temp, x, unsignedp);
792 return temp;
793 }
794 \f
795 /* Return the largest alignment we can use for doing a move (or store)
796 of MAX_PIECES. ALIGN is the largest alignment we could use. */
797
798 static unsigned int
799 alignment_for_piecewise_move (unsigned int max_pieces, unsigned int align)
800 {
801 enum machine_mode tmode;
802
803 tmode = mode_for_size (max_pieces * BITS_PER_UNIT, MODE_INT, 1);
804 if (align >= GET_MODE_ALIGNMENT (tmode))
805 align = GET_MODE_ALIGNMENT (tmode);
806 else
807 {
808 enum machine_mode tmode, xmode;
809
810 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT), xmode = tmode;
811 tmode != VOIDmode;
812 xmode = tmode, tmode = GET_MODE_WIDER_MODE (tmode))
813 if (GET_MODE_SIZE (tmode) > max_pieces
814 || SLOW_UNALIGNED_ACCESS (tmode, align))
815 break;
816
817 align = MAX (align, GET_MODE_ALIGNMENT (xmode));
818 }
819
820 return align;
821 }
822
823 /* Return the widest integer mode no wider than SIZE. If no such mode
824 can be found, return VOIDmode. */
825
826 static enum machine_mode
827 widest_int_mode_for_size (unsigned int size)
828 {
829 enum machine_mode tmode, mode = VOIDmode;
830
831 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT);
832 tmode != VOIDmode; tmode = GET_MODE_WIDER_MODE (tmode))
833 if (GET_MODE_SIZE (tmode) < size)
834 mode = tmode;
835
836 return mode;
837 }
838
839 /* STORE_MAX_PIECES is the number of bytes at a time that we can
840 store efficiently. Due to internal GCC limitations, this is
841 MOVE_MAX_PIECES limited by the number of bytes GCC can represent
842 for an immediate constant. */
843
844 #define STORE_MAX_PIECES MIN (MOVE_MAX_PIECES, 2 * sizeof (HOST_WIDE_INT))
845
846 /* Determine whether the LEN bytes can be moved by using several move
847 instructions. Return nonzero if a call to move_by_pieces should
848 succeed. */
849
850 int
851 can_move_by_pieces (unsigned HOST_WIDE_INT len,
852 unsigned int align ATTRIBUTE_UNUSED)
853 {
854 return MOVE_BY_PIECES_P (len, align);
855 }
856
857 /* Generate several move instructions to copy LEN bytes from block FROM to
858 block TO. (These are MEM rtx's with BLKmode).
859
860 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
861 used to push FROM to the stack.
862
863 ALIGN is maximum stack alignment we can assume.
864
865 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
866 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
867 stpcpy. */
868
869 rtx
870 move_by_pieces (rtx to, rtx from, unsigned HOST_WIDE_INT len,
871 unsigned int align, int endp)
872 {
873 struct move_by_pieces_d data;
874 enum machine_mode to_addr_mode, from_addr_mode
875 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (from));
876 rtx to_addr, from_addr = XEXP (from, 0);
877 unsigned int max_size = MOVE_MAX_PIECES + 1;
878 enum insn_code icode;
879
880 align = MIN (to ? MEM_ALIGN (to) : align, MEM_ALIGN (from));
881
882 data.offset = 0;
883 data.from_addr = from_addr;
884 if (to)
885 {
886 to_addr_mode = targetm.addr_space.address_mode (MEM_ADDR_SPACE (to));
887 to_addr = XEXP (to, 0);
888 data.to = to;
889 data.autinc_to
890 = (GET_CODE (to_addr) == PRE_INC || GET_CODE (to_addr) == PRE_DEC
891 || GET_CODE (to_addr) == POST_INC || GET_CODE (to_addr) == POST_DEC);
892 data.reverse
893 = (GET_CODE (to_addr) == PRE_DEC || GET_CODE (to_addr) == POST_DEC);
894 }
895 else
896 {
897 to_addr_mode = VOIDmode;
898 to_addr = NULL_RTX;
899 data.to = NULL_RTX;
900 data.autinc_to = 1;
901 #ifdef STACK_GROWS_DOWNWARD
902 data.reverse = 1;
903 #else
904 data.reverse = 0;
905 #endif
906 }
907 data.to_addr = to_addr;
908 data.from = from;
909 data.autinc_from
910 = (GET_CODE (from_addr) == PRE_INC || GET_CODE (from_addr) == PRE_DEC
911 || GET_CODE (from_addr) == POST_INC
912 || GET_CODE (from_addr) == POST_DEC);
913
914 data.explicit_inc_from = 0;
915 data.explicit_inc_to = 0;
916 if (data.reverse) data.offset = len;
917 data.len = len;
918
919 /* If copying requires more than two move insns,
920 copy addresses to registers (to make displacements shorter)
921 and use post-increment if available. */
922 if (!(data.autinc_from && data.autinc_to)
923 && move_by_pieces_ninsns (len, align, max_size) > 2)
924 {
925 /* Find the mode of the largest move...
926 MODE might not be used depending on the definitions of the
927 USE_* macros below. */
928 enum machine_mode mode ATTRIBUTE_UNUSED
929 = widest_int_mode_for_size (max_size);
930
931 if (USE_LOAD_PRE_DECREMENT (mode) && data.reverse && ! data.autinc_from)
932 {
933 data.from_addr = copy_to_mode_reg (from_addr_mode,
934 plus_constant (from_addr, len));
935 data.autinc_from = 1;
936 data.explicit_inc_from = -1;
937 }
938 if (USE_LOAD_POST_INCREMENT (mode) && ! data.autinc_from)
939 {
940 data.from_addr = copy_to_mode_reg (from_addr_mode, from_addr);
941 data.autinc_from = 1;
942 data.explicit_inc_from = 1;
943 }
944 if (!data.autinc_from && CONSTANT_P (from_addr))
945 data.from_addr = copy_to_mode_reg (from_addr_mode, from_addr);
946 if (USE_STORE_PRE_DECREMENT (mode) && data.reverse && ! data.autinc_to)
947 {
948 data.to_addr = copy_to_mode_reg (to_addr_mode,
949 plus_constant (to_addr, len));
950 data.autinc_to = 1;
951 data.explicit_inc_to = -1;
952 }
953 if (USE_STORE_POST_INCREMENT (mode) && ! data.reverse && ! data.autinc_to)
954 {
955 data.to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
956 data.autinc_to = 1;
957 data.explicit_inc_to = 1;
958 }
959 if (!data.autinc_to && CONSTANT_P (to_addr))
960 data.to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
961 }
962
963 align = alignment_for_piecewise_move (MOVE_MAX_PIECES, align);
964
965 /* First move what we can in the largest integer mode, then go to
966 successively smaller modes. */
967
968 while (max_size > 1)
969 {
970 enum machine_mode mode = widest_int_mode_for_size (max_size);
971
972 if (mode == VOIDmode)
973 break;
974
975 icode = optab_handler (mov_optab, mode);
976 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
977 move_by_pieces_1 (GEN_FCN (icode), mode, &data);
978
979 max_size = GET_MODE_SIZE (mode);
980 }
981
982 /* The code above should have handled everything. */
983 gcc_assert (!data.len);
984
985 if (endp)
986 {
987 rtx to1;
988
989 gcc_assert (!data.reverse);
990 if (data.autinc_to)
991 {
992 if (endp == 2)
993 {
994 if (HAVE_POST_INCREMENT && data.explicit_inc_to > 0)
995 emit_insn (gen_add2_insn (data.to_addr, constm1_rtx));
996 else
997 data.to_addr = copy_to_mode_reg (to_addr_mode,
998 plus_constant (data.to_addr,
999 -1));
1000 }
1001 to1 = adjust_automodify_address (data.to, QImode, data.to_addr,
1002 data.offset);
1003 }
1004 else
1005 {
1006 if (endp == 2)
1007 --data.offset;
1008 to1 = adjust_address (data.to, QImode, data.offset);
1009 }
1010 return to1;
1011 }
1012 else
1013 return data.to;
1014 }
1015
1016 /* Return number of insns required to move L bytes by pieces.
1017 ALIGN (in bits) is maximum alignment we can assume. */
1018
1019 static unsigned HOST_WIDE_INT
1020 move_by_pieces_ninsns (unsigned HOST_WIDE_INT l, unsigned int align,
1021 unsigned int max_size)
1022 {
1023 unsigned HOST_WIDE_INT n_insns = 0;
1024
1025 align = alignment_for_piecewise_move (MOVE_MAX_PIECES, align);
1026
1027 while (max_size > 1)
1028 {
1029 enum machine_mode mode;
1030 enum insn_code icode;
1031
1032 mode = widest_int_mode_for_size (max_size);
1033
1034 if (mode == VOIDmode)
1035 break;
1036
1037 icode = optab_handler (mov_optab, mode);
1038 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
1039 n_insns += l / GET_MODE_SIZE (mode), l %= GET_MODE_SIZE (mode);
1040
1041 max_size = GET_MODE_SIZE (mode);
1042 }
1043
1044 gcc_assert (!l);
1045 return n_insns;
1046 }
1047
1048 /* Subroutine of move_by_pieces. Move as many bytes as appropriate
1049 with move instructions for mode MODE. GENFUN is the gen_... function
1050 to make a move insn for that mode. DATA has all the other info. */
1051
1052 static void
1053 move_by_pieces_1 (rtx (*genfun) (rtx, ...), enum machine_mode mode,
1054 struct move_by_pieces_d *data)
1055 {
1056 unsigned int size = GET_MODE_SIZE (mode);
1057 rtx to1 = NULL_RTX, from1;
1058
1059 while (data->len >= size)
1060 {
1061 if (data->reverse)
1062 data->offset -= size;
1063
1064 if (data->to)
1065 {
1066 if (data->autinc_to)
1067 to1 = adjust_automodify_address (data->to, mode, data->to_addr,
1068 data->offset);
1069 else
1070 to1 = adjust_address (data->to, mode, data->offset);
1071 }
1072
1073 if (data->autinc_from)
1074 from1 = adjust_automodify_address (data->from, mode, data->from_addr,
1075 data->offset);
1076 else
1077 from1 = adjust_address (data->from, mode, data->offset);
1078
1079 if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0)
1080 emit_insn (gen_add2_insn (data->to_addr,
1081 GEN_INT (-(HOST_WIDE_INT)size)));
1082 if (HAVE_PRE_DECREMENT && data->explicit_inc_from < 0)
1083 emit_insn (gen_add2_insn (data->from_addr,
1084 GEN_INT (-(HOST_WIDE_INT)size)));
1085
1086 if (data->to)
1087 emit_insn ((*genfun) (to1, from1));
1088 else
1089 {
1090 #ifdef PUSH_ROUNDING
1091 emit_single_push_insn (mode, from1, NULL);
1092 #else
1093 gcc_unreachable ();
1094 #endif
1095 }
1096
1097 if (HAVE_POST_INCREMENT && data->explicit_inc_to > 0)
1098 emit_insn (gen_add2_insn (data->to_addr, GEN_INT (size)));
1099 if (HAVE_POST_INCREMENT && data->explicit_inc_from > 0)
1100 emit_insn (gen_add2_insn (data->from_addr, GEN_INT (size)));
1101
1102 if (! data->reverse)
1103 data->offset += size;
1104
1105 data->len -= size;
1106 }
1107 }
1108 \f
1109 /* Emit code to move a block Y to a block X. This may be done with
1110 string-move instructions, with multiple scalar move instructions,
1111 or with a library call.
1112
1113 Both X and Y must be MEM rtx's (perhaps inside VOLATILE) with mode BLKmode.
1114 SIZE is an rtx that says how long they are.
1115 ALIGN is the maximum alignment we can assume they have.
1116 METHOD describes what kind of copy this is, and what mechanisms may be used.
1117
1118 Return the address of the new block, if memcpy is called and returns it,
1119 0 otherwise. */
1120
1121 rtx
1122 emit_block_move_hints (rtx x, rtx y, rtx size, enum block_op_methods method,
1123 unsigned int expected_align, HOST_WIDE_INT expected_size)
1124 {
1125 bool may_use_call;
1126 rtx retval = 0;
1127 unsigned int align;
1128
1129 gcc_assert (size);
1130 if (CONST_INT_P (size)
1131 && INTVAL (size) == 0)
1132 return 0;
1133
1134 switch (method)
1135 {
1136 case BLOCK_OP_NORMAL:
1137 case BLOCK_OP_TAILCALL:
1138 may_use_call = true;
1139 break;
1140
1141 case BLOCK_OP_CALL_PARM:
1142 may_use_call = block_move_libcall_safe_for_call_parm ();
1143
1144 /* Make inhibit_defer_pop nonzero around the library call
1145 to force it to pop the arguments right away. */
1146 NO_DEFER_POP;
1147 break;
1148
1149 case BLOCK_OP_NO_LIBCALL:
1150 may_use_call = false;
1151 break;
1152
1153 default:
1154 gcc_unreachable ();
1155 }
1156
1157 gcc_assert (MEM_P (x) && MEM_P (y));
1158 align = MIN (MEM_ALIGN (x), MEM_ALIGN (y));
1159 gcc_assert (align >= BITS_PER_UNIT);
1160
1161 /* Make sure we've got BLKmode addresses; store_one_arg can decide that
1162 block copy is more efficient for other large modes, e.g. DCmode. */
1163 x = adjust_address (x, BLKmode, 0);
1164 y = adjust_address (y, BLKmode, 0);
1165
1166 /* Set MEM_SIZE as appropriate for this block copy. The main place this
1167 can be incorrect is coming from __builtin_memcpy. */
1168 if (CONST_INT_P (size))
1169 {
1170 x = shallow_copy_rtx (x);
1171 y = shallow_copy_rtx (y);
1172 set_mem_size (x, INTVAL (size));
1173 set_mem_size (y, INTVAL (size));
1174 }
1175
1176 if (CONST_INT_P (size) && MOVE_BY_PIECES_P (INTVAL (size), align))
1177 move_by_pieces (x, y, INTVAL (size), align, 0);
1178 else if (emit_block_move_via_movmem (x, y, size, align,
1179 expected_align, expected_size))
1180 ;
1181 else if (may_use_call
1182 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (x))
1183 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (y)))
1184 {
1185 /* Since x and y are passed to a libcall, mark the corresponding
1186 tree EXPR as addressable. */
1187 tree y_expr = MEM_EXPR (y);
1188 tree x_expr = MEM_EXPR (x);
1189 if (y_expr)
1190 mark_addressable (y_expr);
1191 if (x_expr)
1192 mark_addressable (x_expr);
1193 retval = emit_block_move_via_libcall (x, y, size,
1194 method == BLOCK_OP_TAILCALL);
1195 }
1196
1197 else
1198 emit_block_move_via_loop (x, y, size, align);
1199
1200 if (method == BLOCK_OP_CALL_PARM)
1201 OK_DEFER_POP;
1202
1203 return retval;
1204 }
1205
1206 rtx
1207 emit_block_move (rtx x, rtx y, rtx size, enum block_op_methods method)
1208 {
1209 return emit_block_move_hints (x, y, size, method, 0, -1);
1210 }
1211
1212 /* A subroutine of emit_block_move. Returns true if calling the
1213 block move libcall will not clobber any parameters which may have
1214 already been placed on the stack. */
1215
1216 static bool
1217 block_move_libcall_safe_for_call_parm (void)
1218 {
1219 #if defined (REG_PARM_STACK_SPACE)
1220 tree fn;
1221 #endif
1222
1223 /* If arguments are pushed on the stack, then they're safe. */
1224 if (PUSH_ARGS)
1225 return true;
1226
1227 /* If registers go on the stack anyway, any argument is sure to clobber
1228 an outgoing argument. */
1229 #if defined (REG_PARM_STACK_SPACE)
1230 fn = emit_block_move_libcall_fn (false);
1231 /* Avoid set but not used warning if *REG_PARM_STACK_SPACE doesn't
1232 depend on its argument. */
1233 (void) fn;
1234 if (OUTGOING_REG_PARM_STACK_SPACE ((!fn ? NULL_TREE : TREE_TYPE (fn)))
1235 && REG_PARM_STACK_SPACE (fn) != 0)
1236 return false;
1237 #endif
1238
1239 /* If any argument goes in memory, then it might clobber an outgoing
1240 argument. */
1241 {
1242 CUMULATIVE_ARGS args_so_far_v;
1243 cumulative_args_t args_so_far;
1244 tree fn, arg;
1245
1246 fn = emit_block_move_libcall_fn (false);
1247 INIT_CUMULATIVE_ARGS (args_so_far_v, TREE_TYPE (fn), NULL_RTX, 0, 3);
1248 args_so_far = pack_cumulative_args (&args_so_far_v);
1249
1250 arg = TYPE_ARG_TYPES (TREE_TYPE (fn));
1251 for ( ; arg != void_list_node ; arg = TREE_CHAIN (arg))
1252 {
1253 enum machine_mode mode = TYPE_MODE (TREE_VALUE (arg));
1254 rtx tmp = targetm.calls.function_arg (args_so_far, mode,
1255 NULL_TREE, true);
1256 if (!tmp || !REG_P (tmp))
1257 return false;
1258 if (targetm.calls.arg_partial_bytes (args_so_far, mode, NULL, 1))
1259 return false;
1260 targetm.calls.function_arg_advance (args_so_far, mode,
1261 NULL_TREE, true);
1262 }
1263 }
1264 return true;
1265 }
1266
1267 /* A subroutine of emit_block_move. Expand a movmem pattern;
1268 return true if successful. */
1269
1270 static bool
1271 emit_block_move_via_movmem (rtx x, rtx y, rtx size, unsigned int align,
1272 unsigned int expected_align, HOST_WIDE_INT expected_size)
1273 {
1274 int save_volatile_ok = volatile_ok;
1275 enum machine_mode mode;
1276
1277 if (expected_align < align)
1278 expected_align = align;
1279
1280 /* Since this is a move insn, we don't care about volatility. */
1281 volatile_ok = 1;
1282
1283 /* Try the most limited insn first, because there's no point
1284 including more than one in the machine description unless
1285 the more limited one has some advantage. */
1286
1287 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
1288 mode = GET_MODE_WIDER_MODE (mode))
1289 {
1290 enum insn_code code = direct_optab_handler (movmem_optab, mode);
1291
1292 if (code != CODE_FOR_nothing
1293 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
1294 here because if SIZE is less than the mode mask, as it is
1295 returned by the macro, it will definitely be less than the
1296 actual mode mask. */
1297 && ((CONST_INT_P (size)
1298 && ((unsigned HOST_WIDE_INT) INTVAL (size)
1299 <= (GET_MODE_MASK (mode) >> 1)))
1300 || GET_MODE_BITSIZE (mode) >= BITS_PER_WORD))
1301 {
1302 struct expand_operand ops[6];
1303 unsigned int nops;
1304
1305 /* ??? When called via emit_block_move_for_call, it'd be
1306 nice if there were some way to inform the backend, so
1307 that it doesn't fail the expansion because it thinks
1308 emitting the libcall would be more efficient. */
1309 nops = insn_data[(int) code].n_generator_args;
1310 gcc_assert (nops == 4 || nops == 6);
1311
1312 create_fixed_operand (&ops[0], x);
1313 create_fixed_operand (&ops[1], y);
1314 /* The check above guarantees that this size conversion is valid. */
1315 create_convert_operand_to (&ops[2], size, mode, true);
1316 create_integer_operand (&ops[3], align / BITS_PER_UNIT);
1317 if (nops == 6)
1318 {
1319 create_integer_operand (&ops[4], expected_align / BITS_PER_UNIT);
1320 create_integer_operand (&ops[5], expected_size);
1321 }
1322 if (maybe_expand_insn (code, nops, ops))
1323 {
1324 volatile_ok = save_volatile_ok;
1325 return true;
1326 }
1327 }
1328 }
1329
1330 volatile_ok = save_volatile_ok;
1331 return false;
1332 }
1333
1334 /* A subroutine of emit_block_move. Expand a call to memcpy.
1335 Return the return value from memcpy, 0 otherwise. */
1336
1337 rtx
1338 emit_block_move_via_libcall (rtx dst, rtx src, rtx size, bool tailcall)
1339 {
1340 rtx dst_addr, src_addr;
1341 tree call_expr, fn, src_tree, dst_tree, size_tree;
1342 enum machine_mode size_mode;
1343 rtx retval;
1344
1345 /* Emit code to copy the addresses of DST and SRC and SIZE into new
1346 pseudos. We can then place those new pseudos into a VAR_DECL and
1347 use them later. */
1348
1349 dst_addr = copy_to_mode_reg (Pmode, XEXP (dst, 0));
1350 src_addr = copy_to_mode_reg (Pmode, XEXP (src, 0));
1351
1352 dst_addr = convert_memory_address (ptr_mode, dst_addr);
1353 src_addr = convert_memory_address (ptr_mode, src_addr);
1354
1355 dst_tree = make_tree (ptr_type_node, dst_addr);
1356 src_tree = make_tree (ptr_type_node, src_addr);
1357
1358 size_mode = TYPE_MODE (sizetype);
1359
1360 size = convert_to_mode (size_mode, size, 1);
1361 size = copy_to_mode_reg (size_mode, size);
1362
1363 /* It is incorrect to use the libcall calling conventions to call
1364 memcpy in this context. This could be a user call to memcpy and
1365 the user may wish to examine the return value from memcpy. For
1366 targets where libcalls and normal calls have different conventions
1367 for returning pointers, we could end up generating incorrect code. */
1368
1369 size_tree = make_tree (sizetype, size);
1370
1371 fn = emit_block_move_libcall_fn (true);
1372 call_expr = build_call_expr (fn, 3, dst_tree, src_tree, size_tree);
1373 CALL_EXPR_TAILCALL (call_expr) = tailcall;
1374
1375 retval = expand_normal (call_expr);
1376
1377 return retval;
1378 }
1379
1380 /* A subroutine of emit_block_move_via_libcall. Create the tree node
1381 for the function we use for block copies. The first time FOR_CALL
1382 is true, we call assemble_external. */
1383
1384 static GTY(()) tree block_move_fn;
1385
1386 void
1387 init_block_move_fn (const char *asmspec)
1388 {
1389 if (!block_move_fn)
1390 {
1391 tree args, fn;
1392
1393 fn = get_identifier ("memcpy");
1394 args = build_function_type_list (ptr_type_node, ptr_type_node,
1395 const_ptr_type_node, sizetype,
1396 NULL_TREE);
1397
1398 fn = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL, fn, args);
1399 DECL_EXTERNAL (fn) = 1;
1400 TREE_PUBLIC (fn) = 1;
1401 DECL_ARTIFICIAL (fn) = 1;
1402 TREE_NOTHROW (fn) = 1;
1403 DECL_VISIBILITY (fn) = VISIBILITY_DEFAULT;
1404 DECL_VISIBILITY_SPECIFIED (fn) = 1;
1405
1406 block_move_fn = fn;
1407 }
1408
1409 if (asmspec)
1410 set_user_assembler_name (block_move_fn, asmspec);
1411 }
1412
1413 static tree
1414 emit_block_move_libcall_fn (int for_call)
1415 {
1416 static bool emitted_extern;
1417
1418 if (!block_move_fn)
1419 init_block_move_fn (NULL);
1420
1421 if (for_call && !emitted_extern)
1422 {
1423 emitted_extern = true;
1424 make_decl_rtl (block_move_fn);
1425 assemble_external (block_move_fn);
1426 }
1427
1428 return block_move_fn;
1429 }
1430
1431 /* A subroutine of emit_block_move. Copy the data via an explicit
1432 loop. This is used only when libcalls are forbidden. */
1433 /* ??? It'd be nice to copy in hunks larger than QImode. */
1434
1435 static void
1436 emit_block_move_via_loop (rtx x, rtx y, rtx size,
1437 unsigned int align ATTRIBUTE_UNUSED)
1438 {
1439 rtx cmp_label, top_label, iter, x_addr, y_addr, tmp;
1440 enum machine_mode x_addr_mode
1441 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (x));
1442 enum machine_mode y_addr_mode
1443 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (y));
1444 enum machine_mode iter_mode;
1445
1446 iter_mode = GET_MODE (size);
1447 if (iter_mode == VOIDmode)
1448 iter_mode = word_mode;
1449
1450 top_label = gen_label_rtx ();
1451 cmp_label = gen_label_rtx ();
1452 iter = gen_reg_rtx (iter_mode);
1453
1454 emit_move_insn (iter, const0_rtx);
1455
1456 x_addr = force_operand (XEXP (x, 0), NULL_RTX);
1457 y_addr = force_operand (XEXP (y, 0), NULL_RTX);
1458 do_pending_stack_adjust ();
1459
1460 emit_jump (cmp_label);
1461 emit_label (top_label);
1462
1463 tmp = convert_modes (x_addr_mode, iter_mode, iter, true);
1464 x_addr = gen_rtx_PLUS (x_addr_mode, x_addr, tmp);
1465
1466 if (x_addr_mode != y_addr_mode)
1467 tmp = convert_modes (y_addr_mode, iter_mode, iter, true);
1468 y_addr = gen_rtx_PLUS (y_addr_mode, y_addr, tmp);
1469
1470 x = change_address (x, QImode, x_addr);
1471 y = change_address (y, QImode, y_addr);
1472
1473 emit_move_insn (x, y);
1474
1475 tmp = expand_simple_binop (iter_mode, PLUS, iter, const1_rtx, iter,
1476 true, OPTAB_LIB_WIDEN);
1477 if (tmp != iter)
1478 emit_move_insn (iter, tmp);
1479
1480 emit_label (cmp_label);
1481
1482 emit_cmp_and_jump_insns (iter, size, LT, NULL_RTX, iter_mode,
1483 true, top_label);
1484 }
1485 \f
1486 /* Copy all or part of a value X into registers starting at REGNO.
1487 The number of registers to be filled is NREGS. */
1488
1489 void
1490 move_block_to_reg (int regno, rtx x, int nregs, enum machine_mode mode)
1491 {
1492 int i;
1493 #ifdef HAVE_load_multiple
1494 rtx pat;
1495 rtx last;
1496 #endif
1497
1498 if (nregs == 0)
1499 return;
1500
1501 if (CONSTANT_P (x) && !targetm.legitimate_constant_p (mode, x))
1502 x = validize_mem (force_const_mem (mode, x));
1503
1504 /* See if the machine can do this with a load multiple insn. */
1505 #ifdef HAVE_load_multiple
1506 if (HAVE_load_multiple)
1507 {
1508 last = get_last_insn ();
1509 pat = gen_load_multiple (gen_rtx_REG (word_mode, regno), x,
1510 GEN_INT (nregs));
1511 if (pat)
1512 {
1513 emit_insn (pat);
1514 return;
1515 }
1516 else
1517 delete_insns_since (last);
1518 }
1519 #endif
1520
1521 for (i = 0; i < nregs; i++)
1522 emit_move_insn (gen_rtx_REG (word_mode, regno + i),
1523 operand_subword_force (x, i, mode));
1524 }
1525
1526 /* Copy all or part of a BLKmode value X out of registers starting at REGNO.
1527 The number of registers to be filled is NREGS. */
1528
1529 void
1530 move_block_from_reg (int regno, rtx x, int nregs)
1531 {
1532 int i;
1533
1534 if (nregs == 0)
1535 return;
1536
1537 /* See if the machine can do this with a store multiple insn. */
1538 #ifdef HAVE_store_multiple
1539 if (HAVE_store_multiple)
1540 {
1541 rtx last = get_last_insn ();
1542 rtx pat = gen_store_multiple (x, gen_rtx_REG (word_mode, regno),
1543 GEN_INT (nregs));
1544 if (pat)
1545 {
1546 emit_insn (pat);
1547 return;
1548 }
1549 else
1550 delete_insns_since (last);
1551 }
1552 #endif
1553
1554 for (i = 0; i < nregs; i++)
1555 {
1556 rtx tem = operand_subword (x, i, 1, BLKmode);
1557
1558 gcc_assert (tem);
1559
1560 emit_move_insn (tem, gen_rtx_REG (word_mode, regno + i));
1561 }
1562 }
1563
1564 /* Generate a PARALLEL rtx for a new non-consecutive group of registers from
1565 ORIG, where ORIG is a non-consecutive group of registers represented by
1566 a PARALLEL. The clone is identical to the original except in that the
1567 original set of registers is replaced by a new set of pseudo registers.
1568 The new set has the same modes as the original set. */
1569
1570 rtx
1571 gen_group_rtx (rtx orig)
1572 {
1573 int i, length;
1574 rtx *tmps;
1575
1576 gcc_assert (GET_CODE (orig) == PARALLEL);
1577
1578 length = XVECLEN (orig, 0);
1579 tmps = XALLOCAVEC (rtx, length);
1580
1581 /* Skip a NULL entry in first slot. */
1582 i = XEXP (XVECEXP (orig, 0, 0), 0) ? 0 : 1;
1583
1584 if (i)
1585 tmps[0] = 0;
1586
1587 for (; i < length; i++)
1588 {
1589 enum machine_mode mode = GET_MODE (XEXP (XVECEXP (orig, 0, i), 0));
1590 rtx offset = XEXP (XVECEXP (orig, 0, i), 1);
1591
1592 tmps[i] = gen_rtx_EXPR_LIST (VOIDmode, gen_reg_rtx (mode), offset);
1593 }
1594
1595 return gen_rtx_PARALLEL (GET_MODE (orig), gen_rtvec_v (length, tmps));
1596 }
1597
1598 /* A subroutine of emit_group_load. Arguments as for emit_group_load,
1599 except that values are placed in TMPS[i], and must later be moved
1600 into corresponding XEXP (XVECEXP (DST, 0, i), 0) element. */
1601
1602 static void
1603 emit_group_load_1 (rtx *tmps, rtx dst, rtx orig_src, tree type, int ssize)
1604 {
1605 rtx src;
1606 int start, i;
1607 enum machine_mode m = GET_MODE (orig_src);
1608
1609 gcc_assert (GET_CODE (dst) == PARALLEL);
1610
1611 if (m != VOIDmode
1612 && !SCALAR_INT_MODE_P (m)
1613 && !MEM_P (orig_src)
1614 && GET_CODE (orig_src) != CONCAT)
1615 {
1616 enum machine_mode imode = int_mode_for_mode (GET_MODE (orig_src));
1617 if (imode == BLKmode)
1618 src = assign_stack_temp (GET_MODE (orig_src), ssize, 0);
1619 else
1620 src = gen_reg_rtx (imode);
1621 if (imode != BLKmode)
1622 src = gen_lowpart (GET_MODE (orig_src), src);
1623 emit_move_insn (src, orig_src);
1624 /* ...and back again. */
1625 if (imode != BLKmode)
1626 src = gen_lowpart (imode, src);
1627 emit_group_load_1 (tmps, dst, src, type, ssize);
1628 return;
1629 }
1630
1631 /* Check for a NULL entry, used to indicate that the parameter goes
1632 both on the stack and in registers. */
1633 if (XEXP (XVECEXP (dst, 0, 0), 0))
1634 start = 0;
1635 else
1636 start = 1;
1637
1638 /* Process the pieces. */
1639 for (i = start; i < XVECLEN (dst, 0); i++)
1640 {
1641 enum machine_mode mode = GET_MODE (XEXP (XVECEXP (dst, 0, i), 0));
1642 HOST_WIDE_INT bytepos = INTVAL (XEXP (XVECEXP (dst, 0, i), 1));
1643 unsigned int bytelen = GET_MODE_SIZE (mode);
1644 int shift = 0;
1645
1646 /* Handle trailing fragments that run over the size of the struct. */
1647 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
1648 {
1649 /* Arrange to shift the fragment to where it belongs.
1650 extract_bit_field loads to the lsb of the reg. */
1651 if (
1652 #ifdef BLOCK_REG_PADDING
1653 BLOCK_REG_PADDING (GET_MODE (orig_src), type, i == start)
1654 == (BYTES_BIG_ENDIAN ? upward : downward)
1655 #else
1656 BYTES_BIG_ENDIAN
1657 #endif
1658 )
1659 shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT;
1660 bytelen = ssize - bytepos;
1661 gcc_assert (bytelen > 0);
1662 }
1663
1664 /* If we won't be loading directly from memory, protect the real source
1665 from strange tricks we might play; but make sure that the source can
1666 be loaded directly into the destination. */
1667 src = orig_src;
1668 if (!MEM_P (orig_src)
1669 && (!CONSTANT_P (orig_src)
1670 || (GET_MODE (orig_src) != mode
1671 && GET_MODE (orig_src) != VOIDmode)))
1672 {
1673 if (GET_MODE (orig_src) == VOIDmode)
1674 src = gen_reg_rtx (mode);
1675 else
1676 src = gen_reg_rtx (GET_MODE (orig_src));
1677
1678 emit_move_insn (src, orig_src);
1679 }
1680
1681 /* Optimize the access just a bit. */
1682 if (MEM_P (src)
1683 && (! SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (src))
1684 || MEM_ALIGN (src) >= GET_MODE_ALIGNMENT (mode))
1685 && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0
1686 && bytelen == GET_MODE_SIZE (mode))
1687 {
1688 tmps[i] = gen_reg_rtx (mode);
1689 emit_move_insn (tmps[i], adjust_address (src, mode, bytepos));
1690 }
1691 else if (COMPLEX_MODE_P (mode)
1692 && GET_MODE (src) == mode
1693 && bytelen == GET_MODE_SIZE (mode))
1694 /* Let emit_move_complex do the bulk of the work. */
1695 tmps[i] = src;
1696 else if (GET_CODE (src) == CONCAT)
1697 {
1698 unsigned int slen = GET_MODE_SIZE (GET_MODE (src));
1699 unsigned int slen0 = GET_MODE_SIZE (GET_MODE (XEXP (src, 0)));
1700
1701 if ((bytepos == 0 && bytelen == slen0)
1702 || (bytepos != 0 && bytepos + bytelen <= slen))
1703 {
1704 /* The following assumes that the concatenated objects all
1705 have the same size. In this case, a simple calculation
1706 can be used to determine the object and the bit field
1707 to be extracted. */
1708 tmps[i] = XEXP (src, bytepos / slen0);
1709 if (! CONSTANT_P (tmps[i])
1710 && (!REG_P (tmps[i]) || GET_MODE (tmps[i]) != mode))
1711 tmps[i] = extract_bit_field (tmps[i], bytelen * BITS_PER_UNIT,
1712 (bytepos % slen0) * BITS_PER_UNIT,
1713 1, false, NULL_RTX, mode, mode);
1714 }
1715 else
1716 {
1717 rtx mem;
1718
1719 gcc_assert (!bytepos);
1720 mem = assign_stack_temp (GET_MODE (src), slen, 0);
1721 emit_move_insn (mem, src);
1722 tmps[i] = extract_bit_field (mem, bytelen * BITS_PER_UNIT,
1723 0, 1, false, NULL_RTX, mode, mode);
1724 }
1725 }
1726 /* FIXME: A SIMD parallel will eventually lead to a subreg of a
1727 SIMD register, which is currently broken. While we get GCC
1728 to emit proper RTL for these cases, let's dump to memory. */
1729 else if (VECTOR_MODE_P (GET_MODE (dst))
1730 && REG_P (src))
1731 {
1732 int slen = GET_MODE_SIZE (GET_MODE (src));
1733 rtx mem;
1734
1735 mem = assign_stack_temp (GET_MODE (src), slen, 0);
1736 emit_move_insn (mem, src);
1737 tmps[i] = adjust_address (mem, mode, (int) bytepos);
1738 }
1739 else if (CONSTANT_P (src) && GET_MODE (dst) != BLKmode
1740 && XVECLEN (dst, 0) > 1)
1741 tmps[i] = simplify_gen_subreg (mode, src, GET_MODE(dst), bytepos);
1742 else if (CONSTANT_P (src))
1743 {
1744 HOST_WIDE_INT len = (HOST_WIDE_INT) bytelen;
1745
1746 if (len == ssize)
1747 tmps[i] = src;
1748 else
1749 {
1750 rtx first, second;
1751
1752 gcc_assert (2 * len == ssize);
1753 split_double (src, &first, &second);
1754 if (i)
1755 tmps[i] = second;
1756 else
1757 tmps[i] = first;
1758 }
1759 }
1760 else if (REG_P (src) && GET_MODE (src) == mode)
1761 tmps[i] = src;
1762 else
1763 tmps[i] = extract_bit_field (src, bytelen * BITS_PER_UNIT,
1764 bytepos * BITS_PER_UNIT, 1, false, NULL_RTX,
1765 mode, mode);
1766
1767 if (shift)
1768 tmps[i] = expand_shift (LSHIFT_EXPR, mode, tmps[i],
1769 shift, tmps[i], 0);
1770 }
1771 }
1772
1773 /* Emit code to move a block SRC of type TYPE to a block DST,
1774 where DST is non-consecutive registers represented by a PARALLEL.
1775 SSIZE represents the total size of block ORIG_SRC in bytes, or -1
1776 if not known. */
1777
1778 void
1779 emit_group_load (rtx dst, rtx src, tree type, int ssize)
1780 {
1781 rtx *tmps;
1782 int i;
1783
1784 tmps = XALLOCAVEC (rtx, XVECLEN (dst, 0));
1785 emit_group_load_1 (tmps, dst, src, type, ssize);
1786
1787 /* Copy the extracted pieces into the proper (probable) hard regs. */
1788 for (i = 0; i < XVECLEN (dst, 0); i++)
1789 {
1790 rtx d = XEXP (XVECEXP (dst, 0, i), 0);
1791 if (d == NULL)
1792 continue;
1793 emit_move_insn (d, tmps[i]);
1794 }
1795 }
1796
1797 /* Similar, but load SRC into new pseudos in a format that looks like
1798 PARALLEL. This can later be fed to emit_group_move to get things
1799 in the right place. */
1800
1801 rtx
1802 emit_group_load_into_temps (rtx parallel, rtx src, tree type, int ssize)
1803 {
1804 rtvec vec;
1805 int i;
1806
1807 vec = rtvec_alloc (XVECLEN (parallel, 0));
1808 emit_group_load_1 (&RTVEC_ELT (vec, 0), parallel, src, type, ssize);
1809
1810 /* Convert the vector to look just like the original PARALLEL, except
1811 with the computed values. */
1812 for (i = 0; i < XVECLEN (parallel, 0); i++)
1813 {
1814 rtx e = XVECEXP (parallel, 0, i);
1815 rtx d = XEXP (e, 0);
1816
1817 if (d)
1818 {
1819 d = force_reg (GET_MODE (d), RTVEC_ELT (vec, i));
1820 e = alloc_EXPR_LIST (REG_NOTE_KIND (e), d, XEXP (e, 1));
1821 }
1822 RTVEC_ELT (vec, i) = e;
1823 }
1824
1825 return gen_rtx_PARALLEL (GET_MODE (parallel), vec);
1826 }
1827
1828 /* Emit code to move a block SRC to block DST, where SRC and DST are
1829 non-consecutive groups of registers, each represented by a PARALLEL. */
1830
1831 void
1832 emit_group_move (rtx dst, rtx src)
1833 {
1834 int i;
1835
1836 gcc_assert (GET_CODE (src) == PARALLEL
1837 && GET_CODE (dst) == PARALLEL
1838 && XVECLEN (src, 0) == XVECLEN (dst, 0));
1839
1840 /* Skip first entry if NULL. */
1841 for (i = XEXP (XVECEXP (src, 0, 0), 0) ? 0 : 1; i < XVECLEN (src, 0); i++)
1842 emit_move_insn (XEXP (XVECEXP (dst, 0, i), 0),
1843 XEXP (XVECEXP (src, 0, i), 0));
1844 }
1845
1846 /* Move a group of registers represented by a PARALLEL into pseudos. */
1847
1848 rtx
1849 emit_group_move_into_temps (rtx src)
1850 {
1851 rtvec vec = rtvec_alloc (XVECLEN (src, 0));
1852 int i;
1853
1854 for (i = 0; i < XVECLEN (src, 0); i++)
1855 {
1856 rtx e = XVECEXP (src, 0, i);
1857 rtx d = XEXP (e, 0);
1858
1859 if (d)
1860 e = alloc_EXPR_LIST (REG_NOTE_KIND (e), copy_to_reg (d), XEXP (e, 1));
1861 RTVEC_ELT (vec, i) = e;
1862 }
1863
1864 return gen_rtx_PARALLEL (GET_MODE (src), vec);
1865 }
1866
1867 /* Emit code to move a block SRC to a block ORIG_DST of type TYPE,
1868 where SRC is non-consecutive registers represented by a PARALLEL.
1869 SSIZE represents the total size of block ORIG_DST, or -1 if not
1870 known. */
1871
1872 void
1873 emit_group_store (rtx orig_dst, rtx src, tree type ATTRIBUTE_UNUSED, int ssize)
1874 {
1875 rtx *tmps, dst;
1876 int start, finish, i;
1877 enum machine_mode m = GET_MODE (orig_dst);
1878
1879 gcc_assert (GET_CODE (src) == PARALLEL);
1880
1881 if (!SCALAR_INT_MODE_P (m)
1882 && !MEM_P (orig_dst) && GET_CODE (orig_dst) != CONCAT)
1883 {
1884 enum machine_mode imode = int_mode_for_mode (GET_MODE (orig_dst));
1885 if (imode == BLKmode)
1886 dst = assign_stack_temp (GET_MODE (orig_dst), ssize, 0);
1887 else
1888 dst = gen_reg_rtx (imode);
1889 emit_group_store (dst, src, type, ssize);
1890 if (imode != BLKmode)
1891 dst = gen_lowpart (GET_MODE (orig_dst), dst);
1892 emit_move_insn (orig_dst, dst);
1893 return;
1894 }
1895
1896 /* Check for a NULL entry, used to indicate that the parameter goes
1897 both on the stack and in registers. */
1898 if (XEXP (XVECEXP (src, 0, 0), 0))
1899 start = 0;
1900 else
1901 start = 1;
1902 finish = XVECLEN (src, 0);
1903
1904 tmps = XALLOCAVEC (rtx, finish);
1905
1906 /* Copy the (probable) hard regs into pseudos. */
1907 for (i = start; i < finish; i++)
1908 {
1909 rtx reg = XEXP (XVECEXP (src, 0, i), 0);
1910 if (!REG_P (reg) || REGNO (reg) < FIRST_PSEUDO_REGISTER)
1911 {
1912 tmps[i] = gen_reg_rtx (GET_MODE (reg));
1913 emit_move_insn (tmps[i], reg);
1914 }
1915 else
1916 tmps[i] = reg;
1917 }
1918
1919 /* If we won't be storing directly into memory, protect the real destination
1920 from strange tricks we might play. */
1921 dst = orig_dst;
1922 if (GET_CODE (dst) == PARALLEL)
1923 {
1924 rtx temp;
1925
1926 /* We can get a PARALLEL dst if there is a conditional expression in
1927 a return statement. In that case, the dst and src are the same,
1928 so no action is necessary. */
1929 if (rtx_equal_p (dst, src))
1930 return;
1931
1932 /* It is unclear if we can ever reach here, but we may as well handle
1933 it. Allocate a temporary, and split this into a store/load to/from
1934 the temporary. */
1935
1936 temp = assign_stack_temp (GET_MODE (dst), ssize, 0);
1937 emit_group_store (temp, src, type, ssize);
1938 emit_group_load (dst, temp, type, ssize);
1939 return;
1940 }
1941 else if (!MEM_P (dst) && GET_CODE (dst) != CONCAT)
1942 {
1943 enum machine_mode outer = GET_MODE (dst);
1944 enum machine_mode inner;
1945 HOST_WIDE_INT bytepos;
1946 bool done = false;
1947 rtx temp;
1948
1949 if (!REG_P (dst) || REGNO (dst) < FIRST_PSEUDO_REGISTER)
1950 dst = gen_reg_rtx (outer);
1951
1952 /* Make life a bit easier for combine. */
1953 /* If the first element of the vector is the low part
1954 of the destination mode, use a paradoxical subreg to
1955 initialize the destination. */
1956 if (start < finish)
1957 {
1958 inner = GET_MODE (tmps[start]);
1959 bytepos = subreg_lowpart_offset (inner, outer);
1960 if (INTVAL (XEXP (XVECEXP (src, 0, start), 1)) == bytepos)
1961 {
1962 temp = simplify_gen_subreg (outer, tmps[start],
1963 inner, 0);
1964 if (temp)
1965 {
1966 emit_move_insn (dst, temp);
1967 done = true;
1968 start++;
1969 }
1970 }
1971 }
1972
1973 /* If the first element wasn't the low part, try the last. */
1974 if (!done
1975 && start < finish - 1)
1976 {
1977 inner = GET_MODE (tmps[finish - 1]);
1978 bytepos = subreg_lowpart_offset (inner, outer);
1979 if (INTVAL (XEXP (XVECEXP (src, 0, finish - 1), 1)) == bytepos)
1980 {
1981 temp = simplify_gen_subreg (outer, tmps[finish - 1],
1982 inner, 0);
1983 if (temp)
1984 {
1985 emit_move_insn (dst, temp);
1986 done = true;
1987 finish--;
1988 }
1989 }
1990 }
1991
1992 /* Otherwise, simply initialize the result to zero. */
1993 if (!done)
1994 emit_move_insn (dst, CONST0_RTX (outer));
1995 }
1996
1997 /* Process the pieces. */
1998 for (i = start; i < finish; i++)
1999 {
2000 HOST_WIDE_INT bytepos = INTVAL (XEXP (XVECEXP (src, 0, i), 1));
2001 enum machine_mode mode = GET_MODE (tmps[i]);
2002 unsigned int bytelen = GET_MODE_SIZE (mode);
2003 unsigned int adj_bytelen = bytelen;
2004 rtx dest = dst;
2005
2006 /* Handle trailing fragments that run over the size of the struct. */
2007 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
2008 adj_bytelen = ssize - bytepos;
2009
2010 if (GET_CODE (dst) == CONCAT)
2011 {
2012 if (bytepos + adj_bytelen
2013 <= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0))))
2014 dest = XEXP (dst, 0);
2015 else if (bytepos >= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0))))
2016 {
2017 bytepos -= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0)));
2018 dest = XEXP (dst, 1);
2019 }
2020 else
2021 {
2022 enum machine_mode dest_mode = GET_MODE (dest);
2023 enum machine_mode tmp_mode = GET_MODE (tmps[i]);
2024
2025 gcc_assert (bytepos == 0 && XVECLEN (src, 0));
2026
2027 if (GET_MODE_ALIGNMENT (dest_mode)
2028 >= GET_MODE_ALIGNMENT (tmp_mode))
2029 {
2030 dest = assign_stack_temp (dest_mode,
2031 GET_MODE_SIZE (dest_mode),
2032 0);
2033 emit_move_insn (adjust_address (dest,
2034 tmp_mode,
2035 bytepos),
2036 tmps[i]);
2037 dst = dest;
2038 }
2039 else
2040 {
2041 dest = assign_stack_temp (tmp_mode,
2042 GET_MODE_SIZE (tmp_mode),
2043 0);
2044 emit_move_insn (dest, tmps[i]);
2045 dst = adjust_address (dest, dest_mode, bytepos);
2046 }
2047 break;
2048 }
2049 }
2050
2051 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
2052 {
2053 /* store_bit_field always takes its value from the lsb.
2054 Move the fragment to the lsb if it's not already there. */
2055 if (
2056 #ifdef BLOCK_REG_PADDING
2057 BLOCK_REG_PADDING (GET_MODE (orig_dst), type, i == start)
2058 == (BYTES_BIG_ENDIAN ? upward : downward)
2059 #else
2060 BYTES_BIG_ENDIAN
2061 #endif
2062 )
2063 {
2064 int shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT;
2065 tmps[i] = expand_shift (RSHIFT_EXPR, mode, tmps[i],
2066 shift, tmps[i], 0);
2067 }
2068 bytelen = adj_bytelen;
2069 }
2070
2071 /* Optimize the access just a bit. */
2072 if (MEM_P (dest)
2073 && (! SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (dest))
2074 || MEM_ALIGN (dest) >= GET_MODE_ALIGNMENT (mode))
2075 && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0
2076 && bytelen == GET_MODE_SIZE (mode))
2077 emit_move_insn (adjust_address (dest, mode, bytepos), tmps[i]);
2078 else
2079 store_bit_field (dest, bytelen * BITS_PER_UNIT, bytepos * BITS_PER_UNIT,
2080 0, 0, mode, tmps[i]);
2081 }
2082
2083 /* Copy from the pseudo into the (probable) hard reg. */
2084 if (orig_dst != dst)
2085 emit_move_insn (orig_dst, dst);
2086 }
2087
2088 /* Generate code to copy a BLKmode object of TYPE out of a
2089 set of registers starting with SRCREG into TGTBLK. If TGTBLK
2090 is null, a stack temporary is created. TGTBLK is returned.
2091
2092 The purpose of this routine is to handle functions that return
2093 BLKmode structures in registers. Some machines (the PA for example)
2094 want to return all small structures in registers regardless of the
2095 structure's alignment. */
2096
2097 rtx
2098 copy_blkmode_from_reg (rtx tgtblk, rtx srcreg, tree type)
2099 {
2100 unsigned HOST_WIDE_INT bytes = int_size_in_bytes (type);
2101 rtx src = NULL, dst = NULL;
2102 unsigned HOST_WIDE_INT bitsize = MIN (TYPE_ALIGN (type), BITS_PER_WORD);
2103 unsigned HOST_WIDE_INT bitpos, xbitpos, padding_correction = 0;
2104 enum machine_mode copy_mode;
2105
2106 if (tgtblk == 0)
2107 {
2108 tgtblk = assign_temp (build_qualified_type (type,
2109 (TYPE_QUALS (type)
2110 | TYPE_QUAL_CONST)),
2111 0, 1, 1);
2112 preserve_temp_slots (tgtblk);
2113 }
2114
2115 /* This code assumes srcreg is at least a full word. If it isn't, copy it
2116 into a new pseudo which is a full word. */
2117
2118 if (GET_MODE (srcreg) != BLKmode
2119 && GET_MODE_SIZE (GET_MODE (srcreg)) < UNITS_PER_WORD)
2120 srcreg = convert_to_mode (word_mode, srcreg, TYPE_UNSIGNED (type));
2121
2122 /* If the structure doesn't take up a whole number of words, see whether
2123 SRCREG is padded on the left or on the right. If it's on the left,
2124 set PADDING_CORRECTION to the number of bits to skip.
2125
2126 In most ABIs, the structure will be returned at the least end of
2127 the register, which translates to right padding on little-endian
2128 targets and left padding on big-endian targets. The opposite
2129 holds if the structure is returned at the most significant
2130 end of the register. */
2131 if (bytes % UNITS_PER_WORD != 0
2132 && (targetm.calls.return_in_msb (type)
2133 ? !BYTES_BIG_ENDIAN
2134 : BYTES_BIG_ENDIAN))
2135 padding_correction
2136 = (BITS_PER_WORD - ((bytes % UNITS_PER_WORD) * BITS_PER_UNIT));
2137
2138 /* Copy the structure BITSIZE bits at a time. If the target lives in
2139 memory, take care of not reading/writing past its end by selecting
2140 a copy mode suited to BITSIZE. This should always be possible given
2141 how it is computed.
2142
2143 We could probably emit more efficient code for machines which do not use
2144 strict alignment, but it doesn't seem worth the effort at the current
2145 time. */
2146
2147 copy_mode = word_mode;
2148 if (MEM_P (tgtblk))
2149 {
2150 enum machine_mode mem_mode = mode_for_size (bitsize, MODE_INT, 1);
2151 if (mem_mode != BLKmode)
2152 copy_mode = mem_mode;
2153 }
2154
2155 for (bitpos = 0, xbitpos = padding_correction;
2156 bitpos < bytes * BITS_PER_UNIT;
2157 bitpos += bitsize, xbitpos += bitsize)
2158 {
2159 /* We need a new source operand each time xbitpos is on a
2160 word boundary and when xbitpos == padding_correction
2161 (the first time through). */
2162 if (xbitpos % BITS_PER_WORD == 0
2163 || xbitpos == padding_correction)
2164 src = operand_subword_force (srcreg, xbitpos / BITS_PER_WORD,
2165 GET_MODE (srcreg));
2166
2167 /* We need a new destination operand each time bitpos is on
2168 a word boundary. */
2169 if (bitpos % BITS_PER_WORD == 0)
2170 dst = operand_subword (tgtblk, bitpos / BITS_PER_WORD, 1, BLKmode);
2171
2172 /* Use xbitpos for the source extraction (right justified) and
2173 bitpos for the destination store (left justified). */
2174 store_bit_field (dst, bitsize, bitpos % BITS_PER_WORD, 0, 0, copy_mode,
2175 extract_bit_field (src, bitsize,
2176 xbitpos % BITS_PER_WORD, 1, false,
2177 NULL_RTX, copy_mode, copy_mode));
2178 }
2179
2180 return tgtblk;
2181 }
2182
2183 /* Copy BLKmode value SRC into a register of mode MODE. Return the
2184 register if it contains any data, otherwise return null.
2185
2186 This is used on targets that return BLKmode values in registers. */
2187
2188 rtx
2189 copy_blkmode_to_reg (enum machine_mode mode, tree src)
2190 {
2191 int i, n_regs;
2192 unsigned HOST_WIDE_INT bitpos, xbitpos, padding_correction = 0, bytes;
2193 unsigned int bitsize;
2194 rtx *dst_words, dst, x, src_word = NULL_RTX, dst_word = NULL_RTX;
2195 enum machine_mode dst_mode;
2196
2197 gcc_assert (TYPE_MODE (TREE_TYPE (src)) == BLKmode);
2198
2199 x = expand_normal (src);
2200
2201 bytes = int_size_in_bytes (TREE_TYPE (src));
2202 if (bytes == 0)
2203 return NULL_RTX;
2204
2205 /* If the structure doesn't take up a whole number of words, see
2206 whether the register value should be padded on the left or on
2207 the right. Set PADDING_CORRECTION to the number of padding
2208 bits needed on the left side.
2209
2210 In most ABIs, the structure will be returned at the least end of
2211 the register, which translates to right padding on little-endian
2212 targets and left padding on big-endian targets. The opposite
2213 holds if the structure is returned at the most significant
2214 end of the register. */
2215 if (bytes % UNITS_PER_WORD != 0
2216 && (targetm.calls.return_in_msb (TREE_TYPE (src))
2217 ? !BYTES_BIG_ENDIAN
2218 : BYTES_BIG_ENDIAN))
2219 padding_correction = (BITS_PER_WORD - ((bytes % UNITS_PER_WORD)
2220 * BITS_PER_UNIT));
2221
2222 n_regs = (bytes + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
2223 dst_words = XALLOCAVEC (rtx, n_regs);
2224 bitsize = MIN (TYPE_ALIGN (TREE_TYPE (src)), BITS_PER_WORD);
2225
2226 /* Copy the structure BITSIZE bits at a time. */
2227 for (bitpos = 0, xbitpos = padding_correction;
2228 bitpos < bytes * BITS_PER_UNIT;
2229 bitpos += bitsize, xbitpos += bitsize)
2230 {
2231 /* We need a new destination pseudo each time xbitpos is
2232 on a word boundary and when xbitpos == padding_correction
2233 (the first time through). */
2234 if (xbitpos % BITS_PER_WORD == 0
2235 || xbitpos == padding_correction)
2236 {
2237 /* Generate an appropriate register. */
2238 dst_word = gen_reg_rtx (word_mode);
2239 dst_words[xbitpos / BITS_PER_WORD] = dst_word;
2240
2241 /* Clear the destination before we move anything into it. */
2242 emit_move_insn (dst_word, CONST0_RTX (word_mode));
2243 }
2244
2245 /* We need a new source operand each time bitpos is on a word
2246 boundary. */
2247 if (bitpos % BITS_PER_WORD == 0)
2248 src_word = operand_subword_force (x, bitpos / BITS_PER_WORD, BLKmode);
2249
2250 /* Use bitpos for the source extraction (left justified) and
2251 xbitpos for the destination store (right justified). */
2252 store_bit_field (dst_word, bitsize, xbitpos % BITS_PER_WORD,
2253 0, 0, word_mode,
2254 extract_bit_field (src_word, bitsize,
2255 bitpos % BITS_PER_WORD, 1, false,
2256 NULL_RTX, word_mode, word_mode));
2257 }
2258
2259 if (mode == BLKmode)
2260 {
2261 /* Find the smallest integer mode large enough to hold the
2262 entire structure. */
2263 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
2264 mode != VOIDmode;
2265 mode = GET_MODE_WIDER_MODE (mode))
2266 /* Have we found a large enough mode? */
2267 if (GET_MODE_SIZE (mode) >= bytes)
2268 break;
2269
2270 /* A suitable mode should have been found. */
2271 gcc_assert (mode != VOIDmode);
2272 }
2273
2274 if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (word_mode))
2275 dst_mode = word_mode;
2276 else
2277 dst_mode = mode;
2278 dst = gen_reg_rtx (dst_mode);
2279
2280 for (i = 0; i < n_regs; i++)
2281 emit_move_insn (operand_subword (dst, i, 0, dst_mode), dst_words[i]);
2282
2283 if (mode != dst_mode)
2284 dst = gen_lowpart (mode, dst);
2285
2286 return dst;
2287 }
2288
2289 /* Add a USE expression for REG to the (possibly empty) list pointed
2290 to by CALL_FUSAGE. REG must denote a hard register. */
2291
2292 void
2293 use_reg_mode (rtx *call_fusage, rtx reg, enum machine_mode mode)
2294 {
2295 gcc_assert (REG_P (reg) && REGNO (reg) < FIRST_PSEUDO_REGISTER);
2296
2297 *call_fusage
2298 = gen_rtx_EXPR_LIST (mode, gen_rtx_USE (VOIDmode, reg), *call_fusage);
2299 }
2300
2301 /* Add USE expressions to *CALL_FUSAGE for each of NREGS consecutive regs,
2302 starting at REGNO. All of these registers must be hard registers. */
2303
2304 void
2305 use_regs (rtx *call_fusage, int regno, int nregs)
2306 {
2307 int i;
2308
2309 gcc_assert (regno + nregs <= FIRST_PSEUDO_REGISTER);
2310
2311 for (i = 0; i < nregs; i++)
2312 use_reg (call_fusage, regno_reg_rtx[regno + i]);
2313 }
2314
2315 /* Add USE expressions to *CALL_FUSAGE for each REG contained in the
2316 PARALLEL REGS. This is for calls that pass values in multiple
2317 non-contiguous locations. The Irix 6 ABI has examples of this. */
2318
2319 void
2320 use_group_regs (rtx *call_fusage, rtx regs)
2321 {
2322 int i;
2323
2324 for (i = 0; i < XVECLEN (regs, 0); i++)
2325 {
2326 rtx reg = XEXP (XVECEXP (regs, 0, i), 0);
2327
2328 /* A NULL entry means the parameter goes both on the stack and in
2329 registers. This can also be a MEM for targets that pass values
2330 partially on the stack and partially in registers. */
2331 if (reg != 0 && REG_P (reg))
2332 use_reg (call_fusage, reg);
2333 }
2334 }
2335
2336 /* Return the defining gimple statement for SSA_NAME NAME if it is an
2337 assigment and the code of the expresion on the RHS is CODE. Return
2338 NULL otherwise. */
2339
2340 static gimple
2341 get_def_for_expr (tree name, enum tree_code code)
2342 {
2343 gimple def_stmt;
2344
2345 if (TREE_CODE (name) != SSA_NAME)
2346 return NULL;
2347
2348 def_stmt = get_gimple_for_ssa_name (name);
2349 if (!def_stmt
2350 || gimple_assign_rhs_code (def_stmt) != code)
2351 return NULL;
2352
2353 return def_stmt;
2354 }
2355 \f
2356
2357 /* Determine whether the LEN bytes generated by CONSTFUN can be
2358 stored to memory using several move instructions. CONSTFUNDATA is
2359 a pointer which will be passed as argument in every CONSTFUN call.
2360 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
2361 a memset operation and false if it's a copy of a constant string.
2362 Return nonzero if a call to store_by_pieces should succeed. */
2363
2364 int
2365 can_store_by_pieces (unsigned HOST_WIDE_INT len,
2366 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode),
2367 void *constfundata, unsigned int align, bool memsetp)
2368 {
2369 unsigned HOST_WIDE_INT l;
2370 unsigned int max_size;
2371 HOST_WIDE_INT offset = 0;
2372 enum machine_mode mode;
2373 enum insn_code icode;
2374 int reverse;
2375 /* cst is set but not used if LEGITIMATE_CONSTANT doesn't use it. */
2376 rtx cst ATTRIBUTE_UNUSED;
2377
2378 if (len == 0)
2379 return 1;
2380
2381 if (! (memsetp
2382 ? SET_BY_PIECES_P (len, align)
2383 : STORE_BY_PIECES_P (len, align)))
2384 return 0;
2385
2386 align = alignment_for_piecewise_move (STORE_MAX_PIECES, align);
2387
2388 /* We would first store what we can in the largest integer mode, then go to
2389 successively smaller modes. */
2390
2391 for (reverse = 0;
2392 reverse <= (HAVE_PRE_DECREMENT || HAVE_POST_DECREMENT);
2393 reverse++)
2394 {
2395 l = len;
2396 max_size = STORE_MAX_PIECES + 1;
2397 while (max_size > 1)
2398 {
2399 mode = widest_int_mode_for_size (max_size);
2400
2401 if (mode == VOIDmode)
2402 break;
2403
2404 icode = optab_handler (mov_optab, mode);
2405 if (icode != CODE_FOR_nothing
2406 && align >= GET_MODE_ALIGNMENT (mode))
2407 {
2408 unsigned int size = GET_MODE_SIZE (mode);
2409
2410 while (l >= size)
2411 {
2412 if (reverse)
2413 offset -= size;
2414
2415 cst = (*constfun) (constfundata, offset, mode);
2416 if (!targetm.legitimate_constant_p (mode, cst))
2417 return 0;
2418
2419 if (!reverse)
2420 offset += size;
2421
2422 l -= size;
2423 }
2424 }
2425
2426 max_size = GET_MODE_SIZE (mode);
2427 }
2428
2429 /* The code above should have handled everything. */
2430 gcc_assert (!l);
2431 }
2432
2433 return 1;
2434 }
2435
2436 /* Generate several move instructions to store LEN bytes generated by
2437 CONSTFUN to block TO. (A MEM rtx with BLKmode). CONSTFUNDATA is a
2438 pointer which will be passed as argument in every CONSTFUN call.
2439 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
2440 a memset operation and false if it's a copy of a constant string.
2441 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
2442 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
2443 stpcpy. */
2444
2445 rtx
2446 store_by_pieces (rtx to, unsigned HOST_WIDE_INT len,
2447 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode),
2448 void *constfundata, unsigned int align, bool memsetp, int endp)
2449 {
2450 enum machine_mode to_addr_mode
2451 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (to));
2452 struct store_by_pieces_d data;
2453
2454 if (len == 0)
2455 {
2456 gcc_assert (endp != 2);
2457 return to;
2458 }
2459
2460 gcc_assert (memsetp
2461 ? SET_BY_PIECES_P (len, align)
2462 : STORE_BY_PIECES_P (len, align));
2463 data.constfun = constfun;
2464 data.constfundata = constfundata;
2465 data.len = len;
2466 data.to = to;
2467 store_by_pieces_1 (&data, align);
2468 if (endp)
2469 {
2470 rtx to1;
2471
2472 gcc_assert (!data.reverse);
2473 if (data.autinc_to)
2474 {
2475 if (endp == 2)
2476 {
2477 if (HAVE_POST_INCREMENT && data.explicit_inc_to > 0)
2478 emit_insn (gen_add2_insn (data.to_addr, constm1_rtx));
2479 else
2480 data.to_addr = copy_to_mode_reg (to_addr_mode,
2481 plus_constant (data.to_addr,
2482 -1));
2483 }
2484 to1 = adjust_automodify_address (data.to, QImode, data.to_addr,
2485 data.offset);
2486 }
2487 else
2488 {
2489 if (endp == 2)
2490 --data.offset;
2491 to1 = adjust_address (data.to, QImode, data.offset);
2492 }
2493 return to1;
2494 }
2495 else
2496 return data.to;
2497 }
2498
2499 /* Generate several move instructions to clear LEN bytes of block TO. (A MEM
2500 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
2501
2502 static void
2503 clear_by_pieces (rtx to, unsigned HOST_WIDE_INT len, unsigned int align)
2504 {
2505 struct store_by_pieces_d data;
2506
2507 if (len == 0)
2508 return;
2509
2510 data.constfun = clear_by_pieces_1;
2511 data.constfundata = NULL;
2512 data.len = len;
2513 data.to = to;
2514 store_by_pieces_1 (&data, align);
2515 }
2516
2517 /* Callback routine for clear_by_pieces.
2518 Return const0_rtx unconditionally. */
2519
2520 static rtx
2521 clear_by_pieces_1 (void *data ATTRIBUTE_UNUSED,
2522 HOST_WIDE_INT offset ATTRIBUTE_UNUSED,
2523 enum machine_mode mode ATTRIBUTE_UNUSED)
2524 {
2525 return const0_rtx;
2526 }
2527
2528 /* Subroutine of clear_by_pieces and store_by_pieces.
2529 Generate several move instructions to store LEN bytes of block TO. (A MEM
2530 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
2531
2532 static void
2533 store_by_pieces_1 (struct store_by_pieces_d *data ATTRIBUTE_UNUSED,
2534 unsigned int align ATTRIBUTE_UNUSED)
2535 {
2536 enum machine_mode to_addr_mode
2537 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (data->to));
2538 rtx to_addr = XEXP (data->to, 0);
2539 unsigned int max_size = STORE_MAX_PIECES + 1;
2540 enum insn_code icode;
2541
2542 data->offset = 0;
2543 data->to_addr = to_addr;
2544 data->autinc_to
2545 = (GET_CODE (to_addr) == PRE_INC || GET_CODE (to_addr) == PRE_DEC
2546 || GET_CODE (to_addr) == POST_INC || GET_CODE (to_addr) == POST_DEC);
2547
2548 data->explicit_inc_to = 0;
2549 data->reverse
2550 = (GET_CODE (to_addr) == PRE_DEC || GET_CODE (to_addr) == POST_DEC);
2551 if (data->reverse)
2552 data->offset = data->len;
2553
2554 /* If storing requires more than two move insns,
2555 copy addresses to registers (to make displacements shorter)
2556 and use post-increment if available. */
2557 if (!data->autinc_to
2558 && move_by_pieces_ninsns (data->len, align, max_size) > 2)
2559 {
2560 /* Determine the main mode we'll be using.
2561 MODE might not be used depending on the definitions of the
2562 USE_* macros below. */
2563 enum machine_mode mode ATTRIBUTE_UNUSED
2564 = widest_int_mode_for_size (max_size);
2565
2566 if (USE_STORE_PRE_DECREMENT (mode) && data->reverse && ! data->autinc_to)
2567 {
2568 data->to_addr = copy_to_mode_reg (to_addr_mode,
2569 plus_constant (to_addr, data->len));
2570 data->autinc_to = 1;
2571 data->explicit_inc_to = -1;
2572 }
2573
2574 if (USE_STORE_POST_INCREMENT (mode) && ! data->reverse
2575 && ! data->autinc_to)
2576 {
2577 data->to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
2578 data->autinc_to = 1;
2579 data->explicit_inc_to = 1;
2580 }
2581
2582 if ( !data->autinc_to && CONSTANT_P (to_addr))
2583 data->to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
2584 }
2585
2586 align = alignment_for_piecewise_move (STORE_MAX_PIECES, align);
2587
2588 /* First store what we can in the largest integer mode, then go to
2589 successively smaller modes. */
2590
2591 while (max_size > 1)
2592 {
2593 enum machine_mode mode = widest_int_mode_for_size (max_size);
2594
2595 if (mode == VOIDmode)
2596 break;
2597
2598 icode = optab_handler (mov_optab, mode);
2599 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
2600 store_by_pieces_2 (GEN_FCN (icode), mode, data);
2601
2602 max_size = GET_MODE_SIZE (mode);
2603 }
2604
2605 /* The code above should have handled everything. */
2606 gcc_assert (!data->len);
2607 }
2608
2609 /* Subroutine of store_by_pieces_1. Store as many bytes as appropriate
2610 with move instructions for mode MODE. GENFUN is the gen_... function
2611 to make a move insn for that mode. DATA has all the other info. */
2612
2613 static void
2614 store_by_pieces_2 (rtx (*genfun) (rtx, ...), enum machine_mode mode,
2615 struct store_by_pieces_d *data)
2616 {
2617 unsigned int size = GET_MODE_SIZE (mode);
2618 rtx to1, cst;
2619
2620 while (data->len >= size)
2621 {
2622 if (data->reverse)
2623 data->offset -= size;
2624
2625 if (data->autinc_to)
2626 to1 = adjust_automodify_address (data->to, mode, data->to_addr,
2627 data->offset);
2628 else
2629 to1 = adjust_address (data->to, mode, data->offset);
2630
2631 if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0)
2632 emit_insn (gen_add2_insn (data->to_addr,
2633 GEN_INT (-(HOST_WIDE_INT) size)));
2634
2635 cst = (*data->constfun) (data->constfundata, data->offset, mode);
2636 emit_insn ((*genfun) (to1, cst));
2637
2638 if (HAVE_POST_INCREMENT && data->explicit_inc_to > 0)
2639 emit_insn (gen_add2_insn (data->to_addr, GEN_INT (size)));
2640
2641 if (! data->reverse)
2642 data->offset += size;
2643
2644 data->len -= size;
2645 }
2646 }
2647 \f
2648 /* Write zeros through the storage of OBJECT. If OBJECT has BLKmode, SIZE is
2649 its length in bytes. */
2650
2651 rtx
2652 clear_storage_hints (rtx object, rtx size, enum block_op_methods method,
2653 unsigned int expected_align, HOST_WIDE_INT expected_size)
2654 {
2655 enum machine_mode mode = GET_MODE (object);
2656 unsigned int align;
2657
2658 gcc_assert (method == BLOCK_OP_NORMAL || method == BLOCK_OP_TAILCALL);
2659
2660 /* If OBJECT is not BLKmode and SIZE is the same size as its mode,
2661 just move a zero. Otherwise, do this a piece at a time. */
2662 if (mode != BLKmode
2663 && CONST_INT_P (size)
2664 && INTVAL (size) == (HOST_WIDE_INT) GET_MODE_SIZE (mode))
2665 {
2666 rtx zero = CONST0_RTX (mode);
2667 if (zero != NULL)
2668 {
2669 emit_move_insn (object, zero);
2670 return NULL;
2671 }
2672
2673 if (COMPLEX_MODE_P (mode))
2674 {
2675 zero = CONST0_RTX (GET_MODE_INNER (mode));
2676 if (zero != NULL)
2677 {
2678 write_complex_part (object, zero, 0);
2679 write_complex_part (object, zero, 1);
2680 return NULL;
2681 }
2682 }
2683 }
2684
2685 if (size == const0_rtx)
2686 return NULL;
2687
2688 align = MEM_ALIGN (object);
2689
2690 if (CONST_INT_P (size)
2691 && CLEAR_BY_PIECES_P (INTVAL (size), align))
2692 clear_by_pieces (object, INTVAL (size), align);
2693 else if (set_storage_via_setmem (object, size, const0_rtx, align,
2694 expected_align, expected_size))
2695 ;
2696 else if (ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (object)))
2697 return set_storage_via_libcall (object, size, const0_rtx,
2698 method == BLOCK_OP_TAILCALL);
2699 else
2700 gcc_unreachable ();
2701
2702 return NULL;
2703 }
2704
2705 rtx
2706 clear_storage (rtx object, rtx size, enum block_op_methods method)
2707 {
2708 return clear_storage_hints (object, size, method, 0, -1);
2709 }
2710
2711
2712 /* A subroutine of clear_storage. Expand a call to memset.
2713 Return the return value of memset, 0 otherwise. */
2714
2715 rtx
2716 set_storage_via_libcall (rtx object, rtx size, rtx val, bool tailcall)
2717 {
2718 tree call_expr, fn, object_tree, size_tree, val_tree;
2719 enum machine_mode size_mode;
2720 rtx retval;
2721
2722 /* Emit code to copy OBJECT and SIZE into new pseudos. We can then
2723 place those into new pseudos into a VAR_DECL and use them later. */
2724
2725 object = copy_to_mode_reg (Pmode, XEXP (object, 0));
2726
2727 size_mode = TYPE_MODE (sizetype);
2728 size = convert_to_mode (size_mode, size, 1);
2729 size = copy_to_mode_reg (size_mode, size);
2730
2731 /* It is incorrect to use the libcall calling conventions to call
2732 memset in this context. This could be a user call to memset and
2733 the user may wish to examine the return value from memset. For
2734 targets where libcalls and normal calls have different conventions
2735 for returning pointers, we could end up generating incorrect code. */
2736
2737 object_tree = make_tree (ptr_type_node, object);
2738 if (!CONST_INT_P (val))
2739 val = convert_to_mode (TYPE_MODE (integer_type_node), val, 1);
2740 size_tree = make_tree (sizetype, size);
2741 val_tree = make_tree (integer_type_node, val);
2742
2743 fn = clear_storage_libcall_fn (true);
2744 call_expr = build_call_expr (fn, 3, object_tree, val_tree, size_tree);
2745 CALL_EXPR_TAILCALL (call_expr) = tailcall;
2746
2747 retval = expand_normal (call_expr);
2748
2749 return retval;
2750 }
2751
2752 /* A subroutine of set_storage_via_libcall. Create the tree node
2753 for the function we use for block clears. The first time FOR_CALL
2754 is true, we call assemble_external. */
2755
2756 tree block_clear_fn;
2757
2758 void
2759 init_block_clear_fn (const char *asmspec)
2760 {
2761 if (!block_clear_fn)
2762 {
2763 tree fn, args;
2764
2765 fn = get_identifier ("memset");
2766 args = build_function_type_list (ptr_type_node, ptr_type_node,
2767 integer_type_node, sizetype,
2768 NULL_TREE);
2769
2770 fn = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL, fn, args);
2771 DECL_EXTERNAL (fn) = 1;
2772 TREE_PUBLIC (fn) = 1;
2773 DECL_ARTIFICIAL (fn) = 1;
2774 TREE_NOTHROW (fn) = 1;
2775 DECL_VISIBILITY (fn) = VISIBILITY_DEFAULT;
2776 DECL_VISIBILITY_SPECIFIED (fn) = 1;
2777
2778 block_clear_fn = fn;
2779 }
2780
2781 if (asmspec)
2782 set_user_assembler_name (block_clear_fn, asmspec);
2783 }
2784
2785 static tree
2786 clear_storage_libcall_fn (int for_call)
2787 {
2788 static bool emitted_extern;
2789
2790 if (!block_clear_fn)
2791 init_block_clear_fn (NULL);
2792
2793 if (for_call && !emitted_extern)
2794 {
2795 emitted_extern = true;
2796 make_decl_rtl (block_clear_fn);
2797 assemble_external (block_clear_fn);
2798 }
2799
2800 return block_clear_fn;
2801 }
2802 \f
2803 /* Expand a setmem pattern; return true if successful. */
2804
2805 bool
2806 set_storage_via_setmem (rtx object, rtx size, rtx val, unsigned int align,
2807 unsigned int expected_align, HOST_WIDE_INT expected_size)
2808 {
2809 /* Try the most limited insn first, because there's no point
2810 including more than one in the machine description unless
2811 the more limited one has some advantage. */
2812
2813 enum machine_mode mode;
2814
2815 if (expected_align < align)
2816 expected_align = align;
2817
2818 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
2819 mode = GET_MODE_WIDER_MODE (mode))
2820 {
2821 enum insn_code code = direct_optab_handler (setmem_optab, mode);
2822
2823 if (code != CODE_FOR_nothing
2824 /* We don't need MODE to be narrower than
2825 BITS_PER_HOST_WIDE_INT here because if SIZE is less than
2826 the mode mask, as it is returned by the macro, it will
2827 definitely be less than the actual mode mask. */
2828 && ((CONST_INT_P (size)
2829 && ((unsigned HOST_WIDE_INT) INTVAL (size)
2830 <= (GET_MODE_MASK (mode) >> 1)))
2831 || GET_MODE_BITSIZE (mode) >= BITS_PER_WORD))
2832 {
2833 struct expand_operand ops[6];
2834 unsigned int nops;
2835
2836 nops = insn_data[(int) code].n_generator_args;
2837 gcc_assert (nops == 4 || nops == 6);
2838
2839 create_fixed_operand (&ops[0], object);
2840 /* The check above guarantees that this size conversion is valid. */
2841 create_convert_operand_to (&ops[1], size, mode, true);
2842 create_convert_operand_from (&ops[2], val, byte_mode, true);
2843 create_integer_operand (&ops[3], align / BITS_PER_UNIT);
2844 if (nops == 6)
2845 {
2846 create_integer_operand (&ops[4], expected_align / BITS_PER_UNIT);
2847 create_integer_operand (&ops[5], expected_size);
2848 }
2849 if (maybe_expand_insn (code, nops, ops))
2850 return true;
2851 }
2852 }
2853
2854 return false;
2855 }
2856
2857 \f
2858 /* Write to one of the components of the complex value CPLX. Write VAL to
2859 the real part if IMAG_P is false, and the imaginary part if its true. */
2860
2861 static void
2862 write_complex_part (rtx cplx, rtx val, bool imag_p)
2863 {
2864 enum machine_mode cmode;
2865 enum machine_mode imode;
2866 unsigned ibitsize;
2867
2868 if (GET_CODE (cplx) == CONCAT)
2869 {
2870 emit_move_insn (XEXP (cplx, imag_p), val);
2871 return;
2872 }
2873
2874 cmode = GET_MODE (cplx);
2875 imode = GET_MODE_INNER (cmode);
2876 ibitsize = GET_MODE_BITSIZE (imode);
2877
2878 /* For MEMs simplify_gen_subreg may generate an invalid new address
2879 because, e.g., the original address is considered mode-dependent
2880 by the target, which restricts simplify_subreg from invoking
2881 adjust_address_nv. Instead of preparing fallback support for an
2882 invalid address, we call adjust_address_nv directly. */
2883 if (MEM_P (cplx))
2884 {
2885 emit_move_insn (adjust_address_nv (cplx, imode,
2886 imag_p ? GET_MODE_SIZE (imode) : 0),
2887 val);
2888 return;
2889 }
2890
2891 /* If the sub-object is at least word sized, then we know that subregging
2892 will work. This special case is important, since store_bit_field
2893 wants to operate on integer modes, and there's rarely an OImode to
2894 correspond to TCmode. */
2895 if (ibitsize >= BITS_PER_WORD
2896 /* For hard regs we have exact predicates. Assume we can split
2897 the original object if it spans an even number of hard regs.
2898 This special case is important for SCmode on 64-bit platforms
2899 where the natural size of floating-point regs is 32-bit. */
2900 || (REG_P (cplx)
2901 && REGNO (cplx) < FIRST_PSEUDO_REGISTER
2902 && hard_regno_nregs[REGNO (cplx)][cmode] % 2 == 0))
2903 {
2904 rtx part = simplify_gen_subreg (imode, cplx, cmode,
2905 imag_p ? GET_MODE_SIZE (imode) : 0);
2906 if (part)
2907 {
2908 emit_move_insn (part, val);
2909 return;
2910 }
2911 else
2912 /* simplify_gen_subreg may fail for sub-word MEMs. */
2913 gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD);
2914 }
2915
2916 store_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0, 0, 0, imode, val);
2917 }
2918
2919 /* Extract one of the components of the complex value CPLX. Extract the
2920 real part if IMAG_P is false, and the imaginary part if it's true. */
2921
2922 static rtx
2923 read_complex_part (rtx cplx, bool imag_p)
2924 {
2925 enum machine_mode cmode, imode;
2926 unsigned ibitsize;
2927
2928 if (GET_CODE (cplx) == CONCAT)
2929 return XEXP (cplx, imag_p);
2930
2931 cmode = GET_MODE (cplx);
2932 imode = GET_MODE_INNER (cmode);
2933 ibitsize = GET_MODE_BITSIZE (imode);
2934
2935 /* Special case reads from complex constants that got spilled to memory. */
2936 if (MEM_P (cplx) && GET_CODE (XEXP (cplx, 0)) == SYMBOL_REF)
2937 {
2938 tree decl = SYMBOL_REF_DECL (XEXP (cplx, 0));
2939 if (decl && TREE_CODE (decl) == COMPLEX_CST)
2940 {
2941 tree part = imag_p ? TREE_IMAGPART (decl) : TREE_REALPART (decl);
2942 if (CONSTANT_CLASS_P (part))
2943 return expand_expr (part, NULL_RTX, imode, EXPAND_NORMAL);
2944 }
2945 }
2946
2947 /* For MEMs simplify_gen_subreg may generate an invalid new address
2948 because, e.g., the original address is considered mode-dependent
2949 by the target, which restricts simplify_subreg from invoking
2950 adjust_address_nv. Instead of preparing fallback support for an
2951 invalid address, we call adjust_address_nv directly. */
2952 if (MEM_P (cplx))
2953 return adjust_address_nv (cplx, imode,
2954 imag_p ? GET_MODE_SIZE (imode) : 0);
2955
2956 /* If the sub-object is at least word sized, then we know that subregging
2957 will work. This special case is important, since extract_bit_field
2958 wants to operate on integer modes, and there's rarely an OImode to
2959 correspond to TCmode. */
2960 if (ibitsize >= BITS_PER_WORD
2961 /* For hard regs we have exact predicates. Assume we can split
2962 the original object if it spans an even number of hard regs.
2963 This special case is important for SCmode on 64-bit platforms
2964 where the natural size of floating-point regs is 32-bit. */
2965 || (REG_P (cplx)
2966 && REGNO (cplx) < FIRST_PSEUDO_REGISTER
2967 && hard_regno_nregs[REGNO (cplx)][cmode] % 2 == 0))
2968 {
2969 rtx ret = simplify_gen_subreg (imode, cplx, cmode,
2970 imag_p ? GET_MODE_SIZE (imode) : 0);
2971 if (ret)
2972 return ret;
2973 else
2974 /* simplify_gen_subreg may fail for sub-word MEMs. */
2975 gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD);
2976 }
2977
2978 return extract_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0,
2979 true, false, NULL_RTX, imode, imode);
2980 }
2981 \f
2982 /* A subroutine of emit_move_insn_1. Yet another lowpart generator.
2983 NEW_MODE and OLD_MODE are the same size. Return NULL if X cannot be
2984 represented in NEW_MODE. If FORCE is true, this will never happen, as
2985 we'll force-create a SUBREG if needed. */
2986
2987 static rtx
2988 emit_move_change_mode (enum machine_mode new_mode,
2989 enum machine_mode old_mode, rtx x, bool force)
2990 {
2991 rtx ret;
2992
2993 if (push_operand (x, GET_MODE (x)))
2994 {
2995 ret = gen_rtx_MEM (new_mode, XEXP (x, 0));
2996 MEM_COPY_ATTRIBUTES (ret, x);
2997 }
2998 else if (MEM_P (x))
2999 {
3000 /* We don't have to worry about changing the address since the
3001 size in bytes is supposed to be the same. */
3002 if (reload_in_progress)
3003 {
3004 /* Copy the MEM to change the mode and move any
3005 substitutions from the old MEM to the new one. */
3006 ret = adjust_address_nv (x, new_mode, 0);
3007 copy_replacements (x, ret);
3008 }
3009 else
3010 ret = adjust_address (x, new_mode, 0);
3011 }
3012 else
3013 {
3014 /* Note that we do want simplify_subreg's behavior of validating
3015 that the new mode is ok for a hard register. If we were to use
3016 simplify_gen_subreg, we would create the subreg, but would
3017 probably run into the target not being able to implement it. */
3018 /* Except, of course, when FORCE is true, when this is exactly what
3019 we want. Which is needed for CCmodes on some targets. */
3020 if (force)
3021 ret = simplify_gen_subreg (new_mode, x, old_mode, 0);
3022 else
3023 ret = simplify_subreg (new_mode, x, old_mode, 0);
3024 }
3025
3026 return ret;
3027 }
3028
3029 /* A subroutine of emit_move_insn_1. Generate a move from Y into X using
3030 an integer mode of the same size as MODE. Returns the instruction
3031 emitted, or NULL if such a move could not be generated. */
3032
3033 static rtx
3034 emit_move_via_integer (enum machine_mode mode, rtx x, rtx y, bool force)
3035 {
3036 enum machine_mode imode;
3037 enum insn_code code;
3038
3039 /* There must exist a mode of the exact size we require. */
3040 imode = int_mode_for_mode (mode);
3041 if (imode == BLKmode)
3042 return NULL_RTX;
3043
3044 /* The target must support moves in this mode. */
3045 code = optab_handler (mov_optab, imode);
3046 if (code == CODE_FOR_nothing)
3047 return NULL_RTX;
3048
3049 x = emit_move_change_mode (imode, mode, x, force);
3050 if (x == NULL_RTX)
3051 return NULL_RTX;
3052 y = emit_move_change_mode (imode, mode, y, force);
3053 if (y == NULL_RTX)
3054 return NULL_RTX;
3055 return emit_insn (GEN_FCN (code) (x, y));
3056 }
3057
3058 /* A subroutine of emit_move_insn_1. X is a push_operand in MODE.
3059 Return an equivalent MEM that does not use an auto-increment. */
3060
3061 static rtx
3062 emit_move_resolve_push (enum machine_mode mode, rtx x)
3063 {
3064 enum rtx_code code = GET_CODE (XEXP (x, 0));
3065 HOST_WIDE_INT adjust;
3066 rtx temp;
3067
3068 adjust = GET_MODE_SIZE (mode);
3069 #ifdef PUSH_ROUNDING
3070 adjust = PUSH_ROUNDING (adjust);
3071 #endif
3072 if (code == PRE_DEC || code == POST_DEC)
3073 adjust = -adjust;
3074 else if (code == PRE_MODIFY || code == POST_MODIFY)
3075 {
3076 rtx expr = XEXP (XEXP (x, 0), 1);
3077 HOST_WIDE_INT val;
3078
3079 gcc_assert (GET_CODE (expr) == PLUS || GET_CODE (expr) == MINUS);
3080 gcc_assert (CONST_INT_P (XEXP (expr, 1)));
3081 val = INTVAL (XEXP (expr, 1));
3082 if (GET_CODE (expr) == MINUS)
3083 val = -val;
3084 gcc_assert (adjust == val || adjust == -val);
3085 adjust = val;
3086 }
3087
3088 /* Do not use anti_adjust_stack, since we don't want to update
3089 stack_pointer_delta. */
3090 temp = expand_simple_binop (Pmode, PLUS, stack_pointer_rtx,
3091 GEN_INT (adjust), stack_pointer_rtx,
3092 0, OPTAB_LIB_WIDEN);
3093 if (temp != stack_pointer_rtx)
3094 emit_move_insn (stack_pointer_rtx, temp);
3095
3096 switch (code)
3097 {
3098 case PRE_INC:
3099 case PRE_DEC:
3100 case PRE_MODIFY:
3101 temp = stack_pointer_rtx;
3102 break;
3103 case POST_INC:
3104 case POST_DEC:
3105 case POST_MODIFY:
3106 temp = plus_constant (stack_pointer_rtx, -adjust);
3107 break;
3108 default:
3109 gcc_unreachable ();
3110 }
3111
3112 return replace_equiv_address (x, temp);
3113 }
3114
3115 /* A subroutine of emit_move_complex. Generate a move from Y into X.
3116 X is known to satisfy push_operand, and MODE is known to be complex.
3117 Returns the last instruction emitted. */
3118
3119 rtx
3120 emit_move_complex_push (enum machine_mode mode, rtx x, rtx y)
3121 {
3122 enum machine_mode submode = GET_MODE_INNER (mode);
3123 bool imag_first;
3124
3125 #ifdef PUSH_ROUNDING
3126 unsigned int submodesize = GET_MODE_SIZE (submode);
3127
3128 /* In case we output to the stack, but the size is smaller than the
3129 machine can push exactly, we need to use move instructions. */
3130 if (PUSH_ROUNDING (submodesize) != submodesize)
3131 {
3132 x = emit_move_resolve_push (mode, x);
3133 return emit_move_insn (x, y);
3134 }
3135 #endif
3136
3137 /* Note that the real part always precedes the imag part in memory
3138 regardless of machine's endianness. */
3139 switch (GET_CODE (XEXP (x, 0)))
3140 {
3141 case PRE_DEC:
3142 case POST_DEC:
3143 imag_first = true;
3144 break;
3145 case PRE_INC:
3146 case POST_INC:
3147 imag_first = false;
3148 break;
3149 default:
3150 gcc_unreachable ();
3151 }
3152
3153 emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)),
3154 read_complex_part (y, imag_first));
3155 return emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)),
3156 read_complex_part (y, !imag_first));
3157 }
3158
3159 /* A subroutine of emit_move_complex. Perform the move from Y to X
3160 via two moves of the parts. Returns the last instruction emitted. */
3161
3162 rtx
3163 emit_move_complex_parts (rtx x, rtx y)
3164 {
3165 /* Show the output dies here. This is necessary for SUBREGs
3166 of pseudos since we cannot track their lifetimes correctly;
3167 hard regs shouldn't appear here except as return values. */
3168 if (!reload_completed && !reload_in_progress
3169 && REG_P (x) && !reg_overlap_mentioned_p (x, y))
3170 emit_clobber (x);
3171
3172 write_complex_part (x, read_complex_part (y, false), false);
3173 write_complex_part (x, read_complex_part (y, true), true);
3174
3175 return get_last_insn ();
3176 }
3177
3178 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3179 MODE is known to be complex. Returns the last instruction emitted. */
3180
3181 static rtx
3182 emit_move_complex (enum machine_mode mode, rtx x, rtx y)
3183 {
3184 bool try_int;
3185
3186 /* Need to take special care for pushes, to maintain proper ordering
3187 of the data, and possibly extra padding. */
3188 if (push_operand (x, mode))
3189 return emit_move_complex_push (mode, x, y);
3190
3191 /* See if we can coerce the target into moving both values at once. */
3192
3193 /* Move floating point as parts. */
3194 if (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
3195 && optab_handler (mov_optab, GET_MODE_INNER (mode)) != CODE_FOR_nothing)
3196 try_int = false;
3197 /* Not possible if the values are inherently not adjacent. */
3198 else if (GET_CODE (x) == CONCAT || GET_CODE (y) == CONCAT)
3199 try_int = false;
3200 /* Is possible if both are registers (or subregs of registers). */
3201 else if (register_operand (x, mode) && register_operand (y, mode))
3202 try_int = true;
3203 /* If one of the operands is a memory, and alignment constraints
3204 are friendly enough, we may be able to do combined memory operations.
3205 We do not attempt this if Y is a constant because that combination is
3206 usually better with the by-parts thing below. */
3207 else if ((MEM_P (x) ? !CONSTANT_P (y) : MEM_P (y))
3208 && (!STRICT_ALIGNMENT
3209 || get_mode_alignment (mode) == BIGGEST_ALIGNMENT))
3210 try_int = true;
3211 else
3212 try_int = false;
3213
3214 if (try_int)
3215 {
3216 rtx ret;
3217
3218 /* For memory to memory moves, optimal behavior can be had with the
3219 existing block move logic. */
3220 if (MEM_P (x) && MEM_P (y))
3221 {
3222 emit_block_move (x, y, GEN_INT (GET_MODE_SIZE (mode)),
3223 BLOCK_OP_NO_LIBCALL);
3224 return get_last_insn ();
3225 }
3226
3227 ret = emit_move_via_integer (mode, x, y, true);
3228 if (ret)
3229 return ret;
3230 }
3231
3232 return emit_move_complex_parts (x, y);
3233 }
3234
3235 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3236 MODE is known to be MODE_CC. Returns the last instruction emitted. */
3237
3238 static rtx
3239 emit_move_ccmode (enum machine_mode mode, rtx x, rtx y)
3240 {
3241 rtx ret;
3242
3243 /* Assume all MODE_CC modes are equivalent; if we have movcc, use it. */
3244 if (mode != CCmode)
3245 {
3246 enum insn_code code = optab_handler (mov_optab, CCmode);
3247 if (code != CODE_FOR_nothing)
3248 {
3249 x = emit_move_change_mode (CCmode, mode, x, true);
3250 y = emit_move_change_mode (CCmode, mode, y, true);
3251 return emit_insn (GEN_FCN (code) (x, y));
3252 }
3253 }
3254
3255 /* Otherwise, find the MODE_INT mode of the same width. */
3256 ret = emit_move_via_integer (mode, x, y, false);
3257 gcc_assert (ret != NULL);
3258 return ret;
3259 }
3260
3261 /* Return true if word I of OP lies entirely in the
3262 undefined bits of a paradoxical subreg. */
3263
3264 static bool
3265 undefined_operand_subword_p (const_rtx op, int i)
3266 {
3267 enum machine_mode innermode, innermostmode;
3268 int offset;
3269 if (GET_CODE (op) != SUBREG)
3270 return false;
3271 innermode = GET_MODE (op);
3272 innermostmode = GET_MODE (SUBREG_REG (op));
3273 offset = i * UNITS_PER_WORD + SUBREG_BYTE (op);
3274 /* The SUBREG_BYTE represents offset, as if the value were stored in
3275 memory, except for a paradoxical subreg where we define
3276 SUBREG_BYTE to be 0; undo this exception as in
3277 simplify_subreg. */
3278 if (SUBREG_BYTE (op) == 0
3279 && GET_MODE_SIZE (innermostmode) < GET_MODE_SIZE (innermode))
3280 {
3281 int difference = (GET_MODE_SIZE (innermostmode) - GET_MODE_SIZE (innermode));
3282 if (WORDS_BIG_ENDIAN)
3283 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
3284 if (BYTES_BIG_ENDIAN)
3285 offset += difference % UNITS_PER_WORD;
3286 }
3287 if (offset >= GET_MODE_SIZE (innermostmode)
3288 || offset <= -GET_MODE_SIZE (word_mode))
3289 return true;
3290 return false;
3291 }
3292
3293 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3294 MODE is any multi-word or full-word mode that lacks a move_insn
3295 pattern. Note that you will get better code if you define such
3296 patterns, even if they must turn into multiple assembler instructions. */
3297
3298 static rtx
3299 emit_move_multi_word (enum machine_mode mode, rtx x, rtx y)
3300 {
3301 rtx last_insn = 0;
3302 rtx seq, inner;
3303 bool need_clobber;
3304 int i;
3305
3306 gcc_assert (GET_MODE_SIZE (mode) >= UNITS_PER_WORD);
3307
3308 /* If X is a push on the stack, do the push now and replace
3309 X with a reference to the stack pointer. */
3310 if (push_operand (x, mode))
3311 x = emit_move_resolve_push (mode, x);
3312
3313 /* If we are in reload, see if either operand is a MEM whose address
3314 is scheduled for replacement. */
3315 if (reload_in_progress && MEM_P (x)
3316 && (inner = find_replacement (&XEXP (x, 0))) != XEXP (x, 0))
3317 x = replace_equiv_address_nv (x, inner);
3318 if (reload_in_progress && MEM_P (y)
3319 && (inner = find_replacement (&XEXP (y, 0))) != XEXP (y, 0))
3320 y = replace_equiv_address_nv (y, inner);
3321
3322 start_sequence ();
3323
3324 need_clobber = false;
3325 for (i = 0;
3326 i < (GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD;
3327 i++)
3328 {
3329 rtx xpart = operand_subword (x, i, 1, mode);
3330 rtx ypart;
3331
3332 /* Do not generate code for a move if it would come entirely
3333 from the undefined bits of a paradoxical subreg. */
3334 if (undefined_operand_subword_p (y, i))
3335 continue;
3336
3337 ypart = operand_subword (y, i, 1, mode);
3338
3339 /* If we can't get a part of Y, put Y into memory if it is a
3340 constant. Otherwise, force it into a register. Then we must
3341 be able to get a part of Y. */
3342 if (ypart == 0 && CONSTANT_P (y))
3343 {
3344 y = use_anchored_address (force_const_mem (mode, y));
3345 ypart = operand_subword (y, i, 1, mode);
3346 }
3347 else if (ypart == 0)
3348 ypart = operand_subword_force (y, i, mode);
3349
3350 gcc_assert (xpart && ypart);
3351
3352 need_clobber |= (GET_CODE (xpart) == SUBREG);
3353
3354 last_insn = emit_move_insn (xpart, ypart);
3355 }
3356
3357 seq = get_insns ();
3358 end_sequence ();
3359
3360 /* Show the output dies here. This is necessary for SUBREGs
3361 of pseudos since we cannot track their lifetimes correctly;
3362 hard regs shouldn't appear here except as return values.
3363 We never want to emit such a clobber after reload. */
3364 if (x != y
3365 && ! (reload_in_progress || reload_completed)
3366 && need_clobber != 0)
3367 emit_clobber (x);
3368
3369 emit_insn (seq);
3370
3371 return last_insn;
3372 }
3373
3374 /* Low level part of emit_move_insn.
3375 Called just like emit_move_insn, but assumes X and Y
3376 are basically valid. */
3377
3378 rtx
3379 emit_move_insn_1 (rtx x, rtx y)
3380 {
3381 enum machine_mode mode = GET_MODE (x);
3382 enum insn_code code;
3383
3384 gcc_assert ((unsigned int) mode < (unsigned int) MAX_MACHINE_MODE);
3385
3386 code = optab_handler (mov_optab, mode);
3387 if (code != CODE_FOR_nothing)
3388 return emit_insn (GEN_FCN (code) (x, y));
3389
3390 /* Expand complex moves by moving real part and imag part. */
3391 if (COMPLEX_MODE_P (mode))
3392 return emit_move_complex (mode, x, y);
3393
3394 if (GET_MODE_CLASS (mode) == MODE_DECIMAL_FLOAT
3395 || ALL_FIXED_POINT_MODE_P (mode))
3396 {
3397 rtx result = emit_move_via_integer (mode, x, y, true);
3398
3399 /* If we can't find an integer mode, use multi words. */
3400 if (result)
3401 return result;
3402 else
3403 return emit_move_multi_word (mode, x, y);
3404 }
3405
3406 if (GET_MODE_CLASS (mode) == MODE_CC)
3407 return emit_move_ccmode (mode, x, y);
3408
3409 /* Try using a move pattern for the corresponding integer mode. This is
3410 only safe when simplify_subreg can convert MODE constants into integer
3411 constants. At present, it can only do this reliably if the value
3412 fits within a HOST_WIDE_INT. */
3413 if (!CONSTANT_P (y) || GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
3414 {
3415 rtx ret = emit_move_via_integer (mode, x, y, false);
3416 if (ret)
3417 return ret;
3418 }
3419
3420 return emit_move_multi_word (mode, x, y);
3421 }
3422
3423 /* Generate code to copy Y into X.
3424 Both Y and X must have the same mode, except that
3425 Y can be a constant with VOIDmode.
3426 This mode cannot be BLKmode; use emit_block_move for that.
3427
3428 Return the last instruction emitted. */
3429
3430 rtx
3431 emit_move_insn (rtx x, rtx y)
3432 {
3433 enum machine_mode mode = GET_MODE (x);
3434 rtx y_cst = NULL_RTX;
3435 rtx last_insn, set;
3436
3437 gcc_assert (mode != BLKmode
3438 && (GET_MODE (y) == mode || GET_MODE (y) == VOIDmode));
3439
3440 if (CONSTANT_P (y))
3441 {
3442 if (optimize
3443 && SCALAR_FLOAT_MODE_P (GET_MODE (x))
3444 && (last_insn = compress_float_constant (x, y)))
3445 return last_insn;
3446
3447 y_cst = y;
3448
3449 if (!targetm.legitimate_constant_p (mode, y))
3450 {
3451 y = force_const_mem (mode, y);
3452
3453 /* If the target's cannot_force_const_mem prevented the spill,
3454 assume that the target's move expanders will also take care
3455 of the non-legitimate constant. */
3456 if (!y)
3457 y = y_cst;
3458 else
3459 y = use_anchored_address (y);
3460 }
3461 }
3462
3463 /* If X or Y are memory references, verify that their addresses are valid
3464 for the machine. */
3465 if (MEM_P (x)
3466 && (! memory_address_addr_space_p (GET_MODE (x), XEXP (x, 0),
3467 MEM_ADDR_SPACE (x))
3468 && ! push_operand (x, GET_MODE (x))))
3469 x = validize_mem (x);
3470
3471 if (MEM_P (y)
3472 && ! memory_address_addr_space_p (GET_MODE (y), XEXP (y, 0),
3473 MEM_ADDR_SPACE (y)))
3474 y = validize_mem (y);
3475
3476 gcc_assert (mode != BLKmode);
3477
3478 last_insn = emit_move_insn_1 (x, y);
3479
3480 if (y_cst && REG_P (x)
3481 && (set = single_set (last_insn)) != NULL_RTX
3482 && SET_DEST (set) == x
3483 && ! rtx_equal_p (y_cst, SET_SRC (set)))
3484 set_unique_reg_note (last_insn, REG_EQUAL, copy_rtx (y_cst));
3485
3486 return last_insn;
3487 }
3488
3489 /* If Y is representable exactly in a narrower mode, and the target can
3490 perform the extension directly from constant or memory, then emit the
3491 move as an extension. */
3492
3493 static rtx
3494 compress_float_constant (rtx x, rtx y)
3495 {
3496 enum machine_mode dstmode = GET_MODE (x);
3497 enum machine_mode orig_srcmode = GET_MODE (y);
3498 enum machine_mode srcmode;
3499 REAL_VALUE_TYPE r;
3500 int oldcost, newcost;
3501 bool speed = optimize_insn_for_speed_p ();
3502
3503 REAL_VALUE_FROM_CONST_DOUBLE (r, y);
3504
3505 if (targetm.legitimate_constant_p (dstmode, y))
3506 oldcost = set_src_cost (y, speed);
3507 else
3508 oldcost = set_src_cost (force_const_mem (dstmode, y), speed);
3509
3510 for (srcmode = GET_CLASS_NARROWEST_MODE (GET_MODE_CLASS (orig_srcmode));
3511 srcmode != orig_srcmode;
3512 srcmode = GET_MODE_WIDER_MODE (srcmode))
3513 {
3514 enum insn_code ic;
3515 rtx trunc_y, last_insn;
3516
3517 /* Skip if the target can't extend this way. */
3518 ic = can_extend_p (dstmode, srcmode, 0);
3519 if (ic == CODE_FOR_nothing)
3520 continue;
3521
3522 /* Skip if the narrowed value isn't exact. */
3523 if (! exact_real_truncate (srcmode, &r))
3524 continue;
3525
3526 trunc_y = CONST_DOUBLE_FROM_REAL_VALUE (r, srcmode);
3527
3528 if (targetm.legitimate_constant_p (srcmode, trunc_y))
3529 {
3530 /* Skip if the target needs extra instructions to perform
3531 the extension. */
3532 if (!insn_operand_matches (ic, 1, trunc_y))
3533 continue;
3534 /* This is valid, but may not be cheaper than the original. */
3535 newcost = set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y),
3536 speed);
3537 if (oldcost < newcost)
3538 continue;
3539 }
3540 else if (float_extend_from_mem[dstmode][srcmode])
3541 {
3542 trunc_y = force_const_mem (srcmode, trunc_y);
3543 /* This is valid, but may not be cheaper than the original. */
3544 newcost = set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y),
3545 speed);
3546 if (oldcost < newcost)
3547 continue;
3548 trunc_y = validize_mem (trunc_y);
3549 }
3550 else
3551 continue;
3552
3553 /* For CSE's benefit, force the compressed constant pool entry
3554 into a new pseudo. This constant may be used in different modes,
3555 and if not, combine will put things back together for us. */
3556 trunc_y = force_reg (srcmode, trunc_y);
3557 emit_unop_insn (ic, x, trunc_y, UNKNOWN);
3558 last_insn = get_last_insn ();
3559
3560 if (REG_P (x))
3561 set_unique_reg_note (last_insn, REG_EQUAL, y);
3562
3563 return last_insn;
3564 }
3565
3566 return NULL_RTX;
3567 }
3568 \f
3569 /* Pushing data onto the stack. */
3570
3571 /* Push a block of length SIZE (perhaps variable)
3572 and return an rtx to address the beginning of the block.
3573 The value may be virtual_outgoing_args_rtx.
3574
3575 EXTRA is the number of bytes of padding to push in addition to SIZE.
3576 BELOW nonzero means this padding comes at low addresses;
3577 otherwise, the padding comes at high addresses. */
3578
3579 rtx
3580 push_block (rtx size, int extra, int below)
3581 {
3582 rtx temp;
3583
3584 size = convert_modes (Pmode, ptr_mode, size, 1);
3585 if (CONSTANT_P (size))
3586 anti_adjust_stack (plus_constant (size, extra));
3587 else if (REG_P (size) && extra == 0)
3588 anti_adjust_stack (size);
3589 else
3590 {
3591 temp = copy_to_mode_reg (Pmode, size);
3592 if (extra != 0)
3593 temp = expand_binop (Pmode, add_optab, temp, GEN_INT (extra),
3594 temp, 0, OPTAB_LIB_WIDEN);
3595 anti_adjust_stack (temp);
3596 }
3597
3598 #ifndef STACK_GROWS_DOWNWARD
3599 if (0)
3600 #else
3601 if (1)
3602 #endif
3603 {
3604 temp = virtual_outgoing_args_rtx;
3605 if (extra != 0 && below)
3606 temp = plus_constant (temp, extra);
3607 }
3608 else
3609 {
3610 if (CONST_INT_P (size))
3611 temp = plus_constant (virtual_outgoing_args_rtx,
3612 -INTVAL (size) - (below ? 0 : extra));
3613 else if (extra != 0 && !below)
3614 temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx,
3615 negate_rtx (Pmode, plus_constant (size, extra)));
3616 else
3617 temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx,
3618 negate_rtx (Pmode, size));
3619 }
3620
3621 return memory_address (GET_CLASS_NARROWEST_MODE (MODE_INT), temp);
3622 }
3623
3624 /* A utility routine that returns the base of an auto-inc memory, or NULL. */
3625
3626 static rtx
3627 mem_autoinc_base (rtx mem)
3628 {
3629 if (MEM_P (mem))
3630 {
3631 rtx addr = XEXP (mem, 0);
3632 if (GET_RTX_CLASS (GET_CODE (addr)) == RTX_AUTOINC)
3633 return XEXP (addr, 0);
3634 }
3635 return NULL;
3636 }
3637
3638 /* A utility routine used here, in reload, and in try_split. The insns
3639 after PREV up to and including LAST are known to adjust the stack,
3640 with a final value of END_ARGS_SIZE. Iterate backward from LAST
3641 placing notes as appropriate. PREV may be NULL, indicating the
3642 entire insn sequence prior to LAST should be scanned.
3643
3644 The set of allowed stack pointer modifications is small:
3645 (1) One or more auto-inc style memory references (aka pushes),
3646 (2) One or more addition/subtraction with the SP as destination,
3647 (3) A single move insn with the SP as destination,
3648 (4) A call_pop insn.
3649
3650 Insns in the sequence that do not modify the SP are ignored.
3651
3652 The return value is the amount of adjustment that can be trivially
3653 verified, via immediate operand or auto-inc. If the adjustment
3654 cannot be trivially extracted, the return value is INT_MIN. */
3655
3656 HOST_WIDE_INT
3657 find_args_size_adjust (rtx insn)
3658 {
3659 rtx dest, set, pat;
3660 int i;
3661
3662 pat = PATTERN (insn);
3663 set = NULL;
3664
3665 /* Look for a call_pop pattern. */
3666 if (CALL_P (insn))
3667 {
3668 /* We have to allow non-call_pop patterns for the case
3669 of emit_single_push_insn of a TLS address. */
3670 if (GET_CODE (pat) != PARALLEL)
3671 return 0;
3672
3673 /* All call_pop have a stack pointer adjust in the parallel.
3674 The call itself is always first, and the stack adjust is
3675 usually last, so search from the end. */
3676 for (i = XVECLEN (pat, 0) - 1; i > 0; --i)
3677 {
3678 set = XVECEXP (pat, 0, i);
3679 if (GET_CODE (set) != SET)
3680 continue;
3681 dest = SET_DEST (set);
3682 if (dest == stack_pointer_rtx)
3683 break;
3684 }
3685 /* We'd better have found the stack pointer adjust. */
3686 if (i == 0)
3687 return 0;
3688 /* Fall through to process the extracted SET and DEST
3689 as if it was a standalone insn. */
3690 }
3691 else if (GET_CODE (pat) == SET)
3692 set = pat;
3693 else if ((set = single_set (insn)) != NULL)
3694 ;
3695 else if (GET_CODE (pat) == PARALLEL)
3696 {
3697 /* ??? Some older ports use a parallel with a stack adjust
3698 and a store for a PUSH_ROUNDING pattern, rather than a
3699 PRE/POST_MODIFY rtx. Don't force them to update yet... */
3700 /* ??? See h8300 and m68k, pushqi1. */
3701 for (i = XVECLEN (pat, 0) - 1; i >= 0; --i)
3702 {
3703 set = XVECEXP (pat, 0, i);
3704 if (GET_CODE (set) != SET)
3705 continue;
3706 dest = SET_DEST (set);
3707 if (dest == stack_pointer_rtx)
3708 break;
3709
3710 /* We do not expect an auto-inc of the sp in the parallel. */
3711 gcc_checking_assert (mem_autoinc_base (dest) != stack_pointer_rtx);
3712 gcc_checking_assert (mem_autoinc_base (SET_SRC (set))
3713 != stack_pointer_rtx);
3714 }
3715 if (i < 0)
3716 return 0;
3717 }
3718 else
3719 return 0;
3720
3721 dest = SET_DEST (set);
3722
3723 /* Look for direct modifications of the stack pointer. */
3724 if (REG_P (dest) && REGNO (dest) == STACK_POINTER_REGNUM)
3725 {
3726 /* Look for a trivial adjustment, otherwise assume nothing. */
3727 /* Note that the SPU restore_stack_block pattern refers to
3728 the stack pointer in V4SImode. Consider that non-trivial. */
3729 if (SCALAR_INT_MODE_P (GET_MODE (dest))
3730 && GET_CODE (SET_SRC (set)) == PLUS
3731 && XEXP (SET_SRC (set), 0) == stack_pointer_rtx
3732 && CONST_INT_P (XEXP (SET_SRC (set), 1)))
3733 return INTVAL (XEXP (SET_SRC (set), 1));
3734 /* ??? Reload can generate no-op moves, which will be cleaned
3735 up later. Recognize it and continue searching. */
3736 else if (rtx_equal_p (dest, SET_SRC (set)))
3737 return 0;
3738 else
3739 return HOST_WIDE_INT_MIN;
3740 }
3741 else
3742 {
3743 rtx mem, addr;
3744
3745 /* Otherwise only think about autoinc patterns. */
3746 if (mem_autoinc_base (dest) == stack_pointer_rtx)
3747 {
3748 mem = dest;
3749 gcc_checking_assert (mem_autoinc_base (SET_SRC (set))
3750 != stack_pointer_rtx);
3751 }
3752 else if (mem_autoinc_base (SET_SRC (set)) == stack_pointer_rtx)
3753 mem = SET_SRC (set);
3754 else
3755 return 0;
3756
3757 addr = XEXP (mem, 0);
3758 switch (GET_CODE (addr))
3759 {
3760 case PRE_INC:
3761 case POST_INC:
3762 return GET_MODE_SIZE (GET_MODE (mem));
3763 case PRE_DEC:
3764 case POST_DEC:
3765 return -GET_MODE_SIZE (GET_MODE (mem));
3766 case PRE_MODIFY:
3767 case POST_MODIFY:
3768 addr = XEXP (addr, 1);
3769 gcc_assert (GET_CODE (addr) == PLUS);
3770 gcc_assert (XEXP (addr, 0) == stack_pointer_rtx);
3771 gcc_assert (CONST_INT_P (XEXP (addr, 1)));
3772 return INTVAL (XEXP (addr, 1));
3773 default:
3774 gcc_unreachable ();
3775 }
3776 }
3777 }
3778
3779 int
3780 fixup_args_size_notes (rtx prev, rtx last, int end_args_size)
3781 {
3782 int args_size = end_args_size;
3783 bool saw_unknown = false;
3784 rtx insn;
3785
3786 for (insn = last; insn != prev; insn = PREV_INSN (insn))
3787 {
3788 HOST_WIDE_INT this_delta;
3789
3790 if (!NONDEBUG_INSN_P (insn))
3791 continue;
3792
3793 this_delta = find_args_size_adjust (insn);
3794 if (this_delta == 0)
3795 continue;
3796
3797 gcc_assert (!saw_unknown);
3798 if (this_delta == HOST_WIDE_INT_MIN)
3799 saw_unknown = true;
3800
3801 add_reg_note (insn, REG_ARGS_SIZE, GEN_INT (args_size));
3802 #ifdef STACK_GROWS_DOWNWARD
3803 this_delta = -this_delta;
3804 #endif
3805 args_size -= this_delta;
3806 }
3807
3808 return saw_unknown ? INT_MIN : args_size;
3809 }
3810
3811 #ifdef PUSH_ROUNDING
3812 /* Emit single push insn. */
3813
3814 static void
3815 emit_single_push_insn_1 (enum machine_mode mode, rtx x, tree type)
3816 {
3817 rtx dest_addr;
3818 unsigned rounded_size = PUSH_ROUNDING (GET_MODE_SIZE (mode));
3819 rtx dest;
3820 enum insn_code icode;
3821
3822 stack_pointer_delta += PUSH_ROUNDING (GET_MODE_SIZE (mode));
3823 /* If there is push pattern, use it. Otherwise try old way of throwing
3824 MEM representing push operation to move expander. */
3825 icode = optab_handler (push_optab, mode);
3826 if (icode != CODE_FOR_nothing)
3827 {
3828 struct expand_operand ops[1];
3829
3830 create_input_operand (&ops[0], x, mode);
3831 if (maybe_expand_insn (icode, 1, ops))
3832 return;
3833 }
3834 if (GET_MODE_SIZE (mode) == rounded_size)
3835 dest_addr = gen_rtx_fmt_e (STACK_PUSH_CODE, Pmode, stack_pointer_rtx);
3836 /* If we are to pad downward, adjust the stack pointer first and
3837 then store X into the stack location using an offset. This is
3838 because emit_move_insn does not know how to pad; it does not have
3839 access to type. */
3840 else if (FUNCTION_ARG_PADDING (mode, type) == downward)
3841 {
3842 unsigned padding_size = rounded_size - GET_MODE_SIZE (mode);
3843 HOST_WIDE_INT offset;
3844
3845 emit_move_insn (stack_pointer_rtx,
3846 expand_binop (Pmode,
3847 #ifdef STACK_GROWS_DOWNWARD
3848 sub_optab,
3849 #else
3850 add_optab,
3851 #endif
3852 stack_pointer_rtx,
3853 GEN_INT (rounded_size),
3854 NULL_RTX, 0, OPTAB_LIB_WIDEN));
3855
3856 offset = (HOST_WIDE_INT) padding_size;
3857 #ifdef STACK_GROWS_DOWNWARD
3858 if (STACK_PUSH_CODE == POST_DEC)
3859 /* We have already decremented the stack pointer, so get the
3860 previous value. */
3861 offset += (HOST_WIDE_INT) rounded_size;
3862 #else
3863 if (STACK_PUSH_CODE == POST_INC)
3864 /* We have already incremented the stack pointer, so get the
3865 previous value. */
3866 offset -= (HOST_WIDE_INT) rounded_size;
3867 #endif
3868 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx, GEN_INT (offset));
3869 }
3870 else
3871 {
3872 #ifdef STACK_GROWS_DOWNWARD
3873 /* ??? This seems wrong if STACK_PUSH_CODE == POST_DEC. */
3874 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
3875 GEN_INT (-(HOST_WIDE_INT) rounded_size));
3876 #else
3877 /* ??? This seems wrong if STACK_PUSH_CODE == POST_INC. */
3878 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
3879 GEN_INT (rounded_size));
3880 #endif
3881 dest_addr = gen_rtx_PRE_MODIFY (Pmode, stack_pointer_rtx, dest_addr);
3882 }
3883
3884 dest = gen_rtx_MEM (mode, dest_addr);
3885
3886 if (type != 0)
3887 {
3888 set_mem_attributes (dest, type, 1);
3889
3890 if (flag_optimize_sibling_calls)
3891 /* Function incoming arguments may overlap with sibling call
3892 outgoing arguments and we cannot allow reordering of reads
3893 from function arguments with stores to outgoing arguments
3894 of sibling calls. */
3895 set_mem_alias_set (dest, 0);
3896 }
3897 emit_move_insn (dest, x);
3898 }
3899
3900 /* Emit and annotate a single push insn. */
3901
3902 static void
3903 emit_single_push_insn (enum machine_mode mode, rtx x, tree type)
3904 {
3905 int delta, old_delta = stack_pointer_delta;
3906 rtx prev = get_last_insn ();
3907 rtx last;
3908
3909 emit_single_push_insn_1 (mode, x, type);
3910
3911 last = get_last_insn ();
3912
3913 /* Notice the common case where we emitted exactly one insn. */
3914 if (PREV_INSN (last) == prev)
3915 {
3916 add_reg_note (last, REG_ARGS_SIZE, GEN_INT (stack_pointer_delta));
3917 return;
3918 }
3919
3920 delta = fixup_args_size_notes (prev, last, stack_pointer_delta);
3921 gcc_assert (delta == INT_MIN || delta == old_delta);
3922 }
3923 #endif
3924
3925 /* Generate code to push X onto the stack, assuming it has mode MODE and
3926 type TYPE.
3927 MODE is redundant except when X is a CONST_INT (since they don't
3928 carry mode info).
3929 SIZE is an rtx for the size of data to be copied (in bytes),
3930 needed only if X is BLKmode.
3931
3932 ALIGN (in bits) is maximum alignment we can assume.
3933
3934 If PARTIAL and REG are both nonzero, then copy that many of the first
3935 bytes of X into registers starting with REG, and push the rest of X.
3936 The amount of space pushed is decreased by PARTIAL bytes.
3937 REG must be a hard register in this case.
3938 If REG is zero but PARTIAL is not, take any all others actions for an
3939 argument partially in registers, but do not actually load any
3940 registers.
3941
3942 EXTRA is the amount in bytes of extra space to leave next to this arg.
3943 This is ignored if an argument block has already been allocated.
3944
3945 On a machine that lacks real push insns, ARGS_ADDR is the address of
3946 the bottom of the argument block for this call. We use indexing off there
3947 to store the arg. On machines with push insns, ARGS_ADDR is 0 when a
3948 argument block has not been preallocated.
3949
3950 ARGS_SO_FAR is the size of args previously pushed for this call.
3951
3952 REG_PARM_STACK_SPACE is nonzero if functions require stack space
3953 for arguments passed in registers. If nonzero, it will be the number
3954 of bytes required. */
3955
3956 void
3957 emit_push_insn (rtx x, enum machine_mode mode, tree type, rtx size,
3958 unsigned int align, int partial, rtx reg, int extra,
3959 rtx args_addr, rtx args_so_far, int reg_parm_stack_space,
3960 rtx alignment_pad)
3961 {
3962 rtx xinner;
3963 enum direction stack_direction
3964 #ifdef STACK_GROWS_DOWNWARD
3965 = downward;
3966 #else
3967 = upward;
3968 #endif
3969
3970 /* Decide where to pad the argument: `downward' for below,
3971 `upward' for above, or `none' for don't pad it.
3972 Default is below for small data on big-endian machines; else above. */
3973 enum direction where_pad = FUNCTION_ARG_PADDING (mode, type);
3974
3975 /* Invert direction if stack is post-decrement.
3976 FIXME: why? */
3977 if (STACK_PUSH_CODE == POST_DEC)
3978 if (where_pad != none)
3979 where_pad = (where_pad == downward ? upward : downward);
3980
3981 xinner = x;
3982
3983 if (mode == BLKmode
3984 || (STRICT_ALIGNMENT && align < GET_MODE_ALIGNMENT (mode)))
3985 {
3986 /* Copy a block into the stack, entirely or partially. */
3987
3988 rtx temp;
3989 int used;
3990 int offset;
3991 int skip;
3992
3993 offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT);
3994 used = partial - offset;
3995
3996 if (mode != BLKmode)
3997 {
3998 /* A value is to be stored in an insufficiently aligned
3999 stack slot; copy via a suitably aligned slot if
4000 necessary. */
4001 size = GEN_INT (GET_MODE_SIZE (mode));
4002 if (!MEM_P (xinner))
4003 {
4004 temp = assign_temp (type, 0, 1, 1);
4005 emit_move_insn (temp, xinner);
4006 xinner = temp;
4007 }
4008 }
4009
4010 gcc_assert (size);
4011
4012 /* USED is now the # of bytes we need not copy to the stack
4013 because registers will take care of them. */
4014
4015 if (partial != 0)
4016 xinner = adjust_address (xinner, BLKmode, used);
4017
4018 /* If the partial register-part of the arg counts in its stack size,
4019 skip the part of stack space corresponding to the registers.
4020 Otherwise, start copying to the beginning of the stack space,
4021 by setting SKIP to 0. */
4022 skip = (reg_parm_stack_space == 0) ? 0 : used;
4023
4024 #ifdef PUSH_ROUNDING
4025 /* Do it with several push insns if that doesn't take lots of insns
4026 and if there is no difficulty with push insns that skip bytes
4027 on the stack for alignment purposes. */
4028 if (args_addr == 0
4029 && PUSH_ARGS
4030 && CONST_INT_P (size)
4031 && skip == 0
4032 && MEM_ALIGN (xinner) >= align
4033 && (MOVE_BY_PIECES_P ((unsigned) INTVAL (size) - used, align))
4034 /* Here we avoid the case of a structure whose weak alignment
4035 forces many pushes of a small amount of data,
4036 and such small pushes do rounding that causes trouble. */
4037 && ((! SLOW_UNALIGNED_ACCESS (word_mode, align))
4038 || align >= BIGGEST_ALIGNMENT
4039 || (PUSH_ROUNDING (align / BITS_PER_UNIT)
4040 == (align / BITS_PER_UNIT)))
4041 && (HOST_WIDE_INT) PUSH_ROUNDING (INTVAL (size)) == INTVAL (size))
4042 {
4043 /* Push padding now if padding above and stack grows down,
4044 or if padding below and stack grows up.
4045 But if space already allocated, this has already been done. */
4046 if (extra && args_addr == 0
4047 && where_pad != none && where_pad != stack_direction)
4048 anti_adjust_stack (GEN_INT (extra));
4049
4050 move_by_pieces (NULL, xinner, INTVAL (size) - used, align, 0);
4051 }
4052 else
4053 #endif /* PUSH_ROUNDING */
4054 {
4055 rtx target;
4056
4057 /* Otherwise make space on the stack and copy the data
4058 to the address of that space. */
4059
4060 /* Deduct words put into registers from the size we must copy. */
4061 if (partial != 0)
4062 {
4063 if (CONST_INT_P (size))
4064 size = GEN_INT (INTVAL (size) - used);
4065 else
4066 size = expand_binop (GET_MODE (size), sub_optab, size,
4067 GEN_INT (used), NULL_RTX, 0,
4068 OPTAB_LIB_WIDEN);
4069 }
4070
4071 /* Get the address of the stack space.
4072 In this case, we do not deal with EXTRA separately.
4073 A single stack adjust will do. */
4074 if (! args_addr)
4075 {
4076 temp = push_block (size, extra, where_pad == downward);
4077 extra = 0;
4078 }
4079 else if (CONST_INT_P (args_so_far))
4080 temp = memory_address (BLKmode,
4081 plus_constant (args_addr,
4082 skip + INTVAL (args_so_far)));
4083 else
4084 temp = memory_address (BLKmode,
4085 plus_constant (gen_rtx_PLUS (Pmode,
4086 args_addr,
4087 args_so_far),
4088 skip));
4089
4090 if (!ACCUMULATE_OUTGOING_ARGS)
4091 {
4092 /* If the source is referenced relative to the stack pointer,
4093 copy it to another register to stabilize it. We do not need
4094 to do this if we know that we won't be changing sp. */
4095
4096 if (reg_mentioned_p (virtual_stack_dynamic_rtx, temp)
4097 || reg_mentioned_p (virtual_outgoing_args_rtx, temp))
4098 temp = copy_to_reg (temp);
4099 }
4100
4101 target = gen_rtx_MEM (BLKmode, temp);
4102
4103 /* We do *not* set_mem_attributes here, because incoming arguments
4104 may overlap with sibling call outgoing arguments and we cannot
4105 allow reordering of reads from function arguments with stores
4106 to outgoing arguments of sibling calls. We do, however, want
4107 to record the alignment of the stack slot. */
4108 /* ALIGN may well be better aligned than TYPE, e.g. due to
4109 PARM_BOUNDARY. Assume the caller isn't lying. */
4110 set_mem_align (target, align);
4111
4112 emit_block_move (target, xinner, size, BLOCK_OP_CALL_PARM);
4113 }
4114 }
4115 else if (partial > 0)
4116 {
4117 /* Scalar partly in registers. */
4118
4119 int size = GET_MODE_SIZE (mode) / UNITS_PER_WORD;
4120 int i;
4121 int not_stack;
4122 /* # bytes of start of argument
4123 that we must make space for but need not store. */
4124 int offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT);
4125 int args_offset = INTVAL (args_so_far);
4126 int skip;
4127
4128 /* Push padding now if padding above and stack grows down,
4129 or if padding below and stack grows up.
4130 But if space already allocated, this has already been done. */
4131 if (extra && args_addr == 0
4132 && where_pad != none && where_pad != stack_direction)
4133 anti_adjust_stack (GEN_INT (extra));
4134
4135 /* If we make space by pushing it, we might as well push
4136 the real data. Otherwise, we can leave OFFSET nonzero
4137 and leave the space uninitialized. */
4138 if (args_addr == 0)
4139 offset = 0;
4140
4141 /* Now NOT_STACK gets the number of words that we don't need to
4142 allocate on the stack. Convert OFFSET to words too. */
4143 not_stack = (partial - offset) / UNITS_PER_WORD;
4144 offset /= UNITS_PER_WORD;
4145
4146 /* If the partial register-part of the arg counts in its stack size,
4147 skip the part of stack space corresponding to the registers.
4148 Otherwise, start copying to the beginning of the stack space,
4149 by setting SKIP to 0. */
4150 skip = (reg_parm_stack_space == 0) ? 0 : not_stack;
4151
4152 if (CONSTANT_P (x) && !targetm.legitimate_constant_p (mode, x))
4153 x = validize_mem (force_const_mem (mode, x));
4154
4155 /* If X is a hard register in a non-integer mode, copy it into a pseudo;
4156 SUBREGs of such registers are not allowed. */
4157 if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER
4158 && GET_MODE_CLASS (GET_MODE (x)) != MODE_INT))
4159 x = copy_to_reg (x);
4160
4161 /* Loop over all the words allocated on the stack for this arg. */
4162 /* We can do it by words, because any scalar bigger than a word
4163 has a size a multiple of a word. */
4164 #ifndef PUSH_ARGS_REVERSED
4165 for (i = not_stack; i < size; i++)
4166 #else
4167 for (i = size - 1; i >= not_stack; i--)
4168 #endif
4169 if (i >= not_stack + offset)
4170 emit_push_insn (operand_subword_force (x, i, mode),
4171 word_mode, NULL_TREE, NULL_RTX, align, 0, NULL_RTX,
4172 0, args_addr,
4173 GEN_INT (args_offset + ((i - not_stack + skip)
4174 * UNITS_PER_WORD)),
4175 reg_parm_stack_space, alignment_pad);
4176 }
4177 else
4178 {
4179 rtx addr;
4180 rtx dest;
4181
4182 /* Push padding now if padding above and stack grows down,
4183 or if padding below and stack grows up.
4184 But if space already allocated, this has already been done. */
4185 if (extra && args_addr == 0
4186 && where_pad != none && where_pad != stack_direction)
4187 anti_adjust_stack (GEN_INT (extra));
4188
4189 #ifdef PUSH_ROUNDING
4190 if (args_addr == 0 && PUSH_ARGS)
4191 emit_single_push_insn (mode, x, type);
4192 else
4193 #endif
4194 {
4195 if (CONST_INT_P (args_so_far))
4196 addr
4197 = memory_address (mode,
4198 plus_constant (args_addr,
4199 INTVAL (args_so_far)));
4200 else
4201 addr = memory_address (mode, gen_rtx_PLUS (Pmode, args_addr,
4202 args_so_far));
4203 dest = gen_rtx_MEM (mode, addr);
4204
4205 /* We do *not* set_mem_attributes here, because incoming arguments
4206 may overlap with sibling call outgoing arguments and we cannot
4207 allow reordering of reads from function arguments with stores
4208 to outgoing arguments of sibling calls. We do, however, want
4209 to record the alignment of the stack slot. */
4210 /* ALIGN may well be better aligned than TYPE, e.g. due to
4211 PARM_BOUNDARY. Assume the caller isn't lying. */
4212 set_mem_align (dest, align);
4213
4214 emit_move_insn (dest, x);
4215 }
4216 }
4217
4218 /* If part should go in registers, copy that part
4219 into the appropriate registers. Do this now, at the end,
4220 since mem-to-mem copies above may do function calls. */
4221 if (partial > 0 && reg != 0)
4222 {
4223 /* Handle calls that pass values in multiple non-contiguous locations.
4224 The Irix 6 ABI has examples of this. */
4225 if (GET_CODE (reg) == PARALLEL)
4226 emit_group_load (reg, x, type, -1);
4227 else
4228 {
4229 gcc_assert (partial % UNITS_PER_WORD == 0);
4230 move_block_to_reg (REGNO (reg), x, partial / UNITS_PER_WORD, mode);
4231 }
4232 }
4233
4234 if (extra && args_addr == 0 && where_pad == stack_direction)
4235 anti_adjust_stack (GEN_INT (extra));
4236
4237 if (alignment_pad && args_addr == 0)
4238 anti_adjust_stack (alignment_pad);
4239 }
4240 \f
4241 /* Return X if X can be used as a subtarget in a sequence of arithmetic
4242 operations. */
4243
4244 static rtx
4245 get_subtarget (rtx x)
4246 {
4247 return (optimize
4248 || x == 0
4249 /* Only registers can be subtargets. */
4250 || !REG_P (x)
4251 /* Don't use hard regs to avoid extending their life. */
4252 || REGNO (x) < FIRST_PSEUDO_REGISTER
4253 ? 0 : x);
4254 }
4255
4256 /* A subroutine of expand_assignment. Optimize FIELD op= VAL, where
4257 FIELD is a bitfield. Returns true if the optimization was successful,
4258 and there's nothing else to do. */
4259
4260 static bool
4261 optimize_bitfield_assignment_op (unsigned HOST_WIDE_INT bitsize,
4262 unsigned HOST_WIDE_INT bitpos,
4263 unsigned HOST_WIDE_INT bitregion_start,
4264 unsigned HOST_WIDE_INT bitregion_end,
4265 enum machine_mode mode1, rtx str_rtx,
4266 tree to, tree src)
4267 {
4268 enum machine_mode str_mode = GET_MODE (str_rtx);
4269 unsigned int str_bitsize = GET_MODE_BITSIZE (str_mode);
4270 tree op0, op1;
4271 rtx value, result;
4272 optab binop;
4273 gimple srcstmt;
4274 enum tree_code code;
4275
4276 if (mode1 != VOIDmode
4277 || bitsize >= BITS_PER_WORD
4278 || str_bitsize > BITS_PER_WORD
4279 || TREE_SIDE_EFFECTS (to)
4280 || TREE_THIS_VOLATILE (to))
4281 return false;
4282
4283 STRIP_NOPS (src);
4284 if (TREE_CODE (src) != SSA_NAME)
4285 return false;
4286 if (TREE_CODE (TREE_TYPE (src)) != INTEGER_TYPE)
4287 return false;
4288
4289 srcstmt = get_gimple_for_ssa_name (src);
4290 if (!srcstmt
4291 || TREE_CODE_CLASS (gimple_assign_rhs_code (srcstmt)) != tcc_binary)
4292 return false;
4293
4294 code = gimple_assign_rhs_code (srcstmt);
4295
4296 op0 = gimple_assign_rhs1 (srcstmt);
4297
4298 /* If OP0 is an SSA_NAME, then we want to walk the use-def chain
4299 to find its initialization. Hopefully the initialization will
4300 be from a bitfield load. */
4301 if (TREE_CODE (op0) == SSA_NAME)
4302 {
4303 gimple op0stmt = get_gimple_for_ssa_name (op0);
4304
4305 /* We want to eventually have OP0 be the same as TO, which
4306 should be a bitfield. */
4307 if (!op0stmt
4308 || !is_gimple_assign (op0stmt)
4309 || gimple_assign_rhs_code (op0stmt) != TREE_CODE (to))
4310 return false;
4311 op0 = gimple_assign_rhs1 (op0stmt);
4312 }
4313
4314 op1 = gimple_assign_rhs2 (srcstmt);
4315
4316 if (!operand_equal_p (to, op0, 0))
4317 return false;
4318
4319 if (MEM_P (str_rtx))
4320 {
4321 unsigned HOST_WIDE_INT offset1;
4322
4323 if (str_bitsize == 0 || str_bitsize > BITS_PER_WORD)
4324 str_mode = word_mode;
4325 str_mode = get_best_mode (bitsize, bitpos,
4326 bitregion_start, bitregion_end,
4327 MEM_ALIGN (str_rtx), str_mode, 0);
4328 if (str_mode == VOIDmode)
4329 return false;
4330 str_bitsize = GET_MODE_BITSIZE (str_mode);
4331
4332 offset1 = bitpos;
4333 bitpos %= str_bitsize;
4334 offset1 = (offset1 - bitpos) / BITS_PER_UNIT;
4335 str_rtx = adjust_address (str_rtx, str_mode, offset1);
4336 }
4337 else if (!REG_P (str_rtx) && GET_CODE (str_rtx) != SUBREG)
4338 return false;
4339
4340 /* If the bit field covers the whole REG/MEM, store_field
4341 will likely generate better code. */
4342 if (bitsize >= str_bitsize)
4343 return false;
4344
4345 /* We can't handle fields split across multiple entities. */
4346 if (bitpos + bitsize > str_bitsize)
4347 return false;
4348
4349 if (BYTES_BIG_ENDIAN)
4350 bitpos = str_bitsize - bitpos - bitsize;
4351
4352 switch (code)
4353 {
4354 case PLUS_EXPR:
4355 case MINUS_EXPR:
4356 /* For now, just optimize the case of the topmost bitfield
4357 where we don't need to do any masking and also
4358 1 bit bitfields where xor can be used.
4359 We might win by one instruction for the other bitfields
4360 too if insv/extv instructions aren't used, so that
4361 can be added later. */
4362 if (bitpos + bitsize != str_bitsize
4363 && (bitsize != 1 || TREE_CODE (op1) != INTEGER_CST))
4364 break;
4365
4366 value = expand_expr (op1, NULL_RTX, str_mode, EXPAND_NORMAL);
4367 value = convert_modes (str_mode,
4368 TYPE_MODE (TREE_TYPE (op1)), value,
4369 TYPE_UNSIGNED (TREE_TYPE (op1)));
4370
4371 /* We may be accessing data outside the field, which means
4372 we can alias adjacent data. */
4373 if (MEM_P (str_rtx))
4374 {
4375 str_rtx = shallow_copy_rtx (str_rtx);
4376 set_mem_alias_set (str_rtx, 0);
4377 set_mem_expr (str_rtx, 0);
4378 }
4379
4380 binop = code == PLUS_EXPR ? add_optab : sub_optab;
4381 if (bitsize == 1 && bitpos + bitsize != str_bitsize)
4382 {
4383 value = expand_and (str_mode, value, const1_rtx, NULL);
4384 binop = xor_optab;
4385 }
4386 value = expand_shift (LSHIFT_EXPR, str_mode, value,
4387 bitpos, NULL_RTX, 1);
4388 result = expand_binop (str_mode, binop, str_rtx,
4389 value, str_rtx, 1, OPTAB_WIDEN);
4390 if (result != str_rtx)
4391 emit_move_insn (str_rtx, result);
4392 return true;
4393
4394 case BIT_IOR_EXPR:
4395 case BIT_XOR_EXPR:
4396 if (TREE_CODE (op1) != INTEGER_CST)
4397 break;
4398 value = expand_expr (op1, NULL_RTX, GET_MODE (str_rtx), EXPAND_NORMAL);
4399 value = convert_modes (GET_MODE (str_rtx),
4400 TYPE_MODE (TREE_TYPE (op1)), value,
4401 TYPE_UNSIGNED (TREE_TYPE (op1)));
4402
4403 /* We may be accessing data outside the field, which means
4404 we can alias adjacent data. */
4405 if (MEM_P (str_rtx))
4406 {
4407 str_rtx = shallow_copy_rtx (str_rtx);
4408 set_mem_alias_set (str_rtx, 0);
4409 set_mem_expr (str_rtx, 0);
4410 }
4411
4412 binop = code == BIT_IOR_EXPR ? ior_optab : xor_optab;
4413 if (bitpos + bitsize != GET_MODE_BITSIZE (GET_MODE (str_rtx)))
4414 {
4415 rtx mask = GEN_INT (((unsigned HOST_WIDE_INT) 1 << bitsize)
4416 - 1);
4417 value = expand_and (GET_MODE (str_rtx), value, mask,
4418 NULL_RTX);
4419 }
4420 value = expand_shift (LSHIFT_EXPR, GET_MODE (str_rtx), value,
4421 bitpos, NULL_RTX, 1);
4422 result = expand_binop (GET_MODE (str_rtx), binop, str_rtx,
4423 value, str_rtx, 1, OPTAB_WIDEN);
4424 if (result != str_rtx)
4425 emit_move_insn (str_rtx, result);
4426 return true;
4427
4428 default:
4429 break;
4430 }
4431
4432 return false;
4433 }
4434
4435 /* In the C++ memory model, consecutive bit fields in a structure are
4436 considered one memory location.
4437
4438 Given a COMPONENT_REF, this function returns the bit range of
4439 consecutive bits in which this COMPONENT_REF belongs in. The
4440 values are returned in *BITSTART and *BITEND. If either the C++
4441 memory model is not activated, or this memory access is not thread
4442 visible, 0 is returned in *BITSTART and *BITEND.
4443
4444 EXP is the COMPONENT_REF.
4445 INNERDECL is the actual object being referenced.
4446 BITPOS is the position in bits where the bit starts within the structure.
4447 BITSIZE is size in bits of the field being referenced in EXP.
4448
4449 For example, while storing into FOO.A here...
4450
4451 struct {
4452 BIT 0:
4453 unsigned int a : 4;
4454 unsigned int b : 1;
4455 BIT 8:
4456 unsigned char c;
4457 unsigned int d : 6;
4458 } foo;
4459
4460 ...we are not allowed to store past <b>, so for the layout above, a
4461 range of 0..7 (because no one cares if we store into the
4462 padding). */
4463
4464 static void
4465 get_bit_range (unsigned HOST_WIDE_INT *bitstart,
4466 unsigned HOST_WIDE_INT *bitend,
4467 tree exp, tree innerdecl,
4468 HOST_WIDE_INT bitpos, HOST_WIDE_INT bitsize)
4469 {
4470 tree field, record_type, fld;
4471 bool found_field = false;
4472 bool prev_field_is_bitfield;
4473
4474 gcc_assert (TREE_CODE (exp) == COMPONENT_REF);
4475
4476 /* If other threads can't see this value, no need to restrict stores. */
4477 if (ALLOW_STORE_DATA_RACES
4478 || ((TREE_CODE (innerdecl) == MEM_REF
4479 || TREE_CODE (innerdecl) == TARGET_MEM_REF)
4480 && !ptr_deref_may_alias_global_p (TREE_OPERAND (innerdecl, 0)))
4481 || (DECL_P (innerdecl)
4482 && ((TREE_CODE (innerdecl) == VAR_DECL
4483 && DECL_THREAD_LOCAL_P (innerdecl))
4484 || !TREE_STATIC (innerdecl))))
4485 {
4486 *bitstart = *bitend = 0;
4487 return;
4488 }
4489
4490 /* Bit field we're storing into. */
4491 field = TREE_OPERAND (exp, 1);
4492 record_type = DECL_FIELD_CONTEXT (field);
4493
4494 /* Count the contiguous bitfields for the memory location that
4495 contains FIELD. */
4496 *bitstart = 0;
4497 prev_field_is_bitfield = true;
4498 for (fld = TYPE_FIELDS (record_type); fld; fld = DECL_CHAIN (fld))
4499 {
4500 tree t, offset;
4501 enum machine_mode mode;
4502 int unsignedp, volatilep;
4503
4504 if (TREE_CODE (fld) != FIELD_DECL)
4505 continue;
4506
4507 t = build3 (COMPONENT_REF, TREE_TYPE (exp),
4508 unshare_expr (TREE_OPERAND (exp, 0)),
4509 fld, NULL_TREE);
4510 get_inner_reference (t, &bitsize, &bitpos, &offset,
4511 &mode, &unsignedp, &volatilep, true);
4512
4513 if (field == fld)
4514 found_field = true;
4515
4516 if (DECL_BIT_FIELD_TYPE (fld) && bitsize > 0)
4517 {
4518 if (prev_field_is_bitfield == false)
4519 {
4520 *bitstart = bitpos;
4521 prev_field_is_bitfield = true;
4522 }
4523 }
4524 else
4525 {
4526 prev_field_is_bitfield = false;
4527 if (found_field)
4528 break;
4529 }
4530 }
4531 gcc_assert (found_field);
4532
4533 if (fld)
4534 {
4535 /* We found the end of the bit field sequence. Include the
4536 padding up to the next field and be done. */
4537 *bitend = bitpos - 1;
4538 }
4539 else
4540 {
4541 /* If this is the last element in the structure, include the padding
4542 at the end of structure. */
4543 *bitend = TREE_INT_CST_LOW (TYPE_SIZE (record_type)) - 1;
4544 }
4545 }
4546
4547 /* Expand an assignment that stores the value of FROM into TO. If NONTEMPORAL
4548 is true, try generating a nontemporal store. */
4549
4550 void
4551 expand_assignment (tree to, tree from, bool nontemporal)
4552 {
4553 rtx to_rtx = 0;
4554 rtx result;
4555 enum machine_mode mode;
4556 unsigned int align;
4557 enum insn_code icode;
4558
4559 /* Don't crash if the lhs of the assignment was erroneous. */
4560 if (TREE_CODE (to) == ERROR_MARK)
4561 {
4562 expand_normal (from);
4563 return;
4564 }
4565
4566 /* Optimize away no-op moves without side-effects. */
4567 if (operand_equal_p (to, from, 0))
4568 return;
4569
4570 mode = TYPE_MODE (TREE_TYPE (to));
4571 if ((TREE_CODE (to) == MEM_REF
4572 || TREE_CODE (to) == TARGET_MEM_REF)
4573 && mode != BLKmode
4574 && ((align = get_object_or_type_alignment (to))
4575 < GET_MODE_ALIGNMENT (mode))
4576 && ((icode = optab_handler (movmisalign_optab, mode))
4577 != CODE_FOR_nothing))
4578 {
4579 struct expand_operand ops[2];
4580 enum machine_mode address_mode;
4581 rtx reg, op0, mem;
4582
4583 reg = expand_expr (from, NULL_RTX, VOIDmode, EXPAND_NORMAL);
4584 reg = force_not_mem (reg);
4585
4586 if (TREE_CODE (to) == MEM_REF)
4587 {
4588 addr_space_t as
4589 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (to, 1))));
4590 tree base = TREE_OPERAND (to, 0);
4591 address_mode = targetm.addr_space.address_mode (as);
4592 op0 = expand_expr (base, NULL_RTX, VOIDmode, EXPAND_NORMAL);
4593 op0 = convert_memory_address_addr_space (address_mode, op0, as);
4594 if (!integer_zerop (TREE_OPERAND (to, 1)))
4595 {
4596 rtx off
4597 = immed_double_int_const (mem_ref_offset (to), address_mode);
4598 op0 = simplify_gen_binary (PLUS, address_mode, op0, off);
4599 }
4600 op0 = memory_address_addr_space (mode, op0, as);
4601 mem = gen_rtx_MEM (mode, op0);
4602 set_mem_attributes (mem, to, 0);
4603 set_mem_addr_space (mem, as);
4604 }
4605 else if (TREE_CODE (to) == TARGET_MEM_REF)
4606 {
4607 addr_space_t as = TYPE_ADDR_SPACE (TREE_TYPE (to));
4608 struct mem_address addr;
4609
4610 get_address_description (to, &addr);
4611 op0 = addr_for_mem_ref (&addr, as, true);
4612 op0 = memory_address_addr_space (mode, op0, as);
4613 mem = gen_rtx_MEM (mode, op0);
4614 set_mem_attributes (mem, to, 0);
4615 set_mem_addr_space (mem, as);
4616 }
4617 else
4618 gcc_unreachable ();
4619 if (TREE_THIS_VOLATILE (to))
4620 MEM_VOLATILE_P (mem) = 1;
4621
4622 create_fixed_operand (&ops[0], mem);
4623 create_input_operand (&ops[1], reg, mode);
4624 /* The movmisalign<mode> pattern cannot fail, else the assignment would
4625 silently be omitted. */
4626 expand_insn (icode, 2, ops);
4627 return;
4628 }
4629
4630 /* Assignment of a structure component needs special treatment
4631 if the structure component's rtx is not simply a MEM.
4632 Assignment of an array element at a constant index, and assignment of
4633 an array element in an unaligned packed structure field, has the same
4634 problem. */
4635 if (handled_component_p (to)
4636 /* ??? We only need to handle MEM_REF here if the access is not
4637 a full access of the base object. */
4638 || (TREE_CODE (to) == MEM_REF
4639 && TREE_CODE (TREE_OPERAND (to, 0)) == ADDR_EXPR)
4640 || TREE_CODE (TREE_TYPE (to)) == ARRAY_TYPE)
4641 {
4642 enum machine_mode mode1;
4643 HOST_WIDE_INT bitsize, bitpos;
4644 unsigned HOST_WIDE_INT bitregion_start = 0;
4645 unsigned HOST_WIDE_INT bitregion_end = 0;
4646 tree offset;
4647 int unsignedp;
4648 int volatilep = 0;
4649 tree tem;
4650
4651 push_temp_slots ();
4652 tem = get_inner_reference (to, &bitsize, &bitpos, &offset, &mode1,
4653 &unsignedp, &volatilep, true);
4654
4655 if (TREE_CODE (to) == COMPONENT_REF
4656 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (to, 1)))
4657 get_bit_range (&bitregion_start, &bitregion_end,
4658 to, tem, bitpos, bitsize);
4659
4660 /* If we are going to use store_bit_field and extract_bit_field,
4661 make sure to_rtx will be safe for multiple use. */
4662
4663 to_rtx = expand_normal (tem);
4664
4665 /* If the bitfield is volatile, we want to access it in the
4666 field's mode, not the computed mode.
4667 If a MEM has VOIDmode (external with incomplete type),
4668 use BLKmode for it instead. */
4669 if (MEM_P (to_rtx))
4670 {
4671 if (volatilep && flag_strict_volatile_bitfields > 0)
4672 to_rtx = adjust_address (to_rtx, mode1, 0);
4673 else if (GET_MODE (to_rtx) == VOIDmode)
4674 to_rtx = adjust_address (to_rtx, BLKmode, 0);
4675 }
4676
4677 if (offset != 0)
4678 {
4679 enum machine_mode address_mode;
4680 rtx offset_rtx;
4681
4682 if (!MEM_P (to_rtx))
4683 {
4684 /* We can get constant negative offsets into arrays with broken
4685 user code. Translate this to a trap instead of ICEing. */
4686 gcc_assert (TREE_CODE (offset) == INTEGER_CST);
4687 expand_builtin_trap ();
4688 to_rtx = gen_rtx_MEM (BLKmode, const0_rtx);
4689 }
4690
4691 offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode, EXPAND_SUM);
4692 address_mode
4693 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (to_rtx));
4694 if (GET_MODE (offset_rtx) != address_mode)
4695 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
4696
4697 /* A constant address in TO_RTX can have VOIDmode, we must not try
4698 to call force_reg for that case. Avoid that case. */
4699 if (MEM_P (to_rtx)
4700 && GET_MODE (to_rtx) == BLKmode
4701 && GET_MODE (XEXP (to_rtx, 0)) != VOIDmode
4702 && bitsize > 0
4703 && (bitpos % bitsize) == 0
4704 && (bitsize % GET_MODE_ALIGNMENT (mode1)) == 0
4705 && MEM_ALIGN (to_rtx) == GET_MODE_ALIGNMENT (mode1))
4706 {
4707 to_rtx = adjust_address (to_rtx, mode1, bitpos / BITS_PER_UNIT);
4708 bitpos = 0;
4709 }
4710
4711 to_rtx = offset_address (to_rtx, offset_rtx,
4712 highest_pow2_factor_for_target (to,
4713 offset));
4714 }
4715
4716 /* No action is needed if the target is not a memory and the field
4717 lies completely outside that target. This can occur if the source
4718 code contains an out-of-bounds access to a small array. */
4719 if (!MEM_P (to_rtx)
4720 && GET_MODE (to_rtx) != BLKmode
4721 && (unsigned HOST_WIDE_INT) bitpos
4722 >= GET_MODE_PRECISION (GET_MODE (to_rtx)))
4723 {
4724 expand_normal (from);
4725 result = NULL;
4726 }
4727 /* Handle expand_expr of a complex value returning a CONCAT. */
4728 else if (GET_CODE (to_rtx) == CONCAT)
4729 {
4730 unsigned short mode_bitsize = GET_MODE_BITSIZE (GET_MODE (to_rtx));
4731 if (COMPLEX_MODE_P (TYPE_MODE (TREE_TYPE (from)))
4732 && bitpos == 0
4733 && bitsize == mode_bitsize)
4734 result = store_expr (from, to_rtx, false, nontemporal);
4735 else if (bitsize == mode_bitsize / 2
4736 && (bitpos == 0 || bitpos == mode_bitsize / 2))
4737 result = store_expr (from, XEXP (to_rtx, bitpos != 0), false,
4738 nontemporal);
4739 else if (bitpos + bitsize <= mode_bitsize / 2)
4740 result = store_field (XEXP (to_rtx, 0), bitsize, bitpos,
4741 bitregion_start, bitregion_end,
4742 mode1, from, TREE_TYPE (tem),
4743 get_alias_set (to), nontemporal);
4744 else if (bitpos >= mode_bitsize / 2)
4745 result = store_field (XEXP (to_rtx, 1), bitsize,
4746 bitpos - mode_bitsize / 2,
4747 bitregion_start, bitregion_end,
4748 mode1, from,
4749 TREE_TYPE (tem), get_alias_set (to),
4750 nontemporal);
4751 else if (bitpos == 0 && bitsize == mode_bitsize)
4752 {
4753 rtx from_rtx;
4754 result = expand_normal (from);
4755 from_rtx = simplify_gen_subreg (GET_MODE (to_rtx), result,
4756 TYPE_MODE (TREE_TYPE (from)), 0);
4757 emit_move_insn (XEXP (to_rtx, 0),
4758 read_complex_part (from_rtx, false));
4759 emit_move_insn (XEXP (to_rtx, 1),
4760 read_complex_part (from_rtx, true));
4761 }
4762 else
4763 {
4764 rtx temp = assign_stack_temp (GET_MODE (to_rtx),
4765 GET_MODE_SIZE (GET_MODE (to_rtx)),
4766 0);
4767 write_complex_part (temp, XEXP (to_rtx, 0), false);
4768 write_complex_part (temp, XEXP (to_rtx, 1), true);
4769 result = store_field (temp, bitsize, bitpos,
4770 bitregion_start, bitregion_end,
4771 mode1, from,
4772 TREE_TYPE (tem), get_alias_set (to),
4773 nontemporal);
4774 emit_move_insn (XEXP (to_rtx, 0), read_complex_part (temp, false));
4775 emit_move_insn (XEXP (to_rtx, 1), read_complex_part (temp, true));
4776 }
4777 }
4778 else
4779 {
4780 if (MEM_P (to_rtx))
4781 {
4782 /* If the field is at offset zero, we could have been given the
4783 DECL_RTX of the parent struct. Don't munge it. */
4784 to_rtx = shallow_copy_rtx (to_rtx);
4785
4786 set_mem_attributes_minus_bitpos (to_rtx, to, 0, bitpos);
4787
4788 /* Deal with volatile and readonly fields. The former is only
4789 done for MEM. Also set MEM_KEEP_ALIAS_SET_P if needed. */
4790 if (volatilep)
4791 MEM_VOLATILE_P (to_rtx) = 1;
4792 if (component_uses_parent_alias_set (to))
4793 MEM_KEEP_ALIAS_SET_P (to_rtx) = 1;
4794 }
4795
4796 if (optimize_bitfield_assignment_op (bitsize, bitpos,
4797 bitregion_start, bitregion_end,
4798 mode1,
4799 to_rtx, to, from))
4800 result = NULL;
4801 else
4802 result = store_field (to_rtx, bitsize, bitpos,
4803 bitregion_start, bitregion_end,
4804 mode1, from,
4805 TREE_TYPE (tem), get_alias_set (to),
4806 nontemporal);
4807 }
4808
4809 if (result)
4810 preserve_temp_slots (result);
4811 free_temp_slots ();
4812 pop_temp_slots ();
4813 return;
4814 }
4815
4816 /* If the rhs is a function call and its value is not an aggregate,
4817 call the function before we start to compute the lhs.
4818 This is needed for correct code for cases such as
4819 val = setjmp (buf) on machines where reference to val
4820 requires loading up part of an address in a separate insn.
4821
4822 Don't do this if TO is a VAR_DECL or PARM_DECL whose DECL_RTL is REG
4823 since it might be a promoted variable where the zero- or sign- extension
4824 needs to be done. Handling this in the normal way is safe because no
4825 computation is done before the call. The same is true for SSA names. */
4826 if (TREE_CODE (from) == CALL_EXPR && ! aggregate_value_p (from, from)
4827 && COMPLETE_TYPE_P (TREE_TYPE (from))
4828 && TREE_CODE (TYPE_SIZE (TREE_TYPE (from))) == INTEGER_CST
4829 && ! (((TREE_CODE (to) == VAR_DECL
4830 || TREE_CODE (to) == PARM_DECL
4831 || TREE_CODE (to) == RESULT_DECL)
4832 && REG_P (DECL_RTL (to)))
4833 || TREE_CODE (to) == SSA_NAME))
4834 {
4835 rtx value;
4836
4837 push_temp_slots ();
4838 value = expand_normal (from);
4839 if (to_rtx == 0)
4840 to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
4841
4842 /* Handle calls that return values in multiple non-contiguous locations.
4843 The Irix 6 ABI has examples of this. */
4844 if (GET_CODE (to_rtx) == PARALLEL)
4845 emit_group_load (to_rtx, value, TREE_TYPE (from),
4846 int_size_in_bytes (TREE_TYPE (from)));
4847 else if (GET_MODE (to_rtx) == BLKmode)
4848 emit_block_move (to_rtx, value, expr_size (from), BLOCK_OP_NORMAL);
4849 else
4850 {
4851 if (POINTER_TYPE_P (TREE_TYPE (to)))
4852 value = convert_memory_address_addr_space
4853 (GET_MODE (to_rtx), value,
4854 TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (to))));
4855
4856 emit_move_insn (to_rtx, value);
4857 }
4858 preserve_temp_slots (to_rtx);
4859 free_temp_slots ();
4860 pop_temp_slots ();
4861 return;
4862 }
4863
4864 /* Ordinary treatment. Expand TO to get a REG or MEM rtx.
4865 Don't re-expand if it was expanded already (in COMPONENT_REF case). */
4866
4867 if (to_rtx == 0)
4868 to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
4869
4870 /* Don't move directly into a return register. */
4871 if (TREE_CODE (to) == RESULT_DECL
4872 && (REG_P (to_rtx) || GET_CODE (to_rtx) == PARALLEL))
4873 {
4874 rtx temp;
4875
4876 push_temp_slots ();
4877 if (REG_P (to_rtx) && TYPE_MODE (TREE_TYPE (from)) == BLKmode)
4878 temp = copy_blkmode_to_reg (GET_MODE (to_rtx), from);
4879 else
4880 temp = expand_expr (from, NULL_RTX, GET_MODE (to_rtx), EXPAND_NORMAL);
4881
4882 if (GET_CODE (to_rtx) == PARALLEL)
4883 emit_group_load (to_rtx, temp, TREE_TYPE (from),
4884 int_size_in_bytes (TREE_TYPE (from)));
4885 else if (temp)
4886 emit_move_insn (to_rtx, temp);
4887
4888 preserve_temp_slots (to_rtx);
4889 free_temp_slots ();
4890 pop_temp_slots ();
4891 return;
4892 }
4893
4894 /* In case we are returning the contents of an object which overlaps
4895 the place the value is being stored, use a safe function when copying
4896 a value through a pointer into a structure value return block. */
4897 if (TREE_CODE (to) == RESULT_DECL
4898 && TREE_CODE (from) == INDIRECT_REF
4899 && ADDR_SPACE_GENERIC_P
4900 (TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (from, 0)))))
4901 && refs_may_alias_p (to, from)
4902 && cfun->returns_struct
4903 && !cfun->returns_pcc_struct)
4904 {
4905 rtx from_rtx, size;
4906
4907 push_temp_slots ();
4908 size = expr_size (from);
4909 from_rtx = expand_normal (from);
4910
4911 emit_library_call (memmove_libfunc, LCT_NORMAL,
4912 VOIDmode, 3, XEXP (to_rtx, 0), Pmode,
4913 XEXP (from_rtx, 0), Pmode,
4914 convert_to_mode (TYPE_MODE (sizetype),
4915 size, TYPE_UNSIGNED (sizetype)),
4916 TYPE_MODE (sizetype));
4917
4918 preserve_temp_slots (to_rtx);
4919 free_temp_slots ();
4920 pop_temp_slots ();
4921 return;
4922 }
4923
4924 /* Compute FROM and store the value in the rtx we got. */
4925
4926 push_temp_slots ();
4927 result = store_expr (from, to_rtx, 0, nontemporal);
4928 preserve_temp_slots (result);
4929 free_temp_slots ();
4930 pop_temp_slots ();
4931 return;
4932 }
4933
4934 /* Emits nontemporal store insn that moves FROM to TO. Returns true if this
4935 succeeded, false otherwise. */
4936
4937 bool
4938 emit_storent_insn (rtx to, rtx from)
4939 {
4940 struct expand_operand ops[2];
4941 enum machine_mode mode = GET_MODE (to);
4942 enum insn_code code = optab_handler (storent_optab, mode);
4943
4944 if (code == CODE_FOR_nothing)
4945 return false;
4946
4947 create_fixed_operand (&ops[0], to);
4948 create_input_operand (&ops[1], from, mode);
4949 return maybe_expand_insn (code, 2, ops);
4950 }
4951
4952 /* Generate code for computing expression EXP,
4953 and storing the value into TARGET.
4954
4955 If the mode is BLKmode then we may return TARGET itself.
4956 It turns out that in BLKmode it doesn't cause a problem.
4957 because C has no operators that could combine two different
4958 assignments into the same BLKmode object with different values
4959 with no sequence point. Will other languages need this to
4960 be more thorough?
4961
4962 If CALL_PARAM_P is nonzero, this is a store into a call param on the
4963 stack, and block moves may need to be treated specially.
4964
4965 If NONTEMPORAL is true, try using a nontemporal store instruction. */
4966
4967 rtx
4968 store_expr (tree exp, rtx target, int call_param_p, bool nontemporal)
4969 {
4970 rtx temp;
4971 rtx alt_rtl = NULL_RTX;
4972 location_t loc = EXPR_LOCATION (exp);
4973
4974 if (VOID_TYPE_P (TREE_TYPE (exp)))
4975 {
4976 /* C++ can generate ?: expressions with a throw expression in one
4977 branch and an rvalue in the other. Here, we resolve attempts to
4978 store the throw expression's nonexistent result. */
4979 gcc_assert (!call_param_p);
4980 expand_expr (exp, const0_rtx, VOIDmode, EXPAND_NORMAL);
4981 return NULL_RTX;
4982 }
4983 if (TREE_CODE (exp) == COMPOUND_EXPR)
4984 {
4985 /* Perform first part of compound expression, then assign from second
4986 part. */
4987 expand_expr (TREE_OPERAND (exp, 0), const0_rtx, VOIDmode,
4988 call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL);
4989 return store_expr (TREE_OPERAND (exp, 1), target, call_param_p,
4990 nontemporal);
4991 }
4992 else if (TREE_CODE (exp) == COND_EXPR && GET_MODE (target) == BLKmode)
4993 {
4994 /* For conditional expression, get safe form of the target. Then
4995 test the condition, doing the appropriate assignment on either
4996 side. This avoids the creation of unnecessary temporaries.
4997 For non-BLKmode, it is more efficient not to do this. */
4998
4999 rtx lab1 = gen_label_rtx (), lab2 = gen_label_rtx ();
5000
5001 do_pending_stack_adjust ();
5002 NO_DEFER_POP;
5003 jumpifnot (TREE_OPERAND (exp, 0), lab1, -1);
5004 store_expr (TREE_OPERAND (exp, 1), target, call_param_p,
5005 nontemporal);
5006 emit_jump_insn (gen_jump (lab2));
5007 emit_barrier ();
5008 emit_label (lab1);
5009 store_expr (TREE_OPERAND (exp, 2), target, call_param_p,
5010 nontemporal);
5011 emit_label (lab2);
5012 OK_DEFER_POP;
5013
5014 return NULL_RTX;
5015 }
5016 else if (GET_CODE (target) == SUBREG && SUBREG_PROMOTED_VAR_P (target))
5017 /* If this is a scalar in a register that is stored in a wider mode
5018 than the declared mode, compute the result into its declared mode
5019 and then convert to the wider mode. Our value is the computed
5020 expression. */
5021 {
5022 rtx inner_target = 0;
5023
5024 /* We can do the conversion inside EXP, which will often result
5025 in some optimizations. Do the conversion in two steps: first
5026 change the signedness, if needed, then the extend. But don't
5027 do this if the type of EXP is a subtype of something else
5028 since then the conversion might involve more than just
5029 converting modes. */
5030 if (INTEGRAL_TYPE_P (TREE_TYPE (exp))
5031 && TREE_TYPE (TREE_TYPE (exp)) == 0
5032 && GET_MODE_PRECISION (GET_MODE (target))
5033 == TYPE_PRECISION (TREE_TYPE (exp)))
5034 {
5035 if (TYPE_UNSIGNED (TREE_TYPE (exp))
5036 != SUBREG_PROMOTED_UNSIGNED_P (target))
5037 {
5038 /* Some types, e.g. Fortran's logical*4, won't have a signed
5039 version, so use the mode instead. */
5040 tree ntype
5041 = (signed_or_unsigned_type_for
5042 (SUBREG_PROMOTED_UNSIGNED_P (target), TREE_TYPE (exp)));
5043 if (ntype == NULL)
5044 ntype = lang_hooks.types.type_for_mode
5045 (TYPE_MODE (TREE_TYPE (exp)),
5046 SUBREG_PROMOTED_UNSIGNED_P (target));
5047
5048 exp = fold_convert_loc (loc, ntype, exp);
5049 }
5050
5051 exp = fold_convert_loc (loc, lang_hooks.types.type_for_mode
5052 (GET_MODE (SUBREG_REG (target)),
5053 SUBREG_PROMOTED_UNSIGNED_P (target)),
5054 exp);
5055
5056 inner_target = SUBREG_REG (target);
5057 }
5058
5059 temp = expand_expr (exp, inner_target, VOIDmode,
5060 call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL);
5061
5062 /* If TEMP is a VOIDmode constant, use convert_modes to make
5063 sure that we properly convert it. */
5064 if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode)
5065 {
5066 temp = convert_modes (GET_MODE (target), TYPE_MODE (TREE_TYPE (exp)),
5067 temp, SUBREG_PROMOTED_UNSIGNED_P (target));
5068 temp = convert_modes (GET_MODE (SUBREG_REG (target)),
5069 GET_MODE (target), temp,
5070 SUBREG_PROMOTED_UNSIGNED_P (target));
5071 }
5072
5073 convert_move (SUBREG_REG (target), temp,
5074 SUBREG_PROMOTED_UNSIGNED_P (target));
5075
5076 return NULL_RTX;
5077 }
5078 else if ((TREE_CODE (exp) == STRING_CST
5079 || (TREE_CODE (exp) == MEM_REF
5080 && TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR
5081 && TREE_CODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0))
5082 == STRING_CST
5083 && integer_zerop (TREE_OPERAND (exp, 1))))
5084 && !nontemporal && !call_param_p
5085 && MEM_P (target))
5086 {
5087 /* Optimize initialization of an array with a STRING_CST. */
5088 HOST_WIDE_INT exp_len, str_copy_len;
5089 rtx dest_mem;
5090 tree str = TREE_CODE (exp) == STRING_CST
5091 ? exp : TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
5092
5093 exp_len = int_expr_size (exp);
5094 if (exp_len <= 0)
5095 goto normal_expr;
5096
5097 if (TREE_STRING_LENGTH (str) <= 0)
5098 goto normal_expr;
5099
5100 str_copy_len = strlen (TREE_STRING_POINTER (str));
5101 if (str_copy_len < TREE_STRING_LENGTH (str) - 1)
5102 goto normal_expr;
5103
5104 str_copy_len = TREE_STRING_LENGTH (str);
5105 if ((STORE_MAX_PIECES & (STORE_MAX_PIECES - 1)) == 0
5106 && TREE_STRING_POINTER (str)[TREE_STRING_LENGTH (str) - 1] == '\0')
5107 {
5108 str_copy_len += STORE_MAX_PIECES - 1;
5109 str_copy_len &= ~(STORE_MAX_PIECES - 1);
5110 }
5111 str_copy_len = MIN (str_copy_len, exp_len);
5112 if (!can_store_by_pieces (str_copy_len, builtin_strncpy_read_str,
5113 CONST_CAST (char *, TREE_STRING_POINTER (str)),
5114 MEM_ALIGN (target), false))
5115 goto normal_expr;
5116
5117 dest_mem = target;
5118
5119 dest_mem = store_by_pieces (dest_mem,
5120 str_copy_len, builtin_strncpy_read_str,
5121 CONST_CAST (char *,
5122 TREE_STRING_POINTER (str)),
5123 MEM_ALIGN (target), false,
5124 exp_len > str_copy_len ? 1 : 0);
5125 if (exp_len > str_copy_len)
5126 clear_storage (adjust_address (dest_mem, BLKmode, 0),
5127 GEN_INT (exp_len - str_copy_len),
5128 BLOCK_OP_NORMAL);
5129 return NULL_RTX;
5130 }
5131 else
5132 {
5133 rtx tmp_target;
5134
5135 normal_expr:
5136 /* If we want to use a nontemporal store, force the value to
5137 register first. */
5138 tmp_target = nontemporal ? NULL_RTX : target;
5139 temp = expand_expr_real (exp, tmp_target, GET_MODE (target),
5140 (call_param_p
5141 ? EXPAND_STACK_PARM : EXPAND_NORMAL),
5142 &alt_rtl);
5143 }
5144
5145 /* If TEMP is a VOIDmode constant and the mode of the type of EXP is not
5146 the same as that of TARGET, adjust the constant. This is needed, for
5147 example, in case it is a CONST_DOUBLE and we want only a word-sized
5148 value. */
5149 if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode
5150 && TREE_CODE (exp) != ERROR_MARK
5151 && GET_MODE (target) != TYPE_MODE (TREE_TYPE (exp)))
5152 temp = convert_modes (GET_MODE (target), TYPE_MODE (TREE_TYPE (exp)),
5153 temp, TYPE_UNSIGNED (TREE_TYPE (exp)));
5154
5155 /* If value was not generated in the target, store it there.
5156 Convert the value to TARGET's type first if necessary and emit the
5157 pending incrementations that have been queued when expanding EXP.
5158 Note that we cannot emit the whole queue blindly because this will
5159 effectively disable the POST_INC optimization later.
5160
5161 If TEMP and TARGET compare equal according to rtx_equal_p, but
5162 one or both of them are volatile memory refs, we have to distinguish
5163 two cases:
5164 - expand_expr has used TARGET. In this case, we must not generate
5165 another copy. This can be detected by TARGET being equal according
5166 to == .
5167 - expand_expr has not used TARGET - that means that the source just
5168 happens to have the same RTX form. Since temp will have been created
5169 by expand_expr, it will compare unequal according to == .
5170 We must generate a copy in this case, to reach the correct number
5171 of volatile memory references. */
5172
5173 if ((! rtx_equal_p (temp, target)
5174 || (temp != target && (side_effects_p (temp)
5175 || side_effects_p (target))))
5176 && TREE_CODE (exp) != ERROR_MARK
5177 /* If store_expr stores a DECL whose DECL_RTL(exp) == TARGET,
5178 but TARGET is not valid memory reference, TEMP will differ
5179 from TARGET although it is really the same location. */
5180 && !(alt_rtl
5181 && rtx_equal_p (alt_rtl, target)
5182 && !side_effects_p (alt_rtl)
5183 && !side_effects_p (target))
5184 /* If there's nothing to copy, don't bother. Don't call
5185 expr_size unless necessary, because some front-ends (C++)
5186 expr_size-hook must not be given objects that are not
5187 supposed to be bit-copied or bit-initialized. */
5188 && expr_size (exp) != const0_rtx)
5189 {
5190 if (GET_MODE (temp) != GET_MODE (target)
5191 && GET_MODE (temp) != VOIDmode)
5192 {
5193 int unsignedp = TYPE_UNSIGNED (TREE_TYPE (exp));
5194 if (GET_MODE (target) == BLKmode
5195 && GET_MODE (temp) == BLKmode)
5196 emit_block_move (target, temp, expr_size (exp),
5197 (call_param_p
5198 ? BLOCK_OP_CALL_PARM
5199 : BLOCK_OP_NORMAL));
5200 else if (GET_MODE (target) == BLKmode)
5201 store_bit_field (target, INTVAL (expr_size (exp)) * BITS_PER_UNIT,
5202 0, 0, 0, GET_MODE (temp), temp);
5203 else
5204 convert_move (target, temp, unsignedp);
5205 }
5206
5207 else if (GET_MODE (temp) == BLKmode && TREE_CODE (exp) == STRING_CST)
5208 {
5209 /* Handle copying a string constant into an array. The string
5210 constant may be shorter than the array. So copy just the string's
5211 actual length, and clear the rest. First get the size of the data
5212 type of the string, which is actually the size of the target. */
5213 rtx size = expr_size (exp);
5214
5215 if (CONST_INT_P (size)
5216 && INTVAL (size) < TREE_STRING_LENGTH (exp))
5217 emit_block_move (target, temp, size,
5218 (call_param_p
5219 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5220 else
5221 {
5222 enum machine_mode pointer_mode
5223 = targetm.addr_space.pointer_mode (MEM_ADDR_SPACE (target));
5224 enum machine_mode address_mode
5225 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (target));
5226
5227 /* Compute the size of the data to copy from the string. */
5228 tree copy_size
5229 = size_binop_loc (loc, MIN_EXPR,
5230 make_tree (sizetype, size),
5231 size_int (TREE_STRING_LENGTH (exp)));
5232 rtx copy_size_rtx
5233 = expand_expr (copy_size, NULL_RTX, VOIDmode,
5234 (call_param_p
5235 ? EXPAND_STACK_PARM : EXPAND_NORMAL));
5236 rtx label = 0;
5237
5238 /* Copy that much. */
5239 copy_size_rtx = convert_to_mode (pointer_mode, copy_size_rtx,
5240 TYPE_UNSIGNED (sizetype));
5241 emit_block_move (target, temp, copy_size_rtx,
5242 (call_param_p
5243 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5244
5245 /* Figure out how much is left in TARGET that we have to clear.
5246 Do all calculations in pointer_mode. */
5247 if (CONST_INT_P (copy_size_rtx))
5248 {
5249 size = plus_constant (size, -INTVAL (copy_size_rtx));
5250 target = adjust_address (target, BLKmode,
5251 INTVAL (copy_size_rtx));
5252 }
5253 else
5254 {
5255 size = expand_binop (TYPE_MODE (sizetype), sub_optab, size,
5256 copy_size_rtx, NULL_RTX, 0,
5257 OPTAB_LIB_WIDEN);
5258
5259 if (GET_MODE (copy_size_rtx) != address_mode)
5260 copy_size_rtx = convert_to_mode (address_mode,
5261 copy_size_rtx,
5262 TYPE_UNSIGNED (sizetype));
5263
5264 target = offset_address (target, copy_size_rtx,
5265 highest_pow2_factor (copy_size));
5266 label = gen_label_rtx ();
5267 emit_cmp_and_jump_insns (size, const0_rtx, LT, NULL_RTX,
5268 GET_MODE (size), 0, label);
5269 }
5270
5271 if (size != const0_rtx)
5272 clear_storage (target, size, BLOCK_OP_NORMAL);
5273
5274 if (label)
5275 emit_label (label);
5276 }
5277 }
5278 /* Handle calls that return values in multiple non-contiguous locations.
5279 The Irix 6 ABI has examples of this. */
5280 else if (GET_CODE (target) == PARALLEL)
5281 emit_group_load (target, temp, TREE_TYPE (exp),
5282 int_size_in_bytes (TREE_TYPE (exp)));
5283 else if (GET_MODE (temp) == BLKmode)
5284 emit_block_move (target, temp, expr_size (exp),
5285 (call_param_p
5286 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5287 else if (nontemporal
5288 && emit_storent_insn (target, temp))
5289 /* If we managed to emit a nontemporal store, there is nothing else to
5290 do. */
5291 ;
5292 else
5293 {
5294 temp = force_operand (temp, target);
5295 if (temp != target)
5296 emit_move_insn (target, temp);
5297 }
5298 }
5299
5300 return NULL_RTX;
5301 }
5302 \f
5303 /* Return true if field F of structure TYPE is a flexible array. */
5304
5305 static bool
5306 flexible_array_member_p (const_tree f, const_tree type)
5307 {
5308 const_tree tf;
5309
5310 tf = TREE_TYPE (f);
5311 return (DECL_CHAIN (f) == NULL
5312 && TREE_CODE (tf) == ARRAY_TYPE
5313 && TYPE_DOMAIN (tf)
5314 && TYPE_MIN_VALUE (TYPE_DOMAIN (tf))
5315 && integer_zerop (TYPE_MIN_VALUE (TYPE_DOMAIN (tf)))
5316 && !TYPE_MAX_VALUE (TYPE_DOMAIN (tf))
5317 && int_size_in_bytes (type) >= 0);
5318 }
5319
5320 /* If FOR_CTOR_P, return the number of top-level elements that a constructor
5321 must have in order for it to completely initialize a value of type TYPE.
5322 Return -1 if the number isn't known.
5323
5324 If !FOR_CTOR_P, return an estimate of the number of scalars in TYPE. */
5325
5326 static HOST_WIDE_INT
5327 count_type_elements (const_tree type, bool for_ctor_p)
5328 {
5329 switch (TREE_CODE (type))
5330 {
5331 case ARRAY_TYPE:
5332 {
5333 tree nelts;
5334
5335 nelts = array_type_nelts (type);
5336 if (nelts && host_integerp (nelts, 1))
5337 {
5338 unsigned HOST_WIDE_INT n;
5339
5340 n = tree_low_cst (nelts, 1) + 1;
5341 if (n == 0 || for_ctor_p)
5342 return n;
5343 else
5344 return n * count_type_elements (TREE_TYPE (type), false);
5345 }
5346 return for_ctor_p ? -1 : 1;
5347 }
5348
5349 case RECORD_TYPE:
5350 {
5351 unsigned HOST_WIDE_INT n;
5352 tree f;
5353
5354 n = 0;
5355 for (f = TYPE_FIELDS (type); f ; f = DECL_CHAIN (f))
5356 if (TREE_CODE (f) == FIELD_DECL)
5357 {
5358 if (!for_ctor_p)
5359 n += count_type_elements (TREE_TYPE (f), false);
5360 else if (!flexible_array_member_p (f, type))
5361 /* Don't count flexible arrays, which are not supposed
5362 to be initialized. */
5363 n += 1;
5364 }
5365
5366 return n;
5367 }
5368
5369 case UNION_TYPE:
5370 case QUAL_UNION_TYPE:
5371 {
5372 tree f;
5373 HOST_WIDE_INT n, m;
5374
5375 gcc_assert (!for_ctor_p);
5376 /* Estimate the number of scalars in each field and pick the
5377 maximum. Other estimates would do instead; the idea is simply
5378 to make sure that the estimate is not sensitive to the ordering
5379 of the fields. */
5380 n = 1;
5381 for (f = TYPE_FIELDS (type); f ; f = DECL_CHAIN (f))
5382 if (TREE_CODE (f) == FIELD_DECL)
5383 {
5384 m = count_type_elements (TREE_TYPE (f), false);
5385 /* If the field doesn't span the whole union, add an extra
5386 scalar for the rest. */
5387 if (simple_cst_equal (TYPE_SIZE (TREE_TYPE (f)),
5388 TYPE_SIZE (type)) != 1)
5389 m++;
5390 if (n < m)
5391 n = m;
5392 }
5393 return n;
5394 }
5395
5396 case COMPLEX_TYPE:
5397 return 2;
5398
5399 case VECTOR_TYPE:
5400 return TYPE_VECTOR_SUBPARTS (type);
5401
5402 case INTEGER_TYPE:
5403 case REAL_TYPE:
5404 case FIXED_POINT_TYPE:
5405 case ENUMERAL_TYPE:
5406 case BOOLEAN_TYPE:
5407 case POINTER_TYPE:
5408 case OFFSET_TYPE:
5409 case REFERENCE_TYPE:
5410 case NULLPTR_TYPE:
5411 return 1;
5412
5413 case ERROR_MARK:
5414 return 0;
5415
5416 case VOID_TYPE:
5417 case METHOD_TYPE:
5418 case FUNCTION_TYPE:
5419 case LANG_TYPE:
5420 default:
5421 gcc_unreachable ();
5422 }
5423 }
5424
5425 /* Helper for categorize_ctor_elements. Identical interface. */
5426
5427 static bool
5428 categorize_ctor_elements_1 (const_tree ctor, HOST_WIDE_INT *p_nz_elts,
5429 HOST_WIDE_INT *p_init_elts, bool *p_complete)
5430 {
5431 unsigned HOST_WIDE_INT idx;
5432 HOST_WIDE_INT nz_elts, init_elts, num_fields;
5433 tree value, purpose, elt_type;
5434
5435 /* Whether CTOR is a valid constant initializer, in accordance with what
5436 initializer_constant_valid_p does. If inferred from the constructor
5437 elements, true until proven otherwise. */
5438 bool const_from_elts_p = constructor_static_from_elts_p (ctor);
5439 bool const_p = const_from_elts_p ? true : TREE_STATIC (ctor);
5440
5441 nz_elts = 0;
5442 init_elts = 0;
5443 num_fields = 0;
5444 elt_type = NULL_TREE;
5445
5446 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (ctor), idx, purpose, value)
5447 {
5448 HOST_WIDE_INT mult = 1;
5449
5450 if (TREE_CODE (purpose) == RANGE_EXPR)
5451 {
5452 tree lo_index = TREE_OPERAND (purpose, 0);
5453 tree hi_index = TREE_OPERAND (purpose, 1);
5454
5455 if (host_integerp (lo_index, 1) && host_integerp (hi_index, 1))
5456 mult = (tree_low_cst (hi_index, 1)
5457 - tree_low_cst (lo_index, 1) + 1);
5458 }
5459 num_fields += mult;
5460 elt_type = TREE_TYPE (value);
5461
5462 switch (TREE_CODE (value))
5463 {
5464 case CONSTRUCTOR:
5465 {
5466 HOST_WIDE_INT nz = 0, ic = 0;
5467
5468 bool const_elt_p = categorize_ctor_elements_1 (value, &nz, &ic,
5469 p_complete);
5470
5471 nz_elts += mult * nz;
5472 init_elts += mult * ic;
5473
5474 if (const_from_elts_p && const_p)
5475 const_p = const_elt_p;
5476 }
5477 break;
5478
5479 case INTEGER_CST:
5480 case REAL_CST:
5481 case FIXED_CST:
5482 if (!initializer_zerop (value))
5483 nz_elts += mult;
5484 init_elts += mult;
5485 break;
5486
5487 case STRING_CST:
5488 nz_elts += mult * TREE_STRING_LENGTH (value);
5489 init_elts += mult * TREE_STRING_LENGTH (value);
5490 break;
5491
5492 case COMPLEX_CST:
5493 if (!initializer_zerop (TREE_REALPART (value)))
5494 nz_elts += mult;
5495 if (!initializer_zerop (TREE_IMAGPART (value)))
5496 nz_elts += mult;
5497 init_elts += mult;
5498 break;
5499
5500 case VECTOR_CST:
5501 {
5502 tree v;
5503 for (v = TREE_VECTOR_CST_ELTS (value); v; v = TREE_CHAIN (v))
5504 {
5505 if (!initializer_zerop (TREE_VALUE (v)))
5506 nz_elts += mult;
5507 init_elts += mult;
5508 }
5509 }
5510 break;
5511
5512 default:
5513 {
5514 HOST_WIDE_INT tc = count_type_elements (elt_type, false);
5515 nz_elts += mult * tc;
5516 init_elts += mult * tc;
5517
5518 if (const_from_elts_p && const_p)
5519 const_p = initializer_constant_valid_p (value, elt_type)
5520 != NULL_TREE;
5521 }
5522 break;
5523 }
5524 }
5525
5526 if (*p_complete && !complete_ctor_at_level_p (TREE_TYPE (ctor),
5527 num_fields, elt_type))
5528 *p_complete = false;
5529
5530 *p_nz_elts += nz_elts;
5531 *p_init_elts += init_elts;
5532
5533 return const_p;
5534 }
5535
5536 /* Examine CTOR to discover:
5537 * how many scalar fields are set to nonzero values,
5538 and place it in *P_NZ_ELTS;
5539 * how many scalar fields in total are in CTOR,
5540 and place it in *P_ELT_COUNT.
5541 * whether the constructor is complete -- in the sense that every
5542 meaningful byte is explicitly given a value --
5543 and place it in *P_COMPLETE.
5544
5545 Return whether or not CTOR is a valid static constant initializer, the same
5546 as "initializer_constant_valid_p (CTOR, TREE_TYPE (CTOR)) != 0". */
5547
5548 bool
5549 categorize_ctor_elements (const_tree ctor, HOST_WIDE_INT *p_nz_elts,
5550 HOST_WIDE_INT *p_init_elts, bool *p_complete)
5551 {
5552 *p_nz_elts = 0;
5553 *p_init_elts = 0;
5554 *p_complete = true;
5555
5556 return categorize_ctor_elements_1 (ctor, p_nz_elts, p_init_elts, p_complete);
5557 }
5558
5559 /* TYPE is initialized by a constructor with NUM_ELTS elements, the last
5560 of which had type LAST_TYPE. Each element was itself a complete
5561 initializer, in the sense that every meaningful byte was explicitly
5562 given a value. Return true if the same is true for the constructor
5563 as a whole. */
5564
5565 bool
5566 complete_ctor_at_level_p (const_tree type, HOST_WIDE_INT num_elts,
5567 const_tree last_type)
5568 {
5569 if (TREE_CODE (type) == UNION_TYPE
5570 || TREE_CODE (type) == QUAL_UNION_TYPE)
5571 {
5572 if (num_elts == 0)
5573 return false;
5574
5575 gcc_assert (num_elts == 1 && last_type);
5576
5577 /* ??? We could look at each element of the union, and find the
5578 largest element. Which would avoid comparing the size of the
5579 initialized element against any tail padding in the union.
5580 Doesn't seem worth the effort... */
5581 return simple_cst_equal (TYPE_SIZE (type), TYPE_SIZE (last_type)) == 1;
5582 }
5583
5584 return count_type_elements (type, true) == num_elts;
5585 }
5586
5587 /* Return 1 if EXP contains mostly (3/4) zeros. */
5588
5589 static int
5590 mostly_zeros_p (const_tree exp)
5591 {
5592 if (TREE_CODE (exp) == CONSTRUCTOR)
5593 {
5594 HOST_WIDE_INT nz_elts, init_elts;
5595 bool complete_p;
5596
5597 categorize_ctor_elements (exp, &nz_elts, &init_elts, &complete_p);
5598 return !complete_p || nz_elts < init_elts / 4;
5599 }
5600
5601 return initializer_zerop (exp);
5602 }
5603
5604 /* Return 1 if EXP contains all zeros. */
5605
5606 static int
5607 all_zeros_p (const_tree exp)
5608 {
5609 if (TREE_CODE (exp) == CONSTRUCTOR)
5610 {
5611 HOST_WIDE_INT nz_elts, init_elts;
5612 bool complete_p;
5613
5614 categorize_ctor_elements (exp, &nz_elts, &init_elts, &complete_p);
5615 return nz_elts == 0;
5616 }
5617
5618 return initializer_zerop (exp);
5619 }
5620 \f
5621 /* Helper function for store_constructor.
5622 TARGET, BITSIZE, BITPOS, MODE, EXP are as for store_field.
5623 TYPE is the type of the CONSTRUCTOR, not the element type.
5624 CLEARED is as for store_constructor.
5625 ALIAS_SET is the alias set to use for any stores.
5626
5627 This provides a recursive shortcut back to store_constructor when it isn't
5628 necessary to go through store_field. This is so that we can pass through
5629 the cleared field to let store_constructor know that we may not have to
5630 clear a substructure if the outer structure has already been cleared. */
5631
5632 static void
5633 store_constructor_field (rtx target, unsigned HOST_WIDE_INT bitsize,
5634 HOST_WIDE_INT bitpos, enum machine_mode mode,
5635 tree exp, tree type, int cleared,
5636 alias_set_type alias_set)
5637 {
5638 if (TREE_CODE (exp) == CONSTRUCTOR
5639 /* We can only call store_constructor recursively if the size and
5640 bit position are on a byte boundary. */
5641 && bitpos % BITS_PER_UNIT == 0
5642 && (bitsize > 0 && bitsize % BITS_PER_UNIT == 0)
5643 /* If we have a nonzero bitpos for a register target, then we just
5644 let store_field do the bitfield handling. This is unlikely to
5645 generate unnecessary clear instructions anyways. */
5646 && (bitpos == 0 || MEM_P (target)))
5647 {
5648 if (MEM_P (target))
5649 target
5650 = adjust_address (target,
5651 GET_MODE (target) == BLKmode
5652 || 0 != (bitpos
5653 % GET_MODE_ALIGNMENT (GET_MODE (target)))
5654 ? BLKmode : VOIDmode, bitpos / BITS_PER_UNIT);
5655
5656
5657 /* Update the alias set, if required. */
5658 if (MEM_P (target) && ! MEM_KEEP_ALIAS_SET_P (target)
5659 && MEM_ALIAS_SET (target) != 0)
5660 {
5661 target = copy_rtx (target);
5662 set_mem_alias_set (target, alias_set);
5663 }
5664
5665 store_constructor (exp, target, cleared, bitsize / BITS_PER_UNIT);
5666 }
5667 else
5668 store_field (target, bitsize, bitpos, 0, 0, mode, exp, type, alias_set,
5669 false);
5670 }
5671
5672 /* Store the value of constructor EXP into the rtx TARGET.
5673 TARGET is either a REG or a MEM; we know it cannot conflict, since
5674 safe_from_p has been called.
5675 CLEARED is true if TARGET is known to have been zero'd.
5676 SIZE is the number of bytes of TARGET we are allowed to modify: this
5677 may not be the same as the size of EXP if we are assigning to a field
5678 which has been packed to exclude padding bits. */
5679
5680 static void
5681 store_constructor (tree exp, rtx target, int cleared, HOST_WIDE_INT size)
5682 {
5683 tree type = TREE_TYPE (exp);
5684 #ifdef WORD_REGISTER_OPERATIONS
5685 HOST_WIDE_INT exp_size = int_size_in_bytes (type);
5686 #endif
5687
5688 switch (TREE_CODE (type))
5689 {
5690 case RECORD_TYPE:
5691 case UNION_TYPE:
5692 case QUAL_UNION_TYPE:
5693 {
5694 unsigned HOST_WIDE_INT idx;
5695 tree field, value;
5696
5697 /* If size is zero or the target is already cleared, do nothing. */
5698 if (size == 0 || cleared)
5699 cleared = 1;
5700 /* We either clear the aggregate or indicate the value is dead. */
5701 else if ((TREE_CODE (type) == UNION_TYPE
5702 || TREE_CODE (type) == QUAL_UNION_TYPE)
5703 && ! CONSTRUCTOR_ELTS (exp))
5704 /* If the constructor is empty, clear the union. */
5705 {
5706 clear_storage (target, expr_size (exp), BLOCK_OP_NORMAL);
5707 cleared = 1;
5708 }
5709
5710 /* If we are building a static constructor into a register,
5711 set the initial value as zero so we can fold the value into
5712 a constant. But if more than one register is involved,
5713 this probably loses. */
5714 else if (REG_P (target) && TREE_STATIC (exp)
5715 && GET_MODE_SIZE (GET_MODE (target)) <= UNITS_PER_WORD)
5716 {
5717 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
5718 cleared = 1;
5719 }
5720
5721 /* If the constructor has fewer fields than the structure or
5722 if we are initializing the structure to mostly zeros, clear
5723 the whole structure first. Don't do this if TARGET is a
5724 register whose mode size isn't equal to SIZE since
5725 clear_storage can't handle this case. */
5726 else if (size > 0
5727 && (((int)VEC_length (constructor_elt, CONSTRUCTOR_ELTS (exp))
5728 != fields_length (type))
5729 || mostly_zeros_p (exp))
5730 && (!REG_P (target)
5731 || ((HOST_WIDE_INT) GET_MODE_SIZE (GET_MODE (target))
5732 == size)))
5733 {
5734 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
5735 cleared = 1;
5736 }
5737
5738 if (REG_P (target) && !cleared)
5739 emit_clobber (target);
5740
5741 /* Store each element of the constructor into the
5742 corresponding field of TARGET. */
5743 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), idx, field, value)
5744 {
5745 enum machine_mode mode;
5746 HOST_WIDE_INT bitsize;
5747 HOST_WIDE_INT bitpos = 0;
5748 tree offset;
5749 rtx to_rtx = target;
5750
5751 /* Just ignore missing fields. We cleared the whole
5752 structure, above, if any fields are missing. */
5753 if (field == 0)
5754 continue;
5755
5756 if (cleared && initializer_zerop (value))
5757 continue;
5758
5759 if (host_integerp (DECL_SIZE (field), 1))
5760 bitsize = tree_low_cst (DECL_SIZE (field), 1);
5761 else
5762 bitsize = -1;
5763
5764 mode = DECL_MODE (field);
5765 if (DECL_BIT_FIELD (field))
5766 mode = VOIDmode;
5767
5768 offset = DECL_FIELD_OFFSET (field);
5769 if (host_integerp (offset, 0)
5770 && host_integerp (bit_position (field), 0))
5771 {
5772 bitpos = int_bit_position (field);
5773 offset = 0;
5774 }
5775 else
5776 bitpos = tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 0);
5777
5778 if (offset)
5779 {
5780 enum machine_mode address_mode;
5781 rtx offset_rtx;
5782
5783 offset
5784 = SUBSTITUTE_PLACEHOLDER_IN_EXPR (offset,
5785 make_tree (TREE_TYPE (exp),
5786 target));
5787
5788 offset_rtx = expand_normal (offset);
5789 gcc_assert (MEM_P (to_rtx));
5790
5791 address_mode
5792 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (to_rtx));
5793 if (GET_MODE (offset_rtx) != address_mode)
5794 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
5795
5796 to_rtx = offset_address (to_rtx, offset_rtx,
5797 highest_pow2_factor (offset));
5798 }
5799
5800 #ifdef WORD_REGISTER_OPERATIONS
5801 /* If this initializes a field that is smaller than a
5802 word, at the start of a word, try to widen it to a full
5803 word. This special case allows us to output C++ member
5804 function initializations in a form that the optimizers
5805 can understand. */
5806 if (REG_P (target)
5807 && bitsize < BITS_PER_WORD
5808 && bitpos % BITS_PER_WORD == 0
5809 && GET_MODE_CLASS (mode) == MODE_INT
5810 && TREE_CODE (value) == INTEGER_CST
5811 && exp_size >= 0
5812 && bitpos + BITS_PER_WORD <= exp_size * BITS_PER_UNIT)
5813 {
5814 tree type = TREE_TYPE (value);
5815
5816 if (TYPE_PRECISION (type) < BITS_PER_WORD)
5817 {
5818 type = lang_hooks.types.type_for_size
5819 (BITS_PER_WORD, TYPE_UNSIGNED (type));
5820 value = fold_convert (type, value);
5821 }
5822
5823 if (BYTES_BIG_ENDIAN)
5824 value
5825 = fold_build2 (LSHIFT_EXPR, type, value,
5826 build_int_cst (type,
5827 BITS_PER_WORD - bitsize));
5828 bitsize = BITS_PER_WORD;
5829 mode = word_mode;
5830 }
5831 #endif
5832
5833 if (MEM_P (to_rtx) && !MEM_KEEP_ALIAS_SET_P (to_rtx)
5834 && DECL_NONADDRESSABLE_P (field))
5835 {
5836 to_rtx = copy_rtx (to_rtx);
5837 MEM_KEEP_ALIAS_SET_P (to_rtx) = 1;
5838 }
5839
5840 store_constructor_field (to_rtx, bitsize, bitpos, mode,
5841 value, type, cleared,
5842 get_alias_set (TREE_TYPE (field)));
5843 }
5844 break;
5845 }
5846 case ARRAY_TYPE:
5847 {
5848 tree value, index;
5849 unsigned HOST_WIDE_INT i;
5850 int need_to_clear;
5851 tree domain;
5852 tree elttype = TREE_TYPE (type);
5853 int const_bounds_p;
5854 HOST_WIDE_INT minelt = 0;
5855 HOST_WIDE_INT maxelt = 0;
5856
5857 domain = TYPE_DOMAIN (type);
5858 const_bounds_p = (TYPE_MIN_VALUE (domain)
5859 && TYPE_MAX_VALUE (domain)
5860 && host_integerp (TYPE_MIN_VALUE (domain), 0)
5861 && host_integerp (TYPE_MAX_VALUE (domain), 0));
5862
5863 /* If we have constant bounds for the range of the type, get them. */
5864 if (const_bounds_p)
5865 {
5866 minelt = tree_low_cst (TYPE_MIN_VALUE (domain), 0);
5867 maxelt = tree_low_cst (TYPE_MAX_VALUE (domain), 0);
5868 }
5869
5870 /* If the constructor has fewer elements than the array, clear
5871 the whole array first. Similarly if this is static
5872 constructor of a non-BLKmode object. */
5873 if (cleared)
5874 need_to_clear = 0;
5875 else if (REG_P (target) && TREE_STATIC (exp))
5876 need_to_clear = 1;
5877 else
5878 {
5879 unsigned HOST_WIDE_INT idx;
5880 tree index, value;
5881 HOST_WIDE_INT count = 0, zero_count = 0;
5882 need_to_clear = ! const_bounds_p;
5883
5884 /* This loop is a more accurate version of the loop in
5885 mostly_zeros_p (it handles RANGE_EXPR in an index). It
5886 is also needed to check for missing elements. */
5887 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), idx, index, value)
5888 {
5889 HOST_WIDE_INT this_node_count;
5890
5891 if (need_to_clear)
5892 break;
5893
5894 if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR)
5895 {
5896 tree lo_index = TREE_OPERAND (index, 0);
5897 tree hi_index = TREE_OPERAND (index, 1);
5898
5899 if (! host_integerp (lo_index, 1)
5900 || ! host_integerp (hi_index, 1))
5901 {
5902 need_to_clear = 1;
5903 break;
5904 }
5905
5906 this_node_count = (tree_low_cst (hi_index, 1)
5907 - tree_low_cst (lo_index, 1) + 1);
5908 }
5909 else
5910 this_node_count = 1;
5911
5912 count += this_node_count;
5913 if (mostly_zeros_p (value))
5914 zero_count += this_node_count;
5915 }
5916
5917 /* Clear the entire array first if there are any missing
5918 elements, or if the incidence of zero elements is >=
5919 75%. */
5920 if (! need_to_clear
5921 && (count < maxelt - minelt + 1
5922 || 4 * zero_count >= 3 * count))
5923 need_to_clear = 1;
5924 }
5925
5926 if (need_to_clear && size > 0)
5927 {
5928 if (REG_P (target))
5929 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
5930 else
5931 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
5932 cleared = 1;
5933 }
5934
5935 if (!cleared && REG_P (target))
5936 /* Inform later passes that the old value is dead. */
5937 emit_clobber (target);
5938
5939 /* Store each element of the constructor into the
5940 corresponding element of TARGET, determined by counting the
5941 elements. */
5942 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), i, index, value)
5943 {
5944 enum machine_mode mode;
5945 HOST_WIDE_INT bitsize;
5946 HOST_WIDE_INT bitpos;
5947 rtx xtarget = target;
5948
5949 if (cleared && initializer_zerop (value))
5950 continue;
5951
5952 mode = TYPE_MODE (elttype);
5953 if (mode == BLKmode)
5954 bitsize = (host_integerp (TYPE_SIZE (elttype), 1)
5955 ? tree_low_cst (TYPE_SIZE (elttype), 1)
5956 : -1);
5957 else
5958 bitsize = GET_MODE_BITSIZE (mode);
5959
5960 if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR)
5961 {
5962 tree lo_index = TREE_OPERAND (index, 0);
5963 tree hi_index = TREE_OPERAND (index, 1);
5964 rtx index_r, pos_rtx;
5965 HOST_WIDE_INT lo, hi, count;
5966 tree position;
5967
5968 /* If the range is constant and "small", unroll the loop. */
5969 if (const_bounds_p
5970 && host_integerp (lo_index, 0)
5971 && host_integerp (hi_index, 0)
5972 && (lo = tree_low_cst (lo_index, 0),
5973 hi = tree_low_cst (hi_index, 0),
5974 count = hi - lo + 1,
5975 (!MEM_P (target)
5976 || count <= 2
5977 || (host_integerp (TYPE_SIZE (elttype), 1)
5978 && (tree_low_cst (TYPE_SIZE (elttype), 1) * count
5979 <= 40 * 8)))))
5980 {
5981 lo -= minelt; hi -= minelt;
5982 for (; lo <= hi; lo++)
5983 {
5984 bitpos = lo * tree_low_cst (TYPE_SIZE (elttype), 0);
5985
5986 if (MEM_P (target)
5987 && !MEM_KEEP_ALIAS_SET_P (target)
5988 && TREE_CODE (type) == ARRAY_TYPE
5989 && TYPE_NONALIASED_COMPONENT (type))
5990 {
5991 target = copy_rtx (target);
5992 MEM_KEEP_ALIAS_SET_P (target) = 1;
5993 }
5994
5995 store_constructor_field
5996 (target, bitsize, bitpos, mode, value, type, cleared,
5997 get_alias_set (elttype));
5998 }
5999 }
6000 else
6001 {
6002 rtx loop_start = gen_label_rtx ();
6003 rtx loop_end = gen_label_rtx ();
6004 tree exit_cond;
6005
6006 expand_normal (hi_index);
6007
6008 index = build_decl (EXPR_LOCATION (exp),
6009 VAR_DECL, NULL_TREE, domain);
6010 index_r = gen_reg_rtx (promote_decl_mode (index, NULL));
6011 SET_DECL_RTL (index, index_r);
6012 store_expr (lo_index, index_r, 0, false);
6013
6014 /* Build the head of the loop. */
6015 do_pending_stack_adjust ();
6016 emit_label (loop_start);
6017
6018 /* Assign value to element index. */
6019 position =
6020 fold_convert (ssizetype,
6021 fold_build2 (MINUS_EXPR,
6022 TREE_TYPE (index),
6023 index,
6024 TYPE_MIN_VALUE (domain)));
6025
6026 position =
6027 size_binop (MULT_EXPR, position,
6028 fold_convert (ssizetype,
6029 TYPE_SIZE_UNIT (elttype)));
6030
6031 pos_rtx = expand_normal (position);
6032 xtarget = offset_address (target, pos_rtx,
6033 highest_pow2_factor (position));
6034 xtarget = adjust_address (xtarget, mode, 0);
6035 if (TREE_CODE (value) == CONSTRUCTOR)
6036 store_constructor (value, xtarget, cleared,
6037 bitsize / BITS_PER_UNIT);
6038 else
6039 store_expr (value, xtarget, 0, false);
6040
6041 /* Generate a conditional jump to exit the loop. */
6042 exit_cond = build2 (LT_EXPR, integer_type_node,
6043 index, hi_index);
6044 jumpif (exit_cond, loop_end, -1);
6045
6046 /* Update the loop counter, and jump to the head of
6047 the loop. */
6048 expand_assignment (index,
6049 build2 (PLUS_EXPR, TREE_TYPE (index),
6050 index, integer_one_node),
6051 false);
6052
6053 emit_jump (loop_start);
6054
6055 /* Build the end of the loop. */
6056 emit_label (loop_end);
6057 }
6058 }
6059 else if ((index != 0 && ! host_integerp (index, 0))
6060 || ! host_integerp (TYPE_SIZE (elttype), 1))
6061 {
6062 tree position;
6063
6064 if (index == 0)
6065 index = ssize_int (1);
6066
6067 if (minelt)
6068 index = fold_convert (ssizetype,
6069 fold_build2 (MINUS_EXPR,
6070 TREE_TYPE (index),
6071 index,
6072 TYPE_MIN_VALUE (domain)));
6073
6074 position =
6075 size_binop (MULT_EXPR, index,
6076 fold_convert (ssizetype,
6077 TYPE_SIZE_UNIT (elttype)));
6078 xtarget = offset_address (target,
6079 expand_normal (position),
6080 highest_pow2_factor (position));
6081 xtarget = adjust_address (xtarget, mode, 0);
6082 store_expr (value, xtarget, 0, false);
6083 }
6084 else
6085 {
6086 if (index != 0)
6087 bitpos = ((tree_low_cst (index, 0) - minelt)
6088 * tree_low_cst (TYPE_SIZE (elttype), 1));
6089 else
6090 bitpos = (i * tree_low_cst (TYPE_SIZE (elttype), 1));
6091
6092 if (MEM_P (target) && !MEM_KEEP_ALIAS_SET_P (target)
6093 && TREE_CODE (type) == ARRAY_TYPE
6094 && TYPE_NONALIASED_COMPONENT (type))
6095 {
6096 target = copy_rtx (target);
6097 MEM_KEEP_ALIAS_SET_P (target) = 1;
6098 }
6099 store_constructor_field (target, bitsize, bitpos, mode, value,
6100 type, cleared, get_alias_set (elttype));
6101 }
6102 }
6103 break;
6104 }
6105
6106 case VECTOR_TYPE:
6107 {
6108 unsigned HOST_WIDE_INT idx;
6109 constructor_elt *ce;
6110 int i;
6111 int need_to_clear;
6112 int icode = 0;
6113 tree elttype = TREE_TYPE (type);
6114 int elt_size = tree_low_cst (TYPE_SIZE (elttype), 1);
6115 enum machine_mode eltmode = TYPE_MODE (elttype);
6116 HOST_WIDE_INT bitsize;
6117 HOST_WIDE_INT bitpos;
6118 rtvec vector = NULL;
6119 unsigned n_elts;
6120 alias_set_type alias;
6121
6122 gcc_assert (eltmode != BLKmode);
6123
6124 n_elts = TYPE_VECTOR_SUBPARTS (type);
6125 if (REG_P (target) && VECTOR_MODE_P (GET_MODE (target)))
6126 {
6127 enum machine_mode mode = GET_MODE (target);
6128
6129 icode = (int) optab_handler (vec_init_optab, mode);
6130 if (icode != CODE_FOR_nothing)
6131 {
6132 unsigned int i;
6133
6134 vector = rtvec_alloc (n_elts);
6135 for (i = 0; i < n_elts; i++)
6136 RTVEC_ELT (vector, i) = CONST0_RTX (GET_MODE_INNER (mode));
6137 }
6138 }
6139
6140 /* If the constructor has fewer elements than the vector,
6141 clear the whole array first. Similarly if this is static
6142 constructor of a non-BLKmode object. */
6143 if (cleared)
6144 need_to_clear = 0;
6145 else if (REG_P (target) && TREE_STATIC (exp))
6146 need_to_clear = 1;
6147 else
6148 {
6149 unsigned HOST_WIDE_INT count = 0, zero_count = 0;
6150 tree value;
6151
6152 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value)
6153 {
6154 int n_elts_here = tree_low_cst
6155 (int_const_binop (TRUNC_DIV_EXPR,
6156 TYPE_SIZE (TREE_TYPE (value)),
6157 TYPE_SIZE (elttype)), 1);
6158
6159 count += n_elts_here;
6160 if (mostly_zeros_p (value))
6161 zero_count += n_elts_here;
6162 }
6163
6164 /* Clear the entire vector first if there are any missing elements,
6165 or if the incidence of zero elements is >= 75%. */
6166 need_to_clear = (count < n_elts || 4 * zero_count >= 3 * count);
6167 }
6168
6169 if (need_to_clear && size > 0 && !vector)
6170 {
6171 if (REG_P (target))
6172 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
6173 else
6174 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
6175 cleared = 1;
6176 }
6177
6178 /* Inform later passes that the old value is dead. */
6179 if (!cleared && !vector && REG_P (target))
6180 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
6181
6182 if (MEM_P (target))
6183 alias = MEM_ALIAS_SET (target);
6184 else
6185 alias = get_alias_set (elttype);
6186
6187 /* Store each element of the constructor into the corresponding
6188 element of TARGET, determined by counting the elements. */
6189 for (idx = 0, i = 0;
6190 VEC_iterate (constructor_elt, CONSTRUCTOR_ELTS (exp), idx, ce);
6191 idx++, i += bitsize / elt_size)
6192 {
6193 HOST_WIDE_INT eltpos;
6194 tree value = ce->value;
6195
6196 bitsize = tree_low_cst (TYPE_SIZE (TREE_TYPE (value)), 1);
6197 if (cleared && initializer_zerop (value))
6198 continue;
6199
6200 if (ce->index)
6201 eltpos = tree_low_cst (ce->index, 1);
6202 else
6203 eltpos = i;
6204
6205 if (vector)
6206 {
6207 /* Vector CONSTRUCTORs should only be built from smaller
6208 vectors in the case of BLKmode vectors. */
6209 gcc_assert (TREE_CODE (TREE_TYPE (value)) != VECTOR_TYPE);
6210 RTVEC_ELT (vector, eltpos)
6211 = expand_normal (value);
6212 }
6213 else
6214 {
6215 enum machine_mode value_mode =
6216 TREE_CODE (TREE_TYPE (value)) == VECTOR_TYPE
6217 ? TYPE_MODE (TREE_TYPE (value))
6218 : eltmode;
6219 bitpos = eltpos * elt_size;
6220 store_constructor_field (target, bitsize, bitpos,
6221 value_mode, value, type,
6222 cleared, alias);
6223 }
6224 }
6225
6226 if (vector)
6227 emit_insn (GEN_FCN (icode)
6228 (target,
6229 gen_rtx_PARALLEL (GET_MODE (target), vector)));
6230 break;
6231 }
6232
6233 default:
6234 gcc_unreachable ();
6235 }
6236 }
6237
6238 /* Store the value of EXP (an expression tree)
6239 into a subfield of TARGET which has mode MODE and occupies
6240 BITSIZE bits, starting BITPOS bits from the start of TARGET.
6241 If MODE is VOIDmode, it means that we are storing into a bit-field.
6242
6243 BITREGION_START is bitpos of the first bitfield in this region.
6244 BITREGION_END is the bitpos of the ending bitfield in this region.
6245 These two fields are 0, if the C++ memory model does not apply,
6246 or we are not interested in keeping track of bitfield regions.
6247
6248 Always return const0_rtx unless we have something particular to
6249 return.
6250
6251 TYPE is the type of the underlying object,
6252
6253 ALIAS_SET is the alias set for the destination. This value will
6254 (in general) be different from that for TARGET, since TARGET is a
6255 reference to the containing structure.
6256
6257 If NONTEMPORAL is true, try generating a nontemporal store. */
6258
6259 static rtx
6260 store_field (rtx target, HOST_WIDE_INT bitsize, HOST_WIDE_INT bitpos,
6261 unsigned HOST_WIDE_INT bitregion_start,
6262 unsigned HOST_WIDE_INT bitregion_end,
6263 enum machine_mode mode, tree exp, tree type,
6264 alias_set_type alias_set, bool nontemporal)
6265 {
6266 if (TREE_CODE (exp) == ERROR_MARK)
6267 return const0_rtx;
6268
6269 /* If we have nothing to store, do nothing unless the expression has
6270 side-effects. */
6271 if (bitsize == 0)
6272 return expand_expr (exp, const0_rtx, VOIDmode, EXPAND_NORMAL);
6273
6274 /* If we are storing into an unaligned field of an aligned union that is
6275 in a register, we may have the mode of TARGET being an integer mode but
6276 MODE == BLKmode. In that case, get an aligned object whose size and
6277 alignment are the same as TARGET and store TARGET into it (we can avoid
6278 the store if the field being stored is the entire width of TARGET). Then
6279 call ourselves recursively to store the field into a BLKmode version of
6280 that object. Finally, load from the object into TARGET. This is not
6281 very efficient in general, but should only be slightly more expensive
6282 than the otherwise-required unaligned accesses. Perhaps this can be
6283 cleaned up later. It's tempting to make OBJECT readonly, but it's set
6284 twice, once with emit_move_insn and once via store_field. */
6285
6286 if (mode == BLKmode
6287 && (REG_P (target) || GET_CODE (target) == SUBREG))
6288 {
6289 rtx object = assign_temp (type, 0, 1, 1);
6290 rtx blk_object = adjust_address (object, BLKmode, 0);
6291
6292 if (bitsize != (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (target)))
6293 emit_move_insn (object, target);
6294
6295 store_field (blk_object, bitsize, bitpos,
6296 bitregion_start, bitregion_end,
6297 mode, exp, type, alias_set, nontemporal);
6298
6299 emit_move_insn (target, object);
6300
6301 /* We want to return the BLKmode version of the data. */
6302 return blk_object;
6303 }
6304
6305 if (GET_CODE (target) == CONCAT)
6306 {
6307 /* We're storing into a struct containing a single __complex. */
6308
6309 gcc_assert (!bitpos);
6310 return store_expr (exp, target, 0, nontemporal);
6311 }
6312
6313 /* If the structure is in a register or if the component
6314 is a bit field, we cannot use addressing to access it.
6315 Use bit-field techniques or SUBREG to store in it. */
6316
6317 if (mode == VOIDmode
6318 || (mode != BLKmode && ! direct_store[(int) mode]
6319 && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
6320 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT)
6321 || REG_P (target)
6322 || GET_CODE (target) == SUBREG
6323 /* If the field isn't aligned enough to store as an ordinary memref,
6324 store it as a bit field. */
6325 || (mode != BLKmode
6326 && ((((MEM_ALIGN (target) < GET_MODE_ALIGNMENT (mode))
6327 || bitpos % GET_MODE_ALIGNMENT (mode))
6328 && SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (target)))
6329 || (bitpos % BITS_PER_UNIT != 0)))
6330 /* If the RHS and field are a constant size and the size of the
6331 RHS isn't the same size as the bitfield, we must use bitfield
6332 operations. */
6333 || (bitsize >= 0
6334 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
6335 && compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)), bitsize) != 0)
6336 /* If we are expanding a MEM_REF of a non-BLKmode non-addressable
6337 decl we must use bitfield operations. */
6338 || (bitsize >= 0
6339 && TREE_CODE (exp) == MEM_REF
6340 && TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR
6341 && DECL_P (TREE_OPERAND (TREE_OPERAND (exp, 0), 0))
6342 && !TREE_ADDRESSABLE (TREE_OPERAND (TREE_OPERAND (exp, 0),0 ))
6343 && DECL_MODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0)) != BLKmode))
6344 {
6345 rtx temp;
6346 gimple nop_def;
6347
6348 /* If EXP is a NOP_EXPR of precision less than its mode, then that
6349 implies a mask operation. If the precision is the same size as
6350 the field we're storing into, that mask is redundant. This is
6351 particularly common with bit field assignments generated by the
6352 C front end. */
6353 nop_def = get_def_for_expr (exp, NOP_EXPR);
6354 if (nop_def)
6355 {
6356 tree type = TREE_TYPE (exp);
6357 if (INTEGRAL_TYPE_P (type)
6358 && TYPE_PRECISION (type) < GET_MODE_BITSIZE (TYPE_MODE (type))
6359 && bitsize == TYPE_PRECISION (type))
6360 {
6361 tree op = gimple_assign_rhs1 (nop_def);
6362 type = TREE_TYPE (op);
6363 if (INTEGRAL_TYPE_P (type) && TYPE_PRECISION (type) >= bitsize)
6364 exp = op;
6365 }
6366 }
6367
6368 temp = expand_normal (exp);
6369
6370 /* If BITSIZE is narrower than the size of the type of EXP
6371 we will be narrowing TEMP. Normally, what's wanted are the
6372 low-order bits. However, if EXP's type is a record and this is
6373 big-endian machine, we want the upper BITSIZE bits. */
6374 if (BYTES_BIG_ENDIAN && GET_MODE_CLASS (GET_MODE (temp)) == MODE_INT
6375 && bitsize < (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (temp))
6376 && TREE_CODE (TREE_TYPE (exp)) == RECORD_TYPE)
6377 temp = expand_shift (RSHIFT_EXPR, GET_MODE (temp), temp,
6378 GET_MODE_BITSIZE (GET_MODE (temp)) - bitsize,
6379 NULL_RTX, 1);
6380
6381 /* Unless MODE is VOIDmode or BLKmode, convert TEMP to
6382 MODE. */
6383 if (mode != VOIDmode && mode != BLKmode
6384 && mode != TYPE_MODE (TREE_TYPE (exp)))
6385 temp = convert_modes (mode, TYPE_MODE (TREE_TYPE (exp)), temp, 1);
6386
6387 /* If the modes of TEMP and TARGET are both BLKmode, both
6388 must be in memory and BITPOS must be aligned on a byte
6389 boundary. If so, we simply do a block copy. Likewise
6390 for a BLKmode-like TARGET. */
6391 if (GET_MODE (temp) == BLKmode
6392 && (GET_MODE (target) == BLKmode
6393 || (MEM_P (target)
6394 && GET_MODE_CLASS (GET_MODE (target)) == MODE_INT
6395 && (bitpos % BITS_PER_UNIT) == 0
6396 && (bitsize % BITS_PER_UNIT) == 0)))
6397 {
6398 gcc_assert (MEM_P (target) && MEM_P (temp)
6399 && (bitpos % BITS_PER_UNIT) == 0);
6400
6401 target = adjust_address (target, VOIDmode, bitpos / BITS_PER_UNIT);
6402 emit_block_move (target, temp,
6403 GEN_INT ((bitsize + BITS_PER_UNIT - 1)
6404 / BITS_PER_UNIT),
6405 BLOCK_OP_NORMAL);
6406
6407 return const0_rtx;
6408 }
6409
6410 /* Store the value in the bitfield. */
6411 store_bit_field (target, bitsize, bitpos,
6412 bitregion_start, bitregion_end,
6413 mode, temp);
6414
6415 return const0_rtx;
6416 }
6417 else
6418 {
6419 /* Now build a reference to just the desired component. */
6420 rtx to_rtx = adjust_address (target, mode, bitpos / BITS_PER_UNIT);
6421
6422 if (to_rtx == target)
6423 to_rtx = copy_rtx (to_rtx);
6424
6425 if (!MEM_SCALAR_P (to_rtx))
6426 MEM_IN_STRUCT_P (to_rtx) = 1;
6427 if (!MEM_KEEP_ALIAS_SET_P (to_rtx) && MEM_ALIAS_SET (to_rtx) != 0)
6428 set_mem_alias_set (to_rtx, alias_set);
6429
6430 return store_expr (exp, to_rtx, 0, nontemporal);
6431 }
6432 }
6433 \f
6434 /* Given an expression EXP that may be a COMPONENT_REF, a BIT_FIELD_REF,
6435 an ARRAY_REF, or an ARRAY_RANGE_REF, look for nested operations of these
6436 codes and find the ultimate containing object, which we return.
6437
6438 We set *PBITSIZE to the size in bits that we want, *PBITPOS to the
6439 bit position, and *PUNSIGNEDP to the signedness of the field.
6440 If the position of the field is variable, we store a tree
6441 giving the variable offset (in units) in *POFFSET.
6442 This offset is in addition to the bit position.
6443 If the position is not variable, we store 0 in *POFFSET.
6444
6445 If any of the extraction expressions is volatile,
6446 we store 1 in *PVOLATILEP. Otherwise we don't change that.
6447
6448 If the field is a non-BLKmode bit-field, *PMODE is set to VOIDmode.
6449 Otherwise, it is a mode that can be used to access the field.
6450
6451 If the field describes a variable-sized object, *PMODE is set to
6452 BLKmode and *PBITSIZE is set to -1. An access cannot be made in
6453 this case, but the address of the object can be found.
6454
6455 If KEEP_ALIGNING is true and the target is STRICT_ALIGNMENT, we don't
6456 look through nodes that serve as markers of a greater alignment than
6457 the one that can be deduced from the expression. These nodes make it
6458 possible for front-ends to prevent temporaries from being created by
6459 the middle-end on alignment considerations. For that purpose, the
6460 normal operating mode at high-level is to always pass FALSE so that
6461 the ultimate containing object is really returned; moreover, the
6462 associated predicate handled_component_p will always return TRUE
6463 on these nodes, thus indicating that they are essentially handled
6464 by get_inner_reference. TRUE should only be passed when the caller
6465 is scanning the expression in order to build another representation
6466 and specifically knows how to handle these nodes; as such, this is
6467 the normal operating mode in the RTL expanders. */
6468
6469 tree
6470 get_inner_reference (tree exp, HOST_WIDE_INT *pbitsize,
6471 HOST_WIDE_INT *pbitpos, tree *poffset,
6472 enum machine_mode *pmode, int *punsignedp,
6473 int *pvolatilep, bool keep_aligning)
6474 {
6475 tree size_tree = 0;
6476 enum machine_mode mode = VOIDmode;
6477 bool blkmode_bitfield = false;
6478 tree offset = size_zero_node;
6479 double_int bit_offset = double_int_zero;
6480
6481 /* First get the mode, signedness, and size. We do this from just the
6482 outermost expression. */
6483 *pbitsize = -1;
6484 if (TREE_CODE (exp) == COMPONENT_REF)
6485 {
6486 tree field = TREE_OPERAND (exp, 1);
6487 size_tree = DECL_SIZE (field);
6488 if (!DECL_BIT_FIELD (field))
6489 mode = DECL_MODE (field);
6490 else if (DECL_MODE (field) == BLKmode)
6491 blkmode_bitfield = true;
6492 else if (TREE_THIS_VOLATILE (exp)
6493 && flag_strict_volatile_bitfields > 0)
6494 /* Volatile bitfields should be accessed in the mode of the
6495 field's type, not the mode computed based on the bit
6496 size. */
6497 mode = TYPE_MODE (DECL_BIT_FIELD_TYPE (field));
6498
6499 *punsignedp = DECL_UNSIGNED (field);
6500 }
6501 else if (TREE_CODE (exp) == BIT_FIELD_REF)
6502 {
6503 size_tree = TREE_OPERAND (exp, 1);
6504 *punsignedp = (! INTEGRAL_TYPE_P (TREE_TYPE (exp))
6505 || TYPE_UNSIGNED (TREE_TYPE (exp)));
6506
6507 /* For vector types, with the correct size of access, use the mode of
6508 inner type. */
6509 if (TREE_CODE (TREE_TYPE (TREE_OPERAND (exp, 0))) == VECTOR_TYPE
6510 && TREE_TYPE (exp) == TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0)))
6511 && tree_int_cst_equal (size_tree, TYPE_SIZE (TREE_TYPE (exp))))
6512 mode = TYPE_MODE (TREE_TYPE (exp));
6513 }
6514 else
6515 {
6516 mode = TYPE_MODE (TREE_TYPE (exp));
6517 *punsignedp = TYPE_UNSIGNED (TREE_TYPE (exp));
6518
6519 if (mode == BLKmode)
6520 size_tree = TYPE_SIZE (TREE_TYPE (exp));
6521 else
6522 *pbitsize = GET_MODE_BITSIZE (mode);
6523 }
6524
6525 if (size_tree != 0)
6526 {
6527 if (! host_integerp (size_tree, 1))
6528 mode = BLKmode, *pbitsize = -1;
6529 else
6530 *pbitsize = tree_low_cst (size_tree, 1);
6531 }
6532
6533 /* Compute cumulative bit-offset for nested component-refs and array-refs,
6534 and find the ultimate containing object. */
6535 while (1)
6536 {
6537 switch (TREE_CODE (exp))
6538 {
6539 case BIT_FIELD_REF:
6540 bit_offset
6541 = double_int_add (bit_offset,
6542 tree_to_double_int (TREE_OPERAND (exp, 2)));
6543 break;
6544
6545 case COMPONENT_REF:
6546 {
6547 tree field = TREE_OPERAND (exp, 1);
6548 tree this_offset = component_ref_field_offset (exp);
6549
6550 /* If this field hasn't been filled in yet, don't go past it.
6551 This should only happen when folding expressions made during
6552 type construction. */
6553 if (this_offset == 0)
6554 break;
6555
6556 offset = size_binop (PLUS_EXPR, offset, this_offset);
6557 bit_offset = double_int_add (bit_offset,
6558 tree_to_double_int
6559 (DECL_FIELD_BIT_OFFSET (field)));
6560
6561 /* ??? Right now we don't do anything with DECL_OFFSET_ALIGN. */
6562 }
6563 break;
6564
6565 case ARRAY_REF:
6566 case ARRAY_RANGE_REF:
6567 {
6568 tree index = TREE_OPERAND (exp, 1);
6569 tree low_bound = array_ref_low_bound (exp);
6570 tree unit_size = array_ref_element_size (exp);
6571
6572 /* We assume all arrays have sizes that are a multiple of a byte.
6573 First subtract the lower bound, if any, in the type of the
6574 index, then convert to sizetype and multiply by the size of
6575 the array element. */
6576 if (! integer_zerop (low_bound))
6577 index = fold_build2 (MINUS_EXPR, TREE_TYPE (index),
6578 index, low_bound);
6579
6580 offset = size_binop (PLUS_EXPR, offset,
6581 size_binop (MULT_EXPR,
6582 fold_convert (sizetype, index),
6583 unit_size));
6584 }
6585 break;
6586
6587 case REALPART_EXPR:
6588 break;
6589
6590 case IMAGPART_EXPR:
6591 bit_offset = double_int_add (bit_offset,
6592 uhwi_to_double_int (*pbitsize));
6593 break;
6594
6595 case VIEW_CONVERT_EXPR:
6596 if (keep_aligning && STRICT_ALIGNMENT
6597 && (TYPE_ALIGN (TREE_TYPE (exp))
6598 > TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (exp, 0))))
6599 && (TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (exp, 0)))
6600 < BIGGEST_ALIGNMENT)
6601 && (TYPE_ALIGN_OK (TREE_TYPE (exp))
6602 || TYPE_ALIGN_OK (TREE_TYPE (TREE_OPERAND (exp, 0)))))
6603 goto done;
6604 break;
6605
6606 case MEM_REF:
6607 /* Hand back the decl for MEM[&decl, off]. */
6608 if (TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR)
6609 {
6610 tree off = TREE_OPERAND (exp, 1);
6611 if (!integer_zerop (off))
6612 {
6613 double_int boff, coff = mem_ref_offset (exp);
6614 boff = double_int_lshift (coff,
6615 BITS_PER_UNIT == 8
6616 ? 3 : exact_log2 (BITS_PER_UNIT),
6617 HOST_BITS_PER_DOUBLE_INT, true);
6618 bit_offset = double_int_add (bit_offset, boff);
6619 }
6620 exp = TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
6621 }
6622 goto done;
6623
6624 default:
6625 goto done;
6626 }
6627
6628 /* If any reference in the chain is volatile, the effect is volatile. */
6629 if (TREE_THIS_VOLATILE (exp))
6630 *pvolatilep = 1;
6631
6632 exp = TREE_OPERAND (exp, 0);
6633 }
6634 done:
6635
6636 /* If OFFSET is constant, see if we can return the whole thing as a
6637 constant bit position. Make sure to handle overflow during
6638 this conversion. */
6639 if (TREE_CODE (offset) == INTEGER_CST)
6640 {
6641 double_int tem = tree_to_double_int (offset);
6642 tem = double_int_sext (tem, TYPE_PRECISION (sizetype));
6643 tem = double_int_lshift (tem,
6644 BITS_PER_UNIT == 8
6645 ? 3 : exact_log2 (BITS_PER_UNIT),
6646 HOST_BITS_PER_DOUBLE_INT, true);
6647 tem = double_int_add (tem, bit_offset);
6648 if (double_int_fits_in_shwi_p (tem))
6649 {
6650 *pbitpos = double_int_to_shwi (tem);
6651 *poffset = offset = NULL_TREE;
6652 }
6653 }
6654
6655 /* Otherwise, split it up. */
6656 if (offset)
6657 {
6658 *pbitpos = double_int_to_shwi (bit_offset);
6659 *poffset = offset;
6660 }
6661
6662 /* We can use BLKmode for a byte-aligned BLKmode bitfield. */
6663 if (mode == VOIDmode
6664 && blkmode_bitfield
6665 && (*pbitpos % BITS_PER_UNIT) == 0
6666 && (*pbitsize % BITS_PER_UNIT) == 0)
6667 *pmode = BLKmode;
6668 else
6669 *pmode = mode;
6670
6671 return exp;
6672 }
6673
6674 /* Given an expression EXP that may be a COMPONENT_REF, an ARRAY_REF or an
6675 ARRAY_RANGE_REF, look for whether EXP or any nested component-refs within
6676 EXP is marked as PACKED. */
6677
6678 bool
6679 contains_packed_reference (const_tree exp)
6680 {
6681 bool packed_p = false;
6682
6683 while (1)
6684 {
6685 switch (TREE_CODE (exp))
6686 {
6687 case COMPONENT_REF:
6688 {
6689 tree field = TREE_OPERAND (exp, 1);
6690 packed_p = DECL_PACKED (field)
6691 || TYPE_PACKED (TREE_TYPE (field))
6692 || TYPE_PACKED (TREE_TYPE (exp));
6693 if (packed_p)
6694 goto done;
6695 }
6696 break;
6697
6698 case BIT_FIELD_REF:
6699 case ARRAY_REF:
6700 case ARRAY_RANGE_REF:
6701 case REALPART_EXPR:
6702 case IMAGPART_EXPR:
6703 case VIEW_CONVERT_EXPR:
6704 break;
6705
6706 default:
6707 goto done;
6708 }
6709 exp = TREE_OPERAND (exp, 0);
6710 }
6711 done:
6712 return packed_p;
6713 }
6714
6715 /* Return a tree of sizetype representing the size, in bytes, of the element
6716 of EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6717
6718 tree
6719 array_ref_element_size (tree exp)
6720 {
6721 tree aligned_size = TREE_OPERAND (exp, 3);
6722 tree elmt_type = TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0)));
6723 location_t loc = EXPR_LOCATION (exp);
6724
6725 /* If a size was specified in the ARRAY_REF, it's the size measured
6726 in alignment units of the element type. So multiply by that value. */
6727 if (aligned_size)
6728 {
6729 /* ??? tree_ssa_useless_type_conversion will eliminate casts to
6730 sizetype from another type of the same width and signedness. */
6731 if (TREE_TYPE (aligned_size) != sizetype)
6732 aligned_size = fold_convert_loc (loc, sizetype, aligned_size);
6733 return size_binop_loc (loc, MULT_EXPR, aligned_size,
6734 size_int (TYPE_ALIGN_UNIT (elmt_type)));
6735 }
6736
6737 /* Otherwise, take the size from that of the element type. Substitute
6738 any PLACEHOLDER_EXPR that we have. */
6739 else
6740 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_SIZE_UNIT (elmt_type), exp);
6741 }
6742
6743 /* Return a tree representing the lower bound of the array mentioned in
6744 EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6745
6746 tree
6747 array_ref_low_bound (tree exp)
6748 {
6749 tree domain_type = TYPE_DOMAIN (TREE_TYPE (TREE_OPERAND (exp, 0)));
6750
6751 /* If a lower bound is specified in EXP, use it. */
6752 if (TREE_OPERAND (exp, 2))
6753 return TREE_OPERAND (exp, 2);
6754
6755 /* Otherwise, if there is a domain type and it has a lower bound, use it,
6756 substituting for a PLACEHOLDER_EXPR as needed. */
6757 if (domain_type && TYPE_MIN_VALUE (domain_type))
6758 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_MIN_VALUE (domain_type), exp);
6759
6760 /* Otherwise, return a zero of the appropriate type. */
6761 return build_int_cst (TREE_TYPE (TREE_OPERAND (exp, 1)), 0);
6762 }
6763
6764 /* Return a tree representing the upper bound of the array mentioned in
6765 EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6766
6767 tree
6768 array_ref_up_bound (tree exp)
6769 {
6770 tree domain_type = TYPE_DOMAIN (TREE_TYPE (TREE_OPERAND (exp, 0)));
6771
6772 /* If there is a domain type and it has an upper bound, use it, substituting
6773 for a PLACEHOLDER_EXPR as needed. */
6774 if (domain_type && TYPE_MAX_VALUE (domain_type))
6775 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_MAX_VALUE (domain_type), exp);
6776
6777 /* Otherwise fail. */
6778 return NULL_TREE;
6779 }
6780
6781 /* Return a tree representing the offset, in bytes, of the field referenced
6782 by EXP. This does not include any offset in DECL_FIELD_BIT_OFFSET. */
6783
6784 tree
6785 component_ref_field_offset (tree exp)
6786 {
6787 tree aligned_offset = TREE_OPERAND (exp, 2);
6788 tree field = TREE_OPERAND (exp, 1);
6789 location_t loc = EXPR_LOCATION (exp);
6790
6791 /* If an offset was specified in the COMPONENT_REF, it's the offset measured
6792 in units of DECL_OFFSET_ALIGN / BITS_PER_UNIT. So multiply by that
6793 value. */
6794 if (aligned_offset)
6795 {
6796 /* ??? tree_ssa_useless_type_conversion will eliminate casts to
6797 sizetype from another type of the same width and signedness. */
6798 if (TREE_TYPE (aligned_offset) != sizetype)
6799 aligned_offset = fold_convert_loc (loc, sizetype, aligned_offset);
6800 return size_binop_loc (loc, MULT_EXPR, aligned_offset,
6801 size_int (DECL_OFFSET_ALIGN (field)
6802 / BITS_PER_UNIT));
6803 }
6804
6805 /* Otherwise, take the offset from that of the field. Substitute
6806 any PLACEHOLDER_EXPR that we have. */
6807 else
6808 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (DECL_FIELD_OFFSET (field), exp);
6809 }
6810
6811 /* Alignment in bits the TARGET of an assignment may be assumed to have. */
6812
6813 static unsigned HOST_WIDE_INT
6814 target_align (const_tree target)
6815 {
6816 /* We might have a chain of nested references with intermediate misaligning
6817 bitfields components, so need to recurse to find out. */
6818
6819 unsigned HOST_WIDE_INT this_align, outer_align;
6820
6821 switch (TREE_CODE (target))
6822 {
6823 case BIT_FIELD_REF:
6824 return 1;
6825
6826 case COMPONENT_REF:
6827 this_align = DECL_ALIGN (TREE_OPERAND (target, 1));
6828 outer_align = target_align (TREE_OPERAND (target, 0));
6829 return MIN (this_align, outer_align);
6830
6831 case ARRAY_REF:
6832 case ARRAY_RANGE_REF:
6833 this_align = TYPE_ALIGN (TREE_TYPE (target));
6834 outer_align = target_align (TREE_OPERAND (target, 0));
6835 return MIN (this_align, outer_align);
6836
6837 CASE_CONVERT:
6838 case NON_LVALUE_EXPR:
6839 case VIEW_CONVERT_EXPR:
6840 this_align = TYPE_ALIGN (TREE_TYPE (target));
6841 outer_align = target_align (TREE_OPERAND (target, 0));
6842 return MAX (this_align, outer_align);
6843
6844 default:
6845 return TYPE_ALIGN (TREE_TYPE (target));
6846 }
6847 }
6848
6849 \f
6850 /* Given an rtx VALUE that may contain additions and multiplications, return
6851 an equivalent value that just refers to a register, memory, or constant.
6852 This is done by generating instructions to perform the arithmetic and
6853 returning a pseudo-register containing the value.
6854
6855 The returned value may be a REG, SUBREG, MEM or constant. */
6856
6857 rtx
6858 force_operand (rtx value, rtx target)
6859 {
6860 rtx op1, op2;
6861 /* Use subtarget as the target for operand 0 of a binary operation. */
6862 rtx subtarget = get_subtarget (target);
6863 enum rtx_code code = GET_CODE (value);
6864
6865 /* Check for subreg applied to an expression produced by loop optimizer. */
6866 if (code == SUBREG
6867 && !REG_P (SUBREG_REG (value))
6868 && !MEM_P (SUBREG_REG (value)))
6869 {
6870 value
6871 = simplify_gen_subreg (GET_MODE (value),
6872 force_reg (GET_MODE (SUBREG_REG (value)),
6873 force_operand (SUBREG_REG (value),
6874 NULL_RTX)),
6875 GET_MODE (SUBREG_REG (value)),
6876 SUBREG_BYTE (value));
6877 code = GET_CODE (value);
6878 }
6879
6880 /* Check for a PIC address load. */
6881 if ((code == PLUS || code == MINUS)
6882 && XEXP (value, 0) == pic_offset_table_rtx
6883 && (GET_CODE (XEXP (value, 1)) == SYMBOL_REF
6884 || GET_CODE (XEXP (value, 1)) == LABEL_REF
6885 || GET_CODE (XEXP (value, 1)) == CONST))
6886 {
6887 if (!subtarget)
6888 subtarget = gen_reg_rtx (GET_MODE (value));
6889 emit_move_insn (subtarget, value);
6890 return subtarget;
6891 }
6892
6893 if (ARITHMETIC_P (value))
6894 {
6895 op2 = XEXP (value, 1);
6896 if (!CONSTANT_P (op2) && !(REG_P (op2) && op2 != subtarget))
6897 subtarget = 0;
6898 if (code == MINUS && CONST_INT_P (op2))
6899 {
6900 code = PLUS;
6901 op2 = negate_rtx (GET_MODE (value), op2);
6902 }
6903
6904 /* Check for an addition with OP2 a constant integer and our first
6905 operand a PLUS of a virtual register and something else. In that
6906 case, we want to emit the sum of the virtual register and the
6907 constant first and then add the other value. This allows virtual
6908 register instantiation to simply modify the constant rather than
6909 creating another one around this addition. */
6910 if (code == PLUS && CONST_INT_P (op2)
6911 && GET_CODE (XEXP (value, 0)) == PLUS
6912 && REG_P (XEXP (XEXP (value, 0), 0))
6913 && REGNO (XEXP (XEXP (value, 0), 0)) >= FIRST_VIRTUAL_REGISTER
6914 && REGNO (XEXP (XEXP (value, 0), 0)) <= LAST_VIRTUAL_REGISTER)
6915 {
6916 rtx temp = expand_simple_binop (GET_MODE (value), code,
6917 XEXP (XEXP (value, 0), 0), op2,
6918 subtarget, 0, OPTAB_LIB_WIDEN);
6919 return expand_simple_binop (GET_MODE (value), code, temp,
6920 force_operand (XEXP (XEXP (value,
6921 0), 1), 0),
6922 target, 0, OPTAB_LIB_WIDEN);
6923 }
6924
6925 op1 = force_operand (XEXP (value, 0), subtarget);
6926 op2 = force_operand (op2, NULL_RTX);
6927 switch (code)
6928 {
6929 case MULT:
6930 return expand_mult (GET_MODE (value), op1, op2, target, 1);
6931 case DIV:
6932 if (!INTEGRAL_MODE_P (GET_MODE (value)))
6933 return expand_simple_binop (GET_MODE (value), code, op1, op2,
6934 target, 1, OPTAB_LIB_WIDEN);
6935 else
6936 return expand_divmod (0,
6937 FLOAT_MODE_P (GET_MODE (value))
6938 ? RDIV_EXPR : TRUNC_DIV_EXPR,
6939 GET_MODE (value), op1, op2, target, 0);
6940 case MOD:
6941 return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2,
6942 target, 0);
6943 case UDIV:
6944 return expand_divmod (0, TRUNC_DIV_EXPR, GET_MODE (value), op1, op2,
6945 target, 1);
6946 case UMOD:
6947 return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2,
6948 target, 1);
6949 case ASHIFTRT:
6950 return expand_simple_binop (GET_MODE (value), code, op1, op2,
6951 target, 0, OPTAB_LIB_WIDEN);
6952 default:
6953 return expand_simple_binop (GET_MODE (value), code, op1, op2,
6954 target, 1, OPTAB_LIB_WIDEN);
6955 }
6956 }
6957 if (UNARY_P (value))
6958 {
6959 if (!target)
6960 target = gen_reg_rtx (GET_MODE (value));
6961 op1 = force_operand (XEXP (value, 0), NULL_RTX);
6962 switch (code)
6963 {
6964 case ZERO_EXTEND:
6965 case SIGN_EXTEND:
6966 case TRUNCATE:
6967 case FLOAT_EXTEND:
6968 case FLOAT_TRUNCATE:
6969 convert_move (target, op1, code == ZERO_EXTEND);
6970 return target;
6971
6972 case FIX:
6973 case UNSIGNED_FIX:
6974 expand_fix (target, op1, code == UNSIGNED_FIX);
6975 return target;
6976
6977 case FLOAT:
6978 case UNSIGNED_FLOAT:
6979 expand_float (target, op1, code == UNSIGNED_FLOAT);
6980 return target;
6981
6982 default:
6983 return expand_simple_unop (GET_MODE (value), code, op1, target, 0);
6984 }
6985 }
6986
6987 #ifdef INSN_SCHEDULING
6988 /* On machines that have insn scheduling, we want all memory reference to be
6989 explicit, so we need to deal with such paradoxical SUBREGs. */
6990 if (paradoxical_subreg_p (value) && MEM_P (SUBREG_REG (value)))
6991 value
6992 = simplify_gen_subreg (GET_MODE (value),
6993 force_reg (GET_MODE (SUBREG_REG (value)),
6994 force_operand (SUBREG_REG (value),
6995 NULL_RTX)),
6996 GET_MODE (SUBREG_REG (value)),
6997 SUBREG_BYTE (value));
6998 #endif
6999
7000 return value;
7001 }
7002 \f
7003 /* Subroutine of expand_expr: return nonzero iff there is no way that
7004 EXP can reference X, which is being modified. TOP_P is nonzero if this
7005 call is going to be used to determine whether we need a temporary
7006 for EXP, as opposed to a recursive call to this function.
7007
7008 It is always safe for this routine to return zero since it merely
7009 searches for optimization opportunities. */
7010
7011 int
7012 safe_from_p (const_rtx x, tree exp, int top_p)
7013 {
7014 rtx exp_rtl = 0;
7015 int i, nops;
7016
7017 if (x == 0
7018 /* If EXP has varying size, we MUST use a target since we currently
7019 have no way of allocating temporaries of variable size
7020 (except for arrays that have TYPE_ARRAY_MAX_SIZE set).
7021 So we assume here that something at a higher level has prevented a
7022 clash. This is somewhat bogus, but the best we can do. Only
7023 do this when X is BLKmode and when we are at the top level. */
7024 || (top_p && TREE_TYPE (exp) != 0 && COMPLETE_TYPE_P (TREE_TYPE (exp))
7025 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) != INTEGER_CST
7026 && (TREE_CODE (TREE_TYPE (exp)) != ARRAY_TYPE
7027 || TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp)) == NULL_TREE
7028 || TREE_CODE (TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp)))
7029 != INTEGER_CST)
7030 && GET_MODE (x) == BLKmode)
7031 /* If X is in the outgoing argument area, it is always safe. */
7032 || (MEM_P (x)
7033 && (XEXP (x, 0) == virtual_outgoing_args_rtx
7034 || (GET_CODE (XEXP (x, 0)) == PLUS
7035 && XEXP (XEXP (x, 0), 0) == virtual_outgoing_args_rtx))))
7036 return 1;
7037
7038 /* If this is a subreg of a hard register, declare it unsafe, otherwise,
7039 find the underlying pseudo. */
7040 if (GET_CODE (x) == SUBREG)
7041 {
7042 x = SUBREG_REG (x);
7043 if (REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
7044 return 0;
7045 }
7046
7047 /* Now look at our tree code and possibly recurse. */
7048 switch (TREE_CODE_CLASS (TREE_CODE (exp)))
7049 {
7050 case tcc_declaration:
7051 exp_rtl = DECL_RTL_IF_SET (exp);
7052 break;
7053
7054 case tcc_constant:
7055 return 1;
7056
7057 case tcc_exceptional:
7058 if (TREE_CODE (exp) == TREE_LIST)
7059 {
7060 while (1)
7061 {
7062 if (TREE_VALUE (exp) && !safe_from_p (x, TREE_VALUE (exp), 0))
7063 return 0;
7064 exp = TREE_CHAIN (exp);
7065 if (!exp)
7066 return 1;
7067 if (TREE_CODE (exp) != TREE_LIST)
7068 return safe_from_p (x, exp, 0);
7069 }
7070 }
7071 else if (TREE_CODE (exp) == CONSTRUCTOR)
7072 {
7073 constructor_elt *ce;
7074 unsigned HOST_WIDE_INT idx;
7075
7076 FOR_EACH_VEC_ELT (constructor_elt, CONSTRUCTOR_ELTS (exp), idx, ce)
7077 if ((ce->index != NULL_TREE && !safe_from_p (x, ce->index, 0))
7078 || !safe_from_p (x, ce->value, 0))
7079 return 0;
7080 return 1;
7081 }
7082 else if (TREE_CODE (exp) == ERROR_MARK)
7083 return 1; /* An already-visited SAVE_EXPR? */
7084 else
7085 return 0;
7086
7087 case tcc_statement:
7088 /* The only case we look at here is the DECL_INITIAL inside a
7089 DECL_EXPR. */
7090 return (TREE_CODE (exp) != DECL_EXPR
7091 || TREE_CODE (DECL_EXPR_DECL (exp)) != VAR_DECL
7092 || !DECL_INITIAL (DECL_EXPR_DECL (exp))
7093 || safe_from_p (x, DECL_INITIAL (DECL_EXPR_DECL (exp)), 0));
7094
7095 case tcc_binary:
7096 case tcc_comparison:
7097 if (!safe_from_p (x, TREE_OPERAND (exp, 1), 0))
7098 return 0;
7099 /* Fall through. */
7100
7101 case tcc_unary:
7102 return safe_from_p (x, TREE_OPERAND (exp, 0), 0);
7103
7104 case tcc_expression:
7105 case tcc_reference:
7106 case tcc_vl_exp:
7107 /* Now do code-specific tests. EXP_RTL is set to any rtx we find in
7108 the expression. If it is set, we conflict iff we are that rtx or
7109 both are in memory. Otherwise, we check all operands of the
7110 expression recursively. */
7111
7112 switch (TREE_CODE (exp))
7113 {
7114 case ADDR_EXPR:
7115 /* If the operand is static or we are static, we can't conflict.
7116 Likewise if we don't conflict with the operand at all. */
7117 if (staticp (TREE_OPERAND (exp, 0))
7118 || TREE_STATIC (exp)
7119 || safe_from_p (x, TREE_OPERAND (exp, 0), 0))
7120 return 1;
7121
7122 /* Otherwise, the only way this can conflict is if we are taking
7123 the address of a DECL a that address if part of X, which is
7124 very rare. */
7125 exp = TREE_OPERAND (exp, 0);
7126 if (DECL_P (exp))
7127 {
7128 if (!DECL_RTL_SET_P (exp)
7129 || !MEM_P (DECL_RTL (exp)))
7130 return 0;
7131 else
7132 exp_rtl = XEXP (DECL_RTL (exp), 0);
7133 }
7134 break;
7135
7136 case MEM_REF:
7137 if (MEM_P (x)
7138 && alias_sets_conflict_p (MEM_ALIAS_SET (x),
7139 get_alias_set (exp)))
7140 return 0;
7141 break;
7142
7143 case CALL_EXPR:
7144 /* Assume that the call will clobber all hard registers and
7145 all of memory. */
7146 if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
7147 || MEM_P (x))
7148 return 0;
7149 break;
7150
7151 case WITH_CLEANUP_EXPR:
7152 case CLEANUP_POINT_EXPR:
7153 /* Lowered by gimplify.c. */
7154 gcc_unreachable ();
7155
7156 case SAVE_EXPR:
7157 return safe_from_p (x, TREE_OPERAND (exp, 0), 0);
7158
7159 default:
7160 break;
7161 }
7162
7163 /* If we have an rtx, we do not need to scan our operands. */
7164 if (exp_rtl)
7165 break;
7166
7167 nops = TREE_OPERAND_LENGTH (exp);
7168 for (i = 0; i < nops; i++)
7169 if (TREE_OPERAND (exp, i) != 0
7170 && ! safe_from_p (x, TREE_OPERAND (exp, i), 0))
7171 return 0;
7172
7173 break;
7174
7175 case tcc_type:
7176 /* Should never get a type here. */
7177 gcc_unreachable ();
7178 }
7179
7180 /* If we have an rtl, find any enclosed object. Then see if we conflict
7181 with it. */
7182 if (exp_rtl)
7183 {
7184 if (GET_CODE (exp_rtl) == SUBREG)
7185 {
7186 exp_rtl = SUBREG_REG (exp_rtl);
7187 if (REG_P (exp_rtl)
7188 && REGNO (exp_rtl) < FIRST_PSEUDO_REGISTER)
7189 return 0;
7190 }
7191
7192 /* If the rtl is X, then it is not safe. Otherwise, it is unless both
7193 are memory and they conflict. */
7194 return ! (rtx_equal_p (x, exp_rtl)
7195 || (MEM_P (x) && MEM_P (exp_rtl)
7196 && true_dependence (exp_rtl, VOIDmode, x,
7197 rtx_addr_varies_p)));
7198 }
7199
7200 /* If we reach here, it is safe. */
7201 return 1;
7202 }
7203
7204 \f
7205 /* Return the highest power of two that EXP is known to be a multiple of.
7206 This is used in updating alignment of MEMs in array references. */
7207
7208 unsigned HOST_WIDE_INT
7209 highest_pow2_factor (const_tree exp)
7210 {
7211 unsigned HOST_WIDE_INT c0, c1;
7212
7213 switch (TREE_CODE (exp))
7214 {
7215 case INTEGER_CST:
7216 /* We can find the lowest bit that's a one. If the low
7217 HOST_BITS_PER_WIDE_INT bits are zero, return BIGGEST_ALIGNMENT.
7218 We need to handle this case since we can find it in a COND_EXPR,
7219 a MIN_EXPR, or a MAX_EXPR. If the constant overflows, we have an
7220 erroneous program, so return BIGGEST_ALIGNMENT to avoid any
7221 later ICE. */
7222 if (TREE_OVERFLOW (exp))
7223 return BIGGEST_ALIGNMENT;
7224 else
7225 {
7226 /* Note: tree_low_cst is intentionally not used here,
7227 we don't care about the upper bits. */
7228 c0 = TREE_INT_CST_LOW (exp);
7229 c0 &= -c0;
7230 return c0 ? c0 : BIGGEST_ALIGNMENT;
7231 }
7232 break;
7233
7234 case PLUS_EXPR: case MINUS_EXPR: case MIN_EXPR: case MAX_EXPR:
7235 c0 = highest_pow2_factor (TREE_OPERAND (exp, 0));
7236 c1 = highest_pow2_factor (TREE_OPERAND (exp, 1));
7237 return MIN (c0, c1);
7238
7239 case MULT_EXPR:
7240 c0 = highest_pow2_factor (TREE_OPERAND (exp, 0));
7241 c1 = highest_pow2_factor (TREE_OPERAND (exp, 1));
7242 return c0 * c1;
7243
7244 case ROUND_DIV_EXPR: case TRUNC_DIV_EXPR: case FLOOR_DIV_EXPR:
7245 case CEIL_DIV_EXPR:
7246 if (integer_pow2p (TREE_OPERAND (exp, 1))
7247 && host_integerp (TREE_OPERAND (exp, 1), 1))
7248 {
7249 c0 = highest_pow2_factor (TREE_OPERAND (exp, 0));
7250 c1 = tree_low_cst (TREE_OPERAND (exp, 1), 1);
7251 return MAX (1, c0 / c1);
7252 }
7253 break;
7254
7255 case BIT_AND_EXPR:
7256 /* The highest power of two of a bit-and expression is the maximum of
7257 that of its operands. We typically get here for a complex LHS and
7258 a constant negative power of two on the RHS to force an explicit
7259 alignment, so don't bother looking at the LHS. */
7260 return highest_pow2_factor (TREE_OPERAND (exp, 1));
7261
7262 CASE_CONVERT:
7263 case SAVE_EXPR:
7264 return highest_pow2_factor (TREE_OPERAND (exp, 0));
7265
7266 case COMPOUND_EXPR:
7267 return highest_pow2_factor (TREE_OPERAND (exp, 1));
7268
7269 case COND_EXPR:
7270 c0 = highest_pow2_factor (TREE_OPERAND (exp, 1));
7271 c1 = highest_pow2_factor (TREE_OPERAND (exp, 2));
7272 return MIN (c0, c1);
7273
7274 default:
7275 break;
7276 }
7277
7278 return 1;
7279 }
7280
7281 /* Similar, except that the alignment requirements of TARGET are
7282 taken into account. Assume it is at least as aligned as its
7283 type, unless it is a COMPONENT_REF in which case the layout of
7284 the structure gives the alignment. */
7285
7286 static unsigned HOST_WIDE_INT
7287 highest_pow2_factor_for_target (const_tree target, const_tree exp)
7288 {
7289 unsigned HOST_WIDE_INT talign = target_align (target) / BITS_PER_UNIT;
7290 unsigned HOST_WIDE_INT factor = highest_pow2_factor (exp);
7291
7292 return MAX (factor, talign);
7293 }
7294 \f
7295 /* Subroutine of expand_expr. Expand the two operands of a binary
7296 expression EXP0 and EXP1 placing the results in OP0 and OP1.
7297 The value may be stored in TARGET if TARGET is nonzero. The
7298 MODIFIER argument is as documented by expand_expr. */
7299
7300 static void
7301 expand_operands (tree exp0, tree exp1, rtx target, rtx *op0, rtx *op1,
7302 enum expand_modifier modifier)
7303 {
7304 if (! safe_from_p (target, exp1, 1))
7305 target = 0;
7306 if (operand_equal_p (exp0, exp1, 0))
7307 {
7308 *op0 = expand_expr (exp0, target, VOIDmode, modifier);
7309 *op1 = copy_rtx (*op0);
7310 }
7311 else
7312 {
7313 /* If we need to preserve evaluation order, copy exp0 into its own
7314 temporary variable so that it can't be clobbered by exp1. */
7315 if (flag_evaluation_order && TREE_SIDE_EFFECTS (exp1))
7316 exp0 = save_expr (exp0);
7317 *op0 = expand_expr (exp0, target, VOIDmode, modifier);
7318 *op1 = expand_expr (exp1, NULL_RTX, VOIDmode, modifier);
7319 }
7320 }
7321
7322 \f
7323 /* Return a MEM that contains constant EXP. DEFER is as for
7324 output_constant_def and MODIFIER is as for expand_expr. */
7325
7326 static rtx
7327 expand_expr_constant (tree exp, int defer, enum expand_modifier modifier)
7328 {
7329 rtx mem;
7330
7331 mem = output_constant_def (exp, defer);
7332 if (modifier != EXPAND_INITIALIZER)
7333 mem = use_anchored_address (mem);
7334 return mem;
7335 }
7336
7337 /* A subroutine of expand_expr_addr_expr. Evaluate the address of EXP.
7338 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
7339
7340 static rtx
7341 expand_expr_addr_expr_1 (tree exp, rtx target, enum machine_mode tmode,
7342 enum expand_modifier modifier, addr_space_t as)
7343 {
7344 rtx result, subtarget;
7345 tree inner, offset;
7346 HOST_WIDE_INT bitsize, bitpos;
7347 int volatilep, unsignedp;
7348 enum machine_mode mode1;
7349
7350 /* If we are taking the address of a constant and are at the top level,
7351 we have to use output_constant_def since we can't call force_const_mem
7352 at top level. */
7353 /* ??? This should be considered a front-end bug. We should not be
7354 generating ADDR_EXPR of something that isn't an LVALUE. The only
7355 exception here is STRING_CST. */
7356 if (CONSTANT_CLASS_P (exp))
7357 return XEXP (expand_expr_constant (exp, 0, modifier), 0);
7358
7359 /* Everything must be something allowed by is_gimple_addressable. */
7360 switch (TREE_CODE (exp))
7361 {
7362 case INDIRECT_REF:
7363 /* This case will happen via recursion for &a->b. */
7364 return expand_expr (TREE_OPERAND (exp, 0), target, tmode, modifier);
7365
7366 case MEM_REF:
7367 {
7368 tree tem = TREE_OPERAND (exp, 0);
7369 if (!integer_zerop (TREE_OPERAND (exp, 1)))
7370 tem = fold_build_pointer_plus (tem, TREE_OPERAND (exp, 1));
7371 return expand_expr (tem, target, tmode, modifier);
7372 }
7373
7374 case CONST_DECL:
7375 /* Expand the initializer like constants above. */
7376 return XEXP (expand_expr_constant (DECL_INITIAL (exp), 0, modifier), 0);
7377
7378 case REALPART_EXPR:
7379 /* The real part of the complex number is always first, therefore
7380 the address is the same as the address of the parent object. */
7381 offset = 0;
7382 bitpos = 0;
7383 inner = TREE_OPERAND (exp, 0);
7384 break;
7385
7386 case IMAGPART_EXPR:
7387 /* The imaginary part of the complex number is always second.
7388 The expression is therefore always offset by the size of the
7389 scalar type. */
7390 offset = 0;
7391 bitpos = GET_MODE_BITSIZE (TYPE_MODE (TREE_TYPE (exp)));
7392 inner = TREE_OPERAND (exp, 0);
7393 break;
7394
7395 default:
7396 /* If the object is a DECL, then expand it for its rtl. Don't bypass
7397 expand_expr, as that can have various side effects; LABEL_DECLs for
7398 example, may not have their DECL_RTL set yet. Expand the rtl of
7399 CONSTRUCTORs too, which should yield a memory reference for the
7400 constructor's contents. Assume language specific tree nodes can
7401 be expanded in some interesting way. */
7402 gcc_assert (TREE_CODE (exp) < LAST_AND_UNUSED_TREE_CODE);
7403 if (DECL_P (exp)
7404 || TREE_CODE (exp) == CONSTRUCTOR
7405 || TREE_CODE (exp) == COMPOUND_LITERAL_EXPR)
7406 {
7407 result = expand_expr (exp, target, tmode,
7408 modifier == EXPAND_INITIALIZER
7409 ? EXPAND_INITIALIZER : EXPAND_CONST_ADDRESS);
7410
7411 /* If the DECL isn't in memory, then the DECL wasn't properly
7412 marked TREE_ADDRESSABLE, which will be either a front-end
7413 or a tree optimizer bug. */
7414
7415 if (TREE_ADDRESSABLE (exp)
7416 && ! MEM_P (result)
7417 && ! targetm.calls.allocate_stack_slots_for_args())
7418 {
7419 error ("local frame unavailable (naked function?)");
7420 return result;
7421 }
7422 else
7423 gcc_assert (MEM_P (result));
7424 result = XEXP (result, 0);
7425
7426 /* ??? Is this needed anymore? */
7427 if (DECL_P (exp) && !TREE_USED (exp) == 0)
7428 {
7429 assemble_external (exp);
7430 TREE_USED (exp) = 1;
7431 }
7432
7433 if (modifier != EXPAND_INITIALIZER
7434 && modifier != EXPAND_CONST_ADDRESS
7435 && modifier != EXPAND_SUM)
7436 result = force_operand (result, target);
7437 return result;
7438 }
7439
7440 /* Pass FALSE as the last argument to get_inner_reference although
7441 we are expanding to RTL. The rationale is that we know how to
7442 handle "aligning nodes" here: we can just bypass them because
7443 they won't change the final object whose address will be returned
7444 (they actually exist only for that purpose). */
7445 inner = get_inner_reference (exp, &bitsize, &bitpos, &offset,
7446 &mode1, &unsignedp, &volatilep, false);
7447 break;
7448 }
7449
7450 /* We must have made progress. */
7451 gcc_assert (inner != exp);
7452
7453 subtarget = offset || bitpos ? NULL_RTX : target;
7454 /* For VIEW_CONVERT_EXPR, where the outer alignment is bigger than
7455 inner alignment, force the inner to be sufficiently aligned. */
7456 if (CONSTANT_CLASS_P (inner)
7457 && TYPE_ALIGN (TREE_TYPE (inner)) < TYPE_ALIGN (TREE_TYPE (exp)))
7458 {
7459 inner = copy_node (inner);
7460 TREE_TYPE (inner) = copy_node (TREE_TYPE (inner));
7461 TYPE_ALIGN (TREE_TYPE (inner)) = TYPE_ALIGN (TREE_TYPE (exp));
7462 TYPE_USER_ALIGN (TREE_TYPE (inner)) = 1;
7463 }
7464 result = expand_expr_addr_expr_1 (inner, subtarget, tmode, modifier, as);
7465
7466 if (offset)
7467 {
7468 rtx tmp;
7469
7470 if (modifier != EXPAND_NORMAL)
7471 result = force_operand (result, NULL);
7472 tmp = expand_expr (offset, NULL_RTX, tmode,
7473 modifier == EXPAND_INITIALIZER
7474 ? EXPAND_INITIALIZER : EXPAND_NORMAL);
7475
7476 result = convert_memory_address_addr_space (tmode, result, as);
7477 tmp = convert_memory_address_addr_space (tmode, tmp, as);
7478
7479 if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
7480 result = simplify_gen_binary (PLUS, tmode, result, tmp);
7481 else
7482 {
7483 subtarget = bitpos ? NULL_RTX : target;
7484 result = expand_simple_binop (tmode, PLUS, result, tmp, subtarget,
7485 1, OPTAB_LIB_WIDEN);
7486 }
7487 }
7488
7489 if (bitpos)
7490 {
7491 /* Someone beforehand should have rejected taking the address
7492 of such an object. */
7493 gcc_assert ((bitpos % BITS_PER_UNIT) == 0);
7494
7495 result = plus_constant (result, bitpos / BITS_PER_UNIT);
7496 if (modifier < EXPAND_SUM)
7497 result = force_operand (result, target);
7498 }
7499
7500 return result;
7501 }
7502
7503 /* A subroutine of expand_expr. Evaluate EXP, which is an ADDR_EXPR.
7504 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
7505
7506 static rtx
7507 expand_expr_addr_expr (tree exp, rtx target, enum machine_mode tmode,
7508 enum expand_modifier modifier)
7509 {
7510 addr_space_t as = ADDR_SPACE_GENERIC;
7511 enum machine_mode address_mode = Pmode;
7512 enum machine_mode pointer_mode = ptr_mode;
7513 enum machine_mode rmode;
7514 rtx result;
7515
7516 /* Target mode of VOIDmode says "whatever's natural". */
7517 if (tmode == VOIDmode)
7518 tmode = TYPE_MODE (TREE_TYPE (exp));
7519
7520 if (POINTER_TYPE_P (TREE_TYPE (exp)))
7521 {
7522 as = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (exp)));
7523 address_mode = targetm.addr_space.address_mode (as);
7524 pointer_mode = targetm.addr_space.pointer_mode (as);
7525 }
7526
7527 /* We can get called with some Weird Things if the user does silliness
7528 like "(short) &a". In that case, convert_memory_address won't do
7529 the right thing, so ignore the given target mode. */
7530 if (tmode != address_mode && tmode != pointer_mode)
7531 tmode = address_mode;
7532
7533 result = expand_expr_addr_expr_1 (TREE_OPERAND (exp, 0), target,
7534 tmode, modifier, as);
7535
7536 /* Despite expand_expr claims concerning ignoring TMODE when not
7537 strictly convenient, stuff breaks if we don't honor it. Note
7538 that combined with the above, we only do this for pointer modes. */
7539 rmode = GET_MODE (result);
7540 if (rmode == VOIDmode)
7541 rmode = tmode;
7542 if (rmode != tmode)
7543 result = convert_memory_address_addr_space (tmode, result, as);
7544
7545 return result;
7546 }
7547
7548 /* Generate code for computing CONSTRUCTOR EXP.
7549 An rtx for the computed value is returned. If AVOID_TEMP_MEM
7550 is TRUE, instead of creating a temporary variable in memory
7551 NULL is returned and the caller needs to handle it differently. */
7552
7553 static rtx
7554 expand_constructor (tree exp, rtx target, enum expand_modifier modifier,
7555 bool avoid_temp_mem)
7556 {
7557 tree type = TREE_TYPE (exp);
7558 enum machine_mode mode = TYPE_MODE (type);
7559
7560 /* Try to avoid creating a temporary at all. This is possible
7561 if all of the initializer is zero.
7562 FIXME: try to handle all [0..255] initializers we can handle
7563 with memset. */
7564 if (TREE_STATIC (exp)
7565 && !TREE_ADDRESSABLE (exp)
7566 && target != 0 && mode == BLKmode
7567 && all_zeros_p (exp))
7568 {
7569 clear_storage (target, expr_size (exp), BLOCK_OP_NORMAL);
7570 return target;
7571 }
7572
7573 /* All elts simple constants => refer to a constant in memory. But
7574 if this is a non-BLKmode mode, let it store a field at a time
7575 since that should make a CONST_INT or CONST_DOUBLE when we
7576 fold. Likewise, if we have a target we can use, it is best to
7577 store directly into the target unless the type is large enough
7578 that memcpy will be used. If we are making an initializer and
7579 all operands are constant, put it in memory as well.
7580
7581 FIXME: Avoid trying to fill vector constructors piece-meal.
7582 Output them with output_constant_def below unless we're sure
7583 they're zeros. This should go away when vector initializers
7584 are treated like VECTOR_CST instead of arrays. */
7585 if ((TREE_STATIC (exp)
7586 && ((mode == BLKmode
7587 && ! (target != 0 && safe_from_p (target, exp, 1)))
7588 || TREE_ADDRESSABLE (exp)
7589 || (host_integerp (TYPE_SIZE_UNIT (type), 1)
7590 && (! MOVE_BY_PIECES_P
7591 (tree_low_cst (TYPE_SIZE_UNIT (type), 1),
7592 TYPE_ALIGN (type)))
7593 && ! mostly_zeros_p (exp))))
7594 || ((modifier == EXPAND_INITIALIZER || modifier == EXPAND_CONST_ADDRESS)
7595 && TREE_CONSTANT (exp)))
7596 {
7597 rtx constructor;
7598
7599 if (avoid_temp_mem)
7600 return NULL_RTX;
7601
7602 constructor = expand_expr_constant (exp, 1, modifier);
7603
7604 if (modifier != EXPAND_CONST_ADDRESS
7605 && modifier != EXPAND_INITIALIZER
7606 && modifier != EXPAND_SUM)
7607 constructor = validize_mem (constructor);
7608
7609 return constructor;
7610 }
7611
7612 /* Handle calls that pass values in multiple non-contiguous
7613 locations. The Irix 6 ABI has examples of this. */
7614 if (target == 0 || ! safe_from_p (target, exp, 1)
7615 || GET_CODE (target) == PARALLEL || modifier == EXPAND_STACK_PARM)
7616 {
7617 if (avoid_temp_mem)
7618 return NULL_RTX;
7619
7620 target
7621 = assign_temp (build_qualified_type (type, (TYPE_QUALS (type)
7622 | (TREE_READONLY (exp)
7623 * TYPE_QUAL_CONST))),
7624 0, TREE_ADDRESSABLE (exp), 1);
7625 }
7626
7627 store_constructor (exp, target, 0, int_expr_size (exp));
7628 return target;
7629 }
7630
7631
7632 /* expand_expr: generate code for computing expression EXP.
7633 An rtx for the computed value is returned. The value is never null.
7634 In the case of a void EXP, const0_rtx is returned.
7635
7636 The value may be stored in TARGET if TARGET is nonzero.
7637 TARGET is just a suggestion; callers must assume that
7638 the rtx returned may not be the same as TARGET.
7639
7640 If TARGET is CONST0_RTX, it means that the value will be ignored.
7641
7642 If TMODE is not VOIDmode, it suggests generating the
7643 result in mode TMODE. But this is done only when convenient.
7644 Otherwise, TMODE is ignored and the value generated in its natural mode.
7645 TMODE is just a suggestion; callers must assume that
7646 the rtx returned may not have mode TMODE.
7647
7648 Note that TARGET may have neither TMODE nor MODE. In that case, it
7649 probably will not be used.
7650
7651 If MODIFIER is EXPAND_SUM then when EXP is an addition
7652 we can return an rtx of the form (MULT (REG ...) (CONST_INT ...))
7653 or a nest of (PLUS ...) and (MINUS ...) where the terms are
7654 products as above, or REG or MEM, or constant.
7655 Ordinarily in such cases we would output mul or add instructions
7656 and then return a pseudo reg containing the sum.
7657
7658 EXPAND_INITIALIZER is much like EXPAND_SUM except that
7659 it also marks a label as absolutely required (it can't be dead).
7660 It also makes a ZERO_EXTEND or SIGN_EXTEND instead of emitting extend insns.
7661 This is used for outputting expressions used in initializers.
7662
7663 EXPAND_CONST_ADDRESS says that it is okay to return a MEM
7664 with a constant address even if that address is not normally legitimate.
7665 EXPAND_INITIALIZER and EXPAND_SUM also have this effect.
7666
7667 EXPAND_STACK_PARM is used when expanding to a TARGET on the stack for
7668 a call parameter. Such targets require special care as we haven't yet
7669 marked TARGET so that it's safe from being trashed by libcalls. We
7670 don't want to use TARGET for anything but the final result;
7671 Intermediate values must go elsewhere. Additionally, calls to
7672 emit_block_move will be flagged with BLOCK_OP_CALL_PARM.
7673
7674 If EXP is a VAR_DECL whose DECL_RTL was a MEM with an invalid
7675 address, and ALT_RTL is non-NULL, then *ALT_RTL is set to the
7676 DECL_RTL of the VAR_DECL. *ALT_RTL is also set if EXP is a
7677 COMPOUND_EXPR whose second argument is such a VAR_DECL, and so on
7678 recursively. */
7679
7680 rtx
7681 expand_expr_real (tree exp, rtx target, enum machine_mode tmode,
7682 enum expand_modifier modifier, rtx *alt_rtl)
7683 {
7684 rtx ret;
7685
7686 /* Handle ERROR_MARK before anybody tries to access its type. */
7687 if (TREE_CODE (exp) == ERROR_MARK
7688 || (TREE_CODE (TREE_TYPE (exp)) == ERROR_MARK))
7689 {
7690 ret = CONST0_RTX (tmode);
7691 return ret ? ret : const0_rtx;
7692 }
7693
7694 /* If this is an expression of some kind and it has an associated line
7695 number, then emit the line number before expanding the expression.
7696
7697 We need to save and restore the file and line information so that
7698 errors discovered during expansion are emitted with the right
7699 information. It would be better of the diagnostic routines
7700 used the file/line information embedded in the tree nodes rather
7701 than globals. */
7702 if (cfun && EXPR_HAS_LOCATION (exp))
7703 {
7704 location_t saved_location = input_location;
7705 location_t saved_curr_loc = get_curr_insn_source_location ();
7706 tree saved_block = get_curr_insn_block ();
7707 input_location = EXPR_LOCATION (exp);
7708 set_curr_insn_source_location (input_location);
7709
7710 /* Record where the insns produced belong. */
7711 set_curr_insn_block (TREE_BLOCK (exp));
7712
7713 ret = expand_expr_real_1 (exp, target, tmode, modifier, alt_rtl);
7714
7715 input_location = saved_location;
7716 set_curr_insn_block (saved_block);
7717 set_curr_insn_source_location (saved_curr_loc);
7718 }
7719 else
7720 {
7721 ret = expand_expr_real_1 (exp, target, tmode, modifier, alt_rtl);
7722 }
7723
7724 return ret;
7725 }
7726
7727 rtx
7728 expand_expr_real_2 (sepops ops, rtx target, enum machine_mode tmode,
7729 enum expand_modifier modifier)
7730 {
7731 rtx op0, op1, op2, temp;
7732 tree type;
7733 int unsignedp;
7734 enum machine_mode mode;
7735 enum tree_code code = ops->code;
7736 optab this_optab;
7737 rtx subtarget, original_target;
7738 int ignore;
7739 bool reduce_bit_field;
7740 location_t loc = ops->location;
7741 tree treeop0, treeop1, treeop2;
7742 #define REDUCE_BIT_FIELD(expr) (reduce_bit_field \
7743 ? reduce_to_bit_field_precision ((expr), \
7744 target, \
7745 type) \
7746 : (expr))
7747
7748 type = ops->type;
7749 mode = TYPE_MODE (type);
7750 unsignedp = TYPE_UNSIGNED (type);
7751
7752 treeop0 = ops->op0;
7753 treeop1 = ops->op1;
7754 treeop2 = ops->op2;
7755
7756 /* We should be called only on simple (binary or unary) expressions,
7757 exactly those that are valid in gimple expressions that aren't
7758 GIMPLE_SINGLE_RHS (or invalid). */
7759 gcc_assert (get_gimple_rhs_class (code) == GIMPLE_UNARY_RHS
7760 || get_gimple_rhs_class (code) == GIMPLE_BINARY_RHS
7761 || get_gimple_rhs_class (code) == GIMPLE_TERNARY_RHS);
7762
7763 ignore = (target == const0_rtx
7764 || ((CONVERT_EXPR_CODE_P (code)
7765 || code == COND_EXPR || code == VIEW_CONVERT_EXPR)
7766 && TREE_CODE (type) == VOID_TYPE));
7767
7768 /* We should be called only if we need the result. */
7769 gcc_assert (!ignore);
7770
7771 /* An operation in what may be a bit-field type needs the
7772 result to be reduced to the precision of the bit-field type,
7773 which is narrower than that of the type's mode. */
7774 reduce_bit_field = (INTEGRAL_TYPE_P (type)
7775 && GET_MODE_PRECISION (mode) > TYPE_PRECISION (type));
7776
7777 if (reduce_bit_field && modifier == EXPAND_STACK_PARM)
7778 target = 0;
7779
7780 /* Use subtarget as the target for operand 0 of a binary operation. */
7781 subtarget = get_subtarget (target);
7782 original_target = target;
7783
7784 switch (code)
7785 {
7786 case NON_LVALUE_EXPR:
7787 case PAREN_EXPR:
7788 CASE_CONVERT:
7789 if (treeop0 == error_mark_node)
7790 return const0_rtx;
7791
7792 if (TREE_CODE (type) == UNION_TYPE)
7793 {
7794 tree valtype = TREE_TYPE (treeop0);
7795
7796 /* If both input and output are BLKmode, this conversion isn't doing
7797 anything except possibly changing memory attribute. */
7798 if (mode == BLKmode && TYPE_MODE (valtype) == BLKmode)
7799 {
7800 rtx result = expand_expr (treeop0, target, tmode,
7801 modifier);
7802
7803 result = copy_rtx (result);
7804 set_mem_attributes (result, type, 0);
7805 return result;
7806 }
7807
7808 if (target == 0)
7809 {
7810 if (TYPE_MODE (type) != BLKmode)
7811 target = gen_reg_rtx (TYPE_MODE (type));
7812 else
7813 target = assign_temp (type, 0, 1, 1);
7814 }
7815
7816 if (MEM_P (target))
7817 /* Store data into beginning of memory target. */
7818 store_expr (treeop0,
7819 adjust_address (target, TYPE_MODE (valtype), 0),
7820 modifier == EXPAND_STACK_PARM,
7821 false);
7822
7823 else
7824 {
7825 gcc_assert (REG_P (target));
7826
7827 /* Store this field into a union of the proper type. */
7828 store_field (target,
7829 MIN ((int_size_in_bytes (TREE_TYPE
7830 (treeop0))
7831 * BITS_PER_UNIT),
7832 (HOST_WIDE_INT) GET_MODE_BITSIZE (mode)),
7833 0, 0, 0, TYPE_MODE (valtype), treeop0,
7834 type, 0, false);
7835 }
7836
7837 /* Return the entire union. */
7838 return target;
7839 }
7840
7841 if (mode == TYPE_MODE (TREE_TYPE (treeop0)))
7842 {
7843 op0 = expand_expr (treeop0, target, VOIDmode,
7844 modifier);
7845
7846 /* If the signedness of the conversion differs and OP0 is
7847 a promoted SUBREG, clear that indication since we now
7848 have to do the proper extension. */
7849 if (TYPE_UNSIGNED (TREE_TYPE (treeop0)) != unsignedp
7850 && GET_CODE (op0) == SUBREG)
7851 SUBREG_PROMOTED_VAR_P (op0) = 0;
7852
7853 return REDUCE_BIT_FIELD (op0);
7854 }
7855
7856 op0 = expand_expr (treeop0, NULL_RTX, mode,
7857 modifier == EXPAND_SUM ? EXPAND_NORMAL : modifier);
7858 if (GET_MODE (op0) == mode)
7859 ;
7860
7861 /* If OP0 is a constant, just convert it into the proper mode. */
7862 else if (CONSTANT_P (op0))
7863 {
7864 tree inner_type = TREE_TYPE (treeop0);
7865 enum machine_mode inner_mode = GET_MODE (op0);
7866
7867 if (inner_mode == VOIDmode)
7868 inner_mode = TYPE_MODE (inner_type);
7869
7870 if (modifier == EXPAND_INITIALIZER)
7871 op0 = simplify_gen_subreg (mode, op0, inner_mode,
7872 subreg_lowpart_offset (mode,
7873 inner_mode));
7874 else
7875 op0= convert_modes (mode, inner_mode, op0,
7876 TYPE_UNSIGNED (inner_type));
7877 }
7878
7879 else if (modifier == EXPAND_INITIALIZER)
7880 op0 = gen_rtx_fmt_e (unsignedp ? ZERO_EXTEND : SIGN_EXTEND, mode, op0);
7881
7882 else if (target == 0)
7883 op0 = convert_to_mode (mode, op0,
7884 TYPE_UNSIGNED (TREE_TYPE
7885 (treeop0)));
7886 else
7887 {
7888 convert_move (target, op0,
7889 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
7890 op0 = target;
7891 }
7892
7893 return REDUCE_BIT_FIELD (op0);
7894
7895 case ADDR_SPACE_CONVERT_EXPR:
7896 {
7897 tree treeop0_type = TREE_TYPE (treeop0);
7898 addr_space_t as_to;
7899 addr_space_t as_from;
7900
7901 gcc_assert (POINTER_TYPE_P (type));
7902 gcc_assert (POINTER_TYPE_P (treeop0_type));
7903
7904 as_to = TYPE_ADDR_SPACE (TREE_TYPE (type));
7905 as_from = TYPE_ADDR_SPACE (TREE_TYPE (treeop0_type));
7906
7907 /* Conversions between pointers to the same address space should
7908 have been implemented via CONVERT_EXPR / NOP_EXPR. */
7909 gcc_assert (as_to != as_from);
7910
7911 /* Ask target code to handle conversion between pointers
7912 to overlapping address spaces. */
7913 if (targetm.addr_space.subset_p (as_to, as_from)
7914 || targetm.addr_space.subset_p (as_from, as_to))
7915 {
7916 op0 = expand_expr (treeop0, NULL_RTX, VOIDmode, modifier);
7917 op0 = targetm.addr_space.convert (op0, treeop0_type, type);
7918 gcc_assert (op0);
7919 return op0;
7920 }
7921
7922 /* For disjoint address spaces, converting anything but
7923 a null pointer invokes undefined behaviour. We simply
7924 always return a null pointer here. */
7925 return CONST0_RTX (mode);
7926 }
7927
7928 case POINTER_PLUS_EXPR:
7929 /* Even though the sizetype mode and the pointer's mode can be different
7930 expand is able to handle this correctly and get the correct result out
7931 of the PLUS_EXPR code. */
7932 /* Make sure to sign-extend the sizetype offset in a POINTER_PLUS_EXPR
7933 if sizetype precision is smaller than pointer precision. */
7934 if (TYPE_PRECISION (sizetype) < TYPE_PRECISION (type))
7935 treeop1 = fold_convert_loc (loc, type,
7936 fold_convert_loc (loc, ssizetype,
7937 treeop1));
7938 case PLUS_EXPR:
7939 /* If we are adding a constant, a VAR_DECL that is sp, fp, or ap, and
7940 something else, make sure we add the register to the constant and
7941 then to the other thing. This case can occur during strength
7942 reduction and doing it this way will produce better code if the
7943 frame pointer or argument pointer is eliminated.
7944
7945 fold-const.c will ensure that the constant is always in the inner
7946 PLUS_EXPR, so the only case we need to do anything about is if
7947 sp, ap, or fp is our second argument, in which case we must swap
7948 the innermost first argument and our second argument. */
7949
7950 if (TREE_CODE (treeop0) == PLUS_EXPR
7951 && TREE_CODE (TREE_OPERAND (treeop0, 1)) == INTEGER_CST
7952 && TREE_CODE (treeop1) == VAR_DECL
7953 && (DECL_RTL (treeop1) == frame_pointer_rtx
7954 || DECL_RTL (treeop1) == stack_pointer_rtx
7955 || DECL_RTL (treeop1) == arg_pointer_rtx))
7956 {
7957 tree t = treeop1;
7958
7959 treeop1 = TREE_OPERAND (treeop0, 0);
7960 TREE_OPERAND (treeop0, 0) = t;
7961 }
7962
7963 /* If the result is to be ptr_mode and we are adding an integer to
7964 something, we might be forming a constant. So try to use
7965 plus_constant. If it produces a sum and we can't accept it,
7966 use force_operand. This allows P = &ARR[const] to generate
7967 efficient code on machines where a SYMBOL_REF is not a valid
7968 address.
7969
7970 If this is an EXPAND_SUM call, always return the sum. */
7971 if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER
7972 || (mode == ptr_mode && (unsignedp || ! flag_trapv)))
7973 {
7974 if (modifier == EXPAND_STACK_PARM)
7975 target = 0;
7976 if (TREE_CODE (treeop0) == INTEGER_CST
7977 && GET_MODE_PRECISION (mode) <= HOST_BITS_PER_WIDE_INT
7978 && TREE_CONSTANT (treeop1))
7979 {
7980 rtx constant_part;
7981
7982 op1 = expand_expr (treeop1, subtarget, VOIDmode,
7983 EXPAND_SUM);
7984 /* Use immed_double_const to ensure that the constant is
7985 truncated according to the mode of OP1, then sign extended
7986 to a HOST_WIDE_INT. Using the constant directly can result
7987 in non-canonical RTL in a 64x32 cross compile. */
7988 constant_part
7989 = immed_double_const (TREE_INT_CST_LOW (treeop0),
7990 (HOST_WIDE_INT) 0,
7991 TYPE_MODE (TREE_TYPE (treeop1)));
7992 op1 = plus_constant (op1, INTVAL (constant_part));
7993 if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
7994 op1 = force_operand (op1, target);
7995 return REDUCE_BIT_FIELD (op1);
7996 }
7997
7998 else if (TREE_CODE (treeop1) == INTEGER_CST
7999 && GET_MODE_PRECISION (mode) <= HOST_BITS_PER_WIDE_INT
8000 && TREE_CONSTANT (treeop0))
8001 {
8002 rtx constant_part;
8003
8004 op0 = expand_expr (treeop0, subtarget, VOIDmode,
8005 (modifier == EXPAND_INITIALIZER
8006 ? EXPAND_INITIALIZER : EXPAND_SUM));
8007 if (! CONSTANT_P (op0))
8008 {
8009 op1 = expand_expr (treeop1, NULL_RTX,
8010 VOIDmode, modifier);
8011 /* Return a PLUS if modifier says it's OK. */
8012 if (modifier == EXPAND_SUM
8013 || modifier == EXPAND_INITIALIZER)
8014 return simplify_gen_binary (PLUS, mode, op0, op1);
8015 goto binop2;
8016 }
8017 /* Use immed_double_const to ensure that the constant is
8018 truncated according to the mode of OP1, then sign extended
8019 to a HOST_WIDE_INT. Using the constant directly can result
8020 in non-canonical RTL in a 64x32 cross compile. */
8021 constant_part
8022 = immed_double_const (TREE_INT_CST_LOW (treeop1),
8023 (HOST_WIDE_INT) 0,
8024 TYPE_MODE (TREE_TYPE (treeop0)));
8025 op0 = plus_constant (op0, INTVAL (constant_part));
8026 if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8027 op0 = force_operand (op0, target);
8028 return REDUCE_BIT_FIELD (op0);
8029 }
8030 }
8031
8032 /* Use TER to expand pointer addition of a negated value
8033 as pointer subtraction. */
8034 if ((POINTER_TYPE_P (TREE_TYPE (treeop0))
8035 || (TREE_CODE (TREE_TYPE (treeop0)) == VECTOR_TYPE
8036 && POINTER_TYPE_P (TREE_TYPE (TREE_TYPE (treeop0)))))
8037 && TREE_CODE (treeop1) == SSA_NAME
8038 && TYPE_MODE (TREE_TYPE (treeop0))
8039 == TYPE_MODE (TREE_TYPE (treeop1)))
8040 {
8041 gimple def = get_def_for_expr (treeop1, NEGATE_EXPR);
8042 if (def)
8043 {
8044 treeop1 = gimple_assign_rhs1 (def);
8045 code = MINUS_EXPR;
8046 goto do_minus;
8047 }
8048 }
8049
8050 /* No sense saving up arithmetic to be done
8051 if it's all in the wrong mode to form part of an address.
8052 And force_operand won't know whether to sign-extend or
8053 zero-extend. */
8054 if ((modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8055 || mode != ptr_mode)
8056 {
8057 expand_operands (treeop0, treeop1,
8058 subtarget, &op0, &op1, EXPAND_NORMAL);
8059 if (op0 == const0_rtx)
8060 return op1;
8061 if (op1 == const0_rtx)
8062 return op0;
8063 goto binop2;
8064 }
8065
8066 expand_operands (treeop0, treeop1,
8067 subtarget, &op0, &op1, modifier);
8068 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1));
8069
8070 case MINUS_EXPR:
8071 do_minus:
8072 /* For initializers, we are allowed to return a MINUS of two
8073 symbolic constants. Here we handle all cases when both operands
8074 are constant. */
8075 /* Handle difference of two symbolic constants,
8076 for the sake of an initializer. */
8077 if ((modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
8078 && really_constant_p (treeop0)
8079 && really_constant_p (treeop1))
8080 {
8081 expand_operands (treeop0, treeop1,
8082 NULL_RTX, &op0, &op1, modifier);
8083
8084 /* If the last operand is a CONST_INT, use plus_constant of
8085 the negated constant. Else make the MINUS. */
8086 if (CONST_INT_P (op1))
8087 return REDUCE_BIT_FIELD (plus_constant (op0, - INTVAL (op1)));
8088 else
8089 return REDUCE_BIT_FIELD (gen_rtx_MINUS (mode, op0, op1));
8090 }
8091
8092 /* No sense saving up arithmetic to be done
8093 if it's all in the wrong mode to form part of an address.
8094 And force_operand won't know whether to sign-extend or
8095 zero-extend. */
8096 if ((modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8097 || mode != ptr_mode)
8098 goto binop;
8099
8100 expand_operands (treeop0, treeop1,
8101 subtarget, &op0, &op1, modifier);
8102
8103 /* Convert A - const to A + (-const). */
8104 if (CONST_INT_P (op1))
8105 {
8106 op1 = negate_rtx (mode, op1);
8107 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1));
8108 }
8109
8110 goto binop2;
8111
8112 case WIDEN_MULT_PLUS_EXPR:
8113 case WIDEN_MULT_MINUS_EXPR:
8114 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8115 op2 = expand_normal (treeop2);
8116 target = expand_widen_pattern_expr (ops, op0, op1, op2,
8117 target, unsignedp);
8118 return target;
8119
8120 case WIDEN_MULT_EXPR:
8121 /* If first operand is constant, swap them.
8122 Thus the following special case checks need only
8123 check the second operand. */
8124 if (TREE_CODE (treeop0) == INTEGER_CST)
8125 {
8126 tree t1 = treeop0;
8127 treeop0 = treeop1;
8128 treeop1 = t1;
8129 }
8130
8131 /* First, check if we have a multiplication of one signed and one
8132 unsigned operand. */
8133 if (TREE_CODE (treeop1) != INTEGER_CST
8134 && (TYPE_UNSIGNED (TREE_TYPE (treeop0))
8135 != TYPE_UNSIGNED (TREE_TYPE (treeop1))))
8136 {
8137 enum machine_mode innermode = TYPE_MODE (TREE_TYPE (treeop0));
8138 this_optab = usmul_widen_optab;
8139 if (find_widening_optab_handler (this_optab, mode, innermode, 0)
8140 != CODE_FOR_nothing)
8141 {
8142 if (TYPE_UNSIGNED (TREE_TYPE (treeop0)))
8143 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1,
8144 EXPAND_NORMAL);
8145 else
8146 expand_operands (treeop0, treeop1, NULL_RTX, &op1, &op0,
8147 EXPAND_NORMAL);
8148 goto binop3;
8149 }
8150 }
8151 /* Check for a multiplication with matching signedness. */
8152 else if ((TREE_CODE (treeop1) == INTEGER_CST
8153 && int_fits_type_p (treeop1, TREE_TYPE (treeop0)))
8154 || (TYPE_UNSIGNED (TREE_TYPE (treeop1))
8155 == TYPE_UNSIGNED (TREE_TYPE (treeop0))))
8156 {
8157 tree op0type = TREE_TYPE (treeop0);
8158 enum machine_mode innermode = TYPE_MODE (op0type);
8159 bool zextend_p = TYPE_UNSIGNED (op0type);
8160 optab other_optab = zextend_p ? smul_widen_optab : umul_widen_optab;
8161 this_optab = zextend_p ? umul_widen_optab : smul_widen_optab;
8162
8163 if (TREE_CODE (treeop0) != INTEGER_CST)
8164 {
8165 if (find_widening_optab_handler (this_optab, mode, innermode, 0)
8166 != CODE_FOR_nothing)
8167 {
8168 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1,
8169 EXPAND_NORMAL);
8170 temp = expand_widening_mult (mode, op0, op1, target,
8171 unsignedp, this_optab);
8172 return REDUCE_BIT_FIELD (temp);
8173 }
8174 if (find_widening_optab_handler (other_optab, mode, innermode, 0)
8175 != CODE_FOR_nothing
8176 && innermode == word_mode)
8177 {
8178 rtx htem, hipart;
8179 op0 = expand_normal (treeop0);
8180 if (TREE_CODE (treeop1) == INTEGER_CST)
8181 op1 = convert_modes (innermode, mode,
8182 expand_normal (treeop1), unsignedp);
8183 else
8184 op1 = expand_normal (treeop1);
8185 temp = expand_binop (mode, other_optab, op0, op1, target,
8186 unsignedp, OPTAB_LIB_WIDEN);
8187 hipart = gen_highpart (innermode, temp);
8188 htem = expand_mult_highpart_adjust (innermode, hipart,
8189 op0, op1, hipart,
8190 zextend_p);
8191 if (htem != hipart)
8192 emit_move_insn (hipart, htem);
8193 return REDUCE_BIT_FIELD (temp);
8194 }
8195 }
8196 }
8197 treeop0 = fold_build1 (CONVERT_EXPR, type, treeop0);
8198 treeop1 = fold_build1 (CONVERT_EXPR, type, treeop1);
8199 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
8200 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, target, unsignedp));
8201
8202 case FMA_EXPR:
8203 {
8204 optab opt = fma_optab;
8205 gimple def0, def2;
8206
8207 /* If there is no insn for FMA, emit it as __builtin_fma{,f,l}
8208 call. */
8209 if (optab_handler (fma_optab, mode) == CODE_FOR_nothing)
8210 {
8211 tree fn = mathfn_built_in (TREE_TYPE (treeop0), BUILT_IN_FMA);
8212 tree call_expr;
8213
8214 gcc_assert (fn != NULL_TREE);
8215 call_expr = build_call_expr (fn, 3, treeop0, treeop1, treeop2);
8216 return expand_builtin (call_expr, target, subtarget, mode, false);
8217 }
8218
8219 def0 = get_def_for_expr (treeop0, NEGATE_EXPR);
8220 def2 = get_def_for_expr (treeop2, NEGATE_EXPR);
8221
8222 op0 = op2 = NULL;
8223
8224 if (def0 && def2
8225 && optab_handler (fnms_optab, mode) != CODE_FOR_nothing)
8226 {
8227 opt = fnms_optab;
8228 op0 = expand_normal (gimple_assign_rhs1 (def0));
8229 op2 = expand_normal (gimple_assign_rhs1 (def2));
8230 }
8231 else if (def0
8232 && optab_handler (fnma_optab, mode) != CODE_FOR_nothing)
8233 {
8234 opt = fnma_optab;
8235 op0 = expand_normal (gimple_assign_rhs1 (def0));
8236 }
8237 else if (def2
8238 && optab_handler (fms_optab, mode) != CODE_FOR_nothing)
8239 {
8240 opt = fms_optab;
8241 op2 = expand_normal (gimple_assign_rhs1 (def2));
8242 }
8243
8244 if (op0 == NULL)
8245 op0 = expand_expr (treeop0, subtarget, VOIDmode, EXPAND_NORMAL);
8246 if (op2 == NULL)
8247 op2 = expand_normal (treeop2);
8248 op1 = expand_normal (treeop1);
8249
8250 return expand_ternary_op (TYPE_MODE (type), opt,
8251 op0, op1, op2, target, 0);
8252 }
8253
8254 case MULT_EXPR:
8255 /* If this is a fixed-point operation, then we cannot use the code
8256 below because "expand_mult" doesn't support sat/no-sat fixed-point
8257 multiplications. */
8258 if (ALL_FIXED_POINT_MODE_P (mode))
8259 goto binop;
8260
8261 /* If first operand is constant, swap them.
8262 Thus the following special case checks need only
8263 check the second operand. */
8264 if (TREE_CODE (treeop0) == INTEGER_CST)
8265 {
8266 tree t1 = treeop0;
8267 treeop0 = treeop1;
8268 treeop1 = t1;
8269 }
8270
8271 /* Attempt to return something suitable for generating an
8272 indexed address, for machines that support that. */
8273
8274 if (modifier == EXPAND_SUM && mode == ptr_mode
8275 && host_integerp (treeop1, 0))
8276 {
8277 tree exp1 = treeop1;
8278
8279 op0 = expand_expr (treeop0, subtarget, VOIDmode,
8280 EXPAND_SUM);
8281
8282 if (!REG_P (op0))
8283 op0 = force_operand (op0, NULL_RTX);
8284 if (!REG_P (op0))
8285 op0 = copy_to_mode_reg (mode, op0);
8286
8287 return REDUCE_BIT_FIELD (gen_rtx_MULT (mode, op0,
8288 gen_int_mode (tree_low_cst (exp1, 0),
8289 TYPE_MODE (TREE_TYPE (exp1)))));
8290 }
8291
8292 if (modifier == EXPAND_STACK_PARM)
8293 target = 0;
8294
8295 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
8296 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, target, unsignedp));
8297
8298 case TRUNC_DIV_EXPR:
8299 case FLOOR_DIV_EXPR:
8300 case CEIL_DIV_EXPR:
8301 case ROUND_DIV_EXPR:
8302 case EXACT_DIV_EXPR:
8303 /* If this is a fixed-point operation, then we cannot use the code
8304 below because "expand_divmod" doesn't support sat/no-sat fixed-point
8305 divisions. */
8306 if (ALL_FIXED_POINT_MODE_P (mode))
8307 goto binop;
8308
8309 if (modifier == EXPAND_STACK_PARM)
8310 target = 0;
8311 /* Possible optimization: compute the dividend with EXPAND_SUM
8312 then if the divisor is constant can optimize the case
8313 where some terms of the dividend have coeffs divisible by it. */
8314 expand_operands (treeop0, treeop1,
8315 subtarget, &op0, &op1, EXPAND_NORMAL);
8316 return expand_divmod (0, code, mode, op0, op1, target, unsignedp);
8317
8318 case RDIV_EXPR:
8319 goto binop;
8320
8321 case TRUNC_MOD_EXPR:
8322 case FLOOR_MOD_EXPR:
8323 case CEIL_MOD_EXPR:
8324 case ROUND_MOD_EXPR:
8325 if (modifier == EXPAND_STACK_PARM)
8326 target = 0;
8327 expand_operands (treeop0, treeop1,
8328 subtarget, &op0, &op1, EXPAND_NORMAL);
8329 return expand_divmod (1, code, mode, op0, op1, target, unsignedp);
8330
8331 case FIXED_CONVERT_EXPR:
8332 op0 = expand_normal (treeop0);
8333 if (target == 0 || modifier == EXPAND_STACK_PARM)
8334 target = gen_reg_rtx (mode);
8335
8336 if ((TREE_CODE (TREE_TYPE (treeop0)) == INTEGER_TYPE
8337 && TYPE_UNSIGNED (TREE_TYPE (treeop0)))
8338 || (TREE_CODE (type) == INTEGER_TYPE && TYPE_UNSIGNED (type)))
8339 expand_fixed_convert (target, op0, 1, TYPE_SATURATING (type));
8340 else
8341 expand_fixed_convert (target, op0, 0, TYPE_SATURATING (type));
8342 return target;
8343
8344 case FIX_TRUNC_EXPR:
8345 op0 = expand_normal (treeop0);
8346 if (target == 0 || modifier == EXPAND_STACK_PARM)
8347 target = gen_reg_rtx (mode);
8348 expand_fix (target, op0, unsignedp);
8349 return target;
8350
8351 case FLOAT_EXPR:
8352 op0 = expand_normal (treeop0);
8353 if (target == 0 || modifier == EXPAND_STACK_PARM)
8354 target = gen_reg_rtx (mode);
8355 /* expand_float can't figure out what to do if FROM has VOIDmode.
8356 So give it the correct mode. With -O, cse will optimize this. */
8357 if (GET_MODE (op0) == VOIDmode)
8358 op0 = copy_to_mode_reg (TYPE_MODE (TREE_TYPE (treeop0)),
8359 op0);
8360 expand_float (target, op0,
8361 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
8362 return target;
8363
8364 case NEGATE_EXPR:
8365 op0 = expand_expr (treeop0, subtarget,
8366 VOIDmode, EXPAND_NORMAL);
8367 if (modifier == EXPAND_STACK_PARM)
8368 target = 0;
8369 temp = expand_unop (mode,
8370 optab_for_tree_code (NEGATE_EXPR, type,
8371 optab_default),
8372 op0, target, 0);
8373 gcc_assert (temp);
8374 return REDUCE_BIT_FIELD (temp);
8375
8376 case ABS_EXPR:
8377 op0 = expand_expr (treeop0, subtarget,
8378 VOIDmode, EXPAND_NORMAL);
8379 if (modifier == EXPAND_STACK_PARM)
8380 target = 0;
8381
8382 /* ABS_EXPR is not valid for complex arguments. */
8383 gcc_assert (GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
8384 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT);
8385
8386 /* Unsigned abs is simply the operand. Testing here means we don't
8387 risk generating incorrect code below. */
8388 if (TYPE_UNSIGNED (type))
8389 return op0;
8390
8391 return expand_abs (mode, op0, target, unsignedp,
8392 safe_from_p (target, treeop0, 1));
8393
8394 case MAX_EXPR:
8395 case MIN_EXPR:
8396 target = original_target;
8397 if (target == 0
8398 || modifier == EXPAND_STACK_PARM
8399 || (MEM_P (target) && MEM_VOLATILE_P (target))
8400 || GET_MODE (target) != mode
8401 || (REG_P (target)
8402 && REGNO (target) < FIRST_PSEUDO_REGISTER))
8403 target = gen_reg_rtx (mode);
8404 expand_operands (treeop0, treeop1,
8405 target, &op0, &op1, EXPAND_NORMAL);
8406
8407 /* First try to do it with a special MIN or MAX instruction.
8408 If that does not win, use a conditional jump to select the proper
8409 value. */
8410 this_optab = optab_for_tree_code (code, type, optab_default);
8411 temp = expand_binop (mode, this_optab, op0, op1, target, unsignedp,
8412 OPTAB_WIDEN);
8413 if (temp != 0)
8414 return temp;
8415
8416 /* At this point, a MEM target is no longer useful; we will get better
8417 code without it. */
8418
8419 if (! REG_P (target))
8420 target = gen_reg_rtx (mode);
8421
8422 /* If op1 was placed in target, swap op0 and op1. */
8423 if (target != op0 && target == op1)
8424 {
8425 temp = op0;
8426 op0 = op1;
8427 op1 = temp;
8428 }
8429
8430 /* We generate better code and avoid problems with op1 mentioning
8431 target by forcing op1 into a pseudo if it isn't a constant. */
8432 if (! CONSTANT_P (op1))
8433 op1 = force_reg (mode, op1);
8434
8435 {
8436 enum rtx_code comparison_code;
8437 rtx cmpop1 = op1;
8438
8439 if (code == MAX_EXPR)
8440 comparison_code = unsignedp ? GEU : GE;
8441 else
8442 comparison_code = unsignedp ? LEU : LE;
8443
8444 /* Canonicalize to comparisons against 0. */
8445 if (op1 == const1_rtx)
8446 {
8447 /* Converting (a >= 1 ? a : 1) into (a > 0 ? a : 1)
8448 or (a != 0 ? a : 1) for unsigned.
8449 For MIN we are safe converting (a <= 1 ? a : 1)
8450 into (a <= 0 ? a : 1) */
8451 cmpop1 = const0_rtx;
8452 if (code == MAX_EXPR)
8453 comparison_code = unsignedp ? NE : GT;
8454 }
8455 if (op1 == constm1_rtx && !unsignedp)
8456 {
8457 /* Converting (a >= -1 ? a : -1) into (a >= 0 ? a : -1)
8458 and (a <= -1 ? a : -1) into (a < 0 ? a : -1) */
8459 cmpop1 = const0_rtx;
8460 if (code == MIN_EXPR)
8461 comparison_code = LT;
8462 }
8463 #ifdef HAVE_conditional_move
8464 /* Use a conditional move if possible. */
8465 if (can_conditionally_move_p (mode))
8466 {
8467 rtx insn;
8468
8469 /* ??? Same problem as in expmed.c: emit_conditional_move
8470 forces a stack adjustment via compare_from_rtx, and we
8471 lose the stack adjustment if the sequence we are about
8472 to create is discarded. */
8473 do_pending_stack_adjust ();
8474
8475 start_sequence ();
8476
8477 /* Try to emit the conditional move. */
8478 insn = emit_conditional_move (target, comparison_code,
8479 op0, cmpop1, mode,
8480 op0, op1, mode,
8481 unsignedp);
8482
8483 /* If we could do the conditional move, emit the sequence,
8484 and return. */
8485 if (insn)
8486 {
8487 rtx seq = get_insns ();
8488 end_sequence ();
8489 emit_insn (seq);
8490 return target;
8491 }
8492
8493 /* Otherwise discard the sequence and fall back to code with
8494 branches. */
8495 end_sequence ();
8496 }
8497 #endif
8498 if (target != op0)
8499 emit_move_insn (target, op0);
8500
8501 temp = gen_label_rtx ();
8502 do_compare_rtx_and_jump (target, cmpop1, comparison_code,
8503 unsignedp, mode, NULL_RTX, NULL_RTX, temp,
8504 -1);
8505 }
8506 emit_move_insn (target, op1);
8507 emit_label (temp);
8508 return target;
8509
8510 case BIT_NOT_EXPR:
8511 op0 = expand_expr (treeop0, subtarget,
8512 VOIDmode, EXPAND_NORMAL);
8513 if (modifier == EXPAND_STACK_PARM)
8514 target = 0;
8515 /* In case we have to reduce the result to bitfield precision
8516 expand this as XOR with a proper constant instead. */
8517 if (reduce_bit_field)
8518 temp = expand_binop (mode, xor_optab, op0,
8519 immed_double_int_const
8520 (double_int_mask (TYPE_PRECISION (type)), mode),
8521 target, 1, OPTAB_LIB_WIDEN);
8522 else
8523 temp = expand_unop (mode, one_cmpl_optab, op0, target, 1);
8524 gcc_assert (temp);
8525 return temp;
8526
8527 /* ??? Can optimize bitwise operations with one arg constant.
8528 Can optimize (a bitwise1 n) bitwise2 (a bitwise3 b)
8529 and (a bitwise1 b) bitwise2 b (etc)
8530 but that is probably not worth while. */
8531
8532 case BIT_AND_EXPR:
8533 case BIT_IOR_EXPR:
8534 case BIT_XOR_EXPR:
8535 goto binop;
8536
8537 case LROTATE_EXPR:
8538 case RROTATE_EXPR:
8539 gcc_assert (VECTOR_MODE_P (TYPE_MODE (type))
8540 || (GET_MODE_PRECISION (TYPE_MODE (type))
8541 == TYPE_PRECISION (type)));
8542 /* fall through */
8543
8544 case LSHIFT_EXPR:
8545 case RSHIFT_EXPR:
8546 /* If this is a fixed-point operation, then we cannot use the code
8547 below because "expand_shift" doesn't support sat/no-sat fixed-point
8548 shifts. */
8549 if (ALL_FIXED_POINT_MODE_P (mode))
8550 goto binop;
8551
8552 if (! safe_from_p (subtarget, treeop1, 1))
8553 subtarget = 0;
8554 if (modifier == EXPAND_STACK_PARM)
8555 target = 0;
8556 op0 = expand_expr (treeop0, subtarget,
8557 VOIDmode, EXPAND_NORMAL);
8558 temp = expand_variable_shift (code, mode, op0, treeop1, target,
8559 unsignedp);
8560 if (code == LSHIFT_EXPR)
8561 temp = REDUCE_BIT_FIELD (temp);
8562 return temp;
8563
8564 /* Could determine the answer when only additive constants differ. Also,
8565 the addition of one can be handled by changing the condition. */
8566 case LT_EXPR:
8567 case LE_EXPR:
8568 case GT_EXPR:
8569 case GE_EXPR:
8570 case EQ_EXPR:
8571 case NE_EXPR:
8572 case UNORDERED_EXPR:
8573 case ORDERED_EXPR:
8574 case UNLT_EXPR:
8575 case UNLE_EXPR:
8576 case UNGT_EXPR:
8577 case UNGE_EXPR:
8578 case UNEQ_EXPR:
8579 case LTGT_EXPR:
8580 temp = do_store_flag (ops,
8581 modifier != EXPAND_STACK_PARM ? target : NULL_RTX,
8582 tmode != VOIDmode ? tmode : mode);
8583 if (temp)
8584 return temp;
8585
8586 /* Use a compare and a jump for BLKmode comparisons, or for function
8587 type comparisons is HAVE_canonicalize_funcptr_for_compare. */
8588
8589 if ((target == 0
8590 || modifier == EXPAND_STACK_PARM
8591 || ! safe_from_p (target, treeop0, 1)
8592 || ! safe_from_p (target, treeop1, 1)
8593 /* Make sure we don't have a hard reg (such as function's return
8594 value) live across basic blocks, if not optimizing. */
8595 || (!optimize && REG_P (target)
8596 && REGNO (target) < FIRST_PSEUDO_REGISTER)))
8597 target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode);
8598
8599 emit_move_insn (target, const0_rtx);
8600
8601 op1 = gen_label_rtx ();
8602 jumpifnot_1 (code, treeop0, treeop1, op1, -1);
8603
8604 if (TYPE_PRECISION (type) == 1 && !TYPE_UNSIGNED (type))
8605 emit_move_insn (target, constm1_rtx);
8606 else
8607 emit_move_insn (target, const1_rtx);
8608
8609 emit_label (op1);
8610 return target;
8611
8612 case COMPLEX_EXPR:
8613 /* Get the rtx code of the operands. */
8614 op0 = expand_normal (treeop0);
8615 op1 = expand_normal (treeop1);
8616
8617 if (!target)
8618 target = gen_reg_rtx (TYPE_MODE (type));
8619
8620 /* Move the real (op0) and imaginary (op1) parts to their location. */
8621 write_complex_part (target, op0, false);
8622 write_complex_part (target, op1, true);
8623
8624 return target;
8625
8626 case WIDEN_SUM_EXPR:
8627 {
8628 tree oprnd0 = treeop0;
8629 tree oprnd1 = treeop1;
8630
8631 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8632 target = expand_widen_pattern_expr (ops, op0, NULL_RTX, op1,
8633 target, unsignedp);
8634 return target;
8635 }
8636
8637 case REDUC_MAX_EXPR:
8638 case REDUC_MIN_EXPR:
8639 case REDUC_PLUS_EXPR:
8640 {
8641 op0 = expand_normal (treeop0);
8642 this_optab = optab_for_tree_code (code, type, optab_default);
8643 temp = expand_unop (mode, this_optab, op0, target, unsignedp);
8644 gcc_assert (temp);
8645 return temp;
8646 }
8647
8648 case VEC_EXTRACT_EVEN_EXPR:
8649 case VEC_EXTRACT_ODD_EXPR:
8650 case VEC_INTERLEAVE_HIGH_EXPR:
8651 case VEC_INTERLEAVE_LOW_EXPR:
8652 goto binop;
8653
8654 case VEC_LSHIFT_EXPR:
8655 case VEC_RSHIFT_EXPR:
8656 {
8657 target = expand_vec_shift_expr (ops, target);
8658 return target;
8659 }
8660
8661 case VEC_UNPACK_HI_EXPR:
8662 case VEC_UNPACK_LO_EXPR:
8663 {
8664 op0 = expand_normal (treeop0);
8665 temp = expand_widen_pattern_expr (ops, op0, NULL_RTX, NULL_RTX,
8666 target, unsignedp);
8667 gcc_assert (temp);
8668 return temp;
8669 }
8670
8671 case VEC_UNPACK_FLOAT_HI_EXPR:
8672 case VEC_UNPACK_FLOAT_LO_EXPR:
8673 {
8674 op0 = expand_normal (treeop0);
8675 /* The signedness is determined from input operand. */
8676 temp = expand_widen_pattern_expr
8677 (ops, op0, NULL_RTX, NULL_RTX,
8678 target, TYPE_UNSIGNED (TREE_TYPE (treeop0)));
8679
8680 gcc_assert (temp);
8681 return temp;
8682 }
8683
8684 case VEC_WIDEN_MULT_HI_EXPR:
8685 case VEC_WIDEN_MULT_LO_EXPR:
8686 {
8687 tree oprnd0 = treeop0;
8688 tree oprnd1 = treeop1;
8689
8690 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8691 target = expand_widen_pattern_expr (ops, op0, op1, NULL_RTX,
8692 target, unsignedp);
8693 gcc_assert (target);
8694 return target;
8695 }
8696
8697 case VEC_WIDEN_LSHIFT_HI_EXPR:
8698 case VEC_WIDEN_LSHIFT_LO_EXPR:
8699 {
8700 tree oprnd0 = treeop0;
8701 tree oprnd1 = treeop1;
8702
8703 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8704 target = expand_widen_pattern_expr (ops, op0, op1, NULL_RTX,
8705 target, unsignedp);
8706 gcc_assert (target);
8707 return target;
8708 }
8709
8710 case VEC_PACK_TRUNC_EXPR:
8711 case VEC_PACK_SAT_EXPR:
8712 case VEC_PACK_FIX_TRUNC_EXPR:
8713 mode = TYPE_MODE (TREE_TYPE (treeop0));
8714 goto binop;
8715
8716 case VEC_PERM_EXPR:
8717 expand_operands (treeop0, treeop1, target, &op0, &op1, EXPAND_NORMAL);
8718 op2 = expand_normal (treeop2);
8719
8720 /* Careful here: if the target doesn't support integral vector modes,
8721 a constant selection vector could wind up smooshed into a normal
8722 integral constant. */
8723 if (CONSTANT_P (op2) && GET_CODE (op2) != CONST_VECTOR)
8724 {
8725 tree sel_type = TREE_TYPE (treeop2);
8726 enum machine_mode vmode
8727 = mode_for_vector (TYPE_MODE (TREE_TYPE (sel_type)),
8728 TYPE_VECTOR_SUBPARTS (sel_type));
8729 gcc_assert (GET_MODE_CLASS (vmode) == MODE_VECTOR_INT);
8730 op2 = simplify_subreg (vmode, op2, TYPE_MODE (sel_type), 0);
8731 gcc_assert (op2 && GET_CODE (op2) == CONST_VECTOR);
8732 }
8733 else
8734 gcc_assert (GET_MODE_CLASS (GET_MODE (op2)) == MODE_VECTOR_INT);
8735
8736 temp = expand_vec_perm (mode, op0, op1, op2, target);
8737 gcc_assert (temp);
8738 return temp;
8739
8740 case DOT_PROD_EXPR:
8741 {
8742 tree oprnd0 = treeop0;
8743 tree oprnd1 = treeop1;
8744 tree oprnd2 = treeop2;
8745 rtx op2;
8746
8747 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8748 op2 = expand_normal (oprnd2);
8749 target = expand_widen_pattern_expr (ops, op0, op1, op2,
8750 target, unsignedp);
8751 return target;
8752 }
8753
8754 case REALIGN_LOAD_EXPR:
8755 {
8756 tree oprnd0 = treeop0;
8757 tree oprnd1 = treeop1;
8758 tree oprnd2 = treeop2;
8759 rtx op2;
8760
8761 this_optab = optab_for_tree_code (code, type, optab_default);
8762 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8763 op2 = expand_normal (oprnd2);
8764 temp = expand_ternary_op (mode, this_optab, op0, op1, op2,
8765 target, unsignedp);
8766 gcc_assert (temp);
8767 return temp;
8768 }
8769
8770 case COND_EXPR:
8771 /* A COND_EXPR with its type being VOID_TYPE represents a
8772 conditional jump and is handled in
8773 expand_gimple_cond_expr. */
8774 gcc_assert (!VOID_TYPE_P (type));
8775
8776 /* Note that COND_EXPRs whose type is a structure or union
8777 are required to be constructed to contain assignments of
8778 a temporary variable, so that we can evaluate them here
8779 for side effect only. If type is void, we must do likewise. */
8780
8781 gcc_assert (!TREE_ADDRESSABLE (type)
8782 && !ignore
8783 && TREE_TYPE (treeop1) != void_type_node
8784 && TREE_TYPE (treeop2) != void_type_node);
8785
8786 /* If we are not to produce a result, we have no target. Otherwise,
8787 if a target was specified use it; it will not be used as an
8788 intermediate target unless it is safe. If no target, use a
8789 temporary. */
8790
8791 if (modifier != EXPAND_STACK_PARM
8792 && original_target
8793 && safe_from_p (original_target, treeop0, 1)
8794 && GET_MODE (original_target) == mode
8795 #ifdef HAVE_conditional_move
8796 && (! can_conditionally_move_p (mode)
8797 || REG_P (original_target))
8798 #endif
8799 && !MEM_P (original_target))
8800 temp = original_target;
8801 else
8802 temp = assign_temp (type, 0, 0, 1);
8803
8804 do_pending_stack_adjust ();
8805 NO_DEFER_POP;
8806 op0 = gen_label_rtx ();
8807 op1 = gen_label_rtx ();
8808 jumpifnot (treeop0, op0, -1);
8809 store_expr (treeop1, temp,
8810 modifier == EXPAND_STACK_PARM,
8811 false);
8812
8813 emit_jump_insn (gen_jump (op1));
8814 emit_barrier ();
8815 emit_label (op0);
8816 store_expr (treeop2, temp,
8817 modifier == EXPAND_STACK_PARM,
8818 false);
8819
8820 emit_label (op1);
8821 OK_DEFER_POP;
8822 return temp;
8823
8824 case VEC_COND_EXPR:
8825 target = expand_vec_cond_expr (type, treeop0, treeop1, treeop2, target);
8826 return target;
8827
8828 default:
8829 gcc_unreachable ();
8830 }
8831
8832 /* Here to do an ordinary binary operator. */
8833 binop:
8834 expand_operands (treeop0, treeop1,
8835 subtarget, &op0, &op1, EXPAND_NORMAL);
8836 binop2:
8837 this_optab = optab_for_tree_code (code, type, optab_default);
8838 binop3:
8839 if (modifier == EXPAND_STACK_PARM)
8840 target = 0;
8841 temp = expand_binop (mode, this_optab, op0, op1, target,
8842 unsignedp, OPTAB_LIB_WIDEN);
8843 gcc_assert (temp);
8844 /* Bitwise operations do not need bitfield reduction as we expect their
8845 operands being properly truncated. */
8846 if (code == BIT_XOR_EXPR
8847 || code == BIT_AND_EXPR
8848 || code == BIT_IOR_EXPR)
8849 return temp;
8850 return REDUCE_BIT_FIELD (temp);
8851 }
8852 #undef REDUCE_BIT_FIELD
8853
8854 rtx
8855 expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode,
8856 enum expand_modifier modifier, rtx *alt_rtl)
8857 {
8858 rtx op0, op1, temp, decl_rtl;
8859 tree type;
8860 int unsignedp;
8861 enum machine_mode mode;
8862 enum tree_code code = TREE_CODE (exp);
8863 rtx subtarget, original_target;
8864 int ignore;
8865 tree context;
8866 bool reduce_bit_field;
8867 location_t loc = EXPR_LOCATION (exp);
8868 struct separate_ops ops;
8869 tree treeop0, treeop1, treeop2;
8870 tree ssa_name = NULL_TREE;
8871 gimple g;
8872
8873 type = TREE_TYPE (exp);
8874 mode = TYPE_MODE (type);
8875 unsignedp = TYPE_UNSIGNED (type);
8876
8877 treeop0 = treeop1 = treeop2 = NULL_TREE;
8878 if (!VL_EXP_CLASS_P (exp))
8879 switch (TREE_CODE_LENGTH (code))
8880 {
8881 default:
8882 case 3: treeop2 = TREE_OPERAND (exp, 2);
8883 case 2: treeop1 = TREE_OPERAND (exp, 1);
8884 case 1: treeop0 = TREE_OPERAND (exp, 0);
8885 case 0: break;
8886 }
8887 ops.code = code;
8888 ops.type = type;
8889 ops.op0 = treeop0;
8890 ops.op1 = treeop1;
8891 ops.op2 = treeop2;
8892 ops.location = loc;
8893
8894 ignore = (target == const0_rtx
8895 || ((CONVERT_EXPR_CODE_P (code)
8896 || code == COND_EXPR || code == VIEW_CONVERT_EXPR)
8897 && TREE_CODE (type) == VOID_TYPE));
8898
8899 /* An operation in what may be a bit-field type needs the
8900 result to be reduced to the precision of the bit-field type,
8901 which is narrower than that of the type's mode. */
8902 reduce_bit_field = (!ignore
8903 && INTEGRAL_TYPE_P (type)
8904 && GET_MODE_PRECISION (mode) > TYPE_PRECISION (type));
8905
8906 /* If we are going to ignore this result, we need only do something
8907 if there is a side-effect somewhere in the expression. If there
8908 is, short-circuit the most common cases here. Note that we must
8909 not call expand_expr with anything but const0_rtx in case this
8910 is an initial expansion of a size that contains a PLACEHOLDER_EXPR. */
8911
8912 if (ignore)
8913 {
8914 if (! TREE_SIDE_EFFECTS (exp))
8915 return const0_rtx;
8916
8917 /* Ensure we reference a volatile object even if value is ignored, but
8918 don't do this if all we are doing is taking its address. */
8919 if (TREE_THIS_VOLATILE (exp)
8920 && TREE_CODE (exp) != FUNCTION_DECL
8921 && mode != VOIDmode && mode != BLKmode
8922 && modifier != EXPAND_CONST_ADDRESS)
8923 {
8924 temp = expand_expr (exp, NULL_RTX, VOIDmode, modifier);
8925 if (MEM_P (temp))
8926 copy_to_reg (temp);
8927 return const0_rtx;
8928 }
8929
8930 if (TREE_CODE_CLASS (code) == tcc_unary
8931 || code == COMPONENT_REF || code == INDIRECT_REF)
8932 return expand_expr (treeop0, const0_rtx, VOIDmode,
8933 modifier);
8934
8935 else if (TREE_CODE_CLASS (code) == tcc_binary
8936 || TREE_CODE_CLASS (code) == tcc_comparison
8937 || code == ARRAY_REF || code == ARRAY_RANGE_REF)
8938 {
8939 expand_expr (treeop0, const0_rtx, VOIDmode, modifier);
8940 expand_expr (treeop1, const0_rtx, VOIDmode, modifier);
8941 return const0_rtx;
8942 }
8943 else if (code == BIT_FIELD_REF)
8944 {
8945 expand_expr (treeop0, const0_rtx, VOIDmode, modifier);
8946 expand_expr (treeop1, const0_rtx, VOIDmode, modifier);
8947 expand_expr (treeop2, const0_rtx, VOIDmode, modifier);
8948 return const0_rtx;
8949 }
8950
8951 target = 0;
8952 }
8953
8954 if (reduce_bit_field && modifier == EXPAND_STACK_PARM)
8955 target = 0;
8956
8957 /* Use subtarget as the target for operand 0 of a binary operation. */
8958 subtarget = get_subtarget (target);
8959 original_target = target;
8960
8961 switch (code)
8962 {
8963 case LABEL_DECL:
8964 {
8965 tree function = decl_function_context (exp);
8966
8967 temp = label_rtx (exp);
8968 temp = gen_rtx_LABEL_REF (Pmode, temp);
8969
8970 if (function != current_function_decl
8971 && function != 0)
8972 LABEL_REF_NONLOCAL_P (temp) = 1;
8973
8974 temp = gen_rtx_MEM (FUNCTION_MODE, temp);
8975 return temp;
8976 }
8977
8978 case SSA_NAME:
8979 /* ??? ivopts calls expander, without any preparation from
8980 out-of-ssa. So fake instructions as if this was an access to the
8981 base variable. This unnecessarily allocates a pseudo, see how we can
8982 reuse it, if partition base vars have it set already. */
8983 if (!currently_expanding_to_rtl)
8984 return expand_expr_real_1 (SSA_NAME_VAR (exp), target, tmode, modifier,
8985 NULL);
8986
8987 g = get_gimple_for_ssa_name (exp);
8988 /* For EXPAND_INITIALIZER try harder to get something simpler. */
8989 if (g == NULL
8990 && modifier == EXPAND_INITIALIZER
8991 && !SSA_NAME_IS_DEFAULT_DEF (exp)
8992 && (optimize || DECL_IGNORED_P (SSA_NAME_VAR (exp)))
8993 && stmt_is_replaceable_p (SSA_NAME_DEF_STMT (exp)))
8994 g = SSA_NAME_DEF_STMT (exp);
8995 if (g)
8996 return expand_expr_real (gimple_assign_rhs_to_tree (g), target, tmode,
8997 modifier, NULL);
8998
8999 ssa_name = exp;
9000 decl_rtl = get_rtx_for_ssa_name (ssa_name);
9001 exp = SSA_NAME_VAR (ssa_name);
9002 goto expand_decl_rtl;
9003
9004 case PARM_DECL:
9005 case VAR_DECL:
9006 /* If a static var's type was incomplete when the decl was written,
9007 but the type is complete now, lay out the decl now. */
9008 if (DECL_SIZE (exp) == 0
9009 && COMPLETE_OR_UNBOUND_ARRAY_TYPE_P (TREE_TYPE (exp))
9010 && (TREE_STATIC (exp) || DECL_EXTERNAL (exp)))
9011 layout_decl (exp, 0);
9012
9013 /* ... fall through ... */
9014
9015 case FUNCTION_DECL:
9016 case RESULT_DECL:
9017 decl_rtl = DECL_RTL (exp);
9018 expand_decl_rtl:
9019 gcc_assert (decl_rtl);
9020 decl_rtl = copy_rtx (decl_rtl);
9021 /* Record writes to register variables. */
9022 if (modifier == EXPAND_WRITE
9023 && REG_P (decl_rtl)
9024 && HARD_REGISTER_P (decl_rtl))
9025 add_to_hard_reg_set (&crtl->asm_clobbers,
9026 GET_MODE (decl_rtl), REGNO (decl_rtl));
9027
9028 /* Ensure variable marked as used even if it doesn't go through
9029 a parser. If it hasn't be used yet, write out an external
9030 definition. */
9031 if (! TREE_USED (exp))
9032 {
9033 assemble_external (exp);
9034 TREE_USED (exp) = 1;
9035 }
9036
9037 /* Show we haven't gotten RTL for this yet. */
9038 temp = 0;
9039
9040 /* Variables inherited from containing functions should have
9041 been lowered by this point. */
9042 context = decl_function_context (exp);
9043 gcc_assert (!context
9044 || context == current_function_decl
9045 || TREE_STATIC (exp)
9046 || DECL_EXTERNAL (exp)
9047 /* ??? C++ creates functions that are not TREE_STATIC. */
9048 || TREE_CODE (exp) == FUNCTION_DECL);
9049
9050 /* This is the case of an array whose size is to be determined
9051 from its initializer, while the initializer is still being parsed.
9052 See expand_decl. */
9053
9054 if (MEM_P (decl_rtl) && REG_P (XEXP (decl_rtl, 0)))
9055 temp = validize_mem (decl_rtl);
9056
9057 /* If DECL_RTL is memory, we are in the normal case and the
9058 address is not valid, get the address into a register. */
9059
9060 else if (MEM_P (decl_rtl) && modifier != EXPAND_INITIALIZER)
9061 {
9062 if (alt_rtl)
9063 *alt_rtl = decl_rtl;
9064 decl_rtl = use_anchored_address (decl_rtl);
9065 if (modifier != EXPAND_CONST_ADDRESS
9066 && modifier != EXPAND_SUM
9067 && !memory_address_addr_space_p (DECL_MODE (exp),
9068 XEXP (decl_rtl, 0),
9069 MEM_ADDR_SPACE (decl_rtl)))
9070 temp = replace_equiv_address (decl_rtl,
9071 copy_rtx (XEXP (decl_rtl, 0)));
9072 }
9073
9074 /* If we got something, return it. But first, set the alignment
9075 if the address is a register. */
9076 if (temp != 0)
9077 {
9078 if (MEM_P (temp) && REG_P (XEXP (temp, 0)))
9079 mark_reg_pointer (XEXP (temp, 0), DECL_ALIGN (exp));
9080
9081 return temp;
9082 }
9083
9084 /* If the mode of DECL_RTL does not match that of the decl,
9085 there are two cases: we are dealing with a BLKmode value
9086 that is returned in a register, or we are dealing with
9087 a promoted value. In the latter case, return a SUBREG
9088 of the wanted mode, but mark it so that we know that it
9089 was already extended. */
9090 if (REG_P (decl_rtl)
9091 && DECL_MODE (exp) != BLKmode
9092 && GET_MODE (decl_rtl) != DECL_MODE (exp))
9093 {
9094 enum machine_mode pmode;
9095
9096 /* Get the signedness to be used for this variable. Ensure we get
9097 the same mode we got when the variable was declared. */
9098 if (code == SSA_NAME
9099 && (g = SSA_NAME_DEF_STMT (ssa_name))
9100 && gimple_code (g) == GIMPLE_CALL)
9101 {
9102 gcc_assert (!gimple_call_internal_p (g));
9103 pmode = promote_function_mode (type, mode, &unsignedp,
9104 gimple_call_fntype (g),
9105 2);
9106 }
9107 else
9108 pmode = promote_decl_mode (exp, &unsignedp);
9109 gcc_assert (GET_MODE (decl_rtl) == pmode);
9110
9111 temp = gen_lowpart_SUBREG (mode, decl_rtl);
9112 SUBREG_PROMOTED_VAR_P (temp) = 1;
9113 SUBREG_PROMOTED_UNSIGNED_SET (temp, unsignedp);
9114 return temp;
9115 }
9116
9117 return decl_rtl;
9118
9119 case INTEGER_CST:
9120 temp = immed_double_const (TREE_INT_CST_LOW (exp),
9121 TREE_INT_CST_HIGH (exp), mode);
9122
9123 return temp;
9124
9125 case VECTOR_CST:
9126 {
9127 tree tmp = NULL_TREE;
9128 if (GET_MODE_CLASS (mode) == MODE_VECTOR_INT
9129 || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT
9130 || GET_MODE_CLASS (mode) == MODE_VECTOR_FRACT
9131 || GET_MODE_CLASS (mode) == MODE_VECTOR_UFRACT
9132 || GET_MODE_CLASS (mode) == MODE_VECTOR_ACCUM
9133 || GET_MODE_CLASS (mode) == MODE_VECTOR_UACCUM)
9134 return const_vector_from_tree (exp);
9135 if (GET_MODE_CLASS (mode) == MODE_INT)
9136 {
9137 tree type_for_mode = lang_hooks.types.type_for_mode (mode, 1);
9138 if (type_for_mode)
9139 tmp = fold_unary_loc (loc, VIEW_CONVERT_EXPR, type_for_mode, exp);
9140 }
9141 if (!tmp)
9142 tmp = build_constructor_from_list (type,
9143 TREE_VECTOR_CST_ELTS (exp));
9144 return expand_expr (tmp, ignore ? const0_rtx : target,
9145 tmode, modifier);
9146 }
9147
9148 case CONST_DECL:
9149 return expand_expr (DECL_INITIAL (exp), target, VOIDmode, modifier);
9150
9151 case REAL_CST:
9152 /* If optimized, generate immediate CONST_DOUBLE
9153 which will be turned into memory by reload if necessary.
9154
9155 We used to force a register so that loop.c could see it. But
9156 this does not allow gen_* patterns to perform optimizations with
9157 the constants. It also produces two insns in cases like "x = 1.0;".
9158 On most machines, floating-point constants are not permitted in
9159 many insns, so we'd end up copying it to a register in any case.
9160
9161 Now, we do the copying in expand_binop, if appropriate. */
9162 return CONST_DOUBLE_FROM_REAL_VALUE (TREE_REAL_CST (exp),
9163 TYPE_MODE (TREE_TYPE (exp)));
9164
9165 case FIXED_CST:
9166 return CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (exp),
9167 TYPE_MODE (TREE_TYPE (exp)));
9168
9169 case COMPLEX_CST:
9170 /* Handle evaluating a complex constant in a CONCAT target. */
9171 if (original_target && GET_CODE (original_target) == CONCAT)
9172 {
9173 enum machine_mode mode = TYPE_MODE (TREE_TYPE (TREE_TYPE (exp)));
9174 rtx rtarg, itarg;
9175
9176 rtarg = XEXP (original_target, 0);
9177 itarg = XEXP (original_target, 1);
9178
9179 /* Move the real and imaginary parts separately. */
9180 op0 = expand_expr (TREE_REALPART (exp), rtarg, mode, EXPAND_NORMAL);
9181 op1 = expand_expr (TREE_IMAGPART (exp), itarg, mode, EXPAND_NORMAL);
9182
9183 if (op0 != rtarg)
9184 emit_move_insn (rtarg, op0);
9185 if (op1 != itarg)
9186 emit_move_insn (itarg, op1);
9187
9188 return original_target;
9189 }
9190
9191 /* ... fall through ... */
9192
9193 case STRING_CST:
9194 temp = expand_expr_constant (exp, 1, modifier);
9195
9196 /* temp contains a constant address.
9197 On RISC machines where a constant address isn't valid,
9198 make some insns to get that address into a register. */
9199 if (modifier != EXPAND_CONST_ADDRESS
9200 && modifier != EXPAND_INITIALIZER
9201 && modifier != EXPAND_SUM
9202 && ! memory_address_addr_space_p (mode, XEXP (temp, 0),
9203 MEM_ADDR_SPACE (temp)))
9204 return replace_equiv_address (temp,
9205 copy_rtx (XEXP (temp, 0)));
9206 return temp;
9207
9208 case SAVE_EXPR:
9209 {
9210 tree val = treeop0;
9211 rtx ret = expand_expr_real_1 (val, target, tmode, modifier, alt_rtl);
9212
9213 if (!SAVE_EXPR_RESOLVED_P (exp))
9214 {
9215 /* We can indeed still hit this case, typically via builtin
9216 expanders calling save_expr immediately before expanding
9217 something. Assume this means that we only have to deal
9218 with non-BLKmode values. */
9219 gcc_assert (GET_MODE (ret) != BLKmode);
9220
9221 val = build_decl (EXPR_LOCATION (exp),
9222 VAR_DECL, NULL, TREE_TYPE (exp));
9223 DECL_ARTIFICIAL (val) = 1;
9224 DECL_IGNORED_P (val) = 1;
9225 treeop0 = val;
9226 TREE_OPERAND (exp, 0) = treeop0;
9227 SAVE_EXPR_RESOLVED_P (exp) = 1;
9228
9229 if (!CONSTANT_P (ret))
9230 ret = copy_to_reg (ret);
9231 SET_DECL_RTL (val, ret);
9232 }
9233
9234 return ret;
9235 }
9236
9237
9238 case CONSTRUCTOR:
9239 /* If we don't need the result, just ensure we evaluate any
9240 subexpressions. */
9241 if (ignore)
9242 {
9243 unsigned HOST_WIDE_INT idx;
9244 tree value;
9245
9246 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value)
9247 expand_expr (value, const0_rtx, VOIDmode, EXPAND_NORMAL);
9248
9249 return const0_rtx;
9250 }
9251
9252 return expand_constructor (exp, target, modifier, false);
9253
9254 case TARGET_MEM_REF:
9255 {
9256 addr_space_t as = TYPE_ADDR_SPACE (TREE_TYPE (exp));
9257 struct mem_address addr;
9258 enum insn_code icode;
9259 unsigned int align;
9260
9261 get_address_description (exp, &addr);
9262 op0 = addr_for_mem_ref (&addr, as, true);
9263 op0 = memory_address_addr_space (mode, op0, as);
9264 temp = gen_rtx_MEM (mode, op0);
9265 set_mem_attributes (temp, exp, 0);
9266 set_mem_addr_space (temp, as);
9267 align = get_object_or_type_alignment (exp);
9268 if (mode != BLKmode
9269 && align < GET_MODE_ALIGNMENT (mode)
9270 /* If the target does not have special handling for unaligned
9271 loads of mode then it can use regular moves for them. */
9272 && ((icode = optab_handler (movmisalign_optab, mode))
9273 != CODE_FOR_nothing))
9274 {
9275 struct expand_operand ops[2];
9276
9277 /* We've already validated the memory, and we're creating a
9278 new pseudo destination. The predicates really can't fail,
9279 nor can the generator. */
9280 create_output_operand (&ops[0], NULL_RTX, mode);
9281 create_fixed_operand (&ops[1], temp);
9282 expand_insn (icode, 2, ops);
9283 return ops[0].value;
9284 }
9285 return temp;
9286 }
9287
9288 case MEM_REF:
9289 {
9290 addr_space_t as
9291 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 1))));
9292 enum machine_mode address_mode;
9293 tree base = TREE_OPERAND (exp, 0);
9294 gimple def_stmt;
9295 enum insn_code icode;
9296 unsigned align;
9297 /* Handle expansion of non-aliased memory with non-BLKmode. That
9298 might end up in a register. */
9299 if (TREE_CODE (base) == ADDR_EXPR)
9300 {
9301 HOST_WIDE_INT offset = mem_ref_offset (exp).low;
9302 tree bit_offset;
9303 base = TREE_OPERAND (base, 0);
9304 if (!DECL_P (base))
9305 {
9306 HOST_WIDE_INT off;
9307 base = get_addr_base_and_unit_offset (base, &off);
9308 gcc_assert (base);
9309 offset += off;
9310 }
9311 /* If we are expanding a MEM_REF of a non-BLKmode non-addressable
9312 decl we must use bitfield operations. */
9313 if (DECL_P (base)
9314 && !TREE_ADDRESSABLE (base)
9315 && DECL_MODE (base) != BLKmode
9316 && DECL_RTL_SET_P (base)
9317 && !MEM_P (DECL_RTL (base)))
9318 {
9319 tree bftype;
9320 if (offset == 0
9321 && host_integerp (TYPE_SIZE (TREE_TYPE (exp)), 1)
9322 && (GET_MODE_BITSIZE (DECL_MODE (base))
9323 == TREE_INT_CST_LOW (TYPE_SIZE (TREE_TYPE (exp)))))
9324 return expand_expr (build1 (VIEW_CONVERT_EXPR,
9325 TREE_TYPE (exp), base),
9326 target, tmode, modifier);
9327 bit_offset = bitsize_int (offset * BITS_PER_UNIT);
9328 bftype = TREE_TYPE (base);
9329 if (TYPE_MODE (TREE_TYPE (exp)) != BLKmode)
9330 bftype = TREE_TYPE (exp);
9331 return expand_expr (build3 (BIT_FIELD_REF, bftype,
9332 base,
9333 TYPE_SIZE (TREE_TYPE (exp)),
9334 bit_offset),
9335 target, tmode, modifier);
9336 }
9337 }
9338 address_mode = targetm.addr_space.address_mode (as);
9339 base = TREE_OPERAND (exp, 0);
9340 if ((def_stmt = get_def_for_expr (base, BIT_AND_EXPR)))
9341 {
9342 tree mask = gimple_assign_rhs2 (def_stmt);
9343 base = build2 (BIT_AND_EXPR, TREE_TYPE (base),
9344 gimple_assign_rhs1 (def_stmt), mask);
9345 TREE_OPERAND (exp, 0) = base;
9346 }
9347 align = get_object_or_type_alignment (exp);
9348 op0 = expand_expr (base, NULL_RTX, VOIDmode, EXPAND_SUM);
9349 op0 = memory_address_addr_space (address_mode, op0, as);
9350 if (!integer_zerop (TREE_OPERAND (exp, 1)))
9351 {
9352 rtx off
9353 = immed_double_int_const (mem_ref_offset (exp), address_mode);
9354 op0 = simplify_gen_binary (PLUS, address_mode, op0, off);
9355 }
9356 op0 = memory_address_addr_space (mode, op0, as);
9357 temp = gen_rtx_MEM (mode, op0);
9358 set_mem_attributes (temp, exp, 0);
9359 set_mem_addr_space (temp, as);
9360 if (TREE_THIS_VOLATILE (exp))
9361 MEM_VOLATILE_P (temp) = 1;
9362 if (mode != BLKmode
9363 && align < GET_MODE_ALIGNMENT (mode)
9364 /* If the target does not have special handling for unaligned
9365 loads of mode then it can use regular moves for them. */
9366 && ((icode = optab_handler (movmisalign_optab, mode))
9367 != CODE_FOR_nothing))
9368 {
9369 struct expand_operand ops[2];
9370
9371 /* We've already validated the memory, and we're creating a
9372 new pseudo destination. The predicates really can't fail,
9373 nor can the generator. */
9374 create_output_operand (&ops[0], NULL_RTX, mode);
9375 create_fixed_operand (&ops[1], temp);
9376 expand_insn (icode, 2, ops);
9377 return ops[0].value;
9378 }
9379 return temp;
9380 }
9381
9382 case ARRAY_REF:
9383
9384 {
9385 tree array = treeop0;
9386 tree index = treeop1;
9387
9388 /* Fold an expression like: "foo"[2].
9389 This is not done in fold so it won't happen inside &.
9390 Don't fold if this is for wide characters since it's too
9391 difficult to do correctly and this is a very rare case. */
9392
9393 if (modifier != EXPAND_CONST_ADDRESS
9394 && modifier != EXPAND_INITIALIZER
9395 && modifier != EXPAND_MEMORY)
9396 {
9397 tree t = fold_read_from_constant_string (exp);
9398
9399 if (t)
9400 return expand_expr (t, target, tmode, modifier);
9401 }
9402
9403 /* If this is a constant index into a constant array,
9404 just get the value from the array. Handle both the cases when
9405 we have an explicit constructor and when our operand is a variable
9406 that was declared const. */
9407
9408 if (modifier != EXPAND_CONST_ADDRESS
9409 && modifier != EXPAND_INITIALIZER
9410 && modifier != EXPAND_MEMORY
9411 && TREE_CODE (array) == CONSTRUCTOR
9412 && ! TREE_SIDE_EFFECTS (array)
9413 && TREE_CODE (index) == INTEGER_CST)
9414 {
9415 unsigned HOST_WIDE_INT ix;
9416 tree field, value;
9417
9418 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (array), ix,
9419 field, value)
9420 if (tree_int_cst_equal (field, index))
9421 {
9422 if (!TREE_SIDE_EFFECTS (value))
9423 return expand_expr (fold (value), target, tmode, modifier);
9424 break;
9425 }
9426 }
9427
9428 else if (optimize >= 1
9429 && modifier != EXPAND_CONST_ADDRESS
9430 && modifier != EXPAND_INITIALIZER
9431 && modifier != EXPAND_MEMORY
9432 && TREE_READONLY (array) && ! TREE_SIDE_EFFECTS (array)
9433 && TREE_CODE (array) == VAR_DECL && DECL_INITIAL (array)
9434 && TREE_CODE (DECL_INITIAL (array)) != ERROR_MARK
9435 && const_value_known_p (array))
9436 {
9437 if (TREE_CODE (index) == INTEGER_CST)
9438 {
9439 tree init = DECL_INITIAL (array);
9440
9441 if (TREE_CODE (init) == CONSTRUCTOR)
9442 {
9443 unsigned HOST_WIDE_INT ix;
9444 tree field, value;
9445
9446 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (init), ix,
9447 field, value)
9448 if (tree_int_cst_equal (field, index))
9449 {
9450 if (TREE_SIDE_EFFECTS (value))
9451 break;
9452
9453 if (TREE_CODE (value) == CONSTRUCTOR)
9454 {
9455 /* If VALUE is a CONSTRUCTOR, this
9456 optimization is only useful if
9457 this doesn't store the CONSTRUCTOR
9458 into memory. If it does, it is more
9459 efficient to just load the data from
9460 the array directly. */
9461 rtx ret = expand_constructor (value, target,
9462 modifier, true);
9463 if (ret == NULL_RTX)
9464 break;
9465 }
9466
9467 return expand_expr (fold (value), target, tmode,
9468 modifier);
9469 }
9470 }
9471 else if(TREE_CODE (init) == STRING_CST)
9472 {
9473 tree index1 = index;
9474 tree low_bound = array_ref_low_bound (exp);
9475 index1 = fold_convert_loc (loc, sizetype,
9476 treeop1);
9477
9478 /* Optimize the special-case of a zero lower bound.
9479
9480 We convert the low_bound to sizetype to avoid some problems
9481 with constant folding. (E.g. suppose the lower bound is 1,
9482 and its mode is QI. Without the conversion,l (ARRAY
9483 +(INDEX-(unsigned char)1)) becomes ((ARRAY+(-(unsigned char)1))
9484 +INDEX), which becomes (ARRAY+255+INDEX). Opps!) */
9485
9486 if (! integer_zerop (low_bound))
9487 index1 = size_diffop_loc (loc, index1,
9488 fold_convert_loc (loc, sizetype,
9489 low_bound));
9490
9491 if (0 > compare_tree_int (index1,
9492 TREE_STRING_LENGTH (init)))
9493 {
9494 tree type = TREE_TYPE (TREE_TYPE (init));
9495 enum machine_mode mode = TYPE_MODE (type);
9496
9497 if (GET_MODE_CLASS (mode) == MODE_INT
9498 && GET_MODE_SIZE (mode) == 1)
9499 return gen_int_mode (TREE_STRING_POINTER (init)
9500 [TREE_INT_CST_LOW (index1)],
9501 mode);
9502 }
9503 }
9504 }
9505 }
9506 }
9507 goto normal_inner_ref;
9508
9509 case COMPONENT_REF:
9510 /* If the operand is a CONSTRUCTOR, we can just extract the
9511 appropriate field if it is present. */
9512 if (TREE_CODE (treeop0) == CONSTRUCTOR)
9513 {
9514 unsigned HOST_WIDE_INT idx;
9515 tree field, value;
9516
9517 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (treeop0),
9518 idx, field, value)
9519 if (field == treeop1
9520 /* We can normally use the value of the field in the
9521 CONSTRUCTOR. However, if this is a bitfield in
9522 an integral mode that we can fit in a HOST_WIDE_INT,
9523 we must mask only the number of bits in the bitfield,
9524 since this is done implicitly by the constructor. If
9525 the bitfield does not meet either of those conditions,
9526 we can't do this optimization. */
9527 && (! DECL_BIT_FIELD (field)
9528 || ((GET_MODE_CLASS (DECL_MODE (field)) == MODE_INT)
9529 && (GET_MODE_PRECISION (DECL_MODE (field))
9530 <= HOST_BITS_PER_WIDE_INT))))
9531 {
9532 if (DECL_BIT_FIELD (field)
9533 && modifier == EXPAND_STACK_PARM)
9534 target = 0;
9535 op0 = expand_expr (value, target, tmode, modifier);
9536 if (DECL_BIT_FIELD (field))
9537 {
9538 HOST_WIDE_INT bitsize = TREE_INT_CST_LOW (DECL_SIZE (field));
9539 enum machine_mode imode = TYPE_MODE (TREE_TYPE (field));
9540
9541 if (TYPE_UNSIGNED (TREE_TYPE (field)))
9542 {
9543 op1 = GEN_INT (((HOST_WIDE_INT) 1 << bitsize) - 1);
9544 op0 = expand_and (imode, op0, op1, target);
9545 }
9546 else
9547 {
9548 int count = GET_MODE_PRECISION (imode) - bitsize;
9549
9550 op0 = expand_shift (LSHIFT_EXPR, imode, op0, count,
9551 target, 0);
9552 op0 = expand_shift (RSHIFT_EXPR, imode, op0, count,
9553 target, 0);
9554 }
9555 }
9556
9557 return op0;
9558 }
9559 }
9560 goto normal_inner_ref;
9561
9562 case BIT_FIELD_REF:
9563 case ARRAY_RANGE_REF:
9564 normal_inner_ref:
9565 {
9566 enum machine_mode mode1, mode2;
9567 HOST_WIDE_INT bitsize, bitpos;
9568 tree offset;
9569 int volatilep = 0, must_force_mem;
9570 bool packedp = false;
9571 tree tem = get_inner_reference (exp, &bitsize, &bitpos, &offset,
9572 &mode1, &unsignedp, &volatilep, true);
9573 rtx orig_op0, memloc;
9574
9575 /* If we got back the original object, something is wrong. Perhaps
9576 we are evaluating an expression too early. In any event, don't
9577 infinitely recurse. */
9578 gcc_assert (tem != exp);
9579
9580 if (TYPE_PACKED (TREE_TYPE (TREE_OPERAND (exp, 0)))
9581 || (TREE_CODE (TREE_OPERAND (exp, 1)) == FIELD_DECL
9582 && DECL_PACKED (TREE_OPERAND (exp, 1))))
9583 packedp = true;
9584
9585 /* If TEM's type is a union of variable size, pass TARGET to the inner
9586 computation, since it will need a temporary and TARGET is known
9587 to have to do. This occurs in unchecked conversion in Ada. */
9588 orig_op0 = op0
9589 = expand_expr (tem,
9590 (TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE
9591 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem)))
9592 != INTEGER_CST)
9593 && modifier != EXPAND_STACK_PARM
9594 ? target : NULL_RTX),
9595 VOIDmode,
9596 (modifier == EXPAND_INITIALIZER
9597 || modifier == EXPAND_CONST_ADDRESS
9598 || modifier == EXPAND_STACK_PARM)
9599 ? modifier : EXPAND_NORMAL);
9600
9601
9602 /* If the bitfield is volatile, we want to access it in the
9603 field's mode, not the computed mode.
9604 If a MEM has VOIDmode (external with incomplete type),
9605 use BLKmode for it instead. */
9606 if (MEM_P (op0))
9607 {
9608 if (volatilep && flag_strict_volatile_bitfields > 0)
9609 op0 = adjust_address (op0, mode1, 0);
9610 else if (GET_MODE (op0) == VOIDmode)
9611 op0 = adjust_address (op0, BLKmode, 0);
9612 }
9613
9614 mode2
9615 = CONSTANT_P (op0) ? TYPE_MODE (TREE_TYPE (tem)) : GET_MODE (op0);
9616
9617 /* If we have either an offset, a BLKmode result, or a reference
9618 outside the underlying object, we must force it to memory.
9619 Such a case can occur in Ada if we have unchecked conversion
9620 of an expression from a scalar type to an aggregate type or
9621 for an ARRAY_RANGE_REF whose type is BLKmode, or if we were
9622 passed a partially uninitialized object or a view-conversion
9623 to a larger size. */
9624 must_force_mem = (offset
9625 || mode1 == BLKmode
9626 || bitpos + bitsize > GET_MODE_BITSIZE (mode2));
9627
9628 /* Handle CONCAT first. */
9629 if (GET_CODE (op0) == CONCAT && !must_force_mem)
9630 {
9631 if (bitpos == 0
9632 && bitsize == GET_MODE_BITSIZE (GET_MODE (op0)))
9633 return op0;
9634 if (bitpos == 0
9635 && bitsize == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 0)))
9636 && bitsize)
9637 {
9638 op0 = XEXP (op0, 0);
9639 mode2 = GET_MODE (op0);
9640 }
9641 else if (bitpos == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 0)))
9642 && bitsize == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 1)))
9643 && bitpos
9644 && bitsize)
9645 {
9646 op0 = XEXP (op0, 1);
9647 bitpos = 0;
9648 mode2 = GET_MODE (op0);
9649 }
9650 else
9651 /* Otherwise force into memory. */
9652 must_force_mem = 1;
9653 }
9654
9655 /* If this is a constant, put it in a register if it is a legitimate
9656 constant and we don't need a memory reference. */
9657 if (CONSTANT_P (op0)
9658 && mode2 != BLKmode
9659 && targetm.legitimate_constant_p (mode2, op0)
9660 && !must_force_mem)
9661 op0 = force_reg (mode2, op0);
9662
9663 /* Otherwise, if this is a constant, try to force it to the constant
9664 pool. Note that back-ends, e.g. MIPS, may refuse to do so if it
9665 is a legitimate constant. */
9666 else if (CONSTANT_P (op0) && (memloc = force_const_mem (mode2, op0)))
9667 op0 = validize_mem (memloc);
9668
9669 /* Otherwise, if this is a constant or the object is not in memory
9670 and need be, put it there. */
9671 else if (CONSTANT_P (op0) || (!MEM_P (op0) && must_force_mem))
9672 {
9673 tree nt = build_qualified_type (TREE_TYPE (tem),
9674 (TYPE_QUALS (TREE_TYPE (tem))
9675 | TYPE_QUAL_CONST));
9676 memloc = assign_temp (nt, 1, 1, 1);
9677 emit_move_insn (memloc, op0);
9678 op0 = memloc;
9679 }
9680
9681 if (offset)
9682 {
9683 enum machine_mode address_mode;
9684 rtx offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode,
9685 EXPAND_SUM);
9686
9687 gcc_assert (MEM_P (op0));
9688
9689 address_mode
9690 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (op0));
9691 if (GET_MODE (offset_rtx) != address_mode)
9692 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
9693
9694 if (GET_MODE (op0) == BLKmode
9695 /* A constant address in OP0 can have VOIDmode, we must
9696 not try to call force_reg in that case. */
9697 && GET_MODE (XEXP (op0, 0)) != VOIDmode
9698 && bitsize != 0
9699 && (bitpos % bitsize) == 0
9700 && (bitsize % GET_MODE_ALIGNMENT (mode1)) == 0
9701 && MEM_ALIGN (op0) == GET_MODE_ALIGNMENT (mode1))
9702 {
9703 op0 = adjust_address (op0, mode1, bitpos / BITS_PER_UNIT);
9704 bitpos = 0;
9705 }
9706
9707 op0 = offset_address (op0, offset_rtx,
9708 highest_pow2_factor (offset));
9709 }
9710
9711 /* If OFFSET is making OP0 more aligned than BIGGEST_ALIGNMENT,
9712 record its alignment as BIGGEST_ALIGNMENT. */
9713 if (MEM_P (op0) && bitpos == 0 && offset != 0
9714 && is_aligning_offset (offset, tem))
9715 set_mem_align (op0, BIGGEST_ALIGNMENT);
9716
9717 /* Don't forget about volatility even if this is a bitfield. */
9718 if (MEM_P (op0) && volatilep && ! MEM_VOLATILE_P (op0))
9719 {
9720 if (op0 == orig_op0)
9721 op0 = copy_rtx (op0);
9722
9723 MEM_VOLATILE_P (op0) = 1;
9724 }
9725
9726 /* In cases where an aligned union has an unaligned object
9727 as a field, we might be extracting a BLKmode value from
9728 an integer-mode (e.g., SImode) object. Handle this case
9729 by doing the extract into an object as wide as the field
9730 (which we know to be the width of a basic mode), then
9731 storing into memory, and changing the mode to BLKmode. */
9732 if (mode1 == VOIDmode
9733 || REG_P (op0) || GET_CODE (op0) == SUBREG
9734 || (mode1 != BLKmode && ! direct_load[(int) mode1]
9735 && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
9736 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT
9737 && modifier != EXPAND_CONST_ADDRESS
9738 && modifier != EXPAND_INITIALIZER)
9739 /* If the field is volatile, we always want an aligned
9740 access. Do this in following two situations:
9741 1. the access is not already naturally
9742 aligned, otherwise "normal" (non-bitfield) volatile fields
9743 become non-addressable.
9744 2. the bitsize is narrower than the access size. Need
9745 to extract bitfields from the access. */
9746 || (volatilep && flag_strict_volatile_bitfields > 0
9747 && (bitpos % GET_MODE_ALIGNMENT (mode) != 0
9748 || (mode1 != BLKmode
9749 && bitsize < GET_MODE_SIZE (mode1) * BITS_PER_UNIT)))
9750 /* If the field isn't aligned enough to fetch as a memref,
9751 fetch it as a bit field. */
9752 || (mode1 != BLKmode
9753 && (((TYPE_ALIGN (TREE_TYPE (tem)) < GET_MODE_ALIGNMENT (mode)
9754 || (bitpos % GET_MODE_ALIGNMENT (mode) != 0)
9755 || (MEM_P (op0)
9756 && (MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode1)
9757 || (bitpos % GET_MODE_ALIGNMENT (mode1) != 0))))
9758 && ((modifier == EXPAND_CONST_ADDRESS
9759 || modifier == EXPAND_INITIALIZER)
9760 ? STRICT_ALIGNMENT
9761 : SLOW_UNALIGNED_ACCESS (mode1, MEM_ALIGN (op0))))
9762 || (bitpos % BITS_PER_UNIT != 0)))
9763 /* If the type and the field are a constant size and the
9764 size of the type isn't the same size as the bitfield,
9765 we must use bitfield operations. */
9766 || (bitsize >= 0
9767 && TYPE_SIZE (TREE_TYPE (exp))
9768 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
9769 && 0 != compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)),
9770 bitsize)))
9771 {
9772 enum machine_mode ext_mode = mode;
9773
9774 if (ext_mode == BLKmode
9775 && ! (target != 0 && MEM_P (op0)
9776 && MEM_P (target)
9777 && bitpos % BITS_PER_UNIT == 0))
9778 ext_mode = mode_for_size (bitsize, MODE_INT, 1);
9779
9780 if (ext_mode == BLKmode)
9781 {
9782 if (target == 0)
9783 target = assign_temp (type, 0, 1, 1);
9784
9785 if (bitsize == 0)
9786 return target;
9787
9788 /* In this case, BITPOS must start at a byte boundary and
9789 TARGET, if specified, must be a MEM. */
9790 gcc_assert (MEM_P (op0)
9791 && (!target || MEM_P (target))
9792 && !(bitpos % BITS_PER_UNIT));
9793
9794 emit_block_move (target,
9795 adjust_address (op0, VOIDmode,
9796 bitpos / BITS_PER_UNIT),
9797 GEN_INT ((bitsize + BITS_PER_UNIT - 1)
9798 / BITS_PER_UNIT),
9799 (modifier == EXPAND_STACK_PARM
9800 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
9801
9802 return target;
9803 }
9804
9805 op0 = validize_mem (op0);
9806
9807 if (MEM_P (op0) && REG_P (XEXP (op0, 0)))
9808 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
9809
9810 op0 = extract_bit_field (op0, bitsize, bitpos, unsignedp, packedp,
9811 (modifier == EXPAND_STACK_PARM
9812 ? NULL_RTX : target),
9813 ext_mode, ext_mode);
9814
9815 /* If the result is a record type and BITSIZE is narrower than
9816 the mode of OP0, an integral mode, and this is a big endian
9817 machine, we must put the field into the high-order bits. */
9818 if (TREE_CODE (type) == RECORD_TYPE && BYTES_BIG_ENDIAN
9819 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT
9820 && bitsize < (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (op0)))
9821 op0 = expand_shift (LSHIFT_EXPR, GET_MODE (op0), op0,
9822 GET_MODE_BITSIZE (GET_MODE (op0))
9823 - bitsize, op0, 1);
9824
9825 /* If the result type is BLKmode, store the data into a temporary
9826 of the appropriate type, but with the mode corresponding to the
9827 mode for the data we have (op0's mode). It's tempting to make
9828 this a constant type, since we know it's only being stored once,
9829 but that can cause problems if we are taking the address of this
9830 COMPONENT_REF because the MEM of any reference via that address
9831 will have flags corresponding to the type, which will not
9832 necessarily be constant. */
9833 if (mode == BLKmode)
9834 {
9835 HOST_WIDE_INT size = GET_MODE_BITSIZE (ext_mode);
9836 rtx new_rtx;
9837
9838 /* If the reference doesn't use the alias set of its type,
9839 we cannot create the temporary using that type. */
9840 if (component_uses_parent_alias_set (exp))
9841 {
9842 new_rtx = assign_stack_local (ext_mode, size, 0);
9843 set_mem_alias_set (new_rtx, get_alias_set (exp));
9844 }
9845 else
9846 new_rtx = assign_stack_temp_for_type (ext_mode, size, 0, type);
9847
9848 emit_move_insn (new_rtx, op0);
9849 op0 = copy_rtx (new_rtx);
9850 PUT_MODE (op0, BLKmode);
9851 set_mem_attributes (op0, exp, 1);
9852 }
9853
9854 return op0;
9855 }
9856
9857 /* If the result is BLKmode, use that to access the object
9858 now as well. */
9859 if (mode == BLKmode)
9860 mode1 = BLKmode;
9861
9862 /* Get a reference to just this component. */
9863 if (modifier == EXPAND_CONST_ADDRESS
9864 || modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
9865 op0 = adjust_address_nv (op0, mode1, bitpos / BITS_PER_UNIT);
9866 else
9867 op0 = adjust_address (op0, mode1, bitpos / BITS_PER_UNIT);
9868
9869 if (op0 == orig_op0)
9870 op0 = copy_rtx (op0);
9871
9872 set_mem_attributes (op0, exp, 0);
9873 if (REG_P (XEXP (op0, 0)))
9874 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
9875
9876 MEM_VOLATILE_P (op0) |= volatilep;
9877 if (mode == mode1 || mode1 == BLKmode || mode1 == tmode
9878 || modifier == EXPAND_CONST_ADDRESS
9879 || modifier == EXPAND_INITIALIZER)
9880 return op0;
9881 else if (target == 0)
9882 target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode);
9883
9884 convert_move (target, op0, unsignedp);
9885 return target;
9886 }
9887
9888 case OBJ_TYPE_REF:
9889 return expand_expr (OBJ_TYPE_REF_EXPR (exp), target, tmode, modifier);
9890
9891 case CALL_EXPR:
9892 /* All valid uses of __builtin_va_arg_pack () are removed during
9893 inlining. */
9894 if (CALL_EXPR_VA_ARG_PACK (exp))
9895 error ("%Kinvalid use of %<__builtin_va_arg_pack ()%>", exp);
9896 {
9897 tree fndecl = get_callee_fndecl (exp), attr;
9898
9899 if (fndecl
9900 && (attr = lookup_attribute ("error",
9901 DECL_ATTRIBUTES (fndecl))) != NULL)
9902 error ("%Kcall to %qs declared with attribute error: %s",
9903 exp, identifier_to_locale (lang_hooks.decl_printable_name (fndecl, 1)),
9904 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr))));
9905 if (fndecl
9906 && (attr = lookup_attribute ("warning",
9907 DECL_ATTRIBUTES (fndecl))) != NULL)
9908 warning_at (tree_nonartificial_location (exp),
9909 0, "%Kcall to %qs declared with attribute warning: %s",
9910 exp, identifier_to_locale (lang_hooks.decl_printable_name (fndecl, 1)),
9911 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr))));
9912
9913 /* Check for a built-in function. */
9914 if (fndecl && DECL_BUILT_IN (fndecl))
9915 {
9916 gcc_assert (DECL_BUILT_IN_CLASS (fndecl) != BUILT_IN_FRONTEND);
9917 return expand_builtin (exp, target, subtarget, tmode, ignore);
9918 }
9919 }
9920 return expand_call (exp, target, ignore);
9921
9922 case VIEW_CONVERT_EXPR:
9923 op0 = NULL_RTX;
9924
9925 /* If we are converting to BLKmode, try to avoid an intermediate
9926 temporary by fetching an inner memory reference. */
9927 if (mode == BLKmode
9928 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
9929 && TYPE_MODE (TREE_TYPE (treeop0)) != BLKmode
9930 && handled_component_p (treeop0))
9931 {
9932 enum machine_mode mode1;
9933 HOST_WIDE_INT bitsize, bitpos;
9934 tree offset;
9935 int unsignedp;
9936 int volatilep = 0;
9937 tree tem
9938 = get_inner_reference (treeop0, &bitsize, &bitpos,
9939 &offset, &mode1, &unsignedp, &volatilep,
9940 true);
9941 rtx orig_op0;
9942
9943 /* ??? We should work harder and deal with non-zero offsets. */
9944 if (!offset
9945 && (bitpos % BITS_PER_UNIT) == 0
9946 && bitsize >= 0
9947 && compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)), bitsize) == 0)
9948 {
9949 /* See the normal_inner_ref case for the rationale. */
9950 orig_op0
9951 = expand_expr (tem,
9952 (TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE
9953 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem)))
9954 != INTEGER_CST)
9955 && modifier != EXPAND_STACK_PARM
9956 ? target : NULL_RTX),
9957 VOIDmode,
9958 (modifier == EXPAND_INITIALIZER
9959 || modifier == EXPAND_CONST_ADDRESS
9960 || modifier == EXPAND_STACK_PARM)
9961 ? modifier : EXPAND_NORMAL);
9962
9963 if (MEM_P (orig_op0))
9964 {
9965 op0 = orig_op0;
9966
9967 /* Get a reference to just this component. */
9968 if (modifier == EXPAND_CONST_ADDRESS
9969 || modifier == EXPAND_SUM
9970 || modifier == EXPAND_INITIALIZER)
9971 op0 = adjust_address_nv (op0, mode, bitpos / BITS_PER_UNIT);
9972 else
9973 op0 = adjust_address (op0, mode, bitpos / BITS_PER_UNIT);
9974
9975 if (op0 == orig_op0)
9976 op0 = copy_rtx (op0);
9977
9978 set_mem_attributes (op0, treeop0, 0);
9979 if (REG_P (XEXP (op0, 0)))
9980 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
9981
9982 MEM_VOLATILE_P (op0) |= volatilep;
9983 }
9984 }
9985 }
9986
9987 if (!op0)
9988 op0 = expand_expr (treeop0,
9989 NULL_RTX, VOIDmode, modifier);
9990
9991 /* If the input and output modes are both the same, we are done. */
9992 if (mode == GET_MODE (op0))
9993 ;
9994 /* If neither mode is BLKmode, and both modes are the same size
9995 then we can use gen_lowpart. */
9996 else if (mode != BLKmode && GET_MODE (op0) != BLKmode
9997 && (GET_MODE_PRECISION (mode)
9998 == GET_MODE_PRECISION (GET_MODE (op0)))
9999 && !COMPLEX_MODE_P (GET_MODE (op0)))
10000 {
10001 if (GET_CODE (op0) == SUBREG)
10002 op0 = force_reg (GET_MODE (op0), op0);
10003 temp = gen_lowpart_common (mode, op0);
10004 if (temp)
10005 op0 = temp;
10006 else
10007 {
10008 if (!REG_P (op0) && !MEM_P (op0))
10009 op0 = force_reg (GET_MODE (op0), op0);
10010 op0 = gen_lowpart (mode, op0);
10011 }
10012 }
10013 /* If both types are integral, convert from one mode to the other. */
10014 else if (INTEGRAL_TYPE_P (type) && INTEGRAL_TYPE_P (TREE_TYPE (treeop0)))
10015 op0 = convert_modes (mode, GET_MODE (op0), op0,
10016 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
10017 /* As a last resort, spill op0 to memory, and reload it in a
10018 different mode. */
10019 else if (!MEM_P (op0))
10020 {
10021 /* If the operand is not a MEM, force it into memory. Since we
10022 are going to be changing the mode of the MEM, don't call
10023 force_const_mem for constants because we don't allow pool
10024 constants to change mode. */
10025 tree inner_type = TREE_TYPE (treeop0);
10026
10027 gcc_assert (!TREE_ADDRESSABLE (exp));
10028
10029 if (target == 0 || GET_MODE (target) != TYPE_MODE (inner_type))
10030 target
10031 = assign_stack_temp_for_type
10032 (TYPE_MODE (inner_type),
10033 GET_MODE_SIZE (TYPE_MODE (inner_type)), 0, inner_type);
10034
10035 emit_move_insn (target, op0);
10036 op0 = target;
10037 }
10038
10039 /* At this point, OP0 is in the correct mode. If the output type is
10040 such that the operand is known to be aligned, indicate that it is.
10041 Otherwise, we need only be concerned about alignment for non-BLKmode
10042 results. */
10043 if (MEM_P (op0))
10044 {
10045 op0 = copy_rtx (op0);
10046
10047 if (TYPE_ALIGN_OK (type))
10048 set_mem_align (op0, MAX (MEM_ALIGN (op0), TYPE_ALIGN (type)));
10049 else if (STRICT_ALIGNMENT
10050 && mode != BLKmode
10051 && MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode))
10052 {
10053 tree inner_type = TREE_TYPE (treeop0);
10054 HOST_WIDE_INT temp_size
10055 = MAX (int_size_in_bytes (inner_type),
10056 (HOST_WIDE_INT) GET_MODE_SIZE (mode));
10057 rtx new_rtx
10058 = assign_stack_temp_for_type (mode, temp_size, 0, type);
10059 rtx new_with_op0_mode
10060 = adjust_address (new_rtx, GET_MODE (op0), 0);
10061
10062 gcc_assert (!TREE_ADDRESSABLE (exp));
10063
10064 if (GET_MODE (op0) == BLKmode)
10065 emit_block_move (new_with_op0_mode, op0,
10066 GEN_INT (GET_MODE_SIZE (mode)),
10067 (modifier == EXPAND_STACK_PARM
10068 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
10069 else
10070 emit_move_insn (new_with_op0_mode, op0);
10071
10072 op0 = new_rtx;
10073 }
10074
10075 op0 = adjust_address (op0, mode, 0);
10076 }
10077
10078 return op0;
10079
10080 case MODIFY_EXPR:
10081 {
10082 tree lhs = treeop0;
10083 tree rhs = treeop1;
10084 gcc_assert (ignore);
10085
10086 /* Check for |= or &= of a bitfield of size one into another bitfield
10087 of size 1. In this case, (unless we need the result of the
10088 assignment) we can do this more efficiently with a
10089 test followed by an assignment, if necessary.
10090
10091 ??? At this point, we can't get a BIT_FIELD_REF here. But if
10092 things change so we do, this code should be enhanced to
10093 support it. */
10094 if (TREE_CODE (lhs) == COMPONENT_REF
10095 && (TREE_CODE (rhs) == BIT_IOR_EXPR
10096 || TREE_CODE (rhs) == BIT_AND_EXPR)
10097 && TREE_OPERAND (rhs, 0) == lhs
10098 && TREE_CODE (TREE_OPERAND (rhs, 1)) == COMPONENT_REF
10099 && integer_onep (DECL_SIZE (TREE_OPERAND (lhs, 1)))
10100 && integer_onep (DECL_SIZE (TREE_OPERAND (TREE_OPERAND (rhs, 1), 1))))
10101 {
10102 rtx label = gen_label_rtx ();
10103 int value = TREE_CODE (rhs) == BIT_IOR_EXPR;
10104 do_jump (TREE_OPERAND (rhs, 1),
10105 value ? label : 0,
10106 value ? 0 : label, -1);
10107 expand_assignment (lhs, build_int_cst (TREE_TYPE (rhs), value),
10108 MOVE_NONTEMPORAL (exp));
10109 do_pending_stack_adjust ();
10110 emit_label (label);
10111 return const0_rtx;
10112 }
10113
10114 expand_assignment (lhs, rhs, MOVE_NONTEMPORAL (exp));
10115 return const0_rtx;
10116 }
10117
10118 case ADDR_EXPR:
10119 return expand_expr_addr_expr (exp, target, tmode, modifier);
10120
10121 case REALPART_EXPR:
10122 op0 = expand_normal (treeop0);
10123 return read_complex_part (op0, false);
10124
10125 case IMAGPART_EXPR:
10126 op0 = expand_normal (treeop0);
10127 return read_complex_part (op0, true);
10128
10129 case RETURN_EXPR:
10130 case LABEL_EXPR:
10131 case GOTO_EXPR:
10132 case SWITCH_EXPR:
10133 case ASM_EXPR:
10134 /* Expanded in cfgexpand.c. */
10135 gcc_unreachable ();
10136
10137 case TRY_CATCH_EXPR:
10138 case CATCH_EXPR:
10139 case EH_FILTER_EXPR:
10140 case TRY_FINALLY_EXPR:
10141 /* Lowered by tree-eh.c. */
10142 gcc_unreachable ();
10143
10144 case WITH_CLEANUP_EXPR:
10145 case CLEANUP_POINT_EXPR:
10146 case TARGET_EXPR:
10147 case CASE_LABEL_EXPR:
10148 case VA_ARG_EXPR:
10149 case BIND_EXPR:
10150 case INIT_EXPR:
10151 case CONJ_EXPR:
10152 case COMPOUND_EXPR:
10153 case PREINCREMENT_EXPR:
10154 case PREDECREMENT_EXPR:
10155 case POSTINCREMENT_EXPR:
10156 case POSTDECREMENT_EXPR:
10157 case LOOP_EXPR:
10158 case EXIT_EXPR:
10159 /* Lowered by gimplify.c. */
10160 gcc_unreachable ();
10161
10162 case FDESC_EXPR:
10163 /* Function descriptors are not valid except for as
10164 initialization constants, and should not be expanded. */
10165 gcc_unreachable ();
10166
10167 case WITH_SIZE_EXPR:
10168 /* WITH_SIZE_EXPR expands to its first argument. The caller should
10169 have pulled out the size to use in whatever context it needed. */
10170 return expand_expr_real (treeop0, original_target, tmode,
10171 modifier, alt_rtl);
10172
10173 case COMPOUND_LITERAL_EXPR:
10174 {
10175 /* Initialize the anonymous variable declared in the compound
10176 literal, then return the variable. */
10177 tree decl = COMPOUND_LITERAL_EXPR_DECL (exp);
10178
10179 /* Create RTL for this variable. */
10180 if (!DECL_RTL_SET_P (decl))
10181 {
10182 if (DECL_HARD_REGISTER (decl))
10183 /* The user specified an assembler name for this variable.
10184 Set that up now. */
10185 rest_of_decl_compilation (decl, 0, 0);
10186 else
10187 expand_decl (decl);
10188 }
10189
10190 return expand_expr_real (decl, original_target, tmode,
10191 modifier, alt_rtl);
10192 }
10193
10194 default:
10195 return expand_expr_real_2 (&ops, target, tmode, modifier);
10196 }
10197 }
10198 \f
10199 /* Subroutine of above: reduce EXP to the precision of TYPE (in the
10200 signedness of TYPE), possibly returning the result in TARGET. */
10201 static rtx
10202 reduce_to_bit_field_precision (rtx exp, rtx target, tree type)
10203 {
10204 HOST_WIDE_INT prec = TYPE_PRECISION (type);
10205 if (target && GET_MODE (target) != GET_MODE (exp))
10206 target = 0;
10207 /* For constant values, reduce using build_int_cst_type. */
10208 if (CONST_INT_P (exp))
10209 {
10210 HOST_WIDE_INT value = INTVAL (exp);
10211 tree t = build_int_cst_type (type, value);
10212 return expand_expr (t, target, VOIDmode, EXPAND_NORMAL);
10213 }
10214 else if (TYPE_UNSIGNED (type))
10215 {
10216 rtx mask = immed_double_int_const (double_int_mask (prec),
10217 GET_MODE (exp));
10218 return expand_and (GET_MODE (exp), exp, mask, target);
10219 }
10220 else
10221 {
10222 int count = GET_MODE_PRECISION (GET_MODE (exp)) - prec;
10223 exp = expand_shift (LSHIFT_EXPR, GET_MODE (exp),
10224 exp, count, target, 0);
10225 return expand_shift (RSHIFT_EXPR, GET_MODE (exp),
10226 exp, count, target, 0);
10227 }
10228 }
10229 \f
10230 /* Subroutine of above: returns 1 if OFFSET corresponds to an offset that
10231 when applied to the address of EXP produces an address known to be
10232 aligned more than BIGGEST_ALIGNMENT. */
10233
10234 static int
10235 is_aligning_offset (const_tree offset, const_tree exp)
10236 {
10237 /* Strip off any conversions. */
10238 while (CONVERT_EXPR_P (offset))
10239 offset = TREE_OPERAND (offset, 0);
10240
10241 /* We must now have a BIT_AND_EXPR with a constant that is one less than
10242 power of 2 and which is larger than BIGGEST_ALIGNMENT. */
10243 if (TREE_CODE (offset) != BIT_AND_EXPR
10244 || !host_integerp (TREE_OPERAND (offset, 1), 1)
10245 || compare_tree_int (TREE_OPERAND (offset, 1),
10246 BIGGEST_ALIGNMENT / BITS_PER_UNIT) <= 0
10247 || !exact_log2 (tree_low_cst (TREE_OPERAND (offset, 1), 1) + 1) < 0)
10248 return 0;
10249
10250 /* Look at the first operand of BIT_AND_EXPR and strip any conversion.
10251 It must be NEGATE_EXPR. Then strip any more conversions. */
10252 offset = TREE_OPERAND (offset, 0);
10253 while (CONVERT_EXPR_P (offset))
10254 offset = TREE_OPERAND (offset, 0);
10255
10256 if (TREE_CODE (offset) != NEGATE_EXPR)
10257 return 0;
10258
10259 offset = TREE_OPERAND (offset, 0);
10260 while (CONVERT_EXPR_P (offset))
10261 offset = TREE_OPERAND (offset, 0);
10262
10263 /* This must now be the address of EXP. */
10264 return TREE_CODE (offset) == ADDR_EXPR && TREE_OPERAND (offset, 0) == exp;
10265 }
10266 \f
10267 /* Return the tree node if an ARG corresponds to a string constant or zero
10268 if it doesn't. If we return nonzero, set *PTR_OFFSET to the offset
10269 in bytes within the string that ARG is accessing. The type of the
10270 offset will be `sizetype'. */
10271
10272 tree
10273 string_constant (tree arg, tree *ptr_offset)
10274 {
10275 tree array, offset, lower_bound;
10276 STRIP_NOPS (arg);
10277
10278 if (TREE_CODE (arg) == ADDR_EXPR)
10279 {
10280 if (TREE_CODE (TREE_OPERAND (arg, 0)) == STRING_CST)
10281 {
10282 *ptr_offset = size_zero_node;
10283 return TREE_OPERAND (arg, 0);
10284 }
10285 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == VAR_DECL)
10286 {
10287 array = TREE_OPERAND (arg, 0);
10288 offset = size_zero_node;
10289 }
10290 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == ARRAY_REF)
10291 {
10292 array = TREE_OPERAND (TREE_OPERAND (arg, 0), 0);
10293 offset = TREE_OPERAND (TREE_OPERAND (arg, 0), 1);
10294 if (TREE_CODE (array) != STRING_CST
10295 && TREE_CODE (array) != VAR_DECL)
10296 return 0;
10297
10298 /* Check if the array has a nonzero lower bound. */
10299 lower_bound = array_ref_low_bound (TREE_OPERAND (arg, 0));
10300 if (!integer_zerop (lower_bound))
10301 {
10302 /* If the offset and base aren't both constants, return 0. */
10303 if (TREE_CODE (lower_bound) != INTEGER_CST)
10304 return 0;
10305 if (TREE_CODE (offset) != INTEGER_CST)
10306 return 0;
10307 /* Adjust offset by the lower bound. */
10308 offset = size_diffop (fold_convert (sizetype, offset),
10309 fold_convert (sizetype, lower_bound));
10310 }
10311 }
10312 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == MEM_REF)
10313 {
10314 array = TREE_OPERAND (TREE_OPERAND (arg, 0), 0);
10315 offset = TREE_OPERAND (TREE_OPERAND (arg, 0), 1);
10316 if (TREE_CODE (array) != ADDR_EXPR)
10317 return 0;
10318 array = TREE_OPERAND (array, 0);
10319 if (TREE_CODE (array) != STRING_CST
10320 && TREE_CODE (array) != VAR_DECL)
10321 return 0;
10322 }
10323 else
10324 return 0;
10325 }
10326 else if (TREE_CODE (arg) == PLUS_EXPR || TREE_CODE (arg) == POINTER_PLUS_EXPR)
10327 {
10328 tree arg0 = TREE_OPERAND (arg, 0);
10329 tree arg1 = TREE_OPERAND (arg, 1);
10330
10331 STRIP_NOPS (arg0);
10332 STRIP_NOPS (arg1);
10333
10334 if (TREE_CODE (arg0) == ADDR_EXPR
10335 && (TREE_CODE (TREE_OPERAND (arg0, 0)) == STRING_CST
10336 || TREE_CODE (TREE_OPERAND (arg0, 0)) == VAR_DECL))
10337 {
10338 array = TREE_OPERAND (arg0, 0);
10339 offset = arg1;
10340 }
10341 else if (TREE_CODE (arg1) == ADDR_EXPR
10342 && (TREE_CODE (TREE_OPERAND (arg1, 0)) == STRING_CST
10343 || TREE_CODE (TREE_OPERAND (arg1, 0)) == VAR_DECL))
10344 {
10345 array = TREE_OPERAND (arg1, 0);
10346 offset = arg0;
10347 }
10348 else
10349 return 0;
10350 }
10351 else
10352 return 0;
10353
10354 if (TREE_CODE (array) == STRING_CST)
10355 {
10356 *ptr_offset = fold_convert (sizetype, offset);
10357 return array;
10358 }
10359 else if (TREE_CODE (array) == VAR_DECL
10360 || TREE_CODE (array) == CONST_DECL)
10361 {
10362 int length;
10363
10364 /* Variables initialized to string literals can be handled too. */
10365 if (!const_value_known_p (array)
10366 || !DECL_INITIAL (array)
10367 || TREE_CODE (DECL_INITIAL (array)) != STRING_CST)
10368 return 0;
10369
10370 /* Avoid const char foo[4] = "abcde"; */
10371 if (DECL_SIZE_UNIT (array) == NULL_TREE
10372 || TREE_CODE (DECL_SIZE_UNIT (array)) != INTEGER_CST
10373 || (length = TREE_STRING_LENGTH (DECL_INITIAL (array))) <= 0
10374 || compare_tree_int (DECL_SIZE_UNIT (array), length) < 0)
10375 return 0;
10376
10377 /* If variable is bigger than the string literal, OFFSET must be constant
10378 and inside of the bounds of the string literal. */
10379 offset = fold_convert (sizetype, offset);
10380 if (compare_tree_int (DECL_SIZE_UNIT (array), length) > 0
10381 && (! host_integerp (offset, 1)
10382 || compare_tree_int (offset, length) >= 0))
10383 return 0;
10384
10385 *ptr_offset = offset;
10386 return DECL_INITIAL (array);
10387 }
10388
10389 return 0;
10390 }
10391 \f
10392 /* Generate code to calculate OPS, and exploded expression
10393 using a store-flag instruction and return an rtx for the result.
10394 OPS reflects a comparison.
10395
10396 If TARGET is nonzero, store the result there if convenient.
10397
10398 Return zero if there is no suitable set-flag instruction
10399 available on this machine.
10400
10401 Once expand_expr has been called on the arguments of the comparison,
10402 we are committed to doing the store flag, since it is not safe to
10403 re-evaluate the expression. We emit the store-flag insn by calling
10404 emit_store_flag, but only expand the arguments if we have a reason
10405 to believe that emit_store_flag will be successful. If we think that
10406 it will, but it isn't, we have to simulate the store-flag with a
10407 set/jump/set sequence. */
10408
10409 static rtx
10410 do_store_flag (sepops ops, rtx target, enum machine_mode mode)
10411 {
10412 enum rtx_code code;
10413 tree arg0, arg1, type;
10414 tree tem;
10415 enum machine_mode operand_mode;
10416 int unsignedp;
10417 rtx op0, op1;
10418 rtx subtarget = target;
10419 location_t loc = ops->location;
10420
10421 arg0 = ops->op0;
10422 arg1 = ops->op1;
10423
10424 /* Don't crash if the comparison was erroneous. */
10425 if (arg0 == error_mark_node || arg1 == error_mark_node)
10426 return const0_rtx;
10427
10428 type = TREE_TYPE (arg0);
10429 operand_mode = TYPE_MODE (type);
10430 unsignedp = TYPE_UNSIGNED (type);
10431
10432 /* We won't bother with BLKmode store-flag operations because it would mean
10433 passing a lot of information to emit_store_flag. */
10434 if (operand_mode == BLKmode)
10435 return 0;
10436
10437 /* We won't bother with store-flag operations involving function pointers
10438 when function pointers must be canonicalized before comparisons. */
10439 #ifdef HAVE_canonicalize_funcptr_for_compare
10440 if (HAVE_canonicalize_funcptr_for_compare
10441 && ((TREE_CODE (TREE_TYPE (arg0)) == POINTER_TYPE
10442 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg0)))
10443 == FUNCTION_TYPE))
10444 || (TREE_CODE (TREE_TYPE (arg1)) == POINTER_TYPE
10445 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg1)))
10446 == FUNCTION_TYPE))))
10447 return 0;
10448 #endif
10449
10450 STRIP_NOPS (arg0);
10451 STRIP_NOPS (arg1);
10452
10453 /* For vector typed comparisons emit code to generate the desired
10454 all-ones or all-zeros mask. Conveniently use the VEC_COND_EXPR
10455 expander for this. */
10456 if (TREE_CODE (ops->type) == VECTOR_TYPE)
10457 {
10458 tree ifexp = build2 (ops->code, ops->type, arg0, arg1);
10459 tree if_true = constant_boolean_node (true, ops->type);
10460 tree if_false = constant_boolean_node (false, ops->type);
10461 return expand_vec_cond_expr (ops->type, ifexp, if_true, if_false, target);
10462 }
10463
10464 /* For vector typed comparisons emit code to generate the desired
10465 all-ones or all-zeros mask. Conveniently use the VEC_COND_EXPR
10466 expander for this. */
10467 if (TREE_CODE (ops->type) == VECTOR_TYPE)
10468 {
10469 tree ifexp = build2 (ops->code, ops->type, arg0, arg1);
10470 tree if_true = constant_boolean_node (true, ops->type);
10471 tree if_false = constant_boolean_node (false, ops->type);
10472 return expand_vec_cond_expr (ops->type, ifexp, if_true, if_false, target);
10473 }
10474
10475 /* Get the rtx comparison code to use. We know that EXP is a comparison
10476 operation of some type. Some comparisons against 1 and -1 can be
10477 converted to comparisons with zero. Do so here so that the tests
10478 below will be aware that we have a comparison with zero. These
10479 tests will not catch constants in the first operand, but constants
10480 are rarely passed as the first operand. */
10481
10482 switch (ops->code)
10483 {
10484 case EQ_EXPR:
10485 code = EQ;
10486 break;
10487 case NE_EXPR:
10488 code = NE;
10489 break;
10490 case LT_EXPR:
10491 if (integer_onep (arg1))
10492 arg1 = integer_zero_node, code = unsignedp ? LEU : LE;
10493 else
10494 code = unsignedp ? LTU : LT;
10495 break;
10496 case LE_EXPR:
10497 if (! unsignedp && integer_all_onesp (arg1))
10498 arg1 = integer_zero_node, code = LT;
10499 else
10500 code = unsignedp ? LEU : LE;
10501 break;
10502 case GT_EXPR:
10503 if (! unsignedp && integer_all_onesp (arg1))
10504 arg1 = integer_zero_node, code = GE;
10505 else
10506 code = unsignedp ? GTU : GT;
10507 break;
10508 case GE_EXPR:
10509 if (integer_onep (arg1))
10510 arg1 = integer_zero_node, code = unsignedp ? GTU : GT;
10511 else
10512 code = unsignedp ? GEU : GE;
10513 break;
10514
10515 case UNORDERED_EXPR:
10516 code = UNORDERED;
10517 break;
10518 case ORDERED_EXPR:
10519 code = ORDERED;
10520 break;
10521 case UNLT_EXPR:
10522 code = UNLT;
10523 break;
10524 case UNLE_EXPR:
10525 code = UNLE;
10526 break;
10527 case UNGT_EXPR:
10528 code = UNGT;
10529 break;
10530 case UNGE_EXPR:
10531 code = UNGE;
10532 break;
10533 case UNEQ_EXPR:
10534 code = UNEQ;
10535 break;
10536 case LTGT_EXPR:
10537 code = LTGT;
10538 break;
10539
10540 default:
10541 gcc_unreachable ();
10542 }
10543
10544 /* Put a constant second. */
10545 if (TREE_CODE (arg0) == REAL_CST || TREE_CODE (arg0) == INTEGER_CST
10546 || TREE_CODE (arg0) == FIXED_CST)
10547 {
10548 tem = arg0; arg0 = arg1; arg1 = tem;
10549 code = swap_condition (code);
10550 }
10551
10552 /* If this is an equality or inequality test of a single bit, we can
10553 do this by shifting the bit being tested to the low-order bit and
10554 masking the result with the constant 1. If the condition was EQ,
10555 we xor it with 1. This does not require an scc insn and is faster
10556 than an scc insn even if we have it.
10557
10558 The code to make this transformation was moved into fold_single_bit_test,
10559 so we just call into the folder and expand its result. */
10560
10561 if ((code == NE || code == EQ)
10562 && integer_zerop (arg1)
10563 && (TYPE_PRECISION (ops->type) != 1 || TYPE_UNSIGNED (ops->type)))
10564 {
10565 gimple srcstmt = get_def_for_expr (arg0, BIT_AND_EXPR);
10566 if (srcstmt
10567 && integer_pow2p (gimple_assign_rhs2 (srcstmt)))
10568 {
10569 enum tree_code tcode = code == NE ? NE_EXPR : EQ_EXPR;
10570 tree type = lang_hooks.types.type_for_mode (mode, unsignedp);
10571 tree temp = fold_build2_loc (loc, BIT_AND_EXPR, TREE_TYPE (arg1),
10572 gimple_assign_rhs1 (srcstmt),
10573 gimple_assign_rhs2 (srcstmt));
10574 temp = fold_single_bit_test (loc, tcode, temp, arg1, type);
10575 if (temp)
10576 return expand_expr (temp, target, VOIDmode, EXPAND_NORMAL);
10577 }
10578 }
10579
10580 if (! get_subtarget (target)
10581 || GET_MODE (subtarget) != operand_mode)
10582 subtarget = 0;
10583
10584 expand_operands (arg0, arg1, subtarget, &op0, &op1, EXPAND_NORMAL);
10585
10586 if (target == 0)
10587 target = gen_reg_rtx (mode);
10588
10589 /* Try a cstore if possible. */
10590 return emit_store_flag_force (target, code, op0, op1,
10591 operand_mode, unsignedp,
10592 (TYPE_PRECISION (ops->type) == 1
10593 && !TYPE_UNSIGNED (ops->type)) ? -1 : 1);
10594 }
10595 \f
10596
10597 /* Stubs in case we haven't got a casesi insn. */
10598 #ifndef HAVE_casesi
10599 # define HAVE_casesi 0
10600 # define gen_casesi(a, b, c, d, e) (0)
10601 # define CODE_FOR_casesi CODE_FOR_nothing
10602 #endif
10603
10604 /* Attempt to generate a casesi instruction. Returns 1 if successful,
10605 0 otherwise (i.e. if there is no casesi instruction). */
10606 int
10607 try_casesi (tree index_type, tree index_expr, tree minval, tree range,
10608 rtx table_label ATTRIBUTE_UNUSED, rtx default_label,
10609 rtx fallback_label ATTRIBUTE_UNUSED)
10610 {
10611 struct expand_operand ops[5];
10612 enum machine_mode index_mode = SImode;
10613 int index_bits = GET_MODE_BITSIZE (index_mode);
10614 rtx op1, op2, index;
10615
10616 if (! HAVE_casesi)
10617 return 0;
10618
10619 /* Convert the index to SImode. */
10620 if (GET_MODE_BITSIZE (TYPE_MODE (index_type)) > GET_MODE_BITSIZE (index_mode))
10621 {
10622 enum machine_mode omode = TYPE_MODE (index_type);
10623 rtx rangertx = expand_normal (range);
10624
10625 /* We must handle the endpoints in the original mode. */
10626 index_expr = build2 (MINUS_EXPR, index_type,
10627 index_expr, minval);
10628 minval = integer_zero_node;
10629 index = expand_normal (index_expr);
10630 if (default_label)
10631 emit_cmp_and_jump_insns (rangertx, index, LTU, NULL_RTX,
10632 omode, 1, default_label);
10633 /* Now we can safely truncate. */
10634 index = convert_to_mode (index_mode, index, 0);
10635 }
10636 else
10637 {
10638 if (TYPE_MODE (index_type) != index_mode)
10639 {
10640 index_type = lang_hooks.types.type_for_size (index_bits, 0);
10641 index_expr = fold_convert (index_type, index_expr);
10642 }
10643
10644 index = expand_normal (index_expr);
10645 }
10646
10647 do_pending_stack_adjust ();
10648
10649 op1 = expand_normal (minval);
10650 op2 = expand_normal (range);
10651
10652 create_input_operand (&ops[0], index, index_mode);
10653 create_convert_operand_from_type (&ops[1], op1, TREE_TYPE (minval));
10654 create_convert_operand_from_type (&ops[2], op2, TREE_TYPE (range));
10655 create_fixed_operand (&ops[3], table_label);
10656 create_fixed_operand (&ops[4], (default_label
10657 ? default_label
10658 : fallback_label));
10659 expand_jump_insn (CODE_FOR_casesi, 5, ops);
10660 return 1;
10661 }
10662
10663 /* Attempt to generate a tablejump instruction; same concept. */
10664 #ifndef HAVE_tablejump
10665 #define HAVE_tablejump 0
10666 #define gen_tablejump(x, y) (0)
10667 #endif
10668
10669 /* Subroutine of the next function.
10670
10671 INDEX is the value being switched on, with the lowest value
10672 in the table already subtracted.
10673 MODE is its expected mode (needed if INDEX is constant).
10674 RANGE is the length of the jump table.
10675 TABLE_LABEL is a CODE_LABEL rtx for the table itself.
10676
10677 DEFAULT_LABEL is a CODE_LABEL rtx to jump to if the
10678 index value is out of range. */
10679
10680 static void
10681 do_tablejump (rtx index, enum machine_mode mode, rtx range, rtx table_label,
10682 rtx default_label)
10683 {
10684 rtx temp, vector;
10685
10686 if (INTVAL (range) > cfun->cfg->max_jumptable_ents)
10687 cfun->cfg->max_jumptable_ents = INTVAL (range);
10688
10689 /* Do an unsigned comparison (in the proper mode) between the index
10690 expression and the value which represents the length of the range.
10691 Since we just finished subtracting the lower bound of the range
10692 from the index expression, this comparison allows us to simultaneously
10693 check that the original index expression value is both greater than
10694 or equal to the minimum value of the range and less than or equal to
10695 the maximum value of the range. */
10696
10697 if (default_label)
10698 emit_cmp_and_jump_insns (index, range, GTU, NULL_RTX, mode, 1,
10699 default_label);
10700
10701 /* If index is in range, it must fit in Pmode.
10702 Convert to Pmode so we can index with it. */
10703 if (mode != Pmode)
10704 index = convert_to_mode (Pmode, index, 1);
10705
10706 /* Don't let a MEM slip through, because then INDEX that comes
10707 out of PIC_CASE_VECTOR_ADDRESS won't be a valid address,
10708 and break_out_memory_refs will go to work on it and mess it up. */
10709 #ifdef PIC_CASE_VECTOR_ADDRESS
10710 if (flag_pic && !REG_P (index))
10711 index = copy_to_mode_reg (Pmode, index);
10712 #endif
10713
10714 /* ??? The only correct use of CASE_VECTOR_MODE is the one inside the
10715 GET_MODE_SIZE, because this indicates how large insns are. The other
10716 uses should all be Pmode, because they are addresses. This code
10717 could fail if addresses and insns are not the same size. */
10718 index = gen_rtx_PLUS (Pmode,
10719 gen_rtx_MULT (Pmode, index,
10720 GEN_INT (GET_MODE_SIZE (CASE_VECTOR_MODE))),
10721 gen_rtx_LABEL_REF (Pmode, table_label));
10722 #ifdef PIC_CASE_VECTOR_ADDRESS
10723 if (flag_pic)
10724 index = PIC_CASE_VECTOR_ADDRESS (index);
10725 else
10726 #endif
10727 index = memory_address (CASE_VECTOR_MODE, index);
10728 temp = gen_reg_rtx (CASE_VECTOR_MODE);
10729 vector = gen_const_mem (CASE_VECTOR_MODE, index);
10730 convert_move (temp, vector, 0);
10731
10732 emit_jump_insn (gen_tablejump (temp, table_label));
10733
10734 /* If we are generating PIC code or if the table is PC-relative, the
10735 table and JUMP_INSN must be adjacent, so don't output a BARRIER. */
10736 if (! CASE_VECTOR_PC_RELATIVE && ! flag_pic)
10737 emit_barrier ();
10738 }
10739
10740 int
10741 try_tablejump (tree index_type, tree index_expr, tree minval, tree range,
10742 rtx table_label, rtx default_label)
10743 {
10744 rtx index;
10745
10746 if (! HAVE_tablejump)
10747 return 0;
10748
10749 index_expr = fold_build2 (MINUS_EXPR, index_type,
10750 fold_convert (index_type, index_expr),
10751 fold_convert (index_type, minval));
10752 index = expand_normal (index_expr);
10753 do_pending_stack_adjust ();
10754
10755 do_tablejump (index, TYPE_MODE (index_type),
10756 convert_modes (TYPE_MODE (index_type),
10757 TYPE_MODE (TREE_TYPE (range)),
10758 expand_normal (range),
10759 TYPE_UNSIGNED (TREE_TYPE (range))),
10760 table_label, default_label);
10761 return 1;
10762 }
10763
10764 /* Return a CONST_VECTOR rtx for a VECTOR_CST tree. */
10765 static rtx
10766 const_vector_from_tree (tree exp)
10767 {
10768 rtvec v;
10769 int units, i;
10770 tree link, elt;
10771 enum machine_mode inner, mode;
10772
10773 mode = TYPE_MODE (TREE_TYPE (exp));
10774
10775 if (initializer_zerop (exp))
10776 return CONST0_RTX (mode);
10777
10778 units = GET_MODE_NUNITS (mode);
10779 inner = GET_MODE_INNER (mode);
10780
10781 v = rtvec_alloc (units);
10782
10783 link = TREE_VECTOR_CST_ELTS (exp);
10784 for (i = 0; link; link = TREE_CHAIN (link), ++i)
10785 {
10786 elt = TREE_VALUE (link);
10787
10788 if (TREE_CODE (elt) == REAL_CST)
10789 RTVEC_ELT (v, i) = CONST_DOUBLE_FROM_REAL_VALUE (TREE_REAL_CST (elt),
10790 inner);
10791 else if (TREE_CODE (elt) == FIXED_CST)
10792 RTVEC_ELT (v, i) = CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (elt),
10793 inner);
10794 else
10795 RTVEC_ELT (v, i) = immed_double_int_const (tree_to_double_int (elt),
10796 inner);
10797 }
10798
10799 /* Initialize remaining elements to 0. */
10800 for (; i < units; ++i)
10801 RTVEC_ELT (v, i) = CONST0_RTX (inner);
10802
10803 return gen_rtx_CONST_VECTOR (mode, v);
10804 }
10805
10806 /* Build a decl for a personality function given a language prefix. */
10807
10808 tree
10809 build_personality_function (const char *lang)
10810 {
10811 const char *unwind_and_version;
10812 tree decl, type;
10813 char *name;
10814
10815 switch (targetm_common.except_unwind_info (&global_options))
10816 {
10817 case UI_NONE:
10818 return NULL;
10819 case UI_SJLJ:
10820 unwind_and_version = "_sj0";
10821 break;
10822 case UI_DWARF2:
10823 case UI_TARGET:
10824 unwind_and_version = "_v0";
10825 break;
10826 default:
10827 gcc_unreachable ();
10828 }
10829
10830 name = ACONCAT (("__", lang, "_personality", unwind_and_version, NULL));
10831
10832 type = build_function_type_list (integer_type_node, integer_type_node,
10833 long_long_unsigned_type_node,
10834 ptr_type_node, ptr_type_node, NULL_TREE);
10835 decl = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL,
10836 get_identifier (name), type);
10837 DECL_ARTIFICIAL (decl) = 1;
10838 DECL_EXTERNAL (decl) = 1;
10839 TREE_PUBLIC (decl) = 1;
10840
10841 /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with
10842 are the flags assigned by targetm.encode_section_info. */
10843 SET_SYMBOL_REF_DECL (XEXP (DECL_RTL (decl), 0), NULL);
10844
10845 return decl;
10846 }
10847
10848 /* Extracts the personality function of DECL and returns the corresponding
10849 libfunc. */
10850
10851 rtx
10852 get_personality_function (tree decl)
10853 {
10854 tree personality = DECL_FUNCTION_PERSONALITY (decl);
10855 enum eh_personality_kind pk;
10856
10857 pk = function_needs_eh_personality (DECL_STRUCT_FUNCTION (decl));
10858 if (pk == eh_personality_none)
10859 return NULL;
10860
10861 if (!personality
10862 && pk == eh_personality_any)
10863 personality = lang_hooks.eh_personality ();
10864
10865 if (pk == eh_personality_lang)
10866 gcc_assert (personality != NULL_TREE);
10867
10868 return XEXP (DECL_RTL (personality), 0);
10869 }
10870
10871 #include "gt-expr.h"