move default for STACK_PUSH_CODE to defaults.h
[gcc.git] / gcc / expr.c
1 /* Convert tree expression to rtl instructions, for GNU compiler.
2 Copyright (C) 1988-2015 Free Software Foundation, Inc.
3
4 This file is part of GCC.
5
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
9 version.
10
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
19
20 #include "config.h"
21 #include "system.h"
22 #include "coretypes.h"
23 #include "tm.h"
24 #include "machmode.h"
25 #include "rtl.h"
26 #include "hash-set.h"
27 #include "vec.h"
28 #include "double-int.h"
29 #include "input.h"
30 #include "alias.h"
31 #include "symtab.h"
32 #include "wide-int.h"
33 #include "inchash.h"
34 #include "tree.h"
35 #include "fold-const.h"
36 #include "stringpool.h"
37 #include "stor-layout.h"
38 #include "attribs.h"
39 #include "varasm.h"
40 #include "flags.h"
41 #include "regs.h"
42 #include "hard-reg-set.h"
43 #include "except.h"
44 #include "function.h"
45 #include "insn-config.h"
46 #include "insn-attr.h"
47 #include "hashtab.h"
48 #include "statistics.h"
49 #include "real.h"
50 #include "fixed-value.h"
51 #include "expmed.h"
52 #include "dojump.h"
53 #include "explow.h"
54 #include "calls.h"
55 #include "emit-rtl.h"
56 #include "stmt.h"
57 /* Include expr.h after insn-config.h so we get HAVE_conditional_move. */
58 #include "expr.h"
59 #include "insn-codes.h"
60 #include "optabs.h"
61 #include "libfuncs.h"
62 #include "recog.h"
63 #include "reload.h"
64 #include "typeclass.h"
65 #include "toplev.h"
66 #include "langhooks.h"
67 #include "intl.h"
68 #include "tm_p.h"
69 #include "tree-iterator.h"
70 #include "predict.h"
71 #include "dominance.h"
72 #include "cfg.h"
73 #include "basic-block.h"
74 #include "tree-ssa-alias.h"
75 #include "internal-fn.h"
76 #include "gimple-expr.h"
77 #include "is-a.h"
78 #include "gimple.h"
79 #include "gimple-ssa.h"
80 #include "hash-map.h"
81 #include "plugin-api.h"
82 #include "ipa-ref.h"
83 #include "cgraph.h"
84 #include "tree-ssanames.h"
85 #include "target.h"
86 #include "common/common-target.h"
87 #include "timevar.h"
88 #include "df.h"
89 #include "diagnostic.h"
90 #include "tree-ssa-live.h"
91 #include "tree-outof-ssa.h"
92 #include "target-globals.h"
93 #include "params.h"
94 #include "tree-ssa-address.h"
95 #include "cfgexpand.h"
96 #include "builtins.h"
97 #include "tree-chkp.h"
98 #include "rtl-chkp.h"
99 #include "ccmp.h"
100
101
102 /* If this is nonzero, we do not bother generating VOLATILE
103 around volatile memory references, and we are willing to
104 output indirect addresses. If cse is to follow, we reject
105 indirect addresses so a useful potential cse is generated;
106 if it is used only once, instruction combination will produce
107 the same indirect address eventually. */
108 int cse_not_expected;
109
110 /* This structure is used by move_by_pieces to describe the move to
111 be performed. */
112 struct move_by_pieces_d
113 {
114 rtx to;
115 rtx to_addr;
116 int autinc_to;
117 int explicit_inc_to;
118 rtx from;
119 rtx from_addr;
120 int autinc_from;
121 int explicit_inc_from;
122 unsigned HOST_WIDE_INT len;
123 HOST_WIDE_INT offset;
124 int reverse;
125 };
126
127 /* This structure is used by store_by_pieces to describe the clear to
128 be performed. */
129
130 struct store_by_pieces_d
131 {
132 rtx to;
133 rtx to_addr;
134 int autinc_to;
135 int explicit_inc_to;
136 unsigned HOST_WIDE_INT len;
137 HOST_WIDE_INT offset;
138 rtx (*constfun) (void *, HOST_WIDE_INT, machine_mode);
139 void *constfundata;
140 int reverse;
141 };
142
143 static void move_by_pieces_1 (insn_gen_fn, machine_mode,
144 struct move_by_pieces_d *);
145 static bool block_move_libcall_safe_for_call_parm (void);
146 static bool emit_block_move_via_movmem (rtx, rtx, rtx, unsigned, unsigned, HOST_WIDE_INT,
147 unsigned HOST_WIDE_INT, unsigned HOST_WIDE_INT,
148 unsigned HOST_WIDE_INT);
149 static tree emit_block_move_libcall_fn (int);
150 static void emit_block_move_via_loop (rtx, rtx, rtx, unsigned);
151 static rtx clear_by_pieces_1 (void *, HOST_WIDE_INT, machine_mode);
152 static void clear_by_pieces (rtx, unsigned HOST_WIDE_INT, unsigned int);
153 static void store_by_pieces_1 (struct store_by_pieces_d *, unsigned int);
154 static void store_by_pieces_2 (insn_gen_fn, machine_mode,
155 struct store_by_pieces_d *);
156 static tree clear_storage_libcall_fn (int);
157 static rtx_insn *compress_float_constant (rtx, rtx);
158 static rtx get_subtarget (rtx);
159 static void store_constructor_field (rtx, unsigned HOST_WIDE_INT,
160 HOST_WIDE_INT, machine_mode,
161 tree, int, alias_set_type);
162 static void store_constructor (tree, rtx, int, HOST_WIDE_INT);
163 static rtx store_field (rtx, HOST_WIDE_INT, HOST_WIDE_INT,
164 unsigned HOST_WIDE_INT, unsigned HOST_WIDE_INT,
165 machine_mode, tree, alias_set_type, bool);
166
167 static unsigned HOST_WIDE_INT highest_pow2_factor_for_target (const_tree, const_tree);
168
169 static int is_aligning_offset (const_tree, const_tree);
170 static rtx reduce_to_bit_field_precision (rtx, rtx, tree);
171 static rtx do_store_flag (sepops, rtx, machine_mode);
172 #ifdef PUSH_ROUNDING
173 static void emit_single_push_insn (machine_mode, rtx, tree);
174 #endif
175 static void do_tablejump (rtx, machine_mode, rtx, rtx, rtx, int);
176 static rtx const_vector_from_tree (tree);
177 static tree tree_expr_size (const_tree);
178 static HOST_WIDE_INT int_expr_size (tree);
179
180 \f
181 /* This is run to set up which modes can be used
182 directly in memory and to initialize the block move optab. It is run
183 at the beginning of compilation and when the target is reinitialized. */
184
185 void
186 init_expr_target (void)
187 {
188 rtx insn, pat;
189 machine_mode mode;
190 int num_clobbers;
191 rtx mem, mem1;
192 rtx reg;
193
194 /* Try indexing by frame ptr and try by stack ptr.
195 It is known that on the Convex the stack ptr isn't a valid index.
196 With luck, one or the other is valid on any machine. */
197 mem = gen_rtx_MEM (word_mode, stack_pointer_rtx);
198 mem1 = gen_rtx_MEM (word_mode, frame_pointer_rtx);
199
200 /* A scratch register we can modify in-place below to avoid
201 useless RTL allocations. */
202 reg = gen_rtx_REG (word_mode, FIRST_PSEUDO_REGISTER);
203
204 insn = rtx_alloc (INSN);
205 pat = gen_rtx_SET (NULL_RTX, NULL_RTX);
206 PATTERN (insn) = pat;
207
208 for (mode = VOIDmode; (int) mode < NUM_MACHINE_MODES;
209 mode = (machine_mode) ((int) mode + 1))
210 {
211 int regno;
212
213 direct_load[(int) mode] = direct_store[(int) mode] = 0;
214 PUT_MODE (mem, mode);
215 PUT_MODE (mem1, mode);
216
217 /* See if there is some register that can be used in this mode and
218 directly loaded or stored from memory. */
219
220 if (mode != VOIDmode && mode != BLKmode)
221 for (regno = 0; regno < FIRST_PSEUDO_REGISTER
222 && (direct_load[(int) mode] == 0 || direct_store[(int) mode] == 0);
223 regno++)
224 {
225 if (! HARD_REGNO_MODE_OK (regno, mode))
226 continue;
227
228 set_mode_and_regno (reg, mode, regno);
229
230 SET_SRC (pat) = mem;
231 SET_DEST (pat) = reg;
232 if (recog (pat, insn, &num_clobbers) >= 0)
233 direct_load[(int) mode] = 1;
234
235 SET_SRC (pat) = mem1;
236 SET_DEST (pat) = reg;
237 if (recog (pat, insn, &num_clobbers) >= 0)
238 direct_load[(int) mode] = 1;
239
240 SET_SRC (pat) = reg;
241 SET_DEST (pat) = mem;
242 if (recog (pat, insn, &num_clobbers) >= 0)
243 direct_store[(int) mode] = 1;
244
245 SET_SRC (pat) = reg;
246 SET_DEST (pat) = mem1;
247 if (recog (pat, insn, &num_clobbers) >= 0)
248 direct_store[(int) mode] = 1;
249 }
250 }
251
252 mem = gen_rtx_MEM (VOIDmode, gen_raw_REG (Pmode, FIRST_PSEUDO_REGISTER));
253
254 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
255 mode = GET_MODE_WIDER_MODE (mode))
256 {
257 machine_mode srcmode;
258 for (srcmode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); srcmode != mode;
259 srcmode = GET_MODE_WIDER_MODE (srcmode))
260 {
261 enum insn_code ic;
262
263 ic = can_extend_p (mode, srcmode, 0);
264 if (ic == CODE_FOR_nothing)
265 continue;
266
267 PUT_MODE (mem, srcmode);
268
269 if (insn_operand_matches (ic, 1, mem))
270 float_extend_from_mem[mode][srcmode] = true;
271 }
272 }
273 }
274
275 /* This is run at the start of compiling a function. */
276
277 void
278 init_expr (void)
279 {
280 memset (&crtl->expr, 0, sizeof (crtl->expr));
281 }
282 \f
283 /* Copy data from FROM to TO, where the machine modes are not the same.
284 Both modes may be integer, or both may be floating, or both may be
285 fixed-point.
286 UNSIGNEDP should be nonzero if FROM is an unsigned type.
287 This causes zero-extension instead of sign-extension. */
288
289 void
290 convert_move (rtx to, rtx from, int unsignedp)
291 {
292 machine_mode to_mode = GET_MODE (to);
293 machine_mode from_mode = GET_MODE (from);
294 int to_real = SCALAR_FLOAT_MODE_P (to_mode);
295 int from_real = SCALAR_FLOAT_MODE_P (from_mode);
296 enum insn_code code;
297 rtx libcall;
298
299 /* rtx code for making an equivalent value. */
300 enum rtx_code equiv_code = (unsignedp < 0 ? UNKNOWN
301 : (unsignedp ? ZERO_EXTEND : SIGN_EXTEND));
302
303
304 gcc_assert (to_real == from_real);
305 gcc_assert (to_mode != BLKmode);
306 gcc_assert (from_mode != BLKmode);
307
308 /* If the source and destination are already the same, then there's
309 nothing to do. */
310 if (to == from)
311 return;
312
313 /* If FROM is a SUBREG that indicates that we have already done at least
314 the required extension, strip it. We don't handle such SUBREGs as
315 TO here. */
316
317 if (GET_CODE (from) == SUBREG && SUBREG_PROMOTED_VAR_P (from)
318 && (GET_MODE_PRECISION (GET_MODE (SUBREG_REG (from)))
319 >= GET_MODE_PRECISION (to_mode))
320 && SUBREG_CHECK_PROMOTED_SIGN (from, unsignedp))
321 from = gen_lowpart (to_mode, from), from_mode = to_mode;
322
323 gcc_assert (GET_CODE (to) != SUBREG || !SUBREG_PROMOTED_VAR_P (to));
324
325 if (to_mode == from_mode
326 || (from_mode == VOIDmode && CONSTANT_P (from)))
327 {
328 emit_move_insn (to, from);
329 return;
330 }
331
332 if (VECTOR_MODE_P (to_mode) || VECTOR_MODE_P (from_mode))
333 {
334 gcc_assert (GET_MODE_BITSIZE (from_mode) == GET_MODE_BITSIZE (to_mode));
335
336 if (VECTOR_MODE_P (to_mode))
337 from = simplify_gen_subreg (to_mode, from, GET_MODE (from), 0);
338 else
339 to = simplify_gen_subreg (from_mode, to, GET_MODE (to), 0);
340
341 emit_move_insn (to, from);
342 return;
343 }
344
345 if (GET_CODE (to) == CONCAT && GET_CODE (from) == CONCAT)
346 {
347 convert_move (XEXP (to, 0), XEXP (from, 0), unsignedp);
348 convert_move (XEXP (to, 1), XEXP (from, 1), unsignedp);
349 return;
350 }
351
352 if (to_real)
353 {
354 rtx value;
355 rtx_insn *insns;
356 convert_optab tab;
357
358 gcc_assert ((GET_MODE_PRECISION (from_mode)
359 != GET_MODE_PRECISION (to_mode))
360 || (DECIMAL_FLOAT_MODE_P (from_mode)
361 != DECIMAL_FLOAT_MODE_P (to_mode)));
362
363 if (GET_MODE_PRECISION (from_mode) == GET_MODE_PRECISION (to_mode))
364 /* Conversion between decimal float and binary float, same size. */
365 tab = DECIMAL_FLOAT_MODE_P (from_mode) ? trunc_optab : sext_optab;
366 else if (GET_MODE_PRECISION (from_mode) < GET_MODE_PRECISION (to_mode))
367 tab = sext_optab;
368 else
369 tab = trunc_optab;
370
371 /* Try converting directly if the insn is supported. */
372
373 code = convert_optab_handler (tab, to_mode, from_mode);
374 if (code != CODE_FOR_nothing)
375 {
376 emit_unop_insn (code, to, from,
377 tab == sext_optab ? FLOAT_EXTEND : FLOAT_TRUNCATE);
378 return;
379 }
380
381 /* Otherwise use a libcall. */
382 libcall = convert_optab_libfunc (tab, to_mode, from_mode);
383
384 /* Is this conversion implemented yet? */
385 gcc_assert (libcall);
386
387 start_sequence ();
388 value = emit_library_call_value (libcall, NULL_RTX, LCT_CONST, to_mode,
389 1, from, from_mode);
390 insns = get_insns ();
391 end_sequence ();
392 emit_libcall_block (insns, to, value,
393 tab == trunc_optab ? gen_rtx_FLOAT_TRUNCATE (to_mode,
394 from)
395 : gen_rtx_FLOAT_EXTEND (to_mode, from));
396 return;
397 }
398
399 /* Handle pointer conversion. */ /* SPEE 900220. */
400 /* If the target has a converter from FROM_MODE to TO_MODE, use it. */
401 {
402 convert_optab ctab;
403
404 if (GET_MODE_PRECISION (from_mode) > GET_MODE_PRECISION (to_mode))
405 ctab = trunc_optab;
406 else if (unsignedp)
407 ctab = zext_optab;
408 else
409 ctab = sext_optab;
410
411 if (convert_optab_handler (ctab, to_mode, from_mode)
412 != CODE_FOR_nothing)
413 {
414 emit_unop_insn (convert_optab_handler (ctab, to_mode, from_mode),
415 to, from, UNKNOWN);
416 return;
417 }
418 }
419
420 /* Targets are expected to provide conversion insns between PxImode and
421 xImode for all MODE_PARTIAL_INT modes they use, but no others. */
422 if (GET_MODE_CLASS (to_mode) == MODE_PARTIAL_INT)
423 {
424 machine_mode full_mode
425 = smallest_mode_for_size (GET_MODE_BITSIZE (to_mode), MODE_INT);
426
427 gcc_assert (convert_optab_handler (trunc_optab, to_mode, full_mode)
428 != CODE_FOR_nothing);
429
430 if (full_mode != from_mode)
431 from = convert_to_mode (full_mode, from, unsignedp);
432 emit_unop_insn (convert_optab_handler (trunc_optab, to_mode, full_mode),
433 to, from, UNKNOWN);
434 return;
435 }
436 if (GET_MODE_CLASS (from_mode) == MODE_PARTIAL_INT)
437 {
438 rtx new_from;
439 machine_mode full_mode
440 = smallest_mode_for_size (GET_MODE_BITSIZE (from_mode), MODE_INT);
441 convert_optab ctab = unsignedp ? zext_optab : sext_optab;
442 enum insn_code icode;
443
444 icode = convert_optab_handler (ctab, full_mode, from_mode);
445 gcc_assert (icode != CODE_FOR_nothing);
446
447 if (to_mode == full_mode)
448 {
449 emit_unop_insn (icode, to, from, UNKNOWN);
450 return;
451 }
452
453 new_from = gen_reg_rtx (full_mode);
454 emit_unop_insn (icode, new_from, from, UNKNOWN);
455
456 /* else proceed to integer conversions below. */
457 from_mode = full_mode;
458 from = new_from;
459 }
460
461 /* Make sure both are fixed-point modes or both are not. */
462 gcc_assert (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode) ==
463 ALL_SCALAR_FIXED_POINT_MODE_P (to_mode));
464 if (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode))
465 {
466 /* If we widen from_mode to to_mode and they are in the same class,
467 we won't saturate the result.
468 Otherwise, always saturate the result to play safe. */
469 if (GET_MODE_CLASS (from_mode) == GET_MODE_CLASS (to_mode)
470 && GET_MODE_SIZE (from_mode) < GET_MODE_SIZE (to_mode))
471 expand_fixed_convert (to, from, 0, 0);
472 else
473 expand_fixed_convert (to, from, 0, 1);
474 return;
475 }
476
477 /* Now both modes are integers. */
478
479 /* Handle expanding beyond a word. */
480 if (GET_MODE_PRECISION (from_mode) < GET_MODE_PRECISION (to_mode)
481 && GET_MODE_PRECISION (to_mode) > BITS_PER_WORD)
482 {
483 rtx_insn *insns;
484 rtx lowpart;
485 rtx fill_value;
486 rtx lowfrom;
487 int i;
488 machine_mode lowpart_mode;
489 int nwords = CEIL (GET_MODE_SIZE (to_mode), UNITS_PER_WORD);
490
491 /* Try converting directly if the insn is supported. */
492 if ((code = can_extend_p (to_mode, from_mode, unsignedp))
493 != CODE_FOR_nothing)
494 {
495 /* If FROM is a SUBREG, put it into a register. Do this
496 so that we always generate the same set of insns for
497 better cse'ing; if an intermediate assignment occurred,
498 we won't be doing the operation directly on the SUBREG. */
499 if (optimize > 0 && GET_CODE (from) == SUBREG)
500 from = force_reg (from_mode, from);
501 emit_unop_insn (code, to, from, equiv_code);
502 return;
503 }
504 /* Next, try converting via full word. */
505 else if (GET_MODE_PRECISION (from_mode) < BITS_PER_WORD
506 && ((code = can_extend_p (to_mode, word_mode, unsignedp))
507 != CODE_FOR_nothing))
508 {
509 rtx word_to = gen_reg_rtx (word_mode);
510 if (REG_P (to))
511 {
512 if (reg_overlap_mentioned_p (to, from))
513 from = force_reg (from_mode, from);
514 emit_clobber (to);
515 }
516 convert_move (word_to, from, unsignedp);
517 emit_unop_insn (code, to, word_to, equiv_code);
518 return;
519 }
520
521 /* No special multiword conversion insn; do it by hand. */
522 start_sequence ();
523
524 /* Since we will turn this into a no conflict block, we must ensure the
525 the source does not overlap the target so force it into an isolated
526 register when maybe so. Likewise for any MEM input, since the
527 conversion sequence might require several references to it and we
528 must ensure we're getting the same value every time. */
529
530 if (MEM_P (from) || reg_overlap_mentioned_p (to, from))
531 from = force_reg (from_mode, from);
532
533 /* Get a copy of FROM widened to a word, if necessary. */
534 if (GET_MODE_PRECISION (from_mode) < BITS_PER_WORD)
535 lowpart_mode = word_mode;
536 else
537 lowpart_mode = from_mode;
538
539 lowfrom = convert_to_mode (lowpart_mode, from, unsignedp);
540
541 lowpart = gen_lowpart (lowpart_mode, to);
542 emit_move_insn (lowpart, lowfrom);
543
544 /* Compute the value to put in each remaining word. */
545 if (unsignedp)
546 fill_value = const0_rtx;
547 else
548 fill_value = emit_store_flag_force (gen_reg_rtx (word_mode),
549 LT, lowfrom, const0_rtx,
550 lowpart_mode, 0, -1);
551
552 /* Fill the remaining words. */
553 for (i = GET_MODE_SIZE (lowpart_mode) / UNITS_PER_WORD; i < nwords; i++)
554 {
555 int index = (WORDS_BIG_ENDIAN ? nwords - i - 1 : i);
556 rtx subword = operand_subword (to, index, 1, to_mode);
557
558 gcc_assert (subword);
559
560 if (fill_value != subword)
561 emit_move_insn (subword, fill_value);
562 }
563
564 insns = get_insns ();
565 end_sequence ();
566
567 emit_insn (insns);
568 return;
569 }
570
571 /* Truncating multi-word to a word or less. */
572 if (GET_MODE_PRECISION (from_mode) > BITS_PER_WORD
573 && GET_MODE_PRECISION (to_mode) <= BITS_PER_WORD)
574 {
575 if (!((MEM_P (from)
576 && ! MEM_VOLATILE_P (from)
577 && direct_load[(int) to_mode]
578 && ! mode_dependent_address_p (XEXP (from, 0),
579 MEM_ADDR_SPACE (from)))
580 || REG_P (from)
581 || GET_CODE (from) == SUBREG))
582 from = force_reg (from_mode, from);
583 convert_move (to, gen_lowpart (word_mode, from), 0);
584 return;
585 }
586
587 /* Now follow all the conversions between integers
588 no more than a word long. */
589
590 /* For truncation, usually we can just refer to FROM in a narrower mode. */
591 if (GET_MODE_BITSIZE (to_mode) < GET_MODE_BITSIZE (from_mode)
592 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode, from_mode))
593 {
594 if (!((MEM_P (from)
595 && ! MEM_VOLATILE_P (from)
596 && direct_load[(int) to_mode]
597 && ! mode_dependent_address_p (XEXP (from, 0),
598 MEM_ADDR_SPACE (from)))
599 || REG_P (from)
600 || GET_CODE (from) == SUBREG))
601 from = force_reg (from_mode, from);
602 if (REG_P (from) && REGNO (from) < FIRST_PSEUDO_REGISTER
603 && ! HARD_REGNO_MODE_OK (REGNO (from), to_mode))
604 from = copy_to_reg (from);
605 emit_move_insn (to, gen_lowpart (to_mode, from));
606 return;
607 }
608
609 /* Handle extension. */
610 if (GET_MODE_PRECISION (to_mode) > GET_MODE_PRECISION (from_mode))
611 {
612 /* Convert directly if that works. */
613 if ((code = can_extend_p (to_mode, from_mode, unsignedp))
614 != CODE_FOR_nothing)
615 {
616 emit_unop_insn (code, to, from, equiv_code);
617 return;
618 }
619 else
620 {
621 machine_mode intermediate;
622 rtx tmp;
623 int shift_amount;
624
625 /* Search for a mode to convert via. */
626 for (intermediate = from_mode; intermediate != VOIDmode;
627 intermediate = GET_MODE_WIDER_MODE (intermediate))
628 if (((can_extend_p (to_mode, intermediate, unsignedp)
629 != CODE_FOR_nothing)
630 || (GET_MODE_SIZE (to_mode) < GET_MODE_SIZE (intermediate)
631 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode, intermediate)))
632 && (can_extend_p (intermediate, from_mode, unsignedp)
633 != CODE_FOR_nothing))
634 {
635 convert_move (to, convert_to_mode (intermediate, from,
636 unsignedp), unsignedp);
637 return;
638 }
639
640 /* No suitable intermediate mode.
641 Generate what we need with shifts. */
642 shift_amount = (GET_MODE_PRECISION (to_mode)
643 - GET_MODE_PRECISION (from_mode));
644 from = gen_lowpart (to_mode, force_reg (from_mode, from));
645 tmp = expand_shift (LSHIFT_EXPR, to_mode, from, shift_amount,
646 to, unsignedp);
647 tmp = expand_shift (RSHIFT_EXPR, to_mode, tmp, shift_amount,
648 to, unsignedp);
649 if (tmp != to)
650 emit_move_insn (to, tmp);
651 return;
652 }
653 }
654
655 /* Support special truncate insns for certain modes. */
656 if (convert_optab_handler (trunc_optab, to_mode,
657 from_mode) != CODE_FOR_nothing)
658 {
659 emit_unop_insn (convert_optab_handler (trunc_optab, to_mode, from_mode),
660 to, from, UNKNOWN);
661 return;
662 }
663
664 /* Handle truncation of volatile memrefs, and so on;
665 the things that couldn't be truncated directly,
666 and for which there was no special instruction.
667
668 ??? Code above formerly short-circuited this, for most integer
669 mode pairs, with a force_reg in from_mode followed by a recursive
670 call to this routine. Appears always to have been wrong. */
671 if (GET_MODE_PRECISION (to_mode) < GET_MODE_PRECISION (from_mode))
672 {
673 rtx temp = force_reg (to_mode, gen_lowpart (to_mode, from));
674 emit_move_insn (to, temp);
675 return;
676 }
677
678 /* Mode combination is not recognized. */
679 gcc_unreachable ();
680 }
681
682 /* Return an rtx for a value that would result
683 from converting X to mode MODE.
684 Both X and MODE may be floating, or both integer.
685 UNSIGNEDP is nonzero if X is an unsigned value.
686 This can be done by referring to a part of X in place
687 or by copying to a new temporary with conversion. */
688
689 rtx
690 convert_to_mode (machine_mode mode, rtx x, int unsignedp)
691 {
692 return convert_modes (mode, VOIDmode, x, unsignedp);
693 }
694
695 /* Return an rtx for a value that would result
696 from converting X from mode OLDMODE to mode MODE.
697 Both modes may be floating, or both integer.
698 UNSIGNEDP is nonzero if X is an unsigned value.
699
700 This can be done by referring to a part of X in place
701 or by copying to a new temporary with conversion.
702
703 You can give VOIDmode for OLDMODE, if you are sure X has a nonvoid mode. */
704
705 rtx
706 convert_modes (machine_mode mode, machine_mode oldmode, rtx x, int unsignedp)
707 {
708 rtx temp;
709
710 /* If FROM is a SUBREG that indicates that we have already done at least
711 the required extension, strip it. */
712
713 if (GET_CODE (x) == SUBREG && SUBREG_PROMOTED_VAR_P (x)
714 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) >= GET_MODE_SIZE (mode)
715 && SUBREG_CHECK_PROMOTED_SIGN (x, unsignedp))
716 x = gen_lowpart (mode, SUBREG_REG (x));
717
718 if (GET_MODE (x) != VOIDmode)
719 oldmode = GET_MODE (x);
720
721 if (mode == oldmode)
722 return x;
723
724 if (CONST_SCALAR_INT_P (x) && GET_MODE_CLASS (mode) == MODE_INT)
725 {
726 /* If the caller did not tell us the old mode, then there is not
727 much to do with respect to canonicalization. We have to
728 assume that all the bits are significant. */
729 if (GET_MODE_CLASS (oldmode) != MODE_INT)
730 oldmode = MAX_MODE_INT;
731 wide_int w = wide_int::from (std::make_pair (x, oldmode),
732 GET_MODE_PRECISION (mode),
733 unsignedp ? UNSIGNED : SIGNED);
734 return immed_wide_int_const (w, mode);
735 }
736
737 /* We can do this with a gen_lowpart if both desired and current modes
738 are integer, and this is either a constant integer, a register, or a
739 non-volatile MEM. */
740 if (GET_MODE_CLASS (mode) == MODE_INT
741 && GET_MODE_CLASS (oldmode) == MODE_INT
742 && GET_MODE_PRECISION (mode) <= GET_MODE_PRECISION (oldmode)
743 && ((MEM_P (x) && !MEM_VOLATILE_P (x) && direct_load[(int) mode])
744 || (REG_P (x)
745 && (!HARD_REGISTER_P (x)
746 || HARD_REGNO_MODE_OK (REGNO (x), mode))
747 && TRULY_NOOP_TRUNCATION_MODES_P (mode, GET_MODE (x)))))
748
749 return gen_lowpart (mode, x);
750
751 /* Converting from integer constant into mode is always equivalent to an
752 subreg operation. */
753 if (VECTOR_MODE_P (mode) && GET_MODE (x) == VOIDmode)
754 {
755 gcc_assert (GET_MODE_BITSIZE (mode) == GET_MODE_BITSIZE (oldmode));
756 return simplify_gen_subreg (mode, x, oldmode, 0);
757 }
758
759 temp = gen_reg_rtx (mode);
760 convert_move (temp, x, unsignedp);
761 return temp;
762 }
763 \f
764 /* Return the largest alignment we can use for doing a move (or store)
765 of MAX_PIECES. ALIGN is the largest alignment we could use. */
766
767 static unsigned int
768 alignment_for_piecewise_move (unsigned int max_pieces, unsigned int align)
769 {
770 machine_mode tmode;
771
772 tmode = mode_for_size (max_pieces * BITS_PER_UNIT, MODE_INT, 1);
773 if (align >= GET_MODE_ALIGNMENT (tmode))
774 align = GET_MODE_ALIGNMENT (tmode);
775 else
776 {
777 machine_mode tmode, xmode;
778
779 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT), xmode = tmode;
780 tmode != VOIDmode;
781 xmode = tmode, tmode = GET_MODE_WIDER_MODE (tmode))
782 if (GET_MODE_SIZE (tmode) > max_pieces
783 || SLOW_UNALIGNED_ACCESS (tmode, align))
784 break;
785
786 align = MAX (align, GET_MODE_ALIGNMENT (xmode));
787 }
788
789 return align;
790 }
791
792 /* Return the widest integer mode no wider than SIZE. If no such mode
793 can be found, return VOIDmode. */
794
795 static machine_mode
796 widest_int_mode_for_size (unsigned int size)
797 {
798 machine_mode tmode, mode = VOIDmode;
799
800 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT);
801 tmode != VOIDmode; tmode = GET_MODE_WIDER_MODE (tmode))
802 if (GET_MODE_SIZE (tmode) < size)
803 mode = tmode;
804
805 return mode;
806 }
807
808 /* Determine whether the LEN bytes can be moved by using several move
809 instructions. Return nonzero if a call to move_by_pieces should
810 succeed. */
811
812 int
813 can_move_by_pieces (unsigned HOST_WIDE_INT len,
814 unsigned int align)
815 {
816 return targetm.use_by_pieces_infrastructure_p (len, align, MOVE_BY_PIECES,
817 optimize_insn_for_speed_p ());
818 }
819
820 /* Generate several move instructions to copy LEN bytes from block FROM to
821 block TO. (These are MEM rtx's with BLKmode).
822
823 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
824 used to push FROM to the stack.
825
826 ALIGN is maximum stack alignment we can assume.
827
828 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
829 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
830 stpcpy. */
831
832 rtx
833 move_by_pieces (rtx to, rtx from, unsigned HOST_WIDE_INT len,
834 unsigned int align, int endp)
835 {
836 struct move_by_pieces_d data;
837 machine_mode to_addr_mode;
838 machine_mode from_addr_mode = get_address_mode (from);
839 rtx to_addr, from_addr = XEXP (from, 0);
840 unsigned int max_size = MOVE_MAX_PIECES + 1;
841 enum insn_code icode;
842
843 align = MIN (to ? MEM_ALIGN (to) : align, MEM_ALIGN (from));
844
845 data.offset = 0;
846 data.from_addr = from_addr;
847 if (to)
848 {
849 to_addr_mode = get_address_mode (to);
850 to_addr = XEXP (to, 0);
851 data.to = to;
852 data.autinc_to
853 = (GET_CODE (to_addr) == PRE_INC || GET_CODE (to_addr) == PRE_DEC
854 || GET_CODE (to_addr) == POST_INC || GET_CODE (to_addr) == POST_DEC);
855 data.reverse
856 = (GET_CODE (to_addr) == PRE_DEC || GET_CODE (to_addr) == POST_DEC);
857 }
858 else
859 {
860 to_addr_mode = VOIDmode;
861 to_addr = NULL_RTX;
862 data.to = NULL_RTX;
863 data.autinc_to = 1;
864 if (STACK_GROWS_DOWNWARD)
865 data.reverse = 1;
866 else
867 data.reverse = 0;
868 }
869 data.to_addr = to_addr;
870 data.from = from;
871 data.autinc_from
872 = (GET_CODE (from_addr) == PRE_INC || GET_CODE (from_addr) == PRE_DEC
873 || GET_CODE (from_addr) == POST_INC
874 || GET_CODE (from_addr) == POST_DEC);
875
876 data.explicit_inc_from = 0;
877 data.explicit_inc_to = 0;
878 if (data.reverse) data.offset = len;
879 data.len = len;
880
881 /* If copying requires more than two move insns,
882 copy addresses to registers (to make displacements shorter)
883 and use post-increment if available. */
884 if (!(data.autinc_from && data.autinc_to)
885 && move_by_pieces_ninsns (len, align, max_size) > 2)
886 {
887 /* Find the mode of the largest move...
888 MODE might not be used depending on the definitions of the
889 USE_* macros below. */
890 machine_mode mode ATTRIBUTE_UNUSED
891 = widest_int_mode_for_size (max_size);
892
893 if (USE_LOAD_PRE_DECREMENT (mode) && data.reverse && ! data.autinc_from)
894 {
895 data.from_addr = copy_to_mode_reg (from_addr_mode,
896 plus_constant (from_addr_mode,
897 from_addr, len));
898 data.autinc_from = 1;
899 data.explicit_inc_from = -1;
900 }
901 if (USE_LOAD_POST_INCREMENT (mode) && ! data.autinc_from)
902 {
903 data.from_addr = copy_to_mode_reg (from_addr_mode, from_addr);
904 data.autinc_from = 1;
905 data.explicit_inc_from = 1;
906 }
907 if (!data.autinc_from && CONSTANT_P (from_addr))
908 data.from_addr = copy_to_mode_reg (from_addr_mode, from_addr);
909 if (USE_STORE_PRE_DECREMENT (mode) && data.reverse && ! data.autinc_to)
910 {
911 data.to_addr = copy_to_mode_reg (to_addr_mode,
912 plus_constant (to_addr_mode,
913 to_addr, len));
914 data.autinc_to = 1;
915 data.explicit_inc_to = -1;
916 }
917 if (USE_STORE_POST_INCREMENT (mode) && ! data.reverse && ! data.autinc_to)
918 {
919 data.to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
920 data.autinc_to = 1;
921 data.explicit_inc_to = 1;
922 }
923 if (!data.autinc_to && CONSTANT_P (to_addr))
924 data.to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
925 }
926
927 align = alignment_for_piecewise_move (MOVE_MAX_PIECES, align);
928
929 /* First move what we can in the largest integer mode, then go to
930 successively smaller modes. */
931
932 while (max_size > 1 && data.len > 0)
933 {
934 machine_mode mode = widest_int_mode_for_size (max_size);
935
936 if (mode == VOIDmode)
937 break;
938
939 icode = optab_handler (mov_optab, mode);
940 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
941 move_by_pieces_1 (GEN_FCN (icode), mode, &data);
942
943 max_size = GET_MODE_SIZE (mode);
944 }
945
946 /* The code above should have handled everything. */
947 gcc_assert (!data.len);
948
949 if (endp)
950 {
951 rtx to1;
952
953 gcc_assert (!data.reverse);
954 if (data.autinc_to)
955 {
956 if (endp == 2)
957 {
958 if (HAVE_POST_INCREMENT && data.explicit_inc_to > 0)
959 emit_insn (gen_add2_insn (data.to_addr, constm1_rtx));
960 else
961 data.to_addr = copy_to_mode_reg (to_addr_mode,
962 plus_constant (to_addr_mode,
963 data.to_addr,
964 -1));
965 }
966 to1 = adjust_automodify_address (data.to, QImode, data.to_addr,
967 data.offset);
968 }
969 else
970 {
971 if (endp == 2)
972 --data.offset;
973 to1 = adjust_address (data.to, QImode, data.offset);
974 }
975 return to1;
976 }
977 else
978 return data.to;
979 }
980
981 /* Return number of insns required to move L bytes by pieces.
982 ALIGN (in bits) is maximum alignment we can assume. */
983
984 unsigned HOST_WIDE_INT
985 move_by_pieces_ninsns (unsigned HOST_WIDE_INT l, unsigned int align,
986 unsigned int max_size)
987 {
988 unsigned HOST_WIDE_INT n_insns = 0;
989
990 align = alignment_for_piecewise_move (MOVE_MAX_PIECES, align);
991
992 while (max_size > 1 && l > 0)
993 {
994 machine_mode mode;
995 enum insn_code icode;
996
997 mode = widest_int_mode_for_size (max_size);
998
999 if (mode == VOIDmode)
1000 break;
1001
1002 icode = optab_handler (mov_optab, mode);
1003 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
1004 n_insns += l / GET_MODE_SIZE (mode), l %= GET_MODE_SIZE (mode);
1005
1006 max_size = GET_MODE_SIZE (mode);
1007 }
1008
1009 gcc_assert (!l);
1010 return n_insns;
1011 }
1012
1013 /* Subroutine of move_by_pieces. Move as many bytes as appropriate
1014 with move instructions for mode MODE. GENFUN is the gen_... function
1015 to make a move insn for that mode. DATA has all the other info. */
1016
1017 static void
1018 move_by_pieces_1 (insn_gen_fn genfun, machine_mode mode,
1019 struct move_by_pieces_d *data)
1020 {
1021 unsigned int size = GET_MODE_SIZE (mode);
1022 rtx to1 = NULL_RTX, from1;
1023
1024 while (data->len >= size)
1025 {
1026 if (data->reverse)
1027 data->offset -= size;
1028
1029 if (data->to)
1030 {
1031 if (data->autinc_to)
1032 to1 = adjust_automodify_address (data->to, mode, data->to_addr,
1033 data->offset);
1034 else
1035 to1 = adjust_address (data->to, mode, data->offset);
1036 }
1037
1038 if (data->autinc_from)
1039 from1 = adjust_automodify_address (data->from, mode, data->from_addr,
1040 data->offset);
1041 else
1042 from1 = adjust_address (data->from, mode, data->offset);
1043
1044 if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0)
1045 emit_insn (gen_add2_insn (data->to_addr,
1046 gen_int_mode (-(HOST_WIDE_INT) size,
1047 GET_MODE (data->to_addr))));
1048 if (HAVE_PRE_DECREMENT && data->explicit_inc_from < 0)
1049 emit_insn (gen_add2_insn (data->from_addr,
1050 gen_int_mode (-(HOST_WIDE_INT) size,
1051 GET_MODE (data->from_addr))));
1052
1053 if (data->to)
1054 emit_insn ((*genfun) (to1, from1));
1055 else
1056 {
1057 #ifdef PUSH_ROUNDING
1058 emit_single_push_insn (mode, from1, NULL);
1059 #else
1060 gcc_unreachable ();
1061 #endif
1062 }
1063
1064 if (HAVE_POST_INCREMENT && data->explicit_inc_to > 0)
1065 emit_insn (gen_add2_insn (data->to_addr,
1066 gen_int_mode (size,
1067 GET_MODE (data->to_addr))));
1068 if (HAVE_POST_INCREMENT && data->explicit_inc_from > 0)
1069 emit_insn (gen_add2_insn (data->from_addr,
1070 gen_int_mode (size,
1071 GET_MODE (data->from_addr))));
1072
1073 if (! data->reverse)
1074 data->offset += size;
1075
1076 data->len -= size;
1077 }
1078 }
1079 \f
1080 /* Emit code to move a block Y to a block X. This may be done with
1081 string-move instructions, with multiple scalar move instructions,
1082 or with a library call.
1083
1084 Both X and Y must be MEM rtx's (perhaps inside VOLATILE) with mode BLKmode.
1085 SIZE is an rtx that says how long they are.
1086 ALIGN is the maximum alignment we can assume they have.
1087 METHOD describes what kind of copy this is, and what mechanisms may be used.
1088 MIN_SIZE is the minimal size of block to move
1089 MAX_SIZE is the maximal size of block to move, if it can not be represented
1090 in unsigned HOST_WIDE_INT, than it is mask of all ones.
1091
1092 Return the address of the new block, if memcpy is called and returns it,
1093 0 otherwise. */
1094
1095 rtx
1096 emit_block_move_hints (rtx x, rtx y, rtx size, enum block_op_methods method,
1097 unsigned int expected_align, HOST_WIDE_INT expected_size,
1098 unsigned HOST_WIDE_INT min_size,
1099 unsigned HOST_WIDE_INT max_size,
1100 unsigned HOST_WIDE_INT probable_max_size)
1101 {
1102 bool may_use_call;
1103 rtx retval = 0;
1104 unsigned int align;
1105
1106 gcc_assert (size);
1107 if (CONST_INT_P (size)
1108 && INTVAL (size) == 0)
1109 return 0;
1110
1111 switch (method)
1112 {
1113 case BLOCK_OP_NORMAL:
1114 case BLOCK_OP_TAILCALL:
1115 may_use_call = true;
1116 break;
1117
1118 case BLOCK_OP_CALL_PARM:
1119 may_use_call = block_move_libcall_safe_for_call_parm ();
1120
1121 /* Make inhibit_defer_pop nonzero around the library call
1122 to force it to pop the arguments right away. */
1123 NO_DEFER_POP;
1124 break;
1125
1126 case BLOCK_OP_NO_LIBCALL:
1127 may_use_call = false;
1128 break;
1129
1130 default:
1131 gcc_unreachable ();
1132 }
1133
1134 gcc_assert (MEM_P (x) && MEM_P (y));
1135 align = MIN (MEM_ALIGN (x), MEM_ALIGN (y));
1136 gcc_assert (align >= BITS_PER_UNIT);
1137
1138 /* Make sure we've got BLKmode addresses; store_one_arg can decide that
1139 block copy is more efficient for other large modes, e.g. DCmode. */
1140 x = adjust_address (x, BLKmode, 0);
1141 y = adjust_address (y, BLKmode, 0);
1142
1143 /* Set MEM_SIZE as appropriate for this block copy. The main place this
1144 can be incorrect is coming from __builtin_memcpy. */
1145 if (CONST_INT_P (size))
1146 {
1147 x = shallow_copy_rtx (x);
1148 y = shallow_copy_rtx (y);
1149 set_mem_size (x, INTVAL (size));
1150 set_mem_size (y, INTVAL (size));
1151 }
1152
1153 if (CONST_INT_P (size) && can_move_by_pieces (INTVAL (size), align))
1154 move_by_pieces (x, y, INTVAL (size), align, 0);
1155 else if (emit_block_move_via_movmem (x, y, size, align,
1156 expected_align, expected_size,
1157 min_size, max_size, probable_max_size))
1158 ;
1159 else if (may_use_call
1160 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (x))
1161 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (y)))
1162 {
1163 /* Since x and y are passed to a libcall, mark the corresponding
1164 tree EXPR as addressable. */
1165 tree y_expr = MEM_EXPR (y);
1166 tree x_expr = MEM_EXPR (x);
1167 if (y_expr)
1168 mark_addressable (y_expr);
1169 if (x_expr)
1170 mark_addressable (x_expr);
1171 retval = emit_block_move_via_libcall (x, y, size,
1172 method == BLOCK_OP_TAILCALL);
1173 }
1174
1175 else
1176 emit_block_move_via_loop (x, y, size, align);
1177
1178 if (method == BLOCK_OP_CALL_PARM)
1179 OK_DEFER_POP;
1180
1181 return retval;
1182 }
1183
1184 rtx
1185 emit_block_move (rtx x, rtx y, rtx size, enum block_op_methods method)
1186 {
1187 unsigned HOST_WIDE_INT max, min = 0;
1188 if (GET_CODE (size) == CONST_INT)
1189 min = max = UINTVAL (size);
1190 else
1191 max = GET_MODE_MASK (GET_MODE (size));
1192 return emit_block_move_hints (x, y, size, method, 0, -1,
1193 min, max, max);
1194 }
1195
1196 /* A subroutine of emit_block_move. Returns true if calling the
1197 block move libcall will not clobber any parameters which may have
1198 already been placed on the stack. */
1199
1200 static bool
1201 block_move_libcall_safe_for_call_parm (void)
1202 {
1203 #if defined (REG_PARM_STACK_SPACE)
1204 tree fn;
1205 #endif
1206
1207 /* If arguments are pushed on the stack, then they're safe. */
1208 if (PUSH_ARGS)
1209 return true;
1210
1211 /* If registers go on the stack anyway, any argument is sure to clobber
1212 an outgoing argument. */
1213 #if defined (REG_PARM_STACK_SPACE)
1214 fn = emit_block_move_libcall_fn (false);
1215 /* Avoid set but not used warning if *REG_PARM_STACK_SPACE doesn't
1216 depend on its argument. */
1217 (void) fn;
1218 if (OUTGOING_REG_PARM_STACK_SPACE ((!fn ? NULL_TREE : TREE_TYPE (fn)))
1219 && REG_PARM_STACK_SPACE (fn) != 0)
1220 return false;
1221 #endif
1222
1223 /* If any argument goes in memory, then it might clobber an outgoing
1224 argument. */
1225 {
1226 CUMULATIVE_ARGS args_so_far_v;
1227 cumulative_args_t args_so_far;
1228 tree fn, arg;
1229
1230 fn = emit_block_move_libcall_fn (false);
1231 INIT_CUMULATIVE_ARGS (args_so_far_v, TREE_TYPE (fn), NULL_RTX, 0, 3);
1232 args_so_far = pack_cumulative_args (&args_so_far_v);
1233
1234 arg = TYPE_ARG_TYPES (TREE_TYPE (fn));
1235 for ( ; arg != void_list_node ; arg = TREE_CHAIN (arg))
1236 {
1237 machine_mode mode = TYPE_MODE (TREE_VALUE (arg));
1238 rtx tmp = targetm.calls.function_arg (args_so_far, mode,
1239 NULL_TREE, true);
1240 if (!tmp || !REG_P (tmp))
1241 return false;
1242 if (targetm.calls.arg_partial_bytes (args_so_far, mode, NULL, 1))
1243 return false;
1244 targetm.calls.function_arg_advance (args_so_far, mode,
1245 NULL_TREE, true);
1246 }
1247 }
1248 return true;
1249 }
1250
1251 /* A subroutine of emit_block_move. Expand a movmem pattern;
1252 return true if successful. */
1253
1254 static bool
1255 emit_block_move_via_movmem (rtx x, rtx y, rtx size, unsigned int align,
1256 unsigned int expected_align, HOST_WIDE_INT expected_size,
1257 unsigned HOST_WIDE_INT min_size,
1258 unsigned HOST_WIDE_INT max_size,
1259 unsigned HOST_WIDE_INT probable_max_size)
1260 {
1261 int save_volatile_ok = volatile_ok;
1262 machine_mode mode;
1263
1264 if (expected_align < align)
1265 expected_align = align;
1266 if (expected_size != -1)
1267 {
1268 if ((unsigned HOST_WIDE_INT)expected_size > probable_max_size)
1269 expected_size = probable_max_size;
1270 if ((unsigned HOST_WIDE_INT)expected_size < min_size)
1271 expected_size = min_size;
1272 }
1273
1274 /* Since this is a move insn, we don't care about volatility. */
1275 volatile_ok = 1;
1276
1277 /* Try the most limited insn first, because there's no point
1278 including more than one in the machine description unless
1279 the more limited one has some advantage. */
1280
1281 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
1282 mode = GET_MODE_WIDER_MODE (mode))
1283 {
1284 enum insn_code code = direct_optab_handler (movmem_optab, mode);
1285
1286 if (code != CODE_FOR_nothing
1287 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
1288 here because if SIZE is less than the mode mask, as it is
1289 returned by the macro, it will definitely be less than the
1290 actual mode mask. Since SIZE is within the Pmode address
1291 space, we limit MODE to Pmode. */
1292 && ((CONST_INT_P (size)
1293 && ((unsigned HOST_WIDE_INT) INTVAL (size)
1294 <= (GET_MODE_MASK (mode) >> 1)))
1295 || max_size <= (GET_MODE_MASK (mode) >> 1)
1296 || GET_MODE_BITSIZE (mode) >= GET_MODE_BITSIZE (Pmode)))
1297 {
1298 struct expand_operand ops[9];
1299 unsigned int nops;
1300
1301 /* ??? When called via emit_block_move_for_call, it'd be
1302 nice if there were some way to inform the backend, so
1303 that it doesn't fail the expansion because it thinks
1304 emitting the libcall would be more efficient. */
1305 nops = insn_data[(int) code].n_generator_args;
1306 gcc_assert (nops == 4 || nops == 6 || nops == 8 || nops == 9);
1307
1308 create_fixed_operand (&ops[0], x);
1309 create_fixed_operand (&ops[1], y);
1310 /* The check above guarantees that this size conversion is valid. */
1311 create_convert_operand_to (&ops[2], size, mode, true);
1312 create_integer_operand (&ops[3], align / BITS_PER_UNIT);
1313 if (nops >= 6)
1314 {
1315 create_integer_operand (&ops[4], expected_align / BITS_PER_UNIT);
1316 create_integer_operand (&ops[5], expected_size);
1317 }
1318 if (nops >= 8)
1319 {
1320 create_integer_operand (&ops[6], min_size);
1321 /* If we can not represent the maximal size,
1322 make parameter NULL. */
1323 if ((HOST_WIDE_INT) max_size != -1)
1324 create_integer_operand (&ops[7], max_size);
1325 else
1326 create_fixed_operand (&ops[7], NULL);
1327 }
1328 if (nops == 9)
1329 {
1330 /* If we can not represent the maximal size,
1331 make parameter NULL. */
1332 if ((HOST_WIDE_INT) probable_max_size != -1)
1333 create_integer_operand (&ops[8], probable_max_size);
1334 else
1335 create_fixed_operand (&ops[8], NULL);
1336 }
1337 if (maybe_expand_insn (code, nops, ops))
1338 {
1339 volatile_ok = save_volatile_ok;
1340 return true;
1341 }
1342 }
1343 }
1344
1345 volatile_ok = save_volatile_ok;
1346 return false;
1347 }
1348
1349 /* A subroutine of emit_block_move. Expand a call to memcpy.
1350 Return the return value from memcpy, 0 otherwise. */
1351
1352 rtx
1353 emit_block_move_via_libcall (rtx dst, rtx src, rtx size, bool tailcall)
1354 {
1355 rtx dst_addr, src_addr;
1356 tree call_expr, fn, src_tree, dst_tree, size_tree;
1357 machine_mode size_mode;
1358 rtx retval;
1359
1360 /* Emit code to copy the addresses of DST and SRC and SIZE into new
1361 pseudos. We can then place those new pseudos into a VAR_DECL and
1362 use them later. */
1363
1364 dst_addr = copy_addr_to_reg (XEXP (dst, 0));
1365 src_addr = copy_addr_to_reg (XEXP (src, 0));
1366
1367 dst_addr = convert_memory_address (ptr_mode, dst_addr);
1368 src_addr = convert_memory_address (ptr_mode, src_addr);
1369
1370 dst_tree = make_tree (ptr_type_node, dst_addr);
1371 src_tree = make_tree (ptr_type_node, src_addr);
1372
1373 size_mode = TYPE_MODE (sizetype);
1374
1375 size = convert_to_mode (size_mode, size, 1);
1376 size = copy_to_mode_reg (size_mode, size);
1377
1378 /* It is incorrect to use the libcall calling conventions to call
1379 memcpy in this context. This could be a user call to memcpy and
1380 the user may wish to examine the return value from memcpy. For
1381 targets where libcalls and normal calls have different conventions
1382 for returning pointers, we could end up generating incorrect code. */
1383
1384 size_tree = make_tree (sizetype, size);
1385
1386 fn = emit_block_move_libcall_fn (true);
1387 call_expr = build_call_expr (fn, 3, dst_tree, src_tree, size_tree);
1388 CALL_EXPR_TAILCALL (call_expr) = tailcall;
1389
1390 retval = expand_normal (call_expr);
1391
1392 return retval;
1393 }
1394
1395 /* A subroutine of emit_block_move_via_libcall. Create the tree node
1396 for the function we use for block copies. */
1397
1398 static GTY(()) tree block_move_fn;
1399
1400 void
1401 init_block_move_fn (const char *asmspec)
1402 {
1403 if (!block_move_fn)
1404 {
1405 tree args, fn, attrs, attr_args;
1406
1407 fn = get_identifier ("memcpy");
1408 args = build_function_type_list (ptr_type_node, ptr_type_node,
1409 const_ptr_type_node, sizetype,
1410 NULL_TREE);
1411
1412 fn = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL, fn, args);
1413 DECL_EXTERNAL (fn) = 1;
1414 TREE_PUBLIC (fn) = 1;
1415 DECL_ARTIFICIAL (fn) = 1;
1416 TREE_NOTHROW (fn) = 1;
1417 DECL_VISIBILITY (fn) = VISIBILITY_DEFAULT;
1418 DECL_VISIBILITY_SPECIFIED (fn) = 1;
1419
1420 attr_args = build_tree_list (NULL_TREE, build_string (1, "1"));
1421 attrs = tree_cons (get_identifier ("fn spec"), attr_args, NULL);
1422
1423 decl_attributes (&fn, attrs, ATTR_FLAG_BUILT_IN);
1424
1425 block_move_fn = fn;
1426 }
1427
1428 if (asmspec)
1429 set_user_assembler_name (block_move_fn, asmspec);
1430 }
1431
1432 static tree
1433 emit_block_move_libcall_fn (int for_call)
1434 {
1435 static bool emitted_extern;
1436
1437 if (!block_move_fn)
1438 init_block_move_fn (NULL);
1439
1440 if (for_call && !emitted_extern)
1441 {
1442 emitted_extern = true;
1443 make_decl_rtl (block_move_fn);
1444 }
1445
1446 return block_move_fn;
1447 }
1448
1449 /* A subroutine of emit_block_move. Copy the data via an explicit
1450 loop. This is used only when libcalls are forbidden. */
1451 /* ??? It'd be nice to copy in hunks larger than QImode. */
1452
1453 static void
1454 emit_block_move_via_loop (rtx x, rtx y, rtx size,
1455 unsigned int align ATTRIBUTE_UNUSED)
1456 {
1457 rtx_code_label *cmp_label, *top_label;
1458 rtx iter, x_addr, y_addr, tmp;
1459 machine_mode x_addr_mode = get_address_mode (x);
1460 machine_mode y_addr_mode = get_address_mode (y);
1461 machine_mode iter_mode;
1462
1463 iter_mode = GET_MODE (size);
1464 if (iter_mode == VOIDmode)
1465 iter_mode = word_mode;
1466
1467 top_label = gen_label_rtx ();
1468 cmp_label = gen_label_rtx ();
1469 iter = gen_reg_rtx (iter_mode);
1470
1471 emit_move_insn (iter, const0_rtx);
1472
1473 x_addr = force_operand (XEXP (x, 0), NULL_RTX);
1474 y_addr = force_operand (XEXP (y, 0), NULL_RTX);
1475 do_pending_stack_adjust ();
1476
1477 emit_jump (cmp_label);
1478 emit_label (top_label);
1479
1480 tmp = convert_modes (x_addr_mode, iter_mode, iter, true);
1481 x_addr = simplify_gen_binary (PLUS, x_addr_mode, x_addr, tmp);
1482
1483 if (x_addr_mode != y_addr_mode)
1484 tmp = convert_modes (y_addr_mode, iter_mode, iter, true);
1485 y_addr = simplify_gen_binary (PLUS, y_addr_mode, y_addr, tmp);
1486
1487 x = change_address (x, QImode, x_addr);
1488 y = change_address (y, QImode, y_addr);
1489
1490 emit_move_insn (x, y);
1491
1492 tmp = expand_simple_binop (iter_mode, PLUS, iter, const1_rtx, iter,
1493 true, OPTAB_LIB_WIDEN);
1494 if (tmp != iter)
1495 emit_move_insn (iter, tmp);
1496
1497 emit_label (cmp_label);
1498
1499 emit_cmp_and_jump_insns (iter, size, LT, NULL_RTX, iter_mode,
1500 true, top_label, REG_BR_PROB_BASE * 90 / 100);
1501 }
1502 \f
1503 /* Copy all or part of a value X into registers starting at REGNO.
1504 The number of registers to be filled is NREGS. */
1505
1506 void
1507 move_block_to_reg (int regno, rtx x, int nregs, machine_mode mode)
1508 {
1509 int i;
1510 #ifdef HAVE_load_multiple
1511 rtx pat;
1512 rtx_insn *last;
1513 #endif
1514
1515 if (nregs == 0)
1516 return;
1517
1518 if (CONSTANT_P (x) && !targetm.legitimate_constant_p (mode, x))
1519 x = validize_mem (force_const_mem (mode, x));
1520
1521 /* See if the machine can do this with a load multiple insn. */
1522 #ifdef HAVE_load_multiple
1523 if (HAVE_load_multiple)
1524 {
1525 last = get_last_insn ();
1526 pat = gen_load_multiple (gen_rtx_REG (word_mode, regno), x,
1527 GEN_INT (nregs));
1528 if (pat)
1529 {
1530 emit_insn (pat);
1531 return;
1532 }
1533 else
1534 delete_insns_since (last);
1535 }
1536 #endif
1537
1538 for (i = 0; i < nregs; i++)
1539 emit_move_insn (gen_rtx_REG (word_mode, regno + i),
1540 operand_subword_force (x, i, mode));
1541 }
1542
1543 /* Copy all or part of a BLKmode value X out of registers starting at REGNO.
1544 The number of registers to be filled is NREGS. */
1545
1546 void
1547 move_block_from_reg (int regno, rtx x, int nregs)
1548 {
1549 int i;
1550
1551 if (nregs == 0)
1552 return;
1553
1554 /* See if the machine can do this with a store multiple insn. */
1555 #ifdef HAVE_store_multiple
1556 if (HAVE_store_multiple)
1557 {
1558 rtx_insn *last = get_last_insn ();
1559 rtx pat = gen_store_multiple (x, gen_rtx_REG (word_mode, regno),
1560 GEN_INT (nregs));
1561 if (pat)
1562 {
1563 emit_insn (pat);
1564 return;
1565 }
1566 else
1567 delete_insns_since (last);
1568 }
1569 #endif
1570
1571 for (i = 0; i < nregs; i++)
1572 {
1573 rtx tem = operand_subword (x, i, 1, BLKmode);
1574
1575 gcc_assert (tem);
1576
1577 emit_move_insn (tem, gen_rtx_REG (word_mode, regno + i));
1578 }
1579 }
1580
1581 /* Generate a PARALLEL rtx for a new non-consecutive group of registers from
1582 ORIG, where ORIG is a non-consecutive group of registers represented by
1583 a PARALLEL. The clone is identical to the original except in that the
1584 original set of registers is replaced by a new set of pseudo registers.
1585 The new set has the same modes as the original set. */
1586
1587 rtx
1588 gen_group_rtx (rtx orig)
1589 {
1590 int i, length;
1591 rtx *tmps;
1592
1593 gcc_assert (GET_CODE (orig) == PARALLEL);
1594
1595 length = XVECLEN (orig, 0);
1596 tmps = XALLOCAVEC (rtx, length);
1597
1598 /* Skip a NULL entry in first slot. */
1599 i = XEXP (XVECEXP (orig, 0, 0), 0) ? 0 : 1;
1600
1601 if (i)
1602 tmps[0] = 0;
1603
1604 for (; i < length; i++)
1605 {
1606 machine_mode mode = GET_MODE (XEXP (XVECEXP (orig, 0, i), 0));
1607 rtx offset = XEXP (XVECEXP (orig, 0, i), 1);
1608
1609 tmps[i] = gen_rtx_EXPR_LIST (VOIDmode, gen_reg_rtx (mode), offset);
1610 }
1611
1612 return gen_rtx_PARALLEL (GET_MODE (orig), gen_rtvec_v (length, tmps));
1613 }
1614
1615 /* A subroutine of emit_group_load. Arguments as for emit_group_load,
1616 except that values are placed in TMPS[i], and must later be moved
1617 into corresponding XEXP (XVECEXP (DST, 0, i), 0) element. */
1618
1619 static void
1620 emit_group_load_1 (rtx *tmps, rtx dst, rtx orig_src, tree type, int ssize)
1621 {
1622 rtx src;
1623 int start, i;
1624 machine_mode m = GET_MODE (orig_src);
1625
1626 gcc_assert (GET_CODE (dst) == PARALLEL);
1627
1628 if (m != VOIDmode
1629 && !SCALAR_INT_MODE_P (m)
1630 && !MEM_P (orig_src)
1631 && GET_CODE (orig_src) != CONCAT)
1632 {
1633 machine_mode imode = int_mode_for_mode (GET_MODE (orig_src));
1634 if (imode == BLKmode)
1635 src = assign_stack_temp (GET_MODE (orig_src), ssize);
1636 else
1637 src = gen_reg_rtx (imode);
1638 if (imode != BLKmode)
1639 src = gen_lowpart (GET_MODE (orig_src), src);
1640 emit_move_insn (src, orig_src);
1641 /* ...and back again. */
1642 if (imode != BLKmode)
1643 src = gen_lowpart (imode, src);
1644 emit_group_load_1 (tmps, dst, src, type, ssize);
1645 return;
1646 }
1647
1648 /* Check for a NULL entry, used to indicate that the parameter goes
1649 both on the stack and in registers. */
1650 if (XEXP (XVECEXP (dst, 0, 0), 0))
1651 start = 0;
1652 else
1653 start = 1;
1654
1655 /* Process the pieces. */
1656 for (i = start; i < XVECLEN (dst, 0); i++)
1657 {
1658 machine_mode mode = GET_MODE (XEXP (XVECEXP (dst, 0, i), 0));
1659 HOST_WIDE_INT bytepos = INTVAL (XEXP (XVECEXP (dst, 0, i), 1));
1660 unsigned int bytelen = GET_MODE_SIZE (mode);
1661 int shift = 0;
1662
1663 /* Handle trailing fragments that run over the size of the struct. */
1664 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
1665 {
1666 /* Arrange to shift the fragment to where it belongs.
1667 extract_bit_field loads to the lsb of the reg. */
1668 if (
1669 #ifdef BLOCK_REG_PADDING
1670 BLOCK_REG_PADDING (GET_MODE (orig_src), type, i == start)
1671 == (BYTES_BIG_ENDIAN ? upward : downward)
1672 #else
1673 BYTES_BIG_ENDIAN
1674 #endif
1675 )
1676 shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT;
1677 bytelen = ssize - bytepos;
1678 gcc_assert (bytelen > 0);
1679 }
1680
1681 /* If we won't be loading directly from memory, protect the real source
1682 from strange tricks we might play; but make sure that the source can
1683 be loaded directly into the destination. */
1684 src = orig_src;
1685 if (!MEM_P (orig_src)
1686 && (!CONSTANT_P (orig_src)
1687 || (GET_MODE (orig_src) != mode
1688 && GET_MODE (orig_src) != VOIDmode)))
1689 {
1690 if (GET_MODE (orig_src) == VOIDmode)
1691 src = gen_reg_rtx (mode);
1692 else
1693 src = gen_reg_rtx (GET_MODE (orig_src));
1694
1695 emit_move_insn (src, orig_src);
1696 }
1697
1698 /* Optimize the access just a bit. */
1699 if (MEM_P (src)
1700 && (! SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (src))
1701 || MEM_ALIGN (src) >= GET_MODE_ALIGNMENT (mode))
1702 && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0
1703 && bytelen == GET_MODE_SIZE (mode))
1704 {
1705 tmps[i] = gen_reg_rtx (mode);
1706 emit_move_insn (tmps[i], adjust_address (src, mode, bytepos));
1707 }
1708 else if (COMPLEX_MODE_P (mode)
1709 && GET_MODE (src) == mode
1710 && bytelen == GET_MODE_SIZE (mode))
1711 /* Let emit_move_complex do the bulk of the work. */
1712 tmps[i] = src;
1713 else if (GET_CODE (src) == CONCAT)
1714 {
1715 unsigned int slen = GET_MODE_SIZE (GET_MODE (src));
1716 unsigned int slen0 = GET_MODE_SIZE (GET_MODE (XEXP (src, 0)));
1717
1718 if ((bytepos == 0 && bytelen == slen0)
1719 || (bytepos != 0 && bytepos + bytelen <= slen))
1720 {
1721 /* The following assumes that the concatenated objects all
1722 have the same size. In this case, a simple calculation
1723 can be used to determine the object and the bit field
1724 to be extracted. */
1725 tmps[i] = XEXP (src, bytepos / slen0);
1726 if (! CONSTANT_P (tmps[i])
1727 && (!REG_P (tmps[i]) || GET_MODE (tmps[i]) != mode))
1728 tmps[i] = extract_bit_field (tmps[i], bytelen * BITS_PER_UNIT,
1729 (bytepos % slen0) * BITS_PER_UNIT,
1730 1, NULL_RTX, mode, mode);
1731 }
1732 else
1733 {
1734 rtx mem;
1735
1736 gcc_assert (!bytepos);
1737 mem = assign_stack_temp (GET_MODE (src), slen);
1738 emit_move_insn (mem, src);
1739 tmps[i] = extract_bit_field (mem, bytelen * BITS_PER_UNIT,
1740 0, 1, NULL_RTX, mode, mode);
1741 }
1742 }
1743 /* FIXME: A SIMD parallel will eventually lead to a subreg of a
1744 SIMD register, which is currently broken. While we get GCC
1745 to emit proper RTL for these cases, let's dump to memory. */
1746 else if (VECTOR_MODE_P (GET_MODE (dst))
1747 && REG_P (src))
1748 {
1749 int slen = GET_MODE_SIZE (GET_MODE (src));
1750 rtx mem;
1751
1752 mem = assign_stack_temp (GET_MODE (src), slen);
1753 emit_move_insn (mem, src);
1754 tmps[i] = adjust_address (mem, mode, (int) bytepos);
1755 }
1756 else if (CONSTANT_P (src) && GET_MODE (dst) != BLKmode
1757 && XVECLEN (dst, 0) > 1)
1758 tmps[i] = simplify_gen_subreg (mode, src, GET_MODE (dst), bytepos);
1759 else if (CONSTANT_P (src))
1760 {
1761 HOST_WIDE_INT len = (HOST_WIDE_INT) bytelen;
1762
1763 if (len == ssize)
1764 tmps[i] = src;
1765 else
1766 {
1767 rtx first, second;
1768
1769 /* TODO: const_wide_int can have sizes other than this... */
1770 gcc_assert (2 * len == ssize);
1771 split_double (src, &first, &second);
1772 if (i)
1773 tmps[i] = second;
1774 else
1775 tmps[i] = first;
1776 }
1777 }
1778 else if (REG_P (src) && GET_MODE (src) == mode)
1779 tmps[i] = src;
1780 else
1781 tmps[i] = extract_bit_field (src, bytelen * BITS_PER_UNIT,
1782 bytepos * BITS_PER_UNIT, 1, NULL_RTX,
1783 mode, mode);
1784
1785 if (shift)
1786 tmps[i] = expand_shift (LSHIFT_EXPR, mode, tmps[i],
1787 shift, tmps[i], 0);
1788 }
1789 }
1790
1791 /* Emit code to move a block SRC of type TYPE to a block DST,
1792 where DST is non-consecutive registers represented by a PARALLEL.
1793 SSIZE represents the total size of block ORIG_SRC in bytes, or -1
1794 if not known. */
1795
1796 void
1797 emit_group_load (rtx dst, rtx src, tree type, int ssize)
1798 {
1799 rtx *tmps;
1800 int i;
1801
1802 tmps = XALLOCAVEC (rtx, XVECLEN (dst, 0));
1803 emit_group_load_1 (tmps, dst, src, type, ssize);
1804
1805 /* Copy the extracted pieces into the proper (probable) hard regs. */
1806 for (i = 0; i < XVECLEN (dst, 0); i++)
1807 {
1808 rtx d = XEXP (XVECEXP (dst, 0, i), 0);
1809 if (d == NULL)
1810 continue;
1811 emit_move_insn (d, tmps[i]);
1812 }
1813 }
1814
1815 /* Similar, but load SRC into new pseudos in a format that looks like
1816 PARALLEL. This can later be fed to emit_group_move to get things
1817 in the right place. */
1818
1819 rtx
1820 emit_group_load_into_temps (rtx parallel, rtx src, tree type, int ssize)
1821 {
1822 rtvec vec;
1823 int i;
1824
1825 vec = rtvec_alloc (XVECLEN (parallel, 0));
1826 emit_group_load_1 (&RTVEC_ELT (vec, 0), parallel, src, type, ssize);
1827
1828 /* Convert the vector to look just like the original PARALLEL, except
1829 with the computed values. */
1830 for (i = 0; i < XVECLEN (parallel, 0); i++)
1831 {
1832 rtx e = XVECEXP (parallel, 0, i);
1833 rtx d = XEXP (e, 0);
1834
1835 if (d)
1836 {
1837 d = force_reg (GET_MODE (d), RTVEC_ELT (vec, i));
1838 e = alloc_EXPR_LIST (REG_NOTE_KIND (e), d, XEXP (e, 1));
1839 }
1840 RTVEC_ELT (vec, i) = e;
1841 }
1842
1843 return gen_rtx_PARALLEL (GET_MODE (parallel), vec);
1844 }
1845
1846 /* Emit code to move a block SRC to block DST, where SRC and DST are
1847 non-consecutive groups of registers, each represented by a PARALLEL. */
1848
1849 void
1850 emit_group_move (rtx dst, rtx src)
1851 {
1852 int i;
1853
1854 gcc_assert (GET_CODE (src) == PARALLEL
1855 && GET_CODE (dst) == PARALLEL
1856 && XVECLEN (src, 0) == XVECLEN (dst, 0));
1857
1858 /* Skip first entry if NULL. */
1859 for (i = XEXP (XVECEXP (src, 0, 0), 0) ? 0 : 1; i < XVECLEN (src, 0); i++)
1860 emit_move_insn (XEXP (XVECEXP (dst, 0, i), 0),
1861 XEXP (XVECEXP (src, 0, i), 0));
1862 }
1863
1864 /* Move a group of registers represented by a PARALLEL into pseudos. */
1865
1866 rtx
1867 emit_group_move_into_temps (rtx src)
1868 {
1869 rtvec vec = rtvec_alloc (XVECLEN (src, 0));
1870 int i;
1871
1872 for (i = 0; i < XVECLEN (src, 0); i++)
1873 {
1874 rtx e = XVECEXP (src, 0, i);
1875 rtx d = XEXP (e, 0);
1876
1877 if (d)
1878 e = alloc_EXPR_LIST (REG_NOTE_KIND (e), copy_to_reg (d), XEXP (e, 1));
1879 RTVEC_ELT (vec, i) = e;
1880 }
1881
1882 return gen_rtx_PARALLEL (GET_MODE (src), vec);
1883 }
1884
1885 /* Emit code to move a block SRC to a block ORIG_DST of type TYPE,
1886 where SRC is non-consecutive registers represented by a PARALLEL.
1887 SSIZE represents the total size of block ORIG_DST, or -1 if not
1888 known. */
1889
1890 void
1891 emit_group_store (rtx orig_dst, rtx src, tree type ATTRIBUTE_UNUSED, int ssize)
1892 {
1893 rtx *tmps, dst;
1894 int start, finish, i;
1895 machine_mode m = GET_MODE (orig_dst);
1896
1897 gcc_assert (GET_CODE (src) == PARALLEL);
1898
1899 if (!SCALAR_INT_MODE_P (m)
1900 && !MEM_P (orig_dst) && GET_CODE (orig_dst) != CONCAT)
1901 {
1902 machine_mode imode = int_mode_for_mode (GET_MODE (orig_dst));
1903 if (imode == BLKmode)
1904 dst = assign_stack_temp (GET_MODE (orig_dst), ssize);
1905 else
1906 dst = gen_reg_rtx (imode);
1907 emit_group_store (dst, src, type, ssize);
1908 if (imode != BLKmode)
1909 dst = gen_lowpart (GET_MODE (orig_dst), dst);
1910 emit_move_insn (orig_dst, dst);
1911 return;
1912 }
1913
1914 /* Check for a NULL entry, used to indicate that the parameter goes
1915 both on the stack and in registers. */
1916 if (XEXP (XVECEXP (src, 0, 0), 0))
1917 start = 0;
1918 else
1919 start = 1;
1920 finish = XVECLEN (src, 0);
1921
1922 tmps = XALLOCAVEC (rtx, finish);
1923
1924 /* Copy the (probable) hard regs into pseudos. */
1925 for (i = start; i < finish; i++)
1926 {
1927 rtx reg = XEXP (XVECEXP (src, 0, i), 0);
1928 if (!REG_P (reg) || REGNO (reg) < FIRST_PSEUDO_REGISTER)
1929 {
1930 tmps[i] = gen_reg_rtx (GET_MODE (reg));
1931 emit_move_insn (tmps[i], reg);
1932 }
1933 else
1934 tmps[i] = reg;
1935 }
1936
1937 /* If we won't be storing directly into memory, protect the real destination
1938 from strange tricks we might play. */
1939 dst = orig_dst;
1940 if (GET_CODE (dst) == PARALLEL)
1941 {
1942 rtx temp;
1943
1944 /* We can get a PARALLEL dst if there is a conditional expression in
1945 a return statement. In that case, the dst and src are the same,
1946 so no action is necessary. */
1947 if (rtx_equal_p (dst, src))
1948 return;
1949
1950 /* It is unclear if we can ever reach here, but we may as well handle
1951 it. Allocate a temporary, and split this into a store/load to/from
1952 the temporary. */
1953 temp = assign_stack_temp (GET_MODE (dst), ssize);
1954 emit_group_store (temp, src, type, ssize);
1955 emit_group_load (dst, temp, type, ssize);
1956 return;
1957 }
1958 else if (!MEM_P (dst) && GET_CODE (dst) != CONCAT)
1959 {
1960 machine_mode outer = GET_MODE (dst);
1961 machine_mode inner;
1962 HOST_WIDE_INT bytepos;
1963 bool done = false;
1964 rtx temp;
1965
1966 if (!REG_P (dst) || REGNO (dst) < FIRST_PSEUDO_REGISTER)
1967 dst = gen_reg_rtx (outer);
1968
1969 /* Make life a bit easier for combine. */
1970 /* If the first element of the vector is the low part
1971 of the destination mode, use a paradoxical subreg to
1972 initialize the destination. */
1973 if (start < finish)
1974 {
1975 inner = GET_MODE (tmps[start]);
1976 bytepos = subreg_lowpart_offset (inner, outer);
1977 if (INTVAL (XEXP (XVECEXP (src, 0, start), 1)) == bytepos)
1978 {
1979 temp = simplify_gen_subreg (outer, tmps[start],
1980 inner, 0);
1981 if (temp)
1982 {
1983 emit_move_insn (dst, temp);
1984 done = true;
1985 start++;
1986 }
1987 }
1988 }
1989
1990 /* If the first element wasn't the low part, try the last. */
1991 if (!done
1992 && start < finish - 1)
1993 {
1994 inner = GET_MODE (tmps[finish - 1]);
1995 bytepos = subreg_lowpart_offset (inner, outer);
1996 if (INTVAL (XEXP (XVECEXP (src, 0, finish - 1), 1)) == bytepos)
1997 {
1998 temp = simplify_gen_subreg (outer, tmps[finish - 1],
1999 inner, 0);
2000 if (temp)
2001 {
2002 emit_move_insn (dst, temp);
2003 done = true;
2004 finish--;
2005 }
2006 }
2007 }
2008
2009 /* Otherwise, simply initialize the result to zero. */
2010 if (!done)
2011 emit_move_insn (dst, CONST0_RTX (outer));
2012 }
2013
2014 /* Process the pieces. */
2015 for (i = start; i < finish; i++)
2016 {
2017 HOST_WIDE_INT bytepos = INTVAL (XEXP (XVECEXP (src, 0, i), 1));
2018 machine_mode mode = GET_MODE (tmps[i]);
2019 unsigned int bytelen = GET_MODE_SIZE (mode);
2020 unsigned int adj_bytelen;
2021 rtx dest = dst;
2022
2023 /* Handle trailing fragments that run over the size of the struct. */
2024 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
2025 adj_bytelen = ssize - bytepos;
2026 else
2027 adj_bytelen = bytelen;
2028
2029 if (GET_CODE (dst) == CONCAT)
2030 {
2031 if (bytepos + adj_bytelen
2032 <= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0))))
2033 dest = XEXP (dst, 0);
2034 else if (bytepos >= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0))))
2035 {
2036 bytepos -= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0)));
2037 dest = XEXP (dst, 1);
2038 }
2039 else
2040 {
2041 machine_mode dest_mode = GET_MODE (dest);
2042 machine_mode tmp_mode = GET_MODE (tmps[i]);
2043
2044 gcc_assert (bytepos == 0 && XVECLEN (src, 0));
2045
2046 if (GET_MODE_ALIGNMENT (dest_mode)
2047 >= GET_MODE_ALIGNMENT (tmp_mode))
2048 {
2049 dest = assign_stack_temp (dest_mode,
2050 GET_MODE_SIZE (dest_mode));
2051 emit_move_insn (adjust_address (dest,
2052 tmp_mode,
2053 bytepos),
2054 tmps[i]);
2055 dst = dest;
2056 }
2057 else
2058 {
2059 dest = assign_stack_temp (tmp_mode,
2060 GET_MODE_SIZE (tmp_mode));
2061 emit_move_insn (dest, tmps[i]);
2062 dst = adjust_address (dest, dest_mode, bytepos);
2063 }
2064 break;
2065 }
2066 }
2067
2068 /* Handle trailing fragments that run over the size of the struct. */
2069 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
2070 {
2071 /* store_bit_field always takes its value from the lsb.
2072 Move the fragment to the lsb if it's not already there. */
2073 if (
2074 #ifdef BLOCK_REG_PADDING
2075 BLOCK_REG_PADDING (GET_MODE (orig_dst), type, i == start)
2076 == (BYTES_BIG_ENDIAN ? upward : downward)
2077 #else
2078 BYTES_BIG_ENDIAN
2079 #endif
2080 )
2081 {
2082 int shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT;
2083 tmps[i] = expand_shift (RSHIFT_EXPR, mode, tmps[i],
2084 shift, tmps[i], 0);
2085 }
2086
2087 /* Make sure not to write past the end of the struct. */
2088 store_bit_field (dest,
2089 adj_bytelen * BITS_PER_UNIT, bytepos * BITS_PER_UNIT,
2090 bytepos * BITS_PER_UNIT, ssize * BITS_PER_UNIT - 1,
2091 VOIDmode, tmps[i]);
2092 }
2093
2094 /* Optimize the access just a bit. */
2095 else if (MEM_P (dest)
2096 && (!SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (dest))
2097 || MEM_ALIGN (dest) >= GET_MODE_ALIGNMENT (mode))
2098 && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0
2099 && bytelen == GET_MODE_SIZE (mode))
2100 emit_move_insn (adjust_address (dest, mode, bytepos), tmps[i]);
2101
2102 else
2103 store_bit_field (dest, bytelen * BITS_PER_UNIT, bytepos * BITS_PER_UNIT,
2104 0, 0, mode, tmps[i]);
2105 }
2106
2107 /* Copy from the pseudo into the (probable) hard reg. */
2108 if (orig_dst != dst)
2109 emit_move_insn (orig_dst, dst);
2110 }
2111
2112 /* Return a form of X that does not use a PARALLEL. TYPE is the type
2113 of the value stored in X. */
2114
2115 rtx
2116 maybe_emit_group_store (rtx x, tree type)
2117 {
2118 machine_mode mode = TYPE_MODE (type);
2119 gcc_checking_assert (GET_MODE (x) == VOIDmode || GET_MODE (x) == mode);
2120 if (GET_CODE (x) == PARALLEL)
2121 {
2122 rtx result = gen_reg_rtx (mode);
2123 emit_group_store (result, x, type, int_size_in_bytes (type));
2124 return result;
2125 }
2126 return x;
2127 }
2128
2129 /* Copy a BLKmode object of TYPE out of a register SRCREG into TARGET.
2130
2131 This is used on targets that return BLKmode values in registers. */
2132
2133 void
2134 copy_blkmode_from_reg (rtx target, rtx srcreg, tree type)
2135 {
2136 unsigned HOST_WIDE_INT bytes = int_size_in_bytes (type);
2137 rtx src = NULL, dst = NULL;
2138 unsigned HOST_WIDE_INT bitsize = MIN (TYPE_ALIGN (type), BITS_PER_WORD);
2139 unsigned HOST_WIDE_INT bitpos, xbitpos, padding_correction = 0;
2140 machine_mode mode = GET_MODE (srcreg);
2141 machine_mode tmode = GET_MODE (target);
2142 machine_mode copy_mode;
2143
2144 /* BLKmode registers created in the back-end shouldn't have survived. */
2145 gcc_assert (mode != BLKmode);
2146
2147 /* If the structure doesn't take up a whole number of words, see whether
2148 SRCREG is padded on the left or on the right. If it's on the left,
2149 set PADDING_CORRECTION to the number of bits to skip.
2150
2151 In most ABIs, the structure will be returned at the least end of
2152 the register, which translates to right padding on little-endian
2153 targets and left padding on big-endian targets. The opposite
2154 holds if the structure is returned at the most significant
2155 end of the register. */
2156 if (bytes % UNITS_PER_WORD != 0
2157 && (targetm.calls.return_in_msb (type)
2158 ? !BYTES_BIG_ENDIAN
2159 : BYTES_BIG_ENDIAN))
2160 padding_correction
2161 = (BITS_PER_WORD - ((bytes % UNITS_PER_WORD) * BITS_PER_UNIT));
2162
2163 /* We can use a single move if we have an exact mode for the size. */
2164 else if (MEM_P (target)
2165 && (!SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (target))
2166 || MEM_ALIGN (target) >= GET_MODE_ALIGNMENT (mode))
2167 && bytes == GET_MODE_SIZE (mode))
2168 {
2169 emit_move_insn (adjust_address (target, mode, 0), srcreg);
2170 return;
2171 }
2172
2173 /* And if we additionally have the same mode for a register. */
2174 else if (REG_P (target)
2175 && GET_MODE (target) == mode
2176 && bytes == GET_MODE_SIZE (mode))
2177 {
2178 emit_move_insn (target, srcreg);
2179 return;
2180 }
2181
2182 /* This code assumes srcreg is at least a full word. If it isn't, copy it
2183 into a new pseudo which is a full word. */
2184 if (GET_MODE_SIZE (mode) < UNITS_PER_WORD)
2185 {
2186 srcreg = convert_to_mode (word_mode, srcreg, TYPE_UNSIGNED (type));
2187 mode = word_mode;
2188 }
2189
2190 /* Copy the structure BITSIZE bits at a time. If the target lives in
2191 memory, take care of not reading/writing past its end by selecting
2192 a copy mode suited to BITSIZE. This should always be possible given
2193 how it is computed.
2194
2195 If the target lives in register, make sure not to select a copy mode
2196 larger than the mode of the register.
2197
2198 We could probably emit more efficient code for machines which do not use
2199 strict alignment, but it doesn't seem worth the effort at the current
2200 time. */
2201
2202 copy_mode = word_mode;
2203 if (MEM_P (target))
2204 {
2205 machine_mode mem_mode = mode_for_size (bitsize, MODE_INT, 1);
2206 if (mem_mode != BLKmode)
2207 copy_mode = mem_mode;
2208 }
2209 else if (REG_P (target) && GET_MODE_BITSIZE (tmode) < BITS_PER_WORD)
2210 copy_mode = tmode;
2211
2212 for (bitpos = 0, xbitpos = padding_correction;
2213 bitpos < bytes * BITS_PER_UNIT;
2214 bitpos += bitsize, xbitpos += bitsize)
2215 {
2216 /* We need a new source operand each time xbitpos is on a
2217 word boundary and when xbitpos == padding_correction
2218 (the first time through). */
2219 if (xbitpos % BITS_PER_WORD == 0 || xbitpos == padding_correction)
2220 src = operand_subword_force (srcreg, xbitpos / BITS_PER_WORD, mode);
2221
2222 /* We need a new destination operand each time bitpos is on
2223 a word boundary. */
2224 if (REG_P (target) && GET_MODE_BITSIZE (tmode) < BITS_PER_WORD)
2225 dst = target;
2226 else if (bitpos % BITS_PER_WORD == 0)
2227 dst = operand_subword (target, bitpos / BITS_PER_WORD, 1, tmode);
2228
2229 /* Use xbitpos for the source extraction (right justified) and
2230 bitpos for the destination store (left justified). */
2231 store_bit_field (dst, bitsize, bitpos % BITS_PER_WORD, 0, 0, copy_mode,
2232 extract_bit_field (src, bitsize,
2233 xbitpos % BITS_PER_WORD, 1,
2234 NULL_RTX, copy_mode, copy_mode));
2235 }
2236 }
2237
2238 /* Copy BLKmode value SRC into a register of mode MODE. Return the
2239 register if it contains any data, otherwise return null.
2240
2241 This is used on targets that return BLKmode values in registers. */
2242
2243 rtx
2244 copy_blkmode_to_reg (machine_mode mode, tree src)
2245 {
2246 int i, n_regs;
2247 unsigned HOST_WIDE_INT bitpos, xbitpos, padding_correction = 0, bytes;
2248 unsigned int bitsize;
2249 rtx *dst_words, dst, x, src_word = NULL_RTX, dst_word = NULL_RTX;
2250 machine_mode dst_mode;
2251
2252 gcc_assert (TYPE_MODE (TREE_TYPE (src)) == BLKmode);
2253
2254 x = expand_normal (src);
2255
2256 bytes = int_size_in_bytes (TREE_TYPE (src));
2257 if (bytes == 0)
2258 return NULL_RTX;
2259
2260 /* If the structure doesn't take up a whole number of words, see
2261 whether the register value should be padded on the left or on
2262 the right. Set PADDING_CORRECTION to the number of padding
2263 bits needed on the left side.
2264
2265 In most ABIs, the structure will be returned at the least end of
2266 the register, which translates to right padding on little-endian
2267 targets and left padding on big-endian targets. The opposite
2268 holds if the structure is returned at the most significant
2269 end of the register. */
2270 if (bytes % UNITS_PER_WORD != 0
2271 && (targetm.calls.return_in_msb (TREE_TYPE (src))
2272 ? !BYTES_BIG_ENDIAN
2273 : BYTES_BIG_ENDIAN))
2274 padding_correction = (BITS_PER_WORD - ((bytes % UNITS_PER_WORD)
2275 * BITS_PER_UNIT));
2276
2277 n_regs = (bytes + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
2278 dst_words = XALLOCAVEC (rtx, n_regs);
2279 bitsize = MIN (TYPE_ALIGN (TREE_TYPE (src)), BITS_PER_WORD);
2280
2281 /* Copy the structure BITSIZE bits at a time. */
2282 for (bitpos = 0, xbitpos = padding_correction;
2283 bitpos < bytes * BITS_PER_UNIT;
2284 bitpos += bitsize, xbitpos += bitsize)
2285 {
2286 /* We need a new destination pseudo each time xbitpos is
2287 on a word boundary and when xbitpos == padding_correction
2288 (the first time through). */
2289 if (xbitpos % BITS_PER_WORD == 0
2290 || xbitpos == padding_correction)
2291 {
2292 /* Generate an appropriate register. */
2293 dst_word = gen_reg_rtx (word_mode);
2294 dst_words[xbitpos / BITS_PER_WORD] = dst_word;
2295
2296 /* Clear the destination before we move anything into it. */
2297 emit_move_insn (dst_word, CONST0_RTX (word_mode));
2298 }
2299
2300 /* We need a new source operand each time bitpos is on a word
2301 boundary. */
2302 if (bitpos % BITS_PER_WORD == 0)
2303 src_word = operand_subword_force (x, bitpos / BITS_PER_WORD, BLKmode);
2304
2305 /* Use bitpos for the source extraction (left justified) and
2306 xbitpos for the destination store (right justified). */
2307 store_bit_field (dst_word, bitsize, xbitpos % BITS_PER_WORD,
2308 0, 0, word_mode,
2309 extract_bit_field (src_word, bitsize,
2310 bitpos % BITS_PER_WORD, 1,
2311 NULL_RTX, word_mode, word_mode));
2312 }
2313
2314 if (mode == BLKmode)
2315 {
2316 /* Find the smallest integer mode large enough to hold the
2317 entire structure. */
2318 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
2319 mode != VOIDmode;
2320 mode = GET_MODE_WIDER_MODE (mode))
2321 /* Have we found a large enough mode? */
2322 if (GET_MODE_SIZE (mode) >= bytes)
2323 break;
2324
2325 /* A suitable mode should have been found. */
2326 gcc_assert (mode != VOIDmode);
2327 }
2328
2329 if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (word_mode))
2330 dst_mode = word_mode;
2331 else
2332 dst_mode = mode;
2333 dst = gen_reg_rtx (dst_mode);
2334
2335 for (i = 0; i < n_regs; i++)
2336 emit_move_insn (operand_subword (dst, i, 0, dst_mode), dst_words[i]);
2337
2338 if (mode != dst_mode)
2339 dst = gen_lowpart (mode, dst);
2340
2341 return dst;
2342 }
2343
2344 /* Add a USE expression for REG to the (possibly empty) list pointed
2345 to by CALL_FUSAGE. REG must denote a hard register. */
2346
2347 void
2348 use_reg_mode (rtx *call_fusage, rtx reg, machine_mode mode)
2349 {
2350 gcc_assert (REG_P (reg));
2351
2352 if (!HARD_REGISTER_P (reg))
2353 return;
2354
2355 *call_fusage
2356 = gen_rtx_EXPR_LIST (mode, gen_rtx_USE (VOIDmode, reg), *call_fusage);
2357 }
2358
2359 /* Add a CLOBBER expression for REG to the (possibly empty) list pointed
2360 to by CALL_FUSAGE. REG must denote a hard register. */
2361
2362 void
2363 clobber_reg_mode (rtx *call_fusage, rtx reg, machine_mode mode)
2364 {
2365 gcc_assert (REG_P (reg) && REGNO (reg) < FIRST_PSEUDO_REGISTER);
2366
2367 *call_fusage
2368 = gen_rtx_EXPR_LIST (mode, gen_rtx_CLOBBER (VOIDmode, reg), *call_fusage);
2369 }
2370
2371 /* Add USE expressions to *CALL_FUSAGE for each of NREGS consecutive regs,
2372 starting at REGNO. All of these registers must be hard registers. */
2373
2374 void
2375 use_regs (rtx *call_fusage, int regno, int nregs)
2376 {
2377 int i;
2378
2379 gcc_assert (regno + nregs <= FIRST_PSEUDO_REGISTER);
2380
2381 for (i = 0; i < nregs; i++)
2382 use_reg (call_fusage, regno_reg_rtx[regno + i]);
2383 }
2384
2385 /* Add USE expressions to *CALL_FUSAGE for each REG contained in the
2386 PARALLEL REGS. This is for calls that pass values in multiple
2387 non-contiguous locations. The Irix 6 ABI has examples of this. */
2388
2389 void
2390 use_group_regs (rtx *call_fusage, rtx regs)
2391 {
2392 int i;
2393
2394 for (i = 0; i < XVECLEN (regs, 0); i++)
2395 {
2396 rtx reg = XEXP (XVECEXP (regs, 0, i), 0);
2397
2398 /* A NULL entry means the parameter goes both on the stack and in
2399 registers. This can also be a MEM for targets that pass values
2400 partially on the stack and partially in registers. */
2401 if (reg != 0 && REG_P (reg))
2402 use_reg (call_fusage, reg);
2403 }
2404 }
2405
2406 /* Return the defining gimple statement for SSA_NAME NAME if it is an
2407 assigment and the code of the expresion on the RHS is CODE. Return
2408 NULL otherwise. */
2409
2410 static gimple
2411 get_def_for_expr (tree name, enum tree_code code)
2412 {
2413 gimple def_stmt;
2414
2415 if (TREE_CODE (name) != SSA_NAME)
2416 return NULL;
2417
2418 def_stmt = get_gimple_for_ssa_name (name);
2419 if (!def_stmt
2420 || gimple_assign_rhs_code (def_stmt) != code)
2421 return NULL;
2422
2423 return def_stmt;
2424 }
2425
2426 #ifdef HAVE_conditional_move
2427 /* Return the defining gimple statement for SSA_NAME NAME if it is an
2428 assigment and the class of the expresion on the RHS is CLASS. Return
2429 NULL otherwise. */
2430
2431 static gimple
2432 get_def_for_expr_class (tree name, enum tree_code_class tclass)
2433 {
2434 gimple def_stmt;
2435
2436 if (TREE_CODE (name) != SSA_NAME)
2437 return NULL;
2438
2439 def_stmt = get_gimple_for_ssa_name (name);
2440 if (!def_stmt
2441 || TREE_CODE_CLASS (gimple_assign_rhs_code (def_stmt)) != tclass)
2442 return NULL;
2443
2444 return def_stmt;
2445 }
2446 #endif
2447 \f
2448
2449 /* Determine whether the LEN bytes generated by CONSTFUN can be
2450 stored to memory using several move instructions. CONSTFUNDATA is
2451 a pointer which will be passed as argument in every CONSTFUN call.
2452 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
2453 a memset operation and false if it's a copy of a constant string.
2454 Return nonzero if a call to store_by_pieces should succeed. */
2455
2456 int
2457 can_store_by_pieces (unsigned HOST_WIDE_INT len,
2458 rtx (*constfun) (void *, HOST_WIDE_INT, machine_mode),
2459 void *constfundata, unsigned int align, bool memsetp)
2460 {
2461 unsigned HOST_WIDE_INT l;
2462 unsigned int max_size;
2463 HOST_WIDE_INT offset = 0;
2464 machine_mode mode;
2465 enum insn_code icode;
2466 int reverse;
2467 /* cst is set but not used if LEGITIMATE_CONSTANT doesn't use it. */
2468 rtx cst ATTRIBUTE_UNUSED;
2469
2470 if (len == 0)
2471 return 1;
2472
2473 if (!targetm.use_by_pieces_infrastructure_p (len, align,
2474 memsetp
2475 ? SET_BY_PIECES
2476 : STORE_BY_PIECES,
2477 optimize_insn_for_speed_p ()))
2478 return 0;
2479
2480 align = alignment_for_piecewise_move (STORE_MAX_PIECES, align);
2481
2482 /* We would first store what we can in the largest integer mode, then go to
2483 successively smaller modes. */
2484
2485 for (reverse = 0;
2486 reverse <= (HAVE_PRE_DECREMENT || HAVE_POST_DECREMENT);
2487 reverse++)
2488 {
2489 l = len;
2490 max_size = STORE_MAX_PIECES + 1;
2491 while (max_size > 1 && l > 0)
2492 {
2493 mode = widest_int_mode_for_size (max_size);
2494
2495 if (mode == VOIDmode)
2496 break;
2497
2498 icode = optab_handler (mov_optab, mode);
2499 if (icode != CODE_FOR_nothing
2500 && align >= GET_MODE_ALIGNMENT (mode))
2501 {
2502 unsigned int size = GET_MODE_SIZE (mode);
2503
2504 while (l >= size)
2505 {
2506 if (reverse)
2507 offset -= size;
2508
2509 cst = (*constfun) (constfundata, offset, mode);
2510 if (!targetm.legitimate_constant_p (mode, cst))
2511 return 0;
2512
2513 if (!reverse)
2514 offset += size;
2515
2516 l -= size;
2517 }
2518 }
2519
2520 max_size = GET_MODE_SIZE (mode);
2521 }
2522
2523 /* The code above should have handled everything. */
2524 gcc_assert (!l);
2525 }
2526
2527 return 1;
2528 }
2529
2530 /* Generate several move instructions to store LEN bytes generated by
2531 CONSTFUN to block TO. (A MEM rtx with BLKmode). CONSTFUNDATA is a
2532 pointer which will be passed as argument in every CONSTFUN call.
2533 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
2534 a memset operation and false if it's a copy of a constant string.
2535 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
2536 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
2537 stpcpy. */
2538
2539 rtx
2540 store_by_pieces (rtx to, unsigned HOST_WIDE_INT len,
2541 rtx (*constfun) (void *, HOST_WIDE_INT, machine_mode),
2542 void *constfundata, unsigned int align, bool memsetp, int endp)
2543 {
2544 machine_mode to_addr_mode = get_address_mode (to);
2545 struct store_by_pieces_d data;
2546
2547 if (len == 0)
2548 {
2549 gcc_assert (endp != 2);
2550 return to;
2551 }
2552
2553 gcc_assert (targetm.use_by_pieces_infrastructure_p
2554 (len, align,
2555 memsetp
2556 ? SET_BY_PIECES
2557 : STORE_BY_PIECES,
2558 optimize_insn_for_speed_p ()));
2559
2560 data.constfun = constfun;
2561 data.constfundata = constfundata;
2562 data.len = len;
2563 data.to = to;
2564 store_by_pieces_1 (&data, align);
2565 if (endp)
2566 {
2567 rtx to1;
2568
2569 gcc_assert (!data.reverse);
2570 if (data.autinc_to)
2571 {
2572 if (endp == 2)
2573 {
2574 if (HAVE_POST_INCREMENT && data.explicit_inc_to > 0)
2575 emit_insn (gen_add2_insn (data.to_addr, constm1_rtx));
2576 else
2577 data.to_addr = copy_to_mode_reg (to_addr_mode,
2578 plus_constant (to_addr_mode,
2579 data.to_addr,
2580 -1));
2581 }
2582 to1 = adjust_automodify_address (data.to, QImode, data.to_addr,
2583 data.offset);
2584 }
2585 else
2586 {
2587 if (endp == 2)
2588 --data.offset;
2589 to1 = adjust_address (data.to, QImode, data.offset);
2590 }
2591 return to1;
2592 }
2593 else
2594 return data.to;
2595 }
2596
2597 /* Generate several move instructions to clear LEN bytes of block TO. (A MEM
2598 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
2599
2600 static void
2601 clear_by_pieces (rtx to, unsigned HOST_WIDE_INT len, unsigned int align)
2602 {
2603 struct store_by_pieces_d data;
2604
2605 if (len == 0)
2606 return;
2607
2608 data.constfun = clear_by_pieces_1;
2609 data.constfundata = NULL;
2610 data.len = len;
2611 data.to = to;
2612 store_by_pieces_1 (&data, align);
2613 }
2614
2615 /* Callback routine for clear_by_pieces.
2616 Return const0_rtx unconditionally. */
2617
2618 static rtx
2619 clear_by_pieces_1 (void *data ATTRIBUTE_UNUSED,
2620 HOST_WIDE_INT offset ATTRIBUTE_UNUSED,
2621 machine_mode mode ATTRIBUTE_UNUSED)
2622 {
2623 return const0_rtx;
2624 }
2625
2626 /* Subroutine of clear_by_pieces and store_by_pieces.
2627 Generate several move instructions to store LEN bytes of block TO. (A MEM
2628 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
2629
2630 static void
2631 store_by_pieces_1 (struct store_by_pieces_d *data ATTRIBUTE_UNUSED,
2632 unsigned int align ATTRIBUTE_UNUSED)
2633 {
2634 machine_mode to_addr_mode = get_address_mode (data->to);
2635 rtx to_addr = XEXP (data->to, 0);
2636 unsigned int max_size = STORE_MAX_PIECES + 1;
2637 enum insn_code icode;
2638
2639 data->offset = 0;
2640 data->to_addr = to_addr;
2641 data->autinc_to
2642 = (GET_CODE (to_addr) == PRE_INC || GET_CODE (to_addr) == PRE_DEC
2643 || GET_CODE (to_addr) == POST_INC || GET_CODE (to_addr) == POST_DEC);
2644
2645 data->explicit_inc_to = 0;
2646 data->reverse
2647 = (GET_CODE (to_addr) == PRE_DEC || GET_CODE (to_addr) == POST_DEC);
2648 if (data->reverse)
2649 data->offset = data->len;
2650
2651 /* If storing requires more than two move insns,
2652 copy addresses to registers (to make displacements shorter)
2653 and use post-increment if available. */
2654 if (!data->autinc_to
2655 && move_by_pieces_ninsns (data->len, align, max_size) > 2)
2656 {
2657 /* Determine the main mode we'll be using.
2658 MODE might not be used depending on the definitions of the
2659 USE_* macros below. */
2660 machine_mode mode ATTRIBUTE_UNUSED
2661 = widest_int_mode_for_size (max_size);
2662
2663 if (USE_STORE_PRE_DECREMENT (mode) && data->reverse && ! data->autinc_to)
2664 {
2665 data->to_addr = copy_to_mode_reg (to_addr_mode,
2666 plus_constant (to_addr_mode,
2667 to_addr,
2668 data->len));
2669 data->autinc_to = 1;
2670 data->explicit_inc_to = -1;
2671 }
2672
2673 if (USE_STORE_POST_INCREMENT (mode) && ! data->reverse
2674 && ! data->autinc_to)
2675 {
2676 data->to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
2677 data->autinc_to = 1;
2678 data->explicit_inc_to = 1;
2679 }
2680
2681 if ( !data->autinc_to && CONSTANT_P (to_addr))
2682 data->to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
2683 }
2684
2685 align = alignment_for_piecewise_move (STORE_MAX_PIECES, align);
2686
2687 /* First store what we can in the largest integer mode, then go to
2688 successively smaller modes. */
2689
2690 while (max_size > 1 && data->len > 0)
2691 {
2692 machine_mode mode = widest_int_mode_for_size (max_size);
2693
2694 if (mode == VOIDmode)
2695 break;
2696
2697 icode = optab_handler (mov_optab, mode);
2698 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
2699 store_by_pieces_2 (GEN_FCN (icode), mode, data);
2700
2701 max_size = GET_MODE_SIZE (mode);
2702 }
2703
2704 /* The code above should have handled everything. */
2705 gcc_assert (!data->len);
2706 }
2707
2708 /* Subroutine of store_by_pieces_1. Store as many bytes as appropriate
2709 with move instructions for mode MODE. GENFUN is the gen_... function
2710 to make a move insn for that mode. DATA has all the other info. */
2711
2712 static void
2713 store_by_pieces_2 (insn_gen_fn genfun, machine_mode mode,
2714 struct store_by_pieces_d *data)
2715 {
2716 unsigned int size = GET_MODE_SIZE (mode);
2717 rtx to1, cst;
2718
2719 while (data->len >= size)
2720 {
2721 if (data->reverse)
2722 data->offset -= size;
2723
2724 if (data->autinc_to)
2725 to1 = adjust_automodify_address (data->to, mode, data->to_addr,
2726 data->offset);
2727 else
2728 to1 = adjust_address (data->to, mode, data->offset);
2729
2730 if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0)
2731 emit_insn (gen_add2_insn (data->to_addr,
2732 gen_int_mode (-(HOST_WIDE_INT) size,
2733 GET_MODE (data->to_addr))));
2734
2735 cst = (*data->constfun) (data->constfundata, data->offset, mode);
2736 emit_insn ((*genfun) (to1, cst));
2737
2738 if (HAVE_POST_INCREMENT && data->explicit_inc_to > 0)
2739 emit_insn (gen_add2_insn (data->to_addr,
2740 gen_int_mode (size,
2741 GET_MODE (data->to_addr))));
2742
2743 if (! data->reverse)
2744 data->offset += size;
2745
2746 data->len -= size;
2747 }
2748 }
2749 \f
2750 /* Write zeros through the storage of OBJECT. If OBJECT has BLKmode, SIZE is
2751 its length in bytes. */
2752
2753 rtx
2754 clear_storage_hints (rtx object, rtx size, enum block_op_methods method,
2755 unsigned int expected_align, HOST_WIDE_INT expected_size,
2756 unsigned HOST_WIDE_INT min_size,
2757 unsigned HOST_WIDE_INT max_size,
2758 unsigned HOST_WIDE_INT probable_max_size)
2759 {
2760 machine_mode mode = GET_MODE (object);
2761 unsigned int align;
2762
2763 gcc_assert (method == BLOCK_OP_NORMAL || method == BLOCK_OP_TAILCALL);
2764
2765 /* If OBJECT is not BLKmode and SIZE is the same size as its mode,
2766 just move a zero. Otherwise, do this a piece at a time. */
2767 if (mode != BLKmode
2768 && CONST_INT_P (size)
2769 && INTVAL (size) == (HOST_WIDE_INT) GET_MODE_SIZE (mode))
2770 {
2771 rtx zero = CONST0_RTX (mode);
2772 if (zero != NULL)
2773 {
2774 emit_move_insn (object, zero);
2775 return NULL;
2776 }
2777
2778 if (COMPLEX_MODE_P (mode))
2779 {
2780 zero = CONST0_RTX (GET_MODE_INNER (mode));
2781 if (zero != NULL)
2782 {
2783 write_complex_part (object, zero, 0);
2784 write_complex_part (object, zero, 1);
2785 return NULL;
2786 }
2787 }
2788 }
2789
2790 if (size == const0_rtx)
2791 return NULL;
2792
2793 align = MEM_ALIGN (object);
2794
2795 if (CONST_INT_P (size)
2796 && targetm.use_by_pieces_infrastructure_p (INTVAL (size), align,
2797 CLEAR_BY_PIECES,
2798 optimize_insn_for_speed_p ()))
2799 clear_by_pieces (object, INTVAL (size), align);
2800 else if (set_storage_via_setmem (object, size, const0_rtx, align,
2801 expected_align, expected_size,
2802 min_size, max_size, probable_max_size))
2803 ;
2804 else if (ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (object)))
2805 return set_storage_via_libcall (object, size, const0_rtx,
2806 method == BLOCK_OP_TAILCALL);
2807 else
2808 gcc_unreachable ();
2809
2810 return NULL;
2811 }
2812
2813 rtx
2814 clear_storage (rtx object, rtx size, enum block_op_methods method)
2815 {
2816 unsigned HOST_WIDE_INT max, min = 0;
2817 if (GET_CODE (size) == CONST_INT)
2818 min = max = UINTVAL (size);
2819 else
2820 max = GET_MODE_MASK (GET_MODE (size));
2821 return clear_storage_hints (object, size, method, 0, -1, min, max, max);
2822 }
2823
2824
2825 /* A subroutine of clear_storage. Expand a call to memset.
2826 Return the return value of memset, 0 otherwise. */
2827
2828 rtx
2829 set_storage_via_libcall (rtx object, rtx size, rtx val, bool tailcall)
2830 {
2831 tree call_expr, fn, object_tree, size_tree, val_tree;
2832 machine_mode size_mode;
2833 rtx retval;
2834
2835 /* Emit code to copy OBJECT and SIZE into new pseudos. We can then
2836 place those into new pseudos into a VAR_DECL and use them later. */
2837
2838 object = copy_addr_to_reg (XEXP (object, 0));
2839
2840 size_mode = TYPE_MODE (sizetype);
2841 size = convert_to_mode (size_mode, size, 1);
2842 size = copy_to_mode_reg (size_mode, size);
2843
2844 /* It is incorrect to use the libcall calling conventions to call
2845 memset in this context. This could be a user call to memset and
2846 the user may wish to examine the return value from memset. For
2847 targets where libcalls and normal calls have different conventions
2848 for returning pointers, we could end up generating incorrect code. */
2849
2850 object_tree = make_tree (ptr_type_node, object);
2851 if (!CONST_INT_P (val))
2852 val = convert_to_mode (TYPE_MODE (integer_type_node), val, 1);
2853 size_tree = make_tree (sizetype, size);
2854 val_tree = make_tree (integer_type_node, val);
2855
2856 fn = clear_storage_libcall_fn (true);
2857 call_expr = build_call_expr (fn, 3, object_tree, val_tree, size_tree);
2858 CALL_EXPR_TAILCALL (call_expr) = tailcall;
2859
2860 retval = expand_normal (call_expr);
2861
2862 return retval;
2863 }
2864
2865 /* A subroutine of set_storage_via_libcall. Create the tree node
2866 for the function we use for block clears. */
2867
2868 tree block_clear_fn;
2869
2870 void
2871 init_block_clear_fn (const char *asmspec)
2872 {
2873 if (!block_clear_fn)
2874 {
2875 tree fn, args;
2876
2877 fn = get_identifier ("memset");
2878 args = build_function_type_list (ptr_type_node, ptr_type_node,
2879 integer_type_node, sizetype,
2880 NULL_TREE);
2881
2882 fn = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL, fn, args);
2883 DECL_EXTERNAL (fn) = 1;
2884 TREE_PUBLIC (fn) = 1;
2885 DECL_ARTIFICIAL (fn) = 1;
2886 TREE_NOTHROW (fn) = 1;
2887 DECL_VISIBILITY (fn) = VISIBILITY_DEFAULT;
2888 DECL_VISIBILITY_SPECIFIED (fn) = 1;
2889
2890 block_clear_fn = fn;
2891 }
2892
2893 if (asmspec)
2894 set_user_assembler_name (block_clear_fn, asmspec);
2895 }
2896
2897 static tree
2898 clear_storage_libcall_fn (int for_call)
2899 {
2900 static bool emitted_extern;
2901
2902 if (!block_clear_fn)
2903 init_block_clear_fn (NULL);
2904
2905 if (for_call && !emitted_extern)
2906 {
2907 emitted_extern = true;
2908 make_decl_rtl (block_clear_fn);
2909 }
2910
2911 return block_clear_fn;
2912 }
2913 \f
2914 /* Expand a setmem pattern; return true if successful. */
2915
2916 bool
2917 set_storage_via_setmem (rtx object, rtx size, rtx val, unsigned int align,
2918 unsigned int expected_align, HOST_WIDE_INT expected_size,
2919 unsigned HOST_WIDE_INT min_size,
2920 unsigned HOST_WIDE_INT max_size,
2921 unsigned HOST_WIDE_INT probable_max_size)
2922 {
2923 /* Try the most limited insn first, because there's no point
2924 including more than one in the machine description unless
2925 the more limited one has some advantage. */
2926
2927 machine_mode mode;
2928
2929 if (expected_align < align)
2930 expected_align = align;
2931 if (expected_size != -1)
2932 {
2933 if ((unsigned HOST_WIDE_INT)expected_size > max_size)
2934 expected_size = max_size;
2935 if ((unsigned HOST_WIDE_INT)expected_size < min_size)
2936 expected_size = min_size;
2937 }
2938
2939 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
2940 mode = GET_MODE_WIDER_MODE (mode))
2941 {
2942 enum insn_code code = direct_optab_handler (setmem_optab, mode);
2943
2944 if (code != CODE_FOR_nothing
2945 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
2946 here because if SIZE is less than the mode mask, as it is
2947 returned by the macro, it will definitely be less than the
2948 actual mode mask. Since SIZE is within the Pmode address
2949 space, we limit MODE to Pmode. */
2950 && ((CONST_INT_P (size)
2951 && ((unsigned HOST_WIDE_INT) INTVAL (size)
2952 <= (GET_MODE_MASK (mode) >> 1)))
2953 || max_size <= (GET_MODE_MASK (mode) >> 1)
2954 || GET_MODE_BITSIZE (mode) >= GET_MODE_BITSIZE (Pmode)))
2955 {
2956 struct expand_operand ops[9];
2957 unsigned int nops;
2958
2959 nops = insn_data[(int) code].n_generator_args;
2960 gcc_assert (nops == 4 || nops == 6 || nops == 8 || nops == 9);
2961
2962 create_fixed_operand (&ops[0], object);
2963 /* The check above guarantees that this size conversion is valid. */
2964 create_convert_operand_to (&ops[1], size, mode, true);
2965 create_convert_operand_from (&ops[2], val, byte_mode, true);
2966 create_integer_operand (&ops[3], align / BITS_PER_UNIT);
2967 if (nops >= 6)
2968 {
2969 create_integer_operand (&ops[4], expected_align / BITS_PER_UNIT);
2970 create_integer_operand (&ops[5], expected_size);
2971 }
2972 if (nops >= 8)
2973 {
2974 create_integer_operand (&ops[6], min_size);
2975 /* If we can not represent the maximal size,
2976 make parameter NULL. */
2977 if ((HOST_WIDE_INT) max_size != -1)
2978 create_integer_operand (&ops[7], max_size);
2979 else
2980 create_fixed_operand (&ops[7], NULL);
2981 }
2982 if (nops == 9)
2983 {
2984 /* If we can not represent the maximal size,
2985 make parameter NULL. */
2986 if ((HOST_WIDE_INT) probable_max_size != -1)
2987 create_integer_operand (&ops[8], probable_max_size);
2988 else
2989 create_fixed_operand (&ops[8], NULL);
2990 }
2991 if (maybe_expand_insn (code, nops, ops))
2992 return true;
2993 }
2994 }
2995
2996 return false;
2997 }
2998
2999 \f
3000 /* Write to one of the components of the complex value CPLX. Write VAL to
3001 the real part if IMAG_P is false, and the imaginary part if its true. */
3002
3003 void
3004 write_complex_part (rtx cplx, rtx val, bool imag_p)
3005 {
3006 machine_mode cmode;
3007 machine_mode imode;
3008 unsigned ibitsize;
3009
3010 if (GET_CODE (cplx) == CONCAT)
3011 {
3012 emit_move_insn (XEXP (cplx, imag_p), val);
3013 return;
3014 }
3015
3016 cmode = GET_MODE (cplx);
3017 imode = GET_MODE_INNER (cmode);
3018 ibitsize = GET_MODE_BITSIZE (imode);
3019
3020 /* For MEMs simplify_gen_subreg may generate an invalid new address
3021 because, e.g., the original address is considered mode-dependent
3022 by the target, which restricts simplify_subreg from invoking
3023 adjust_address_nv. Instead of preparing fallback support for an
3024 invalid address, we call adjust_address_nv directly. */
3025 if (MEM_P (cplx))
3026 {
3027 emit_move_insn (adjust_address_nv (cplx, imode,
3028 imag_p ? GET_MODE_SIZE (imode) : 0),
3029 val);
3030 return;
3031 }
3032
3033 /* If the sub-object is at least word sized, then we know that subregging
3034 will work. This special case is important, since store_bit_field
3035 wants to operate on integer modes, and there's rarely an OImode to
3036 correspond to TCmode. */
3037 if (ibitsize >= BITS_PER_WORD
3038 /* For hard regs we have exact predicates. Assume we can split
3039 the original object if it spans an even number of hard regs.
3040 This special case is important for SCmode on 64-bit platforms
3041 where the natural size of floating-point regs is 32-bit. */
3042 || (REG_P (cplx)
3043 && REGNO (cplx) < FIRST_PSEUDO_REGISTER
3044 && REG_NREGS (cplx) % 2 == 0))
3045 {
3046 rtx part = simplify_gen_subreg (imode, cplx, cmode,
3047 imag_p ? GET_MODE_SIZE (imode) : 0);
3048 if (part)
3049 {
3050 emit_move_insn (part, val);
3051 return;
3052 }
3053 else
3054 /* simplify_gen_subreg may fail for sub-word MEMs. */
3055 gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD);
3056 }
3057
3058 store_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0, 0, 0, imode, val);
3059 }
3060
3061 /* Extract one of the components of the complex value CPLX. Extract the
3062 real part if IMAG_P is false, and the imaginary part if it's true. */
3063
3064 static rtx
3065 read_complex_part (rtx cplx, bool imag_p)
3066 {
3067 machine_mode cmode, imode;
3068 unsigned ibitsize;
3069
3070 if (GET_CODE (cplx) == CONCAT)
3071 return XEXP (cplx, imag_p);
3072
3073 cmode = GET_MODE (cplx);
3074 imode = GET_MODE_INNER (cmode);
3075 ibitsize = GET_MODE_BITSIZE (imode);
3076
3077 /* Special case reads from complex constants that got spilled to memory. */
3078 if (MEM_P (cplx) && GET_CODE (XEXP (cplx, 0)) == SYMBOL_REF)
3079 {
3080 tree decl = SYMBOL_REF_DECL (XEXP (cplx, 0));
3081 if (decl && TREE_CODE (decl) == COMPLEX_CST)
3082 {
3083 tree part = imag_p ? TREE_IMAGPART (decl) : TREE_REALPART (decl);
3084 if (CONSTANT_CLASS_P (part))
3085 return expand_expr (part, NULL_RTX, imode, EXPAND_NORMAL);
3086 }
3087 }
3088
3089 /* For MEMs simplify_gen_subreg may generate an invalid new address
3090 because, e.g., the original address is considered mode-dependent
3091 by the target, which restricts simplify_subreg from invoking
3092 adjust_address_nv. Instead of preparing fallback support for an
3093 invalid address, we call adjust_address_nv directly. */
3094 if (MEM_P (cplx))
3095 return adjust_address_nv (cplx, imode,
3096 imag_p ? GET_MODE_SIZE (imode) : 0);
3097
3098 /* If the sub-object is at least word sized, then we know that subregging
3099 will work. This special case is important, since extract_bit_field
3100 wants to operate on integer modes, and there's rarely an OImode to
3101 correspond to TCmode. */
3102 if (ibitsize >= BITS_PER_WORD
3103 /* For hard regs we have exact predicates. Assume we can split
3104 the original object if it spans an even number of hard regs.
3105 This special case is important for SCmode on 64-bit platforms
3106 where the natural size of floating-point regs is 32-bit. */
3107 || (REG_P (cplx)
3108 && REGNO (cplx) < FIRST_PSEUDO_REGISTER
3109 && REG_NREGS (cplx) % 2 == 0))
3110 {
3111 rtx ret = simplify_gen_subreg (imode, cplx, cmode,
3112 imag_p ? GET_MODE_SIZE (imode) : 0);
3113 if (ret)
3114 return ret;
3115 else
3116 /* simplify_gen_subreg may fail for sub-word MEMs. */
3117 gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD);
3118 }
3119
3120 return extract_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0,
3121 true, NULL_RTX, imode, imode);
3122 }
3123 \f
3124 /* A subroutine of emit_move_insn_1. Yet another lowpart generator.
3125 NEW_MODE and OLD_MODE are the same size. Return NULL if X cannot be
3126 represented in NEW_MODE. If FORCE is true, this will never happen, as
3127 we'll force-create a SUBREG if needed. */
3128
3129 static rtx
3130 emit_move_change_mode (machine_mode new_mode,
3131 machine_mode old_mode, rtx x, bool force)
3132 {
3133 rtx ret;
3134
3135 if (push_operand (x, GET_MODE (x)))
3136 {
3137 ret = gen_rtx_MEM (new_mode, XEXP (x, 0));
3138 MEM_COPY_ATTRIBUTES (ret, x);
3139 }
3140 else if (MEM_P (x))
3141 {
3142 /* We don't have to worry about changing the address since the
3143 size in bytes is supposed to be the same. */
3144 if (reload_in_progress)
3145 {
3146 /* Copy the MEM to change the mode and move any
3147 substitutions from the old MEM to the new one. */
3148 ret = adjust_address_nv (x, new_mode, 0);
3149 copy_replacements (x, ret);
3150 }
3151 else
3152 ret = adjust_address (x, new_mode, 0);
3153 }
3154 else
3155 {
3156 /* Note that we do want simplify_subreg's behavior of validating
3157 that the new mode is ok for a hard register. If we were to use
3158 simplify_gen_subreg, we would create the subreg, but would
3159 probably run into the target not being able to implement it. */
3160 /* Except, of course, when FORCE is true, when this is exactly what
3161 we want. Which is needed for CCmodes on some targets. */
3162 if (force)
3163 ret = simplify_gen_subreg (new_mode, x, old_mode, 0);
3164 else
3165 ret = simplify_subreg (new_mode, x, old_mode, 0);
3166 }
3167
3168 return ret;
3169 }
3170
3171 /* A subroutine of emit_move_insn_1. Generate a move from Y into X using
3172 an integer mode of the same size as MODE. Returns the instruction
3173 emitted, or NULL if such a move could not be generated. */
3174
3175 static rtx_insn *
3176 emit_move_via_integer (machine_mode mode, rtx x, rtx y, bool force)
3177 {
3178 machine_mode imode;
3179 enum insn_code code;
3180
3181 /* There must exist a mode of the exact size we require. */
3182 imode = int_mode_for_mode (mode);
3183 if (imode == BLKmode)
3184 return NULL;
3185
3186 /* The target must support moves in this mode. */
3187 code = optab_handler (mov_optab, imode);
3188 if (code == CODE_FOR_nothing)
3189 return NULL;
3190
3191 x = emit_move_change_mode (imode, mode, x, force);
3192 if (x == NULL_RTX)
3193 return NULL;
3194 y = emit_move_change_mode (imode, mode, y, force);
3195 if (y == NULL_RTX)
3196 return NULL;
3197 return emit_insn (GEN_FCN (code) (x, y));
3198 }
3199
3200 /* A subroutine of emit_move_insn_1. X is a push_operand in MODE.
3201 Return an equivalent MEM that does not use an auto-increment. */
3202
3203 rtx
3204 emit_move_resolve_push (machine_mode mode, rtx x)
3205 {
3206 enum rtx_code code = GET_CODE (XEXP (x, 0));
3207 HOST_WIDE_INT adjust;
3208 rtx temp;
3209
3210 adjust = GET_MODE_SIZE (mode);
3211 #ifdef PUSH_ROUNDING
3212 adjust = PUSH_ROUNDING (adjust);
3213 #endif
3214 if (code == PRE_DEC || code == POST_DEC)
3215 adjust = -adjust;
3216 else if (code == PRE_MODIFY || code == POST_MODIFY)
3217 {
3218 rtx expr = XEXP (XEXP (x, 0), 1);
3219 HOST_WIDE_INT val;
3220
3221 gcc_assert (GET_CODE (expr) == PLUS || GET_CODE (expr) == MINUS);
3222 gcc_assert (CONST_INT_P (XEXP (expr, 1)));
3223 val = INTVAL (XEXP (expr, 1));
3224 if (GET_CODE (expr) == MINUS)
3225 val = -val;
3226 gcc_assert (adjust == val || adjust == -val);
3227 adjust = val;
3228 }
3229
3230 /* Do not use anti_adjust_stack, since we don't want to update
3231 stack_pointer_delta. */
3232 temp = expand_simple_binop (Pmode, PLUS, stack_pointer_rtx,
3233 gen_int_mode (adjust, Pmode), stack_pointer_rtx,
3234 0, OPTAB_LIB_WIDEN);
3235 if (temp != stack_pointer_rtx)
3236 emit_move_insn (stack_pointer_rtx, temp);
3237
3238 switch (code)
3239 {
3240 case PRE_INC:
3241 case PRE_DEC:
3242 case PRE_MODIFY:
3243 temp = stack_pointer_rtx;
3244 break;
3245 case POST_INC:
3246 case POST_DEC:
3247 case POST_MODIFY:
3248 temp = plus_constant (Pmode, stack_pointer_rtx, -adjust);
3249 break;
3250 default:
3251 gcc_unreachable ();
3252 }
3253
3254 return replace_equiv_address (x, temp);
3255 }
3256
3257 /* A subroutine of emit_move_complex. Generate a move from Y into X.
3258 X is known to satisfy push_operand, and MODE is known to be complex.
3259 Returns the last instruction emitted. */
3260
3261 rtx_insn *
3262 emit_move_complex_push (machine_mode mode, rtx x, rtx y)
3263 {
3264 machine_mode submode = GET_MODE_INNER (mode);
3265 bool imag_first;
3266
3267 #ifdef PUSH_ROUNDING
3268 unsigned int submodesize = GET_MODE_SIZE (submode);
3269
3270 /* In case we output to the stack, but the size is smaller than the
3271 machine can push exactly, we need to use move instructions. */
3272 if (PUSH_ROUNDING (submodesize) != submodesize)
3273 {
3274 x = emit_move_resolve_push (mode, x);
3275 return emit_move_insn (x, y);
3276 }
3277 #endif
3278
3279 /* Note that the real part always precedes the imag part in memory
3280 regardless of machine's endianness. */
3281 switch (GET_CODE (XEXP (x, 0)))
3282 {
3283 case PRE_DEC:
3284 case POST_DEC:
3285 imag_first = true;
3286 break;
3287 case PRE_INC:
3288 case POST_INC:
3289 imag_first = false;
3290 break;
3291 default:
3292 gcc_unreachable ();
3293 }
3294
3295 emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)),
3296 read_complex_part (y, imag_first));
3297 return emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)),
3298 read_complex_part (y, !imag_first));
3299 }
3300
3301 /* A subroutine of emit_move_complex. Perform the move from Y to X
3302 via two moves of the parts. Returns the last instruction emitted. */
3303
3304 rtx_insn *
3305 emit_move_complex_parts (rtx x, rtx y)
3306 {
3307 /* Show the output dies here. This is necessary for SUBREGs
3308 of pseudos since we cannot track their lifetimes correctly;
3309 hard regs shouldn't appear here except as return values. */
3310 if (!reload_completed && !reload_in_progress
3311 && REG_P (x) && !reg_overlap_mentioned_p (x, y))
3312 emit_clobber (x);
3313
3314 write_complex_part (x, read_complex_part (y, false), false);
3315 write_complex_part (x, read_complex_part (y, true), true);
3316
3317 return get_last_insn ();
3318 }
3319
3320 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3321 MODE is known to be complex. Returns the last instruction emitted. */
3322
3323 static rtx_insn *
3324 emit_move_complex (machine_mode mode, rtx x, rtx y)
3325 {
3326 bool try_int;
3327
3328 /* Need to take special care for pushes, to maintain proper ordering
3329 of the data, and possibly extra padding. */
3330 if (push_operand (x, mode))
3331 return emit_move_complex_push (mode, x, y);
3332
3333 /* See if we can coerce the target into moving both values at once, except
3334 for floating point where we favor moving as parts if this is easy. */
3335 if (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
3336 && optab_handler (mov_optab, GET_MODE_INNER (mode)) != CODE_FOR_nothing
3337 && !(REG_P (x)
3338 && HARD_REGISTER_P (x)
3339 && REG_NREGS (x) == 1)
3340 && !(REG_P (y)
3341 && HARD_REGISTER_P (y)
3342 && REG_NREGS (y) == 1))
3343 try_int = false;
3344 /* Not possible if the values are inherently not adjacent. */
3345 else if (GET_CODE (x) == CONCAT || GET_CODE (y) == CONCAT)
3346 try_int = false;
3347 /* Is possible if both are registers (or subregs of registers). */
3348 else if (register_operand (x, mode) && register_operand (y, mode))
3349 try_int = true;
3350 /* If one of the operands is a memory, and alignment constraints
3351 are friendly enough, we may be able to do combined memory operations.
3352 We do not attempt this if Y is a constant because that combination is
3353 usually better with the by-parts thing below. */
3354 else if ((MEM_P (x) ? !CONSTANT_P (y) : MEM_P (y))
3355 && (!STRICT_ALIGNMENT
3356 || get_mode_alignment (mode) == BIGGEST_ALIGNMENT))
3357 try_int = true;
3358 else
3359 try_int = false;
3360
3361 if (try_int)
3362 {
3363 rtx_insn *ret;
3364
3365 /* For memory to memory moves, optimal behavior can be had with the
3366 existing block move logic. */
3367 if (MEM_P (x) && MEM_P (y))
3368 {
3369 emit_block_move (x, y, GEN_INT (GET_MODE_SIZE (mode)),
3370 BLOCK_OP_NO_LIBCALL);
3371 return get_last_insn ();
3372 }
3373
3374 ret = emit_move_via_integer (mode, x, y, true);
3375 if (ret)
3376 return ret;
3377 }
3378
3379 return emit_move_complex_parts (x, y);
3380 }
3381
3382 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3383 MODE is known to be MODE_CC. Returns the last instruction emitted. */
3384
3385 static rtx_insn *
3386 emit_move_ccmode (machine_mode mode, rtx x, rtx y)
3387 {
3388 rtx_insn *ret;
3389
3390 /* Assume all MODE_CC modes are equivalent; if we have movcc, use it. */
3391 if (mode != CCmode)
3392 {
3393 enum insn_code code = optab_handler (mov_optab, CCmode);
3394 if (code != CODE_FOR_nothing)
3395 {
3396 x = emit_move_change_mode (CCmode, mode, x, true);
3397 y = emit_move_change_mode (CCmode, mode, y, true);
3398 return emit_insn (GEN_FCN (code) (x, y));
3399 }
3400 }
3401
3402 /* Otherwise, find the MODE_INT mode of the same width. */
3403 ret = emit_move_via_integer (mode, x, y, false);
3404 gcc_assert (ret != NULL);
3405 return ret;
3406 }
3407
3408 /* Return true if word I of OP lies entirely in the
3409 undefined bits of a paradoxical subreg. */
3410
3411 static bool
3412 undefined_operand_subword_p (const_rtx op, int i)
3413 {
3414 machine_mode innermode, innermostmode;
3415 int offset;
3416 if (GET_CODE (op) != SUBREG)
3417 return false;
3418 innermode = GET_MODE (op);
3419 innermostmode = GET_MODE (SUBREG_REG (op));
3420 offset = i * UNITS_PER_WORD + SUBREG_BYTE (op);
3421 /* The SUBREG_BYTE represents offset, as if the value were stored in
3422 memory, except for a paradoxical subreg where we define
3423 SUBREG_BYTE to be 0; undo this exception as in
3424 simplify_subreg. */
3425 if (SUBREG_BYTE (op) == 0
3426 && GET_MODE_SIZE (innermostmode) < GET_MODE_SIZE (innermode))
3427 {
3428 int difference = (GET_MODE_SIZE (innermostmode) - GET_MODE_SIZE (innermode));
3429 if (WORDS_BIG_ENDIAN)
3430 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
3431 if (BYTES_BIG_ENDIAN)
3432 offset += difference % UNITS_PER_WORD;
3433 }
3434 if (offset >= GET_MODE_SIZE (innermostmode)
3435 || offset <= -GET_MODE_SIZE (word_mode))
3436 return true;
3437 return false;
3438 }
3439
3440 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3441 MODE is any multi-word or full-word mode that lacks a move_insn
3442 pattern. Note that you will get better code if you define such
3443 patterns, even if they must turn into multiple assembler instructions. */
3444
3445 static rtx_insn *
3446 emit_move_multi_word (machine_mode mode, rtx x, rtx y)
3447 {
3448 rtx_insn *last_insn = 0;
3449 rtx_insn *seq;
3450 rtx inner;
3451 bool need_clobber;
3452 int i;
3453
3454 gcc_assert (GET_MODE_SIZE (mode) >= UNITS_PER_WORD);
3455
3456 /* If X is a push on the stack, do the push now and replace
3457 X with a reference to the stack pointer. */
3458 if (push_operand (x, mode))
3459 x = emit_move_resolve_push (mode, x);
3460
3461 /* If we are in reload, see if either operand is a MEM whose address
3462 is scheduled for replacement. */
3463 if (reload_in_progress && MEM_P (x)
3464 && (inner = find_replacement (&XEXP (x, 0))) != XEXP (x, 0))
3465 x = replace_equiv_address_nv (x, inner);
3466 if (reload_in_progress && MEM_P (y)
3467 && (inner = find_replacement (&XEXP (y, 0))) != XEXP (y, 0))
3468 y = replace_equiv_address_nv (y, inner);
3469
3470 start_sequence ();
3471
3472 need_clobber = false;
3473 for (i = 0;
3474 i < (GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD;
3475 i++)
3476 {
3477 rtx xpart = operand_subword (x, i, 1, mode);
3478 rtx ypart;
3479
3480 /* Do not generate code for a move if it would come entirely
3481 from the undefined bits of a paradoxical subreg. */
3482 if (undefined_operand_subword_p (y, i))
3483 continue;
3484
3485 ypart = operand_subword (y, i, 1, mode);
3486
3487 /* If we can't get a part of Y, put Y into memory if it is a
3488 constant. Otherwise, force it into a register. Then we must
3489 be able to get a part of Y. */
3490 if (ypart == 0 && CONSTANT_P (y))
3491 {
3492 y = use_anchored_address (force_const_mem (mode, y));
3493 ypart = operand_subword (y, i, 1, mode);
3494 }
3495 else if (ypart == 0)
3496 ypart = operand_subword_force (y, i, mode);
3497
3498 gcc_assert (xpart && ypart);
3499
3500 need_clobber |= (GET_CODE (xpart) == SUBREG);
3501
3502 last_insn = emit_move_insn (xpart, ypart);
3503 }
3504
3505 seq = get_insns ();
3506 end_sequence ();
3507
3508 /* Show the output dies here. This is necessary for SUBREGs
3509 of pseudos since we cannot track their lifetimes correctly;
3510 hard regs shouldn't appear here except as return values.
3511 We never want to emit such a clobber after reload. */
3512 if (x != y
3513 && ! (reload_in_progress || reload_completed)
3514 && need_clobber != 0)
3515 emit_clobber (x);
3516
3517 emit_insn (seq);
3518
3519 return last_insn;
3520 }
3521
3522 /* Low level part of emit_move_insn.
3523 Called just like emit_move_insn, but assumes X and Y
3524 are basically valid. */
3525
3526 rtx_insn *
3527 emit_move_insn_1 (rtx x, rtx y)
3528 {
3529 machine_mode mode = GET_MODE (x);
3530 enum insn_code code;
3531
3532 gcc_assert ((unsigned int) mode < (unsigned int) MAX_MACHINE_MODE);
3533
3534 code = optab_handler (mov_optab, mode);
3535 if (code != CODE_FOR_nothing)
3536 return emit_insn (GEN_FCN (code) (x, y));
3537
3538 /* Expand complex moves by moving real part and imag part. */
3539 if (COMPLEX_MODE_P (mode))
3540 return emit_move_complex (mode, x, y);
3541
3542 if (GET_MODE_CLASS (mode) == MODE_DECIMAL_FLOAT
3543 || ALL_FIXED_POINT_MODE_P (mode))
3544 {
3545 rtx_insn *result = emit_move_via_integer (mode, x, y, true);
3546
3547 /* If we can't find an integer mode, use multi words. */
3548 if (result)
3549 return result;
3550 else
3551 return emit_move_multi_word (mode, x, y);
3552 }
3553
3554 if (GET_MODE_CLASS (mode) == MODE_CC)
3555 return emit_move_ccmode (mode, x, y);
3556
3557 /* Try using a move pattern for the corresponding integer mode. This is
3558 only safe when simplify_subreg can convert MODE constants into integer
3559 constants. At present, it can only do this reliably if the value
3560 fits within a HOST_WIDE_INT. */
3561 if (!CONSTANT_P (y) || GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
3562 {
3563 rtx_insn *ret = emit_move_via_integer (mode, x, y, lra_in_progress);
3564
3565 if (ret)
3566 {
3567 if (! lra_in_progress || recog (PATTERN (ret), ret, 0) >= 0)
3568 return ret;
3569 }
3570 }
3571
3572 return emit_move_multi_word (mode, x, y);
3573 }
3574
3575 /* Generate code to copy Y into X.
3576 Both Y and X must have the same mode, except that
3577 Y can be a constant with VOIDmode.
3578 This mode cannot be BLKmode; use emit_block_move for that.
3579
3580 Return the last instruction emitted. */
3581
3582 rtx_insn *
3583 emit_move_insn (rtx x, rtx y)
3584 {
3585 machine_mode mode = GET_MODE (x);
3586 rtx y_cst = NULL_RTX;
3587 rtx_insn *last_insn;
3588 rtx set;
3589
3590 gcc_assert (mode != BLKmode
3591 && (GET_MODE (y) == mode || GET_MODE (y) == VOIDmode));
3592
3593 if (CONSTANT_P (y))
3594 {
3595 if (optimize
3596 && SCALAR_FLOAT_MODE_P (GET_MODE (x))
3597 && (last_insn = compress_float_constant (x, y)))
3598 return last_insn;
3599
3600 y_cst = y;
3601
3602 if (!targetm.legitimate_constant_p (mode, y))
3603 {
3604 y = force_const_mem (mode, y);
3605
3606 /* If the target's cannot_force_const_mem prevented the spill,
3607 assume that the target's move expanders will also take care
3608 of the non-legitimate constant. */
3609 if (!y)
3610 y = y_cst;
3611 else
3612 y = use_anchored_address (y);
3613 }
3614 }
3615
3616 /* If X or Y are memory references, verify that their addresses are valid
3617 for the machine. */
3618 if (MEM_P (x)
3619 && (! memory_address_addr_space_p (GET_MODE (x), XEXP (x, 0),
3620 MEM_ADDR_SPACE (x))
3621 && ! push_operand (x, GET_MODE (x))))
3622 x = validize_mem (x);
3623
3624 if (MEM_P (y)
3625 && ! memory_address_addr_space_p (GET_MODE (y), XEXP (y, 0),
3626 MEM_ADDR_SPACE (y)))
3627 y = validize_mem (y);
3628
3629 gcc_assert (mode != BLKmode);
3630
3631 last_insn = emit_move_insn_1 (x, y);
3632
3633 if (y_cst && REG_P (x)
3634 && (set = single_set (last_insn)) != NULL_RTX
3635 && SET_DEST (set) == x
3636 && ! rtx_equal_p (y_cst, SET_SRC (set)))
3637 set_unique_reg_note (last_insn, REG_EQUAL, copy_rtx (y_cst));
3638
3639 return last_insn;
3640 }
3641
3642 /* Generate the body of an instruction to copy Y into X.
3643 It may be a list of insns, if one insn isn't enough. */
3644
3645 rtx_insn *
3646 gen_move_insn (rtx x, rtx y)
3647 {
3648 rtx_insn *seq;
3649
3650 start_sequence ();
3651 emit_move_insn_1 (x, y);
3652 seq = get_insns ();
3653 end_sequence ();
3654 return seq;
3655 }
3656
3657 /* Same as above, but return rtx (used as a callback, which must have
3658 prototype compatible with other functions returning rtx). */
3659
3660 rtx
3661 gen_move_insn_uncast (rtx x, rtx y)
3662 {
3663 return gen_move_insn (x, y);
3664 }
3665
3666 /* If Y is representable exactly in a narrower mode, and the target can
3667 perform the extension directly from constant or memory, then emit the
3668 move as an extension. */
3669
3670 static rtx_insn *
3671 compress_float_constant (rtx x, rtx y)
3672 {
3673 machine_mode dstmode = GET_MODE (x);
3674 machine_mode orig_srcmode = GET_MODE (y);
3675 machine_mode srcmode;
3676 REAL_VALUE_TYPE r;
3677 int oldcost, newcost;
3678 bool speed = optimize_insn_for_speed_p ();
3679
3680 REAL_VALUE_FROM_CONST_DOUBLE (r, y);
3681
3682 if (targetm.legitimate_constant_p (dstmode, y))
3683 oldcost = set_src_cost (y, speed);
3684 else
3685 oldcost = set_src_cost (force_const_mem (dstmode, y), speed);
3686
3687 for (srcmode = GET_CLASS_NARROWEST_MODE (GET_MODE_CLASS (orig_srcmode));
3688 srcmode != orig_srcmode;
3689 srcmode = GET_MODE_WIDER_MODE (srcmode))
3690 {
3691 enum insn_code ic;
3692 rtx trunc_y;
3693 rtx_insn *last_insn;
3694
3695 /* Skip if the target can't extend this way. */
3696 ic = can_extend_p (dstmode, srcmode, 0);
3697 if (ic == CODE_FOR_nothing)
3698 continue;
3699
3700 /* Skip if the narrowed value isn't exact. */
3701 if (! exact_real_truncate (srcmode, &r))
3702 continue;
3703
3704 trunc_y = CONST_DOUBLE_FROM_REAL_VALUE (r, srcmode);
3705
3706 if (targetm.legitimate_constant_p (srcmode, trunc_y))
3707 {
3708 /* Skip if the target needs extra instructions to perform
3709 the extension. */
3710 if (!insn_operand_matches (ic, 1, trunc_y))
3711 continue;
3712 /* This is valid, but may not be cheaper than the original. */
3713 newcost = set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y),
3714 speed);
3715 if (oldcost < newcost)
3716 continue;
3717 }
3718 else if (float_extend_from_mem[dstmode][srcmode])
3719 {
3720 trunc_y = force_const_mem (srcmode, trunc_y);
3721 /* This is valid, but may not be cheaper than the original. */
3722 newcost = set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y),
3723 speed);
3724 if (oldcost < newcost)
3725 continue;
3726 trunc_y = validize_mem (trunc_y);
3727 }
3728 else
3729 continue;
3730
3731 /* For CSE's benefit, force the compressed constant pool entry
3732 into a new pseudo. This constant may be used in different modes,
3733 and if not, combine will put things back together for us. */
3734 trunc_y = force_reg (srcmode, trunc_y);
3735
3736 /* If x is a hard register, perform the extension into a pseudo,
3737 so that e.g. stack realignment code is aware of it. */
3738 rtx target = x;
3739 if (REG_P (x) && HARD_REGISTER_P (x))
3740 target = gen_reg_rtx (dstmode);
3741
3742 emit_unop_insn (ic, target, trunc_y, UNKNOWN);
3743 last_insn = get_last_insn ();
3744
3745 if (REG_P (target))
3746 set_unique_reg_note (last_insn, REG_EQUAL, y);
3747
3748 if (target != x)
3749 return emit_move_insn (x, target);
3750 return last_insn;
3751 }
3752
3753 return NULL;
3754 }
3755 \f
3756 /* Pushing data onto the stack. */
3757
3758 /* Push a block of length SIZE (perhaps variable)
3759 and return an rtx to address the beginning of the block.
3760 The value may be virtual_outgoing_args_rtx.
3761
3762 EXTRA is the number of bytes of padding to push in addition to SIZE.
3763 BELOW nonzero means this padding comes at low addresses;
3764 otherwise, the padding comes at high addresses. */
3765
3766 rtx
3767 push_block (rtx size, int extra, int below)
3768 {
3769 rtx temp;
3770
3771 size = convert_modes (Pmode, ptr_mode, size, 1);
3772 if (CONSTANT_P (size))
3773 anti_adjust_stack (plus_constant (Pmode, size, extra));
3774 else if (REG_P (size) && extra == 0)
3775 anti_adjust_stack (size);
3776 else
3777 {
3778 temp = copy_to_mode_reg (Pmode, size);
3779 if (extra != 0)
3780 temp = expand_binop (Pmode, add_optab, temp,
3781 gen_int_mode (extra, Pmode),
3782 temp, 0, OPTAB_LIB_WIDEN);
3783 anti_adjust_stack (temp);
3784 }
3785
3786 if (STACK_GROWS_DOWNWARD)
3787 {
3788 temp = virtual_outgoing_args_rtx;
3789 if (extra != 0 && below)
3790 temp = plus_constant (Pmode, temp, extra);
3791 }
3792 else
3793 {
3794 if (CONST_INT_P (size))
3795 temp = plus_constant (Pmode, virtual_outgoing_args_rtx,
3796 -INTVAL (size) - (below ? 0 : extra));
3797 else if (extra != 0 && !below)
3798 temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx,
3799 negate_rtx (Pmode, plus_constant (Pmode, size,
3800 extra)));
3801 else
3802 temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx,
3803 negate_rtx (Pmode, size));
3804 }
3805
3806 return memory_address (GET_CLASS_NARROWEST_MODE (MODE_INT), temp);
3807 }
3808
3809 /* A utility routine that returns the base of an auto-inc memory, or NULL. */
3810
3811 static rtx
3812 mem_autoinc_base (rtx mem)
3813 {
3814 if (MEM_P (mem))
3815 {
3816 rtx addr = XEXP (mem, 0);
3817 if (GET_RTX_CLASS (GET_CODE (addr)) == RTX_AUTOINC)
3818 return XEXP (addr, 0);
3819 }
3820 return NULL;
3821 }
3822
3823 /* A utility routine used here, in reload, and in try_split. The insns
3824 after PREV up to and including LAST are known to adjust the stack,
3825 with a final value of END_ARGS_SIZE. Iterate backward from LAST
3826 placing notes as appropriate. PREV may be NULL, indicating the
3827 entire insn sequence prior to LAST should be scanned.
3828
3829 The set of allowed stack pointer modifications is small:
3830 (1) One or more auto-inc style memory references (aka pushes),
3831 (2) One or more addition/subtraction with the SP as destination,
3832 (3) A single move insn with the SP as destination,
3833 (4) A call_pop insn,
3834 (5) Noreturn call insns if !ACCUMULATE_OUTGOING_ARGS.
3835
3836 Insns in the sequence that do not modify the SP are ignored,
3837 except for noreturn calls.
3838
3839 The return value is the amount of adjustment that can be trivially
3840 verified, via immediate operand or auto-inc. If the adjustment
3841 cannot be trivially extracted, the return value is INT_MIN. */
3842
3843 HOST_WIDE_INT
3844 find_args_size_adjust (rtx_insn *insn)
3845 {
3846 rtx dest, set, pat;
3847 int i;
3848
3849 pat = PATTERN (insn);
3850 set = NULL;
3851
3852 /* Look for a call_pop pattern. */
3853 if (CALL_P (insn))
3854 {
3855 /* We have to allow non-call_pop patterns for the case
3856 of emit_single_push_insn of a TLS address. */
3857 if (GET_CODE (pat) != PARALLEL)
3858 return 0;
3859
3860 /* All call_pop have a stack pointer adjust in the parallel.
3861 The call itself is always first, and the stack adjust is
3862 usually last, so search from the end. */
3863 for (i = XVECLEN (pat, 0) - 1; i > 0; --i)
3864 {
3865 set = XVECEXP (pat, 0, i);
3866 if (GET_CODE (set) != SET)
3867 continue;
3868 dest = SET_DEST (set);
3869 if (dest == stack_pointer_rtx)
3870 break;
3871 }
3872 /* We'd better have found the stack pointer adjust. */
3873 if (i == 0)
3874 return 0;
3875 /* Fall through to process the extracted SET and DEST
3876 as if it was a standalone insn. */
3877 }
3878 else if (GET_CODE (pat) == SET)
3879 set = pat;
3880 else if ((set = single_set (insn)) != NULL)
3881 ;
3882 else if (GET_CODE (pat) == PARALLEL)
3883 {
3884 /* ??? Some older ports use a parallel with a stack adjust
3885 and a store for a PUSH_ROUNDING pattern, rather than a
3886 PRE/POST_MODIFY rtx. Don't force them to update yet... */
3887 /* ??? See h8300 and m68k, pushqi1. */
3888 for (i = XVECLEN (pat, 0) - 1; i >= 0; --i)
3889 {
3890 set = XVECEXP (pat, 0, i);
3891 if (GET_CODE (set) != SET)
3892 continue;
3893 dest = SET_DEST (set);
3894 if (dest == stack_pointer_rtx)
3895 break;
3896
3897 /* We do not expect an auto-inc of the sp in the parallel. */
3898 gcc_checking_assert (mem_autoinc_base (dest) != stack_pointer_rtx);
3899 gcc_checking_assert (mem_autoinc_base (SET_SRC (set))
3900 != stack_pointer_rtx);
3901 }
3902 if (i < 0)
3903 return 0;
3904 }
3905 else
3906 return 0;
3907
3908 dest = SET_DEST (set);
3909
3910 /* Look for direct modifications of the stack pointer. */
3911 if (REG_P (dest) && REGNO (dest) == STACK_POINTER_REGNUM)
3912 {
3913 /* Look for a trivial adjustment, otherwise assume nothing. */
3914 /* Note that the SPU restore_stack_block pattern refers to
3915 the stack pointer in V4SImode. Consider that non-trivial. */
3916 if (SCALAR_INT_MODE_P (GET_MODE (dest))
3917 && GET_CODE (SET_SRC (set)) == PLUS
3918 && XEXP (SET_SRC (set), 0) == stack_pointer_rtx
3919 && CONST_INT_P (XEXP (SET_SRC (set), 1)))
3920 return INTVAL (XEXP (SET_SRC (set), 1));
3921 /* ??? Reload can generate no-op moves, which will be cleaned
3922 up later. Recognize it and continue searching. */
3923 else if (rtx_equal_p (dest, SET_SRC (set)))
3924 return 0;
3925 else
3926 return HOST_WIDE_INT_MIN;
3927 }
3928 else
3929 {
3930 rtx mem, addr;
3931
3932 /* Otherwise only think about autoinc patterns. */
3933 if (mem_autoinc_base (dest) == stack_pointer_rtx)
3934 {
3935 mem = dest;
3936 gcc_checking_assert (mem_autoinc_base (SET_SRC (set))
3937 != stack_pointer_rtx);
3938 }
3939 else if (mem_autoinc_base (SET_SRC (set)) == stack_pointer_rtx)
3940 mem = SET_SRC (set);
3941 else
3942 return 0;
3943
3944 addr = XEXP (mem, 0);
3945 switch (GET_CODE (addr))
3946 {
3947 case PRE_INC:
3948 case POST_INC:
3949 return GET_MODE_SIZE (GET_MODE (mem));
3950 case PRE_DEC:
3951 case POST_DEC:
3952 return -GET_MODE_SIZE (GET_MODE (mem));
3953 case PRE_MODIFY:
3954 case POST_MODIFY:
3955 addr = XEXP (addr, 1);
3956 gcc_assert (GET_CODE (addr) == PLUS);
3957 gcc_assert (XEXP (addr, 0) == stack_pointer_rtx);
3958 gcc_assert (CONST_INT_P (XEXP (addr, 1)));
3959 return INTVAL (XEXP (addr, 1));
3960 default:
3961 gcc_unreachable ();
3962 }
3963 }
3964 }
3965
3966 int
3967 fixup_args_size_notes (rtx_insn *prev, rtx_insn *last, int end_args_size)
3968 {
3969 int args_size = end_args_size;
3970 bool saw_unknown = false;
3971 rtx_insn *insn;
3972
3973 for (insn = last; insn != prev; insn = PREV_INSN (insn))
3974 {
3975 HOST_WIDE_INT this_delta;
3976
3977 if (!NONDEBUG_INSN_P (insn))
3978 continue;
3979
3980 this_delta = find_args_size_adjust (insn);
3981 if (this_delta == 0)
3982 {
3983 if (!CALL_P (insn)
3984 || ACCUMULATE_OUTGOING_ARGS
3985 || find_reg_note (insn, REG_NORETURN, NULL_RTX) == NULL_RTX)
3986 continue;
3987 }
3988
3989 gcc_assert (!saw_unknown);
3990 if (this_delta == HOST_WIDE_INT_MIN)
3991 saw_unknown = true;
3992
3993 add_reg_note (insn, REG_ARGS_SIZE, GEN_INT (args_size));
3994 if (STACK_GROWS_DOWNWARD)
3995 this_delta = -(unsigned HOST_WIDE_INT) this_delta;
3996
3997 args_size -= this_delta;
3998 }
3999
4000 return saw_unknown ? INT_MIN : args_size;
4001 }
4002
4003 #ifdef PUSH_ROUNDING
4004 /* Emit single push insn. */
4005
4006 static void
4007 emit_single_push_insn_1 (machine_mode mode, rtx x, tree type)
4008 {
4009 rtx dest_addr;
4010 unsigned rounded_size = PUSH_ROUNDING (GET_MODE_SIZE (mode));
4011 rtx dest;
4012 enum insn_code icode;
4013
4014 stack_pointer_delta += PUSH_ROUNDING (GET_MODE_SIZE (mode));
4015 /* If there is push pattern, use it. Otherwise try old way of throwing
4016 MEM representing push operation to move expander. */
4017 icode = optab_handler (push_optab, mode);
4018 if (icode != CODE_FOR_nothing)
4019 {
4020 struct expand_operand ops[1];
4021
4022 create_input_operand (&ops[0], x, mode);
4023 if (maybe_expand_insn (icode, 1, ops))
4024 return;
4025 }
4026 if (GET_MODE_SIZE (mode) == rounded_size)
4027 dest_addr = gen_rtx_fmt_e (STACK_PUSH_CODE, Pmode, stack_pointer_rtx);
4028 /* If we are to pad downward, adjust the stack pointer first and
4029 then store X into the stack location using an offset. This is
4030 because emit_move_insn does not know how to pad; it does not have
4031 access to type. */
4032 else if (FUNCTION_ARG_PADDING (mode, type) == downward)
4033 {
4034 unsigned padding_size = rounded_size - GET_MODE_SIZE (mode);
4035 HOST_WIDE_INT offset;
4036
4037 emit_move_insn (stack_pointer_rtx,
4038 expand_binop (Pmode,
4039 STACK_GROWS_DOWNWARD ? sub_optab
4040 : add_optab,
4041 stack_pointer_rtx,
4042 gen_int_mode (rounded_size, Pmode),
4043 NULL_RTX, 0, OPTAB_LIB_WIDEN));
4044
4045 offset = (HOST_WIDE_INT) padding_size;
4046 if (STACK_GROWS_DOWNWARD && STACK_PUSH_CODE == POST_DEC)
4047 /* We have already decremented the stack pointer, so get the
4048 previous value. */
4049 offset += (HOST_WIDE_INT) rounded_size;
4050
4051 if (!STACK_GROWS_DOWNWARD && STACK_PUSH_CODE == POST_INC)
4052 /* We have already incremented the stack pointer, so get the
4053 previous value. */
4054 offset -= (HOST_WIDE_INT) rounded_size;
4055
4056 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
4057 gen_int_mode (offset, Pmode));
4058 }
4059 else
4060 {
4061 if (STACK_GROWS_DOWNWARD)
4062 /* ??? This seems wrong if STACK_PUSH_CODE == POST_DEC. */
4063 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
4064 gen_int_mode (-(HOST_WIDE_INT) rounded_size,
4065 Pmode));
4066 else
4067 /* ??? This seems wrong if STACK_PUSH_CODE == POST_INC. */
4068 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
4069 gen_int_mode (rounded_size, Pmode));
4070
4071 dest_addr = gen_rtx_PRE_MODIFY (Pmode, stack_pointer_rtx, dest_addr);
4072 }
4073
4074 dest = gen_rtx_MEM (mode, dest_addr);
4075
4076 if (type != 0)
4077 {
4078 set_mem_attributes (dest, type, 1);
4079
4080 if (cfun->tail_call_marked)
4081 /* Function incoming arguments may overlap with sibling call
4082 outgoing arguments and we cannot allow reordering of reads
4083 from function arguments with stores to outgoing arguments
4084 of sibling calls. */
4085 set_mem_alias_set (dest, 0);
4086 }
4087 emit_move_insn (dest, x);
4088 }
4089
4090 /* Emit and annotate a single push insn. */
4091
4092 static void
4093 emit_single_push_insn (machine_mode mode, rtx x, tree type)
4094 {
4095 int delta, old_delta = stack_pointer_delta;
4096 rtx_insn *prev = get_last_insn ();
4097 rtx_insn *last;
4098
4099 emit_single_push_insn_1 (mode, x, type);
4100
4101 last = get_last_insn ();
4102
4103 /* Notice the common case where we emitted exactly one insn. */
4104 if (PREV_INSN (last) == prev)
4105 {
4106 add_reg_note (last, REG_ARGS_SIZE, GEN_INT (stack_pointer_delta));
4107 return;
4108 }
4109
4110 delta = fixup_args_size_notes (prev, last, stack_pointer_delta);
4111 gcc_assert (delta == INT_MIN || delta == old_delta);
4112 }
4113 #endif
4114
4115 /* Generate code to push X onto the stack, assuming it has mode MODE and
4116 type TYPE.
4117 MODE is redundant except when X is a CONST_INT (since they don't
4118 carry mode info).
4119 SIZE is an rtx for the size of data to be copied (in bytes),
4120 needed only if X is BLKmode.
4121
4122 ALIGN (in bits) is maximum alignment we can assume.
4123
4124 If PARTIAL and REG are both nonzero, then copy that many of the first
4125 bytes of X into registers starting with REG, and push the rest of X.
4126 The amount of space pushed is decreased by PARTIAL bytes.
4127 REG must be a hard register in this case.
4128 If REG is zero but PARTIAL is not, take any all others actions for an
4129 argument partially in registers, but do not actually load any
4130 registers.
4131
4132 EXTRA is the amount in bytes of extra space to leave next to this arg.
4133 This is ignored if an argument block has already been allocated.
4134
4135 On a machine that lacks real push insns, ARGS_ADDR is the address of
4136 the bottom of the argument block for this call. We use indexing off there
4137 to store the arg. On machines with push insns, ARGS_ADDR is 0 when a
4138 argument block has not been preallocated.
4139
4140 ARGS_SO_FAR is the size of args previously pushed for this call.
4141
4142 REG_PARM_STACK_SPACE is nonzero if functions require stack space
4143 for arguments passed in registers. If nonzero, it will be the number
4144 of bytes required. */
4145
4146 void
4147 emit_push_insn (rtx x, machine_mode mode, tree type, rtx size,
4148 unsigned int align, int partial, rtx reg, int extra,
4149 rtx args_addr, rtx args_so_far, int reg_parm_stack_space,
4150 rtx alignment_pad)
4151 {
4152 rtx xinner;
4153 enum direction stack_direction = STACK_GROWS_DOWNWARD ? downward : upward;
4154
4155 /* Decide where to pad the argument: `downward' for below,
4156 `upward' for above, or `none' for don't pad it.
4157 Default is below for small data on big-endian machines; else above. */
4158 enum direction where_pad = FUNCTION_ARG_PADDING (mode, type);
4159
4160 /* Invert direction if stack is post-decrement.
4161 FIXME: why? */
4162 if (STACK_PUSH_CODE == POST_DEC)
4163 if (where_pad != none)
4164 where_pad = (where_pad == downward ? upward : downward);
4165
4166 xinner = x;
4167
4168 if (mode == BLKmode
4169 || (STRICT_ALIGNMENT && align < GET_MODE_ALIGNMENT (mode)))
4170 {
4171 /* Copy a block into the stack, entirely or partially. */
4172
4173 rtx temp;
4174 int used;
4175 int offset;
4176 int skip;
4177
4178 offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT);
4179 used = partial - offset;
4180
4181 if (mode != BLKmode)
4182 {
4183 /* A value is to be stored in an insufficiently aligned
4184 stack slot; copy via a suitably aligned slot if
4185 necessary. */
4186 size = GEN_INT (GET_MODE_SIZE (mode));
4187 if (!MEM_P (xinner))
4188 {
4189 temp = assign_temp (type, 1, 1);
4190 emit_move_insn (temp, xinner);
4191 xinner = temp;
4192 }
4193 }
4194
4195 gcc_assert (size);
4196
4197 /* USED is now the # of bytes we need not copy to the stack
4198 because registers will take care of them. */
4199
4200 if (partial != 0)
4201 xinner = adjust_address (xinner, BLKmode, used);
4202
4203 /* If the partial register-part of the arg counts in its stack size,
4204 skip the part of stack space corresponding to the registers.
4205 Otherwise, start copying to the beginning of the stack space,
4206 by setting SKIP to 0. */
4207 skip = (reg_parm_stack_space == 0) ? 0 : used;
4208
4209 #ifdef PUSH_ROUNDING
4210 /* Do it with several push insns if that doesn't take lots of insns
4211 and if there is no difficulty with push insns that skip bytes
4212 on the stack for alignment purposes. */
4213 if (args_addr == 0
4214 && PUSH_ARGS
4215 && CONST_INT_P (size)
4216 && skip == 0
4217 && MEM_ALIGN (xinner) >= align
4218 && can_move_by_pieces ((unsigned) INTVAL (size) - used, align)
4219 /* Here we avoid the case of a structure whose weak alignment
4220 forces many pushes of a small amount of data,
4221 and such small pushes do rounding that causes trouble. */
4222 && ((! SLOW_UNALIGNED_ACCESS (word_mode, align))
4223 || align >= BIGGEST_ALIGNMENT
4224 || (PUSH_ROUNDING (align / BITS_PER_UNIT)
4225 == (align / BITS_PER_UNIT)))
4226 && (HOST_WIDE_INT) PUSH_ROUNDING (INTVAL (size)) == INTVAL (size))
4227 {
4228 /* Push padding now if padding above and stack grows down,
4229 or if padding below and stack grows up.
4230 But if space already allocated, this has already been done. */
4231 if (extra && args_addr == 0
4232 && where_pad != none && where_pad != stack_direction)
4233 anti_adjust_stack (GEN_INT (extra));
4234
4235 move_by_pieces (NULL, xinner, INTVAL (size) - used, align, 0);
4236 }
4237 else
4238 #endif /* PUSH_ROUNDING */
4239 {
4240 rtx target;
4241
4242 /* Otherwise make space on the stack and copy the data
4243 to the address of that space. */
4244
4245 /* Deduct words put into registers from the size we must copy. */
4246 if (partial != 0)
4247 {
4248 if (CONST_INT_P (size))
4249 size = GEN_INT (INTVAL (size) - used);
4250 else
4251 size = expand_binop (GET_MODE (size), sub_optab, size,
4252 gen_int_mode (used, GET_MODE (size)),
4253 NULL_RTX, 0, OPTAB_LIB_WIDEN);
4254 }
4255
4256 /* Get the address of the stack space.
4257 In this case, we do not deal with EXTRA separately.
4258 A single stack adjust will do. */
4259 if (! args_addr)
4260 {
4261 temp = push_block (size, extra, where_pad == downward);
4262 extra = 0;
4263 }
4264 else if (CONST_INT_P (args_so_far))
4265 temp = memory_address (BLKmode,
4266 plus_constant (Pmode, args_addr,
4267 skip + INTVAL (args_so_far)));
4268 else
4269 temp = memory_address (BLKmode,
4270 plus_constant (Pmode,
4271 gen_rtx_PLUS (Pmode,
4272 args_addr,
4273 args_so_far),
4274 skip));
4275
4276 if (!ACCUMULATE_OUTGOING_ARGS)
4277 {
4278 /* If the source is referenced relative to the stack pointer,
4279 copy it to another register to stabilize it. We do not need
4280 to do this if we know that we won't be changing sp. */
4281
4282 if (reg_mentioned_p (virtual_stack_dynamic_rtx, temp)
4283 || reg_mentioned_p (virtual_outgoing_args_rtx, temp))
4284 temp = copy_to_reg (temp);
4285 }
4286
4287 target = gen_rtx_MEM (BLKmode, temp);
4288
4289 /* We do *not* set_mem_attributes here, because incoming arguments
4290 may overlap with sibling call outgoing arguments and we cannot
4291 allow reordering of reads from function arguments with stores
4292 to outgoing arguments of sibling calls. We do, however, want
4293 to record the alignment of the stack slot. */
4294 /* ALIGN may well be better aligned than TYPE, e.g. due to
4295 PARM_BOUNDARY. Assume the caller isn't lying. */
4296 set_mem_align (target, align);
4297
4298 emit_block_move (target, xinner, size, BLOCK_OP_CALL_PARM);
4299 }
4300 }
4301 else if (partial > 0)
4302 {
4303 /* Scalar partly in registers. */
4304
4305 int size = GET_MODE_SIZE (mode) / UNITS_PER_WORD;
4306 int i;
4307 int not_stack;
4308 /* # bytes of start of argument
4309 that we must make space for but need not store. */
4310 int offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT);
4311 int args_offset = INTVAL (args_so_far);
4312 int skip;
4313
4314 /* Push padding now if padding above and stack grows down,
4315 or if padding below and stack grows up.
4316 But if space already allocated, this has already been done. */
4317 if (extra && args_addr == 0
4318 && where_pad != none && where_pad != stack_direction)
4319 anti_adjust_stack (GEN_INT (extra));
4320
4321 /* If we make space by pushing it, we might as well push
4322 the real data. Otherwise, we can leave OFFSET nonzero
4323 and leave the space uninitialized. */
4324 if (args_addr == 0)
4325 offset = 0;
4326
4327 /* Now NOT_STACK gets the number of words that we don't need to
4328 allocate on the stack. Convert OFFSET to words too. */
4329 not_stack = (partial - offset) / UNITS_PER_WORD;
4330 offset /= UNITS_PER_WORD;
4331
4332 /* If the partial register-part of the arg counts in its stack size,
4333 skip the part of stack space corresponding to the registers.
4334 Otherwise, start copying to the beginning of the stack space,
4335 by setting SKIP to 0. */
4336 skip = (reg_parm_stack_space == 0) ? 0 : not_stack;
4337
4338 if (CONSTANT_P (x) && !targetm.legitimate_constant_p (mode, x))
4339 x = validize_mem (force_const_mem (mode, x));
4340
4341 /* If X is a hard register in a non-integer mode, copy it into a pseudo;
4342 SUBREGs of such registers are not allowed. */
4343 if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER
4344 && GET_MODE_CLASS (GET_MODE (x)) != MODE_INT))
4345 x = copy_to_reg (x);
4346
4347 /* Loop over all the words allocated on the stack for this arg. */
4348 /* We can do it by words, because any scalar bigger than a word
4349 has a size a multiple of a word. */
4350 for (i = size - 1; i >= not_stack; i--)
4351 if (i >= not_stack + offset)
4352 emit_push_insn (operand_subword_force (x, i, mode),
4353 word_mode, NULL_TREE, NULL_RTX, align, 0, NULL_RTX,
4354 0, args_addr,
4355 GEN_INT (args_offset + ((i - not_stack + skip)
4356 * UNITS_PER_WORD)),
4357 reg_parm_stack_space, alignment_pad);
4358 }
4359 else
4360 {
4361 rtx addr;
4362 rtx dest;
4363
4364 /* Push padding now if padding above and stack grows down,
4365 or if padding below and stack grows up.
4366 But if space already allocated, this has already been done. */
4367 if (extra && args_addr == 0
4368 && where_pad != none && where_pad != stack_direction)
4369 anti_adjust_stack (GEN_INT (extra));
4370
4371 #ifdef PUSH_ROUNDING
4372 if (args_addr == 0 && PUSH_ARGS)
4373 emit_single_push_insn (mode, x, type);
4374 else
4375 #endif
4376 {
4377 if (CONST_INT_P (args_so_far))
4378 addr
4379 = memory_address (mode,
4380 plus_constant (Pmode, args_addr,
4381 INTVAL (args_so_far)));
4382 else
4383 addr = memory_address (mode, gen_rtx_PLUS (Pmode, args_addr,
4384 args_so_far));
4385 dest = gen_rtx_MEM (mode, addr);
4386
4387 /* We do *not* set_mem_attributes here, because incoming arguments
4388 may overlap with sibling call outgoing arguments and we cannot
4389 allow reordering of reads from function arguments with stores
4390 to outgoing arguments of sibling calls. We do, however, want
4391 to record the alignment of the stack slot. */
4392 /* ALIGN may well be better aligned than TYPE, e.g. due to
4393 PARM_BOUNDARY. Assume the caller isn't lying. */
4394 set_mem_align (dest, align);
4395
4396 emit_move_insn (dest, x);
4397 }
4398 }
4399
4400 /* If part should go in registers, copy that part
4401 into the appropriate registers. Do this now, at the end,
4402 since mem-to-mem copies above may do function calls. */
4403 if (partial > 0 && reg != 0)
4404 {
4405 /* Handle calls that pass values in multiple non-contiguous locations.
4406 The Irix 6 ABI has examples of this. */
4407 if (GET_CODE (reg) == PARALLEL)
4408 emit_group_load (reg, x, type, -1);
4409 else
4410 {
4411 gcc_assert (partial % UNITS_PER_WORD == 0);
4412 move_block_to_reg (REGNO (reg), x, partial / UNITS_PER_WORD, mode);
4413 }
4414 }
4415
4416 if (extra && args_addr == 0 && where_pad == stack_direction)
4417 anti_adjust_stack (GEN_INT (extra));
4418
4419 if (alignment_pad && args_addr == 0)
4420 anti_adjust_stack (alignment_pad);
4421 }
4422 \f
4423 /* Return X if X can be used as a subtarget in a sequence of arithmetic
4424 operations. */
4425
4426 static rtx
4427 get_subtarget (rtx x)
4428 {
4429 return (optimize
4430 || x == 0
4431 /* Only registers can be subtargets. */
4432 || !REG_P (x)
4433 /* Don't use hard regs to avoid extending their life. */
4434 || REGNO (x) < FIRST_PSEUDO_REGISTER
4435 ? 0 : x);
4436 }
4437
4438 /* A subroutine of expand_assignment. Optimize FIELD op= VAL, where
4439 FIELD is a bitfield. Returns true if the optimization was successful,
4440 and there's nothing else to do. */
4441
4442 static bool
4443 optimize_bitfield_assignment_op (unsigned HOST_WIDE_INT bitsize,
4444 unsigned HOST_WIDE_INT bitpos,
4445 unsigned HOST_WIDE_INT bitregion_start,
4446 unsigned HOST_WIDE_INT bitregion_end,
4447 machine_mode mode1, rtx str_rtx,
4448 tree to, tree src)
4449 {
4450 machine_mode str_mode = GET_MODE (str_rtx);
4451 unsigned int str_bitsize = GET_MODE_BITSIZE (str_mode);
4452 tree op0, op1;
4453 rtx value, result;
4454 optab binop;
4455 gimple srcstmt;
4456 enum tree_code code;
4457
4458 if (mode1 != VOIDmode
4459 || bitsize >= BITS_PER_WORD
4460 || str_bitsize > BITS_PER_WORD
4461 || TREE_SIDE_EFFECTS (to)
4462 || TREE_THIS_VOLATILE (to))
4463 return false;
4464
4465 STRIP_NOPS (src);
4466 if (TREE_CODE (src) != SSA_NAME)
4467 return false;
4468 if (TREE_CODE (TREE_TYPE (src)) != INTEGER_TYPE)
4469 return false;
4470
4471 srcstmt = get_gimple_for_ssa_name (src);
4472 if (!srcstmt
4473 || TREE_CODE_CLASS (gimple_assign_rhs_code (srcstmt)) != tcc_binary)
4474 return false;
4475
4476 code = gimple_assign_rhs_code (srcstmt);
4477
4478 op0 = gimple_assign_rhs1 (srcstmt);
4479
4480 /* If OP0 is an SSA_NAME, then we want to walk the use-def chain
4481 to find its initialization. Hopefully the initialization will
4482 be from a bitfield load. */
4483 if (TREE_CODE (op0) == SSA_NAME)
4484 {
4485 gimple op0stmt = get_gimple_for_ssa_name (op0);
4486
4487 /* We want to eventually have OP0 be the same as TO, which
4488 should be a bitfield. */
4489 if (!op0stmt
4490 || !is_gimple_assign (op0stmt)
4491 || gimple_assign_rhs_code (op0stmt) != TREE_CODE (to))
4492 return false;
4493 op0 = gimple_assign_rhs1 (op0stmt);
4494 }
4495
4496 op1 = gimple_assign_rhs2 (srcstmt);
4497
4498 if (!operand_equal_p (to, op0, 0))
4499 return false;
4500
4501 if (MEM_P (str_rtx))
4502 {
4503 unsigned HOST_WIDE_INT offset1;
4504
4505 if (str_bitsize == 0 || str_bitsize > BITS_PER_WORD)
4506 str_mode = word_mode;
4507 str_mode = get_best_mode (bitsize, bitpos,
4508 bitregion_start, bitregion_end,
4509 MEM_ALIGN (str_rtx), str_mode, 0);
4510 if (str_mode == VOIDmode)
4511 return false;
4512 str_bitsize = GET_MODE_BITSIZE (str_mode);
4513
4514 offset1 = bitpos;
4515 bitpos %= str_bitsize;
4516 offset1 = (offset1 - bitpos) / BITS_PER_UNIT;
4517 str_rtx = adjust_address (str_rtx, str_mode, offset1);
4518 }
4519 else if (!REG_P (str_rtx) && GET_CODE (str_rtx) != SUBREG)
4520 return false;
4521
4522 /* If the bit field covers the whole REG/MEM, store_field
4523 will likely generate better code. */
4524 if (bitsize >= str_bitsize)
4525 return false;
4526
4527 /* We can't handle fields split across multiple entities. */
4528 if (bitpos + bitsize > str_bitsize)
4529 return false;
4530
4531 if (BYTES_BIG_ENDIAN)
4532 bitpos = str_bitsize - bitpos - bitsize;
4533
4534 switch (code)
4535 {
4536 case PLUS_EXPR:
4537 case MINUS_EXPR:
4538 /* For now, just optimize the case of the topmost bitfield
4539 where we don't need to do any masking and also
4540 1 bit bitfields where xor can be used.
4541 We might win by one instruction for the other bitfields
4542 too if insv/extv instructions aren't used, so that
4543 can be added later. */
4544 if (bitpos + bitsize != str_bitsize
4545 && (bitsize != 1 || TREE_CODE (op1) != INTEGER_CST))
4546 break;
4547
4548 value = expand_expr (op1, NULL_RTX, str_mode, EXPAND_NORMAL);
4549 value = convert_modes (str_mode,
4550 TYPE_MODE (TREE_TYPE (op1)), value,
4551 TYPE_UNSIGNED (TREE_TYPE (op1)));
4552
4553 /* We may be accessing data outside the field, which means
4554 we can alias adjacent data. */
4555 if (MEM_P (str_rtx))
4556 {
4557 str_rtx = shallow_copy_rtx (str_rtx);
4558 set_mem_alias_set (str_rtx, 0);
4559 set_mem_expr (str_rtx, 0);
4560 }
4561
4562 binop = code == PLUS_EXPR ? add_optab : sub_optab;
4563 if (bitsize == 1 && bitpos + bitsize != str_bitsize)
4564 {
4565 value = expand_and (str_mode, value, const1_rtx, NULL);
4566 binop = xor_optab;
4567 }
4568 value = expand_shift (LSHIFT_EXPR, str_mode, value, bitpos, NULL_RTX, 1);
4569 result = expand_binop (str_mode, binop, str_rtx,
4570 value, str_rtx, 1, OPTAB_WIDEN);
4571 if (result != str_rtx)
4572 emit_move_insn (str_rtx, result);
4573 return true;
4574
4575 case BIT_IOR_EXPR:
4576 case BIT_XOR_EXPR:
4577 if (TREE_CODE (op1) != INTEGER_CST)
4578 break;
4579 value = expand_expr (op1, NULL_RTX, str_mode, EXPAND_NORMAL);
4580 value = convert_modes (str_mode,
4581 TYPE_MODE (TREE_TYPE (op1)), value,
4582 TYPE_UNSIGNED (TREE_TYPE (op1)));
4583
4584 /* We may be accessing data outside the field, which means
4585 we can alias adjacent data. */
4586 if (MEM_P (str_rtx))
4587 {
4588 str_rtx = shallow_copy_rtx (str_rtx);
4589 set_mem_alias_set (str_rtx, 0);
4590 set_mem_expr (str_rtx, 0);
4591 }
4592
4593 binop = code == BIT_IOR_EXPR ? ior_optab : xor_optab;
4594 if (bitpos + bitsize != str_bitsize)
4595 {
4596 rtx mask = gen_int_mode (((unsigned HOST_WIDE_INT) 1 << bitsize) - 1,
4597 str_mode);
4598 value = expand_and (str_mode, value, mask, NULL_RTX);
4599 }
4600 value = expand_shift (LSHIFT_EXPR, str_mode, value, bitpos, NULL_RTX, 1);
4601 result = expand_binop (str_mode, binop, str_rtx,
4602 value, str_rtx, 1, OPTAB_WIDEN);
4603 if (result != str_rtx)
4604 emit_move_insn (str_rtx, result);
4605 return true;
4606
4607 default:
4608 break;
4609 }
4610
4611 return false;
4612 }
4613
4614 /* In the C++ memory model, consecutive bit fields in a structure are
4615 considered one memory location.
4616
4617 Given a COMPONENT_REF EXP at position (BITPOS, OFFSET), this function
4618 returns the bit range of consecutive bits in which this COMPONENT_REF
4619 belongs. The values are returned in *BITSTART and *BITEND. *BITPOS
4620 and *OFFSET may be adjusted in the process.
4621
4622 If the access does not need to be restricted, 0 is returned in both
4623 *BITSTART and *BITEND. */
4624
4625 static void
4626 get_bit_range (unsigned HOST_WIDE_INT *bitstart,
4627 unsigned HOST_WIDE_INT *bitend,
4628 tree exp,
4629 HOST_WIDE_INT *bitpos,
4630 tree *offset)
4631 {
4632 HOST_WIDE_INT bitoffset;
4633 tree field, repr;
4634
4635 gcc_assert (TREE_CODE (exp) == COMPONENT_REF);
4636
4637 field = TREE_OPERAND (exp, 1);
4638 repr = DECL_BIT_FIELD_REPRESENTATIVE (field);
4639 /* If we do not have a DECL_BIT_FIELD_REPRESENTATIVE there is no
4640 need to limit the range we can access. */
4641 if (!repr)
4642 {
4643 *bitstart = *bitend = 0;
4644 return;
4645 }
4646
4647 /* If we have a DECL_BIT_FIELD_REPRESENTATIVE but the enclosing record is
4648 part of a larger bit field, then the representative does not serve any
4649 useful purpose. This can occur in Ada. */
4650 if (handled_component_p (TREE_OPERAND (exp, 0)))
4651 {
4652 machine_mode rmode;
4653 HOST_WIDE_INT rbitsize, rbitpos;
4654 tree roffset;
4655 int unsignedp;
4656 int volatilep = 0;
4657 get_inner_reference (TREE_OPERAND (exp, 0), &rbitsize, &rbitpos,
4658 &roffset, &rmode, &unsignedp, &volatilep, false);
4659 if ((rbitpos % BITS_PER_UNIT) != 0)
4660 {
4661 *bitstart = *bitend = 0;
4662 return;
4663 }
4664 }
4665
4666 /* Compute the adjustment to bitpos from the offset of the field
4667 relative to the representative. DECL_FIELD_OFFSET of field and
4668 repr are the same by construction if they are not constants,
4669 see finish_bitfield_layout. */
4670 if (tree_fits_uhwi_p (DECL_FIELD_OFFSET (field))
4671 && tree_fits_uhwi_p (DECL_FIELD_OFFSET (repr)))
4672 bitoffset = (tree_to_uhwi (DECL_FIELD_OFFSET (field))
4673 - tree_to_uhwi (DECL_FIELD_OFFSET (repr))) * BITS_PER_UNIT;
4674 else
4675 bitoffset = 0;
4676 bitoffset += (tree_to_uhwi (DECL_FIELD_BIT_OFFSET (field))
4677 - tree_to_uhwi (DECL_FIELD_BIT_OFFSET (repr)));
4678
4679 /* If the adjustment is larger than bitpos, we would have a negative bit
4680 position for the lower bound and this may wreak havoc later. Adjust
4681 offset and bitpos to make the lower bound non-negative in that case. */
4682 if (bitoffset > *bitpos)
4683 {
4684 HOST_WIDE_INT adjust = bitoffset - *bitpos;
4685 gcc_assert ((adjust % BITS_PER_UNIT) == 0);
4686
4687 *bitpos += adjust;
4688 if (*offset == NULL_TREE)
4689 *offset = size_int (-adjust / BITS_PER_UNIT);
4690 else
4691 *offset
4692 = size_binop (MINUS_EXPR, *offset, size_int (adjust / BITS_PER_UNIT));
4693 *bitstart = 0;
4694 }
4695 else
4696 *bitstart = *bitpos - bitoffset;
4697
4698 *bitend = *bitstart + tree_to_uhwi (DECL_SIZE (repr)) - 1;
4699 }
4700
4701 /* Returns true if ADDR is an ADDR_EXPR of a DECL that does not reside
4702 in memory and has non-BLKmode. DECL_RTL must not be a MEM; if
4703 DECL_RTL was not set yet, return NORTL. */
4704
4705 static inline bool
4706 addr_expr_of_non_mem_decl_p_1 (tree addr, bool nortl)
4707 {
4708 if (TREE_CODE (addr) != ADDR_EXPR)
4709 return false;
4710
4711 tree base = TREE_OPERAND (addr, 0);
4712
4713 if (!DECL_P (base)
4714 || TREE_ADDRESSABLE (base)
4715 || DECL_MODE (base) == BLKmode)
4716 return false;
4717
4718 if (!DECL_RTL_SET_P (base))
4719 return nortl;
4720
4721 return (!MEM_P (DECL_RTL (base)));
4722 }
4723
4724 /* Returns true if the MEM_REF REF refers to an object that does not
4725 reside in memory and has non-BLKmode. */
4726
4727 static inline bool
4728 mem_ref_refers_to_non_mem_p (tree ref)
4729 {
4730 tree base = TREE_OPERAND (ref, 0);
4731 return addr_expr_of_non_mem_decl_p_1 (base, false);
4732 }
4733
4734 /* Expand an assignment that stores the value of FROM into TO. If NONTEMPORAL
4735 is true, try generating a nontemporal store. */
4736
4737 void
4738 expand_assignment (tree to, tree from, bool nontemporal)
4739 {
4740 rtx to_rtx = 0;
4741 rtx result;
4742 machine_mode mode;
4743 unsigned int align;
4744 enum insn_code icode;
4745
4746 /* Don't crash if the lhs of the assignment was erroneous. */
4747 if (TREE_CODE (to) == ERROR_MARK)
4748 {
4749 expand_normal (from);
4750 return;
4751 }
4752
4753 /* Optimize away no-op moves without side-effects. */
4754 if (operand_equal_p (to, from, 0))
4755 return;
4756
4757 /* Handle misaligned stores. */
4758 mode = TYPE_MODE (TREE_TYPE (to));
4759 if ((TREE_CODE (to) == MEM_REF
4760 || TREE_CODE (to) == TARGET_MEM_REF)
4761 && mode != BLKmode
4762 && !mem_ref_refers_to_non_mem_p (to)
4763 && ((align = get_object_alignment (to))
4764 < GET_MODE_ALIGNMENT (mode))
4765 && (((icode = optab_handler (movmisalign_optab, mode))
4766 != CODE_FOR_nothing)
4767 || SLOW_UNALIGNED_ACCESS (mode, align)))
4768 {
4769 rtx reg, mem;
4770
4771 reg = expand_expr (from, NULL_RTX, VOIDmode, EXPAND_NORMAL);
4772 reg = force_not_mem (reg);
4773 mem = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
4774
4775 if (icode != CODE_FOR_nothing)
4776 {
4777 struct expand_operand ops[2];
4778
4779 create_fixed_operand (&ops[0], mem);
4780 create_input_operand (&ops[1], reg, mode);
4781 /* The movmisalign<mode> pattern cannot fail, else the assignment
4782 would silently be omitted. */
4783 expand_insn (icode, 2, ops);
4784 }
4785 else
4786 store_bit_field (mem, GET_MODE_BITSIZE (mode), 0, 0, 0, mode, reg);
4787 return;
4788 }
4789
4790 /* Assignment of a structure component needs special treatment
4791 if the structure component's rtx is not simply a MEM.
4792 Assignment of an array element at a constant index, and assignment of
4793 an array element in an unaligned packed structure field, has the same
4794 problem. Same for (partially) storing into a non-memory object. */
4795 if (handled_component_p (to)
4796 || (TREE_CODE (to) == MEM_REF
4797 && mem_ref_refers_to_non_mem_p (to))
4798 || TREE_CODE (TREE_TYPE (to)) == ARRAY_TYPE)
4799 {
4800 machine_mode mode1;
4801 HOST_WIDE_INT bitsize, bitpos;
4802 unsigned HOST_WIDE_INT bitregion_start = 0;
4803 unsigned HOST_WIDE_INT bitregion_end = 0;
4804 tree offset;
4805 int unsignedp;
4806 int volatilep = 0;
4807 tree tem;
4808
4809 push_temp_slots ();
4810 tem = get_inner_reference (to, &bitsize, &bitpos, &offset, &mode1,
4811 &unsignedp, &volatilep, true);
4812
4813 /* Make sure bitpos is not negative, it can wreak havoc later. */
4814 if (bitpos < 0)
4815 {
4816 gcc_assert (offset == NULL_TREE);
4817 offset = size_int (bitpos >> (BITS_PER_UNIT == 8
4818 ? 3 : exact_log2 (BITS_PER_UNIT)));
4819 bitpos &= BITS_PER_UNIT - 1;
4820 }
4821
4822 if (TREE_CODE (to) == COMPONENT_REF
4823 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (to, 1)))
4824 get_bit_range (&bitregion_start, &bitregion_end, to, &bitpos, &offset);
4825 /* The C++ memory model naturally applies to byte-aligned fields.
4826 However, if we do not have a DECL_BIT_FIELD_TYPE but BITPOS or
4827 BITSIZE are not byte-aligned, there is no need to limit the range
4828 we can access. This can occur with packed structures in Ada. */
4829 else if (bitsize > 0
4830 && bitsize % BITS_PER_UNIT == 0
4831 && bitpos % BITS_PER_UNIT == 0)
4832 {
4833 bitregion_start = bitpos;
4834 bitregion_end = bitpos + bitsize - 1;
4835 }
4836
4837 to_rtx = expand_expr (tem, NULL_RTX, VOIDmode, EXPAND_WRITE);
4838
4839 /* If the field has a mode, we want to access it in the
4840 field's mode, not the computed mode.
4841 If a MEM has VOIDmode (external with incomplete type),
4842 use BLKmode for it instead. */
4843 if (MEM_P (to_rtx))
4844 {
4845 if (mode1 != VOIDmode)
4846 to_rtx = adjust_address (to_rtx, mode1, 0);
4847 else if (GET_MODE (to_rtx) == VOIDmode)
4848 to_rtx = adjust_address (to_rtx, BLKmode, 0);
4849 }
4850
4851 if (offset != 0)
4852 {
4853 machine_mode address_mode;
4854 rtx offset_rtx;
4855
4856 if (!MEM_P (to_rtx))
4857 {
4858 /* We can get constant negative offsets into arrays with broken
4859 user code. Translate this to a trap instead of ICEing. */
4860 gcc_assert (TREE_CODE (offset) == INTEGER_CST);
4861 expand_builtin_trap ();
4862 to_rtx = gen_rtx_MEM (BLKmode, const0_rtx);
4863 }
4864
4865 offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode, EXPAND_SUM);
4866 address_mode = get_address_mode (to_rtx);
4867 if (GET_MODE (offset_rtx) != address_mode)
4868 {
4869 /* We cannot be sure that the RTL in offset_rtx is valid outside
4870 of a memory address context, so force it into a register
4871 before attempting to convert it to the desired mode. */
4872 offset_rtx = force_operand (offset_rtx, NULL_RTX);
4873 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
4874 }
4875
4876 /* If we have an expression in OFFSET_RTX and a non-zero
4877 byte offset in BITPOS, adding the byte offset before the
4878 OFFSET_RTX results in better intermediate code, which makes
4879 later rtl optimization passes perform better.
4880
4881 We prefer intermediate code like this:
4882
4883 r124:DI=r123:DI+0x18
4884 [r124:DI]=r121:DI
4885
4886 ... instead of ...
4887
4888 r124:DI=r123:DI+0x10
4889 [r124:DI+0x8]=r121:DI
4890
4891 This is only done for aligned data values, as these can
4892 be expected to result in single move instructions. */
4893 if (mode1 != VOIDmode
4894 && bitpos != 0
4895 && bitsize > 0
4896 && (bitpos % bitsize) == 0
4897 && (bitsize % GET_MODE_ALIGNMENT (mode1)) == 0
4898 && MEM_ALIGN (to_rtx) >= GET_MODE_ALIGNMENT (mode1))
4899 {
4900 to_rtx = adjust_address (to_rtx, mode1, bitpos / BITS_PER_UNIT);
4901 bitregion_start = 0;
4902 if (bitregion_end >= (unsigned HOST_WIDE_INT) bitpos)
4903 bitregion_end -= bitpos;
4904 bitpos = 0;
4905 }
4906
4907 to_rtx = offset_address (to_rtx, offset_rtx,
4908 highest_pow2_factor_for_target (to,
4909 offset));
4910 }
4911
4912 /* No action is needed if the target is not a memory and the field
4913 lies completely outside that target. This can occur if the source
4914 code contains an out-of-bounds access to a small array. */
4915 if (!MEM_P (to_rtx)
4916 && GET_MODE (to_rtx) != BLKmode
4917 && (unsigned HOST_WIDE_INT) bitpos
4918 >= GET_MODE_PRECISION (GET_MODE (to_rtx)))
4919 {
4920 expand_normal (from);
4921 result = NULL;
4922 }
4923 /* Handle expand_expr of a complex value returning a CONCAT. */
4924 else if (GET_CODE (to_rtx) == CONCAT)
4925 {
4926 unsigned short mode_bitsize = GET_MODE_BITSIZE (GET_MODE (to_rtx));
4927 if (COMPLEX_MODE_P (TYPE_MODE (TREE_TYPE (from)))
4928 && bitpos == 0
4929 && bitsize == mode_bitsize)
4930 result = store_expr (from, to_rtx, false, nontemporal);
4931 else if (bitsize == mode_bitsize / 2
4932 && (bitpos == 0 || bitpos == mode_bitsize / 2))
4933 result = store_expr (from, XEXP (to_rtx, bitpos != 0), false,
4934 nontemporal);
4935 else if (bitpos + bitsize <= mode_bitsize / 2)
4936 result = store_field (XEXP (to_rtx, 0), bitsize, bitpos,
4937 bitregion_start, bitregion_end,
4938 mode1, from,
4939 get_alias_set (to), nontemporal);
4940 else if (bitpos >= mode_bitsize / 2)
4941 result = store_field (XEXP (to_rtx, 1), bitsize,
4942 bitpos - mode_bitsize / 2,
4943 bitregion_start, bitregion_end,
4944 mode1, from,
4945 get_alias_set (to), nontemporal);
4946 else if (bitpos == 0 && bitsize == mode_bitsize)
4947 {
4948 rtx from_rtx;
4949 result = expand_normal (from);
4950 from_rtx = simplify_gen_subreg (GET_MODE (to_rtx), result,
4951 TYPE_MODE (TREE_TYPE (from)), 0);
4952 emit_move_insn (XEXP (to_rtx, 0),
4953 read_complex_part (from_rtx, false));
4954 emit_move_insn (XEXP (to_rtx, 1),
4955 read_complex_part (from_rtx, true));
4956 }
4957 else
4958 {
4959 rtx temp = assign_stack_temp (GET_MODE (to_rtx),
4960 GET_MODE_SIZE (GET_MODE (to_rtx)));
4961 write_complex_part (temp, XEXP (to_rtx, 0), false);
4962 write_complex_part (temp, XEXP (to_rtx, 1), true);
4963 result = store_field (temp, bitsize, bitpos,
4964 bitregion_start, bitregion_end,
4965 mode1, from,
4966 get_alias_set (to), nontemporal);
4967 emit_move_insn (XEXP (to_rtx, 0), read_complex_part (temp, false));
4968 emit_move_insn (XEXP (to_rtx, 1), read_complex_part (temp, true));
4969 }
4970 }
4971 else
4972 {
4973 if (MEM_P (to_rtx))
4974 {
4975 /* If the field is at offset zero, we could have been given the
4976 DECL_RTX of the parent struct. Don't munge it. */
4977 to_rtx = shallow_copy_rtx (to_rtx);
4978 set_mem_attributes_minus_bitpos (to_rtx, to, 0, bitpos);
4979 if (volatilep)
4980 MEM_VOLATILE_P (to_rtx) = 1;
4981 }
4982
4983 if (optimize_bitfield_assignment_op (bitsize, bitpos,
4984 bitregion_start, bitregion_end,
4985 mode1,
4986 to_rtx, to, from))
4987 result = NULL;
4988 else
4989 result = store_field (to_rtx, bitsize, bitpos,
4990 bitregion_start, bitregion_end,
4991 mode1, from,
4992 get_alias_set (to), nontemporal);
4993 }
4994
4995 if (result)
4996 preserve_temp_slots (result);
4997 pop_temp_slots ();
4998 return;
4999 }
5000
5001 /* If the rhs is a function call and its value is not an aggregate,
5002 call the function before we start to compute the lhs.
5003 This is needed for correct code for cases such as
5004 val = setjmp (buf) on machines where reference to val
5005 requires loading up part of an address in a separate insn.
5006
5007 Don't do this if TO is a VAR_DECL or PARM_DECL whose DECL_RTL is REG
5008 since it might be a promoted variable where the zero- or sign- extension
5009 needs to be done. Handling this in the normal way is safe because no
5010 computation is done before the call. The same is true for SSA names. */
5011 if (TREE_CODE (from) == CALL_EXPR && ! aggregate_value_p (from, from)
5012 && COMPLETE_TYPE_P (TREE_TYPE (from))
5013 && TREE_CODE (TYPE_SIZE (TREE_TYPE (from))) == INTEGER_CST
5014 && ! (((TREE_CODE (to) == VAR_DECL
5015 || TREE_CODE (to) == PARM_DECL
5016 || TREE_CODE (to) == RESULT_DECL)
5017 && REG_P (DECL_RTL (to)))
5018 || TREE_CODE (to) == SSA_NAME))
5019 {
5020 rtx value;
5021 rtx bounds;
5022
5023 push_temp_slots ();
5024 value = expand_normal (from);
5025
5026 /* Split value and bounds to store them separately. */
5027 chkp_split_slot (value, &value, &bounds);
5028
5029 if (to_rtx == 0)
5030 to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
5031
5032 /* Handle calls that return values in multiple non-contiguous locations.
5033 The Irix 6 ABI has examples of this. */
5034 if (GET_CODE (to_rtx) == PARALLEL)
5035 {
5036 if (GET_CODE (value) == PARALLEL)
5037 emit_group_move (to_rtx, value);
5038 else
5039 emit_group_load (to_rtx, value, TREE_TYPE (from),
5040 int_size_in_bytes (TREE_TYPE (from)));
5041 }
5042 else if (GET_CODE (value) == PARALLEL)
5043 emit_group_store (to_rtx, value, TREE_TYPE (from),
5044 int_size_in_bytes (TREE_TYPE (from)));
5045 else if (GET_MODE (to_rtx) == BLKmode)
5046 {
5047 /* Handle calls that return BLKmode values in registers. */
5048 if (REG_P (value))
5049 copy_blkmode_from_reg (to_rtx, value, TREE_TYPE (from));
5050 else
5051 emit_block_move (to_rtx, value, expr_size (from), BLOCK_OP_NORMAL);
5052 }
5053 else
5054 {
5055 if (POINTER_TYPE_P (TREE_TYPE (to)))
5056 value = convert_memory_address_addr_space
5057 (GET_MODE (to_rtx), value,
5058 TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (to))));
5059
5060 emit_move_insn (to_rtx, value);
5061 }
5062
5063 /* Store bounds if required. */
5064 if (bounds
5065 && (BOUNDED_P (to) || chkp_type_has_pointer (TREE_TYPE (to))))
5066 {
5067 gcc_assert (MEM_P (to_rtx));
5068 chkp_emit_bounds_store (bounds, value, to_rtx);
5069 }
5070
5071 preserve_temp_slots (to_rtx);
5072 pop_temp_slots ();
5073 return;
5074 }
5075
5076 /* Ordinary treatment. Expand TO to get a REG or MEM rtx. */
5077 to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
5078
5079 /* Don't move directly into a return register. */
5080 if (TREE_CODE (to) == RESULT_DECL
5081 && (REG_P (to_rtx) || GET_CODE (to_rtx) == PARALLEL))
5082 {
5083 rtx temp;
5084
5085 push_temp_slots ();
5086
5087 /* If the source is itself a return value, it still is in a pseudo at
5088 this point so we can move it back to the return register directly. */
5089 if (REG_P (to_rtx)
5090 && TYPE_MODE (TREE_TYPE (from)) == BLKmode
5091 && TREE_CODE (from) != CALL_EXPR)
5092 temp = copy_blkmode_to_reg (GET_MODE (to_rtx), from);
5093 else
5094 temp = expand_expr (from, NULL_RTX, GET_MODE (to_rtx), EXPAND_NORMAL);
5095
5096 /* Handle calls that return values in multiple non-contiguous locations.
5097 The Irix 6 ABI has examples of this. */
5098 if (GET_CODE (to_rtx) == PARALLEL)
5099 {
5100 if (GET_CODE (temp) == PARALLEL)
5101 emit_group_move (to_rtx, temp);
5102 else
5103 emit_group_load (to_rtx, temp, TREE_TYPE (from),
5104 int_size_in_bytes (TREE_TYPE (from)));
5105 }
5106 else if (temp)
5107 emit_move_insn (to_rtx, temp);
5108
5109 preserve_temp_slots (to_rtx);
5110 pop_temp_slots ();
5111 return;
5112 }
5113
5114 /* In case we are returning the contents of an object which overlaps
5115 the place the value is being stored, use a safe function when copying
5116 a value through a pointer into a structure value return block. */
5117 if (TREE_CODE (to) == RESULT_DECL
5118 && TREE_CODE (from) == INDIRECT_REF
5119 && ADDR_SPACE_GENERIC_P
5120 (TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (from, 0)))))
5121 && refs_may_alias_p (to, from)
5122 && cfun->returns_struct
5123 && !cfun->returns_pcc_struct)
5124 {
5125 rtx from_rtx, size;
5126
5127 push_temp_slots ();
5128 size = expr_size (from);
5129 from_rtx = expand_normal (from);
5130
5131 emit_library_call (memmove_libfunc, LCT_NORMAL,
5132 VOIDmode, 3, XEXP (to_rtx, 0), Pmode,
5133 XEXP (from_rtx, 0), Pmode,
5134 convert_to_mode (TYPE_MODE (sizetype),
5135 size, TYPE_UNSIGNED (sizetype)),
5136 TYPE_MODE (sizetype));
5137
5138 preserve_temp_slots (to_rtx);
5139 pop_temp_slots ();
5140 return;
5141 }
5142
5143 /* Compute FROM and store the value in the rtx we got. */
5144
5145 push_temp_slots ();
5146 result = store_expr_with_bounds (from, to_rtx, 0, nontemporal, to);
5147 preserve_temp_slots (result);
5148 pop_temp_slots ();
5149 return;
5150 }
5151
5152 /* Emits nontemporal store insn that moves FROM to TO. Returns true if this
5153 succeeded, false otherwise. */
5154
5155 bool
5156 emit_storent_insn (rtx to, rtx from)
5157 {
5158 struct expand_operand ops[2];
5159 machine_mode mode = GET_MODE (to);
5160 enum insn_code code = optab_handler (storent_optab, mode);
5161
5162 if (code == CODE_FOR_nothing)
5163 return false;
5164
5165 create_fixed_operand (&ops[0], to);
5166 create_input_operand (&ops[1], from, mode);
5167 return maybe_expand_insn (code, 2, ops);
5168 }
5169
5170 /* Generate code for computing expression EXP,
5171 and storing the value into TARGET.
5172
5173 If the mode is BLKmode then we may return TARGET itself.
5174 It turns out that in BLKmode it doesn't cause a problem.
5175 because C has no operators that could combine two different
5176 assignments into the same BLKmode object with different values
5177 with no sequence point. Will other languages need this to
5178 be more thorough?
5179
5180 If CALL_PARAM_P is nonzero, this is a store into a call param on the
5181 stack, and block moves may need to be treated specially.
5182
5183 If NONTEMPORAL is true, try using a nontemporal store instruction.
5184
5185 If BTARGET is not NULL then computed bounds of EXP are
5186 associated with BTARGET. */
5187
5188 rtx
5189 store_expr_with_bounds (tree exp, rtx target, int call_param_p,
5190 bool nontemporal, tree btarget)
5191 {
5192 rtx temp;
5193 rtx alt_rtl = NULL_RTX;
5194 location_t loc = curr_insn_location ();
5195
5196 if (VOID_TYPE_P (TREE_TYPE (exp)))
5197 {
5198 /* C++ can generate ?: expressions with a throw expression in one
5199 branch and an rvalue in the other. Here, we resolve attempts to
5200 store the throw expression's nonexistent result. */
5201 gcc_assert (!call_param_p);
5202 expand_expr (exp, const0_rtx, VOIDmode, EXPAND_NORMAL);
5203 return NULL_RTX;
5204 }
5205 if (TREE_CODE (exp) == COMPOUND_EXPR)
5206 {
5207 /* Perform first part of compound expression, then assign from second
5208 part. */
5209 expand_expr (TREE_OPERAND (exp, 0), const0_rtx, VOIDmode,
5210 call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL);
5211 return store_expr_with_bounds (TREE_OPERAND (exp, 1), target,
5212 call_param_p, nontemporal, btarget);
5213 }
5214 else if (TREE_CODE (exp) == COND_EXPR && GET_MODE (target) == BLKmode)
5215 {
5216 /* For conditional expression, get safe form of the target. Then
5217 test the condition, doing the appropriate assignment on either
5218 side. This avoids the creation of unnecessary temporaries.
5219 For non-BLKmode, it is more efficient not to do this. */
5220
5221 rtx_code_label *lab1 = gen_label_rtx (), *lab2 = gen_label_rtx ();
5222
5223 do_pending_stack_adjust ();
5224 NO_DEFER_POP;
5225 jumpifnot (TREE_OPERAND (exp, 0), lab1, -1);
5226 store_expr_with_bounds (TREE_OPERAND (exp, 1), target, call_param_p,
5227 nontemporal, btarget);
5228 emit_jump_insn (gen_jump (lab2));
5229 emit_barrier ();
5230 emit_label (lab1);
5231 store_expr_with_bounds (TREE_OPERAND (exp, 2), target, call_param_p,
5232 nontemporal, btarget);
5233 emit_label (lab2);
5234 OK_DEFER_POP;
5235
5236 return NULL_RTX;
5237 }
5238 else if (GET_CODE (target) == SUBREG && SUBREG_PROMOTED_VAR_P (target))
5239 /* If this is a scalar in a register that is stored in a wider mode
5240 than the declared mode, compute the result into its declared mode
5241 and then convert to the wider mode. Our value is the computed
5242 expression. */
5243 {
5244 rtx inner_target = 0;
5245
5246 /* We can do the conversion inside EXP, which will often result
5247 in some optimizations. Do the conversion in two steps: first
5248 change the signedness, if needed, then the extend. But don't
5249 do this if the type of EXP is a subtype of something else
5250 since then the conversion might involve more than just
5251 converting modes. */
5252 if (INTEGRAL_TYPE_P (TREE_TYPE (exp))
5253 && TREE_TYPE (TREE_TYPE (exp)) == 0
5254 && GET_MODE_PRECISION (GET_MODE (target))
5255 == TYPE_PRECISION (TREE_TYPE (exp)))
5256 {
5257 if (!SUBREG_CHECK_PROMOTED_SIGN (target,
5258 TYPE_UNSIGNED (TREE_TYPE (exp))))
5259 {
5260 /* Some types, e.g. Fortran's logical*4, won't have a signed
5261 version, so use the mode instead. */
5262 tree ntype
5263 = (signed_or_unsigned_type_for
5264 (SUBREG_PROMOTED_SIGN (target), TREE_TYPE (exp)));
5265 if (ntype == NULL)
5266 ntype = lang_hooks.types.type_for_mode
5267 (TYPE_MODE (TREE_TYPE (exp)),
5268 SUBREG_PROMOTED_SIGN (target));
5269
5270 exp = fold_convert_loc (loc, ntype, exp);
5271 }
5272
5273 exp = fold_convert_loc (loc, lang_hooks.types.type_for_mode
5274 (GET_MODE (SUBREG_REG (target)),
5275 SUBREG_PROMOTED_SIGN (target)),
5276 exp);
5277
5278 inner_target = SUBREG_REG (target);
5279 }
5280
5281 temp = expand_expr (exp, inner_target, VOIDmode,
5282 call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL);
5283
5284 /* Handle bounds returned by call. */
5285 if (TREE_CODE (exp) == CALL_EXPR)
5286 {
5287 rtx bounds;
5288 chkp_split_slot (temp, &temp, &bounds);
5289 if (bounds && btarget)
5290 {
5291 gcc_assert (TREE_CODE (btarget) == SSA_NAME);
5292 rtx tmp = targetm.calls.load_returned_bounds (bounds);
5293 chkp_set_rtl_bounds (btarget, tmp);
5294 }
5295 }
5296
5297 /* If TEMP is a VOIDmode constant, use convert_modes to make
5298 sure that we properly convert it. */
5299 if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode)
5300 {
5301 temp = convert_modes (GET_MODE (target), TYPE_MODE (TREE_TYPE (exp)),
5302 temp, SUBREG_PROMOTED_SIGN (target));
5303 temp = convert_modes (GET_MODE (SUBREG_REG (target)),
5304 GET_MODE (target), temp,
5305 SUBREG_PROMOTED_SIGN (target));
5306 }
5307
5308 convert_move (SUBREG_REG (target), temp,
5309 SUBREG_PROMOTED_SIGN (target));
5310
5311 return NULL_RTX;
5312 }
5313 else if ((TREE_CODE (exp) == STRING_CST
5314 || (TREE_CODE (exp) == MEM_REF
5315 && TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR
5316 && TREE_CODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0))
5317 == STRING_CST
5318 && integer_zerop (TREE_OPERAND (exp, 1))))
5319 && !nontemporal && !call_param_p
5320 && MEM_P (target))
5321 {
5322 /* Optimize initialization of an array with a STRING_CST. */
5323 HOST_WIDE_INT exp_len, str_copy_len;
5324 rtx dest_mem;
5325 tree str = TREE_CODE (exp) == STRING_CST
5326 ? exp : TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
5327
5328 exp_len = int_expr_size (exp);
5329 if (exp_len <= 0)
5330 goto normal_expr;
5331
5332 if (TREE_STRING_LENGTH (str) <= 0)
5333 goto normal_expr;
5334
5335 str_copy_len = strlen (TREE_STRING_POINTER (str));
5336 if (str_copy_len < TREE_STRING_LENGTH (str) - 1)
5337 goto normal_expr;
5338
5339 str_copy_len = TREE_STRING_LENGTH (str);
5340 if ((STORE_MAX_PIECES & (STORE_MAX_PIECES - 1)) == 0
5341 && TREE_STRING_POINTER (str)[TREE_STRING_LENGTH (str) - 1] == '\0')
5342 {
5343 str_copy_len += STORE_MAX_PIECES - 1;
5344 str_copy_len &= ~(STORE_MAX_PIECES - 1);
5345 }
5346 str_copy_len = MIN (str_copy_len, exp_len);
5347 if (!can_store_by_pieces (str_copy_len, builtin_strncpy_read_str,
5348 CONST_CAST (char *, TREE_STRING_POINTER (str)),
5349 MEM_ALIGN (target), false))
5350 goto normal_expr;
5351
5352 dest_mem = target;
5353
5354 dest_mem = store_by_pieces (dest_mem,
5355 str_copy_len, builtin_strncpy_read_str,
5356 CONST_CAST (char *,
5357 TREE_STRING_POINTER (str)),
5358 MEM_ALIGN (target), false,
5359 exp_len > str_copy_len ? 1 : 0);
5360 if (exp_len > str_copy_len)
5361 clear_storage (adjust_address (dest_mem, BLKmode, 0),
5362 GEN_INT (exp_len - str_copy_len),
5363 BLOCK_OP_NORMAL);
5364 return NULL_RTX;
5365 }
5366 else
5367 {
5368 rtx tmp_target;
5369
5370 normal_expr:
5371 /* If we want to use a nontemporal store, force the value to
5372 register first. */
5373 tmp_target = nontemporal ? NULL_RTX : target;
5374 temp = expand_expr_real (exp, tmp_target, GET_MODE (target),
5375 (call_param_p
5376 ? EXPAND_STACK_PARM : EXPAND_NORMAL),
5377 &alt_rtl, false);
5378
5379 /* Handle bounds returned by call. */
5380 if (TREE_CODE (exp) == CALL_EXPR)
5381 {
5382 rtx bounds;
5383 chkp_split_slot (temp, &temp, &bounds);
5384 if (bounds && btarget)
5385 {
5386 gcc_assert (TREE_CODE (btarget) == SSA_NAME);
5387 rtx tmp = targetm.calls.load_returned_bounds (bounds);
5388 chkp_set_rtl_bounds (btarget, tmp);
5389 }
5390 }
5391 }
5392
5393 /* If TEMP is a VOIDmode constant and the mode of the type of EXP is not
5394 the same as that of TARGET, adjust the constant. This is needed, for
5395 example, in case it is a CONST_DOUBLE or CONST_WIDE_INT and we want
5396 only a word-sized value. */
5397 if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode
5398 && TREE_CODE (exp) != ERROR_MARK
5399 && GET_MODE (target) != TYPE_MODE (TREE_TYPE (exp)))
5400 temp = convert_modes (GET_MODE (target), TYPE_MODE (TREE_TYPE (exp)),
5401 temp, TYPE_UNSIGNED (TREE_TYPE (exp)));
5402
5403 /* If value was not generated in the target, store it there.
5404 Convert the value to TARGET's type first if necessary and emit the
5405 pending incrementations that have been queued when expanding EXP.
5406 Note that we cannot emit the whole queue blindly because this will
5407 effectively disable the POST_INC optimization later.
5408
5409 If TEMP and TARGET compare equal according to rtx_equal_p, but
5410 one or both of them are volatile memory refs, we have to distinguish
5411 two cases:
5412 - expand_expr has used TARGET. In this case, we must not generate
5413 another copy. This can be detected by TARGET being equal according
5414 to == .
5415 - expand_expr has not used TARGET - that means that the source just
5416 happens to have the same RTX form. Since temp will have been created
5417 by expand_expr, it will compare unequal according to == .
5418 We must generate a copy in this case, to reach the correct number
5419 of volatile memory references. */
5420
5421 if ((! rtx_equal_p (temp, target)
5422 || (temp != target && (side_effects_p (temp)
5423 || side_effects_p (target))))
5424 && TREE_CODE (exp) != ERROR_MARK
5425 /* If store_expr stores a DECL whose DECL_RTL(exp) == TARGET,
5426 but TARGET is not valid memory reference, TEMP will differ
5427 from TARGET although it is really the same location. */
5428 && !(alt_rtl
5429 && rtx_equal_p (alt_rtl, target)
5430 && !side_effects_p (alt_rtl)
5431 && !side_effects_p (target))
5432 /* If there's nothing to copy, don't bother. Don't call
5433 expr_size unless necessary, because some front-ends (C++)
5434 expr_size-hook must not be given objects that are not
5435 supposed to be bit-copied or bit-initialized. */
5436 && expr_size (exp) != const0_rtx)
5437 {
5438 if (GET_MODE (temp) != GET_MODE (target) && GET_MODE (temp) != VOIDmode)
5439 {
5440 if (GET_MODE (target) == BLKmode)
5441 {
5442 /* Handle calls that return BLKmode values in registers. */
5443 if (REG_P (temp) && TREE_CODE (exp) == CALL_EXPR)
5444 copy_blkmode_from_reg (target, temp, TREE_TYPE (exp));
5445 else
5446 store_bit_field (target,
5447 INTVAL (expr_size (exp)) * BITS_PER_UNIT,
5448 0, 0, 0, GET_MODE (temp), temp);
5449 }
5450 else
5451 convert_move (target, temp, TYPE_UNSIGNED (TREE_TYPE (exp)));
5452 }
5453
5454 else if (GET_MODE (temp) == BLKmode && TREE_CODE (exp) == STRING_CST)
5455 {
5456 /* Handle copying a string constant into an array. The string
5457 constant may be shorter than the array. So copy just the string's
5458 actual length, and clear the rest. First get the size of the data
5459 type of the string, which is actually the size of the target. */
5460 rtx size = expr_size (exp);
5461
5462 if (CONST_INT_P (size)
5463 && INTVAL (size) < TREE_STRING_LENGTH (exp))
5464 emit_block_move (target, temp, size,
5465 (call_param_p
5466 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5467 else
5468 {
5469 machine_mode pointer_mode
5470 = targetm.addr_space.pointer_mode (MEM_ADDR_SPACE (target));
5471 machine_mode address_mode = get_address_mode (target);
5472
5473 /* Compute the size of the data to copy from the string. */
5474 tree copy_size
5475 = size_binop_loc (loc, MIN_EXPR,
5476 make_tree (sizetype, size),
5477 size_int (TREE_STRING_LENGTH (exp)));
5478 rtx copy_size_rtx
5479 = expand_expr (copy_size, NULL_RTX, VOIDmode,
5480 (call_param_p
5481 ? EXPAND_STACK_PARM : EXPAND_NORMAL));
5482 rtx_code_label *label = 0;
5483
5484 /* Copy that much. */
5485 copy_size_rtx = convert_to_mode (pointer_mode, copy_size_rtx,
5486 TYPE_UNSIGNED (sizetype));
5487 emit_block_move (target, temp, copy_size_rtx,
5488 (call_param_p
5489 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5490
5491 /* Figure out how much is left in TARGET that we have to clear.
5492 Do all calculations in pointer_mode. */
5493 if (CONST_INT_P (copy_size_rtx))
5494 {
5495 size = plus_constant (address_mode, size,
5496 -INTVAL (copy_size_rtx));
5497 target = adjust_address (target, BLKmode,
5498 INTVAL (copy_size_rtx));
5499 }
5500 else
5501 {
5502 size = expand_binop (TYPE_MODE (sizetype), sub_optab, size,
5503 copy_size_rtx, NULL_RTX, 0,
5504 OPTAB_LIB_WIDEN);
5505
5506 if (GET_MODE (copy_size_rtx) != address_mode)
5507 copy_size_rtx = convert_to_mode (address_mode,
5508 copy_size_rtx,
5509 TYPE_UNSIGNED (sizetype));
5510
5511 target = offset_address (target, copy_size_rtx,
5512 highest_pow2_factor (copy_size));
5513 label = gen_label_rtx ();
5514 emit_cmp_and_jump_insns (size, const0_rtx, LT, NULL_RTX,
5515 GET_MODE (size), 0, label);
5516 }
5517
5518 if (size != const0_rtx)
5519 clear_storage (target, size, BLOCK_OP_NORMAL);
5520
5521 if (label)
5522 emit_label (label);
5523 }
5524 }
5525 /* Handle calls that return values in multiple non-contiguous locations.
5526 The Irix 6 ABI has examples of this. */
5527 else if (GET_CODE (target) == PARALLEL)
5528 {
5529 if (GET_CODE (temp) == PARALLEL)
5530 emit_group_move (target, temp);
5531 else
5532 emit_group_load (target, temp, TREE_TYPE (exp),
5533 int_size_in_bytes (TREE_TYPE (exp)));
5534 }
5535 else if (GET_CODE (temp) == PARALLEL)
5536 emit_group_store (target, temp, TREE_TYPE (exp),
5537 int_size_in_bytes (TREE_TYPE (exp)));
5538 else if (GET_MODE (temp) == BLKmode)
5539 emit_block_move (target, temp, expr_size (exp),
5540 (call_param_p
5541 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5542 /* If we emit a nontemporal store, there is nothing else to do. */
5543 else if (nontemporal && emit_storent_insn (target, temp))
5544 ;
5545 else
5546 {
5547 temp = force_operand (temp, target);
5548 if (temp != target)
5549 emit_move_insn (target, temp);
5550 }
5551 }
5552
5553 return NULL_RTX;
5554 }
5555
5556 /* Same as store_expr_with_bounds but ignoring bounds of EXP. */
5557 rtx
5558 store_expr (tree exp, rtx target, int call_param_p, bool nontemporal)
5559 {
5560 return store_expr_with_bounds (exp, target, call_param_p, nontemporal, NULL);
5561 }
5562 \f
5563 /* Return true if field F of structure TYPE is a flexible array. */
5564
5565 static bool
5566 flexible_array_member_p (const_tree f, const_tree type)
5567 {
5568 const_tree tf;
5569
5570 tf = TREE_TYPE (f);
5571 return (DECL_CHAIN (f) == NULL
5572 && TREE_CODE (tf) == ARRAY_TYPE
5573 && TYPE_DOMAIN (tf)
5574 && TYPE_MIN_VALUE (TYPE_DOMAIN (tf))
5575 && integer_zerop (TYPE_MIN_VALUE (TYPE_DOMAIN (tf)))
5576 && !TYPE_MAX_VALUE (TYPE_DOMAIN (tf))
5577 && int_size_in_bytes (type) >= 0);
5578 }
5579
5580 /* If FOR_CTOR_P, return the number of top-level elements that a constructor
5581 must have in order for it to completely initialize a value of type TYPE.
5582 Return -1 if the number isn't known.
5583
5584 If !FOR_CTOR_P, return an estimate of the number of scalars in TYPE. */
5585
5586 static HOST_WIDE_INT
5587 count_type_elements (const_tree type, bool for_ctor_p)
5588 {
5589 switch (TREE_CODE (type))
5590 {
5591 case ARRAY_TYPE:
5592 {
5593 tree nelts;
5594
5595 nelts = array_type_nelts (type);
5596 if (nelts && tree_fits_uhwi_p (nelts))
5597 {
5598 unsigned HOST_WIDE_INT n;
5599
5600 n = tree_to_uhwi (nelts) + 1;
5601 if (n == 0 || for_ctor_p)
5602 return n;
5603 else
5604 return n * count_type_elements (TREE_TYPE (type), false);
5605 }
5606 return for_ctor_p ? -1 : 1;
5607 }
5608
5609 case RECORD_TYPE:
5610 {
5611 unsigned HOST_WIDE_INT n;
5612 tree f;
5613
5614 n = 0;
5615 for (f = TYPE_FIELDS (type); f ; f = DECL_CHAIN (f))
5616 if (TREE_CODE (f) == FIELD_DECL)
5617 {
5618 if (!for_ctor_p)
5619 n += count_type_elements (TREE_TYPE (f), false);
5620 else if (!flexible_array_member_p (f, type))
5621 /* Don't count flexible arrays, which are not supposed
5622 to be initialized. */
5623 n += 1;
5624 }
5625
5626 return n;
5627 }
5628
5629 case UNION_TYPE:
5630 case QUAL_UNION_TYPE:
5631 {
5632 tree f;
5633 HOST_WIDE_INT n, m;
5634
5635 gcc_assert (!for_ctor_p);
5636 /* Estimate the number of scalars in each field and pick the
5637 maximum. Other estimates would do instead; the idea is simply
5638 to make sure that the estimate is not sensitive to the ordering
5639 of the fields. */
5640 n = 1;
5641 for (f = TYPE_FIELDS (type); f ; f = DECL_CHAIN (f))
5642 if (TREE_CODE (f) == FIELD_DECL)
5643 {
5644 m = count_type_elements (TREE_TYPE (f), false);
5645 /* If the field doesn't span the whole union, add an extra
5646 scalar for the rest. */
5647 if (simple_cst_equal (TYPE_SIZE (TREE_TYPE (f)),
5648 TYPE_SIZE (type)) != 1)
5649 m++;
5650 if (n < m)
5651 n = m;
5652 }
5653 return n;
5654 }
5655
5656 case COMPLEX_TYPE:
5657 return 2;
5658
5659 case VECTOR_TYPE:
5660 return TYPE_VECTOR_SUBPARTS (type);
5661
5662 case INTEGER_TYPE:
5663 case REAL_TYPE:
5664 case FIXED_POINT_TYPE:
5665 case ENUMERAL_TYPE:
5666 case BOOLEAN_TYPE:
5667 case POINTER_TYPE:
5668 case OFFSET_TYPE:
5669 case REFERENCE_TYPE:
5670 case NULLPTR_TYPE:
5671 return 1;
5672
5673 case ERROR_MARK:
5674 return 0;
5675
5676 case VOID_TYPE:
5677 case METHOD_TYPE:
5678 case FUNCTION_TYPE:
5679 case LANG_TYPE:
5680 default:
5681 gcc_unreachable ();
5682 }
5683 }
5684
5685 /* Helper for categorize_ctor_elements. Identical interface. */
5686
5687 static bool
5688 categorize_ctor_elements_1 (const_tree ctor, HOST_WIDE_INT *p_nz_elts,
5689 HOST_WIDE_INT *p_init_elts, bool *p_complete)
5690 {
5691 unsigned HOST_WIDE_INT idx;
5692 HOST_WIDE_INT nz_elts, init_elts, num_fields;
5693 tree value, purpose, elt_type;
5694
5695 /* Whether CTOR is a valid constant initializer, in accordance with what
5696 initializer_constant_valid_p does. If inferred from the constructor
5697 elements, true until proven otherwise. */
5698 bool const_from_elts_p = constructor_static_from_elts_p (ctor);
5699 bool const_p = const_from_elts_p ? true : TREE_STATIC (ctor);
5700
5701 nz_elts = 0;
5702 init_elts = 0;
5703 num_fields = 0;
5704 elt_type = NULL_TREE;
5705
5706 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (ctor), idx, purpose, value)
5707 {
5708 HOST_WIDE_INT mult = 1;
5709
5710 if (purpose && TREE_CODE (purpose) == RANGE_EXPR)
5711 {
5712 tree lo_index = TREE_OPERAND (purpose, 0);
5713 tree hi_index = TREE_OPERAND (purpose, 1);
5714
5715 if (tree_fits_uhwi_p (lo_index) && tree_fits_uhwi_p (hi_index))
5716 mult = (tree_to_uhwi (hi_index)
5717 - tree_to_uhwi (lo_index) + 1);
5718 }
5719 num_fields += mult;
5720 elt_type = TREE_TYPE (value);
5721
5722 switch (TREE_CODE (value))
5723 {
5724 case CONSTRUCTOR:
5725 {
5726 HOST_WIDE_INT nz = 0, ic = 0;
5727
5728 bool const_elt_p = categorize_ctor_elements_1 (value, &nz, &ic,
5729 p_complete);
5730
5731 nz_elts += mult * nz;
5732 init_elts += mult * ic;
5733
5734 if (const_from_elts_p && const_p)
5735 const_p = const_elt_p;
5736 }
5737 break;
5738
5739 case INTEGER_CST:
5740 case REAL_CST:
5741 case FIXED_CST:
5742 if (!initializer_zerop (value))
5743 nz_elts += mult;
5744 init_elts += mult;
5745 break;
5746
5747 case STRING_CST:
5748 nz_elts += mult * TREE_STRING_LENGTH (value);
5749 init_elts += mult * TREE_STRING_LENGTH (value);
5750 break;
5751
5752 case COMPLEX_CST:
5753 if (!initializer_zerop (TREE_REALPART (value)))
5754 nz_elts += mult;
5755 if (!initializer_zerop (TREE_IMAGPART (value)))
5756 nz_elts += mult;
5757 init_elts += mult;
5758 break;
5759
5760 case VECTOR_CST:
5761 {
5762 unsigned i;
5763 for (i = 0; i < VECTOR_CST_NELTS (value); ++i)
5764 {
5765 tree v = VECTOR_CST_ELT (value, i);
5766 if (!initializer_zerop (v))
5767 nz_elts += mult;
5768 init_elts += mult;
5769 }
5770 }
5771 break;
5772
5773 default:
5774 {
5775 HOST_WIDE_INT tc = count_type_elements (elt_type, false);
5776 nz_elts += mult * tc;
5777 init_elts += mult * tc;
5778
5779 if (const_from_elts_p && const_p)
5780 const_p = initializer_constant_valid_p (value, elt_type)
5781 != NULL_TREE;
5782 }
5783 break;
5784 }
5785 }
5786
5787 if (*p_complete && !complete_ctor_at_level_p (TREE_TYPE (ctor),
5788 num_fields, elt_type))
5789 *p_complete = false;
5790
5791 *p_nz_elts += nz_elts;
5792 *p_init_elts += init_elts;
5793
5794 return const_p;
5795 }
5796
5797 /* Examine CTOR to discover:
5798 * how many scalar fields are set to nonzero values,
5799 and place it in *P_NZ_ELTS;
5800 * how many scalar fields in total are in CTOR,
5801 and place it in *P_ELT_COUNT.
5802 * whether the constructor is complete -- in the sense that every
5803 meaningful byte is explicitly given a value --
5804 and place it in *P_COMPLETE.
5805
5806 Return whether or not CTOR is a valid static constant initializer, the same
5807 as "initializer_constant_valid_p (CTOR, TREE_TYPE (CTOR)) != 0". */
5808
5809 bool
5810 categorize_ctor_elements (const_tree ctor, HOST_WIDE_INT *p_nz_elts,
5811 HOST_WIDE_INT *p_init_elts, bool *p_complete)
5812 {
5813 *p_nz_elts = 0;
5814 *p_init_elts = 0;
5815 *p_complete = true;
5816
5817 return categorize_ctor_elements_1 (ctor, p_nz_elts, p_init_elts, p_complete);
5818 }
5819
5820 /* TYPE is initialized by a constructor with NUM_ELTS elements, the last
5821 of which had type LAST_TYPE. Each element was itself a complete
5822 initializer, in the sense that every meaningful byte was explicitly
5823 given a value. Return true if the same is true for the constructor
5824 as a whole. */
5825
5826 bool
5827 complete_ctor_at_level_p (const_tree type, HOST_WIDE_INT num_elts,
5828 const_tree last_type)
5829 {
5830 if (TREE_CODE (type) == UNION_TYPE
5831 || TREE_CODE (type) == QUAL_UNION_TYPE)
5832 {
5833 if (num_elts == 0)
5834 return false;
5835
5836 gcc_assert (num_elts == 1 && last_type);
5837
5838 /* ??? We could look at each element of the union, and find the
5839 largest element. Which would avoid comparing the size of the
5840 initialized element against any tail padding in the union.
5841 Doesn't seem worth the effort... */
5842 return simple_cst_equal (TYPE_SIZE (type), TYPE_SIZE (last_type)) == 1;
5843 }
5844
5845 return count_type_elements (type, true) == num_elts;
5846 }
5847
5848 /* Return 1 if EXP contains mostly (3/4) zeros. */
5849
5850 static int
5851 mostly_zeros_p (const_tree exp)
5852 {
5853 if (TREE_CODE (exp) == CONSTRUCTOR)
5854 {
5855 HOST_WIDE_INT nz_elts, init_elts;
5856 bool complete_p;
5857
5858 categorize_ctor_elements (exp, &nz_elts, &init_elts, &complete_p);
5859 return !complete_p || nz_elts < init_elts / 4;
5860 }
5861
5862 return initializer_zerop (exp);
5863 }
5864
5865 /* Return 1 if EXP contains all zeros. */
5866
5867 static int
5868 all_zeros_p (const_tree exp)
5869 {
5870 if (TREE_CODE (exp) == CONSTRUCTOR)
5871 {
5872 HOST_WIDE_INT nz_elts, init_elts;
5873 bool complete_p;
5874
5875 categorize_ctor_elements (exp, &nz_elts, &init_elts, &complete_p);
5876 return nz_elts == 0;
5877 }
5878
5879 return initializer_zerop (exp);
5880 }
5881 \f
5882 /* Helper function for store_constructor.
5883 TARGET, BITSIZE, BITPOS, MODE, EXP are as for store_field.
5884 CLEARED is as for store_constructor.
5885 ALIAS_SET is the alias set to use for any stores.
5886
5887 This provides a recursive shortcut back to store_constructor when it isn't
5888 necessary to go through store_field. This is so that we can pass through
5889 the cleared field to let store_constructor know that we may not have to
5890 clear a substructure if the outer structure has already been cleared. */
5891
5892 static void
5893 store_constructor_field (rtx target, unsigned HOST_WIDE_INT bitsize,
5894 HOST_WIDE_INT bitpos, machine_mode mode,
5895 tree exp, int cleared, alias_set_type alias_set)
5896 {
5897 if (TREE_CODE (exp) == CONSTRUCTOR
5898 /* We can only call store_constructor recursively if the size and
5899 bit position are on a byte boundary. */
5900 && bitpos % BITS_PER_UNIT == 0
5901 && (bitsize > 0 && bitsize % BITS_PER_UNIT == 0)
5902 /* If we have a nonzero bitpos for a register target, then we just
5903 let store_field do the bitfield handling. This is unlikely to
5904 generate unnecessary clear instructions anyways. */
5905 && (bitpos == 0 || MEM_P (target)))
5906 {
5907 if (MEM_P (target))
5908 target
5909 = adjust_address (target,
5910 GET_MODE (target) == BLKmode
5911 || 0 != (bitpos
5912 % GET_MODE_ALIGNMENT (GET_MODE (target)))
5913 ? BLKmode : VOIDmode, bitpos / BITS_PER_UNIT);
5914
5915
5916 /* Update the alias set, if required. */
5917 if (MEM_P (target) && ! MEM_KEEP_ALIAS_SET_P (target)
5918 && MEM_ALIAS_SET (target) != 0)
5919 {
5920 target = copy_rtx (target);
5921 set_mem_alias_set (target, alias_set);
5922 }
5923
5924 store_constructor (exp, target, cleared, bitsize / BITS_PER_UNIT);
5925 }
5926 else
5927 store_field (target, bitsize, bitpos, 0, 0, mode, exp, alias_set, false);
5928 }
5929
5930
5931 /* Returns the number of FIELD_DECLs in TYPE. */
5932
5933 static int
5934 fields_length (const_tree type)
5935 {
5936 tree t = TYPE_FIELDS (type);
5937 int count = 0;
5938
5939 for (; t; t = DECL_CHAIN (t))
5940 if (TREE_CODE (t) == FIELD_DECL)
5941 ++count;
5942
5943 return count;
5944 }
5945
5946
5947 /* Store the value of constructor EXP into the rtx TARGET.
5948 TARGET is either a REG or a MEM; we know it cannot conflict, since
5949 safe_from_p has been called.
5950 CLEARED is true if TARGET is known to have been zero'd.
5951 SIZE is the number of bytes of TARGET we are allowed to modify: this
5952 may not be the same as the size of EXP if we are assigning to a field
5953 which has been packed to exclude padding bits. */
5954
5955 static void
5956 store_constructor (tree exp, rtx target, int cleared, HOST_WIDE_INT size)
5957 {
5958 tree type = TREE_TYPE (exp);
5959 #ifdef WORD_REGISTER_OPERATIONS
5960 HOST_WIDE_INT exp_size = int_size_in_bytes (type);
5961 #endif
5962
5963 switch (TREE_CODE (type))
5964 {
5965 case RECORD_TYPE:
5966 case UNION_TYPE:
5967 case QUAL_UNION_TYPE:
5968 {
5969 unsigned HOST_WIDE_INT idx;
5970 tree field, value;
5971
5972 /* If size is zero or the target is already cleared, do nothing. */
5973 if (size == 0 || cleared)
5974 cleared = 1;
5975 /* We either clear the aggregate or indicate the value is dead. */
5976 else if ((TREE_CODE (type) == UNION_TYPE
5977 || TREE_CODE (type) == QUAL_UNION_TYPE)
5978 && ! CONSTRUCTOR_ELTS (exp))
5979 /* If the constructor is empty, clear the union. */
5980 {
5981 clear_storage (target, expr_size (exp), BLOCK_OP_NORMAL);
5982 cleared = 1;
5983 }
5984
5985 /* If we are building a static constructor into a register,
5986 set the initial value as zero so we can fold the value into
5987 a constant. But if more than one register is involved,
5988 this probably loses. */
5989 else if (REG_P (target) && TREE_STATIC (exp)
5990 && GET_MODE_SIZE (GET_MODE (target)) <= UNITS_PER_WORD)
5991 {
5992 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
5993 cleared = 1;
5994 }
5995
5996 /* If the constructor has fewer fields than the structure or
5997 if we are initializing the structure to mostly zeros, clear
5998 the whole structure first. Don't do this if TARGET is a
5999 register whose mode size isn't equal to SIZE since
6000 clear_storage can't handle this case. */
6001 else if (size > 0
6002 && (((int)vec_safe_length (CONSTRUCTOR_ELTS (exp))
6003 != fields_length (type))
6004 || mostly_zeros_p (exp))
6005 && (!REG_P (target)
6006 || ((HOST_WIDE_INT) GET_MODE_SIZE (GET_MODE (target))
6007 == size)))
6008 {
6009 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
6010 cleared = 1;
6011 }
6012
6013 if (REG_P (target) && !cleared)
6014 emit_clobber (target);
6015
6016 /* Store each element of the constructor into the
6017 corresponding field of TARGET. */
6018 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), idx, field, value)
6019 {
6020 machine_mode mode;
6021 HOST_WIDE_INT bitsize;
6022 HOST_WIDE_INT bitpos = 0;
6023 tree offset;
6024 rtx to_rtx = target;
6025
6026 /* Just ignore missing fields. We cleared the whole
6027 structure, above, if any fields are missing. */
6028 if (field == 0)
6029 continue;
6030
6031 if (cleared && initializer_zerop (value))
6032 continue;
6033
6034 if (tree_fits_uhwi_p (DECL_SIZE (field)))
6035 bitsize = tree_to_uhwi (DECL_SIZE (field));
6036 else
6037 bitsize = -1;
6038
6039 mode = DECL_MODE (field);
6040 if (DECL_BIT_FIELD (field))
6041 mode = VOIDmode;
6042
6043 offset = DECL_FIELD_OFFSET (field);
6044 if (tree_fits_shwi_p (offset)
6045 && tree_fits_shwi_p (bit_position (field)))
6046 {
6047 bitpos = int_bit_position (field);
6048 offset = 0;
6049 }
6050 else
6051 bitpos = tree_to_shwi (DECL_FIELD_BIT_OFFSET (field));
6052
6053 if (offset)
6054 {
6055 machine_mode address_mode;
6056 rtx offset_rtx;
6057
6058 offset
6059 = SUBSTITUTE_PLACEHOLDER_IN_EXPR (offset,
6060 make_tree (TREE_TYPE (exp),
6061 target));
6062
6063 offset_rtx = expand_normal (offset);
6064 gcc_assert (MEM_P (to_rtx));
6065
6066 address_mode = get_address_mode (to_rtx);
6067 if (GET_MODE (offset_rtx) != address_mode)
6068 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
6069
6070 to_rtx = offset_address (to_rtx, offset_rtx,
6071 highest_pow2_factor (offset));
6072 }
6073
6074 #ifdef WORD_REGISTER_OPERATIONS
6075 /* If this initializes a field that is smaller than a
6076 word, at the start of a word, try to widen it to a full
6077 word. This special case allows us to output C++ member
6078 function initializations in a form that the optimizers
6079 can understand. */
6080 if (REG_P (target)
6081 && bitsize < BITS_PER_WORD
6082 && bitpos % BITS_PER_WORD == 0
6083 && GET_MODE_CLASS (mode) == MODE_INT
6084 && TREE_CODE (value) == INTEGER_CST
6085 && exp_size >= 0
6086 && bitpos + BITS_PER_WORD <= exp_size * BITS_PER_UNIT)
6087 {
6088 tree type = TREE_TYPE (value);
6089
6090 if (TYPE_PRECISION (type) < BITS_PER_WORD)
6091 {
6092 type = lang_hooks.types.type_for_mode
6093 (word_mode, TYPE_UNSIGNED (type));
6094 value = fold_convert (type, value);
6095 }
6096
6097 if (BYTES_BIG_ENDIAN)
6098 value
6099 = fold_build2 (LSHIFT_EXPR, type, value,
6100 build_int_cst (type,
6101 BITS_PER_WORD - bitsize));
6102 bitsize = BITS_PER_WORD;
6103 mode = word_mode;
6104 }
6105 #endif
6106
6107 if (MEM_P (to_rtx) && !MEM_KEEP_ALIAS_SET_P (to_rtx)
6108 && DECL_NONADDRESSABLE_P (field))
6109 {
6110 to_rtx = copy_rtx (to_rtx);
6111 MEM_KEEP_ALIAS_SET_P (to_rtx) = 1;
6112 }
6113
6114 store_constructor_field (to_rtx, bitsize, bitpos, mode,
6115 value, cleared,
6116 get_alias_set (TREE_TYPE (field)));
6117 }
6118 break;
6119 }
6120 case ARRAY_TYPE:
6121 {
6122 tree value, index;
6123 unsigned HOST_WIDE_INT i;
6124 int need_to_clear;
6125 tree domain;
6126 tree elttype = TREE_TYPE (type);
6127 int const_bounds_p;
6128 HOST_WIDE_INT minelt = 0;
6129 HOST_WIDE_INT maxelt = 0;
6130
6131 domain = TYPE_DOMAIN (type);
6132 const_bounds_p = (TYPE_MIN_VALUE (domain)
6133 && TYPE_MAX_VALUE (domain)
6134 && tree_fits_shwi_p (TYPE_MIN_VALUE (domain))
6135 && tree_fits_shwi_p (TYPE_MAX_VALUE (domain)));
6136
6137 /* If we have constant bounds for the range of the type, get them. */
6138 if (const_bounds_p)
6139 {
6140 minelt = tree_to_shwi (TYPE_MIN_VALUE (domain));
6141 maxelt = tree_to_shwi (TYPE_MAX_VALUE (domain));
6142 }
6143
6144 /* If the constructor has fewer elements than the array, clear
6145 the whole array first. Similarly if this is static
6146 constructor of a non-BLKmode object. */
6147 if (cleared)
6148 need_to_clear = 0;
6149 else if (REG_P (target) && TREE_STATIC (exp))
6150 need_to_clear = 1;
6151 else
6152 {
6153 unsigned HOST_WIDE_INT idx;
6154 tree index, value;
6155 HOST_WIDE_INT count = 0, zero_count = 0;
6156 need_to_clear = ! const_bounds_p;
6157
6158 /* This loop is a more accurate version of the loop in
6159 mostly_zeros_p (it handles RANGE_EXPR in an index). It
6160 is also needed to check for missing elements. */
6161 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), idx, index, value)
6162 {
6163 HOST_WIDE_INT this_node_count;
6164
6165 if (need_to_clear)
6166 break;
6167
6168 if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR)
6169 {
6170 tree lo_index = TREE_OPERAND (index, 0);
6171 tree hi_index = TREE_OPERAND (index, 1);
6172
6173 if (! tree_fits_uhwi_p (lo_index)
6174 || ! tree_fits_uhwi_p (hi_index))
6175 {
6176 need_to_clear = 1;
6177 break;
6178 }
6179
6180 this_node_count = (tree_to_uhwi (hi_index)
6181 - tree_to_uhwi (lo_index) + 1);
6182 }
6183 else
6184 this_node_count = 1;
6185
6186 count += this_node_count;
6187 if (mostly_zeros_p (value))
6188 zero_count += this_node_count;
6189 }
6190
6191 /* Clear the entire array first if there are any missing
6192 elements, or if the incidence of zero elements is >=
6193 75%. */
6194 if (! need_to_clear
6195 && (count < maxelt - minelt + 1
6196 || 4 * zero_count >= 3 * count))
6197 need_to_clear = 1;
6198 }
6199
6200 if (need_to_clear && size > 0)
6201 {
6202 if (REG_P (target))
6203 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
6204 else
6205 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
6206 cleared = 1;
6207 }
6208
6209 if (!cleared && REG_P (target))
6210 /* Inform later passes that the old value is dead. */
6211 emit_clobber (target);
6212
6213 /* Store each element of the constructor into the
6214 corresponding element of TARGET, determined by counting the
6215 elements. */
6216 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), i, index, value)
6217 {
6218 machine_mode mode;
6219 HOST_WIDE_INT bitsize;
6220 HOST_WIDE_INT bitpos;
6221 rtx xtarget = target;
6222
6223 if (cleared && initializer_zerop (value))
6224 continue;
6225
6226 mode = TYPE_MODE (elttype);
6227 if (mode == BLKmode)
6228 bitsize = (tree_fits_uhwi_p (TYPE_SIZE (elttype))
6229 ? tree_to_uhwi (TYPE_SIZE (elttype))
6230 : -1);
6231 else
6232 bitsize = GET_MODE_BITSIZE (mode);
6233
6234 if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR)
6235 {
6236 tree lo_index = TREE_OPERAND (index, 0);
6237 tree hi_index = TREE_OPERAND (index, 1);
6238 rtx index_r, pos_rtx;
6239 HOST_WIDE_INT lo, hi, count;
6240 tree position;
6241
6242 /* If the range is constant and "small", unroll the loop. */
6243 if (const_bounds_p
6244 && tree_fits_shwi_p (lo_index)
6245 && tree_fits_shwi_p (hi_index)
6246 && (lo = tree_to_shwi (lo_index),
6247 hi = tree_to_shwi (hi_index),
6248 count = hi - lo + 1,
6249 (!MEM_P (target)
6250 || count <= 2
6251 || (tree_fits_uhwi_p (TYPE_SIZE (elttype))
6252 && (tree_to_uhwi (TYPE_SIZE (elttype)) * count
6253 <= 40 * 8)))))
6254 {
6255 lo -= minelt; hi -= minelt;
6256 for (; lo <= hi; lo++)
6257 {
6258 bitpos = lo * tree_to_shwi (TYPE_SIZE (elttype));
6259
6260 if (MEM_P (target)
6261 && !MEM_KEEP_ALIAS_SET_P (target)
6262 && TREE_CODE (type) == ARRAY_TYPE
6263 && TYPE_NONALIASED_COMPONENT (type))
6264 {
6265 target = copy_rtx (target);
6266 MEM_KEEP_ALIAS_SET_P (target) = 1;
6267 }
6268
6269 store_constructor_field
6270 (target, bitsize, bitpos, mode, value, cleared,
6271 get_alias_set (elttype));
6272 }
6273 }
6274 else
6275 {
6276 rtx_code_label *loop_start = gen_label_rtx ();
6277 rtx_code_label *loop_end = gen_label_rtx ();
6278 tree exit_cond;
6279
6280 expand_normal (hi_index);
6281
6282 index = build_decl (EXPR_LOCATION (exp),
6283 VAR_DECL, NULL_TREE, domain);
6284 index_r = gen_reg_rtx (promote_decl_mode (index, NULL));
6285 SET_DECL_RTL (index, index_r);
6286 store_expr (lo_index, index_r, 0, false);
6287
6288 /* Build the head of the loop. */
6289 do_pending_stack_adjust ();
6290 emit_label (loop_start);
6291
6292 /* Assign value to element index. */
6293 position =
6294 fold_convert (ssizetype,
6295 fold_build2 (MINUS_EXPR,
6296 TREE_TYPE (index),
6297 index,
6298 TYPE_MIN_VALUE (domain)));
6299
6300 position =
6301 size_binop (MULT_EXPR, position,
6302 fold_convert (ssizetype,
6303 TYPE_SIZE_UNIT (elttype)));
6304
6305 pos_rtx = expand_normal (position);
6306 xtarget = offset_address (target, pos_rtx,
6307 highest_pow2_factor (position));
6308 xtarget = adjust_address (xtarget, mode, 0);
6309 if (TREE_CODE (value) == CONSTRUCTOR)
6310 store_constructor (value, xtarget, cleared,
6311 bitsize / BITS_PER_UNIT);
6312 else
6313 store_expr (value, xtarget, 0, false);
6314
6315 /* Generate a conditional jump to exit the loop. */
6316 exit_cond = build2 (LT_EXPR, integer_type_node,
6317 index, hi_index);
6318 jumpif (exit_cond, loop_end, -1);
6319
6320 /* Update the loop counter, and jump to the head of
6321 the loop. */
6322 expand_assignment (index,
6323 build2 (PLUS_EXPR, TREE_TYPE (index),
6324 index, integer_one_node),
6325 false);
6326
6327 emit_jump (loop_start);
6328
6329 /* Build the end of the loop. */
6330 emit_label (loop_end);
6331 }
6332 }
6333 else if ((index != 0 && ! tree_fits_shwi_p (index))
6334 || ! tree_fits_uhwi_p (TYPE_SIZE (elttype)))
6335 {
6336 tree position;
6337
6338 if (index == 0)
6339 index = ssize_int (1);
6340
6341 if (minelt)
6342 index = fold_convert (ssizetype,
6343 fold_build2 (MINUS_EXPR,
6344 TREE_TYPE (index),
6345 index,
6346 TYPE_MIN_VALUE (domain)));
6347
6348 position =
6349 size_binop (MULT_EXPR, index,
6350 fold_convert (ssizetype,
6351 TYPE_SIZE_UNIT (elttype)));
6352 xtarget = offset_address (target,
6353 expand_normal (position),
6354 highest_pow2_factor (position));
6355 xtarget = adjust_address (xtarget, mode, 0);
6356 store_expr (value, xtarget, 0, false);
6357 }
6358 else
6359 {
6360 if (index != 0)
6361 bitpos = ((tree_to_shwi (index) - minelt)
6362 * tree_to_uhwi (TYPE_SIZE (elttype)));
6363 else
6364 bitpos = (i * tree_to_uhwi (TYPE_SIZE (elttype)));
6365
6366 if (MEM_P (target) && !MEM_KEEP_ALIAS_SET_P (target)
6367 && TREE_CODE (type) == ARRAY_TYPE
6368 && TYPE_NONALIASED_COMPONENT (type))
6369 {
6370 target = copy_rtx (target);
6371 MEM_KEEP_ALIAS_SET_P (target) = 1;
6372 }
6373 store_constructor_field (target, bitsize, bitpos, mode, value,
6374 cleared, get_alias_set (elttype));
6375 }
6376 }
6377 break;
6378 }
6379
6380 case VECTOR_TYPE:
6381 {
6382 unsigned HOST_WIDE_INT idx;
6383 constructor_elt *ce;
6384 int i;
6385 int need_to_clear;
6386 int icode = CODE_FOR_nothing;
6387 tree elttype = TREE_TYPE (type);
6388 int elt_size = tree_to_uhwi (TYPE_SIZE (elttype));
6389 machine_mode eltmode = TYPE_MODE (elttype);
6390 HOST_WIDE_INT bitsize;
6391 HOST_WIDE_INT bitpos;
6392 rtvec vector = NULL;
6393 unsigned n_elts;
6394 alias_set_type alias;
6395
6396 gcc_assert (eltmode != BLKmode);
6397
6398 n_elts = TYPE_VECTOR_SUBPARTS (type);
6399 if (REG_P (target) && VECTOR_MODE_P (GET_MODE (target)))
6400 {
6401 machine_mode mode = GET_MODE (target);
6402
6403 icode = (int) optab_handler (vec_init_optab, mode);
6404 /* Don't use vec_init<mode> if some elements have VECTOR_TYPE. */
6405 if (icode != CODE_FOR_nothing)
6406 {
6407 tree value;
6408
6409 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value)
6410 if (TREE_CODE (TREE_TYPE (value)) == VECTOR_TYPE)
6411 {
6412 icode = CODE_FOR_nothing;
6413 break;
6414 }
6415 }
6416 if (icode != CODE_FOR_nothing)
6417 {
6418 unsigned int i;
6419
6420 vector = rtvec_alloc (n_elts);
6421 for (i = 0; i < n_elts; i++)
6422 RTVEC_ELT (vector, i) = CONST0_RTX (GET_MODE_INNER (mode));
6423 }
6424 }
6425
6426 /* If the constructor has fewer elements than the vector,
6427 clear the whole array first. Similarly if this is static
6428 constructor of a non-BLKmode object. */
6429 if (cleared)
6430 need_to_clear = 0;
6431 else if (REG_P (target) && TREE_STATIC (exp))
6432 need_to_clear = 1;
6433 else
6434 {
6435 unsigned HOST_WIDE_INT count = 0, zero_count = 0;
6436 tree value;
6437
6438 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value)
6439 {
6440 int n_elts_here = tree_to_uhwi
6441 (int_const_binop (TRUNC_DIV_EXPR,
6442 TYPE_SIZE (TREE_TYPE (value)),
6443 TYPE_SIZE (elttype)));
6444
6445 count += n_elts_here;
6446 if (mostly_zeros_p (value))
6447 zero_count += n_elts_here;
6448 }
6449
6450 /* Clear the entire vector first if there are any missing elements,
6451 or if the incidence of zero elements is >= 75%. */
6452 need_to_clear = (count < n_elts || 4 * zero_count >= 3 * count);
6453 }
6454
6455 if (need_to_clear && size > 0 && !vector)
6456 {
6457 if (REG_P (target))
6458 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
6459 else
6460 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
6461 cleared = 1;
6462 }
6463
6464 /* Inform later passes that the old value is dead. */
6465 if (!cleared && !vector && REG_P (target))
6466 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
6467
6468 if (MEM_P (target))
6469 alias = MEM_ALIAS_SET (target);
6470 else
6471 alias = get_alias_set (elttype);
6472
6473 /* Store each element of the constructor into the corresponding
6474 element of TARGET, determined by counting the elements. */
6475 for (idx = 0, i = 0;
6476 vec_safe_iterate (CONSTRUCTOR_ELTS (exp), idx, &ce);
6477 idx++, i += bitsize / elt_size)
6478 {
6479 HOST_WIDE_INT eltpos;
6480 tree value = ce->value;
6481
6482 bitsize = tree_to_uhwi (TYPE_SIZE (TREE_TYPE (value)));
6483 if (cleared && initializer_zerop (value))
6484 continue;
6485
6486 if (ce->index)
6487 eltpos = tree_to_uhwi (ce->index);
6488 else
6489 eltpos = i;
6490
6491 if (vector)
6492 {
6493 /* vec_init<mode> should not be used if there are VECTOR_TYPE
6494 elements. */
6495 gcc_assert (TREE_CODE (TREE_TYPE (value)) != VECTOR_TYPE);
6496 RTVEC_ELT (vector, eltpos)
6497 = expand_normal (value);
6498 }
6499 else
6500 {
6501 machine_mode value_mode =
6502 TREE_CODE (TREE_TYPE (value)) == VECTOR_TYPE
6503 ? TYPE_MODE (TREE_TYPE (value))
6504 : eltmode;
6505 bitpos = eltpos * elt_size;
6506 store_constructor_field (target, bitsize, bitpos, value_mode,
6507 value, cleared, alias);
6508 }
6509 }
6510
6511 if (vector)
6512 emit_insn (GEN_FCN (icode)
6513 (target,
6514 gen_rtx_PARALLEL (GET_MODE (target), vector)));
6515 break;
6516 }
6517
6518 default:
6519 gcc_unreachable ();
6520 }
6521 }
6522
6523 /* Store the value of EXP (an expression tree)
6524 into a subfield of TARGET which has mode MODE and occupies
6525 BITSIZE bits, starting BITPOS bits from the start of TARGET.
6526 If MODE is VOIDmode, it means that we are storing into a bit-field.
6527
6528 BITREGION_START is bitpos of the first bitfield in this region.
6529 BITREGION_END is the bitpos of the ending bitfield in this region.
6530 These two fields are 0, if the C++ memory model does not apply,
6531 or we are not interested in keeping track of bitfield regions.
6532
6533 Always return const0_rtx unless we have something particular to
6534 return.
6535
6536 ALIAS_SET is the alias set for the destination. This value will
6537 (in general) be different from that for TARGET, since TARGET is a
6538 reference to the containing structure.
6539
6540 If NONTEMPORAL is true, try generating a nontemporal store. */
6541
6542 static rtx
6543 store_field (rtx target, HOST_WIDE_INT bitsize, HOST_WIDE_INT bitpos,
6544 unsigned HOST_WIDE_INT bitregion_start,
6545 unsigned HOST_WIDE_INT bitregion_end,
6546 machine_mode mode, tree exp,
6547 alias_set_type alias_set, bool nontemporal)
6548 {
6549 if (TREE_CODE (exp) == ERROR_MARK)
6550 return const0_rtx;
6551
6552 /* If we have nothing to store, do nothing unless the expression has
6553 side-effects. */
6554 if (bitsize == 0)
6555 return expand_expr (exp, const0_rtx, VOIDmode, EXPAND_NORMAL);
6556
6557 if (GET_CODE (target) == CONCAT)
6558 {
6559 /* We're storing into a struct containing a single __complex. */
6560
6561 gcc_assert (!bitpos);
6562 return store_expr (exp, target, 0, nontemporal);
6563 }
6564
6565 /* If the structure is in a register or if the component
6566 is a bit field, we cannot use addressing to access it.
6567 Use bit-field techniques or SUBREG to store in it. */
6568
6569 if (mode == VOIDmode
6570 || (mode != BLKmode && ! direct_store[(int) mode]
6571 && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
6572 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT)
6573 || REG_P (target)
6574 || GET_CODE (target) == SUBREG
6575 /* If the field isn't aligned enough to store as an ordinary memref,
6576 store it as a bit field. */
6577 || (mode != BLKmode
6578 && ((((MEM_ALIGN (target) < GET_MODE_ALIGNMENT (mode))
6579 || bitpos % GET_MODE_ALIGNMENT (mode))
6580 && SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (target)))
6581 || (bitpos % BITS_PER_UNIT != 0)))
6582 || (bitsize >= 0 && mode != BLKmode
6583 && GET_MODE_BITSIZE (mode) > bitsize)
6584 /* If the RHS and field are a constant size and the size of the
6585 RHS isn't the same size as the bitfield, we must use bitfield
6586 operations. */
6587 || (bitsize >= 0
6588 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
6589 && compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)), bitsize) != 0)
6590 /* If we are expanding a MEM_REF of a non-BLKmode non-addressable
6591 decl we must use bitfield operations. */
6592 || (bitsize >= 0
6593 && TREE_CODE (exp) == MEM_REF
6594 && TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR
6595 && DECL_P (TREE_OPERAND (TREE_OPERAND (exp, 0), 0))
6596 && !TREE_ADDRESSABLE (TREE_OPERAND (TREE_OPERAND (exp, 0),0 ))
6597 && DECL_MODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0)) != BLKmode))
6598 {
6599 rtx temp;
6600 gimple nop_def;
6601
6602 /* If EXP is a NOP_EXPR of precision less than its mode, then that
6603 implies a mask operation. If the precision is the same size as
6604 the field we're storing into, that mask is redundant. This is
6605 particularly common with bit field assignments generated by the
6606 C front end. */
6607 nop_def = get_def_for_expr (exp, NOP_EXPR);
6608 if (nop_def)
6609 {
6610 tree type = TREE_TYPE (exp);
6611 if (INTEGRAL_TYPE_P (type)
6612 && TYPE_PRECISION (type) < GET_MODE_BITSIZE (TYPE_MODE (type))
6613 && bitsize == TYPE_PRECISION (type))
6614 {
6615 tree op = gimple_assign_rhs1 (nop_def);
6616 type = TREE_TYPE (op);
6617 if (INTEGRAL_TYPE_P (type) && TYPE_PRECISION (type) >= bitsize)
6618 exp = op;
6619 }
6620 }
6621
6622 temp = expand_normal (exp);
6623
6624 /* If BITSIZE is narrower than the size of the type of EXP
6625 we will be narrowing TEMP. Normally, what's wanted are the
6626 low-order bits. However, if EXP's type is a record and this is
6627 big-endian machine, we want the upper BITSIZE bits. */
6628 if (BYTES_BIG_ENDIAN && GET_MODE_CLASS (GET_MODE (temp)) == MODE_INT
6629 && bitsize < (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (temp))
6630 && TREE_CODE (TREE_TYPE (exp)) == RECORD_TYPE)
6631 temp = expand_shift (RSHIFT_EXPR, GET_MODE (temp), temp,
6632 GET_MODE_BITSIZE (GET_MODE (temp)) - bitsize,
6633 NULL_RTX, 1);
6634
6635 /* Unless MODE is VOIDmode or BLKmode, convert TEMP to MODE. */
6636 if (mode != VOIDmode && mode != BLKmode
6637 && mode != TYPE_MODE (TREE_TYPE (exp)))
6638 temp = convert_modes (mode, TYPE_MODE (TREE_TYPE (exp)), temp, 1);
6639
6640 /* If TEMP is not a PARALLEL (see below) and its mode and that of TARGET
6641 are both BLKmode, both must be in memory and BITPOS must be aligned
6642 on a byte boundary. If so, we simply do a block copy. Likewise for
6643 a BLKmode-like TARGET. */
6644 if (GET_CODE (temp) != PARALLEL
6645 && GET_MODE (temp) == BLKmode
6646 && (GET_MODE (target) == BLKmode
6647 || (MEM_P (target)
6648 && GET_MODE_CLASS (GET_MODE (target)) == MODE_INT
6649 && (bitpos % BITS_PER_UNIT) == 0
6650 && (bitsize % BITS_PER_UNIT) == 0)))
6651 {
6652 gcc_assert (MEM_P (target) && MEM_P (temp)
6653 && (bitpos % BITS_PER_UNIT) == 0);
6654
6655 target = adjust_address (target, VOIDmode, bitpos / BITS_PER_UNIT);
6656 emit_block_move (target, temp,
6657 GEN_INT ((bitsize + BITS_PER_UNIT - 1)
6658 / BITS_PER_UNIT),
6659 BLOCK_OP_NORMAL);
6660
6661 return const0_rtx;
6662 }
6663
6664 /* Handle calls that return values in multiple non-contiguous locations.
6665 The Irix 6 ABI has examples of this. */
6666 if (GET_CODE (temp) == PARALLEL)
6667 {
6668 HOST_WIDE_INT size = int_size_in_bytes (TREE_TYPE (exp));
6669 rtx temp_target;
6670 if (mode == BLKmode || mode == VOIDmode)
6671 mode = smallest_mode_for_size (size * BITS_PER_UNIT, MODE_INT);
6672 temp_target = gen_reg_rtx (mode);
6673 emit_group_store (temp_target, temp, TREE_TYPE (exp), size);
6674 temp = temp_target;
6675 }
6676 else if (mode == BLKmode)
6677 {
6678 /* Handle calls that return BLKmode values in registers. */
6679 if (REG_P (temp) && TREE_CODE (exp) == CALL_EXPR)
6680 {
6681 rtx temp_target = gen_reg_rtx (GET_MODE (temp));
6682 copy_blkmode_from_reg (temp_target, temp, TREE_TYPE (exp));
6683 temp = temp_target;
6684 }
6685 else
6686 {
6687 HOST_WIDE_INT size = int_size_in_bytes (TREE_TYPE (exp));
6688 rtx temp_target;
6689 mode = smallest_mode_for_size (size * BITS_PER_UNIT, MODE_INT);
6690 temp_target = gen_reg_rtx (mode);
6691 temp_target
6692 = extract_bit_field (temp, size * BITS_PER_UNIT, 0, 1,
6693 temp_target, mode, mode);
6694 temp = temp_target;
6695 }
6696 }
6697
6698 /* Store the value in the bitfield. */
6699 store_bit_field (target, bitsize, bitpos,
6700 bitregion_start, bitregion_end,
6701 mode, temp);
6702
6703 return const0_rtx;
6704 }
6705 else
6706 {
6707 /* Now build a reference to just the desired component. */
6708 rtx to_rtx = adjust_address (target, mode, bitpos / BITS_PER_UNIT);
6709
6710 if (to_rtx == target)
6711 to_rtx = copy_rtx (to_rtx);
6712
6713 if (!MEM_KEEP_ALIAS_SET_P (to_rtx) && MEM_ALIAS_SET (to_rtx) != 0)
6714 set_mem_alias_set (to_rtx, alias_set);
6715
6716 return store_expr (exp, to_rtx, 0, nontemporal);
6717 }
6718 }
6719 \f
6720 /* Given an expression EXP that may be a COMPONENT_REF, a BIT_FIELD_REF,
6721 an ARRAY_REF, or an ARRAY_RANGE_REF, look for nested operations of these
6722 codes and find the ultimate containing object, which we return.
6723
6724 We set *PBITSIZE to the size in bits that we want, *PBITPOS to the
6725 bit position, and *PUNSIGNEDP to the signedness of the field.
6726 If the position of the field is variable, we store a tree
6727 giving the variable offset (in units) in *POFFSET.
6728 This offset is in addition to the bit position.
6729 If the position is not variable, we store 0 in *POFFSET.
6730
6731 If any of the extraction expressions is volatile,
6732 we store 1 in *PVOLATILEP. Otherwise we don't change that.
6733
6734 If the field is a non-BLKmode bit-field, *PMODE is set to VOIDmode.
6735 Otherwise, it is a mode that can be used to access the field.
6736
6737 If the field describes a variable-sized object, *PMODE is set to
6738 BLKmode and *PBITSIZE is set to -1. An access cannot be made in
6739 this case, but the address of the object can be found.
6740
6741 If KEEP_ALIGNING is true and the target is STRICT_ALIGNMENT, we don't
6742 look through nodes that serve as markers of a greater alignment than
6743 the one that can be deduced from the expression. These nodes make it
6744 possible for front-ends to prevent temporaries from being created by
6745 the middle-end on alignment considerations. For that purpose, the
6746 normal operating mode at high-level is to always pass FALSE so that
6747 the ultimate containing object is really returned; moreover, the
6748 associated predicate handled_component_p will always return TRUE
6749 on these nodes, thus indicating that they are essentially handled
6750 by get_inner_reference. TRUE should only be passed when the caller
6751 is scanning the expression in order to build another representation
6752 and specifically knows how to handle these nodes; as such, this is
6753 the normal operating mode in the RTL expanders. */
6754
6755 tree
6756 get_inner_reference (tree exp, HOST_WIDE_INT *pbitsize,
6757 HOST_WIDE_INT *pbitpos, tree *poffset,
6758 machine_mode *pmode, int *punsignedp,
6759 int *pvolatilep, bool keep_aligning)
6760 {
6761 tree size_tree = 0;
6762 machine_mode mode = VOIDmode;
6763 bool blkmode_bitfield = false;
6764 tree offset = size_zero_node;
6765 offset_int bit_offset = 0;
6766
6767 /* First get the mode, signedness, and size. We do this from just the
6768 outermost expression. */
6769 *pbitsize = -1;
6770 if (TREE_CODE (exp) == COMPONENT_REF)
6771 {
6772 tree field = TREE_OPERAND (exp, 1);
6773 size_tree = DECL_SIZE (field);
6774 if (flag_strict_volatile_bitfields > 0
6775 && TREE_THIS_VOLATILE (exp)
6776 && DECL_BIT_FIELD_TYPE (field)
6777 && DECL_MODE (field) != BLKmode)
6778 /* Volatile bitfields should be accessed in the mode of the
6779 field's type, not the mode computed based on the bit
6780 size. */
6781 mode = TYPE_MODE (DECL_BIT_FIELD_TYPE (field));
6782 else if (!DECL_BIT_FIELD (field))
6783 mode = DECL_MODE (field);
6784 else if (DECL_MODE (field) == BLKmode)
6785 blkmode_bitfield = true;
6786
6787 *punsignedp = DECL_UNSIGNED (field);
6788 }
6789 else if (TREE_CODE (exp) == BIT_FIELD_REF)
6790 {
6791 size_tree = TREE_OPERAND (exp, 1);
6792 *punsignedp = (! INTEGRAL_TYPE_P (TREE_TYPE (exp))
6793 || TYPE_UNSIGNED (TREE_TYPE (exp)));
6794
6795 /* For vector types, with the correct size of access, use the mode of
6796 inner type. */
6797 if (TREE_CODE (TREE_TYPE (TREE_OPERAND (exp, 0))) == VECTOR_TYPE
6798 && TREE_TYPE (exp) == TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0)))
6799 && tree_int_cst_equal (size_tree, TYPE_SIZE (TREE_TYPE (exp))))
6800 mode = TYPE_MODE (TREE_TYPE (exp));
6801 }
6802 else
6803 {
6804 mode = TYPE_MODE (TREE_TYPE (exp));
6805 *punsignedp = TYPE_UNSIGNED (TREE_TYPE (exp));
6806
6807 if (mode == BLKmode)
6808 size_tree = TYPE_SIZE (TREE_TYPE (exp));
6809 else
6810 *pbitsize = GET_MODE_BITSIZE (mode);
6811 }
6812
6813 if (size_tree != 0)
6814 {
6815 if (! tree_fits_uhwi_p (size_tree))
6816 mode = BLKmode, *pbitsize = -1;
6817 else
6818 *pbitsize = tree_to_uhwi (size_tree);
6819 }
6820
6821 /* Compute cumulative bit-offset for nested component-refs and array-refs,
6822 and find the ultimate containing object. */
6823 while (1)
6824 {
6825 switch (TREE_CODE (exp))
6826 {
6827 case BIT_FIELD_REF:
6828 bit_offset += wi::to_offset (TREE_OPERAND (exp, 2));
6829 break;
6830
6831 case COMPONENT_REF:
6832 {
6833 tree field = TREE_OPERAND (exp, 1);
6834 tree this_offset = component_ref_field_offset (exp);
6835
6836 /* If this field hasn't been filled in yet, don't go past it.
6837 This should only happen when folding expressions made during
6838 type construction. */
6839 if (this_offset == 0)
6840 break;
6841
6842 offset = size_binop (PLUS_EXPR, offset, this_offset);
6843 bit_offset += wi::to_offset (DECL_FIELD_BIT_OFFSET (field));
6844
6845 /* ??? Right now we don't do anything with DECL_OFFSET_ALIGN. */
6846 }
6847 break;
6848
6849 case ARRAY_REF:
6850 case ARRAY_RANGE_REF:
6851 {
6852 tree index = TREE_OPERAND (exp, 1);
6853 tree low_bound = array_ref_low_bound (exp);
6854 tree unit_size = array_ref_element_size (exp);
6855
6856 /* We assume all arrays have sizes that are a multiple of a byte.
6857 First subtract the lower bound, if any, in the type of the
6858 index, then convert to sizetype and multiply by the size of
6859 the array element. */
6860 if (! integer_zerop (low_bound))
6861 index = fold_build2 (MINUS_EXPR, TREE_TYPE (index),
6862 index, low_bound);
6863
6864 offset = size_binop (PLUS_EXPR, offset,
6865 size_binop (MULT_EXPR,
6866 fold_convert (sizetype, index),
6867 unit_size));
6868 }
6869 break;
6870
6871 case REALPART_EXPR:
6872 break;
6873
6874 case IMAGPART_EXPR:
6875 bit_offset += *pbitsize;
6876 break;
6877
6878 case VIEW_CONVERT_EXPR:
6879 if (keep_aligning && STRICT_ALIGNMENT
6880 && (TYPE_ALIGN (TREE_TYPE (exp))
6881 > TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (exp, 0))))
6882 && (TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (exp, 0)))
6883 < BIGGEST_ALIGNMENT)
6884 && (TYPE_ALIGN_OK (TREE_TYPE (exp))
6885 || TYPE_ALIGN_OK (TREE_TYPE (TREE_OPERAND (exp, 0)))))
6886 goto done;
6887 break;
6888
6889 case MEM_REF:
6890 /* Hand back the decl for MEM[&decl, off]. */
6891 if (TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR)
6892 {
6893 tree off = TREE_OPERAND (exp, 1);
6894 if (!integer_zerop (off))
6895 {
6896 offset_int boff, coff = mem_ref_offset (exp);
6897 boff = wi::lshift (coff, LOG2_BITS_PER_UNIT);
6898 bit_offset += boff;
6899 }
6900 exp = TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
6901 }
6902 goto done;
6903
6904 default:
6905 goto done;
6906 }
6907
6908 /* If any reference in the chain is volatile, the effect is volatile. */
6909 if (TREE_THIS_VOLATILE (exp))
6910 *pvolatilep = 1;
6911
6912 exp = TREE_OPERAND (exp, 0);
6913 }
6914 done:
6915
6916 /* If OFFSET is constant, see if we can return the whole thing as a
6917 constant bit position. Make sure to handle overflow during
6918 this conversion. */
6919 if (TREE_CODE (offset) == INTEGER_CST)
6920 {
6921 offset_int tem = wi::sext (wi::to_offset (offset),
6922 TYPE_PRECISION (sizetype));
6923 tem = wi::lshift (tem, LOG2_BITS_PER_UNIT);
6924 tem += bit_offset;
6925 if (wi::fits_shwi_p (tem))
6926 {
6927 *pbitpos = tem.to_shwi ();
6928 *poffset = offset = NULL_TREE;
6929 }
6930 }
6931
6932 /* Otherwise, split it up. */
6933 if (offset)
6934 {
6935 /* Avoid returning a negative bitpos as this may wreak havoc later. */
6936 if (wi::neg_p (bit_offset) || !wi::fits_shwi_p (bit_offset))
6937 {
6938 offset_int mask = wi::mask <offset_int> (LOG2_BITS_PER_UNIT, false);
6939 offset_int tem = bit_offset.and_not (mask);
6940 /* TEM is the bitpos rounded to BITS_PER_UNIT towards -Inf.
6941 Subtract it to BIT_OFFSET and add it (scaled) to OFFSET. */
6942 bit_offset -= tem;
6943 tem = wi::arshift (tem, LOG2_BITS_PER_UNIT);
6944 offset = size_binop (PLUS_EXPR, offset,
6945 wide_int_to_tree (sizetype, tem));
6946 }
6947
6948 *pbitpos = bit_offset.to_shwi ();
6949 *poffset = offset;
6950 }
6951
6952 /* We can use BLKmode for a byte-aligned BLKmode bitfield. */
6953 if (mode == VOIDmode
6954 && blkmode_bitfield
6955 && (*pbitpos % BITS_PER_UNIT) == 0
6956 && (*pbitsize % BITS_PER_UNIT) == 0)
6957 *pmode = BLKmode;
6958 else
6959 *pmode = mode;
6960
6961 return exp;
6962 }
6963
6964 /* Return a tree of sizetype representing the size, in bytes, of the element
6965 of EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6966
6967 tree
6968 array_ref_element_size (tree exp)
6969 {
6970 tree aligned_size = TREE_OPERAND (exp, 3);
6971 tree elmt_type = TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0)));
6972 location_t loc = EXPR_LOCATION (exp);
6973
6974 /* If a size was specified in the ARRAY_REF, it's the size measured
6975 in alignment units of the element type. So multiply by that value. */
6976 if (aligned_size)
6977 {
6978 /* ??? tree_ssa_useless_type_conversion will eliminate casts to
6979 sizetype from another type of the same width and signedness. */
6980 if (TREE_TYPE (aligned_size) != sizetype)
6981 aligned_size = fold_convert_loc (loc, sizetype, aligned_size);
6982 return size_binop_loc (loc, MULT_EXPR, aligned_size,
6983 size_int (TYPE_ALIGN_UNIT (elmt_type)));
6984 }
6985
6986 /* Otherwise, take the size from that of the element type. Substitute
6987 any PLACEHOLDER_EXPR that we have. */
6988 else
6989 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_SIZE_UNIT (elmt_type), exp);
6990 }
6991
6992 /* Return a tree representing the lower bound of the array mentioned in
6993 EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6994
6995 tree
6996 array_ref_low_bound (tree exp)
6997 {
6998 tree domain_type = TYPE_DOMAIN (TREE_TYPE (TREE_OPERAND (exp, 0)));
6999
7000 /* If a lower bound is specified in EXP, use it. */
7001 if (TREE_OPERAND (exp, 2))
7002 return TREE_OPERAND (exp, 2);
7003
7004 /* Otherwise, if there is a domain type and it has a lower bound, use it,
7005 substituting for a PLACEHOLDER_EXPR as needed. */
7006 if (domain_type && TYPE_MIN_VALUE (domain_type))
7007 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_MIN_VALUE (domain_type), exp);
7008
7009 /* Otherwise, return a zero of the appropriate type. */
7010 return build_int_cst (TREE_TYPE (TREE_OPERAND (exp, 1)), 0);
7011 }
7012
7013 /* Returns true if REF is an array reference to an array at the end of
7014 a structure. If this is the case, the array may be allocated larger
7015 than its upper bound implies. */
7016
7017 bool
7018 array_at_struct_end_p (tree ref)
7019 {
7020 if (TREE_CODE (ref) != ARRAY_REF
7021 && TREE_CODE (ref) != ARRAY_RANGE_REF)
7022 return false;
7023
7024 while (handled_component_p (ref))
7025 {
7026 /* If the reference chain contains a component reference to a
7027 non-union type and there follows another field the reference
7028 is not at the end of a structure. */
7029 if (TREE_CODE (ref) == COMPONENT_REF
7030 && TREE_CODE (TREE_TYPE (TREE_OPERAND (ref, 0))) == RECORD_TYPE)
7031 {
7032 tree nextf = DECL_CHAIN (TREE_OPERAND (ref, 1));
7033 while (nextf && TREE_CODE (nextf) != FIELD_DECL)
7034 nextf = DECL_CHAIN (nextf);
7035 if (nextf)
7036 return false;
7037 }
7038
7039 ref = TREE_OPERAND (ref, 0);
7040 }
7041
7042 /* If the reference is based on a declared entity, the size of the array
7043 is constrained by its given domain. */
7044 if (DECL_P (ref))
7045 return false;
7046
7047 return true;
7048 }
7049
7050 /* Return a tree representing the upper bound of the array mentioned in
7051 EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
7052
7053 tree
7054 array_ref_up_bound (tree exp)
7055 {
7056 tree domain_type = TYPE_DOMAIN (TREE_TYPE (TREE_OPERAND (exp, 0)));
7057
7058 /* If there is a domain type and it has an upper bound, use it, substituting
7059 for a PLACEHOLDER_EXPR as needed. */
7060 if (domain_type && TYPE_MAX_VALUE (domain_type))
7061 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_MAX_VALUE (domain_type), exp);
7062
7063 /* Otherwise fail. */
7064 return NULL_TREE;
7065 }
7066
7067 /* Return a tree representing the offset, in bytes, of the field referenced
7068 by EXP. This does not include any offset in DECL_FIELD_BIT_OFFSET. */
7069
7070 tree
7071 component_ref_field_offset (tree exp)
7072 {
7073 tree aligned_offset = TREE_OPERAND (exp, 2);
7074 tree field = TREE_OPERAND (exp, 1);
7075 location_t loc = EXPR_LOCATION (exp);
7076
7077 /* If an offset was specified in the COMPONENT_REF, it's the offset measured
7078 in units of DECL_OFFSET_ALIGN / BITS_PER_UNIT. So multiply by that
7079 value. */
7080 if (aligned_offset)
7081 {
7082 /* ??? tree_ssa_useless_type_conversion will eliminate casts to
7083 sizetype from another type of the same width and signedness. */
7084 if (TREE_TYPE (aligned_offset) != sizetype)
7085 aligned_offset = fold_convert_loc (loc, sizetype, aligned_offset);
7086 return size_binop_loc (loc, MULT_EXPR, aligned_offset,
7087 size_int (DECL_OFFSET_ALIGN (field)
7088 / BITS_PER_UNIT));
7089 }
7090
7091 /* Otherwise, take the offset from that of the field. Substitute
7092 any PLACEHOLDER_EXPR that we have. */
7093 else
7094 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (DECL_FIELD_OFFSET (field), exp);
7095 }
7096
7097 /* Alignment in bits the TARGET of an assignment may be assumed to have. */
7098
7099 static unsigned HOST_WIDE_INT
7100 target_align (const_tree target)
7101 {
7102 /* We might have a chain of nested references with intermediate misaligning
7103 bitfields components, so need to recurse to find out. */
7104
7105 unsigned HOST_WIDE_INT this_align, outer_align;
7106
7107 switch (TREE_CODE (target))
7108 {
7109 case BIT_FIELD_REF:
7110 return 1;
7111
7112 case COMPONENT_REF:
7113 this_align = DECL_ALIGN (TREE_OPERAND (target, 1));
7114 outer_align = target_align (TREE_OPERAND (target, 0));
7115 return MIN (this_align, outer_align);
7116
7117 case ARRAY_REF:
7118 case ARRAY_RANGE_REF:
7119 this_align = TYPE_ALIGN (TREE_TYPE (target));
7120 outer_align = target_align (TREE_OPERAND (target, 0));
7121 return MIN (this_align, outer_align);
7122
7123 CASE_CONVERT:
7124 case NON_LVALUE_EXPR:
7125 case VIEW_CONVERT_EXPR:
7126 this_align = TYPE_ALIGN (TREE_TYPE (target));
7127 outer_align = target_align (TREE_OPERAND (target, 0));
7128 return MAX (this_align, outer_align);
7129
7130 default:
7131 return TYPE_ALIGN (TREE_TYPE (target));
7132 }
7133 }
7134
7135 \f
7136 /* Given an rtx VALUE that may contain additions and multiplications, return
7137 an equivalent value that just refers to a register, memory, or constant.
7138 This is done by generating instructions to perform the arithmetic and
7139 returning a pseudo-register containing the value.
7140
7141 The returned value may be a REG, SUBREG, MEM or constant. */
7142
7143 rtx
7144 force_operand (rtx value, rtx target)
7145 {
7146 rtx op1, op2;
7147 /* Use subtarget as the target for operand 0 of a binary operation. */
7148 rtx subtarget = get_subtarget (target);
7149 enum rtx_code code = GET_CODE (value);
7150
7151 /* Check for subreg applied to an expression produced by loop optimizer. */
7152 if (code == SUBREG
7153 && !REG_P (SUBREG_REG (value))
7154 && !MEM_P (SUBREG_REG (value)))
7155 {
7156 value
7157 = simplify_gen_subreg (GET_MODE (value),
7158 force_reg (GET_MODE (SUBREG_REG (value)),
7159 force_operand (SUBREG_REG (value),
7160 NULL_RTX)),
7161 GET_MODE (SUBREG_REG (value)),
7162 SUBREG_BYTE (value));
7163 code = GET_CODE (value);
7164 }
7165
7166 /* Check for a PIC address load. */
7167 if ((code == PLUS || code == MINUS)
7168 && XEXP (value, 0) == pic_offset_table_rtx
7169 && (GET_CODE (XEXP (value, 1)) == SYMBOL_REF
7170 || GET_CODE (XEXP (value, 1)) == LABEL_REF
7171 || GET_CODE (XEXP (value, 1)) == CONST))
7172 {
7173 if (!subtarget)
7174 subtarget = gen_reg_rtx (GET_MODE (value));
7175 emit_move_insn (subtarget, value);
7176 return subtarget;
7177 }
7178
7179 if (ARITHMETIC_P (value))
7180 {
7181 op2 = XEXP (value, 1);
7182 if (!CONSTANT_P (op2) && !(REG_P (op2) && op2 != subtarget))
7183 subtarget = 0;
7184 if (code == MINUS && CONST_INT_P (op2))
7185 {
7186 code = PLUS;
7187 op2 = negate_rtx (GET_MODE (value), op2);
7188 }
7189
7190 /* Check for an addition with OP2 a constant integer and our first
7191 operand a PLUS of a virtual register and something else. In that
7192 case, we want to emit the sum of the virtual register and the
7193 constant first and then add the other value. This allows virtual
7194 register instantiation to simply modify the constant rather than
7195 creating another one around this addition. */
7196 if (code == PLUS && CONST_INT_P (op2)
7197 && GET_CODE (XEXP (value, 0)) == PLUS
7198 && REG_P (XEXP (XEXP (value, 0), 0))
7199 && REGNO (XEXP (XEXP (value, 0), 0)) >= FIRST_VIRTUAL_REGISTER
7200 && REGNO (XEXP (XEXP (value, 0), 0)) <= LAST_VIRTUAL_REGISTER)
7201 {
7202 rtx temp = expand_simple_binop (GET_MODE (value), code,
7203 XEXP (XEXP (value, 0), 0), op2,
7204 subtarget, 0, OPTAB_LIB_WIDEN);
7205 return expand_simple_binop (GET_MODE (value), code, temp,
7206 force_operand (XEXP (XEXP (value,
7207 0), 1), 0),
7208 target, 0, OPTAB_LIB_WIDEN);
7209 }
7210
7211 op1 = force_operand (XEXP (value, 0), subtarget);
7212 op2 = force_operand (op2, NULL_RTX);
7213 switch (code)
7214 {
7215 case MULT:
7216 return expand_mult (GET_MODE (value), op1, op2, target, 1);
7217 case DIV:
7218 if (!INTEGRAL_MODE_P (GET_MODE (value)))
7219 return expand_simple_binop (GET_MODE (value), code, op1, op2,
7220 target, 1, OPTAB_LIB_WIDEN);
7221 else
7222 return expand_divmod (0,
7223 FLOAT_MODE_P (GET_MODE (value))
7224 ? RDIV_EXPR : TRUNC_DIV_EXPR,
7225 GET_MODE (value), op1, op2, target, 0);
7226 case MOD:
7227 return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2,
7228 target, 0);
7229 case UDIV:
7230 return expand_divmod (0, TRUNC_DIV_EXPR, GET_MODE (value), op1, op2,
7231 target, 1);
7232 case UMOD:
7233 return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2,
7234 target, 1);
7235 case ASHIFTRT:
7236 return expand_simple_binop (GET_MODE (value), code, op1, op2,
7237 target, 0, OPTAB_LIB_WIDEN);
7238 default:
7239 return expand_simple_binop (GET_MODE (value), code, op1, op2,
7240 target, 1, OPTAB_LIB_WIDEN);
7241 }
7242 }
7243 if (UNARY_P (value))
7244 {
7245 if (!target)
7246 target = gen_reg_rtx (GET_MODE (value));
7247 op1 = force_operand (XEXP (value, 0), NULL_RTX);
7248 switch (code)
7249 {
7250 case ZERO_EXTEND:
7251 case SIGN_EXTEND:
7252 case TRUNCATE:
7253 case FLOAT_EXTEND:
7254 case FLOAT_TRUNCATE:
7255 convert_move (target, op1, code == ZERO_EXTEND);
7256 return target;
7257
7258 case FIX:
7259 case UNSIGNED_FIX:
7260 expand_fix (target, op1, code == UNSIGNED_FIX);
7261 return target;
7262
7263 case FLOAT:
7264 case UNSIGNED_FLOAT:
7265 expand_float (target, op1, code == UNSIGNED_FLOAT);
7266 return target;
7267
7268 default:
7269 return expand_simple_unop (GET_MODE (value), code, op1, target, 0);
7270 }
7271 }
7272
7273 #ifdef INSN_SCHEDULING
7274 /* On machines that have insn scheduling, we want all memory reference to be
7275 explicit, so we need to deal with such paradoxical SUBREGs. */
7276 if (paradoxical_subreg_p (value) && MEM_P (SUBREG_REG (value)))
7277 value
7278 = simplify_gen_subreg (GET_MODE (value),
7279 force_reg (GET_MODE (SUBREG_REG (value)),
7280 force_operand (SUBREG_REG (value),
7281 NULL_RTX)),
7282 GET_MODE (SUBREG_REG (value)),
7283 SUBREG_BYTE (value));
7284 #endif
7285
7286 return value;
7287 }
7288 \f
7289 /* Subroutine of expand_expr: return nonzero iff there is no way that
7290 EXP can reference X, which is being modified. TOP_P is nonzero if this
7291 call is going to be used to determine whether we need a temporary
7292 for EXP, as opposed to a recursive call to this function.
7293
7294 It is always safe for this routine to return zero since it merely
7295 searches for optimization opportunities. */
7296
7297 int
7298 safe_from_p (const_rtx x, tree exp, int top_p)
7299 {
7300 rtx exp_rtl = 0;
7301 int i, nops;
7302
7303 if (x == 0
7304 /* If EXP has varying size, we MUST use a target since we currently
7305 have no way of allocating temporaries of variable size
7306 (except for arrays that have TYPE_ARRAY_MAX_SIZE set).
7307 So we assume here that something at a higher level has prevented a
7308 clash. This is somewhat bogus, but the best we can do. Only
7309 do this when X is BLKmode and when we are at the top level. */
7310 || (top_p && TREE_TYPE (exp) != 0 && COMPLETE_TYPE_P (TREE_TYPE (exp))
7311 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) != INTEGER_CST
7312 && (TREE_CODE (TREE_TYPE (exp)) != ARRAY_TYPE
7313 || TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp)) == NULL_TREE
7314 || TREE_CODE (TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp)))
7315 != INTEGER_CST)
7316 && GET_MODE (x) == BLKmode)
7317 /* If X is in the outgoing argument area, it is always safe. */
7318 || (MEM_P (x)
7319 && (XEXP (x, 0) == virtual_outgoing_args_rtx
7320 || (GET_CODE (XEXP (x, 0)) == PLUS
7321 && XEXP (XEXP (x, 0), 0) == virtual_outgoing_args_rtx))))
7322 return 1;
7323
7324 /* If this is a subreg of a hard register, declare it unsafe, otherwise,
7325 find the underlying pseudo. */
7326 if (GET_CODE (x) == SUBREG)
7327 {
7328 x = SUBREG_REG (x);
7329 if (REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
7330 return 0;
7331 }
7332
7333 /* Now look at our tree code and possibly recurse. */
7334 switch (TREE_CODE_CLASS (TREE_CODE (exp)))
7335 {
7336 case tcc_declaration:
7337 exp_rtl = DECL_RTL_IF_SET (exp);
7338 break;
7339
7340 case tcc_constant:
7341 return 1;
7342
7343 case tcc_exceptional:
7344 if (TREE_CODE (exp) == TREE_LIST)
7345 {
7346 while (1)
7347 {
7348 if (TREE_VALUE (exp) && !safe_from_p (x, TREE_VALUE (exp), 0))
7349 return 0;
7350 exp = TREE_CHAIN (exp);
7351 if (!exp)
7352 return 1;
7353 if (TREE_CODE (exp) != TREE_LIST)
7354 return safe_from_p (x, exp, 0);
7355 }
7356 }
7357 else if (TREE_CODE (exp) == CONSTRUCTOR)
7358 {
7359 constructor_elt *ce;
7360 unsigned HOST_WIDE_INT idx;
7361
7362 FOR_EACH_VEC_SAFE_ELT (CONSTRUCTOR_ELTS (exp), idx, ce)
7363 if ((ce->index != NULL_TREE && !safe_from_p (x, ce->index, 0))
7364 || !safe_from_p (x, ce->value, 0))
7365 return 0;
7366 return 1;
7367 }
7368 else if (TREE_CODE (exp) == ERROR_MARK)
7369 return 1; /* An already-visited SAVE_EXPR? */
7370 else
7371 return 0;
7372
7373 case tcc_statement:
7374 /* The only case we look at here is the DECL_INITIAL inside a
7375 DECL_EXPR. */
7376 return (TREE_CODE (exp) != DECL_EXPR
7377 || TREE_CODE (DECL_EXPR_DECL (exp)) != VAR_DECL
7378 || !DECL_INITIAL (DECL_EXPR_DECL (exp))
7379 || safe_from_p (x, DECL_INITIAL (DECL_EXPR_DECL (exp)), 0));
7380
7381 case tcc_binary:
7382 case tcc_comparison:
7383 if (!safe_from_p (x, TREE_OPERAND (exp, 1), 0))
7384 return 0;
7385 /* Fall through. */
7386
7387 case tcc_unary:
7388 return safe_from_p (x, TREE_OPERAND (exp, 0), 0);
7389
7390 case tcc_expression:
7391 case tcc_reference:
7392 case tcc_vl_exp:
7393 /* Now do code-specific tests. EXP_RTL is set to any rtx we find in
7394 the expression. If it is set, we conflict iff we are that rtx or
7395 both are in memory. Otherwise, we check all operands of the
7396 expression recursively. */
7397
7398 switch (TREE_CODE (exp))
7399 {
7400 case ADDR_EXPR:
7401 /* If the operand is static or we are static, we can't conflict.
7402 Likewise if we don't conflict with the operand at all. */
7403 if (staticp (TREE_OPERAND (exp, 0))
7404 || TREE_STATIC (exp)
7405 || safe_from_p (x, TREE_OPERAND (exp, 0), 0))
7406 return 1;
7407
7408 /* Otherwise, the only way this can conflict is if we are taking
7409 the address of a DECL a that address if part of X, which is
7410 very rare. */
7411 exp = TREE_OPERAND (exp, 0);
7412 if (DECL_P (exp))
7413 {
7414 if (!DECL_RTL_SET_P (exp)
7415 || !MEM_P (DECL_RTL (exp)))
7416 return 0;
7417 else
7418 exp_rtl = XEXP (DECL_RTL (exp), 0);
7419 }
7420 break;
7421
7422 case MEM_REF:
7423 if (MEM_P (x)
7424 && alias_sets_conflict_p (MEM_ALIAS_SET (x),
7425 get_alias_set (exp)))
7426 return 0;
7427 break;
7428
7429 case CALL_EXPR:
7430 /* Assume that the call will clobber all hard registers and
7431 all of memory. */
7432 if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
7433 || MEM_P (x))
7434 return 0;
7435 break;
7436
7437 case WITH_CLEANUP_EXPR:
7438 case CLEANUP_POINT_EXPR:
7439 /* Lowered by gimplify.c. */
7440 gcc_unreachable ();
7441
7442 case SAVE_EXPR:
7443 return safe_from_p (x, TREE_OPERAND (exp, 0), 0);
7444
7445 default:
7446 break;
7447 }
7448
7449 /* If we have an rtx, we do not need to scan our operands. */
7450 if (exp_rtl)
7451 break;
7452
7453 nops = TREE_OPERAND_LENGTH (exp);
7454 for (i = 0; i < nops; i++)
7455 if (TREE_OPERAND (exp, i) != 0
7456 && ! safe_from_p (x, TREE_OPERAND (exp, i), 0))
7457 return 0;
7458
7459 break;
7460
7461 case tcc_type:
7462 /* Should never get a type here. */
7463 gcc_unreachable ();
7464 }
7465
7466 /* If we have an rtl, find any enclosed object. Then see if we conflict
7467 with it. */
7468 if (exp_rtl)
7469 {
7470 if (GET_CODE (exp_rtl) == SUBREG)
7471 {
7472 exp_rtl = SUBREG_REG (exp_rtl);
7473 if (REG_P (exp_rtl)
7474 && REGNO (exp_rtl) < FIRST_PSEUDO_REGISTER)
7475 return 0;
7476 }
7477
7478 /* If the rtl is X, then it is not safe. Otherwise, it is unless both
7479 are memory and they conflict. */
7480 return ! (rtx_equal_p (x, exp_rtl)
7481 || (MEM_P (x) && MEM_P (exp_rtl)
7482 && true_dependence (exp_rtl, VOIDmode, x)));
7483 }
7484
7485 /* If we reach here, it is safe. */
7486 return 1;
7487 }
7488
7489 \f
7490 /* Return the highest power of two that EXP is known to be a multiple of.
7491 This is used in updating alignment of MEMs in array references. */
7492
7493 unsigned HOST_WIDE_INT
7494 highest_pow2_factor (const_tree exp)
7495 {
7496 unsigned HOST_WIDE_INT ret;
7497 int trailing_zeros = tree_ctz (exp);
7498 if (trailing_zeros >= HOST_BITS_PER_WIDE_INT)
7499 return BIGGEST_ALIGNMENT;
7500 ret = (unsigned HOST_WIDE_INT) 1 << trailing_zeros;
7501 if (ret > BIGGEST_ALIGNMENT)
7502 return BIGGEST_ALIGNMENT;
7503 return ret;
7504 }
7505
7506 /* Similar, except that the alignment requirements of TARGET are
7507 taken into account. Assume it is at least as aligned as its
7508 type, unless it is a COMPONENT_REF in which case the layout of
7509 the structure gives the alignment. */
7510
7511 static unsigned HOST_WIDE_INT
7512 highest_pow2_factor_for_target (const_tree target, const_tree exp)
7513 {
7514 unsigned HOST_WIDE_INT talign = target_align (target) / BITS_PER_UNIT;
7515 unsigned HOST_WIDE_INT factor = highest_pow2_factor (exp);
7516
7517 return MAX (factor, talign);
7518 }
7519 \f
7520 #ifdef HAVE_conditional_move
7521 /* Convert the tree comparison code TCODE to the rtl one where the
7522 signedness is UNSIGNEDP. */
7523
7524 static enum rtx_code
7525 convert_tree_comp_to_rtx (enum tree_code tcode, int unsignedp)
7526 {
7527 enum rtx_code code;
7528 switch (tcode)
7529 {
7530 case EQ_EXPR:
7531 code = EQ;
7532 break;
7533 case NE_EXPR:
7534 code = NE;
7535 break;
7536 case LT_EXPR:
7537 code = unsignedp ? LTU : LT;
7538 break;
7539 case LE_EXPR:
7540 code = unsignedp ? LEU : LE;
7541 break;
7542 case GT_EXPR:
7543 code = unsignedp ? GTU : GT;
7544 break;
7545 case GE_EXPR:
7546 code = unsignedp ? GEU : GE;
7547 break;
7548 case UNORDERED_EXPR:
7549 code = UNORDERED;
7550 break;
7551 case ORDERED_EXPR:
7552 code = ORDERED;
7553 break;
7554 case UNLT_EXPR:
7555 code = UNLT;
7556 break;
7557 case UNLE_EXPR:
7558 code = UNLE;
7559 break;
7560 case UNGT_EXPR:
7561 code = UNGT;
7562 break;
7563 case UNGE_EXPR:
7564 code = UNGE;
7565 break;
7566 case UNEQ_EXPR:
7567 code = UNEQ;
7568 break;
7569 case LTGT_EXPR:
7570 code = LTGT;
7571 break;
7572
7573 default:
7574 gcc_unreachable ();
7575 }
7576 return code;
7577 }
7578 #endif
7579
7580 /* Subroutine of expand_expr. Expand the two operands of a binary
7581 expression EXP0 and EXP1 placing the results in OP0 and OP1.
7582 The value may be stored in TARGET if TARGET is nonzero. The
7583 MODIFIER argument is as documented by expand_expr. */
7584
7585 void
7586 expand_operands (tree exp0, tree exp1, rtx target, rtx *op0, rtx *op1,
7587 enum expand_modifier modifier)
7588 {
7589 if (! safe_from_p (target, exp1, 1))
7590 target = 0;
7591 if (operand_equal_p (exp0, exp1, 0))
7592 {
7593 *op0 = expand_expr (exp0, target, VOIDmode, modifier);
7594 *op1 = copy_rtx (*op0);
7595 }
7596 else
7597 {
7598 /* If we need to preserve evaluation order, copy exp0 into its own
7599 temporary variable so that it can't be clobbered by exp1. */
7600 if (flag_evaluation_order && TREE_SIDE_EFFECTS (exp1))
7601 exp0 = save_expr (exp0);
7602 *op0 = expand_expr (exp0, target, VOIDmode, modifier);
7603 *op1 = expand_expr (exp1, NULL_RTX, VOIDmode, modifier);
7604 }
7605 }
7606
7607 \f
7608 /* Return a MEM that contains constant EXP. DEFER is as for
7609 output_constant_def and MODIFIER is as for expand_expr. */
7610
7611 static rtx
7612 expand_expr_constant (tree exp, int defer, enum expand_modifier modifier)
7613 {
7614 rtx mem;
7615
7616 mem = output_constant_def (exp, defer);
7617 if (modifier != EXPAND_INITIALIZER)
7618 mem = use_anchored_address (mem);
7619 return mem;
7620 }
7621
7622 /* A subroutine of expand_expr_addr_expr. Evaluate the address of EXP.
7623 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
7624
7625 static rtx
7626 expand_expr_addr_expr_1 (tree exp, rtx target, machine_mode tmode,
7627 enum expand_modifier modifier, addr_space_t as)
7628 {
7629 rtx result, subtarget;
7630 tree inner, offset;
7631 HOST_WIDE_INT bitsize, bitpos;
7632 int volatilep, unsignedp;
7633 machine_mode mode1;
7634
7635 /* If we are taking the address of a constant and are at the top level,
7636 we have to use output_constant_def since we can't call force_const_mem
7637 at top level. */
7638 /* ??? This should be considered a front-end bug. We should not be
7639 generating ADDR_EXPR of something that isn't an LVALUE. The only
7640 exception here is STRING_CST. */
7641 if (CONSTANT_CLASS_P (exp))
7642 {
7643 result = XEXP (expand_expr_constant (exp, 0, modifier), 0);
7644 if (modifier < EXPAND_SUM)
7645 result = force_operand (result, target);
7646 return result;
7647 }
7648
7649 /* Everything must be something allowed by is_gimple_addressable. */
7650 switch (TREE_CODE (exp))
7651 {
7652 case INDIRECT_REF:
7653 /* This case will happen via recursion for &a->b. */
7654 return expand_expr (TREE_OPERAND (exp, 0), target, tmode, modifier);
7655
7656 case MEM_REF:
7657 {
7658 tree tem = TREE_OPERAND (exp, 0);
7659 if (!integer_zerop (TREE_OPERAND (exp, 1)))
7660 tem = fold_build_pointer_plus (tem, TREE_OPERAND (exp, 1));
7661 return expand_expr (tem, target, tmode, modifier);
7662 }
7663
7664 case CONST_DECL:
7665 /* Expand the initializer like constants above. */
7666 result = XEXP (expand_expr_constant (DECL_INITIAL (exp),
7667 0, modifier), 0);
7668 if (modifier < EXPAND_SUM)
7669 result = force_operand (result, target);
7670 return result;
7671
7672 case REALPART_EXPR:
7673 /* The real part of the complex number is always first, therefore
7674 the address is the same as the address of the parent object. */
7675 offset = 0;
7676 bitpos = 0;
7677 inner = TREE_OPERAND (exp, 0);
7678 break;
7679
7680 case IMAGPART_EXPR:
7681 /* The imaginary part of the complex number is always second.
7682 The expression is therefore always offset by the size of the
7683 scalar type. */
7684 offset = 0;
7685 bitpos = GET_MODE_BITSIZE (TYPE_MODE (TREE_TYPE (exp)));
7686 inner = TREE_OPERAND (exp, 0);
7687 break;
7688
7689 case COMPOUND_LITERAL_EXPR:
7690 /* Allow COMPOUND_LITERAL_EXPR in initializers or coming from
7691 initializers, if e.g. rtl_for_decl_init is called on DECL_INITIAL
7692 with COMPOUND_LITERAL_EXPRs in it, or ARRAY_REF on a const static
7693 array with address of COMPOUND_LITERAL_EXPR in DECL_INITIAL;
7694 the initializers aren't gimplified. */
7695 if (COMPOUND_LITERAL_EXPR_DECL (exp)
7696 && TREE_STATIC (COMPOUND_LITERAL_EXPR_DECL (exp)))
7697 return expand_expr_addr_expr_1 (COMPOUND_LITERAL_EXPR_DECL (exp),
7698 target, tmode, modifier, as);
7699 /* FALLTHRU */
7700 default:
7701 /* If the object is a DECL, then expand it for its rtl. Don't bypass
7702 expand_expr, as that can have various side effects; LABEL_DECLs for
7703 example, may not have their DECL_RTL set yet. Expand the rtl of
7704 CONSTRUCTORs too, which should yield a memory reference for the
7705 constructor's contents. Assume language specific tree nodes can
7706 be expanded in some interesting way. */
7707 gcc_assert (TREE_CODE (exp) < LAST_AND_UNUSED_TREE_CODE);
7708 if (DECL_P (exp)
7709 || TREE_CODE (exp) == CONSTRUCTOR
7710 || TREE_CODE (exp) == COMPOUND_LITERAL_EXPR)
7711 {
7712 result = expand_expr (exp, target, tmode,
7713 modifier == EXPAND_INITIALIZER
7714 ? EXPAND_INITIALIZER : EXPAND_CONST_ADDRESS);
7715
7716 /* If the DECL isn't in memory, then the DECL wasn't properly
7717 marked TREE_ADDRESSABLE, which will be either a front-end
7718 or a tree optimizer bug. */
7719
7720 if (TREE_ADDRESSABLE (exp)
7721 && ! MEM_P (result)
7722 && ! targetm.calls.allocate_stack_slots_for_args ())
7723 {
7724 error ("local frame unavailable (naked function?)");
7725 return result;
7726 }
7727 else
7728 gcc_assert (MEM_P (result));
7729 result = XEXP (result, 0);
7730
7731 /* ??? Is this needed anymore? */
7732 if (DECL_P (exp))
7733 TREE_USED (exp) = 1;
7734
7735 if (modifier != EXPAND_INITIALIZER
7736 && modifier != EXPAND_CONST_ADDRESS
7737 && modifier != EXPAND_SUM)
7738 result = force_operand (result, target);
7739 return result;
7740 }
7741
7742 /* Pass FALSE as the last argument to get_inner_reference although
7743 we are expanding to RTL. The rationale is that we know how to
7744 handle "aligning nodes" here: we can just bypass them because
7745 they won't change the final object whose address will be returned
7746 (they actually exist only for that purpose). */
7747 inner = get_inner_reference (exp, &bitsize, &bitpos, &offset,
7748 &mode1, &unsignedp, &volatilep, false);
7749 break;
7750 }
7751
7752 /* We must have made progress. */
7753 gcc_assert (inner != exp);
7754
7755 subtarget = offset || bitpos ? NULL_RTX : target;
7756 /* For VIEW_CONVERT_EXPR, where the outer alignment is bigger than
7757 inner alignment, force the inner to be sufficiently aligned. */
7758 if (CONSTANT_CLASS_P (inner)
7759 && TYPE_ALIGN (TREE_TYPE (inner)) < TYPE_ALIGN (TREE_TYPE (exp)))
7760 {
7761 inner = copy_node (inner);
7762 TREE_TYPE (inner) = copy_node (TREE_TYPE (inner));
7763 TYPE_ALIGN (TREE_TYPE (inner)) = TYPE_ALIGN (TREE_TYPE (exp));
7764 TYPE_USER_ALIGN (TREE_TYPE (inner)) = 1;
7765 }
7766 result = expand_expr_addr_expr_1 (inner, subtarget, tmode, modifier, as);
7767
7768 if (offset)
7769 {
7770 rtx tmp;
7771
7772 if (modifier != EXPAND_NORMAL)
7773 result = force_operand (result, NULL);
7774 tmp = expand_expr (offset, NULL_RTX, tmode,
7775 modifier == EXPAND_INITIALIZER
7776 ? EXPAND_INITIALIZER : EXPAND_NORMAL);
7777
7778 /* expand_expr is allowed to return an object in a mode other
7779 than TMODE. If it did, we need to convert. */
7780 if (GET_MODE (tmp) != VOIDmode && tmode != GET_MODE (tmp))
7781 tmp = convert_modes (tmode, GET_MODE (tmp),
7782 tmp, TYPE_UNSIGNED (TREE_TYPE (offset)));
7783 result = convert_memory_address_addr_space (tmode, result, as);
7784 tmp = convert_memory_address_addr_space (tmode, tmp, as);
7785
7786 if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
7787 result = simplify_gen_binary (PLUS, tmode, result, tmp);
7788 else
7789 {
7790 subtarget = bitpos ? NULL_RTX : target;
7791 result = expand_simple_binop (tmode, PLUS, result, tmp, subtarget,
7792 1, OPTAB_LIB_WIDEN);
7793 }
7794 }
7795
7796 if (bitpos)
7797 {
7798 /* Someone beforehand should have rejected taking the address
7799 of such an object. */
7800 gcc_assert ((bitpos % BITS_PER_UNIT) == 0);
7801
7802 result = convert_memory_address_addr_space (tmode, result, as);
7803 result = plus_constant (tmode, result, bitpos / BITS_PER_UNIT);
7804 if (modifier < EXPAND_SUM)
7805 result = force_operand (result, target);
7806 }
7807
7808 return result;
7809 }
7810
7811 /* A subroutine of expand_expr. Evaluate EXP, which is an ADDR_EXPR.
7812 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
7813
7814 static rtx
7815 expand_expr_addr_expr (tree exp, rtx target, machine_mode tmode,
7816 enum expand_modifier modifier)
7817 {
7818 addr_space_t as = ADDR_SPACE_GENERIC;
7819 machine_mode address_mode = Pmode;
7820 machine_mode pointer_mode = ptr_mode;
7821 machine_mode rmode;
7822 rtx result;
7823
7824 /* Target mode of VOIDmode says "whatever's natural". */
7825 if (tmode == VOIDmode)
7826 tmode = TYPE_MODE (TREE_TYPE (exp));
7827
7828 if (POINTER_TYPE_P (TREE_TYPE (exp)))
7829 {
7830 as = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (exp)));
7831 address_mode = targetm.addr_space.address_mode (as);
7832 pointer_mode = targetm.addr_space.pointer_mode (as);
7833 }
7834
7835 /* We can get called with some Weird Things if the user does silliness
7836 like "(short) &a". In that case, convert_memory_address won't do
7837 the right thing, so ignore the given target mode. */
7838 if (tmode != address_mode && tmode != pointer_mode)
7839 tmode = address_mode;
7840
7841 result = expand_expr_addr_expr_1 (TREE_OPERAND (exp, 0), target,
7842 tmode, modifier, as);
7843
7844 /* Despite expand_expr claims concerning ignoring TMODE when not
7845 strictly convenient, stuff breaks if we don't honor it. Note
7846 that combined with the above, we only do this for pointer modes. */
7847 rmode = GET_MODE (result);
7848 if (rmode == VOIDmode)
7849 rmode = tmode;
7850 if (rmode != tmode)
7851 result = convert_memory_address_addr_space (tmode, result, as);
7852
7853 return result;
7854 }
7855
7856 /* Generate code for computing CONSTRUCTOR EXP.
7857 An rtx for the computed value is returned. If AVOID_TEMP_MEM
7858 is TRUE, instead of creating a temporary variable in memory
7859 NULL is returned and the caller needs to handle it differently. */
7860
7861 static rtx
7862 expand_constructor (tree exp, rtx target, enum expand_modifier modifier,
7863 bool avoid_temp_mem)
7864 {
7865 tree type = TREE_TYPE (exp);
7866 machine_mode mode = TYPE_MODE (type);
7867
7868 /* Try to avoid creating a temporary at all. This is possible
7869 if all of the initializer is zero.
7870 FIXME: try to handle all [0..255] initializers we can handle
7871 with memset. */
7872 if (TREE_STATIC (exp)
7873 && !TREE_ADDRESSABLE (exp)
7874 && target != 0 && mode == BLKmode
7875 && all_zeros_p (exp))
7876 {
7877 clear_storage (target, expr_size (exp), BLOCK_OP_NORMAL);
7878 return target;
7879 }
7880
7881 /* All elts simple constants => refer to a constant in memory. But
7882 if this is a non-BLKmode mode, let it store a field at a time
7883 since that should make a CONST_INT, CONST_WIDE_INT or
7884 CONST_DOUBLE when we fold. Likewise, if we have a target we can
7885 use, it is best to store directly into the target unless the type
7886 is large enough that memcpy will be used. If we are making an
7887 initializer and all operands are constant, put it in memory as
7888 well.
7889
7890 FIXME: Avoid trying to fill vector constructors piece-meal.
7891 Output them with output_constant_def below unless we're sure
7892 they're zeros. This should go away when vector initializers
7893 are treated like VECTOR_CST instead of arrays. */
7894 if ((TREE_STATIC (exp)
7895 && ((mode == BLKmode
7896 && ! (target != 0 && safe_from_p (target, exp, 1)))
7897 || TREE_ADDRESSABLE (exp)
7898 || (tree_fits_uhwi_p (TYPE_SIZE_UNIT (type))
7899 && (! can_move_by_pieces
7900 (tree_to_uhwi (TYPE_SIZE_UNIT (type)),
7901 TYPE_ALIGN (type)))
7902 && ! mostly_zeros_p (exp))))
7903 || ((modifier == EXPAND_INITIALIZER || modifier == EXPAND_CONST_ADDRESS)
7904 && TREE_CONSTANT (exp)))
7905 {
7906 rtx constructor;
7907
7908 if (avoid_temp_mem)
7909 return NULL_RTX;
7910
7911 constructor = expand_expr_constant (exp, 1, modifier);
7912
7913 if (modifier != EXPAND_CONST_ADDRESS
7914 && modifier != EXPAND_INITIALIZER
7915 && modifier != EXPAND_SUM)
7916 constructor = validize_mem (constructor);
7917
7918 return constructor;
7919 }
7920
7921 /* Handle calls that pass values in multiple non-contiguous
7922 locations. The Irix 6 ABI has examples of this. */
7923 if (target == 0 || ! safe_from_p (target, exp, 1)
7924 || GET_CODE (target) == PARALLEL || modifier == EXPAND_STACK_PARM)
7925 {
7926 if (avoid_temp_mem)
7927 return NULL_RTX;
7928
7929 target = assign_temp (type, TREE_ADDRESSABLE (exp), 1);
7930 }
7931
7932 store_constructor (exp, target, 0, int_expr_size (exp));
7933 return target;
7934 }
7935
7936
7937 /* expand_expr: generate code for computing expression EXP.
7938 An rtx for the computed value is returned. The value is never null.
7939 In the case of a void EXP, const0_rtx is returned.
7940
7941 The value may be stored in TARGET if TARGET is nonzero.
7942 TARGET is just a suggestion; callers must assume that
7943 the rtx returned may not be the same as TARGET.
7944
7945 If TARGET is CONST0_RTX, it means that the value will be ignored.
7946
7947 If TMODE is not VOIDmode, it suggests generating the
7948 result in mode TMODE. But this is done only when convenient.
7949 Otherwise, TMODE is ignored and the value generated in its natural mode.
7950 TMODE is just a suggestion; callers must assume that
7951 the rtx returned may not have mode TMODE.
7952
7953 Note that TARGET may have neither TMODE nor MODE. In that case, it
7954 probably will not be used.
7955
7956 If MODIFIER is EXPAND_SUM then when EXP is an addition
7957 we can return an rtx of the form (MULT (REG ...) (CONST_INT ...))
7958 or a nest of (PLUS ...) and (MINUS ...) where the terms are
7959 products as above, or REG or MEM, or constant.
7960 Ordinarily in such cases we would output mul or add instructions
7961 and then return a pseudo reg containing the sum.
7962
7963 EXPAND_INITIALIZER is much like EXPAND_SUM except that
7964 it also marks a label as absolutely required (it can't be dead).
7965 It also makes a ZERO_EXTEND or SIGN_EXTEND instead of emitting extend insns.
7966 This is used for outputting expressions used in initializers.
7967
7968 EXPAND_CONST_ADDRESS says that it is okay to return a MEM
7969 with a constant address even if that address is not normally legitimate.
7970 EXPAND_INITIALIZER and EXPAND_SUM also have this effect.
7971
7972 EXPAND_STACK_PARM is used when expanding to a TARGET on the stack for
7973 a call parameter. Such targets require special care as we haven't yet
7974 marked TARGET so that it's safe from being trashed by libcalls. We
7975 don't want to use TARGET for anything but the final result;
7976 Intermediate values must go elsewhere. Additionally, calls to
7977 emit_block_move will be flagged with BLOCK_OP_CALL_PARM.
7978
7979 If EXP is a VAR_DECL whose DECL_RTL was a MEM with an invalid
7980 address, and ALT_RTL is non-NULL, then *ALT_RTL is set to the
7981 DECL_RTL of the VAR_DECL. *ALT_RTL is also set if EXP is a
7982 COMPOUND_EXPR whose second argument is such a VAR_DECL, and so on
7983 recursively.
7984
7985 If INNER_REFERENCE_P is true, we are expanding an inner reference.
7986 In this case, we don't adjust a returned MEM rtx that wouldn't be
7987 sufficiently aligned for its mode; instead, it's up to the caller
7988 to deal with it afterwards. This is used to make sure that unaligned
7989 base objects for which out-of-bounds accesses are supported, for
7990 example record types with trailing arrays, aren't realigned behind
7991 the back of the caller.
7992 The normal operating mode is to pass FALSE for this parameter. */
7993
7994 rtx
7995 expand_expr_real (tree exp, rtx target, machine_mode tmode,
7996 enum expand_modifier modifier, rtx *alt_rtl,
7997 bool inner_reference_p)
7998 {
7999 rtx ret;
8000
8001 /* Handle ERROR_MARK before anybody tries to access its type. */
8002 if (TREE_CODE (exp) == ERROR_MARK
8003 || (TREE_CODE (TREE_TYPE (exp)) == ERROR_MARK))
8004 {
8005 ret = CONST0_RTX (tmode);
8006 return ret ? ret : const0_rtx;
8007 }
8008
8009 ret = expand_expr_real_1 (exp, target, tmode, modifier, alt_rtl,
8010 inner_reference_p);
8011 return ret;
8012 }
8013
8014 /* Try to expand the conditional expression which is represented by
8015 TREEOP0 ? TREEOP1 : TREEOP2 using conditonal moves. If succeseds
8016 return the rtl reg which repsents the result. Otherwise return
8017 NULL_RTL. */
8018
8019 static rtx
8020 expand_cond_expr_using_cmove (tree treeop0 ATTRIBUTE_UNUSED,
8021 tree treeop1 ATTRIBUTE_UNUSED,
8022 tree treeop2 ATTRIBUTE_UNUSED)
8023 {
8024 #ifdef HAVE_conditional_move
8025 rtx insn;
8026 rtx op00, op01, op1, op2;
8027 enum rtx_code comparison_code;
8028 machine_mode comparison_mode;
8029 gimple srcstmt;
8030 rtx temp;
8031 tree type = TREE_TYPE (treeop1);
8032 int unsignedp = TYPE_UNSIGNED (type);
8033 machine_mode mode = TYPE_MODE (type);
8034 machine_mode orig_mode = mode;
8035
8036 /* If we cannot do a conditional move on the mode, try doing it
8037 with the promoted mode. */
8038 if (!can_conditionally_move_p (mode))
8039 {
8040 mode = promote_mode (type, mode, &unsignedp);
8041 if (!can_conditionally_move_p (mode))
8042 return NULL_RTX;
8043 temp = assign_temp (type, 0, 0); /* Use promoted mode for temp. */
8044 }
8045 else
8046 temp = assign_temp (type, 0, 1);
8047
8048 start_sequence ();
8049 expand_operands (treeop1, treeop2,
8050 temp, &op1, &op2, EXPAND_NORMAL);
8051
8052 if (TREE_CODE (treeop0) == SSA_NAME
8053 && (srcstmt = get_def_for_expr_class (treeop0, tcc_comparison)))
8054 {
8055 tree type = TREE_TYPE (gimple_assign_rhs1 (srcstmt));
8056 enum tree_code cmpcode = gimple_assign_rhs_code (srcstmt);
8057 op00 = expand_normal (gimple_assign_rhs1 (srcstmt));
8058 op01 = expand_normal (gimple_assign_rhs2 (srcstmt));
8059 comparison_mode = TYPE_MODE (type);
8060 unsignedp = TYPE_UNSIGNED (type);
8061 comparison_code = convert_tree_comp_to_rtx (cmpcode, unsignedp);
8062 }
8063 else if (COMPARISON_CLASS_P (treeop0))
8064 {
8065 tree type = TREE_TYPE (TREE_OPERAND (treeop0, 0));
8066 enum tree_code cmpcode = TREE_CODE (treeop0);
8067 op00 = expand_normal (TREE_OPERAND (treeop0, 0));
8068 op01 = expand_normal (TREE_OPERAND (treeop0, 1));
8069 unsignedp = TYPE_UNSIGNED (type);
8070 comparison_mode = TYPE_MODE (type);
8071 comparison_code = convert_tree_comp_to_rtx (cmpcode, unsignedp);
8072 }
8073 else
8074 {
8075 op00 = expand_normal (treeop0);
8076 op01 = const0_rtx;
8077 comparison_code = NE;
8078 comparison_mode = GET_MODE (op00);
8079 if (comparison_mode == VOIDmode)
8080 comparison_mode = TYPE_MODE (TREE_TYPE (treeop0));
8081 }
8082
8083 if (GET_MODE (op1) != mode)
8084 op1 = gen_lowpart (mode, op1);
8085
8086 if (GET_MODE (op2) != mode)
8087 op2 = gen_lowpart (mode, op2);
8088
8089 /* Try to emit the conditional move. */
8090 insn = emit_conditional_move (temp, comparison_code,
8091 op00, op01, comparison_mode,
8092 op1, op2, mode,
8093 unsignedp);
8094
8095 /* If we could do the conditional move, emit the sequence,
8096 and return. */
8097 if (insn)
8098 {
8099 rtx_insn *seq = get_insns ();
8100 end_sequence ();
8101 emit_insn (seq);
8102 return convert_modes (orig_mode, mode, temp, 0);
8103 }
8104
8105 /* Otherwise discard the sequence and fall back to code with
8106 branches. */
8107 end_sequence ();
8108 #endif
8109 return NULL_RTX;
8110 }
8111
8112 rtx
8113 expand_expr_real_2 (sepops ops, rtx target, machine_mode tmode,
8114 enum expand_modifier modifier)
8115 {
8116 rtx op0, op1, op2, temp;
8117 rtx_code_label *lab;
8118 tree type;
8119 int unsignedp;
8120 machine_mode mode;
8121 enum tree_code code = ops->code;
8122 optab this_optab;
8123 rtx subtarget, original_target;
8124 int ignore;
8125 bool reduce_bit_field;
8126 location_t loc = ops->location;
8127 tree treeop0, treeop1, treeop2;
8128 #define REDUCE_BIT_FIELD(expr) (reduce_bit_field \
8129 ? reduce_to_bit_field_precision ((expr), \
8130 target, \
8131 type) \
8132 : (expr))
8133
8134 type = ops->type;
8135 mode = TYPE_MODE (type);
8136 unsignedp = TYPE_UNSIGNED (type);
8137
8138 treeop0 = ops->op0;
8139 treeop1 = ops->op1;
8140 treeop2 = ops->op2;
8141
8142 /* We should be called only on simple (binary or unary) expressions,
8143 exactly those that are valid in gimple expressions that aren't
8144 GIMPLE_SINGLE_RHS (or invalid). */
8145 gcc_assert (get_gimple_rhs_class (code) == GIMPLE_UNARY_RHS
8146 || get_gimple_rhs_class (code) == GIMPLE_BINARY_RHS
8147 || get_gimple_rhs_class (code) == GIMPLE_TERNARY_RHS);
8148
8149 ignore = (target == const0_rtx
8150 || ((CONVERT_EXPR_CODE_P (code)
8151 || code == COND_EXPR || code == VIEW_CONVERT_EXPR)
8152 && TREE_CODE (type) == VOID_TYPE));
8153
8154 /* We should be called only if we need the result. */
8155 gcc_assert (!ignore);
8156
8157 /* An operation in what may be a bit-field type needs the
8158 result to be reduced to the precision of the bit-field type,
8159 which is narrower than that of the type's mode. */
8160 reduce_bit_field = (INTEGRAL_TYPE_P (type)
8161 && GET_MODE_PRECISION (mode) > TYPE_PRECISION (type));
8162
8163 if (reduce_bit_field && modifier == EXPAND_STACK_PARM)
8164 target = 0;
8165
8166 /* Use subtarget as the target for operand 0 of a binary operation. */
8167 subtarget = get_subtarget (target);
8168 original_target = target;
8169
8170 switch (code)
8171 {
8172 case NON_LVALUE_EXPR:
8173 case PAREN_EXPR:
8174 CASE_CONVERT:
8175 if (treeop0 == error_mark_node)
8176 return const0_rtx;
8177
8178 if (TREE_CODE (type) == UNION_TYPE)
8179 {
8180 tree valtype = TREE_TYPE (treeop0);
8181
8182 /* If both input and output are BLKmode, this conversion isn't doing
8183 anything except possibly changing memory attribute. */
8184 if (mode == BLKmode && TYPE_MODE (valtype) == BLKmode)
8185 {
8186 rtx result = expand_expr (treeop0, target, tmode,
8187 modifier);
8188
8189 result = copy_rtx (result);
8190 set_mem_attributes (result, type, 0);
8191 return result;
8192 }
8193
8194 if (target == 0)
8195 {
8196 if (TYPE_MODE (type) != BLKmode)
8197 target = gen_reg_rtx (TYPE_MODE (type));
8198 else
8199 target = assign_temp (type, 1, 1);
8200 }
8201
8202 if (MEM_P (target))
8203 /* Store data into beginning of memory target. */
8204 store_expr (treeop0,
8205 adjust_address (target, TYPE_MODE (valtype), 0),
8206 modifier == EXPAND_STACK_PARM,
8207 false);
8208
8209 else
8210 {
8211 gcc_assert (REG_P (target));
8212
8213 /* Store this field into a union of the proper type. */
8214 store_field (target,
8215 MIN ((int_size_in_bytes (TREE_TYPE
8216 (treeop0))
8217 * BITS_PER_UNIT),
8218 (HOST_WIDE_INT) GET_MODE_BITSIZE (mode)),
8219 0, 0, 0, TYPE_MODE (valtype), treeop0, 0, false);
8220 }
8221
8222 /* Return the entire union. */
8223 return target;
8224 }
8225
8226 if (mode == TYPE_MODE (TREE_TYPE (treeop0)))
8227 {
8228 op0 = expand_expr (treeop0, target, VOIDmode,
8229 modifier);
8230
8231 /* If the signedness of the conversion differs and OP0 is
8232 a promoted SUBREG, clear that indication since we now
8233 have to do the proper extension. */
8234 if (TYPE_UNSIGNED (TREE_TYPE (treeop0)) != unsignedp
8235 && GET_CODE (op0) == SUBREG)
8236 SUBREG_PROMOTED_VAR_P (op0) = 0;
8237
8238 return REDUCE_BIT_FIELD (op0);
8239 }
8240
8241 op0 = expand_expr (treeop0, NULL_RTX, mode,
8242 modifier == EXPAND_SUM ? EXPAND_NORMAL : modifier);
8243 if (GET_MODE (op0) == mode)
8244 ;
8245
8246 /* If OP0 is a constant, just convert it into the proper mode. */
8247 else if (CONSTANT_P (op0))
8248 {
8249 tree inner_type = TREE_TYPE (treeop0);
8250 machine_mode inner_mode = GET_MODE (op0);
8251
8252 if (inner_mode == VOIDmode)
8253 inner_mode = TYPE_MODE (inner_type);
8254
8255 if (modifier == EXPAND_INITIALIZER)
8256 op0 = simplify_gen_subreg (mode, op0, inner_mode,
8257 subreg_lowpart_offset (mode,
8258 inner_mode));
8259 else
8260 op0= convert_modes (mode, inner_mode, op0,
8261 TYPE_UNSIGNED (inner_type));
8262 }
8263
8264 else if (modifier == EXPAND_INITIALIZER)
8265 op0 = gen_rtx_fmt_e (unsignedp ? ZERO_EXTEND : SIGN_EXTEND, mode, op0);
8266
8267 else if (target == 0)
8268 op0 = convert_to_mode (mode, op0,
8269 TYPE_UNSIGNED (TREE_TYPE
8270 (treeop0)));
8271 else
8272 {
8273 convert_move (target, op0,
8274 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
8275 op0 = target;
8276 }
8277
8278 return REDUCE_BIT_FIELD (op0);
8279
8280 case ADDR_SPACE_CONVERT_EXPR:
8281 {
8282 tree treeop0_type = TREE_TYPE (treeop0);
8283 addr_space_t as_to;
8284 addr_space_t as_from;
8285
8286 gcc_assert (POINTER_TYPE_P (type));
8287 gcc_assert (POINTER_TYPE_P (treeop0_type));
8288
8289 as_to = TYPE_ADDR_SPACE (TREE_TYPE (type));
8290 as_from = TYPE_ADDR_SPACE (TREE_TYPE (treeop0_type));
8291
8292 /* Conversions between pointers to the same address space should
8293 have been implemented via CONVERT_EXPR / NOP_EXPR. */
8294 gcc_assert (as_to != as_from);
8295
8296 /* Ask target code to handle conversion between pointers
8297 to overlapping address spaces. */
8298 if (targetm.addr_space.subset_p (as_to, as_from)
8299 || targetm.addr_space.subset_p (as_from, as_to))
8300 {
8301 op0 = expand_expr (treeop0, NULL_RTX, VOIDmode, modifier);
8302 op0 = targetm.addr_space.convert (op0, treeop0_type, type);
8303 gcc_assert (op0);
8304 return op0;
8305 }
8306
8307 /* For disjoint address spaces, converting anything but
8308 a null pointer invokes undefined behaviour. We simply
8309 always return a null pointer here. */
8310 return CONST0_RTX (mode);
8311 }
8312
8313 case POINTER_PLUS_EXPR:
8314 /* Even though the sizetype mode and the pointer's mode can be different
8315 expand is able to handle this correctly and get the correct result out
8316 of the PLUS_EXPR code. */
8317 /* Make sure to sign-extend the sizetype offset in a POINTER_PLUS_EXPR
8318 if sizetype precision is smaller than pointer precision. */
8319 if (TYPE_PRECISION (sizetype) < TYPE_PRECISION (type))
8320 treeop1 = fold_convert_loc (loc, type,
8321 fold_convert_loc (loc, ssizetype,
8322 treeop1));
8323 /* If sizetype precision is larger than pointer precision, truncate the
8324 offset to have matching modes. */
8325 else if (TYPE_PRECISION (sizetype) > TYPE_PRECISION (type))
8326 treeop1 = fold_convert_loc (loc, type, treeop1);
8327
8328 case PLUS_EXPR:
8329 /* If we are adding a constant, a VAR_DECL that is sp, fp, or ap, and
8330 something else, make sure we add the register to the constant and
8331 then to the other thing. This case can occur during strength
8332 reduction and doing it this way will produce better code if the
8333 frame pointer or argument pointer is eliminated.
8334
8335 fold-const.c will ensure that the constant is always in the inner
8336 PLUS_EXPR, so the only case we need to do anything about is if
8337 sp, ap, or fp is our second argument, in which case we must swap
8338 the innermost first argument and our second argument. */
8339
8340 if (TREE_CODE (treeop0) == PLUS_EXPR
8341 && TREE_CODE (TREE_OPERAND (treeop0, 1)) == INTEGER_CST
8342 && TREE_CODE (treeop1) == VAR_DECL
8343 && (DECL_RTL (treeop1) == frame_pointer_rtx
8344 || DECL_RTL (treeop1) == stack_pointer_rtx
8345 || DECL_RTL (treeop1) == arg_pointer_rtx))
8346 {
8347 gcc_unreachable ();
8348 }
8349
8350 /* If the result is to be ptr_mode and we are adding an integer to
8351 something, we might be forming a constant. So try to use
8352 plus_constant. If it produces a sum and we can't accept it,
8353 use force_operand. This allows P = &ARR[const] to generate
8354 efficient code on machines where a SYMBOL_REF is not a valid
8355 address.
8356
8357 If this is an EXPAND_SUM call, always return the sum. */
8358 if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER
8359 || (mode == ptr_mode && (unsignedp || ! flag_trapv)))
8360 {
8361 if (modifier == EXPAND_STACK_PARM)
8362 target = 0;
8363 if (TREE_CODE (treeop0) == INTEGER_CST
8364 && GET_MODE_PRECISION (mode) <= HOST_BITS_PER_WIDE_INT
8365 && TREE_CONSTANT (treeop1))
8366 {
8367 rtx constant_part;
8368 HOST_WIDE_INT wc;
8369 machine_mode wmode = TYPE_MODE (TREE_TYPE (treeop1));
8370
8371 op1 = expand_expr (treeop1, subtarget, VOIDmode,
8372 EXPAND_SUM);
8373 /* Use wi::shwi to ensure that the constant is
8374 truncated according to the mode of OP1, then sign extended
8375 to a HOST_WIDE_INT. Using the constant directly can result
8376 in non-canonical RTL in a 64x32 cross compile. */
8377 wc = TREE_INT_CST_LOW (treeop0);
8378 constant_part =
8379 immed_wide_int_const (wi::shwi (wc, wmode), wmode);
8380 op1 = plus_constant (mode, op1, INTVAL (constant_part));
8381 if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8382 op1 = force_operand (op1, target);
8383 return REDUCE_BIT_FIELD (op1);
8384 }
8385
8386 else if (TREE_CODE (treeop1) == INTEGER_CST
8387 && GET_MODE_PRECISION (mode) <= HOST_BITS_PER_WIDE_INT
8388 && TREE_CONSTANT (treeop0))
8389 {
8390 rtx constant_part;
8391 HOST_WIDE_INT wc;
8392 machine_mode wmode = TYPE_MODE (TREE_TYPE (treeop0));
8393
8394 op0 = expand_expr (treeop0, subtarget, VOIDmode,
8395 (modifier == EXPAND_INITIALIZER
8396 ? EXPAND_INITIALIZER : EXPAND_SUM));
8397 if (! CONSTANT_P (op0))
8398 {
8399 op1 = expand_expr (treeop1, NULL_RTX,
8400 VOIDmode, modifier);
8401 /* Return a PLUS if modifier says it's OK. */
8402 if (modifier == EXPAND_SUM
8403 || modifier == EXPAND_INITIALIZER)
8404 return simplify_gen_binary (PLUS, mode, op0, op1);
8405 goto binop2;
8406 }
8407 /* Use wi::shwi to ensure that the constant is
8408 truncated according to the mode of OP1, then sign extended
8409 to a HOST_WIDE_INT. Using the constant directly can result
8410 in non-canonical RTL in a 64x32 cross compile. */
8411 wc = TREE_INT_CST_LOW (treeop1);
8412 constant_part
8413 = immed_wide_int_const (wi::shwi (wc, wmode), wmode);
8414 op0 = plus_constant (mode, op0, INTVAL (constant_part));
8415 if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8416 op0 = force_operand (op0, target);
8417 return REDUCE_BIT_FIELD (op0);
8418 }
8419 }
8420
8421 /* Use TER to expand pointer addition of a negated value
8422 as pointer subtraction. */
8423 if ((POINTER_TYPE_P (TREE_TYPE (treeop0))
8424 || (TREE_CODE (TREE_TYPE (treeop0)) == VECTOR_TYPE
8425 && POINTER_TYPE_P (TREE_TYPE (TREE_TYPE (treeop0)))))
8426 && TREE_CODE (treeop1) == SSA_NAME
8427 && TYPE_MODE (TREE_TYPE (treeop0))
8428 == TYPE_MODE (TREE_TYPE (treeop1)))
8429 {
8430 gimple def = get_def_for_expr (treeop1, NEGATE_EXPR);
8431 if (def)
8432 {
8433 treeop1 = gimple_assign_rhs1 (def);
8434 code = MINUS_EXPR;
8435 goto do_minus;
8436 }
8437 }
8438
8439 /* No sense saving up arithmetic to be done
8440 if it's all in the wrong mode to form part of an address.
8441 And force_operand won't know whether to sign-extend or
8442 zero-extend. */
8443 if ((modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8444 || mode != ptr_mode)
8445 {
8446 expand_operands (treeop0, treeop1,
8447 subtarget, &op0, &op1, EXPAND_NORMAL);
8448 if (op0 == const0_rtx)
8449 return op1;
8450 if (op1 == const0_rtx)
8451 return op0;
8452 goto binop2;
8453 }
8454
8455 expand_operands (treeop0, treeop1,
8456 subtarget, &op0, &op1, modifier);
8457 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1));
8458
8459 case MINUS_EXPR:
8460 do_minus:
8461 /* For initializers, we are allowed to return a MINUS of two
8462 symbolic constants. Here we handle all cases when both operands
8463 are constant. */
8464 /* Handle difference of two symbolic constants,
8465 for the sake of an initializer. */
8466 if ((modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
8467 && really_constant_p (treeop0)
8468 && really_constant_p (treeop1))
8469 {
8470 expand_operands (treeop0, treeop1,
8471 NULL_RTX, &op0, &op1, modifier);
8472
8473 /* If the last operand is a CONST_INT, use plus_constant of
8474 the negated constant. Else make the MINUS. */
8475 if (CONST_INT_P (op1))
8476 return REDUCE_BIT_FIELD (plus_constant (mode, op0,
8477 -INTVAL (op1)));
8478 else
8479 return REDUCE_BIT_FIELD (gen_rtx_MINUS (mode, op0, op1));
8480 }
8481
8482 /* No sense saving up arithmetic to be done
8483 if it's all in the wrong mode to form part of an address.
8484 And force_operand won't know whether to sign-extend or
8485 zero-extend. */
8486 if ((modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8487 || mode != ptr_mode)
8488 goto binop;
8489
8490 expand_operands (treeop0, treeop1,
8491 subtarget, &op0, &op1, modifier);
8492
8493 /* Convert A - const to A + (-const). */
8494 if (CONST_INT_P (op1))
8495 {
8496 op1 = negate_rtx (mode, op1);
8497 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1));
8498 }
8499
8500 goto binop2;
8501
8502 case WIDEN_MULT_PLUS_EXPR:
8503 case WIDEN_MULT_MINUS_EXPR:
8504 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8505 op2 = expand_normal (treeop2);
8506 target = expand_widen_pattern_expr (ops, op0, op1, op2,
8507 target, unsignedp);
8508 return target;
8509
8510 case WIDEN_MULT_EXPR:
8511 /* If first operand is constant, swap them.
8512 Thus the following special case checks need only
8513 check the second operand. */
8514 if (TREE_CODE (treeop0) == INTEGER_CST)
8515 {
8516 tree t1 = treeop0;
8517 treeop0 = treeop1;
8518 treeop1 = t1;
8519 }
8520
8521 /* First, check if we have a multiplication of one signed and one
8522 unsigned operand. */
8523 if (TREE_CODE (treeop1) != INTEGER_CST
8524 && (TYPE_UNSIGNED (TREE_TYPE (treeop0))
8525 != TYPE_UNSIGNED (TREE_TYPE (treeop1))))
8526 {
8527 machine_mode innermode = TYPE_MODE (TREE_TYPE (treeop0));
8528 this_optab = usmul_widen_optab;
8529 if (find_widening_optab_handler (this_optab, mode, innermode, 0)
8530 != CODE_FOR_nothing)
8531 {
8532 if (TYPE_UNSIGNED (TREE_TYPE (treeop0)))
8533 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1,
8534 EXPAND_NORMAL);
8535 else
8536 expand_operands (treeop0, treeop1, NULL_RTX, &op1, &op0,
8537 EXPAND_NORMAL);
8538 /* op0 and op1 might still be constant, despite the above
8539 != INTEGER_CST check. Handle it. */
8540 if (GET_MODE (op0) == VOIDmode && GET_MODE (op1) == VOIDmode)
8541 {
8542 op0 = convert_modes (innermode, mode, op0, true);
8543 op1 = convert_modes (innermode, mode, op1, false);
8544 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1,
8545 target, unsignedp));
8546 }
8547 goto binop3;
8548 }
8549 }
8550 /* Check for a multiplication with matching signedness. */
8551 else if ((TREE_CODE (treeop1) == INTEGER_CST
8552 && int_fits_type_p (treeop1, TREE_TYPE (treeop0)))
8553 || (TYPE_UNSIGNED (TREE_TYPE (treeop1))
8554 == TYPE_UNSIGNED (TREE_TYPE (treeop0))))
8555 {
8556 tree op0type = TREE_TYPE (treeop0);
8557 machine_mode innermode = TYPE_MODE (op0type);
8558 bool zextend_p = TYPE_UNSIGNED (op0type);
8559 optab other_optab = zextend_p ? smul_widen_optab : umul_widen_optab;
8560 this_optab = zextend_p ? umul_widen_optab : smul_widen_optab;
8561
8562 if (TREE_CODE (treeop0) != INTEGER_CST)
8563 {
8564 if (find_widening_optab_handler (this_optab, mode, innermode, 0)
8565 != CODE_FOR_nothing)
8566 {
8567 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1,
8568 EXPAND_NORMAL);
8569 /* op0 and op1 might still be constant, despite the above
8570 != INTEGER_CST check. Handle it. */
8571 if (GET_MODE (op0) == VOIDmode && GET_MODE (op1) == VOIDmode)
8572 {
8573 widen_mult_const:
8574 op0 = convert_modes (innermode, mode, op0, zextend_p);
8575 op1
8576 = convert_modes (innermode, mode, op1,
8577 TYPE_UNSIGNED (TREE_TYPE (treeop1)));
8578 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1,
8579 target,
8580 unsignedp));
8581 }
8582 temp = expand_widening_mult (mode, op0, op1, target,
8583 unsignedp, this_optab);
8584 return REDUCE_BIT_FIELD (temp);
8585 }
8586 if (find_widening_optab_handler (other_optab, mode, innermode, 0)
8587 != CODE_FOR_nothing
8588 && innermode == word_mode)
8589 {
8590 rtx htem, hipart;
8591 op0 = expand_normal (treeop0);
8592 if (TREE_CODE (treeop1) == INTEGER_CST)
8593 op1 = convert_modes (innermode, mode,
8594 expand_normal (treeop1),
8595 TYPE_UNSIGNED (TREE_TYPE (treeop1)));
8596 else
8597 op1 = expand_normal (treeop1);
8598 /* op0 and op1 might still be constant, despite the above
8599 != INTEGER_CST check. Handle it. */
8600 if (GET_MODE (op0) == VOIDmode && GET_MODE (op1) == VOIDmode)
8601 goto widen_mult_const;
8602 temp = expand_binop (mode, other_optab, op0, op1, target,
8603 unsignedp, OPTAB_LIB_WIDEN);
8604 hipart = gen_highpart (innermode, temp);
8605 htem = expand_mult_highpart_adjust (innermode, hipart,
8606 op0, op1, hipart,
8607 zextend_p);
8608 if (htem != hipart)
8609 emit_move_insn (hipart, htem);
8610 return REDUCE_BIT_FIELD (temp);
8611 }
8612 }
8613 }
8614 treeop0 = fold_build1 (CONVERT_EXPR, type, treeop0);
8615 treeop1 = fold_build1 (CONVERT_EXPR, type, treeop1);
8616 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
8617 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, target, unsignedp));
8618
8619 case FMA_EXPR:
8620 {
8621 optab opt = fma_optab;
8622 gimple def0, def2;
8623
8624 /* If there is no insn for FMA, emit it as __builtin_fma{,f,l}
8625 call. */
8626 if (optab_handler (fma_optab, mode) == CODE_FOR_nothing)
8627 {
8628 tree fn = mathfn_built_in (TREE_TYPE (treeop0), BUILT_IN_FMA);
8629 tree call_expr;
8630
8631 gcc_assert (fn != NULL_TREE);
8632 call_expr = build_call_expr (fn, 3, treeop0, treeop1, treeop2);
8633 return expand_builtin (call_expr, target, subtarget, mode, false);
8634 }
8635
8636 def0 = get_def_for_expr (treeop0, NEGATE_EXPR);
8637 /* The multiplication is commutative - look at its 2nd operand
8638 if the first isn't fed by a negate. */
8639 if (!def0)
8640 {
8641 def0 = get_def_for_expr (treeop1, NEGATE_EXPR);
8642 /* Swap operands if the 2nd operand is fed by a negate. */
8643 if (def0)
8644 {
8645 tree tem = treeop0;
8646 treeop0 = treeop1;
8647 treeop1 = tem;
8648 }
8649 }
8650 def2 = get_def_for_expr (treeop2, NEGATE_EXPR);
8651
8652 op0 = op2 = NULL;
8653
8654 if (def0 && def2
8655 && optab_handler (fnms_optab, mode) != CODE_FOR_nothing)
8656 {
8657 opt = fnms_optab;
8658 op0 = expand_normal (gimple_assign_rhs1 (def0));
8659 op2 = expand_normal (gimple_assign_rhs1 (def2));
8660 }
8661 else if (def0
8662 && optab_handler (fnma_optab, mode) != CODE_FOR_nothing)
8663 {
8664 opt = fnma_optab;
8665 op0 = expand_normal (gimple_assign_rhs1 (def0));
8666 }
8667 else if (def2
8668 && optab_handler (fms_optab, mode) != CODE_FOR_nothing)
8669 {
8670 opt = fms_optab;
8671 op2 = expand_normal (gimple_assign_rhs1 (def2));
8672 }
8673
8674 if (op0 == NULL)
8675 op0 = expand_expr (treeop0, subtarget, VOIDmode, EXPAND_NORMAL);
8676 if (op2 == NULL)
8677 op2 = expand_normal (treeop2);
8678 op1 = expand_normal (treeop1);
8679
8680 return expand_ternary_op (TYPE_MODE (type), opt,
8681 op0, op1, op2, target, 0);
8682 }
8683
8684 case MULT_EXPR:
8685 /* If this is a fixed-point operation, then we cannot use the code
8686 below because "expand_mult" doesn't support sat/no-sat fixed-point
8687 multiplications. */
8688 if (ALL_FIXED_POINT_MODE_P (mode))
8689 goto binop;
8690
8691 /* If first operand is constant, swap them.
8692 Thus the following special case checks need only
8693 check the second operand. */
8694 if (TREE_CODE (treeop0) == INTEGER_CST)
8695 {
8696 tree t1 = treeop0;
8697 treeop0 = treeop1;
8698 treeop1 = t1;
8699 }
8700
8701 /* Attempt to return something suitable for generating an
8702 indexed address, for machines that support that. */
8703
8704 if (modifier == EXPAND_SUM && mode == ptr_mode
8705 && tree_fits_shwi_p (treeop1))
8706 {
8707 tree exp1 = treeop1;
8708
8709 op0 = expand_expr (treeop0, subtarget, VOIDmode,
8710 EXPAND_SUM);
8711
8712 if (!REG_P (op0))
8713 op0 = force_operand (op0, NULL_RTX);
8714 if (!REG_P (op0))
8715 op0 = copy_to_mode_reg (mode, op0);
8716
8717 return REDUCE_BIT_FIELD (gen_rtx_MULT (mode, op0,
8718 gen_int_mode (tree_to_shwi (exp1),
8719 TYPE_MODE (TREE_TYPE (exp1)))));
8720 }
8721
8722 if (modifier == EXPAND_STACK_PARM)
8723 target = 0;
8724
8725 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
8726 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, target, unsignedp));
8727
8728 case TRUNC_DIV_EXPR:
8729 case FLOOR_DIV_EXPR:
8730 case CEIL_DIV_EXPR:
8731 case ROUND_DIV_EXPR:
8732 case EXACT_DIV_EXPR:
8733 /* If this is a fixed-point operation, then we cannot use the code
8734 below because "expand_divmod" doesn't support sat/no-sat fixed-point
8735 divisions. */
8736 if (ALL_FIXED_POINT_MODE_P (mode))
8737 goto binop;
8738
8739 if (modifier == EXPAND_STACK_PARM)
8740 target = 0;
8741 /* Possible optimization: compute the dividend with EXPAND_SUM
8742 then if the divisor is constant can optimize the case
8743 where some terms of the dividend have coeffs divisible by it. */
8744 expand_operands (treeop0, treeop1,
8745 subtarget, &op0, &op1, EXPAND_NORMAL);
8746 return expand_divmod (0, code, mode, op0, op1, target, unsignedp);
8747
8748 case RDIV_EXPR:
8749 goto binop;
8750
8751 case MULT_HIGHPART_EXPR:
8752 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
8753 temp = expand_mult_highpart (mode, op0, op1, target, unsignedp);
8754 gcc_assert (temp);
8755 return temp;
8756
8757 case TRUNC_MOD_EXPR:
8758 case FLOOR_MOD_EXPR:
8759 case CEIL_MOD_EXPR:
8760 case ROUND_MOD_EXPR:
8761 if (modifier == EXPAND_STACK_PARM)
8762 target = 0;
8763 expand_operands (treeop0, treeop1,
8764 subtarget, &op0, &op1, EXPAND_NORMAL);
8765 return expand_divmod (1, code, mode, op0, op1, target, unsignedp);
8766
8767 case FIXED_CONVERT_EXPR:
8768 op0 = expand_normal (treeop0);
8769 if (target == 0 || modifier == EXPAND_STACK_PARM)
8770 target = gen_reg_rtx (mode);
8771
8772 if ((TREE_CODE (TREE_TYPE (treeop0)) == INTEGER_TYPE
8773 && TYPE_UNSIGNED (TREE_TYPE (treeop0)))
8774 || (TREE_CODE (type) == INTEGER_TYPE && TYPE_UNSIGNED (type)))
8775 expand_fixed_convert (target, op0, 1, TYPE_SATURATING (type));
8776 else
8777 expand_fixed_convert (target, op0, 0, TYPE_SATURATING (type));
8778 return target;
8779
8780 case FIX_TRUNC_EXPR:
8781 op0 = expand_normal (treeop0);
8782 if (target == 0 || modifier == EXPAND_STACK_PARM)
8783 target = gen_reg_rtx (mode);
8784 expand_fix (target, op0, unsignedp);
8785 return target;
8786
8787 case FLOAT_EXPR:
8788 op0 = expand_normal (treeop0);
8789 if (target == 0 || modifier == EXPAND_STACK_PARM)
8790 target = gen_reg_rtx (mode);
8791 /* expand_float can't figure out what to do if FROM has VOIDmode.
8792 So give it the correct mode. With -O, cse will optimize this. */
8793 if (GET_MODE (op0) == VOIDmode)
8794 op0 = copy_to_mode_reg (TYPE_MODE (TREE_TYPE (treeop0)),
8795 op0);
8796 expand_float (target, op0,
8797 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
8798 return target;
8799
8800 case NEGATE_EXPR:
8801 op0 = expand_expr (treeop0, subtarget,
8802 VOIDmode, EXPAND_NORMAL);
8803 if (modifier == EXPAND_STACK_PARM)
8804 target = 0;
8805 temp = expand_unop (mode,
8806 optab_for_tree_code (NEGATE_EXPR, type,
8807 optab_default),
8808 op0, target, 0);
8809 gcc_assert (temp);
8810 return REDUCE_BIT_FIELD (temp);
8811
8812 case ABS_EXPR:
8813 op0 = expand_expr (treeop0, subtarget,
8814 VOIDmode, EXPAND_NORMAL);
8815 if (modifier == EXPAND_STACK_PARM)
8816 target = 0;
8817
8818 /* ABS_EXPR is not valid for complex arguments. */
8819 gcc_assert (GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
8820 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT);
8821
8822 /* Unsigned abs is simply the operand. Testing here means we don't
8823 risk generating incorrect code below. */
8824 if (TYPE_UNSIGNED (type))
8825 return op0;
8826
8827 return expand_abs (mode, op0, target, unsignedp,
8828 safe_from_p (target, treeop0, 1));
8829
8830 case MAX_EXPR:
8831 case MIN_EXPR:
8832 target = original_target;
8833 if (target == 0
8834 || modifier == EXPAND_STACK_PARM
8835 || (MEM_P (target) && MEM_VOLATILE_P (target))
8836 || GET_MODE (target) != mode
8837 || (REG_P (target)
8838 && REGNO (target) < FIRST_PSEUDO_REGISTER))
8839 target = gen_reg_rtx (mode);
8840 expand_operands (treeop0, treeop1,
8841 target, &op0, &op1, EXPAND_NORMAL);
8842
8843 /* First try to do it with a special MIN or MAX instruction.
8844 If that does not win, use a conditional jump to select the proper
8845 value. */
8846 this_optab = optab_for_tree_code (code, type, optab_default);
8847 temp = expand_binop (mode, this_optab, op0, op1, target, unsignedp,
8848 OPTAB_WIDEN);
8849 if (temp != 0)
8850 return temp;
8851
8852 /* At this point, a MEM target is no longer useful; we will get better
8853 code without it. */
8854
8855 if (! REG_P (target))
8856 target = gen_reg_rtx (mode);
8857
8858 /* If op1 was placed in target, swap op0 and op1. */
8859 if (target != op0 && target == op1)
8860 std::swap (op0, op1);
8861
8862 /* We generate better code and avoid problems with op1 mentioning
8863 target by forcing op1 into a pseudo if it isn't a constant. */
8864 if (! CONSTANT_P (op1))
8865 op1 = force_reg (mode, op1);
8866
8867 {
8868 enum rtx_code comparison_code;
8869 rtx cmpop1 = op1;
8870
8871 if (code == MAX_EXPR)
8872 comparison_code = unsignedp ? GEU : GE;
8873 else
8874 comparison_code = unsignedp ? LEU : LE;
8875
8876 /* Canonicalize to comparisons against 0. */
8877 if (op1 == const1_rtx)
8878 {
8879 /* Converting (a >= 1 ? a : 1) into (a > 0 ? a : 1)
8880 or (a != 0 ? a : 1) for unsigned.
8881 For MIN we are safe converting (a <= 1 ? a : 1)
8882 into (a <= 0 ? a : 1) */
8883 cmpop1 = const0_rtx;
8884 if (code == MAX_EXPR)
8885 comparison_code = unsignedp ? NE : GT;
8886 }
8887 if (op1 == constm1_rtx && !unsignedp)
8888 {
8889 /* Converting (a >= -1 ? a : -1) into (a >= 0 ? a : -1)
8890 and (a <= -1 ? a : -1) into (a < 0 ? a : -1) */
8891 cmpop1 = const0_rtx;
8892 if (code == MIN_EXPR)
8893 comparison_code = LT;
8894 }
8895 #ifdef HAVE_conditional_move
8896 /* Use a conditional move if possible. */
8897 if (can_conditionally_move_p (mode))
8898 {
8899 rtx insn;
8900
8901 start_sequence ();
8902
8903 /* Try to emit the conditional move. */
8904 insn = emit_conditional_move (target, comparison_code,
8905 op0, cmpop1, mode,
8906 op0, op1, mode,
8907 unsignedp);
8908
8909 /* If we could do the conditional move, emit the sequence,
8910 and return. */
8911 if (insn)
8912 {
8913 rtx_insn *seq = get_insns ();
8914 end_sequence ();
8915 emit_insn (seq);
8916 return target;
8917 }
8918
8919 /* Otherwise discard the sequence and fall back to code with
8920 branches. */
8921 end_sequence ();
8922 }
8923 #endif
8924 if (target != op0)
8925 emit_move_insn (target, op0);
8926
8927 lab = gen_label_rtx ();
8928 do_compare_rtx_and_jump (target, cmpop1, comparison_code,
8929 unsignedp, mode, NULL_RTX, NULL, lab,
8930 -1);
8931 }
8932 emit_move_insn (target, op1);
8933 emit_label (lab);
8934 return target;
8935
8936 case BIT_NOT_EXPR:
8937 op0 = expand_expr (treeop0, subtarget,
8938 VOIDmode, EXPAND_NORMAL);
8939 if (modifier == EXPAND_STACK_PARM)
8940 target = 0;
8941 /* In case we have to reduce the result to bitfield precision
8942 for unsigned bitfield expand this as XOR with a proper constant
8943 instead. */
8944 if (reduce_bit_field && TYPE_UNSIGNED (type))
8945 {
8946 wide_int mask = wi::mask (TYPE_PRECISION (type),
8947 false, GET_MODE_PRECISION (mode));
8948
8949 temp = expand_binop (mode, xor_optab, op0,
8950 immed_wide_int_const (mask, mode),
8951 target, 1, OPTAB_LIB_WIDEN);
8952 }
8953 else
8954 temp = expand_unop (mode, one_cmpl_optab, op0, target, 1);
8955 gcc_assert (temp);
8956 return temp;
8957
8958 /* ??? Can optimize bitwise operations with one arg constant.
8959 Can optimize (a bitwise1 n) bitwise2 (a bitwise3 b)
8960 and (a bitwise1 b) bitwise2 b (etc)
8961 but that is probably not worth while. */
8962
8963 case BIT_AND_EXPR:
8964 case BIT_IOR_EXPR:
8965 case BIT_XOR_EXPR:
8966 goto binop;
8967
8968 case LROTATE_EXPR:
8969 case RROTATE_EXPR:
8970 gcc_assert (VECTOR_MODE_P (TYPE_MODE (type))
8971 || (GET_MODE_PRECISION (TYPE_MODE (type))
8972 == TYPE_PRECISION (type)));
8973 /* fall through */
8974
8975 case LSHIFT_EXPR:
8976 case RSHIFT_EXPR:
8977 /* If this is a fixed-point operation, then we cannot use the code
8978 below because "expand_shift" doesn't support sat/no-sat fixed-point
8979 shifts. */
8980 if (ALL_FIXED_POINT_MODE_P (mode))
8981 goto binop;
8982
8983 if (! safe_from_p (subtarget, treeop1, 1))
8984 subtarget = 0;
8985 if (modifier == EXPAND_STACK_PARM)
8986 target = 0;
8987 op0 = expand_expr (treeop0, subtarget,
8988 VOIDmode, EXPAND_NORMAL);
8989 temp = expand_variable_shift (code, mode, op0, treeop1, target,
8990 unsignedp);
8991 if (code == LSHIFT_EXPR)
8992 temp = REDUCE_BIT_FIELD (temp);
8993 return temp;
8994
8995 /* Could determine the answer when only additive constants differ. Also,
8996 the addition of one can be handled by changing the condition. */
8997 case LT_EXPR:
8998 case LE_EXPR:
8999 case GT_EXPR:
9000 case GE_EXPR:
9001 case EQ_EXPR:
9002 case NE_EXPR:
9003 case UNORDERED_EXPR:
9004 case ORDERED_EXPR:
9005 case UNLT_EXPR:
9006 case UNLE_EXPR:
9007 case UNGT_EXPR:
9008 case UNGE_EXPR:
9009 case UNEQ_EXPR:
9010 case LTGT_EXPR:
9011 {
9012 temp = do_store_flag (ops,
9013 modifier != EXPAND_STACK_PARM ? target : NULL_RTX,
9014 tmode != VOIDmode ? tmode : mode);
9015 if (temp)
9016 return temp;
9017
9018 /* Use a compare and a jump for BLKmode comparisons, or for function
9019 type comparisons is HAVE_canonicalize_funcptr_for_compare. */
9020
9021 if ((target == 0
9022 || modifier == EXPAND_STACK_PARM
9023 || ! safe_from_p (target, treeop0, 1)
9024 || ! safe_from_p (target, treeop1, 1)
9025 /* Make sure we don't have a hard reg (such as function's return
9026 value) live across basic blocks, if not optimizing. */
9027 || (!optimize && REG_P (target)
9028 && REGNO (target) < FIRST_PSEUDO_REGISTER)))
9029 target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode);
9030
9031 emit_move_insn (target, const0_rtx);
9032
9033 rtx_code_label *lab1 = gen_label_rtx ();
9034 jumpifnot_1 (code, treeop0, treeop1, lab1, -1);
9035
9036 if (TYPE_PRECISION (type) == 1 && !TYPE_UNSIGNED (type))
9037 emit_move_insn (target, constm1_rtx);
9038 else
9039 emit_move_insn (target, const1_rtx);
9040
9041 emit_label (lab1);
9042 return target;
9043 }
9044 case COMPLEX_EXPR:
9045 /* Get the rtx code of the operands. */
9046 op0 = expand_normal (treeop0);
9047 op1 = expand_normal (treeop1);
9048
9049 if (!target)
9050 target = gen_reg_rtx (TYPE_MODE (type));
9051 else
9052 /* If target overlaps with op1, then either we need to force
9053 op1 into a pseudo (if target also overlaps with op0),
9054 or write the complex parts in reverse order. */
9055 switch (GET_CODE (target))
9056 {
9057 case CONCAT:
9058 if (reg_overlap_mentioned_p (XEXP (target, 0), op1))
9059 {
9060 if (reg_overlap_mentioned_p (XEXP (target, 1), op0))
9061 {
9062 complex_expr_force_op1:
9063 temp = gen_reg_rtx (GET_MODE_INNER (GET_MODE (target)));
9064 emit_move_insn (temp, op1);
9065 op1 = temp;
9066 break;
9067 }
9068 complex_expr_swap_order:
9069 /* Move the imaginary (op1) and real (op0) parts to their
9070 location. */
9071 write_complex_part (target, op1, true);
9072 write_complex_part (target, op0, false);
9073
9074 return target;
9075 }
9076 break;
9077 case MEM:
9078 temp = adjust_address_nv (target,
9079 GET_MODE_INNER (GET_MODE (target)), 0);
9080 if (reg_overlap_mentioned_p (temp, op1))
9081 {
9082 machine_mode imode = GET_MODE_INNER (GET_MODE (target));
9083 temp = adjust_address_nv (target, imode,
9084 GET_MODE_SIZE (imode));
9085 if (reg_overlap_mentioned_p (temp, op0))
9086 goto complex_expr_force_op1;
9087 goto complex_expr_swap_order;
9088 }
9089 break;
9090 default:
9091 if (reg_overlap_mentioned_p (target, op1))
9092 {
9093 if (reg_overlap_mentioned_p (target, op0))
9094 goto complex_expr_force_op1;
9095 goto complex_expr_swap_order;
9096 }
9097 break;
9098 }
9099
9100 /* Move the real (op0) and imaginary (op1) parts to their location. */
9101 write_complex_part (target, op0, false);
9102 write_complex_part (target, op1, true);
9103
9104 return target;
9105
9106 case WIDEN_SUM_EXPR:
9107 {
9108 tree oprnd0 = treeop0;
9109 tree oprnd1 = treeop1;
9110
9111 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
9112 target = expand_widen_pattern_expr (ops, op0, NULL_RTX, op1,
9113 target, unsignedp);
9114 return target;
9115 }
9116
9117 case REDUC_MAX_EXPR:
9118 case REDUC_MIN_EXPR:
9119 case REDUC_PLUS_EXPR:
9120 {
9121 op0 = expand_normal (treeop0);
9122 this_optab = optab_for_tree_code (code, type, optab_default);
9123 machine_mode vec_mode = TYPE_MODE (TREE_TYPE (treeop0));
9124
9125 if (optab_handler (this_optab, vec_mode) != CODE_FOR_nothing)
9126 {
9127 struct expand_operand ops[2];
9128 enum insn_code icode = optab_handler (this_optab, vec_mode);
9129
9130 create_output_operand (&ops[0], target, mode);
9131 create_input_operand (&ops[1], op0, vec_mode);
9132 if (maybe_expand_insn (icode, 2, ops))
9133 {
9134 target = ops[0].value;
9135 if (GET_MODE (target) != mode)
9136 return gen_lowpart (tmode, target);
9137 return target;
9138 }
9139 }
9140 /* Fall back to optab with vector result, and then extract scalar. */
9141 this_optab = scalar_reduc_to_vector (this_optab, type);
9142 temp = expand_unop (vec_mode, this_optab, op0, NULL_RTX, unsignedp);
9143 gcc_assert (temp);
9144 /* The tree code produces a scalar result, but (somewhat by convention)
9145 the optab produces a vector with the result in element 0 if
9146 little-endian, or element N-1 if big-endian. So pull the scalar
9147 result out of that element. */
9148 int index = BYTES_BIG_ENDIAN ? GET_MODE_NUNITS (vec_mode) - 1 : 0;
9149 int bitsize = GET_MODE_BITSIZE (GET_MODE_INNER (vec_mode));
9150 temp = extract_bit_field (temp, bitsize, bitsize * index, unsignedp,
9151 target, mode, mode);
9152 gcc_assert (temp);
9153 return temp;
9154 }
9155
9156 case VEC_UNPACK_HI_EXPR:
9157 case VEC_UNPACK_LO_EXPR:
9158 {
9159 op0 = expand_normal (treeop0);
9160 temp = expand_widen_pattern_expr (ops, op0, NULL_RTX, NULL_RTX,
9161 target, unsignedp);
9162 gcc_assert (temp);
9163 return temp;
9164 }
9165
9166 case VEC_UNPACK_FLOAT_HI_EXPR:
9167 case VEC_UNPACK_FLOAT_LO_EXPR:
9168 {
9169 op0 = expand_normal (treeop0);
9170 /* The signedness is determined from input operand. */
9171 temp = expand_widen_pattern_expr
9172 (ops, op0, NULL_RTX, NULL_RTX,
9173 target, TYPE_UNSIGNED (TREE_TYPE (treeop0)));
9174
9175 gcc_assert (temp);
9176 return temp;
9177 }
9178
9179 case VEC_WIDEN_MULT_HI_EXPR:
9180 case VEC_WIDEN_MULT_LO_EXPR:
9181 case VEC_WIDEN_MULT_EVEN_EXPR:
9182 case VEC_WIDEN_MULT_ODD_EXPR:
9183 case VEC_WIDEN_LSHIFT_HI_EXPR:
9184 case VEC_WIDEN_LSHIFT_LO_EXPR:
9185 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
9186 target = expand_widen_pattern_expr (ops, op0, op1, NULL_RTX,
9187 target, unsignedp);
9188 gcc_assert (target);
9189 return target;
9190
9191 case VEC_PACK_TRUNC_EXPR:
9192 case VEC_PACK_SAT_EXPR:
9193 case VEC_PACK_FIX_TRUNC_EXPR:
9194 mode = TYPE_MODE (TREE_TYPE (treeop0));
9195 goto binop;
9196
9197 case VEC_PERM_EXPR:
9198 expand_operands (treeop0, treeop1, target, &op0, &op1, EXPAND_NORMAL);
9199 op2 = expand_normal (treeop2);
9200
9201 /* Careful here: if the target doesn't support integral vector modes,
9202 a constant selection vector could wind up smooshed into a normal
9203 integral constant. */
9204 if (CONSTANT_P (op2) && GET_CODE (op2) != CONST_VECTOR)
9205 {
9206 tree sel_type = TREE_TYPE (treeop2);
9207 machine_mode vmode
9208 = mode_for_vector (TYPE_MODE (TREE_TYPE (sel_type)),
9209 TYPE_VECTOR_SUBPARTS (sel_type));
9210 gcc_assert (GET_MODE_CLASS (vmode) == MODE_VECTOR_INT);
9211 op2 = simplify_subreg (vmode, op2, TYPE_MODE (sel_type), 0);
9212 gcc_assert (op2 && GET_CODE (op2) == CONST_VECTOR);
9213 }
9214 else
9215 gcc_assert (GET_MODE_CLASS (GET_MODE (op2)) == MODE_VECTOR_INT);
9216
9217 temp = expand_vec_perm (mode, op0, op1, op2, target);
9218 gcc_assert (temp);
9219 return temp;
9220
9221 case DOT_PROD_EXPR:
9222 {
9223 tree oprnd0 = treeop0;
9224 tree oprnd1 = treeop1;
9225 tree oprnd2 = treeop2;
9226 rtx op2;
9227
9228 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
9229 op2 = expand_normal (oprnd2);
9230 target = expand_widen_pattern_expr (ops, op0, op1, op2,
9231 target, unsignedp);
9232 return target;
9233 }
9234
9235 case SAD_EXPR:
9236 {
9237 tree oprnd0 = treeop0;
9238 tree oprnd1 = treeop1;
9239 tree oprnd2 = treeop2;
9240 rtx op2;
9241
9242 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
9243 op2 = expand_normal (oprnd2);
9244 target = expand_widen_pattern_expr (ops, op0, op1, op2,
9245 target, unsignedp);
9246 return target;
9247 }
9248
9249 case REALIGN_LOAD_EXPR:
9250 {
9251 tree oprnd0 = treeop0;
9252 tree oprnd1 = treeop1;
9253 tree oprnd2 = treeop2;
9254 rtx op2;
9255
9256 this_optab = optab_for_tree_code (code, type, optab_default);
9257 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
9258 op2 = expand_normal (oprnd2);
9259 temp = expand_ternary_op (mode, this_optab, op0, op1, op2,
9260 target, unsignedp);
9261 gcc_assert (temp);
9262 return temp;
9263 }
9264
9265 case COND_EXPR:
9266 {
9267 /* A COND_EXPR with its type being VOID_TYPE represents a
9268 conditional jump and is handled in
9269 expand_gimple_cond_expr. */
9270 gcc_assert (!VOID_TYPE_P (type));
9271
9272 /* Note that COND_EXPRs whose type is a structure or union
9273 are required to be constructed to contain assignments of
9274 a temporary variable, so that we can evaluate them here
9275 for side effect only. If type is void, we must do likewise. */
9276
9277 gcc_assert (!TREE_ADDRESSABLE (type)
9278 && !ignore
9279 && TREE_TYPE (treeop1) != void_type_node
9280 && TREE_TYPE (treeop2) != void_type_node);
9281
9282 temp = expand_cond_expr_using_cmove (treeop0, treeop1, treeop2);
9283 if (temp)
9284 return temp;
9285
9286 /* If we are not to produce a result, we have no target. Otherwise,
9287 if a target was specified use it; it will not be used as an
9288 intermediate target unless it is safe. If no target, use a
9289 temporary. */
9290
9291 if (modifier != EXPAND_STACK_PARM
9292 && original_target
9293 && safe_from_p (original_target, treeop0, 1)
9294 && GET_MODE (original_target) == mode
9295 && !MEM_P (original_target))
9296 temp = original_target;
9297 else
9298 temp = assign_temp (type, 0, 1);
9299
9300 do_pending_stack_adjust ();
9301 NO_DEFER_POP;
9302 rtx_code_label *lab0 = gen_label_rtx ();
9303 rtx_code_label *lab1 = gen_label_rtx ();
9304 jumpifnot (treeop0, lab0, -1);
9305 store_expr (treeop1, temp,
9306 modifier == EXPAND_STACK_PARM,
9307 false);
9308
9309 emit_jump_insn (gen_jump (lab1));
9310 emit_barrier ();
9311 emit_label (lab0);
9312 store_expr (treeop2, temp,
9313 modifier == EXPAND_STACK_PARM,
9314 false);
9315
9316 emit_label (lab1);
9317 OK_DEFER_POP;
9318 return temp;
9319 }
9320
9321 case VEC_COND_EXPR:
9322 target = expand_vec_cond_expr (type, treeop0, treeop1, treeop2, target);
9323 return target;
9324
9325 default:
9326 gcc_unreachable ();
9327 }
9328
9329 /* Here to do an ordinary binary operator. */
9330 binop:
9331 expand_operands (treeop0, treeop1,
9332 subtarget, &op0, &op1, EXPAND_NORMAL);
9333 binop2:
9334 this_optab = optab_for_tree_code (code, type, optab_default);
9335 binop3:
9336 if (modifier == EXPAND_STACK_PARM)
9337 target = 0;
9338 temp = expand_binop (mode, this_optab, op0, op1, target,
9339 unsignedp, OPTAB_LIB_WIDEN);
9340 gcc_assert (temp);
9341 /* Bitwise operations do not need bitfield reduction as we expect their
9342 operands being properly truncated. */
9343 if (code == BIT_XOR_EXPR
9344 || code == BIT_AND_EXPR
9345 || code == BIT_IOR_EXPR)
9346 return temp;
9347 return REDUCE_BIT_FIELD (temp);
9348 }
9349 #undef REDUCE_BIT_FIELD
9350
9351
9352 /* Return TRUE if expression STMT is suitable for replacement.
9353 Never consider memory loads as replaceable, because those don't ever lead
9354 into constant expressions. */
9355
9356 static bool
9357 stmt_is_replaceable_p (gimple stmt)
9358 {
9359 if (ssa_is_replaceable_p (stmt))
9360 {
9361 /* Don't move around loads. */
9362 if (!gimple_assign_single_p (stmt)
9363 || is_gimple_val (gimple_assign_rhs1 (stmt)))
9364 return true;
9365 }
9366 return false;
9367 }
9368
9369 rtx
9370 expand_expr_real_1 (tree exp, rtx target, machine_mode tmode,
9371 enum expand_modifier modifier, rtx *alt_rtl,
9372 bool inner_reference_p)
9373 {
9374 rtx op0, op1, temp, decl_rtl;
9375 tree type;
9376 int unsignedp;
9377 machine_mode mode;
9378 enum tree_code code = TREE_CODE (exp);
9379 rtx subtarget, original_target;
9380 int ignore;
9381 tree context;
9382 bool reduce_bit_field;
9383 location_t loc = EXPR_LOCATION (exp);
9384 struct separate_ops ops;
9385 tree treeop0, treeop1, treeop2;
9386 tree ssa_name = NULL_TREE;
9387 gimple g;
9388
9389 type = TREE_TYPE (exp);
9390 mode = TYPE_MODE (type);
9391 unsignedp = TYPE_UNSIGNED (type);
9392
9393 treeop0 = treeop1 = treeop2 = NULL_TREE;
9394 if (!VL_EXP_CLASS_P (exp))
9395 switch (TREE_CODE_LENGTH (code))
9396 {
9397 default:
9398 case 3: treeop2 = TREE_OPERAND (exp, 2);
9399 case 2: treeop1 = TREE_OPERAND (exp, 1);
9400 case 1: treeop0 = TREE_OPERAND (exp, 0);
9401 case 0: break;
9402 }
9403 ops.code = code;
9404 ops.type = type;
9405 ops.op0 = treeop0;
9406 ops.op1 = treeop1;
9407 ops.op2 = treeop2;
9408 ops.location = loc;
9409
9410 ignore = (target == const0_rtx
9411 || ((CONVERT_EXPR_CODE_P (code)
9412 || code == COND_EXPR || code == VIEW_CONVERT_EXPR)
9413 && TREE_CODE (type) == VOID_TYPE));
9414
9415 /* An operation in what may be a bit-field type needs the
9416 result to be reduced to the precision of the bit-field type,
9417 which is narrower than that of the type's mode. */
9418 reduce_bit_field = (!ignore
9419 && INTEGRAL_TYPE_P (type)
9420 && GET_MODE_PRECISION (mode) > TYPE_PRECISION (type));
9421
9422 /* If we are going to ignore this result, we need only do something
9423 if there is a side-effect somewhere in the expression. If there
9424 is, short-circuit the most common cases here. Note that we must
9425 not call expand_expr with anything but const0_rtx in case this
9426 is an initial expansion of a size that contains a PLACEHOLDER_EXPR. */
9427
9428 if (ignore)
9429 {
9430 if (! TREE_SIDE_EFFECTS (exp))
9431 return const0_rtx;
9432
9433 /* Ensure we reference a volatile object even if value is ignored, but
9434 don't do this if all we are doing is taking its address. */
9435 if (TREE_THIS_VOLATILE (exp)
9436 && TREE_CODE (exp) != FUNCTION_DECL
9437 && mode != VOIDmode && mode != BLKmode
9438 && modifier != EXPAND_CONST_ADDRESS)
9439 {
9440 temp = expand_expr (exp, NULL_RTX, VOIDmode, modifier);
9441 if (MEM_P (temp))
9442 copy_to_reg (temp);
9443 return const0_rtx;
9444 }
9445
9446 if (TREE_CODE_CLASS (code) == tcc_unary
9447 || code == BIT_FIELD_REF
9448 || code == COMPONENT_REF
9449 || code == INDIRECT_REF)
9450 return expand_expr (treeop0, const0_rtx, VOIDmode,
9451 modifier);
9452
9453 else if (TREE_CODE_CLASS (code) == tcc_binary
9454 || TREE_CODE_CLASS (code) == tcc_comparison
9455 || code == ARRAY_REF || code == ARRAY_RANGE_REF)
9456 {
9457 expand_expr (treeop0, const0_rtx, VOIDmode, modifier);
9458 expand_expr (treeop1, const0_rtx, VOIDmode, modifier);
9459 return const0_rtx;
9460 }
9461
9462 target = 0;
9463 }
9464
9465 if (reduce_bit_field && modifier == EXPAND_STACK_PARM)
9466 target = 0;
9467
9468 /* Use subtarget as the target for operand 0 of a binary operation. */
9469 subtarget = get_subtarget (target);
9470 original_target = target;
9471
9472 switch (code)
9473 {
9474 case LABEL_DECL:
9475 {
9476 tree function = decl_function_context (exp);
9477
9478 temp = label_rtx (exp);
9479 temp = gen_rtx_LABEL_REF (Pmode, temp);
9480
9481 if (function != current_function_decl
9482 && function != 0)
9483 LABEL_REF_NONLOCAL_P (temp) = 1;
9484
9485 temp = gen_rtx_MEM (FUNCTION_MODE, temp);
9486 return temp;
9487 }
9488
9489 case SSA_NAME:
9490 /* ??? ivopts calls expander, without any preparation from
9491 out-of-ssa. So fake instructions as if this was an access to the
9492 base variable. This unnecessarily allocates a pseudo, see how we can
9493 reuse it, if partition base vars have it set already. */
9494 if (!currently_expanding_to_rtl)
9495 {
9496 tree var = SSA_NAME_VAR (exp);
9497 if (var && DECL_RTL_SET_P (var))
9498 return DECL_RTL (var);
9499 return gen_raw_REG (TYPE_MODE (TREE_TYPE (exp)),
9500 LAST_VIRTUAL_REGISTER + 1);
9501 }
9502
9503 g = get_gimple_for_ssa_name (exp);
9504 /* For EXPAND_INITIALIZER try harder to get something simpler. */
9505 if (g == NULL
9506 && modifier == EXPAND_INITIALIZER
9507 && !SSA_NAME_IS_DEFAULT_DEF (exp)
9508 && (optimize || DECL_IGNORED_P (SSA_NAME_VAR (exp)))
9509 && stmt_is_replaceable_p (SSA_NAME_DEF_STMT (exp)))
9510 g = SSA_NAME_DEF_STMT (exp);
9511 if (g)
9512 {
9513 rtx r;
9514 ops.code = gimple_assign_rhs_code (g);
9515 switch (get_gimple_rhs_class (ops.code))
9516 {
9517 case GIMPLE_TERNARY_RHS:
9518 ops.op2 = gimple_assign_rhs3 (g);
9519 /* Fallthru */
9520 case GIMPLE_BINARY_RHS:
9521 ops.op1 = gimple_assign_rhs2 (g);
9522
9523 /* Try to expand conditonal compare. */
9524 if (targetm.gen_ccmp_first)
9525 {
9526 gcc_checking_assert (targetm.gen_ccmp_next != NULL);
9527 r = expand_ccmp_expr (g);
9528 if (r)
9529 break;
9530 }
9531 /* Fallthru */
9532 case GIMPLE_UNARY_RHS:
9533 ops.op0 = gimple_assign_rhs1 (g);
9534 ops.type = TREE_TYPE (gimple_assign_lhs (g));
9535 ops.location = gimple_location (g);
9536 r = expand_expr_real_2 (&ops, target, tmode, modifier);
9537 break;
9538 case GIMPLE_SINGLE_RHS:
9539 {
9540 location_t saved_loc = curr_insn_location ();
9541 set_curr_insn_location (gimple_location (g));
9542 r = expand_expr_real (gimple_assign_rhs1 (g), target,
9543 tmode, modifier, NULL, inner_reference_p);
9544 set_curr_insn_location (saved_loc);
9545 break;
9546 }
9547 default:
9548 gcc_unreachable ();
9549 }
9550 if (REG_P (r) && !REG_EXPR (r))
9551 set_reg_attrs_for_decl_rtl (SSA_NAME_VAR (exp), r);
9552 return r;
9553 }
9554
9555 ssa_name = exp;
9556 decl_rtl = get_rtx_for_ssa_name (ssa_name);
9557 exp = SSA_NAME_VAR (ssa_name);
9558 goto expand_decl_rtl;
9559
9560 case PARM_DECL:
9561 case VAR_DECL:
9562 /* If a static var's type was incomplete when the decl was written,
9563 but the type is complete now, lay out the decl now. */
9564 if (DECL_SIZE (exp) == 0
9565 && COMPLETE_OR_UNBOUND_ARRAY_TYPE_P (TREE_TYPE (exp))
9566 && (TREE_STATIC (exp) || DECL_EXTERNAL (exp)))
9567 layout_decl (exp, 0);
9568
9569 /* ... fall through ... */
9570
9571 case FUNCTION_DECL:
9572 case RESULT_DECL:
9573 decl_rtl = DECL_RTL (exp);
9574 expand_decl_rtl:
9575 gcc_assert (decl_rtl);
9576 decl_rtl = copy_rtx (decl_rtl);
9577 /* Record writes to register variables. */
9578 if (modifier == EXPAND_WRITE
9579 && REG_P (decl_rtl)
9580 && HARD_REGISTER_P (decl_rtl))
9581 add_to_hard_reg_set (&crtl->asm_clobbers,
9582 GET_MODE (decl_rtl), REGNO (decl_rtl));
9583
9584 /* Ensure variable marked as used even if it doesn't go through
9585 a parser. If it hasn't be used yet, write out an external
9586 definition. */
9587 TREE_USED (exp) = 1;
9588
9589 /* Show we haven't gotten RTL for this yet. */
9590 temp = 0;
9591
9592 /* Variables inherited from containing functions should have
9593 been lowered by this point. */
9594 context = decl_function_context (exp);
9595 gcc_assert (SCOPE_FILE_SCOPE_P (context)
9596 || context == current_function_decl
9597 || TREE_STATIC (exp)
9598 || DECL_EXTERNAL (exp)
9599 /* ??? C++ creates functions that are not TREE_STATIC. */
9600 || TREE_CODE (exp) == FUNCTION_DECL);
9601
9602 /* This is the case of an array whose size is to be determined
9603 from its initializer, while the initializer is still being parsed.
9604 ??? We aren't parsing while expanding anymore. */
9605
9606 if (MEM_P (decl_rtl) && REG_P (XEXP (decl_rtl, 0)))
9607 temp = validize_mem (decl_rtl);
9608
9609 /* If DECL_RTL is memory, we are in the normal case and the
9610 address is not valid, get the address into a register. */
9611
9612 else if (MEM_P (decl_rtl) && modifier != EXPAND_INITIALIZER)
9613 {
9614 if (alt_rtl)
9615 *alt_rtl = decl_rtl;
9616 decl_rtl = use_anchored_address (decl_rtl);
9617 if (modifier != EXPAND_CONST_ADDRESS
9618 && modifier != EXPAND_SUM
9619 && !memory_address_addr_space_p (DECL_MODE (exp),
9620 XEXP (decl_rtl, 0),
9621 MEM_ADDR_SPACE (decl_rtl)))
9622 temp = replace_equiv_address (decl_rtl,
9623 copy_rtx (XEXP (decl_rtl, 0)));
9624 }
9625
9626 /* If we got something, return it. But first, set the alignment
9627 if the address is a register. */
9628 if (temp != 0)
9629 {
9630 if (MEM_P (temp) && REG_P (XEXP (temp, 0)))
9631 mark_reg_pointer (XEXP (temp, 0), DECL_ALIGN (exp));
9632
9633 return temp;
9634 }
9635
9636 /* If the mode of DECL_RTL does not match that of the decl,
9637 there are two cases: we are dealing with a BLKmode value
9638 that is returned in a register, or we are dealing with
9639 a promoted value. In the latter case, return a SUBREG
9640 of the wanted mode, but mark it so that we know that it
9641 was already extended. */
9642 if (REG_P (decl_rtl)
9643 && DECL_MODE (exp) != BLKmode
9644 && GET_MODE (decl_rtl) != DECL_MODE (exp))
9645 {
9646 machine_mode pmode;
9647
9648 /* Get the signedness to be used for this variable. Ensure we get
9649 the same mode we got when the variable was declared. */
9650 if (code == SSA_NAME
9651 && (g = SSA_NAME_DEF_STMT (ssa_name))
9652 && gimple_code (g) == GIMPLE_CALL
9653 && !gimple_call_internal_p (g))
9654 pmode = promote_function_mode (type, mode, &unsignedp,
9655 gimple_call_fntype (g),
9656 2);
9657 else
9658 pmode = promote_decl_mode (exp, &unsignedp);
9659 gcc_assert (GET_MODE (decl_rtl) == pmode);
9660
9661 temp = gen_lowpart_SUBREG (mode, decl_rtl);
9662 SUBREG_PROMOTED_VAR_P (temp) = 1;
9663 SUBREG_PROMOTED_SET (temp, unsignedp);
9664 return temp;
9665 }
9666
9667 return decl_rtl;
9668
9669 case INTEGER_CST:
9670 /* Given that TYPE_PRECISION (type) is not always equal to
9671 GET_MODE_PRECISION (TYPE_MODE (type)), we need to extend from
9672 the former to the latter according to the signedness of the
9673 type. */
9674 temp = immed_wide_int_const (wide_int::from
9675 (exp,
9676 GET_MODE_PRECISION (TYPE_MODE (type)),
9677 TYPE_SIGN (type)),
9678 TYPE_MODE (type));
9679 return temp;
9680
9681 case VECTOR_CST:
9682 {
9683 tree tmp = NULL_TREE;
9684 if (GET_MODE_CLASS (mode) == MODE_VECTOR_INT
9685 || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT
9686 || GET_MODE_CLASS (mode) == MODE_VECTOR_FRACT
9687 || GET_MODE_CLASS (mode) == MODE_VECTOR_UFRACT
9688 || GET_MODE_CLASS (mode) == MODE_VECTOR_ACCUM
9689 || GET_MODE_CLASS (mode) == MODE_VECTOR_UACCUM)
9690 return const_vector_from_tree (exp);
9691 if (GET_MODE_CLASS (mode) == MODE_INT)
9692 {
9693 tree type_for_mode = lang_hooks.types.type_for_mode (mode, 1);
9694 if (type_for_mode)
9695 tmp = fold_unary_loc (loc, VIEW_CONVERT_EXPR, type_for_mode, exp);
9696 }
9697 if (!tmp)
9698 {
9699 vec<constructor_elt, va_gc> *v;
9700 unsigned i;
9701 vec_alloc (v, VECTOR_CST_NELTS (exp));
9702 for (i = 0; i < VECTOR_CST_NELTS (exp); ++i)
9703 CONSTRUCTOR_APPEND_ELT (v, NULL_TREE, VECTOR_CST_ELT (exp, i));
9704 tmp = build_constructor (type, v);
9705 }
9706 return expand_expr (tmp, ignore ? const0_rtx : target,
9707 tmode, modifier);
9708 }
9709
9710 case CONST_DECL:
9711 return expand_expr (DECL_INITIAL (exp), target, VOIDmode, modifier);
9712
9713 case REAL_CST:
9714 /* If optimized, generate immediate CONST_DOUBLE
9715 which will be turned into memory by reload if necessary.
9716
9717 We used to force a register so that loop.c could see it. But
9718 this does not allow gen_* patterns to perform optimizations with
9719 the constants. It also produces two insns in cases like "x = 1.0;".
9720 On most machines, floating-point constants are not permitted in
9721 many insns, so we'd end up copying it to a register in any case.
9722
9723 Now, we do the copying in expand_binop, if appropriate. */
9724 return CONST_DOUBLE_FROM_REAL_VALUE (TREE_REAL_CST (exp),
9725 TYPE_MODE (TREE_TYPE (exp)));
9726
9727 case FIXED_CST:
9728 return CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (exp),
9729 TYPE_MODE (TREE_TYPE (exp)));
9730
9731 case COMPLEX_CST:
9732 /* Handle evaluating a complex constant in a CONCAT target. */
9733 if (original_target && GET_CODE (original_target) == CONCAT)
9734 {
9735 machine_mode mode = TYPE_MODE (TREE_TYPE (TREE_TYPE (exp)));
9736 rtx rtarg, itarg;
9737
9738 rtarg = XEXP (original_target, 0);
9739 itarg = XEXP (original_target, 1);
9740
9741 /* Move the real and imaginary parts separately. */
9742 op0 = expand_expr (TREE_REALPART (exp), rtarg, mode, EXPAND_NORMAL);
9743 op1 = expand_expr (TREE_IMAGPART (exp), itarg, mode, EXPAND_NORMAL);
9744
9745 if (op0 != rtarg)
9746 emit_move_insn (rtarg, op0);
9747 if (op1 != itarg)
9748 emit_move_insn (itarg, op1);
9749
9750 return original_target;
9751 }
9752
9753 /* ... fall through ... */
9754
9755 case STRING_CST:
9756 temp = expand_expr_constant (exp, 1, modifier);
9757
9758 /* temp contains a constant address.
9759 On RISC machines where a constant address isn't valid,
9760 make some insns to get that address into a register. */
9761 if (modifier != EXPAND_CONST_ADDRESS
9762 && modifier != EXPAND_INITIALIZER
9763 && modifier != EXPAND_SUM
9764 && ! memory_address_addr_space_p (mode, XEXP (temp, 0),
9765 MEM_ADDR_SPACE (temp)))
9766 return replace_equiv_address (temp,
9767 copy_rtx (XEXP (temp, 0)));
9768 return temp;
9769
9770 case SAVE_EXPR:
9771 {
9772 tree val = treeop0;
9773 rtx ret = expand_expr_real_1 (val, target, tmode, modifier, alt_rtl,
9774 inner_reference_p);
9775
9776 if (!SAVE_EXPR_RESOLVED_P (exp))
9777 {
9778 /* We can indeed still hit this case, typically via builtin
9779 expanders calling save_expr immediately before expanding
9780 something. Assume this means that we only have to deal
9781 with non-BLKmode values. */
9782 gcc_assert (GET_MODE (ret) != BLKmode);
9783
9784 val = build_decl (curr_insn_location (),
9785 VAR_DECL, NULL, TREE_TYPE (exp));
9786 DECL_ARTIFICIAL (val) = 1;
9787 DECL_IGNORED_P (val) = 1;
9788 treeop0 = val;
9789 TREE_OPERAND (exp, 0) = treeop0;
9790 SAVE_EXPR_RESOLVED_P (exp) = 1;
9791
9792 if (!CONSTANT_P (ret))
9793 ret = copy_to_reg (ret);
9794 SET_DECL_RTL (val, ret);
9795 }
9796
9797 return ret;
9798 }
9799
9800
9801 case CONSTRUCTOR:
9802 /* If we don't need the result, just ensure we evaluate any
9803 subexpressions. */
9804 if (ignore)
9805 {
9806 unsigned HOST_WIDE_INT idx;
9807 tree value;
9808
9809 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value)
9810 expand_expr (value, const0_rtx, VOIDmode, EXPAND_NORMAL);
9811
9812 return const0_rtx;
9813 }
9814
9815 return expand_constructor (exp, target, modifier, false);
9816
9817 case TARGET_MEM_REF:
9818 {
9819 addr_space_t as
9820 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0))));
9821 enum insn_code icode;
9822 unsigned int align;
9823
9824 op0 = addr_for_mem_ref (exp, as, true);
9825 op0 = memory_address_addr_space (mode, op0, as);
9826 temp = gen_rtx_MEM (mode, op0);
9827 set_mem_attributes (temp, exp, 0);
9828 set_mem_addr_space (temp, as);
9829 align = get_object_alignment (exp);
9830 if (modifier != EXPAND_WRITE
9831 && modifier != EXPAND_MEMORY
9832 && mode != BLKmode
9833 && align < GET_MODE_ALIGNMENT (mode)
9834 /* If the target does not have special handling for unaligned
9835 loads of mode then it can use regular moves for them. */
9836 && ((icode = optab_handler (movmisalign_optab, mode))
9837 != CODE_FOR_nothing))
9838 {
9839 struct expand_operand ops[2];
9840
9841 /* We've already validated the memory, and we're creating a
9842 new pseudo destination. The predicates really can't fail,
9843 nor can the generator. */
9844 create_output_operand (&ops[0], NULL_RTX, mode);
9845 create_fixed_operand (&ops[1], temp);
9846 expand_insn (icode, 2, ops);
9847 temp = ops[0].value;
9848 }
9849 return temp;
9850 }
9851
9852 case MEM_REF:
9853 {
9854 addr_space_t as
9855 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0))));
9856 machine_mode address_mode;
9857 tree base = TREE_OPERAND (exp, 0);
9858 gimple def_stmt;
9859 enum insn_code icode;
9860 unsigned align;
9861 /* Handle expansion of non-aliased memory with non-BLKmode. That
9862 might end up in a register. */
9863 if (mem_ref_refers_to_non_mem_p (exp))
9864 {
9865 HOST_WIDE_INT offset = mem_ref_offset (exp).to_short_addr ();
9866 base = TREE_OPERAND (base, 0);
9867 if (offset == 0
9868 && tree_fits_uhwi_p (TYPE_SIZE (type))
9869 && (GET_MODE_BITSIZE (DECL_MODE (base))
9870 == tree_to_uhwi (TYPE_SIZE (type))))
9871 return expand_expr (build1 (VIEW_CONVERT_EXPR, type, base),
9872 target, tmode, modifier);
9873 if (TYPE_MODE (type) == BLKmode)
9874 {
9875 temp = assign_stack_temp (DECL_MODE (base),
9876 GET_MODE_SIZE (DECL_MODE (base)));
9877 store_expr (base, temp, 0, false);
9878 temp = adjust_address (temp, BLKmode, offset);
9879 set_mem_size (temp, int_size_in_bytes (type));
9880 return temp;
9881 }
9882 exp = build3 (BIT_FIELD_REF, type, base, TYPE_SIZE (type),
9883 bitsize_int (offset * BITS_PER_UNIT));
9884 return expand_expr (exp, target, tmode, modifier);
9885 }
9886 address_mode = targetm.addr_space.address_mode (as);
9887 base = TREE_OPERAND (exp, 0);
9888 if ((def_stmt = get_def_for_expr (base, BIT_AND_EXPR)))
9889 {
9890 tree mask = gimple_assign_rhs2 (def_stmt);
9891 base = build2 (BIT_AND_EXPR, TREE_TYPE (base),
9892 gimple_assign_rhs1 (def_stmt), mask);
9893 TREE_OPERAND (exp, 0) = base;
9894 }
9895 align = get_object_alignment (exp);
9896 op0 = expand_expr (base, NULL_RTX, VOIDmode, EXPAND_SUM);
9897 op0 = memory_address_addr_space (mode, op0, as);
9898 if (!integer_zerop (TREE_OPERAND (exp, 1)))
9899 {
9900 rtx off = immed_wide_int_const (mem_ref_offset (exp), address_mode);
9901 op0 = simplify_gen_binary (PLUS, address_mode, op0, off);
9902 op0 = memory_address_addr_space (mode, op0, as);
9903 }
9904 temp = gen_rtx_MEM (mode, op0);
9905 set_mem_attributes (temp, exp, 0);
9906 set_mem_addr_space (temp, as);
9907 if (TREE_THIS_VOLATILE (exp))
9908 MEM_VOLATILE_P (temp) = 1;
9909 if (modifier != EXPAND_WRITE
9910 && modifier != EXPAND_MEMORY
9911 && !inner_reference_p
9912 && mode != BLKmode
9913 && align < GET_MODE_ALIGNMENT (mode))
9914 {
9915 if ((icode = optab_handler (movmisalign_optab, mode))
9916 != CODE_FOR_nothing)
9917 {
9918 struct expand_operand ops[2];
9919
9920 /* We've already validated the memory, and we're creating a
9921 new pseudo destination. The predicates really can't fail,
9922 nor can the generator. */
9923 create_output_operand (&ops[0], NULL_RTX, mode);
9924 create_fixed_operand (&ops[1], temp);
9925 expand_insn (icode, 2, ops);
9926 temp = ops[0].value;
9927 }
9928 else if (SLOW_UNALIGNED_ACCESS (mode, align))
9929 temp = extract_bit_field (temp, GET_MODE_BITSIZE (mode),
9930 0, TYPE_UNSIGNED (TREE_TYPE (exp)),
9931 (modifier == EXPAND_STACK_PARM
9932 ? NULL_RTX : target),
9933 mode, mode);
9934 }
9935 return temp;
9936 }
9937
9938 case ARRAY_REF:
9939
9940 {
9941 tree array = treeop0;
9942 tree index = treeop1;
9943 tree init;
9944
9945 /* Fold an expression like: "foo"[2].
9946 This is not done in fold so it won't happen inside &.
9947 Don't fold if this is for wide characters since it's too
9948 difficult to do correctly and this is a very rare case. */
9949
9950 if (modifier != EXPAND_CONST_ADDRESS
9951 && modifier != EXPAND_INITIALIZER
9952 && modifier != EXPAND_MEMORY)
9953 {
9954 tree t = fold_read_from_constant_string (exp);
9955
9956 if (t)
9957 return expand_expr (t, target, tmode, modifier);
9958 }
9959
9960 /* If this is a constant index into a constant array,
9961 just get the value from the array. Handle both the cases when
9962 we have an explicit constructor and when our operand is a variable
9963 that was declared const. */
9964
9965 if (modifier != EXPAND_CONST_ADDRESS
9966 && modifier != EXPAND_INITIALIZER
9967 && modifier != EXPAND_MEMORY
9968 && TREE_CODE (array) == CONSTRUCTOR
9969 && ! TREE_SIDE_EFFECTS (array)
9970 && TREE_CODE (index) == INTEGER_CST)
9971 {
9972 unsigned HOST_WIDE_INT ix;
9973 tree field, value;
9974
9975 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (array), ix,
9976 field, value)
9977 if (tree_int_cst_equal (field, index))
9978 {
9979 if (!TREE_SIDE_EFFECTS (value))
9980 return expand_expr (fold (value), target, tmode, modifier);
9981 break;
9982 }
9983 }
9984
9985 else if (optimize >= 1
9986 && modifier != EXPAND_CONST_ADDRESS
9987 && modifier != EXPAND_INITIALIZER
9988 && modifier != EXPAND_MEMORY
9989 && TREE_READONLY (array) && ! TREE_SIDE_EFFECTS (array)
9990 && TREE_CODE (index) == INTEGER_CST
9991 && (TREE_CODE (array) == VAR_DECL
9992 || TREE_CODE (array) == CONST_DECL)
9993 && (init = ctor_for_folding (array)) != error_mark_node)
9994 {
9995 if (init == NULL_TREE)
9996 {
9997 tree value = build_zero_cst (type);
9998 if (TREE_CODE (value) == CONSTRUCTOR)
9999 {
10000 /* If VALUE is a CONSTRUCTOR, this optimization is only
10001 useful if this doesn't store the CONSTRUCTOR into
10002 memory. If it does, it is more efficient to just
10003 load the data from the array directly. */
10004 rtx ret = expand_constructor (value, target,
10005 modifier, true);
10006 if (ret == NULL_RTX)
10007 value = NULL_TREE;
10008 }
10009
10010 if (value)
10011 return expand_expr (value, target, tmode, modifier);
10012 }
10013 else if (TREE_CODE (init) == CONSTRUCTOR)
10014 {
10015 unsigned HOST_WIDE_INT ix;
10016 tree field, value;
10017
10018 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (init), ix,
10019 field, value)
10020 if (tree_int_cst_equal (field, index))
10021 {
10022 if (TREE_SIDE_EFFECTS (value))
10023 break;
10024
10025 if (TREE_CODE (value) == CONSTRUCTOR)
10026 {
10027 /* If VALUE is a CONSTRUCTOR, this
10028 optimization is only useful if
10029 this doesn't store the CONSTRUCTOR
10030 into memory. If it does, it is more
10031 efficient to just load the data from
10032 the array directly. */
10033 rtx ret = expand_constructor (value, target,
10034 modifier, true);
10035 if (ret == NULL_RTX)
10036 break;
10037 }
10038
10039 return
10040 expand_expr (fold (value), target, tmode, modifier);
10041 }
10042 }
10043 else if (TREE_CODE (init) == STRING_CST)
10044 {
10045 tree low_bound = array_ref_low_bound (exp);
10046 tree index1 = fold_convert_loc (loc, sizetype, treeop1);
10047
10048 /* Optimize the special case of a zero lower bound.
10049
10050 We convert the lower bound to sizetype to avoid problems
10051 with constant folding. E.g. suppose the lower bound is
10052 1 and its mode is QI. Without the conversion
10053 (ARRAY + (INDEX - (unsigned char)1))
10054 becomes
10055 (ARRAY + (-(unsigned char)1) + INDEX)
10056 which becomes
10057 (ARRAY + 255 + INDEX). Oops! */
10058 if (!integer_zerop (low_bound))
10059 index1 = size_diffop_loc (loc, index1,
10060 fold_convert_loc (loc, sizetype,
10061 low_bound));
10062
10063 if (compare_tree_int (index1, TREE_STRING_LENGTH (init)) < 0)
10064 {
10065 tree type = TREE_TYPE (TREE_TYPE (init));
10066 machine_mode mode = TYPE_MODE (type);
10067
10068 if (GET_MODE_CLASS (mode) == MODE_INT
10069 && GET_MODE_SIZE (mode) == 1)
10070 return gen_int_mode (TREE_STRING_POINTER (init)
10071 [TREE_INT_CST_LOW (index1)],
10072 mode);
10073 }
10074 }
10075 }
10076 }
10077 goto normal_inner_ref;
10078
10079 case COMPONENT_REF:
10080 /* If the operand is a CONSTRUCTOR, we can just extract the
10081 appropriate field if it is present. */
10082 if (TREE_CODE (treeop0) == CONSTRUCTOR)
10083 {
10084 unsigned HOST_WIDE_INT idx;
10085 tree field, value;
10086
10087 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (treeop0),
10088 idx, field, value)
10089 if (field == treeop1
10090 /* We can normally use the value of the field in the
10091 CONSTRUCTOR. However, if this is a bitfield in
10092 an integral mode that we can fit in a HOST_WIDE_INT,
10093 we must mask only the number of bits in the bitfield,
10094 since this is done implicitly by the constructor. If
10095 the bitfield does not meet either of those conditions,
10096 we can't do this optimization. */
10097 && (! DECL_BIT_FIELD (field)
10098 || ((GET_MODE_CLASS (DECL_MODE (field)) == MODE_INT)
10099 && (GET_MODE_PRECISION (DECL_MODE (field))
10100 <= HOST_BITS_PER_WIDE_INT))))
10101 {
10102 if (DECL_BIT_FIELD (field)
10103 && modifier == EXPAND_STACK_PARM)
10104 target = 0;
10105 op0 = expand_expr (value, target, tmode, modifier);
10106 if (DECL_BIT_FIELD (field))
10107 {
10108 HOST_WIDE_INT bitsize = TREE_INT_CST_LOW (DECL_SIZE (field));
10109 machine_mode imode = TYPE_MODE (TREE_TYPE (field));
10110
10111 if (TYPE_UNSIGNED (TREE_TYPE (field)))
10112 {
10113 op1 = gen_int_mode (((HOST_WIDE_INT) 1 << bitsize) - 1,
10114 imode);
10115 op0 = expand_and (imode, op0, op1, target);
10116 }
10117 else
10118 {
10119 int count = GET_MODE_PRECISION (imode) - bitsize;
10120
10121 op0 = expand_shift (LSHIFT_EXPR, imode, op0, count,
10122 target, 0);
10123 op0 = expand_shift (RSHIFT_EXPR, imode, op0, count,
10124 target, 0);
10125 }
10126 }
10127
10128 return op0;
10129 }
10130 }
10131 goto normal_inner_ref;
10132
10133 case BIT_FIELD_REF:
10134 case ARRAY_RANGE_REF:
10135 normal_inner_ref:
10136 {
10137 machine_mode mode1, mode2;
10138 HOST_WIDE_INT bitsize, bitpos;
10139 tree offset;
10140 int volatilep = 0, must_force_mem;
10141 tree tem = get_inner_reference (exp, &bitsize, &bitpos, &offset,
10142 &mode1, &unsignedp, &volatilep, true);
10143 rtx orig_op0, memloc;
10144 bool clear_mem_expr = false;
10145
10146 /* If we got back the original object, something is wrong. Perhaps
10147 we are evaluating an expression too early. In any event, don't
10148 infinitely recurse. */
10149 gcc_assert (tem != exp);
10150
10151 /* If TEM's type is a union of variable size, pass TARGET to the inner
10152 computation, since it will need a temporary and TARGET is known
10153 to have to do. This occurs in unchecked conversion in Ada. */
10154 orig_op0 = op0
10155 = expand_expr_real (tem,
10156 (TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE
10157 && COMPLETE_TYPE_P (TREE_TYPE (tem))
10158 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem)))
10159 != INTEGER_CST)
10160 && modifier != EXPAND_STACK_PARM
10161 ? target : NULL_RTX),
10162 VOIDmode,
10163 modifier == EXPAND_SUM ? EXPAND_NORMAL : modifier,
10164 NULL, true);
10165
10166 /* If the field has a mode, we want to access it in the
10167 field's mode, not the computed mode.
10168 If a MEM has VOIDmode (external with incomplete type),
10169 use BLKmode for it instead. */
10170 if (MEM_P (op0))
10171 {
10172 if (mode1 != VOIDmode)
10173 op0 = adjust_address (op0, mode1, 0);
10174 else if (GET_MODE (op0) == VOIDmode)
10175 op0 = adjust_address (op0, BLKmode, 0);
10176 }
10177
10178 mode2
10179 = CONSTANT_P (op0) ? TYPE_MODE (TREE_TYPE (tem)) : GET_MODE (op0);
10180
10181 /* If we have either an offset, a BLKmode result, or a reference
10182 outside the underlying object, we must force it to memory.
10183 Such a case can occur in Ada if we have unchecked conversion
10184 of an expression from a scalar type to an aggregate type or
10185 for an ARRAY_RANGE_REF whose type is BLKmode, or if we were
10186 passed a partially uninitialized object or a view-conversion
10187 to a larger size. */
10188 must_force_mem = (offset
10189 || mode1 == BLKmode
10190 || bitpos + bitsize > GET_MODE_BITSIZE (mode2));
10191
10192 /* Handle CONCAT first. */
10193 if (GET_CODE (op0) == CONCAT && !must_force_mem)
10194 {
10195 if (bitpos == 0
10196 && bitsize == GET_MODE_BITSIZE (GET_MODE (op0)))
10197 return op0;
10198 if (bitpos == 0
10199 && bitsize == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 0)))
10200 && bitsize)
10201 {
10202 op0 = XEXP (op0, 0);
10203 mode2 = GET_MODE (op0);
10204 }
10205 else if (bitpos == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 0)))
10206 && bitsize == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 1)))
10207 && bitpos
10208 && bitsize)
10209 {
10210 op0 = XEXP (op0, 1);
10211 bitpos = 0;
10212 mode2 = GET_MODE (op0);
10213 }
10214 else
10215 /* Otherwise force into memory. */
10216 must_force_mem = 1;
10217 }
10218
10219 /* If this is a constant, put it in a register if it is a legitimate
10220 constant and we don't need a memory reference. */
10221 if (CONSTANT_P (op0)
10222 && mode2 != BLKmode
10223 && targetm.legitimate_constant_p (mode2, op0)
10224 && !must_force_mem)
10225 op0 = force_reg (mode2, op0);
10226
10227 /* Otherwise, if this is a constant, try to force it to the constant
10228 pool. Note that back-ends, e.g. MIPS, may refuse to do so if it
10229 is a legitimate constant. */
10230 else if (CONSTANT_P (op0) && (memloc = force_const_mem (mode2, op0)))
10231 op0 = validize_mem (memloc);
10232
10233 /* Otherwise, if this is a constant or the object is not in memory
10234 and need be, put it there. */
10235 else if (CONSTANT_P (op0) || (!MEM_P (op0) && must_force_mem))
10236 {
10237 memloc = assign_temp (TREE_TYPE (tem), 1, 1);
10238 emit_move_insn (memloc, op0);
10239 op0 = memloc;
10240 clear_mem_expr = true;
10241 }
10242
10243 if (offset)
10244 {
10245 machine_mode address_mode;
10246 rtx offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode,
10247 EXPAND_SUM);
10248
10249 gcc_assert (MEM_P (op0));
10250
10251 address_mode = get_address_mode (op0);
10252 if (GET_MODE (offset_rtx) != address_mode)
10253 {
10254 /* We cannot be sure that the RTL in offset_rtx is valid outside
10255 of a memory address context, so force it into a register
10256 before attempting to convert it to the desired mode. */
10257 offset_rtx = force_operand (offset_rtx, NULL_RTX);
10258 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
10259 }
10260
10261 /* See the comment in expand_assignment for the rationale. */
10262 if (mode1 != VOIDmode
10263 && bitpos != 0
10264 && bitsize > 0
10265 && (bitpos % bitsize) == 0
10266 && (bitsize % GET_MODE_ALIGNMENT (mode1)) == 0
10267 && MEM_ALIGN (op0) >= GET_MODE_ALIGNMENT (mode1))
10268 {
10269 op0 = adjust_address (op0, mode1, bitpos / BITS_PER_UNIT);
10270 bitpos = 0;
10271 }
10272
10273 op0 = offset_address (op0, offset_rtx,
10274 highest_pow2_factor (offset));
10275 }
10276
10277 /* If OFFSET is making OP0 more aligned than BIGGEST_ALIGNMENT,
10278 record its alignment as BIGGEST_ALIGNMENT. */
10279 if (MEM_P (op0) && bitpos == 0 && offset != 0
10280 && is_aligning_offset (offset, tem))
10281 set_mem_align (op0, BIGGEST_ALIGNMENT);
10282
10283 /* Don't forget about volatility even if this is a bitfield. */
10284 if (MEM_P (op0) && volatilep && ! MEM_VOLATILE_P (op0))
10285 {
10286 if (op0 == orig_op0)
10287 op0 = copy_rtx (op0);
10288
10289 MEM_VOLATILE_P (op0) = 1;
10290 }
10291
10292 /* In cases where an aligned union has an unaligned object
10293 as a field, we might be extracting a BLKmode value from
10294 an integer-mode (e.g., SImode) object. Handle this case
10295 by doing the extract into an object as wide as the field
10296 (which we know to be the width of a basic mode), then
10297 storing into memory, and changing the mode to BLKmode. */
10298 if (mode1 == VOIDmode
10299 || REG_P (op0) || GET_CODE (op0) == SUBREG
10300 || (mode1 != BLKmode && ! direct_load[(int) mode1]
10301 && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
10302 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT
10303 && modifier != EXPAND_CONST_ADDRESS
10304 && modifier != EXPAND_INITIALIZER
10305 && modifier != EXPAND_MEMORY)
10306 /* If the bitfield is volatile and the bitsize
10307 is narrower than the access size of the bitfield,
10308 we need to extract bitfields from the access. */
10309 || (volatilep && TREE_CODE (exp) == COMPONENT_REF
10310 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (exp, 1))
10311 && mode1 != BLKmode
10312 && bitsize < GET_MODE_SIZE (mode1) * BITS_PER_UNIT)
10313 /* If the field isn't aligned enough to fetch as a memref,
10314 fetch it as a bit field. */
10315 || (mode1 != BLKmode
10316 && (((TYPE_ALIGN (TREE_TYPE (tem)) < GET_MODE_ALIGNMENT (mode)
10317 || (bitpos % GET_MODE_ALIGNMENT (mode) != 0)
10318 || (MEM_P (op0)
10319 && (MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode1)
10320 || (bitpos % GET_MODE_ALIGNMENT (mode1) != 0))))
10321 && modifier != EXPAND_MEMORY
10322 && ((modifier == EXPAND_CONST_ADDRESS
10323 || modifier == EXPAND_INITIALIZER)
10324 ? STRICT_ALIGNMENT
10325 : SLOW_UNALIGNED_ACCESS (mode1, MEM_ALIGN (op0))))
10326 || (bitpos % BITS_PER_UNIT != 0)))
10327 /* If the type and the field are a constant size and the
10328 size of the type isn't the same size as the bitfield,
10329 we must use bitfield operations. */
10330 || (bitsize >= 0
10331 && TYPE_SIZE (TREE_TYPE (exp))
10332 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
10333 && 0 != compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)),
10334 bitsize)))
10335 {
10336 machine_mode ext_mode = mode;
10337
10338 if (ext_mode == BLKmode
10339 && ! (target != 0 && MEM_P (op0)
10340 && MEM_P (target)
10341 && bitpos % BITS_PER_UNIT == 0))
10342 ext_mode = mode_for_size (bitsize, MODE_INT, 1);
10343
10344 if (ext_mode == BLKmode)
10345 {
10346 if (target == 0)
10347 target = assign_temp (type, 1, 1);
10348
10349 /* ??? Unlike the similar test a few lines below, this one is
10350 very likely obsolete. */
10351 if (bitsize == 0)
10352 return target;
10353
10354 /* In this case, BITPOS must start at a byte boundary and
10355 TARGET, if specified, must be a MEM. */
10356 gcc_assert (MEM_P (op0)
10357 && (!target || MEM_P (target))
10358 && !(bitpos % BITS_PER_UNIT));
10359
10360 emit_block_move (target,
10361 adjust_address (op0, VOIDmode,
10362 bitpos / BITS_PER_UNIT),
10363 GEN_INT ((bitsize + BITS_PER_UNIT - 1)
10364 / BITS_PER_UNIT),
10365 (modifier == EXPAND_STACK_PARM
10366 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
10367
10368 return target;
10369 }
10370
10371 /* If we have nothing to extract, the result will be 0 for targets
10372 with SHIFT_COUNT_TRUNCATED == 0 and garbage otherwise. Always
10373 return 0 for the sake of consistency, as reading a zero-sized
10374 bitfield is valid in Ada and the value is fully specified. */
10375 if (bitsize == 0)
10376 return const0_rtx;
10377
10378 op0 = validize_mem (op0);
10379
10380 if (MEM_P (op0) && REG_P (XEXP (op0, 0)))
10381 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
10382
10383 op0 = extract_bit_field (op0, bitsize, bitpos, unsignedp,
10384 (modifier == EXPAND_STACK_PARM
10385 ? NULL_RTX : target),
10386 ext_mode, ext_mode);
10387
10388 /* If the result is a record type and BITSIZE is narrower than
10389 the mode of OP0, an integral mode, and this is a big endian
10390 machine, we must put the field into the high-order bits. */
10391 if (TREE_CODE (type) == RECORD_TYPE && BYTES_BIG_ENDIAN
10392 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT
10393 && bitsize < (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (op0)))
10394 op0 = expand_shift (LSHIFT_EXPR, GET_MODE (op0), op0,
10395 GET_MODE_BITSIZE (GET_MODE (op0))
10396 - bitsize, op0, 1);
10397
10398 /* If the result type is BLKmode, store the data into a temporary
10399 of the appropriate type, but with the mode corresponding to the
10400 mode for the data we have (op0's mode). */
10401 if (mode == BLKmode)
10402 {
10403 rtx new_rtx
10404 = assign_stack_temp_for_type (ext_mode,
10405 GET_MODE_BITSIZE (ext_mode),
10406 type);
10407 emit_move_insn (new_rtx, op0);
10408 op0 = copy_rtx (new_rtx);
10409 PUT_MODE (op0, BLKmode);
10410 }
10411
10412 return op0;
10413 }
10414
10415 /* If the result is BLKmode, use that to access the object
10416 now as well. */
10417 if (mode == BLKmode)
10418 mode1 = BLKmode;
10419
10420 /* Get a reference to just this component. */
10421 if (modifier == EXPAND_CONST_ADDRESS
10422 || modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
10423 op0 = adjust_address_nv (op0, mode1, bitpos / BITS_PER_UNIT);
10424 else
10425 op0 = adjust_address (op0, mode1, bitpos / BITS_PER_UNIT);
10426
10427 if (op0 == orig_op0)
10428 op0 = copy_rtx (op0);
10429
10430 set_mem_attributes (op0, exp, 0);
10431
10432 if (REG_P (XEXP (op0, 0)))
10433 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
10434
10435 /* If op0 is a temporary because the original expressions was forced
10436 to memory, clear MEM_EXPR so that the original expression cannot
10437 be marked as addressable through MEM_EXPR of the temporary. */
10438 if (clear_mem_expr)
10439 set_mem_expr (op0, NULL_TREE);
10440
10441 MEM_VOLATILE_P (op0) |= volatilep;
10442 if (mode == mode1 || mode1 == BLKmode || mode1 == tmode
10443 || modifier == EXPAND_CONST_ADDRESS
10444 || modifier == EXPAND_INITIALIZER)
10445 return op0;
10446
10447 if (target == 0)
10448 target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode);
10449
10450 convert_move (target, op0, unsignedp);
10451 return target;
10452 }
10453
10454 case OBJ_TYPE_REF:
10455 return expand_expr (OBJ_TYPE_REF_EXPR (exp), target, tmode, modifier);
10456
10457 case CALL_EXPR:
10458 /* All valid uses of __builtin_va_arg_pack () are removed during
10459 inlining. */
10460 if (CALL_EXPR_VA_ARG_PACK (exp))
10461 error ("%Kinvalid use of %<__builtin_va_arg_pack ()%>", exp);
10462 {
10463 tree fndecl = get_callee_fndecl (exp), attr;
10464
10465 if (fndecl
10466 && (attr = lookup_attribute ("error",
10467 DECL_ATTRIBUTES (fndecl))) != NULL)
10468 error ("%Kcall to %qs declared with attribute error: %s",
10469 exp, identifier_to_locale (lang_hooks.decl_printable_name (fndecl, 1)),
10470 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr))));
10471 if (fndecl
10472 && (attr = lookup_attribute ("warning",
10473 DECL_ATTRIBUTES (fndecl))) != NULL)
10474 warning_at (tree_nonartificial_location (exp),
10475 0, "%Kcall to %qs declared with attribute warning: %s",
10476 exp, identifier_to_locale (lang_hooks.decl_printable_name (fndecl, 1)),
10477 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr))));
10478
10479 /* Check for a built-in function. */
10480 if (fndecl && DECL_BUILT_IN (fndecl))
10481 {
10482 gcc_assert (DECL_BUILT_IN_CLASS (fndecl) != BUILT_IN_FRONTEND);
10483 if (CALL_WITH_BOUNDS_P (exp))
10484 return expand_builtin_with_bounds (exp, target, subtarget,
10485 tmode, ignore);
10486 else
10487 return expand_builtin (exp, target, subtarget, tmode, ignore);
10488 }
10489 }
10490 return expand_call (exp, target, ignore);
10491
10492 case VIEW_CONVERT_EXPR:
10493 op0 = NULL_RTX;
10494
10495 /* If we are converting to BLKmode, try to avoid an intermediate
10496 temporary by fetching an inner memory reference. */
10497 if (mode == BLKmode
10498 && TREE_CODE (TYPE_SIZE (type)) == INTEGER_CST
10499 && TYPE_MODE (TREE_TYPE (treeop0)) != BLKmode
10500 && handled_component_p (treeop0))
10501 {
10502 machine_mode mode1;
10503 HOST_WIDE_INT bitsize, bitpos;
10504 tree offset;
10505 int unsignedp;
10506 int volatilep = 0;
10507 tree tem
10508 = get_inner_reference (treeop0, &bitsize, &bitpos,
10509 &offset, &mode1, &unsignedp, &volatilep,
10510 true);
10511 rtx orig_op0;
10512
10513 /* ??? We should work harder and deal with non-zero offsets. */
10514 if (!offset
10515 && (bitpos % BITS_PER_UNIT) == 0
10516 && bitsize >= 0
10517 && compare_tree_int (TYPE_SIZE (type), bitsize) == 0)
10518 {
10519 /* See the normal_inner_ref case for the rationale. */
10520 orig_op0
10521 = expand_expr_real (tem,
10522 (TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE
10523 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem)))
10524 != INTEGER_CST)
10525 && modifier != EXPAND_STACK_PARM
10526 ? target : NULL_RTX),
10527 VOIDmode,
10528 modifier == EXPAND_SUM ? EXPAND_NORMAL : modifier,
10529 NULL, true);
10530
10531 if (MEM_P (orig_op0))
10532 {
10533 op0 = orig_op0;
10534
10535 /* Get a reference to just this component. */
10536 if (modifier == EXPAND_CONST_ADDRESS
10537 || modifier == EXPAND_SUM
10538 || modifier == EXPAND_INITIALIZER)
10539 op0 = adjust_address_nv (op0, mode, bitpos / BITS_PER_UNIT);
10540 else
10541 op0 = adjust_address (op0, mode, bitpos / BITS_PER_UNIT);
10542
10543 if (op0 == orig_op0)
10544 op0 = copy_rtx (op0);
10545
10546 set_mem_attributes (op0, treeop0, 0);
10547 if (REG_P (XEXP (op0, 0)))
10548 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
10549
10550 MEM_VOLATILE_P (op0) |= volatilep;
10551 }
10552 }
10553 }
10554
10555 if (!op0)
10556 op0 = expand_expr_real (treeop0, NULL_RTX, VOIDmode, modifier,
10557 NULL, inner_reference_p);
10558
10559 /* If the input and output modes are both the same, we are done. */
10560 if (mode == GET_MODE (op0))
10561 ;
10562 /* If neither mode is BLKmode, and both modes are the same size
10563 then we can use gen_lowpart. */
10564 else if (mode != BLKmode && GET_MODE (op0) != BLKmode
10565 && (GET_MODE_PRECISION (mode)
10566 == GET_MODE_PRECISION (GET_MODE (op0)))
10567 && !COMPLEX_MODE_P (GET_MODE (op0)))
10568 {
10569 if (GET_CODE (op0) == SUBREG)
10570 op0 = force_reg (GET_MODE (op0), op0);
10571 temp = gen_lowpart_common (mode, op0);
10572 if (temp)
10573 op0 = temp;
10574 else
10575 {
10576 if (!REG_P (op0) && !MEM_P (op0))
10577 op0 = force_reg (GET_MODE (op0), op0);
10578 op0 = gen_lowpart (mode, op0);
10579 }
10580 }
10581 /* If both types are integral, convert from one mode to the other. */
10582 else if (INTEGRAL_TYPE_P (type) && INTEGRAL_TYPE_P (TREE_TYPE (treeop0)))
10583 op0 = convert_modes (mode, GET_MODE (op0), op0,
10584 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
10585 /* If the output type is a bit-field type, do an extraction. */
10586 else if (reduce_bit_field)
10587 return extract_bit_field (op0, TYPE_PRECISION (type), 0,
10588 TYPE_UNSIGNED (type), NULL_RTX,
10589 mode, mode);
10590 /* As a last resort, spill op0 to memory, and reload it in a
10591 different mode. */
10592 else if (!MEM_P (op0))
10593 {
10594 /* If the operand is not a MEM, force it into memory. Since we
10595 are going to be changing the mode of the MEM, don't call
10596 force_const_mem for constants because we don't allow pool
10597 constants to change mode. */
10598 tree inner_type = TREE_TYPE (treeop0);
10599
10600 gcc_assert (!TREE_ADDRESSABLE (exp));
10601
10602 if (target == 0 || GET_MODE (target) != TYPE_MODE (inner_type))
10603 target
10604 = assign_stack_temp_for_type
10605 (TYPE_MODE (inner_type),
10606 GET_MODE_SIZE (TYPE_MODE (inner_type)), inner_type);
10607
10608 emit_move_insn (target, op0);
10609 op0 = target;
10610 }
10611
10612 /* If OP0 is (now) a MEM, we need to deal with alignment issues. If the
10613 output type is such that the operand is known to be aligned, indicate
10614 that it is. Otherwise, we need only be concerned about alignment for
10615 non-BLKmode results. */
10616 if (MEM_P (op0))
10617 {
10618 enum insn_code icode;
10619
10620 if (TYPE_ALIGN_OK (type))
10621 {
10622 /* ??? Copying the MEM without substantially changing it might
10623 run afoul of the code handling volatile memory references in
10624 store_expr, which assumes that TARGET is returned unmodified
10625 if it has been used. */
10626 op0 = copy_rtx (op0);
10627 set_mem_align (op0, MAX (MEM_ALIGN (op0), TYPE_ALIGN (type)));
10628 }
10629 else if (modifier != EXPAND_WRITE
10630 && modifier != EXPAND_MEMORY
10631 && !inner_reference_p
10632 && mode != BLKmode
10633 && MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode))
10634 {
10635 /* If the target does have special handling for unaligned
10636 loads of mode then use them. */
10637 if ((icode = optab_handler (movmisalign_optab, mode))
10638 != CODE_FOR_nothing)
10639 {
10640 rtx reg, insn;
10641
10642 op0 = adjust_address (op0, mode, 0);
10643 /* We've already validated the memory, and we're creating a
10644 new pseudo destination. The predicates really can't
10645 fail. */
10646 reg = gen_reg_rtx (mode);
10647
10648 /* Nor can the insn generator. */
10649 insn = GEN_FCN (icode) (reg, op0);
10650 emit_insn (insn);
10651 return reg;
10652 }
10653 else if (STRICT_ALIGNMENT)
10654 {
10655 tree inner_type = TREE_TYPE (treeop0);
10656 HOST_WIDE_INT temp_size
10657 = MAX (int_size_in_bytes (inner_type),
10658 (HOST_WIDE_INT) GET_MODE_SIZE (mode));
10659 rtx new_rtx
10660 = assign_stack_temp_for_type (mode, temp_size, type);
10661 rtx new_with_op0_mode
10662 = adjust_address (new_rtx, GET_MODE (op0), 0);
10663
10664 gcc_assert (!TREE_ADDRESSABLE (exp));
10665
10666 if (GET_MODE (op0) == BLKmode)
10667 emit_block_move (new_with_op0_mode, op0,
10668 GEN_INT (GET_MODE_SIZE (mode)),
10669 (modifier == EXPAND_STACK_PARM
10670 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
10671 else
10672 emit_move_insn (new_with_op0_mode, op0);
10673
10674 op0 = new_rtx;
10675 }
10676 }
10677
10678 op0 = adjust_address (op0, mode, 0);
10679 }
10680
10681 return op0;
10682
10683 case MODIFY_EXPR:
10684 {
10685 tree lhs = treeop0;
10686 tree rhs = treeop1;
10687 gcc_assert (ignore);
10688
10689 /* Check for |= or &= of a bitfield of size one into another bitfield
10690 of size 1. In this case, (unless we need the result of the
10691 assignment) we can do this more efficiently with a
10692 test followed by an assignment, if necessary.
10693
10694 ??? At this point, we can't get a BIT_FIELD_REF here. But if
10695 things change so we do, this code should be enhanced to
10696 support it. */
10697 if (TREE_CODE (lhs) == COMPONENT_REF
10698 && (TREE_CODE (rhs) == BIT_IOR_EXPR
10699 || TREE_CODE (rhs) == BIT_AND_EXPR)
10700 && TREE_OPERAND (rhs, 0) == lhs
10701 && TREE_CODE (TREE_OPERAND (rhs, 1)) == COMPONENT_REF
10702 && integer_onep (DECL_SIZE (TREE_OPERAND (lhs, 1)))
10703 && integer_onep (DECL_SIZE (TREE_OPERAND (TREE_OPERAND (rhs, 1), 1))))
10704 {
10705 rtx_code_label *label = gen_label_rtx ();
10706 int value = TREE_CODE (rhs) == BIT_IOR_EXPR;
10707 do_jump (TREE_OPERAND (rhs, 1),
10708 value ? label : 0,
10709 value ? 0 : label, -1);
10710 expand_assignment (lhs, build_int_cst (TREE_TYPE (rhs), value),
10711 false);
10712 do_pending_stack_adjust ();
10713 emit_label (label);
10714 return const0_rtx;
10715 }
10716
10717 expand_assignment (lhs, rhs, false);
10718 return const0_rtx;
10719 }
10720
10721 case ADDR_EXPR:
10722 return expand_expr_addr_expr (exp, target, tmode, modifier);
10723
10724 case REALPART_EXPR:
10725 op0 = expand_normal (treeop0);
10726 return read_complex_part (op0, false);
10727
10728 case IMAGPART_EXPR:
10729 op0 = expand_normal (treeop0);
10730 return read_complex_part (op0, true);
10731
10732 case RETURN_EXPR:
10733 case LABEL_EXPR:
10734 case GOTO_EXPR:
10735 case SWITCH_EXPR:
10736 case ASM_EXPR:
10737 /* Expanded in cfgexpand.c. */
10738 gcc_unreachable ();
10739
10740 case TRY_CATCH_EXPR:
10741 case CATCH_EXPR:
10742 case EH_FILTER_EXPR:
10743 case TRY_FINALLY_EXPR:
10744 /* Lowered by tree-eh.c. */
10745 gcc_unreachable ();
10746
10747 case WITH_CLEANUP_EXPR:
10748 case CLEANUP_POINT_EXPR:
10749 case TARGET_EXPR:
10750 case CASE_LABEL_EXPR:
10751 case VA_ARG_EXPR:
10752 case BIND_EXPR:
10753 case INIT_EXPR:
10754 case CONJ_EXPR:
10755 case COMPOUND_EXPR:
10756 case PREINCREMENT_EXPR:
10757 case PREDECREMENT_EXPR:
10758 case POSTINCREMENT_EXPR:
10759 case POSTDECREMENT_EXPR:
10760 case LOOP_EXPR:
10761 case EXIT_EXPR:
10762 case COMPOUND_LITERAL_EXPR:
10763 /* Lowered by gimplify.c. */
10764 gcc_unreachable ();
10765
10766 case FDESC_EXPR:
10767 /* Function descriptors are not valid except for as
10768 initialization constants, and should not be expanded. */
10769 gcc_unreachable ();
10770
10771 case WITH_SIZE_EXPR:
10772 /* WITH_SIZE_EXPR expands to its first argument. The caller should
10773 have pulled out the size to use in whatever context it needed. */
10774 return expand_expr_real (treeop0, original_target, tmode,
10775 modifier, alt_rtl, inner_reference_p);
10776
10777 default:
10778 return expand_expr_real_2 (&ops, target, tmode, modifier);
10779 }
10780 }
10781 \f
10782 /* Subroutine of above: reduce EXP to the precision of TYPE (in the
10783 signedness of TYPE), possibly returning the result in TARGET. */
10784 static rtx
10785 reduce_to_bit_field_precision (rtx exp, rtx target, tree type)
10786 {
10787 HOST_WIDE_INT prec = TYPE_PRECISION (type);
10788 if (target && GET_MODE (target) != GET_MODE (exp))
10789 target = 0;
10790 /* For constant values, reduce using build_int_cst_type. */
10791 if (CONST_INT_P (exp))
10792 {
10793 HOST_WIDE_INT value = INTVAL (exp);
10794 tree t = build_int_cst_type (type, value);
10795 return expand_expr (t, target, VOIDmode, EXPAND_NORMAL);
10796 }
10797 else if (TYPE_UNSIGNED (type))
10798 {
10799 machine_mode mode = GET_MODE (exp);
10800 rtx mask = immed_wide_int_const
10801 (wi::mask (prec, false, GET_MODE_PRECISION (mode)), mode);
10802 return expand_and (mode, exp, mask, target);
10803 }
10804 else
10805 {
10806 int count = GET_MODE_PRECISION (GET_MODE (exp)) - prec;
10807 exp = expand_shift (LSHIFT_EXPR, GET_MODE (exp),
10808 exp, count, target, 0);
10809 return expand_shift (RSHIFT_EXPR, GET_MODE (exp),
10810 exp, count, target, 0);
10811 }
10812 }
10813 \f
10814 /* Subroutine of above: returns 1 if OFFSET corresponds to an offset that
10815 when applied to the address of EXP produces an address known to be
10816 aligned more than BIGGEST_ALIGNMENT. */
10817
10818 static int
10819 is_aligning_offset (const_tree offset, const_tree exp)
10820 {
10821 /* Strip off any conversions. */
10822 while (CONVERT_EXPR_P (offset))
10823 offset = TREE_OPERAND (offset, 0);
10824
10825 /* We must now have a BIT_AND_EXPR with a constant that is one less than
10826 power of 2 and which is larger than BIGGEST_ALIGNMENT. */
10827 if (TREE_CODE (offset) != BIT_AND_EXPR
10828 || !tree_fits_uhwi_p (TREE_OPERAND (offset, 1))
10829 || compare_tree_int (TREE_OPERAND (offset, 1),
10830 BIGGEST_ALIGNMENT / BITS_PER_UNIT) <= 0
10831 || exact_log2 (tree_to_uhwi (TREE_OPERAND (offset, 1)) + 1) < 0)
10832 return 0;
10833
10834 /* Look at the first operand of BIT_AND_EXPR and strip any conversion.
10835 It must be NEGATE_EXPR. Then strip any more conversions. */
10836 offset = TREE_OPERAND (offset, 0);
10837 while (CONVERT_EXPR_P (offset))
10838 offset = TREE_OPERAND (offset, 0);
10839
10840 if (TREE_CODE (offset) != NEGATE_EXPR)
10841 return 0;
10842
10843 offset = TREE_OPERAND (offset, 0);
10844 while (CONVERT_EXPR_P (offset))
10845 offset = TREE_OPERAND (offset, 0);
10846
10847 /* This must now be the address of EXP. */
10848 return TREE_CODE (offset) == ADDR_EXPR && TREE_OPERAND (offset, 0) == exp;
10849 }
10850 \f
10851 /* Return the tree node if an ARG corresponds to a string constant or zero
10852 if it doesn't. If we return nonzero, set *PTR_OFFSET to the offset
10853 in bytes within the string that ARG is accessing. The type of the
10854 offset will be `sizetype'. */
10855
10856 tree
10857 string_constant (tree arg, tree *ptr_offset)
10858 {
10859 tree array, offset, lower_bound;
10860 STRIP_NOPS (arg);
10861
10862 if (TREE_CODE (arg) == ADDR_EXPR)
10863 {
10864 if (TREE_CODE (TREE_OPERAND (arg, 0)) == STRING_CST)
10865 {
10866 *ptr_offset = size_zero_node;
10867 return TREE_OPERAND (arg, 0);
10868 }
10869 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == VAR_DECL)
10870 {
10871 array = TREE_OPERAND (arg, 0);
10872 offset = size_zero_node;
10873 }
10874 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == ARRAY_REF)
10875 {
10876 array = TREE_OPERAND (TREE_OPERAND (arg, 0), 0);
10877 offset = TREE_OPERAND (TREE_OPERAND (arg, 0), 1);
10878 if (TREE_CODE (array) != STRING_CST
10879 && TREE_CODE (array) != VAR_DECL)
10880 return 0;
10881
10882 /* Check if the array has a nonzero lower bound. */
10883 lower_bound = array_ref_low_bound (TREE_OPERAND (arg, 0));
10884 if (!integer_zerop (lower_bound))
10885 {
10886 /* If the offset and base aren't both constants, return 0. */
10887 if (TREE_CODE (lower_bound) != INTEGER_CST)
10888 return 0;
10889 if (TREE_CODE (offset) != INTEGER_CST)
10890 return 0;
10891 /* Adjust offset by the lower bound. */
10892 offset = size_diffop (fold_convert (sizetype, offset),
10893 fold_convert (sizetype, lower_bound));
10894 }
10895 }
10896 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == MEM_REF)
10897 {
10898 array = TREE_OPERAND (TREE_OPERAND (arg, 0), 0);
10899 offset = TREE_OPERAND (TREE_OPERAND (arg, 0), 1);
10900 if (TREE_CODE (array) != ADDR_EXPR)
10901 return 0;
10902 array = TREE_OPERAND (array, 0);
10903 if (TREE_CODE (array) != STRING_CST
10904 && TREE_CODE (array) != VAR_DECL)
10905 return 0;
10906 }
10907 else
10908 return 0;
10909 }
10910 else if (TREE_CODE (arg) == PLUS_EXPR || TREE_CODE (arg) == POINTER_PLUS_EXPR)
10911 {
10912 tree arg0 = TREE_OPERAND (arg, 0);
10913 tree arg1 = TREE_OPERAND (arg, 1);
10914
10915 STRIP_NOPS (arg0);
10916 STRIP_NOPS (arg1);
10917
10918 if (TREE_CODE (arg0) == ADDR_EXPR
10919 && (TREE_CODE (TREE_OPERAND (arg0, 0)) == STRING_CST
10920 || TREE_CODE (TREE_OPERAND (arg0, 0)) == VAR_DECL))
10921 {
10922 array = TREE_OPERAND (arg0, 0);
10923 offset = arg1;
10924 }
10925 else if (TREE_CODE (arg1) == ADDR_EXPR
10926 && (TREE_CODE (TREE_OPERAND (arg1, 0)) == STRING_CST
10927 || TREE_CODE (TREE_OPERAND (arg1, 0)) == VAR_DECL))
10928 {
10929 array = TREE_OPERAND (arg1, 0);
10930 offset = arg0;
10931 }
10932 else
10933 return 0;
10934 }
10935 else
10936 return 0;
10937
10938 if (TREE_CODE (array) == STRING_CST)
10939 {
10940 *ptr_offset = fold_convert (sizetype, offset);
10941 return array;
10942 }
10943 else if (TREE_CODE (array) == VAR_DECL
10944 || TREE_CODE (array) == CONST_DECL)
10945 {
10946 int length;
10947 tree init = ctor_for_folding (array);
10948
10949 /* Variables initialized to string literals can be handled too. */
10950 if (init == error_mark_node
10951 || !init
10952 || TREE_CODE (init) != STRING_CST)
10953 return 0;
10954
10955 /* Avoid const char foo[4] = "abcde"; */
10956 if (DECL_SIZE_UNIT (array) == NULL_TREE
10957 || TREE_CODE (DECL_SIZE_UNIT (array)) != INTEGER_CST
10958 || (length = TREE_STRING_LENGTH (init)) <= 0
10959 || compare_tree_int (DECL_SIZE_UNIT (array), length) < 0)
10960 return 0;
10961
10962 /* If variable is bigger than the string literal, OFFSET must be constant
10963 and inside of the bounds of the string literal. */
10964 offset = fold_convert (sizetype, offset);
10965 if (compare_tree_int (DECL_SIZE_UNIT (array), length) > 0
10966 && (! tree_fits_uhwi_p (offset)
10967 || compare_tree_int (offset, length) >= 0))
10968 return 0;
10969
10970 *ptr_offset = offset;
10971 return init;
10972 }
10973
10974 return 0;
10975 }
10976 \f
10977 /* Generate code to calculate OPS, and exploded expression
10978 using a store-flag instruction and return an rtx for the result.
10979 OPS reflects a comparison.
10980
10981 If TARGET is nonzero, store the result there if convenient.
10982
10983 Return zero if there is no suitable set-flag instruction
10984 available on this machine.
10985
10986 Once expand_expr has been called on the arguments of the comparison,
10987 we are committed to doing the store flag, since it is not safe to
10988 re-evaluate the expression. We emit the store-flag insn by calling
10989 emit_store_flag, but only expand the arguments if we have a reason
10990 to believe that emit_store_flag will be successful. If we think that
10991 it will, but it isn't, we have to simulate the store-flag with a
10992 set/jump/set sequence. */
10993
10994 static rtx
10995 do_store_flag (sepops ops, rtx target, machine_mode mode)
10996 {
10997 enum rtx_code code;
10998 tree arg0, arg1, type;
10999 tree tem;
11000 machine_mode operand_mode;
11001 int unsignedp;
11002 rtx op0, op1;
11003 rtx subtarget = target;
11004 location_t loc = ops->location;
11005
11006 arg0 = ops->op0;
11007 arg1 = ops->op1;
11008
11009 /* Don't crash if the comparison was erroneous. */
11010 if (arg0 == error_mark_node || arg1 == error_mark_node)
11011 return const0_rtx;
11012
11013 type = TREE_TYPE (arg0);
11014 operand_mode = TYPE_MODE (type);
11015 unsignedp = TYPE_UNSIGNED (type);
11016
11017 /* We won't bother with BLKmode store-flag operations because it would mean
11018 passing a lot of information to emit_store_flag. */
11019 if (operand_mode == BLKmode)
11020 return 0;
11021
11022 /* We won't bother with store-flag operations involving function pointers
11023 when function pointers must be canonicalized before comparisons. */
11024 #ifdef HAVE_canonicalize_funcptr_for_compare
11025 if (HAVE_canonicalize_funcptr_for_compare
11026 && ((TREE_CODE (TREE_TYPE (arg0)) == POINTER_TYPE
11027 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg0)))
11028 == FUNCTION_TYPE))
11029 || (TREE_CODE (TREE_TYPE (arg1)) == POINTER_TYPE
11030 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg1)))
11031 == FUNCTION_TYPE))))
11032 return 0;
11033 #endif
11034
11035 STRIP_NOPS (arg0);
11036 STRIP_NOPS (arg1);
11037
11038 /* For vector typed comparisons emit code to generate the desired
11039 all-ones or all-zeros mask. Conveniently use the VEC_COND_EXPR
11040 expander for this. */
11041 if (TREE_CODE (ops->type) == VECTOR_TYPE)
11042 {
11043 tree ifexp = build2 (ops->code, ops->type, arg0, arg1);
11044 tree if_true = constant_boolean_node (true, ops->type);
11045 tree if_false = constant_boolean_node (false, ops->type);
11046 return expand_vec_cond_expr (ops->type, ifexp, if_true, if_false, target);
11047 }
11048
11049 /* Get the rtx comparison code to use. We know that EXP is a comparison
11050 operation of some type. Some comparisons against 1 and -1 can be
11051 converted to comparisons with zero. Do so here so that the tests
11052 below will be aware that we have a comparison with zero. These
11053 tests will not catch constants in the first operand, but constants
11054 are rarely passed as the first operand. */
11055
11056 switch (ops->code)
11057 {
11058 case EQ_EXPR:
11059 code = EQ;
11060 break;
11061 case NE_EXPR:
11062 code = NE;
11063 break;
11064 case LT_EXPR:
11065 if (integer_onep (arg1))
11066 arg1 = integer_zero_node, code = unsignedp ? LEU : LE;
11067 else
11068 code = unsignedp ? LTU : LT;
11069 break;
11070 case LE_EXPR:
11071 if (! unsignedp && integer_all_onesp (arg1))
11072 arg1 = integer_zero_node, code = LT;
11073 else
11074 code = unsignedp ? LEU : LE;
11075 break;
11076 case GT_EXPR:
11077 if (! unsignedp && integer_all_onesp (arg1))
11078 arg1 = integer_zero_node, code = GE;
11079 else
11080 code = unsignedp ? GTU : GT;
11081 break;
11082 case GE_EXPR:
11083 if (integer_onep (arg1))
11084 arg1 = integer_zero_node, code = unsignedp ? GTU : GT;
11085 else
11086 code = unsignedp ? GEU : GE;
11087 break;
11088
11089 case UNORDERED_EXPR:
11090 code = UNORDERED;
11091 break;
11092 case ORDERED_EXPR:
11093 code = ORDERED;
11094 break;
11095 case UNLT_EXPR:
11096 code = UNLT;
11097 break;
11098 case UNLE_EXPR:
11099 code = UNLE;
11100 break;
11101 case UNGT_EXPR:
11102 code = UNGT;
11103 break;
11104 case UNGE_EXPR:
11105 code = UNGE;
11106 break;
11107 case UNEQ_EXPR:
11108 code = UNEQ;
11109 break;
11110 case LTGT_EXPR:
11111 code = LTGT;
11112 break;
11113
11114 default:
11115 gcc_unreachable ();
11116 }
11117
11118 /* Put a constant second. */
11119 if (TREE_CODE (arg0) == REAL_CST || TREE_CODE (arg0) == INTEGER_CST
11120 || TREE_CODE (arg0) == FIXED_CST)
11121 {
11122 tem = arg0; arg0 = arg1; arg1 = tem;
11123 code = swap_condition (code);
11124 }
11125
11126 /* If this is an equality or inequality test of a single bit, we can
11127 do this by shifting the bit being tested to the low-order bit and
11128 masking the result with the constant 1. If the condition was EQ,
11129 we xor it with 1. This does not require an scc insn and is faster
11130 than an scc insn even if we have it.
11131
11132 The code to make this transformation was moved into fold_single_bit_test,
11133 so we just call into the folder and expand its result. */
11134
11135 if ((code == NE || code == EQ)
11136 && integer_zerop (arg1)
11137 && (TYPE_PRECISION (ops->type) != 1 || TYPE_UNSIGNED (ops->type)))
11138 {
11139 gimple srcstmt = get_def_for_expr (arg0, BIT_AND_EXPR);
11140 if (srcstmt
11141 && integer_pow2p (gimple_assign_rhs2 (srcstmt)))
11142 {
11143 enum tree_code tcode = code == NE ? NE_EXPR : EQ_EXPR;
11144 tree type = lang_hooks.types.type_for_mode (mode, unsignedp);
11145 tree temp = fold_build2_loc (loc, BIT_AND_EXPR, TREE_TYPE (arg1),
11146 gimple_assign_rhs1 (srcstmt),
11147 gimple_assign_rhs2 (srcstmt));
11148 temp = fold_single_bit_test (loc, tcode, temp, arg1, type);
11149 if (temp)
11150 return expand_expr (temp, target, VOIDmode, EXPAND_NORMAL);
11151 }
11152 }
11153
11154 if (! get_subtarget (target)
11155 || GET_MODE (subtarget) != operand_mode)
11156 subtarget = 0;
11157
11158 expand_operands (arg0, arg1, subtarget, &op0, &op1, EXPAND_NORMAL);
11159
11160 if (target == 0)
11161 target = gen_reg_rtx (mode);
11162
11163 /* Try a cstore if possible. */
11164 return emit_store_flag_force (target, code, op0, op1,
11165 operand_mode, unsignedp,
11166 (TYPE_PRECISION (ops->type) == 1
11167 && !TYPE_UNSIGNED (ops->type)) ? -1 : 1);
11168 }
11169 \f
11170
11171 /* Stubs in case we haven't got a casesi insn. */
11172 #ifndef HAVE_casesi
11173 # define HAVE_casesi 0
11174 # define gen_casesi(a, b, c, d, e) (0)
11175 # define CODE_FOR_casesi CODE_FOR_nothing
11176 #endif
11177
11178 /* Attempt to generate a casesi instruction. Returns 1 if successful,
11179 0 otherwise (i.e. if there is no casesi instruction).
11180
11181 DEFAULT_PROBABILITY is the probability of jumping to the default
11182 label. */
11183 int
11184 try_casesi (tree index_type, tree index_expr, tree minval, tree range,
11185 rtx table_label, rtx default_label, rtx fallback_label,
11186 int default_probability)
11187 {
11188 struct expand_operand ops[5];
11189 machine_mode index_mode = SImode;
11190 rtx op1, op2, index;
11191
11192 if (! HAVE_casesi)
11193 return 0;
11194
11195 /* Convert the index to SImode. */
11196 if (GET_MODE_BITSIZE (TYPE_MODE (index_type)) > GET_MODE_BITSIZE (index_mode))
11197 {
11198 machine_mode omode = TYPE_MODE (index_type);
11199 rtx rangertx = expand_normal (range);
11200
11201 /* We must handle the endpoints in the original mode. */
11202 index_expr = build2 (MINUS_EXPR, index_type,
11203 index_expr, minval);
11204 minval = integer_zero_node;
11205 index = expand_normal (index_expr);
11206 if (default_label)
11207 emit_cmp_and_jump_insns (rangertx, index, LTU, NULL_RTX,
11208 omode, 1, default_label,
11209 default_probability);
11210 /* Now we can safely truncate. */
11211 index = convert_to_mode (index_mode, index, 0);
11212 }
11213 else
11214 {
11215 if (TYPE_MODE (index_type) != index_mode)
11216 {
11217 index_type = lang_hooks.types.type_for_mode (index_mode, 0);
11218 index_expr = fold_convert (index_type, index_expr);
11219 }
11220
11221 index = expand_normal (index_expr);
11222 }
11223
11224 do_pending_stack_adjust ();
11225
11226 op1 = expand_normal (minval);
11227 op2 = expand_normal (range);
11228
11229 create_input_operand (&ops[0], index, index_mode);
11230 create_convert_operand_from_type (&ops[1], op1, TREE_TYPE (minval));
11231 create_convert_operand_from_type (&ops[2], op2, TREE_TYPE (range));
11232 create_fixed_operand (&ops[3], table_label);
11233 create_fixed_operand (&ops[4], (default_label
11234 ? default_label
11235 : fallback_label));
11236 expand_jump_insn (CODE_FOR_casesi, 5, ops);
11237 return 1;
11238 }
11239
11240 /* Attempt to generate a tablejump instruction; same concept. */
11241 #ifndef HAVE_tablejump
11242 #define HAVE_tablejump 0
11243 #define gen_tablejump(x, y) (0)
11244 #endif
11245
11246 /* Subroutine of the next function.
11247
11248 INDEX is the value being switched on, with the lowest value
11249 in the table already subtracted.
11250 MODE is its expected mode (needed if INDEX is constant).
11251 RANGE is the length of the jump table.
11252 TABLE_LABEL is a CODE_LABEL rtx for the table itself.
11253
11254 DEFAULT_LABEL is a CODE_LABEL rtx to jump to if the
11255 index value is out of range.
11256 DEFAULT_PROBABILITY is the probability of jumping to
11257 the default label. */
11258
11259 static void
11260 do_tablejump (rtx index, machine_mode mode, rtx range, rtx table_label,
11261 rtx default_label, int default_probability)
11262 {
11263 rtx temp, vector;
11264
11265 if (INTVAL (range) > cfun->cfg->max_jumptable_ents)
11266 cfun->cfg->max_jumptable_ents = INTVAL (range);
11267
11268 /* Do an unsigned comparison (in the proper mode) between the index
11269 expression and the value which represents the length of the range.
11270 Since we just finished subtracting the lower bound of the range
11271 from the index expression, this comparison allows us to simultaneously
11272 check that the original index expression value is both greater than
11273 or equal to the minimum value of the range and less than or equal to
11274 the maximum value of the range. */
11275
11276 if (default_label)
11277 emit_cmp_and_jump_insns (index, range, GTU, NULL_RTX, mode, 1,
11278 default_label, default_probability);
11279
11280
11281 /* If index is in range, it must fit in Pmode.
11282 Convert to Pmode so we can index with it. */
11283 if (mode != Pmode)
11284 index = convert_to_mode (Pmode, index, 1);
11285
11286 /* Don't let a MEM slip through, because then INDEX that comes
11287 out of PIC_CASE_VECTOR_ADDRESS won't be a valid address,
11288 and break_out_memory_refs will go to work on it and mess it up. */
11289 #ifdef PIC_CASE_VECTOR_ADDRESS
11290 if (flag_pic && !REG_P (index))
11291 index = copy_to_mode_reg (Pmode, index);
11292 #endif
11293
11294 /* ??? The only correct use of CASE_VECTOR_MODE is the one inside the
11295 GET_MODE_SIZE, because this indicates how large insns are. The other
11296 uses should all be Pmode, because they are addresses. This code
11297 could fail if addresses and insns are not the same size. */
11298 index = simplify_gen_binary (MULT, Pmode, index,
11299 gen_int_mode (GET_MODE_SIZE (CASE_VECTOR_MODE),
11300 Pmode));
11301 index = simplify_gen_binary (PLUS, Pmode, index,
11302 gen_rtx_LABEL_REF (Pmode, table_label));
11303
11304 #ifdef PIC_CASE_VECTOR_ADDRESS
11305 if (flag_pic)
11306 index = PIC_CASE_VECTOR_ADDRESS (index);
11307 else
11308 #endif
11309 index = memory_address (CASE_VECTOR_MODE, index);
11310 temp = gen_reg_rtx (CASE_VECTOR_MODE);
11311 vector = gen_const_mem (CASE_VECTOR_MODE, index);
11312 convert_move (temp, vector, 0);
11313
11314 emit_jump_insn (gen_tablejump (temp, table_label));
11315
11316 /* If we are generating PIC code or if the table is PC-relative, the
11317 table and JUMP_INSN must be adjacent, so don't output a BARRIER. */
11318 if (! CASE_VECTOR_PC_RELATIVE && ! flag_pic)
11319 emit_barrier ();
11320 }
11321
11322 int
11323 try_tablejump (tree index_type, tree index_expr, tree minval, tree range,
11324 rtx table_label, rtx default_label, int default_probability)
11325 {
11326 rtx index;
11327
11328 if (! HAVE_tablejump)
11329 return 0;
11330
11331 index_expr = fold_build2 (MINUS_EXPR, index_type,
11332 fold_convert (index_type, index_expr),
11333 fold_convert (index_type, minval));
11334 index = expand_normal (index_expr);
11335 do_pending_stack_adjust ();
11336
11337 do_tablejump (index, TYPE_MODE (index_type),
11338 convert_modes (TYPE_MODE (index_type),
11339 TYPE_MODE (TREE_TYPE (range)),
11340 expand_normal (range),
11341 TYPE_UNSIGNED (TREE_TYPE (range))),
11342 table_label, default_label, default_probability);
11343 return 1;
11344 }
11345
11346 /* Return a CONST_VECTOR rtx for a VECTOR_CST tree. */
11347 static rtx
11348 const_vector_from_tree (tree exp)
11349 {
11350 rtvec v;
11351 unsigned i;
11352 int units;
11353 tree elt;
11354 machine_mode inner, mode;
11355
11356 mode = TYPE_MODE (TREE_TYPE (exp));
11357
11358 if (initializer_zerop (exp))
11359 return CONST0_RTX (mode);
11360
11361 units = GET_MODE_NUNITS (mode);
11362 inner = GET_MODE_INNER (mode);
11363
11364 v = rtvec_alloc (units);
11365
11366 for (i = 0; i < VECTOR_CST_NELTS (exp); ++i)
11367 {
11368 elt = VECTOR_CST_ELT (exp, i);
11369
11370 if (TREE_CODE (elt) == REAL_CST)
11371 RTVEC_ELT (v, i) = CONST_DOUBLE_FROM_REAL_VALUE (TREE_REAL_CST (elt),
11372 inner);
11373 else if (TREE_CODE (elt) == FIXED_CST)
11374 RTVEC_ELT (v, i) = CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (elt),
11375 inner);
11376 else
11377 RTVEC_ELT (v, i) = immed_wide_int_const (elt, inner);
11378 }
11379
11380 return gen_rtx_CONST_VECTOR (mode, v);
11381 }
11382
11383 /* Build a decl for a personality function given a language prefix. */
11384
11385 tree
11386 build_personality_function (const char *lang)
11387 {
11388 const char *unwind_and_version;
11389 tree decl, type;
11390 char *name;
11391
11392 switch (targetm_common.except_unwind_info (&global_options))
11393 {
11394 case UI_NONE:
11395 return NULL;
11396 case UI_SJLJ:
11397 unwind_and_version = "_sj0";
11398 break;
11399 case UI_DWARF2:
11400 case UI_TARGET:
11401 unwind_and_version = "_v0";
11402 break;
11403 case UI_SEH:
11404 unwind_and_version = "_seh0";
11405 break;
11406 default:
11407 gcc_unreachable ();
11408 }
11409
11410 name = ACONCAT (("__", lang, "_personality", unwind_and_version, NULL));
11411
11412 type = build_function_type_list (integer_type_node, integer_type_node,
11413 long_long_unsigned_type_node,
11414 ptr_type_node, ptr_type_node, NULL_TREE);
11415 decl = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL,
11416 get_identifier (name), type);
11417 DECL_ARTIFICIAL (decl) = 1;
11418 DECL_EXTERNAL (decl) = 1;
11419 TREE_PUBLIC (decl) = 1;
11420
11421 /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with
11422 are the flags assigned by targetm.encode_section_info. */
11423 SET_SYMBOL_REF_DECL (XEXP (DECL_RTL (decl), 0), NULL);
11424
11425 return decl;
11426 }
11427
11428 /* Extracts the personality function of DECL and returns the corresponding
11429 libfunc. */
11430
11431 rtx
11432 get_personality_function (tree decl)
11433 {
11434 tree personality = DECL_FUNCTION_PERSONALITY (decl);
11435 enum eh_personality_kind pk;
11436
11437 pk = function_needs_eh_personality (DECL_STRUCT_FUNCTION (decl));
11438 if (pk == eh_personality_none)
11439 return NULL;
11440
11441 if (!personality
11442 && pk == eh_personality_any)
11443 personality = lang_hooks.eh_personality ();
11444
11445 if (pk == eh_personality_lang)
11446 gcc_assert (personality != NULL_TREE);
11447
11448 return XEXP (DECL_RTL (personality), 0);
11449 }
11450
11451 /* Returns a tree for the size of EXP in bytes. */
11452
11453 static tree
11454 tree_expr_size (const_tree exp)
11455 {
11456 if (DECL_P (exp)
11457 && DECL_SIZE_UNIT (exp) != 0)
11458 return DECL_SIZE_UNIT (exp);
11459 else
11460 return size_in_bytes (TREE_TYPE (exp));
11461 }
11462
11463 /* Return an rtx for the size in bytes of the value of EXP. */
11464
11465 rtx
11466 expr_size (tree exp)
11467 {
11468 tree size;
11469
11470 if (TREE_CODE (exp) == WITH_SIZE_EXPR)
11471 size = TREE_OPERAND (exp, 1);
11472 else
11473 {
11474 size = tree_expr_size (exp);
11475 gcc_assert (size);
11476 gcc_assert (size == SUBSTITUTE_PLACEHOLDER_IN_EXPR (size, exp));
11477 }
11478
11479 return expand_expr (size, NULL_RTX, TYPE_MODE (sizetype), EXPAND_NORMAL);
11480 }
11481
11482 /* Return a wide integer for the size in bytes of the value of EXP, or -1
11483 if the size can vary or is larger than an integer. */
11484
11485 static HOST_WIDE_INT
11486 int_expr_size (tree exp)
11487 {
11488 tree size;
11489
11490 if (TREE_CODE (exp) == WITH_SIZE_EXPR)
11491 size = TREE_OPERAND (exp, 1);
11492 else
11493 {
11494 size = tree_expr_size (exp);
11495 gcc_assert (size);
11496 }
11497
11498 if (size == 0 || !tree_fits_shwi_p (size))
11499 return -1;
11500
11501 return tree_to_shwi (size);
11502 }
11503
11504 #include "gt-expr.h"