expr.c (expand_expr_real_2): Properly truncate the BIT_NOT_EXPR expansion result...
[gcc.git] / gcc / expr.c
1 /* Convert tree expression to rtl instructions, for GNU compiler.
2 Copyright (C) 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011
4 Free Software Foundation, Inc.
5
6 This file is part of GCC.
7
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
11 version.
12
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
21
22 #include "config.h"
23 #include "system.h"
24 #include "coretypes.h"
25 #include "tm.h"
26 #include "machmode.h"
27 #include "rtl.h"
28 #include "tree.h"
29 #include "flags.h"
30 #include "regs.h"
31 #include "hard-reg-set.h"
32 #include "except.h"
33 #include "function.h"
34 #include "insn-config.h"
35 #include "insn-attr.h"
36 /* Include expr.h after insn-config.h so we get HAVE_conditional_move. */
37 #include "expr.h"
38 #include "optabs.h"
39 #include "libfuncs.h"
40 #include "recog.h"
41 #include "reload.h"
42 #include "output.h"
43 #include "typeclass.h"
44 #include "toplev.h"
45 #include "langhooks.h"
46 #include "intl.h"
47 #include "tm_p.h"
48 #include "tree-iterator.h"
49 #include "tree-pass.h"
50 #include "tree-flow.h"
51 #include "target.h"
52 #include "common/common-target.h"
53 #include "timevar.h"
54 #include "df.h"
55 #include "diagnostic.h"
56 #include "ssaexpand.h"
57 #include "target-globals.h"
58
59 /* Decide whether a function's arguments should be processed
60 from first to last or from last to first.
61
62 They should if the stack and args grow in opposite directions, but
63 only if we have push insns. */
64
65 #ifdef PUSH_ROUNDING
66
67 #ifndef PUSH_ARGS_REVERSED
68 #if defined (STACK_GROWS_DOWNWARD) != defined (ARGS_GROW_DOWNWARD)
69 #define PUSH_ARGS_REVERSED /* If it's last to first. */
70 #endif
71 #endif
72
73 #endif
74
75 #ifndef STACK_PUSH_CODE
76 #ifdef STACK_GROWS_DOWNWARD
77 #define STACK_PUSH_CODE PRE_DEC
78 #else
79 #define STACK_PUSH_CODE PRE_INC
80 #endif
81 #endif
82
83
84 /* If this is nonzero, we do not bother generating VOLATILE
85 around volatile memory references, and we are willing to
86 output indirect addresses. If cse is to follow, we reject
87 indirect addresses so a useful potential cse is generated;
88 if it is used only once, instruction combination will produce
89 the same indirect address eventually. */
90 int cse_not_expected;
91
92 /* This structure is used by move_by_pieces to describe the move to
93 be performed. */
94 struct move_by_pieces_d
95 {
96 rtx to;
97 rtx to_addr;
98 int autinc_to;
99 int explicit_inc_to;
100 rtx from;
101 rtx from_addr;
102 int autinc_from;
103 int explicit_inc_from;
104 unsigned HOST_WIDE_INT len;
105 HOST_WIDE_INT offset;
106 int reverse;
107 };
108
109 /* This structure is used by store_by_pieces to describe the clear to
110 be performed. */
111
112 struct store_by_pieces_d
113 {
114 rtx to;
115 rtx to_addr;
116 int autinc_to;
117 int explicit_inc_to;
118 unsigned HOST_WIDE_INT len;
119 HOST_WIDE_INT offset;
120 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode);
121 void *constfundata;
122 int reverse;
123 };
124
125 static unsigned HOST_WIDE_INT move_by_pieces_ninsns (unsigned HOST_WIDE_INT,
126 unsigned int,
127 unsigned int);
128 static void move_by_pieces_1 (rtx (*) (rtx, ...), enum machine_mode,
129 struct move_by_pieces_d *);
130 static bool block_move_libcall_safe_for_call_parm (void);
131 static bool emit_block_move_via_movmem (rtx, rtx, rtx, unsigned, unsigned, HOST_WIDE_INT);
132 static tree emit_block_move_libcall_fn (int);
133 static void emit_block_move_via_loop (rtx, rtx, rtx, unsigned);
134 static rtx clear_by_pieces_1 (void *, HOST_WIDE_INT, enum machine_mode);
135 static void clear_by_pieces (rtx, unsigned HOST_WIDE_INT, unsigned int);
136 static void store_by_pieces_1 (struct store_by_pieces_d *, unsigned int);
137 static void store_by_pieces_2 (rtx (*) (rtx, ...), enum machine_mode,
138 struct store_by_pieces_d *);
139 static tree clear_storage_libcall_fn (int);
140 static rtx compress_float_constant (rtx, rtx);
141 static rtx get_subtarget (rtx);
142 static void store_constructor_field (rtx, unsigned HOST_WIDE_INT,
143 HOST_WIDE_INT, enum machine_mode,
144 tree, tree, int, alias_set_type);
145 static void store_constructor (tree, rtx, int, HOST_WIDE_INT);
146 static rtx store_field (rtx, HOST_WIDE_INT, HOST_WIDE_INT, enum machine_mode,
147 tree, tree, alias_set_type, bool);
148
149 static unsigned HOST_WIDE_INT highest_pow2_factor_for_target (const_tree, const_tree);
150
151 static int is_aligning_offset (const_tree, const_tree);
152 static void expand_operands (tree, tree, rtx, rtx*, rtx*,
153 enum expand_modifier);
154 static rtx reduce_to_bit_field_precision (rtx, rtx, tree);
155 static rtx do_store_flag (sepops, rtx, enum machine_mode);
156 #ifdef PUSH_ROUNDING
157 static void emit_single_push_insn (enum machine_mode, rtx, tree);
158 #endif
159 static void do_tablejump (rtx, enum machine_mode, rtx, rtx, rtx);
160 static rtx const_vector_from_tree (tree);
161 static void write_complex_part (rtx, rtx, bool);
162
163 /* This macro is used to determine whether move_by_pieces should be called
164 to perform a structure copy. */
165 #ifndef MOVE_BY_PIECES_P
166 #define MOVE_BY_PIECES_P(SIZE, ALIGN) \
167 (move_by_pieces_ninsns (SIZE, ALIGN, MOVE_MAX_PIECES + 1) \
168 < (unsigned int) MOVE_RATIO (optimize_insn_for_speed_p ()))
169 #endif
170
171 /* This macro is used to determine whether clear_by_pieces should be
172 called to clear storage. */
173 #ifndef CLEAR_BY_PIECES_P
174 #define CLEAR_BY_PIECES_P(SIZE, ALIGN) \
175 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
176 < (unsigned int) CLEAR_RATIO (optimize_insn_for_speed_p ()))
177 #endif
178
179 /* This macro is used to determine whether store_by_pieces should be
180 called to "memset" storage with byte values other than zero. */
181 #ifndef SET_BY_PIECES_P
182 #define SET_BY_PIECES_P(SIZE, ALIGN) \
183 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
184 < (unsigned int) SET_RATIO (optimize_insn_for_speed_p ()))
185 #endif
186
187 /* This macro is used to determine whether store_by_pieces should be
188 called to "memcpy" storage when the source is a constant string. */
189 #ifndef STORE_BY_PIECES_P
190 #define STORE_BY_PIECES_P(SIZE, ALIGN) \
191 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
192 < (unsigned int) MOVE_RATIO (optimize_insn_for_speed_p ()))
193 #endif
194
195 /* SLOW_UNALIGNED_ACCESS is nonzero if unaligned accesses are very slow. */
196
197 #ifndef SLOW_UNALIGNED_ACCESS
198 #define SLOW_UNALIGNED_ACCESS(MODE, ALIGN) STRICT_ALIGNMENT
199 #endif
200 \f
201 /* This is run to set up which modes can be used
202 directly in memory and to initialize the block move optab. It is run
203 at the beginning of compilation and when the target is reinitialized. */
204
205 void
206 init_expr_target (void)
207 {
208 rtx insn, pat;
209 enum machine_mode mode;
210 int num_clobbers;
211 rtx mem, mem1;
212 rtx reg;
213
214 /* Try indexing by frame ptr and try by stack ptr.
215 It is known that on the Convex the stack ptr isn't a valid index.
216 With luck, one or the other is valid on any machine. */
217 mem = gen_rtx_MEM (VOIDmode, stack_pointer_rtx);
218 mem1 = gen_rtx_MEM (VOIDmode, frame_pointer_rtx);
219
220 /* A scratch register we can modify in-place below to avoid
221 useless RTL allocations. */
222 reg = gen_rtx_REG (VOIDmode, -1);
223
224 insn = rtx_alloc (INSN);
225 pat = gen_rtx_SET (VOIDmode, NULL_RTX, NULL_RTX);
226 PATTERN (insn) = pat;
227
228 for (mode = VOIDmode; (int) mode < NUM_MACHINE_MODES;
229 mode = (enum machine_mode) ((int) mode + 1))
230 {
231 int regno;
232
233 direct_load[(int) mode] = direct_store[(int) mode] = 0;
234 PUT_MODE (mem, mode);
235 PUT_MODE (mem1, mode);
236 PUT_MODE (reg, mode);
237
238 /* See if there is some register that can be used in this mode and
239 directly loaded or stored from memory. */
240
241 if (mode != VOIDmode && mode != BLKmode)
242 for (regno = 0; regno < FIRST_PSEUDO_REGISTER
243 && (direct_load[(int) mode] == 0 || direct_store[(int) mode] == 0);
244 regno++)
245 {
246 if (! HARD_REGNO_MODE_OK (regno, mode))
247 continue;
248
249 SET_REGNO (reg, regno);
250
251 SET_SRC (pat) = mem;
252 SET_DEST (pat) = reg;
253 if (recog (pat, insn, &num_clobbers) >= 0)
254 direct_load[(int) mode] = 1;
255
256 SET_SRC (pat) = mem1;
257 SET_DEST (pat) = reg;
258 if (recog (pat, insn, &num_clobbers) >= 0)
259 direct_load[(int) mode] = 1;
260
261 SET_SRC (pat) = reg;
262 SET_DEST (pat) = mem;
263 if (recog (pat, insn, &num_clobbers) >= 0)
264 direct_store[(int) mode] = 1;
265
266 SET_SRC (pat) = reg;
267 SET_DEST (pat) = mem1;
268 if (recog (pat, insn, &num_clobbers) >= 0)
269 direct_store[(int) mode] = 1;
270 }
271 }
272
273 mem = gen_rtx_MEM (VOIDmode, gen_rtx_raw_REG (Pmode, 10000));
274
275 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
276 mode = GET_MODE_WIDER_MODE (mode))
277 {
278 enum machine_mode srcmode;
279 for (srcmode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); srcmode != mode;
280 srcmode = GET_MODE_WIDER_MODE (srcmode))
281 {
282 enum insn_code ic;
283
284 ic = can_extend_p (mode, srcmode, 0);
285 if (ic == CODE_FOR_nothing)
286 continue;
287
288 PUT_MODE (mem, srcmode);
289
290 if (insn_operand_matches (ic, 1, mem))
291 float_extend_from_mem[mode][srcmode] = true;
292 }
293 }
294 }
295
296 /* This is run at the start of compiling a function. */
297
298 void
299 init_expr (void)
300 {
301 memset (&crtl->expr, 0, sizeof (crtl->expr));
302 }
303 \f
304 /* Copy data from FROM to TO, where the machine modes are not the same.
305 Both modes may be integer, or both may be floating, or both may be
306 fixed-point.
307 UNSIGNEDP should be nonzero if FROM is an unsigned type.
308 This causes zero-extension instead of sign-extension. */
309
310 void
311 convert_move (rtx to, rtx from, int unsignedp)
312 {
313 enum machine_mode to_mode = GET_MODE (to);
314 enum machine_mode from_mode = GET_MODE (from);
315 int to_real = SCALAR_FLOAT_MODE_P (to_mode);
316 int from_real = SCALAR_FLOAT_MODE_P (from_mode);
317 enum insn_code code;
318 rtx libcall;
319
320 /* rtx code for making an equivalent value. */
321 enum rtx_code equiv_code = (unsignedp < 0 ? UNKNOWN
322 : (unsignedp ? ZERO_EXTEND : SIGN_EXTEND));
323
324
325 gcc_assert (to_real == from_real);
326 gcc_assert (to_mode != BLKmode);
327 gcc_assert (from_mode != BLKmode);
328
329 /* If the source and destination are already the same, then there's
330 nothing to do. */
331 if (to == from)
332 return;
333
334 /* If FROM is a SUBREG that indicates that we have already done at least
335 the required extension, strip it. We don't handle such SUBREGs as
336 TO here. */
337
338 if (GET_CODE (from) == SUBREG && SUBREG_PROMOTED_VAR_P (from)
339 && (GET_MODE_PRECISION (GET_MODE (SUBREG_REG (from)))
340 >= GET_MODE_PRECISION (to_mode))
341 && SUBREG_PROMOTED_UNSIGNED_P (from) == unsignedp)
342 from = gen_lowpart (to_mode, from), from_mode = to_mode;
343
344 gcc_assert (GET_CODE (to) != SUBREG || !SUBREG_PROMOTED_VAR_P (to));
345
346 if (to_mode == from_mode
347 || (from_mode == VOIDmode && CONSTANT_P (from)))
348 {
349 emit_move_insn (to, from);
350 return;
351 }
352
353 if (VECTOR_MODE_P (to_mode) || VECTOR_MODE_P (from_mode))
354 {
355 gcc_assert (GET_MODE_BITSIZE (from_mode) == GET_MODE_BITSIZE (to_mode));
356
357 if (VECTOR_MODE_P (to_mode))
358 from = simplify_gen_subreg (to_mode, from, GET_MODE (from), 0);
359 else
360 to = simplify_gen_subreg (from_mode, to, GET_MODE (to), 0);
361
362 emit_move_insn (to, from);
363 return;
364 }
365
366 if (GET_CODE (to) == CONCAT && GET_CODE (from) == CONCAT)
367 {
368 convert_move (XEXP (to, 0), XEXP (from, 0), unsignedp);
369 convert_move (XEXP (to, 1), XEXP (from, 1), unsignedp);
370 return;
371 }
372
373 if (to_real)
374 {
375 rtx value, insns;
376 convert_optab tab;
377
378 gcc_assert ((GET_MODE_PRECISION (from_mode)
379 != GET_MODE_PRECISION (to_mode))
380 || (DECIMAL_FLOAT_MODE_P (from_mode)
381 != DECIMAL_FLOAT_MODE_P (to_mode)));
382
383 if (GET_MODE_PRECISION (from_mode) == GET_MODE_PRECISION (to_mode))
384 /* Conversion between decimal float and binary float, same size. */
385 tab = DECIMAL_FLOAT_MODE_P (from_mode) ? trunc_optab : sext_optab;
386 else if (GET_MODE_PRECISION (from_mode) < GET_MODE_PRECISION (to_mode))
387 tab = sext_optab;
388 else
389 tab = trunc_optab;
390
391 /* Try converting directly if the insn is supported. */
392
393 code = convert_optab_handler (tab, to_mode, from_mode);
394 if (code != CODE_FOR_nothing)
395 {
396 emit_unop_insn (code, to, from,
397 tab == sext_optab ? FLOAT_EXTEND : FLOAT_TRUNCATE);
398 return;
399 }
400
401 /* Otherwise use a libcall. */
402 libcall = convert_optab_libfunc (tab, to_mode, from_mode);
403
404 /* Is this conversion implemented yet? */
405 gcc_assert (libcall);
406
407 start_sequence ();
408 value = emit_library_call_value (libcall, NULL_RTX, LCT_CONST, to_mode,
409 1, from, from_mode);
410 insns = get_insns ();
411 end_sequence ();
412 emit_libcall_block (insns, to, value,
413 tab == trunc_optab ? gen_rtx_FLOAT_TRUNCATE (to_mode,
414 from)
415 : gen_rtx_FLOAT_EXTEND (to_mode, from));
416 return;
417 }
418
419 /* Handle pointer conversion. */ /* SPEE 900220. */
420 /* Targets are expected to provide conversion insns between PxImode and
421 xImode for all MODE_PARTIAL_INT modes they use, but no others. */
422 if (GET_MODE_CLASS (to_mode) == MODE_PARTIAL_INT)
423 {
424 enum machine_mode full_mode
425 = smallest_mode_for_size (GET_MODE_BITSIZE (to_mode), MODE_INT);
426
427 gcc_assert (convert_optab_handler (trunc_optab, to_mode, full_mode)
428 != CODE_FOR_nothing);
429
430 if (full_mode != from_mode)
431 from = convert_to_mode (full_mode, from, unsignedp);
432 emit_unop_insn (convert_optab_handler (trunc_optab, to_mode, full_mode),
433 to, from, UNKNOWN);
434 return;
435 }
436 if (GET_MODE_CLASS (from_mode) == MODE_PARTIAL_INT)
437 {
438 rtx new_from;
439 enum machine_mode full_mode
440 = smallest_mode_for_size (GET_MODE_BITSIZE (from_mode), MODE_INT);
441
442 gcc_assert (convert_optab_handler (sext_optab, full_mode, from_mode)
443 != CODE_FOR_nothing);
444
445 if (to_mode == full_mode)
446 {
447 emit_unop_insn (convert_optab_handler (sext_optab, full_mode,
448 from_mode),
449 to, from, UNKNOWN);
450 return;
451 }
452
453 new_from = gen_reg_rtx (full_mode);
454 emit_unop_insn (convert_optab_handler (sext_optab, full_mode, from_mode),
455 new_from, from, UNKNOWN);
456
457 /* else proceed to integer conversions below. */
458 from_mode = full_mode;
459 from = new_from;
460 }
461
462 /* Make sure both are fixed-point modes or both are not. */
463 gcc_assert (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode) ==
464 ALL_SCALAR_FIXED_POINT_MODE_P (to_mode));
465 if (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode))
466 {
467 /* If we widen from_mode to to_mode and they are in the same class,
468 we won't saturate the result.
469 Otherwise, always saturate the result to play safe. */
470 if (GET_MODE_CLASS (from_mode) == GET_MODE_CLASS (to_mode)
471 && GET_MODE_SIZE (from_mode) < GET_MODE_SIZE (to_mode))
472 expand_fixed_convert (to, from, 0, 0);
473 else
474 expand_fixed_convert (to, from, 0, 1);
475 return;
476 }
477
478 /* Now both modes are integers. */
479
480 /* Handle expanding beyond a word. */
481 if (GET_MODE_PRECISION (from_mode) < GET_MODE_PRECISION (to_mode)
482 && GET_MODE_PRECISION (to_mode) > BITS_PER_WORD)
483 {
484 rtx insns;
485 rtx lowpart;
486 rtx fill_value;
487 rtx lowfrom;
488 int i;
489 enum machine_mode lowpart_mode;
490 int nwords = CEIL (GET_MODE_SIZE (to_mode), UNITS_PER_WORD);
491
492 /* Try converting directly if the insn is supported. */
493 if ((code = can_extend_p (to_mode, from_mode, unsignedp))
494 != CODE_FOR_nothing)
495 {
496 /* If FROM is a SUBREG, put it into a register. Do this
497 so that we always generate the same set of insns for
498 better cse'ing; if an intermediate assignment occurred,
499 we won't be doing the operation directly on the SUBREG. */
500 if (optimize > 0 && GET_CODE (from) == SUBREG)
501 from = force_reg (from_mode, from);
502 emit_unop_insn (code, to, from, equiv_code);
503 return;
504 }
505 /* Next, try converting via full word. */
506 else if (GET_MODE_PRECISION (from_mode) < BITS_PER_WORD
507 && ((code = can_extend_p (to_mode, word_mode, unsignedp))
508 != CODE_FOR_nothing))
509 {
510 rtx word_to = gen_reg_rtx (word_mode);
511 if (REG_P (to))
512 {
513 if (reg_overlap_mentioned_p (to, from))
514 from = force_reg (from_mode, from);
515 emit_clobber (to);
516 }
517 convert_move (word_to, from, unsignedp);
518 emit_unop_insn (code, to, word_to, equiv_code);
519 return;
520 }
521
522 /* No special multiword conversion insn; do it by hand. */
523 start_sequence ();
524
525 /* Since we will turn this into a no conflict block, we must ensure
526 that the source does not overlap the target. */
527
528 if (reg_overlap_mentioned_p (to, from))
529 from = force_reg (from_mode, from);
530
531 /* Get a copy of FROM widened to a word, if necessary. */
532 if (GET_MODE_PRECISION (from_mode) < BITS_PER_WORD)
533 lowpart_mode = word_mode;
534 else
535 lowpart_mode = from_mode;
536
537 lowfrom = convert_to_mode (lowpart_mode, from, unsignedp);
538
539 lowpart = gen_lowpart (lowpart_mode, to);
540 emit_move_insn (lowpart, lowfrom);
541
542 /* Compute the value to put in each remaining word. */
543 if (unsignedp)
544 fill_value = const0_rtx;
545 else
546 fill_value = emit_store_flag (gen_reg_rtx (word_mode),
547 LT, lowfrom, const0_rtx,
548 VOIDmode, 0, -1);
549
550 /* Fill the remaining words. */
551 for (i = GET_MODE_SIZE (lowpart_mode) / UNITS_PER_WORD; i < nwords; i++)
552 {
553 int index = (WORDS_BIG_ENDIAN ? nwords - i - 1 : i);
554 rtx subword = operand_subword (to, index, 1, to_mode);
555
556 gcc_assert (subword);
557
558 if (fill_value != subword)
559 emit_move_insn (subword, fill_value);
560 }
561
562 insns = get_insns ();
563 end_sequence ();
564
565 emit_insn (insns);
566 return;
567 }
568
569 /* Truncating multi-word to a word or less. */
570 if (GET_MODE_PRECISION (from_mode) > BITS_PER_WORD
571 && GET_MODE_PRECISION (to_mode) <= BITS_PER_WORD)
572 {
573 if (!((MEM_P (from)
574 && ! MEM_VOLATILE_P (from)
575 && direct_load[(int) to_mode]
576 && ! mode_dependent_address_p (XEXP (from, 0)))
577 || REG_P (from)
578 || GET_CODE (from) == SUBREG))
579 from = force_reg (from_mode, from);
580 convert_move (to, gen_lowpart (word_mode, from), 0);
581 return;
582 }
583
584 /* Now follow all the conversions between integers
585 no more than a word long. */
586
587 /* For truncation, usually we can just refer to FROM in a narrower mode. */
588 if (GET_MODE_BITSIZE (to_mode) < GET_MODE_BITSIZE (from_mode)
589 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode, from_mode))
590 {
591 if (!((MEM_P (from)
592 && ! MEM_VOLATILE_P (from)
593 && direct_load[(int) to_mode]
594 && ! mode_dependent_address_p (XEXP (from, 0)))
595 || REG_P (from)
596 || GET_CODE (from) == SUBREG))
597 from = force_reg (from_mode, from);
598 if (REG_P (from) && REGNO (from) < FIRST_PSEUDO_REGISTER
599 && ! HARD_REGNO_MODE_OK (REGNO (from), to_mode))
600 from = copy_to_reg (from);
601 emit_move_insn (to, gen_lowpart (to_mode, from));
602 return;
603 }
604
605 /* Handle extension. */
606 if (GET_MODE_PRECISION (to_mode) > GET_MODE_PRECISION (from_mode))
607 {
608 /* Convert directly if that works. */
609 if ((code = can_extend_p (to_mode, from_mode, unsignedp))
610 != CODE_FOR_nothing)
611 {
612 emit_unop_insn (code, to, from, equiv_code);
613 return;
614 }
615 else
616 {
617 enum machine_mode intermediate;
618 rtx tmp;
619 int shift_amount;
620
621 /* Search for a mode to convert via. */
622 for (intermediate = from_mode; intermediate != VOIDmode;
623 intermediate = GET_MODE_WIDER_MODE (intermediate))
624 if (((can_extend_p (to_mode, intermediate, unsignedp)
625 != CODE_FOR_nothing)
626 || (GET_MODE_SIZE (to_mode) < GET_MODE_SIZE (intermediate)
627 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode, intermediate)))
628 && (can_extend_p (intermediate, from_mode, unsignedp)
629 != CODE_FOR_nothing))
630 {
631 convert_move (to, convert_to_mode (intermediate, from,
632 unsignedp), unsignedp);
633 return;
634 }
635
636 /* No suitable intermediate mode.
637 Generate what we need with shifts. */
638 shift_amount = (GET_MODE_PRECISION (to_mode)
639 - GET_MODE_PRECISION (from_mode));
640 from = gen_lowpart (to_mode, force_reg (from_mode, from));
641 tmp = expand_shift (LSHIFT_EXPR, to_mode, from, shift_amount,
642 to, unsignedp);
643 tmp = expand_shift (RSHIFT_EXPR, to_mode, tmp, shift_amount,
644 to, unsignedp);
645 if (tmp != to)
646 emit_move_insn (to, tmp);
647 return;
648 }
649 }
650
651 /* Support special truncate insns for certain modes. */
652 if (convert_optab_handler (trunc_optab, to_mode,
653 from_mode) != CODE_FOR_nothing)
654 {
655 emit_unop_insn (convert_optab_handler (trunc_optab, to_mode, from_mode),
656 to, from, UNKNOWN);
657 return;
658 }
659
660 /* Handle truncation of volatile memrefs, and so on;
661 the things that couldn't be truncated directly,
662 and for which there was no special instruction.
663
664 ??? Code above formerly short-circuited this, for most integer
665 mode pairs, with a force_reg in from_mode followed by a recursive
666 call to this routine. Appears always to have been wrong. */
667 if (GET_MODE_PRECISION (to_mode) < GET_MODE_PRECISION (from_mode))
668 {
669 rtx temp = force_reg (to_mode, gen_lowpart (to_mode, from));
670 emit_move_insn (to, temp);
671 return;
672 }
673
674 /* Mode combination is not recognized. */
675 gcc_unreachable ();
676 }
677
678 /* Return an rtx for a value that would result
679 from converting X to mode MODE.
680 Both X and MODE may be floating, or both integer.
681 UNSIGNEDP is nonzero if X is an unsigned value.
682 This can be done by referring to a part of X in place
683 or by copying to a new temporary with conversion. */
684
685 rtx
686 convert_to_mode (enum machine_mode mode, rtx x, int unsignedp)
687 {
688 return convert_modes (mode, VOIDmode, x, unsignedp);
689 }
690
691 /* Return an rtx for a value that would result
692 from converting X from mode OLDMODE to mode MODE.
693 Both modes may be floating, or both integer.
694 UNSIGNEDP is nonzero if X is an unsigned value.
695
696 This can be done by referring to a part of X in place
697 or by copying to a new temporary with conversion.
698
699 You can give VOIDmode for OLDMODE, if you are sure X has a nonvoid mode. */
700
701 rtx
702 convert_modes (enum machine_mode mode, enum machine_mode oldmode, rtx x, int unsignedp)
703 {
704 rtx temp;
705
706 /* If FROM is a SUBREG that indicates that we have already done at least
707 the required extension, strip it. */
708
709 if (GET_CODE (x) == SUBREG && SUBREG_PROMOTED_VAR_P (x)
710 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) >= GET_MODE_SIZE (mode)
711 && SUBREG_PROMOTED_UNSIGNED_P (x) == unsignedp)
712 x = gen_lowpart (mode, x);
713
714 if (GET_MODE (x) != VOIDmode)
715 oldmode = GET_MODE (x);
716
717 if (mode == oldmode)
718 return x;
719
720 /* There is one case that we must handle specially: If we are converting
721 a CONST_INT into a mode whose size is twice HOST_BITS_PER_WIDE_INT and
722 we are to interpret the constant as unsigned, gen_lowpart will do
723 the wrong if the constant appears negative. What we want to do is
724 make the high-order word of the constant zero, not all ones. */
725
726 if (unsignedp && GET_MODE_CLASS (mode) == MODE_INT
727 && GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT
728 && CONST_INT_P (x) && INTVAL (x) < 0)
729 {
730 double_int val = uhwi_to_double_int (INTVAL (x));
731
732 /* We need to zero extend VAL. */
733 if (oldmode != VOIDmode)
734 val = double_int_zext (val, GET_MODE_BITSIZE (oldmode));
735
736 return immed_double_int_const (val, mode);
737 }
738
739 /* We can do this with a gen_lowpart if both desired and current modes
740 are integer, and this is either a constant integer, a register, or a
741 non-volatile MEM. Except for the constant case where MODE is no
742 wider than HOST_BITS_PER_WIDE_INT, we must be narrowing the operand. */
743
744 if ((CONST_INT_P (x)
745 && GET_MODE_PRECISION (mode) <= HOST_BITS_PER_WIDE_INT)
746 || (GET_MODE_CLASS (mode) == MODE_INT
747 && GET_MODE_CLASS (oldmode) == MODE_INT
748 && (GET_CODE (x) == CONST_DOUBLE
749 || (GET_MODE_PRECISION (mode) <= GET_MODE_PRECISION (oldmode)
750 && ((MEM_P (x) && ! MEM_VOLATILE_P (x)
751 && direct_load[(int) mode])
752 || (REG_P (x)
753 && (! HARD_REGISTER_P (x)
754 || HARD_REGNO_MODE_OK (REGNO (x), mode))
755 && TRULY_NOOP_TRUNCATION_MODES_P (mode,
756 GET_MODE (x))))))))
757 {
758 /* ?? If we don't know OLDMODE, we have to assume here that
759 X does not need sign- or zero-extension. This may not be
760 the case, but it's the best we can do. */
761 if (CONST_INT_P (x) && oldmode != VOIDmode
762 && GET_MODE_PRECISION (mode) > GET_MODE_PRECISION (oldmode))
763 {
764 HOST_WIDE_INT val = INTVAL (x);
765
766 /* We must sign or zero-extend in this case. Start by
767 zero-extending, then sign extend if we need to. */
768 val &= GET_MODE_MASK (oldmode);
769 if (! unsignedp
770 && val_signbit_known_set_p (oldmode, val))
771 val |= ~GET_MODE_MASK (oldmode);
772
773 return gen_int_mode (val, mode);
774 }
775
776 return gen_lowpart (mode, x);
777 }
778
779 /* Converting from integer constant into mode is always equivalent to an
780 subreg operation. */
781 if (VECTOR_MODE_P (mode) && GET_MODE (x) == VOIDmode)
782 {
783 gcc_assert (GET_MODE_BITSIZE (mode) == GET_MODE_BITSIZE (oldmode));
784 return simplify_gen_subreg (mode, x, oldmode, 0);
785 }
786
787 temp = gen_reg_rtx (mode);
788 convert_move (temp, x, unsignedp);
789 return temp;
790 }
791 \f
792 /* Return the largest alignment we can use for doing a move (or store)
793 of MAX_PIECES. ALIGN is the largest alignment we could use. */
794
795 static unsigned int
796 alignment_for_piecewise_move (unsigned int max_pieces, unsigned int align)
797 {
798 enum machine_mode tmode;
799
800 tmode = mode_for_size (max_pieces * BITS_PER_UNIT, MODE_INT, 1);
801 if (align >= GET_MODE_ALIGNMENT (tmode))
802 align = GET_MODE_ALIGNMENT (tmode);
803 else
804 {
805 enum machine_mode tmode, xmode;
806
807 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT), xmode = tmode;
808 tmode != VOIDmode;
809 xmode = tmode, tmode = GET_MODE_WIDER_MODE (tmode))
810 if (GET_MODE_SIZE (tmode) > max_pieces
811 || SLOW_UNALIGNED_ACCESS (tmode, align))
812 break;
813
814 align = MAX (align, GET_MODE_ALIGNMENT (xmode));
815 }
816
817 return align;
818 }
819
820 /* Return the widest integer mode no wider than SIZE. If no such mode
821 can be found, return VOIDmode. */
822
823 static enum machine_mode
824 widest_int_mode_for_size (unsigned int size)
825 {
826 enum machine_mode tmode, mode = VOIDmode;
827
828 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT);
829 tmode != VOIDmode; tmode = GET_MODE_WIDER_MODE (tmode))
830 if (GET_MODE_SIZE (tmode) < size)
831 mode = tmode;
832
833 return mode;
834 }
835
836 /* STORE_MAX_PIECES is the number of bytes at a time that we can
837 store efficiently. Due to internal GCC limitations, this is
838 MOVE_MAX_PIECES limited by the number of bytes GCC can represent
839 for an immediate constant. */
840
841 #define STORE_MAX_PIECES MIN (MOVE_MAX_PIECES, 2 * sizeof (HOST_WIDE_INT))
842
843 /* Determine whether the LEN bytes can be moved by using several move
844 instructions. Return nonzero if a call to move_by_pieces should
845 succeed. */
846
847 int
848 can_move_by_pieces (unsigned HOST_WIDE_INT len,
849 unsigned int align ATTRIBUTE_UNUSED)
850 {
851 return MOVE_BY_PIECES_P (len, align);
852 }
853
854 /* Generate several move instructions to copy LEN bytes from block FROM to
855 block TO. (These are MEM rtx's with BLKmode).
856
857 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
858 used to push FROM to the stack.
859
860 ALIGN is maximum stack alignment we can assume.
861
862 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
863 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
864 stpcpy. */
865
866 rtx
867 move_by_pieces (rtx to, rtx from, unsigned HOST_WIDE_INT len,
868 unsigned int align, int endp)
869 {
870 struct move_by_pieces_d data;
871 enum machine_mode to_addr_mode, from_addr_mode
872 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (from));
873 rtx to_addr, from_addr = XEXP (from, 0);
874 unsigned int max_size = MOVE_MAX_PIECES + 1;
875 enum insn_code icode;
876
877 align = MIN (to ? MEM_ALIGN (to) : align, MEM_ALIGN (from));
878
879 data.offset = 0;
880 data.from_addr = from_addr;
881 if (to)
882 {
883 to_addr_mode = targetm.addr_space.address_mode (MEM_ADDR_SPACE (to));
884 to_addr = XEXP (to, 0);
885 data.to = to;
886 data.autinc_to
887 = (GET_CODE (to_addr) == PRE_INC || GET_CODE (to_addr) == PRE_DEC
888 || GET_CODE (to_addr) == POST_INC || GET_CODE (to_addr) == POST_DEC);
889 data.reverse
890 = (GET_CODE (to_addr) == PRE_DEC || GET_CODE (to_addr) == POST_DEC);
891 }
892 else
893 {
894 to_addr_mode = VOIDmode;
895 to_addr = NULL_RTX;
896 data.to = NULL_RTX;
897 data.autinc_to = 1;
898 #ifdef STACK_GROWS_DOWNWARD
899 data.reverse = 1;
900 #else
901 data.reverse = 0;
902 #endif
903 }
904 data.to_addr = to_addr;
905 data.from = from;
906 data.autinc_from
907 = (GET_CODE (from_addr) == PRE_INC || GET_CODE (from_addr) == PRE_DEC
908 || GET_CODE (from_addr) == POST_INC
909 || GET_CODE (from_addr) == POST_DEC);
910
911 data.explicit_inc_from = 0;
912 data.explicit_inc_to = 0;
913 if (data.reverse) data.offset = len;
914 data.len = len;
915
916 /* If copying requires more than two move insns,
917 copy addresses to registers (to make displacements shorter)
918 and use post-increment if available. */
919 if (!(data.autinc_from && data.autinc_to)
920 && move_by_pieces_ninsns (len, align, max_size) > 2)
921 {
922 /* Find the mode of the largest move...
923 MODE might not be used depending on the definitions of the
924 USE_* macros below. */
925 enum machine_mode mode ATTRIBUTE_UNUSED
926 = widest_int_mode_for_size (max_size);
927
928 if (USE_LOAD_PRE_DECREMENT (mode) && data.reverse && ! data.autinc_from)
929 {
930 data.from_addr = copy_to_mode_reg (from_addr_mode,
931 plus_constant (from_addr, len));
932 data.autinc_from = 1;
933 data.explicit_inc_from = -1;
934 }
935 if (USE_LOAD_POST_INCREMENT (mode) && ! data.autinc_from)
936 {
937 data.from_addr = copy_to_mode_reg (from_addr_mode, from_addr);
938 data.autinc_from = 1;
939 data.explicit_inc_from = 1;
940 }
941 if (!data.autinc_from && CONSTANT_P (from_addr))
942 data.from_addr = copy_to_mode_reg (from_addr_mode, from_addr);
943 if (USE_STORE_PRE_DECREMENT (mode) && data.reverse && ! data.autinc_to)
944 {
945 data.to_addr = copy_to_mode_reg (to_addr_mode,
946 plus_constant (to_addr, len));
947 data.autinc_to = 1;
948 data.explicit_inc_to = -1;
949 }
950 if (USE_STORE_POST_INCREMENT (mode) && ! data.reverse && ! data.autinc_to)
951 {
952 data.to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
953 data.autinc_to = 1;
954 data.explicit_inc_to = 1;
955 }
956 if (!data.autinc_to && CONSTANT_P (to_addr))
957 data.to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
958 }
959
960 align = alignment_for_piecewise_move (MOVE_MAX_PIECES, align);
961
962 /* First move what we can in the largest integer mode, then go to
963 successively smaller modes. */
964
965 while (max_size > 1)
966 {
967 enum machine_mode mode = widest_int_mode_for_size (max_size);
968
969 if (mode == VOIDmode)
970 break;
971
972 icode = optab_handler (mov_optab, mode);
973 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
974 move_by_pieces_1 (GEN_FCN (icode), mode, &data);
975
976 max_size = GET_MODE_SIZE (mode);
977 }
978
979 /* The code above should have handled everything. */
980 gcc_assert (!data.len);
981
982 if (endp)
983 {
984 rtx to1;
985
986 gcc_assert (!data.reverse);
987 if (data.autinc_to)
988 {
989 if (endp == 2)
990 {
991 if (HAVE_POST_INCREMENT && data.explicit_inc_to > 0)
992 emit_insn (gen_add2_insn (data.to_addr, constm1_rtx));
993 else
994 data.to_addr = copy_to_mode_reg (to_addr_mode,
995 plus_constant (data.to_addr,
996 -1));
997 }
998 to1 = adjust_automodify_address (data.to, QImode, data.to_addr,
999 data.offset);
1000 }
1001 else
1002 {
1003 if (endp == 2)
1004 --data.offset;
1005 to1 = adjust_address (data.to, QImode, data.offset);
1006 }
1007 return to1;
1008 }
1009 else
1010 return data.to;
1011 }
1012
1013 /* Return number of insns required to move L bytes by pieces.
1014 ALIGN (in bits) is maximum alignment we can assume. */
1015
1016 static unsigned HOST_WIDE_INT
1017 move_by_pieces_ninsns (unsigned HOST_WIDE_INT l, unsigned int align,
1018 unsigned int max_size)
1019 {
1020 unsigned HOST_WIDE_INT n_insns = 0;
1021
1022 align = alignment_for_piecewise_move (MOVE_MAX_PIECES, align);
1023
1024 while (max_size > 1)
1025 {
1026 enum machine_mode mode;
1027 enum insn_code icode;
1028
1029 mode = widest_int_mode_for_size (max_size);
1030
1031 if (mode == VOIDmode)
1032 break;
1033
1034 icode = optab_handler (mov_optab, mode);
1035 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
1036 n_insns += l / GET_MODE_SIZE (mode), l %= GET_MODE_SIZE (mode);
1037
1038 max_size = GET_MODE_SIZE (mode);
1039 }
1040
1041 gcc_assert (!l);
1042 return n_insns;
1043 }
1044
1045 /* Subroutine of move_by_pieces. Move as many bytes as appropriate
1046 with move instructions for mode MODE. GENFUN is the gen_... function
1047 to make a move insn for that mode. DATA has all the other info. */
1048
1049 static void
1050 move_by_pieces_1 (rtx (*genfun) (rtx, ...), enum machine_mode mode,
1051 struct move_by_pieces_d *data)
1052 {
1053 unsigned int size = GET_MODE_SIZE (mode);
1054 rtx to1 = NULL_RTX, from1;
1055
1056 while (data->len >= size)
1057 {
1058 if (data->reverse)
1059 data->offset -= size;
1060
1061 if (data->to)
1062 {
1063 if (data->autinc_to)
1064 to1 = adjust_automodify_address (data->to, mode, data->to_addr,
1065 data->offset);
1066 else
1067 to1 = adjust_address (data->to, mode, data->offset);
1068 }
1069
1070 if (data->autinc_from)
1071 from1 = adjust_automodify_address (data->from, mode, data->from_addr,
1072 data->offset);
1073 else
1074 from1 = adjust_address (data->from, mode, data->offset);
1075
1076 if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0)
1077 emit_insn (gen_add2_insn (data->to_addr,
1078 GEN_INT (-(HOST_WIDE_INT)size)));
1079 if (HAVE_PRE_DECREMENT && data->explicit_inc_from < 0)
1080 emit_insn (gen_add2_insn (data->from_addr,
1081 GEN_INT (-(HOST_WIDE_INT)size)));
1082
1083 if (data->to)
1084 emit_insn ((*genfun) (to1, from1));
1085 else
1086 {
1087 #ifdef PUSH_ROUNDING
1088 emit_single_push_insn (mode, from1, NULL);
1089 #else
1090 gcc_unreachable ();
1091 #endif
1092 }
1093
1094 if (HAVE_POST_INCREMENT && data->explicit_inc_to > 0)
1095 emit_insn (gen_add2_insn (data->to_addr, GEN_INT (size)));
1096 if (HAVE_POST_INCREMENT && data->explicit_inc_from > 0)
1097 emit_insn (gen_add2_insn (data->from_addr, GEN_INT (size)));
1098
1099 if (! data->reverse)
1100 data->offset += size;
1101
1102 data->len -= size;
1103 }
1104 }
1105 \f
1106 /* Emit code to move a block Y to a block X. This may be done with
1107 string-move instructions, with multiple scalar move instructions,
1108 or with a library call.
1109
1110 Both X and Y must be MEM rtx's (perhaps inside VOLATILE) with mode BLKmode.
1111 SIZE is an rtx that says how long they are.
1112 ALIGN is the maximum alignment we can assume they have.
1113 METHOD describes what kind of copy this is, and what mechanisms may be used.
1114
1115 Return the address of the new block, if memcpy is called and returns it,
1116 0 otherwise. */
1117
1118 rtx
1119 emit_block_move_hints (rtx x, rtx y, rtx size, enum block_op_methods method,
1120 unsigned int expected_align, HOST_WIDE_INT expected_size)
1121 {
1122 bool may_use_call;
1123 rtx retval = 0;
1124 unsigned int align;
1125
1126 gcc_assert (size);
1127 if (CONST_INT_P (size)
1128 && INTVAL (size) == 0)
1129 return 0;
1130
1131 switch (method)
1132 {
1133 case BLOCK_OP_NORMAL:
1134 case BLOCK_OP_TAILCALL:
1135 may_use_call = true;
1136 break;
1137
1138 case BLOCK_OP_CALL_PARM:
1139 may_use_call = block_move_libcall_safe_for_call_parm ();
1140
1141 /* Make inhibit_defer_pop nonzero around the library call
1142 to force it to pop the arguments right away. */
1143 NO_DEFER_POP;
1144 break;
1145
1146 case BLOCK_OP_NO_LIBCALL:
1147 may_use_call = false;
1148 break;
1149
1150 default:
1151 gcc_unreachable ();
1152 }
1153
1154 gcc_assert (MEM_P (x) && MEM_P (y));
1155 align = MIN (MEM_ALIGN (x), MEM_ALIGN (y));
1156 gcc_assert (align >= BITS_PER_UNIT);
1157
1158 /* Make sure we've got BLKmode addresses; store_one_arg can decide that
1159 block copy is more efficient for other large modes, e.g. DCmode. */
1160 x = adjust_address (x, BLKmode, 0);
1161 y = adjust_address (y, BLKmode, 0);
1162
1163 /* Set MEM_SIZE as appropriate for this block copy. The main place this
1164 can be incorrect is coming from __builtin_memcpy. */
1165 if (CONST_INT_P (size))
1166 {
1167 x = shallow_copy_rtx (x);
1168 y = shallow_copy_rtx (y);
1169 set_mem_size (x, size);
1170 set_mem_size (y, size);
1171 }
1172
1173 if (CONST_INT_P (size) && MOVE_BY_PIECES_P (INTVAL (size), align))
1174 move_by_pieces (x, y, INTVAL (size), align, 0);
1175 else if (emit_block_move_via_movmem (x, y, size, align,
1176 expected_align, expected_size))
1177 ;
1178 else if (may_use_call
1179 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (x))
1180 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (y)))
1181 {
1182 /* Since x and y are passed to a libcall, mark the corresponding
1183 tree EXPR as addressable. */
1184 tree y_expr = MEM_EXPR (y);
1185 tree x_expr = MEM_EXPR (x);
1186 if (y_expr)
1187 mark_addressable (y_expr);
1188 if (x_expr)
1189 mark_addressable (x_expr);
1190 retval = emit_block_move_via_libcall (x, y, size,
1191 method == BLOCK_OP_TAILCALL);
1192 }
1193
1194 else
1195 emit_block_move_via_loop (x, y, size, align);
1196
1197 if (method == BLOCK_OP_CALL_PARM)
1198 OK_DEFER_POP;
1199
1200 return retval;
1201 }
1202
1203 rtx
1204 emit_block_move (rtx x, rtx y, rtx size, enum block_op_methods method)
1205 {
1206 return emit_block_move_hints (x, y, size, method, 0, -1);
1207 }
1208
1209 /* A subroutine of emit_block_move. Returns true if calling the
1210 block move libcall will not clobber any parameters which may have
1211 already been placed on the stack. */
1212
1213 static bool
1214 block_move_libcall_safe_for_call_parm (void)
1215 {
1216 #if defined (REG_PARM_STACK_SPACE)
1217 tree fn;
1218 #endif
1219
1220 /* If arguments are pushed on the stack, then they're safe. */
1221 if (PUSH_ARGS)
1222 return true;
1223
1224 /* If registers go on the stack anyway, any argument is sure to clobber
1225 an outgoing argument. */
1226 #if defined (REG_PARM_STACK_SPACE)
1227 fn = emit_block_move_libcall_fn (false);
1228 /* Avoid set but not used warning if *REG_PARM_STACK_SPACE doesn't
1229 depend on its argument. */
1230 (void) fn;
1231 if (OUTGOING_REG_PARM_STACK_SPACE ((!fn ? NULL_TREE : TREE_TYPE (fn)))
1232 && REG_PARM_STACK_SPACE (fn) != 0)
1233 return false;
1234 #endif
1235
1236 /* If any argument goes in memory, then it might clobber an outgoing
1237 argument. */
1238 {
1239 CUMULATIVE_ARGS args_so_far_v;
1240 cumulative_args_t args_so_far;
1241 tree fn, arg;
1242
1243 fn = emit_block_move_libcall_fn (false);
1244 INIT_CUMULATIVE_ARGS (args_so_far_v, TREE_TYPE (fn), NULL_RTX, 0, 3);
1245 args_so_far = pack_cumulative_args (&args_so_far_v);
1246
1247 arg = TYPE_ARG_TYPES (TREE_TYPE (fn));
1248 for ( ; arg != void_list_node ; arg = TREE_CHAIN (arg))
1249 {
1250 enum machine_mode mode = TYPE_MODE (TREE_VALUE (arg));
1251 rtx tmp = targetm.calls.function_arg (args_so_far, mode,
1252 NULL_TREE, true);
1253 if (!tmp || !REG_P (tmp))
1254 return false;
1255 if (targetm.calls.arg_partial_bytes (args_so_far, mode, NULL, 1))
1256 return false;
1257 targetm.calls.function_arg_advance (args_so_far, mode,
1258 NULL_TREE, true);
1259 }
1260 }
1261 return true;
1262 }
1263
1264 /* A subroutine of emit_block_move. Expand a movmem pattern;
1265 return true if successful. */
1266
1267 static bool
1268 emit_block_move_via_movmem (rtx x, rtx y, rtx size, unsigned int align,
1269 unsigned int expected_align, HOST_WIDE_INT expected_size)
1270 {
1271 int save_volatile_ok = volatile_ok;
1272 enum machine_mode mode;
1273
1274 if (expected_align < align)
1275 expected_align = align;
1276
1277 /* Since this is a move insn, we don't care about volatility. */
1278 volatile_ok = 1;
1279
1280 /* Try the most limited insn first, because there's no point
1281 including more than one in the machine description unless
1282 the more limited one has some advantage. */
1283
1284 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
1285 mode = GET_MODE_WIDER_MODE (mode))
1286 {
1287 enum insn_code code = direct_optab_handler (movmem_optab, mode);
1288
1289 if (code != CODE_FOR_nothing
1290 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
1291 here because if SIZE is less than the mode mask, as it is
1292 returned by the macro, it will definitely be less than the
1293 actual mode mask. */
1294 && ((CONST_INT_P (size)
1295 && ((unsigned HOST_WIDE_INT) INTVAL (size)
1296 <= (GET_MODE_MASK (mode) >> 1)))
1297 || GET_MODE_BITSIZE (mode) >= BITS_PER_WORD))
1298 {
1299 struct expand_operand ops[6];
1300 unsigned int nops;
1301
1302 /* ??? When called via emit_block_move_for_call, it'd be
1303 nice if there were some way to inform the backend, so
1304 that it doesn't fail the expansion because it thinks
1305 emitting the libcall would be more efficient. */
1306 nops = insn_data[(int) code].n_generator_args;
1307 gcc_assert (nops == 4 || nops == 6);
1308
1309 create_fixed_operand (&ops[0], x);
1310 create_fixed_operand (&ops[1], y);
1311 /* The check above guarantees that this size conversion is valid. */
1312 create_convert_operand_to (&ops[2], size, mode, true);
1313 create_integer_operand (&ops[3], align / BITS_PER_UNIT);
1314 if (nops == 6)
1315 {
1316 create_integer_operand (&ops[4], expected_align / BITS_PER_UNIT);
1317 create_integer_operand (&ops[5], expected_size);
1318 }
1319 if (maybe_expand_insn (code, nops, ops))
1320 {
1321 volatile_ok = save_volatile_ok;
1322 return true;
1323 }
1324 }
1325 }
1326
1327 volatile_ok = save_volatile_ok;
1328 return false;
1329 }
1330
1331 /* A subroutine of emit_block_move. Expand a call to memcpy.
1332 Return the return value from memcpy, 0 otherwise. */
1333
1334 rtx
1335 emit_block_move_via_libcall (rtx dst, rtx src, rtx size, bool tailcall)
1336 {
1337 rtx dst_addr, src_addr;
1338 tree call_expr, fn, src_tree, dst_tree, size_tree;
1339 enum machine_mode size_mode;
1340 rtx retval;
1341
1342 /* Emit code to copy the addresses of DST and SRC and SIZE into new
1343 pseudos. We can then place those new pseudos into a VAR_DECL and
1344 use them later. */
1345
1346 dst_addr = copy_to_mode_reg (Pmode, XEXP (dst, 0));
1347 src_addr = copy_to_mode_reg (Pmode, XEXP (src, 0));
1348
1349 dst_addr = convert_memory_address (ptr_mode, dst_addr);
1350 src_addr = convert_memory_address (ptr_mode, src_addr);
1351
1352 dst_tree = make_tree (ptr_type_node, dst_addr);
1353 src_tree = make_tree (ptr_type_node, src_addr);
1354
1355 size_mode = TYPE_MODE (sizetype);
1356
1357 size = convert_to_mode (size_mode, size, 1);
1358 size = copy_to_mode_reg (size_mode, size);
1359
1360 /* It is incorrect to use the libcall calling conventions to call
1361 memcpy in this context. This could be a user call to memcpy and
1362 the user may wish to examine the return value from memcpy. For
1363 targets where libcalls and normal calls have different conventions
1364 for returning pointers, we could end up generating incorrect code. */
1365
1366 size_tree = make_tree (sizetype, size);
1367
1368 fn = emit_block_move_libcall_fn (true);
1369 call_expr = build_call_expr (fn, 3, dst_tree, src_tree, size_tree);
1370 CALL_EXPR_TAILCALL (call_expr) = tailcall;
1371
1372 retval = expand_normal (call_expr);
1373
1374 return retval;
1375 }
1376
1377 /* A subroutine of emit_block_move_via_libcall. Create the tree node
1378 for the function we use for block copies. The first time FOR_CALL
1379 is true, we call assemble_external. */
1380
1381 static GTY(()) tree block_move_fn;
1382
1383 void
1384 init_block_move_fn (const char *asmspec)
1385 {
1386 if (!block_move_fn)
1387 {
1388 tree args, fn;
1389
1390 fn = get_identifier ("memcpy");
1391 args = build_function_type_list (ptr_type_node, ptr_type_node,
1392 const_ptr_type_node, sizetype,
1393 NULL_TREE);
1394
1395 fn = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL, fn, args);
1396 DECL_EXTERNAL (fn) = 1;
1397 TREE_PUBLIC (fn) = 1;
1398 DECL_ARTIFICIAL (fn) = 1;
1399 TREE_NOTHROW (fn) = 1;
1400 DECL_VISIBILITY (fn) = VISIBILITY_DEFAULT;
1401 DECL_VISIBILITY_SPECIFIED (fn) = 1;
1402
1403 block_move_fn = fn;
1404 }
1405
1406 if (asmspec)
1407 set_user_assembler_name (block_move_fn, asmspec);
1408 }
1409
1410 static tree
1411 emit_block_move_libcall_fn (int for_call)
1412 {
1413 static bool emitted_extern;
1414
1415 if (!block_move_fn)
1416 init_block_move_fn (NULL);
1417
1418 if (for_call && !emitted_extern)
1419 {
1420 emitted_extern = true;
1421 make_decl_rtl (block_move_fn);
1422 assemble_external (block_move_fn);
1423 }
1424
1425 return block_move_fn;
1426 }
1427
1428 /* A subroutine of emit_block_move. Copy the data via an explicit
1429 loop. This is used only when libcalls are forbidden. */
1430 /* ??? It'd be nice to copy in hunks larger than QImode. */
1431
1432 static void
1433 emit_block_move_via_loop (rtx x, rtx y, rtx size,
1434 unsigned int align ATTRIBUTE_UNUSED)
1435 {
1436 rtx cmp_label, top_label, iter, x_addr, y_addr, tmp;
1437 enum machine_mode x_addr_mode
1438 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (x));
1439 enum machine_mode y_addr_mode
1440 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (y));
1441 enum machine_mode iter_mode;
1442
1443 iter_mode = GET_MODE (size);
1444 if (iter_mode == VOIDmode)
1445 iter_mode = word_mode;
1446
1447 top_label = gen_label_rtx ();
1448 cmp_label = gen_label_rtx ();
1449 iter = gen_reg_rtx (iter_mode);
1450
1451 emit_move_insn (iter, const0_rtx);
1452
1453 x_addr = force_operand (XEXP (x, 0), NULL_RTX);
1454 y_addr = force_operand (XEXP (y, 0), NULL_RTX);
1455 do_pending_stack_adjust ();
1456
1457 emit_jump (cmp_label);
1458 emit_label (top_label);
1459
1460 tmp = convert_modes (x_addr_mode, iter_mode, iter, true);
1461 x_addr = gen_rtx_PLUS (x_addr_mode, x_addr, tmp);
1462
1463 if (x_addr_mode != y_addr_mode)
1464 tmp = convert_modes (y_addr_mode, iter_mode, iter, true);
1465 y_addr = gen_rtx_PLUS (y_addr_mode, y_addr, tmp);
1466
1467 x = change_address (x, QImode, x_addr);
1468 y = change_address (y, QImode, y_addr);
1469
1470 emit_move_insn (x, y);
1471
1472 tmp = expand_simple_binop (iter_mode, PLUS, iter, const1_rtx, iter,
1473 true, OPTAB_LIB_WIDEN);
1474 if (tmp != iter)
1475 emit_move_insn (iter, tmp);
1476
1477 emit_label (cmp_label);
1478
1479 emit_cmp_and_jump_insns (iter, size, LT, NULL_RTX, iter_mode,
1480 true, top_label);
1481 }
1482 \f
1483 /* Copy all or part of a value X into registers starting at REGNO.
1484 The number of registers to be filled is NREGS. */
1485
1486 void
1487 move_block_to_reg (int regno, rtx x, int nregs, enum machine_mode mode)
1488 {
1489 int i;
1490 #ifdef HAVE_load_multiple
1491 rtx pat;
1492 rtx last;
1493 #endif
1494
1495 if (nregs == 0)
1496 return;
1497
1498 if (CONSTANT_P (x) && !targetm.legitimate_constant_p (mode, x))
1499 x = validize_mem (force_const_mem (mode, x));
1500
1501 /* See if the machine can do this with a load multiple insn. */
1502 #ifdef HAVE_load_multiple
1503 if (HAVE_load_multiple)
1504 {
1505 last = get_last_insn ();
1506 pat = gen_load_multiple (gen_rtx_REG (word_mode, regno), x,
1507 GEN_INT (nregs));
1508 if (pat)
1509 {
1510 emit_insn (pat);
1511 return;
1512 }
1513 else
1514 delete_insns_since (last);
1515 }
1516 #endif
1517
1518 for (i = 0; i < nregs; i++)
1519 emit_move_insn (gen_rtx_REG (word_mode, regno + i),
1520 operand_subword_force (x, i, mode));
1521 }
1522
1523 /* Copy all or part of a BLKmode value X out of registers starting at REGNO.
1524 The number of registers to be filled is NREGS. */
1525
1526 void
1527 move_block_from_reg (int regno, rtx x, int nregs)
1528 {
1529 int i;
1530
1531 if (nregs == 0)
1532 return;
1533
1534 /* See if the machine can do this with a store multiple insn. */
1535 #ifdef HAVE_store_multiple
1536 if (HAVE_store_multiple)
1537 {
1538 rtx last = get_last_insn ();
1539 rtx pat = gen_store_multiple (x, gen_rtx_REG (word_mode, regno),
1540 GEN_INT (nregs));
1541 if (pat)
1542 {
1543 emit_insn (pat);
1544 return;
1545 }
1546 else
1547 delete_insns_since (last);
1548 }
1549 #endif
1550
1551 for (i = 0; i < nregs; i++)
1552 {
1553 rtx tem = operand_subword (x, i, 1, BLKmode);
1554
1555 gcc_assert (tem);
1556
1557 emit_move_insn (tem, gen_rtx_REG (word_mode, regno + i));
1558 }
1559 }
1560
1561 /* Generate a PARALLEL rtx for a new non-consecutive group of registers from
1562 ORIG, where ORIG is a non-consecutive group of registers represented by
1563 a PARALLEL. The clone is identical to the original except in that the
1564 original set of registers is replaced by a new set of pseudo registers.
1565 The new set has the same modes as the original set. */
1566
1567 rtx
1568 gen_group_rtx (rtx orig)
1569 {
1570 int i, length;
1571 rtx *tmps;
1572
1573 gcc_assert (GET_CODE (orig) == PARALLEL);
1574
1575 length = XVECLEN (orig, 0);
1576 tmps = XALLOCAVEC (rtx, length);
1577
1578 /* Skip a NULL entry in first slot. */
1579 i = XEXP (XVECEXP (orig, 0, 0), 0) ? 0 : 1;
1580
1581 if (i)
1582 tmps[0] = 0;
1583
1584 for (; i < length; i++)
1585 {
1586 enum machine_mode mode = GET_MODE (XEXP (XVECEXP (orig, 0, i), 0));
1587 rtx offset = XEXP (XVECEXP (orig, 0, i), 1);
1588
1589 tmps[i] = gen_rtx_EXPR_LIST (VOIDmode, gen_reg_rtx (mode), offset);
1590 }
1591
1592 return gen_rtx_PARALLEL (GET_MODE (orig), gen_rtvec_v (length, tmps));
1593 }
1594
1595 /* A subroutine of emit_group_load. Arguments as for emit_group_load,
1596 except that values are placed in TMPS[i], and must later be moved
1597 into corresponding XEXP (XVECEXP (DST, 0, i), 0) element. */
1598
1599 static void
1600 emit_group_load_1 (rtx *tmps, rtx dst, rtx orig_src, tree type, int ssize)
1601 {
1602 rtx src;
1603 int start, i;
1604 enum machine_mode m = GET_MODE (orig_src);
1605
1606 gcc_assert (GET_CODE (dst) == PARALLEL);
1607
1608 if (m != VOIDmode
1609 && !SCALAR_INT_MODE_P (m)
1610 && !MEM_P (orig_src)
1611 && GET_CODE (orig_src) != CONCAT)
1612 {
1613 enum machine_mode imode = int_mode_for_mode (GET_MODE (orig_src));
1614 if (imode == BLKmode)
1615 src = assign_stack_temp (GET_MODE (orig_src), ssize, 0);
1616 else
1617 src = gen_reg_rtx (imode);
1618 if (imode != BLKmode)
1619 src = gen_lowpart (GET_MODE (orig_src), src);
1620 emit_move_insn (src, orig_src);
1621 /* ...and back again. */
1622 if (imode != BLKmode)
1623 src = gen_lowpart (imode, src);
1624 emit_group_load_1 (tmps, dst, src, type, ssize);
1625 return;
1626 }
1627
1628 /* Check for a NULL entry, used to indicate that the parameter goes
1629 both on the stack and in registers. */
1630 if (XEXP (XVECEXP (dst, 0, 0), 0))
1631 start = 0;
1632 else
1633 start = 1;
1634
1635 /* Process the pieces. */
1636 for (i = start; i < XVECLEN (dst, 0); i++)
1637 {
1638 enum machine_mode mode = GET_MODE (XEXP (XVECEXP (dst, 0, i), 0));
1639 HOST_WIDE_INT bytepos = INTVAL (XEXP (XVECEXP (dst, 0, i), 1));
1640 unsigned int bytelen = GET_MODE_SIZE (mode);
1641 int shift = 0;
1642
1643 /* Handle trailing fragments that run over the size of the struct. */
1644 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
1645 {
1646 /* Arrange to shift the fragment to where it belongs.
1647 extract_bit_field loads to the lsb of the reg. */
1648 if (
1649 #ifdef BLOCK_REG_PADDING
1650 BLOCK_REG_PADDING (GET_MODE (orig_src), type, i == start)
1651 == (BYTES_BIG_ENDIAN ? upward : downward)
1652 #else
1653 BYTES_BIG_ENDIAN
1654 #endif
1655 )
1656 shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT;
1657 bytelen = ssize - bytepos;
1658 gcc_assert (bytelen > 0);
1659 }
1660
1661 /* If we won't be loading directly from memory, protect the real source
1662 from strange tricks we might play; but make sure that the source can
1663 be loaded directly into the destination. */
1664 src = orig_src;
1665 if (!MEM_P (orig_src)
1666 && (!CONSTANT_P (orig_src)
1667 || (GET_MODE (orig_src) != mode
1668 && GET_MODE (orig_src) != VOIDmode)))
1669 {
1670 if (GET_MODE (orig_src) == VOIDmode)
1671 src = gen_reg_rtx (mode);
1672 else
1673 src = gen_reg_rtx (GET_MODE (orig_src));
1674
1675 emit_move_insn (src, orig_src);
1676 }
1677
1678 /* Optimize the access just a bit. */
1679 if (MEM_P (src)
1680 && (! SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (src))
1681 || MEM_ALIGN (src) >= GET_MODE_ALIGNMENT (mode))
1682 && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0
1683 && bytelen == GET_MODE_SIZE (mode))
1684 {
1685 tmps[i] = gen_reg_rtx (mode);
1686 emit_move_insn (tmps[i], adjust_address (src, mode, bytepos));
1687 }
1688 else if (COMPLEX_MODE_P (mode)
1689 && GET_MODE (src) == mode
1690 && bytelen == GET_MODE_SIZE (mode))
1691 /* Let emit_move_complex do the bulk of the work. */
1692 tmps[i] = src;
1693 else if (GET_CODE (src) == CONCAT)
1694 {
1695 unsigned int slen = GET_MODE_SIZE (GET_MODE (src));
1696 unsigned int slen0 = GET_MODE_SIZE (GET_MODE (XEXP (src, 0)));
1697
1698 if ((bytepos == 0 && bytelen == slen0)
1699 || (bytepos != 0 && bytepos + bytelen <= slen))
1700 {
1701 /* The following assumes that the concatenated objects all
1702 have the same size. In this case, a simple calculation
1703 can be used to determine the object and the bit field
1704 to be extracted. */
1705 tmps[i] = XEXP (src, bytepos / slen0);
1706 if (! CONSTANT_P (tmps[i])
1707 && (!REG_P (tmps[i]) || GET_MODE (tmps[i]) != mode))
1708 tmps[i] = extract_bit_field (tmps[i], bytelen * BITS_PER_UNIT,
1709 (bytepos % slen0) * BITS_PER_UNIT,
1710 1, false, NULL_RTX, mode, mode);
1711 }
1712 else
1713 {
1714 rtx mem;
1715
1716 gcc_assert (!bytepos);
1717 mem = assign_stack_temp (GET_MODE (src), slen, 0);
1718 emit_move_insn (mem, src);
1719 tmps[i] = extract_bit_field (mem, bytelen * BITS_PER_UNIT,
1720 0, 1, false, NULL_RTX, mode, mode);
1721 }
1722 }
1723 /* FIXME: A SIMD parallel will eventually lead to a subreg of a
1724 SIMD register, which is currently broken. While we get GCC
1725 to emit proper RTL for these cases, let's dump to memory. */
1726 else if (VECTOR_MODE_P (GET_MODE (dst))
1727 && REG_P (src))
1728 {
1729 int slen = GET_MODE_SIZE (GET_MODE (src));
1730 rtx mem;
1731
1732 mem = assign_stack_temp (GET_MODE (src), slen, 0);
1733 emit_move_insn (mem, src);
1734 tmps[i] = adjust_address (mem, mode, (int) bytepos);
1735 }
1736 else if (CONSTANT_P (src) && GET_MODE (dst) != BLKmode
1737 && XVECLEN (dst, 0) > 1)
1738 tmps[i] = simplify_gen_subreg (mode, src, GET_MODE(dst), bytepos);
1739 else if (CONSTANT_P (src))
1740 {
1741 HOST_WIDE_INT len = (HOST_WIDE_INT) bytelen;
1742
1743 if (len == ssize)
1744 tmps[i] = src;
1745 else
1746 {
1747 rtx first, second;
1748
1749 gcc_assert (2 * len == ssize);
1750 split_double (src, &first, &second);
1751 if (i)
1752 tmps[i] = second;
1753 else
1754 tmps[i] = first;
1755 }
1756 }
1757 else if (REG_P (src) && GET_MODE (src) == mode)
1758 tmps[i] = src;
1759 else
1760 tmps[i] = extract_bit_field (src, bytelen * BITS_PER_UNIT,
1761 bytepos * BITS_PER_UNIT, 1, false, NULL_RTX,
1762 mode, mode);
1763
1764 if (shift)
1765 tmps[i] = expand_shift (LSHIFT_EXPR, mode, tmps[i],
1766 shift, tmps[i], 0);
1767 }
1768 }
1769
1770 /* Emit code to move a block SRC of type TYPE to a block DST,
1771 where DST is non-consecutive registers represented by a PARALLEL.
1772 SSIZE represents the total size of block ORIG_SRC in bytes, or -1
1773 if not known. */
1774
1775 void
1776 emit_group_load (rtx dst, rtx src, tree type, int ssize)
1777 {
1778 rtx *tmps;
1779 int i;
1780
1781 tmps = XALLOCAVEC (rtx, XVECLEN (dst, 0));
1782 emit_group_load_1 (tmps, dst, src, type, ssize);
1783
1784 /* Copy the extracted pieces into the proper (probable) hard regs. */
1785 for (i = 0; i < XVECLEN (dst, 0); i++)
1786 {
1787 rtx d = XEXP (XVECEXP (dst, 0, i), 0);
1788 if (d == NULL)
1789 continue;
1790 emit_move_insn (d, tmps[i]);
1791 }
1792 }
1793
1794 /* Similar, but load SRC into new pseudos in a format that looks like
1795 PARALLEL. This can later be fed to emit_group_move to get things
1796 in the right place. */
1797
1798 rtx
1799 emit_group_load_into_temps (rtx parallel, rtx src, tree type, int ssize)
1800 {
1801 rtvec vec;
1802 int i;
1803
1804 vec = rtvec_alloc (XVECLEN (parallel, 0));
1805 emit_group_load_1 (&RTVEC_ELT (vec, 0), parallel, src, type, ssize);
1806
1807 /* Convert the vector to look just like the original PARALLEL, except
1808 with the computed values. */
1809 for (i = 0; i < XVECLEN (parallel, 0); i++)
1810 {
1811 rtx e = XVECEXP (parallel, 0, i);
1812 rtx d = XEXP (e, 0);
1813
1814 if (d)
1815 {
1816 d = force_reg (GET_MODE (d), RTVEC_ELT (vec, i));
1817 e = alloc_EXPR_LIST (REG_NOTE_KIND (e), d, XEXP (e, 1));
1818 }
1819 RTVEC_ELT (vec, i) = e;
1820 }
1821
1822 return gen_rtx_PARALLEL (GET_MODE (parallel), vec);
1823 }
1824
1825 /* Emit code to move a block SRC to block DST, where SRC and DST are
1826 non-consecutive groups of registers, each represented by a PARALLEL. */
1827
1828 void
1829 emit_group_move (rtx dst, rtx src)
1830 {
1831 int i;
1832
1833 gcc_assert (GET_CODE (src) == PARALLEL
1834 && GET_CODE (dst) == PARALLEL
1835 && XVECLEN (src, 0) == XVECLEN (dst, 0));
1836
1837 /* Skip first entry if NULL. */
1838 for (i = XEXP (XVECEXP (src, 0, 0), 0) ? 0 : 1; i < XVECLEN (src, 0); i++)
1839 emit_move_insn (XEXP (XVECEXP (dst, 0, i), 0),
1840 XEXP (XVECEXP (src, 0, i), 0));
1841 }
1842
1843 /* Move a group of registers represented by a PARALLEL into pseudos. */
1844
1845 rtx
1846 emit_group_move_into_temps (rtx src)
1847 {
1848 rtvec vec = rtvec_alloc (XVECLEN (src, 0));
1849 int i;
1850
1851 for (i = 0; i < XVECLEN (src, 0); i++)
1852 {
1853 rtx e = XVECEXP (src, 0, i);
1854 rtx d = XEXP (e, 0);
1855
1856 if (d)
1857 e = alloc_EXPR_LIST (REG_NOTE_KIND (e), copy_to_reg (d), XEXP (e, 1));
1858 RTVEC_ELT (vec, i) = e;
1859 }
1860
1861 return gen_rtx_PARALLEL (GET_MODE (src), vec);
1862 }
1863
1864 /* Emit code to move a block SRC to a block ORIG_DST of type TYPE,
1865 where SRC is non-consecutive registers represented by a PARALLEL.
1866 SSIZE represents the total size of block ORIG_DST, or -1 if not
1867 known. */
1868
1869 void
1870 emit_group_store (rtx orig_dst, rtx src, tree type ATTRIBUTE_UNUSED, int ssize)
1871 {
1872 rtx *tmps, dst;
1873 int start, finish, i;
1874 enum machine_mode m = GET_MODE (orig_dst);
1875
1876 gcc_assert (GET_CODE (src) == PARALLEL);
1877
1878 if (!SCALAR_INT_MODE_P (m)
1879 && !MEM_P (orig_dst) && GET_CODE (orig_dst) != CONCAT)
1880 {
1881 enum machine_mode imode = int_mode_for_mode (GET_MODE (orig_dst));
1882 if (imode == BLKmode)
1883 dst = assign_stack_temp (GET_MODE (orig_dst), ssize, 0);
1884 else
1885 dst = gen_reg_rtx (imode);
1886 emit_group_store (dst, src, type, ssize);
1887 if (imode != BLKmode)
1888 dst = gen_lowpart (GET_MODE (orig_dst), dst);
1889 emit_move_insn (orig_dst, dst);
1890 return;
1891 }
1892
1893 /* Check for a NULL entry, used to indicate that the parameter goes
1894 both on the stack and in registers. */
1895 if (XEXP (XVECEXP (src, 0, 0), 0))
1896 start = 0;
1897 else
1898 start = 1;
1899 finish = XVECLEN (src, 0);
1900
1901 tmps = XALLOCAVEC (rtx, finish);
1902
1903 /* Copy the (probable) hard regs into pseudos. */
1904 for (i = start; i < finish; i++)
1905 {
1906 rtx reg = XEXP (XVECEXP (src, 0, i), 0);
1907 if (!REG_P (reg) || REGNO (reg) < FIRST_PSEUDO_REGISTER)
1908 {
1909 tmps[i] = gen_reg_rtx (GET_MODE (reg));
1910 emit_move_insn (tmps[i], reg);
1911 }
1912 else
1913 tmps[i] = reg;
1914 }
1915
1916 /* If we won't be storing directly into memory, protect the real destination
1917 from strange tricks we might play. */
1918 dst = orig_dst;
1919 if (GET_CODE (dst) == PARALLEL)
1920 {
1921 rtx temp;
1922
1923 /* We can get a PARALLEL dst if there is a conditional expression in
1924 a return statement. In that case, the dst and src are the same,
1925 so no action is necessary. */
1926 if (rtx_equal_p (dst, src))
1927 return;
1928
1929 /* It is unclear if we can ever reach here, but we may as well handle
1930 it. Allocate a temporary, and split this into a store/load to/from
1931 the temporary. */
1932
1933 temp = assign_stack_temp (GET_MODE (dst), ssize, 0);
1934 emit_group_store (temp, src, type, ssize);
1935 emit_group_load (dst, temp, type, ssize);
1936 return;
1937 }
1938 else if (!MEM_P (dst) && GET_CODE (dst) != CONCAT)
1939 {
1940 enum machine_mode outer = GET_MODE (dst);
1941 enum machine_mode inner;
1942 HOST_WIDE_INT bytepos;
1943 bool done = false;
1944 rtx temp;
1945
1946 if (!REG_P (dst) || REGNO (dst) < FIRST_PSEUDO_REGISTER)
1947 dst = gen_reg_rtx (outer);
1948
1949 /* Make life a bit easier for combine. */
1950 /* If the first element of the vector is the low part
1951 of the destination mode, use a paradoxical subreg to
1952 initialize the destination. */
1953 if (start < finish)
1954 {
1955 inner = GET_MODE (tmps[start]);
1956 bytepos = subreg_lowpart_offset (inner, outer);
1957 if (INTVAL (XEXP (XVECEXP (src, 0, start), 1)) == bytepos)
1958 {
1959 temp = simplify_gen_subreg (outer, tmps[start],
1960 inner, 0);
1961 if (temp)
1962 {
1963 emit_move_insn (dst, temp);
1964 done = true;
1965 start++;
1966 }
1967 }
1968 }
1969
1970 /* If the first element wasn't the low part, try the last. */
1971 if (!done
1972 && start < finish - 1)
1973 {
1974 inner = GET_MODE (tmps[finish - 1]);
1975 bytepos = subreg_lowpart_offset (inner, outer);
1976 if (INTVAL (XEXP (XVECEXP (src, 0, finish - 1), 1)) == bytepos)
1977 {
1978 temp = simplify_gen_subreg (outer, tmps[finish - 1],
1979 inner, 0);
1980 if (temp)
1981 {
1982 emit_move_insn (dst, temp);
1983 done = true;
1984 finish--;
1985 }
1986 }
1987 }
1988
1989 /* Otherwise, simply initialize the result to zero. */
1990 if (!done)
1991 emit_move_insn (dst, CONST0_RTX (outer));
1992 }
1993
1994 /* Process the pieces. */
1995 for (i = start; i < finish; i++)
1996 {
1997 HOST_WIDE_INT bytepos = INTVAL (XEXP (XVECEXP (src, 0, i), 1));
1998 enum machine_mode mode = GET_MODE (tmps[i]);
1999 unsigned int bytelen = GET_MODE_SIZE (mode);
2000 unsigned int adj_bytelen = bytelen;
2001 rtx dest = dst;
2002
2003 /* Handle trailing fragments that run over the size of the struct. */
2004 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
2005 adj_bytelen = ssize - bytepos;
2006
2007 if (GET_CODE (dst) == CONCAT)
2008 {
2009 if (bytepos + adj_bytelen
2010 <= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0))))
2011 dest = XEXP (dst, 0);
2012 else if (bytepos >= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0))))
2013 {
2014 bytepos -= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0)));
2015 dest = XEXP (dst, 1);
2016 }
2017 else
2018 {
2019 enum machine_mode dest_mode = GET_MODE (dest);
2020 enum machine_mode tmp_mode = GET_MODE (tmps[i]);
2021
2022 gcc_assert (bytepos == 0 && XVECLEN (src, 0));
2023
2024 if (GET_MODE_ALIGNMENT (dest_mode)
2025 >= GET_MODE_ALIGNMENT (tmp_mode))
2026 {
2027 dest = assign_stack_temp (dest_mode,
2028 GET_MODE_SIZE (dest_mode),
2029 0);
2030 emit_move_insn (adjust_address (dest,
2031 tmp_mode,
2032 bytepos),
2033 tmps[i]);
2034 dst = dest;
2035 }
2036 else
2037 {
2038 dest = assign_stack_temp (tmp_mode,
2039 GET_MODE_SIZE (tmp_mode),
2040 0);
2041 emit_move_insn (dest, tmps[i]);
2042 dst = adjust_address (dest, dest_mode, bytepos);
2043 }
2044 break;
2045 }
2046 }
2047
2048 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
2049 {
2050 /* store_bit_field always takes its value from the lsb.
2051 Move the fragment to the lsb if it's not already there. */
2052 if (
2053 #ifdef BLOCK_REG_PADDING
2054 BLOCK_REG_PADDING (GET_MODE (orig_dst), type, i == start)
2055 == (BYTES_BIG_ENDIAN ? upward : downward)
2056 #else
2057 BYTES_BIG_ENDIAN
2058 #endif
2059 )
2060 {
2061 int shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT;
2062 tmps[i] = expand_shift (RSHIFT_EXPR, mode, tmps[i],
2063 shift, tmps[i], 0);
2064 }
2065 bytelen = adj_bytelen;
2066 }
2067
2068 /* Optimize the access just a bit. */
2069 if (MEM_P (dest)
2070 && (! SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (dest))
2071 || MEM_ALIGN (dest) >= GET_MODE_ALIGNMENT (mode))
2072 && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0
2073 && bytelen == GET_MODE_SIZE (mode))
2074 emit_move_insn (adjust_address (dest, mode, bytepos), tmps[i]);
2075 else
2076 store_bit_field (dest, bytelen * BITS_PER_UNIT, bytepos * BITS_PER_UNIT,
2077 mode, tmps[i]);
2078 }
2079
2080 /* Copy from the pseudo into the (probable) hard reg. */
2081 if (orig_dst != dst)
2082 emit_move_insn (orig_dst, dst);
2083 }
2084
2085 /* Generate code to copy a BLKmode object of TYPE out of a
2086 set of registers starting with SRCREG into TGTBLK. If TGTBLK
2087 is null, a stack temporary is created. TGTBLK is returned.
2088
2089 The purpose of this routine is to handle functions that return
2090 BLKmode structures in registers. Some machines (the PA for example)
2091 want to return all small structures in registers regardless of the
2092 structure's alignment. */
2093
2094 rtx
2095 copy_blkmode_from_reg (rtx tgtblk, rtx srcreg, tree type)
2096 {
2097 unsigned HOST_WIDE_INT bytes = int_size_in_bytes (type);
2098 rtx src = NULL, dst = NULL;
2099 unsigned HOST_WIDE_INT bitsize = MIN (TYPE_ALIGN (type), BITS_PER_WORD);
2100 unsigned HOST_WIDE_INT bitpos, xbitpos, padding_correction = 0;
2101 enum machine_mode copy_mode;
2102
2103 if (tgtblk == 0)
2104 {
2105 tgtblk = assign_temp (build_qualified_type (type,
2106 (TYPE_QUALS (type)
2107 | TYPE_QUAL_CONST)),
2108 0, 1, 1);
2109 preserve_temp_slots (tgtblk);
2110 }
2111
2112 /* This code assumes srcreg is at least a full word. If it isn't, copy it
2113 into a new pseudo which is a full word. */
2114
2115 if (GET_MODE (srcreg) != BLKmode
2116 && GET_MODE_SIZE (GET_MODE (srcreg)) < UNITS_PER_WORD)
2117 srcreg = convert_to_mode (word_mode, srcreg, TYPE_UNSIGNED (type));
2118
2119 /* If the structure doesn't take up a whole number of words, see whether
2120 SRCREG is padded on the left or on the right. If it's on the left,
2121 set PADDING_CORRECTION to the number of bits to skip.
2122
2123 In most ABIs, the structure will be returned at the least end of
2124 the register, which translates to right padding on little-endian
2125 targets and left padding on big-endian targets. The opposite
2126 holds if the structure is returned at the most significant
2127 end of the register. */
2128 if (bytes % UNITS_PER_WORD != 0
2129 && (targetm.calls.return_in_msb (type)
2130 ? !BYTES_BIG_ENDIAN
2131 : BYTES_BIG_ENDIAN))
2132 padding_correction
2133 = (BITS_PER_WORD - ((bytes % UNITS_PER_WORD) * BITS_PER_UNIT));
2134
2135 /* Copy the structure BITSIZE bits at a time. If the target lives in
2136 memory, take care of not reading/writing past its end by selecting
2137 a copy mode suited to BITSIZE. This should always be possible given
2138 how it is computed.
2139
2140 We could probably emit more efficient code for machines which do not use
2141 strict alignment, but it doesn't seem worth the effort at the current
2142 time. */
2143
2144 copy_mode = word_mode;
2145 if (MEM_P (tgtblk))
2146 {
2147 enum machine_mode mem_mode = mode_for_size (bitsize, MODE_INT, 1);
2148 if (mem_mode != BLKmode)
2149 copy_mode = mem_mode;
2150 }
2151
2152 for (bitpos = 0, xbitpos = padding_correction;
2153 bitpos < bytes * BITS_PER_UNIT;
2154 bitpos += bitsize, xbitpos += bitsize)
2155 {
2156 /* We need a new source operand each time xbitpos is on a
2157 word boundary and when xbitpos == padding_correction
2158 (the first time through). */
2159 if (xbitpos % BITS_PER_WORD == 0
2160 || xbitpos == padding_correction)
2161 src = operand_subword_force (srcreg, xbitpos / BITS_PER_WORD,
2162 GET_MODE (srcreg));
2163
2164 /* We need a new destination operand each time bitpos is on
2165 a word boundary. */
2166 if (bitpos % BITS_PER_WORD == 0)
2167 dst = operand_subword (tgtblk, bitpos / BITS_PER_WORD, 1, BLKmode);
2168
2169 /* Use xbitpos for the source extraction (right justified) and
2170 bitpos for the destination store (left justified). */
2171 store_bit_field (dst, bitsize, bitpos % BITS_PER_WORD, copy_mode,
2172 extract_bit_field (src, bitsize,
2173 xbitpos % BITS_PER_WORD, 1, false,
2174 NULL_RTX, copy_mode, copy_mode));
2175 }
2176
2177 return tgtblk;
2178 }
2179
2180 /* Add a USE expression for REG to the (possibly empty) list pointed
2181 to by CALL_FUSAGE. REG must denote a hard register. */
2182
2183 void
2184 use_reg (rtx *call_fusage, rtx reg)
2185 {
2186 gcc_assert (REG_P (reg) && REGNO (reg) < FIRST_PSEUDO_REGISTER);
2187
2188 *call_fusage
2189 = gen_rtx_EXPR_LIST (VOIDmode,
2190 gen_rtx_USE (VOIDmode, reg), *call_fusage);
2191 }
2192
2193 /* Add USE expressions to *CALL_FUSAGE for each of NREGS consecutive regs,
2194 starting at REGNO. All of these registers must be hard registers. */
2195
2196 void
2197 use_regs (rtx *call_fusage, int regno, int nregs)
2198 {
2199 int i;
2200
2201 gcc_assert (regno + nregs <= FIRST_PSEUDO_REGISTER);
2202
2203 for (i = 0; i < nregs; i++)
2204 use_reg (call_fusage, regno_reg_rtx[regno + i]);
2205 }
2206
2207 /* Add USE expressions to *CALL_FUSAGE for each REG contained in the
2208 PARALLEL REGS. This is for calls that pass values in multiple
2209 non-contiguous locations. The Irix 6 ABI has examples of this. */
2210
2211 void
2212 use_group_regs (rtx *call_fusage, rtx regs)
2213 {
2214 int i;
2215
2216 for (i = 0; i < XVECLEN (regs, 0); i++)
2217 {
2218 rtx reg = XEXP (XVECEXP (regs, 0, i), 0);
2219
2220 /* A NULL entry means the parameter goes both on the stack and in
2221 registers. This can also be a MEM for targets that pass values
2222 partially on the stack and partially in registers. */
2223 if (reg != 0 && REG_P (reg))
2224 use_reg (call_fusage, reg);
2225 }
2226 }
2227
2228 /* Return the defining gimple statement for SSA_NAME NAME if it is an
2229 assigment and the code of the expresion on the RHS is CODE. Return
2230 NULL otherwise. */
2231
2232 static gimple
2233 get_def_for_expr (tree name, enum tree_code code)
2234 {
2235 gimple def_stmt;
2236
2237 if (TREE_CODE (name) != SSA_NAME)
2238 return NULL;
2239
2240 def_stmt = get_gimple_for_ssa_name (name);
2241 if (!def_stmt
2242 || gimple_assign_rhs_code (def_stmt) != code)
2243 return NULL;
2244
2245 return def_stmt;
2246 }
2247 \f
2248
2249 /* Determine whether the LEN bytes generated by CONSTFUN can be
2250 stored to memory using several move instructions. CONSTFUNDATA is
2251 a pointer which will be passed as argument in every CONSTFUN call.
2252 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
2253 a memset operation and false if it's a copy of a constant string.
2254 Return nonzero if a call to store_by_pieces should succeed. */
2255
2256 int
2257 can_store_by_pieces (unsigned HOST_WIDE_INT len,
2258 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode),
2259 void *constfundata, unsigned int align, bool memsetp)
2260 {
2261 unsigned HOST_WIDE_INT l;
2262 unsigned int max_size;
2263 HOST_WIDE_INT offset = 0;
2264 enum machine_mode mode;
2265 enum insn_code icode;
2266 int reverse;
2267 /* cst is set but not used if LEGITIMATE_CONSTANT doesn't use it. */
2268 rtx cst ATTRIBUTE_UNUSED;
2269
2270 if (len == 0)
2271 return 1;
2272
2273 if (! (memsetp
2274 ? SET_BY_PIECES_P (len, align)
2275 : STORE_BY_PIECES_P (len, align)))
2276 return 0;
2277
2278 align = alignment_for_piecewise_move (STORE_MAX_PIECES, align);
2279
2280 /* We would first store what we can in the largest integer mode, then go to
2281 successively smaller modes. */
2282
2283 for (reverse = 0;
2284 reverse <= (HAVE_PRE_DECREMENT || HAVE_POST_DECREMENT);
2285 reverse++)
2286 {
2287 l = len;
2288 max_size = STORE_MAX_PIECES + 1;
2289 while (max_size > 1)
2290 {
2291 mode = widest_int_mode_for_size (max_size);
2292
2293 if (mode == VOIDmode)
2294 break;
2295
2296 icode = optab_handler (mov_optab, mode);
2297 if (icode != CODE_FOR_nothing
2298 && align >= GET_MODE_ALIGNMENT (mode))
2299 {
2300 unsigned int size = GET_MODE_SIZE (mode);
2301
2302 while (l >= size)
2303 {
2304 if (reverse)
2305 offset -= size;
2306
2307 cst = (*constfun) (constfundata, offset, mode);
2308 if (!targetm.legitimate_constant_p (mode, cst))
2309 return 0;
2310
2311 if (!reverse)
2312 offset += size;
2313
2314 l -= size;
2315 }
2316 }
2317
2318 max_size = GET_MODE_SIZE (mode);
2319 }
2320
2321 /* The code above should have handled everything. */
2322 gcc_assert (!l);
2323 }
2324
2325 return 1;
2326 }
2327
2328 /* Generate several move instructions to store LEN bytes generated by
2329 CONSTFUN to block TO. (A MEM rtx with BLKmode). CONSTFUNDATA is a
2330 pointer which will be passed as argument in every CONSTFUN call.
2331 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
2332 a memset operation and false if it's a copy of a constant string.
2333 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
2334 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
2335 stpcpy. */
2336
2337 rtx
2338 store_by_pieces (rtx to, unsigned HOST_WIDE_INT len,
2339 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode),
2340 void *constfundata, unsigned int align, bool memsetp, int endp)
2341 {
2342 enum machine_mode to_addr_mode
2343 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (to));
2344 struct store_by_pieces_d data;
2345
2346 if (len == 0)
2347 {
2348 gcc_assert (endp != 2);
2349 return to;
2350 }
2351
2352 gcc_assert (memsetp
2353 ? SET_BY_PIECES_P (len, align)
2354 : STORE_BY_PIECES_P (len, align));
2355 data.constfun = constfun;
2356 data.constfundata = constfundata;
2357 data.len = len;
2358 data.to = to;
2359 store_by_pieces_1 (&data, align);
2360 if (endp)
2361 {
2362 rtx to1;
2363
2364 gcc_assert (!data.reverse);
2365 if (data.autinc_to)
2366 {
2367 if (endp == 2)
2368 {
2369 if (HAVE_POST_INCREMENT && data.explicit_inc_to > 0)
2370 emit_insn (gen_add2_insn (data.to_addr, constm1_rtx));
2371 else
2372 data.to_addr = copy_to_mode_reg (to_addr_mode,
2373 plus_constant (data.to_addr,
2374 -1));
2375 }
2376 to1 = adjust_automodify_address (data.to, QImode, data.to_addr,
2377 data.offset);
2378 }
2379 else
2380 {
2381 if (endp == 2)
2382 --data.offset;
2383 to1 = adjust_address (data.to, QImode, data.offset);
2384 }
2385 return to1;
2386 }
2387 else
2388 return data.to;
2389 }
2390
2391 /* Generate several move instructions to clear LEN bytes of block TO. (A MEM
2392 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
2393
2394 static void
2395 clear_by_pieces (rtx to, unsigned HOST_WIDE_INT len, unsigned int align)
2396 {
2397 struct store_by_pieces_d data;
2398
2399 if (len == 0)
2400 return;
2401
2402 data.constfun = clear_by_pieces_1;
2403 data.constfundata = NULL;
2404 data.len = len;
2405 data.to = to;
2406 store_by_pieces_1 (&data, align);
2407 }
2408
2409 /* Callback routine for clear_by_pieces.
2410 Return const0_rtx unconditionally. */
2411
2412 static rtx
2413 clear_by_pieces_1 (void *data ATTRIBUTE_UNUSED,
2414 HOST_WIDE_INT offset ATTRIBUTE_UNUSED,
2415 enum machine_mode mode ATTRIBUTE_UNUSED)
2416 {
2417 return const0_rtx;
2418 }
2419
2420 /* Subroutine of clear_by_pieces and store_by_pieces.
2421 Generate several move instructions to store LEN bytes of block TO. (A MEM
2422 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
2423
2424 static void
2425 store_by_pieces_1 (struct store_by_pieces_d *data ATTRIBUTE_UNUSED,
2426 unsigned int align ATTRIBUTE_UNUSED)
2427 {
2428 enum machine_mode to_addr_mode
2429 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (data->to));
2430 rtx to_addr = XEXP (data->to, 0);
2431 unsigned int max_size = STORE_MAX_PIECES + 1;
2432 enum insn_code icode;
2433
2434 data->offset = 0;
2435 data->to_addr = to_addr;
2436 data->autinc_to
2437 = (GET_CODE (to_addr) == PRE_INC || GET_CODE (to_addr) == PRE_DEC
2438 || GET_CODE (to_addr) == POST_INC || GET_CODE (to_addr) == POST_DEC);
2439
2440 data->explicit_inc_to = 0;
2441 data->reverse
2442 = (GET_CODE (to_addr) == PRE_DEC || GET_CODE (to_addr) == POST_DEC);
2443 if (data->reverse)
2444 data->offset = data->len;
2445
2446 /* If storing requires more than two move insns,
2447 copy addresses to registers (to make displacements shorter)
2448 and use post-increment if available. */
2449 if (!data->autinc_to
2450 && move_by_pieces_ninsns (data->len, align, max_size) > 2)
2451 {
2452 /* Determine the main mode we'll be using.
2453 MODE might not be used depending on the definitions of the
2454 USE_* macros below. */
2455 enum machine_mode mode ATTRIBUTE_UNUSED
2456 = widest_int_mode_for_size (max_size);
2457
2458 if (USE_STORE_PRE_DECREMENT (mode) && data->reverse && ! data->autinc_to)
2459 {
2460 data->to_addr = copy_to_mode_reg (to_addr_mode,
2461 plus_constant (to_addr, data->len));
2462 data->autinc_to = 1;
2463 data->explicit_inc_to = -1;
2464 }
2465
2466 if (USE_STORE_POST_INCREMENT (mode) && ! data->reverse
2467 && ! data->autinc_to)
2468 {
2469 data->to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
2470 data->autinc_to = 1;
2471 data->explicit_inc_to = 1;
2472 }
2473
2474 if ( !data->autinc_to && CONSTANT_P (to_addr))
2475 data->to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
2476 }
2477
2478 align = alignment_for_piecewise_move (STORE_MAX_PIECES, align);
2479
2480 /* First store what we can in the largest integer mode, then go to
2481 successively smaller modes. */
2482
2483 while (max_size > 1)
2484 {
2485 enum machine_mode mode = widest_int_mode_for_size (max_size);
2486
2487 if (mode == VOIDmode)
2488 break;
2489
2490 icode = optab_handler (mov_optab, mode);
2491 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
2492 store_by_pieces_2 (GEN_FCN (icode), mode, data);
2493
2494 max_size = GET_MODE_SIZE (mode);
2495 }
2496
2497 /* The code above should have handled everything. */
2498 gcc_assert (!data->len);
2499 }
2500
2501 /* Subroutine of store_by_pieces_1. Store as many bytes as appropriate
2502 with move instructions for mode MODE. GENFUN is the gen_... function
2503 to make a move insn for that mode. DATA has all the other info. */
2504
2505 static void
2506 store_by_pieces_2 (rtx (*genfun) (rtx, ...), enum machine_mode mode,
2507 struct store_by_pieces_d *data)
2508 {
2509 unsigned int size = GET_MODE_SIZE (mode);
2510 rtx to1, cst;
2511
2512 while (data->len >= size)
2513 {
2514 if (data->reverse)
2515 data->offset -= size;
2516
2517 if (data->autinc_to)
2518 to1 = adjust_automodify_address (data->to, mode, data->to_addr,
2519 data->offset);
2520 else
2521 to1 = adjust_address (data->to, mode, data->offset);
2522
2523 if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0)
2524 emit_insn (gen_add2_insn (data->to_addr,
2525 GEN_INT (-(HOST_WIDE_INT) size)));
2526
2527 cst = (*data->constfun) (data->constfundata, data->offset, mode);
2528 emit_insn ((*genfun) (to1, cst));
2529
2530 if (HAVE_POST_INCREMENT && data->explicit_inc_to > 0)
2531 emit_insn (gen_add2_insn (data->to_addr, GEN_INT (size)));
2532
2533 if (! data->reverse)
2534 data->offset += size;
2535
2536 data->len -= size;
2537 }
2538 }
2539 \f
2540 /* Write zeros through the storage of OBJECT. If OBJECT has BLKmode, SIZE is
2541 its length in bytes. */
2542
2543 rtx
2544 clear_storage_hints (rtx object, rtx size, enum block_op_methods method,
2545 unsigned int expected_align, HOST_WIDE_INT expected_size)
2546 {
2547 enum machine_mode mode = GET_MODE (object);
2548 unsigned int align;
2549
2550 gcc_assert (method == BLOCK_OP_NORMAL || method == BLOCK_OP_TAILCALL);
2551
2552 /* If OBJECT is not BLKmode and SIZE is the same size as its mode,
2553 just move a zero. Otherwise, do this a piece at a time. */
2554 if (mode != BLKmode
2555 && CONST_INT_P (size)
2556 && INTVAL (size) == (HOST_WIDE_INT) GET_MODE_SIZE (mode))
2557 {
2558 rtx zero = CONST0_RTX (mode);
2559 if (zero != NULL)
2560 {
2561 emit_move_insn (object, zero);
2562 return NULL;
2563 }
2564
2565 if (COMPLEX_MODE_P (mode))
2566 {
2567 zero = CONST0_RTX (GET_MODE_INNER (mode));
2568 if (zero != NULL)
2569 {
2570 write_complex_part (object, zero, 0);
2571 write_complex_part (object, zero, 1);
2572 return NULL;
2573 }
2574 }
2575 }
2576
2577 if (size == const0_rtx)
2578 return NULL;
2579
2580 align = MEM_ALIGN (object);
2581
2582 if (CONST_INT_P (size)
2583 && CLEAR_BY_PIECES_P (INTVAL (size), align))
2584 clear_by_pieces (object, INTVAL (size), align);
2585 else if (set_storage_via_setmem (object, size, const0_rtx, align,
2586 expected_align, expected_size))
2587 ;
2588 else if (ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (object)))
2589 return set_storage_via_libcall (object, size, const0_rtx,
2590 method == BLOCK_OP_TAILCALL);
2591 else
2592 gcc_unreachable ();
2593
2594 return NULL;
2595 }
2596
2597 rtx
2598 clear_storage (rtx object, rtx size, enum block_op_methods method)
2599 {
2600 return clear_storage_hints (object, size, method, 0, -1);
2601 }
2602
2603
2604 /* A subroutine of clear_storage. Expand a call to memset.
2605 Return the return value of memset, 0 otherwise. */
2606
2607 rtx
2608 set_storage_via_libcall (rtx object, rtx size, rtx val, bool tailcall)
2609 {
2610 tree call_expr, fn, object_tree, size_tree, val_tree;
2611 enum machine_mode size_mode;
2612 rtx retval;
2613
2614 /* Emit code to copy OBJECT and SIZE into new pseudos. We can then
2615 place those into new pseudos into a VAR_DECL and use them later. */
2616
2617 object = copy_to_mode_reg (Pmode, XEXP (object, 0));
2618
2619 size_mode = TYPE_MODE (sizetype);
2620 size = convert_to_mode (size_mode, size, 1);
2621 size = copy_to_mode_reg (size_mode, size);
2622
2623 /* It is incorrect to use the libcall calling conventions to call
2624 memset in this context. This could be a user call to memset and
2625 the user may wish to examine the return value from memset. For
2626 targets where libcalls and normal calls have different conventions
2627 for returning pointers, we could end up generating incorrect code. */
2628
2629 object_tree = make_tree (ptr_type_node, object);
2630 if (!CONST_INT_P (val))
2631 val = convert_to_mode (TYPE_MODE (integer_type_node), val, 1);
2632 size_tree = make_tree (sizetype, size);
2633 val_tree = make_tree (integer_type_node, val);
2634
2635 fn = clear_storage_libcall_fn (true);
2636 call_expr = build_call_expr (fn, 3, object_tree, val_tree, size_tree);
2637 CALL_EXPR_TAILCALL (call_expr) = tailcall;
2638
2639 retval = expand_normal (call_expr);
2640
2641 return retval;
2642 }
2643
2644 /* A subroutine of set_storage_via_libcall. Create the tree node
2645 for the function we use for block clears. The first time FOR_CALL
2646 is true, we call assemble_external. */
2647
2648 tree block_clear_fn;
2649
2650 void
2651 init_block_clear_fn (const char *asmspec)
2652 {
2653 if (!block_clear_fn)
2654 {
2655 tree fn, args;
2656
2657 fn = get_identifier ("memset");
2658 args = build_function_type_list (ptr_type_node, ptr_type_node,
2659 integer_type_node, sizetype,
2660 NULL_TREE);
2661
2662 fn = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL, fn, args);
2663 DECL_EXTERNAL (fn) = 1;
2664 TREE_PUBLIC (fn) = 1;
2665 DECL_ARTIFICIAL (fn) = 1;
2666 TREE_NOTHROW (fn) = 1;
2667 DECL_VISIBILITY (fn) = VISIBILITY_DEFAULT;
2668 DECL_VISIBILITY_SPECIFIED (fn) = 1;
2669
2670 block_clear_fn = fn;
2671 }
2672
2673 if (asmspec)
2674 set_user_assembler_name (block_clear_fn, asmspec);
2675 }
2676
2677 static tree
2678 clear_storage_libcall_fn (int for_call)
2679 {
2680 static bool emitted_extern;
2681
2682 if (!block_clear_fn)
2683 init_block_clear_fn (NULL);
2684
2685 if (for_call && !emitted_extern)
2686 {
2687 emitted_extern = true;
2688 make_decl_rtl (block_clear_fn);
2689 assemble_external (block_clear_fn);
2690 }
2691
2692 return block_clear_fn;
2693 }
2694 \f
2695 /* Expand a setmem pattern; return true if successful. */
2696
2697 bool
2698 set_storage_via_setmem (rtx object, rtx size, rtx val, unsigned int align,
2699 unsigned int expected_align, HOST_WIDE_INT expected_size)
2700 {
2701 /* Try the most limited insn first, because there's no point
2702 including more than one in the machine description unless
2703 the more limited one has some advantage. */
2704
2705 enum machine_mode mode;
2706
2707 if (expected_align < align)
2708 expected_align = align;
2709
2710 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
2711 mode = GET_MODE_WIDER_MODE (mode))
2712 {
2713 enum insn_code code = direct_optab_handler (setmem_optab, mode);
2714
2715 if (code != CODE_FOR_nothing
2716 /* We don't need MODE to be narrower than
2717 BITS_PER_HOST_WIDE_INT here because if SIZE is less than
2718 the mode mask, as it is returned by the macro, it will
2719 definitely be less than the actual mode mask. */
2720 && ((CONST_INT_P (size)
2721 && ((unsigned HOST_WIDE_INT) INTVAL (size)
2722 <= (GET_MODE_MASK (mode) >> 1)))
2723 || GET_MODE_BITSIZE (mode) >= BITS_PER_WORD))
2724 {
2725 struct expand_operand ops[6];
2726 unsigned int nops;
2727
2728 nops = insn_data[(int) code].n_generator_args;
2729 gcc_assert (nops == 4 || nops == 6);
2730
2731 create_fixed_operand (&ops[0], object);
2732 /* The check above guarantees that this size conversion is valid. */
2733 create_convert_operand_to (&ops[1], size, mode, true);
2734 create_convert_operand_from (&ops[2], val, byte_mode, true);
2735 create_integer_operand (&ops[3], align / BITS_PER_UNIT);
2736 if (nops == 6)
2737 {
2738 create_integer_operand (&ops[4], expected_align / BITS_PER_UNIT);
2739 create_integer_operand (&ops[5], expected_size);
2740 }
2741 if (maybe_expand_insn (code, nops, ops))
2742 return true;
2743 }
2744 }
2745
2746 return false;
2747 }
2748
2749 \f
2750 /* Write to one of the components of the complex value CPLX. Write VAL to
2751 the real part if IMAG_P is false, and the imaginary part if its true. */
2752
2753 static void
2754 write_complex_part (rtx cplx, rtx val, bool imag_p)
2755 {
2756 enum machine_mode cmode;
2757 enum machine_mode imode;
2758 unsigned ibitsize;
2759
2760 if (GET_CODE (cplx) == CONCAT)
2761 {
2762 emit_move_insn (XEXP (cplx, imag_p), val);
2763 return;
2764 }
2765
2766 cmode = GET_MODE (cplx);
2767 imode = GET_MODE_INNER (cmode);
2768 ibitsize = GET_MODE_BITSIZE (imode);
2769
2770 /* For MEMs simplify_gen_subreg may generate an invalid new address
2771 because, e.g., the original address is considered mode-dependent
2772 by the target, which restricts simplify_subreg from invoking
2773 adjust_address_nv. Instead of preparing fallback support for an
2774 invalid address, we call adjust_address_nv directly. */
2775 if (MEM_P (cplx))
2776 {
2777 emit_move_insn (adjust_address_nv (cplx, imode,
2778 imag_p ? GET_MODE_SIZE (imode) : 0),
2779 val);
2780 return;
2781 }
2782
2783 /* If the sub-object is at least word sized, then we know that subregging
2784 will work. This special case is important, since store_bit_field
2785 wants to operate on integer modes, and there's rarely an OImode to
2786 correspond to TCmode. */
2787 if (ibitsize >= BITS_PER_WORD
2788 /* For hard regs we have exact predicates. Assume we can split
2789 the original object if it spans an even number of hard regs.
2790 This special case is important for SCmode on 64-bit platforms
2791 where the natural size of floating-point regs is 32-bit. */
2792 || (REG_P (cplx)
2793 && REGNO (cplx) < FIRST_PSEUDO_REGISTER
2794 && hard_regno_nregs[REGNO (cplx)][cmode] % 2 == 0))
2795 {
2796 rtx part = simplify_gen_subreg (imode, cplx, cmode,
2797 imag_p ? GET_MODE_SIZE (imode) : 0);
2798 if (part)
2799 {
2800 emit_move_insn (part, val);
2801 return;
2802 }
2803 else
2804 /* simplify_gen_subreg may fail for sub-word MEMs. */
2805 gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD);
2806 }
2807
2808 store_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0, imode, val);
2809 }
2810
2811 /* Extract one of the components of the complex value CPLX. Extract the
2812 real part if IMAG_P is false, and the imaginary part if it's true. */
2813
2814 static rtx
2815 read_complex_part (rtx cplx, bool imag_p)
2816 {
2817 enum machine_mode cmode, imode;
2818 unsigned ibitsize;
2819
2820 if (GET_CODE (cplx) == CONCAT)
2821 return XEXP (cplx, imag_p);
2822
2823 cmode = GET_MODE (cplx);
2824 imode = GET_MODE_INNER (cmode);
2825 ibitsize = GET_MODE_BITSIZE (imode);
2826
2827 /* Special case reads from complex constants that got spilled to memory. */
2828 if (MEM_P (cplx) && GET_CODE (XEXP (cplx, 0)) == SYMBOL_REF)
2829 {
2830 tree decl = SYMBOL_REF_DECL (XEXP (cplx, 0));
2831 if (decl && TREE_CODE (decl) == COMPLEX_CST)
2832 {
2833 tree part = imag_p ? TREE_IMAGPART (decl) : TREE_REALPART (decl);
2834 if (CONSTANT_CLASS_P (part))
2835 return expand_expr (part, NULL_RTX, imode, EXPAND_NORMAL);
2836 }
2837 }
2838
2839 /* For MEMs simplify_gen_subreg may generate an invalid new address
2840 because, e.g., the original address is considered mode-dependent
2841 by the target, which restricts simplify_subreg from invoking
2842 adjust_address_nv. Instead of preparing fallback support for an
2843 invalid address, we call adjust_address_nv directly. */
2844 if (MEM_P (cplx))
2845 return adjust_address_nv (cplx, imode,
2846 imag_p ? GET_MODE_SIZE (imode) : 0);
2847
2848 /* If the sub-object is at least word sized, then we know that subregging
2849 will work. This special case is important, since extract_bit_field
2850 wants to operate on integer modes, and there's rarely an OImode to
2851 correspond to TCmode. */
2852 if (ibitsize >= BITS_PER_WORD
2853 /* For hard regs we have exact predicates. Assume we can split
2854 the original object if it spans an even number of hard regs.
2855 This special case is important for SCmode on 64-bit platforms
2856 where the natural size of floating-point regs is 32-bit. */
2857 || (REG_P (cplx)
2858 && REGNO (cplx) < FIRST_PSEUDO_REGISTER
2859 && hard_regno_nregs[REGNO (cplx)][cmode] % 2 == 0))
2860 {
2861 rtx ret = simplify_gen_subreg (imode, cplx, cmode,
2862 imag_p ? GET_MODE_SIZE (imode) : 0);
2863 if (ret)
2864 return ret;
2865 else
2866 /* simplify_gen_subreg may fail for sub-word MEMs. */
2867 gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD);
2868 }
2869
2870 return extract_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0,
2871 true, false, NULL_RTX, imode, imode);
2872 }
2873 \f
2874 /* A subroutine of emit_move_insn_1. Yet another lowpart generator.
2875 NEW_MODE and OLD_MODE are the same size. Return NULL if X cannot be
2876 represented in NEW_MODE. If FORCE is true, this will never happen, as
2877 we'll force-create a SUBREG if needed. */
2878
2879 static rtx
2880 emit_move_change_mode (enum machine_mode new_mode,
2881 enum machine_mode old_mode, rtx x, bool force)
2882 {
2883 rtx ret;
2884
2885 if (push_operand (x, GET_MODE (x)))
2886 {
2887 ret = gen_rtx_MEM (new_mode, XEXP (x, 0));
2888 MEM_COPY_ATTRIBUTES (ret, x);
2889 }
2890 else if (MEM_P (x))
2891 {
2892 /* We don't have to worry about changing the address since the
2893 size in bytes is supposed to be the same. */
2894 if (reload_in_progress)
2895 {
2896 /* Copy the MEM to change the mode and move any
2897 substitutions from the old MEM to the new one. */
2898 ret = adjust_address_nv (x, new_mode, 0);
2899 copy_replacements (x, ret);
2900 }
2901 else
2902 ret = adjust_address (x, new_mode, 0);
2903 }
2904 else
2905 {
2906 /* Note that we do want simplify_subreg's behavior of validating
2907 that the new mode is ok for a hard register. If we were to use
2908 simplify_gen_subreg, we would create the subreg, but would
2909 probably run into the target not being able to implement it. */
2910 /* Except, of course, when FORCE is true, when this is exactly what
2911 we want. Which is needed for CCmodes on some targets. */
2912 if (force)
2913 ret = simplify_gen_subreg (new_mode, x, old_mode, 0);
2914 else
2915 ret = simplify_subreg (new_mode, x, old_mode, 0);
2916 }
2917
2918 return ret;
2919 }
2920
2921 /* A subroutine of emit_move_insn_1. Generate a move from Y into X using
2922 an integer mode of the same size as MODE. Returns the instruction
2923 emitted, or NULL if such a move could not be generated. */
2924
2925 static rtx
2926 emit_move_via_integer (enum machine_mode mode, rtx x, rtx y, bool force)
2927 {
2928 enum machine_mode imode;
2929 enum insn_code code;
2930
2931 /* There must exist a mode of the exact size we require. */
2932 imode = int_mode_for_mode (mode);
2933 if (imode == BLKmode)
2934 return NULL_RTX;
2935
2936 /* The target must support moves in this mode. */
2937 code = optab_handler (mov_optab, imode);
2938 if (code == CODE_FOR_nothing)
2939 return NULL_RTX;
2940
2941 x = emit_move_change_mode (imode, mode, x, force);
2942 if (x == NULL_RTX)
2943 return NULL_RTX;
2944 y = emit_move_change_mode (imode, mode, y, force);
2945 if (y == NULL_RTX)
2946 return NULL_RTX;
2947 return emit_insn (GEN_FCN (code) (x, y));
2948 }
2949
2950 /* A subroutine of emit_move_insn_1. X is a push_operand in MODE.
2951 Return an equivalent MEM that does not use an auto-increment. */
2952
2953 static rtx
2954 emit_move_resolve_push (enum machine_mode mode, rtx x)
2955 {
2956 enum rtx_code code = GET_CODE (XEXP (x, 0));
2957 HOST_WIDE_INT adjust;
2958 rtx temp;
2959
2960 adjust = GET_MODE_SIZE (mode);
2961 #ifdef PUSH_ROUNDING
2962 adjust = PUSH_ROUNDING (adjust);
2963 #endif
2964 if (code == PRE_DEC || code == POST_DEC)
2965 adjust = -adjust;
2966 else if (code == PRE_MODIFY || code == POST_MODIFY)
2967 {
2968 rtx expr = XEXP (XEXP (x, 0), 1);
2969 HOST_WIDE_INT val;
2970
2971 gcc_assert (GET_CODE (expr) == PLUS || GET_CODE (expr) == MINUS);
2972 gcc_assert (CONST_INT_P (XEXP (expr, 1)));
2973 val = INTVAL (XEXP (expr, 1));
2974 if (GET_CODE (expr) == MINUS)
2975 val = -val;
2976 gcc_assert (adjust == val || adjust == -val);
2977 adjust = val;
2978 }
2979
2980 /* Do not use anti_adjust_stack, since we don't want to update
2981 stack_pointer_delta. */
2982 temp = expand_simple_binop (Pmode, PLUS, stack_pointer_rtx,
2983 GEN_INT (adjust), stack_pointer_rtx,
2984 0, OPTAB_LIB_WIDEN);
2985 if (temp != stack_pointer_rtx)
2986 emit_move_insn (stack_pointer_rtx, temp);
2987
2988 switch (code)
2989 {
2990 case PRE_INC:
2991 case PRE_DEC:
2992 case PRE_MODIFY:
2993 temp = stack_pointer_rtx;
2994 break;
2995 case POST_INC:
2996 case POST_DEC:
2997 case POST_MODIFY:
2998 temp = plus_constant (stack_pointer_rtx, -adjust);
2999 break;
3000 default:
3001 gcc_unreachable ();
3002 }
3003
3004 return replace_equiv_address (x, temp);
3005 }
3006
3007 /* A subroutine of emit_move_complex. Generate a move from Y into X.
3008 X is known to satisfy push_operand, and MODE is known to be complex.
3009 Returns the last instruction emitted. */
3010
3011 rtx
3012 emit_move_complex_push (enum machine_mode mode, rtx x, rtx y)
3013 {
3014 enum machine_mode submode = GET_MODE_INNER (mode);
3015 bool imag_first;
3016
3017 #ifdef PUSH_ROUNDING
3018 unsigned int submodesize = GET_MODE_SIZE (submode);
3019
3020 /* In case we output to the stack, but the size is smaller than the
3021 machine can push exactly, we need to use move instructions. */
3022 if (PUSH_ROUNDING (submodesize) != submodesize)
3023 {
3024 x = emit_move_resolve_push (mode, x);
3025 return emit_move_insn (x, y);
3026 }
3027 #endif
3028
3029 /* Note that the real part always precedes the imag part in memory
3030 regardless of machine's endianness. */
3031 switch (GET_CODE (XEXP (x, 0)))
3032 {
3033 case PRE_DEC:
3034 case POST_DEC:
3035 imag_first = true;
3036 break;
3037 case PRE_INC:
3038 case POST_INC:
3039 imag_first = false;
3040 break;
3041 default:
3042 gcc_unreachable ();
3043 }
3044
3045 emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)),
3046 read_complex_part (y, imag_first));
3047 return emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)),
3048 read_complex_part (y, !imag_first));
3049 }
3050
3051 /* A subroutine of emit_move_complex. Perform the move from Y to X
3052 via two moves of the parts. Returns the last instruction emitted. */
3053
3054 rtx
3055 emit_move_complex_parts (rtx x, rtx y)
3056 {
3057 /* Show the output dies here. This is necessary for SUBREGs
3058 of pseudos since we cannot track their lifetimes correctly;
3059 hard regs shouldn't appear here except as return values. */
3060 if (!reload_completed && !reload_in_progress
3061 && REG_P (x) && !reg_overlap_mentioned_p (x, y))
3062 emit_clobber (x);
3063
3064 write_complex_part (x, read_complex_part (y, false), false);
3065 write_complex_part (x, read_complex_part (y, true), true);
3066
3067 return get_last_insn ();
3068 }
3069
3070 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3071 MODE is known to be complex. Returns the last instruction emitted. */
3072
3073 static rtx
3074 emit_move_complex (enum machine_mode mode, rtx x, rtx y)
3075 {
3076 bool try_int;
3077
3078 /* Need to take special care for pushes, to maintain proper ordering
3079 of the data, and possibly extra padding. */
3080 if (push_operand (x, mode))
3081 return emit_move_complex_push (mode, x, y);
3082
3083 /* See if we can coerce the target into moving both values at once. */
3084
3085 /* Move floating point as parts. */
3086 if (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
3087 && optab_handler (mov_optab, GET_MODE_INNER (mode)) != CODE_FOR_nothing)
3088 try_int = false;
3089 /* Not possible if the values are inherently not adjacent. */
3090 else if (GET_CODE (x) == CONCAT || GET_CODE (y) == CONCAT)
3091 try_int = false;
3092 /* Is possible if both are registers (or subregs of registers). */
3093 else if (register_operand (x, mode) && register_operand (y, mode))
3094 try_int = true;
3095 /* If one of the operands is a memory, and alignment constraints
3096 are friendly enough, we may be able to do combined memory operations.
3097 We do not attempt this if Y is a constant because that combination is
3098 usually better with the by-parts thing below. */
3099 else if ((MEM_P (x) ? !CONSTANT_P (y) : MEM_P (y))
3100 && (!STRICT_ALIGNMENT
3101 || get_mode_alignment (mode) == BIGGEST_ALIGNMENT))
3102 try_int = true;
3103 else
3104 try_int = false;
3105
3106 if (try_int)
3107 {
3108 rtx ret;
3109
3110 /* For memory to memory moves, optimal behavior can be had with the
3111 existing block move logic. */
3112 if (MEM_P (x) && MEM_P (y))
3113 {
3114 emit_block_move (x, y, GEN_INT (GET_MODE_SIZE (mode)),
3115 BLOCK_OP_NO_LIBCALL);
3116 return get_last_insn ();
3117 }
3118
3119 ret = emit_move_via_integer (mode, x, y, true);
3120 if (ret)
3121 return ret;
3122 }
3123
3124 return emit_move_complex_parts (x, y);
3125 }
3126
3127 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3128 MODE is known to be MODE_CC. Returns the last instruction emitted. */
3129
3130 static rtx
3131 emit_move_ccmode (enum machine_mode mode, rtx x, rtx y)
3132 {
3133 rtx ret;
3134
3135 /* Assume all MODE_CC modes are equivalent; if we have movcc, use it. */
3136 if (mode != CCmode)
3137 {
3138 enum insn_code code = optab_handler (mov_optab, CCmode);
3139 if (code != CODE_FOR_nothing)
3140 {
3141 x = emit_move_change_mode (CCmode, mode, x, true);
3142 y = emit_move_change_mode (CCmode, mode, y, true);
3143 return emit_insn (GEN_FCN (code) (x, y));
3144 }
3145 }
3146
3147 /* Otherwise, find the MODE_INT mode of the same width. */
3148 ret = emit_move_via_integer (mode, x, y, false);
3149 gcc_assert (ret != NULL);
3150 return ret;
3151 }
3152
3153 /* Return true if word I of OP lies entirely in the
3154 undefined bits of a paradoxical subreg. */
3155
3156 static bool
3157 undefined_operand_subword_p (const_rtx op, int i)
3158 {
3159 enum machine_mode innermode, innermostmode;
3160 int offset;
3161 if (GET_CODE (op) != SUBREG)
3162 return false;
3163 innermode = GET_MODE (op);
3164 innermostmode = GET_MODE (SUBREG_REG (op));
3165 offset = i * UNITS_PER_WORD + SUBREG_BYTE (op);
3166 /* The SUBREG_BYTE represents offset, as if the value were stored in
3167 memory, except for a paradoxical subreg where we define
3168 SUBREG_BYTE to be 0; undo this exception as in
3169 simplify_subreg. */
3170 if (SUBREG_BYTE (op) == 0
3171 && GET_MODE_SIZE (innermostmode) < GET_MODE_SIZE (innermode))
3172 {
3173 int difference = (GET_MODE_SIZE (innermostmode) - GET_MODE_SIZE (innermode));
3174 if (WORDS_BIG_ENDIAN)
3175 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
3176 if (BYTES_BIG_ENDIAN)
3177 offset += difference % UNITS_PER_WORD;
3178 }
3179 if (offset >= GET_MODE_SIZE (innermostmode)
3180 || offset <= -GET_MODE_SIZE (word_mode))
3181 return true;
3182 return false;
3183 }
3184
3185 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3186 MODE is any multi-word or full-word mode that lacks a move_insn
3187 pattern. Note that you will get better code if you define such
3188 patterns, even if they must turn into multiple assembler instructions. */
3189
3190 static rtx
3191 emit_move_multi_word (enum machine_mode mode, rtx x, rtx y)
3192 {
3193 rtx last_insn = 0;
3194 rtx seq, inner;
3195 bool need_clobber;
3196 int i;
3197
3198 gcc_assert (GET_MODE_SIZE (mode) >= UNITS_PER_WORD);
3199
3200 /* If X is a push on the stack, do the push now and replace
3201 X with a reference to the stack pointer. */
3202 if (push_operand (x, mode))
3203 x = emit_move_resolve_push (mode, x);
3204
3205 /* If we are in reload, see if either operand is a MEM whose address
3206 is scheduled for replacement. */
3207 if (reload_in_progress && MEM_P (x)
3208 && (inner = find_replacement (&XEXP (x, 0))) != XEXP (x, 0))
3209 x = replace_equiv_address_nv (x, inner);
3210 if (reload_in_progress && MEM_P (y)
3211 && (inner = find_replacement (&XEXP (y, 0))) != XEXP (y, 0))
3212 y = replace_equiv_address_nv (y, inner);
3213
3214 start_sequence ();
3215
3216 need_clobber = false;
3217 for (i = 0;
3218 i < (GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD;
3219 i++)
3220 {
3221 rtx xpart = operand_subword (x, i, 1, mode);
3222 rtx ypart;
3223
3224 /* Do not generate code for a move if it would come entirely
3225 from the undefined bits of a paradoxical subreg. */
3226 if (undefined_operand_subword_p (y, i))
3227 continue;
3228
3229 ypart = operand_subword (y, i, 1, mode);
3230
3231 /* If we can't get a part of Y, put Y into memory if it is a
3232 constant. Otherwise, force it into a register. Then we must
3233 be able to get a part of Y. */
3234 if (ypart == 0 && CONSTANT_P (y))
3235 {
3236 y = use_anchored_address (force_const_mem (mode, y));
3237 ypart = operand_subword (y, i, 1, mode);
3238 }
3239 else if (ypart == 0)
3240 ypart = operand_subword_force (y, i, mode);
3241
3242 gcc_assert (xpart && ypart);
3243
3244 need_clobber |= (GET_CODE (xpart) == SUBREG);
3245
3246 last_insn = emit_move_insn (xpart, ypart);
3247 }
3248
3249 seq = get_insns ();
3250 end_sequence ();
3251
3252 /* Show the output dies here. This is necessary for SUBREGs
3253 of pseudos since we cannot track their lifetimes correctly;
3254 hard regs shouldn't appear here except as return values.
3255 We never want to emit such a clobber after reload. */
3256 if (x != y
3257 && ! (reload_in_progress || reload_completed)
3258 && need_clobber != 0)
3259 emit_clobber (x);
3260
3261 emit_insn (seq);
3262
3263 return last_insn;
3264 }
3265
3266 /* Low level part of emit_move_insn.
3267 Called just like emit_move_insn, but assumes X and Y
3268 are basically valid. */
3269
3270 rtx
3271 emit_move_insn_1 (rtx x, rtx y)
3272 {
3273 enum machine_mode mode = GET_MODE (x);
3274 enum insn_code code;
3275
3276 gcc_assert ((unsigned int) mode < (unsigned int) MAX_MACHINE_MODE);
3277
3278 code = optab_handler (mov_optab, mode);
3279 if (code != CODE_FOR_nothing)
3280 return emit_insn (GEN_FCN (code) (x, y));
3281
3282 /* Expand complex moves by moving real part and imag part. */
3283 if (COMPLEX_MODE_P (mode))
3284 return emit_move_complex (mode, x, y);
3285
3286 if (GET_MODE_CLASS (mode) == MODE_DECIMAL_FLOAT
3287 || ALL_FIXED_POINT_MODE_P (mode))
3288 {
3289 rtx result = emit_move_via_integer (mode, x, y, true);
3290
3291 /* If we can't find an integer mode, use multi words. */
3292 if (result)
3293 return result;
3294 else
3295 return emit_move_multi_word (mode, x, y);
3296 }
3297
3298 if (GET_MODE_CLASS (mode) == MODE_CC)
3299 return emit_move_ccmode (mode, x, y);
3300
3301 /* Try using a move pattern for the corresponding integer mode. This is
3302 only safe when simplify_subreg can convert MODE constants into integer
3303 constants. At present, it can only do this reliably if the value
3304 fits within a HOST_WIDE_INT. */
3305 if (!CONSTANT_P (y) || GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
3306 {
3307 rtx ret = emit_move_via_integer (mode, x, y, false);
3308 if (ret)
3309 return ret;
3310 }
3311
3312 return emit_move_multi_word (mode, x, y);
3313 }
3314
3315 /* Generate code to copy Y into X.
3316 Both Y and X must have the same mode, except that
3317 Y can be a constant with VOIDmode.
3318 This mode cannot be BLKmode; use emit_block_move for that.
3319
3320 Return the last instruction emitted. */
3321
3322 rtx
3323 emit_move_insn (rtx x, rtx y)
3324 {
3325 enum machine_mode mode = GET_MODE (x);
3326 rtx y_cst = NULL_RTX;
3327 rtx last_insn, set;
3328
3329 gcc_assert (mode != BLKmode
3330 && (GET_MODE (y) == mode || GET_MODE (y) == VOIDmode));
3331
3332 if (CONSTANT_P (y))
3333 {
3334 if (optimize
3335 && SCALAR_FLOAT_MODE_P (GET_MODE (x))
3336 && (last_insn = compress_float_constant (x, y)))
3337 return last_insn;
3338
3339 y_cst = y;
3340
3341 if (!targetm.legitimate_constant_p (mode, y))
3342 {
3343 y = force_const_mem (mode, y);
3344
3345 /* If the target's cannot_force_const_mem prevented the spill,
3346 assume that the target's move expanders will also take care
3347 of the non-legitimate constant. */
3348 if (!y)
3349 y = y_cst;
3350 else
3351 y = use_anchored_address (y);
3352 }
3353 }
3354
3355 /* If X or Y are memory references, verify that their addresses are valid
3356 for the machine. */
3357 if (MEM_P (x)
3358 && (! memory_address_addr_space_p (GET_MODE (x), XEXP (x, 0),
3359 MEM_ADDR_SPACE (x))
3360 && ! push_operand (x, GET_MODE (x))))
3361 x = validize_mem (x);
3362
3363 if (MEM_P (y)
3364 && ! memory_address_addr_space_p (GET_MODE (y), XEXP (y, 0),
3365 MEM_ADDR_SPACE (y)))
3366 y = validize_mem (y);
3367
3368 gcc_assert (mode != BLKmode);
3369
3370 last_insn = emit_move_insn_1 (x, y);
3371
3372 if (y_cst && REG_P (x)
3373 && (set = single_set (last_insn)) != NULL_RTX
3374 && SET_DEST (set) == x
3375 && ! rtx_equal_p (y_cst, SET_SRC (set)))
3376 set_unique_reg_note (last_insn, REG_EQUAL, copy_rtx (y_cst));
3377
3378 return last_insn;
3379 }
3380
3381 /* If Y is representable exactly in a narrower mode, and the target can
3382 perform the extension directly from constant or memory, then emit the
3383 move as an extension. */
3384
3385 static rtx
3386 compress_float_constant (rtx x, rtx y)
3387 {
3388 enum machine_mode dstmode = GET_MODE (x);
3389 enum machine_mode orig_srcmode = GET_MODE (y);
3390 enum machine_mode srcmode;
3391 REAL_VALUE_TYPE r;
3392 int oldcost, newcost;
3393 bool speed = optimize_insn_for_speed_p ();
3394
3395 REAL_VALUE_FROM_CONST_DOUBLE (r, y);
3396
3397 if (targetm.legitimate_constant_p (dstmode, y))
3398 oldcost = rtx_cost (y, SET, speed);
3399 else
3400 oldcost = rtx_cost (force_const_mem (dstmode, y), SET, speed);
3401
3402 for (srcmode = GET_CLASS_NARROWEST_MODE (GET_MODE_CLASS (orig_srcmode));
3403 srcmode != orig_srcmode;
3404 srcmode = GET_MODE_WIDER_MODE (srcmode))
3405 {
3406 enum insn_code ic;
3407 rtx trunc_y, last_insn;
3408
3409 /* Skip if the target can't extend this way. */
3410 ic = can_extend_p (dstmode, srcmode, 0);
3411 if (ic == CODE_FOR_nothing)
3412 continue;
3413
3414 /* Skip if the narrowed value isn't exact. */
3415 if (! exact_real_truncate (srcmode, &r))
3416 continue;
3417
3418 trunc_y = CONST_DOUBLE_FROM_REAL_VALUE (r, srcmode);
3419
3420 if (targetm.legitimate_constant_p (srcmode, trunc_y))
3421 {
3422 /* Skip if the target needs extra instructions to perform
3423 the extension. */
3424 if (!insn_operand_matches (ic, 1, trunc_y))
3425 continue;
3426 /* This is valid, but may not be cheaper than the original. */
3427 newcost = rtx_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y), SET, speed);
3428 if (oldcost < newcost)
3429 continue;
3430 }
3431 else if (float_extend_from_mem[dstmode][srcmode])
3432 {
3433 trunc_y = force_const_mem (srcmode, trunc_y);
3434 /* This is valid, but may not be cheaper than the original. */
3435 newcost = rtx_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y), SET, speed);
3436 if (oldcost < newcost)
3437 continue;
3438 trunc_y = validize_mem (trunc_y);
3439 }
3440 else
3441 continue;
3442
3443 /* For CSE's benefit, force the compressed constant pool entry
3444 into a new pseudo. This constant may be used in different modes,
3445 and if not, combine will put things back together for us. */
3446 trunc_y = force_reg (srcmode, trunc_y);
3447 emit_unop_insn (ic, x, trunc_y, UNKNOWN);
3448 last_insn = get_last_insn ();
3449
3450 if (REG_P (x))
3451 set_unique_reg_note (last_insn, REG_EQUAL, y);
3452
3453 return last_insn;
3454 }
3455
3456 return NULL_RTX;
3457 }
3458 \f
3459 /* Pushing data onto the stack. */
3460
3461 /* Push a block of length SIZE (perhaps variable)
3462 and return an rtx to address the beginning of the block.
3463 The value may be virtual_outgoing_args_rtx.
3464
3465 EXTRA is the number of bytes of padding to push in addition to SIZE.
3466 BELOW nonzero means this padding comes at low addresses;
3467 otherwise, the padding comes at high addresses. */
3468
3469 rtx
3470 push_block (rtx size, int extra, int below)
3471 {
3472 rtx temp;
3473
3474 size = convert_modes (Pmode, ptr_mode, size, 1);
3475 if (CONSTANT_P (size))
3476 anti_adjust_stack (plus_constant (size, extra));
3477 else if (REG_P (size) && extra == 0)
3478 anti_adjust_stack (size);
3479 else
3480 {
3481 temp = copy_to_mode_reg (Pmode, size);
3482 if (extra != 0)
3483 temp = expand_binop (Pmode, add_optab, temp, GEN_INT (extra),
3484 temp, 0, OPTAB_LIB_WIDEN);
3485 anti_adjust_stack (temp);
3486 }
3487
3488 #ifndef STACK_GROWS_DOWNWARD
3489 if (0)
3490 #else
3491 if (1)
3492 #endif
3493 {
3494 temp = virtual_outgoing_args_rtx;
3495 if (extra != 0 && below)
3496 temp = plus_constant (temp, extra);
3497 }
3498 else
3499 {
3500 if (CONST_INT_P (size))
3501 temp = plus_constant (virtual_outgoing_args_rtx,
3502 -INTVAL (size) - (below ? 0 : extra));
3503 else if (extra != 0 && !below)
3504 temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx,
3505 negate_rtx (Pmode, plus_constant (size, extra)));
3506 else
3507 temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx,
3508 negate_rtx (Pmode, size));
3509 }
3510
3511 return memory_address (GET_CLASS_NARROWEST_MODE (MODE_INT), temp);
3512 }
3513
3514 #ifdef PUSH_ROUNDING
3515
3516 /* Emit single push insn. */
3517
3518 static void
3519 emit_single_push_insn (enum machine_mode mode, rtx x, tree type)
3520 {
3521 rtx dest_addr;
3522 unsigned rounded_size = PUSH_ROUNDING (GET_MODE_SIZE (mode));
3523 rtx dest;
3524 enum insn_code icode;
3525
3526 stack_pointer_delta += PUSH_ROUNDING (GET_MODE_SIZE (mode));
3527 /* If there is push pattern, use it. Otherwise try old way of throwing
3528 MEM representing push operation to move expander. */
3529 icode = optab_handler (push_optab, mode);
3530 if (icode != CODE_FOR_nothing)
3531 {
3532 struct expand_operand ops[1];
3533
3534 create_input_operand (&ops[0], x, mode);
3535 if (maybe_expand_insn (icode, 1, ops))
3536 return;
3537 }
3538 if (GET_MODE_SIZE (mode) == rounded_size)
3539 dest_addr = gen_rtx_fmt_e (STACK_PUSH_CODE, Pmode, stack_pointer_rtx);
3540 /* If we are to pad downward, adjust the stack pointer first and
3541 then store X into the stack location using an offset. This is
3542 because emit_move_insn does not know how to pad; it does not have
3543 access to type. */
3544 else if (FUNCTION_ARG_PADDING (mode, type) == downward)
3545 {
3546 unsigned padding_size = rounded_size - GET_MODE_SIZE (mode);
3547 HOST_WIDE_INT offset;
3548
3549 emit_move_insn (stack_pointer_rtx,
3550 expand_binop (Pmode,
3551 #ifdef STACK_GROWS_DOWNWARD
3552 sub_optab,
3553 #else
3554 add_optab,
3555 #endif
3556 stack_pointer_rtx,
3557 GEN_INT (rounded_size),
3558 NULL_RTX, 0, OPTAB_LIB_WIDEN));
3559
3560 offset = (HOST_WIDE_INT) padding_size;
3561 #ifdef STACK_GROWS_DOWNWARD
3562 if (STACK_PUSH_CODE == POST_DEC)
3563 /* We have already decremented the stack pointer, so get the
3564 previous value. */
3565 offset += (HOST_WIDE_INT) rounded_size;
3566 #else
3567 if (STACK_PUSH_CODE == POST_INC)
3568 /* We have already incremented the stack pointer, so get the
3569 previous value. */
3570 offset -= (HOST_WIDE_INT) rounded_size;
3571 #endif
3572 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx, GEN_INT (offset));
3573 }
3574 else
3575 {
3576 #ifdef STACK_GROWS_DOWNWARD
3577 /* ??? This seems wrong if STACK_PUSH_CODE == POST_DEC. */
3578 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
3579 GEN_INT (-(HOST_WIDE_INT) rounded_size));
3580 #else
3581 /* ??? This seems wrong if STACK_PUSH_CODE == POST_INC. */
3582 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
3583 GEN_INT (rounded_size));
3584 #endif
3585 dest_addr = gen_rtx_PRE_MODIFY (Pmode, stack_pointer_rtx, dest_addr);
3586 }
3587
3588 dest = gen_rtx_MEM (mode, dest_addr);
3589
3590 if (type != 0)
3591 {
3592 set_mem_attributes (dest, type, 1);
3593
3594 if (flag_optimize_sibling_calls)
3595 /* Function incoming arguments may overlap with sibling call
3596 outgoing arguments and we cannot allow reordering of reads
3597 from function arguments with stores to outgoing arguments
3598 of sibling calls. */
3599 set_mem_alias_set (dest, 0);
3600 }
3601 emit_move_insn (dest, x);
3602 }
3603 #endif
3604
3605 /* Generate code to push X onto the stack, assuming it has mode MODE and
3606 type TYPE.
3607 MODE is redundant except when X is a CONST_INT (since they don't
3608 carry mode info).
3609 SIZE is an rtx for the size of data to be copied (in bytes),
3610 needed only if X is BLKmode.
3611
3612 ALIGN (in bits) is maximum alignment we can assume.
3613
3614 If PARTIAL and REG are both nonzero, then copy that many of the first
3615 bytes of X into registers starting with REG, and push the rest of X.
3616 The amount of space pushed is decreased by PARTIAL bytes.
3617 REG must be a hard register in this case.
3618 If REG is zero but PARTIAL is not, take any all others actions for an
3619 argument partially in registers, but do not actually load any
3620 registers.
3621
3622 EXTRA is the amount in bytes of extra space to leave next to this arg.
3623 This is ignored if an argument block has already been allocated.
3624
3625 On a machine that lacks real push insns, ARGS_ADDR is the address of
3626 the bottom of the argument block for this call. We use indexing off there
3627 to store the arg. On machines with push insns, ARGS_ADDR is 0 when a
3628 argument block has not been preallocated.
3629
3630 ARGS_SO_FAR is the size of args previously pushed for this call.
3631
3632 REG_PARM_STACK_SPACE is nonzero if functions require stack space
3633 for arguments passed in registers. If nonzero, it will be the number
3634 of bytes required. */
3635
3636 void
3637 emit_push_insn (rtx x, enum machine_mode mode, tree type, rtx size,
3638 unsigned int align, int partial, rtx reg, int extra,
3639 rtx args_addr, rtx args_so_far, int reg_parm_stack_space,
3640 rtx alignment_pad)
3641 {
3642 rtx xinner;
3643 enum direction stack_direction
3644 #ifdef STACK_GROWS_DOWNWARD
3645 = downward;
3646 #else
3647 = upward;
3648 #endif
3649
3650 /* Decide where to pad the argument: `downward' for below,
3651 `upward' for above, or `none' for don't pad it.
3652 Default is below for small data on big-endian machines; else above. */
3653 enum direction where_pad = FUNCTION_ARG_PADDING (mode, type);
3654
3655 /* Invert direction if stack is post-decrement.
3656 FIXME: why? */
3657 if (STACK_PUSH_CODE == POST_DEC)
3658 if (where_pad != none)
3659 where_pad = (where_pad == downward ? upward : downward);
3660
3661 xinner = x;
3662
3663 if (mode == BLKmode
3664 || (STRICT_ALIGNMENT && align < GET_MODE_ALIGNMENT (mode)))
3665 {
3666 /* Copy a block into the stack, entirely or partially. */
3667
3668 rtx temp;
3669 int used;
3670 int offset;
3671 int skip;
3672
3673 offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT);
3674 used = partial - offset;
3675
3676 if (mode != BLKmode)
3677 {
3678 /* A value is to be stored in an insufficiently aligned
3679 stack slot; copy via a suitably aligned slot if
3680 necessary. */
3681 size = GEN_INT (GET_MODE_SIZE (mode));
3682 if (!MEM_P (xinner))
3683 {
3684 temp = assign_temp (type, 0, 1, 1);
3685 emit_move_insn (temp, xinner);
3686 xinner = temp;
3687 }
3688 }
3689
3690 gcc_assert (size);
3691
3692 /* USED is now the # of bytes we need not copy to the stack
3693 because registers will take care of them. */
3694
3695 if (partial != 0)
3696 xinner = adjust_address (xinner, BLKmode, used);
3697
3698 /* If the partial register-part of the arg counts in its stack size,
3699 skip the part of stack space corresponding to the registers.
3700 Otherwise, start copying to the beginning of the stack space,
3701 by setting SKIP to 0. */
3702 skip = (reg_parm_stack_space == 0) ? 0 : used;
3703
3704 #ifdef PUSH_ROUNDING
3705 /* Do it with several push insns if that doesn't take lots of insns
3706 and if there is no difficulty with push insns that skip bytes
3707 on the stack for alignment purposes. */
3708 if (args_addr == 0
3709 && PUSH_ARGS
3710 && CONST_INT_P (size)
3711 && skip == 0
3712 && MEM_ALIGN (xinner) >= align
3713 && (MOVE_BY_PIECES_P ((unsigned) INTVAL (size) - used, align))
3714 /* Here we avoid the case of a structure whose weak alignment
3715 forces many pushes of a small amount of data,
3716 and such small pushes do rounding that causes trouble. */
3717 && ((! SLOW_UNALIGNED_ACCESS (word_mode, align))
3718 || align >= BIGGEST_ALIGNMENT
3719 || (PUSH_ROUNDING (align / BITS_PER_UNIT)
3720 == (align / BITS_PER_UNIT)))
3721 && (HOST_WIDE_INT) PUSH_ROUNDING (INTVAL (size)) == INTVAL (size))
3722 {
3723 /* Push padding now if padding above and stack grows down,
3724 or if padding below and stack grows up.
3725 But if space already allocated, this has already been done. */
3726 if (extra && args_addr == 0
3727 && where_pad != none && where_pad != stack_direction)
3728 anti_adjust_stack (GEN_INT (extra));
3729
3730 move_by_pieces (NULL, xinner, INTVAL (size) - used, align, 0);
3731 }
3732 else
3733 #endif /* PUSH_ROUNDING */
3734 {
3735 rtx target;
3736
3737 /* Otherwise make space on the stack and copy the data
3738 to the address of that space. */
3739
3740 /* Deduct words put into registers from the size we must copy. */
3741 if (partial != 0)
3742 {
3743 if (CONST_INT_P (size))
3744 size = GEN_INT (INTVAL (size) - used);
3745 else
3746 size = expand_binop (GET_MODE (size), sub_optab, size,
3747 GEN_INT (used), NULL_RTX, 0,
3748 OPTAB_LIB_WIDEN);
3749 }
3750
3751 /* Get the address of the stack space.
3752 In this case, we do not deal with EXTRA separately.
3753 A single stack adjust will do. */
3754 if (! args_addr)
3755 {
3756 temp = push_block (size, extra, where_pad == downward);
3757 extra = 0;
3758 }
3759 else if (CONST_INT_P (args_so_far))
3760 temp = memory_address (BLKmode,
3761 plus_constant (args_addr,
3762 skip + INTVAL (args_so_far)));
3763 else
3764 temp = memory_address (BLKmode,
3765 plus_constant (gen_rtx_PLUS (Pmode,
3766 args_addr,
3767 args_so_far),
3768 skip));
3769
3770 if (!ACCUMULATE_OUTGOING_ARGS)
3771 {
3772 /* If the source is referenced relative to the stack pointer,
3773 copy it to another register to stabilize it. We do not need
3774 to do this if we know that we won't be changing sp. */
3775
3776 if (reg_mentioned_p (virtual_stack_dynamic_rtx, temp)
3777 || reg_mentioned_p (virtual_outgoing_args_rtx, temp))
3778 temp = copy_to_reg (temp);
3779 }
3780
3781 target = gen_rtx_MEM (BLKmode, temp);
3782
3783 /* We do *not* set_mem_attributes here, because incoming arguments
3784 may overlap with sibling call outgoing arguments and we cannot
3785 allow reordering of reads from function arguments with stores
3786 to outgoing arguments of sibling calls. We do, however, want
3787 to record the alignment of the stack slot. */
3788 /* ALIGN may well be better aligned than TYPE, e.g. due to
3789 PARM_BOUNDARY. Assume the caller isn't lying. */
3790 set_mem_align (target, align);
3791
3792 emit_block_move (target, xinner, size, BLOCK_OP_CALL_PARM);
3793 }
3794 }
3795 else if (partial > 0)
3796 {
3797 /* Scalar partly in registers. */
3798
3799 int size = GET_MODE_SIZE (mode) / UNITS_PER_WORD;
3800 int i;
3801 int not_stack;
3802 /* # bytes of start of argument
3803 that we must make space for but need not store. */
3804 int offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT);
3805 int args_offset = INTVAL (args_so_far);
3806 int skip;
3807
3808 /* Push padding now if padding above and stack grows down,
3809 or if padding below and stack grows up.
3810 But if space already allocated, this has already been done. */
3811 if (extra && args_addr == 0
3812 && where_pad != none && where_pad != stack_direction)
3813 anti_adjust_stack (GEN_INT (extra));
3814
3815 /* If we make space by pushing it, we might as well push
3816 the real data. Otherwise, we can leave OFFSET nonzero
3817 and leave the space uninitialized. */
3818 if (args_addr == 0)
3819 offset = 0;
3820
3821 /* Now NOT_STACK gets the number of words that we don't need to
3822 allocate on the stack. Convert OFFSET to words too. */
3823 not_stack = (partial - offset) / UNITS_PER_WORD;
3824 offset /= UNITS_PER_WORD;
3825
3826 /* If the partial register-part of the arg counts in its stack size,
3827 skip the part of stack space corresponding to the registers.
3828 Otherwise, start copying to the beginning of the stack space,
3829 by setting SKIP to 0. */
3830 skip = (reg_parm_stack_space == 0) ? 0 : not_stack;
3831
3832 if (CONSTANT_P (x) && !targetm.legitimate_constant_p (mode, x))
3833 x = validize_mem (force_const_mem (mode, x));
3834
3835 /* If X is a hard register in a non-integer mode, copy it into a pseudo;
3836 SUBREGs of such registers are not allowed. */
3837 if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER
3838 && GET_MODE_CLASS (GET_MODE (x)) != MODE_INT))
3839 x = copy_to_reg (x);
3840
3841 /* Loop over all the words allocated on the stack for this arg. */
3842 /* We can do it by words, because any scalar bigger than a word
3843 has a size a multiple of a word. */
3844 #ifndef PUSH_ARGS_REVERSED
3845 for (i = not_stack; i < size; i++)
3846 #else
3847 for (i = size - 1; i >= not_stack; i--)
3848 #endif
3849 if (i >= not_stack + offset)
3850 emit_push_insn (operand_subword_force (x, i, mode),
3851 word_mode, NULL_TREE, NULL_RTX, align, 0, NULL_RTX,
3852 0, args_addr,
3853 GEN_INT (args_offset + ((i - not_stack + skip)
3854 * UNITS_PER_WORD)),
3855 reg_parm_stack_space, alignment_pad);
3856 }
3857 else
3858 {
3859 rtx addr;
3860 rtx dest;
3861
3862 /* Push padding now if padding above and stack grows down,
3863 or if padding below and stack grows up.
3864 But if space already allocated, this has already been done. */
3865 if (extra && args_addr == 0
3866 && where_pad != none && where_pad != stack_direction)
3867 anti_adjust_stack (GEN_INT (extra));
3868
3869 #ifdef PUSH_ROUNDING
3870 if (args_addr == 0 && PUSH_ARGS)
3871 emit_single_push_insn (mode, x, type);
3872 else
3873 #endif
3874 {
3875 if (CONST_INT_P (args_so_far))
3876 addr
3877 = memory_address (mode,
3878 plus_constant (args_addr,
3879 INTVAL (args_so_far)));
3880 else
3881 addr = memory_address (mode, gen_rtx_PLUS (Pmode, args_addr,
3882 args_so_far));
3883 dest = gen_rtx_MEM (mode, addr);
3884
3885 /* We do *not* set_mem_attributes here, because incoming arguments
3886 may overlap with sibling call outgoing arguments and we cannot
3887 allow reordering of reads from function arguments with stores
3888 to outgoing arguments of sibling calls. We do, however, want
3889 to record the alignment of the stack slot. */
3890 /* ALIGN may well be better aligned than TYPE, e.g. due to
3891 PARM_BOUNDARY. Assume the caller isn't lying. */
3892 set_mem_align (dest, align);
3893
3894 emit_move_insn (dest, x);
3895 }
3896 }
3897
3898 /* If part should go in registers, copy that part
3899 into the appropriate registers. Do this now, at the end,
3900 since mem-to-mem copies above may do function calls. */
3901 if (partial > 0 && reg != 0)
3902 {
3903 /* Handle calls that pass values in multiple non-contiguous locations.
3904 The Irix 6 ABI has examples of this. */
3905 if (GET_CODE (reg) == PARALLEL)
3906 emit_group_load (reg, x, type, -1);
3907 else
3908 {
3909 gcc_assert (partial % UNITS_PER_WORD == 0);
3910 move_block_to_reg (REGNO (reg), x, partial / UNITS_PER_WORD, mode);
3911 }
3912 }
3913
3914 if (extra && args_addr == 0 && where_pad == stack_direction)
3915 anti_adjust_stack (GEN_INT (extra));
3916
3917 if (alignment_pad && args_addr == 0)
3918 anti_adjust_stack (alignment_pad);
3919 }
3920 \f
3921 /* Return X if X can be used as a subtarget in a sequence of arithmetic
3922 operations. */
3923
3924 static rtx
3925 get_subtarget (rtx x)
3926 {
3927 return (optimize
3928 || x == 0
3929 /* Only registers can be subtargets. */
3930 || !REG_P (x)
3931 /* Don't use hard regs to avoid extending their life. */
3932 || REGNO (x) < FIRST_PSEUDO_REGISTER
3933 ? 0 : x);
3934 }
3935
3936 /* A subroutine of expand_assignment. Optimize FIELD op= VAL, where
3937 FIELD is a bitfield. Returns true if the optimization was successful,
3938 and there's nothing else to do. */
3939
3940 static bool
3941 optimize_bitfield_assignment_op (unsigned HOST_WIDE_INT bitsize,
3942 unsigned HOST_WIDE_INT bitpos,
3943 enum machine_mode mode1, rtx str_rtx,
3944 tree to, tree src)
3945 {
3946 enum machine_mode str_mode = GET_MODE (str_rtx);
3947 unsigned int str_bitsize = GET_MODE_BITSIZE (str_mode);
3948 tree op0, op1;
3949 rtx value, result;
3950 optab binop;
3951 gimple srcstmt;
3952 enum tree_code code;
3953
3954 if (mode1 != VOIDmode
3955 || bitsize >= BITS_PER_WORD
3956 || str_bitsize > BITS_PER_WORD
3957 || TREE_SIDE_EFFECTS (to)
3958 || TREE_THIS_VOLATILE (to))
3959 return false;
3960
3961 STRIP_NOPS (src);
3962 if (TREE_CODE (src) != SSA_NAME)
3963 return false;
3964 if (TREE_CODE (TREE_TYPE (src)) != INTEGER_TYPE)
3965 return false;
3966
3967 srcstmt = get_gimple_for_ssa_name (src);
3968 if (!srcstmt
3969 || TREE_CODE_CLASS (gimple_assign_rhs_code (srcstmt)) != tcc_binary)
3970 return false;
3971
3972 code = gimple_assign_rhs_code (srcstmt);
3973
3974 op0 = gimple_assign_rhs1 (srcstmt);
3975
3976 /* If OP0 is an SSA_NAME, then we want to walk the use-def chain
3977 to find its initialization. Hopefully the initialization will
3978 be from a bitfield load. */
3979 if (TREE_CODE (op0) == SSA_NAME)
3980 {
3981 gimple op0stmt = get_gimple_for_ssa_name (op0);
3982
3983 /* We want to eventually have OP0 be the same as TO, which
3984 should be a bitfield. */
3985 if (!op0stmt
3986 || !is_gimple_assign (op0stmt)
3987 || gimple_assign_rhs_code (op0stmt) != TREE_CODE (to))
3988 return false;
3989 op0 = gimple_assign_rhs1 (op0stmt);
3990 }
3991
3992 op1 = gimple_assign_rhs2 (srcstmt);
3993
3994 if (!operand_equal_p (to, op0, 0))
3995 return false;
3996
3997 if (MEM_P (str_rtx))
3998 {
3999 unsigned HOST_WIDE_INT offset1;
4000
4001 if (str_bitsize == 0 || str_bitsize > BITS_PER_WORD)
4002 str_mode = word_mode;
4003 str_mode = get_best_mode (bitsize, bitpos,
4004 MEM_ALIGN (str_rtx), str_mode, 0);
4005 if (str_mode == VOIDmode)
4006 return false;
4007 str_bitsize = GET_MODE_BITSIZE (str_mode);
4008
4009 offset1 = bitpos;
4010 bitpos %= str_bitsize;
4011 offset1 = (offset1 - bitpos) / BITS_PER_UNIT;
4012 str_rtx = adjust_address (str_rtx, str_mode, offset1);
4013 }
4014 else if (!REG_P (str_rtx) && GET_CODE (str_rtx) != SUBREG)
4015 return false;
4016
4017 /* If the bit field covers the whole REG/MEM, store_field
4018 will likely generate better code. */
4019 if (bitsize >= str_bitsize)
4020 return false;
4021
4022 /* We can't handle fields split across multiple entities. */
4023 if (bitpos + bitsize > str_bitsize)
4024 return false;
4025
4026 if (BYTES_BIG_ENDIAN)
4027 bitpos = str_bitsize - bitpos - bitsize;
4028
4029 switch (code)
4030 {
4031 case PLUS_EXPR:
4032 case MINUS_EXPR:
4033 /* For now, just optimize the case of the topmost bitfield
4034 where we don't need to do any masking and also
4035 1 bit bitfields where xor can be used.
4036 We might win by one instruction for the other bitfields
4037 too if insv/extv instructions aren't used, so that
4038 can be added later. */
4039 if (bitpos + bitsize != str_bitsize
4040 && (bitsize != 1 || TREE_CODE (op1) != INTEGER_CST))
4041 break;
4042
4043 value = expand_expr (op1, NULL_RTX, str_mode, EXPAND_NORMAL);
4044 value = convert_modes (str_mode,
4045 TYPE_MODE (TREE_TYPE (op1)), value,
4046 TYPE_UNSIGNED (TREE_TYPE (op1)));
4047
4048 /* We may be accessing data outside the field, which means
4049 we can alias adjacent data. */
4050 if (MEM_P (str_rtx))
4051 {
4052 str_rtx = shallow_copy_rtx (str_rtx);
4053 set_mem_alias_set (str_rtx, 0);
4054 set_mem_expr (str_rtx, 0);
4055 }
4056
4057 binop = code == PLUS_EXPR ? add_optab : sub_optab;
4058 if (bitsize == 1 && bitpos + bitsize != str_bitsize)
4059 {
4060 value = expand_and (str_mode, value, const1_rtx, NULL);
4061 binop = xor_optab;
4062 }
4063 value = expand_shift (LSHIFT_EXPR, str_mode, value,
4064 bitpos, NULL_RTX, 1);
4065 result = expand_binop (str_mode, binop, str_rtx,
4066 value, str_rtx, 1, OPTAB_WIDEN);
4067 if (result != str_rtx)
4068 emit_move_insn (str_rtx, result);
4069 return true;
4070
4071 case BIT_IOR_EXPR:
4072 case BIT_XOR_EXPR:
4073 if (TREE_CODE (op1) != INTEGER_CST)
4074 break;
4075 value = expand_expr (op1, NULL_RTX, GET_MODE (str_rtx), EXPAND_NORMAL);
4076 value = convert_modes (GET_MODE (str_rtx),
4077 TYPE_MODE (TREE_TYPE (op1)), value,
4078 TYPE_UNSIGNED (TREE_TYPE (op1)));
4079
4080 /* We may be accessing data outside the field, which means
4081 we can alias adjacent data. */
4082 if (MEM_P (str_rtx))
4083 {
4084 str_rtx = shallow_copy_rtx (str_rtx);
4085 set_mem_alias_set (str_rtx, 0);
4086 set_mem_expr (str_rtx, 0);
4087 }
4088
4089 binop = code == BIT_IOR_EXPR ? ior_optab : xor_optab;
4090 if (bitpos + bitsize != GET_MODE_BITSIZE (GET_MODE (str_rtx)))
4091 {
4092 rtx mask = GEN_INT (((unsigned HOST_WIDE_INT) 1 << bitsize)
4093 - 1);
4094 value = expand_and (GET_MODE (str_rtx), value, mask,
4095 NULL_RTX);
4096 }
4097 value = expand_shift (LSHIFT_EXPR, GET_MODE (str_rtx), value,
4098 bitpos, NULL_RTX, 1);
4099 result = expand_binop (GET_MODE (str_rtx), binop, str_rtx,
4100 value, str_rtx, 1, OPTAB_WIDEN);
4101 if (result != str_rtx)
4102 emit_move_insn (str_rtx, result);
4103 return true;
4104
4105 default:
4106 break;
4107 }
4108
4109 return false;
4110 }
4111
4112
4113 /* Expand an assignment that stores the value of FROM into TO. If NONTEMPORAL
4114 is true, try generating a nontemporal store. */
4115
4116 void
4117 expand_assignment (tree to, tree from, bool nontemporal)
4118 {
4119 rtx to_rtx = 0;
4120 rtx result;
4121 enum machine_mode mode;
4122 int align;
4123 enum insn_code icode;
4124
4125 /* Don't crash if the lhs of the assignment was erroneous. */
4126 if (TREE_CODE (to) == ERROR_MARK)
4127 {
4128 expand_normal (from);
4129 return;
4130 }
4131
4132 /* Optimize away no-op moves without side-effects. */
4133 if (operand_equal_p (to, from, 0))
4134 return;
4135
4136 mode = TYPE_MODE (TREE_TYPE (to));
4137 if ((TREE_CODE (to) == MEM_REF
4138 || TREE_CODE (to) == TARGET_MEM_REF)
4139 && mode != BLKmode
4140 && ((align = MAX (TYPE_ALIGN (TREE_TYPE (to)),
4141 get_object_alignment (to, BIGGEST_ALIGNMENT)))
4142 < (signed) GET_MODE_ALIGNMENT (mode))
4143 && ((icode = optab_handler (movmisalign_optab, mode))
4144 != CODE_FOR_nothing))
4145 {
4146 struct expand_operand ops[2];
4147 enum machine_mode address_mode;
4148 rtx reg, op0, mem;
4149
4150 reg = expand_expr (from, NULL_RTX, VOIDmode, EXPAND_NORMAL);
4151 reg = force_not_mem (reg);
4152
4153 if (TREE_CODE (to) == MEM_REF)
4154 {
4155 addr_space_t as
4156 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (to, 1))));
4157 tree base = TREE_OPERAND (to, 0);
4158 address_mode = targetm.addr_space.address_mode (as);
4159 op0 = expand_expr (base, NULL_RTX, VOIDmode, EXPAND_NORMAL);
4160 op0 = convert_memory_address_addr_space (address_mode, op0, as);
4161 if (!integer_zerop (TREE_OPERAND (to, 1)))
4162 {
4163 rtx off
4164 = immed_double_int_const (mem_ref_offset (to), address_mode);
4165 op0 = simplify_gen_binary (PLUS, address_mode, op0, off);
4166 }
4167 op0 = memory_address_addr_space (mode, op0, as);
4168 mem = gen_rtx_MEM (mode, op0);
4169 set_mem_attributes (mem, to, 0);
4170 set_mem_addr_space (mem, as);
4171 }
4172 else if (TREE_CODE (to) == TARGET_MEM_REF)
4173 {
4174 addr_space_t as = TYPE_ADDR_SPACE (TREE_TYPE (to));
4175 struct mem_address addr;
4176
4177 get_address_description (to, &addr);
4178 op0 = addr_for_mem_ref (&addr, as, true);
4179 op0 = memory_address_addr_space (mode, op0, as);
4180 mem = gen_rtx_MEM (mode, op0);
4181 set_mem_attributes (mem, to, 0);
4182 set_mem_addr_space (mem, as);
4183 }
4184 else
4185 gcc_unreachable ();
4186 if (TREE_THIS_VOLATILE (to))
4187 MEM_VOLATILE_P (mem) = 1;
4188
4189 create_fixed_operand (&ops[0], mem);
4190 create_input_operand (&ops[1], reg, mode);
4191 /* The movmisalign<mode> pattern cannot fail, else the assignment would
4192 silently be omitted. */
4193 expand_insn (icode, 2, ops);
4194 return;
4195 }
4196
4197 /* Assignment of a structure component needs special treatment
4198 if the structure component's rtx is not simply a MEM.
4199 Assignment of an array element at a constant index, and assignment of
4200 an array element in an unaligned packed structure field, has the same
4201 problem. */
4202 if (handled_component_p (to)
4203 /* ??? We only need to handle MEM_REF here if the access is not
4204 a full access of the base object. */
4205 || (TREE_CODE (to) == MEM_REF
4206 && TREE_CODE (TREE_OPERAND (to, 0)) == ADDR_EXPR)
4207 || TREE_CODE (TREE_TYPE (to)) == ARRAY_TYPE)
4208 {
4209 enum machine_mode mode1;
4210 HOST_WIDE_INT bitsize, bitpos;
4211 tree offset;
4212 int unsignedp;
4213 int volatilep = 0;
4214 tree tem;
4215
4216 push_temp_slots ();
4217 tem = get_inner_reference (to, &bitsize, &bitpos, &offset, &mode1,
4218 &unsignedp, &volatilep, true);
4219
4220 /* If we are going to use store_bit_field and extract_bit_field,
4221 make sure to_rtx will be safe for multiple use. */
4222
4223 to_rtx = expand_normal (tem);
4224
4225 /* If the bitfield is volatile, we want to access it in the
4226 field's mode, not the computed mode.
4227 If a MEM has VOIDmode (external with incomplete type),
4228 use BLKmode for it instead. */
4229 if (MEM_P (to_rtx))
4230 {
4231 if (volatilep && flag_strict_volatile_bitfields > 0)
4232 to_rtx = adjust_address (to_rtx, mode1, 0);
4233 else if (GET_MODE (to_rtx) == VOIDmode)
4234 to_rtx = adjust_address (to_rtx, BLKmode, 0);
4235 }
4236
4237 if (offset != 0)
4238 {
4239 enum machine_mode address_mode;
4240 rtx offset_rtx;
4241
4242 if (!MEM_P (to_rtx))
4243 {
4244 /* We can get constant negative offsets into arrays with broken
4245 user code. Translate this to a trap instead of ICEing. */
4246 gcc_assert (TREE_CODE (offset) == INTEGER_CST);
4247 expand_builtin_trap ();
4248 to_rtx = gen_rtx_MEM (BLKmode, const0_rtx);
4249 }
4250
4251 offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode, EXPAND_SUM);
4252 address_mode
4253 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (to_rtx));
4254 if (GET_MODE (offset_rtx) != address_mode)
4255 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
4256
4257 /* A constant address in TO_RTX can have VOIDmode, we must not try
4258 to call force_reg for that case. Avoid that case. */
4259 if (MEM_P (to_rtx)
4260 && GET_MODE (to_rtx) == BLKmode
4261 && GET_MODE (XEXP (to_rtx, 0)) != VOIDmode
4262 && bitsize > 0
4263 && (bitpos % bitsize) == 0
4264 && (bitsize % GET_MODE_ALIGNMENT (mode1)) == 0
4265 && MEM_ALIGN (to_rtx) == GET_MODE_ALIGNMENT (mode1))
4266 {
4267 to_rtx = adjust_address (to_rtx, mode1, bitpos / BITS_PER_UNIT);
4268 bitpos = 0;
4269 }
4270
4271 to_rtx = offset_address (to_rtx, offset_rtx,
4272 highest_pow2_factor_for_target (to,
4273 offset));
4274 }
4275
4276 /* No action is needed if the target is not a memory and the field
4277 lies completely outside that target. This can occur if the source
4278 code contains an out-of-bounds access to a small array. */
4279 if (!MEM_P (to_rtx)
4280 && GET_MODE (to_rtx) != BLKmode
4281 && (unsigned HOST_WIDE_INT) bitpos
4282 >= GET_MODE_PRECISION (GET_MODE (to_rtx)))
4283 {
4284 expand_normal (from);
4285 result = NULL;
4286 }
4287 /* Handle expand_expr of a complex value returning a CONCAT. */
4288 else if (GET_CODE (to_rtx) == CONCAT)
4289 {
4290 unsigned short mode_bitsize = GET_MODE_BITSIZE (GET_MODE (to_rtx));
4291 if (COMPLEX_MODE_P (TYPE_MODE (TREE_TYPE (from)))
4292 && bitpos == 0
4293 && bitsize == mode_bitsize)
4294 result = store_expr (from, to_rtx, false, nontemporal);
4295 else if (bitsize == mode_bitsize / 2
4296 && (bitpos == 0 || bitpos == mode_bitsize / 2))
4297 result = store_expr (from, XEXP (to_rtx, bitpos != 0), false,
4298 nontemporal);
4299 else if (bitpos + bitsize <= mode_bitsize / 2)
4300 result = store_field (XEXP (to_rtx, 0), bitsize, bitpos,
4301 mode1, from, TREE_TYPE (tem),
4302 get_alias_set (to), nontemporal);
4303 else if (bitpos >= mode_bitsize / 2)
4304 result = store_field (XEXP (to_rtx, 1), bitsize,
4305 bitpos - mode_bitsize / 2, mode1, from,
4306 TREE_TYPE (tem), get_alias_set (to),
4307 nontemporal);
4308 else if (bitpos == 0 && bitsize == mode_bitsize)
4309 {
4310 rtx from_rtx;
4311 result = expand_normal (from);
4312 from_rtx = simplify_gen_subreg (GET_MODE (to_rtx), result,
4313 TYPE_MODE (TREE_TYPE (from)), 0);
4314 emit_move_insn (XEXP (to_rtx, 0),
4315 read_complex_part (from_rtx, false));
4316 emit_move_insn (XEXP (to_rtx, 1),
4317 read_complex_part (from_rtx, true));
4318 }
4319 else
4320 {
4321 rtx temp = assign_stack_temp (GET_MODE (to_rtx),
4322 GET_MODE_SIZE (GET_MODE (to_rtx)),
4323 0);
4324 write_complex_part (temp, XEXP (to_rtx, 0), false);
4325 write_complex_part (temp, XEXP (to_rtx, 1), true);
4326 result = store_field (temp, bitsize, bitpos, mode1, from,
4327 TREE_TYPE (tem), get_alias_set (to),
4328 nontemporal);
4329 emit_move_insn (XEXP (to_rtx, 0), read_complex_part (temp, false));
4330 emit_move_insn (XEXP (to_rtx, 1), read_complex_part (temp, true));
4331 }
4332 }
4333 else
4334 {
4335 if (MEM_P (to_rtx))
4336 {
4337 /* If the field is at offset zero, we could have been given the
4338 DECL_RTX of the parent struct. Don't munge it. */
4339 to_rtx = shallow_copy_rtx (to_rtx);
4340
4341 set_mem_attributes_minus_bitpos (to_rtx, to, 0, bitpos);
4342
4343 /* Deal with volatile and readonly fields. The former is only
4344 done for MEM. Also set MEM_KEEP_ALIAS_SET_P if needed. */
4345 if (volatilep)
4346 MEM_VOLATILE_P (to_rtx) = 1;
4347 if (component_uses_parent_alias_set (to))
4348 MEM_KEEP_ALIAS_SET_P (to_rtx) = 1;
4349 }
4350
4351 if (optimize_bitfield_assignment_op (bitsize, bitpos, mode1,
4352 to_rtx, to, from))
4353 result = NULL;
4354 else
4355 result = store_field (to_rtx, bitsize, bitpos, mode1, from,
4356 TREE_TYPE (tem), get_alias_set (to),
4357 nontemporal);
4358 }
4359
4360 if (result)
4361 preserve_temp_slots (result);
4362 free_temp_slots ();
4363 pop_temp_slots ();
4364 return;
4365 }
4366
4367 /* If the rhs is a function call and its value is not an aggregate,
4368 call the function before we start to compute the lhs.
4369 This is needed for correct code for cases such as
4370 val = setjmp (buf) on machines where reference to val
4371 requires loading up part of an address in a separate insn.
4372
4373 Don't do this if TO is a VAR_DECL or PARM_DECL whose DECL_RTL is REG
4374 since it might be a promoted variable where the zero- or sign- extension
4375 needs to be done. Handling this in the normal way is safe because no
4376 computation is done before the call. The same is true for SSA names. */
4377 if (TREE_CODE (from) == CALL_EXPR && ! aggregate_value_p (from, from)
4378 && COMPLETE_TYPE_P (TREE_TYPE (from))
4379 && TREE_CODE (TYPE_SIZE (TREE_TYPE (from))) == INTEGER_CST
4380 && ! (((TREE_CODE (to) == VAR_DECL || TREE_CODE (to) == PARM_DECL)
4381 && REG_P (DECL_RTL (to)))
4382 || TREE_CODE (to) == SSA_NAME))
4383 {
4384 rtx value;
4385
4386 push_temp_slots ();
4387 value = expand_normal (from);
4388 if (to_rtx == 0)
4389 to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
4390
4391 /* Handle calls that return values in multiple non-contiguous locations.
4392 The Irix 6 ABI has examples of this. */
4393 if (GET_CODE (to_rtx) == PARALLEL)
4394 emit_group_load (to_rtx, value, TREE_TYPE (from),
4395 int_size_in_bytes (TREE_TYPE (from)));
4396 else if (GET_MODE (to_rtx) == BLKmode)
4397 emit_block_move (to_rtx, value, expr_size (from), BLOCK_OP_NORMAL);
4398 else
4399 {
4400 if (POINTER_TYPE_P (TREE_TYPE (to)))
4401 value = convert_memory_address_addr_space
4402 (GET_MODE (to_rtx), value,
4403 TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (to))));
4404
4405 emit_move_insn (to_rtx, value);
4406 }
4407 preserve_temp_slots (to_rtx);
4408 free_temp_slots ();
4409 pop_temp_slots ();
4410 return;
4411 }
4412
4413 /* Ordinary treatment. Expand TO to get a REG or MEM rtx.
4414 Don't re-expand if it was expanded already (in COMPONENT_REF case). */
4415
4416 if (to_rtx == 0)
4417 to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
4418
4419 /* Don't move directly into a return register. */
4420 if (TREE_CODE (to) == RESULT_DECL
4421 && (REG_P (to_rtx) || GET_CODE (to_rtx) == PARALLEL))
4422 {
4423 rtx temp;
4424
4425 push_temp_slots ();
4426 temp = expand_expr (from, NULL_RTX, GET_MODE (to_rtx), EXPAND_NORMAL);
4427
4428 if (GET_CODE (to_rtx) == PARALLEL)
4429 emit_group_load (to_rtx, temp, TREE_TYPE (from),
4430 int_size_in_bytes (TREE_TYPE (from)));
4431 else
4432 emit_move_insn (to_rtx, temp);
4433
4434 preserve_temp_slots (to_rtx);
4435 free_temp_slots ();
4436 pop_temp_slots ();
4437 return;
4438 }
4439
4440 /* In case we are returning the contents of an object which overlaps
4441 the place the value is being stored, use a safe function when copying
4442 a value through a pointer into a structure value return block. */
4443 if (TREE_CODE (to) == RESULT_DECL
4444 && TREE_CODE (from) == INDIRECT_REF
4445 && ADDR_SPACE_GENERIC_P
4446 (TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (from, 0)))))
4447 && refs_may_alias_p (to, from)
4448 && cfun->returns_struct
4449 && !cfun->returns_pcc_struct)
4450 {
4451 rtx from_rtx, size;
4452
4453 push_temp_slots ();
4454 size = expr_size (from);
4455 from_rtx = expand_normal (from);
4456
4457 emit_library_call (memmove_libfunc, LCT_NORMAL,
4458 VOIDmode, 3, XEXP (to_rtx, 0), Pmode,
4459 XEXP (from_rtx, 0), Pmode,
4460 convert_to_mode (TYPE_MODE (sizetype),
4461 size, TYPE_UNSIGNED (sizetype)),
4462 TYPE_MODE (sizetype));
4463
4464 preserve_temp_slots (to_rtx);
4465 free_temp_slots ();
4466 pop_temp_slots ();
4467 return;
4468 }
4469
4470 /* Compute FROM and store the value in the rtx we got. */
4471
4472 push_temp_slots ();
4473 result = store_expr (from, to_rtx, 0, nontemporal);
4474 preserve_temp_slots (result);
4475 free_temp_slots ();
4476 pop_temp_slots ();
4477 return;
4478 }
4479
4480 /* Emits nontemporal store insn that moves FROM to TO. Returns true if this
4481 succeeded, false otherwise. */
4482
4483 bool
4484 emit_storent_insn (rtx to, rtx from)
4485 {
4486 struct expand_operand ops[2];
4487 enum machine_mode mode = GET_MODE (to);
4488 enum insn_code code = optab_handler (storent_optab, mode);
4489
4490 if (code == CODE_FOR_nothing)
4491 return false;
4492
4493 create_fixed_operand (&ops[0], to);
4494 create_input_operand (&ops[1], from, mode);
4495 return maybe_expand_insn (code, 2, ops);
4496 }
4497
4498 /* Generate code for computing expression EXP,
4499 and storing the value into TARGET.
4500
4501 If the mode is BLKmode then we may return TARGET itself.
4502 It turns out that in BLKmode it doesn't cause a problem.
4503 because C has no operators that could combine two different
4504 assignments into the same BLKmode object with different values
4505 with no sequence point. Will other languages need this to
4506 be more thorough?
4507
4508 If CALL_PARAM_P is nonzero, this is a store into a call param on the
4509 stack, and block moves may need to be treated specially.
4510
4511 If NONTEMPORAL is true, try using a nontemporal store instruction. */
4512
4513 rtx
4514 store_expr (tree exp, rtx target, int call_param_p, bool nontemporal)
4515 {
4516 rtx temp;
4517 rtx alt_rtl = NULL_RTX;
4518 location_t loc = EXPR_LOCATION (exp);
4519
4520 if (VOID_TYPE_P (TREE_TYPE (exp)))
4521 {
4522 /* C++ can generate ?: expressions with a throw expression in one
4523 branch and an rvalue in the other. Here, we resolve attempts to
4524 store the throw expression's nonexistent result. */
4525 gcc_assert (!call_param_p);
4526 expand_expr (exp, const0_rtx, VOIDmode, EXPAND_NORMAL);
4527 return NULL_RTX;
4528 }
4529 if (TREE_CODE (exp) == COMPOUND_EXPR)
4530 {
4531 /* Perform first part of compound expression, then assign from second
4532 part. */
4533 expand_expr (TREE_OPERAND (exp, 0), const0_rtx, VOIDmode,
4534 call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL);
4535 return store_expr (TREE_OPERAND (exp, 1), target, call_param_p,
4536 nontemporal);
4537 }
4538 else if (TREE_CODE (exp) == COND_EXPR && GET_MODE (target) == BLKmode)
4539 {
4540 /* For conditional expression, get safe form of the target. Then
4541 test the condition, doing the appropriate assignment on either
4542 side. This avoids the creation of unnecessary temporaries.
4543 For non-BLKmode, it is more efficient not to do this. */
4544
4545 rtx lab1 = gen_label_rtx (), lab2 = gen_label_rtx ();
4546
4547 do_pending_stack_adjust ();
4548 NO_DEFER_POP;
4549 jumpifnot (TREE_OPERAND (exp, 0), lab1, -1);
4550 store_expr (TREE_OPERAND (exp, 1), target, call_param_p,
4551 nontemporal);
4552 emit_jump_insn (gen_jump (lab2));
4553 emit_barrier ();
4554 emit_label (lab1);
4555 store_expr (TREE_OPERAND (exp, 2), target, call_param_p,
4556 nontemporal);
4557 emit_label (lab2);
4558 OK_DEFER_POP;
4559
4560 return NULL_RTX;
4561 }
4562 else if (GET_CODE (target) == SUBREG && SUBREG_PROMOTED_VAR_P (target))
4563 /* If this is a scalar in a register that is stored in a wider mode
4564 than the declared mode, compute the result into its declared mode
4565 and then convert to the wider mode. Our value is the computed
4566 expression. */
4567 {
4568 rtx inner_target = 0;
4569
4570 /* We can do the conversion inside EXP, which will often result
4571 in some optimizations. Do the conversion in two steps: first
4572 change the signedness, if needed, then the extend. But don't
4573 do this if the type of EXP is a subtype of something else
4574 since then the conversion might involve more than just
4575 converting modes. */
4576 if (INTEGRAL_TYPE_P (TREE_TYPE (exp))
4577 && TREE_TYPE (TREE_TYPE (exp)) == 0
4578 && GET_MODE_PRECISION (GET_MODE (target))
4579 == TYPE_PRECISION (TREE_TYPE (exp)))
4580 {
4581 if (TYPE_UNSIGNED (TREE_TYPE (exp))
4582 != SUBREG_PROMOTED_UNSIGNED_P (target))
4583 {
4584 /* Some types, e.g. Fortran's logical*4, won't have a signed
4585 version, so use the mode instead. */
4586 tree ntype
4587 = (signed_or_unsigned_type_for
4588 (SUBREG_PROMOTED_UNSIGNED_P (target), TREE_TYPE (exp)));
4589 if (ntype == NULL)
4590 ntype = lang_hooks.types.type_for_mode
4591 (TYPE_MODE (TREE_TYPE (exp)),
4592 SUBREG_PROMOTED_UNSIGNED_P (target));
4593
4594 exp = fold_convert_loc (loc, ntype, exp);
4595 }
4596
4597 exp = fold_convert_loc (loc, lang_hooks.types.type_for_mode
4598 (GET_MODE (SUBREG_REG (target)),
4599 SUBREG_PROMOTED_UNSIGNED_P (target)),
4600 exp);
4601
4602 inner_target = SUBREG_REG (target);
4603 }
4604
4605 temp = expand_expr (exp, inner_target, VOIDmode,
4606 call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL);
4607
4608 /* If TEMP is a VOIDmode constant, use convert_modes to make
4609 sure that we properly convert it. */
4610 if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode)
4611 {
4612 temp = convert_modes (GET_MODE (target), TYPE_MODE (TREE_TYPE (exp)),
4613 temp, SUBREG_PROMOTED_UNSIGNED_P (target));
4614 temp = convert_modes (GET_MODE (SUBREG_REG (target)),
4615 GET_MODE (target), temp,
4616 SUBREG_PROMOTED_UNSIGNED_P (target));
4617 }
4618
4619 convert_move (SUBREG_REG (target), temp,
4620 SUBREG_PROMOTED_UNSIGNED_P (target));
4621
4622 return NULL_RTX;
4623 }
4624 else if ((TREE_CODE (exp) == STRING_CST
4625 || (TREE_CODE (exp) == MEM_REF
4626 && TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR
4627 && TREE_CODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0))
4628 == STRING_CST
4629 && integer_zerop (TREE_OPERAND (exp, 1))))
4630 && !nontemporal && !call_param_p
4631 && MEM_P (target))
4632 {
4633 /* Optimize initialization of an array with a STRING_CST. */
4634 HOST_WIDE_INT exp_len, str_copy_len;
4635 rtx dest_mem;
4636 tree str = TREE_CODE (exp) == STRING_CST
4637 ? exp : TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
4638
4639 exp_len = int_expr_size (exp);
4640 if (exp_len <= 0)
4641 goto normal_expr;
4642
4643 if (TREE_STRING_LENGTH (str) <= 0)
4644 goto normal_expr;
4645
4646 str_copy_len = strlen (TREE_STRING_POINTER (str));
4647 if (str_copy_len < TREE_STRING_LENGTH (str) - 1)
4648 goto normal_expr;
4649
4650 str_copy_len = TREE_STRING_LENGTH (str);
4651 if ((STORE_MAX_PIECES & (STORE_MAX_PIECES - 1)) == 0
4652 && TREE_STRING_POINTER (str)[TREE_STRING_LENGTH (str) - 1] == '\0')
4653 {
4654 str_copy_len += STORE_MAX_PIECES - 1;
4655 str_copy_len &= ~(STORE_MAX_PIECES - 1);
4656 }
4657 str_copy_len = MIN (str_copy_len, exp_len);
4658 if (!can_store_by_pieces (str_copy_len, builtin_strncpy_read_str,
4659 CONST_CAST (char *, TREE_STRING_POINTER (str)),
4660 MEM_ALIGN (target), false))
4661 goto normal_expr;
4662
4663 dest_mem = target;
4664
4665 dest_mem = store_by_pieces (dest_mem,
4666 str_copy_len, builtin_strncpy_read_str,
4667 CONST_CAST (char *,
4668 TREE_STRING_POINTER (str)),
4669 MEM_ALIGN (target), false,
4670 exp_len > str_copy_len ? 1 : 0);
4671 if (exp_len > str_copy_len)
4672 clear_storage (adjust_address (dest_mem, BLKmode, 0),
4673 GEN_INT (exp_len - str_copy_len),
4674 BLOCK_OP_NORMAL);
4675 return NULL_RTX;
4676 }
4677 else
4678 {
4679 rtx tmp_target;
4680
4681 normal_expr:
4682 /* If we want to use a nontemporal store, force the value to
4683 register first. */
4684 tmp_target = nontemporal ? NULL_RTX : target;
4685 temp = expand_expr_real (exp, tmp_target, GET_MODE (target),
4686 (call_param_p
4687 ? EXPAND_STACK_PARM : EXPAND_NORMAL),
4688 &alt_rtl);
4689 }
4690
4691 /* If TEMP is a VOIDmode constant and the mode of the type of EXP is not
4692 the same as that of TARGET, adjust the constant. This is needed, for
4693 example, in case it is a CONST_DOUBLE and we want only a word-sized
4694 value. */
4695 if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode
4696 && TREE_CODE (exp) != ERROR_MARK
4697 && GET_MODE (target) != TYPE_MODE (TREE_TYPE (exp)))
4698 temp = convert_modes (GET_MODE (target), TYPE_MODE (TREE_TYPE (exp)),
4699 temp, TYPE_UNSIGNED (TREE_TYPE (exp)));
4700
4701 /* If value was not generated in the target, store it there.
4702 Convert the value to TARGET's type first if necessary and emit the
4703 pending incrementations that have been queued when expanding EXP.
4704 Note that we cannot emit the whole queue blindly because this will
4705 effectively disable the POST_INC optimization later.
4706
4707 If TEMP and TARGET compare equal according to rtx_equal_p, but
4708 one or both of them are volatile memory refs, we have to distinguish
4709 two cases:
4710 - expand_expr has used TARGET. In this case, we must not generate
4711 another copy. This can be detected by TARGET being equal according
4712 to == .
4713 - expand_expr has not used TARGET - that means that the source just
4714 happens to have the same RTX form. Since temp will have been created
4715 by expand_expr, it will compare unequal according to == .
4716 We must generate a copy in this case, to reach the correct number
4717 of volatile memory references. */
4718
4719 if ((! rtx_equal_p (temp, target)
4720 || (temp != target && (side_effects_p (temp)
4721 || side_effects_p (target))))
4722 && TREE_CODE (exp) != ERROR_MARK
4723 /* If store_expr stores a DECL whose DECL_RTL(exp) == TARGET,
4724 but TARGET is not valid memory reference, TEMP will differ
4725 from TARGET although it is really the same location. */
4726 && !(alt_rtl
4727 && rtx_equal_p (alt_rtl, target)
4728 && !side_effects_p (alt_rtl)
4729 && !side_effects_p (target))
4730 /* If there's nothing to copy, don't bother. Don't call
4731 expr_size unless necessary, because some front-ends (C++)
4732 expr_size-hook must not be given objects that are not
4733 supposed to be bit-copied or bit-initialized. */
4734 && expr_size (exp) != const0_rtx)
4735 {
4736 if (GET_MODE (temp) != GET_MODE (target)
4737 && GET_MODE (temp) != VOIDmode)
4738 {
4739 int unsignedp = TYPE_UNSIGNED (TREE_TYPE (exp));
4740 if (GET_MODE (target) == BLKmode
4741 && GET_MODE (temp) == BLKmode)
4742 emit_block_move (target, temp, expr_size (exp),
4743 (call_param_p
4744 ? BLOCK_OP_CALL_PARM
4745 : BLOCK_OP_NORMAL));
4746 else if (GET_MODE (target) == BLKmode)
4747 store_bit_field (target, INTVAL (expr_size (exp)) * BITS_PER_UNIT,
4748 0, GET_MODE (temp), temp);
4749 else
4750 convert_move (target, temp, unsignedp);
4751 }
4752
4753 else if (GET_MODE (temp) == BLKmode && TREE_CODE (exp) == STRING_CST)
4754 {
4755 /* Handle copying a string constant into an array. The string
4756 constant may be shorter than the array. So copy just the string's
4757 actual length, and clear the rest. First get the size of the data
4758 type of the string, which is actually the size of the target. */
4759 rtx size = expr_size (exp);
4760
4761 if (CONST_INT_P (size)
4762 && INTVAL (size) < TREE_STRING_LENGTH (exp))
4763 emit_block_move (target, temp, size,
4764 (call_param_p
4765 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
4766 else
4767 {
4768 enum machine_mode pointer_mode
4769 = targetm.addr_space.pointer_mode (MEM_ADDR_SPACE (target));
4770 enum machine_mode address_mode
4771 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (target));
4772
4773 /* Compute the size of the data to copy from the string. */
4774 tree copy_size
4775 = size_binop_loc (loc, MIN_EXPR,
4776 make_tree (sizetype, size),
4777 size_int (TREE_STRING_LENGTH (exp)));
4778 rtx copy_size_rtx
4779 = expand_expr (copy_size, NULL_RTX, VOIDmode,
4780 (call_param_p
4781 ? EXPAND_STACK_PARM : EXPAND_NORMAL));
4782 rtx label = 0;
4783
4784 /* Copy that much. */
4785 copy_size_rtx = convert_to_mode (pointer_mode, copy_size_rtx,
4786 TYPE_UNSIGNED (sizetype));
4787 emit_block_move (target, temp, copy_size_rtx,
4788 (call_param_p
4789 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
4790
4791 /* Figure out how much is left in TARGET that we have to clear.
4792 Do all calculations in pointer_mode. */
4793 if (CONST_INT_P (copy_size_rtx))
4794 {
4795 size = plus_constant (size, -INTVAL (copy_size_rtx));
4796 target = adjust_address (target, BLKmode,
4797 INTVAL (copy_size_rtx));
4798 }
4799 else
4800 {
4801 size = expand_binop (TYPE_MODE (sizetype), sub_optab, size,
4802 copy_size_rtx, NULL_RTX, 0,
4803 OPTAB_LIB_WIDEN);
4804
4805 if (GET_MODE (copy_size_rtx) != address_mode)
4806 copy_size_rtx = convert_to_mode (address_mode,
4807 copy_size_rtx,
4808 TYPE_UNSIGNED (sizetype));
4809
4810 target = offset_address (target, copy_size_rtx,
4811 highest_pow2_factor (copy_size));
4812 label = gen_label_rtx ();
4813 emit_cmp_and_jump_insns (size, const0_rtx, LT, NULL_RTX,
4814 GET_MODE (size), 0, label);
4815 }
4816
4817 if (size != const0_rtx)
4818 clear_storage (target, size, BLOCK_OP_NORMAL);
4819
4820 if (label)
4821 emit_label (label);
4822 }
4823 }
4824 /* Handle calls that return values in multiple non-contiguous locations.
4825 The Irix 6 ABI has examples of this. */
4826 else if (GET_CODE (target) == PARALLEL)
4827 emit_group_load (target, temp, TREE_TYPE (exp),
4828 int_size_in_bytes (TREE_TYPE (exp)));
4829 else if (GET_MODE (temp) == BLKmode)
4830 emit_block_move (target, temp, expr_size (exp),
4831 (call_param_p
4832 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
4833 else if (nontemporal
4834 && emit_storent_insn (target, temp))
4835 /* If we managed to emit a nontemporal store, there is nothing else to
4836 do. */
4837 ;
4838 else
4839 {
4840 temp = force_operand (temp, target);
4841 if (temp != target)
4842 emit_move_insn (target, temp);
4843 }
4844 }
4845
4846 return NULL_RTX;
4847 }
4848 \f
4849 /* Return true if field F of structure TYPE is a flexible array. */
4850
4851 static bool
4852 flexible_array_member_p (const_tree f, const_tree type)
4853 {
4854 const_tree tf;
4855
4856 tf = TREE_TYPE (f);
4857 return (DECL_CHAIN (f) == NULL
4858 && TREE_CODE (tf) == ARRAY_TYPE
4859 && TYPE_DOMAIN (tf)
4860 && TYPE_MIN_VALUE (TYPE_DOMAIN (tf))
4861 && integer_zerop (TYPE_MIN_VALUE (TYPE_DOMAIN (tf)))
4862 && !TYPE_MAX_VALUE (TYPE_DOMAIN (tf))
4863 && int_size_in_bytes (type) >= 0);
4864 }
4865
4866 /* If FOR_CTOR_P, return the number of top-level elements that a constructor
4867 must have in order for it to completely initialize a value of type TYPE.
4868 Return -1 if the number isn't known.
4869
4870 If !FOR_CTOR_P, return an estimate of the number of scalars in TYPE. */
4871
4872 static HOST_WIDE_INT
4873 count_type_elements (const_tree type, bool for_ctor_p)
4874 {
4875 switch (TREE_CODE (type))
4876 {
4877 case ARRAY_TYPE:
4878 {
4879 tree nelts;
4880
4881 nelts = array_type_nelts (type);
4882 if (nelts && host_integerp (nelts, 1))
4883 {
4884 unsigned HOST_WIDE_INT n;
4885
4886 n = tree_low_cst (nelts, 1) + 1;
4887 if (n == 0 || for_ctor_p)
4888 return n;
4889 else
4890 return n * count_type_elements (TREE_TYPE (type), false);
4891 }
4892 return for_ctor_p ? -1 : 1;
4893 }
4894
4895 case RECORD_TYPE:
4896 {
4897 unsigned HOST_WIDE_INT n;
4898 tree f;
4899
4900 n = 0;
4901 for (f = TYPE_FIELDS (type); f ; f = DECL_CHAIN (f))
4902 if (TREE_CODE (f) == FIELD_DECL)
4903 {
4904 if (!for_ctor_p)
4905 n += count_type_elements (TREE_TYPE (f), false);
4906 else if (!flexible_array_member_p (f, type))
4907 /* Don't count flexible arrays, which are not supposed
4908 to be initialized. */
4909 n += 1;
4910 }
4911
4912 return n;
4913 }
4914
4915 case UNION_TYPE:
4916 case QUAL_UNION_TYPE:
4917 {
4918 tree f;
4919 HOST_WIDE_INT n, m;
4920
4921 gcc_assert (!for_ctor_p);
4922 /* Estimate the number of scalars in each field and pick the
4923 maximum. Other estimates would do instead; the idea is simply
4924 to make sure that the estimate is not sensitive to the ordering
4925 of the fields. */
4926 n = 1;
4927 for (f = TYPE_FIELDS (type); f ; f = DECL_CHAIN (f))
4928 if (TREE_CODE (f) == FIELD_DECL)
4929 {
4930 m = count_type_elements (TREE_TYPE (f), false);
4931 /* If the field doesn't span the whole union, add an extra
4932 scalar for the rest. */
4933 if (simple_cst_equal (TYPE_SIZE (TREE_TYPE (f)),
4934 TYPE_SIZE (type)) != 1)
4935 m++;
4936 if (n < m)
4937 n = m;
4938 }
4939 return n;
4940 }
4941
4942 case COMPLEX_TYPE:
4943 return 2;
4944
4945 case VECTOR_TYPE:
4946 return TYPE_VECTOR_SUBPARTS (type);
4947
4948 case INTEGER_TYPE:
4949 case REAL_TYPE:
4950 case FIXED_POINT_TYPE:
4951 case ENUMERAL_TYPE:
4952 case BOOLEAN_TYPE:
4953 case POINTER_TYPE:
4954 case OFFSET_TYPE:
4955 case REFERENCE_TYPE:
4956 return 1;
4957
4958 case ERROR_MARK:
4959 return 0;
4960
4961 case VOID_TYPE:
4962 case METHOD_TYPE:
4963 case FUNCTION_TYPE:
4964 case LANG_TYPE:
4965 default:
4966 gcc_unreachable ();
4967 }
4968 }
4969
4970 /* Helper for categorize_ctor_elements. Identical interface. */
4971
4972 static bool
4973 categorize_ctor_elements_1 (const_tree ctor, HOST_WIDE_INT *p_nz_elts,
4974 HOST_WIDE_INT *p_init_elts, bool *p_complete)
4975 {
4976 unsigned HOST_WIDE_INT idx;
4977 HOST_WIDE_INT nz_elts, init_elts, num_fields;
4978 tree value, purpose, elt_type;
4979
4980 /* Whether CTOR is a valid constant initializer, in accordance with what
4981 initializer_constant_valid_p does. If inferred from the constructor
4982 elements, true until proven otherwise. */
4983 bool const_from_elts_p = constructor_static_from_elts_p (ctor);
4984 bool const_p = const_from_elts_p ? true : TREE_STATIC (ctor);
4985
4986 nz_elts = 0;
4987 init_elts = 0;
4988 num_fields = 0;
4989 elt_type = NULL_TREE;
4990
4991 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (ctor), idx, purpose, value)
4992 {
4993 HOST_WIDE_INT mult = 1;
4994
4995 if (TREE_CODE (purpose) == RANGE_EXPR)
4996 {
4997 tree lo_index = TREE_OPERAND (purpose, 0);
4998 tree hi_index = TREE_OPERAND (purpose, 1);
4999
5000 if (host_integerp (lo_index, 1) && host_integerp (hi_index, 1))
5001 mult = (tree_low_cst (hi_index, 1)
5002 - tree_low_cst (lo_index, 1) + 1);
5003 }
5004 num_fields += mult;
5005 elt_type = TREE_TYPE (value);
5006
5007 switch (TREE_CODE (value))
5008 {
5009 case CONSTRUCTOR:
5010 {
5011 HOST_WIDE_INT nz = 0, ic = 0;
5012
5013 bool const_elt_p = categorize_ctor_elements_1 (value, &nz, &ic,
5014 p_complete);
5015
5016 nz_elts += mult * nz;
5017 init_elts += mult * ic;
5018
5019 if (const_from_elts_p && const_p)
5020 const_p = const_elt_p;
5021 }
5022 break;
5023
5024 case INTEGER_CST:
5025 case REAL_CST:
5026 case FIXED_CST:
5027 if (!initializer_zerop (value))
5028 nz_elts += mult;
5029 init_elts += mult;
5030 break;
5031
5032 case STRING_CST:
5033 nz_elts += mult * TREE_STRING_LENGTH (value);
5034 init_elts += mult * TREE_STRING_LENGTH (value);
5035 break;
5036
5037 case COMPLEX_CST:
5038 if (!initializer_zerop (TREE_REALPART (value)))
5039 nz_elts += mult;
5040 if (!initializer_zerop (TREE_IMAGPART (value)))
5041 nz_elts += mult;
5042 init_elts += mult;
5043 break;
5044
5045 case VECTOR_CST:
5046 {
5047 tree v;
5048 for (v = TREE_VECTOR_CST_ELTS (value); v; v = TREE_CHAIN (v))
5049 {
5050 if (!initializer_zerop (TREE_VALUE (v)))
5051 nz_elts += mult;
5052 init_elts += mult;
5053 }
5054 }
5055 break;
5056
5057 default:
5058 {
5059 HOST_WIDE_INT tc = count_type_elements (elt_type, false);
5060 nz_elts += mult * tc;
5061 init_elts += mult * tc;
5062
5063 if (const_from_elts_p && const_p)
5064 const_p = initializer_constant_valid_p (value, elt_type)
5065 != NULL_TREE;
5066 }
5067 break;
5068 }
5069 }
5070
5071 if (*p_complete && !complete_ctor_at_level_p (TREE_TYPE (ctor),
5072 num_fields, elt_type))
5073 *p_complete = false;
5074
5075 *p_nz_elts += nz_elts;
5076 *p_init_elts += init_elts;
5077
5078 return const_p;
5079 }
5080
5081 /* Examine CTOR to discover:
5082 * how many scalar fields are set to nonzero values,
5083 and place it in *P_NZ_ELTS;
5084 * how many scalar fields in total are in CTOR,
5085 and place it in *P_ELT_COUNT.
5086 * whether the constructor is complete -- in the sense that every
5087 meaningful byte is explicitly given a value --
5088 and place it in *P_COMPLETE.
5089
5090 Return whether or not CTOR is a valid static constant initializer, the same
5091 as "initializer_constant_valid_p (CTOR, TREE_TYPE (CTOR)) != 0". */
5092
5093 bool
5094 categorize_ctor_elements (const_tree ctor, HOST_WIDE_INT *p_nz_elts,
5095 HOST_WIDE_INT *p_init_elts, bool *p_complete)
5096 {
5097 *p_nz_elts = 0;
5098 *p_init_elts = 0;
5099 *p_complete = true;
5100
5101 return categorize_ctor_elements_1 (ctor, p_nz_elts, p_init_elts, p_complete);
5102 }
5103
5104 /* TYPE is initialized by a constructor with NUM_ELTS elements, the last
5105 of which had type LAST_TYPE. Each element was itself a complete
5106 initializer, in the sense that every meaningful byte was explicitly
5107 given a value. Return true if the same is true for the constructor
5108 as a whole. */
5109
5110 bool
5111 complete_ctor_at_level_p (const_tree type, HOST_WIDE_INT num_elts,
5112 const_tree last_type)
5113 {
5114 if (TREE_CODE (type) == UNION_TYPE
5115 || TREE_CODE (type) == QUAL_UNION_TYPE)
5116 {
5117 if (num_elts == 0)
5118 return false;
5119
5120 gcc_assert (num_elts == 1 && last_type);
5121
5122 /* ??? We could look at each element of the union, and find the
5123 largest element. Which would avoid comparing the size of the
5124 initialized element against any tail padding in the union.
5125 Doesn't seem worth the effort... */
5126 return simple_cst_equal (TYPE_SIZE (type), TYPE_SIZE (last_type)) == 1;
5127 }
5128
5129 return count_type_elements (type, true) == num_elts;
5130 }
5131
5132 /* Return 1 if EXP contains mostly (3/4) zeros. */
5133
5134 static int
5135 mostly_zeros_p (const_tree exp)
5136 {
5137 if (TREE_CODE (exp) == CONSTRUCTOR)
5138 {
5139 HOST_WIDE_INT nz_elts, init_elts;
5140 bool complete_p;
5141
5142 categorize_ctor_elements (exp, &nz_elts, &init_elts, &complete_p);
5143 return !complete_p || nz_elts < init_elts / 4;
5144 }
5145
5146 return initializer_zerop (exp);
5147 }
5148
5149 /* Return 1 if EXP contains all zeros. */
5150
5151 static int
5152 all_zeros_p (const_tree exp)
5153 {
5154 if (TREE_CODE (exp) == CONSTRUCTOR)
5155 {
5156 HOST_WIDE_INT nz_elts, init_elts;
5157 bool complete_p;
5158
5159 categorize_ctor_elements (exp, &nz_elts, &init_elts, &complete_p);
5160 return nz_elts == 0;
5161 }
5162
5163 return initializer_zerop (exp);
5164 }
5165 \f
5166 /* Helper function for store_constructor.
5167 TARGET, BITSIZE, BITPOS, MODE, EXP are as for store_field.
5168 TYPE is the type of the CONSTRUCTOR, not the element type.
5169 CLEARED is as for store_constructor.
5170 ALIAS_SET is the alias set to use for any stores.
5171
5172 This provides a recursive shortcut back to store_constructor when it isn't
5173 necessary to go through store_field. This is so that we can pass through
5174 the cleared field to let store_constructor know that we may not have to
5175 clear a substructure if the outer structure has already been cleared. */
5176
5177 static void
5178 store_constructor_field (rtx target, unsigned HOST_WIDE_INT bitsize,
5179 HOST_WIDE_INT bitpos, enum machine_mode mode,
5180 tree exp, tree type, int cleared,
5181 alias_set_type alias_set)
5182 {
5183 if (TREE_CODE (exp) == CONSTRUCTOR
5184 /* We can only call store_constructor recursively if the size and
5185 bit position are on a byte boundary. */
5186 && bitpos % BITS_PER_UNIT == 0
5187 && (bitsize > 0 && bitsize % BITS_PER_UNIT == 0)
5188 /* If we have a nonzero bitpos for a register target, then we just
5189 let store_field do the bitfield handling. This is unlikely to
5190 generate unnecessary clear instructions anyways. */
5191 && (bitpos == 0 || MEM_P (target)))
5192 {
5193 if (MEM_P (target))
5194 target
5195 = adjust_address (target,
5196 GET_MODE (target) == BLKmode
5197 || 0 != (bitpos
5198 % GET_MODE_ALIGNMENT (GET_MODE (target)))
5199 ? BLKmode : VOIDmode, bitpos / BITS_PER_UNIT);
5200
5201
5202 /* Update the alias set, if required. */
5203 if (MEM_P (target) && ! MEM_KEEP_ALIAS_SET_P (target)
5204 && MEM_ALIAS_SET (target) != 0)
5205 {
5206 target = copy_rtx (target);
5207 set_mem_alias_set (target, alias_set);
5208 }
5209
5210 store_constructor (exp, target, cleared, bitsize / BITS_PER_UNIT);
5211 }
5212 else
5213 store_field (target, bitsize, bitpos, mode, exp, type, alias_set, false);
5214 }
5215
5216 /* Store the value of constructor EXP into the rtx TARGET.
5217 TARGET is either a REG or a MEM; we know it cannot conflict, since
5218 safe_from_p has been called.
5219 CLEARED is true if TARGET is known to have been zero'd.
5220 SIZE is the number of bytes of TARGET we are allowed to modify: this
5221 may not be the same as the size of EXP if we are assigning to a field
5222 which has been packed to exclude padding bits. */
5223
5224 static void
5225 store_constructor (tree exp, rtx target, int cleared, HOST_WIDE_INT size)
5226 {
5227 tree type = TREE_TYPE (exp);
5228 #ifdef WORD_REGISTER_OPERATIONS
5229 HOST_WIDE_INT exp_size = int_size_in_bytes (type);
5230 #endif
5231
5232 switch (TREE_CODE (type))
5233 {
5234 case RECORD_TYPE:
5235 case UNION_TYPE:
5236 case QUAL_UNION_TYPE:
5237 {
5238 unsigned HOST_WIDE_INT idx;
5239 tree field, value;
5240
5241 /* If size is zero or the target is already cleared, do nothing. */
5242 if (size == 0 || cleared)
5243 cleared = 1;
5244 /* We either clear the aggregate or indicate the value is dead. */
5245 else if ((TREE_CODE (type) == UNION_TYPE
5246 || TREE_CODE (type) == QUAL_UNION_TYPE)
5247 && ! CONSTRUCTOR_ELTS (exp))
5248 /* If the constructor is empty, clear the union. */
5249 {
5250 clear_storage (target, expr_size (exp), BLOCK_OP_NORMAL);
5251 cleared = 1;
5252 }
5253
5254 /* If we are building a static constructor into a register,
5255 set the initial value as zero so we can fold the value into
5256 a constant. But if more than one register is involved,
5257 this probably loses. */
5258 else if (REG_P (target) && TREE_STATIC (exp)
5259 && GET_MODE_SIZE (GET_MODE (target)) <= UNITS_PER_WORD)
5260 {
5261 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
5262 cleared = 1;
5263 }
5264
5265 /* If the constructor has fewer fields than the structure or
5266 if we are initializing the structure to mostly zeros, clear
5267 the whole structure first. Don't do this if TARGET is a
5268 register whose mode size isn't equal to SIZE since
5269 clear_storage can't handle this case. */
5270 else if (size > 0
5271 && (((int)VEC_length (constructor_elt, CONSTRUCTOR_ELTS (exp))
5272 != fields_length (type))
5273 || mostly_zeros_p (exp))
5274 && (!REG_P (target)
5275 || ((HOST_WIDE_INT) GET_MODE_SIZE (GET_MODE (target))
5276 == size)))
5277 {
5278 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
5279 cleared = 1;
5280 }
5281
5282 if (REG_P (target) && !cleared)
5283 emit_clobber (target);
5284
5285 /* Store each element of the constructor into the
5286 corresponding field of TARGET. */
5287 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), idx, field, value)
5288 {
5289 enum machine_mode mode;
5290 HOST_WIDE_INT bitsize;
5291 HOST_WIDE_INT bitpos = 0;
5292 tree offset;
5293 rtx to_rtx = target;
5294
5295 /* Just ignore missing fields. We cleared the whole
5296 structure, above, if any fields are missing. */
5297 if (field == 0)
5298 continue;
5299
5300 if (cleared && initializer_zerop (value))
5301 continue;
5302
5303 if (host_integerp (DECL_SIZE (field), 1))
5304 bitsize = tree_low_cst (DECL_SIZE (field), 1);
5305 else
5306 bitsize = -1;
5307
5308 mode = DECL_MODE (field);
5309 if (DECL_BIT_FIELD (field))
5310 mode = VOIDmode;
5311
5312 offset = DECL_FIELD_OFFSET (field);
5313 if (host_integerp (offset, 0)
5314 && host_integerp (bit_position (field), 0))
5315 {
5316 bitpos = int_bit_position (field);
5317 offset = 0;
5318 }
5319 else
5320 bitpos = tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 0);
5321
5322 if (offset)
5323 {
5324 enum machine_mode address_mode;
5325 rtx offset_rtx;
5326
5327 offset
5328 = SUBSTITUTE_PLACEHOLDER_IN_EXPR (offset,
5329 make_tree (TREE_TYPE (exp),
5330 target));
5331
5332 offset_rtx = expand_normal (offset);
5333 gcc_assert (MEM_P (to_rtx));
5334
5335 address_mode
5336 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (to_rtx));
5337 if (GET_MODE (offset_rtx) != address_mode)
5338 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
5339
5340 to_rtx = offset_address (to_rtx, offset_rtx,
5341 highest_pow2_factor (offset));
5342 }
5343
5344 #ifdef WORD_REGISTER_OPERATIONS
5345 /* If this initializes a field that is smaller than a
5346 word, at the start of a word, try to widen it to a full
5347 word. This special case allows us to output C++ member
5348 function initializations in a form that the optimizers
5349 can understand. */
5350 if (REG_P (target)
5351 && bitsize < BITS_PER_WORD
5352 && bitpos % BITS_PER_WORD == 0
5353 && GET_MODE_CLASS (mode) == MODE_INT
5354 && TREE_CODE (value) == INTEGER_CST
5355 && exp_size >= 0
5356 && bitpos + BITS_PER_WORD <= exp_size * BITS_PER_UNIT)
5357 {
5358 tree type = TREE_TYPE (value);
5359
5360 if (TYPE_PRECISION (type) < BITS_PER_WORD)
5361 {
5362 type = lang_hooks.types.type_for_size
5363 (BITS_PER_WORD, TYPE_UNSIGNED (type));
5364 value = fold_convert (type, value);
5365 }
5366
5367 if (BYTES_BIG_ENDIAN)
5368 value
5369 = fold_build2 (LSHIFT_EXPR, type, value,
5370 build_int_cst (type,
5371 BITS_PER_WORD - bitsize));
5372 bitsize = BITS_PER_WORD;
5373 mode = word_mode;
5374 }
5375 #endif
5376
5377 if (MEM_P (to_rtx) && !MEM_KEEP_ALIAS_SET_P (to_rtx)
5378 && DECL_NONADDRESSABLE_P (field))
5379 {
5380 to_rtx = copy_rtx (to_rtx);
5381 MEM_KEEP_ALIAS_SET_P (to_rtx) = 1;
5382 }
5383
5384 store_constructor_field (to_rtx, bitsize, bitpos, mode,
5385 value, type, cleared,
5386 get_alias_set (TREE_TYPE (field)));
5387 }
5388 break;
5389 }
5390 case ARRAY_TYPE:
5391 {
5392 tree value, index;
5393 unsigned HOST_WIDE_INT i;
5394 int need_to_clear;
5395 tree domain;
5396 tree elttype = TREE_TYPE (type);
5397 int const_bounds_p;
5398 HOST_WIDE_INT minelt = 0;
5399 HOST_WIDE_INT maxelt = 0;
5400
5401 domain = TYPE_DOMAIN (type);
5402 const_bounds_p = (TYPE_MIN_VALUE (domain)
5403 && TYPE_MAX_VALUE (domain)
5404 && host_integerp (TYPE_MIN_VALUE (domain), 0)
5405 && host_integerp (TYPE_MAX_VALUE (domain), 0));
5406
5407 /* If we have constant bounds for the range of the type, get them. */
5408 if (const_bounds_p)
5409 {
5410 minelt = tree_low_cst (TYPE_MIN_VALUE (domain), 0);
5411 maxelt = tree_low_cst (TYPE_MAX_VALUE (domain), 0);
5412 }
5413
5414 /* If the constructor has fewer elements than the array, clear
5415 the whole array first. Similarly if this is static
5416 constructor of a non-BLKmode object. */
5417 if (cleared)
5418 need_to_clear = 0;
5419 else if (REG_P (target) && TREE_STATIC (exp))
5420 need_to_clear = 1;
5421 else
5422 {
5423 unsigned HOST_WIDE_INT idx;
5424 tree index, value;
5425 HOST_WIDE_INT count = 0, zero_count = 0;
5426 need_to_clear = ! const_bounds_p;
5427
5428 /* This loop is a more accurate version of the loop in
5429 mostly_zeros_p (it handles RANGE_EXPR in an index). It
5430 is also needed to check for missing elements. */
5431 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), idx, index, value)
5432 {
5433 HOST_WIDE_INT this_node_count;
5434
5435 if (need_to_clear)
5436 break;
5437
5438 if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR)
5439 {
5440 tree lo_index = TREE_OPERAND (index, 0);
5441 tree hi_index = TREE_OPERAND (index, 1);
5442
5443 if (! host_integerp (lo_index, 1)
5444 || ! host_integerp (hi_index, 1))
5445 {
5446 need_to_clear = 1;
5447 break;
5448 }
5449
5450 this_node_count = (tree_low_cst (hi_index, 1)
5451 - tree_low_cst (lo_index, 1) + 1);
5452 }
5453 else
5454 this_node_count = 1;
5455
5456 count += this_node_count;
5457 if (mostly_zeros_p (value))
5458 zero_count += this_node_count;
5459 }
5460
5461 /* Clear the entire array first if there are any missing
5462 elements, or if the incidence of zero elements is >=
5463 75%. */
5464 if (! need_to_clear
5465 && (count < maxelt - minelt + 1
5466 || 4 * zero_count >= 3 * count))
5467 need_to_clear = 1;
5468 }
5469
5470 if (need_to_clear && size > 0)
5471 {
5472 if (REG_P (target))
5473 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
5474 else
5475 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
5476 cleared = 1;
5477 }
5478
5479 if (!cleared && REG_P (target))
5480 /* Inform later passes that the old value is dead. */
5481 emit_clobber (target);
5482
5483 /* Store each element of the constructor into the
5484 corresponding element of TARGET, determined by counting the
5485 elements. */
5486 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), i, index, value)
5487 {
5488 enum machine_mode mode;
5489 HOST_WIDE_INT bitsize;
5490 HOST_WIDE_INT bitpos;
5491 rtx xtarget = target;
5492
5493 if (cleared && initializer_zerop (value))
5494 continue;
5495
5496 mode = TYPE_MODE (elttype);
5497 if (mode == BLKmode)
5498 bitsize = (host_integerp (TYPE_SIZE (elttype), 1)
5499 ? tree_low_cst (TYPE_SIZE (elttype), 1)
5500 : -1);
5501 else
5502 bitsize = GET_MODE_BITSIZE (mode);
5503
5504 if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR)
5505 {
5506 tree lo_index = TREE_OPERAND (index, 0);
5507 tree hi_index = TREE_OPERAND (index, 1);
5508 rtx index_r, pos_rtx;
5509 HOST_WIDE_INT lo, hi, count;
5510 tree position;
5511
5512 /* If the range is constant and "small", unroll the loop. */
5513 if (const_bounds_p
5514 && host_integerp (lo_index, 0)
5515 && host_integerp (hi_index, 0)
5516 && (lo = tree_low_cst (lo_index, 0),
5517 hi = tree_low_cst (hi_index, 0),
5518 count = hi - lo + 1,
5519 (!MEM_P (target)
5520 || count <= 2
5521 || (host_integerp (TYPE_SIZE (elttype), 1)
5522 && (tree_low_cst (TYPE_SIZE (elttype), 1) * count
5523 <= 40 * 8)))))
5524 {
5525 lo -= minelt; hi -= minelt;
5526 for (; lo <= hi; lo++)
5527 {
5528 bitpos = lo * tree_low_cst (TYPE_SIZE (elttype), 0);
5529
5530 if (MEM_P (target)
5531 && !MEM_KEEP_ALIAS_SET_P (target)
5532 && TREE_CODE (type) == ARRAY_TYPE
5533 && TYPE_NONALIASED_COMPONENT (type))
5534 {
5535 target = copy_rtx (target);
5536 MEM_KEEP_ALIAS_SET_P (target) = 1;
5537 }
5538
5539 store_constructor_field
5540 (target, bitsize, bitpos, mode, value, type, cleared,
5541 get_alias_set (elttype));
5542 }
5543 }
5544 else
5545 {
5546 rtx loop_start = gen_label_rtx ();
5547 rtx loop_end = gen_label_rtx ();
5548 tree exit_cond;
5549
5550 expand_normal (hi_index);
5551
5552 index = build_decl (EXPR_LOCATION (exp),
5553 VAR_DECL, NULL_TREE, domain);
5554 index_r = gen_reg_rtx (promote_decl_mode (index, NULL));
5555 SET_DECL_RTL (index, index_r);
5556 store_expr (lo_index, index_r, 0, false);
5557
5558 /* Build the head of the loop. */
5559 do_pending_stack_adjust ();
5560 emit_label (loop_start);
5561
5562 /* Assign value to element index. */
5563 position =
5564 fold_convert (ssizetype,
5565 fold_build2 (MINUS_EXPR,
5566 TREE_TYPE (index),
5567 index,
5568 TYPE_MIN_VALUE (domain)));
5569
5570 position =
5571 size_binop (MULT_EXPR, position,
5572 fold_convert (ssizetype,
5573 TYPE_SIZE_UNIT (elttype)));
5574
5575 pos_rtx = expand_normal (position);
5576 xtarget = offset_address (target, pos_rtx,
5577 highest_pow2_factor (position));
5578 xtarget = adjust_address (xtarget, mode, 0);
5579 if (TREE_CODE (value) == CONSTRUCTOR)
5580 store_constructor (value, xtarget, cleared,
5581 bitsize / BITS_PER_UNIT);
5582 else
5583 store_expr (value, xtarget, 0, false);
5584
5585 /* Generate a conditional jump to exit the loop. */
5586 exit_cond = build2 (LT_EXPR, integer_type_node,
5587 index, hi_index);
5588 jumpif (exit_cond, loop_end, -1);
5589
5590 /* Update the loop counter, and jump to the head of
5591 the loop. */
5592 expand_assignment (index,
5593 build2 (PLUS_EXPR, TREE_TYPE (index),
5594 index, integer_one_node),
5595 false);
5596
5597 emit_jump (loop_start);
5598
5599 /* Build the end of the loop. */
5600 emit_label (loop_end);
5601 }
5602 }
5603 else if ((index != 0 && ! host_integerp (index, 0))
5604 || ! host_integerp (TYPE_SIZE (elttype), 1))
5605 {
5606 tree position;
5607
5608 if (index == 0)
5609 index = ssize_int (1);
5610
5611 if (minelt)
5612 index = fold_convert (ssizetype,
5613 fold_build2 (MINUS_EXPR,
5614 TREE_TYPE (index),
5615 index,
5616 TYPE_MIN_VALUE (domain)));
5617
5618 position =
5619 size_binop (MULT_EXPR, index,
5620 fold_convert (ssizetype,
5621 TYPE_SIZE_UNIT (elttype)));
5622 xtarget = offset_address (target,
5623 expand_normal (position),
5624 highest_pow2_factor (position));
5625 xtarget = adjust_address (xtarget, mode, 0);
5626 store_expr (value, xtarget, 0, false);
5627 }
5628 else
5629 {
5630 if (index != 0)
5631 bitpos = ((tree_low_cst (index, 0) - minelt)
5632 * tree_low_cst (TYPE_SIZE (elttype), 1));
5633 else
5634 bitpos = (i * tree_low_cst (TYPE_SIZE (elttype), 1));
5635
5636 if (MEM_P (target) && !MEM_KEEP_ALIAS_SET_P (target)
5637 && TREE_CODE (type) == ARRAY_TYPE
5638 && TYPE_NONALIASED_COMPONENT (type))
5639 {
5640 target = copy_rtx (target);
5641 MEM_KEEP_ALIAS_SET_P (target) = 1;
5642 }
5643 store_constructor_field (target, bitsize, bitpos, mode, value,
5644 type, cleared, get_alias_set (elttype));
5645 }
5646 }
5647 break;
5648 }
5649
5650 case VECTOR_TYPE:
5651 {
5652 unsigned HOST_WIDE_INT idx;
5653 constructor_elt *ce;
5654 int i;
5655 int need_to_clear;
5656 int icode = 0;
5657 tree elttype = TREE_TYPE (type);
5658 int elt_size = tree_low_cst (TYPE_SIZE (elttype), 1);
5659 enum machine_mode eltmode = TYPE_MODE (elttype);
5660 HOST_WIDE_INT bitsize;
5661 HOST_WIDE_INT bitpos;
5662 rtvec vector = NULL;
5663 unsigned n_elts;
5664 alias_set_type alias;
5665
5666 gcc_assert (eltmode != BLKmode);
5667
5668 n_elts = TYPE_VECTOR_SUBPARTS (type);
5669 if (REG_P (target) && VECTOR_MODE_P (GET_MODE (target)))
5670 {
5671 enum machine_mode mode = GET_MODE (target);
5672
5673 icode = (int) optab_handler (vec_init_optab, mode);
5674 if (icode != CODE_FOR_nothing)
5675 {
5676 unsigned int i;
5677
5678 vector = rtvec_alloc (n_elts);
5679 for (i = 0; i < n_elts; i++)
5680 RTVEC_ELT (vector, i) = CONST0_RTX (GET_MODE_INNER (mode));
5681 }
5682 }
5683
5684 /* If the constructor has fewer elements than the vector,
5685 clear the whole array first. Similarly if this is static
5686 constructor of a non-BLKmode object. */
5687 if (cleared)
5688 need_to_clear = 0;
5689 else if (REG_P (target) && TREE_STATIC (exp))
5690 need_to_clear = 1;
5691 else
5692 {
5693 unsigned HOST_WIDE_INT count = 0, zero_count = 0;
5694 tree value;
5695
5696 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value)
5697 {
5698 int n_elts_here = tree_low_cst
5699 (int_const_binop (TRUNC_DIV_EXPR,
5700 TYPE_SIZE (TREE_TYPE (value)),
5701 TYPE_SIZE (elttype)), 1);
5702
5703 count += n_elts_here;
5704 if (mostly_zeros_p (value))
5705 zero_count += n_elts_here;
5706 }
5707
5708 /* Clear the entire vector first if there are any missing elements,
5709 or if the incidence of zero elements is >= 75%. */
5710 need_to_clear = (count < n_elts || 4 * zero_count >= 3 * count);
5711 }
5712
5713 if (need_to_clear && size > 0 && !vector)
5714 {
5715 if (REG_P (target))
5716 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
5717 else
5718 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
5719 cleared = 1;
5720 }
5721
5722 /* Inform later passes that the old value is dead. */
5723 if (!cleared && !vector && REG_P (target))
5724 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
5725
5726 if (MEM_P (target))
5727 alias = MEM_ALIAS_SET (target);
5728 else
5729 alias = get_alias_set (elttype);
5730
5731 /* Store each element of the constructor into the corresponding
5732 element of TARGET, determined by counting the elements. */
5733 for (idx = 0, i = 0;
5734 VEC_iterate (constructor_elt, CONSTRUCTOR_ELTS (exp), idx, ce);
5735 idx++, i += bitsize / elt_size)
5736 {
5737 HOST_WIDE_INT eltpos;
5738 tree value = ce->value;
5739
5740 bitsize = tree_low_cst (TYPE_SIZE (TREE_TYPE (value)), 1);
5741 if (cleared && initializer_zerop (value))
5742 continue;
5743
5744 if (ce->index)
5745 eltpos = tree_low_cst (ce->index, 1);
5746 else
5747 eltpos = i;
5748
5749 if (vector)
5750 {
5751 /* Vector CONSTRUCTORs should only be built from smaller
5752 vectors in the case of BLKmode vectors. */
5753 gcc_assert (TREE_CODE (TREE_TYPE (value)) != VECTOR_TYPE);
5754 RTVEC_ELT (vector, eltpos)
5755 = expand_normal (value);
5756 }
5757 else
5758 {
5759 enum machine_mode value_mode =
5760 TREE_CODE (TREE_TYPE (value)) == VECTOR_TYPE
5761 ? TYPE_MODE (TREE_TYPE (value))
5762 : eltmode;
5763 bitpos = eltpos * elt_size;
5764 store_constructor_field (target, bitsize, bitpos,
5765 value_mode, value, type,
5766 cleared, alias);
5767 }
5768 }
5769
5770 if (vector)
5771 emit_insn (GEN_FCN (icode)
5772 (target,
5773 gen_rtx_PARALLEL (GET_MODE (target), vector)));
5774 break;
5775 }
5776
5777 default:
5778 gcc_unreachable ();
5779 }
5780 }
5781
5782 /* Store the value of EXP (an expression tree)
5783 into a subfield of TARGET which has mode MODE and occupies
5784 BITSIZE bits, starting BITPOS bits from the start of TARGET.
5785 If MODE is VOIDmode, it means that we are storing into a bit-field.
5786
5787 Always return const0_rtx unless we have something particular to
5788 return.
5789
5790 TYPE is the type of the underlying object,
5791
5792 ALIAS_SET is the alias set for the destination. This value will
5793 (in general) be different from that for TARGET, since TARGET is a
5794 reference to the containing structure.
5795
5796 If NONTEMPORAL is true, try generating a nontemporal store. */
5797
5798 static rtx
5799 store_field (rtx target, HOST_WIDE_INT bitsize, HOST_WIDE_INT bitpos,
5800 enum machine_mode mode, tree exp, tree type,
5801 alias_set_type alias_set, bool nontemporal)
5802 {
5803 if (TREE_CODE (exp) == ERROR_MARK)
5804 return const0_rtx;
5805
5806 /* If we have nothing to store, do nothing unless the expression has
5807 side-effects. */
5808 if (bitsize == 0)
5809 return expand_expr (exp, const0_rtx, VOIDmode, EXPAND_NORMAL);
5810
5811 /* If we are storing into an unaligned field of an aligned union that is
5812 in a register, we may have the mode of TARGET being an integer mode but
5813 MODE == BLKmode. In that case, get an aligned object whose size and
5814 alignment are the same as TARGET and store TARGET into it (we can avoid
5815 the store if the field being stored is the entire width of TARGET). Then
5816 call ourselves recursively to store the field into a BLKmode version of
5817 that object. Finally, load from the object into TARGET. This is not
5818 very efficient in general, but should only be slightly more expensive
5819 than the otherwise-required unaligned accesses. Perhaps this can be
5820 cleaned up later. It's tempting to make OBJECT readonly, but it's set
5821 twice, once with emit_move_insn and once via store_field. */
5822
5823 if (mode == BLKmode
5824 && (REG_P (target) || GET_CODE (target) == SUBREG))
5825 {
5826 rtx object = assign_temp (type, 0, 1, 1);
5827 rtx blk_object = adjust_address (object, BLKmode, 0);
5828
5829 if (bitsize != (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (target)))
5830 emit_move_insn (object, target);
5831
5832 store_field (blk_object, bitsize, bitpos, mode, exp, type, alias_set,
5833 nontemporal);
5834
5835 emit_move_insn (target, object);
5836
5837 /* We want to return the BLKmode version of the data. */
5838 return blk_object;
5839 }
5840
5841 if (GET_CODE (target) == CONCAT)
5842 {
5843 /* We're storing into a struct containing a single __complex. */
5844
5845 gcc_assert (!bitpos);
5846 return store_expr (exp, target, 0, nontemporal);
5847 }
5848
5849 /* If the structure is in a register or if the component
5850 is a bit field, we cannot use addressing to access it.
5851 Use bit-field techniques or SUBREG to store in it. */
5852
5853 if (mode == VOIDmode
5854 || (mode != BLKmode && ! direct_store[(int) mode]
5855 && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
5856 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT)
5857 || REG_P (target)
5858 || GET_CODE (target) == SUBREG
5859 /* If the field isn't aligned enough to store as an ordinary memref,
5860 store it as a bit field. */
5861 || (mode != BLKmode
5862 && ((((MEM_ALIGN (target) < GET_MODE_ALIGNMENT (mode))
5863 || bitpos % GET_MODE_ALIGNMENT (mode))
5864 && SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (target)))
5865 || (bitpos % BITS_PER_UNIT != 0)))
5866 /* If the RHS and field are a constant size and the size of the
5867 RHS isn't the same size as the bitfield, we must use bitfield
5868 operations. */
5869 || (bitsize >= 0
5870 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
5871 && compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)), bitsize) != 0)
5872 /* If we are expanding a MEM_REF of a non-BLKmode non-addressable
5873 decl we must use bitfield operations. */
5874 || (bitsize >= 0
5875 && TREE_CODE (exp) == MEM_REF
5876 && TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR
5877 && DECL_P (TREE_OPERAND (TREE_OPERAND (exp, 0), 0))
5878 && !TREE_ADDRESSABLE (TREE_OPERAND (TREE_OPERAND (exp, 0),0 ))
5879 && DECL_MODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0)) != BLKmode))
5880 {
5881 rtx temp;
5882 gimple nop_def;
5883
5884 /* If EXP is a NOP_EXPR of precision less than its mode, then that
5885 implies a mask operation. If the precision is the same size as
5886 the field we're storing into, that mask is redundant. This is
5887 particularly common with bit field assignments generated by the
5888 C front end. */
5889 nop_def = get_def_for_expr (exp, NOP_EXPR);
5890 if (nop_def)
5891 {
5892 tree type = TREE_TYPE (exp);
5893 if (INTEGRAL_TYPE_P (type)
5894 && TYPE_PRECISION (type) < GET_MODE_BITSIZE (TYPE_MODE (type))
5895 && bitsize == TYPE_PRECISION (type))
5896 {
5897 tree op = gimple_assign_rhs1 (nop_def);
5898 type = TREE_TYPE (op);
5899 if (INTEGRAL_TYPE_P (type) && TYPE_PRECISION (type) >= bitsize)
5900 exp = op;
5901 }
5902 }
5903
5904 temp = expand_normal (exp);
5905
5906 /* If BITSIZE is narrower than the size of the type of EXP
5907 we will be narrowing TEMP. Normally, what's wanted are the
5908 low-order bits. However, if EXP's type is a record and this is
5909 big-endian machine, we want the upper BITSIZE bits. */
5910 if (BYTES_BIG_ENDIAN && GET_MODE_CLASS (GET_MODE (temp)) == MODE_INT
5911 && bitsize < (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (temp))
5912 && TREE_CODE (TREE_TYPE (exp)) == RECORD_TYPE)
5913 temp = expand_shift (RSHIFT_EXPR, GET_MODE (temp), temp,
5914 GET_MODE_BITSIZE (GET_MODE (temp)) - bitsize,
5915 NULL_RTX, 1);
5916
5917 /* Unless MODE is VOIDmode or BLKmode, convert TEMP to
5918 MODE. */
5919 if (mode != VOIDmode && mode != BLKmode
5920 && mode != TYPE_MODE (TREE_TYPE (exp)))
5921 temp = convert_modes (mode, TYPE_MODE (TREE_TYPE (exp)), temp, 1);
5922
5923 /* If the modes of TEMP and TARGET are both BLKmode, both
5924 must be in memory and BITPOS must be aligned on a byte
5925 boundary. If so, we simply do a block copy. Likewise
5926 for a BLKmode-like TARGET. */
5927 if (GET_MODE (temp) == BLKmode
5928 && (GET_MODE (target) == BLKmode
5929 || (MEM_P (target)
5930 && GET_MODE_CLASS (GET_MODE (target)) == MODE_INT
5931 && (bitpos % BITS_PER_UNIT) == 0
5932 && (bitsize % BITS_PER_UNIT) == 0)))
5933 {
5934 gcc_assert (MEM_P (target) && MEM_P (temp)
5935 && (bitpos % BITS_PER_UNIT) == 0);
5936
5937 target = adjust_address (target, VOIDmode, bitpos / BITS_PER_UNIT);
5938 emit_block_move (target, temp,
5939 GEN_INT ((bitsize + BITS_PER_UNIT - 1)
5940 / BITS_PER_UNIT),
5941 BLOCK_OP_NORMAL);
5942
5943 return const0_rtx;
5944 }
5945
5946 /* Store the value in the bitfield. */
5947 store_bit_field (target, bitsize, bitpos, mode, temp);
5948
5949 return const0_rtx;
5950 }
5951 else
5952 {
5953 /* Now build a reference to just the desired component. */
5954 rtx to_rtx = adjust_address (target, mode, bitpos / BITS_PER_UNIT);
5955
5956 if (to_rtx == target)
5957 to_rtx = copy_rtx (to_rtx);
5958
5959 if (!MEM_SCALAR_P (to_rtx))
5960 MEM_IN_STRUCT_P (to_rtx) = 1;
5961 if (!MEM_KEEP_ALIAS_SET_P (to_rtx) && MEM_ALIAS_SET (to_rtx) != 0)
5962 set_mem_alias_set (to_rtx, alias_set);
5963
5964 return store_expr (exp, to_rtx, 0, nontemporal);
5965 }
5966 }
5967 \f
5968 /* Given an expression EXP that may be a COMPONENT_REF, a BIT_FIELD_REF,
5969 an ARRAY_REF, or an ARRAY_RANGE_REF, look for nested operations of these
5970 codes and find the ultimate containing object, which we return.
5971
5972 We set *PBITSIZE to the size in bits that we want, *PBITPOS to the
5973 bit position, and *PUNSIGNEDP to the signedness of the field.
5974 If the position of the field is variable, we store a tree
5975 giving the variable offset (in units) in *POFFSET.
5976 This offset is in addition to the bit position.
5977 If the position is not variable, we store 0 in *POFFSET.
5978
5979 If any of the extraction expressions is volatile,
5980 we store 1 in *PVOLATILEP. Otherwise we don't change that.
5981
5982 If the field is a non-BLKmode bit-field, *PMODE is set to VOIDmode.
5983 Otherwise, it is a mode that can be used to access the field.
5984
5985 If the field describes a variable-sized object, *PMODE is set to
5986 BLKmode and *PBITSIZE is set to -1. An access cannot be made in
5987 this case, but the address of the object can be found.
5988
5989 If KEEP_ALIGNING is true and the target is STRICT_ALIGNMENT, we don't
5990 look through nodes that serve as markers of a greater alignment than
5991 the one that can be deduced from the expression. These nodes make it
5992 possible for front-ends to prevent temporaries from being created by
5993 the middle-end on alignment considerations. For that purpose, the
5994 normal operating mode at high-level is to always pass FALSE so that
5995 the ultimate containing object is really returned; moreover, the
5996 associated predicate handled_component_p will always return TRUE
5997 on these nodes, thus indicating that they are essentially handled
5998 by get_inner_reference. TRUE should only be passed when the caller
5999 is scanning the expression in order to build another representation
6000 and specifically knows how to handle these nodes; as such, this is
6001 the normal operating mode in the RTL expanders. */
6002
6003 tree
6004 get_inner_reference (tree exp, HOST_WIDE_INT *pbitsize,
6005 HOST_WIDE_INT *pbitpos, tree *poffset,
6006 enum machine_mode *pmode, int *punsignedp,
6007 int *pvolatilep, bool keep_aligning)
6008 {
6009 tree size_tree = 0;
6010 enum machine_mode mode = VOIDmode;
6011 bool blkmode_bitfield = false;
6012 tree offset = size_zero_node;
6013 double_int bit_offset = double_int_zero;
6014
6015 /* First get the mode, signedness, and size. We do this from just the
6016 outermost expression. */
6017 *pbitsize = -1;
6018 if (TREE_CODE (exp) == COMPONENT_REF)
6019 {
6020 tree field = TREE_OPERAND (exp, 1);
6021 size_tree = DECL_SIZE (field);
6022 if (!DECL_BIT_FIELD (field))
6023 mode = DECL_MODE (field);
6024 else if (DECL_MODE (field) == BLKmode)
6025 blkmode_bitfield = true;
6026 else if (TREE_THIS_VOLATILE (exp)
6027 && flag_strict_volatile_bitfields > 0)
6028 /* Volatile bitfields should be accessed in the mode of the
6029 field's type, not the mode computed based on the bit
6030 size. */
6031 mode = TYPE_MODE (DECL_BIT_FIELD_TYPE (field));
6032
6033 *punsignedp = DECL_UNSIGNED (field);
6034 }
6035 else if (TREE_CODE (exp) == BIT_FIELD_REF)
6036 {
6037 size_tree = TREE_OPERAND (exp, 1);
6038 *punsignedp = (! INTEGRAL_TYPE_P (TREE_TYPE (exp))
6039 || TYPE_UNSIGNED (TREE_TYPE (exp)));
6040
6041 /* For vector types, with the correct size of access, use the mode of
6042 inner type. */
6043 if (TREE_CODE (TREE_TYPE (TREE_OPERAND (exp, 0))) == VECTOR_TYPE
6044 && TREE_TYPE (exp) == TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0)))
6045 && tree_int_cst_equal (size_tree, TYPE_SIZE (TREE_TYPE (exp))))
6046 mode = TYPE_MODE (TREE_TYPE (exp));
6047 }
6048 else
6049 {
6050 mode = TYPE_MODE (TREE_TYPE (exp));
6051 *punsignedp = TYPE_UNSIGNED (TREE_TYPE (exp));
6052
6053 if (mode == BLKmode)
6054 size_tree = TYPE_SIZE (TREE_TYPE (exp));
6055 else
6056 *pbitsize = GET_MODE_BITSIZE (mode);
6057 }
6058
6059 if (size_tree != 0)
6060 {
6061 if (! host_integerp (size_tree, 1))
6062 mode = BLKmode, *pbitsize = -1;
6063 else
6064 *pbitsize = tree_low_cst (size_tree, 1);
6065 }
6066
6067 /* Compute cumulative bit-offset for nested component-refs and array-refs,
6068 and find the ultimate containing object. */
6069 while (1)
6070 {
6071 switch (TREE_CODE (exp))
6072 {
6073 case BIT_FIELD_REF:
6074 bit_offset
6075 = double_int_add (bit_offset,
6076 tree_to_double_int (TREE_OPERAND (exp, 2)));
6077 break;
6078
6079 case COMPONENT_REF:
6080 {
6081 tree field = TREE_OPERAND (exp, 1);
6082 tree this_offset = component_ref_field_offset (exp);
6083
6084 /* If this field hasn't been filled in yet, don't go past it.
6085 This should only happen when folding expressions made during
6086 type construction. */
6087 if (this_offset == 0)
6088 break;
6089
6090 offset = size_binop (PLUS_EXPR, offset, this_offset);
6091 bit_offset = double_int_add (bit_offset,
6092 tree_to_double_int
6093 (DECL_FIELD_BIT_OFFSET (field)));
6094
6095 /* ??? Right now we don't do anything with DECL_OFFSET_ALIGN. */
6096 }
6097 break;
6098
6099 case ARRAY_REF:
6100 case ARRAY_RANGE_REF:
6101 {
6102 tree index = TREE_OPERAND (exp, 1);
6103 tree low_bound = array_ref_low_bound (exp);
6104 tree unit_size = array_ref_element_size (exp);
6105
6106 /* We assume all arrays have sizes that are a multiple of a byte.
6107 First subtract the lower bound, if any, in the type of the
6108 index, then convert to sizetype and multiply by the size of
6109 the array element. */
6110 if (! integer_zerop (low_bound))
6111 index = fold_build2 (MINUS_EXPR, TREE_TYPE (index),
6112 index, low_bound);
6113
6114 offset = size_binop (PLUS_EXPR, offset,
6115 size_binop (MULT_EXPR,
6116 fold_convert (sizetype, index),
6117 unit_size));
6118 }
6119 break;
6120
6121 case REALPART_EXPR:
6122 break;
6123
6124 case IMAGPART_EXPR:
6125 bit_offset = double_int_add (bit_offset,
6126 uhwi_to_double_int (*pbitsize));
6127 break;
6128
6129 case VIEW_CONVERT_EXPR:
6130 if (keep_aligning && STRICT_ALIGNMENT
6131 && (TYPE_ALIGN (TREE_TYPE (exp))
6132 > TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (exp, 0))))
6133 && (TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (exp, 0)))
6134 < BIGGEST_ALIGNMENT)
6135 && (TYPE_ALIGN_OK (TREE_TYPE (exp))
6136 || TYPE_ALIGN_OK (TREE_TYPE (TREE_OPERAND (exp, 0)))))
6137 goto done;
6138 break;
6139
6140 case MEM_REF:
6141 /* Hand back the decl for MEM[&decl, off]. */
6142 if (TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR)
6143 {
6144 tree off = TREE_OPERAND (exp, 1);
6145 if (!integer_zerop (off))
6146 {
6147 double_int boff, coff = mem_ref_offset (exp);
6148 boff = double_int_lshift (coff,
6149 BITS_PER_UNIT == 8
6150 ? 3 : exact_log2 (BITS_PER_UNIT),
6151 HOST_BITS_PER_DOUBLE_INT, true);
6152 bit_offset = double_int_add (bit_offset, boff);
6153 }
6154 exp = TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
6155 }
6156 goto done;
6157
6158 default:
6159 goto done;
6160 }
6161
6162 /* If any reference in the chain is volatile, the effect is volatile. */
6163 if (TREE_THIS_VOLATILE (exp))
6164 *pvolatilep = 1;
6165
6166 exp = TREE_OPERAND (exp, 0);
6167 }
6168 done:
6169
6170 /* If OFFSET is constant, see if we can return the whole thing as a
6171 constant bit position. Make sure to handle overflow during
6172 this conversion. */
6173 if (host_integerp (offset, 0))
6174 {
6175 double_int tem = double_int_lshift (tree_to_double_int (offset),
6176 BITS_PER_UNIT == 8
6177 ? 3 : exact_log2 (BITS_PER_UNIT),
6178 HOST_BITS_PER_DOUBLE_INT, true);
6179 tem = double_int_add (tem, bit_offset);
6180 if (double_int_fits_in_shwi_p (tem))
6181 {
6182 *pbitpos = double_int_to_shwi (tem);
6183 *poffset = offset = NULL_TREE;
6184 }
6185 }
6186
6187 /* Otherwise, split it up. */
6188 if (offset)
6189 {
6190 *pbitpos = double_int_to_shwi (bit_offset);
6191 *poffset = offset;
6192 }
6193
6194 /* We can use BLKmode for a byte-aligned BLKmode bitfield. */
6195 if (mode == VOIDmode
6196 && blkmode_bitfield
6197 && (*pbitpos % BITS_PER_UNIT) == 0
6198 && (*pbitsize % BITS_PER_UNIT) == 0)
6199 *pmode = BLKmode;
6200 else
6201 *pmode = mode;
6202
6203 return exp;
6204 }
6205
6206 /* Given an expression EXP that may be a COMPONENT_REF, an ARRAY_REF or an
6207 ARRAY_RANGE_REF, look for whether EXP or any nested component-refs within
6208 EXP is marked as PACKED. */
6209
6210 bool
6211 contains_packed_reference (const_tree exp)
6212 {
6213 bool packed_p = false;
6214
6215 while (1)
6216 {
6217 switch (TREE_CODE (exp))
6218 {
6219 case COMPONENT_REF:
6220 {
6221 tree field = TREE_OPERAND (exp, 1);
6222 packed_p = DECL_PACKED (field)
6223 || TYPE_PACKED (TREE_TYPE (field))
6224 || TYPE_PACKED (TREE_TYPE (exp));
6225 if (packed_p)
6226 goto done;
6227 }
6228 break;
6229
6230 case BIT_FIELD_REF:
6231 case ARRAY_REF:
6232 case ARRAY_RANGE_REF:
6233 case REALPART_EXPR:
6234 case IMAGPART_EXPR:
6235 case VIEW_CONVERT_EXPR:
6236 break;
6237
6238 default:
6239 goto done;
6240 }
6241 exp = TREE_OPERAND (exp, 0);
6242 }
6243 done:
6244 return packed_p;
6245 }
6246
6247 /* Return a tree of sizetype representing the size, in bytes, of the element
6248 of EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6249
6250 tree
6251 array_ref_element_size (tree exp)
6252 {
6253 tree aligned_size = TREE_OPERAND (exp, 3);
6254 tree elmt_type = TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0)));
6255 location_t loc = EXPR_LOCATION (exp);
6256
6257 /* If a size was specified in the ARRAY_REF, it's the size measured
6258 in alignment units of the element type. So multiply by that value. */
6259 if (aligned_size)
6260 {
6261 /* ??? tree_ssa_useless_type_conversion will eliminate casts to
6262 sizetype from another type of the same width and signedness. */
6263 if (TREE_TYPE (aligned_size) != sizetype)
6264 aligned_size = fold_convert_loc (loc, sizetype, aligned_size);
6265 return size_binop_loc (loc, MULT_EXPR, aligned_size,
6266 size_int (TYPE_ALIGN_UNIT (elmt_type)));
6267 }
6268
6269 /* Otherwise, take the size from that of the element type. Substitute
6270 any PLACEHOLDER_EXPR that we have. */
6271 else
6272 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_SIZE_UNIT (elmt_type), exp);
6273 }
6274
6275 /* Return a tree representing the lower bound of the array mentioned in
6276 EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6277
6278 tree
6279 array_ref_low_bound (tree exp)
6280 {
6281 tree domain_type = TYPE_DOMAIN (TREE_TYPE (TREE_OPERAND (exp, 0)));
6282
6283 /* If a lower bound is specified in EXP, use it. */
6284 if (TREE_OPERAND (exp, 2))
6285 return TREE_OPERAND (exp, 2);
6286
6287 /* Otherwise, if there is a domain type and it has a lower bound, use it,
6288 substituting for a PLACEHOLDER_EXPR as needed. */
6289 if (domain_type && TYPE_MIN_VALUE (domain_type))
6290 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_MIN_VALUE (domain_type), exp);
6291
6292 /* Otherwise, return a zero of the appropriate type. */
6293 return build_int_cst (TREE_TYPE (TREE_OPERAND (exp, 1)), 0);
6294 }
6295
6296 /* Return a tree representing the upper bound of the array mentioned in
6297 EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6298
6299 tree
6300 array_ref_up_bound (tree exp)
6301 {
6302 tree domain_type = TYPE_DOMAIN (TREE_TYPE (TREE_OPERAND (exp, 0)));
6303
6304 /* If there is a domain type and it has an upper bound, use it, substituting
6305 for a PLACEHOLDER_EXPR as needed. */
6306 if (domain_type && TYPE_MAX_VALUE (domain_type))
6307 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_MAX_VALUE (domain_type), exp);
6308
6309 /* Otherwise fail. */
6310 return NULL_TREE;
6311 }
6312
6313 /* Return a tree representing the offset, in bytes, of the field referenced
6314 by EXP. This does not include any offset in DECL_FIELD_BIT_OFFSET. */
6315
6316 tree
6317 component_ref_field_offset (tree exp)
6318 {
6319 tree aligned_offset = TREE_OPERAND (exp, 2);
6320 tree field = TREE_OPERAND (exp, 1);
6321 location_t loc = EXPR_LOCATION (exp);
6322
6323 /* If an offset was specified in the COMPONENT_REF, it's the offset measured
6324 in units of DECL_OFFSET_ALIGN / BITS_PER_UNIT. So multiply by that
6325 value. */
6326 if (aligned_offset)
6327 {
6328 /* ??? tree_ssa_useless_type_conversion will eliminate casts to
6329 sizetype from another type of the same width and signedness. */
6330 if (TREE_TYPE (aligned_offset) != sizetype)
6331 aligned_offset = fold_convert_loc (loc, sizetype, aligned_offset);
6332 return size_binop_loc (loc, MULT_EXPR, aligned_offset,
6333 size_int (DECL_OFFSET_ALIGN (field)
6334 / BITS_PER_UNIT));
6335 }
6336
6337 /* Otherwise, take the offset from that of the field. Substitute
6338 any PLACEHOLDER_EXPR that we have. */
6339 else
6340 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (DECL_FIELD_OFFSET (field), exp);
6341 }
6342
6343 /* Alignment in bits the TARGET of an assignment may be assumed to have. */
6344
6345 static unsigned HOST_WIDE_INT
6346 target_align (const_tree target)
6347 {
6348 /* We might have a chain of nested references with intermediate misaligning
6349 bitfields components, so need to recurse to find out. */
6350
6351 unsigned HOST_WIDE_INT this_align, outer_align;
6352
6353 switch (TREE_CODE (target))
6354 {
6355 case BIT_FIELD_REF:
6356 return 1;
6357
6358 case COMPONENT_REF:
6359 this_align = DECL_ALIGN (TREE_OPERAND (target, 1));
6360 outer_align = target_align (TREE_OPERAND (target, 0));
6361 return MIN (this_align, outer_align);
6362
6363 case ARRAY_REF:
6364 case ARRAY_RANGE_REF:
6365 this_align = TYPE_ALIGN (TREE_TYPE (target));
6366 outer_align = target_align (TREE_OPERAND (target, 0));
6367 return MIN (this_align, outer_align);
6368
6369 CASE_CONVERT:
6370 case NON_LVALUE_EXPR:
6371 case VIEW_CONVERT_EXPR:
6372 this_align = TYPE_ALIGN (TREE_TYPE (target));
6373 outer_align = target_align (TREE_OPERAND (target, 0));
6374 return MAX (this_align, outer_align);
6375
6376 default:
6377 return TYPE_ALIGN (TREE_TYPE (target));
6378 }
6379 }
6380
6381 \f
6382 /* Given an rtx VALUE that may contain additions and multiplications, return
6383 an equivalent value that just refers to a register, memory, or constant.
6384 This is done by generating instructions to perform the arithmetic and
6385 returning a pseudo-register containing the value.
6386
6387 The returned value may be a REG, SUBREG, MEM or constant. */
6388
6389 rtx
6390 force_operand (rtx value, rtx target)
6391 {
6392 rtx op1, op2;
6393 /* Use subtarget as the target for operand 0 of a binary operation. */
6394 rtx subtarget = get_subtarget (target);
6395 enum rtx_code code = GET_CODE (value);
6396
6397 /* Check for subreg applied to an expression produced by loop optimizer. */
6398 if (code == SUBREG
6399 && !REG_P (SUBREG_REG (value))
6400 && !MEM_P (SUBREG_REG (value)))
6401 {
6402 value
6403 = simplify_gen_subreg (GET_MODE (value),
6404 force_reg (GET_MODE (SUBREG_REG (value)),
6405 force_operand (SUBREG_REG (value),
6406 NULL_RTX)),
6407 GET_MODE (SUBREG_REG (value)),
6408 SUBREG_BYTE (value));
6409 code = GET_CODE (value);
6410 }
6411
6412 /* Check for a PIC address load. */
6413 if ((code == PLUS || code == MINUS)
6414 && XEXP (value, 0) == pic_offset_table_rtx
6415 && (GET_CODE (XEXP (value, 1)) == SYMBOL_REF
6416 || GET_CODE (XEXP (value, 1)) == LABEL_REF
6417 || GET_CODE (XEXP (value, 1)) == CONST))
6418 {
6419 if (!subtarget)
6420 subtarget = gen_reg_rtx (GET_MODE (value));
6421 emit_move_insn (subtarget, value);
6422 return subtarget;
6423 }
6424
6425 if (ARITHMETIC_P (value))
6426 {
6427 op2 = XEXP (value, 1);
6428 if (!CONSTANT_P (op2) && !(REG_P (op2) && op2 != subtarget))
6429 subtarget = 0;
6430 if (code == MINUS && CONST_INT_P (op2))
6431 {
6432 code = PLUS;
6433 op2 = negate_rtx (GET_MODE (value), op2);
6434 }
6435
6436 /* Check for an addition with OP2 a constant integer and our first
6437 operand a PLUS of a virtual register and something else. In that
6438 case, we want to emit the sum of the virtual register and the
6439 constant first and then add the other value. This allows virtual
6440 register instantiation to simply modify the constant rather than
6441 creating another one around this addition. */
6442 if (code == PLUS && CONST_INT_P (op2)
6443 && GET_CODE (XEXP (value, 0)) == PLUS
6444 && REG_P (XEXP (XEXP (value, 0), 0))
6445 && REGNO (XEXP (XEXP (value, 0), 0)) >= FIRST_VIRTUAL_REGISTER
6446 && REGNO (XEXP (XEXP (value, 0), 0)) <= LAST_VIRTUAL_REGISTER)
6447 {
6448 rtx temp = expand_simple_binop (GET_MODE (value), code,
6449 XEXP (XEXP (value, 0), 0), op2,
6450 subtarget, 0, OPTAB_LIB_WIDEN);
6451 return expand_simple_binop (GET_MODE (value), code, temp,
6452 force_operand (XEXP (XEXP (value,
6453 0), 1), 0),
6454 target, 0, OPTAB_LIB_WIDEN);
6455 }
6456
6457 op1 = force_operand (XEXP (value, 0), subtarget);
6458 op2 = force_operand (op2, NULL_RTX);
6459 switch (code)
6460 {
6461 case MULT:
6462 return expand_mult (GET_MODE (value), op1, op2, target, 1);
6463 case DIV:
6464 if (!INTEGRAL_MODE_P (GET_MODE (value)))
6465 return expand_simple_binop (GET_MODE (value), code, op1, op2,
6466 target, 1, OPTAB_LIB_WIDEN);
6467 else
6468 return expand_divmod (0,
6469 FLOAT_MODE_P (GET_MODE (value))
6470 ? RDIV_EXPR : TRUNC_DIV_EXPR,
6471 GET_MODE (value), op1, op2, target, 0);
6472 case MOD:
6473 return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2,
6474 target, 0);
6475 case UDIV:
6476 return expand_divmod (0, TRUNC_DIV_EXPR, GET_MODE (value), op1, op2,
6477 target, 1);
6478 case UMOD:
6479 return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2,
6480 target, 1);
6481 case ASHIFTRT:
6482 return expand_simple_binop (GET_MODE (value), code, op1, op2,
6483 target, 0, OPTAB_LIB_WIDEN);
6484 default:
6485 return expand_simple_binop (GET_MODE (value), code, op1, op2,
6486 target, 1, OPTAB_LIB_WIDEN);
6487 }
6488 }
6489 if (UNARY_P (value))
6490 {
6491 if (!target)
6492 target = gen_reg_rtx (GET_MODE (value));
6493 op1 = force_operand (XEXP (value, 0), NULL_RTX);
6494 switch (code)
6495 {
6496 case ZERO_EXTEND:
6497 case SIGN_EXTEND:
6498 case TRUNCATE:
6499 case FLOAT_EXTEND:
6500 case FLOAT_TRUNCATE:
6501 convert_move (target, op1, code == ZERO_EXTEND);
6502 return target;
6503
6504 case FIX:
6505 case UNSIGNED_FIX:
6506 expand_fix (target, op1, code == UNSIGNED_FIX);
6507 return target;
6508
6509 case FLOAT:
6510 case UNSIGNED_FLOAT:
6511 expand_float (target, op1, code == UNSIGNED_FLOAT);
6512 return target;
6513
6514 default:
6515 return expand_simple_unop (GET_MODE (value), code, op1, target, 0);
6516 }
6517 }
6518
6519 #ifdef INSN_SCHEDULING
6520 /* On machines that have insn scheduling, we want all memory reference to be
6521 explicit, so we need to deal with such paradoxical SUBREGs. */
6522 if (paradoxical_subreg_p (value) && MEM_P (SUBREG_REG (value)))
6523 value
6524 = simplify_gen_subreg (GET_MODE (value),
6525 force_reg (GET_MODE (SUBREG_REG (value)),
6526 force_operand (SUBREG_REG (value),
6527 NULL_RTX)),
6528 GET_MODE (SUBREG_REG (value)),
6529 SUBREG_BYTE (value));
6530 #endif
6531
6532 return value;
6533 }
6534 \f
6535 /* Subroutine of expand_expr: return nonzero iff there is no way that
6536 EXP can reference X, which is being modified. TOP_P is nonzero if this
6537 call is going to be used to determine whether we need a temporary
6538 for EXP, as opposed to a recursive call to this function.
6539
6540 It is always safe for this routine to return zero since it merely
6541 searches for optimization opportunities. */
6542
6543 int
6544 safe_from_p (const_rtx x, tree exp, int top_p)
6545 {
6546 rtx exp_rtl = 0;
6547 int i, nops;
6548
6549 if (x == 0
6550 /* If EXP has varying size, we MUST use a target since we currently
6551 have no way of allocating temporaries of variable size
6552 (except for arrays that have TYPE_ARRAY_MAX_SIZE set).
6553 So we assume here that something at a higher level has prevented a
6554 clash. This is somewhat bogus, but the best we can do. Only
6555 do this when X is BLKmode and when we are at the top level. */
6556 || (top_p && TREE_TYPE (exp) != 0 && COMPLETE_TYPE_P (TREE_TYPE (exp))
6557 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) != INTEGER_CST
6558 && (TREE_CODE (TREE_TYPE (exp)) != ARRAY_TYPE
6559 || TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp)) == NULL_TREE
6560 || TREE_CODE (TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp)))
6561 != INTEGER_CST)
6562 && GET_MODE (x) == BLKmode)
6563 /* If X is in the outgoing argument area, it is always safe. */
6564 || (MEM_P (x)
6565 && (XEXP (x, 0) == virtual_outgoing_args_rtx
6566 || (GET_CODE (XEXP (x, 0)) == PLUS
6567 && XEXP (XEXP (x, 0), 0) == virtual_outgoing_args_rtx))))
6568 return 1;
6569
6570 /* If this is a subreg of a hard register, declare it unsafe, otherwise,
6571 find the underlying pseudo. */
6572 if (GET_CODE (x) == SUBREG)
6573 {
6574 x = SUBREG_REG (x);
6575 if (REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
6576 return 0;
6577 }
6578
6579 /* Now look at our tree code and possibly recurse. */
6580 switch (TREE_CODE_CLASS (TREE_CODE (exp)))
6581 {
6582 case tcc_declaration:
6583 exp_rtl = DECL_RTL_IF_SET (exp);
6584 break;
6585
6586 case tcc_constant:
6587 return 1;
6588
6589 case tcc_exceptional:
6590 if (TREE_CODE (exp) == TREE_LIST)
6591 {
6592 while (1)
6593 {
6594 if (TREE_VALUE (exp) && !safe_from_p (x, TREE_VALUE (exp), 0))
6595 return 0;
6596 exp = TREE_CHAIN (exp);
6597 if (!exp)
6598 return 1;
6599 if (TREE_CODE (exp) != TREE_LIST)
6600 return safe_from_p (x, exp, 0);
6601 }
6602 }
6603 else if (TREE_CODE (exp) == CONSTRUCTOR)
6604 {
6605 constructor_elt *ce;
6606 unsigned HOST_WIDE_INT idx;
6607
6608 FOR_EACH_VEC_ELT (constructor_elt, CONSTRUCTOR_ELTS (exp), idx, ce)
6609 if ((ce->index != NULL_TREE && !safe_from_p (x, ce->index, 0))
6610 || !safe_from_p (x, ce->value, 0))
6611 return 0;
6612 return 1;
6613 }
6614 else if (TREE_CODE (exp) == ERROR_MARK)
6615 return 1; /* An already-visited SAVE_EXPR? */
6616 else
6617 return 0;
6618
6619 case tcc_statement:
6620 /* The only case we look at here is the DECL_INITIAL inside a
6621 DECL_EXPR. */
6622 return (TREE_CODE (exp) != DECL_EXPR
6623 || TREE_CODE (DECL_EXPR_DECL (exp)) != VAR_DECL
6624 || !DECL_INITIAL (DECL_EXPR_DECL (exp))
6625 || safe_from_p (x, DECL_INITIAL (DECL_EXPR_DECL (exp)), 0));
6626
6627 case tcc_binary:
6628 case tcc_comparison:
6629 if (!safe_from_p (x, TREE_OPERAND (exp, 1), 0))
6630 return 0;
6631 /* Fall through. */
6632
6633 case tcc_unary:
6634 return safe_from_p (x, TREE_OPERAND (exp, 0), 0);
6635
6636 case tcc_expression:
6637 case tcc_reference:
6638 case tcc_vl_exp:
6639 /* Now do code-specific tests. EXP_RTL is set to any rtx we find in
6640 the expression. If it is set, we conflict iff we are that rtx or
6641 both are in memory. Otherwise, we check all operands of the
6642 expression recursively. */
6643
6644 switch (TREE_CODE (exp))
6645 {
6646 case ADDR_EXPR:
6647 /* If the operand is static or we are static, we can't conflict.
6648 Likewise if we don't conflict with the operand at all. */
6649 if (staticp (TREE_OPERAND (exp, 0))
6650 || TREE_STATIC (exp)
6651 || safe_from_p (x, TREE_OPERAND (exp, 0), 0))
6652 return 1;
6653
6654 /* Otherwise, the only way this can conflict is if we are taking
6655 the address of a DECL a that address if part of X, which is
6656 very rare. */
6657 exp = TREE_OPERAND (exp, 0);
6658 if (DECL_P (exp))
6659 {
6660 if (!DECL_RTL_SET_P (exp)
6661 || !MEM_P (DECL_RTL (exp)))
6662 return 0;
6663 else
6664 exp_rtl = XEXP (DECL_RTL (exp), 0);
6665 }
6666 break;
6667
6668 case MEM_REF:
6669 if (MEM_P (x)
6670 && alias_sets_conflict_p (MEM_ALIAS_SET (x),
6671 get_alias_set (exp)))
6672 return 0;
6673 break;
6674
6675 case CALL_EXPR:
6676 /* Assume that the call will clobber all hard registers and
6677 all of memory. */
6678 if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
6679 || MEM_P (x))
6680 return 0;
6681 break;
6682
6683 case WITH_CLEANUP_EXPR:
6684 case CLEANUP_POINT_EXPR:
6685 /* Lowered by gimplify.c. */
6686 gcc_unreachable ();
6687
6688 case SAVE_EXPR:
6689 return safe_from_p (x, TREE_OPERAND (exp, 0), 0);
6690
6691 default:
6692 break;
6693 }
6694
6695 /* If we have an rtx, we do not need to scan our operands. */
6696 if (exp_rtl)
6697 break;
6698
6699 nops = TREE_OPERAND_LENGTH (exp);
6700 for (i = 0; i < nops; i++)
6701 if (TREE_OPERAND (exp, i) != 0
6702 && ! safe_from_p (x, TREE_OPERAND (exp, i), 0))
6703 return 0;
6704
6705 break;
6706
6707 case tcc_type:
6708 /* Should never get a type here. */
6709 gcc_unreachable ();
6710 }
6711
6712 /* If we have an rtl, find any enclosed object. Then see if we conflict
6713 with it. */
6714 if (exp_rtl)
6715 {
6716 if (GET_CODE (exp_rtl) == SUBREG)
6717 {
6718 exp_rtl = SUBREG_REG (exp_rtl);
6719 if (REG_P (exp_rtl)
6720 && REGNO (exp_rtl) < FIRST_PSEUDO_REGISTER)
6721 return 0;
6722 }
6723
6724 /* If the rtl is X, then it is not safe. Otherwise, it is unless both
6725 are memory and they conflict. */
6726 return ! (rtx_equal_p (x, exp_rtl)
6727 || (MEM_P (x) && MEM_P (exp_rtl)
6728 && true_dependence (exp_rtl, VOIDmode, x,
6729 rtx_addr_varies_p)));
6730 }
6731
6732 /* If we reach here, it is safe. */
6733 return 1;
6734 }
6735
6736 \f
6737 /* Return the highest power of two that EXP is known to be a multiple of.
6738 This is used in updating alignment of MEMs in array references. */
6739
6740 unsigned HOST_WIDE_INT
6741 highest_pow2_factor (const_tree exp)
6742 {
6743 unsigned HOST_WIDE_INT c0, c1;
6744
6745 switch (TREE_CODE (exp))
6746 {
6747 case INTEGER_CST:
6748 /* We can find the lowest bit that's a one. If the low
6749 HOST_BITS_PER_WIDE_INT bits are zero, return BIGGEST_ALIGNMENT.
6750 We need to handle this case since we can find it in a COND_EXPR,
6751 a MIN_EXPR, or a MAX_EXPR. If the constant overflows, we have an
6752 erroneous program, so return BIGGEST_ALIGNMENT to avoid any
6753 later ICE. */
6754 if (TREE_OVERFLOW (exp))
6755 return BIGGEST_ALIGNMENT;
6756 else
6757 {
6758 /* Note: tree_low_cst is intentionally not used here,
6759 we don't care about the upper bits. */
6760 c0 = TREE_INT_CST_LOW (exp);
6761 c0 &= -c0;
6762 return c0 ? c0 : BIGGEST_ALIGNMENT;
6763 }
6764 break;
6765
6766 case PLUS_EXPR: case MINUS_EXPR: case MIN_EXPR: case MAX_EXPR:
6767 c0 = highest_pow2_factor (TREE_OPERAND (exp, 0));
6768 c1 = highest_pow2_factor (TREE_OPERAND (exp, 1));
6769 return MIN (c0, c1);
6770
6771 case MULT_EXPR:
6772 c0 = highest_pow2_factor (TREE_OPERAND (exp, 0));
6773 c1 = highest_pow2_factor (TREE_OPERAND (exp, 1));
6774 return c0 * c1;
6775
6776 case ROUND_DIV_EXPR: case TRUNC_DIV_EXPR: case FLOOR_DIV_EXPR:
6777 case CEIL_DIV_EXPR:
6778 if (integer_pow2p (TREE_OPERAND (exp, 1))
6779 && host_integerp (TREE_OPERAND (exp, 1), 1))
6780 {
6781 c0 = highest_pow2_factor (TREE_OPERAND (exp, 0));
6782 c1 = tree_low_cst (TREE_OPERAND (exp, 1), 1);
6783 return MAX (1, c0 / c1);
6784 }
6785 break;
6786
6787 case BIT_AND_EXPR:
6788 /* The highest power of two of a bit-and expression is the maximum of
6789 that of its operands. We typically get here for a complex LHS and
6790 a constant negative power of two on the RHS to force an explicit
6791 alignment, so don't bother looking at the LHS. */
6792 return highest_pow2_factor (TREE_OPERAND (exp, 1));
6793
6794 CASE_CONVERT:
6795 case SAVE_EXPR:
6796 return highest_pow2_factor (TREE_OPERAND (exp, 0));
6797
6798 case COMPOUND_EXPR:
6799 return highest_pow2_factor (TREE_OPERAND (exp, 1));
6800
6801 case COND_EXPR:
6802 c0 = highest_pow2_factor (TREE_OPERAND (exp, 1));
6803 c1 = highest_pow2_factor (TREE_OPERAND (exp, 2));
6804 return MIN (c0, c1);
6805
6806 default:
6807 break;
6808 }
6809
6810 return 1;
6811 }
6812
6813 /* Similar, except that the alignment requirements of TARGET are
6814 taken into account. Assume it is at least as aligned as its
6815 type, unless it is a COMPONENT_REF in which case the layout of
6816 the structure gives the alignment. */
6817
6818 static unsigned HOST_WIDE_INT
6819 highest_pow2_factor_for_target (const_tree target, const_tree exp)
6820 {
6821 unsigned HOST_WIDE_INT talign = target_align (target) / BITS_PER_UNIT;
6822 unsigned HOST_WIDE_INT factor = highest_pow2_factor (exp);
6823
6824 return MAX (factor, talign);
6825 }
6826 \f
6827 /* Subroutine of expand_expr. Expand the two operands of a binary
6828 expression EXP0 and EXP1 placing the results in OP0 and OP1.
6829 The value may be stored in TARGET if TARGET is nonzero. The
6830 MODIFIER argument is as documented by expand_expr. */
6831
6832 static void
6833 expand_operands (tree exp0, tree exp1, rtx target, rtx *op0, rtx *op1,
6834 enum expand_modifier modifier)
6835 {
6836 if (! safe_from_p (target, exp1, 1))
6837 target = 0;
6838 if (operand_equal_p (exp0, exp1, 0))
6839 {
6840 *op0 = expand_expr (exp0, target, VOIDmode, modifier);
6841 *op1 = copy_rtx (*op0);
6842 }
6843 else
6844 {
6845 /* If we need to preserve evaluation order, copy exp0 into its own
6846 temporary variable so that it can't be clobbered by exp1. */
6847 if (flag_evaluation_order && TREE_SIDE_EFFECTS (exp1))
6848 exp0 = save_expr (exp0);
6849 *op0 = expand_expr (exp0, target, VOIDmode, modifier);
6850 *op1 = expand_expr (exp1, NULL_RTX, VOIDmode, modifier);
6851 }
6852 }
6853
6854 \f
6855 /* Return a MEM that contains constant EXP. DEFER is as for
6856 output_constant_def and MODIFIER is as for expand_expr. */
6857
6858 static rtx
6859 expand_expr_constant (tree exp, int defer, enum expand_modifier modifier)
6860 {
6861 rtx mem;
6862
6863 mem = output_constant_def (exp, defer);
6864 if (modifier != EXPAND_INITIALIZER)
6865 mem = use_anchored_address (mem);
6866 return mem;
6867 }
6868
6869 /* A subroutine of expand_expr_addr_expr. Evaluate the address of EXP.
6870 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
6871
6872 static rtx
6873 expand_expr_addr_expr_1 (tree exp, rtx target, enum machine_mode tmode,
6874 enum expand_modifier modifier, addr_space_t as)
6875 {
6876 rtx result, subtarget;
6877 tree inner, offset;
6878 HOST_WIDE_INT bitsize, bitpos;
6879 int volatilep, unsignedp;
6880 enum machine_mode mode1;
6881
6882 /* If we are taking the address of a constant and are at the top level,
6883 we have to use output_constant_def since we can't call force_const_mem
6884 at top level. */
6885 /* ??? This should be considered a front-end bug. We should not be
6886 generating ADDR_EXPR of something that isn't an LVALUE. The only
6887 exception here is STRING_CST. */
6888 if (CONSTANT_CLASS_P (exp))
6889 return XEXP (expand_expr_constant (exp, 0, modifier), 0);
6890
6891 /* Everything must be something allowed by is_gimple_addressable. */
6892 switch (TREE_CODE (exp))
6893 {
6894 case INDIRECT_REF:
6895 /* This case will happen via recursion for &a->b. */
6896 return expand_expr (TREE_OPERAND (exp, 0), target, tmode, modifier);
6897
6898 case MEM_REF:
6899 {
6900 tree tem = TREE_OPERAND (exp, 0);
6901 if (!integer_zerop (TREE_OPERAND (exp, 1)))
6902 tem = build2 (POINTER_PLUS_EXPR, TREE_TYPE (TREE_OPERAND (exp, 1)),
6903 tem,
6904 double_int_to_tree (sizetype, mem_ref_offset (exp)));
6905 return expand_expr (tem, target, tmode, modifier);
6906 }
6907
6908 case CONST_DECL:
6909 /* Expand the initializer like constants above. */
6910 return XEXP (expand_expr_constant (DECL_INITIAL (exp), 0, modifier), 0);
6911
6912 case REALPART_EXPR:
6913 /* The real part of the complex number is always first, therefore
6914 the address is the same as the address of the parent object. */
6915 offset = 0;
6916 bitpos = 0;
6917 inner = TREE_OPERAND (exp, 0);
6918 break;
6919
6920 case IMAGPART_EXPR:
6921 /* The imaginary part of the complex number is always second.
6922 The expression is therefore always offset by the size of the
6923 scalar type. */
6924 offset = 0;
6925 bitpos = GET_MODE_BITSIZE (TYPE_MODE (TREE_TYPE (exp)));
6926 inner = TREE_OPERAND (exp, 0);
6927 break;
6928
6929 default:
6930 /* If the object is a DECL, then expand it for its rtl. Don't bypass
6931 expand_expr, as that can have various side effects; LABEL_DECLs for
6932 example, may not have their DECL_RTL set yet. Expand the rtl of
6933 CONSTRUCTORs too, which should yield a memory reference for the
6934 constructor's contents. Assume language specific tree nodes can
6935 be expanded in some interesting way. */
6936 gcc_assert (TREE_CODE (exp) < LAST_AND_UNUSED_TREE_CODE);
6937 if (DECL_P (exp)
6938 || TREE_CODE (exp) == CONSTRUCTOR
6939 || TREE_CODE (exp) == COMPOUND_LITERAL_EXPR)
6940 {
6941 result = expand_expr (exp, target, tmode,
6942 modifier == EXPAND_INITIALIZER
6943 ? EXPAND_INITIALIZER : EXPAND_CONST_ADDRESS);
6944
6945 /* If the DECL isn't in memory, then the DECL wasn't properly
6946 marked TREE_ADDRESSABLE, which will be either a front-end
6947 or a tree optimizer bug. */
6948 gcc_assert (MEM_P (result));
6949 result = XEXP (result, 0);
6950
6951 /* ??? Is this needed anymore? */
6952 if (DECL_P (exp) && !TREE_USED (exp) == 0)
6953 {
6954 assemble_external (exp);
6955 TREE_USED (exp) = 1;
6956 }
6957
6958 if (modifier != EXPAND_INITIALIZER
6959 && modifier != EXPAND_CONST_ADDRESS)
6960 result = force_operand (result, target);
6961 return result;
6962 }
6963
6964 /* Pass FALSE as the last argument to get_inner_reference although
6965 we are expanding to RTL. The rationale is that we know how to
6966 handle "aligning nodes" here: we can just bypass them because
6967 they won't change the final object whose address will be returned
6968 (they actually exist only for that purpose). */
6969 inner = get_inner_reference (exp, &bitsize, &bitpos, &offset,
6970 &mode1, &unsignedp, &volatilep, false);
6971 break;
6972 }
6973
6974 /* We must have made progress. */
6975 gcc_assert (inner != exp);
6976
6977 subtarget = offset || bitpos ? NULL_RTX : target;
6978 /* For VIEW_CONVERT_EXPR, where the outer alignment is bigger than
6979 inner alignment, force the inner to be sufficiently aligned. */
6980 if (CONSTANT_CLASS_P (inner)
6981 && TYPE_ALIGN (TREE_TYPE (inner)) < TYPE_ALIGN (TREE_TYPE (exp)))
6982 {
6983 inner = copy_node (inner);
6984 TREE_TYPE (inner) = copy_node (TREE_TYPE (inner));
6985 TYPE_ALIGN (TREE_TYPE (inner)) = TYPE_ALIGN (TREE_TYPE (exp));
6986 TYPE_USER_ALIGN (TREE_TYPE (inner)) = 1;
6987 }
6988 result = expand_expr_addr_expr_1 (inner, subtarget, tmode, modifier, as);
6989
6990 if (offset)
6991 {
6992 rtx tmp;
6993
6994 if (modifier != EXPAND_NORMAL)
6995 result = force_operand (result, NULL);
6996 tmp = expand_expr (offset, NULL_RTX, tmode,
6997 modifier == EXPAND_INITIALIZER
6998 ? EXPAND_INITIALIZER : EXPAND_NORMAL);
6999
7000 result = convert_memory_address_addr_space (tmode, result, as);
7001 tmp = convert_memory_address_addr_space (tmode, tmp, as);
7002
7003 if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
7004 result = simplify_gen_binary (PLUS, tmode, result, tmp);
7005 else
7006 {
7007 subtarget = bitpos ? NULL_RTX : target;
7008 result = expand_simple_binop (tmode, PLUS, result, tmp, subtarget,
7009 1, OPTAB_LIB_WIDEN);
7010 }
7011 }
7012
7013 if (bitpos)
7014 {
7015 /* Someone beforehand should have rejected taking the address
7016 of such an object. */
7017 gcc_assert ((bitpos % BITS_PER_UNIT) == 0);
7018
7019 result = plus_constant (result, bitpos / BITS_PER_UNIT);
7020 if (modifier < EXPAND_SUM)
7021 result = force_operand (result, target);
7022 }
7023
7024 return result;
7025 }
7026
7027 /* A subroutine of expand_expr. Evaluate EXP, which is an ADDR_EXPR.
7028 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
7029
7030 static rtx
7031 expand_expr_addr_expr (tree exp, rtx target, enum machine_mode tmode,
7032 enum expand_modifier modifier)
7033 {
7034 addr_space_t as = ADDR_SPACE_GENERIC;
7035 enum machine_mode address_mode = Pmode;
7036 enum machine_mode pointer_mode = ptr_mode;
7037 enum machine_mode rmode;
7038 rtx result;
7039
7040 /* Target mode of VOIDmode says "whatever's natural". */
7041 if (tmode == VOIDmode)
7042 tmode = TYPE_MODE (TREE_TYPE (exp));
7043
7044 if (POINTER_TYPE_P (TREE_TYPE (exp)))
7045 {
7046 as = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (exp)));
7047 address_mode = targetm.addr_space.address_mode (as);
7048 pointer_mode = targetm.addr_space.pointer_mode (as);
7049 }
7050
7051 /* We can get called with some Weird Things if the user does silliness
7052 like "(short) &a". In that case, convert_memory_address won't do
7053 the right thing, so ignore the given target mode. */
7054 if (tmode != address_mode && tmode != pointer_mode)
7055 tmode = address_mode;
7056
7057 result = expand_expr_addr_expr_1 (TREE_OPERAND (exp, 0), target,
7058 tmode, modifier, as);
7059
7060 /* Despite expand_expr claims concerning ignoring TMODE when not
7061 strictly convenient, stuff breaks if we don't honor it. Note
7062 that combined with the above, we only do this for pointer modes. */
7063 rmode = GET_MODE (result);
7064 if (rmode == VOIDmode)
7065 rmode = tmode;
7066 if (rmode != tmode)
7067 result = convert_memory_address_addr_space (tmode, result, as);
7068
7069 return result;
7070 }
7071
7072 /* Generate code for computing CONSTRUCTOR EXP.
7073 An rtx for the computed value is returned. If AVOID_TEMP_MEM
7074 is TRUE, instead of creating a temporary variable in memory
7075 NULL is returned and the caller needs to handle it differently. */
7076
7077 static rtx
7078 expand_constructor (tree exp, rtx target, enum expand_modifier modifier,
7079 bool avoid_temp_mem)
7080 {
7081 tree type = TREE_TYPE (exp);
7082 enum machine_mode mode = TYPE_MODE (type);
7083
7084 /* Try to avoid creating a temporary at all. This is possible
7085 if all of the initializer is zero.
7086 FIXME: try to handle all [0..255] initializers we can handle
7087 with memset. */
7088 if (TREE_STATIC (exp)
7089 && !TREE_ADDRESSABLE (exp)
7090 && target != 0 && mode == BLKmode
7091 && all_zeros_p (exp))
7092 {
7093 clear_storage (target, expr_size (exp), BLOCK_OP_NORMAL);
7094 return target;
7095 }
7096
7097 /* All elts simple constants => refer to a constant in memory. But
7098 if this is a non-BLKmode mode, let it store a field at a time
7099 since that should make a CONST_INT or CONST_DOUBLE when we
7100 fold. Likewise, if we have a target we can use, it is best to
7101 store directly into the target unless the type is large enough
7102 that memcpy will be used. If we are making an initializer and
7103 all operands are constant, put it in memory as well.
7104
7105 FIXME: Avoid trying to fill vector constructors piece-meal.
7106 Output them with output_constant_def below unless we're sure
7107 they're zeros. This should go away when vector initializers
7108 are treated like VECTOR_CST instead of arrays. */
7109 if ((TREE_STATIC (exp)
7110 && ((mode == BLKmode
7111 && ! (target != 0 && safe_from_p (target, exp, 1)))
7112 || TREE_ADDRESSABLE (exp)
7113 || (host_integerp (TYPE_SIZE_UNIT (type), 1)
7114 && (! MOVE_BY_PIECES_P
7115 (tree_low_cst (TYPE_SIZE_UNIT (type), 1),
7116 TYPE_ALIGN (type)))
7117 && ! mostly_zeros_p (exp))))
7118 || ((modifier == EXPAND_INITIALIZER || modifier == EXPAND_CONST_ADDRESS)
7119 && TREE_CONSTANT (exp)))
7120 {
7121 rtx constructor;
7122
7123 if (avoid_temp_mem)
7124 return NULL_RTX;
7125
7126 constructor = expand_expr_constant (exp, 1, modifier);
7127
7128 if (modifier != EXPAND_CONST_ADDRESS
7129 && modifier != EXPAND_INITIALIZER
7130 && modifier != EXPAND_SUM)
7131 constructor = validize_mem (constructor);
7132
7133 return constructor;
7134 }
7135
7136 /* Handle calls that pass values in multiple non-contiguous
7137 locations. The Irix 6 ABI has examples of this. */
7138 if (target == 0 || ! safe_from_p (target, exp, 1)
7139 || GET_CODE (target) == PARALLEL || modifier == EXPAND_STACK_PARM)
7140 {
7141 if (avoid_temp_mem)
7142 return NULL_RTX;
7143
7144 target
7145 = assign_temp (build_qualified_type (type, (TYPE_QUALS (type)
7146 | (TREE_READONLY (exp)
7147 * TYPE_QUAL_CONST))),
7148 0, TREE_ADDRESSABLE (exp), 1);
7149 }
7150
7151 store_constructor (exp, target, 0, int_expr_size (exp));
7152 return target;
7153 }
7154
7155
7156 /* expand_expr: generate code for computing expression EXP.
7157 An rtx for the computed value is returned. The value is never null.
7158 In the case of a void EXP, const0_rtx is returned.
7159
7160 The value may be stored in TARGET if TARGET is nonzero.
7161 TARGET is just a suggestion; callers must assume that
7162 the rtx returned may not be the same as TARGET.
7163
7164 If TARGET is CONST0_RTX, it means that the value will be ignored.
7165
7166 If TMODE is not VOIDmode, it suggests generating the
7167 result in mode TMODE. But this is done only when convenient.
7168 Otherwise, TMODE is ignored and the value generated in its natural mode.
7169 TMODE is just a suggestion; callers must assume that
7170 the rtx returned may not have mode TMODE.
7171
7172 Note that TARGET may have neither TMODE nor MODE. In that case, it
7173 probably will not be used.
7174
7175 If MODIFIER is EXPAND_SUM then when EXP is an addition
7176 we can return an rtx of the form (MULT (REG ...) (CONST_INT ...))
7177 or a nest of (PLUS ...) and (MINUS ...) where the terms are
7178 products as above, or REG or MEM, or constant.
7179 Ordinarily in such cases we would output mul or add instructions
7180 and then return a pseudo reg containing the sum.
7181
7182 EXPAND_INITIALIZER is much like EXPAND_SUM except that
7183 it also marks a label as absolutely required (it can't be dead).
7184 It also makes a ZERO_EXTEND or SIGN_EXTEND instead of emitting extend insns.
7185 This is used for outputting expressions used in initializers.
7186
7187 EXPAND_CONST_ADDRESS says that it is okay to return a MEM
7188 with a constant address even if that address is not normally legitimate.
7189 EXPAND_INITIALIZER and EXPAND_SUM also have this effect.
7190
7191 EXPAND_STACK_PARM is used when expanding to a TARGET on the stack for
7192 a call parameter. Such targets require special care as we haven't yet
7193 marked TARGET so that it's safe from being trashed by libcalls. We
7194 don't want to use TARGET for anything but the final result;
7195 Intermediate values must go elsewhere. Additionally, calls to
7196 emit_block_move will be flagged with BLOCK_OP_CALL_PARM.
7197
7198 If EXP is a VAR_DECL whose DECL_RTL was a MEM with an invalid
7199 address, and ALT_RTL is non-NULL, then *ALT_RTL is set to the
7200 DECL_RTL of the VAR_DECL. *ALT_RTL is also set if EXP is a
7201 COMPOUND_EXPR whose second argument is such a VAR_DECL, and so on
7202 recursively. */
7203
7204 rtx
7205 expand_expr_real (tree exp, rtx target, enum machine_mode tmode,
7206 enum expand_modifier modifier, rtx *alt_rtl)
7207 {
7208 rtx ret;
7209
7210 /* Handle ERROR_MARK before anybody tries to access its type. */
7211 if (TREE_CODE (exp) == ERROR_MARK
7212 || (TREE_CODE (TREE_TYPE (exp)) == ERROR_MARK))
7213 {
7214 ret = CONST0_RTX (tmode);
7215 return ret ? ret : const0_rtx;
7216 }
7217
7218 /* If this is an expression of some kind and it has an associated line
7219 number, then emit the line number before expanding the expression.
7220
7221 We need to save and restore the file and line information so that
7222 errors discovered during expansion are emitted with the right
7223 information. It would be better of the diagnostic routines
7224 used the file/line information embedded in the tree nodes rather
7225 than globals. */
7226 if (cfun && EXPR_HAS_LOCATION (exp))
7227 {
7228 location_t saved_location = input_location;
7229 location_t saved_curr_loc = get_curr_insn_source_location ();
7230 tree saved_block = get_curr_insn_block ();
7231 input_location = EXPR_LOCATION (exp);
7232 set_curr_insn_source_location (input_location);
7233
7234 /* Record where the insns produced belong. */
7235 set_curr_insn_block (TREE_BLOCK (exp));
7236
7237 ret = expand_expr_real_1 (exp, target, tmode, modifier, alt_rtl);
7238
7239 input_location = saved_location;
7240 set_curr_insn_block (saved_block);
7241 set_curr_insn_source_location (saved_curr_loc);
7242 }
7243 else
7244 {
7245 ret = expand_expr_real_1 (exp, target, tmode, modifier, alt_rtl);
7246 }
7247
7248 return ret;
7249 }
7250
7251 rtx
7252 expand_expr_real_2 (sepops ops, rtx target, enum machine_mode tmode,
7253 enum expand_modifier modifier)
7254 {
7255 rtx op0, op1, op2, temp;
7256 tree type;
7257 int unsignedp;
7258 enum machine_mode mode;
7259 enum tree_code code = ops->code;
7260 optab this_optab;
7261 rtx subtarget, original_target;
7262 int ignore;
7263 bool reduce_bit_field;
7264 location_t loc = ops->location;
7265 tree treeop0, treeop1, treeop2;
7266 #define REDUCE_BIT_FIELD(expr) (reduce_bit_field \
7267 ? reduce_to_bit_field_precision ((expr), \
7268 target, \
7269 type) \
7270 : (expr))
7271
7272 type = ops->type;
7273 mode = TYPE_MODE (type);
7274 unsignedp = TYPE_UNSIGNED (type);
7275
7276 treeop0 = ops->op0;
7277 treeop1 = ops->op1;
7278 treeop2 = ops->op2;
7279
7280 /* We should be called only on simple (binary or unary) expressions,
7281 exactly those that are valid in gimple expressions that aren't
7282 GIMPLE_SINGLE_RHS (or invalid). */
7283 gcc_assert (get_gimple_rhs_class (code) == GIMPLE_UNARY_RHS
7284 || get_gimple_rhs_class (code) == GIMPLE_BINARY_RHS
7285 || get_gimple_rhs_class (code) == GIMPLE_TERNARY_RHS);
7286
7287 ignore = (target == const0_rtx
7288 || ((CONVERT_EXPR_CODE_P (code)
7289 || code == COND_EXPR || code == VIEW_CONVERT_EXPR)
7290 && TREE_CODE (type) == VOID_TYPE));
7291
7292 /* We should be called only if we need the result. */
7293 gcc_assert (!ignore);
7294
7295 /* An operation in what may be a bit-field type needs the
7296 result to be reduced to the precision of the bit-field type,
7297 which is narrower than that of the type's mode. */
7298 reduce_bit_field = (INTEGRAL_TYPE_P (type)
7299 && GET_MODE_PRECISION (mode) > TYPE_PRECISION (type));
7300
7301 if (reduce_bit_field && modifier == EXPAND_STACK_PARM)
7302 target = 0;
7303
7304 /* Use subtarget as the target for operand 0 of a binary operation. */
7305 subtarget = get_subtarget (target);
7306 original_target = target;
7307
7308 switch (code)
7309 {
7310 case NON_LVALUE_EXPR:
7311 case PAREN_EXPR:
7312 CASE_CONVERT:
7313 if (treeop0 == error_mark_node)
7314 return const0_rtx;
7315
7316 if (TREE_CODE (type) == UNION_TYPE)
7317 {
7318 tree valtype = TREE_TYPE (treeop0);
7319
7320 /* If both input and output are BLKmode, this conversion isn't doing
7321 anything except possibly changing memory attribute. */
7322 if (mode == BLKmode && TYPE_MODE (valtype) == BLKmode)
7323 {
7324 rtx result = expand_expr (treeop0, target, tmode,
7325 modifier);
7326
7327 result = copy_rtx (result);
7328 set_mem_attributes (result, type, 0);
7329 return result;
7330 }
7331
7332 if (target == 0)
7333 {
7334 if (TYPE_MODE (type) != BLKmode)
7335 target = gen_reg_rtx (TYPE_MODE (type));
7336 else
7337 target = assign_temp (type, 0, 1, 1);
7338 }
7339
7340 if (MEM_P (target))
7341 /* Store data into beginning of memory target. */
7342 store_expr (treeop0,
7343 adjust_address (target, TYPE_MODE (valtype), 0),
7344 modifier == EXPAND_STACK_PARM,
7345 false);
7346
7347 else
7348 {
7349 gcc_assert (REG_P (target));
7350
7351 /* Store this field into a union of the proper type. */
7352 store_field (target,
7353 MIN ((int_size_in_bytes (TREE_TYPE
7354 (treeop0))
7355 * BITS_PER_UNIT),
7356 (HOST_WIDE_INT) GET_MODE_BITSIZE (mode)),
7357 0, TYPE_MODE (valtype), treeop0,
7358 type, 0, false);
7359 }
7360
7361 /* Return the entire union. */
7362 return target;
7363 }
7364
7365 if (mode == TYPE_MODE (TREE_TYPE (treeop0)))
7366 {
7367 op0 = expand_expr (treeop0, target, VOIDmode,
7368 modifier);
7369
7370 /* If the signedness of the conversion differs and OP0 is
7371 a promoted SUBREG, clear that indication since we now
7372 have to do the proper extension. */
7373 if (TYPE_UNSIGNED (TREE_TYPE (treeop0)) != unsignedp
7374 && GET_CODE (op0) == SUBREG)
7375 SUBREG_PROMOTED_VAR_P (op0) = 0;
7376
7377 return REDUCE_BIT_FIELD (op0);
7378 }
7379
7380 op0 = expand_expr (treeop0, NULL_RTX, mode,
7381 modifier == EXPAND_SUM ? EXPAND_NORMAL : modifier);
7382 if (GET_MODE (op0) == mode)
7383 ;
7384
7385 /* If OP0 is a constant, just convert it into the proper mode. */
7386 else if (CONSTANT_P (op0))
7387 {
7388 tree inner_type = TREE_TYPE (treeop0);
7389 enum machine_mode inner_mode = GET_MODE (op0);
7390
7391 if (inner_mode == VOIDmode)
7392 inner_mode = TYPE_MODE (inner_type);
7393
7394 if (modifier == EXPAND_INITIALIZER)
7395 op0 = simplify_gen_subreg (mode, op0, inner_mode,
7396 subreg_lowpart_offset (mode,
7397 inner_mode));
7398 else
7399 op0= convert_modes (mode, inner_mode, op0,
7400 TYPE_UNSIGNED (inner_type));
7401 }
7402
7403 else if (modifier == EXPAND_INITIALIZER)
7404 op0 = gen_rtx_fmt_e (unsignedp ? ZERO_EXTEND : SIGN_EXTEND, mode, op0);
7405
7406 else if (target == 0)
7407 op0 = convert_to_mode (mode, op0,
7408 TYPE_UNSIGNED (TREE_TYPE
7409 (treeop0)));
7410 else
7411 {
7412 convert_move (target, op0,
7413 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
7414 op0 = target;
7415 }
7416
7417 return REDUCE_BIT_FIELD (op0);
7418
7419 case ADDR_SPACE_CONVERT_EXPR:
7420 {
7421 tree treeop0_type = TREE_TYPE (treeop0);
7422 addr_space_t as_to;
7423 addr_space_t as_from;
7424
7425 gcc_assert (POINTER_TYPE_P (type));
7426 gcc_assert (POINTER_TYPE_P (treeop0_type));
7427
7428 as_to = TYPE_ADDR_SPACE (TREE_TYPE (type));
7429 as_from = TYPE_ADDR_SPACE (TREE_TYPE (treeop0_type));
7430
7431 /* Conversions between pointers to the same address space should
7432 have been implemented via CONVERT_EXPR / NOP_EXPR. */
7433 gcc_assert (as_to != as_from);
7434
7435 /* Ask target code to handle conversion between pointers
7436 to overlapping address spaces. */
7437 if (targetm.addr_space.subset_p (as_to, as_from)
7438 || targetm.addr_space.subset_p (as_from, as_to))
7439 {
7440 op0 = expand_expr (treeop0, NULL_RTX, VOIDmode, modifier);
7441 op0 = targetm.addr_space.convert (op0, treeop0_type, type);
7442 gcc_assert (op0);
7443 return op0;
7444 }
7445
7446 /* For disjoint address spaces, converting anything but
7447 a null pointer invokes undefined behaviour. We simply
7448 always return a null pointer here. */
7449 return CONST0_RTX (mode);
7450 }
7451
7452 case POINTER_PLUS_EXPR:
7453 /* Even though the sizetype mode and the pointer's mode can be different
7454 expand is able to handle this correctly and get the correct result out
7455 of the PLUS_EXPR code. */
7456 /* Make sure to sign-extend the sizetype offset in a POINTER_PLUS_EXPR
7457 if sizetype precision is smaller than pointer precision. */
7458 if (TYPE_PRECISION (sizetype) < TYPE_PRECISION (type))
7459 treeop1 = fold_convert_loc (loc, type,
7460 fold_convert_loc (loc, ssizetype,
7461 treeop1));
7462 case PLUS_EXPR:
7463 /* If we are adding a constant, a VAR_DECL that is sp, fp, or ap, and
7464 something else, make sure we add the register to the constant and
7465 then to the other thing. This case can occur during strength
7466 reduction and doing it this way will produce better code if the
7467 frame pointer or argument pointer is eliminated.
7468
7469 fold-const.c will ensure that the constant is always in the inner
7470 PLUS_EXPR, so the only case we need to do anything about is if
7471 sp, ap, or fp is our second argument, in which case we must swap
7472 the innermost first argument and our second argument. */
7473
7474 if (TREE_CODE (treeop0) == PLUS_EXPR
7475 && TREE_CODE (TREE_OPERAND (treeop0, 1)) == INTEGER_CST
7476 && TREE_CODE (treeop1) == VAR_DECL
7477 && (DECL_RTL (treeop1) == frame_pointer_rtx
7478 || DECL_RTL (treeop1) == stack_pointer_rtx
7479 || DECL_RTL (treeop1) == arg_pointer_rtx))
7480 {
7481 tree t = treeop1;
7482
7483 treeop1 = TREE_OPERAND (treeop0, 0);
7484 TREE_OPERAND (treeop0, 0) = t;
7485 }
7486
7487 /* If the result is to be ptr_mode and we are adding an integer to
7488 something, we might be forming a constant. So try to use
7489 plus_constant. If it produces a sum and we can't accept it,
7490 use force_operand. This allows P = &ARR[const] to generate
7491 efficient code on machines where a SYMBOL_REF is not a valid
7492 address.
7493
7494 If this is an EXPAND_SUM call, always return the sum. */
7495 if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER
7496 || (mode == ptr_mode && (unsignedp || ! flag_trapv)))
7497 {
7498 if (modifier == EXPAND_STACK_PARM)
7499 target = 0;
7500 if (TREE_CODE (treeop0) == INTEGER_CST
7501 && GET_MODE_PRECISION (mode) <= HOST_BITS_PER_WIDE_INT
7502 && TREE_CONSTANT (treeop1))
7503 {
7504 rtx constant_part;
7505
7506 op1 = expand_expr (treeop1, subtarget, VOIDmode,
7507 EXPAND_SUM);
7508 /* Use immed_double_const to ensure that the constant is
7509 truncated according to the mode of OP1, then sign extended
7510 to a HOST_WIDE_INT. Using the constant directly can result
7511 in non-canonical RTL in a 64x32 cross compile. */
7512 constant_part
7513 = immed_double_const (TREE_INT_CST_LOW (treeop0),
7514 (HOST_WIDE_INT) 0,
7515 TYPE_MODE (TREE_TYPE (treeop1)));
7516 op1 = plus_constant (op1, INTVAL (constant_part));
7517 if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
7518 op1 = force_operand (op1, target);
7519 return REDUCE_BIT_FIELD (op1);
7520 }
7521
7522 else if (TREE_CODE (treeop1) == INTEGER_CST
7523 && GET_MODE_PRECISION (mode) <= HOST_BITS_PER_WIDE_INT
7524 && TREE_CONSTANT (treeop0))
7525 {
7526 rtx constant_part;
7527
7528 op0 = expand_expr (treeop0, subtarget, VOIDmode,
7529 (modifier == EXPAND_INITIALIZER
7530 ? EXPAND_INITIALIZER : EXPAND_SUM));
7531 if (! CONSTANT_P (op0))
7532 {
7533 op1 = expand_expr (treeop1, NULL_RTX,
7534 VOIDmode, modifier);
7535 /* Return a PLUS if modifier says it's OK. */
7536 if (modifier == EXPAND_SUM
7537 || modifier == EXPAND_INITIALIZER)
7538 return simplify_gen_binary (PLUS, mode, op0, op1);
7539 goto binop2;
7540 }
7541 /* Use immed_double_const to ensure that the constant is
7542 truncated according to the mode of OP1, then sign extended
7543 to a HOST_WIDE_INT. Using the constant directly can result
7544 in non-canonical RTL in a 64x32 cross compile. */
7545 constant_part
7546 = immed_double_const (TREE_INT_CST_LOW (treeop1),
7547 (HOST_WIDE_INT) 0,
7548 TYPE_MODE (TREE_TYPE (treeop0)));
7549 op0 = plus_constant (op0, INTVAL (constant_part));
7550 if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
7551 op0 = force_operand (op0, target);
7552 return REDUCE_BIT_FIELD (op0);
7553 }
7554 }
7555
7556 /* Use TER to expand pointer addition of a negated value
7557 as pointer subtraction. */
7558 if ((POINTER_TYPE_P (TREE_TYPE (treeop0))
7559 || (TREE_CODE (TREE_TYPE (treeop0)) == VECTOR_TYPE
7560 && POINTER_TYPE_P (TREE_TYPE (TREE_TYPE (treeop0)))))
7561 && TREE_CODE (treeop1) == SSA_NAME
7562 && TYPE_MODE (TREE_TYPE (treeop0))
7563 == TYPE_MODE (TREE_TYPE (treeop1)))
7564 {
7565 gimple def = get_def_for_expr (treeop1, NEGATE_EXPR);
7566 if (def)
7567 {
7568 treeop1 = gimple_assign_rhs1 (def);
7569 code = MINUS_EXPR;
7570 goto do_minus;
7571 }
7572 }
7573
7574 /* No sense saving up arithmetic to be done
7575 if it's all in the wrong mode to form part of an address.
7576 And force_operand won't know whether to sign-extend or
7577 zero-extend. */
7578 if ((modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
7579 || mode != ptr_mode)
7580 {
7581 expand_operands (treeop0, treeop1,
7582 subtarget, &op0, &op1, EXPAND_NORMAL);
7583 if (op0 == const0_rtx)
7584 return op1;
7585 if (op1 == const0_rtx)
7586 return op0;
7587 goto binop2;
7588 }
7589
7590 expand_operands (treeop0, treeop1,
7591 subtarget, &op0, &op1, modifier);
7592 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1));
7593
7594 case MINUS_EXPR:
7595 do_minus:
7596 /* For initializers, we are allowed to return a MINUS of two
7597 symbolic constants. Here we handle all cases when both operands
7598 are constant. */
7599 /* Handle difference of two symbolic constants,
7600 for the sake of an initializer. */
7601 if ((modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
7602 && really_constant_p (treeop0)
7603 && really_constant_p (treeop1))
7604 {
7605 expand_operands (treeop0, treeop1,
7606 NULL_RTX, &op0, &op1, modifier);
7607
7608 /* If the last operand is a CONST_INT, use plus_constant of
7609 the negated constant. Else make the MINUS. */
7610 if (CONST_INT_P (op1))
7611 return REDUCE_BIT_FIELD (plus_constant (op0, - INTVAL (op1)));
7612 else
7613 return REDUCE_BIT_FIELD (gen_rtx_MINUS (mode, op0, op1));
7614 }
7615
7616 /* No sense saving up arithmetic to be done
7617 if it's all in the wrong mode to form part of an address.
7618 And force_operand won't know whether to sign-extend or
7619 zero-extend. */
7620 if ((modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
7621 || mode != ptr_mode)
7622 goto binop;
7623
7624 expand_operands (treeop0, treeop1,
7625 subtarget, &op0, &op1, modifier);
7626
7627 /* Convert A - const to A + (-const). */
7628 if (CONST_INT_P (op1))
7629 {
7630 op1 = negate_rtx (mode, op1);
7631 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1));
7632 }
7633
7634 goto binop2;
7635
7636 case WIDEN_MULT_PLUS_EXPR:
7637 case WIDEN_MULT_MINUS_EXPR:
7638 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
7639 op2 = expand_normal (treeop2);
7640 target = expand_widen_pattern_expr (ops, op0, op1, op2,
7641 target, unsignedp);
7642 return target;
7643
7644 case WIDEN_MULT_EXPR:
7645 /* If first operand is constant, swap them.
7646 Thus the following special case checks need only
7647 check the second operand. */
7648 if (TREE_CODE (treeop0) == INTEGER_CST)
7649 {
7650 tree t1 = treeop0;
7651 treeop0 = treeop1;
7652 treeop1 = t1;
7653 }
7654
7655 /* First, check if we have a multiplication of one signed and one
7656 unsigned operand. */
7657 if (TREE_CODE (treeop1) != INTEGER_CST
7658 && (TYPE_UNSIGNED (TREE_TYPE (treeop0))
7659 != TYPE_UNSIGNED (TREE_TYPE (treeop1))))
7660 {
7661 enum machine_mode innermode = TYPE_MODE (TREE_TYPE (treeop0));
7662 this_optab = usmul_widen_optab;
7663 if (mode == GET_MODE_2XWIDER_MODE (innermode))
7664 {
7665 if (optab_handler (this_optab, mode) != CODE_FOR_nothing)
7666 {
7667 if (TYPE_UNSIGNED (TREE_TYPE (treeop0)))
7668 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1,
7669 EXPAND_NORMAL);
7670 else
7671 expand_operands (treeop0, treeop1, NULL_RTX, &op1, &op0,
7672 EXPAND_NORMAL);
7673 goto binop3;
7674 }
7675 }
7676 }
7677 /* Check for a multiplication with matching signedness. */
7678 else if ((TREE_CODE (treeop1) == INTEGER_CST
7679 && int_fits_type_p (treeop1, TREE_TYPE (treeop0)))
7680 || (TYPE_UNSIGNED (TREE_TYPE (treeop1))
7681 == TYPE_UNSIGNED (TREE_TYPE (treeop0))))
7682 {
7683 tree op0type = TREE_TYPE (treeop0);
7684 enum machine_mode innermode = TYPE_MODE (op0type);
7685 bool zextend_p = TYPE_UNSIGNED (op0type);
7686 optab other_optab = zextend_p ? smul_widen_optab : umul_widen_optab;
7687 this_optab = zextend_p ? umul_widen_optab : smul_widen_optab;
7688
7689 if (mode == GET_MODE_2XWIDER_MODE (innermode)
7690 && TREE_CODE (treeop0) != INTEGER_CST)
7691 {
7692 if (optab_handler (this_optab, mode) != CODE_FOR_nothing)
7693 {
7694 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1,
7695 EXPAND_NORMAL);
7696 temp = expand_widening_mult (mode, op0, op1, target,
7697 unsignedp, this_optab);
7698 return REDUCE_BIT_FIELD (temp);
7699 }
7700 if (optab_handler (other_optab, mode) != CODE_FOR_nothing
7701 && innermode == word_mode)
7702 {
7703 rtx htem, hipart;
7704 op0 = expand_normal (treeop0);
7705 if (TREE_CODE (treeop1) == INTEGER_CST)
7706 op1 = convert_modes (innermode, mode,
7707 expand_normal (treeop1), unsignedp);
7708 else
7709 op1 = expand_normal (treeop1);
7710 temp = expand_binop (mode, other_optab, op0, op1, target,
7711 unsignedp, OPTAB_LIB_WIDEN);
7712 hipart = gen_highpart (innermode, temp);
7713 htem = expand_mult_highpart_adjust (innermode, hipart,
7714 op0, op1, hipart,
7715 zextend_p);
7716 if (htem != hipart)
7717 emit_move_insn (hipart, htem);
7718 return REDUCE_BIT_FIELD (temp);
7719 }
7720 }
7721 }
7722 treeop0 = fold_build1 (CONVERT_EXPR, type, treeop0);
7723 treeop1 = fold_build1 (CONVERT_EXPR, type, treeop1);
7724 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
7725 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, target, unsignedp));
7726
7727 case FMA_EXPR:
7728 {
7729 optab opt = fma_optab;
7730 gimple def0, def2;
7731
7732 /* If there is no insn for FMA, emit it as __builtin_fma{,f,l}
7733 call. */
7734 if (optab_handler (fma_optab, mode) == CODE_FOR_nothing)
7735 {
7736 tree fn = mathfn_built_in (TREE_TYPE (treeop0), BUILT_IN_FMA);
7737 tree call_expr;
7738
7739 gcc_assert (fn != NULL_TREE);
7740 call_expr = build_call_expr (fn, 3, treeop0, treeop1, treeop2);
7741 return expand_builtin (call_expr, target, subtarget, mode, false);
7742 }
7743
7744 def0 = get_def_for_expr (treeop0, NEGATE_EXPR);
7745 def2 = get_def_for_expr (treeop2, NEGATE_EXPR);
7746
7747 op0 = op2 = NULL;
7748
7749 if (def0 && def2
7750 && optab_handler (fnms_optab, mode) != CODE_FOR_nothing)
7751 {
7752 opt = fnms_optab;
7753 op0 = expand_normal (gimple_assign_rhs1 (def0));
7754 op2 = expand_normal (gimple_assign_rhs1 (def2));
7755 }
7756 else if (def0
7757 && optab_handler (fnma_optab, mode) != CODE_FOR_nothing)
7758 {
7759 opt = fnma_optab;
7760 op0 = expand_normal (gimple_assign_rhs1 (def0));
7761 }
7762 else if (def2
7763 && optab_handler (fms_optab, mode) != CODE_FOR_nothing)
7764 {
7765 opt = fms_optab;
7766 op2 = expand_normal (gimple_assign_rhs1 (def2));
7767 }
7768
7769 if (op0 == NULL)
7770 op0 = expand_expr (treeop0, subtarget, VOIDmode, EXPAND_NORMAL);
7771 if (op2 == NULL)
7772 op2 = expand_normal (treeop2);
7773 op1 = expand_normal (treeop1);
7774
7775 return expand_ternary_op (TYPE_MODE (type), opt,
7776 op0, op1, op2, target, 0);
7777 }
7778
7779 case MULT_EXPR:
7780 /* If this is a fixed-point operation, then we cannot use the code
7781 below because "expand_mult" doesn't support sat/no-sat fixed-point
7782 multiplications. */
7783 if (ALL_FIXED_POINT_MODE_P (mode))
7784 goto binop;
7785
7786 /* If first operand is constant, swap them.
7787 Thus the following special case checks need only
7788 check the second operand. */
7789 if (TREE_CODE (treeop0) == INTEGER_CST)
7790 {
7791 tree t1 = treeop0;
7792 treeop0 = treeop1;
7793 treeop1 = t1;
7794 }
7795
7796 /* Attempt to return something suitable for generating an
7797 indexed address, for machines that support that. */
7798
7799 if (modifier == EXPAND_SUM && mode == ptr_mode
7800 && host_integerp (treeop1, 0))
7801 {
7802 tree exp1 = treeop1;
7803
7804 op0 = expand_expr (treeop0, subtarget, VOIDmode,
7805 EXPAND_SUM);
7806
7807 if (!REG_P (op0))
7808 op0 = force_operand (op0, NULL_RTX);
7809 if (!REG_P (op0))
7810 op0 = copy_to_mode_reg (mode, op0);
7811
7812 return REDUCE_BIT_FIELD (gen_rtx_MULT (mode, op0,
7813 gen_int_mode (tree_low_cst (exp1, 0),
7814 TYPE_MODE (TREE_TYPE (exp1)))));
7815 }
7816
7817 if (modifier == EXPAND_STACK_PARM)
7818 target = 0;
7819
7820 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
7821 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, target, unsignedp));
7822
7823 case TRUNC_DIV_EXPR:
7824 case FLOOR_DIV_EXPR:
7825 case CEIL_DIV_EXPR:
7826 case ROUND_DIV_EXPR:
7827 case EXACT_DIV_EXPR:
7828 /* If this is a fixed-point operation, then we cannot use the code
7829 below because "expand_divmod" doesn't support sat/no-sat fixed-point
7830 divisions. */
7831 if (ALL_FIXED_POINT_MODE_P (mode))
7832 goto binop;
7833
7834 if (modifier == EXPAND_STACK_PARM)
7835 target = 0;
7836 /* Possible optimization: compute the dividend with EXPAND_SUM
7837 then if the divisor is constant can optimize the case
7838 where some terms of the dividend have coeffs divisible by it. */
7839 expand_operands (treeop0, treeop1,
7840 subtarget, &op0, &op1, EXPAND_NORMAL);
7841 return expand_divmod (0, code, mode, op0, op1, target, unsignedp);
7842
7843 case RDIV_EXPR:
7844 goto binop;
7845
7846 case TRUNC_MOD_EXPR:
7847 case FLOOR_MOD_EXPR:
7848 case CEIL_MOD_EXPR:
7849 case ROUND_MOD_EXPR:
7850 if (modifier == EXPAND_STACK_PARM)
7851 target = 0;
7852 expand_operands (treeop0, treeop1,
7853 subtarget, &op0, &op1, EXPAND_NORMAL);
7854 return expand_divmod (1, code, mode, op0, op1, target, unsignedp);
7855
7856 case FIXED_CONVERT_EXPR:
7857 op0 = expand_normal (treeop0);
7858 if (target == 0 || modifier == EXPAND_STACK_PARM)
7859 target = gen_reg_rtx (mode);
7860
7861 if ((TREE_CODE (TREE_TYPE (treeop0)) == INTEGER_TYPE
7862 && TYPE_UNSIGNED (TREE_TYPE (treeop0)))
7863 || (TREE_CODE (type) == INTEGER_TYPE && TYPE_UNSIGNED (type)))
7864 expand_fixed_convert (target, op0, 1, TYPE_SATURATING (type));
7865 else
7866 expand_fixed_convert (target, op0, 0, TYPE_SATURATING (type));
7867 return target;
7868
7869 case FIX_TRUNC_EXPR:
7870 op0 = expand_normal (treeop0);
7871 if (target == 0 || modifier == EXPAND_STACK_PARM)
7872 target = gen_reg_rtx (mode);
7873 expand_fix (target, op0, unsignedp);
7874 return target;
7875
7876 case FLOAT_EXPR:
7877 op0 = expand_normal (treeop0);
7878 if (target == 0 || modifier == EXPAND_STACK_PARM)
7879 target = gen_reg_rtx (mode);
7880 /* expand_float can't figure out what to do if FROM has VOIDmode.
7881 So give it the correct mode. With -O, cse will optimize this. */
7882 if (GET_MODE (op0) == VOIDmode)
7883 op0 = copy_to_mode_reg (TYPE_MODE (TREE_TYPE (treeop0)),
7884 op0);
7885 expand_float (target, op0,
7886 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
7887 return target;
7888
7889 case NEGATE_EXPR:
7890 op0 = expand_expr (treeop0, subtarget,
7891 VOIDmode, EXPAND_NORMAL);
7892 if (modifier == EXPAND_STACK_PARM)
7893 target = 0;
7894 temp = expand_unop (mode,
7895 optab_for_tree_code (NEGATE_EXPR, type,
7896 optab_default),
7897 op0, target, 0);
7898 gcc_assert (temp);
7899 return REDUCE_BIT_FIELD (temp);
7900
7901 case ABS_EXPR:
7902 op0 = expand_expr (treeop0, subtarget,
7903 VOIDmode, EXPAND_NORMAL);
7904 if (modifier == EXPAND_STACK_PARM)
7905 target = 0;
7906
7907 /* ABS_EXPR is not valid for complex arguments. */
7908 gcc_assert (GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
7909 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT);
7910
7911 /* Unsigned abs is simply the operand. Testing here means we don't
7912 risk generating incorrect code below. */
7913 if (TYPE_UNSIGNED (type))
7914 return op0;
7915
7916 return expand_abs (mode, op0, target, unsignedp,
7917 safe_from_p (target, treeop0, 1));
7918
7919 case MAX_EXPR:
7920 case MIN_EXPR:
7921 target = original_target;
7922 if (target == 0
7923 || modifier == EXPAND_STACK_PARM
7924 || (MEM_P (target) && MEM_VOLATILE_P (target))
7925 || GET_MODE (target) != mode
7926 || (REG_P (target)
7927 && REGNO (target) < FIRST_PSEUDO_REGISTER))
7928 target = gen_reg_rtx (mode);
7929 expand_operands (treeop0, treeop1,
7930 target, &op0, &op1, EXPAND_NORMAL);
7931
7932 /* First try to do it with a special MIN or MAX instruction.
7933 If that does not win, use a conditional jump to select the proper
7934 value. */
7935 this_optab = optab_for_tree_code (code, type, optab_default);
7936 temp = expand_binop (mode, this_optab, op0, op1, target, unsignedp,
7937 OPTAB_WIDEN);
7938 if (temp != 0)
7939 return temp;
7940
7941 /* At this point, a MEM target is no longer useful; we will get better
7942 code without it. */
7943
7944 if (! REG_P (target))
7945 target = gen_reg_rtx (mode);
7946
7947 /* If op1 was placed in target, swap op0 and op1. */
7948 if (target != op0 && target == op1)
7949 {
7950 temp = op0;
7951 op0 = op1;
7952 op1 = temp;
7953 }
7954
7955 /* We generate better code and avoid problems with op1 mentioning
7956 target by forcing op1 into a pseudo if it isn't a constant. */
7957 if (! CONSTANT_P (op1))
7958 op1 = force_reg (mode, op1);
7959
7960 {
7961 enum rtx_code comparison_code;
7962 rtx cmpop1 = op1;
7963
7964 if (code == MAX_EXPR)
7965 comparison_code = unsignedp ? GEU : GE;
7966 else
7967 comparison_code = unsignedp ? LEU : LE;
7968
7969 /* Canonicalize to comparisons against 0. */
7970 if (op1 == const1_rtx)
7971 {
7972 /* Converting (a >= 1 ? a : 1) into (a > 0 ? a : 1)
7973 or (a != 0 ? a : 1) for unsigned.
7974 For MIN we are safe converting (a <= 1 ? a : 1)
7975 into (a <= 0 ? a : 1) */
7976 cmpop1 = const0_rtx;
7977 if (code == MAX_EXPR)
7978 comparison_code = unsignedp ? NE : GT;
7979 }
7980 if (op1 == constm1_rtx && !unsignedp)
7981 {
7982 /* Converting (a >= -1 ? a : -1) into (a >= 0 ? a : -1)
7983 and (a <= -1 ? a : -1) into (a < 0 ? a : -1) */
7984 cmpop1 = const0_rtx;
7985 if (code == MIN_EXPR)
7986 comparison_code = LT;
7987 }
7988 #ifdef HAVE_conditional_move
7989 /* Use a conditional move if possible. */
7990 if (can_conditionally_move_p (mode))
7991 {
7992 rtx insn;
7993
7994 /* ??? Same problem as in expmed.c: emit_conditional_move
7995 forces a stack adjustment via compare_from_rtx, and we
7996 lose the stack adjustment if the sequence we are about
7997 to create is discarded. */
7998 do_pending_stack_adjust ();
7999
8000 start_sequence ();
8001
8002 /* Try to emit the conditional move. */
8003 insn = emit_conditional_move (target, comparison_code,
8004 op0, cmpop1, mode,
8005 op0, op1, mode,
8006 unsignedp);
8007
8008 /* If we could do the conditional move, emit the sequence,
8009 and return. */
8010 if (insn)
8011 {
8012 rtx seq = get_insns ();
8013 end_sequence ();
8014 emit_insn (seq);
8015 return target;
8016 }
8017
8018 /* Otherwise discard the sequence and fall back to code with
8019 branches. */
8020 end_sequence ();
8021 }
8022 #endif
8023 if (target != op0)
8024 emit_move_insn (target, op0);
8025
8026 temp = gen_label_rtx ();
8027 do_compare_rtx_and_jump (target, cmpop1, comparison_code,
8028 unsignedp, mode, NULL_RTX, NULL_RTX, temp,
8029 -1);
8030 }
8031 emit_move_insn (target, op1);
8032 emit_label (temp);
8033 return target;
8034
8035 case BIT_NOT_EXPR:
8036 op0 = expand_expr (treeop0, subtarget,
8037 VOIDmode, EXPAND_NORMAL);
8038 if (modifier == EXPAND_STACK_PARM)
8039 target = 0;
8040 /* In case we have to reduce the result to bitfield precision
8041 expand this as XOR with a proper constant instead. */
8042 if (reduce_bit_field)
8043 temp = expand_binop (mode, xor_optab, op0,
8044 immed_double_int_const
8045 (double_int_mask (TYPE_PRECISION (type)), mode),
8046 target, 1, OPTAB_LIB_WIDEN);
8047 else
8048 temp = expand_unop (mode, one_cmpl_optab, op0, target, 1);
8049 gcc_assert (temp);
8050 return temp;
8051
8052 /* ??? Can optimize bitwise operations with one arg constant.
8053 Can optimize (a bitwise1 n) bitwise2 (a bitwise3 b)
8054 and (a bitwise1 b) bitwise2 b (etc)
8055 but that is probably not worth while. */
8056
8057 /* BIT_AND_EXPR is for bitwise anding. TRUTH_AND_EXPR is for anding two
8058 boolean values when we want in all cases to compute both of them. In
8059 general it is fastest to do TRUTH_AND_EXPR by computing both operands
8060 as actual zero-or-1 values and then bitwise anding. In cases where
8061 there cannot be any side effects, better code would be made by
8062 treating TRUTH_AND_EXPR like TRUTH_ANDIF_EXPR; but the question is
8063 how to recognize those cases. */
8064
8065 case TRUTH_AND_EXPR:
8066 code = BIT_AND_EXPR;
8067 case BIT_AND_EXPR:
8068 goto binop;
8069
8070 case TRUTH_OR_EXPR:
8071 code = BIT_IOR_EXPR;
8072 case BIT_IOR_EXPR:
8073 goto binop;
8074
8075 case TRUTH_XOR_EXPR:
8076 code = BIT_XOR_EXPR;
8077 case BIT_XOR_EXPR:
8078 goto binop;
8079
8080 case LROTATE_EXPR:
8081 case RROTATE_EXPR:
8082 gcc_assert (VECTOR_MODE_P (TYPE_MODE (type))
8083 || (GET_MODE_PRECISION (TYPE_MODE (type))
8084 == TYPE_PRECISION (type)));
8085 /* fall through */
8086
8087 case LSHIFT_EXPR:
8088 case RSHIFT_EXPR:
8089 /* If this is a fixed-point operation, then we cannot use the code
8090 below because "expand_shift" doesn't support sat/no-sat fixed-point
8091 shifts. */
8092 if (ALL_FIXED_POINT_MODE_P (mode))
8093 goto binop;
8094
8095 if (! safe_from_p (subtarget, treeop1, 1))
8096 subtarget = 0;
8097 if (modifier == EXPAND_STACK_PARM)
8098 target = 0;
8099 op0 = expand_expr (treeop0, subtarget,
8100 VOIDmode, EXPAND_NORMAL);
8101 temp = expand_variable_shift (code, mode, op0, treeop1, target,
8102 unsignedp);
8103 if (code == LSHIFT_EXPR)
8104 temp = REDUCE_BIT_FIELD (temp);
8105 return temp;
8106
8107 /* Could determine the answer when only additive constants differ. Also,
8108 the addition of one can be handled by changing the condition. */
8109 case LT_EXPR:
8110 case LE_EXPR:
8111 case GT_EXPR:
8112 case GE_EXPR:
8113 case EQ_EXPR:
8114 case NE_EXPR:
8115 case UNORDERED_EXPR:
8116 case ORDERED_EXPR:
8117 case UNLT_EXPR:
8118 case UNLE_EXPR:
8119 case UNGT_EXPR:
8120 case UNGE_EXPR:
8121 case UNEQ_EXPR:
8122 case LTGT_EXPR:
8123 temp = do_store_flag (ops,
8124 modifier != EXPAND_STACK_PARM ? target : NULL_RTX,
8125 tmode != VOIDmode ? tmode : mode);
8126 if (temp)
8127 return temp;
8128
8129 /* Use a compare and a jump for BLKmode comparisons, or for function
8130 type comparisons is HAVE_canonicalize_funcptr_for_compare. */
8131
8132 if ((target == 0
8133 || modifier == EXPAND_STACK_PARM
8134 || ! safe_from_p (target, treeop0, 1)
8135 || ! safe_from_p (target, treeop1, 1)
8136 /* Make sure we don't have a hard reg (such as function's return
8137 value) live across basic blocks, if not optimizing. */
8138 || (!optimize && REG_P (target)
8139 && REGNO (target) < FIRST_PSEUDO_REGISTER)))
8140 target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode);
8141
8142 emit_move_insn (target, const0_rtx);
8143
8144 op1 = gen_label_rtx ();
8145 jumpifnot_1 (code, treeop0, treeop1, op1, -1);
8146
8147 if (TYPE_PRECISION (type) == 1 && !TYPE_UNSIGNED (type))
8148 emit_move_insn (target, constm1_rtx);
8149 else
8150 emit_move_insn (target, const1_rtx);
8151
8152 emit_label (op1);
8153 return target;
8154
8155 case TRUTH_NOT_EXPR:
8156 if (modifier == EXPAND_STACK_PARM)
8157 target = 0;
8158 op0 = expand_expr (treeop0, target,
8159 VOIDmode, EXPAND_NORMAL);
8160 /* The parser is careful to generate TRUTH_NOT_EXPR
8161 only with operands that are always zero or one. */
8162 temp = expand_binop (mode, xor_optab, op0, const1_rtx,
8163 target, 1, OPTAB_LIB_WIDEN);
8164 gcc_assert (temp);
8165 return temp;
8166
8167 case COMPLEX_EXPR:
8168 /* Get the rtx code of the operands. */
8169 op0 = expand_normal (treeop0);
8170 op1 = expand_normal (treeop1);
8171
8172 if (!target)
8173 target = gen_reg_rtx (TYPE_MODE (type));
8174
8175 /* Move the real (op0) and imaginary (op1) parts to their location. */
8176 write_complex_part (target, op0, false);
8177 write_complex_part (target, op1, true);
8178
8179 return target;
8180
8181 case WIDEN_SUM_EXPR:
8182 {
8183 tree oprnd0 = treeop0;
8184 tree oprnd1 = treeop1;
8185
8186 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8187 target = expand_widen_pattern_expr (ops, op0, NULL_RTX, op1,
8188 target, unsignedp);
8189 return target;
8190 }
8191
8192 case REDUC_MAX_EXPR:
8193 case REDUC_MIN_EXPR:
8194 case REDUC_PLUS_EXPR:
8195 {
8196 op0 = expand_normal (treeop0);
8197 this_optab = optab_for_tree_code (code, type, optab_default);
8198 temp = expand_unop (mode, this_optab, op0, target, unsignedp);
8199 gcc_assert (temp);
8200 return temp;
8201 }
8202
8203 case VEC_EXTRACT_EVEN_EXPR:
8204 case VEC_EXTRACT_ODD_EXPR:
8205 {
8206 expand_operands (treeop0, treeop1,
8207 NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8208 this_optab = optab_for_tree_code (code, type, optab_default);
8209 temp = expand_binop (mode, this_optab, op0, op1, target, unsignedp,
8210 OPTAB_WIDEN);
8211 gcc_assert (temp);
8212 return temp;
8213 }
8214
8215 case VEC_INTERLEAVE_HIGH_EXPR:
8216 case VEC_INTERLEAVE_LOW_EXPR:
8217 {
8218 expand_operands (treeop0, treeop1,
8219 NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8220 this_optab = optab_for_tree_code (code, type, optab_default);
8221 temp = expand_binop (mode, this_optab, op0, op1, target, unsignedp,
8222 OPTAB_WIDEN);
8223 gcc_assert (temp);
8224 return temp;
8225 }
8226
8227 case VEC_LSHIFT_EXPR:
8228 case VEC_RSHIFT_EXPR:
8229 {
8230 target = expand_vec_shift_expr (ops, target);
8231 return target;
8232 }
8233
8234 case VEC_UNPACK_HI_EXPR:
8235 case VEC_UNPACK_LO_EXPR:
8236 {
8237 op0 = expand_normal (treeop0);
8238 temp = expand_widen_pattern_expr (ops, op0, NULL_RTX, NULL_RTX,
8239 target, unsignedp);
8240 gcc_assert (temp);
8241 return temp;
8242 }
8243
8244 case VEC_UNPACK_FLOAT_HI_EXPR:
8245 case VEC_UNPACK_FLOAT_LO_EXPR:
8246 {
8247 op0 = expand_normal (treeop0);
8248 /* The signedness is determined from input operand. */
8249 temp = expand_widen_pattern_expr
8250 (ops, op0, NULL_RTX, NULL_RTX,
8251 target, TYPE_UNSIGNED (TREE_TYPE (treeop0)));
8252
8253 gcc_assert (temp);
8254 return temp;
8255 }
8256
8257 case VEC_WIDEN_MULT_HI_EXPR:
8258 case VEC_WIDEN_MULT_LO_EXPR:
8259 {
8260 tree oprnd0 = treeop0;
8261 tree oprnd1 = treeop1;
8262
8263 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8264 target = expand_widen_pattern_expr (ops, op0, op1, NULL_RTX,
8265 target, unsignedp);
8266 gcc_assert (target);
8267 return target;
8268 }
8269
8270 case VEC_PACK_TRUNC_EXPR:
8271 case VEC_PACK_SAT_EXPR:
8272 case VEC_PACK_FIX_TRUNC_EXPR:
8273 mode = TYPE_MODE (TREE_TYPE (treeop0));
8274 goto binop;
8275
8276 case DOT_PROD_EXPR:
8277 {
8278 tree oprnd0 = treeop0;
8279 tree oprnd1 = treeop1;
8280 tree oprnd2 = treeop2;
8281 rtx op2;
8282
8283 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8284 op2 = expand_normal (oprnd2);
8285 target = expand_widen_pattern_expr (ops, op0, op1, op2,
8286 target, unsignedp);
8287 return target;
8288 }
8289
8290 case REALIGN_LOAD_EXPR:
8291 {
8292 tree oprnd0 = treeop0;
8293 tree oprnd1 = treeop1;
8294 tree oprnd2 = treeop2;
8295 rtx op2;
8296
8297 this_optab = optab_for_tree_code (code, type, optab_default);
8298 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8299 op2 = expand_normal (oprnd2);
8300 temp = expand_ternary_op (mode, this_optab, op0, op1, op2,
8301 target, unsignedp);
8302 gcc_assert (temp);
8303 return temp;
8304 }
8305
8306 default:
8307 gcc_unreachable ();
8308 }
8309
8310 /* Here to do an ordinary binary operator. */
8311 binop:
8312 expand_operands (treeop0, treeop1,
8313 subtarget, &op0, &op1, EXPAND_NORMAL);
8314 binop2:
8315 this_optab = optab_for_tree_code (code, type, optab_default);
8316 binop3:
8317 if (modifier == EXPAND_STACK_PARM)
8318 target = 0;
8319 temp = expand_binop (mode, this_optab, op0, op1, target,
8320 unsignedp, OPTAB_LIB_WIDEN);
8321 gcc_assert (temp);
8322 return REDUCE_BIT_FIELD (temp);
8323 }
8324 #undef REDUCE_BIT_FIELD
8325
8326 rtx
8327 expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode,
8328 enum expand_modifier modifier, rtx *alt_rtl)
8329 {
8330 rtx op0, op1, temp, decl_rtl;
8331 tree type;
8332 int unsignedp;
8333 enum machine_mode mode;
8334 enum tree_code code = TREE_CODE (exp);
8335 rtx subtarget, original_target;
8336 int ignore;
8337 tree context;
8338 bool reduce_bit_field;
8339 location_t loc = EXPR_LOCATION (exp);
8340 struct separate_ops ops;
8341 tree treeop0, treeop1, treeop2;
8342 tree ssa_name = NULL_TREE;
8343 gimple g;
8344
8345 type = TREE_TYPE (exp);
8346 mode = TYPE_MODE (type);
8347 unsignedp = TYPE_UNSIGNED (type);
8348
8349 treeop0 = treeop1 = treeop2 = NULL_TREE;
8350 if (!VL_EXP_CLASS_P (exp))
8351 switch (TREE_CODE_LENGTH (code))
8352 {
8353 default:
8354 case 3: treeop2 = TREE_OPERAND (exp, 2);
8355 case 2: treeop1 = TREE_OPERAND (exp, 1);
8356 case 1: treeop0 = TREE_OPERAND (exp, 0);
8357 case 0: break;
8358 }
8359 ops.code = code;
8360 ops.type = type;
8361 ops.op0 = treeop0;
8362 ops.op1 = treeop1;
8363 ops.op2 = treeop2;
8364 ops.location = loc;
8365
8366 ignore = (target == const0_rtx
8367 || ((CONVERT_EXPR_CODE_P (code)
8368 || code == COND_EXPR || code == VIEW_CONVERT_EXPR)
8369 && TREE_CODE (type) == VOID_TYPE));
8370
8371 /* An operation in what may be a bit-field type needs the
8372 result to be reduced to the precision of the bit-field type,
8373 which is narrower than that of the type's mode. */
8374 reduce_bit_field = (!ignore
8375 && INTEGRAL_TYPE_P (type)
8376 && GET_MODE_PRECISION (mode) > TYPE_PRECISION (type));
8377
8378 /* If we are going to ignore this result, we need only do something
8379 if there is a side-effect somewhere in the expression. If there
8380 is, short-circuit the most common cases here. Note that we must
8381 not call expand_expr with anything but const0_rtx in case this
8382 is an initial expansion of a size that contains a PLACEHOLDER_EXPR. */
8383
8384 if (ignore)
8385 {
8386 if (! TREE_SIDE_EFFECTS (exp))
8387 return const0_rtx;
8388
8389 /* Ensure we reference a volatile object even if value is ignored, but
8390 don't do this if all we are doing is taking its address. */
8391 if (TREE_THIS_VOLATILE (exp)
8392 && TREE_CODE (exp) != FUNCTION_DECL
8393 && mode != VOIDmode && mode != BLKmode
8394 && modifier != EXPAND_CONST_ADDRESS)
8395 {
8396 temp = expand_expr (exp, NULL_RTX, VOIDmode, modifier);
8397 if (MEM_P (temp))
8398 copy_to_reg (temp);
8399 return const0_rtx;
8400 }
8401
8402 if (TREE_CODE_CLASS (code) == tcc_unary
8403 || code == COMPONENT_REF || code == INDIRECT_REF)
8404 return expand_expr (treeop0, const0_rtx, VOIDmode,
8405 modifier);
8406
8407 else if (TREE_CODE_CLASS (code) == tcc_binary
8408 || TREE_CODE_CLASS (code) == tcc_comparison
8409 || code == ARRAY_REF || code == ARRAY_RANGE_REF)
8410 {
8411 expand_expr (treeop0, const0_rtx, VOIDmode, modifier);
8412 expand_expr (treeop1, const0_rtx, VOIDmode, modifier);
8413 return const0_rtx;
8414 }
8415 else if (code == BIT_FIELD_REF)
8416 {
8417 expand_expr (treeop0, const0_rtx, VOIDmode, modifier);
8418 expand_expr (treeop1, const0_rtx, VOIDmode, modifier);
8419 expand_expr (treeop2, const0_rtx, VOIDmode, modifier);
8420 return const0_rtx;
8421 }
8422
8423 target = 0;
8424 }
8425
8426 if (reduce_bit_field && modifier == EXPAND_STACK_PARM)
8427 target = 0;
8428
8429 /* Use subtarget as the target for operand 0 of a binary operation. */
8430 subtarget = get_subtarget (target);
8431 original_target = target;
8432
8433 switch (code)
8434 {
8435 case LABEL_DECL:
8436 {
8437 tree function = decl_function_context (exp);
8438
8439 temp = label_rtx (exp);
8440 temp = gen_rtx_LABEL_REF (Pmode, temp);
8441
8442 if (function != current_function_decl
8443 && function != 0)
8444 LABEL_REF_NONLOCAL_P (temp) = 1;
8445
8446 temp = gen_rtx_MEM (FUNCTION_MODE, temp);
8447 return temp;
8448 }
8449
8450 case SSA_NAME:
8451 /* ??? ivopts calls expander, without any preparation from
8452 out-of-ssa. So fake instructions as if this was an access to the
8453 base variable. This unnecessarily allocates a pseudo, see how we can
8454 reuse it, if partition base vars have it set already. */
8455 if (!currently_expanding_to_rtl)
8456 return expand_expr_real_1 (SSA_NAME_VAR (exp), target, tmode, modifier,
8457 NULL);
8458
8459 g = get_gimple_for_ssa_name (exp);
8460 /* For EXPAND_INITIALIZER try harder to get something simpler. */
8461 if (g == NULL
8462 && modifier == EXPAND_INITIALIZER
8463 && !SSA_NAME_IS_DEFAULT_DEF (exp)
8464 && (optimize || DECL_IGNORED_P (SSA_NAME_VAR (exp)))
8465 && stmt_is_replaceable_p (SSA_NAME_DEF_STMT (exp)))
8466 g = SSA_NAME_DEF_STMT (exp);
8467 if (g)
8468 return expand_expr_real (gimple_assign_rhs_to_tree (g), target, tmode,
8469 modifier, NULL);
8470
8471 ssa_name = exp;
8472 decl_rtl = get_rtx_for_ssa_name (ssa_name);
8473 exp = SSA_NAME_VAR (ssa_name);
8474 goto expand_decl_rtl;
8475
8476 case PARM_DECL:
8477 case VAR_DECL:
8478 /* If a static var's type was incomplete when the decl was written,
8479 but the type is complete now, lay out the decl now. */
8480 if (DECL_SIZE (exp) == 0
8481 && COMPLETE_OR_UNBOUND_ARRAY_TYPE_P (TREE_TYPE (exp))
8482 && (TREE_STATIC (exp) || DECL_EXTERNAL (exp)))
8483 layout_decl (exp, 0);
8484
8485 /* ... fall through ... */
8486
8487 case FUNCTION_DECL:
8488 case RESULT_DECL:
8489 decl_rtl = DECL_RTL (exp);
8490 expand_decl_rtl:
8491 gcc_assert (decl_rtl);
8492 decl_rtl = copy_rtx (decl_rtl);
8493 /* Record writes to register variables. */
8494 if (modifier == EXPAND_WRITE
8495 && REG_P (decl_rtl)
8496 && HARD_REGISTER_P (decl_rtl))
8497 add_to_hard_reg_set (&crtl->asm_clobbers,
8498 GET_MODE (decl_rtl), REGNO (decl_rtl));
8499
8500 /* Ensure variable marked as used even if it doesn't go through
8501 a parser. If it hasn't be used yet, write out an external
8502 definition. */
8503 if (! TREE_USED (exp))
8504 {
8505 assemble_external (exp);
8506 TREE_USED (exp) = 1;
8507 }
8508
8509 /* Show we haven't gotten RTL for this yet. */
8510 temp = 0;
8511
8512 /* Variables inherited from containing functions should have
8513 been lowered by this point. */
8514 context = decl_function_context (exp);
8515 gcc_assert (!context
8516 || context == current_function_decl
8517 || TREE_STATIC (exp)
8518 || DECL_EXTERNAL (exp)
8519 /* ??? C++ creates functions that are not TREE_STATIC. */
8520 || TREE_CODE (exp) == FUNCTION_DECL);
8521
8522 /* This is the case of an array whose size is to be determined
8523 from its initializer, while the initializer is still being parsed.
8524 See expand_decl. */
8525
8526 if (MEM_P (decl_rtl) && REG_P (XEXP (decl_rtl, 0)))
8527 temp = validize_mem (decl_rtl);
8528
8529 /* If DECL_RTL is memory, we are in the normal case and the
8530 address is not valid, get the address into a register. */
8531
8532 else if (MEM_P (decl_rtl) && modifier != EXPAND_INITIALIZER)
8533 {
8534 if (alt_rtl)
8535 *alt_rtl = decl_rtl;
8536 decl_rtl = use_anchored_address (decl_rtl);
8537 if (modifier != EXPAND_CONST_ADDRESS
8538 && modifier != EXPAND_SUM
8539 && !memory_address_addr_space_p (DECL_MODE (exp),
8540 XEXP (decl_rtl, 0),
8541 MEM_ADDR_SPACE (decl_rtl)))
8542 temp = replace_equiv_address (decl_rtl,
8543 copy_rtx (XEXP (decl_rtl, 0)));
8544 }
8545
8546 /* If we got something, return it. But first, set the alignment
8547 if the address is a register. */
8548 if (temp != 0)
8549 {
8550 if (MEM_P (temp) && REG_P (XEXP (temp, 0)))
8551 mark_reg_pointer (XEXP (temp, 0), DECL_ALIGN (exp));
8552
8553 return temp;
8554 }
8555
8556 /* If the mode of DECL_RTL does not match that of the decl, it
8557 must be a promoted value. We return a SUBREG of the wanted mode,
8558 but mark it so that we know that it was already extended. */
8559 if (REG_P (decl_rtl) && GET_MODE (decl_rtl) != DECL_MODE (exp))
8560 {
8561 enum machine_mode pmode;
8562
8563 /* Get the signedness to be used for this variable. Ensure we get
8564 the same mode we got when the variable was declared. */
8565 if (code == SSA_NAME
8566 && (g = SSA_NAME_DEF_STMT (ssa_name))
8567 && gimple_code (g) == GIMPLE_CALL)
8568 {
8569 gcc_assert (!gimple_call_internal_p (g));
8570 pmode = promote_function_mode (type, mode, &unsignedp,
8571 gimple_call_fntype (g),
8572 2);
8573 }
8574 else
8575 pmode = promote_decl_mode (exp, &unsignedp);
8576 gcc_assert (GET_MODE (decl_rtl) == pmode);
8577
8578 temp = gen_lowpart_SUBREG (mode, decl_rtl);
8579 SUBREG_PROMOTED_VAR_P (temp) = 1;
8580 SUBREG_PROMOTED_UNSIGNED_SET (temp, unsignedp);
8581 return temp;
8582 }
8583
8584 return decl_rtl;
8585
8586 case INTEGER_CST:
8587 temp = immed_double_const (TREE_INT_CST_LOW (exp),
8588 TREE_INT_CST_HIGH (exp), mode);
8589
8590 return temp;
8591
8592 case VECTOR_CST:
8593 {
8594 tree tmp = NULL_TREE;
8595 if (GET_MODE_CLASS (mode) == MODE_VECTOR_INT
8596 || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT
8597 || GET_MODE_CLASS (mode) == MODE_VECTOR_FRACT
8598 || GET_MODE_CLASS (mode) == MODE_VECTOR_UFRACT
8599 || GET_MODE_CLASS (mode) == MODE_VECTOR_ACCUM
8600 || GET_MODE_CLASS (mode) == MODE_VECTOR_UACCUM)
8601 return const_vector_from_tree (exp);
8602 if (GET_MODE_CLASS (mode) == MODE_INT)
8603 {
8604 tree type_for_mode = lang_hooks.types.type_for_mode (mode, 1);
8605 if (type_for_mode)
8606 tmp = fold_unary_loc (loc, VIEW_CONVERT_EXPR, type_for_mode, exp);
8607 }
8608 if (!tmp)
8609 tmp = build_constructor_from_list (type,
8610 TREE_VECTOR_CST_ELTS (exp));
8611 return expand_expr (tmp, ignore ? const0_rtx : target,
8612 tmode, modifier);
8613 }
8614
8615 case CONST_DECL:
8616 return expand_expr (DECL_INITIAL (exp), target, VOIDmode, modifier);
8617
8618 case REAL_CST:
8619 /* If optimized, generate immediate CONST_DOUBLE
8620 which will be turned into memory by reload if necessary.
8621
8622 We used to force a register so that loop.c could see it. But
8623 this does not allow gen_* patterns to perform optimizations with
8624 the constants. It also produces two insns in cases like "x = 1.0;".
8625 On most machines, floating-point constants are not permitted in
8626 many insns, so we'd end up copying it to a register in any case.
8627
8628 Now, we do the copying in expand_binop, if appropriate. */
8629 return CONST_DOUBLE_FROM_REAL_VALUE (TREE_REAL_CST (exp),
8630 TYPE_MODE (TREE_TYPE (exp)));
8631
8632 case FIXED_CST:
8633 return CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (exp),
8634 TYPE_MODE (TREE_TYPE (exp)));
8635
8636 case COMPLEX_CST:
8637 /* Handle evaluating a complex constant in a CONCAT target. */
8638 if (original_target && GET_CODE (original_target) == CONCAT)
8639 {
8640 enum machine_mode mode = TYPE_MODE (TREE_TYPE (TREE_TYPE (exp)));
8641 rtx rtarg, itarg;
8642
8643 rtarg = XEXP (original_target, 0);
8644 itarg = XEXP (original_target, 1);
8645
8646 /* Move the real and imaginary parts separately. */
8647 op0 = expand_expr (TREE_REALPART (exp), rtarg, mode, EXPAND_NORMAL);
8648 op1 = expand_expr (TREE_IMAGPART (exp), itarg, mode, EXPAND_NORMAL);
8649
8650 if (op0 != rtarg)
8651 emit_move_insn (rtarg, op0);
8652 if (op1 != itarg)
8653 emit_move_insn (itarg, op1);
8654
8655 return original_target;
8656 }
8657
8658 /* ... fall through ... */
8659
8660 case STRING_CST:
8661 temp = expand_expr_constant (exp, 1, modifier);
8662
8663 /* temp contains a constant address.
8664 On RISC machines where a constant address isn't valid,
8665 make some insns to get that address into a register. */
8666 if (modifier != EXPAND_CONST_ADDRESS
8667 && modifier != EXPAND_INITIALIZER
8668 && modifier != EXPAND_SUM
8669 && ! memory_address_addr_space_p (mode, XEXP (temp, 0),
8670 MEM_ADDR_SPACE (temp)))
8671 return replace_equiv_address (temp,
8672 copy_rtx (XEXP (temp, 0)));
8673 return temp;
8674
8675 case SAVE_EXPR:
8676 {
8677 tree val = treeop0;
8678 rtx ret = expand_expr_real_1 (val, target, tmode, modifier, alt_rtl);
8679
8680 if (!SAVE_EXPR_RESOLVED_P (exp))
8681 {
8682 /* We can indeed still hit this case, typically via builtin
8683 expanders calling save_expr immediately before expanding
8684 something. Assume this means that we only have to deal
8685 with non-BLKmode values. */
8686 gcc_assert (GET_MODE (ret) != BLKmode);
8687
8688 val = build_decl (EXPR_LOCATION (exp),
8689 VAR_DECL, NULL, TREE_TYPE (exp));
8690 DECL_ARTIFICIAL (val) = 1;
8691 DECL_IGNORED_P (val) = 1;
8692 treeop0 = val;
8693 TREE_OPERAND (exp, 0) = treeop0;
8694 SAVE_EXPR_RESOLVED_P (exp) = 1;
8695
8696 if (!CONSTANT_P (ret))
8697 ret = copy_to_reg (ret);
8698 SET_DECL_RTL (val, ret);
8699 }
8700
8701 return ret;
8702 }
8703
8704
8705 case CONSTRUCTOR:
8706 /* If we don't need the result, just ensure we evaluate any
8707 subexpressions. */
8708 if (ignore)
8709 {
8710 unsigned HOST_WIDE_INT idx;
8711 tree value;
8712
8713 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value)
8714 expand_expr (value, const0_rtx, VOIDmode, EXPAND_NORMAL);
8715
8716 return const0_rtx;
8717 }
8718
8719 return expand_constructor (exp, target, modifier, false);
8720
8721 case TARGET_MEM_REF:
8722 {
8723 addr_space_t as = TYPE_ADDR_SPACE (TREE_TYPE (exp));
8724 struct mem_address addr;
8725 enum insn_code icode;
8726 int align;
8727
8728 get_address_description (exp, &addr);
8729 op0 = addr_for_mem_ref (&addr, as, true);
8730 op0 = memory_address_addr_space (mode, op0, as);
8731 temp = gen_rtx_MEM (mode, op0);
8732 set_mem_attributes (temp, exp, 0);
8733 set_mem_addr_space (temp, as);
8734 align = MAX (TYPE_ALIGN (TREE_TYPE (exp)),
8735 get_object_alignment (exp, BIGGEST_ALIGNMENT));
8736 if (mode != BLKmode
8737 && (unsigned) align < GET_MODE_ALIGNMENT (mode)
8738 /* If the target does not have special handling for unaligned
8739 loads of mode then it can use regular moves for them. */
8740 && ((icode = optab_handler (movmisalign_optab, mode))
8741 != CODE_FOR_nothing))
8742 {
8743 struct expand_operand ops[2];
8744
8745 /* We've already validated the memory, and we're creating a
8746 new pseudo destination. The predicates really can't fail,
8747 nor can the generator. */
8748 create_output_operand (&ops[0], NULL_RTX, mode);
8749 create_fixed_operand (&ops[1], temp);
8750 expand_insn (icode, 2, ops);
8751 return ops[0].value;
8752 }
8753 return temp;
8754 }
8755
8756 case MEM_REF:
8757 {
8758 addr_space_t as
8759 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 1))));
8760 enum machine_mode address_mode;
8761 tree base = TREE_OPERAND (exp, 0);
8762 gimple def_stmt;
8763 enum insn_code icode;
8764 int align;
8765 /* Handle expansion of non-aliased memory with non-BLKmode. That
8766 might end up in a register. */
8767 if (TREE_CODE (base) == ADDR_EXPR)
8768 {
8769 HOST_WIDE_INT offset = mem_ref_offset (exp).low;
8770 tree bit_offset;
8771 base = TREE_OPERAND (base, 0);
8772 if (!DECL_P (base))
8773 {
8774 HOST_WIDE_INT off;
8775 base = get_addr_base_and_unit_offset (base, &off);
8776 gcc_assert (base);
8777 offset += off;
8778 }
8779 /* If we are expanding a MEM_REF of a non-BLKmode non-addressable
8780 decl we must use bitfield operations. */
8781 if (DECL_P (base)
8782 && !TREE_ADDRESSABLE (base)
8783 && DECL_MODE (base) != BLKmode
8784 && DECL_RTL_SET_P (base)
8785 && !MEM_P (DECL_RTL (base)))
8786 {
8787 tree bftype;
8788 if (offset == 0
8789 && host_integerp (TYPE_SIZE (TREE_TYPE (exp)), 1)
8790 && (GET_MODE_BITSIZE (DECL_MODE (base))
8791 == TREE_INT_CST_LOW (TYPE_SIZE (TREE_TYPE (exp)))))
8792 return expand_expr (build1 (VIEW_CONVERT_EXPR,
8793 TREE_TYPE (exp), base),
8794 target, tmode, modifier);
8795 bit_offset = bitsize_int (offset * BITS_PER_UNIT);
8796 bftype = TREE_TYPE (base);
8797 if (TYPE_MODE (TREE_TYPE (exp)) != BLKmode)
8798 bftype = TREE_TYPE (exp);
8799 return expand_expr (build3 (BIT_FIELD_REF, bftype,
8800 base,
8801 TYPE_SIZE (TREE_TYPE (exp)),
8802 bit_offset),
8803 target, tmode, modifier);
8804 }
8805 }
8806 address_mode = targetm.addr_space.address_mode (as);
8807 base = TREE_OPERAND (exp, 0);
8808 if ((def_stmt = get_def_for_expr (base, BIT_AND_EXPR)))
8809 {
8810 tree mask = gimple_assign_rhs2 (def_stmt);
8811 base = build2 (BIT_AND_EXPR, TREE_TYPE (base),
8812 gimple_assign_rhs1 (def_stmt), mask);
8813 TREE_OPERAND (exp, 0) = base;
8814 }
8815 align = MAX (TYPE_ALIGN (TREE_TYPE (exp)),
8816 get_object_alignment (exp, BIGGEST_ALIGNMENT));
8817 op0 = expand_expr (base, NULL_RTX, VOIDmode, EXPAND_SUM);
8818 op0 = memory_address_addr_space (address_mode, op0, as);
8819 if (!integer_zerop (TREE_OPERAND (exp, 1)))
8820 {
8821 rtx off
8822 = immed_double_int_const (mem_ref_offset (exp), address_mode);
8823 op0 = simplify_gen_binary (PLUS, address_mode, op0, off);
8824 }
8825 op0 = memory_address_addr_space (mode, op0, as);
8826 temp = gen_rtx_MEM (mode, op0);
8827 set_mem_attributes (temp, exp, 0);
8828 set_mem_addr_space (temp, as);
8829 if (TREE_THIS_VOLATILE (exp))
8830 MEM_VOLATILE_P (temp) = 1;
8831 if (mode != BLKmode
8832 && (unsigned) align < GET_MODE_ALIGNMENT (mode)
8833 /* If the target does not have special handling for unaligned
8834 loads of mode then it can use regular moves for them. */
8835 && ((icode = optab_handler (movmisalign_optab, mode))
8836 != CODE_FOR_nothing))
8837 {
8838 struct expand_operand ops[2];
8839
8840 /* We've already validated the memory, and we're creating a
8841 new pseudo destination. The predicates really can't fail,
8842 nor can the generator. */
8843 create_output_operand (&ops[0], NULL_RTX, mode);
8844 create_fixed_operand (&ops[1], temp);
8845 expand_insn (icode, 2, ops);
8846 return ops[0].value;
8847 }
8848 return temp;
8849 }
8850
8851 case ARRAY_REF:
8852
8853 {
8854 tree array = treeop0;
8855 tree index = treeop1;
8856
8857 /* Fold an expression like: "foo"[2].
8858 This is not done in fold so it won't happen inside &.
8859 Don't fold if this is for wide characters since it's too
8860 difficult to do correctly and this is a very rare case. */
8861
8862 if (modifier != EXPAND_CONST_ADDRESS
8863 && modifier != EXPAND_INITIALIZER
8864 && modifier != EXPAND_MEMORY)
8865 {
8866 tree t = fold_read_from_constant_string (exp);
8867
8868 if (t)
8869 return expand_expr (t, target, tmode, modifier);
8870 }
8871
8872 /* If this is a constant index into a constant array,
8873 just get the value from the array. Handle both the cases when
8874 we have an explicit constructor and when our operand is a variable
8875 that was declared const. */
8876
8877 if (modifier != EXPAND_CONST_ADDRESS
8878 && modifier != EXPAND_INITIALIZER
8879 && modifier != EXPAND_MEMORY
8880 && TREE_CODE (array) == CONSTRUCTOR
8881 && ! TREE_SIDE_EFFECTS (array)
8882 && TREE_CODE (index) == INTEGER_CST)
8883 {
8884 unsigned HOST_WIDE_INT ix;
8885 tree field, value;
8886
8887 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (array), ix,
8888 field, value)
8889 if (tree_int_cst_equal (field, index))
8890 {
8891 if (!TREE_SIDE_EFFECTS (value))
8892 return expand_expr (fold (value), target, tmode, modifier);
8893 break;
8894 }
8895 }
8896
8897 else if (optimize >= 1
8898 && modifier != EXPAND_CONST_ADDRESS
8899 && modifier != EXPAND_INITIALIZER
8900 && modifier != EXPAND_MEMORY
8901 && TREE_READONLY (array) && ! TREE_SIDE_EFFECTS (array)
8902 && TREE_CODE (array) == VAR_DECL && DECL_INITIAL (array)
8903 && TREE_CODE (DECL_INITIAL (array)) != ERROR_MARK
8904 && const_value_known_p (array))
8905 {
8906 if (TREE_CODE (index) == INTEGER_CST)
8907 {
8908 tree init = DECL_INITIAL (array);
8909
8910 if (TREE_CODE (init) == CONSTRUCTOR)
8911 {
8912 unsigned HOST_WIDE_INT ix;
8913 tree field, value;
8914
8915 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (init), ix,
8916 field, value)
8917 if (tree_int_cst_equal (field, index))
8918 {
8919 if (TREE_SIDE_EFFECTS (value))
8920 break;
8921
8922 if (TREE_CODE (value) == CONSTRUCTOR)
8923 {
8924 /* If VALUE is a CONSTRUCTOR, this
8925 optimization is only useful if
8926 this doesn't store the CONSTRUCTOR
8927 into memory. If it does, it is more
8928 efficient to just load the data from
8929 the array directly. */
8930 rtx ret = expand_constructor (value, target,
8931 modifier, true);
8932 if (ret == NULL_RTX)
8933 break;
8934 }
8935
8936 return expand_expr (fold (value), target, tmode,
8937 modifier);
8938 }
8939 }
8940 else if(TREE_CODE (init) == STRING_CST)
8941 {
8942 tree index1 = index;
8943 tree low_bound = array_ref_low_bound (exp);
8944 index1 = fold_convert_loc (loc, sizetype,
8945 treeop1);
8946
8947 /* Optimize the special-case of a zero lower bound.
8948
8949 We convert the low_bound to sizetype to avoid some problems
8950 with constant folding. (E.g. suppose the lower bound is 1,
8951 and its mode is QI. Without the conversion,l (ARRAY
8952 +(INDEX-(unsigned char)1)) becomes ((ARRAY+(-(unsigned char)1))
8953 +INDEX), which becomes (ARRAY+255+INDEX). Opps!) */
8954
8955 if (! integer_zerop (low_bound))
8956 index1 = size_diffop_loc (loc, index1,
8957 fold_convert_loc (loc, sizetype,
8958 low_bound));
8959
8960 if (0 > compare_tree_int (index1,
8961 TREE_STRING_LENGTH (init)))
8962 {
8963 tree type = TREE_TYPE (TREE_TYPE (init));
8964 enum machine_mode mode = TYPE_MODE (type);
8965
8966 if (GET_MODE_CLASS (mode) == MODE_INT
8967 && GET_MODE_SIZE (mode) == 1)
8968 return gen_int_mode (TREE_STRING_POINTER (init)
8969 [TREE_INT_CST_LOW (index1)],
8970 mode);
8971 }
8972 }
8973 }
8974 }
8975 }
8976 goto normal_inner_ref;
8977
8978 case COMPONENT_REF:
8979 /* If the operand is a CONSTRUCTOR, we can just extract the
8980 appropriate field if it is present. */
8981 if (TREE_CODE (treeop0) == CONSTRUCTOR)
8982 {
8983 unsigned HOST_WIDE_INT idx;
8984 tree field, value;
8985
8986 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (treeop0),
8987 idx, field, value)
8988 if (field == treeop1
8989 /* We can normally use the value of the field in the
8990 CONSTRUCTOR. However, if this is a bitfield in
8991 an integral mode that we can fit in a HOST_WIDE_INT,
8992 we must mask only the number of bits in the bitfield,
8993 since this is done implicitly by the constructor. If
8994 the bitfield does not meet either of those conditions,
8995 we can't do this optimization. */
8996 && (! DECL_BIT_FIELD (field)
8997 || ((GET_MODE_CLASS (DECL_MODE (field)) == MODE_INT)
8998 && (GET_MODE_PRECISION (DECL_MODE (field))
8999 <= HOST_BITS_PER_WIDE_INT))))
9000 {
9001 if (DECL_BIT_FIELD (field)
9002 && modifier == EXPAND_STACK_PARM)
9003 target = 0;
9004 op0 = expand_expr (value, target, tmode, modifier);
9005 if (DECL_BIT_FIELD (field))
9006 {
9007 HOST_WIDE_INT bitsize = TREE_INT_CST_LOW (DECL_SIZE (field));
9008 enum machine_mode imode = TYPE_MODE (TREE_TYPE (field));
9009
9010 if (TYPE_UNSIGNED (TREE_TYPE (field)))
9011 {
9012 op1 = GEN_INT (((HOST_WIDE_INT) 1 << bitsize) - 1);
9013 op0 = expand_and (imode, op0, op1, target);
9014 }
9015 else
9016 {
9017 int count = GET_MODE_PRECISION (imode) - bitsize;
9018
9019 op0 = expand_shift (LSHIFT_EXPR, imode, op0, count,
9020 target, 0);
9021 op0 = expand_shift (RSHIFT_EXPR, imode, op0, count,
9022 target, 0);
9023 }
9024 }
9025
9026 return op0;
9027 }
9028 }
9029 goto normal_inner_ref;
9030
9031 case BIT_FIELD_REF:
9032 case ARRAY_RANGE_REF:
9033 normal_inner_ref:
9034 {
9035 enum machine_mode mode1, mode2;
9036 HOST_WIDE_INT bitsize, bitpos;
9037 tree offset;
9038 int volatilep = 0, must_force_mem;
9039 bool packedp = false;
9040 tree tem = get_inner_reference (exp, &bitsize, &bitpos, &offset,
9041 &mode1, &unsignedp, &volatilep, true);
9042 rtx orig_op0, memloc;
9043
9044 /* If we got back the original object, something is wrong. Perhaps
9045 we are evaluating an expression too early. In any event, don't
9046 infinitely recurse. */
9047 gcc_assert (tem != exp);
9048
9049 if (TYPE_PACKED (TREE_TYPE (TREE_OPERAND (exp, 0)))
9050 || (TREE_CODE (TREE_OPERAND (exp, 1)) == FIELD_DECL
9051 && DECL_PACKED (TREE_OPERAND (exp, 1))))
9052 packedp = true;
9053
9054 /* If TEM's type is a union of variable size, pass TARGET to the inner
9055 computation, since it will need a temporary and TARGET is known
9056 to have to do. This occurs in unchecked conversion in Ada. */
9057 orig_op0 = op0
9058 = expand_expr (tem,
9059 (TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE
9060 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem)))
9061 != INTEGER_CST)
9062 && modifier != EXPAND_STACK_PARM
9063 ? target : NULL_RTX),
9064 VOIDmode,
9065 (modifier == EXPAND_INITIALIZER
9066 || modifier == EXPAND_CONST_ADDRESS
9067 || modifier == EXPAND_STACK_PARM)
9068 ? modifier : EXPAND_NORMAL);
9069
9070
9071 /* If the bitfield is volatile, we want to access it in the
9072 field's mode, not the computed mode.
9073 If a MEM has VOIDmode (external with incomplete type),
9074 use BLKmode for it instead. */
9075 if (MEM_P (op0))
9076 {
9077 if (volatilep && flag_strict_volatile_bitfields > 0)
9078 op0 = adjust_address (op0, mode1, 0);
9079 else if (GET_MODE (op0) == VOIDmode)
9080 op0 = adjust_address (op0, BLKmode, 0);
9081 }
9082
9083 mode2
9084 = CONSTANT_P (op0) ? TYPE_MODE (TREE_TYPE (tem)) : GET_MODE (op0);
9085
9086 /* If we have either an offset, a BLKmode result, or a reference
9087 outside the underlying object, we must force it to memory.
9088 Such a case can occur in Ada if we have unchecked conversion
9089 of an expression from a scalar type to an aggregate type or
9090 for an ARRAY_RANGE_REF whose type is BLKmode, or if we were
9091 passed a partially uninitialized object or a view-conversion
9092 to a larger size. */
9093 must_force_mem = (offset
9094 || mode1 == BLKmode
9095 || bitpos + bitsize > GET_MODE_BITSIZE (mode2));
9096
9097 /* Handle CONCAT first. */
9098 if (GET_CODE (op0) == CONCAT && !must_force_mem)
9099 {
9100 if (bitpos == 0
9101 && bitsize == GET_MODE_BITSIZE (GET_MODE (op0)))
9102 return op0;
9103 if (bitpos == 0
9104 && bitsize == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 0)))
9105 && bitsize)
9106 {
9107 op0 = XEXP (op0, 0);
9108 mode2 = GET_MODE (op0);
9109 }
9110 else if (bitpos == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 0)))
9111 && bitsize == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 1)))
9112 && bitpos
9113 && bitsize)
9114 {
9115 op0 = XEXP (op0, 1);
9116 bitpos = 0;
9117 mode2 = GET_MODE (op0);
9118 }
9119 else
9120 /* Otherwise force into memory. */
9121 must_force_mem = 1;
9122 }
9123
9124 /* If this is a constant, put it in a register if it is a legitimate
9125 constant and we don't need a memory reference. */
9126 if (CONSTANT_P (op0)
9127 && mode2 != BLKmode
9128 && targetm.legitimate_constant_p (mode2, op0)
9129 && !must_force_mem)
9130 op0 = force_reg (mode2, op0);
9131
9132 /* Otherwise, if this is a constant, try to force it to the constant
9133 pool. Note that back-ends, e.g. MIPS, may refuse to do so if it
9134 is a legitimate constant. */
9135 else if (CONSTANT_P (op0) && (memloc = force_const_mem (mode2, op0)))
9136 op0 = validize_mem (memloc);
9137
9138 /* Otherwise, if this is a constant or the object is not in memory
9139 and need be, put it there. */
9140 else if (CONSTANT_P (op0) || (!MEM_P (op0) && must_force_mem))
9141 {
9142 tree nt = build_qualified_type (TREE_TYPE (tem),
9143 (TYPE_QUALS (TREE_TYPE (tem))
9144 | TYPE_QUAL_CONST));
9145 memloc = assign_temp (nt, 1, 1, 1);
9146 emit_move_insn (memloc, op0);
9147 op0 = memloc;
9148 }
9149
9150 if (offset)
9151 {
9152 enum machine_mode address_mode;
9153 rtx offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode,
9154 EXPAND_SUM);
9155
9156 gcc_assert (MEM_P (op0));
9157
9158 address_mode
9159 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (op0));
9160 if (GET_MODE (offset_rtx) != address_mode)
9161 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
9162
9163 if (GET_MODE (op0) == BLKmode
9164 /* A constant address in OP0 can have VOIDmode, we must
9165 not try to call force_reg in that case. */
9166 && GET_MODE (XEXP (op0, 0)) != VOIDmode
9167 && bitsize != 0
9168 && (bitpos % bitsize) == 0
9169 && (bitsize % GET_MODE_ALIGNMENT (mode1)) == 0
9170 && MEM_ALIGN (op0) == GET_MODE_ALIGNMENT (mode1))
9171 {
9172 op0 = adjust_address (op0, mode1, bitpos / BITS_PER_UNIT);
9173 bitpos = 0;
9174 }
9175
9176 op0 = offset_address (op0, offset_rtx,
9177 highest_pow2_factor (offset));
9178 }
9179
9180 /* If OFFSET is making OP0 more aligned than BIGGEST_ALIGNMENT,
9181 record its alignment as BIGGEST_ALIGNMENT. */
9182 if (MEM_P (op0) && bitpos == 0 && offset != 0
9183 && is_aligning_offset (offset, tem))
9184 set_mem_align (op0, BIGGEST_ALIGNMENT);
9185
9186 /* Don't forget about volatility even if this is a bitfield. */
9187 if (MEM_P (op0) && volatilep && ! MEM_VOLATILE_P (op0))
9188 {
9189 if (op0 == orig_op0)
9190 op0 = copy_rtx (op0);
9191
9192 MEM_VOLATILE_P (op0) = 1;
9193 }
9194
9195 /* In cases where an aligned union has an unaligned object
9196 as a field, we might be extracting a BLKmode value from
9197 an integer-mode (e.g., SImode) object. Handle this case
9198 by doing the extract into an object as wide as the field
9199 (which we know to be the width of a basic mode), then
9200 storing into memory, and changing the mode to BLKmode. */
9201 if (mode1 == VOIDmode
9202 || REG_P (op0) || GET_CODE (op0) == SUBREG
9203 || (mode1 != BLKmode && ! direct_load[(int) mode1]
9204 && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
9205 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT
9206 && modifier != EXPAND_CONST_ADDRESS
9207 && modifier != EXPAND_INITIALIZER)
9208 /* If the field is volatile, we always want an aligned
9209 access. Only do this if the access is not already naturally
9210 aligned, otherwise "normal" (non-bitfield) volatile fields
9211 become non-addressable. */
9212 || (volatilep && flag_strict_volatile_bitfields > 0
9213 && (bitpos % GET_MODE_ALIGNMENT (mode) != 0))
9214 /* If the field isn't aligned enough to fetch as a memref,
9215 fetch it as a bit field. */
9216 || (mode1 != BLKmode
9217 && (((TYPE_ALIGN (TREE_TYPE (tem)) < GET_MODE_ALIGNMENT (mode)
9218 || (bitpos % GET_MODE_ALIGNMENT (mode) != 0)
9219 || (MEM_P (op0)
9220 && (MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode1)
9221 || (bitpos % GET_MODE_ALIGNMENT (mode1) != 0))))
9222 && ((modifier == EXPAND_CONST_ADDRESS
9223 || modifier == EXPAND_INITIALIZER)
9224 ? STRICT_ALIGNMENT
9225 : SLOW_UNALIGNED_ACCESS (mode1, MEM_ALIGN (op0))))
9226 || (bitpos % BITS_PER_UNIT != 0)))
9227 /* If the type and the field are a constant size and the
9228 size of the type isn't the same size as the bitfield,
9229 we must use bitfield operations. */
9230 || (bitsize >= 0
9231 && TYPE_SIZE (TREE_TYPE (exp))
9232 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
9233 && 0 != compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)),
9234 bitsize)))
9235 {
9236 enum machine_mode ext_mode = mode;
9237
9238 if (ext_mode == BLKmode
9239 && ! (target != 0 && MEM_P (op0)
9240 && MEM_P (target)
9241 && bitpos % BITS_PER_UNIT == 0))
9242 ext_mode = mode_for_size (bitsize, MODE_INT, 1);
9243
9244 if (ext_mode == BLKmode)
9245 {
9246 if (target == 0)
9247 target = assign_temp (type, 0, 1, 1);
9248
9249 if (bitsize == 0)
9250 return target;
9251
9252 /* In this case, BITPOS must start at a byte boundary and
9253 TARGET, if specified, must be a MEM. */
9254 gcc_assert (MEM_P (op0)
9255 && (!target || MEM_P (target))
9256 && !(bitpos % BITS_PER_UNIT));
9257
9258 emit_block_move (target,
9259 adjust_address (op0, VOIDmode,
9260 bitpos / BITS_PER_UNIT),
9261 GEN_INT ((bitsize + BITS_PER_UNIT - 1)
9262 / BITS_PER_UNIT),
9263 (modifier == EXPAND_STACK_PARM
9264 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
9265
9266 return target;
9267 }
9268
9269 op0 = validize_mem (op0);
9270
9271 if (MEM_P (op0) && REG_P (XEXP (op0, 0)))
9272 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
9273
9274 op0 = extract_bit_field (op0, bitsize, bitpos, unsignedp, packedp,
9275 (modifier == EXPAND_STACK_PARM
9276 ? NULL_RTX : target),
9277 ext_mode, ext_mode);
9278
9279 /* If the result is a record type and BITSIZE is narrower than
9280 the mode of OP0, an integral mode, and this is a big endian
9281 machine, we must put the field into the high-order bits. */
9282 if (TREE_CODE (type) == RECORD_TYPE && BYTES_BIG_ENDIAN
9283 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT
9284 && bitsize < (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (op0)))
9285 op0 = expand_shift (LSHIFT_EXPR, GET_MODE (op0), op0,
9286 GET_MODE_BITSIZE (GET_MODE (op0))
9287 - bitsize, op0, 1);
9288
9289 /* If the result type is BLKmode, store the data into a temporary
9290 of the appropriate type, but with the mode corresponding to the
9291 mode for the data we have (op0's mode). It's tempting to make
9292 this a constant type, since we know it's only being stored once,
9293 but that can cause problems if we are taking the address of this
9294 COMPONENT_REF because the MEM of any reference via that address
9295 will have flags corresponding to the type, which will not
9296 necessarily be constant. */
9297 if (mode == BLKmode)
9298 {
9299 HOST_WIDE_INT size = GET_MODE_BITSIZE (ext_mode);
9300 rtx new_rtx;
9301
9302 /* If the reference doesn't use the alias set of its type,
9303 we cannot create the temporary using that type. */
9304 if (component_uses_parent_alias_set (exp))
9305 {
9306 new_rtx = assign_stack_local (ext_mode, size, 0);
9307 set_mem_alias_set (new_rtx, get_alias_set (exp));
9308 }
9309 else
9310 new_rtx = assign_stack_temp_for_type (ext_mode, size, 0, type);
9311
9312 emit_move_insn (new_rtx, op0);
9313 op0 = copy_rtx (new_rtx);
9314 PUT_MODE (op0, BLKmode);
9315 set_mem_attributes (op0, exp, 1);
9316 }
9317
9318 return op0;
9319 }
9320
9321 /* If the result is BLKmode, use that to access the object
9322 now as well. */
9323 if (mode == BLKmode)
9324 mode1 = BLKmode;
9325
9326 /* Get a reference to just this component. */
9327 if (modifier == EXPAND_CONST_ADDRESS
9328 || modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
9329 op0 = adjust_address_nv (op0, mode1, bitpos / BITS_PER_UNIT);
9330 else
9331 op0 = adjust_address (op0, mode1, bitpos / BITS_PER_UNIT);
9332
9333 if (op0 == orig_op0)
9334 op0 = copy_rtx (op0);
9335
9336 set_mem_attributes (op0, exp, 0);
9337 if (REG_P (XEXP (op0, 0)))
9338 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
9339
9340 MEM_VOLATILE_P (op0) |= volatilep;
9341 if (mode == mode1 || mode1 == BLKmode || mode1 == tmode
9342 || modifier == EXPAND_CONST_ADDRESS
9343 || modifier == EXPAND_INITIALIZER)
9344 return op0;
9345 else if (target == 0)
9346 target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode);
9347
9348 convert_move (target, op0, unsignedp);
9349 return target;
9350 }
9351
9352 case OBJ_TYPE_REF:
9353 return expand_expr (OBJ_TYPE_REF_EXPR (exp), target, tmode, modifier);
9354
9355 case CALL_EXPR:
9356 /* All valid uses of __builtin_va_arg_pack () are removed during
9357 inlining. */
9358 if (CALL_EXPR_VA_ARG_PACK (exp))
9359 error ("%Kinvalid use of %<__builtin_va_arg_pack ()%>", exp);
9360 {
9361 tree fndecl = get_callee_fndecl (exp), attr;
9362
9363 if (fndecl
9364 && (attr = lookup_attribute ("error",
9365 DECL_ATTRIBUTES (fndecl))) != NULL)
9366 error ("%Kcall to %qs declared with attribute error: %s",
9367 exp, identifier_to_locale (lang_hooks.decl_printable_name (fndecl, 1)),
9368 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr))));
9369 if (fndecl
9370 && (attr = lookup_attribute ("warning",
9371 DECL_ATTRIBUTES (fndecl))) != NULL)
9372 warning_at (tree_nonartificial_location (exp),
9373 0, "%Kcall to %qs declared with attribute warning: %s",
9374 exp, identifier_to_locale (lang_hooks.decl_printable_name (fndecl, 1)),
9375 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr))));
9376
9377 /* Check for a built-in function. */
9378 if (fndecl && DECL_BUILT_IN (fndecl))
9379 {
9380 gcc_assert (DECL_BUILT_IN_CLASS (fndecl) != BUILT_IN_FRONTEND);
9381 return expand_builtin (exp, target, subtarget, tmode, ignore);
9382 }
9383 }
9384 return expand_call (exp, target, ignore);
9385
9386 case VIEW_CONVERT_EXPR:
9387 op0 = NULL_RTX;
9388
9389 /* If we are converting to BLKmode, try to avoid an intermediate
9390 temporary by fetching an inner memory reference. */
9391 if (mode == BLKmode
9392 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
9393 && TYPE_MODE (TREE_TYPE (treeop0)) != BLKmode
9394 && handled_component_p (treeop0))
9395 {
9396 enum machine_mode mode1;
9397 HOST_WIDE_INT bitsize, bitpos;
9398 tree offset;
9399 int unsignedp;
9400 int volatilep = 0;
9401 tree tem
9402 = get_inner_reference (treeop0, &bitsize, &bitpos,
9403 &offset, &mode1, &unsignedp, &volatilep,
9404 true);
9405 rtx orig_op0;
9406
9407 /* ??? We should work harder and deal with non-zero offsets. */
9408 if (!offset
9409 && (bitpos % BITS_PER_UNIT) == 0
9410 && bitsize >= 0
9411 && compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)), bitsize) == 0)
9412 {
9413 /* See the normal_inner_ref case for the rationale. */
9414 orig_op0
9415 = expand_expr (tem,
9416 (TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE
9417 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem)))
9418 != INTEGER_CST)
9419 && modifier != EXPAND_STACK_PARM
9420 ? target : NULL_RTX),
9421 VOIDmode,
9422 (modifier == EXPAND_INITIALIZER
9423 || modifier == EXPAND_CONST_ADDRESS
9424 || modifier == EXPAND_STACK_PARM)
9425 ? modifier : EXPAND_NORMAL);
9426
9427 if (MEM_P (orig_op0))
9428 {
9429 op0 = orig_op0;
9430
9431 /* Get a reference to just this component. */
9432 if (modifier == EXPAND_CONST_ADDRESS
9433 || modifier == EXPAND_SUM
9434 || modifier == EXPAND_INITIALIZER)
9435 op0 = adjust_address_nv (op0, mode, bitpos / BITS_PER_UNIT);
9436 else
9437 op0 = adjust_address (op0, mode, bitpos / BITS_PER_UNIT);
9438
9439 if (op0 == orig_op0)
9440 op0 = copy_rtx (op0);
9441
9442 set_mem_attributes (op0, treeop0, 0);
9443 if (REG_P (XEXP (op0, 0)))
9444 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
9445
9446 MEM_VOLATILE_P (op0) |= volatilep;
9447 }
9448 }
9449 }
9450
9451 if (!op0)
9452 op0 = expand_expr (treeop0,
9453 NULL_RTX, VOIDmode, modifier);
9454
9455 /* If the input and output modes are both the same, we are done. */
9456 if (mode == GET_MODE (op0))
9457 ;
9458 /* If neither mode is BLKmode, and both modes are the same size
9459 then we can use gen_lowpart. */
9460 else if (mode != BLKmode && GET_MODE (op0) != BLKmode
9461 && (GET_MODE_PRECISION (mode)
9462 == GET_MODE_PRECISION (GET_MODE (op0)))
9463 && !COMPLEX_MODE_P (GET_MODE (op0)))
9464 {
9465 if (GET_CODE (op0) == SUBREG)
9466 op0 = force_reg (GET_MODE (op0), op0);
9467 temp = gen_lowpart_common (mode, op0);
9468 if (temp)
9469 op0 = temp;
9470 else
9471 {
9472 if (!REG_P (op0) && !MEM_P (op0))
9473 op0 = force_reg (GET_MODE (op0), op0);
9474 op0 = gen_lowpart (mode, op0);
9475 }
9476 }
9477 /* If both types are integral, convert from one mode to the other. */
9478 else if (INTEGRAL_TYPE_P (type) && INTEGRAL_TYPE_P (TREE_TYPE (treeop0)))
9479 op0 = convert_modes (mode, GET_MODE (op0), op0,
9480 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
9481 /* As a last resort, spill op0 to memory, and reload it in a
9482 different mode. */
9483 else if (!MEM_P (op0))
9484 {
9485 /* If the operand is not a MEM, force it into memory. Since we
9486 are going to be changing the mode of the MEM, don't call
9487 force_const_mem for constants because we don't allow pool
9488 constants to change mode. */
9489 tree inner_type = TREE_TYPE (treeop0);
9490
9491 gcc_assert (!TREE_ADDRESSABLE (exp));
9492
9493 if (target == 0 || GET_MODE (target) != TYPE_MODE (inner_type))
9494 target
9495 = assign_stack_temp_for_type
9496 (TYPE_MODE (inner_type),
9497 GET_MODE_SIZE (TYPE_MODE (inner_type)), 0, inner_type);
9498
9499 emit_move_insn (target, op0);
9500 op0 = target;
9501 }
9502
9503 /* At this point, OP0 is in the correct mode. If the output type is
9504 such that the operand is known to be aligned, indicate that it is.
9505 Otherwise, we need only be concerned about alignment for non-BLKmode
9506 results. */
9507 if (MEM_P (op0))
9508 {
9509 op0 = copy_rtx (op0);
9510
9511 if (TYPE_ALIGN_OK (type))
9512 set_mem_align (op0, MAX (MEM_ALIGN (op0), TYPE_ALIGN (type)));
9513 else if (STRICT_ALIGNMENT
9514 && mode != BLKmode
9515 && MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode))
9516 {
9517 tree inner_type = TREE_TYPE (treeop0);
9518 HOST_WIDE_INT temp_size
9519 = MAX (int_size_in_bytes (inner_type),
9520 (HOST_WIDE_INT) GET_MODE_SIZE (mode));
9521 rtx new_rtx
9522 = assign_stack_temp_for_type (mode, temp_size, 0, type);
9523 rtx new_with_op0_mode
9524 = adjust_address (new_rtx, GET_MODE (op0), 0);
9525
9526 gcc_assert (!TREE_ADDRESSABLE (exp));
9527
9528 if (GET_MODE (op0) == BLKmode)
9529 emit_block_move (new_with_op0_mode, op0,
9530 GEN_INT (GET_MODE_SIZE (mode)),
9531 (modifier == EXPAND_STACK_PARM
9532 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
9533 else
9534 emit_move_insn (new_with_op0_mode, op0);
9535
9536 op0 = new_rtx;
9537 }
9538
9539 op0 = adjust_address (op0, mode, 0);
9540 }
9541
9542 return op0;
9543
9544 /* Use a compare and a jump for BLKmode comparisons, or for function
9545 type comparisons is HAVE_canonicalize_funcptr_for_compare. */
9546
9547 /* Although TRUTH_{AND,OR}IF_EXPR aren't present in GIMPLE, they
9548 are occassionally created by folding during expansion. */
9549 case TRUTH_ANDIF_EXPR:
9550 case TRUTH_ORIF_EXPR:
9551 if (! ignore
9552 && (target == 0
9553 || modifier == EXPAND_STACK_PARM
9554 || ! safe_from_p (target, treeop0, 1)
9555 || ! safe_from_p (target, treeop1, 1)
9556 /* Make sure we don't have a hard reg (such as function's return
9557 value) live across basic blocks, if not optimizing. */
9558 || (!optimize && REG_P (target)
9559 && REGNO (target) < FIRST_PSEUDO_REGISTER)))
9560 target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode);
9561
9562 if (target)
9563 emit_move_insn (target, const0_rtx);
9564
9565 op1 = gen_label_rtx ();
9566 jumpifnot_1 (code, treeop0, treeop1, op1, -1);
9567
9568 if (target)
9569 emit_move_insn (target, const1_rtx);
9570
9571 emit_label (op1);
9572 return ignore ? const0_rtx : target;
9573
9574 case STATEMENT_LIST:
9575 {
9576 tree_stmt_iterator iter;
9577
9578 gcc_assert (ignore);
9579
9580 for (iter = tsi_start (exp); !tsi_end_p (iter); tsi_next (&iter))
9581 expand_expr (tsi_stmt (iter), const0_rtx, VOIDmode, modifier);
9582 }
9583 return const0_rtx;
9584
9585 case COND_EXPR:
9586 /* A COND_EXPR with its type being VOID_TYPE represents a
9587 conditional jump and is handled in
9588 expand_gimple_cond_expr. */
9589 gcc_assert (!VOID_TYPE_P (type));
9590
9591 /* Note that COND_EXPRs whose type is a structure or union
9592 are required to be constructed to contain assignments of
9593 a temporary variable, so that we can evaluate them here
9594 for side effect only. If type is void, we must do likewise. */
9595
9596 gcc_assert (!TREE_ADDRESSABLE (type)
9597 && !ignore
9598 && TREE_TYPE (treeop1) != void_type_node
9599 && TREE_TYPE (treeop2) != void_type_node);
9600
9601 /* If we are not to produce a result, we have no target. Otherwise,
9602 if a target was specified use it; it will not be used as an
9603 intermediate target unless it is safe. If no target, use a
9604 temporary. */
9605
9606 if (modifier != EXPAND_STACK_PARM
9607 && original_target
9608 && safe_from_p (original_target, treeop0, 1)
9609 && GET_MODE (original_target) == mode
9610 #ifdef HAVE_conditional_move
9611 && (! can_conditionally_move_p (mode)
9612 || REG_P (original_target))
9613 #endif
9614 && !MEM_P (original_target))
9615 temp = original_target;
9616 else
9617 temp = assign_temp (type, 0, 0, 1);
9618
9619 do_pending_stack_adjust ();
9620 NO_DEFER_POP;
9621 op0 = gen_label_rtx ();
9622 op1 = gen_label_rtx ();
9623 jumpifnot (treeop0, op0, -1);
9624 store_expr (treeop1, temp,
9625 modifier == EXPAND_STACK_PARM,
9626 false);
9627
9628 emit_jump_insn (gen_jump (op1));
9629 emit_barrier ();
9630 emit_label (op0);
9631 store_expr (treeop2, temp,
9632 modifier == EXPAND_STACK_PARM,
9633 false);
9634
9635 emit_label (op1);
9636 OK_DEFER_POP;
9637 return temp;
9638
9639 case VEC_COND_EXPR:
9640 target = expand_vec_cond_expr (type, treeop0, treeop1, treeop2, target);
9641 return target;
9642
9643 case MODIFY_EXPR:
9644 {
9645 tree lhs = treeop0;
9646 tree rhs = treeop1;
9647 gcc_assert (ignore);
9648
9649 /* Check for |= or &= of a bitfield of size one into another bitfield
9650 of size 1. In this case, (unless we need the result of the
9651 assignment) we can do this more efficiently with a
9652 test followed by an assignment, if necessary.
9653
9654 ??? At this point, we can't get a BIT_FIELD_REF here. But if
9655 things change so we do, this code should be enhanced to
9656 support it. */
9657 if (TREE_CODE (lhs) == COMPONENT_REF
9658 && (TREE_CODE (rhs) == BIT_IOR_EXPR
9659 || TREE_CODE (rhs) == BIT_AND_EXPR)
9660 && TREE_OPERAND (rhs, 0) == lhs
9661 && TREE_CODE (TREE_OPERAND (rhs, 1)) == COMPONENT_REF
9662 && integer_onep (DECL_SIZE (TREE_OPERAND (lhs, 1)))
9663 && integer_onep (DECL_SIZE (TREE_OPERAND (TREE_OPERAND (rhs, 1), 1))))
9664 {
9665 rtx label = gen_label_rtx ();
9666 int value = TREE_CODE (rhs) == BIT_IOR_EXPR;
9667 do_jump (TREE_OPERAND (rhs, 1),
9668 value ? label : 0,
9669 value ? 0 : label, -1);
9670 expand_assignment (lhs, build_int_cst (TREE_TYPE (rhs), value),
9671 MOVE_NONTEMPORAL (exp));
9672 do_pending_stack_adjust ();
9673 emit_label (label);
9674 return const0_rtx;
9675 }
9676
9677 expand_assignment (lhs, rhs, MOVE_NONTEMPORAL (exp));
9678 return const0_rtx;
9679 }
9680
9681 case ADDR_EXPR:
9682 return expand_expr_addr_expr (exp, target, tmode, modifier);
9683
9684 case REALPART_EXPR:
9685 op0 = expand_normal (treeop0);
9686 return read_complex_part (op0, false);
9687
9688 case IMAGPART_EXPR:
9689 op0 = expand_normal (treeop0);
9690 return read_complex_part (op0, true);
9691
9692 case RETURN_EXPR:
9693 case LABEL_EXPR:
9694 case GOTO_EXPR:
9695 case SWITCH_EXPR:
9696 case ASM_EXPR:
9697 /* Expanded in cfgexpand.c. */
9698 gcc_unreachable ();
9699
9700 case TRY_CATCH_EXPR:
9701 case CATCH_EXPR:
9702 case EH_FILTER_EXPR:
9703 case TRY_FINALLY_EXPR:
9704 /* Lowered by tree-eh.c. */
9705 gcc_unreachable ();
9706
9707 case WITH_CLEANUP_EXPR:
9708 case CLEANUP_POINT_EXPR:
9709 case TARGET_EXPR:
9710 case CASE_LABEL_EXPR:
9711 case VA_ARG_EXPR:
9712 case BIND_EXPR:
9713 case INIT_EXPR:
9714 case CONJ_EXPR:
9715 case COMPOUND_EXPR:
9716 case PREINCREMENT_EXPR:
9717 case PREDECREMENT_EXPR:
9718 case POSTINCREMENT_EXPR:
9719 case POSTDECREMENT_EXPR:
9720 case LOOP_EXPR:
9721 case EXIT_EXPR:
9722 /* Lowered by gimplify.c. */
9723 gcc_unreachable ();
9724
9725 case FDESC_EXPR:
9726 /* Function descriptors are not valid except for as
9727 initialization constants, and should not be expanded. */
9728 gcc_unreachable ();
9729
9730 case WITH_SIZE_EXPR:
9731 /* WITH_SIZE_EXPR expands to its first argument. The caller should
9732 have pulled out the size to use in whatever context it needed. */
9733 return expand_expr_real (treeop0, original_target, tmode,
9734 modifier, alt_rtl);
9735
9736 case COMPOUND_LITERAL_EXPR:
9737 {
9738 /* Initialize the anonymous variable declared in the compound
9739 literal, then return the variable. */
9740 tree decl = COMPOUND_LITERAL_EXPR_DECL (exp);
9741
9742 /* Create RTL for this variable. */
9743 if (!DECL_RTL_SET_P (decl))
9744 {
9745 if (DECL_HARD_REGISTER (decl))
9746 /* The user specified an assembler name for this variable.
9747 Set that up now. */
9748 rest_of_decl_compilation (decl, 0, 0);
9749 else
9750 expand_decl (decl);
9751 }
9752
9753 return expand_expr_real (decl, original_target, tmode,
9754 modifier, alt_rtl);
9755 }
9756
9757 default:
9758 return expand_expr_real_2 (&ops, target, tmode, modifier);
9759 }
9760 }
9761 \f
9762 /* Subroutine of above: reduce EXP to the precision of TYPE (in the
9763 signedness of TYPE), possibly returning the result in TARGET. */
9764 static rtx
9765 reduce_to_bit_field_precision (rtx exp, rtx target, tree type)
9766 {
9767 HOST_WIDE_INT prec = TYPE_PRECISION (type);
9768 if (target && GET_MODE (target) != GET_MODE (exp))
9769 target = 0;
9770 /* For constant values, reduce using build_int_cst_type. */
9771 if (CONST_INT_P (exp))
9772 {
9773 HOST_WIDE_INT value = INTVAL (exp);
9774 tree t = build_int_cst_type (type, value);
9775 return expand_expr (t, target, VOIDmode, EXPAND_NORMAL);
9776 }
9777 else if (TYPE_UNSIGNED (type))
9778 {
9779 rtx mask = immed_double_int_const (double_int_mask (prec),
9780 GET_MODE (exp));
9781 return expand_and (GET_MODE (exp), exp, mask, target);
9782 }
9783 else
9784 {
9785 int count = GET_MODE_PRECISION (GET_MODE (exp)) - prec;
9786 exp = expand_shift (LSHIFT_EXPR, GET_MODE (exp),
9787 exp, count, target, 0);
9788 return expand_shift (RSHIFT_EXPR, GET_MODE (exp),
9789 exp, count, target, 0);
9790 }
9791 }
9792 \f
9793 /* Subroutine of above: returns 1 if OFFSET corresponds to an offset that
9794 when applied to the address of EXP produces an address known to be
9795 aligned more than BIGGEST_ALIGNMENT. */
9796
9797 static int
9798 is_aligning_offset (const_tree offset, const_tree exp)
9799 {
9800 /* Strip off any conversions. */
9801 while (CONVERT_EXPR_P (offset))
9802 offset = TREE_OPERAND (offset, 0);
9803
9804 /* We must now have a BIT_AND_EXPR with a constant that is one less than
9805 power of 2 and which is larger than BIGGEST_ALIGNMENT. */
9806 if (TREE_CODE (offset) != BIT_AND_EXPR
9807 || !host_integerp (TREE_OPERAND (offset, 1), 1)
9808 || compare_tree_int (TREE_OPERAND (offset, 1),
9809 BIGGEST_ALIGNMENT / BITS_PER_UNIT) <= 0
9810 || !exact_log2 (tree_low_cst (TREE_OPERAND (offset, 1), 1) + 1) < 0)
9811 return 0;
9812
9813 /* Look at the first operand of BIT_AND_EXPR and strip any conversion.
9814 It must be NEGATE_EXPR. Then strip any more conversions. */
9815 offset = TREE_OPERAND (offset, 0);
9816 while (CONVERT_EXPR_P (offset))
9817 offset = TREE_OPERAND (offset, 0);
9818
9819 if (TREE_CODE (offset) != NEGATE_EXPR)
9820 return 0;
9821
9822 offset = TREE_OPERAND (offset, 0);
9823 while (CONVERT_EXPR_P (offset))
9824 offset = TREE_OPERAND (offset, 0);
9825
9826 /* This must now be the address of EXP. */
9827 return TREE_CODE (offset) == ADDR_EXPR && TREE_OPERAND (offset, 0) == exp;
9828 }
9829 \f
9830 /* Return the tree node if an ARG corresponds to a string constant or zero
9831 if it doesn't. If we return nonzero, set *PTR_OFFSET to the offset
9832 in bytes within the string that ARG is accessing. The type of the
9833 offset will be `sizetype'. */
9834
9835 tree
9836 string_constant (tree arg, tree *ptr_offset)
9837 {
9838 tree array, offset, lower_bound;
9839 STRIP_NOPS (arg);
9840
9841 if (TREE_CODE (arg) == ADDR_EXPR)
9842 {
9843 if (TREE_CODE (TREE_OPERAND (arg, 0)) == STRING_CST)
9844 {
9845 *ptr_offset = size_zero_node;
9846 return TREE_OPERAND (arg, 0);
9847 }
9848 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == VAR_DECL)
9849 {
9850 array = TREE_OPERAND (arg, 0);
9851 offset = size_zero_node;
9852 }
9853 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == ARRAY_REF)
9854 {
9855 array = TREE_OPERAND (TREE_OPERAND (arg, 0), 0);
9856 offset = TREE_OPERAND (TREE_OPERAND (arg, 0), 1);
9857 if (TREE_CODE (array) != STRING_CST
9858 && TREE_CODE (array) != VAR_DECL)
9859 return 0;
9860
9861 /* Check if the array has a nonzero lower bound. */
9862 lower_bound = array_ref_low_bound (TREE_OPERAND (arg, 0));
9863 if (!integer_zerop (lower_bound))
9864 {
9865 /* If the offset and base aren't both constants, return 0. */
9866 if (TREE_CODE (lower_bound) != INTEGER_CST)
9867 return 0;
9868 if (TREE_CODE (offset) != INTEGER_CST)
9869 return 0;
9870 /* Adjust offset by the lower bound. */
9871 offset = size_diffop (fold_convert (sizetype, offset),
9872 fold_convert (sizetype, lower_bound));
9873 }
9874 }
9875 else
9876 return 0;
9877 }
9878 else if (TREE_CODE (arg) == PLUS_EXPR || TREE_CODE (arg) == POINTER_PLUS_EXPR)
9879 {
9880 tree arg0 = TREE_OPERAND (arg, 0);
9881 tree arg1 = TREE_OPERAND (arg, 1);
9882
9883 STRIP_NOPS (arg0);
9884 STRIP_NOPS (arg1);
9885
9886 if (TREE_CODE (arg0) == ADDR_EXPR
9887 && (TREE_CODE (TREE_OPERAND (arg0, 0)) == STRING_CST
9888 || TREE_CODE (TREE_OPERAND (arg0, 0)) == VAR_DECL))
9889 {
9890 array = TREE_OPERAND (arg0, 0);
9891 offset = arg1;
9892 }
9893 else if (TREE_CODE (arg1) == ADDR_EXPR
9894 && (TREE_CODE (TREE_OPERAND (arg1, 0)) == STRING_CST
9895 || TREE_CODE (TREE_OPERAND (arg1, 0)) == VAR_DECL))
9896 {
9897 array = TREE_OPERAND (arg1, 0);
9898 offset = arg0;
9899 }
9900 else
9901 return 0;
9902 }
9903 else
9904 return 0;
9905
9906 if (TREE_CODE (array) == STRING_CST)
9907 {
9908 *ptr_offset = fold_convert (sizetype, offset);
9909 return array;
9910 }
9911 else if (TREE_CODE (array) == VAR_DECL
9912 || TREE_CODE (array) == CONST_DECL)
9913 {
9914 int length;
9915
9916 /* Variables initialized to string literals can be handled too. */
9917 if (!const_value_known_p (array)
9918 || !DECL_INITIAL (array)
9919 || TREE_CODE (DECL_INITIAL (array)) != STRING_CST)
9920 return 0;
9921
9922 /* Avoid const char foo[4] = "abcde"; */
9923 if (DECL_SIZE_UNIT (array) == NULL_TREE
9924 || TREE_CODE (DECL_SIZE_UNIT (array)) != INTEGER_CST
9925 || (length = TREE_STRING_LENGTH (DECL_INITIAL (array))) <= 0
9926 || compare_tree_int (DECL_SIZE_UNIT (array), length) < 0)
9927 return 0;
9928
9929 /* If variable is bigger than the string literal, OFFSET must be constant
9930 and inside of the bounds of the string literal. */
9931 offset = fold_convert (sizetype, offset);
9932 if (compare_tree_int (DECL_SIZE_UNIT (array), length) > 0
9933 && (! host_integerp (offset, 1)
9934 || compare_tree_int (offset, length) >= 0))
9935 return 0;
9936
9937 *ptr_offset = offset;
9938 return DECL_INITIAL (array);
9939 }
9940
9941 return 0;
9942 }
9943 \f
9944 /* Generate code to calculate OPS, and exploded expression
9945 using a store-flag instruction and return an rtx for the result.
9946 OPS reflects a comparison.
9947
9948 If TARGET is nonzero, store the result there if convenient.
9949
9950 Return zero if there is no suitable set-flag instruction
9951 available on this machine.
9952
9953 Once expand_expr has been called on the arguments of the comparison,
9954 we are committed to doing the store flag, since it is not safe to
9955 re-evaluate the expression. We emit the store-flag insn by calling
9956 emit_store_flag, but only expand the arguments if we have a reason
9957 to believe that emit_store_flag will be successful. If we think that
9958 it will, but it isn't, we have to simulate the store-flag with a
9959 set/jump/set sequence. */
9960
9961 static rtx
9962 do_store_flag (sepops ops, rtx target, enum machine_mode mode)
9963 {
9964 enum rtx_code code;
9965 tree arg0, arg1, type;
9966 tree tem;
9967 enum machine_mode operand_mode;
9968 int unsignedp;
9969 rtx op0, op1;
9970 rtx subtarget = target;
9971 location_t loc = ops->location;
9972
9973 arg0 = ops->op0;
9974 arg1 = ops->op1;
9975
9976 /* Don't crash if the comparison was erroneous. */
9977 if (arg0 == error_mark_node || arg1 == error_mark_node)
9978 return const0_rtx;
9979
9980 type = TREE_TYPE (arg0);
9981 operand_mode = TYPE_MODE (type);
9982 unsignedp = TYPE_UNSIGNED (type);
9983
9984 /* We won't bother with BLKmode store-flag operations because it would mean
9985 passing a lot of information to emit_store_flag. */
9986 if (operand_mode == BLKmode)
9987 return 0;
9988
9989 /* We won't bother with store-flag operations involving function pointers
9990 when function pointers must be canonicalized before comparisons. */
9991 #ifdef HAVE_canonicalize_funcptr_for_compare
9992 if (HAVE_canonicalize_funcptr_for_compare
9993 && ((TREE_CODE (TREE_TYPE (arg0)) == POINTER_TYPE
9994 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg0)))
9995 == FUNCTION_TYPE))
9996 || (TREE_CODE (TREE_TYPE (arg1)) == POINTER_TYPE
9997 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg1)))
9998 == FUNCTION_TYPE))))
9999 return 0;
10000 #endif
10001
10002 STRIP_NOPS (arg0);
10003 STRIP_NOPS (arg1);
10004
10005 /* Get the rtx comparison code to use. We know that EXP is a comparison
10006 operation of some type. Some comparisons against 1 and -1 can be
10007 converted to comparisons with zero. Do so here so that the tests
10008 below will be aware that we have a comparison with zero. These
10009 tests will not catch constants in the first operand, but constants
10010 are rarely passed as the first operand. */
10011
10012 switch (ops->code)
10013 {
10014 case EQ_EXPR:
10015 code = EQ;
10016 break;
10017 case NE_EXPR:
10018 code = NE;
10019 break;
10020 case LT_EXPR:
10021 if (integer_onep (arg1))
10022 arg1 = integer_zero_node, code = unsignedp ? LEU : LE;
10023 else
10024 code = unsignedp ? LTU : LT;
10025 break;
10026 case LE_EXPR:
10027 if (! unsignedp && integer_all_onesp (arg1))
10028 arg1 = integer_zero_node, code = LT;
10029 else
10030 code = unsignedp ? LEU : LE;
10031 break;
10032 case GT_EXPR:
10033 if (! unsignedp && integer_all_onesp (arg1))
10034 arg1 = integer_zero_node, code = GE;
10035 else
10036 code = unsignedp ? GTU : GT;
10037 break;
10038 case GE_EXPR:
10039 if (integer_onep (arg1))
10040 arg1 = integer_zero_node, code = unsignedp ? GTU : GT;
10041 else
10042 code = unsignedp ? GEU : GE;
10043 break;
10044
10045 case UNORDERED_EXPR:
10046 code = UNORDERED;
10047 break;
10048 case ORDERED_EXPR:
10049 code = ORDERED;
10050 break;
10051 case UNLT_EXPR:
10052 code = UNLT;
10053 break;
10054 case UNLE_EXPR:
10055 code = UNLE;
10056 break;
10057 case UNGT_EXPR:
10058 code = UNGT;
10059 break;
10060 case UNGE_EXPR:
10061 code = UNGE;
10062 break;
10063 case UNEQ_EXPR:
10064 code = UNEQ;
10065 break;
10066 case LTGT_EXPR:
10067 code = LTGT;
10068 break;
10069
10070 default:
10071 gcc_unreachable ();
10072 }
10073
10074 /* Put a constant second. */
10075 if (TREE_CODE (arg0) == REAL_CST || TREE_CODE (arg0) == INTEGER_CST
10076 || TREE_CODE (arg0) == FIXED_CST)
10077 {
10078 tem = arg0; arg0 = arg1; arg1 = tem;
10079 code = swap_condition (code);
10080 }
10081
10082 /* If this is an equality or inequality test of a single bit, we can
10083 do this by shifting the bit being tested to the low-order bit and
10084 masking the result with the constant 1. If the condition was EQ,
10085 we xor it with 1. This does not require an scc insn and is faster
10086 than an scc insn even if we have it.
10087
10088 The code to make this transformation was moved into fold_single_bit_test,
10089 so we just call into the folder and expand its result. */
10090
10091 if ((code == NE || code == EQ)
10092 && TREE_CODE (arg0) == BIT_AND_EXPR && integer_zerop (arg1)
10093 && integer_pow2p (TREE_OPERAND (arg0, 1))
10094 && (TYPE_PRECISION (ops->type) != 1 || TYPE_UNSIGNED (ops->type)))
10095 {
10096 tree type = lang_hooks.types.type_for_mode (mode, unsignedp);
10097 return expand_expr (fold_single_bit_test (loc,
10098 code == NE ? NE_EXPR : EQ_EXPR,
10099 arg0, arg1, type),
10100 target, VOIDmode, EXPAND_NORMAL);
10101 }
10102
10103 if (! get_subtarget (target)
10104 || GET_MODE (subtarget) != operand_mode)
10105 subtarget = 0;
10106
10107 expand_operands (arg0, arg1, subtarget, &op0, &op1, EXPAND_NORMAL);
10108
10109 if (target == 0)
10110 target = gen_reg_rtx (mode);
10111
10112 /* Try a cstore if possible. */
10113 return emit_store_flag_force (target, code, op0, op1,
10114 operand_mode, unsignedp,
10115 (TYPE_PRECISION (ops->type) == 1
10116 && !TYPE_UNSIGNED (ops->type)) ? -1 : 1);
10117 }
10118 \f
10119
10120 /* Stubs in case we haven't got a casesi insn. */
10121 #ifndef HAVE_casesi
10122 # define HAVE_casesi 0
10123 # define gen_casesi(a, b, c, d, e) (0)
10124 # define CODE_FOR_casesi CODE_FOR_nothing
10125 #endif
10126
10127 /* Attempt to generate a casesi instruction. Returns 1 if successful,
10128 0 otherwise (i.e. if there is no casesi instruction). */
10129 int
10130 try_casesi (tree index_type, tree index_expr, tree minval, tree range,
10131 rtx table_label ATTRIBUTE_UNUSED, rtx default_label,
10132 rtx fallback_label ATTRIBUTE_UNUSED)
10133 {
10134 struct expand_operand ops[5];
10135 enum machine_mode index_mode = SImode;
10136 int index_bits = GET_MODE_BITSIZE (index_mode);
10137 rtx op1, op2, index;
10138
10139 if (! HAVE_casesi)
10140 return 0;
10141
10142 /* Convert the index to SImode. */
10143 if (GET_MODE_BITSIZE (TYPE_MODE (index_type)) > GET_MODE_BITSIZE (index_mode))
10144 {
10145 enum machine_mode omode = TYPE_MODE (index_type);
10146 rtx rangertx = expand_normal (range);
10147
10148 /* We must handle the endpoints in the original mode. */
10149 index_expr = build2 (MINUS_EXPR, index_type,
10150 index_expr, minval);
10151 minval = integer_zero_node;
10152 index = expand_normal (index_expr);
10153 if (default_label)
10154 emit_cmp_and_jump_insns (rangertx, index, LTU, NULL_RTX,
10155 omode, 1, default_label);
10156 /* Now we can safely truncate. */
10157 index = convert_to_mode (index_mode, index, 0);
10158 }
10159 else
10160 {
10161 if (TYPE_MODE (index_type) != index_mode)
10162 {
10163 index_type = lang_hooks.types.type_for_size (index_bits, 0);
10164 index_expr = fold_convert (index_type, index_expr);
10165 }
10166
10167 index = expand_normal (index_expr);
10168 }
10169
10170 do_pending_stack_adjust ();
10171
10172 op1 = expand_normal (minval);
10173 op2 = expand_normal (range);
10174
10175 create_input_operand (&ops[0], index, index_mode);
10176 create_convert_operand_from_type (&ops[1], op1, TREE_TYPE (minval));
10177 create_convert_operand_from_type (&ops[2], op2, TREE_TYPE (range));
10178 create_fixed_operand (&ops[3], table_label);
10179 create_fixed_operand (&ops[4], (default_label
10180 ? default_label
10181 : fallback_label));
10182 expand_jump_insn (CODE_FOR_casesi, 5, ops);
10183 return 1;
10184 }
10185
10186 /* Attempt to generate a tablejump instruction; same concept. */
10187 #ifndef HAVE_tablejump
10188 #define HAVE_tablejump 0
10189 #define gen_tablejump(x, y) (0)
10190 #endif
10191
10192 /* Subroutine of the next function.
10193
10194 INDEX is the value being switched on, with the lowest value
10195 in the table already subtracted.
10196 MODE is its expected mode (needed if INDEX is constant).
10197 RANGE is the length of the jump table.
10198 TABLE_LABEL is a CODE_LABEL rtx for the table itself.
10199
10200 DEFAULT_LABEL is a CODE_LABEL rtx to jump to if the
10201 index value is out of range. */
10202
10203 static void
10204 do_tablejump (rtx index, enum machine_mode mode, rtx range, rtx table_label,
10205 rtx default_label)
10206 {
10207 rtx temp, vector;
10208
10209 if (INTVAL (range) > cfun->cfg->max_jumptable_ents)
10210 cfun->cfg->max_jumptable_ents = INTVAL (range);
10211
10212 /* Do an unsigned comparison (in the proper mode) between the index
10213 expression and the value which represents the length of the range.
10214 Since we just finished subtracting the lower bound of the range
10215 from the index expression, this comparison allows us to simultaneously
10216 check that the original index expression value is both greater than
10217 or equal to the minimum value of the range and less than or equal to
10218 the maximum value of the range. */
10219
10220 if (default_label)
10221 emit_cmp_and_jump_insns (index, range, GTU, NULL_RTX, mode, 1,
10222 default_label);
10223
10224 /* If index is in range, it must fit in Pmode.
10225 Convert to Pmode so we can index with it. */
10226 if (mode != Pmode)
10227 index = convert_to_mode (Pmode, index, 1);
10228
10229 /* Don't let a MEM slip through, because then INDEX that comes
10230 out of PIC_CASE_VECTOR_ADDRESS won't be a valid address,
10231 and break_out_memory_refs will go to work on it and mess it up. */
10232 #ifdef PIC_CASE_VECTOR_ADDRESS
10233 if (flag_pic && !REG_P (index))
10234 index = copy_to_mode_reg (Pmode, index);
10235 #endif
10236
10237 /* ??? The only correct use of CASE_VECTOR_MODE is the one inside the
10238 GET_MODE_SIZE, because this indicates how large insns are. The other
10239 uses should all be Pmode, because they are addresses. This code
10240 could fail if addresses and insns are not the same size. */
10241 index = gen_rtx_PLUS (Pmode,
10242 gen_rtx_MULT (Pmode, index,
10243 GEN_INT (GET_MODE_SIZE (CASE_VECTOR_MODE))),
10244 gen_rtx_LABEL_REF (Pmode, table_label));
10245 #ifdef PIC_CASE_VECTOR_ADDRESS
10246 if (flag_pic)
10247 index = PIC_CASE_VECTOR_ADDRESS (index);
10248 else
10249 #endif
10250 index = memory_address (CASE_VECTOR_MODE, index);
10251 temp = gen_reg_rtx (CASE_VECTOR_MODE);
10252 vector = gen_const_mem (CASE_VECTOR_MODE, index);
10253 convert_move (temp, vector, 0);
10254
10255 emit_jump_insn (gen_tablejump (temp, table_label));
10256
10257 /* If we are generating PIC code or if the table is PC-relative, the
10258 table and JUMP_INSN must be adjacent, so don't output a BARRIER. */
10259 if (! CASE_VECTOR_PC_RELATIVE && ! flag_pic)
10260 emit_barrier ();
10261 }
10262
10263 int
10264 try_tablejump (tree index_type, tree index_expr, tree minval, tree range,
10265 rtx table_label, rtx default_label)
10266 {
10267 rtx index;
10268
10269 if (! HAVE_tablejump)
10270 return 0;
10271
10272 index_expr = fold_build2 (MINUS_EXPR, index_type,
10273 fold_convert (index_type, index_expr),
10274 fold_convert (index_type, minval));
10275 index = expand_normal (index_expr);
10276 do_pending_stack_adjust ();
10277
10278 do_tablejump (index, TYPE_MODE (index_type),
10279 convert_modes (TYPE_MODE (index_type),
10280 TYPE_MODE (TREE_TYPE (range)),
10281 expand_normal (range),
10282 TYPE_UNSIGNED (TREE_TYPE (range))),
10283 table_label, default_label);
10284 return 1;
10285 }
10286
10287 /* Return a CONST_VECTOR rtx for a VECTOR_CST tree. */
10288 static rtx
10289 const_vector_from_tree (tree exp)
10290 {
10291 rtvec v;
10292 int units, i;
10293 tree link, elt;
10294 enum machine_mode inner, mode;
10295
10296 mode = TYPE_MODE (TREE_TYPE (exp));
10297
10298 if (initializer_zerop (exp))
10299 return CONST0_RTX (mode);
10300
10301 units = GET_MODE_NUNITS (mode);
10302 inner = GET_MODE_INNER (mode);
10303
10304 v = rtvec_alloc (units);
10305
10306 link = TREE_VECTOR_CST_ELTS (exp);
10307 for (i = 0; link; link = TREE_CHAIN (link), ++i)
10308 {
10309 elt = TREE_VALUE (link);
10310
10311 if (TREE_CODE (elt) == REAL_CST)
10312 RTVEC_ELT (v, i) = CONST_DOUBLE_FROM_REAL_VALUE (TREE_REAL_CST (elt),
10313 inner);
10314 else if (TREE_CODE (elt) == FIXED_CST)
10315 RTVEC_ELT (v, i) = CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (elt),
10316 inner);
10317 else
10318 RTVEC_ELT (v, i) = immed_double_int_const (tree_to_double_int (elt),
10319 inner);
10320 }
10321
10322 /* Initialize remaining elements to 0. */
10323 for (; i < units; ++i)
10324 RTVEC_ELT (v, i) = CONST0_RTX (inner);
10325
10326 return gen_rtx_CONST_VECTOR (mode, v);
10327 }
10328
10329 /* Build a decl for a personality function given a language prefix. */
10330
10331 tree
10332 build_personality_function (const char *lang)
10333 {
10334 const char *unwind_and_version;
10335 tree decl, type;
10336 char *name;
10337
10338 switch (targetm_common.except_unwind_info (&global_options))
10339 {
10340 case UI_NONE:
10341 return NULL;
10342 case UI_SJLJ:
10343 unwind_and_version = "_sj0";
10344 break;
10345 case UI_DWARF2:
10346 case UI_TARGET:
10347 unwind_and_version = "_v0";
10348 break;
10349 default:
10350 gcc_unreachable ();
10351 }
10352
10353 name = ACONCAT (("__", lang, "_personality", unwind_and_version, NULL));
10354
10355 type = build_function_type_list (integer_type_node, integer_type_node,
10356 long_long_unsigned_type_node,
10357 ptr_type_node, ptr_type_node, NULL_TREE);
10358 decl = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL,
10359 get_identifier (name), type);
10360 DECL_ARTIFICIAL (decl) = 1;
10361 DECL_EXTERNAL (decl) = 1;
10362 TREE_PUBLIC (decl) = 1;
10363
10364 /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with
10365 are the flags assigned by targetm.encode_section_info. */
10366 SET_SYMBOL_REF_DECL (XEXP (DECL_RTL (decl), 0), NULL);
10367
10368 return decl;
10369 }
10370
10371 /* Extracts the personality function of DECL and returns the corresponding
10372 libfunc. */
10373
10374 rtx
10375 get_personality_function (tree decl)
10376 {
10377 tree personality = DECL_FUNCTION_PERSONALITY (decl);
10378 enum eh_personality_kind pk;
10379
10380 pk = function_needs_eh_personality (DECL_STRUCT_FUNCTION (decl));
10381 if (pk == eh_personality_none)
10382 return NULL;
10383
10384 if (!personality
10385 && pk == eh_personality_any)
10386 personality = lang_hooks.eh_personality ();
10387
10388 if (pk == eh_personality_lang)
10389 gcc_assert (personality != NULL_TREE);
10390
10391 return XEXP (DECL_RTL (personality), 0);
10392 }
10393
10394 #include "gt-expr.h"