re PR c++/50361 ([C++0x] [4.7 Regression] ICE with std::initializer_list and nullptr)
[gcc.git] / gcc / expr.c
1 /* Convert tree expression to rtl instructions, for GNU compiler.
2 Copyright (C) 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011
4 Free Software Foundation, Inc.
5
6 This file is part of GCC.
7
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
11 version.
12
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
21
22 #include "config.h"
23 #include "system.h"
24 #include "coretypes.h"
25 #include "tm.h"
26 #include "machmode.h"
27 #include "rtl.h"
28 #include "tree.h"
29 #include "flags.h"
30 #include "regs.h"
31 #include "hard-reg-set.h"
32 #include "except.h"
33 #include "function.h"
34 #include "insn-config.h"
35 #include "insn-attr.h"
36 /* Include expr.h after insn-config.h so we get HAVE_conditional_move. */
37 #include "expr.h"
38 #include "optabs.h"
39 #include "libfuncs.h"
40 #include "recog.h"
41 #include "reload.h"
42 #include "output.h"
43 #include "typeclass.h"
44 #include "toplev.h"
45 #include "langhooks.h"
46 #include "intl.h"
47 #include "tm_p.h"
48 #include "tree-iterator.h"
49 #include "tree-pass.h"
50 #include "tree-flow.h"
51 #include "target.h"
52 #include "common/common-target.h"
53 #include "timevar.h"
54 #include "df.h"
55 #include "diagnostic.h"
56 #include "ssaexpand.h"
57 #include "target-globals.h"
58 #include "params.h"
59
60 /* Decide whether a function's arguments should be processed
61 from first to last or from last to first.
62
63 They should if the stack and args grow in opposite directions, but
64 only if we have push insns. */
65
66 #ifdef PUSH_ROUNDING
67
68 #ifndef PUSH_ARGS_REVERSED
69 #if defined (STACK_GROWS_DOWNWARD) != defined (ARGS_GROW_DOWNWARD)
70 #define PUSH_ARGS_REVERSED /* If it's last to first. */
71 #endif
72 #endif
73
74 #endif
75
76 #ifndef STACK_PUSH_CODE
77 #ifdef STACK_GROWS_DOWNWARD
78 #define STACK_PUSH_CODE PRE_DEC
79 #else
80 #define STACK_PUSH_CODE PRE_INC
81 #endif
82 #endif
83
84
85 /* If this is nonzero, we do not bother generating VOLATILE
86 around volatile memory references, and we are willing to
87 output indirect addresses. If cse is to follow, we reject
88 indirect addresses so a useful potential cse is generated;
89 if it is used only once, instruction combination will produce
90 the same indirect address eventually. */
91 int cse_not_expected;
92
93 /* This structure is used by move_by_pieces to describe the move to
94 be performed. */
95 struct move_by_pieces_d
96 {
97 rtx to;
98 rtx to_addr;
99 int autinc_to;
100 int explicit_inc_to;
101 rtx from;
102 rtx from_addr;
103 int autinc_from;
104 int explicit_inc_from;
105 unsigned HOST_WIDE_INT len;
106 HOST_WIDE_INT offset;
107 int reverse;
108 };
109
110 /* This structure is used by store_by_pieces to describe the clear to
111 be performed. */
112
113 struct store_by_pieces_d
114 {
115 rtx to;
116 rtx to_addr;
117 int autinc_to;
118 int explicit_inc_to;
119 unsigned HOST_WIDE_INT len;
120 HOST_WIDE_INT offset;
121 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode);
122 void *constfundata;
123 int reverse;
124 };
125
126 static unsigned HOST_WIDE_INT move_by_pieces_ninsns (unsigned HOST_WIDE_INT,
127 unsigned int,
128 unsigned int);
129 static void move_by_pieces_1 (rtx (*) (rtx, ...), enum machine_mode,
130 struct move_by_pieces_d *);
131 static bool block_move_libcall_safe_for_call_parm (void);
132 static bool emit_block_move_via_movmem (rtx, rtx, rtx, unsigned, unsigned, HOST_WIDE_INT);
133 static tree emit_block_move_libcall_fn (int);
134 static void emit_block_move_via_loop (rtx, rtx, rtx, unsigned);
135 static rtx clear_by_pieces_1 (void *, HOST_WIDE_INT, enum machine_mode);
136 static void clear_by_pieces (rtx, unsigned HOST_WIDE_INT, unsigned int);
137 static void store_by_pieces_1 (struct store_by_pieces_d *, unsigned int);
138 static void store_by_pieces_2 (rtx (*) (rtx, ...), enum machine_mode,
139 struct store_by_pieces_d *);
140 static tree clear_storage_libcall_fn (int);
141 static rtx compress_float_constant (rtx, rtx);
142 static rtx get_subtarget (rtx);
143 static void store_constructor_field (rtx, unsigned HOST_WIDE_INT,
144 HOST_WIDE_INT, enum machine_mode,
145 tree, tree, int, alias_set_type);
146 static void store_constructor (tree, rtx, int, HOST_WIDE_INT);
147 static rtx store_field (rtx, HOST_WIDE_INT, HOST_WIDE_INT,
148 unsigned HOST_WIDE_INT, unsigned HOST_WIDE_INT,
149 enum machine_mode,
150 tree, tree, alias_set_type, bool);
151
152 static unsigned HOST_WIDE_INT highest_pow2_factor_for_target (const_tree, const_tree);
153
154 static int is_aligning_offset (const_tree, const_tree);
155 static void expand_operands (tree, tree, rtx, rtx*, rtx*,
156 enum expand_modifier);
157 static rtx reduce_to_bit_field_precision (rtx, rtx, tree);
158 static rtx do_store_flag (sepops, rtx, enum machine_mode);
159 #ifdef PUSH_ROUNDING
160 static void emit_single_push_insn (enum machine_mode, rtx, tree);
161 #endif
162 static void do_tablejump (rtx, enum machine_mode, rtx, rtx, rtx);
163 static rtx const_vector_from_tree (tree);
164 static void write_complex_part (rtx, rtx, bool);
165
166 /* This macro is used to determine whether move_by_pieces should be called
167 to perform a structure copy. */
168 #ifndef MOVE_BY_PIECES_P
169 #define MOVE_BY_PIECES_P(SIZE, ALIGN) \
170 (move_by_pieces_ninsns (SIZE, ALIGN, MOVE_MAX_PIECES + 1) \
171 < (unsigned int) MOVE_RATIO (optimize_insn_for_speed_p ()))
172 #endif
173
174 /* This macro is used to determine whether clear_by_pieces should be
175 called to clear storage. */
176 #ifndef CLEAR_BY_PIECES_P
177 #define CLEAR_BY_PIECES_P(SIZE, ALIGN) \
178 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
179 < (unsigned int) CLEAR_RATIO (optimize_insn_for_speed_p ()))
180 #endif
181
182 /* This macro is used to determine whether store_by_pieces should be
183 called to "memset" storage with byte values other than zero. */
184 #ifndef SET_BY_PIECES_P
185 #define SET_BY_PIECES_P(SIZE, ALIGN) \
186 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
187 < (unsigned int) SET_RATIO (optimize_insn_for_speed_p ()))
188 #endif
189
190 /* This macro is used to determine whether store_by_pieces should be
191 called to "memcpy" storage when the source is a constant string. */
192 #ifndef STORE_BY_PIECES_P
193 #define STORE_BY_PIECES_P(SIZE, ALIGN) \
194 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
195 < (unsigned int) MOVE_RATIO (optimize_insn_for_speed_p ()))
196 #endif
197
198 /* SLOW_UNALIGNED_ACCESS is nonzero if unaligned accesses are very slow. */
199
200 #ifndef SLOW_UNALIGNED_ACCESS
201 #define SLOW_UNALIGNED_ACCESS(MODE, ALIGN) STRICT_ALIGNMENT
202 #endif
203 \f
204 /* This is run to set up which modes can be used
205 directly in memory and to initialize the block move optab. It is run
206 at the beginning of compilation and when the target is reinitialized. */
207
208 void
209 init_expr_target (void)
210 {
211 rtx insn, pat;
212 enum machine_mode mode;
213 int num_clobbers;
214 rtx mem, mem1;
215 rtx reg;
216
217 /* Try indexing by frame ptr and try by stack ptr.
218 It is known that on the Convex the stack ptr isn't a valid index.
219 With luck, one or the other is valid on any machine. */
220 mem = gen_rtx_MEM (VOIDmode, stack_pointer_rtx);
221 mem1 = gen_rtx_MEM (VOIDmode, frame_pointer_rtx);
222
223 /* A scratch register we can modify in-place below to avoid
224 useless RTL allocations. */
225 reg = gen_rtx_REG (VOIDmode, -1);
226
227 insn = rtx_alloc (INSN);
228 pat = gen_rtx_SET (VOIDmode, NULL_RTX, NULL_RTX);
229 PATTERN (insn) = pat;
230
231 for (mode = VOIDmode; (int) mode < NUM_MACHINE_MODES;
232 mode = (enum machine_mode) ((int) mode + 1))
233 {
234 int regno;
235
236 direct_load[(int) mode] = direct_store[(int) mode] = 0;
237 PUT_MODE (mem, mode);
238 PUT_MODE (mem1, mode);
239 PUT_MODE (reg, mode);
240
241 /* See if there is some register that can be used in this mode and
242 directly loaded or stored from memory. */
243
244 if (mode != VOIDmode && mode != BLKmode)
245 for (regno = 0; regno < FIRST_PSEUDO_REGISTER
246 && (direct_load[(int) mode] == 0 || direct_store[(int) mode] == 0);
247 regno++)
248 {
249 if (! HARD_REGNO_MODE_OK (regno, mode))
250 continue;
251
252 SET_REGNO (reg, regno);
253
254 SET_SRC (pat) = mem;
255 SET_DEST (pat) = reg;
256 if (recog (pat, insn, &num_clobbers) >= 0)
257 direct_load[(int) mode] = 1;
258
259 SET_SRC (pat) = mem1;
260 SET_DEST (pat) = reg;
261 if (recog (pat, insn, &num_clobbers) >= 0)
262 direct_load[(int) mode] = 1;
263
264 SET_SRC (pat) = reg;
265 SET_DEST (pat) = mem;
266 if (recog (pat, insn, &num_clobbers) >= 0)
267 direct_store[(int) mode] = 1;
268
269 SET_SRC (pat) = reg;
270 SET_DEST (pat) = mem1;
271 if (recog (pat, insn, &num_clobbers) >= 0)
272 direct_store[(int) mode] = 1;
273 }
274 }
275
276 mem = gen_rtx_MEM (VOIDmode, gen_rtx_raw_REG (Pmode, 10000));
277
278 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
279 mode = GET_MODE_WIDER_MODE (mode))
280 {
281 enum machine_mode srcmode;
282 for (srcmode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); srcmode != mode;
283 srcmode = GET_MODE_WIDER_MODE (srcmode))
284 {
285 enum insn_code ic;
286
287 ic = can_extend_p (mode, srcmode, 0);
288 if (ic == CODE_FOR_nothing)
289 continue;
290
291 PUT_MODE (mem, srcmode);
292
293 if (insn_operand_matches (ic, 1, mem))
294 float_extend_from_mem[mode][srcmode] = true;
295 }
296 }
297 }
298
299 /* This is run at the start of compiling a function. */
300
301 void
302 init_expr (void)
303 {
304 memset (&crtl->expr, 0, sizeof (crtl->expr));
305 }
306 \f
307 /* Copy data from FROM to TO, where the machine modes are not the same.
308 Both modes may be integer, or both may be floating, or both may be
309 fixed-point.
310 UNSIGNEDP should be nonzero if FROM is an unsigned type.
311 This causes zero-extension instead of sign-extension. */
312
313 void
314 convert_move (rtx to, rtx from, int unsignedp)
315 {
316 enum machine_mode to_mode = GET_MODE (to);
317 enum machine_mode from_mode = GET_MODE (from);
318 int to_real = SCALAR_FLOAT_MODE_P (to_mode);
319 int from_real = SCALAR_FLOAT_MODE_P (from_mode);
320 enum insn_code code;
321 rtx libcall;
322
323 /* rtx code for making an equivalent value. */
324 enum rtx_code equiv_code = (unsignedp < 0 ? UNKNOWN
325 : (unsignedp ? ZERO_EXTEND : SIGN_EXTEND));
326
327
328 gcc_assert (to_real == from_real);
329 gcc_assert (to_mode != BLKmode);
330 gcc_assert (from_mode != BLKmode);
331
332 /* If the source and destination are already the same, then there's
333 nothing to do. */
334 if (to == from)
335 return;
336
337 /* If FROM is a SUBREG that indicates that we have already done at least
338 the required extension, strip it. We don't handle such SUBREGs as
339 TO here. */
340
341 if (GET_CODE (from) == SUBREG && SUBREG_PROMOTED_VAR_P (from)
342 && (GET_MODE_PRECISION (GET_MODE (SUBREG_REG (from)))
343 >= GET_MODE_PRECISION (to_mode))
344 && SUBREG_PROMOTED_UNSIGNED_P (from) == unsignedp)
345 from = gen_lowpart (to_mode, from), from_mode = to_mode;
346
347 gcc_assert (GET_CODE (to) != SUBREG || !SUBREG_PROMOTED_VAR_P (to));
348
349 if (to_mode == from_mode
350 || (from_mode == VOIDmode && CONSTANT_P (from)))
351 {
352 emit_move_insn (to, from);
353 return;
354 }
355
356 if (VECTOR_MODE_P (to_mode) || VECTOR_MODE_P (from_mode))
357 {
358 gcc_assert (GET_MODE_BITSIZE (from_mode) == GET_MODE_BITSIZE (to_mode));
359
360 if (VECTOR_MODE_P (to_mode))
361 from = simplify_gen_subreg (to_mode, from, GET_MODE (from), 0);
362 else
363 to = simplify_gen_subreg (from_mode, to, GET_MODE (to), 0);
364
365 emit_move_insn (to, from);
366 return;
367 }
368
369 if (GET_CODE (to) == CONCAT && GET_CODE (from) == CONCAT)
370 {
371 convert_move (XEXP (to, 0), XEXP (from, 0), unsignedp);
372 convert_move (XEXP (to, 1), XEXP (from, 1), unsignedp);
373 return;
374 }
375
376 if (to_real)
377 {
378 rtx value, insns;
379 convert_optab tab;
380
381 gcc_assert ((GET_MODE_PRECISION (from_mode)
382 != GET_MODE_PRECISION (to_mode))
383 || (DECIMAL_FLOAT_MODE_P (from_mode)
384 != DECIMAL_FLOAT_MODE_P (to_mode)));
385
386 if (GET_MODE_PRECISION (from_mode) == GET_MODE_PRECISION (to_mode))
387 /* Conversion between decimal float and binary float, same size. */
388 tab = DECIMAL_FLOAT_MODE_P (from_mode) ? trunc_optab : sext_optab;
389 else if (GET_MODE_PRECISION (from_mode) < GET_MODE_PRECISION (to_mode))
390 tab = sext_optab;
391 else
392 tab = trunc_optab;
393
394 /* Try converting directly if the insn is supported. */
395
396 code = convert_optab_handler (tab, to_mode, from_mode);
397 if (code != CODE_FOR_nothing)
398 {
399 emit_unop_insn (code, to, from,
400 tab == sext_optab ? FLOAT_EXTEND : FLOAT_TRUNCATE);
401 return;
402 }
403
404 /* Otherwise use a libcall. */
405 libcall = convert_optab_libfunc (tab, to_mode, from_mode);
406
407 /* Is this conversion implemented yet? */
408 gcc_assert (libcall);
409
410 start_sequence ();
411 value = emit_library_call_value (libcall, NULL_RTX, LCT_CONST, to_mode,
412 1, from, from_mode);
413 insns = get_insns ();
414 end_sequence ();
415 emit_libcall_block (insns, to, value,
416 tab == trunc_optab ? gen_rtx_FLOAT_TRUNCATE (to_mode,
417 from)
418 : gen_rtx_FLOAT_EXTEND (to_mode, from));
419 return;
420 }
421
422 /* Handle pointer conversion. */ /* SPEE 900220. */
423 /* Targets are expected to provide conversion insns between PxImode and
424 xImode for all MODE_PARTIAL_INT modes they use, but no others. */
425 if (GET_MODE_CLASS (to_mode) == MODE_PARTIAL_INT)
426 {
427 enum machine_mode full_mode
428 = smallest_mode_for_size (GET_MODE_BITSIZE (to_mode), MODE_INT);
429
430 gcc_assert (convert_optab_handler (trunc_optab, to_mode, full_mode)
431 != CODE_FOR_nothing);
432
433 if (full_mode != from_mode)
434 from = convert_to_mode (full_mode, from, unsignedp);
435 emit_unop_insn (convert_optab_handler (trunc_optab, to_mode, full_mode),
436 to, from, UNKNOWN);
437 return;
438 }
439 if (GET_MODE_CLASS (from_mode) == MODE_PARTIAL_INT)
440 {
441 rtx new_from;
442 enum machine_mode full_mode
443 = smallest_mode_for_size (GET_MODE_BITSIZE (from_mode), MODE_INT);
444
445 gcc_assert (convert_optab_handler (sext_optab, full_mode, from_mode)
446 != CODE_FOR_nothing);
447
448 if (to_mode == full_mode)
449 {
450 emit_unop_insn (convert_optab_handler (sext_optab, full_mode,
451 from_mode),
452 to, from, UNKNOWN);
453 return;
454 }
455
456 new_from = gen_reg_rtx (full_mode);
457 emit_unop_insn (convert_optab_handler (sext_optab, full_mode, from_mode),
458 new_from, from, UNKNOWN);
459
460 /* else proceed to integer conversions below. */
461 from_mode = full_mode;
462 from = new_from;
463 }
464
465 /* Make sure both are fixed-point modes or both are not. */
466 gcc_assert (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode) ==
467 ALL_SCALAR_FIXED_POINT_MODE_P (to_mode));
468 if (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode))
469 {
470 /* If we widen from_mode to to_mode and they are in the same class,
471 we won't saturate the result.
472 Otherwise, always saturate the result to play safe. */
473 if (GET_MODE_CLASS (from_mode) == GET_MODE_CLASS (to_mode)
474 && GET_MODE_SIZE (from_mode) < GET_MODE_SIZE (to_mode))
475 expand_fixed_convert (to, from, 0, 0);
476 else
477 expand_fixed_convert (to, from, 0, 1);
478 return;
479 }
480
481 /* Now both modes are integers. */
482
483 /* Handle expanding beyond a word. */
484 if (GET_MODE_PRECISION (from_mode) < GET_MODE_PRECISION (to_mode)
485 && GET_MODE_PRECISION (to_mode) > BITS_PER_WORD)
486 {
487 rtx insns;
488 rtx lowpart;
489 rtx fill_value;
490 rtx lowfrom;
491 int i;
492 enum machine_mode lowpart_mode;
493 int nwords = CEIL (GET_MODE_SIZE (to_mode), UNITS_PER_WORD);
494
495 /* Try converting directly if the insn is supported. */
496 if ((code = can_extend_p (to_mode, from_mode, unsignedp))
497 != CODE_FOR_nothing)
498 {
499 /* If FROM is a SUBREG, put it into a register. Do this
500 so that we always generate the same set of insns for
501 better cse'ing; if an intermediate assignment occurred,
502 we won't be doing the operation directly on the SUBREG. */
503 if (optimize > 0 && GET_CODE (from) == SUBREG)
504 from = force_reg (from_mode, from);
505 emit_unop_insn (code, to, from, equiv_code);
506 return;
507 }
508 /* Next, try converting via full word. */
509 else if (GET_MODE_PRECISION (from_mode) < BITS_PER_WORD
510 && ((code = can_extend_p (to_mode, word_mode, unsignedp))
511 != CODE_FOR_nothing))
512 {
513 rtx word_to = gen_reg_rtx (word_mode);
514 if (REG_P (to))
515 {
516 if (reg_overlap_mentioned_p (to, from))
517 from = force_reg (from_mode, from);
518 emit_clobber (to);
519 }
520 convert_move (word_to, from, unsignedp);
521 emit_unop_insn (code, to, word_to, equiv_code);
522 return;
523 }
524
525 /* No special multiword conversion insn; do it by hand. */
526 start_sequence ();
527
528 /* Since we will turn this into a no conflict block, we must ensure
529 that the source does not overlap the target. */
530
531 if (reg_overlap_mentioned_p (to, from))
532 from = force_reg (from_mode, from);
533
534 /* Get a copy of FROM widened to a word, if necessary. */
535 if (GET_MODE_PRECISION (from_mode) < BITS_PER_WORD)
536 lowpart_mode = word_mode;
537 else
538 lowpart_mode = from_mode;
539
540 lowfrom = convert_to_mode (lowpart_mode, from, unsignedp);
541
542 lowpart = gen_lowpart (lowpart_mode, to);
543 emit_move_insn (lowpart, lowfrom);
544
545 /* Compute the value to put in each remaining word. */
546 if (unsignedp)
547 fill_value = const0_rtx;
548 else
549 fill_value = emit_store_flag (gen_reg_rtx (word_mode),
550 LT, lowfrom, const0_rtx,
551 VOIDmode, 0, -1);
552
553 /* Fill the remaining words. */
554 for (i = GET_MODE_SIZE (lowpart_mode) / UNITS_PER_WORD; i < nwords; i++)
555 {
556 int index = (WORDS_BIG_ENDIAN ? nwords - i - 1 : i);
557 rtx subword = operand_subword (to, index, 1, to_mode);
558
559 gcc_assert (subword);
560
561 if (fill_value != subword)
562 emit_move_insn (subword, fill_value);
563 }
564
565 insns = get_insns ();
566 end_sequence ();
567
568 emit_insn (insns);
569 return;
570 }
571
572 /* Truncating multi-word to a word or less. */
573 if (GET_MODE_PRECISION (from_mode) > BITS_PER_WORD
574 && GET_MODE_PRECISION (to_mode) <= BITS_PER_WORD)
575 {
576 if (!((MEM_P (from)
577 && ! MEM_VOLATILE_P (from)
578 && direct_load[(int) to_mode]
579 && ! mode_dependent_address_p (XEXP (from, 0)))
580 || REG_P (from)
581 || GET_CODE (from) == SUBREG))
582 from = force_reg (from_mode, from);
583 convert_move (to, gen_lowpart (word_mode, from), 0);
584 return;
585 }
586
587 /* Now follow all the conversions between integers
588 no more than a word long. */
589
590 /* For truncation, usually we can just refer to FROM in a narrower mode. */
591 if (GET_MODE_BITSIZE (to_mode) < GET_MODE_BITSIZE (from_mode)
592 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode, from_mode))
593 {
594 if (!((MEM_P (from)
595 && ! MEM_VOLATILE_P (from)
596 && direct_load[(int) to_mode]
597 && ! mode_dependent_address_p (XEXP (from, 0)))
598 || REG_P (from)
599 || GET_CODE (from) == SUBREG))
600 from = force_reg (from_mode, from);
601 if (REG_P (from) && REGNO (from) < FIRST_PSEUDO_REGISTER
602 && ! HARD_REGNO_MODE_OK (REGNO (from), to_mode))
603 from = copy_to_reg (from);
604 emit_move_insn (to, gen_lowpart (to_mode, from));
605 return;
606 }
607
608 /* Handle extension. */
609 if (GET_MODE_PRECISION (to_mode) > GET_MODE_PRECISION (from_mode))
610 {
611 /* Convert directly if that works. */
612 if ((code = can_extend_p (to_mode, from_mode, unsignedp))
613 != CODE_FOR_nothing)
614 {
615 emit_unop_insn (code, to, from, equiv_code);
616 return;
617 }
618 else
619 {
620 enum machine_mode intermediate;
621 rtx tmp;
622 int shift_amount;
623
624 /* Search for a mode to convert via. */
625 for (intermediate = from_mode; intermediate != VOIDmode;
626 intermediate = GET_MODE_WIDER_MODE (intermediate))
627 if (((can_extend_p (to_mode, intermediate, unsignedp)
628 != CODE_FOR_nothing)
629 || (GET_MODE_SIZE (to_mode) < GET_MODE_SIZE (intermediate)
630 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode, intermediate)))
631 && (can_extend_p (intermediate, from_mode, unsignedp)
632 != CODE_FOR_nothing))
633 {
634 convert_move (to, convert_to_mode (intermediate, from,
635 unsignedp), unsignedp);
636 return;
637 }
638
639 /* No suitable intermediate mode.
640 Generate what we need with shifts. */
641 shift_amount = (GET_MODE_PRECISION (to_mode)
642 - GET_MODE_PRECISION (from_mode));
643 from = gen_lowpart (to_mode, force_reg (from_mode, from));
644 tmp = expand_shift (LSHIFT_EXPR, to_mode, from, shift_amount,
645 to, unsignedp);
646 tmp = expand_shift (RSHIFT_EXPR, to_mode, tmp, shift_amount,
647 to, unsignedp);
648 if (tmp != to)
649 emit_move_insn (to, tmp);
650 return;
651 }
652 }
653
654 /* Support special truncate insns for certain modes. */
655 if (convert_optab_handler (trunc_optab, to_mode,
656 from_mode) != CODE_FOR_nothing)
657 {
658 emit_unop_insn (convert_optab_handler (trunc_optab, to_mode, from_mode),
659 to, from, UNKNOWN);
660 return;
661 }
662
663 /* Handle truncation of volatile memrefs, and so on;
664 the things that couldn't be truncated directly,
665 and for which there was no special instruction.
666
667 ??? Code above formerly short-circuited this, for most integer
668 mode pairs, with a force_reg in from_mode followed by a recursive
669 call to this routine. Appears always to have been wrong. */
670 if (GET_MODE_PRECISION (to_mode) < GET_MODE_PRECISION (from_mode))
671 {
672 rtx temp = force_reg (to_mode, gen_lowpart (to_mode, from));
673 emit_move_insn (to, temp);
674 return;
675 }
676
677 /* Mode combination is not recognized. */
678 gcc_unreachable ();
679 }
680
681 /* Return an rtx for a value that would result
682 from converting X to mode MODE.
683 Both X and MODE may be floating, or both integer.
684 UNSIGNEDP is nonzero if X is an unsigned value.
685 This can be done by referring to a part of X in place
686 or by copying to a new temporary with conversion. */
687
688 rtx
689 convert_to_mode (enum machine_mode mode, rtx x, int unsignedp)
690 {
691 return convert_modes (mode, VOIDmode, x, unsignedp);
692 }
693
694 /* Return an rtx for a value that would result
695 from converting X from mode OLDMODE to mode MODE.
696 Both modes may be floating, or both integer.
697 UNSIGNEDP is nonzero if X is an unsigned value.
698
699 This can be done by referring to a part of X in place
700 or by copying to a new temporary with conversion.
701
702 You can give VOIDmode for OLDMODE, if you are sure X has a nonvoid mode. */
703
704 rtx
705 convert_modes (enum machine_mode mode, enum machine_mode oldmode, rtx x, int unsignedp)
706 {
707 rtx temp;
708
709 /* If FROM is a SUBREG that indicates that we have already done at least
710 the required extension, strip it. */
711
712 if (GET_CODE (x) == SUBREG && SUBREG_PROMOTED_VAR_P (x)
713 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) >= GET_MODE_SIZE (mode)
714 && SUBREG_PROMOTED_UNSIGNED_P (x) == unsignedp)
715 x = gen_lowpart (mode, x);
716
717 if (GET_MODE (x) != VOIDmode)
718 oldmode = GET_MODE (x);
719
720 if (mode == oldmode)
721 return x;
722
723 /* There is one case that we must handle specially: If we are converting
724 a CONST_INT into a mode whose size is twice HOST_BITS_PER_WIDE_INT and
725 we are to interpret the constant as unsigned, gen_lowpart will do
726 the wrong if the constant appears negative. What we want to do is
727 make the high-order word of the constant zero, not all ones. */
728
729 if (unsignedp && GET_MODE_CLASS (mode) == MODE_INT
730 && GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT
731 && CONST_INT_P (x) && INTVAL (x) < 0)
732 {
733 double_int val = uhwi_to_double_int (INTVAL (x));
734
735 /* We need to zero extend VAL. */
736 if (oldmode != VOIDmode)
737 val = double_int_zext (val, GET_MODE_BITSIZE (oldmode));
738
739 return immed_double_int_const (val, mode);
740 }
741
742 /* We can do this with a gen_lowpart if both desired and current modes
743 are integer, and this is either a constant integer, a register, or a
744 non-volatile MEM. Except for the constant case where MODE is no
745 wider than HOST_BITS_PER_WIDE_INT, we must be narrowing the operand. */
746
747 if ((CONST_INT_P (x)
748 && GET_MODE_PRECISION (mode) <= HOST_BITS_PER_WIDE_INT)
749 || (GET_MODE_CLASS (mode) == MODE_INT
750 && GET_MODE_CLASS (oldmode) == MODE_INT
751 && (GET_CODE (x) == CONST_DOUBLE
752 || (GET_MODE_PRECISION (mode) <= GET_MODE_PRECISION (oldmode)
753 && ((MEM_P (x) && ! MEM_VOLATILE_P (x)
754 && direct_load[(int) mode])
755 || (REG_P (x)
756 && (! HARD_REGISTER_P (x)
757 || HARD_REGNO_MODE_OK (REGNO (x), mode))
758 && TRULY_NOOP_TRUNCATION_MODES_P (mode,
759 GET_MODE (x))))))))
760 {
761 /* ?? If we don't know OLDMODE, we have to assume here that
762 X does not need sign- or zero-extension. This may not be
763 the case, but it's the best we can do. */
764 if (CONST_INT_P (x) && oldmode != VOIDmode
765 && GET_MODE_PRECISION (mode) > GET_MODE_PRECISION (oldmode))
766 {
767 HOST_WIDE_INT val = INTVAL (x);
768
769 /* We must sign or zero-extend in this case. Start by
770 zero-extending, then sign extend if we need to. */
771 val &= GET_MODE_MASK (oldmode);
772 if (! unsignedp
773 && val_signbit_known_set_p (oldmode, val))
774 val |= ~GET_MODE_MASK (oldmode);
775
776 return gen_int_mode (val, mode);
777 }
778
779 return gen_lowpart (mode, x);
780 }
781
782 /* Converting from integer constant into mode is always equivalent to an
783 subreg operation. */
784 if (VECTOR_MODE_P (mode) && GET_MODE (x) == VOIDmode)
785 {
786 gcc_assert (GET_MODE_BITSIZE (mode) == GET_MODE_BITSIZE (oldmode));
787 return simplify_gen_subreg (mode, x, oldmode, 0);
788 }
789
790 temp = gen_reg_rtx (mode);
791 convert_move (temp, x, unsignedp);
792 return temp;
793 }
794 \f
795 /* Return the largest alignment we can use for doing a move (or store)
796 of MAX_PIECES. ALIGN is the largest alignment we could use. */
797
798 static unsigned int
799 alignment_for_piecewise_move (unsigned int max_pieces, unsigned int align)
800 {
801 enum machine_mode tmode;
802
803 tmode = mode_for_size (max_pieces * BITS_PER_UNIT, MODE_INT, 1);
804 if (align >= GET_MODE_ALIGNMENT (tmode))
805 align = GET_MODE_ALIGNMENT (tmode);
806 else
807 {
808 enum machine_mode tmode, xmode;
809
810 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT), xmode = tmode;
811 tmode != VOIDmode;
812 xmode = tmode, tmode = GET_MODE_WIDER_MODE (tmode))
813 if (GET_MODE_SIZE (tmode) > max_pieces
814 || SLOW_UNALIGNED_ACCESS (tmode, align))
815 break;
816
817 align = MAX (align, GET_MODE_ALIGNMENT (xmode));
818 }
819
820 return align;
821 }
822
823 /* Return the widest integer mode no wider than SIZE. If no such mode
824 can be found, return VOIDmode. */
825
826 static enum machine_mode
827 widest_int_mode_for_size (unsigned int size)
828 {
829 enum machine_mode tmode, mode = VOIDmode;
830
831 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT);
832 tmode != VOIDmode; tmode = GET_MODE_WIDER_MODE (tmode))
833 if (GET_MODE_SIZE (tmode) < size)
834 mode = tmode;
835
836 return mode;
837 }
838
839 /* STORE_MAX_PIECES is the number of bytes at a time that we can
840 store efficiently. Due to internal GCC limitations, this is
841 MOVE_MAX_PIECES limited by the number of bytes GCC can represent
842 for an immediate constant. */
843
844 #define STORE_MAX_PIECES MIN (MOVE_MAX_PIECES, 2 * sizeof (HOST_WIDE_INT))
845
846 /* Determine whether the LEN bytes can be moved by using several move
847 instructions. Return nonzero if a call to move_by_pieces should
848 succeed. */
849
850 int
851 can_move_by_pieces (unsigned HOST_WIDE_INT len,
852 unsigned int align ATTRIBUTE_UNUSED)
853 {
854 return MOVE_BY_PIECES_P (len, align);
855 }
856
857 /* Generate several move instructions to copy LEN bytes from block FROM to
858 block TO. (These are MEM rtx's with BLKmode).
859
860 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
861 used to push FROM to the stack.
862
863 ALIGN is maximum stack alignment we can assume.
864
865 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
866 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
867 stpcpy. */
868
869 rtx
870 move_by_pieces (rtx to, rtx from, unsigned HOST_WIDE_INT len,
871 unsigned int align, int endp)
872 {
873 struct move_by_pieces_d data;
874 enum machine_mode to_addr_mode, from_addr_mode
875 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (from));
876 rtx to_addr, from_addr = XEXP (from, 0);
877 unsigned int max_size = MOVE_MAX_PIECES + 1;
878 enum insn_code icode;
879
880 align = MIN (to ? MEM_ALIGN (to) : align, MEM_ALIGN (from));
881
882 data.offset = 0;
883 data.from_addr = from_addr;
884 if (to)
885 {
886 to_addr_mode = targetm.addr_space.address_mode (MEM_ADDR_SPACE (to));
887 to_addr = XEXP (to, 0);
888 data.to = to;
889 data.autinc_to
890 = (GET_CODE (to_addr) == PRE_INC || GET_CODE (to_addr) == PRE_DEC
891 || GET_CODE (to_addr) == POST_INC || GET_CODE (to_addr) == POST_DEC);
892 data.reverse
893 = (GET_CODE (to_addr) == PRE_DEC || GET_CODE (to_addr) == POST_DEC);
894 }
895 else
896 {
897 to_addr_mode = VOIDmode;
898 to_addr = NULL_RTX;
899 data.to = NULL_RTX;
900 data.autinc_to = 1;
901 #ifdef STACK_GROWS_DOWNWARD
902 data.reverse = 1;
903 #else
904 data.reverse = 0;
905 #endif
906 }
907 data.to_addr = to_addr;
908 data.from = from;
909 data.autinc_from
910 = (GET_CODE (from_addr) == PRE_INC || GET_CODE (from_addr) == PRE_DEC
911 || GET_CODE (from_addr) == POST_INC
912 || GET_CODE (from_addr) == POST_DEC);
913
914 data.explicit_inc_from = 0;
915 data.explicit_inc_to = 0;
916 if (data.reverse) data.offset = len;
917 data.len = len;
918
919 /* If copying requires more than two move insns,
920 copy addresses to registers (to make displacements shorter)
921 and use post-increment if available. */
922 if (!(data.autinc_from && data.autinc_to)
923 && move_by_pieces_ninsns (len, align, max_size) > 2)
924 {
925 /* Find the mode of the largest move...
926 MODE might not be used depending on the definitions of the
927 USE_* macros below. */
928 enum machine_mode mode ATTRIBUTE_UNUSED
929 = widest_int_mode_for_size (max_size);
930
931 if (USE_LOAD_PRE_DECREMENT (mode) && data.reverse && ! data.autinc_from)
932 {
933 data.from_addr = copy_to_mode_reg (from_addr_mode,
934 plus_constant (from_addr, len));
935 data.autinc_from = 1;
936 data.explicit_inc_from = -1;
937 }
938 if (USE_LOAD_POST_INCREMENT (mode) && ! data.autinc_from)
939 {
940 data.from_addr = copy_to_mode_reg (from_addr_mode, from_addr);
941 data.autinc_from = 1;
942 data.explicit_inc_from = 1;
943 }
944 if (!data.autinc_from && CONSTANT_P (from_addr))
945 data.from_addr = copy_to_mode_reg (from_addr_mode, from_addr);
946 if (USE_STORE_PRE_DECREMENT (mode) && data.reverse && ! data.autinc_to)
947 {
948 data.to_addr = copy_to_mode_reg (to_addr_mode,
949 plus_constant (to_addr, len));
950 data.autinc_to = 1;
951 data.explicit_inc_to = -1;
952 }
953 if (USE_STORE_POST_INCREMENT (mode) && ! data.reverse && ! data.autinc_to)
954 {
955 data.to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
956 data.autinc_to = 1;
957 data.explicit_inc_to = 1;
958 }
959 if (!data.autinc_to && CONSTANT_P (to_addr))
960 data.to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
961 }
962
963 align = alignment_for_piecewise_move (MOVE_MAX_PIECES, align);
964
965 /* First move what we can in the largest integer mode, then go to
966 successively smaller modes. */
967
968 while (max_size > 1)
969 {
970 enum machine_mode mode = widest_int_mode_for_size (max_size);
971
972 if (mode == VOIDmode)
973 break;
974
975 icode = optab_handler (mov_optab, mode);
976 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
977 move_by_pieces_1 (GEN_FCN (icode), mode, &data);
978
979 max_size = GET_MODE_SIZE (mode);
980 }
981
982 /* The code above should have handled everything. */
983 gcc_assert (!data.len);
984
985 if (endp)
986 {
987 rtx to1;
988
989 gcc_assert (!data.reverse);
990 if (data.autinc_to)
991 {
992 if (endp == 2)
993 {
994 if (HAVE_POST_INCREMENT && data.explicit_inc_to > 0)
995 emit_insn (gen_add2_insn (data.to_addr, constm1_rtx));
996 else
997 data.to_addr = copy_to_mode_reg (to_addr_mode,
998 plus_constant (data.to_addr,
999 -1));
1000 }
1001 to1 = adjust_automodify_address (data.to, QImode, data.to_addr,
1002 data.offset);
1003 }
1004 else
1005 {
1006 if (endp == 2)
1007 --data.offset;
1008 to1 = adjust_address (data.to, QImode, data.offset);
1009 }
1010 return to1;
1011 }
1012 else
1013 return data.to;
1014 }
1015
1016 /* Return number of insns required to move L bytes by pieces.
1017 ALIGN (in bits) is maximum alignment we can assume. */
1018
1019 static unsigned HOST_WIDE_INT
1020 move_by_pieces_ninsns (unsigned HOST_WIDE_INT l, unsigned int align,
1021 unsigned int max_size)
1022 {
1023 unsigned HOST_WIDE_INT n_insns = 0;
1024
1025 align = alignment_for_piecewise_move (MOVE_MAX_PIECES, align);
1026
1027 while (max_size > 1)
1028 {
1029 enum machine_mode mode;
1030 enum insn_code icode;
1031
1032 mode = widest_int_mode_for_size (max_size);
1033
1034 if (mode == VOIDmode)
1035 break;
1036
1037 icode = optab_handler (mov_optab, mode);
1038 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
1039 n_insns += l / GET_MODE_SIZE (mode), l %= GET_MODE_SIZE (mode);
1040
1041 max_size = GET_MODE_SIZE (mode);
1042 }
1043
1044 gcc_assert (!l);
1045 return n_insns;
1046 }
1047
1048 /* Subroutine of move_by_pieces. Move as many bytes as appropriate
1049 with move instructions for mode MODE. GENFUN is the gen_... function
1050 to make a move insn for that mode. DATA has all the other info. */
1051
1052 static void
1053 move_by_pieces_1 (rtx (*genfun) (rtx, ...), enum machine_mode mode,
1054 struct move_by_pieces_d *data)
1055 {
1056 unsigned int size = GET_MODE_SIZE (mode);
1057 rtx to1 = NULL_RTX, from1;
1058
1059 while (data->len >= size)
1060 {
1061 if (data->reverse)
1062 data->offset -= size;
1063
1064 if (data->to)
1065 {
1066 if (data->autinc_to)
1067 to1 = adjust_automodify_address (data->to, mode, data->to_addr,
1068 data->offset);
1069 else
1070 to1 = adjust_address (data->to, mode, data->offset);
1071 }
1072
1073 if (data->autinc_from)
1074 from1 = adjust_automodify_address (data->from, mode, data->from_addr,
1075 data->offset);
1076 else
1077 from1 = adjust_address (data->from, mode, data->offset);
1078
1079 if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0)
1080 emit_insn (gen_add2_insn (data->to_addr,
1081 GEN_INT (-(HOST_WIDE_INT)size)));
1082 if (HAVE_PRE_DECREMENT && data->explicit_inc_from < 0)
1083 emit_insn (gen_add2_insn (data->from_addr,
1084 GEN_INT (-(HOST_WIDE_INT)size)));
1085
1086 if (data->to)
1087 emit_insn ((*genfun) (to1, from1));
1088 else
1089 {
1090 #ifdef PUSH_ROUNDING
1091 emit_single_push_insn (mode, from1, NULL);
1092 #else
1093 gcc_unreachable ();
1094 #endif
1095 }
1096
1097 if (HAVE_POST_INCREMENT && data->explicit_inc_to > 0)
1098 emit_insn (gen_add2_insn (data->to_addr, GEN_INT (size)));
1099 if (HAVE_POST_INCREMENT && data->explicit_inc_from > 0)
1100 emit_insn (gen_add2_insn (data->from_addr, GEN_INT (size)));
1101
1102 if (! data->reverse)
1103 data->offset += size;
1104
1105 data->len -= size;
1106 }
1107 }
1108 \f
1109 /* Emit code to move a block Y to a block X. This may be done with
1110 string-move instructions, with multiple scalar move instructions,
1111 or with a library call.
1112
1113 Both X and Y must be MEM rtx's (perhaps inside VOLATILE) with mode BLKmode.
1114 SIZE is an rtx that says how long they are.
1115 ALIGN is the maximum alignment we can assume they have.
1116 METHOD describes what kind of copy this is, and what mechanisms may be used.
1117
1118 Return the address of the new block, if memcpy is called and returns it,
1119 0 otherwise. */
1120
1121 rtx
1122 emit_block_move_hints (rtx x, rtx y, rtx size, enum block_op_methods method,
1123 unsigned int expected_align, HOST_WIDE_INT expected_size)
1124 {
1125 bool may_use_call;
1126 rtx retval = 0;
1127 unsigned int align;
1128
1129 gcc_assert (size);
1130 if (CONST_INT_P (size)
1131 && INTVAL (size) == 0)
1132 return 0;
1133
1134 switch (method)
1135 {
1136 case BLOCK_OP_NORMAL:
1137 case BLOCK_OP_TAILCALL:
1138 may_use_call = true;
1139 break;
1140
1141 case BLOCK_OP_CALL_PARM:
1142 may_use_call = block_move_libcall_safe_for_call_parm ();
1143
1144 /* Make inhibit_defer_pop nonzero around the library call
1145 to force it to pop the arguments right away. */
1146 NO_DEFER_POP;
1147 break;
1148
1149 case BLOCK_OP_NO_LIBCALL:
1150 may_use_call = false;
1151 break;
1152
1153 default:
1154 gcc_unreachable ();
1155 }
1156
1157 gcc_assert (MEM_P (x) && MEM_P (y));
1158 align = MIN (MEM_ALIGN (x), MEM_ALIGN (y));
1159 gcc_assert (align >= BITS_PER_UNIT);
1160
1161 /* Make sure we've got BLKmode addresses; store_one_arg can decide that
1162 block copy is more efficient for other large modes, e.g. DCmode. */
1163 x = adjust_address (x, BLKmode, 0);
1164 y = adjust_address (y, BLKmode, 0);
1165
1166 /* Set MEM_SIZE as appropriate for this block copy. The main place this
1167 can be incorrect is coming from __builtin_memcpy. */
1168 if (CONST_INT_P (size))
1169 {
1170 x = shallow_copy_rtx (x);
1171 y = shallow_copy_rtx (y);
1172 set_mem_size (x, INTVAL (size));
1173 set_mem_size (y, INTVAL (size));
1174 }
1175
1176 if (CONST_INT_P (size) && MOVE_BY_PIECES_P (INTVAL (size), align))
1177 move_by_pieces (x, y, INTVAL (size), align, 0);
1178 else if (emit_block_move_via_movmem (x, y, size, align,
1179 expected_align, expected_size))
1180 ;
1181 else if (may_use_call
1182 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (x))
1183 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (y)))
1184 {
1185 /* Since x and y are passed to a libcall, mark the corresponding
1186 tree EXPR as addressable. */
1187 tree y_expr = MEM_EXPR (y);
1188 tree x_expr = MEM_EXPR (x);
1189 if (y_expr)
1190 mark_addressable (y_expr);
1191 if (x_expr)
1192 mark_addressable (x_expr);
1193 retval = emit_block_move_via_libcall (x, y, size,
1194 method == BLOCK_OP_TAILCALL);
1195 }
1196
1197 else
1198 emit_block_move_via_loop (x, y, size, align);
1199
1200 if (method == BLOCK_OP_CALL_PARM)
1201 OK_DEFER_POP;
1202
1203 return retval;
1204 }
1205
1206 rtx
1207 emit_block_move (rtx x, rtx y, rtx size, enum block_op_methods method)
1208 {
1209 return emit_block_move_hints (x, y, size, method, 0, -1);
1210 }
1211
1212 /* A subroutine of emit_block_move. Returns true if calling the
1213 block move libcall will not clobber any parameters which may have
1214 already been placed on the stack. */
1215
1216 static bool
1217 block_move_libcall_safe_for_call_parm (void)
1218 {
1219 #if defined (REG_PARM_STACK_SPACE)
1220 tree fn;
1221 #endif
1222
1223 /* If arguments are pushed on the stack, then they're safe. */
1224 if (PUSH_ARGS)
1225 return true;
1226
1227 /* If registers go on the stack anyway, any argument is sure to clobber
1228 an outgoing argument. */
1229 #if defined (REG_PARM_STACK_SPACE)
1230 fn = emit_block_move_libcall_fn (false);
1231 /* Avoid set but not used warning if *REG_PARM_STACK_SPACE doesn't
1232 depend on its argument. */
1233 (void) fn;
1234 if (OUTGOING_REG_PARM_STACK_SPACE ((!fn ? NULL_TREE : TREE_TYPE (fn)))
1235 && REG_PARM_STACK_SPACE (fn) != 0)
1236 return false;
1237 #endif
1238
1239 /* If any argument goes in memory, then it might clobber an outgoing
1240 argument. */
1241 {
1242 CUMULATIVE_ARGS args_so_far_v;
1243 cumulative_args_t args_so_far;
1244 tree fn, arg;
1245
1246 fn = emit_block_move_libcall_fn (false);
1247 INIT_CUMULATIVE_ARGS (args_so_far_v, TREE_TYPE (fn), NULL_RTX, 0, 3);
1248 args_so_far = pack_cumulative_args (&args_so_far_v);
1249
1250 arg = TYPE_ARG_TYPES (TREE_TYPE (fn));
1251 for ( ; arg != void_list_node ; arg = TREE_CHAIN (arg))
1252 {
1253 enum machine_mode mode = TYPE_MODE (TREE_VALUE (arg));
1254 rtx tmp = targetm.calls.function_arg (args_so_far, mode,
1255 NULL_TREE, true);
1256 if (!tmp || !REG_P (tmp))
1257 return false;
1258 if (targetm.calls.arg_partial_bytes (args_so_far, mode, NULL, 1))
1259 return false;
1260 targetm.calls.function_arg_advance (args_so_far, mode,
1261 NULL_TREE, true);
1262 }
1263 }
1264 return true;
1265 }
1266
1267 /* A subroutine of emit_block_move. Expand a movmem pattern;
1268 return true if successful. */
1269
1270 static bool
1271 emit_block_move_via_movmem (rtx x, rtx y, rtx size, unsigned int align,
1272 unsigned int expected_align, HOST_WIDE_INT expected_size)
1273 {
1274 int save_volatile_ok = volatile_ok;
1275 enum machine_mode mode;
1276
1277 if (expected_align < align)
1278 expected_align = align;
1279
1280 /* Since this is a move insn, we don't care about volatility. */
1281 volatile_ok = 1;
1282
1283 /* Try the most limited insn first, because there's no point
1284 including more than one in the machine description unless
1285 the more limited one has some advantage. */
1286
1287 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
1288 mode = GET_MODE_WIDER_MODE (mode))
1289 {
1290 enum insn_code code = direct_optab_handler (movmem_optab, mode);
1291
1292 if (code != CODE_FOR_nothing
1293 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
1294 here because if SIZE is less than the mode mask, as it is
1295 returned by the macro, it will definitely be less than the
1296 actual mode mask. */
1297 && ((CONST_INT_P (size)
1298 && ((unsigned HOST_WIDE_INT) INTVAL (size)
1299 <= (GET_MODE_MASK (mode) >> 1)))
1300 || GET_MODE_BITSIZE (mode) >= BITS_PER_WORD))
1301 {
1302 struct expand_operand ops[6];
1303 unsigned int nops;
1304
1305 /* ??? When called via emit_block_move_for_call, it'd be
1306 nice if there were some way to inform the backend, so
1307 that it doesn't fail the expansion because it thinks
1308 emitting the libcall would be more efficient. */
1309 nops = insn_data[(int) code].n_generator_args;
1310 gcc_assert (nops == 4 || nops == 6);
1311
1312 create_fixed_operand (&ops[0], x);
1313 create_fixed_operand (&ops[1], y);
1314 /* The check above guarantees that this size conversion is valid. */
1315 create_convert_operand_to (&ops[2], size, mode, true);
1316 create_integer_operand (&ops[3], align / BITS_PER_UNIT);
1317 if (nops == 6)
1318 {
1319 create_integer_operand (&ops[4], expected_align / BITS_PER_UNIT);
1320 create_integer_operand (&ops[5], expected_size);
1321 }
1322 if (maybe_expand_insn (code, nops, ops))
1323 {
1324 volatile_ok = save_volatile_ok;
1325 return true;
1326 }
1327 }
1328 }
1329
1330 volatile_ok = save_volatile_ok;
1331 return false;
1332 }
1333
1334 /* A subroutine of emit_block_move. Expand a call to memcpy.
1335 Return the return value from memcpy, 0 otherwise. */
1336
1337 rtx
1338 emit_block_move_via_libcall (rtx dst, rtx src, rtx size, bool tailcall)
1339 {
1340 rtx dst_addr, src_addr;
1341 tree call_expr, fn, src_tree, dst_tree, size_tree;
1342 enum machine_mode size_mode;
1343 rtx retval;
1344
1345 /* Emit code to copy the addresses of DST and SRC and SIZE into new
1346 pseudos. We can then place those new pseudos into a VAR_DECL and
1347 use them later. */
1348
1349 dst_addr = copy_to_mode_reg (Pmode, XEXP (dst, 0));
1350 src_addr = copy_to_mode_reg (Pmode, XEXP (src, 0));
1351
1352 dst_addr = convert_memory_address (ptr_mode, dst_addr);
1353 src_addr = convert_memory_address (ptr_mode, src_addr);
1354
1355 dst_tree = make_tree (ptr_type_node, dst_addr);
1356 src_tree = make_tree (ptr_type_node, src_addr);
1357
1358 size_mode = TYPE_MODE (sizetype);
1359
1360 size = convert_to_mode (size_mode, size, 1);
1361 size = copy_to_mode_reg (size_mode, size);
1362
1363 /* It is incorrect to use the libcall calling conventions to call
1364 memcpy in this context. This could be a user call to memcpy and
1365 the user may wish to examine the return value from memcpy. For
1366 targets where libcalls and normal calls have different conventions
1367 for returning pointers, we could end up generating incorrect code. */
1368
1369 size_tree = make_tree (sizetype, size);
1370
1371 fn = emit_block_move_libcall_fn (true);
1372 call_expr = build_call_expr (fn, 3, dst_tree, src_tree, size_tree);
1373 CALL_EXPR_TAILCALL (call_expr) = tailcall;
1374
1375 retval = expand_normal (call_expr);
1376
1377 return retval;
1378 }
1379
1380 /* A subroutine of emit_block_move_via_libcall. Create the tree node
1381 for the function we use for block copies. The first time FOR_CALL
1382 is true, we call assemble_external. */
1383
1384 static GTY(()) tree block_move_fn;
1385
1386 void
1387 init_block_move_fn (const char *asmspec)
1388 {
1389 if (!block_move_fn)
1390 {
1391 tree args, fn;
1392
1393 fn = get_identifier ("memcpy");
1394 args = build_function_type_list (ptr_type_node, ptr_type_node,
1395 const_ptr_type_node, sizetype,
1396 NULL_TREE);
1397
1398 fn = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL, fn, args);
1399 DECL_EXTERNAL (fn) = 1;
1400 TREE_PUBLIC (fn) = 1;
1401 DECL_ARTIFICIAL (fn) = 1;
1402 TREE_NOTHROW (fn) = 1;
1403 DECL_VISIBILITY (fn) = VISIBILITY_DEFAULT;
1404 DECL_VISIBILITY_SPECIFIED (fn) = 1;
1405
1406 block_move_fn = fn;
1407 }
1408
1409 if (asmspec)
1410 set_user_assembler_name (block_move_fn, asmspec);
1411 }
1412
1413 static tree
1414 emit_block_move_libcall_fn (int for_call)
1415 {
1416 static bool emitted_extern;
1417
1418 if (!block_move_fn)
1419 init_block_move_fn (NULL);
1420
1421 if (for_call && !emitted_extern)
1422 {
1423 emitted_extern = true;
1424 make_decl_rtl (block_move_fn);
1425 assemble_external (block_move_fn);
1426 }
1427
1428 return block_move_fn;
1429 }
1430
1431 /* A subroutine of emit_block_move. Copy the data via an explicit
1432 loop. This is used only when libcalls are forbidden. */
1433 /* ??? It'd be nice to copy in hunks larger than QImode. */
1434
1435 static void
1436 emit_block_move_via_loop (rtx x, rtx y, rtx size,
1437 unsigned int align ATTRIBUTE_UNUSED)
1438 {
1439 rtx cmp_label, top_label, iter, x_addr, y_addr, tmp;
1440 enum machine_mode x_addr_mode
1441 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (x));
1442 enum machine_mode y_addr_mode
1443 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (y));
1444 enum machine_mode iter_mode;
1445
1446 iter_mode = GET_MODE (size);
1447 if (iter_mode == VOIDmode)
1448 iter_mode = word_mode;
1449
1450 top_label = gen_label_rtx ();
1451 cmp_label = gen_label_rtx ();
1452 iter = gen_reg_rtx (iter_mode);
1453
1454 emit_move_insn (iter, const0_rtx);
1455
1456 x_addr = force_operand (XEXP (x, 0), NULL_RTX);
1457 y_addr = force_operand (XEXP (y, 0), NULL_RTX);
1458 do_pending_stack_adjust ();
1459
1460 emit_jump (cmp_label);
1461 emit_label (top_label);
1462
1463 tmp = convert_modes (x_addr_mode, iter_mode, iter, true);
1464 x_addr = gen_rtx_PLUS (x_addr_mode, x_addr, tmp);
1465
1466 if (x_addr_mode != y_addr_mode)
1467 tmp = convert_modes (y_addr_mode, iter_mode, iter, true);
1468 y_addr = gen_rtx_PLUS (y_addr_mode, y_addr, tmp);
1469
1470 x = change_address (x, QImode, x_addr);
1471 y = change_address (y, QImode, y_addr);
1472
1473 emit_move_insn (x, y);
1474
1475 tmp = expand_simple_binop (iter_mode, PLUS, iter, const1_rtx, iter,
1476 true, OPTAB_LIB_WIDEN);
1477 if (tmp != iter)
1478 emit_move_insn (iter, tmp);
1479
1480 emit_label (cmp_label);
1481
1482 emit_cmp_and_jump_insns (iter, size, LT, NULL_RTX, iter_mode,
1483 true, top_label);
1484 }
1485 \f
1486 /* Copy all or part of a value X into registers starting at REGNO.
1487 The number of registers to be filled is NREGS. */
1488
1489 void
1490 move_block_to_reg (int regno, rtx x, int nregs, enum machine_mode mode)
1491 {
1492 int i;
1493 #ifdef HAVE_load_multiple
1494 rtx pat;
1495 rtx last;
1496 #endif
1497
1498 if (nregs == 0)
1499 return;
1500
1501 if (CONSTANT_P (x) && !targetm.legitimate_constant_p (mode, x))
1502 x = validize_mem (force_const_mem (mode, x));
1503
1504 /* See if the machine can do this with a load multiple insn. */
1505 #ifdef HAVE_load_multiple
1506 if (HAVE_load_multiple)
1507 {
1508 last = get_last_insn ();
1509 pat = gen_load_multiple (gen_rtx_REG (word_mode, regno), x,
1510 GEN_INT (nregs));
1511 if (pat)
1512 {
1513 emit_insn (pat);
1514 return;
1515 }
1516 else
1517 delete_insns_since (last);
1518 }
1519 #endif
1520
1521 for (i = 0; i < nregs; i++)
1522 emit_move_insn (gen_rtx_REG (word_mode, regno + i),
1523 operand_subword_force (x, i, mode));
1524 }
1525
1526 /* Copy all or part of a BLKmode value X out of registers starting at REGNO.
1527 The number of registers to be filled is NREGS. */
1528
1529 void
1530 move_block_from_reg (int regno, rtx x, int nregs)
1531 {
1532 int i;
1533
1534 if (nregs == 0)
1535 return;
1536
1537 /* See if the machine can do this with a store multiple insn. */
1538 #ifdef HAVE_store_multiple
1539 if (HAVE_store_multiple)
1540 {
1541 rtx last = get_last_insn ();
1542 rtx pat = gen_store_multiple (x, gen_rtx_REG (word_mode, regno),
1543 GEN_INT (nregs));
1544 if (pat)
1545 {
1546 emit_insn (pat);
1547 return;
1548 }
1549 else
1550 delete_insns_since (last);
1551 }
1552 #endif
1553
1554 for (i = 0; i < nregs; i++)
1555 {
1556 rtx tem = operand_subword (x, i, 1, BLKmode);
1557
1558 gcc_assert (tem);
1559
1560 emit_move_insn (tem, gen_rtx_REG (word_mode, regno + i));
1561 }
1562 }
1563
1564 /* Generate a PARALLEL rtx for a new non-consecutive group of registers from
1565 ORIG, where ORIG is a non-consecutive group of registers represented by
1566 a PARALLEL. The clone is identical to the original except in that the
1567 original set of registers is replaced by a new set of pseudo registers.
1568 The new set has the same modes as the original set. */
1569
1570 rtx
1571 gen_group_rtx (rtx orig)
1572 {
1573 int i, length;
1574 rtx *tmps;
1575
1576 gcc_assert (GET_CODE (orig) == PARALLEL);
1577
1578 length = XVECLEN (orig, 0);
1579 tmps = XALLOCAVEC (rtx, length);
1580
1581 /* Skip a NULL entry in first slot. */
1582 i = XEXP (XVECEXP (orig, 0, 0), 0) ? 0 : 1;
1583
1584 if (i)
1585 tmps[0] = 0;
1586
1587 for (; i < length; i++)
1588 {
1589 enum machine_mode mode = GET_MODE (XEXP (XVECEXP (orig, 0, i), 0));
1590 rtx offset = XEXP (XVECEXP (orig, 0, i), 1);
1591
1592 tmps[i] = gen_rtx_EXPR_LIST (VOIDmode, gen_reg_rtx (mode), offset);
1593 }
1594
1595 return gen_rtx_PARALLEL (GET_MODE (orig), gen_rtvec_v (length, tmps));
1596 }
1597
1598 /* A subroutine of emit_group_load. Arguments as for emit_group_load,
1599 except that values are placed in TMPS[i], and must later be moved
1600 into corresponding XEXP (XVECEXP (DST, 0, i), 0) element. */
1601
1602 static void
1603 emit_group_load_1 (rtx *tmps, rtx dst, rtx orig_src, tree type, int ssize)
1604 {
1605 rtx src;
1606 int start, i;
1607 enum machine_mode m = GET_MODE (orig_src);
1608
1609 gcc_assert (GET_CODE (dst) == PARALLEL);
1610
1611 if (m != VOIDmode
1612 && !SCALAR_INT_MODE_P (m)
1613 && !MEM_P (orig_src)
1614 && GET_CODE (orig_src) != CONCAT)
1615 {
1616 enum machine_mode imode = int_mode_for_mode (GET_MODE (orig_src));
1617 if (imode == BLKmode)
1618 src = assign_stack_temp (GET_MODE (orig_src), ssize, 0);
1619 else
1620 src = gen_reg_rtx (imode);
1621 if (imode != BLKmode)
1622 src = gen_lowpart (GET_MODE (orig_src), src);
1623 emit_move_insn (src, orig_src);
1624 /* ...and back again. */
1625 if (imode != BLKmode)
1626 src = gen_lowpart (imode, src);
1627 emit_group_load_1 (tmps, dst, src, type, ssize);
1628 return;
1629 }
1630
1631 /* Check for a NULL entry, used to indicate that the parameter goes
1632 both on the stack and in registers. */
1633 if (XEXP (XVECEXP (dst, 0, 0), 0))
1634 start = 0;
1635 else
1636 start = 1;
1637
1638 /* Process the pieces. */
1639 for (i = start; i < XVECLEN (dst, 0); i++)
1640 {
1641 enum machine_mode mode = GET_MODE (XEXP (XVECEXP (dst, 0, i), 0));
1642 HOST_WIDE_INT bytepos = INTVAL (XEXP (XVECEXP (dst, 0, i), 1));
1643 unsigned int bytelen = GET_MODE_SIZE (mode);
1644 int shift = 0;
1645
1646 /* Handle trailing fragments that run over the size of the struct. */
1647 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
1648 {
1649 /* Arrange to shift the fragment to where it belongs.
1650 extract_bit_field loads to the lsb of the reg. */
1651 if (
1652 #ifdef BLOCK_REG_PADDING
1653 BLOCK_REG_PADDING (GET_MODE (orig_src), type, i == start)
1654 == (BYTES_BIG_ENDIAN ? upward : downward)
1655 #else
1656 BYTES_BIG_ENDIAN
1657 #endif
1658 )
1659 shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT;
1660 bytelen = ssize - bytepos;
1661 gcc_assert (bytelen > 0);
1662 }
1663
1664 /* If we won't be loading directly from memory, protect the real source
1665 from strange tricks we might play; but make sure that the source can
1666 be loaded directly into the destination. */
1667 src = orig_src;
1668 if (!MEM_P (orig_src)
1669 && (!CONSTANT_P (orig_src)
1670 || (GET_MODE (orig_src) != mode
1671 && GET_MODE (orig_src) != VOIDmode)))
1672 {
1673 if (GET_MODE (orig_src) == VOIDmode)
1674 src = gen_reg_rtx (mode);
1675 else
1676 src = gen_reg_rtx (GET_MODE (orig_src));
1677
1678 emit_move_insn (src, orig_src);
1679 }
1680
1681 /* Optimize the access just a bit. */
1682 if (MEM_P (src)
1683 && (! SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (src))
1684 || MEM_ALIGN (src) >= GET_MODE_ALIGNMENT (mode))
1685 && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0
1686 && bytelen == GET_MODE_SIZE (mode))
1687 {
1688 tmps[i] = gen_reg_rtx (mode);
1689 emit_move_insn (tmps[i], adjust_address (src, mode, bytepos));
1690 }
1691 else if (COMPLEX_MODE_P (mode)
1692 && GET_MODE (src) == mode
1693 && bytelen == GET_MODE_SIZE (mode))
1694 /* Let emit_move_complex do the bulk of the work. */
1695 tmps[i] = src;
1696 else if (GET_CODE (src) == CONCAT)
1697 {
1698 unsigned int slen = GET_MODE_SIZE (GET_MODE (src));
1699 unsigned int slen0 = GET_MODE_SIZE (GET_MODE (XEXP (src, 0)));
1700
1701 if ((bytepos == 0 && bytelen == slen0)
1702 || (bytepos != 0 && bytepos + bytelen <= slen))
1703 {
1704 /* The following assumes that the concatenated objects all
1705 have the same size. In this case, a simple calculation
1706 can be used to determine the object and the bit field
1707 to be extracted. */
1708 tmps[i] = XEXP (src, bytepos / slen0);
1709 if (! CONSTANT_P (tmps[i])
1710 && (!REG_P (tmps[i]) || GET_MODE (tmps[i]) != mode))
1711 tmps[i] = extract_bit_field (tmps[i], bytelen * BITS_PER_UNIT,
1712 (bytepos % slen0) * BITS_PER_UNIT,
1713 1, false, NULL_RTX, mode, mode);
1714 }
1715 else
1716 {
1717 rtx mem;
1718
1719 gcc_assert (!bytepos);
1720 mem = assign_stack_temp (GET_MODE (src), slen, 0);
1721 emit_move_insn (mem, src);
1722 tmps[i] = extract_bit_field (mem, bytelen * BITS_PER_UNIT,
1723 0, 1, false, NULL_RTX, mode, mode);
1724 }
1725 }
1726 /* FIXME: A SIMD parallel will eventually lead to a subreg of a
1727 SIMD register, which is currently broken. While we get GCC
1728 to emit proper RTL for these cases, let's dump to memory. */
1729 else if (VECTOR_MODE_P (GET_MODE (dst))
1730 && REG_P (src))
1731 {
1732 int slen = GET_MODE_SIZE (GET_MODE (src));
1733 rtx mem;
1734
1735 mem = assign_stack_temp (GET_MODE (src), slen, 0);
1736 emit_move_insn (mem, src);
1737 tmps[i] = adjust_address (mem, mode, (int) bytepos);
1738 }
1739 else if (CONSTANT_P (src) && GET_MODE (dst) != BLKmode
1740 && XVECLEN (dst, 0) > 1)
1741 tmps[i] = simplify_gen_subreg (mode, src, GET_MODE(dst), bytepos);
1742 else if (CONSTANT_P (src))
1743 {
1744 HOST_WIDE_INT len = (HOST_WIDE_INT) bytelen;
1745
1746 if (len == ssize)
1747 tmps[i] = src;
1748 else
1749 {
1750 rtx first, second;
1751
1752 gcc_assert (2 * len == ssize);
1753 split_double (src, &first, &second);
1754 if (i)
1755 tmps[i] = second;
1756 else
1757 tmps[i] = first;
1758 }
1759 }
1760 else if (REG_P (src) && GET_MODE (src) == mode)
1761 tmps[i] = src;
1762 else
1763 tmps[i] = extract_bit_field (src, bytelen * BITS_PER_UNIT,
1764 bytepos * BITS_PER_UNIT, 1, false, NULL_RTX,
1765 mode, mode);
1766
1767 if (shift)
1768 tmps[i] = expand_shift (LSHIFT_EXPR, mode, tmps[i],
1769 shift, tmps[i], 0);
1770 }
1771 }
1772
1773 /* Emit code to move a block SRC of type TYPE to a block DST,
1774 where DST is non-consecutive registers represented by a PARALLEL.
1775 SSIZE represents the total size of block ORIG_SRC in bytes, or -1
1776 if not known. */
1777
1778 void
1779 emit_group_load (rtx dst, rtx src, tree type, int ssize)
1780 {
1781 rtx *tmps;
1782 int i;
1783
1784 tmps = XALLOCAVEC (rtx, XVECLEN (dst, 0));
1785 emit_group_load_1 (tmps, dst, src, type, ssize);
1786
1787 /* Copy the extracted pieces into the proper (probable) hard regs. */
1788 for (i = 0; i < XVECLEN (dst, 0); i++)
1789 {
1790 rtx d = XEXP (XVECEXP (dst, 0, i), 0);
1791 if (d == NULL)
1792 continue;
1793 emit_move_insn (d, tmps[i]);
1794 }
1795 }
1796
1797 /* Similar, but load SRC into new pseudos in a format that looks like
1798 PARALLEL. This can later be fed to emit_group_move to get things
1799 in the right place. */
1800
1801 rtx
1802 emit_group_load_into_temps (rtx parallel, rtx src, tree type, int ssize)
1803 {
1804 rtvec vec;
1805 int i;
1806
1807 vec = rtvec_alloc (XVECLEN (parallel, 0));
1808 emit_group_load_1 (&RTVEC_ELT (vec, 0), parallel, src, type, ssize);
1809
1810 /* Convert the vector to look just like the original PARALLEL, except
1811 with the computed values. */
1812 for (i = 0; i < XVECLEN (parallel, 0); i++)
1813 {
1814 rtx e = XVECEXP (parallel, 0, i);
1815 rtx d = XEXP (e, 0);
1816
1817 if (d)
1818 {
1819 d = force_reg (GET_MODE (d), RTVEC_ELT (vec, i));
1820 e = alloc_EXPR_LIST (REG_NOTE_KIND (e), d, XEXP (e, 1));
1821 }
1822 RTVEC_ELT (vec, i) = e;
1823 }
1824
1825 return gen_rtx_PARALLEL (GET_MODE (parallel), vec);
1826 }
1827
1828 /* Emit code to move a block SRC to block DST, where SRC and DST are
1829 non-consecutive groups of registers, each represented by a PARALLEL. */
1830
1831 void
1832 emit_group_move (rtx dst, rtx src)
1833 {
1834 int i;
1835
1836 gcc_assert (GET_CODE (src) == PARALLEL
1837 && GET_CODE (dst) == PARALLEL
1838 && XVECLEN (src, 0) == XVECLEN (dst, 0));
1839
1840 /* Skip first entry if NULL. */
1841 for (i = XEXP (XVECEXP (src, 0, 0), 0) ? 0 : 1; i < XVECLEN (src, 0); i++)
1842 emit_move_insn (XEXP (XVECEXP (dst, 0, i), 0),
1843 XEXP (XVECEXP (src, 0, i), 0));
1844 }
1845
1846 /* Move a group of registers represented by a PARALLEL into pseudos. */
1847
1848 rtx
1849 emit_group_move_into_temps (rtx src)
1850 {
1851 rtvec vec = rtvec_alloc (XVECLEN (src, 0));
1852 int i;
1853
1854 for (i = 0; i < XVECLEN (src, 0); i++)
1855 {
1856 rtx e = XVECEXP (src, 0, i);
1857 rtx d = XEXP (e, 0);
1858
1859 if (d)
1860 e = alloc_EXPR_LIST (REG_NOTE_KIND (e), copy_to_reg (d), XEXP (e, 1));
1861 RTVEC_ELT (vec, i) = e;
1862 }
1863
1864 return gen_rtx_PARALLEL (GET_MODE (src), vec);
1865 }
1866
1867 /* Emit code to move a block SRC to a block ORIG_DST of type TYPE,
1868 where SRC is non-consecutive registers represented by a PARALLEL.
1869 SSIZE represents the total size of block ORIG_DST, or -1 if not
1870 known. */
1871
1872 void
1873 emit_group_store (rtx orig_dst, rtx src, tree type ATTRIBUTE_UNUSED, int ssize)
1874 {
1875 rtx *tmps, dst;
1876 int start, finish, i;
1877 enum machine_mode m = GET_MODE (orig_dst);
1878
1879 gcc_assert (GET_CODE (src) == PARALLEL);
1880
1881 if (!SCALAR_INT_MODE_P (m)
1882 && !MEM_P (orig_dst) && GET_CODE (orig_dst) != CONCAT)
1883 {
1884 enum machine_mode imode = int_mode_for_mode (GET_MODE (orig_dst));
1885 if (imode == BLKmode)
1886 dst = assign_stack_temp (GET_MODE (orig_dst), ssize, 0);
1887 else
1888 dst = gen_reg_rtx (imode);
1889 emit_group_store (dst, src, type, ssize);
1890 if (imode != BLKmode)
1891 dst = gen_lowpart (GET_MODE (orig_dst), dst);
1892 emit_move_insn (orig_dst, dst);
1893 return;
1894 }
1895
1896 /* Check for a NULL entry, used to indicate that the parameter goes
1897 both on the stack and in registers. */
1898 if (XEXP (XVECEXP (src, 0, 0), 0))
1899 start = 0;
1900 else
1901 start = 1;
1902 finish = XVECLEN (src, 0);
1903
1904 tmps = XALLOCAVEC (rtx, finish);
1905
1906 /* Copy the (probable) hard regs into pseudos. */
1907 for (i = start; i < finish; i++)
1908 {
1909 rtx reg = XEXP (XVECEXP (src, 0, i), 0);
1910 if (!REG_P (reg) || REGNO (reg) < FIRST_PSEUDO_REGISTER)
1911 {
1912 tmps[i] = gen_reg_rtx (GET_MODE (reg));
1913 emit_move_insn (tmps[i], reg);
1914 }
1915 else
1916 tmps[i] = reg;
1917 }
1918
1919 /* If we won't be storing directly into memory, protect the real destination
1920 from strange tricks we might play. */
1921 dst = orig_dst;
1922 if (GET_CODE (dst) == PARALLEL)
1923 {
1924 rtx temp;
1925
1926 /* We can get a PARALLEL dst if there is a conditional expression in
1927 a return statement. In that case, the dst and src are the same,
1928 so no action is necessary. */
1929 if (rtx_equal_p (dst, src))
1930 return;
1931
1932 /* It is unclear if we can ever reach here, but we may as well handle
1933 it. Allocate a temporary, and split this into a store/load to/from
1934 the temporary. */
1935
1936 temp = assign_stack_temp (GET_MODE (dst), ssize, 0);
1937 emit_group_store (temp, src, type, ssize);
1938 emit_group_load (dst, temp, type, ssize);
1939 return;
1940 }
1941 else if (!MEM_P (dst) && GET_CODE (dst) != CONCAT)
1942 {
1943 enum machine_mode outer = GET_MODE (dst);
1944 enum machine_mode inner;
1945 HOST_WIDE_INT bytepos;
1946 bool done = false;
1947 rtx temp;
1948
1949 if (!REG_P (dst) || REGNO (dst) < FIRST_PSEUDO_REGISTER)
1950 dst = gen_reg_rtx (outer);
1951
1952 /* Make life a bit easier for combine. */
1953 /* If the first element of the vector is the low part
1954 of the destination mode, use a paradoxical subreg to
1955 initialize the destination. */
1956 if (start < finish)
1957 {
1958 inner = GET_MODE (tmps[start]);
1959 bytepos = subreg_lowpart_offset (inner, outer);
1960 if (INTVAL (XEXP (XVECEXP (src, 0, start), 1)) == bytepos)
1961 {
1962 temp = simplify_gen_subreg (outer, tmps[start],
1963 inner, 0);
1964 if (temp)
1965 {
1966 emit_move_insn (dst, temp);
1967 done = true;
1968 start++;
1969 }
1970 }
1971 }
1972
1973 /* If the first element wasn't the low part, try the last. */
1974 if (!done
1975 && start < finish - 1)
1976 {
1977 inner = GET_MODE (tmps[finish - 1]);
1978 bytepos = subreg_lowpart_offset (inner, outer);
1979 if (INTVAL (XEXP (XVECEXP (src, 0, finish - 1), 1)) == bytepos)
1980 {
1981 temp = simplify_gen_subreg (outer, tmps[finish - 1],
1982 inner, 0);
1983 if (temp)
1984 {
1985 emit_move_insn (dst, temp);
1986 done = true;
1987 finish--;
1988 }
1989 }
1990 }
1991
1992 /* Otherwise, simply initialize the result to zero. */
1993 if (!done)
1994 emit_move_insn (dst, CONST0_RTX (outer));
1995 }
1996
1997 /* Process the pieces. */
1998 for (i = start; i < finish; i++)
1999 {
2000 HOST_WIDE_INT bytepos = INTVAL (XEXP (XVECEXP (src, 0, i), 1));
2001 enum machine_mode mode = GET_MODE (tmps[i]);
2002 unsigned int bytelen = GET_MODE_SIZE (mode);
2003 unsigned int adj_bytelen = bytelen;
2004 rtx dest = dst;
2005
2006 /* Handle trailing fragments that run over the size of the struct. */
2007 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
2008 adj_bytelen = ssize - bytepos;
2009
2010 if (GET_CODE (dst) == CONCAT)
2011 {
2012 if (bytepos + adj_bytelen
2013 <= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0))))
2014 dest = XEXP (dst, 0);
2015 else if (bytepos >= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0))))
2016 {
2017 bytepos -= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0)));
2018 dest = XEXP (dst, 1);
2019 }
2020 else
2021 {
2022 enum machine_mode dest_mode = GET_MODE (dest);
2023 enum machine_mode tmp_mode = GET_MODE (tmps[i]);
2024
2025 gcc_assert (bytepos == 0 && XVECLEN (src, 0));
2026
2027 if (GET_MODE_ALIGNMENT (dest_mode)
2028 >= GET_MODE_ALIGNMENT (tmp_mode))
2029 {
2030 dest = assign_stack_temp (dest_mode,
2031 GET_MODE_SIZE (dest_mode),
2032 0);
2033 emit_move_insn (adjust_address (dest,
2034 tmp_mode,
2035 bytepos),
2036 tmps[i]);
2037 dst = dest;
2038 }
2039 else
2040 {
2041 dest = assign_stack_temp (tmp_mode,
2042 GET_MODE_SIZE (tmp_mode),
2043 0);
2044 emit_move_insn (dest, tmps[i]);
2045 dst = adjust_address (dest, dest_mode, bytepos);
2046 }
2047 break;
2048 }
2049 }
2050
2051 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
2052 {
2053 /* store_bit_field always takes its value from the lsb.
2054 Move the fragment to the lsb if it's not already there. */
2055 if (
2056 #ifdef BLOCK_REG_PADDING
2057 BLOCK_REG_PADDING (GET_MODE (orig_dst), type, i == start)
2058 == (BYTES_BIG_ENDIAN ? upward : downward)
2059 #else
2060 BYTES_BIG_ENDIAN
2061 #endif
2062 )
2063 {
2064 int shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT;
2065 tmps[i] = expand_shift (RSHIFT_EXPR, mode, tmps[i],
2066 shift, tmps[i], 0);
2067 }
2068 bytelen = adj_bytelen;
2069 }
2070
2071 /* Optimize the access just a bit. */
2072 if (MEM_P (dest)
2073 && (! SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (dest))
2074 || MEM_ALIGN (dest) >= GET_MODE_ALIGNMENT (mode))
2075 && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0
2076 && bytelen == GET_MODE_SIZE (mode))
2077 emit_move_insn (adjust_address (dest, mode, bytepos), tmps[i]);
2078 else
2079 store_bit_field (dest, bytelen * BITS_PER_UNIT, bytepos * BITS_PER_UNIT,
2080 0, 0, mode, tmps[i]);
2081 }
2082
2083 /* Copy from the pseudo into the (probable) hard reg. */
2084 if (orig_dst != dst)
2085 emit_move_insn (orig_dst, dst);
2086 }
2087
2088 /* Generate code to copy a BLKmode object of TYPE out of a
2089 set of registers starting with SRCREG into TGTBLK. If TGTBLK
2090 is null, a stack temporary is created. TGTBLK is returned.
2091
2092 The purpose of this routine is to handle functions that return
2093 BLKmode structures in registers. Some machines (the PA for example)
2094 want to return all small structures in registers regardless of the
2095 structure's alignment. */
2096
2097 rtx
2098 copy_blkmode_from_reg (rtx tgtblk, rtx srcreg, tree type)
2099 {
2100 unsigned HOST_WIDE_INT bytes = int_size_in_bytes (type);
2101 rtx src = NULL, dst = NULL;
2102 unsigned HOST_WIDE_INT bitsize = MIN (TYPE_ALIGN (type), BITS_PER_WORD);
2103 unsigned HOST_WIDE_INT bitpos, xbitpos, padding_correction = 0;
2104 enum machine_mode copy_mode;
2105
2106 if (tgtblk == 0)
2107 {
2108 tgtblk = assign_temp (build_qualified_type (type,
2109 (TYPE_QUALS (type)
2110 | TYPE_QUAL_CONST)),
2111 0, 1, 1);
2112 preserve_temp_slots (tgtblk);
2113 }
2114
2115 /* This code assumes srcreg is at least a full word. If it isn't, copy it
2116 into a new pseudo which is a full word. */
2117
2118 if (GET_MODE (srcreg) != BLKmode
2119 && GET_MODE_SIZE (GET_MODE (srcreg)) < UNITS_PER_WORD)
2120 srcreg = convert_to_mode (word_mode, srcreg, TYPE_UNSIGNED (type));
2121
2122 /* If the structure doesn't take up a whole number of words, see whether
2123 SRCREG is padded on the left or on the right. If it's on the left,
2124 set PADDING_CORRECTION to the number of bits to skip.
2125
2126 In most ABIs, the structure will be returned at the least end of
2127 the register, which translates to right padding on little-endian
2128 targets and left padding on big-endian targets. The opposite
2129 holds if the structure is returned at the most significant
2130 end of the register. */
2131 if (bytes % UNITS_PER_WORD != 0
2132 && (targetm.calls.return_in_msb (type)
2133 ? !BYTES_BIG_ENDIAN
2134 : BYTES_BIG_ENDIAN))
2135 padding_correction
2136 = (BITS_PER_WORD - ((bytes % UNITS_PER_WORD) * BITS_PER_UNIT));
2137
2138 /* Copy the structure BITSIZE bits at a time. If the target lives in
2139 memory, take care of not reading/writing past its end by selecting
2140 a copy mode suited to BITSIZE. This should always be possible given
2141 how it is computed.
2142
2143 We could probably emit more efficient code for machines which do not use
2144 strict alignment, but it doesn't seem worth the effort at the current
2145 time. */
2146
2147 copy_mode = word_mode;
2148 if (MEM_P (tgtblk))
2149 {
2150 enum machine_mode mem_mode = mode_for_size (bitsize, MODE_INT, 1);
2151 if (mem_mode != BLKmode)
2152 copy_mode = mem_mode;
2153 }
2154
2155 for (bitpos = 0, xbitpos = padding_correction;
2156 bitpos < bytes * BITS_PER_UNIT;
2157 bitpos += bitsize, xbitpos += bitsize)
2158 {
2159 /* We need a new source operand each time xbitpos is on a
2160 word boundary and when xbitpos == padding_correction
2161 (the first time through). */
2162 if (xbitpos % BITS_PER_WORD == 0
2163 || xbitpos == padding_correction)
2164 src = operand_subword_force (srcreg, xbitpos / BITS_PER_WORD,
2165 GET_MODE (srcreg));
2166
2167 /* We need a new destination operand each time bitpos is on
2168 a word boundary. */
2169 if (bitpos % BITS_PER_WORD == 0)
2170 dst = operand_subword (tgtblk, bitpos / BITS_PER_WORD, 1, BLKmode);
2171
2172 /* Use xbitpos for the source extraction (right justified) and
2173 bitpos for the destination store (left justified). */
2174 store_bit_field (dst, bitsize, bitpos % BITS_PER_WORD, 0, 0, copy_mode,
2175 extract_bit_field (src, bitsize,
2176 xbitpos % BITS_PER_WORD, 1, false,
2177 NULL_RTX, copy_mode, copy_mode));
2178 }
2179
2180 return tgtblk;
2181 }
2182
2183 /* Add a USE expression for REG to the (possibly empty) list pointed
2184 to by CALL_FUSAGE. REG must denote a hard register. */
2185
2186 void
2187 use_reg_mode (rtx *call_fusage, rtx reg, enum machine_mode mode)
2188 {
2189 gcc_assert (REG_P (reg) && REGNO (reg) < FIRST_PSEUDO_REGISTER);
2190
2191 *call_fusage
2192 = gen_rtx_EXPR_LIST (mode, gen_rtx_USE (VOIDmode, reg), *call_fusage);
2193 }
2194
2195 /* Add USE expressions to *CALL_FUSAGE for each of NREGS consecutive regs,
2196 starting at REGNO. All of these registers must be hard registers. */
2197
2198 void
2199 use_regs (rtx *call_fusage, int regno, int nregs)
2200 {
2201 int i;
2202
2203 gcc_assert (regno + nregs <= FIRST_PSEUDO_REGISTER);
2204
2205 for (i = 0; i < nregs; i++)
2206 use_reg (call_fusage, regno_reg_rtx[regno + i]);
2207 }
2208
2209 /* Add USE expressions to *CALL_FUSAGE for each REG contained in the
2210 PARALLEL REGS. This is for calls that pass values in multiple
2211 non-contiguous locations. The Irix 6 ABI has examples of this. */
2212
2213 void
2214 use_group_regs (rtx *call_fusage, rtx regs)
2215 {
2216 int i;
2217
2218 for (i = 0; i < XVECLEN (regs, 0); i++)
2219 {
2220 rtx reg = XEXP (XVECEXP (regs, 0, i), 0);
2221
2222 /* A NULL entry means the parameter goes both on the stack and in
2223 registers. This can also be a MEM for targets that pass values
2224 partially on the stack and partially in registers. */
2225 if (reg != 0 && REG_P (reg))
2226 use_reg (call_fusage, reg);
2227 }
2228 }
2229
2230 /* Return the defining gimple statement for SSA_NAME NAME if it is an
2231 assigment and the code of the expresion on the RHS is CODE. Return
2232 NULL otherwise. */
2233
2234 static gimple
2235 get_def_for_expr (tree name, enum tree_code code)
2236 {
2237 gimple def_stmt;
2238
2239 if (TREE_CODE (name) != SSA_NAME)
2240 return NULL;
2241
2242 def_stmt = get_gimple_for_ssa_name (name);
2243 if (!def_stmt
2244 || gimple_assign_rhs_code (def_stmt) != code)
2245 return NULL;
2246
2247 return def_stmt;
2248 }
2249 \f
2250
2251 /* Determine whether the LEN bytes generated by CONSTFUN can be
2252 stored to memory using several move instructions. CONSTFUNDATA is
2253 a pointer which will be passed as argument in every CONSTFUN call.
2254 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
2255 a memset operation and false if it's a copy of a constant string.
2256 Return nonzero if a call to store_by_pieces should succeed. */
2257
2258 int
2259 can_store_by_pieces (unsigned HOST_WIDE_INT len,
2260 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode),
2261 void *constfundata, unsigned int align, bool memsetp)
2262 {
2263 unsigned HOST_WIDE_INT l;
2264 unsigned int max_size;
2265 HOST_WIDE_INT offset = 0;
2266 enum machine_mode mode;
2267 enum insn_code icode;
2268 int reverse;
2269 /* cst is set but not used if LEGITIMATE_CONSTANT doesn't use it. */
2270 rtx cst ATTRIBUTE_UNUSED;
2271
2272 if (len == 0)
2273 return 1;
2274
2275 if (! (memsetp
2276 ? SET_BY_PIECES_P (len, align)
2277 : STORE_BY_PIECES_P (len, align)))
2278 return 0;
2279
2280 align = alignment_for_piecewise_move (STORE_MAX_PIECES, align);
2281
2282 /* We would first store what we can in the largest integer mode, then go to
2283 successively smaller modes. */
2284
2285 for (reverse = 0;
2286 reverse <= (HAVE_PRE_DECREMENT || HAVE_POST_DECREMENT);
2287 reverse++)
2288 {
2289 l = len;
2290 max_size = STORE_MAX_PIECES + 1;
2291 while (max_size > 1)
2292 {
2293 mode = widest_int_mode_for_size (max_size);
2294
2295 if (mode == VOIDmode)
2296 break;
2297
2298 icode = optab_handler (mov_optab, mode);
2299 if (icode != CODE_FOR_nothing
2300 && align >= GET_MODE_ALIGNMENT (mode))
2301 {
2302 unsigned int size = GET_MODE_SIZE (mode);
2303
2304 while (l >= size)
2305 {
2306 if (reverse)
2307 offset -= size;
2308
2309 cst = (*constfun) (constfundata, offset, mode);
2310 if (!targetm.legitimate_constant_p (mode, cst))
2311 return 0;
2312
2313 if (!reverse)
2314 offset += size;
2315
2316 l -= size;
2317 }
2318 }
2319
2320 max_size = GET_MODE_SIZE (mode);
2321 }
2322
2323 /* The code above should have handled everything. */
2324 gcc_assert (!l);
2325 }
2326
2327 return 1;
2328 }
2329
2330 /* Generate several move instructions to store LEN bytes generated by
2331 CONSTFUN to block TO. (A MEM rtx with BLKmode). CONSTFUNDATA is a
2332 pointer which will be passed as argument in every CONSTFUN call.
2333 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
2334 a memset operation and false if it's a copy of a constant string.
2335 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
2336 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
2337 stpcpy. */
2338
2339 rtx
2340 store_by_pieces (rtx to, unsigned HOST_WIDE_INT len,
2341 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode),
2342 void *constfundata, unsigned int align, bool memsetp, int endp)
2343 {
2344 enum machine_mode to_addr_mode
2345 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (to));
2346 struct store_by_pieces_d data;
2347
2348 if (len == 0)
2349 {
2350 gcc_assert (endp != 2);
2351 return to;
2352 }
2353
2354 gcc_assert (memsetp
2355 ? SET_BY_PIECES_P (len, align)
2356 : STORE_BY_PIECES_P (len, align));
2357 data.constfun = constfun;
2358 data.constfundata = constfundata;
2359 data.len = len;
2360 data.to = to;
2361 store_by_pieces_1 (&data, align);
2362 if (endp)
2363 {
2364 rtx to1;
2365
2366 gcc_assert (!data.reverse);
2367 if (data.autinc_to)
2368 {
2369 if (endp == 2)
2370 {
2371 if (HAVE_POST_INCREMENT && data.explicit_inc_to > 0)
2372 emit_insn (gen_add2_insn (data.to_addr, constm1_rtx));
2373 else
2374 data.to_addr = copy_to_mode_reg (to_addr_mode,
2375 plus_constant (data.to_addr,
2376 -1));
2377 }
2378 to1 = adjust_automodify_address (data.to, QImode, data.to_addr,
2379 data.offset);
2380 }
2381 else
2382 {
2383 if (endp == 2)
2384 --data.offset;
2385 to1 = adjust_address (data.to, QImode, data.offset);
2386 }
2387 return to1;
2388 }
2389 else
2390 return data.to;
2391 }
2392
2393 /* Generate several move instructions to clear LEN bytes of block TO. (A MEM
2394 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
2395
2396 static void
2397 clear_by_pieces (rtx to, unsigned HOST_WIDE_INT len, unsigned int align)
2398 {
2399 struct store_by_pieces_d data;
2400
2401 if (len == 0)
2402 return;
2403
2404 data.constfun = clear_by_pieces_1;
2405 data.constfundata = NULL;
2406 data.len = len;
2407 data.to = to;
2408 store_by_pieces_1 (&data, align);
2409 }
2410
2411 /* Callback routine for clear_by_pieces.
2412 Return const0_rtx unconditionally. */
2413
2414 static rtx
2415 clear_by_pieces_1 (void *data ATTRIBUTE_UNUSED,
2416 HOST_WIDE_INT offset ATTRIBUTE_UNUSED,
2417 enum machine_mode mode ATTRIBUTE_UNUSED)
2418 {
2419 return const0_rtx;
2420 }
2421
2422 /* Subroutine of clear_by_pieces and store_by_pieces.
2423 Generate several move instructions to store LEN bytes of block TO. (A MEM
2424 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
2425
2426 static void
2427 store_by_pieces_1 (struct store_by_pieces_d *data ATTRIBUTE_UNUSED,
2428 unsigned int align ATTRIBUTE_UNUSED)
2429 {
2430 enum machine_mode to_addr_mode
2431 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (data->to));
2432 rtx to_addr = XEXP (data->to, 0);
2433 unsigned int max_size = STORE_MAX_PIECES + 1;
2434 enum insn_code icode;
2435
2436 data->offset = 0;
2437 data->to_addr = to_addr;
2438 data->autinc_to
2439 = (GET_CODE (to_addr) == PRE_INC || GET_CODE (to_addr) == PRE_DEC
2440 || GET_CODE (to_addr) == POST_INC || GET_CODE (to_addr) == POST_DEC);
2441
2442 data->explicit_inc_to = 0;
2443 data->reverse
2444 = (GET_CODE (to_addr) == PRE_DEC || GET_CODE (to_addr) == POST_DEC);
2445 if (data->reverse)
2446 data->offset = data->len;
2447
2448 /* If storing requires more than two move insns,
2449 copy addresses to registers (to make displacements shorter)
2450 and use post-increment if available. */
2451 if (!data->autinc_to
2452 && move_by_pieces_ninsns (data->len, align, max_size) > 2)
2453 {
2454 /* Determine the main mode we'll be using.
2455 MODE might not be used depending on the definitions of the
2456 USE_* macros below. */
2457 enum machine_mode mode ATTRIBUTE_UNUSED
2458 = widest_int_mode_for_size (max_size);
2459
2460 if (USE_STORE_PRE_DECREMENT (mode) && data->reverse && ! data->autinc_to)
2461 {
2462 data->to_addr = copy_to_mode_reg (to_addr_mode,
2463 plus_constant (to_addr, data->len));
2464 data->autinc_to = 1;
2465 data->explicit_inc_to = -1;
2466 }
2467
2468 if (USE_STORE_POST_INCREMENT (mode) && ! data->reverse
2469 && ! data->autinc_to)
2470 {
2471 data->to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
2472 data->autinc_to = 1;
2473 data->explicit_inc_to = 1;
2474 }
2475
2476 if ( !data->autinc_to && CONSTANT_P (to_addr))
2477 data->to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
2478 }
2479
2480 align = alignment_for_piecewise_move (STORE_MAX_PIECES, align);
2481
2482 /* First store what we can in the largest integer mode, then go to
2483 successively smaller modes. */
2484
2485 while (max_size > 1)
2486 {
2487 enum machine_mode mode = widest_int_mode_for_size (max_size);
2488
2489 if (mode == VOIDmode)
2490 break;
2491
2492 icode = optab_handler (mov_optab, mode);
2493 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
2494 store_by_pieces_2 (GEN_FCN (icode), mode, data);
2495
2496 max_size = GET_MODE_SIZE (mode);
2497 }
2498
2499 /* The code above should have handled everything. */
2500 gcc_assert (!data->len);
2501 }
2502
2503 /* Subroutine of store_by_pieces_1. Store as many bytes as appropriate
2504 with move instructions for mode MODE. GENFUN is the gen_... function
2505 to make a move insn for that mode. DATA has all the other info. */
2506
2507 static void
2508 store_by_pieces_2 (rtx (*genfun) (rtx, ...), enum machine_mode mode,
2509 struct store_by_pieces_d *data)
2510 {
2511 unsigned int size = GET_MODE_SIZE (mode);
2512 rtx to1, cst;
2513
2514 while (data->len >= size)
2515 {
2516 if (data->reverse)
2517 data->offset -= size;
2518
2519 if (data->autinc_to)
2520 to1 = adjust_automodify_address (data->to, mode, data->to_addr,
2521 data->offset);
2522 else
2523 to1 = adjust_address (data->to, mode, data->offset);
2524
2525 if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0)
2526 emit_insn (gen_add2_insn (data->to_addr,
2527 GEN_INT (-(HOST_WIDE_INT) size)));
2528
2529 cst = (*data->constfun) (data->constfundata, data->offset, mode);
2530 emit_insn ((*genfun) (to1, cst));
2531
2532 if (HAVE_POST_INCREMENT && data->explicit_inc_to > 0)
2533 emit_insn (gen_add2_insn (data->to_addr, GEN_INT (size)));
2534
2535 if (! data->reverse)
2536 data->offset += size;
2537
2538 data->len -= size;
2539 }
2540 }
2541 \f
2542 /* Write zeros through the storage of OBJECT. If OBJECT has BLKmode, SIZE is
2543 its length in bytes. */
2544
2545 rtx
2546 clear_storage_hints (rtx object, rtx size, enum block_op_methods method,
2547 unsigned int expected_align, HOST_WIDE_INT expected_size)
2548 {
2549 enum machine_mode mode = GET_MODE (object);
2550 unsigned int align;
2551
2552 gcc_assert (method == BLOCK_OP_NORMAL || method == BLOCK_OP_TAILCALL);
2553
2554 /* If OBJECT is not BLKmode and SIZE is the same size as its mode,
2555 just move a zero. Otherwise, do this a piece at a time. */
2556 if (mode != BLKmode
2557 && CONST_INT_P (size)
2558 && INTVAL (size) == (HOST_WIDE_INT) GET_MODE_SIZE (mode))
2559 {
2560 rtx zero = CONST0_RTX (mode);
2561 if (zero != NULL)
2562 {
2563 emit_move_insn (object, zero);
2564 return NULL;
2565 }
2566
2567 if (COMPLEX_MODE_P (mode))
2568 {
2569 zero = CONST0_RTX (GET_MODE_INNER (mode));
2570 if (zero != NULL)
2571 {
2572 write_complex_part (object, zero, 0);
2573 write_complex_part (object, zero, 1);
2574 return NULL;
2575 }
2576 }
2577 }
2578
2579 if (size == const0_rtx)
2580 return NULL;
2581
2582 align = MEM_ALIGN (object);
2583
2584 if (CONST_INT_P (size)
2585 && CLEAR_BY_PIECES_P (INTVAL (size), align))
2586 clear_by_pieces (object, INTVAL (size), align);
2587 else if (set_storage_via_setmem (object, size, const0_rtx, align,
2588 expected_align, expected_size))
2589 ;
2590 else if (ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (object)))
2591 return set_storage_via_libcall (object, size, const0_rtx,
2592 method == BLOCK_OP_TAILCALL);
2593 else
2594 gcc_unreachable ();
2595
2596 return NULL;
2597 }
2598
2599 rtx
2600 clear_storage (rtx object, rtx size, enum block_op_methods method)
2601 {
2602 return clear_storage_hints (object, size, method, 0, -1);
2603 }
2604
2605
2606 /* A subroutine of clear_storage. Expand a call to memset.
2607 Return the return value of memset, 0 otherwise. */
2608
2609 rtx
2610 set_storage_via_libcall (rtx object, rtx size, rtx val, bool tailcall)
2611 {
2612 tree call_expr, fn, object_tree, size_tree, val_tree;
2613 enum machine_mode size_mode;
2614 rtx retval;
2615
2616 /* Emit code to copy OBJECT and SIZE into new pseudos. We can then
2617 place those into new pseudos into a VAR_DECL and use them later. */
2618
2619 object = copy_to_mode_reg (Pmode, XEXP (object, 0));
2620
2621 size_mode = TYPE_MODE (sizetype);
2622 size = convert_to_mode (size_mode, size, 1);
2623 size = copy_to_mode_reg (size_mode, size);
2624
2625 /* It is incorrect to use the libcall calling conventions to call
2626 memset in this context. This could be a user call to memset and
2627 the user may wish to examine the return value from memset. For
2628 targets where libcalls and normal calls have different conventions
2629 for returning pointers, we could end up generating incorrect code. */
2630
2631 object_tree = make_tree (ptr_type_node, object);
2632 if (!CONST_INT_P (val))
2633 val = convert_to_mode (TYPE_MODE (integer_type_node), val, 1);
2634 size_tree = make_tree (sizetype, size);
2635 val_tree = make_tree (integer_type_node, val);
2636
2637 fn = clear_storage_libcall_fn (true);
2638 call_expr = build_call_expr (fn, 3, object_tree, val_tree, size_tree);
2639 CALL_EXPR_TAILCALL (call_expr) = tailcall;
2640
2641 retval = expand_normal (call_expr);
2642
2643 return retval;
2644 }
2645
2646 /* A subroutine of set_storage_via_libcall. Create the tree node
2647 for the function we use for block clears. The first time FOR_CALL
2648 is true, we call assemble_external. */
2649
2650 tree block_clear_fn;
2651
2652 void
2653 init_block_clear_fn (const char *asmspec)
2654 {
2655 if (!block_clear_fn)
2656 {
2657 tree fn, args;
2658
2659 fn = get_identifier ("memset");
2660 args = build_function_type_list (ptr_type_node, ptr_type_node,
2661 integer_type_node, sizetype,
2662 NULL_TREE);
2663
2664 fn = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL, fn, args);
2665 DECL_EXTERNAL (fn) = 1;
2666 TREE_PUBLIC (fn) = 1;
2667 DECL_ARTIFICIAL (fn) = 1;
2668 TREE_NOTHROW (fn) = 1;
2669 DECL_VISIBILITY (fn) = VISIBILITY_DEFAULT;
2670 DECL_VISIBILITY_SPECIFIED (fn) = 1;
2671
2672 block_clear_fn = fn;
2673 }
2674
2675 if (asmspec)
2676 set_user_assembler_name (block_clear_fn, asmspec);
2677 }
2678
2679 static tree
2680 clear_storage_libcall_fn (int for_call)
2681 {
2682 static bool emitted_extern;
2683
2684 if (!block_clear_fn)
2685 init_block_clear_fn (NULL);
2686
2687 if (for_call && !emitted_extern)
2688 {
2689 emitted_extern = true;
2690 make_decl_rtl (block_clear_fn);
2691 assemble_external (block_clear_fn);
2692 }
2693
2694 return block_clear_fn;
2695 }
2696 \f
2697 /* Expand a setmem pattern; return true if successful. */
2698
2699 bool
2700 set_storage_via_setmem (rtx object, rtx size, rtx val, unsigned int align,
2701 unsigned int expected_align, HOST_WIDE_INT expected_size)
2702 {
2703 /* Try the most limited insn first, because there's no point
2704 including more than one in the machine description unless
2705 the more limited one has some advantage. */
2706
2707 enum machine_mode mode;
2708
2709 if (expected_align < align)
2710 expected_align = align;
2711
2712 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
2713 mode = GET_MODE_WIDER_MODE (mode))
2714 {
2715 enum insn_code code = direct_optab_handler (setmem_optab, mode);
2716
2717 if (code != CODE_FOR_nothing
2718 /* We don't need MODE to be narrower than
2719 BITS_PER_HOST_WIDE_INT here because if SIZE is less than
2720 the mode mask, as it is returned by the macro, it will
2721 definitely be less than the actual mode mask. */
2722 && ((CONST_INT_P (size)
2723 && ((unsigned HOST_WIDE_INT) INTVAL (size)
2724 <= (GET_MODE_MASK (mode) >> 1)))
2725 || GET_MODE_BITSIZE (mode) >= BITS_PER_WORD))
2726 {
2727 struct expand_operand ops[6];
2728 unsigned int nops;
2729
2730 nops = insn_data[(int) code].n_generator_args;
2731 gcc_assert (nops == 4 || nops == 6);
2732
2733 create_fixed_operand (&ops[0], object);
2734 /* The check above guarantees that this size conversion is valid. */
2735 create_convert_operand_to (&ops[1], size, mode, true);
2736 create_convert_operand_from (&ops[2], val, byte_mode, true);
2737 create_integer_operand (&ops[3], align / BITS_PER_UNIT);
2738 if (nops == 6)
2739 {
2740 create_integer_operand (&ops[4], expected_align / BITS_PER_UNIT);
2741 create_integer_operand (&ops[5], expected_size);
2742 }
2743 if (maybe_expand_insn (code, nops, ops))
2744 return true;
2745 }
2746 }
2747
2748 return false;
2749 }
2750
2751 \f
2752 /* Write to one of the components of the complex value CPLX. Write VAL to
2753 the real part if IMAG_P is false, and the imaginary part if its true. */
2754
2755 static void
2756 write_complex_part (rtx cplx, rtx val, bool imag_p)
2757 {
2758 enum machine_mode cmode;
2759 enum machine_mode imode;
2760 unsigned ibitsize;
2761
2762 if (GET_CODE (cplx) == CONCAT)
2763 {
2764 emit_move_insn (XEXP (cplx, imag_p), val);
2765 return;
2766 }
2767
2768 cmode = GET_MODE (cplx);
2769 imode = GET_MODE_INNER (cmode);
2770 ibitsize = GET_MODE_BITSIZE (imode);
2771
2772 /* For MEMs simplify_gen_subreg may generate an invalid new address
2773 because, e.g., the original address is considered mode-dependent
2774 by the target, which restricts simplify_subreg from invoking
2775 adjust_address_nv. Instead of preparing fallback support for an
2776 invalid address, we call adjust_address_nv directly. */
2777 if (MEM_P (cplx))
2778 {
2779 emit_move_insn (adjust_address_nv (cplx, imode,
2780 imag_p ? GET_MODE_SIZE (imode) : 0),
2781 val);
2782 return;
2783 }
2784
2785 /* If the sub-object is at least word sized, then we know that subregging
2786 will work. This special case is important, since store_bit_field
2787 wants to operate on integer modes, and there's rarely an OImode to
2788 correspond to TCmode. */
2789 if (ibitsize >= BITS_PER_WORD
2790 /* For hard regs we have exact predicates. Assume we can split
2791 the original object if it spans an even number of hard regs.
2792 This special case is important for SCmode on 64-bit platforms
2793 where the natural size of floating-point regs is 32-bit. */
2794 || (REG_P (cplx)
2795 && REGNO (cplx) < FIRST_PSEUDO_REGISTER
2796 && hard_regno_nregs[REGNO (cplx)][cmode] % 2 == 0))
2797 {
2798 rtx part = simplify_gen_subreg (imode, cplx, cmode,
2799 imag_p ? GET_MODE_SIZE (imode) : 0);
2800 if (part)
2801 {
2802 emit_move_insn (part, val);
2803 return;
2804 }
2805 else
2806 /* simplify_gen_subreg may fail for sub-word MEMs. */
2807 gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD);
2808 }
2809
2810 store_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0, 0, 0, imode, val);
2811 }
2812
2813 /* Extract one of the components of the complex value CPLX. Extract the
2814 real part if IMAG_P is false, and the imaginary part if it's true. */
2815
2816 static rtx
2817 read_complex_part (rtx cplx, bool imag_p)
2818 {
2819 enum machine_mode cmode, imode;
2820 unsigned ibitsize;
2821
2822 if (GET_CODE (cplx) == CONCAT)
2823 return XEXP (cplx, imag_p);
2824
2825 cmode = GET_MODE (cplx);
2826 imode = GET_MODE_INNER (cmode);
2827 ibitsize = GET_MODE_BITSIZE (imode);
2828
2829 /* Special case reads from complex constants that got spilled to memory. */
2830 if (MEM_P (cplx) && GET_CODE (XEXP (cplx, 0)) == SYMBOL_REF)
2831 {
2832 tree decl = SYMBOL_REF_DECL (XEXP (cplx, 0));
2833 if (decl && TREE_CODE (decl) == COMPLEX_CST)
2834 {
2835 tree part = imag_p ? TREE_IMAGPART (decl) : TREE_REALPART (decl);
2836 if (CONSTANT_CLASS_P (part))
2837 return expand_expr (part, NULL_RTX, imode, EXPAND_NORMAL);
2838 }
2839 }
2840
2841 /* For MEMs simplify_gen_subreg may generate an invalid new address
2842 because, e.g., the original address is considered mode-dependent
2843 by the target, which restricts simplify_subreg from invoking
2844 adjust_address_nv. Instead of preparing fallback support for an
2845 invalid address, we call adjust_address_nv directly. */
2846 if (MEM_P (cplx))
2847 return adjust_address_nv (cplx, imode,
2848 imag_p ? GET_MODE_SIZE (imode) : 0);
2849
2850 /* If the sub-object is at least word sized, then we know that subregging
2851 will work. This special case is important, since extract_bit_field
2852 wants to operate on integer modes, and there's rarely an OImode to
2853 correspond to TCmode. */
2854 if (ibitsize >= BITS_PER_WORD
2855 /* For hard regs we have exact predicates. Assume we can split
2856 the original object if it spans an even number of hard regs.
2857 This special case is important for SCmode on 64-bit platforms
2858 where the natural size of floating-point regs is 32-bit. */
2859 || (REG_P (cplx)
2860 && REGNO (cplx) < FIRST_PSEUDO_REGISTER
2861 && hard_regno_nregs[REGNO (cplx)][cmode] % 2 == 0))
2862 {
2863 rtx ret = simplify_gen_subreg (imode, cplx, cmode,
2864 imag_p ? GET_MODE_SIZE (imode) : 0);
2865 if (ret)
2866 return ret;
2867 else
2868 /* simplify_gen_subreg may fail for sub-word MEMs. */
2869 gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD);
2870 }
2871
2872 return extract_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0,
2873 true, false, NULL_RTX, imode, imode);
2874 }
2875 \f
2876 /* A subroutine of emit_move_insn_1. Yet another lowpart generator.
2877 NEW_MODE and OLD_MODE are the same size. Return NULL if X cannot be
2878 represented in NEW_MODE. If FORCE is true, this will never happen, as
2879 we'll force-create a SUBREG if needed. */
2880
2881 static rtx
2882 emit_move_change_mode (enum machine_mode new_mode,
2883 enum machine_mode old_mode, rtx x, bool force)
2884 {
2885 rtx ret;
2886
2887 if (push_operand (x, GET_MODE (x)))
2888 {
2889 ret = gen_rtx_MEM (new_mode, XEXP (x, 0));
2890 MEM_COPY_ATTRIBUTES (ret, x);
2891 }
2892 else if (MEM_P (x))
2893 {
2894 /* We don't have to worry about changing the address since the
2895 size in bytes is supposed to be the same. */
2896 if (reload_in_progress)
2897 {
2898 /* Copy the MEM to change the mode and move any
2899 substitutions from the old MEM to the new one. */
2900 ret = adjust_address_nv (x, new_mode, 0);
2901 copy_replacements (x, ret);
2902 }
2903 else
2904 ret = adjust_address (x, new_mode, 0);
2905 }
2906 else
2907 {
2908 /* Note that we do want simplify_subreg's behavior of validating
2909 that the new mode is ok for a hard register. If we were to use
2910 simplify_gen_subreg, we would create the subreg, but would
2911 probably run into the target not being able to implement it. */
2912 /* Except, of course, when FORCE is true, when this is exactly what
2913 we want. Which is needed for CCmodes on some targets. */
2914 if (force)
2915 ret = simplify_gen_subreg (new_mode, x, old_mode, 0);
2916 else
2917 ret = simplify_subreg (new_mode, x, old_mode, 0);
2918 }
2919
2920 return ret;
2921 }
2922
2923 /* A subroutine of emit_move_insn_1. Generate a move from Y into X using
2924 an integer mode of the same size as MODE. Returns the instruction
2925 emitted, or NULL if such a move could not be generated. */
2926
2927 static rtx
2928 emit_move_via_integer (enum machine_mode mode, rtx x, rtx y, bool force)
2929 {
2930 enum machine_mode imode;
2931 enum insn_code code;
2932
2933 /* There must exist a mode of the exact size we require. */
2934 imode = int_mode_for_mode (mode);
2935 if (imode == BLKmode)
2936 return NULL_RTX;
2937
2938 /* The target must support moves in this mode. */
2939 code = optab_handler (mov_optab, imode);
2940 if (code == CODE_FOR_nothing)
2941 return NULL_RTX;
2942
2943 x = emit_move_change_mode (imode, mode, x, force);
2944 if (x == NULL_RTX)
2945 return NULL_RTX;
2946 y = emit_move_change_mode (imode, mode, y, force);
2947 if (y == NULL_RTX)
2948 return NULL_RTX;
2949 return emit_insn (GEN_FCN (code) (x, y));
2950 }
2951
2952 /* A subroutine of emit_move_insn_1. X is a push_operand in MODE.
2953 Return an equivalent MEM that does not use an auto-increment. */
2954
2955 static rtx
2956 emit_move_resolve_push (enum machine_mode mode, rtx x)
2957 {
2958 enum rtx_code code = GET_CODE (XEXP (x, 0));
2959 HOST_WIDE_INT adjust;
2960 rtx temp;
2961
2962 adjust = GET_MODE_SIZE (mode);
2963 #ifdef PUSH_ROUNDING
2964 adjust = PUSH_ROUNDING (adjust);
2965 #endif
2966 if (code == PRE_DEC || code == POST_DEC)
2967 adjust = -adjust;
2968 else if (code == PRE_MODIFY || code == POST_MODIFY)
2969 {
2970 rtx expr = XEXP (XEXP (x, 0), 1);
2971 HOST_WIDE_INT val;
2972
2973 gcc_assert (GET_CODE (expr) == PLUS || GET_CODE (expr) == MINUS);
2974 gcc_assert (CONST_INT_P (XEXP (expr, 1)));
2975 val = INTVAL (XEXP (expr, 1));
2976 if (GET_CODE (expr) == MINUS)
2977 val = -val;
2978 gcc_assert (adjust == val || adjust == -val);
2979 adjust = val;
2980 }
2981
2982 /* Do not use anti_adjust_stack, since we don't want to update
2983 stack_pointer_delta. */
2984 temp = expand_simple_binop (Pmode, PLUS, stack_pointer_rtx,
2985 GEN_INT (adjust), stack_pointer_rtx,
2986 0, OPTAB_LIB_WIDEN);
2987 if (temp != stack_pointer_rtx)
2988 emit_move_insn (stack_pointer_rtx, temp);
2989
2990 switch (code)
2991 {
2992 case PRE_INC:
2993 case PRE_DEC:
2994 case PRE_MODIFY:
2995 temp = stack_pointer_rtx;
2996 break;
2997 case POST_INC:
2998 case POST_DEC:
2999 case POST_MODIFY:
3000 temp = plus_constant (stack_pointer_rtx, -adjust);
3001 break;
3002 default:
3003 gcc_unreachable ();
3004 }
3005
3006 return replace_equiv_address (x, temp);
3007 }
3008
3009 /* A subroutine of emit_move_complex. Generate a move from Y into X.
3010 X is known to satisfy push_operand, and MODE is known to be complex.
3011 Returns the last instruction emitted. */
3012
3013 rtx
3014 emit_move_complex_push (enum machine_mode mode, rtx x, rtx y)
3015 {
3016 enum machine_mode submode = GET_MODE_INNER (mode);
3017 bool imag_first;
3018
3019 #ifdef PUSH_ROUNDING
3020 unsigned int submodesize = GET_MODE_SIZE (submode);
3021
3022 /* In case we output to the stack, but the size is smaller than the
3023 machine can push exactly, we need to use move instructions. */
3024 if (PUSH_ROUNDING (submodesize) != submodesize)
3025 {
3026 x = emit_move_resolve_push (mode, x);
3027 return emit_move_insn (x, y);
3028 }
3029 #endif
3030
3031 /* Note that the real part always precedes the imag part in memory
3032 regardless of machine's endianness. */
3033 switch (GET_CODE (XEXP (x, 0)))
3034 {
3035 case PRE_DEC:
3036 case POST_DEC:
3037 imag_first = true;
3038 break;
3039 case PRE_INC:
3040 case POST_INC:
3041 imag_first = false;
3042 break;
3043 default:
3044 gcc_unreachable ();
3045 }
3046
3047 emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)),
3048 read_complex_part (y, imag_first));
3049 return emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)),
3050 read_complex_part (y, !imag_first));
3051 }
3052
3053 /* A subroutine of emit_move_complex. Perform the move from Y to X
3054 via two moves of the parts. Returns the last instruction emitted. */
3055
3056 rtx
3057 emit_move_complex_parts (rtx x, rtx y)
3058 {
3059 /* Show the output dies here. This is necessary for SUBREGs
3060 of pseudos since we cannot track their lifetimes correctly;
3061 hard regs shouldn't appear here except as return values. */
3062 if (!reload_completed && !reload_in_progress
3063 && REG_P (x) && !reg_overlap_mentioned_p (x, y))
3064 emit_clobber (x);
3065
3066 write_complex_part (x, read_complex_part (y, false), false);
3067 write_complex_part (x, read_complex_part (y, true), true);
3068
3069 return get_last_insn ();
3070 }
3071
3072 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3073 MODE is known to be complex. Returns the last instruction emitted. */
3074
3075 static rtx
3076 emit_move_complex (enum machine_mode mode, rtx x, rtx y)
3077 {
3078 bool try_int;
3079
3080 /* Need to take special care for pushes, to maintain proper ordering
3081 of the data, and possibly extra padding. */
3082 if (push_operand (x, mode))
3083 return emit_move_complex_push (mode, x, y);
3084
3085 /* See if we can coerce the target into moving both values at once. */
3086
3087 /* Move floating point as parts. */
3088 if (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
3089 && optab_handler (mov_optab, GET_MODE_INNER (mode)) != CODE_FOR_nothing)
3090 try_int = false;
3091 /* Not possible if the values are inherently not adjacent. */
3092 else if (GET_CODE (x) == CONCAT || GET_CODE (y) == CONCAT)
3093 try_int = false;
3094 /* Is possible if both are registers (or subregs of registers). */
3095 else if (register_operand (x, mode) && register_operand (y, mode))
3096 try_int = true;
3097 /* If one of the operands is a memory, and alignment constraints
3098 are friendly enough, we may be able to do combined memory operations.
3099 We do not attempt this if Y is a constant because that combination is
3100 usually better with the by-parts thing below. */
3101 else if ((MEM_P (x) ? !CONSTANT_P (y) : MEM_P (y))
3102 && (!STRICT_ALIGNMENT
3103 || get_mode_alignment (mode) == BIGGEST_ALIGNMENT))
3104 try_int = true;
3105 else
3106 try_int = false;
3107
3108 if (try_int)
3109 {
3110 rtx ret;
3111
3112 /* For memory to memory moves, optimal behavior can be had with the
3113 existing block move logic. */
3114 if (MEM_P (x) && MEM_P (y))
3115 {
3116 emit_block_move (x, y, GEN_INT (GET_MODE_SIZE (mode)),
3117 BLOCK_OP_NO_LIBCALL);
3118 return get_last_insn ();
3119 }
3120
3121 ret = emit_move_via_integer (mode, x, y, true);
3122 if (ret)
3123 return ret;
3124 }
3125
3126 return emit_move_complex_parts (x, y);
3127 }
3128
3129 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3130 MODE is known to be MODE_CC. Returns the last instruction emitted. */
3131
3132 static rtx
3133 emit_move_ccmode (enum machine_mode mode, rtx x, rtx y)
3134 {
3135 rtx ret;
3136
3137 /* Assume all MODE_CC modes are equivalent; if we have movcc, use it. */
3138 if (mode != CCmode)
3139 {
3140 enum insn_code code = optab_handler (mov_optab, CCmode);
3141 if (code != CODE_FOR_nothing)
3142 {
3143 x = emit_move_change_mode (CCmode, mode, x, true);
3144 y = emit_move_change_mode (CCmode, mode, y, true);
3145 return emit_insn (GEN_FCN (code) (x, y));
3146 }
3147 }
3148
3149 /* Otherwise, find the MODE_INT mode of the same width. */
3150 ret = emit_move_via_integer (mode, x, y, false);
3151 gcc_assert (ret != NULL);
3152 return ret;
3153 }
3154
3155 /* Return true if word I of OP lies entirely in the
3156 undefined bits of a paradoxical subreg. */
3157
3158 static bool
3159 undefined_operand_subword_p (const_rtx op, int i)
3160 {
3161 enum machine_mode innermode, innermostmode;
3162 int offset;
3163 if (GET_CODE (op) != SUBREG)
3164 return false;
3165 innermode = GET_MODE (op);
3166 innermostmode = GET_MODE (SUBREG_REG (op));
3167 offset = i * UNITS_PER_WORD + SUBREG_BYTE (op);
3168 /* The SUBREG_BYTE represents offset, as if the value were stored in
3169 memory, except for a paradoxical subreg where we define
3170 SUBREG_BYTE to be 0; undo this exception as in
3171 simplify_subreg. */
3172 if (SUBREG_BYTE (op) == 0
3173 && GET_MODE_SIZE (innermostmode) < GET_MODE_SIZE (innermode))
3174 {
3175 int difference = (GET_MODE_SIZE (innermostmode) - GET_MODE_SIZE (innermode));
3176 if (WORDS_BIG_ENDIAN)
3177 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
3178 if (BYTES_BIG_ENDIAN)
3179 offset += difference % UNITS_PER_WORD;
3180 }
3181 if (offset >= GET_MODE_SIZE (innermostmode)
3182 || offset <= -GET_MODE_SIZE (word_mode))
3183 return true;
3184 return false;
3185 }
3186
3187 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3188 MODE is any multi-word or full-word mode that lacks a move_insn
3189 pattern. Note that you will get better code if you define such
3190 patterns, even if they must turn into multiple assembler instructions. */
3191
3192 static rtx
3193 emit_move_multi_word (enum machine_mode mode, rtx x, rtx y)
3194 {
3195 rtx last_insn = 0;
3196 rtx seq, inner;
3197 bool need_clobber;
3198 int i;
3199
3200 gcc_assert (GET_MODE_SIZE (mode) >= UNITS_PER_WORD);
3201
3202 /* If X is a push on the stack, do the push now and replace
3203 X with a reference to the stack pointer. */
3204 if (push_operand (x, mode))
3205 x = emit_move_resolve_push (mode, x);
3206
3207 /* If we are in reload, see if either operand is a MEM whose address
3208 is scheduled for replacement. */
3209 if (reload_in_progress && MEM_P (x)
3210 && (inner = find_replacement (&XEXP (x, 0))) != XEXP (x, 0))
3211 x = replace_equiv_address_nv (x, inner);
3212 if (reload_in_progress && MEM_P (y)
3213 && (inner = find_replacement (&XEXP (y, 0))) != XEXP (y, 0))
3214 y = replace_equiv_address_nv (y, inner);
3215
3216 start_sequence ();
3217
3218 need_clobber = false;
3219 for (i = 0;
3220 i < (GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD;
3221 i++)
3222 {
3223 rtx xpart = operand_subword (x, i, 1, mode);
3224 rtx ypart;
3225
3226 /* Do not generate code for a move if it would come entirely
3227 from the undefined bits of a paradoxical subreg. */
3228 if (undefined_operand_subword_p (y, i))
3229 continue;
3230
3231 ypart = operand_subword (y, i, 1, mode);
3232
3233 /* If we can't get a part of Y, put Y into memory if it is a
3234 constant. Otherwise, force it into a register. Then we must
3235 be able to get a part of Y. */
3236 if (ypart == 0 && CONSTANT_P (y))
3237 {
3238 y = use_anchored_address (force_const_mem (mode, y));
3239 ypart = operand_subword (y, i, 1, mode);
3240 }
3241 else if (ypart == 0)
3242 ypart = operand_subword_force (y, i, mode);
3243
3244 gcc_assert (xpart && ypart);
3245
3246 need_clobber |= (GET_CODE (xpart) == SUBREG);
3247
3248 last_insn = emit_move_insn (xpart, ypart);
3249 }
3250
3251 seq = get_insns ();
3252 end_sequence ();
3253
3254 /* Show the output dies here. This is necessary for SUBREGs
3255 of pseudos since we cannot track their lifetimes correctly;
3256 hard regs shouldn't appear here except as return values.
3257 We never want to emit such a clobber after reload. */
3258 if (x != y
3259 && ! (reload_in_progress || reload_completed)
3260 && need_clobber != 0)
3261 emit_clobber (x);
3262
3263 emit_insn (seq);
3264
3265 return last_insn;
3266 }
3267
3268 /* Low level part of emit_move_insn.
3269 Called just like emit_move_insn, but assumes X and Y
3270 are basically valid. */
3271
3272 rtx
3273 emit_move_insn_1 (rtx x, rtx y)
3274 {
3275 enum machine_mode mode = GET_MODE (x);
3276 enum insn_code code;
3277
3278 gcc_assert ((unsigned int) mode < (unsigned int) MAX_MACHINE_MODE);
3279
3280 code = optab_handler (mov_optab, mode);
3281 if (code != CODE_FOR_nothing)
3282 return emit_insn (GEN_FCN (code) (x, y));
3283
3284 /* Expand complex moves by moving real part and imag part. */
3285 if (COMPLEX_MODE_P (mode))
3286 return emit_move_complex (mode, x, y);
3287
3288 if (GET_MODE_CLASS (mode) == MODE_DECIMAL_FLOAT
3289 || ALL_FIXED_POINT_MODE_P (mode))
3290 {
3291 rtx result = emit_move_via_integer (mode, x, y, true);
3292
3293 /* If we can't find an integer mode, use multi words. */
3294 if (result)
3295 return result;
3296 else
3297 return emit_move_multi_word (mode, x, y);
3298 }
3299
3300 if (GET_MODE_CLASS (mode) == MODE_CC)
3301 return emit_move_ccmode (mode, x, y);
3302
3303 /* Try using a move pattern for the corresponding integer mode. This is
3304 only safe when simplify_subreg can convert MODE constants into integer
3305 constants. At present, it can only do this reliably if the value
3306 fits within a HOST_WIDE_INT. */
3307 if (!CONSTANT_P (y) || GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
3308 {
3309 rtx ret = emit_move_via_integer (mode, x, y, false);
3310 if (ret)
3311 return ret;
3312 }
3313
3314 return emit_move_multi_word (mode, x, y);
3315 }
3316
3317 /* Generate code to copy Y into X.
3318 Both Y and X must have the same mode, except that
3319 Y can be a constant with VOIDmode.
3320 This mode cannot be BLKmode; use emit_block_move for that.
3321
3322 Return the last instruction emitted. */
3323
3324 rtx
3325 emit_move_insn (rtx x, rtx y)
3326 {
3327 enum machine_mode mode = GET_MODE (x);
3328 rtx y_cst = NULL_RTX;
3329 rtx last_insn, set;
3330
3331 gcc_assert (mode != BLKmode
3332 && (GET_MODE (y) == mode || GET_MODE (y) == VOIDmode));
3333
3334 if (CONSTANT_P (y))
3335 {
3336 if (optimize
3337 && SCALAR_FLOAT_MODE_P (GET_MODE (x))
3338 && (last_insn = compress_float_constant (x, y)))
3339 return last_insn;
3340
3341 y_cst = y;
3342
3343 if (!targetm.legitimate_constant_p (mode, y))
3344 {
3345 y = force_const_mem (mode, y);
3346
3347 /* If the target's cannot_force_const_mem prevented the spill,
3348 assume that the target's move expanders will also take care
3349 of the non-legitimate constant. */
3350 if (!y)
3351 y = y_cst;
3352 else
3353 y = use_anchored_address (y);
3354 }
3355 }
3356
3357 /* If X or Y are memory references, verify that their addresses are valid
3358 for the machine. */
3359 if (MEM_P (x)
3360 && (! memory_address_addr_space_p (GET_MODE (x), XEXP (x, 0),
3361 MEM_ADDR_SPACE (x))
3362 && ! push_operand (x, GET_MODE (x))))
3363 x = validize_mem (x);
3364
3365 if (MEM_P (y)
3366 && ! memory_address_addr_space_p (GET_MODE (y), XEXP (y, 0),
3367 MEM_ADDR_SPACE (y)))
3368 y = validize_mem (y);
3369
3370 gcc_assert (mode != BLKmode);
3371
3372 last_insn = emit_move_insn_1 (x, y);
3373
3374 if (y_cst && REG_P (x)
3375 && (set = single_set (last_insn)) != NULL_RTX
3376 && SET_DEST (set) == x
3377 && ! rtx_equal_p (y_cst, SET_SRC (set)))
3378 set_unique_reg_note (last_insn, REG_EQUAL, copy_rtx (y_cst));
3379
3380 return last_insn;
3381 }
3382
3383 /* If Y is representable exactly in a narrower mode, and the target can
3384 perform the extension directly from constant or memory, then emit the
3385 move as an extension. */
3386
3387 static rtx
3388 compress_float_constant (rtx x, rtx y)
3389 {
3390 enum machine_mode dstmode = GET_MODE (x);
3391 enum machine_mode orig_srcmode = GET_MODE (y);
3392 enum machine_mode srcmode;
3393 REAL_VALUE_TYPE r;
3394 int oldcost, newcost;
3395 bool speed = optimize_insn_for_speed_p ();
3396
3397 REAL_VALUE_FROM_CONST_DOUBLE (r, y);
3398
3399 if (targetm.legitimate_constant_p (dstmode, y))
3400 oldcost = set_src_cost (y, speed);
3401 else
3402 oldcost = set_src_cost (force_const_mem (dstmode, y), speed);
3403
3404 for (srcmode = GET_CLASS_NARROWEST_MODE (GET_MODE_CLASS (orig_srcmode));
3405 srcmode != orig_srcmode;
3406 srcmode = GET_MODE_WIDER_MODE (srcmode))
3407 {
3408 enum insn_code ic;
3409 rtx trunc_y, last_insn;
3410
3411 /* Skip if the target can't extend this way. */
3412 ic = can_extend_p (dstmode, srcmode, 0);
3413 if (ic == CODE_FOR_nothing)
3414 continue;
3415
3416 /* Skip if the narrowed value isn't exact. */
3417 if (! exact_real_truncate (srcmode, &r))
3418 continue;
3419
3420 trunc_y = CONST_DOUBLE_FROM_REAL_VALUE (r, srcmode);
3421
3422 if (targetm.legitimate_constant_p (srcmode, trunc_y))
3423 {
3424 /* Skip if the target needs extra instructions to perform
3425 the extension. */
3426 if (!insn_operand_matches (ic, 1, trunc_y))
3427 continue;
3428 /* This is valid, but may not be cheaper than the original. */
3429 newcost = set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y),
3430 speed);
3431 if (oldcost < newcost)
3432 continue;
3433 }
3434 else if (float_extend_from_mem[dstmode][srcmode])
3435 {
3436 trunc_y = force_const_mem (srcmode, trunc_y);
3437 /* This is valid, but may not be cheaper than the original. */
3438 newcost = set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y),
3439 speed);
3440 if (oldcost < newcost)
3441 continue;
3442 trunc_y = validize_mem (trunc_y);
3443 }
3444 else
3445 continue;
3446
3447 /* For CSE's benefit, force the compressed constant pool entry
3448 into a new pseudo. This constant may be used in different modes,
3449 and if not, combine will put things back together for us. */
3450 trunc_y = force_reg (srcmode, trunc_y);
3451 emit_unop_insn (ic, x, trunc_y, UNKNOWN);
3452 last_insn = get_last_insn ();
3453
3454 if (REG_P (x))
3455 set_unique_reg_note (last_insn, REG_EQUAL, y);
3456
3457 return last_insn;
3458 }
3459
3460 return NULL_RTX;
3461 }
3462 \f
3463 /* Pushing data onto the stack. */
3464
3465 /* Push a block of length SIZE (perhaps variable)
3466 and return an rtx to address the beginning of the block.
3467 The value may be virtual_outgoing_args_rtx.
3468
3469 EXTRA is the number of bytes of padding to push in addition to SIZE.
3470 BELOW nonzero means this padding comes at low addresses;
3471 otherwise, the padding comes at high addresses. */
3472
3473 rtx
3474 push_block (rtx size, int extra, int below)
3475 {
3476 rtx temp;
3477
3478 size = convert_modes (Pmode, ptr_mode, size, 1);
3479 if (CONSTANT_P (size))
3480 anti_adjust_stack (plus_constant (size, extra));
3481 else if (REG_P (size) && extra == 0)
3482 anti_adjust_stack (size);
3483 else
3484 {
3485 temp = copy_to_mode_reg (Pmode, size);
3486 if (extra != 0)
3487 temp = expand_binop (Pmode, add_optab, temp, GEN_INT (extra),
3488 temp, 0, OPTAB_LIB_WIDEN);
3489 anti_adjust_stack (temp);
3490 }
3491
3492 #ifndef STACK_GROWS_DOWNWARD
3493 if (0)
3494 #else
3495 if (1)
3496 #endif
3497 {
3498 temp = virtual_outgoing_args_rtx;
3499 if (extra != 0 && below)
3500 temp = plus_constant (temp, extra);
3501 }
3502 else
3503 {
3504 if (CONST_INT_P (size))
3505 temp = plus_constant (virtual_outgoing_args_rtx,
3506 -INTVAL (size) - (below ? 0 : extra));
3507 else if (extra != 0 && !below)
3508 temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx,
3509 negate_rtx (Pmode, plus_constant (size, extra)));
3510 else
3511 temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx,
3512 negate_rtx (Pmode, size));
3513 }
3514
3515 return memory_address (GET_CLASS_NARROWEST_MODE (MODE_INT), temp);
3516 }
3517
3518 /* A utility routine that returns the base of an auto-inc memory, or NULL. */
3519
3520 static rtx
3521 mem_autoinc_base (rtx mem)
3522 {
3523 if (MEM_P (mem))
3524 {
3525 rtx addr = XEXP (mem, 0);
3526 if (GET_RTX_CLASS (GET_CODE (addr)) == RTX_AUTOINC)
3527 return XEXP (addr, 0);
3528 }
3529 return NULL;
3530 }
3531
3532 /* A utility routine used here, in reload, and in try_split. The insns
3533 after PREV up to and including LAST are known to adjust the stack,
3534 with a final value of END_ARGS_SIZE. Iterate backward from LAST
3535 placing notes as appropriate. PREV may be NULL, indicating the
3536 entire insn sequence prior to LAST should be scanned.
3537
3538 The set of allowed stack pointer modifications is small:
3539 (1) One or more auto-inc style memory references (aka pushes),
3540 (2) One or more addition/subtraction with the SP as destination,
3541 (3) A single move insn with the SP as destination,
3542 (4) A call_pop insn.
3543
3544 Insns in the sequence that do not modify the SP are ignored.
3545
3546 The return value is the amount of adjustment that can be trivially
3547 verified, via immediate operand or auto-inc. If the adjustment
3548 cannot be trivially extracted, the return value is INT_MIN. */
3549
3550 HOST_WIDE_INT
3551 find_args_size_adjust (rtx insn)
3552 {
3553 rtx dest, set, pat;
3554 int i;
3555
3556 pat = PATTERN (insn);
3557 set = NULL;
3558
3559 /* Look for a call_pop pattern. */
3560 if (CALL_P (insn))
3561 {
3562 /* We have to allow non-call_pop patterns for the case
3563 of emit_single_push_insn of a TLS address. */
3564 if (GET_CODE (pat) != PARALLEL)
3565 return 0;
3566
3567 /* All call_pop have a stack pointer adjust in the parallel.
3568 The call itself is always first, and the stack adjust is
3569 usually last, so search from the end. */
3570 for (i = XVECLEN (pat, 0) - 1; i > 0; --i)
3571 {
3572 set = XVECEXP (pat, 0, i);
3573 if (GET_CODE (set) != SET)
3574 continue;
3575 dest = SET_DEST (set);
3576 if (dest == stack_pointer_rtx)
3577 break;
3578 }
3579 /* We'd better have found the stack pointer adjust. */
3580 if (i == 0)
3581 return 0;
3582 /* Fall through to process the extracted SET and DEST
3583 as if it was a standalone insn. */
3584 }
3585 else if (GET_CODE (pat) == SET)
3586 set = pat;
3587 else if ((set = single_set (insn)) != NULL)
3588 ;
3589 else if (GET_CODE (pat) == PARALLEL)
3590 {
3591 /* ??? Some older ports use a parallel with a stack adjust
3592 and a store for a PUSH_ROUNDING pattern, rather than a
3593 PRE/POST_MODIFY rtx. Don't force them to update yet... */
3594 /* ??? See h8300 and m68k, pushqi1. */
3595 for (i = XVECLEN (pat, 0) - 1; i >= 0; --i)
3596 {
3597 set = XVECEXP (pat, 0, i);
3598 if (GET_CODE (set) != SET)
3599 continue;
3600 dest = SET_DEST (set);
3601 if (dest == stack_pointer_rtx)
3602 break;
3603
3604 /* We do not expect an auto-inc of the sp in the parallel. */
3605 gcc_checking_assert (mem_autoinc_base (dest) != stack_pointer_rtx);
3606 gcc_checking_assert (mem_autoinc_base (SET_SRC (set))
3607 != stack_pointer_rtx);
3608 }
3609 if (i < 0)
3610 return 0;
3611 }
3612 else
3613 return 0;
3614
3615 dest = SET_DEST (set);
3616
3617 /* Look for direct modifications of the stack pointer. */
3618 if (REG_P (dest) && REGNO (dest) == STACK_POINTER_REGNUM)
3619 {
3620 /* Look for a trivial adjustment, otherwise assume nothing. */
3621 /* Note that the SPU restore_stack_block pattern refers to
3622 the stack pointer in V4SImode. Consider that non-trivial. */
3623 if (SCALAR_INT_MODE_P (GET_MODE (dest))
3624 && GET_CODE (SET_SRC (set)) == PLUS
3625 && XEXP (SET_SRC (set), 0) == stack_pointer_rtx
3626 && CONST_INT_P (XEXP (SET_SRC (set), 1)))
3627 return INTVAL (XEXP (SET_SRC (set), 1));
3628 /* ??? Reload can generate no-op moves, which will be cleaned
3629 up later. Recognize it and continue searching. */
3630 else if (rtx_equal_p (dest, SET_SRC (set)))
3631 return 0;
3632 else
3633 return HOST_WIDE_INT_MIN;
3634 }
3635 else
3636 {
3637 rtx mem, addr;
3638
3639 /* Otherwise only think about autoinc patterns. */
3640 if (mem_autoinc_base (dest) == stack_pointer_rtx)
3641 {
3642 mem = dest;
3643 gcc_checking_assert (mem_autoinc_base (SET_SRC (set))
3644 != stack_pointer_rtx);
3645 }
3646 else if (mem_autoinc_base (SET_SRC (set)) == stack_pointer_rtx)
3647 mem = SET_SRC (set);
3648 else
3649 return 0;
3650
3651 addr = XEXP (mem, 0);
3652 switch (GET_CODE (addr))
3653 {
3654 case PRE_INC:
3655 case POST_INC:
3656 return GET_MODE_SIZE (GET_MODE (mem));
3657 case PRE_DEC:
3658 case POST_DEC:
3659 return -GET_MODE_SIZE (GET_MODE (mem));
3660 case PRE_MODIFY:
3661 case POST_MODIFY:
3662 addr = XEXP (addr, 1);
3663 gcc_assert (GET_CODE (addr) == PLUS);
3664 gcc_assert (XEXP (addr, 0) == stack_pointer_rtx);
3665 gcc_assert (CONST_INT_P (XEXP (addr, 1)));
3666 return INTVAL (XEXP (addr, 1));
3667 default:
3668 gcc_unreachable ();
3669 }
3670 }
3671 }
3672
3673 int
3674 fixup_args_size_notes (rtx prev, rtx last, int end_args_size)
3675 {
3676 int args_size = end_args_size;
3677 bool saw_unknown = false;
3678 rtx insn;
3679
3680 for (insn = last; insn != prev; insn = PREV_INSN (insn))
3681 {
3682 HOST_WIDE_INT this_delta;
3683
3684 if (!NONDEBUG_INSN_P (insn))
3685 continue;
3686
3687 this_delta = find_args_size_adjust (insn);
3688 if (this_delta == 0)
3689 continue;
3690
3691 gcc_assert (!saw_unknown);
3692 if (this_delta == HOST_WIDE_INT_MIN)
3693 saw_unknown = true;
3694
3695 add_reg_note (insn, REG_ARGS_SIZE, GEN_INT (args_size));
3696 #ifdef STACK_GROWS_DOWNWARD
3697 this_delta = -this_delta;
3698 #endif
3699 args_size -= this_delta;
3700 }
3701
3702 return saw_unknown ? INT_MIN : args_size;
3703 }
3704
3705 #ifdef PUSH_ROUNDING
3706 /* Emit single push insn. */
3707
3708 static void
3709 emit_single_push_insn_1 (enum machine_mode mode, rtx x, tree type)
3710 {
3711 rtx dest_addr;
3712 unsigned rounded_size = PUSH_ROUNDING (GET_MODE_SIZE (mode));
3713 rtx dest;
3714 enum insn_code icode;
3715
3716 stack_pointer_delta += PUSH_ROUNDING (GET_MODE_SIZE (mode));
3717 /* If there is push pattern, use it. Otherwise try old way of throwing
3718 MEM representing push operation to move expander. */
3719 icode = optab_handler (push_optab, mode);
3720 if (icode != CODE_FOR_nothing)
3721 {
3722 struct expand_operand ops[1];
3723
3724 create_input_operand (&ops[0], x, mode);
3725 if (maybe_expand_insn (icode, 1, ops))
3726 return;
3727 }
3728 if (GET_MODE_SIZE (mode) == rounded_size)
3729 dest_addr = gen_rtx_fmt_e (STACK_PUSH_CODE, Pmode, stack_pointer_rtx);
3730 /* If we are to pad downward, adjust the stack pointer first and
3731 then store X into the stack location using an offset. This is
3732 because emit_move_insn does not know how to pad; it does not have
3733 access to type. */
3734 else if (FUNCTION_ARG_PADDING (mode, type) == downward)
3735 {
3736 unsigned padding_size = rounded_size - GET_MODE_SIZE (mode);
3737 HOST_WIDE_INT offset;
3738
3739 emit_move_insn (stack_pointer_rtx,
3740 expand_binop (Pmode,
3741 #ifdef STACK_GROWS_DOWNWARD
3742 sub_optab,
3743 #else
3744 add_optab,
3745 #endif
3746 stack_pointer_rtx,
3747 GEN_INT (rounded_size),
3748 NULL_RTX, 0, OPTAB_LIB_WIDEN));
3749
3750 offset = (HOST_WIDE_INT) padding_size;
3751 #ifdef STACK_GROWS_DOWNWARD
3752 if (STACK_PUSH_CODE == POST_DEC)
3753 /* We have already decremented the stack pointer, so get the
3754 previous value. */
3755 offset += (HOST_WIDE_INT) rounded_size;
3756 #else
3757 if (STACK_PUSH_CODE == POST_INC)
3758 /* We have already incremented the stack pointer, so get the
3759 previous value. */
3760 offset -= (HOST_WIDE_INT) rounded_size;
3761 #endif
3762 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx, GEN_INT (offset));
3763 }
3764 else
3765 {
3766 #ifdef STACK_GROWS_DOWNWARD
3767 /* ??? This seems wrong if STACK_PUSH_CODE == POST_DEC. */
3768 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
3769 GEN_INT (-(HOST_WIDE_INT) rounded_size));
3770 #else
3771 /* ??? This seems wrong if STACK_PUSH_CODE == POST_INC. */
3772 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
3773 GEN_INT (rounded_size));
3774 #endif
3775 dest_addr = gen_rtx_PRE_MODIFY (Pmode, stack_pointer_rtx, dest_addr);
3776 }
3777
3778 dest = gen_rtx_MEM (mode, dest_addr);
3779
3780 if (type != 0)
3781 {
3782 set_mem_attributes (dest, type, 1);
3783
3784 if (flag_optimize_sibling_calls)
3785 /* Function incoming arguments may overlap with sibling call
3786 outgoing arguments and we cannot allow reordering of reads
3787 from function arguments with stores to outgoing arguments
3788 of sibling calls. */
3789 set_mem_alias_set (dest, 0);
3790 }
3791 emit_move_insn (dest, x);
3792 }
3793
3794 /* Emit and annotate a single push insn. */
3795
3796 static void
3797 emit_single_push_insn (enum machine_mode mode, rtx x, tree type)
3798 {
3799 int delta, old_delta = stack_pointer_delta;
3800 rtx prev = get_last_insn ();
3801 rtx last;
3802
3803 emit_single_push_insn_1 (mode, x, type);
3804
3805 last = get_last_insn ();
3806
3807 /* Notice the common case where we emitted exactly one insn. */
3808 if (PREV_INSN (last) == prev)
3809 {
3810 add_reg_note (last, REG_ARGS_SIZE, GEN_INT (stack_pointer_delta));
3811 return;
3812 }
3813
3814 delta = fixup_args_size_notes (prev, last, stack_pointer_delta);
3815 gcc_assert (delta == INT_MIN || delta == old_delta);
3816 }
3817 #endif
3818
3819 /* Generate code to push X onto the stack, assuming it has mode MODE and
3820 type TYPE.
3821 MODE is redundant except when X is a CONST_INT (since they don't
3822 carry mode info).
3823 SIZE is an rtx for the size of data to be copied (in bytes),
3824 needed only if X is BLKmode.
3825
3826 ALIGN (in bits) is maximum alignment we can assume.
3827
3828 If PARTIAL and REG are both nonzero, then copy that many of the first
3829 bytes of X into registers starting with REG, and push the rest of X.
3830 The amount of space pushed is decreased by PARTIAL bytes.
3831 REG must be a hard register in this case.
3832 If REG is zero but PARTIAL is not, take any all others actions for an
3833 argument partially in registers, but do not actually load any
3834 registers.
3835
3836 EXTRA is the amount in bytes of extra space to leave next to this arg.
3837 This is ignored if an argument block has already been allocated.
3838
3839 On a machine that lacks real push insns, ARGS_ADDR is the address of
3840 the bottom of the argument block for this call. We use indexing off there
3841 to store the arg. On machines with push insns, ARGS_ADDR is 0 when a
3842 argument block has not been preallocated.
3843
3844 ARGS_SO_FAR is the size of args previously pushed for this call.
3845
3846 REG_PARM_STACK_SPACE is nonzero if functions require stack space
3847 for arguments passed in registers. If nonzero, it will be the number
3848 of bytes required. */
3849
3850 void
3851 emit_push_insn (rtx x, enum machine_mode mode, tree type, rtx size,
3852 unsigned int align, int partial, rtx reg, int extra,
3853 rtx args_addr, rtx args_so_far, int reg_parm_stack_space,
3854 rtx alignment_pad)
3855 {
3856 rtx xinner;
3857 enum direction stack_direction
3858 #ifdef STACK_GROWS_DOWNWARD
3859 = downward;
3860 #else
3861 = upward;
3862 #endif
3863
3864 /* Decide where to pad the argument: `downward' for below,
3865 `upward' for above, or `none' for don't pad it.
3866 Default is below for small data on big-endian machines; else above. */
3867 enum direction where_pad = FUNCTION_ARG_PADDING (mode, type);
3868
3869 /* Invert direction if stack is post-decrement.
3870 FIXME: why? */
3871 if (STACK_PUSH_CODE == POST_DEC)
3872 if (where_pad != none)
3873 where_pad = (where_pad == downward ? upward : downward);
3874
3875 xinner = x;
3876
3877 if (mode == BLKmode
3878 || (STRICT_ALIGNMENT && align < GET_MODE_ALIGNMENT (mode)))
3879 {
3880 /* Copy a block into the stack, entirely or partially. */
3881
3882 rtx temp;
3883 int used;
3884 int offset;
3885 int skip;
3886
3887 offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT);
3888 used = partial - offset;
3889
3890 if (mode != BLKmode)
3891 {
3892 /* A value is to be stored in an insufficiently aligned
3893 stack slot; copy via a suitably aligned slot if
3894 necessary. */
3895 size = GEN_INT (GET_MODE_SIZE (mode));
3896 if (!MEM_P (xinner))
3897 {
3898 temp = assign_temp (type, 0, 1, 1);
3899 emit_move_insn (temp, xinner);
3900 xinner = temp;
3901 }
3902 }
3903
3904 gcc_assert (size);
3905
3906 /* USED is now the # of bytes we need not copy to the stack
3907 because registers will take care of them. */
3908
3909 if (partial != 0)
3910 xinner = adjust_address (xinner, BLKmode, used);
3911
3912 /* If the partial register-part of the arg counts in its stack size,
3913 skip the part of stack space corresponding to the registers.
3914 Otherwise, start copying to the beginning of the stack space,
3915 by setting SKIP to 0. */
3916 skip = (reg_parm_stack_space == 0) ? 0 : used;
3917
3918 #ifdef PUSH_ROUNDING
3919 /* Do it with several push insns if that doesn't take lots of insns
3920 and if there is no difficulty with push insns that skip bytes
3921 on the stack for alignment purposes. */
3922 if (args_addr == 0
3923 && PUSH_ARGS
3924 && CONST_INT_P (size)
3925 && skip == 0
3926 && MEM_ALIGN (xinner) >= align
3927 && (MOVE_BY_PIECES_P ((unsigned) INTVAL (size) - used, align))
3928 /* Here we avoid the case of a structure whose weak alignment
3929 forces many pushes of a small amount of data,
3930 and such small pushes do rounding that causes trouble. */
3931 && ((! SLOW_UNALIGNED_ACCESS (word_mode, align))
3932 || align >= BIGGEST_ALIGNMENT
3933 || (PUSH_ROUNDING (align / BITS_PER_UNIT)
3934 == (align / BITS_PER_UNIT)))
3935 && (HOST_WIDE_INT) PUSH_ROUNDING (INTVAL (size)) == INTVAL (size))
3936 {
3937 /* Push padding now if padding above and stack grows down,
3938 or if padding below and stack grows up.
3939 But if space already allocated, this has already been done. */
3940 if (extra && args_addr == 0
3941 && where_pad != none && where_pad != stack_direction)
3942 anti_adjust_stack (GEN_INT (extra));
3943
3944 move_by_pieces (NULL, xinner, INTVAL (size) - used, align, 0);
3945 }
3946 else
3947 #endif /* PUSH_ROUNDING */
3948 {
3949 rtx target;
3950
3951 /* Otherwise make space on the stack and copy the data
3952 to the address of that space. */
3953
3954 /* Deduct words put into registers from the size we must copy. */
3955 if (partial != 0)
3956 {
3957 if (CONST_INT_P (size))
3958 size = GEN_INT (INTVAL (size) - used);
3959 else
3960 size = expand_binop (GET_MODE (size), sub_optab, size,
3961 GEN_INT (used), NULL_RTX, 0,
3962 OPTAB_LIB_WIDEN);
3963 }
3964
3965 /* Get the address of the stack space.
3966 In this case, we do not deal with EXTRA separately.
3967 A single stack adjust will do. */
3968 if (! args_addr)
3969 {
3970 temp = push_block (size, extra, where_pad == downward);
3971 extra = 0;
3972 }
3973 else if (CONST_INT_P (args_so_far))
3974 temp = memory_address (BLKmode,
3975 plus_constant (args_addr,
3976 skip + INTVAL (args_so_far)));
3977 else
3978 temp = memory_address (BLKmode,
3979 plus_constant (gen_rtx_PLUS (Pmode,
3980 args_addr,
3981 args_so_far),
3982 skip));
3983
3984 if (!ACCUMULATE_OUTGOING_ARGS)
3985 {
3986 /* If the source is referenced relative to the stack pointer,
3987 copy it to another register to stabilize it. We do not need
3988 to do this if we know that we won't be changing sp. */
3989
3990 if (reg_mentioned_p (virtual_stack_dynamic_rtx, temp)
3991 || reg_mentioned_p (virtual_outgoing_args_rtx, temp))
3992 temp = copy_to_reg (temp);
3993 }
3994
3995 target = gen_rtx_MEM (BLKmode, temp);
3996
3997 /* We do *not* set_mem_attributes here, because incoming arguments
3998 may overlap with sibling call outgoing arguments and we cannot
3999 allow reordering of reads from function arguments with stores
4000 to outgoing arguments of sibling calls. We do, however, want
4001 to record the alignment of the stack slot. */
4002 /* ALIGN may well be better aligned than TYPE, e.g. due to
4003 PARM_BOUNDARY. Assume the caller isn't lying. */
4004 set_mem_align (target, align);
4005
4006 emit_block_move (target, xinner, size, BLOCK_OP_CALL_PARM);
4007 }
4008 }
4009 else if (partial > 0)
4010 {
4011 /* Scalar partly in registers. */
4012
4013 int size = GET_MODE_SIZE (mode) / UNITS_PER_WORD;
4014 int i;
4015 int not_stack;
4016 /* # bytes of start of argument
4017 that we must make space for but need not store. */
4018 int offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT);
4019 int args_offset = INTVAL (args_so_far);
4020 int skip;
4021
4022 /* Push padding now if padding above and stack grows down,
4023 or if padding below and stack grows up.
4024 But if space already allocated, this has already been done. */
4025 if (extra && args_addr == 0
4026 && where_pad != none && where_pad != stack_direction)
4027 anti_adjust_stack (GEN_INT (extra));
4028
4029 /* If we make space by pushing it, we might as well push
4030 the real data. Otherwise, we can leave OFFSET nonzero
4031 and leave the space uninitialized. */
4032 if (args_addr == 0)
4033 offset = 0;
4034
4035 /* Now NOT_STACK gets the number of words that we don't need to
4036 allocate on the stack. Convert OFFSET to words too. */
4037 not_stack = (partial - offset) / UNITS_PER_WORD;
4038 offset /= UNITS_PER_WORD;
4039
4040 /* If the partial register-part of the arg counts in its stack size,
4041 skip the part of stack space corresponding to the registers.
4042 Otherwise, start copying to the beginning of the stack space,
4043 by setting SKIP to 0. */
4044 skip = (reg_parm_stack_space == 0) ? 0 : not_stack;
4045
4046 if (CONSTANT_P (x) && !targetm.legitimate_constant_p (mode, x))
4047 x = validize_mem (force_const_mem (mode, x));
4048
4049 /* If X is a hard register in a non-integer mode, copy it into a pseudo;
4050 SUBREGs of such registers are not allowed. */
4051 if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER
4052 && GET_MODE_CLASS (GET_MODE (x)) != MODE_INT))
4053 x = copy_to_reg (x);
4054
4055 /* Loop over all the words allocated on the stack for this arg. */
4056 /* We can do it by words, because any scalar bigger than a word
4057 has a size a multiple of a word. */
4058 #ifndef PUSH_ARGS_REVERSED
4059 for (i = not_stack; i < size; i++)
4060 #else
4061 for (i = size - 1; i >= not_stack; i--)
4062 #endif
4063 if (i >= not_stack + offset)
4064 emit_push_insn (operand_subword_force (x, i, mode),
4065 word_mode, NULL_TREE, NULL_RTX, align, 0, NULL_RTX,
4066 0, args_addr,
4067 GEN_INT (args_offset + ((i - not_stack + skip)
4068 * UNITS_PER_WORD)),
4069 reg_parm_stack_space, alignment_pad);
4070 }
4071 else
4072 {
4073 rtx addr;
4074 rtx dest;
4075
4076 /* Push padding now if padding above and stack grows down,
4077 or if padding below and stack grows up.
4078 But if space already allocated, this has already been done. */
4079 if (extra && args_addr == 0
4080 && where_pad != none && where_pad != stack_direction)
4081 anti_adjust_stack (GEN_INT (extra));
4082
4083 #ifdef PUSH_ROUNDING
4084 if (args_addr == 0 && PUSH_ARGS)
4085 emit_single_push_insn (mode, x, type);
4086 else
4087 #endif
4088 {
4089 if (CONST_INT_P (args_so_far))
4090 addr
4091 = memory_address (mode,
4092 plus_constant (args_addr,
4093 INTVAL (args_so_far)));
4094 else
4095 addr = memory_address (mode, gen_rtx_PLUS (Pmode, args_addr,
4096 args_so_far));
4097 dest = gen_rtx_MEM (mode, addr);
4098
4099 /* We do *not* set_mem_attributes here, because incoming arguments
4100 may overlap with sibling call outgoing arguments and we cannot
4101 allow reordering of reads from function arguments with stores
4102 to outgoing arguments of sibling calls. We do, however, want
4103 to record the alignment of the stack slot. */
4104 /* ALIGN may well be better aligned than TYPE, e.g. due to
4105 PARM_BOUNDARY. Assume the caller isn't lying. */
4106 set_mem_align (dest, align);
4107
4108 emit_move_insn (dest, x);
4109 }
4110 }
4111
4112 /* If part should go in registers, copy that part
4113 into the appropriate registers. Do this now, at the end,
4114 since mem-to-mem copies above may do function calls. */
4115 if (partial > 0 && reg != 0)
4116 {
4117 /* Handle calls that pass values in multiple non-contiguous locations.
4118 The Irix 6 ABI has examples of this. */
4119 if (GET_CODE (reg) == PARALLEL)
4120 emit_group_load (reg, x, type, -1);
4121 else
4122 {
4123 gcc_assert (partial % UNITS_PER_WORD == 0);
4124 move_block_to_reg (REGNO (reg), x, partial / UNITS_PER_WORD, mode);
4125 }
4126 }
4127
4128 if (extra && args_addr == 0 && where_pad == stack_direction)
4129 anti_adjust_stack (GEN_INT (extra));
4130
4131 if (alignment_pad && args_addr == 0)
4132 anti_adjust_stack (alignment_pad);
4133 }
4134 \f
4135 /* Return X if X can be used as a subtarget in a sequence of arithmetic
4136 operations. */
4137
4138 static rtx
4139 get_subtarget (rtx x)
4140 {
4141 return (optimize
4142 || x == 0
4143 /* Only registers can be subtargets. */
4144 || !REG_P (x)
4145 /* Don't use hard regs to avoid extending their life. */
4146 || REGNO (x) < FIRST_PSEUDO_REGISTER
4147 ? 0 : x);
4148 }
4149
4150 /* A subroutine of expand_assignment. Optimize FIELD op= VAL, where
4151 FIELD is a bitfield. Returns true if the optimization was successful,
4152 and there's nothing else to do. */
4153
4154 static bool
4155 optimize_bitfield_assignment_op (unsigned HOST_WIDE_INT bitsize,
4156 unsigned HOST_WIDE_INT bitpos,
4157 unsigned HOST_WIDE_INT bitregion_start,
4158 unsigned HOST_WIDE_INT bitregion_end,
4159 enum machine_mode mode1, rtx str_rtx,
4160 tree to, tree src)
4161 {
4162 enum machine_mode str_mode = GET_MODE (str_rtx);
4163 unsigned int str_bitsize = GET_MODE_BITSIZE (str_mode);
4164 tree op0, op1;
4165 rtx value, result;
4166 optab binop;
4167 gimple srcstmt;
4168 enum tree_code code;
4169
4170 if (mode1 != VOIDmode
4171 || bitsize >= BITS_PER_WORD
4172 || str_bitsize > BITS_PER_WORD
4173 || TREE_SIDE_EFFECTS (to)
4174 || TREE_THIS_VOLATILE (to))
4175 return false;
4176
4177 STRIP_NOPS (src);
4178 if (TREE_CODE (src) != SSA_NAME)
4179 return false;
4180 if (TREE_CODE (TREE_TYPE (src)) != INTEGER_TYPE)
4181 return false;
4182
4183 srcstmt = get_gimple_for_ssa_name (src);
4184 if (!srcstmt
4185 || TREE_CODE_CLASS (gimple_assign_rhs_code (srcstmt)) != tcc_binary)
4186 return false;
4187
4188 code = gimple_assign_rhs_code (srcstmt);
4189
4190 op0 = gimple_assign_rhs1 (srcstmt);
4191
4192 /* If OP0 is an SSA_NAME, then we want to walk the use-def chain
4193 to find its initialization. Hopefully the initialization will
4194 be from a bitfield load. */
4195 if (TREE_CODE (op0) == SSA_NAME)
4196 {
4197 gimple op0stmt = get_gimple_for_ssa_name (op0);
4198
4199 /* We want to eventually have OP0 be the same as TO, which
4200 should be a bitfield. */
4201 if (!op0stmt
4202 || !is_gimple_assign (op0stmt)
4203 || gimple_assign_rhs_code (op0stmt) != TREE_CODE (to))
4204 return false;
4205 op0 = gimple_assign_rhs1 (op0stmt);
4206 }
4207
4208 op1 = gimple_assign_rhs2 (srcstmt);
4209
4210 if (!operand_equal_p (to, op0, 0))
4211 return false;
4212
4213 if (MEM_P (str_rtx))
4214 {
4215 unsigned HOST_WIDE_INT offset1;
4216
4217 if (str_bitsize == 0 || str_bitsize > BITS_PER_WORD)
4218 str_mode = word_mode;
4219 str_mode = get_best_mode (bitsize, bitpos,
4220 bitregion_start, bitregion_end,
4221 MEM_ALIGN (str_rtx), str_mode, 0);
4222 if (str_mode == VOIDmode)
4223 return false;
4224 str_bitsize = GET_MODE_BITSIZE (str_mode);
4225
4226 offset1 = bitpos;
4227 bitpos %= str_bitsize;
4228 offset1 = (offset1 - bitpos) / BITS_PER_UNIT;
4229 str_rtx = adjust_address (str_rtx, str_mode, offset1);
4230 }
4231 else if (!REG_P (str_rtx) && GET_CODE (str_rtx) != SUBREG)
4232 return false;
4233
4234 /* If the bit field covers the whole REG/MEM, store_field
4235 will likely generate better code. */
4236 if (bitsize >= str_bitsize)
4237 return false;
4238
4239 /* We can't handle fields split across multiple entities. */
4240 if (bitpos + bitsize > str_bitsize)
4241 return false;
4242
4243 if (BYTES_BIG_ENDIAN)
4244 bitpos = str_bitsize - bitpos - bitsize;
4245
4246 switch (code)
4247 {
4248 case PLUS_EXPR:
4249 case MINUS_EXPR:
4250 /* For now, just optimize the case of the topmost bitfield
4251 where we don't need to do any masking and also
4252 1 bit bitfields where xor can be used.
4253 We might win by one instruction for the other bitfields
4254 too if insv/extv instructions aren't used, so that
4255 can be added later. */
4256 if (bitpos + bitsize != str_bitsize
4257 && (bitsize != 1 || TREE_CODE (op1) != INTEGER_CST))
4258 break;
4259
4260 value = expand_expr (op1, NULL_RTX, str_mode, EXPAND_NORMAL);
4261 value = convert_modes (str_mode,
4262 TYPE_MODE (TREE_TYPE (op1)), value,
4263 TYPE_UNSIGNED (TREE_TYPE (op1)));
4264
4265 /* We may be accessing data outside the field, which means
4266 we can alias adjacent data. */
4267 if (MEM_P (str_rtx))
4268 {
4269 str_rtx = shallow_copy_rtx (str_rtx);
4270 set_mem_alias_set (str_rtx, 0);
4271 set_mem_expr (str_rtx, 0);
4272 }
4273
4274 binop = code == PLUS_EXPR ? add_optab : sub_optab;
4275 if (bitsize == 1 && bitpos + bitsize != str_bitsize)
4276 {
4277 value = expand_and (str_mode, value, const1_rtx, NULL);
4278 binop = xor_optab;
4279 }
4280 value = expand_shift (LSHIFT_EXPR, str_mode, value,
4281 bitpos, NULL_RTX, 1);
4282 result = expand_binop (str_mode, binop, str_rtx,
4283 value, str_rtx, 1, OPTAB_WIDEN);
4284 if (result != str_rtx)
4285 emit_move_insn (str_rtx, result);
4286 return true;
4287
4288 case BIT_IOR_EXPR:
4289 case BIT_XOR_EXPR:
4290 if (TREE_CODE (op1) != INTEGER_CST)
4291 break;
4292 value = expand_expr (op1, NULL_RTX, GET_MODE (str_rtx), EXPAND_NORMAL);
4293 value = convert_modes (GET_MODE (str_rtx),
4294 TYPE_MODE (TREE_TYPE (op1)), value,
4295 TYPE_UNSIGNED (TREE_TYPE (op1)));
4296
4297 /* We may be accessing data outside the field, which means
4298 we can alias adjacent data. */
4299 if (MEM_P (str_rtx))
4300 {
4301 str_rtx = shallow_copy_rtx (str_rtx);
4302 set_mem_alias_set (str_rtx, 0);
4303 set_mem_expr (str_rtx, 0);
4304 }
4305
4306 binop = code == BIT_IOR_EXPR ? ior_optab : xor_optab;
4307 if (bitpos + bitsize != GET_MODE_BITSIZE (GET_MODE (str_rtx)))
4308 {
4309 rtx mask = GEN_INT (((unsigned HOST_WIDE_INT) 1 << bitsize)
4310 - 1);
4311 value = expand_and (GET_MODE (str_rtx), value, mask,
4312 NULL_RTX);
4313 }
4314 value = expand_shift (LSHIFT_EXPR, GET_MODE (str_rtx), value,
4315 bitpos, NULL_RTX, 1);
4316 result = expand_binop (GET_MODE (str_rtx), binop, str_rtx,
4317 value, str_rtx, 1, OPTAB_WIDEN);
4318 if (result != str_rtx)
4319 emit_move_insn (str_rtx, result);
4320 return true;
4321
4322 default:
4323 break;
4324 }
4325
4326 return false;
4327 }
4328
4329 /* In the C++ memory model, consecutive bit fields in a structure are
4330 considered one memory location.
4331
4332 Given a COMPONENT_REF, this function returns the bit range of
4333 consecutive bits in which this COMPONENT_REF belongs in. The
4334 values are returned in *BITSTART and *BITEND. If either the C++
4335 memory model is not activated, or this memory access is not thread
4336 visible, 0 is returned in *BITSTART and *BITEND.
4337
4338 EXP is the COMPONENT_REF.
4339 INNERDECL is the actual object being referenced.
4340 BITPOS is the position in bits where the bit starts within the structure.
4341 BITSIZE is size in bits of the field being referenced in EXP.
4342
4343 For example, while storing into FOO.A here...
4344
4345 struct {
4346 BIT 0:
4347 unsigned int a : 4;
4348 unsigned int b : 1;
4349 BIT 8:
4350 unsigned char c;
4351 unsigned int d : 6;
4352 } foo;
4353
4354 ...we are not allowed to store past <b>, so for the layout above, a
4355 range of 0..7 (because no one cares if we store into the
4356 padding). */
4357
4358 static void
4359 get_bit_range (unsigned HOST_WIDE_INT *bitstart,
4360 unsigned HOST_WIDE_INT *bitend,
4361 tree exp, tree innerdecl,
4362 HOST_WIDE_INT bitpos, HOST_WIDE_INT bitsize)
4363 {
4364 tree field, record_type, fld;
4365 bool found_field = false;
4366 bool prev_field_is_bitfield;
4367
4368 gcc_assert (TREE_CODE (exp) == COMPONENT_REF);
4369
4370 /* If other threads can't see this value, no need to restrict stores. */
4371 if (ALLOW_STORE_DATA_RACES
4372 || ((TREE_CODE (innerdecl) == MEM_REF
4373 || TREE_CODE (innerdecl) == TARGET_MEM_REF)
4374 && !ptr_deref_may_alias_global_p (TREE_OPERAND (innerdecl, 0)))
4375 || (DECL_P (innerdecl)
4376 && ((TREE_CODE (innerdecl) == VAR_DECL
4377 && DECL_THREAD_LOCAL_P (innerdecl))
4378 || !TREE_STATIC (innerdecl))))
4379 {
4380 *bitstart = *bitend = 0;
4381 return;
4382 }
4383
4384 /* Bit field we're storing into. */
4385 field = TREE_OPERAND (exp, 1);
4386 record_type = DECL_FIELD_CONTEXT (field);
4387
4388 /* Count the contiguous bitfields for the memory location that
4389 contains FIELD. */
4390 *bitstart = 0;
4391 prev_field_is_bitfield = true;
4392 for (fld = TYPE_FIELDS (record_type); fld; fld = DECL_CHAIN (fld))
4393 {
4394 tree t, offset;
4395 enum machine_mode mode;
4396 int unsignedp, volatilep;
4397
4398 if (TREE_CODE (fld) != FIELD_DECL)
4399 continue;
4400
4401 t = build3 (COMPONENT_REF, TREE_TYPE (exp),
4402 unshare_expr (TREE_OPERAND (exp, 0)),
4403 fld, NULL_TREE);
4404 get_inner_reference (t, &bitsize, &bitpos, &offset,
4405 &mode, &unsignedp, &volatilep, true);
4406
4407 if (field == fld)
4408 found_field = true;
4409
4410 if (DECL_BIT_FIELD_TYPE (fld) && bitsize > 0)
4411 {
4412 if (prev_field_is_bitfield == false)
4413 {
4414 *bitstart = bitpos;
4415 prev_field_is_bitfield = true;
4416 }
4417 }
4418 else
4419 {
4420 prev_field_is_bitfield = false;
4421 if (found_field)
4422 break;
4423 }
4424 }
4425 gcc_assert (found_field);
4426
4427 if (fld)
4428 {
4429 /* We found the end of the bit field sequence. Include the
4430 padding up to the next field and be done. */
4431 *bitend = bitpos - 1;
4432 }
4433 else
4434 {
4435 /* If this is the last element in the structure, include the padding
4436 at the end of structure. */
4437 *bitend = TREE_INT_CST_LOW (TYPE_SIZE (record_type)) - 1;
4438 }
4439 }
4440
4441 /* Expand an assignment that stores the value of FROM into TO. If NONTEMPORAL
4442 is true, try generating a nontemporal store. */
4443
4444 void
4445 expand_assignment (tree to, tree from, bool nontemporal)
4446 {
4447 rtx to_rtx = 0;
4448 rtx result;
4449 enum machine_mode mode;
4450 int align;
4451 enum insn_code icode;
4452
4453 /* Don't crash if the lhs of the assignment was erroneous. */
4454 if (TREE_CODE (to) == ERROR_MARK)
4455 {
4456 expand_normal (from);
4457 return;
4458 }
4459
4460 /* Optimize away no-op moves without side-effects. */
4461 if (operand_equal_p (to, from, 0))
4462 return;
4463
4464 mode = TYPE_MODE (TREE_TYPE (to));
4465 if ((TREE_CODE (to) == MEM_REF
4466 || TREE_CODE (to) == TARGET_MEM_REF)
4467 && mode != BLKmode
4468 && ((align = MAX (TYPE_ALIGN (TREE_TYPE (to)), get_object_alignment (to)))
4469 < (signed) GET_MODE_ALIGNMENT (mode))
4470 && ((icode = optab_handler (movmisalign_optab, mode))
4471 != CODE_FOR_nothing))
4472 {
4473 struct expand_operand ops[2];
4474 enum machine_mode address_mode;
4475 rtx reg, op0, mem;
4476
4477 reg = expand_expr (from, NULL_RTX, VOIDmode, EXPAND_NORMAL);
4478 reg = force_not_mem (reg);
4479
4480 if (TREE_CODE (to) == MEM_REF)
4481 {
4482 addr_space_t as
4483 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (to, 1))));
4484 tree base = TREE_OPERAND (to, 0);
4485 address_mode = targetm.addr_space.address_mode (as);
4486 op0 = expand_expr (base, NULL_RTX, VOIDmode, EXPAND_NORMAL);
4487 op0 = convert_memory_address_addr_space (address_mode, op0, as);
4488 if (!integer_zerop (TREE_OPERAND (to, 1)))
4489 {
4490 rtx off
4491 = immed_double_int_const (mem_ref_offset (to), address_mode);
4492 op0 = simplify_gen_binary (PLUS, address_mode, op0, off);
4493 }
4494 op0 = memory_address_addr_space (mode, op0, as);
4495 mem = gen_rtx_MEM (mode, op0);
4496 set_mem_attributes (mem, to, 0);
4497 set_mem_addr_space (mem, as);
4498 }
4499 else if (TREE_CODE (to) == TARGET_MEM_REF)
4500 {
4501 addr_space_t as = TYPE_ADDR_SPACE (TREE_TYPE (to));
4502 struct mem_address addr;
4503
4504 get_address_description (to, &addr);
4505 op0 = addr_for_mem_ref (&addr, as, true);
4506 op0 = memory_address_addr_space (mode, op0, as);
4507 mem = gen_rtx_MEM (mode, op0);
4508 set_mem_attributes (mem, to, 0);
4509 set_mem_addr_space (mem, as);
4510 }
4511 else
4512 gcc_unreachable ();
4513 if (TREE_THIS_VOLATILE (to))
4514 MEM_VOLATILE_P (mem) = 1;
4515
4516 create_fixed_operand (&ops[0], mem);
4517 create_input_operand (&ops[1], reg, mode);
4518 /* The movmisalign<mode> pattern cannot fail, else the assignment would
4519 silently be omitted. */
4520 expand_insn (icode, 2, ops);
4521 return;
4522 }
4523
4524 /* Assignment of a structure component needs special treatment
4525 if the structure component's rtx is not simply a MEM.
4526 Assignment of an array element at a constant index, and assignment of
4527 an array element in an unaligned packed structure field, has the same
4528 problem. */
4529 if (handled_component_p (to)
4530 /* ??? We only need to handle MEM_REF here if the access is not
4531 a full access of the base object. */
4532 || (TREE_CODE (to) == MEM_REF
4533 && TREE_CODE (TREE_OPERAND (to, 0)) == ADDR_EXPR)
4534 || TREE_CODE (TREE_TYPE (to)) == ARRAY_TYPE)
4535 {
4536 enum machine_mode mode1;
4537 HOST_WIDE_INT bitsize, bitpos;
4538 unsigned HOST_WIDE_INT bitregion_start = 0;
4539 unsigned HOST_WIDE_INT bitregion_end = 0;
4540 tree offset;
4541 int unsignedp;
4542 int volatilep = 0;
4543 tree tem;
4544
4545 push_temp_slots ();
4546 tem = get_inner_reference (to, &bitsize, &bitpos, &offset, &mode1,
4547 &unsignedp, &volatilep, true);
4548
4549 if (TREE_CODE (to) == COMPONENT_REF
4550 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (to, 1)))
4551 get_bit_range (&bitregion_start, &bitregion_end,
4552 to, tem, bitpos, bitsize);
4553
4554 /* If we are going to use store_bit_field and extract_bit_field,
4555 make sure to_rtx will be safe for multiple use. */
4556
4557 to_rtx = expand_normal (tem);
4558
4559 /* If the bitfield is volatile, we want to access it in the
4560 field's mode, not the computed mode.
4561 If a MEM has VOIDmode (external with incomplete type),
4562 use BLKmode for it instead. */
4563 if (MEM_P (to_rtx))
4564 {
4565 if (volatilep && flag_strict_volatile_bitfields > 0)
4566 to_rtx = adjust_address (to_rtx, mode1, 0);
4567 else if (GET_MODE (to_rtx) == VOIDmode)
4568 to_rtx = adjust_address (to_rtx, BLKmode, 0);
4569 }
4570
4571 if (offset != 0)
4572 {
4573 enum machine_mode address_mode;
4574 rtx offset_rtx;
4575
4576 if (!MEM_P (to_rtx))
4577 {
4578 /* We can get constant negative offsets into arrays with broken
4579 user code. Translate this to a trap instead of ICEing. */
4580 gcc_assert (TREE_CODE (offset) == INTEGER_CST);
4581 expand_builtin_trap ();
4582 to_rtx = gen_rtx_MEM (BLKmode, const0_rtx);
4583 }
4584
4585 offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode, EXPAND_SUM);
4586 address_mode
4587 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (to_rtx));
4588 if (GET_MODE (offset_rtx) != address_mode)
4589 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
4590
4591 /* A constant address in TO_RTX can have VOIDmode, we must not try
4592 to call force_reg for that case. Avoid that case. */
4593 if (MEM_P (to_rtx)
4594 && GET_MODE (to_rtx) == BLKmode
4595 && GET_MODE (XEXP (to_rtx, 0)) != VOIDmode
4596 && bitsize > 0
4597 && (bitpos % bitsize) == 0
4598 && (bitsize % GET_MODE_ALIGNMENT (mode1)) == 0
4599 && MEM_ALIGN (to_rtx) == GET_MODE_ALIGNMENT (mode1))
4600 {
4601 to_rtx = adjust_address (to_rtx, mode1, bitpos / BITS_PER_UNIT);
4602 bitpos = 0;
4603 }
4604
4605 to_rtx = offset_address (to_rtx, offset_rtx,
4606 highest_pow2_factor_for_target (to,
4607 offset));
4608 }
4609
4610 /* No action is needed if the target is not a memory and the field
4611 lies completely outside that target. This can occur if the source
4612 code contains an out-of-bounds access to a small array. */
4613 if (!MEM_P (to_rtx)
4614 && GET_MODE (to_rtx) != BLKmode
4615 && (unsigned HOST_WIDE_INT) bitpos
4616 >= GET_MODE_PRECISION (GET_MODE (to_rtx)))
4617 {
4618 expand_normal (from);
4619 result = NULL;
4620 }
4621 /* Handle expand_expr of a complex value returning a CONCAT. */
4622 else if (GET_CODE (to_rtx) == CONCAT)
4623 {
4624 unsigned short mode_bitsize = GET_MODE_BITSIZE (GET_MODE (to_rtx));
4625 if (COMPLEX_MODE_P (TYPE_MODE (TREE_TYPE (from)))
4626 && bitpos == 0
4627 && bitsize == mode_bitsize)
4628 result = store_expr (from, to_rtx, false, nontemporal);
4629 else if (bitsize == mode_bitsize / 2
4630 && (bitpos == 0 || bitpos == mode_bitsize / 2))
4631 result = store_expr (from, XEXP (to_rtx, bitpos != 0), false,
4632 nontemporal);
4633 else if (bitpos + bitsize <= mode_bitsize / 2)
4634 result = store_field (XEXP (to_rtx, 0), bitsize, bitpos,
4635 bitregion_start, bitregion_end,
4636 mode1, from, TREE_TYPE (tem),
4637 get_alias_set (to), nontemporal);
4638 else if (bitpos >= mode_bitsize / 2)
4639 result = store_field (XEXP (to_rtx, 1), bitsize,
4640 bitpos - mode_bitsize / 2,
4641 bitregion_start, bitregion_end,
4642 mode1, from,
4643 TREE_TYPE (tem), get_alias_set (to),
4644 nontemporal);
4645 else if (bitpos == 0 && bitsize == mode_bitsize)
4646 {
4647 rtx from_rtx;
4648 result = expand_normal (from);
4649 from_rtx = simplify_gen_subreg (GET_MODE (to_rtx), result,
4650 TYPE_MODE (TREE_TYPE (from)), 0);
4651 emit_move_insn (XEXP (to_rtx, 0),
4652 read_complex_part (from_rtx, false));
4653 emit_move_insn (XEXP (to_rtx, 1),
4654 read_complex_part (from_rtx, true));
4655 }
4656 else
4657 {
4658 rtx temp = assign_stack_temp (GET_MODE (to_rtx),
4659 GET_MODE_SIZE (GET_MODE (to_rtx)),
4660 0);
4661 write_complex_part (temp, XEXP (to_rtx, 0), false);
4662 write_complex_part (temp, XEXP (to_rtx, 1), true);
4663 result = store_field (temp, bitsize, bitpos,
4664 bitregion_start, bitregion_end,
4665 mode1, from,
4666 TREE_TYPE (tem), get_alias_set (to),
4667 nontemporal);
4668 emit_move_insn (XEXP (to_rtx, 0), read_complex_part (temp, false));
4669 emit_move_insn (XEXP (to_rtx, 1), read_complex_part (temp, true));
4670 }
4671 }
4672 else
4673 {
4674 if (MEM_P (to_rtx))
4675 {
4676 /* If the field is at offset zero, we could have been given the
4677 DECL_RTX of the parent struct. Don't munge it. */
4678 to_rtx = shallow_copy_rtx (to_rtx);
4679
4680 set_mem_attributes_minus_bitpos (to_rtx, to, 0, bitpos);
4681
4682 /* Deal with volatile and readonly fields. The former is only
4683 done for MEM. Also set MEM_KEEP_ALIAS_SET_P if needed. */
4684 if (volatilep)
4685 MEM_VOLATILE_P (to_rtx) = 1;
4686 if (component_uses_parent_alias_set (to))
4687 MEM_KEEP_ALIAS_SET_P (to_rtx) = 1;
4688 }
4689
4690 if (optimize_bitfield_assignment_op (bitsize, bitpos,
4691 bitregion_start, bitregion_end,
4692 mode1,
4693 to_rtx, to, from))
4694 result = NULL;
4695 else
4696 result = store_field (to_rtx, bitsize, bitpos,
4697 bitregion_start, bitregion_end,
4698 mode1, from,
4699 TREE_TYPE (tem), get_alias_set (to),
4700 nontemporal);
4701 }
4702
4703 if (result)
4704 preserve_temp_slots (result);
4705 free_temp_slots ();
4706 pop_temp_slots ();
4707 return;
4708 }
4709
4710 /* If the rhs is a function call and its value is not an aggregate,
4711 call the function before we start to compute the lhs.
4712 This is needed for correct code for cases such as
4713 val = setjmp (buf) on machines where reference to val
4714 requires loading up part of an address in a separate insn.
4715
4716 Don't do this if TO is a VAR_DECL or PARM_DECL whose DECL_RTL is REG
4717 since it might be a promoted variable where the zero- or sign- extension
4718 needs to be done. Handling this in the normal way is safe because no
4719 computation is done before the call. The same is true for SSA names. */
4720 if (TREE_CODE (from) == CALL_EXPR && ! aggregate_value_p (from, from)
4721 && COMPLETE_TYPE_P (TREE_TYPE (from))
4722 && TREE_CODE (TYPE_SIZE (TREE_TYPE (from))) == INTEGER_CST
4723 && ! (((TREE_CODE (to) == VAR_DECL || TREE_CODE (to) == PARM_DECL)
4724 && REG_P (DECL_RTL (to)))
4725 || TREE_CODE (to) == SSA_NAME))
4726 {
4727 rtx value;
4728
4729 push_temp_slots ();
4730 value = expand_normal (from);
4731 if (to_rtx == 0)
4732 to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
4733
4734 /* Handle calls that return values in multiple non-contiguous locations.
4735 The Irix 6 ABI has examples of this. */
4736 if (GET_CODE (to_rtx) == PARALLEL)
4737 emit_group_load (to_rtx, value, TREE_TYPE (from),
4738 int_size_in_bytes (TREE_TYPE (from)));
4739 else if (GET_MODE (to_rtx) == BLKmode)
4740 emit_block_move (to_rtx, value, expr_size (from), BLOCK_OP_NORMAL);
4741 else
4742 {
4743 if (POINTER_TYPE_P (TREE_TYPE (to)))
4744 value = convert_memory_address_addr_space
4745 (GET_MODE (to_rtx), value,
4746 TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (to))));
4747
4748 emit_move_insn (to_rtx, value);
4749 }
4750 preserve_temp_slots (to_rtx);
4751 free_temp_slots ();
4752 pop_temp_slots ();
4753 return;
4754 }
4755
4756 /* Ordinary treatment. Expand TO to get a REG or MEM rtx.
4757 Don't re-expand if it was expanded already (in COMPONENT_REF case). */
4758
4759 if (to_rtx == 0)
4760 to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
4761
4762 /* Don't move directly into a return register. */
4763 if (TREE_CODE (to) == RESULT_DECL
4764 && (REG_P (to_rtx) || GET_CODE (to_rtx) == PARALLEL))
4765 {
4766 rtx temp;
4767
4768 push_temp_slots ();
4769 temp = expand_expr (from, NULL_RTX, GET_MODE (to_rtx), EXPAND_NORMAL);
4770
4771 if (GET_CODE (to_rtx) == PARALLEL)
4772 emit_group_load (to_rtx, temp, TREE_TYPE (from),
4773 int_size_in_bytes (TREE_TYPE (from)));
4774 else
4775 emit_move_insn (to_rtx, temp);
4776
4777 preserve_temp_slots (to_rtx);
4778 free_temp_slots ();
4779 pop_temp_slots ();
4780 return;
4781 }
4782
4783 /* In case we are returning the contents of an object which overlaps
4784 the place the value is being stored, use a safe function when copying
4785 a value through a pointer into a structure value return block. */
4786 if (TREE_CODE (to) == RESULT_DECL
4787 && TREE_CODE (from) == INDIRECT_REF
4788 && ADDR_SPACE_GENERIC_P
4789 (TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (from, 0)))))
4790 && refs_may_alias_p (to, from)
4791 && cfun->returns_struct
4792 && !cfun->returns_pcc_struct)
4793 {
4794 rtx from_rtx, size;
4795
4796 push_temp_slots ();
4797 size = expr_size (from);
4798 from_rtx = expand_normal (from);
4799
4800 emit_library_call (memmove_libfunc, LCT_NORMAL,
4801 VOIDmode, 3, XEXP (to_rtx, 0), Pmode,
4802 XEXP (from_rtx, 0), Pmode,
4803 convert_to_mode (TYPE_MODE (sizetype),
4804 size, TYPE_UNSIGNED (sizetype)),
4805 TYPE_MODE (sizetype));
4806
4807 preserve_temp_slots (to_rtx);
4808 free_temp_slots ();
4809 pop_temp_slots ();
4810 return;
4811 }
4812
4813 /* Compute FROM and store the value in the rtx we got. */
4814
4815 push_temp_slots ();
4816 result = store_expr (from, to_rtx, 0, nontemporal);
4817 preserve_temp_slots (result);
4818 free_temp_slots ();
4819 pop_temp_slots ();
4820 return;
4821 }
4822
4823 /* Emits nontemporal store insn that moves FROM to TO. Returns true if this
4824 succeeded, false otherwise. */
4825
4826 bool
4827 emit_storent_insn (rtx to, rtx from)
4828 {
4829 struct expand_operand ops[2];
4830 enum machine_mode mode = GET_MODE (to);
4831 enum insn_code code = optab_handler (storent_optab, mode);
4832
4833 if (code == CODE_FOR_nothing)
4834 return false;
4835
4836 create_fixed_operand (&ops[0], to);
4837 create_input_operand (&ops[1], from, mode);
4838 return maybe_expand_insn (code, 2, ops);
4839 }
4840
4841 /* Generate code for computing expression EXP,
4842 and storing the value into TARGET.
4843
4844 If the mode is BLKmode then we may return TARGET itself.
4845 It turns out that in BLKmode it doesn't cause a problem.
4846 because C has no operators that could combine two different
4847 assignments into the same BLKmode object with different values
4848 with no sequence point. Will other languages need this to
4849 be more thorough?
4850
4851 If CALL_PARAM_P is nonzero, this is a store into a call param on the
4852 stack, and block moves may need to be treated specially.
4853
4854 If NONTEMPORAL is true, try using a nontemporal store instruction. */
4855
4856 rtx
4857 store_expr (tree exp, rtx target, int call_param_p, bool nontemporal)
4858 {
4859 rtx temp;
4860 rtx alt_rtl = NULL_RTX;
4861 location_t loc = EXPR_LOCATION (exp);
4862
4863 if (VOID_TYPE_P (TREE_TYPE (exp)))
4864 {
4865 /* C++ can generate ?: expressions with a throw expression in one
4866 branch and an rvalue in the other. Here, we resolve attempts to
4867 store the throw expression's nonexistent result. */
4868 gcc_assert (!call_param_p);
4869 expand_expr (exp, const0_rtx, VOIDmode, EXPAND_NORMAL);
4870 return NULL_RTX;
4871 }
4872 if (TREE_CODE (exp) == COMPOUND_EXPR)
4873 {
4874 /* Perform first part of compound expression, then assign from second
4875 part. */
4876 expand_expr (TREE_OPERAND (exp, 0), const0_rtx, VOIDmode,
4877 call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL);
4878 return store_expr (TREE_OPERAND (exp, 1), target, call_param_p,
4879 nontemporal);
4880 }
4881 else if (TREE_CODE (exp) == COND_EXPR && GET_MODE (target) == BLKmode)
4882 {
4883 /* For conditional expression, get safe form of the target. Then
4884 test the condition, doing the appropriate assignment on either
4885 side. This avoids the creation of unnecessary temporaries.
4886 For non-BLKmode, it is more efficient not to do this. */
4887
4888 rtx lab1 = gen_label_rtx (), lab2 = gen_label_rtx ();
4889
4890 do_pending_stack_adjust ();
4891 NO_DEFER_POP;
4892 jumpifnot (TREE_OPERAND (exp, 0), lab1, -1);
4893 store_expr (TREE_OPERAND (exp, 1), target, call_param_p,
4894 nontemporal);
4895 emit_jump_insn (gen_jump (lab2));
4896 emit_barrier ();
4897 emit_label (lab1);
4898 store_expr (TREE_OPERAND (exp, 2), target, call_param_p,
4899 nontemporal);
4900 emit_label (lab2);
4901 OK_DEFER_POP;
4902
4903 return NULL_RTX;
4904 }
4905 else if (GET_CODE (target) == SUBREG && SUBREG_PROMOTED_VAR_P (target))
4906 /* If this is a scalar in a register that is stored in a wider mode
4907 than the declared mode, compute the result into its declared mode
4908 and then convert to the wider mode. Our value is the computed
4909 expression. */
4910 {
4911 rtx inner_target = 0;
4912
4913 /* We can do the conversion inside EXP, which will often result
4914 in some optimizations. Do the conversion in two steps: first
4915 change the signedness, if needed, then the extend. But don't
4916 do this if the type of EXP is a subtype of something else
4917 since then the conversion might involve more than just
4918 converting modes. */
4919 if (INTEGRAL_TYPE_P (TREE_TYPE (exp))
4920 && TREE_TYPE (TREE_TYPE (exp)) == 0
4921 && GET_MODE_PRECISION (GET_MODE (target))
4922 == TYPE_PRECISION (TREE_TYPE (exp)))
4923 {
4924 if (TYPE_UNSIGNED (TREE_TYPE (exp))
4925 != SUBREG_PROMOTED_UNSIGNED_P (target))
4926 {
4927 /* Some types, e.g. Fortran's logical*4, won't have a signed
4928 version, so use the mode instead. */
4929 tree ntype
4930 = (signed_or_unsigned_type_for
4931 (SUBREG_PROMOTED_UNSIGNED_P (target), TREE_TYPE (exp)));
4932 if (ntype == NULL)
4933 ntype = lang_hooks.types.type_for_mode
4934 (TYPE_MODE (TREE_TYPE (exp)),
4935 SUBREG_PROMOTED_UNSIGNED_P (target));
4936
4937 exp = fold_convert_loc (loc, ntype, exp);
4938 }
4939
4940 exp = fold_convert_loc (loc, lang_hooks.types.type_for_mode
4941 (GET_MODE (SUBREG_REG (target)),
4942 SUBREG_PROMOTED_UNSIGNED_P (target)),
4943 exp);
4944
4945 inner_target = SUBREG_REG (target);
4946 }
4947
4948 temp = expand_expr (exp, inner_target, VOIDmode,
4949 call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL);
4950
4951 /* If TEMP is a VOIDmode constant, use convert_modes to make
4952 sure that we properly convert it. */
4953 if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode)
4954 {
4955 temp = convert_modes (GET_MODE (target), TYPE_MODE (TREE_TYPE (exp)),
4956 temp, SUBREG_PROMOTED_UNSIGNED_P (target));
4957 temp = convert_modes (GET_MODE (SUBREG_REG (target)),
4958 GET_MODE (target), temp,
4959 SUBREG_PROMOTED_UNSIGNED_P (target));
4960 }
4961
4962 convert_move (SUBREG_REG (target), temp,
4963 SUBREG_PROMOTED_UNSIGNED_P (target));
4964
4965 return NULL_RTX;
4966 }
4967 else if ((TREE_CODE (exp) == STRING_CST
4968 || (TREE_CODE (exp) == MEM_REF
4969 && TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR
4970 && TREE_CODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0))
4971 == STRING_CST
4972 && integer_zerop (TREE_OPERAND (exp, 1))))
4973 && !nontemporal && !call_param_p
4974 && MEM_P (target))
4975 {
4976 /* Optimize initialization of an array with a STRING_CST. */
4977 HOST_WIDE_INT exp_len, str_copy_len;
4978 rtx dest_mem;
4979 tree str = TREE_CODE (exp) == STRING_CST
4980 ? exp : TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
4981
4982 exp_len = int_expr_size (exp);
4983 if (exp_len <= 0)
4984 goto normal_expr;
4985
4986 if (TREE_STRING_LENGTH (str) <= 0)
4987 goto normal_expr;
4988
4989 str_copy_len = strlen (TREE_STRING_POINTER (str));
4990 if (str_copy_len < TREE_STRING_LENGTH (str) - 1)
4991 goto normal_expr;
4992
4993 str_copy_len = TREE_STRING_LENGTH (str);
4994 if ((STORE_MAX_PIECES & (STORE_MAX_PIECES - 1)) == 0
4995 && TREE_STRING_POINTER (str)[TREE_STRING_LENGTH (str) - 1] == '\0')
4996 {
4997 str_copy_len += STORE_MAX_PIECES - 1;
4998 str_copy_len &= ~(STORE_MAX_PIECES - 1);
4999 }
5000 str_copy_len = MIN (str_copy_len, exp_len);
5001 if (!can_store_by_pieces (str_copy_len, builtin_strncpy_read_str,
5002 CONST_CAST (char *, TREE_STRING_POINTER (str)),
5003 MEM_ALIGN (target), false))
5004 goto normal_expr;
5005
5006 dest_mem = target;
5007
5008 dest_mem = store_by_pieces (dest_mem,
5009 str_copy_len, builtin_strncpy_read_str,
5010 CONST_CAST (char *,
5011 TREE_STRING_POINTER (str)),
5012 MEM_ALIGN (target), false,
5013 exp_len > str_copy_len ? 1 : 0);
5014 if (exp_len > str_copy_len)
5015 clear_storage (adjust_address (dest_mem, BLKmode, 0),
5016 GEN_INT (exp_len - str_copy_len),
5017 BLOCK_OP_NORMAL);
5018 return NULL_RTX;
5019 }
5020 else
5021 {
5022 rtx tmp_target;
5023
5024 normal_expr:
5025 /* If we want to use a nontemporal store, force the value to
5026 register first. */
5027 tmp_target = nontemporal ? NULL_RTX : target;
5028 temp = expand_expr_real (exp, tmp_target, GET_MODE (target),
5029 (call_param_p
5030 ? EXPAND_STACK_PARM : EXPAND_NORMAL),
5031 &alt_rtl);
5032 }
5033
5034 /* If TEMP is a VOIDmode constant and the mode of the type of EXP is not
5035 the same as that of TARGET, adjust the constant. This is needed, for
5036 example, in case it is a CONST_DOUBLE and we want only a word-sized
5037 value. */
5038 if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode
5039 && TREE_CODE (exp) != ERROR_MARK
5040 && GET_MODE (target) != TYPE_MODE (TREE_TYPE (exp)))
5041 temp = convert_modes (GET_MODE (target), TYPE_MODE (TREE_TYPE (exp)),
5042 temp, TYPE_UNSIGNED (TREE_TYPE (exp)));
5043
5044 /* If value was not generated in the target, store it there.
5045 Convert the value to TARGET's type first if necessary and emit the
5046 pending incrementations that have been queued when expanding EXP.
5047 Note that we cannot emit the whole queue blindly because this will
5048 effectively disable the POST_INC optimization later.
5049
5050 If TEMP and TARGET compare equal according to rtx_equal_p, but
5051 one or both of them are volatile memory refs, we have to distinguish
5052 two cases:
5053 - expand_expr has used TARGET. In this case, we must not generate
5054 another copy. This can be detected by TARGET being equal according
5055 to == .
5056 - expand_expr has not used TARGET - that means that the source just
5057 happens to have the same RTX form. Since temp will have been created
5058 by expand_expr, it will compare unequal according to == .
5059 We must generate a copy in this case, to reach the correct number
5060 of volatile memory references. */
5061
5062 if ((! rtx_equal_p (temp, target)
5063 || (temp != target && (side_effects_p (temp)
5064 || side_effects_p (target))))
5065 && TREE_CODE (exp) != ERROR_MARK
5066 /* If store_expr stores a DECL whose DECL_RTL(exp) == TARGET,
5067 but TARGET is not valid memory reference, TEMP will differ
5068 from TARGET although it is really the same location. */
5069 && !(alt_rtl
5070 && rtx_equal_p (alt_rtl, target)
5071 && !side_effects_p (alt_rtl)
5072 && !side_effects_p (target))
5073 /* If there's nothing to copy, don't bother. Don't call
5074 expr_size unless necessary, because some front-ends (C++)
5075 expr_size-hook must not be given objects that are not
5076 supposed to be bit-copied or bit-initialized. */
5077 && expr_size (exp) != const0_rtx)
5078 {
5079 if (GET_MODE (temp) != GET_MODE (target)
5080 && GET_MODE (temp) != VOIDmode)
5081 {
5082 int unsignedp = TYPE_UNSIGNED (TREE_TYPE (exp));
5083 if (GET_MODE (target) == BLKmode
5084 && GET_MODE (temp) == BLKmode)
5085 emit_block_move (target, temp, expr_size (exp),
5086 (call_param_p
5087 ? BLOCK_OP_CALL_PARM
5088 : BLOCK_OP_NORMAL));
5089 else if (GET_MODE (target) == BLKmode)
5090 store_bit_field (target, INTVAL (expr_size (exp)) * BITS_PER_UNIT,
5091 0, 0, 0, GET_MODE (temp), temp);
5092 else
5093 convert_move (target, temp, unsignedp);
5094 }
5095
5096 else if (GET_MODE (temp) == BLKmode && TREE_CODE (exp) == STRING_CST)
5097 {
5098 /* Handle copying a string constant into an array. The string
5099 constant may be shorter than the array. So copy just the string's
5100 actual length, and clear the rest. First get the size of the data
5101 type of the string, which is actually the size of the target. */
5102 rtx size = expr_size (exp);
5103
5104 if (CONST_INT_P (size)
5105 && INTVAL (size) < TREE_STRING_LENGTH (exp))
5106 emit_block_move (target, temp, size,
5107 (call_param_p
5108 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5109 else
5110 {
5111 enum machine_mode pointer_mode
5112 = targetm.addr_space.pointer_mode (MEM_ADDR_SPACE (target));
5113 enum machine_mode address_mode
5114 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (target));
5115
5116 /* Compute the size of the data to copy from the string. */
5117 tree copy_size
5118 = size_binop_loc (loc, MIN_EXPR,
5119 make_tree (sizetype, size),
5120 size_int (TREE_STRING_LENGTH (exp)));
5121 rtx copy_size_rtx
5122 = expand_expr (copy_size, NULL_RTX, VOIDmode,
5123 (call_param_p
5124 ? EXPAND_STACK_PARM : EXPAND_NORMAL));
5125 rtx label = 0;
5126
5127 /* Copy that much. */
5128 copy_size_rtx = convert_to_mode (pointer_mode, copy_size_rtx,
5129 TYPE_UNSIGNED (sizetype));
5130 emit_block_move (target, temp, copy_size_rtx,
5131 (call_param_p
5132 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5133
5134 /* Figure out how much is left in TARGET that we have to clear.
5135 Do all calculations in pointer_mode. */
5136 if (CONST_INT_P (copy_size_rtx))
5137 {
5138 size = plus_constant (size, -INTVAL (copy_size_rtx));
5139 target = adjust_address (target, BLKmode,
5140 INTVAL (copy_size_rtx));
5141 }
5142 else
5143 {
5144 size = expand_binop (TYPE_MODE (sizetype), sub_optab, size,
5145 copy_size_rtx, NULL_RTX, 0,
5146 OPTAB_LIB_WIDEN);
5147
5148 if (GET_MODE (copy_size_rtx) != address_mode)
5149 copy_size_rtx = convert_to_mode (address_mode,
5150 copy_size_rtx,
5151 TYPE_UNSIGNED (sizetype));
5152
5153 target = offset_address (target, copy_size_rtx,
5154 highest_pow2_factor (copy_size));
5155 label = gen_label_rtx ();
5156 emit_cmp_and_jump_insns (size, const0_rtx, LT, NULL_RTX,
5157 GET_MODE (size), 0, label);
5158 }
5159
5160 if (size != const0_rtx)
5161 clear_storage (target, size, BLOCK_OP_NORMAL);
5162
5163 if (label)
5164 emit_label (label);
5165 }
5166 }
5167 /* Handle calls that return values in multiple non-contiguous locations.
5168 The Irix 6 ABI has examples of this. */
5169 else if (GET_CODE (target) == PARALLEL)
5170 emit_group_load (target, temp, TREE_TYPE (exp),
5171 int_size_in_bytes (TREE_TYPE (exp)));
5172 else if (GET_MODE (temp) == BLKmode)
5173 emit_block_move (target, temp, expr_size (exp),
5174 (call_param_p
5175 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5176 else if (nontemporal
5177 && emit_storent_insn (target, temp))
5178 /* If we managed to emit a nontemporal store, there is nothing else to
5179 do. */
5180 ;
5181 else
5182 {
5183 temp = force_operand (temp, target);
5184 if (temp != target)
5185 emit_move_insn (target, temp);
5186 }
5187 }
5188
5189 return NULL_RTX;
5190 }
5191 \f
5192 /* Return true if field F of structure TYPE is a flexible array. */
5193
5194 static bool
5195 flexible_array_member_p (const_tree f, const_tree type)
5196 {
5197 const_tree tf;
5198
5199 tf = TREE_TYPE (f);
5200 return (DECL_CHAIN (f) == NULL
5201 && TREE_CODE (tf) == ARRAY_TYPE
5202 && TYPE_DOMAIN (tf)
5203 && TYPE_MIN_VALUE (TYPE_DOMAIN (tf))
5204 && integer_zerop (TYPE_MIN_VALUE (TYPE_DOMAIN (tf)))
5205 && !TYPE_MAX_VALUE (TYPE_DOMAIN (tf))
5206 && int_size_in_bytes (type) >= 0);
5207 }
5208
5209 /* If FOR_CTOR_P, return the number of top-level elements that a constructor
5210 must have in order for it to completely initialize a value of type TYPE.
5211 Return -1 if the number isn't known.
5212
5213 If !FOR_CTOR_P, return an estimate of the number of scalars in TYPE. */
5214
5215 static HOST_WIDE_INT
5216 count_type_elements (const_tree type, bool for_ctor_p)
5217 {
5218 switch (TREE_CODE (type))
5219 {
5220 case ARRAY_TYPE:
5221 {
5222 tree nelts;
5223
5224 nelts = array_type_nelts (type);
5225 if (nelts && host_integerp (nelts, 1))
5226 {
5227 unsigned HOST_WIDE_INT n;
5228
5229 n = tree_low_cst (nelts, 1) + 1;
5230 if (n == 0 || for_ctor_p)
5231 return n;
5232 else
5233 return n * count_type_elements (TREE_TYPE (type), false);
5234 }
5235 return for_ctor_p ? -1 : 1;
5236 }
5237
5238 case RECORD_TYPE:
5239 {
5240 unsigned HOST_WIDE_INT n;
5241 tree f;
5242
5243 n = 0;
5244 for (f = TYPE_FIELDS (type); f ; f = DECL_CHAIN (f))
5245 if (TREE_CODE (f) == FIELD_DECL)
5246 {
5247 if (!for_ctor_p)
5248 n += count_type_elements (TREE_TYPE (f), false);
5249 else if (!flexible_array_member_p (f, type))
5250 /* Don't count flexible arrays, which are not supposed
5251 to be initialized. */
5252 n += 1;
5253 }
5254
5255 return n;
5256 }
5257
5258 case UNION_TYPE:
5259 case QUAL_UNION_TYPE:
5260 {
5261 tree f;
5262 HOST_WIDE_INT n, m;
5263
5264 gcc_assert (!for_ctor_p);
5265 /* Estimate the number of scalars in each field and pick the
5266 maximum. Other estimates would do instead; the idea is simply
5267 to make sure that the estimate is not sensitive to the ordering
5268 of the fields. */
5269 n = 1;
5270 for (f = TYPE_FIELDS (type); f ; f = DECL_CHAIN (f))
5271 if (TREE_CODE (f) == FIELD_DECL)
5272 {
5273 m = count_type_elements (TREE_TYPE (f), false);
5274 /* If the field doesn't span the whole union, add an extra
5275 scalar for the rest. */
5276 if (simple_cst_equal (TYPE_SIZE (TREE_TYPE (f)),
5277 TYPE_SIZE (type)) != 1)
5278 m++;
5279 if (n < m)
5280 n = m;
5281 }
5282 return n;
5283 }
5284
5285 case COMPLEX_TYPE:
5286 return 2;
5287
5288 case VECTOR_TYPE:
5289 return TYPE_VECTOR_SUBPARTS (type);
5290
5291 case INTEGER_TYPE:
5292 case REAL_TYPE:
5293 case FIXED_POINT_TYPE:
5294 case ENUMERAL_TYPE:
5295 case BOOLEAN_TYPE:
5296 case POINTER_TYPE:
5297 case OFFSET_TYPE:
5298 case REFERENCE_TYPE:
5299 case NULLPTR_TYPE:
5300 return 1;
5301
5302 case ERROR_MARK:
5303 return 0;
5304
5305 case VOID_TYPE:
5306 case METHOD_TYPE:
5307 case FUNCTION_TYPE:
5308 case LANG_TYPE:
5309 default:
5310 gcc_unreachable ();
5311 }
5312 }
5313
5314 /* Helper for categorize_ctor_elements. Identical interface. */
5315
5316 static bool
5317 categorize_ctor_elements_1 (const_tree ctor, HOST_WIDE_INT *p_nz_elts,
5318 HOST_WIDE_INT *p_init_elts, bool *p_complete)
5319 {
5320 unsigned HOST_WIDE_INT idx;
5321 HOST_WIDE_INT nz_elts, init_elts, num_fields;
5322 tree value, purpose, elt_type;
5323
5324 /* Whether CTOR is a valid constant initializer, in accordance with what
5325 initializer_constant_valid_p does. If inferred from the constructor
5326 elements, true until proven otherwise. */
5327 bool const_from_elts_p = constructor_static_from_elts_p (ctor);
5328 bool const_p = const_from_elts_p ? true : TREE_STATIC (ctor);
5329
5330 nz_elts = 0;
5331 init_elts = 0;
5332 num_fields = 0;
5333 elt_type = NULL_TREE;
5334
5335 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (ctor), idx, purpose, value)
5336 {
5337 HOST_WIDE_INT mult = 1;
5338
5339 if (TREE_CODE (purpose) == RANGE_EXPR)
5340 {
5341 tree lo_index = TREE_OPERAND (purpose, 0);
5342 tree hi_index = TREE_OPERAND (purpose, 1);
5343
5344 if (host_integerp (lo_index, 1) && host_integerp (hi_index, 1))
5345 mult = (tree_low_cst (hi_index, 1)
5346 - tree_low_cst (lo_index, 1) + 1);
5347 }
5348 num_fields += mult;
5349 elt_type = TREE_TYPE (value);
5350
5351 switch (TREE_CODE (value))
5352 {
5353 case CONSTRUCTOR:
5354 {
5355 HOST_WIDE_INT nz = 0, ic = 0;
5356
5357 bool const_elt_p = categorize_ctor_elements_1 (value, &nz, &ic,
5358 p_complete);
5359
5360 nz_elts += mult * nz;
5361 init_elts += mult * ic;
5362
5363 if (const_from_elts_p && const_p)
5364 const_p = const_elt_p;
5365 }
5366 break;
5367
5368 case INTEGER_CST:
5369 case REAL_CST:
5370 case FIXED_CST:
5371 if (!initializer_zerop (value))
5372 nz_elts += mult;
5373 init_elts += mult;
5374 break;
5375
5376 case STRING_CST:
5377 nz_elts += mult * TREE_STRING_LENGTH (value);
5378 init_elts += mult * TREE_STRING_LENGTH (value);
5379 break;
5380
5381 case COMPLEX_CST:
5382 if (!initializer_zerop (TREE_REALPART (value)))
5383 nz_elts += mult;
5384 if (!initializer_zerop (TREE_IMAGPART (value)))
5385 nz_elts += mult;
5386 init_elts += mult;
5387 break;
5388
5389 case VECTOR_CST:
5390 {
5391 tree v;
5392 for (v = TREE_VECTOR_CST_ELTS (value); v; v = TREE_CHAIN (v))
5393 {
5394 if (!initializer_zerop (TREE_VALUE (v)))
5395 nz_elts += mult;
5396 init_elts += mult;
5397 }
5398 }
5399 break;
5400
5401 default:
5402 {
5403 HOST_WIDE_INT tc = count_type_elements (elt_type, false);
5404 nz_elts += mult * tc;
5405 init_elts += mult * tc;
5406
5407 if (const_from_elts_p && const_p)
5408 const_p = initializer_constant_valid_p (value, elt_type)
5409 != NULL_TREE;
5410 }
5411 break;
5412 }
5413 }
5414
5415 if (*p_complete && !complete_ctor_at_level_p (TREE_TYPE (ctor),
5416 num_fields, elt_type))
5417 *p_complete = false;
5418
5419 *p_nz_elts += nz_elts;
5420 *p_init_elts += init_elts;
5421
5422 return const_p;
5423 }
5424
5425 /* Examine CTOR to discover:
5426 * how many scalar fields are set to nonzero values,
5427 and place it in *P_NZ_ELTS;
5428 * how many scalar fields in total are in CTOR,
5429 and place it in *P_ELT_COUNT.
5430 * whether the constructor is complete -- in the sense that every
5431 meaningful byte is explicitly given a value --
5432 and place it in *P_COMPLETE.
5433
5434 Return whether or not CTOR is a valid static constant initializer, the same
5435 as "initializer_constant_valid_p (CTOR, TREE_TYPE (CTOR)) != 0". */
5436
5437 bool
5438 categorize_ctor_elements (const_tree ctor, HOST_WIDE_INT *p_nz_elts,
5439 HOST_WIDE_INT *p_init_elts, bool *p_complete)
5440 {
5441 *p_nz_elts = 0;
5442 *p_init_elts = 0;
5443 *p_complete = true;
5444
5445 return categorize_ctor_elements_1 (ctor, p_nz_elts, p_init_elts, p_complete);
5446 }
5447
5448 /* TYPE is initialized by a constructor with NUM_ELTS elements, the last
5449 of which had type LAST_TYPE. Each element was itself a complete
5450 initializer, in the sense that every meaningful byte was explicitly
5451 given a value. Return true if the same is true for the constructor
5452 as a whole. */
5453
5454 bool
5455 complete_ctor_at_level_p (const_tree type, HOST_WIDE_INT num_elts,
5456 const_tree last_type)
5457 {
5458 if (TREE_CODE (type) == UNION_TYPE
5459 || TREE_CODE (type) == QUAL_UNION_TYPE)
5460 {
5461 if (num_elts == 0)
5462 return false;
5463
5464 gcc_assert (num_elts == 1 && last_type);
5465
5466 /* ??? We could look at each element of the union, and find the
5467 largest element. Which would avoid comparing the size of the
5468 initialized element against any tail padding in the union.
5469 Doesn't seem worth the effort... */
5470 return simple_cst_equal (TYPE_SIZE (type), TYPE_SIZE (last_type)) == 1;
5471 }
5472
5473 return count_type_elements (type, true) == num_elts;
5474 }
5475
5476 /* Return 1 if EXP contains mostly (3/4) zeros. */
5477
5478 static int
5479 mostly_zeros_p (const_tree exp)
5480 {
5481 if (TREE_CODE (exp) == CONSTRUCTOR)
5482 {
5483 HOST_WIDE_INT nz_elts, init_elts;
5484 bool complete_p;
5485
5486 categorize_ctor_elements (exp, &nz_elts, &init_elts, &complete_p);
5487 return !complete_p || nz_elts < init_elts / 4;
5488 }
5489
5490 return initializer_zerop (exp);
5491 }
5492
5493 /* Return 1 if EXP contains all zeros. */
5494
5495 static int
5496 all_zeros_p (const_tree exp)
5497 {
5498 if (TREE_CODE (exp) == CONSTRUCTOR)
5499 {
5500 HOST_WIDE_INT nz_elts, init_elts;
5501 bool complete_p;
5502
5503 categorize_ctor_elements (exp, &nz_elts, &init_elts, &complete_p);
5504 return nz_elts == 0;
5505 }
5506
5507 return initializer_zerop (exp);
5508 }
5509 \f
5510 /* Helper function for store_constructor.
5511 TARGET, BITSIZE, BITPOS, MODE, EXP are as for store_field.
5512 TYPE is the type of the CONSTRUCTOR, not the element type.
5513 CLEARED is as for store_constructor.
5514 ALIAS_SET is the alias set to use for any stores.
5515
5516 This provides a recursive shortcut back to store_constructor when it isn't
5517 necessary to go through store_field. This is so that we can pass through
5518 the cleared field to let store_constructor know that we may not have to
5519 clear a substructure if the outer structure has already been cleared. */
5520
5521 static void
5522 store_constructor_field (rtx target, unsigned HOST_WIDE_INT bitsize,
5523 HOST_WIDE_INT bitpos, enum machine_mode mode,
5524 tree exp, tree type, int cleared,
5525 alias_set_type alias_set)
5526 {
5527 if (TREE_CODE (exp) == CONSTRUCTOR
5528 /* We can only call store_constructor recursively if the size and
5529 bit position are on a byte boundary. */
5530 && bitpos % BITS_PER_UNIT == 0
5531 && (bitsize > 0 && bitsize % BITS_PER_UNIT == 0)
5532 /* If we have a nonzero bitpos for a register target, then we just
5533 let store_field do the bitfield handling. This is unlikely to
5534 generate unnecessary clear instructions anyways. */
5535 && (bitpos == 0 || MEM_P (target)))
5536 {
5537 if (MEM_P (target))
5538 target
5539 = adjust_address (target,
5540 GET_MODE (target) == BLKmode
5541 || 0 != (bitpos
5542 % GET_MODE_ALIGNMENT (GET_MODE (target)))
5543 ? BLKmode : VOIDmode, bitpos / BITS_PER_UNIT);
5544
5545
5546 /* Update the alias set, if required. */
5547 if (MEM_P (target) && ! MEM_KEEP_ALIAS_SET_P (target)
5548 && MEM_ALIAS_SET (target) != 0)
5549 {
5550 target = copy_rtx (target);
5551 set_mem_alias_set (target, alias_set);
5552 }
5553
5554 store_constructor (exp, target, cleared, bitsize / BITS_PER_UNIT);
5555 }
5556 else
5557 store_field (target, bitsize, bitpos, 0, 0, mode, exp, type, alias_set,
5558 false);
5559 }
5560
5561 /* Store the value of constructor EXP into the rtx TARGET.
5562 TARGET is either a REG or a MEM; we know it cannot conflict, since
5563 safe_from_p has been called.
5564 CLEARED is true if TARGET is known to have been zero'd.
5565 SIZE is the number of bytes of TARGET we are allowed to modify: this
5566 may not be the same as the size of EXP if we are assigning to a field
5567 which has been packed to exclude padding bits. */
5568
5569 static void
5570 store_constructor (tree exp, rtx target, int cleared, HOST_WIDE_INT size)
5571 {
5572 tree type = TREE_TYPE (exp);
5573 #ifdef WORD_REGISTER_OPERATIONS
5574 HOST_WIDE_INT exp_size = int_size_in_bytes (type);
5575 #endif
5576
5577 switch (TREE_CODE (type))
5578 {
5579 case RECORD_TYPE:
5580 case UNION_TYPE:
5581 case QUAL_UNION_TYPE:
5582 {
5583 unsigned HOST_WIDE_INT idx;
5584 tree field, value;
5585
5586 /* If size is zero or the target is already cleared, do nothing. */
5587 if (size == 0 || cleared)
5588 cleared = 1;
5589 /* We either clear the aggregate or indicate the value is dead. */
5590 else if ((TREE_CODE (type) == UNION_TYPE
5591 || TREE_CODE (type) == QUAL_UNION_TYPE)
5592 && ! CONSTRUCTOR_ELTS (exp))
5593 /* If the constructor is empty, clear the union. */
5594 {
5595 clear_storage (target, expr_size (exp), BLOCK_OP_NORMAL);
5596 cleared = 1;
5597 }
5598
5599 /* If we are building a static constructor into a register,
5600 set the initial value as zero so we can fold the value into
5601 a constant. But if more than one register is involved,
5602 this probably loses. */
5603 else if (REG_P (target) && TREE_STATIC (exp)
5604 && GET_MODE_SIZE (GET_MODE (target)) <= UNITS_PER_WORD)
5605 {
5606 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
5607 cleared = 1;
5608 }
5609
5610 /* If the constructor has fewer fields than the structure or
5611 if we are initializing the structure to mostly zeros, clear
5612 the whole structure first. Don't do this if TARGET is a
5613 register whose mode size isn't equal to SIZE since
5614 clear_storage can't handle this case. */
5615 else if (size > 0
5616 && (((int)VEC_length (constructor_elt, CONSTRUCTOR_ELTS (exp))
5617 != fields_length (type))
5618 || mostly_zeros_p (exp))
5619 && (!REG_P (target)
5620 || ((HOST_WIDE_INT) GET_MODE_SIZE (GET_MODE (target))
5621 == size)))
5622 {
5623 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
5624 cleared = 1;
5625 }
5626
5627 if (REG_P (target) && !cleared)
5628 emit_clobber (target);
5629
5630 /* Store each element of the constructor into the
5631 corresponding field of TARGET. */
5632 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), idx, field, value)
5633 {
5634 enum machine_mode mode;
5635 HOST_WIDE_INT bitsize;
5636 HOST_WIDE_INT bitpos = 0;
5637 tree offset;
5638 rtx to_rtx = target;
5639
5640 /* Just ignore missing fields. We cleared the whole
5641 structure, above, if any fields are missing. */
5642 if (field == 0)
5643 continue;
5644
5645 if (cleared && initializer_zerop (value))
5646 continue;
5647
5648 if (host_integerp (DECL_SIZE (field), 1))
5649 bitsize = tree_low_cst (DECL_SIZE (field), 1);
5650 else
5651 bitsize = -1;
5652
5653 mode = DECL_MODE (field);
5654 if (DECL_BIT_FIELD (field))
5655 mode = VOIDmode;
5656
5657 offset = DECL_FIELD_OFFSET (field);
5658 if (host_integerp (offset, 0)
5659 && host_integerp (bit_position (field), 0))
5660 {
5661 bitpos = int_bit_position (field);
5662 offset = 0;
5663 }
5664 else
5665 bitpos = tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 0);
5666
5667 if (offset)
5668 {
5669 enum machine_mode address_mode;
5670 rtx offset_rtx;
5671
5672 offset
5673 = SUBSTITUTE_PLACEHOLDER_IN_EXPR (offset,
5674 make_tree (TREE_TYPE (exp),
5675 target));
5676
5677 offset_rtx = expand_normal (offset);
5678 gcc_assert (MEM_P (to_rtx));
5679
5680 address_mode
5681 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (to_rtx));
5682 if (GET_MODE (offset_rtx) != address_mode)
5683 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
5684
5685 to_rtx = offset_address (to_rtx, offset_rtx,
5686 highest_pow2_factor (offset));
5687 }
5688
5689 #ifdef WORD_REGISTER_OPERATIONS
5690 /* If this initializes a field that is smaller than a
5691 word, at the start of a word, try to widen it to a full
5692 word. This special case allows us to output C++ member
5693 function initializations in a form that the optimizers
5694 can understand. */
5695 if (REG_P (target)
5696 && bitsize < BITS_PER_WORD
5697 && bitpos % BITS_PER_WORD == 0
5698 && GET_MODE_CLASS (mode) == MODE_INT
5699 && TREE_CODE (value) == INTEGER_CST
5700 && exp_size >= 0
5701 && bitpos + BITS_PER_WORD <= exp_size * BITS_PER_UNIT)
5702 {
5703 tree type = TREE_TYPE (value);
5704
5705 if (TYPE_PRECISION (type) < BITS_PER_WORD)
5706 {
5707 type = lang_hooks.types.type_for_size
5708 (BITS_PER_WORD, TYPE_UNSIGNED (type));
5709 value = fold_convert (type, value);
5710 }
5711
5712 if (BYTES_BIG_ENDIAN)
5713 value
5714 = fold_build2 (LSHIFT_EXPR, type, value,
5715 build_int_cst (type,
5716 BITS_PER_WORD - bitsize));
5717 bitsize = BITS_PER_WORD;
5718 mode = word_mode;
5719 }
5720 #endif
5721
5722 if (MEM_P (to_rtx) && !MEM_KEEP_ALIAS_SET_P (to_rtx)
5723 && DECL_NONADDRESSABLE_P (field))
5724 {
5725 to_rtx = copy_rtx (to_rtx);
5726 MEM_KEEP_ALIAS_SET_P (to_rtx) = 1;
5727 }
5728
5729 store_constructor_field (to_rtx, bitsize, bitpos, mode,
5730 value, type, cleared,
5731 get_alias_set (TREE_TYPE (field)));
5732 }
5733 break;
5734 }
5735 case ARRAY_TYPE:
5736 {
5737 tree value, index;
5738 unsigned HOST_WIDE_INT i;
5739 int need_to_clear;
5740 tree domain;
5741 tree elttype = TREE_TYPE (type);
5742 int const_bounds_p;
5743 HOST_WIDE_INT minelt = 0;
5744 HOST_WIDE_INT maxelt = 0;
5745
5746 domain = TYPE_DOMAIN (type);
5747 const_bounds_p = (TYPE_MIN_VALUE (domain)
5748 && TYPE_MAX_VALUE (domain)
5749 && host_integerp (TYPE_MIN_VALUE (domain), 0)
5750 && host_integerp (TYPE_MAX_VALUE (domain), 0));
5751
5752 /* If we have constant bounds for the range of the type, get them. */
5753 if (const_bounds_p)
5754 {
5755 minelt = tree_low_cst (TYPE_MIN_VALUE (domain), 0);
5756 maxelt = tree_low_cst (TYPE_MAX_VALUE (domain), 0);
5757 }
5758
5759 /* If the constructor has fewer elements than the array, clear
5760 the whole array first. Similarly if this is static
5761 constructor of a non-BLKmode object. */
5762 if (cleared)
5763 need_to_clear = 0;
5764 else if (REG_P (target) && TREE_STATIC (exp))
5765 need_to_clear = 1;
5766 else
5767 {
5768 unsigned HOST_WIDE_INT idx;
5769 tree index, value;
5770 HOST_WIDE_INT count = 0, zero_count = 0;
5771 need_to_clear = ! const_bounds_p;
5772
5773 /* This loop is a more accurate version of the loop in
5774 mostly_zeros_p (it handles RANGE_EXPR in an index). It
5775 is also needed to check for missing elements. */
5776 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), idx, index, value)
5777 {
5778 HOST_WIDE_INT this_node_count;
5779
5780 if (need_to_clear)
5781 break;
5782
5783 if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR)
5784 {
5785 tree lo_index = TREE_OPERAND (index, 0);
5786 tree hi_index = TREE_OPERAND (index, 1);
5787
5788 if (! host_integerp (lo_index, 1)
5789 || ! host_integerp (hi_index, 1))
5790 {
5791 need_to_clear = 1;
5792 break;
5793 }
5794
5795 this_node_count = (tree_low_cst (hi_index, 1)
5796 - tree_low_cst (lo_index, 1) + 1);
5797 }
5798 else
5799 this_node_count = 1;
5800
5801 count += this_node_count;
5802 if (mostly_zeros_p (value))
5803 zero_count += this_node_count;
5804 }
5805
5806 /* Clear the entire array first if there are any missing
5807 elements, or if the incidence of zero elements is >=
5808 75%. */
5809 if (! need_to_clear
5810 && (count < maxelt - minelt + 1
5811 || 4 * zero_count >= 3 * count))
5812 need_to_clear = 1;
5813 }
5814
5815 if (need_to_clear && size > 0)
5816 {
5817 if (REG_P (target))
5818 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
5819 else
5820 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
5821 cleared = 1;
5822 }
5823
5824 if (!cleared && REG_P (target))
5825 /* Inform later passes that the old value is dead. */
5826 emit_clobber (target);
5827
5828 /* Store each element of the constructor into the
5829 corresponding element of TARGET, determined by counting the
5830 elements. */
5831 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), i, index, value)
5832 {
5833 enum machine_mode mode;
5834 HOST_WIDE_INT bitsize;
5835 HOST_WIDE_INT bitpos;
5836 rtx xtarget = target;
5837
5838 if (cleared && initializer_zerop (value))
5839 continue;
5840
5841 mode = TYPE_MODE (elttype);
5842 if (mode == BLKmode)
5843 bitsize = (host_integerp (TYPE_SIZE (elttype), 1)
5844 ? tree_low_cst (TYPE_SIZE (elttype), 1)
5845 : -1);
5846 else
5847 bitsize = GET_MODE_BITSIZE (mode);
5848
5849 if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR)
5850 {
5851 tree lo_index = TREE_OPERAND (index, 0);
5852 tree hi_index = TREE_OPERAND (index, 1);
5853 rtx index_r, pos_rtx;
5854 HOST_WIDE_INT lo, hi, count;
5855 tree position;
5856
5857 /* If the range is constant and "small", unroll the loop. */
5858 if (const_bounds_p
5859 && host_integerp (lo_index, 0)
5860 && host_integerp (hi_index, 0)
5861 && (lo = tree_low_cst (lo_index, 0),
5862 hi = tree_low_cst (hi_index, 0),
5863 count = hi - lo + 1,
5864 (!MEM_P (target)
5865 || count <= 2
5866 || (host_integerp (TYPE_SIZE (elttype), 1)
5867 && (tree_low_cst (TYPE_SIZE (elttype), 1) * count
5868 <= 40 * 8)))))
5869 {
5870 lo -= minelt; hi -= minelt;
5871 for (; lo <= hi; lo++)
5872 {
5873 bitpos = lo * tree_low_cst (TYPE_SIZE (elttype), 0);
5874
5875 if (MEM_P (target)
5876 && !MEM_KEEP_ALIAS_SET_P (target)
5877 && TREE_CODE (type) == ARRAY_TYPE
5878 && TYPE_NONALIASED_COMPONENT (type))
5879 {
5880 target = copy_rtx (target);
5881 MEM_KEEP_ALIAS_SET_P (target) = 1;
5882 }
5883
5884 store_constructor_field
5885 (target, bitsize, bitpos, mode, value, type, cleared,
5886 get_alias_set (elttype));
5887 }
5888 }
5889 else
5890 {
5891 rtx loop_start = gen_label_rtx ();
5892 rtx loop_end = gen_label_rtx ();
5893 tree exit_cond;
5894
5895 expand_normal (hi_index);
5896
5897 index = build_decl (EXPR_LOCATION (exp),
5898 VAR_DECL, NULL_TREE, domain);
5899 index_r = gen_reg_rtx (promote_decl_mode (index, NULL));
5900 SET_DECL_RTL (index, index_r);
5901 store_expr (lo_index, index_r, 0, false);
5902
5903 /* Build the head of the loop. */
5904 do_pending_stack_adjust ();
5905 emit_label (loop_start);
5906
5907 /* Assign value to element index. */
5908 position =
5909 fold_convert (ssizetype,
5910 fold_build2 (MINUS_EXPR,
5911 TREE_TYPE (index),
5912 index,
5913 TYPE_MIN_VALUE (domain)));
5914
5915 position =
5916 size_binop (MULT_EXPR, position,
5917 fold_convert (ssizetype,
5918 TYPE_SIZE_UNIT (elttype)));
5919
5920 pos_rtx = expand_normal (position);
5921 xtarget = offset_address (target, pos_rtx,
5922 highest_pow2_factor (position));
5923 xtarget = adjust_address (xtarget, mode, 0);
5924 if (TREE_CODE (value) == CONSTRUCTOR)
5925 store_constructor (value, xtarget, cleared,
5926 bitsize / BITS_PER_UNIT);
5927 else
5928 store_expr (value, xtarget, 0, false);
5929
5930 /* Generate a conditional jump to exit the loop. */
5931 exit_cond = build2 (LT_EXPR, integer_type_node,
5932 index, hi_index);
5933 jumpif (exit_cond, loop_end, -1);
5934
5935 /* Update the loop counter, and jump to the head of
5936 the loop. */
5937 expand_assignment (index,
5938 build2 (PLUS_EXPR, TREE_TYPE (index),
5939 index, integer_one_node),
5940 false);
5941
5942 emit_jump (loop_start);
5943
5944 /* Build the end of the loop. */
5945 emit_label (loop_end);
5946 }
5947 }
5948 else if ((index != 0 && ! host_integerp (index, 0))
5949 || ! host_integerp (TYPE_SIZE (elttype), 1))
5950 {
5951 tree position;
5952
5953 if (index == 0)
5954 index = ssize_int (1);
5955
5956 if (minelt)
5957 index = fold_convert (ssizetype,
5958 fold_build2 (MINUS_EXPR,
5959 TREE_TYPE (index),
5960 index,
5961 TYPE_MIN_VALUE (domain)));
5962
5963 position =
5964 size_binop (MULT_EXPR, index,
5965 fold_convert (ssizetype,
5966 TYPE_SIZE_UNIT (elttype)));
5967 xtarget = offset_address (target,
5968 expand_normal (position),
5969 highest_pow2_factor (position));
5970 xtarget = adjust_address (xtarget, mode, 0);
5971 store_expr (value, xtarget, 0, false);
5972 }
5973 else
5974 {
5975 if (index != 0)
5976 bitpos = ((tree_low_cst (index, 0) - minelt)
5977 * tree_low_cst (TYPE_SIZE (elttype), 1));
5978 else
5979 bitpos = (i * tree_low_cst (TYPE_SIZE (elttype), 1));
5980
5981 if (MEM_P (target) && !MEM_KEEP_ALIAS_SET_P (target)
5982 && TREE_CODE (type) == ARRAY_TYPE
5983 && TYPE_NONALIASED_COMPONENT (type))
5984 {
5985 target = copy_rtx (target);
5986 MEM_KEEP_ALIAS_SET_P (target) = 1;
5987 }
5988 store_constructor_field (target, bitsize, bitpos, mode, value,
5989 type, cleared, get_alias_set (elttype));
5990 }
5991 }
5992 break;
5993 }
5994
5995 case VECTOR_TYPE:
5996 {
5997 unsigned HOST_WIDE_INT idx;
5998 constructor_elt *ce;
5999 int i;
6000 int need_to_clear;
6001 int icode = 0;
6002 tree elttype = TREE_TYPE (type);
6003 int elt_size = tree_low_cst (TYPE_SIZE (elttype), 1);
6004 enum machine_mode eltmode = TYPE_MODE (elttype);
6005 HOST_WIDE_INT bitsize;
6006 HOST_WIDE_INT bitpos;
6007 rtvec vector = NULL;
6008 unsigned n_elts;
6009 alias_set_type alias;
6010
6011 gcc_assert (eltmode != BLKmode);
6012
6013 n_elts = TYPE_VECTOR_SUBPARTS (type);
6014 if (REG_P (target) && VECTOR_MODE_P (GET_MODE (target)))
6015 {
6016 enum machine_mode mode = GET_MODE (target);
6017
6018 icode = (int) optab_handler (vec_init_optab, mode);
6019 if (icode != CODE_FOR_nothing)
6020 {
6021 unsigned int i;
6022
6023 vector = rtvec_alloc (n_elts);
6024 for (i = 0; i < n_elts; i++)
6025 RTVEC_ELT (vector, i) = CONST0_RTX (GET_MODE_INNER (mode));
6026 }
6027 }
6028
6029 /* If the constructor has fewer elements than the vector,
6030 clear the whole array first. Similarly if this is static
6031 constructor of a non-BLKmode object. */
6032 if (cleared)
6033 need_to_clear = 0;
6034 else if (REG_P (target) && TREE_STATIC (exp))
6035 need_to_clear = 1;
6036 else
6037 {
6038 unsigned HOST_WIDE_INT count = 0, zero_count = 0;
6039 tree value;
6040
6041 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value)
6042 {
6043 int n_elts_here = tree_low_cst
6044 (int_const_binop (TRUNC_DIV_EXPR,
6045 TYPE_SIZE (TREE_TYPE (value)),
6046 TYPE_SIZE (elttype)), 1);
6047
6048 count += n_elts_here;
6049 if (mostly_zeros_p (value))
6050 zero_count += n_elts_here;
6051 }
6052
6053 /* Clear the entire vector first if there are any missing elements,
6054 or if the incidence of zero elements is >= 75%. */
6055 need_to_clear = (count < n_elts || 4 * zero_count >= 3 * count);
6056 }
6057
6058 if (need_to_clear && size > 0 && !vector)
6059 {
6060 if (REG_P (target))
6061 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
6062 else
6063 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
6064 cleared = 1;
6065 }
6066
6067 /* Inform later passes that the old value is dead. */
6068 if (!cleared && !vector && REG_P (target))
6069 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
6070
6071 if (MEM_P (target))
6072 alias = MEM_ALIAS_SET (target);
6073 else
6074 alias = get_alias_set (elttype);
6075
6076 /* Store each element of the constructor into the corresponding
6077 element of TARGET, determined by counting the elements. */
6078 for (idx = 0, i = 0;
6079 VEC_iterate (constructor_elt, CONSTRUCTOR_ELTS (exp), idx, ce);
6080 idx++, i += bitsize / elt_size)
6081 {
6082 HOST_WIDE_INT eltpos;
6083 tree value = ce->value;
6084
6085 bitsize = tree_low_cst (TYPE_SIZE (TREE_TYPE (value)), 1);
6086 if (cleared && initializer_zerop (value))
6087 continue;
6088
6089 if (ce->index)
6090 eltpos = tree_low_cst (ce->index, 1);
6091 else
6092 eltpos = i;
6093
6094 if (vector)
6095 {
6096 /* Vector CONSTRUCTORs should only be built from smaller
6097 vectors in the case of BLKmode vectors. */
6098 gcc_assert (TREE_CODE (TREE_TYPE (value)) != VECTOR_TYPE);
6099 RTVEC_ELT (vector, eltpos)
6100 = expand_normal (value);
6101 }
6102 else
6103 {
6104 enum machine_mode value_mode =
6105 TREE_CODE (TREE_TYPE (value)) == VECTOR_TYPE
6106 ? TYPE_MODE (TREE_TYPE (value))
6107 : eltmode;
6108 bitpos = eltpos * elt_size;
6109 store_constructor_field (target, bitsize, bitpos,
6110 value_mode, value, type,
6111 cleared, alias);
6112 }
6113 }
6114
6115 if (vector)
6116 emit_insn (GEN_FCN (icode)
6117 (target,
6118 gen_rtx_PARALLEL (GET_MODE (target), vector)));
6119 break;
6120 }
6121
6122 default:
6123 gcc_unreachable ();
6124 }
6125 }
6126
6127 /* Store the value of EXP (an expression tree)
6128 into a subfield of TARGET which has mode MODE and occupies
6129 BITSIZE bits, starting BITPOS bits from the start of TARGET.
6130 If MODE is VOIDmode, it means that we are storing into a bit-field.
6131
6132 BITREGION_START is bitpos of the first bitfield in this region.
6133 BITREGION_END is the bitpos of the ending bitfield in this region.
6134 These two fields are 0, if the C++ memory model does not apply,
6135 or we are not interested in keeping track of bitfield regions.
6136
6137 Always return const0_rtx unless we have something particular to
6138 return.
6139
6140 TYPE is the type of the underlying object,
6141
6142 ALIAS_SET is the alias set for the destination. This value will
6143 (in general) be different from that for TARGET, since TARGET is a
6144 reference to the containing structure.
6145
6146 If NONTEMPORAL is true, try generating a nontemporal store. */
6147
6148 static rtx
6149 store_field (rtx target, HOST_WIDE_INT bitsize, HOST_WIDE_INT bitpos,
6150 unsigned HOST_WIDE_INT bitregion_start,
6151 unsigned HOST_WIDE_INT bitregion_end,
6152 enum machine_mode mode, tree exp, tree type,
6153 alias_set_type alias_set, bool nontemporal)
6154 {
6155 if (TREE_CODE (exp) == ERROR_MARK)
6156 return const0_rtx;
6157
6158 /* If we have nothing to store, do nothing unless the expression has
6159 side-effects. */
6160 if (bitsize == 0)
6161 return expand_expr (exp, const0_rtx, VOIDmode, EXPAND_NORMAL);
6162
6163 /* If we are storing into an unaligned field of an aligned union that is
6164 in a register, we may have the mode of TARGET being an integer mode but
6165 MODE == BLKmode. In that case, get an aligned object whose size and
6166 alignment are the same as TARGET and store TARGET into it (we can avoid
6167 the store if the field being stored is the entire width of TARGET). Then
6168 call ourselves recursively to store the field into a BLKmode version of
6169 that object. Finally, load from the object into TARGET. This is not
6170 very efficient in general, but should only be slightly more expensive
6171 than the otherwise-required unaligned accesses. Perhaps this can be
6172 cleaned up later. It's tempting to make OBJECT readonly, but it's set
6173 twice, once with emit_move_insn and once via store_field. */
6174
6175 if (mode == BLKmode
6176 && (REG_P (target) || GET_CODE (target) == SUBREG))
6177 {
6178 rtx object = assign_temp (type, 0, 1, 1);
6179 rtx blk_object = adjust_address (object, BLKmode, 0);
6180
6181 if (bitsize != (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (target)))
6182 emit_move_insn (object, target);
6183
6184 store_field (blk_object, bitsize, bitpos,
6185 bitregion_start, bitregion_end,
6186 mode, exp, type, alias_set, nontemporal);
6187
6188 emit_move_insn (target, object);
6189
6190 /* We want to return the BLKmode version of the data. */
6191 return blk_object;
6192 }
6193
6194 if (GET_CODE (target) == CONCAT)
6195 {
6196 /* We're storing into a struct containing a single __complex. */
6197
6198 gcc_assert (!bitpos);
6199 return store_expr (exp, target, 0, nontemporal);
6200 }
6201
6202 /* If the structure is in a register or if the component
6203 is a bit field, we cannot use addressing to access it.
6204 Use bit-field techniques or SUBREG to store in it. */
6205
6206 if (mode == VOIDmode
6207 || (mode != BLKmode && ! direct_store[(int) mode]
6208 && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
6209 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT)
6210 || REG_P (target)
6211 || GET_CODE (target) == SUBREG
6212 /* If the field isn't aligned enough to store as an ordinary memref,
6213 store it as a bit field. */
6214 || (mode != BLKmode
6215 && ((((MEM_ALIGN (target) < GET_MODE_ALIGNMENT (mode))
6216 || bitpos % GET_MODE_ALIGNMENT (mode))
6217 && SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (target)))
6218 || (bitpos % BITS_PER_UNIT != 0)))
6219 /* If the RHS and field are a constant size and the size of the
6220 RHS isn't the same size as the bitfield, we must use bitfield
6221 operations. */
6222 || (bitsize >= 0
6223 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
6224 && compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)), bitsize) != 0)
6225 /* If we are expanding a MEM_REF of a non-BLKmode non-addressable
6226 decl we must use bitfield operations. */
6227 || (bitsize >= 0
6228 && TREE_CODE (exp) == MEM_REF
6229 && TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR
6230 && DECL_P (TREE_OPERAND (TREE_OPERAND (exp, 0), 0))
6231 && !TREE_ADDRESSABLE (TREE_OPERAND (TREE_OPERAND (exp, 0),0 ))
6232 && DECL_MODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0)) != BLKmode))
6233 {
6234 rtx temp;
6235 gimple nop_def;
6236
6237 /* If EXP is a NOP_EXPR of precision less than its mode, then that
6238 implies a mask operation. If the precision is the same size as
6239 the field we're storing into, that mask is redundant. This is
6240 particularly common with bit field assignments generated by the
6241 C front end. */
6242 nop_def = get_def_for_expr (exp, NOP_EXPR);
6243 if (nop_def)
6244 {
6245 tree type = TREE_TYPE (exp);
6246 if (INTEGRAL_TYPE_P (type)
6247 && TYPE_PRECISION (type) < GET_MODE_BITSIZE (TYPE_MODE (type))
6248 && bitsize == TYPE_PRECISION (type))
6249 {
6250 tree op = gimple_assign_rhs1 (nop_def);
6251 type = TREE_TYPE (op);
6252 if (INTEGRAL_TYPE_P (type) && TYPE_PRECISION (type) >= bitsize)
6253 exp = op;
6254 }
6255 }
6256
6257 temp = expand_normal (exp);
6258
6259 /* If BITSIZE is narrower than the size of the type of EXP
6260 we will be narrowing TEMP. Normally, what's wanted are the
6261 low-order bits. However, if EXP's type is a record and this is
6262 big-endian machine, we want the upper BITSIZE bits. */
6263 if (BYTES_BIG_ENDIAN && GET_MODE_CLASS (GET_MODE (temp)) == MODE_INT
6264 && bitsize < (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (temp))
6265 && TREE_CODE (TREE_TYPE (exp)) == RECORD_TYPE)
6266 temp = expand_shift (RSHIFT_EXPR, GET_MODE (temp), temp,
6267 GET_MODE_BITSIZE (GET_MODE (temp)) - bitsize,
6268 NULL_RTX, 1);
6269
6270 /* Unless MODE is VOIDmode or BLKmode, convert TEMP to
6271 MODE. */
6272 if (mode != VOIDmode && mode != BLKmode
6273 && mode != TYPE_MODE (TREE_TYPE (exp)))
6274 temp = convert_modes (mode, TYPE_MODE (TREE_TYPE (exp)), temp, 1);
6275
6276 /* If the modes of TEMP and TARGET are both BLKmode, both
6277 must be in memory and BITPOS must be aligned on a byte
6278 boundary. If so, we simply do a block copy. Likewise
6279 for a BLKmode-like TARGET. */
6280 if (GET_MODE (temp) == BLKmode
6281 && (GET_MODE (target) == BLKmode
6282 || (MEM_P (target)
6283 && GET_MODE_CLASS (GET_MODE (target)) == MODE_INT
6284 && (bitpos % BITS_PER_UNIT) == 0
6285 && (bitsize % BITS_PER_UNIT) == 0)))
6286 {
6287 gcc_assert (MEM_P (target) && MEM_P (temp)
6288 && (bitpos % BITS_PER_UNIT) == 0);
6289
6290 target = adjust_address (target, VOIDmode, bitpos / BITS_PER_UNIT);
6291 emit_block_move (target, temp,
6292 GEN_INT ((bitsize + BITS_PER_UNIT - 1)
6293 / BITS_PER_UNIT),
6294 BLOCK_OP_NORMAL);
6295
6296 return const0_rtx;
6297 }
6298
6299 /* Store the value in the bitfield. */
6300 store_bit_field (target, bitsize, bitpos,
6301 bitregion_start, bitregion_end,
6302 mode, temp);
6303
6304 return const0_rtx;
6305 }
6306 else
6307 {
6308 /* Now build a reference to just the desired component. */
6309 rtx to_rtx = adjust_address (target, mode, bitpos / BITS_PER_UNIT);
6310
6311 if (to_rtx == target)
6312 to_rtx = copy_rtx (to_rtx);
6313
6314 if (!MEM_SCALAR_P (to_rtx))
6315 MEM_IN_STRUCT_P (to_rtx) = 1;
6316 if (!MEM_KEEP_ALIAS_SET_P (to_rtx) && MEM_ALIAS_SET (to_rtx) != 0)
6317 set_mem_alias_set (to_rtx, alias_set);
6318
6319 return store_expr (exp, to_rtx, 0, nontemporal);
6320 }
6321 }
6322 \f
6323 /* Given an expression EXP that may be a COMPONENT_REF, a BIT_FIELD_REF,
6324 an ARRAY_REF, or an ARRAY_RANGE_REF, look for nested operations of these
6325 codes and find the ultimate containing object, which we return.
6326
6327 We set *PBITSIZE to the size in bits that we want, *PBITPOS to the
6328 bit position, and *PUNSIGNEDP to the signedness of the field.
6329 If the position of the field is variable, we store a tree
6330 giving the variable offset (in units) in *POFFSET.
6331 This offset is in addition to the bit position.
6332 If the position is not variable, we store 0 in *POFFSET.
6333
6334 If any of the extraction expressions is volatile,
6335 we store 1 in *PVOLATILEP. Otherwise we don't change that.
6336
6337 If the field is a non-BLKmode bit-field, *PMODE is set to VOIDmode.
6338 Otherwise, it is a mode that can be used to access the field.
6339
6340 If the field describes a variable-sized object, *PMODE is set to
6341 BLKmode and *PBITSIZE is set to -1. An access cannot be made in
6342 this case, but the address of the object can be found.
6343
6344 If KEEP_ALIGNING is true and the target is STRICT_ALIGNMENT, we don't
6345 look through nodes that serve as markers of a greater alignment than
6346 the one that can be deduced from the expression. These nodes make it
6347 possible for front-ends to prevent temporaries from being created by
6348 the middle-end on alignment considerations. For that purpose, the
6349 normal operating mode at high-level is to always pass FALSE so that
6350 the ultimate containing object is really returned; moreover, the
6351 associated predicate handled_component_p will always return TRUE
6352 on these nodes, thus indicating that they are essentially handled
6353 by get_inner_reference. TRUE should only be passed when the caller
6354 is scanning the expression in order to build another representation
6355 and specifically knows how to handle these nodes; as such, this is
6356 the normal operating mode in the RTL expanders. */
6357
6358 tree
6359 get_inner_reference (tree exp, HOST_WIDE_INT *pbitsize,
6360 HOST_WIDE_INT *pbitpos, tree *poffset,
6361 enum machine_mode *pmode, int *punsignedp,
6362 int *pvolatilep, bool keep_aligning)
6363 {
6364 tree size_tree = 0;
6365 enum machine_mode mode = VOIDmode;
6366 bool blkmode_bitfield = false;
6367 tree offset = size_zero_node;
6368 double_int bit_offset = double_int_zero;
6369
6370 /* First get the mode, signedness, and size. We do this from just the
6371 outermost expression. */
6372 *pbitsize = -1;
6373 if (TREE_CODE (exp) == COMPONENT_REF)
6374 {
6375 tree field = TREE_OPERAND (exp, 1);
6376 size_tree = DECL_SIZE (field);
6377 if (!DECL_BIT_FIELD (field))
6378 mode = DECL_MODE (field);
6379 else if (DECL_MODE (field) == BLKmode)
6380 blkmode_bitfield = true;
6381 else if (TREE_THIS_VOLATILE (exp)
6382 && flag_strict_volatile_bitfields > 0)
6383 /* Volatile bitfields should be accessed in the mode of the
6384 field's type, not the mode computed based on the bit
6385 size. */
6386 mode = TYPE_MODE (DECL_BIT_FIELD_TYPE (field));
6387
6388 *punsignedp = DECL_UNSIGNED (field);
6389 }
6390 else if (TREE_CODE (exp) == BIT_FIELD_REF)
6391 {
6392 size_tree = TREE_OPERAND (exp, 1);
6393 *punsignedp = (! INTEGRAL_TYPE_P (TREE_TYPE (exp))
6394 || TYPE_UNSIGNED (TREE_TYPE (exp)));
6395
6396 /* For vector types, with the correct size of access, use the mode of
6397 inner type. */
6398 if (TREE_CODE (TREE_TYPE (TREE_OPERAND (exp, 0))) == VECTOR_TYPE
6399 && TREE_TYPE (exp) == TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0)))
6400 && tree_int_cst_equal (size_tree, TYPE_SIZE (TREE_TYPE (exp))))
6401 mode = TYPE_MODE (TREE_TYPE (exp));
6402 }
6403 else
6404 {
6405 mode = TYPE_MODE (TREE_TYPE (exp));
6406 *punsignedp = TYPE_UNSIGNED (TREE_TYPE (exp));
6407
6408 if (mode == BLKmode)
6409 size_tree = TYPE_SIZE (TREE_TYPE (exp));
6410 else
6411 *pbitsize = GET_MODE_BITSIZE (mode);
6412 }
6413
6414 if (size_tree != 0)
6415 {
6416 if (! host_integerp (size_tree, 1))
6417 mode = BLKmode, *pbitsize = -1;
6418 else
6419 *pbitsize = tree_low_cst (size_tree, 1);
6420 }
6421
6422 /* Compute cumulative bit-offset for nested component-refs and array-refs,
6423 and find the ultimate containing object. */
6424 while (1)
6425 {
6426 switch (TREE_CODE (exp))
6427 {
6428 case BIT_FIELD_REF:
6429 bit_offset
6430 = double_int_add (bit_offset,
6431 tree_to_double_int (TREE_OPERAND (exp, 2)));
6432 break;
6433
6434 case COMPONENT_REF:
6435 {
6436 tree field = TREE_OPERAND (exp, 1);
6437 tree this_offset = component_ref_field_offset (exp);
6438
6439 /* If this field hasn't been filled in yet, don't go past it.
6440 This should only happen when folding expressions made during
6441 type construction. */
6442 if (this_offset == 0)
6443 break;
6444
6445 offset = size_binop (PLUS_EXPR, offset, this_offset);
6446 bit_offset = double_int_add (bit_offset,
6447 tree_to_double_int
6448 (DECL_FIELD_BIT_OFFSET (field)));
6449
6450 /* ??? Right now we don't do anything with DECL_OFFSET_ALIGN. */
6451 }
6452 break;
6453
6454 case ARRAY_REF:
6455 case ARRAY_RANGE_REF:
6456 {
6457 tree index = TREE_OPERAND (exp, 1);
6458 tree low_bound = array_ref_low_bound (exp);
6459 tree unit_size = array_ref_element_size (exp);
6460
6461 /* We assume all arrays have sizes that are a multiple of a byte.
6462 First subtract the lower bound, if any, in the type of the
6463 index, then convert to sizetype and multiply by the size of
6464 the array element. */
6465 if (! integer_zerop (low_bound))
6466 index = fold_build2 (MINUS_EXPR, TREE_TYPE (index),
6467 index, low_bound);
6468
6469 offset = size_binop (PLUS_EXPR, offset,
6470 size_binop (MULT_EXPR,
6471 fold_convert (sizetype, index),
6472 unit_size));
6473 }
6474 break;
6475
6476 case REALPART_EXPR:
6477 break;
6478
6479 case IMAGPART_EXPR:
6480 bit_offset = double_int_add (bit_offset,
6481 uhwi_to_double_int (*pbitsize));
6482 break;
6483
6484 case VIEW_CONVERT_EXPR:
6485 if (keep_aligning && STRICT_ALIGNMENT
6486 && (TYPE_ALIGN (TREE_TYPE (exp))
6487 > TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (exp, 0))))
6488 && (TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (exp, 0)))
6489 < BIGGEST_ALIGNMENT)
6490 && (TYPE_ALIGN_OK (TREE_TYPE (exp))
6491 || TYPE_ALIGN_OK (TREE_TYPE (TREE_OPERAND (exp, 0)))))
6492 goto done;
6493 break;
6494
6495 case MEM_REF:
6496 /* Hand back the decl for MEM[&decl, off]. */
6497 if (TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR)
6498 {
6499 tree off = TREE_OPERAND (exp, 1);
6500 if (!integer_zerop (off))
6501 {
6502 double_int boff, coff = mem_ref_offset (exp);
6503 boff = double_int_lshift (coff,
6504 BITS_PER_UNIT == 8
6505 ? 3 : exact_log2 (BITS_PER_UNIT),
6506 HOST_BITS_PER_DOUBLE_INT, true);
6507 bit_offset = double_int_add (bit_offset, boff);
6508 }
6509 exp = TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
6510 }
6511 goto done;
6512
6513 default:
6514 goto done;
6515 }
6516
6517 /* If any reference in the chain is volatile, the effect is volatile. */
6518 if (TREE_THIS_VOLATILE (exp))
6519 *pvolatilep = 1;
6520
6521 exp = TREE_OPERAND (exp, 0);
6522 }
6523 done:
6524
6525 /* If OFFSET is constant, see if we can return the whole thing as a
6526 constant bit position. Make sure to handle overflow during
6527 this conversion. */
6528 if (TREE_CODE (offset) == INTEGER_CST)
6529 {
6530 double_int tem = tree_to_double_int (offset);
6531 tem = double_int_sext (tem, TYPE_PRECISION (sizetype));
6532 tem = double_int_lshift (tem,
6533 BITS_PER_UNIT == 8
6534 ? 3 : exact_log2 (BITS_PER_UNIT),
6535 HOST_BITS_PER_DOUBLE_INT, true);
6536 tem = double_int_add (tem, bit_offset);
6537 if (double_int_fits_in_shwi_p (tem))
6538 {
6539 *pbitpos = double_int_to_shwi (tem);
6540 *poffset = offset = NULL_TREE;
6541 }
6542 }
6543
6544 /* Otherwise, split it up. */
6545 if (offset)
6546 {
6547 *pbitpos = double_int_to_shwi (bit_offset);
6548 *poffset = offset;
6549 }
6550
6551 /* We can use BLKmode for a byte-aligned BLKmode bitfield. */
6552 if (mode == VOIDmode
6553 && blkmode_bitfield
6554 && (*pbitpos % BITS_PER_UNIT) == 0
6555 && (*pbitsize % BITS_PER_UNIT) == 0)
6556 *pmode = BLKmode;
6557 else
6558 *pmode = mode;
6559
6560 return exp;
6561 }
6562
6563 /* Given an expression EXP that may be a COMPONENT_REF, an ARRAY_REF or an
6564 ARRAY_RANGE_REF, look for whether EXP or any nested component-refs within
6565 EXP is marked as PACKED. */
6566
6567 bool
6568 contains_packed_reference (const_tree exp)
6569 {
6570 bool packed_p = false;
6571
6572 while (1)
6573 {
6574 switch (TREE_CODE (exp))
6575 {
6576 case COMPONENT_REF:
6577 {
6578 tree field = TREE_OPERAND (exp, 1);
6579 packed_p = DECL_PACKED (field)
6580 || TYPE_PACKED (TREE_TYPE (field))
6581 || TYPE_PACKED (TREE_TYPE (exp));
6582 if (packed_p)
6583 goto done;
6584 }
6585 break;
6586
6587 case BIT_FIELD_REF:
6588 case ARRAY_REF:
6589 case ARRAY_RANGE_REF:
6590 case REALPART_EXPR:
6591 case IMAGPART_EXPR:
6592 case VIEW_CONVERT_EXPR:
6593 break;
6594
6595 default:
6596 goto done;
6597 }
6598 exp = TREE_OPERAND (exp, 0);
6599 }
6600 done:
6601 return packed_p;
6602 }
6603
6604 /* Return a tree of sizetype representing the size, in bytes, of the element
6605 of EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6606
6607 tree
6608 array_ref_element_size (tree exp)
6609 {
6610 tree aligned_size = TREE_OPERAND (exp, 3);
6611 tree elmt_type = TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0)));
6612 location_t loc = EXPR_LOCATION (exp);
6613
6614 /* If a size was specified in the ARRAY_REF, it's the size measured
6615 in alignment units of the element type. So multiply by that value. */
6616 if (aligned_size)
6617 {
6618 /* ??? tree_ssa_useless_type_conversion will eliminate casts to
6619 sizetype from another type of the same width and signedness. */
6620 if (TREE_TYPE (aligned_size) != sizetype)
6621 aligned_size = fold_convert_loc (loc, sizetype, aligned_size);
6622 return size_binop_loc (loc, MULT_EXPR, aligned_size,
6623 size_int (TYPE_ALIGN_UNIT (elmt_type)));
6624 }
6625
6626 /* Otherwise, take the size from that of the element type. Substitute
6627 any PLACEHOLDER_EXPR that we have. */
6628 else
6629 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_SIZE_UNIT (elmt_type), exp);
6630 }
6631
6632 /* Return a tree representing the lower bound of the array mentioned in
6633 EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6634
6635 tree
6636 array_ref_low_bound (tree exp)
6637 {
6638 tree domain_type = TYPE_DOMAIN (TREE_TYPE (TREE_OPERAND (exp, 0)));
6639
6640 /* If a lower bound is specified in EXP, use it. */
6641 if (TREE_OPERAND (exp, 2))
6642 return TREE_OPERAND (exp, 2);
6643
6644 /* Otherwise, if there is a domain type and it has a lower bound, use it,
6645 substituting for a PLACEHOLDER_EXPR as needed. */
6646 if (domain_type && TYPE_MIN_VALUE (domain_type))
6647 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_MIN_VALUE (domain_type), exp);
6648
6649 /* Otherwise, return a zero of the appropriate type. */
6650 return build_int_cst (TREE_TYPE (TREE_OPERAND (exp, 1)), 0);
6651 }
6652
6653 /* Return a tree representing the upper bound of the array mentioned in
6654 EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6655
6656 tree
6657 array_ref_up_bound (tree exp)
6658 {
6659 tree domain_type = TYPE_DOMAIN (TREE_TYPE (TREE_OPERAND (exp, 0)));
6660
6661 /* If there is a domain type and it has an upper bound, use it, substituting
6662 for a PLACEHOLDER_EXPR as needed. */
6663 if (domain_type && TYPE_MAX_VALUE (domain_type))
6664 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_MAX_VALUE (domain_type), exp);
6665
6666 /* Otherwise fail. */
6667 return NULL_TREE;
6668 }
6669
6670 /* Return a tree representing the offset, in bytes, of the field referenced
6671 by EXP. This does not include any offset in DECL_FIELD_BIT_OFFSET. */
6672
6673 tree
6674 component_ref_field_offset (tree exp)
6675 {
6676 tree aligned_offset = TREE_OPERAND (exp, 2);
6677 tree field = TREE_OPERAND (exp, 1);
6678 location_t loc = EXPR_LOCATION (exp);
6679
6680 /* If an offset was specified in the COMPONENT_REF, it's the offset measured
6681 in units of DECL_OFFSET_ALIGN / BITS_PER_UNIT. So multiply by that
6682 value. */
6683 if (aligned_offset)
6684 {
6685 /* ??? tree_ssa_useless_type_conversion will eliminate casts to
6686 sizetype from another type of the same width and signedness. */
6687 if (TREE_TYPE (aligned_offset) != sizetype)
6688 aligned_offset = fold_convert_loc (loc, sizetype, aligned_offset);
6689 return size_binop_loc (loc, MULT_EXPR, aligned_offset,
6690 size_int (DECL_OFFSET_ALIGN (field)
6691 / BITS_PER_UNIT));
6692 }
6693
6694 /* Otherwise, take the offset from that of the field. Substitute
6695 any PLACEHOLDER_EXPR that we have. */
6696 else
6697 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (DECL_FIELD_OFFSET (field), exp);
6698 }
6699
6700 /* Alignment in bits the TARGET of an assignment may be assumed to have. */
6701
6702 static unsigned HOST_WIDE_INT
6703 target_align (const_tree target)
6704 {
6705 /* We might have a chain of nested references with intermediate misaligning
6706 bitfields components, so need to recurse to find out. */
6707
6708 unsigned HOST_WIDE_INT this_align, outer_align;
6709
6710 switch (TREE_CODE (target))
6711 {
6712 case BIT_FIELD_REF:
6713 return 1;
6714
6715 case COMPONENT_REF:
6716 this_align = DECL_ALIGN (TREE_OPERAND (target, 1));
6717 outer_align = target_align (TREE_OPERAND (target, 0));
6718 return MIN (this_align, outer_align);
6719
6720 case ARRAY_REF:
6721 case ARRAY_RANGE_REF:
6722 this_align = TYPE_ALIGN (TREE_TYPE (target));
6723 outer_align = target_align (TREE_OPERAND (target, 0));
6724 return MIN (this_align, outer_align);
6725
6726 CASE_CONVERT:
6727 case NON_LVALUE_EXPR:
6728 case VIEW_CONVERT_EXPR:
6729 this_align = TYPE_ALIGN (TREE_TYPE (target));
6730 outer_align = target_align (TREE_OPERAND (target, 0));
6731 return MAX (this_align, outer_align);
6732
6733 default:
6734 return TYPE_ALIGN (TREE_TYPE (target));
6735 }
6736 }
6737
6738 \f
6739 /* Given an rtx VALUE that may contain additions and multiplications, return
6740 an equivalent value that just refers to a register, memory, or constant.
6741 This is done by generating instructions to perform the arithmetic and
6742 returning a pseudo-register containing the value.
6743
6744 The returned value may be a REG, SUBREG, MEM or constant. */
6745
6746 rtx
6747 force_operand (rtx value, rtx target)
6748 {
6749 rtx op1, op2;
6750 /* Use subtarget as the target for operand 0 of a binary operation. */
6751 rtx subtarget = get_subtarget (target);
6752 enum rtx_code code = GET_CODE (value);
6753
6754 /* Check for subreg applied to an expression produced by loop optimizer. */
6755 if (code == SUBREG
6756 && !REG_P (SUBREG_REG (value))
6757 && !MEM_P (SUBREG_REG (value)))
6758 {
6759 value
6760 = simplify_gen_subreg (GET_MODE (value),
6761 force_reg (GET_MODE (SUBREG_REG (value)),
6762 force_operand (SUBREG_REG (value),
6763 NULL_RTX)),
6764 GET_MODE (SUBREG_REG (value)),
6765 SUBREG_BYTE (value));
6766 code = GET_CODE (value);
6767 }
6768
6769 /* Check for a PIC address load. */
6770 if ((code == PLUS || code == MINUS)
6771 && XEXP (value, 0) == pic_offset_table_rtx
6772 && (GET_CODE (XEXP (value, 1)) == SYMBOL_REF
6773 || GET_CODE (XEXP (value, 1)) == LABEL_REF
6774 || GET_CODE (XEXP (value, 1)) == CONST))
6775 {
6776 if (!subtarget)
6777 subtarget = gen_reg_rtx (GET_MODE (value));
6778 emit_move_insn (subtarget, value);
6779 return subtarget;
6780 }
6781
6782 if (ARITHMETIC_P (value))
6783 {
6784 op2 = XEXP (value, 1);
6785 if (!CONSTANT_P (op2) && !(REG_P (op2) && op2 != subtarget))
6786 subtarget = 0;
6787 if (code == MINUS && CONST_INT_P (op2))
6788 {
6789 code = PLUS;
6790 op2 = negate_rtx (GET_MODE (value), op2);
6791 }
6792
6793 /* Check for an addition with OP2 a constant integer and our first
6794 operand a PLUS of a virtual register and something else. In that
6795 case, we want to emit the sum of the virtual register and the
6796 constant first and then add the other value. This allows virtual
6797 register instantiation to simply modify the constant rather than
6798 creating another one around this addition. */
6799 if (code == PLUS && CONST_INT_P (op2)
6800 && GET_CODE (XEXP (value, 0)) == PLUS
6801 && REG_P (XEXP (XEXP (value, 0), 0))
6802 && REGNO (XEXP (XEXP (value, 0), 0)) >= FIRST_VIRTUAL_REGISTER
6803 && REGNO (XEXP (XEXP (value, 0), 0)) <= LAST_VIRTUAL_REGISTER)
6804 {
6805 rtx temp = expand_simple_binop (GET_MODE (value), code,
6806 XEXP (XEXP (value, 0), 0), op2,
6807 subtarget, 0, OPTAB_LIB_WIDEN);
6808 return expand_simple_binop (GET_MODE (value), code, temp,
6809 force_operand (XEXP (XEXP (value,
6810 0), 1), 0),
6811 target, 0, OPTAB_LIB_WIDEN);
6812 }
6813
6814 op1 = force_operand (XEXP (value, 0), subtarget);
6815 op2 = force_operand (op2, NULL_RTX);
6816 switch (code)
6817 {
6818 case MULT:
6819 return expand_mult (GET_MODE (value), op1, op2, target, 1);
6820 case DIV:
6821 if (!INTEGRAL_MODE_P (GET_MODE (value)))
6822 return expand_simple_binop (GET_MODE (value), code, op1, op2,
6823 target, 1, OPTAB_LIB_WIDEN);
6824 else
6825 return expand_divmod (0,
6826 FLOAT_MODE_P (GET_MODE (value))
6827 ? RDIV_EXPR : TRUNC_DIV_EXPR,
6828 GET_MODE (value), op1, op2, target, 0);
6829 case MOD:
6830 return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2,
6831 target, 0);
6832 case UDIV:
6833 return expand_divmod (0, TRUNC_DIV_EXPR, GET_MODE (value), op1, op2,
6834 target, 1);
6835 case UMOD:
6836 return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2,
6837 target, 1);
6838 case ASHIFTRT:
6839 return expand_simple_binop (GET_MODE (value), code, op1, op2,
6840 target, 0, OPTAB_LIB_WIDEN);
6841 default:
6842 return expand_simple_binop (GET_MODE (value), code, op1, op2,
6843 target, 1, OPTAB_LIB_WIDEN);
6844 }
6845 }
6846 if (UNARY_P (value))
6847 {
6848 if (!target)
6849 target = gen_reg_rtx (GET_MODE (value));
6850 op1 = force_operand (XEXP (value, 0), NULL_RTX);
6851 switch (code)
6852 {
6853 case ZERO_EXTEND:
6854 case SIGN_EXTEND:
6855 case TRUNCATE:
6856 case FLOAT_EXTEND:
6857 case FLOAT_TRUNCATE:
6858 convert_move (target, op1, code == ZERO_EXTEND);
6859 return target;
6860
6861 case FIX:
6862 case UNSIGNED_FIX:
6863 expand_fix (target, op1, code == UNSIGNED_FIX);
6864 return target;
6865
6866 case FLOAT:
6867 case UNSIGNED_FLOAT:
6868 expand_float (target, op1, code == UNSIGNED_FLOAT);
6869 return target;
6870
6871 default:
6872 return expand_simple_unop (GET_MODE (value), code, op1, target, 0);
6873 }
6874 }
6875
6876 #ifdef INSN_SCHEDULING
6877 /* On machines that have insn scheduling, we want all memory reference to be
6878 explicit, so we need to deal with such paradoxical SUBREGs. */
6879 if (paradoxical_subreg_p (value) && MEM_P (SUBREG_REG (value)))
6880 value
6881 = simplify_gen_subreg (GET_MODE (value),
6882 force_reg (GET_MODE (SUBREG_REG (value)),
6883 force_operand (SUBREG_REG (value),
6884 NULL_RTX)),
6885 GET_MODE (SUBREG_REG (value)),
6886 SUBREG_BYTE (value));
6887 #endif
6888
6889 return value;
6890 }
6891 \f
6892 /* Subroutine of expand_expr: return nonzero iff there is no way that
6893 EXP can reference X, which is being modified. TOP_P is nonzero if this
6894 call is going to be used to determine whether we need a temporary
6895 for EXP, as opposed to a recursive call to this function.
6896
6897 It is always safe for this routine to return zero since it merely
6898 searches for optimization opportunities. */
6899
6900 int
6901 safe_from_p (const_rtx x, tree exp, int top_p)
6902 {
6903 rtx exp_rtl = 0;
6904 int i, nops;
6905
6906 if (x == 0
6907 /* If EXP has varying size, we MUST use a target since we currently
6908 have no way of allocating temporaries of variable size
6909 (except for arrays that have TYPE_ARRAY_MAX_SIZE set).
6910 So we assume here that something at a higher level has prevented a
6911 clash. This is somewhat bogus, but the best we can do. Only
6912 do this when X is BLKmode and when we are at the top level. */
6913 || (top_p && TREE_TYPE (exp) != 0 && COMPLETE_TYPE_P (TREE_TYPE (exp))
6914 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) != INTEGER_CST
6915 && (TREE_CODE (TREE_TYPE (exp)) != ARRAY_TYPE
6916 || TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp)) == NULL_TREE
6917 || TREE_CODE (TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp)))
6918 != INTEGER_CST)
6919 && GET_MODE (x) == BLKmode)
6920 /* If X is in the outgoing argument area, it is always safe. */
6921 || (MEM_P (x)
6922 && (XEXP (x, 0) == virtual_outgoing_args_rtx
6923 || (GET_CODE (XEXP (x, 0)) == PLUS
6924 && XEXP (XEXP (x, 0), 0) == virtual_outgoing_args_rtx))))
6925 return 1;
6926
6927 /* If this is a subreg of a hard register, declare it unsafe, otherwise,
6928 find the underlying pseudo. */
6929 if (GET_CODE (x) == SUBREG)
6930 {
6931 x = SUBREG_REG (x);
6932 if (REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
6933 return 0;
6934 }
6935
6936 /* Now look at our tree code and possibly recurse. */
6937 switch (TREE_CODE_CLASS (TREE_CODE (exp)))
6938 {
6939 case tcc_declaration:
6940 exp_rtl = DECL_RTL_IF_SET (exp);
6941 break;
6942
6943 case tcc_constant:
6944 return 1;
6945
6946 case tcc_exceptional:
6947 if (TREE_CODE (exp) == TREE_LIST)
6948 {
6949 while (1)
6950 {
6951 if (TREE_VALUE (exp) && !safe_from_p (x, TREE_VALUE (exp), 0))
6952 return 0;
6953 exp = TREE_CHAIN (exp);
6954 if (!exp)
6955 return 1;
6956 if (TREE_CODE (exp) != TREE_LIST)
6957 return safe_from_p (x, exp, 0);
6958 }
6959 }
6960 else if (TREE_CODE (exp) == CONSTRUCTOR)
6961 {
6962 constructor_elt *ce;
6963 unsigned HOST_WIDE_INT idx;
6964
6965 FOR_EACH_VEC_ELT (constructor_elt, CONSTRUCTOR_ELTS (exp), idx, ce)
6966 if ((ce->index != NULL_TREE && !safe_from_p (x, ce->index, 0))
6967 || !safe_from_p (x, ce->value, 0))
6968 return 0;
6969 return 1;
6970 }
6971 else if (TREE_CODE (exp) == ERROR_MARK)
6972 return 1; /* An already-visited SAVE_EXPR? */
6973 else
6974 return 0;
6975
6976 case tcc_statement:
6977 /* The only case we look at here is the DECL_INITIAL inside a
6978 DECL_EXPR. */
6979 return (TREE_CODE (exp) != DECL_EXPR
6980 || TREE_CODE (DECL_EXPR_DECL (exp)) != VAR_DECL
6981 || !DECL_INITIAL (DECL_EXPR_DECL (exp))
6982 || safe_from_p (x, DECL_INITIAL (DECL_EXPR_DECL (exp)), 0));
6983
6984 case tcc_binary:
6985 case tcc_comparison:
6986 if (!safe_from_p (x, TREE_OPERAND (exp, 1), 0))
6987 return 0;
6988 /* Fall through. */
6989
6990 case tcc_unary:
6991 return safe_from_p (x, TREE_OPERAND (exp, 0), 0);
6992
6993 case tcc_expression:
6994 case tcc_reference:
6995 case tcc_vl_exp:
6996 /* Now do code-specific tests. EXP_RTL is set to any rtx we find in
6997 the expression. If it is set, we conflict iff we are that rtx or
6998 both are in memory. Otherwise, we check all operands of the
6999 expression recursively. */
7000
7001 switch (TREE_CODE (exp))
7002 {
7003 case ADDR_EXPR:
7004 /* If the operand is static or we are static, we can't conflict.
7005 Likewise if we don't conflict with the operand at all. */
7006 if (staticp (TREE_OPERAND (exp, 0))
7007 || TREE_STATIC (exp)
7008 || safe_from_p (x, TREE_OPERAND (exp, 0), 0))
7009 return 1;
7010
7011 /* Otherwise, the only way this can conflict is if we are taking
7012 the address of a DECL a that address if part of X, which is
7013 very rare. */
7014 exp = TREE_OPERAND (exp, 0);
7015 if (DECL_P (exp))
7016 {
7017 if (!DECL_RTL_SET_P (exp)
7018 || !MEM_P (DECL_RTL (exp)))
7019 return 0;
7020 else
7021 exp_rtl = XEXP (DECL_RTL (exp), 0);
7022 }
7023 break;
7024
7025 case MEM_REF:
7026 if (MEM_P (x)
7027 && alias_sets_conflict_p (MEM_ALIAS_SET (x),
7028 get_alias_set (exp)))
7029 return 0;
7030 break;
7031
7032 case CALL_EXPR:
7033 /* Assume that the call will clobber all hard registers and
7034 all of memory. */
7035 if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
7036 || MEM_P (x))
7037 return 0;
7038 break;
7039
7040 case WITH_CLEANUP_EXPR:
7041 case CLEANUP_POINT_EXPR:
7042 /* Lowered by gimplify.c. */
7043 gcc_unreachable ();
7044
7045 case SAVE_EXPR:
7046 return safe_from_p (x, TREE_OPERAND (exp, 0), 0);
7047
7048 default:
7049 break;
7050 }
7051
7052 /* If we have an rtx, we do not need to scan our operands. */
7053 if (exp_rtl)
7054 break;
7055
7056 nops = TREE_OPERAND_LENGTH (exp);
7057 for (i = 0; i < nops; i++)
7058 if (TREE_OPERAND (exp, i) != 0
7059 && ! safe_from_p (x, TREE_OPERAND (exp, i), 0))
7060 return 0;
7061
7062 break;
7063
7064 case tcc_type:
7065 /* Should never get a type here. */
7066 gcc_unreachable ();
7067 }
7068
7069 /* If we have an rtl, find any enclosed object. Then see if we conflict
7070 with it. */
7071 if (exp_rtl)
7072 {
7073 if (GET_CODE (exp_rtl) == SUBREG)
7074 {
7075 exp_rtl = SUBREG_REG (exp_rtl);
7076 if (REG_P (exp_rtl)
7077 && REGNO (exp_rtl) < FIRST_PSEUDO_REGISTER)
7078 return 0;
7079 }
7080
7081 /* If the rtl is X, then it is not safe. Otherwise, it is unless both
7082 are memory and they conflict. */
7083 return ! (rtx_equal_p (x, exp_rtl)
7084 || (MEM_P (x) && MEM_P (exp_rtl)
7085 && true_dependence (exp_rtl, VOIDmode, x,
7086 rtx_addr_varies_p)));
7087 }
7088
7089 /* If we reach here, it is safe. */
7090 return 1;
7091 }
7092
7093 \f
7094 /* Return the highest power of two that EXP is known to be a multiple of.
7095 This is used in updating alignment of MEMs in array references. */
7096
7097 unsigned HOST_WIDE_INT
7098 highest_pow2_factor (const_tree exp)
7099 {
7100 unsigned HOST_WIDE_INT c0, c1;
7101
7102 switch (TREE_CODE (exp))
7103 {
7104 case INTEGER_CST:
7105 /* We can find the lowest bit that's a one. If the low
7106 HOST_BITS_PER_WIDE_INT bits are zero, return BIGGEST_ALIGNMENT.
7107 We need to handle this case since we can find it in a COND_EXPR,
7108 a MIN_EXPR, or a MAX_EXPR. If the constant overflows, we have an
7109 erroneous program, so return BIGGEST_ALIGNMENT to avoid any
7110 later ICE. */
7111 if (TREE_OVERFLOW (exp))
7112 return BIGGEST_ALIGNMENT;
7113 else
7114 {
7115 /* Note: tree_low_cst is intentionally not used here,
7116 we don't care about the upper bits. */
7117 c0 = TREE_INT_CST_LOW (exp);
7118 c0 &= -c0;
7119 return c0 ? c0 : BIGGEST_ALIGNMENT;
7120 }
7121 break;
7122
7123 case PLUS_EXPR: case MINUS_EXPR: case MIN_EXPR: case MAX_EXPR:
7124 c0 = highest_pow2_factor (TREE_OPERAND (exp, 0));
7125 c1 = highest_pow2_factor (TREE_OPERAND (exp, 1));
7126 return MIN (c0, c1);
7127
7128 case MULT_EXPR:
7129 c0 = highest_pow2_factor (TREE_OPERAND (exp, 0));
7130 c1 = highest_pow2_factor (TREE_OPERAND (exp, 1));
7131 return c0 * c1;
7132
7133 case ROUND_DIV_EXPR: case TRUNC_DIV_EXPR: case FLOOR_DIV_EXPR:
7134 case CEIL_DIV_EXPR:
7135 if (integer_pow2p (TREE_OPERAND (exp, 1))
7136 && host_integerp (TREE_OPERAND (exp, 1), 1))
7137 {
7138 c0 = highest_pow2_factor (TREE_OPERAND (exp, 0));
7139 c1 = tree_low_cst (TREE_OPERAND (exp, 1), 1);
7140 return MAX (1, c0 / c1);
7141 }
7142 break;
7143
7144 case BIT_AND_EXPR:
7145 /* The highest power of two of a bit-and expression is the maximum of
7146 that of its operands. We typically get here for a complex LHS and
7147 a constant negative power of two on the RHS to force an explicit
7148 alignment, so don't bother looking at the LHS. */
7149 return highest_pow2_factor (TREE_OPERAND (exp, 1));
7150
7151 CASE_CONVERT:
7152 case SAVE_EXPR:
7153 return highest_pow2_factor (TREE_OPERAND (exp, 0));
7154
7155 case COMPOUND_EXPR:
7156 return highest_pow2_factor (TREE_OPERAND (exp, 1));
7157
7158 case COND_EXPR:
7159 c0 = highest_pow2_factor (TREE_OPERAND (exp, 1));
7160 c1 = highest_pow2_factor (TREE_OPERAND (exp, 2));
7161 return MIN (c0, c1);
7162
7163 default:
7164 break;
7165 }
7166
7167 return 1;
7168 }
7169
7170 /* Similar, except that the alignment requirements of TARGET are
7171 taken into account. Assume it is at least as aligned as its
7172 type, unless it is a COMPONENT_REF in which case the layout of
7173 the structure gives the alignment. */
7174
7175 static unsigned HOST_WIDE_INT
7176 highest_pow2_factor_for_target (const_tree target, const_tree exp)
7177 {
7178 unsigned HOST_WIDE_INT talign = target_align (target) / BITS_PER_UNIT;
7179 unsigned HOST_WIDE_INT factor = highest_pow2_factor (exp);
7180
7181 return MAX (factor, talign);
7182 }
7183 \f
7184 /* Subroutine of expand_expr. Expand the two operands of a binary
7185 expression EXP0 and EXP1 placing the results in OP0 and OP1.
7186 The value may be stored in TARGET if TARGET is nonzero. The
7187 MODIFIER argument is as documented by expand_expr. */
7188
7189 static void
7190 expand_operands (tree exp0, tree exp1, rtx target, rtx *op0, rtx *op1,
7191 enum expand_modifier modifier)
7192 {
7193 if (! safe_from_p (target, exp1, 1))
7194 target = 0;
7195 if (operand_equal_p (exp0, exp1, 0))
7196 {
7197 *op0 = expand_expr (exp0, target, VOIDmode, modifier);
7198 *op1 = copy_rtx (*op0);
7199 }
7200 else
7201 {
7202 /* If we need to preserve evaluation order, copy exp0 into its own
7203 temporary variable so that it can't be clobbered by exp1. */
7204 if (flag_evaluation_order && TREE_SIDE_EFFECTS (exp1))
7205 exp0 = save_expr (exp0);
7206 *op0 = expand_expr (exp0, target, VOIDmode, modifier);
7207 *op1 = expand_expr (exp1, NULL_RTX, VOIDmode, modifier);
7208 }
7209 }
7210
7211 \f
7212 /* Return a MEM that contains constant EXP. DEFER is as for
7213 output_constant_def and MODIFIER is as for expand_expr. */
7214
7215 static rtx
7216 expand_expr_constant (tree exp, int defer, enum expand_modifier modifier)
7217 {
7218 rtx mem;
7219
7220 mem = output_constant_def (exp, defer);
7221 if (modifier != EXPAND_INITIALIZER)
7222 mem = use_anchored_address (mem);
7223 return mem;
7224 }
7225
7226 /* A subroutine of expand_expr_addr_expr. Evaluate the address of EXP.
7227 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
7228
7229 static rtx
7230 expand_expr_addr_expr_1 (tree exp, rtx target, enum machine_mode tmode,
7231 enum expand_modifier modifier, addr_space_t as)
7232 {
7233 rtx result, subtarget;
7234 tree inner, offset;
7235 HOST_WIDE_INT bitsize, bitpos;
7236 int volatilep, unsignedp;
7237 enum machine_mode mode1;
7238
7239 /* If we are taking the address of a constant and are at the top level,
7240 we have to use output_constant_def since we can't call force_const_mem
7241 at top level. */
7242 /* ??? This should be considered a front-end bug. We should not be
7243 generating ADDR_EXPR of something that isn't an LVALUE. The only
7244 exception here is STRING_CST. */
7245 if (CONSTANT_CLASS_P (exp))
7246 return XEXP (expand_expr_constant (exp, 0, modifier), 0);
7247
7248 /* Everything must be something allowed by is_gimple_addressable. */
7249 switch (TREE_CODE (exp))
7250 {
7251 case INDIRECT_REF:
7252 /* This case will happen via recursion for &a->b. */
7253 return expand_expr (TREE_OPERAND (exp, 0), target, tmode, modifier);
7254
7255 case MEM_REF:
7256 {
7257 tree tem = TREE_OPERAND (exp, 0);
7258 if (!integer_zerop (TREE_OPERAND (exp, 1)))
7259 tem = fold_build_pointer_plus (tem, TREE_OPERAND (exp, 1));
7260 return expand_expr (tem, target, tmode, modifier);
7261 }
7262
7263 case CONST_DECL:
7264 /* Expand the initializer like constants above. */
7265 return XEXP (expand_expr_constant (DECL_INITIAL (exp), 0, modifier), 0);
7266
7267 case REALPART_EXPR:
7268 /* The real part of the complex number is always first, therefore
7269 the address is the same as the address of the parent object. */
7270 offset = 0;
7271 bitpos = 0;
7272 inner = TREE_OPERAND (exp, 0);
7273 break;
7274
7275 case IMAGPART_EXPR:
7276 /* The imaginary part of the complex number is always second.
7277 The expression is therefore always offset by the size of the
7278 scalar type. */
7279 offset = 0;
7280 bitpos = GET_MODE_BITSIZE (TYPE_MODE (TREE_TYPE (exp)));
7281 inner = TREE_OPERAND (exp, 0);
7282 break;
7283
7284 default:
7285 /* If the object is a DECL, then expand it for its rtl. Don't bypass
7286 expand_expr, as that can have various side effects; LABEL_DECLs for
7287 example, may not have their DECL_RTL set yet. Expand the rtl of
7288 CONSTRUCTORs too, which should yield a memory reference for the
7289 constructor's contents. Assume language specific tree nodes can
7290 be expanded in some interesting way. */
7291 gcc_assert (TREE_CODE (exp) < LAST_AND_UNUSED_TREE_CODE);
7292 if (DECL_P (exp)
7293 || TREE_CODE (exp) == CONSTRUCTOR
7294 || TREE_CODE (exp) == COMPOUND_LITERAL_EXPR)
7295 {
7296 result = expand_expr (exp, target, tmode,
7297 modifier == EXPAND_INITIALIZER
7298 ? EXPAND_INITIALIZER : EXPAND_CONST_ADDRESS);
7299
7300 /* If the DECL isn't in memory, then the DECL wasn't properly
7301 marked TREE_ADDRESSABLE, which will be either a front-end
7302 or a tree optimizer bug. */
7303
7304 if (TREE_ADDRESSABLE (exp)
7305 && ! MEM_P (result)
7306 && ! targetm.calls.allocate_stack_slots_for_args())
7307 {
7308 error ("local frame unavailable (naked function?)");
7309 return result;
7310 }
7311 else
7312 gcc_assert (MEM_P (result));
7313 result = XEXP (result, 0);
7314
7315 /* ??? Is this needed anymore? */
7316 if (DECL_P (exp) && !TREE_USED (exp) == 0)
7317 {
7318 assemble_external (exp);
7319 TREE_USED (exp) = 1;
7320 }
7321
7322 if (modifier != EXPAND_INITIALIZER
7323 && modifier != EXPAND_CONST_ADDRESS)
7324 result = force_operand (result, target);
7325 return result;
7326 }
7327
7328 /* Pass FALSE as the last argument to get_inner_reference although
7329 we are expanding to RTL. The rationale is that we know how to
7330 handle "aligning nodes" here: we can just bypass them because
7331 they won't change the final object whose address will be returned
7332 (they actually exist only for that purpose). */
7333 inner = get_inner_reference (exp, &bitsize, &bitpos, &offset,
7334 &mode1, &unsignedp, &volatilep, false);
7335 break;
7336 }
7337
7338 /* We must have made progress. */
7339 gcc_assert (inner != exp);
7340
7341 subtarget = offset || bitpos ? NULL_RTX : target;
7342 /* For VIEW_CONVERT_EXPR, where the outer alignment is bigger than
7343 inner alignment, force the inner to be sufficiently aligned. */
7344 if (CONSTANT_CLASS_P (inner)
7345 && TYPE_ALIGN (TREE_TYPE (inner)) < TYPE_ALIGN (TREE_TYPE (exp)))
7346 {
7347 inner = copy_node (inner);
7348 TREE_TYPE (inner) = copy_node (TREE_TYPE (inner));
7349 TYPE_ALIGN (TREE_TYPE (inner)) = TYPE_ALIGN (TREE_TYPE (exp));
7350 TYPE_USER_ALIGN (TREE_TYPE (inner)) = 1;
7351 }
7352 result = expand_expr_addr_expr_1 (inner, subtarget, tmode, modifier, as);
7353
7354 if (offset)
7355 {
7356 rtx tmp;
7357
7358 if (modifier != EXPAND_NORMAL)
7359 result = force_operand (result, NULL);
7360 tmp = expand_expr (offset, NULL_RTX, tmode,
7361 modifier == EXPAND_INITIALIZER
7362 ? EXPAND_INITIALIZER : EXPAND_NORMAL);
7363
7364 result = convert_memory_address_addr_space (tmode, result, as);
7365 tmp = convert_memory_address_addr_space (tmode, tmp, as);
7366
7367 if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
7368 result = simplify_gen_binary (PLUS, tmode, result, tmp);
7369 else
7370 {
7371 subtarget = bitpos ? NULL_RTX : target;
7372 result = expand_simple_binop (tmode, PLUS, result, tmp, subtarget,
7373 1, OPTAB_LIB_WIDEN);
7374 }
7375 }
7376
7377 if (bitpos)
7378 {
7379 /* Someone beforehand should have rejected taking the address
7380 of such an object. */
7381 gcc_assert ((bitpos % BITS_PER_UNIT) == 0);
7382
7383 result = plus_constant (result, bitpos / BITS_PER_UNIT);
7384 if (modifier < EXPAND_SUM)
7385 result = force_operand (result, target);
7386 }
7387
7388 return result;
7389 }
7390
7391 /* A subroutine of expand_expr. Evaluate EXP, which is an ADDR_EXPR.
7392 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
7393
7394 static rtx
7395 expand_expr_addr_expr (tree exp, rtx target, enum machine_mode tmode,
7396 enum expand_modifier modifier)
7397 {
7398 addr_space_t as = ADDR_SPACE_GENERIC;
7399 enum machine_mode address_mode = Pmode;
7400 enum machine_mode pointer_mode = ptr_mode;
7401 enum machine_mode rmode;
7402 rtx result;
7403
7404 /* Target mode of VOIDmode says "whatever's natural". */
7405 if (tmode == VOIDmode)
7406 tmode = TYPE_MODE (TREE_TYPE (exp));
7407
7408 if (POINTER_TYPE_P (TREE_TYPE (exp)))
7409 {
7410 as = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (exp)));
7411 address_mode = targetm.addr_space.address_mode (as);
7412 pointer_mode = targetm.addr_space.pointer_mode (as);
7413 }
7414
7415 /* We can get called with some Weird Things if the user does silliness
7416 like "(short) &a". In that case, convert_memory_address won't do
7417 the right thing, so ignore the given target mode. */
7418 if (tmode != address_mode && tmode != pointer_mode)
7419 tmode = address_mode;
7420
7421 result = expand_expr_addr_expr_1 (TREE_OPERAND (exp, 0), target,
7422 tmode, modifier, as);
7423
7424 /* Despite expand_expr claims concerning ignoring TMODE when not
7425 strictly convenient, stuff breaks if we don't honor it. Note
7426 that combined with the above, we only do this for pointer modes. */
7427 rmode = GET_MODE (result);
7428 if (rmode == VOIDmode)
7429 rmode = tmode;
7430 if (rmode != tmode)
7431 result = convert_memory_address_addr_space (tmode, result, as);
7432
7433 return result;
7434 }
7435
7436 /* Generate code for computing CONSTRUCTOR EXP.
7437 An rtx for the computed value is returned. If AVOID_TEMP_MEM
7438 is TRUE, instead of creating a temporary variable in memory
7439 NULL is returned and the caller needs to handle it differently. */
7440
7441 static rtx
7442 expand_constructor (tree exp, rtx target, enum expand_modifier modifier,
7443 bool avoid_temp_mem)
7444 {
7445 tree type = TREE_TYPE (exp);
7446 enum machine_mode mode = TYPE_MODE (type);
7447
7448 /* Try to avoid creating a temporary at all. This is possible
7449 if all of the initializer is zero.
7450 FIXME: try to handle all [0..255] initializers we can handle
7451 with memset. */
7452 if (TREE_STATIC (exp)
7453 && !TREE_ADDRESSABLE (exp)
7454 && target != 0 && mode == BLKmode
7455 && all_zeros_p (exp))
7456 {
7457 clear_storage (target, expr_size (exp), BLOCK_OP_NORMAL);
7458 return target;
7459 }
7460
7461 /* All elts simple constants => refer to a constant in memory. But
7462 if this is a non-BLKmode mode, let it store a field at a time
7463 since that should make a CONST_INT or CONST_DOUBLE when we
7464 fold. Likewise, if we have a target we can use, it is best to
7465 store directly into the target unless the type is large enough
7466 that memcpy will be used. If we are making an initializer and
7467 all operands are constant, put it in memory as well.
7468
7469 FIXME: Avoid trying to fill vector constructors piece-meal.
7470 Output them with output_constant_def below unless we're sure
7471 they're zeros. This should go away when vector initializers
7472 are treated like VECTOR_CST instead of arrays. */
7473 if ((TREE_STATIC (exp)
7474 && ((mode == BLKmode
7475 && ! (target != 0 && safe_from_p (target, exp, 1)))
7476 || TREE_ADDRESSABLE (exp)
7477 || (host_integerp (TYPE_SIZE_UNIT (type), 1)
7478 && (! MOVE_BY_PIECES_P
7479 (tree_low_cst (TYPE_SIZE_UNIT (type), 1),
7480 TYPE_ALIGN (type)))
7481 && ! mostly_zeros_p (exp))))
7482 || ((modifier == EXPAND_INITIALIZER || modifier == EXPAND_CONST_ADDRESS)
7483 && TREE_CONSTANT (exp)))
7484 {
7485 rtx constructor;
7486
7487 if (avoid_temp_mem)
7488 return NULL_RTX;
7489
7490 constructor = expand_expr_constant (exp, 1, modifier);
7491
7492 if (modifier != EXPAND_CONST_ADDRESS
7493 && modifier != EXPAND_INITIALIZER
7494 && modifier != EXPAND_SUM)
7495 constructor = validize_mem (constructor);
7496
7497 return constructor;
7498 }
7499
7500 /* Handle calls that pass values in multiple non-contiguous
7501 locations. The Irix 6 ABI has examples of this. */
7502 if (target == 0 || ! safe_from_p (target, exp, 1)
7503 || GET_CODE (target) == PARALLEL || modifier == EXPAND_STACK_PARM)
7504 {
7505 if (avoid_temp_mem)
7506 return NULL_RTX;
7507
7508 target
7509 = assign_temp (build_qualified_type (type, (TYPE_QUALS (type)
7510 | (TREE_READONLY (exp)
7511 * TYPE_QUAL_CONST))),
7512 0, TREE_ADDRESSABLE (exp), 1);
7513 }
7514
7515 store_constructor (exp, target, 0, int_expr_size (exp));
7516 return target;
7517 }
7518
7519
7520 /* expand_expr: generate code for computing expression EXP.
7521 An rtx for the computed value is returned. The value is never null.
7522 In the case of a void EXP, const0_rtx is returned.
7523
7524 The value may be stored in TARGET if TARGET is nonzero.
7525 TARGET is just a suggestion; callers must assume that
7526 the rtx returned may not be the same as TARGET.
7527
7528 If TARGET is CONST0_RTX, it means that the value will be ignored.
7529
7530 If TMODE is not VOIDmode, it suggests generating the
7531 result in mode TMODE. But this is done only when convenient.
7532 Otherwise, TMODE is ignored and the value generated in its natural mode.
7533 TMODE is just a suggestion; callers must assume that
7534 the rtx returned may not have mode TMODE.
7535
7536 Note that TARGET may have neither TMODE nor MODE. In that case, it
7537 probably will not be used.
7538
7539 If MODIFIER is EXPAND_SUM then when EXP is an addition
7540 we can return an rtx of the form (MULT (REG ...) (CONST_INT ...))
7541 or a nest of (PLUS ...) and (MINUS ...) where the terms are
7542 products as above, or REG or MEM, or constant.
7543 Ordinarily in such cases we would output mul or add instructions
7544 and then return a pseudo reg containing the sum.
7545
7546 EXPAND_INITIALIZER is much like EXPAND_SUM except that
7547 it also marks a label as absolutely required (it can't be dead).
7548 It also makes a ZERO_EXTEND or SIGN_EXTEND instead of emitting extend insns.
7549 This is used for outputting expressions used in initializers.
7550
7551 EXPAND_CONST_ADDRESS says that it is okay to return a MEM
7552 with a constant address even if that address is not normally legitimate.
7553 EXPAND_INITIALIZER and EXPAND_SUM also have this effect.
7554
7555 EXPAND_STACK_PARM is used when expanding to a TARGET on the stack for
7556 a call parameter. Such targets require special care as we haven't yet
7557 marked TARGET so that it's safe from being trashed by libcalls. We
7558 don't want to use TARGET for anything but the final result;
7559 Intermediate values must go elsewhere. Additionally, calls to
7560 emit_block_move will be flagged with BLOCK_OP_CALL_PARM.
7561
7562 If EXP is a VAR_DECL whose DECL_RTL was a MEM with an invalid
7563 address, and ALT_RTL is non-NULL, then *ALT_RTL is set to the
7564 DECL_RTL of the VAR_DECL. *ALT_RTL is also set if EXP is a
7565 COMPOUND_EXPR whose second argument is such a VAR_DECL, and so on
7566 recursively. */
7567
7568 rtx
7569 expand_expr_real (tree exp, rtx target, enum machine_mode tmode,
7570 enum expand_modifier modifier, rtx *alt_rtl)
7571 {
7572 rtx ret;
7573
7574 /* Handle ERROR_MARK before anybody tries to access its type. */
7575 if (TREE_CODE (exp) == ERROR_MARK
7576 || (TREE_CODE (TREE_TYPE (exp)) == ERROR_MARK))
7577 {
7578 ret = CONST0_RTX (tmode);
7579 return ret ? ret : const0_rtx;
7580 }
7581
7582 /* If this is an expression of some kind and it has an associated line
7583 number, then emit the line number before expanding the expression.
7584
7585 We need to save and restore the file and line information so that
7586 errors discovered during expansion are emitted with the right
7587 information. It would be better of the diagnostic routines
7588 used the file/line information embedded in the tree nodes rather
7589 than globals. */
7590 if (cfun && EXPR_HAS_LOCATION (exp))
7591 {
7592 location_t saved_location = input_location;
7593 location_t saved_curr_loc = get_curr_insn_source_location ();
7594 tree saved_block = get_curr_insn_block ();
7595 input_location = EXPR_LOCATION (exp);
7596 set_curr_insn_source_location (input_location);
7597
7598 /* Record where the insns produced belong. */
7599 set_curr_insn_block (TREE_BLOCK (exp));
7600
7601 ret = expand_expr_real_1 (exp, target, tmode, modifier, alt_rtl);
7602
7603 input_location = saved_location;
7604 set_curr_insn_block (saved_block);
7605 set_curr_insn_source_location (saved_curr_loc);
7606 }
7607 else
7608 {
7609 ret = expand_expr_real_1 (exp, target, tmode, modifier, alt_rtl);
7610 }
7611
7612 return ret;
7613 }
7614
7615 rtx
7616 expand_expr_real_2 (sepops ops, rtx target, enum machine_mode tmode,
7617 enum expand_modifier modifier)
7618 {
7619 rtx op0, op1, op2, temp;
7620 tree type;
7621 int unsignedp;
7622 enum machine_mode mode;
7623 enum tree_code code = ops->code;
7624 optab this_optab;
7625 rtx subtarget, original_target;
7626 int ignore;
7627 bool reduce_bit_field;
7628 location_t loc = ops->location;
7629 tree treeop0, treeop1, treeop2;
7630 #define REDUCE_BIT_FIELD(expr) (reduce_bit_field \
7631 ? reduce_to_bit_field_precision ((expr), \
7632 target, \
7633 type) \
7634 : (expr))
7635
7636 type = ops->type;
7637 mode = TYPE_MODE (type);
7638 unsignedp = TYPE_UNSIGNED (type);
7639
7640 treeop0 = ops->op0;
7641 treeop1 = ops->op1;
7642 treeop2 = ops->op2;
7643
7644 /* We should be called only on simple (binary or unary) expressions,
7645 exactly those that are valid in gimple expressions that aren't
7646 GIMPLE_SINGLE_RHS (or invalid). */
7647 gcc_assert (get_gimple_rhs_class (code) == GIMPLE_UNARY_RHS
7648 || get_gimple_rhs_class (code) == GIMPLE_BINARY_RHS
7649 || get_gimple_rhs_class (code) == GIMPLE_TERNARY_RHS);
7650
7651 ignore = (target == const0_rtx
7652 || ((CONVERT_EXPR_CODE_P (code)
7653 || code == COND_EXPR || code == VIEW_CONVERT_EXPR)
7654 && TREE_CODE (type) == VOID_TYPE));
7655
7656 /* We should be called only if we need the result. */
7657 gcc_assert (!ignore);
7658
7659 /* An operation in what may be a bit-field type needs the
7660 result to be reduced to the precision of the bit-field type,
7661 which is narrower than that of the type's mode. */
7662 reduce_bit_field = (INTEGRAL_TYPE_P (type)
7663 && GET_MODE_PRECISION (mode) > TYPE_PRECISION (type));
7664
7665 if (reduce_bit_field && modifier == EXPAND_STACK_PARM)
7666 target = 0;
7667
7668 /* Use subtarget as the target for operand 0 of a binary operation. */
7669 subtarget = get_subtarget (target);
7670 original_target = target;
7671
7672 switch (code)
7673 {
7674 case NON_LVALUE_EXPR:
7675 case PAREN_EXPR:
7676 CASE_CONVERT:
7677 if (treeop0 == error_mark_node)
7678 return const0_rtx;
7679
7680 if (TREE_CODE (type) == UNION_TYPE)
7681 {
7682 tree valtype = TREE_TYPE (treeop0);
7683
7684 /* If both input and output are BLKmode, this conversion isn't doing
7685 anything except possibly changing memory attribute. */
7686 if (mode == BLKmode && TYPE_MODE (valtype) == BLKmode)
7687 {
7688 rtx result = expand_expr (treeop0, target, tmode,
7689 modifier);
7690
7691 result = copy_rtx (result);
7692 set_mem_attributes (result, type, 0);
7693 return result;
7694 }
7695
7696 if (target == 0)
7697 {
7698 if (TYPE_MODE (type) != BLKmode)
7699 target = gen_reg_rtx (TYPE_MODE (type));
7700 else
7701 target = assign_temp (type, 0, 1, 1);
7702 }
7703
7704 if (MEM_P (target))
7705 /* Store data into beginning of memory target. */
7706 store_expr (treeop0,
7707 adjust_address (target, TYPE_MODE (valtype), 0),
7708 modifier == EXPAND_STACK_PARM,
7709 false);
7710
7711 else
7712 {
7713 gcc_assert (REG_P (target));
7714
7715 /* Store this field into a union of the proper type. */
7716 store_field (target,
7717 MIN ((int_size_in_bytes (TREE_TYPE
7718 (treeop0))
7719 * BITS_PER_UNIT),
7720 (HOST_WIDE_INT) GET_MODE_BITSIZE (mode)),
7721 0, 0, 0, TYPE_MODE (valtype), treeop0,
7722 type, 0, false);
7723 }
7724
7725 /* Return the entire union. */
7726 return target;
7727 }
7728
7729 if (mode == TYPE_MODE (TREE_TYPE (treeop0)))
7730 {
7731 op0 = expand_expr (treeop0, target, VOIDmode,
7732 modifier);
7733
7734 /* If the signedness of the conversion differs and OP0 is
7735 a promoted SUBREG, clear that indication since we now
7736 have to do the proper extension. */
7737 if (TYPE_UNSIGNED (TREE_TYPE (treeop0)) != unsignedp
7738 && GET_CODE (op0) == SUBREG)
7739 SUBREG_PROMOTED_VAR_P (op0) = 0;
7740
7741 return REDUCE_BIT_FIELD (op0);
7742 }
7743
7744 op0 = expand_expr (treeop0, NULL_RTX, mode,
7745 modifier == EXPAND_SUM ? EXPAND_NORMAL : modifier);
7746 if (GET_MODE (op0) == mode)
7747 ;
7748
7749 /* If OP0 is a constant, just convert it into the proper mode. */
7750 else if (CONSTANT_P (op0))
7751 {
7752 tree inner_type = TREE_TYPE (treeop0);
7753 enum machine_mode inner_mode = GET_MODE (op0);
7754
7755 if (inner_mode == VOIDmode)
7756 inner_mode = TYPE_MODE (inner_type);
7757
7758 if (modifier == EXPAND_INITIALIZER)
7759 op0 = simplify_gen_subreg (mode, op0, inner_mode,
7760 subreg_lowpart_offset (mode,
7761 inner_mode));
7762 else
7763 op0= convert_modes (mode, inner_mode, op0,
7764 TYPE_UNSIGNED (inner_type));
7765 }
7766
7767 else if (modifier == EXPAND_INITIALIZER)
7768 op0 = gen_rtx_fmt_e (unsignedp ? ZERO_EXTEND : SIGN_EXTEND, mode, op0);
7769
7770 else if (target == 0)
7771 op0 = convert_to_mode (mode, op0,
7772 TYPE_UNSIGNED (TREE_TYPE
7773 (treeop0)));
7774 else
7775 {
7776 convert_move (target, op0,
7777 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
7778 op0 = target;
7779 }
7780
7781 return REDUCE_BIT_FIELD (op0);
7782
7783 case ADDR_SPACE_CONVERT_EXPR:
7784 {
7785 tree treeop0_type = TREE_TYPE (treeop0);
7786 addr_space_t as_to;
7787 addr_space_t as_from;
7788
7789 gcc_assert (POINTER_TYPE_P (type));
7790 gcc_assert (POINTER_TYPE_P (treeop0_type));
7791
7792 as_to = TYPE_ADDR_SPACE (TREE_TYPE (type));
7793 as_from = TYPE_ADDR_SPACE (TREE_TYPE (treeop0_type));
7794
7795 /* Conversions between pointers to the same address space should
7796 have been implemented via CONVERT_EXPR / NOP_EXPR. */
7797 gcc_assert (as_to != as_from);
7798
7799 /* Ask target code to handle conversion between pointers
7800 to overlapping address spaces. */
7801 if (targetm.addr_space.subset_p (as_to, as_from)
7802 || targetm.addr_space.subset_p (as_from, as_to))
7803 {
7804 op0 = expand_expr (treeop0, NULL_RTX, VOIDmode, modifier);
7805 op0 = targetm.addr_space.convert (op0, treeop0_type, type);
7806 gcc_assert (op0);
7807 return op0;
7808 }
7809
7810 /* For disjoint address spaces, converting anything but
7811 a null pointer invokes undefined behaviour. We simply
7812 always return a null pointer here. */
7813 return CONST0_RTX (mode);
7814 }
7815
7816 case POINTER_PLUS_EXPR:
7817 /* Even though the sizetype mode and the pointer's mode can be different
7818 expand is able to handle this correctly and get the correct result out
7819 of the PLUS_EXPR code. */
7820 /* Make sure to sign-extend the sizetype offset in a POINTER_PLUS_EXPR
7821 if sizetype precision is smaller than pointer precision. */
7822 if (TYPE_PRECISION (sizetype) < TYPE_PRECISION (type))
7823 treeop1 = fold_convert_loc (loc, type,
7824 fold_convert_loc (loc, ssizetype,
7825 treeop1));
7826 case PLUS_EXPR:
7827 /* If we are adding a constant, a VAR_DECL that is sp, fp, or ap, and
7828 something else, make sure we add the register to the constant and
7829 then to the other thing. This case can occur during strength
7830 reduction and doing it this way will produce better code if the
7831 frame pointer or argument pointer is eliminated.
7832
7833 fold-const.c will ensure that the constant is always in the inner
7834 PLUS_EXPR, so the only case we need to do anything about is if
7835 sp, ap, or fp is our second argument, in which case we must swap
7836 the innermost first argument and our second argument. */
7837
7838 if (TREE_CODE (treeop0) == PLUS_EXPR
7839 && TREE_CODE (TREE_OPERAND (treeop0, 1)) == INTEGER_CST
7840 && TREE_CODE (treeop1) == VAR_DECL
7841 && (DECL_RTL (treeop1) == frame_pointer_rtx
7842 || DECL_RTL (treeop1) == stack_pointer_rtx
7843 || DECL_RTL (treeop1) == arg_pointer_rtx))
7844 {
7845 tree t = treeop1;
7846
7847 treeop1 = TREE_OPERAND (treeop0, 0);
7848 TREE_OPERAND (treeop0, 0) = t;
7849 }
7850
7851 /* If the result is to be ptr_mode and we are adding an integer to
7852 something, we might be forming a constant. So try to use
7853 plus_constant. If it produces a sum and we can't accept it,
7854 use force_operand. This allows P = &ARR[const] to generate
7855 efficient code on machines where a SYMBOL_REF is not a valid
7856 address.
7857
7858 If this is an EXPAND_SUM call, always return the sum. */
7859 if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER
7860 || (mode == ptr_mode && (unsignedp || ! flag_trapv)))
7861 {
7862 if (modifier == EXPAND_STACK_PARM)
7863 target = 0;
7864 if (TREE_CODE (treeop0) == INTEGER_CST
7865 && GET_MODE_PRECISION (mode) <= HOST_BITS_PER_WIDE_INT
7866 && TREE_CONSTANT (treeop1))
7867 {
7868 rtx constant_part;
7869
7870 op1 = expand_expr (treeop1, subtarget, VOIDmode,
7871 EXPAND_SUM);
7872 /* Use immed_double_const to ensure that the constant is
7873 truncated according to the mode of OP1, then sign extended
7874 to a HOST_WIDE_INT. Using the constant directly can result
7875 in non-canonical RTL in a 64x32 cross compile. */
7876 constant_part
7877 = immed_double_const (TREE_INT_CST_LOW (treeop0),
7878 (HOST_WIDE_INT) 0,
7879 TYPE_MODE (TREE_TYPE (treeop1)));
7880 op1 = plus_constant (op1, INTVAL (constant_part));
7881 if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
7882 op1 = force_operand (op1, target);
7883 return REDUCE_BIT_FIELD (op1);
7884 }
7885
7886 else if (TREE_CODE (treeop1) == INTEGER_CST
7887 && GET_MODE_PRECISION (mode) <= HOST_BITS_PER_WIDE_INT
7888 && TREE_CONSTANT (treeop0))
7889 {
7890 rtx constant_part;
7891
7892 op0 = expand_expr (treeop0, subtarget, VOIDmode,
7893 (modifier == EXPAND_INITIALIZER
7894 ? EXPAND_INITIALIZER : EXPAND_SUM));
7895 if (! CONSTANT_P (op0))
7896 {
7897 op1 = expand_expr (treeop1, NULL_RTX,
7898 VOIDmode, modifier);
7899 /* Return a PLUS if modifier says it's OK. */
7900 if (modifier == EXPAND_SUM
7901 || modifier == EXPAND_INITIALIZER)
7902 return simplify_gen_binary (PLUS, mode, op0, op1);
7903 goto binop2;
7904 }
7905 /* Use immed_double_const to ensure that the constant is
7906 truncated according to the mode of OP1, then sign extended
7907 to a HOST_WIDE_INT. Using the constant directly can result
7908 in non-canonical RTL in a 64x32 cross compile. */
7909 constant_part
7910 = immed_double_const (TREE_INT_CST_LOW (treeop1),
7911 (HOST_WIDE_INT) 0,
7912 TYPE_MODE (TREE_TYPE (treeop0)));
7913 op0 = plus_constant (op0, INTVAL (constant_part));
7914 if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
7915 op0 = force_operand (op0, target);
7916 return REDUCE_BIT_FIELD (op0);
7917 }
7918 }
7919
7920 /* Use TER to expand pointer addition of a negated value
7921 as pointer subtraction. */
7922 if ((POINTER_TYPE_P (TREE_TYPE (treeop0))
7923 || (TREE_CODE (TREE_TYPE (treeop0)) == VECTOR_TYPE
7924 && POINTER_TYPE_P (TREE_TYPE (TREE_TYPE (treeop0)))))
7925 && TREE_CODE (treeop1) == SSA_NAME
7926 && TYPE_MODE (TREE_TYPE (treeop0))
7927 == TYPE_MODE (TREE_TYPE (treeop1)))
7928 {
7929 gimple def = get_def_for_expr (treeop1, NEGATE_EXPR);
7930 if (def)
7931 {
7932 treeop1 = gimple_assign_rhs1 (def);
7933 code = MINUS_EXPR;
7934 goto do_minus;
7935 }
7936 }
7937
7938 /* No sense saving up arithmetic to be done
7939 if it's all in the wrong mode to form part of an address.
7940 And force_operand won't know whether to sign-extend or
7941 zero-extend. */
7942 if ((modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
7943 || mode != ptr_mode)
7944 {
7945 expand_operands (treeop0, treeop1,
7946 subtarget, &op0, &op1, EXPAND_NORMAL);
7947 if (op0 == const0_rtx)
7948 return op1;
7949 if (op1 == const0_rtx)
7950 return op0;
7951 goto binop2;
7952 }
7953
7954 expand_operands (treeop0, treeop1,
7955 subtarget, &op0, &op1, modifier);
7956 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1));
7957
7958 case MINUS_EXPR:
7959 do_minus:
7960 /* For initializers, we are allowed to return a MINUS of two
7961 symbolic constants. Here we handle all cases when both operands
7962 are constant. */
7963 /* Handle difference of two symbolic constants,
7964 for the sake of an initializer. */
7965 if ((modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
7966 && really_constant_p (treeop0)
7967 && really_constant_p (treeop1))
7968 {
7969 expand_operands (treeop0, treeop1,
7970 NULL_RTX, &op0, &op1, modifier);
7971
7972 /* If the last operand is a CONST_INT, use plus_constant of
7973 the negated constant. Else make the MINUS. */
7974 if (CONST_INT_P (op1))
7975 return REDUCE_BIT_FIELD (plus_constant (op0, - INTVAL (op1)));
7976 else
7977 return REDUCE_BIT_FIELD (gen_rtx_MINUS (mode, op0, op1));
7978 }
7979
7980 /* No sense saving up arithmetic to be done
7981 if it's all in the wrong mode to form part of an address.
7982 And force_operand won't know whether to sign-extend or
7983 zero-extend. */
7984 if ((modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
7985 || mode != ptr_mode)
7986 goto binop;
7987
7988 expand_operands (treeop0, treeop1,
7989 subtarget, &op0, &op1, modifier);
7990
7991 /* Convert A - const to A + (-const). */
7992 if (CONST_INT_P (op1))
7993 {
7994 op1 = negate_rtx (mode, op1);
7995 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1));
7996 }
7997
7998 goto binop2;
7999
8000 case WIDEN_MULT_PLUS_EXPR:
8001 case WIDEN_MULT_MINUS_EXPR:
8002 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8003 op2 = expand_normal (treeop2);
8004 target = expand_widen_pattern_expr (ops, op0, op1, op2,
8005 target, unsignedp);
8006 return target;
8007
8008 case WIDEN_MULT_EXPR:
8009 /* If first operand is constant, swap them.
8010 Thus the following special case checks need only
8011 check the second operand. */
8012 if (TREE_CODE (treeop0) == INTEGER_CST)
8013 {
8014 tree t1 = treeop0;
8015 treeop0 = treeop1;
8016 treeop1 = t1;
8017 }
8018
8019 /* First, check if we have a multiplication of one signed and one
8020 unsigned operand. */
8021 if (TREE_CODE (treeop1) != INTEGER_CST
8022 && (TYPE_UNSIGNED (TREE_TYPE (treeop0))
8023 != TYPE_UNSIGNED (TREE_TYPE (treeop1))))
8024 {
8025 enum machine_mode innermode = TYPE_MODE (TREE_TYPE (treeop0));
8026 this_optab = usmul_widen_optab;
8027 if (find_widening_optab_handler (this_optab, mode, innermode, 0)
8028 != CODE_FOR_nothing)
8029 {
8030 if (TYPE_UNSIGNED (TREE_TYPE (treeop0)))
8031 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1,
8032 EXPAND_NORMAL);
8033 else
8034 expand_operands (treeop0, treeop1, NULL_RTX, &op1, &op0,
8035 EXPAND_NORMAL);
8036 goto binop3;
8037 }
8038 }
8039 /* Check for a multiplication with matching signedness. */
8040 else if ((TREE_CODE (treeop1) == INTEGER_CST
8041 && int_fits_type_p (treeop1, TREE_TYPE (treeop0)))
8042 || (TYPE_UNSIGNED (TREE_TYPE (treeop1))
8043 == TYPE_UNSIGNED (TREE_TYPE (treeop0))))
8044 {
8045 tree op0type = TREE_TYPE (treeop0);
8046 enum machine_mode innermode = TYPE_MODE (op0type);
8047 bool zextend_p = TYPE_UNSIGNED (op0type);
8048 optab other_optab = zextend_p ? smul_widen_optab : umul_widen_optab;
8049 this_optab = zextend_p ? umul_widen_optab : smul_widen_optab;
8050
8051 if (TREE_CODE (treeop0) != INTEGER_CST)
8052 {
8053 if (find_widening_optab_handler (this_optab, mode, innermode, 0)
8054 != CODE_FOR_nothing)
8055 {
8056 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1,
8057 EXPAND_NORMAL);
8058 temp = expand_widening_mult (mode, op0, op1, target,
8059 unsignedp, this_optab);
8060 return REDUCE_BIT_FIELD (temp);
8061 }
8062 if (find_widening_optab_handler (other_optab, mode, innermode, 0)
8063 != CODE_FOR_nothing
8064 && innermode == word_mode)
8065 {
8066 rtx htem, hipart;
8067 op0 = expand_normal (treeop0);
8068 if (TREE_CODE (treeop1) == INTEGER_CST)
8069 op1 = convert_modes (innermode, mode,
8070 expand_normal (treeop1), unsignedp);
8071 else
8072 op1 = expand_normal (treeop1);
8073 temp = expand_binop (mode, other_optab, op0, op1, target,
8074 unsignedp, OPTAB_LIB_WIDEN);
8075 hipart = gen_highpart (innermode, temp);
8076 htem = expand_mult_highpart_adjust (innermode, hipart,
8077 op0, op1, hipart,
8078 zextend_p);
8079 if (htem != hipart)
8080 emit_move_insn (hipart, htem);
8081 return REDUCE_BIT_FIELD (temp);
8082 }
8083 }
8084 }
8085 treeop0 = fold_build1 (CONVERT_EXPR, type, treeop0);
8086 treeop1 = fold_build1 (CONVERT_EXPR, type, treeop1);
8087 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
8088 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, target, unsignedp));
8089
8090 case FMA_EXPR:
8091 {
8092 optab opt = fma_optab;
8093 gimple def0, def2;
8094
8095 /* If there is no insn for FMA, emit it as __builtin_fma{,f,l}
8096 call. */
8097 if (optab_handler (fma_optab, mode) == CODE_FOR_nothing)
8098 {
8099 tree fn = mathfn_built_in (TREE_TYPE (treeop0), BUILT_IN_FMA);
8100 tree call_expr;
8101
8102 gcc_assert (fn != NULL_TREE);
8103 call_expr = build_call_expr (fn, 3, treeop0, treeop1, treeop2);
8104 return expand_builtin (call_expr, target, subtarget, mode, false);
8105 }
8106
8107 def0 = get_def_for_expr (treeop0, NEGATE_EXPR);
8108 def2 = get_def_for_expr (treeop2, NEGATE_EXPR);
8109
8110 op0 = op2 = NULL;
8111
8112 if (def0 && def2
8113 && optab_handler (fnms_optab, mode) != CODE_FOR_nothing)
8114 {
8115 opt = fnms_optab;
8116 op0 = expand_normal (gimple_assign_rhs1 (def0));
8117 op2 = expand_normal (gimple_assign_rhs1 (def2));
8118 }
8119 else if (def0
8120 && optab_handler (fnma_optab, mode) != CODE_FOR_nothing)
8121 {
8122 opt = fnma_optab;
8123 op0 = expand_normal (gimple_assign_rhs1 (def0));
8124 }
8125 else if (def2
8126 && optab_handler (fms_optab, mode) != CODE_FOR_nothing)
8127 {
8128 opt = fms_optab;
8129 op2 = expand_normal (gimple_assign_rhs1 (def2));
8130 }
8131
8132 if (op0 == NULL)
8133 op0 = expand_expr (treeop0, subtarget, VOIDmode, EXPAND_NORMAL);
8134 if (op2 == NULL)
8135 op2 = expand_normal (treeop2);
8136 op1 = expand_normal (treeop1);
8137
8138 return expand_ternary_op (TYPE_MODE (type), opt,
8139 op0, op1, op2, target, 0);
8140 }
8141
8142 case MULT_EXPR:
8143 /* If this is a fixed-point operation, then we cannot use the code
8144 below because "expand_mult" doesn't support sat/no-sat fixed-point
8145 multiplications. */
8146 if (ALL_FIXED_POINT_MODE_P (mode))
8147 goto binop;
8148
8149 /* If first operand is constant, swap them.
8150 Thus the following special case checks need only
8151 check the second operand. */
8152 if (TREE_CODE (treeop0) == INTEGER_CST)
8153 {
8154 tree t1 = treeop0;
8155 treeop0 = treeop1;
8156 treeop1 = t1;
8157 }
8158
8159 /* Attempt to return something suitable for generating an
8160 indexed address, for machines that support that. */
8161
8162 if (modifier == EXPAND_SUM && mode == ptr_mode
8163 && host_integerp (treeop1, 0))
8164 {
8165 tree exp1 = treeop1;
8166
8167 op0 = expand_expr (treeop0, subtarget, VOIDmode,
8168 EXPAND_SUM);
8169
8170 if (!REG_P (op0))
8171 op0 = force_operand (op0, NULL_RTX);
8172 if (!REG_P (op0))
8173 op0 = copy_to_mode_reg (mode, op0);
8174
8175 return REDUCE_BIT_FIELD (gen_rtx_MULT (mode, op0,
8176 gen_int_mode (tree_low_cst (exp1, 0),
8177 TYPE_MODE (TREE_TYPE (exp1)))));
8178 }
8179
8180 if (modifier == EXPAND_STACK_PARM)
8181 target = 0;
8182
8183 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
8184 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, target, unsignedp));
8185
8186 case TRUNC_DIV_EXPR:
8187 case FLOOR_DIV_EXPR:
8188 case CEIL_DIV_EXPR:
8189 case ROUND_DIV_EXPR:
8190 case EXACT_DIV_EXPR:
8191 /* If this is a fixed-point operation, then we cannot use the code
8192 below because "expand_divmod" doesn't support sat/no-sat fixed-point
8193 divisions. */
8194 if (ALL_FIXED_POINT_MODE_P (mode))
8195 goto binop;
8196
8197 if (modifier == EXPAND_STACK_PARM)
8198 target = 0;
8199 /* Possible optimization: compute the dividend with EXPAND_SUM
8200 then if the divisor is constant can optimize the case
8201 where some terms of the dividend have coeffs divisible by it. */
8202 expand_operands (treeop0, treeop1,
8203 subtarget, &op0, &op1, EXPAND_NORMAL);
8204 return expand_divmod (0, code, mode, op0, op1, target, unsignedp);
8205
8206 case RDIV_EXPR:
8207 goto binop;
8208
8209 case TRUNC_MOD_EXPR:
8210 case FLOOR_MOD_EXPR:
8211 case CEIL_MOD_EXPR:
8212 case ROUND_MOD_EXPR:
8213 if (modifier == EXPAND_STACK_PARM)
8214 target = 0;
8215 expand_operands (treeop0, treeop1,
8216 subtarget, &op0, &op1, EXPAND_NORMAL);
8217 return expand_divmod (1, code, mode, op0, op1, target, unsignedp);
8218
8219 case FIXED_CONVERT_EXPR:
8220 op0 = expand_normal (treeop0);
8221 if (target == 0 || modifier == EXPAND_STACK_PARM)
8222 target = gen_reg_rtx (mode);
8223
8224 if ((TREE_CODE (TREE_TYPE (treeop0)) == INTEGER_TYPE
8225 && TYPE_UNSIGNED (TREE_TYPE (treeop0)))
8226 || (TREE_CODE (type) == INTEGER_TYPE && TYPE_UNSIGNED (type)))
8227 expand_fixed_convert (target, op0, 1, TYPE_SATURATING (type));
8228 else
8229 expand_fixed_convert (target, op0, 0, TYPE_SATURATING (type));
8230 return target;
8231
8232 case FIX_TRUNC_EXPR:
8233 op0 = expand_normal (treeop0);
8234 if (target == 0 || modifier == EXPAND_STACK_PARM)
8235 target = gen_reg_rtx (mode);
8236 expand_fix (target, op0, unsignedp);
8237 return target;
8238
8239 case FLOAT_EXPR:
8240 op0 = expand_normal (treeop0);
8241 if (target == 0 || modifier == EXPAND_STACK_PARM)
8242 target = gen_reg_rtx (mode);
8243 /* expand_float can't figure out what to do if FROM has VOIDmode.
8244 So give it the correct mode. With -O, cse will optimize this. */
8245 if (GET_MODE (op0) == VOIDmode)
8246 op0 = copy_to_mode_reg (TYPE_MODE (TREE_TYPE (treeop0)),
8247 op0);
8248 expand_float (target, op0,
8249 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
8250 return target;
8251
8252 case NEGATE_EXPR:
8253 op0 = expand_expr (treeop0, subtarget,
8254 VOIDmode, EXPAND_NORMAL);
8255 if (modifier == EXPAND_STACK_PARM)
8256 target = 0;
8257 temp = expand_unop (mode,
8258 optab_for_tree_code (NEGATE_EXPR, type,
8259 optab_default),
8260 op0, target, 0);
8261 gcc_assert (temp);
8262 return REDUCE_BIT_FIELD (temp);
8263
8264 case ABS_EXPR:
8265 op0 = expand_expr (treeop0, subtarget,
8266 VOIDmode, EXPAND_NORMAL);
8267 if (modifier == EXPAND_STACK_PARM)
8268 target = 0;
8269
8270 /* ABS_EXPR is not valid for complex arguments. */
8271 gcc_assert (GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
8272 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT);
8273
8274 /* Unsigned abs is simply the operand. Testing here means we don't
8275 risk generating incorrect code below. */
8276 if (TYPE_UNSIGNED (type))
8277 return op0;
8278
8279 return expand_abs (mode, op0, target, unsignedp,
8280 safe_from_p (target, treeop0, 1));
8281
8282 case MAX_EXPR:
8283 case MIN_EXPR:
8284 target = original_target;
8285 if (target == 0
8286 || modifier == EXPAND_STACK_PARM
8287 || (MEM_P (target) && MEM_VOLATILE_P (target))
8288 || GET_MODE (target) != mode
8289 || (REG_P (target)
8290 && REGNO (target) < FIRST_PSEUDO_REGISTER))
8291 target = gen_reg_rtx (mode);
8292 expand_operands (treeop0, treeop1,
8293 target, &op0, &op1, EXPAND_NORMAL);
8294
8295 /* First try to do it with a special MIN or MAX instruction.
8296 If that does not win, use a conditional jump to select the proper
8297 value. */
8298 this_optab = optab_for_tree_code (code, type, optab_default);
8299 temp = expand_binop (mode, this_optab, op0, op1, target, unsignedp,
8300 OPTAB_WIDEN);
8301 if (temp != 0)
8302 return temp;
8303
8304 /* At this point, a MEM target is no longer useful; we will get better
8305 code without it. */
8306
8307 if (! REG_P (target))
8308 target = gen_reg_rtx (mode);
8309
8310 /* If op1 was placed in target, swap op0 and op1. */
8311 if (target != op0 && target == op1)
8312 {
8313 temp = op0;
8314 op0 = op1;
8315 op1 = temp;
8316 }
8317
8318 /* We generate better code and avoid problems with op1 mentioning
8319 target by forcing op1 into a pseudo if it isn't a constant. */
8320 if (! CONSTANT_P (op1))
8321 op1 = force_reg (mode, op1);
8322
8323 {
8324 enum rtx_code comparison_code;
8325 rtx cmpop1 = op1;
8326
8327 if (code == MAX_EXPR)
8328 comparison_code = unsignedp ? GEU : GE;
8329 else
8330 comparison_code = unsignedp ? LEU : LE;
8331
8332 /* Canonicalize to comparisons against 0. */
8333 if (op1 == const1_rtx)
8334 {
8335 /* Converting (a >= 1 ? a : 1) into (a > 0 ? a : 1)
8336 or (a != 0 ? a : 1) for unsigned.
8337 For MIN we are safe converting (a <= 1 ? a : 1)
8338 into (a <= 0 ? a : 1) */
8339 cmpop1 = const0_rtx;
8340 if (code == MAX_EXPR)
8341 comparison_code = unsignedp ? NE : GT;
8342 }
8343 if (op1 == constm1_rtx && !unsignedp)
8344 {
8345 /* Converting (a >= -1 ? a : -1) into (a >= 0 ? a : -1)
8346 and (a <= -1 ? a : -1) into (a < 0 ? a : -1) */
8347 cmpop1 = const0_rtx;
8348 if (code == MIN_EXPR)
8349 comparison_code = LT;
8350 }
8351 #ifdef HAVE_conditional_move
8352 /* Use a conditional move if possible. */
8353 if (can_conditionally_move_p (mode))
8354 {
8355 rtx insn;
8356
8357 /* ??? Same problem as in expmed.c: emit_conditional_move
8358 forces a stack adjustment via compare_from_rtx, and we
8359 lose the stack adjustment if the sequence we are about
8360 to create is discarded. */
8361 do_pending_stack_adjust ();
8362
8363 start_sequence ();
8364
8365 /* Try to emit the conditional move. */
8366 insn = emit_conditional_move (target, comparison_code,
8367 op0, cmpop1, mode,
8368 op0, op1, mode,
8369 unsignedp);
8370
8371 /* If we could do the conditional move, emit the sequence,
8372 and return. */
8373 if (insn)
8374 {
8375 rtx seq = get_insns ();
8376 end_sequence ();
8377 emit_insn (seq);
8378 return target;
8379 }
8380
8381 /* Otherwise discard the sequence and fall back to code with
8382 branches. */
8383 end_sequence ();
8384 }
8385 #endif
8386 if (target != op0)
8387 emit_move_insn (target, op0);
8388
8389 temp = gen_label_rtx ();
8390 do_compare_rtx_and_jump (target, cmpop1, comparison_code,
8391 unsignedp, mode, NULL_RTX, NULL_RTX, temp,
8392 -1);
8393 }
8394 emit_move_insn (target, op1);
8395 emit_label (temp);
8396 return target;
8397
8398 case BIT_NOT_EXPR:
8399 op0 = expand_expr (treeop0, subtarget,
8400 VOIDmode, EXPAND_NORMAL);
8401 if (modifier == EXPAND_STACK_PARM)
8402 target = 0;
8403 /* In case we have to reduce the result to bitfield precision
8404 expand this as XOR with a proper constant instead. */
8405 if (reduce_bit_field)
8406 temp = expand_binop (mode, xor_optab, op0,
8407 immed_double_int_const
8408 (double_int_mask (TYPE_PRECISION (type)), mode),
8409 target, 1, OPTAB_LIB_WIDEN);
8410 else
8411 temp = expand_unop (mode, one_cmpl_optab, op0, target, 1);
8412 gcc_assert (temp);
8413 return temp;
8414
8415 /* ??? Can optimize bitwise operations with one arg constant.
8416 Can optimize (a bitwise1 n) bitwise2 (a bitwise3 b)
8417 and (a bitwise1 b) bitwise2 b (etc)
8418 but that is probably not worth while. */
8419
8420 case BIT_AND_EXPR:
8421 case BIT_IOR_EXPR:
8422 case BIT_XOR_EXPR:
8423 goto binop;
8424
8425 case LROTATE_EXPR:
8426 case RROTATE_EXPR:
8427 gcc_assert (VECTOR_MODE_P (TYPE_MODE (type))
8428 || (GET_MODE_PRECISION (TYPE_MODE (type))
8429 == TYPE_PRECISION (type)));
8430 /* fall through */
8431
8432 case LSHIFT_EXPR:
8433 case RSHIFT_EXPR:
8434 /* If this is a fixed-point operation, then we cannot use the code
8435 below because "expand_shift" doesn't support sat/no-sat fixed-point
8436 shifts. */
8437 if (ALL_FIXED_POINT_MODE_P (mode))
8438 goto binop;
8439
8440 if (! safe_from_p (subtarget, treeop1, 1))
8441 subtarget = 0;
8442 if (modifier == EXPAND_STACK_PARM)
8443 target = 0;
8444 op0 = expand_expr (treeop0, subtarget,
8445 VOIDmode, EXPAND_NORMAL);
8446 temp = expand_variable_shift (code, mode, op0, treeop1, target,
8447 unsignedp);
8448 if (code == LSHIFT_EXPR)
8449 temp = REDUCE_BIT_FIELD (temp);
8450 return temp;
8451
8452 /* Could determine the answer when only additive constants differ. Also,
8453 the addition of one can be handled by changing the condition. */
8454 case LT_EXPR:
8455 case LE_EXPR:
8456 case GT_EXPR:
8457 case GE_EXPR:
8458 case EQ_EXPR:
8459 case NE_EXPR:
8460 case UNORDERED_EXPR:
8461 case ORDERED_EXPR:
8462 case UNLT_EXPR:
8463 case UNLE_EXPR:
8464 case UNGT_EXPR:
8465 case UNGE_EXPR:
8466 case UNEQ_EXPR:
8467 case LTGT_EXPR:
8468 temp = do_store_flag (ops,
8469 modifier != EXPAND_STACK_PARM ? target : NULL_RTX,
8470 tmode != VOIDmode ? tmode : mode);
8471 if (temp)
8472 return temp;
8473
8474 /* Use a compare and a jump for BLKmode comparisons, or for function
8475 type comparisons is HAVE_canonicalize_funcptr_for_compare. */
8476
8477 if ((target == 0
8478 || modifier == EXPAND_STACK_PARM
8479 || ! safe_from_p (target, treeop0, 1)
8480 || ! safe_from_p (target, treeop1, 1)
8481 /* Make sure we don't have a hard reg (such as function's return
8482 value) live across basic blocks, if not optimizing. */
8483 || (!optimize && REG_P (target)
8484 && REGNO (target) < FIRST_PSEUDO_REGISTER)))
8485 target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode);
8486
8487 emit_move_insn (target, const0_rtx);
8488
8489 op1 = gen_label_rtx ();
8490 jumpifnot_1 (code, treeop0, treeop1, op1, -1);
8491
8492 if (TYPE_PRECISION (type) == 1 && !TYPE_UNSIGNED (type))
8493 emit_move_insn (target, constm1_rtx);
8494 else
8495 emit_move_insn (target, const1_rtx);
8496
8497 emit_label (op1);
8498 return target;
8499
8500 case COMPLEX_EXPR:
8501 /* Get the rtx code of the operands. */
8502 op0 = expand_normal (treeop0);
8503 op1 = expand_normal (treeop1);
8504
8505 if (!target)
8506 target = gen_reg_rtx (TYPE_MODE (type));
8507
8508 /* Move the real (op0) and imaginary (op1) parts to their location. */
8509 write_complex_part (target, op0, false);
8510 write_complex_part (target, op1, true);
8511
8512 return target;
8513
8514 case WIDEN_SUM_EXPR:
8515 {
8516 tree oprnd0 = treeop0;
8517 tree oprnd1 = treeop1;
8518
8519 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8520 target = expand_widen_pattern_expr (ops, op0, NULL_RTX, op1,
8521 target, unsignedp);
8522 return target;
8523 }
8524
8525 case REDUC_MAX_EXPR:
8526 case REDUC_MIN_EXPR:
8527 case REDUC_PLUS_EXPR:
8528 {
8529 op0 = expand_normal (treeop0);
8530 this_optab = optab_for_tree_code (code, type, optab_default);
8531 temp = expand_unop (mode, this_optab, op0, target, unsignedp);
8532 gcc_assert (temp);
8533 return temp;
8534 }
8535
8536 case VEC_EXTRACT_EVEN_EXPR:
8537 case VEC_EXTRACT_ODD_EXPR:
8538 {
8539 expand_operands (treeop0, treeop1,
8540 NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8541 this_optab = optab_for_tree_code (code, type, optab_default);
8542 temp = expand_binop (mode, this_optab, op0, op1, target, unsignedp,
8543 OPTAB_WIDEN);
8544 gcc_assert (temp);
8545 return temp;
8546 }
8547
8548 case VEC_INTERLEAVE_HIGH_EXPR:
8549 case VEC_INTERLEAVE_LOW_EXPR:
8550 {
8551 expand_operands (treeop0, treeop1,
8552 NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8553 this_optab = optab_for_tree_code (code, type, optab_default);
8554 temp = expand_binop (mode, this_optab, op0, op1, target, unsignedp,
8555 OPTAB_WIDEN);
8556 gcc_assert (temp);
8557 return temp;
8558 }
8559
8560 case VEC_LSHIFT_EXPR:
8561 case VEC_RSHIFT_EXPR:
8562 {
8563 target = expand_vec_shift_expr (ops, target);
8564 return target;
8565 }
8566
8567 case VEC_UNPACK_HI_EXPR:
8568 case VEC_UNPACK_LO_EXPR:
8569 {
8570 op0 = expand_normal (treeop0);
8571 temp = expand_widen_pattern_expr (ops, op0, NULL_RTX, NULL_RTX,
8572 target, unsignedp);
8573 gcc_assert (temp);
8574 return temp;
8575 }
8576
8577 case VEC_UNPACK_FLOAT_HI_EXPR:
8578 case VEC_UNPACK_FLOAT_LO_EXPR:
8579 {
8580 op0 = expand_normal (treeop0);
8581 /* The signedness is determined from input operand. */
8582 temp = expand_widen_pattern_expr
8583 (ops, op0, NULL_RTX, NULL_RTX,
8584 target, TYPE_UNSIGNED (TREE_TYPE (treeop0)));
8585
8586 gcc_assert (temp);
8587 return temp;
8588 }
8589
8590 case VEC_WIDEN_MULT_HI_EXPR:
8591 case VEC_WIDEN_MULT_LO_EXPR:
8592 {
8593 tree oprnd0 = treeop0;
8594 tree oprnd1 = treeop1;
8595
8596 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8597 target = expand_widen_pattern_expr (ops, op0, op1, NULL_RTX,
8598 target, unsignedp);
8599 gcc_assert (target);
8600 return target;
8601 }
8602
8603 case VEC_PACK_TRUNC_EXPR:
8604 case VEC_PACK_SAT_EXPR:
8605 case VEC_PACK_FIX_TRUNC_EXPR:
8606 mode = TYPE_MODE (TREE_TYPE (treeop0));
8607 goto binop;
8608
8609 case DOT_PROD_EXPR:
8610 {
8611 tree oprnd0 = treeop0;
8612 tree oprnd1 = treeop1;
8613 tree oprnd2 = treeop2;
8614 rtx op2;
8615
8616 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8617 op2 = expand_normal (oprnd2);
8618 target = expand_widen_pattern_expr (ops, op0, op1, op2,
8619 target, unsignedp);
8620 return target;
8621 }
8622
8623 case REALIGN_LOAD_EXPR:
8624 {
8625 tree oprnd0 = treeop0;
8626 tree oprnd1 = treeop1;
8627 tree oprnd2 = treeop2;
8628 rtx op2;
8629
8630 this_optab = optab_for_tree_code (code, type, optab_default);
8631 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8632 op2 = expand_normal (oprnd2);
8633 temp = expand_ternary_op (mode, this_optab, op0, op1, op2,
8634 target, unsignedp);
8635 gcc_assert (temp);
8636 return temp;
8637 }
8638
8639 case COND_EXPR:
8640 /* A COND_EXPR with its type being VOID_TYPE represents a
8641 conditional jump and is handled in
8642 expand_gimple_cond_expr. */
8643 gcc_assert (!VOID_TYPE_P (type));
8644
8645 /* Note that COND_EXPRs whose type is a structure or union
8646 are required to be constructed to contain assignments of
8647 a temporary variable, so that we can evaluate them here
8648 for side effect only. If type is void, we must do likewise. */
8649
8650 gcc_assert (!TREE_ADDRESSABLE (type)
8651 && !ignore
8652 && TREE_TYPE (treeop1) != void_type_node
8653 && TREE_TYPE (treeop2) != void_type_node);
8654
8655 /* If we are not to produce a result, we have no target. Otherwise,
8656 if a target was specified use it; it will not be used as an
8657 intermediate target unless it is safe. If no target, use a
8658 temporary. */
8659
8660 if (modifier != EXPAND_STACK_PARM
8661 && original_target
8662 && safe_from_p (original_target, treeop0, 1)
8663 && GET_MODE (original_target) == mode
8664 #ifdef HAVE_conditional_move
8665 && (! can_conditionally_move_p (mode)
8666 || REG_P (original_target))
8667 #endif
8668 && !MEM_P (original_target))
8669 temp = original_target;
8670 else
8671 temp = assign_temp (type, 0, 0, 1);
8672
8673 do_pending_stack_adjust ();
8674 NO_DEFER_POP;
8675 op0 = gen_label_rtx ();
8676 op1 = gen_label_rtx ();
8677 jumpifnot (treeop0, op0, -1);
8678 store_expr (treeop1, temp,
8679 modifier == EXPAND_STACK_PARM,
8680 false);
8681
8682 emit_jump_insn (gen_jump (op1));
8683 emit_barrier ();
8684 emit_label (op0);
8685 store_expr (treeop2, temp,
8686 modifier == EXPAND_STACK_PARM,
8687 false);
8688
8689 emit_label (op1);
8690 OK_DEFER_POP;
8691 return temp;
8692
8693 case VEC_COND_EXPR:
8694 target = expand_vec_cond_expr (type, treeop0, treeop1, treeop2, target);
8695 return target;
8696
8697 default:
8698 gcc_unreachable ();
8699 }
8700
8701 /* Here to do an ordinary binary operator. */
8702 binop:
8703 expand_operands (treeop0, treeop1,
8704 subtarget, &op0, &op1, EXPAND_NORMAL);
8705 binop2:
8706 this_optab = optab_for_tree_code (code, type, optab_default);
8707 binop3:
8708 if (modifier == EXPAND_STACK_PARM)
8709 target = 0;
8710 temp = expand_binop (mode, this_optab, op0, op1, target,
8711 unsignedp, OPTAB_LIB_WIDEN);
8712 gcc_assert (temp);
8713 /* Bitwise operations do not need bitfield reduction as we expect their
8714 operands being properly truncated. */
8715 if (code == BIT_XOR_EXPR
8716 || code == BIT_AND_EXPR
8717 || code == BIT_IOR_EXPR)
8718 return temp;
8719 return REDUCE_BIT_FIELD (temp);
8720 }
8721 #undef REDUCE_BIT_FIELD
8722
8723 rtx
8724 expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode,
8725 enum expand_modifier modifier, rtx *alt_rtl)
8726 {
8727 rtx op0, op1, temp, decl_rtl;
8728 tree type;
8729 int unsignedp;
8730 enum machine_mode mode;
8731 enum tree_code code = TREE_CODE (exp);
8732 rtx subtarget, original_target;
8733 int ignore;
8734 tree context;
8735 bool reduce_bit_field;
8736 location_t loc = EXPR_LOCATION (exp);
8737 struct separate_ops ops;
8738 tree treeop0, treeop1, treeop2;
8739 tree ssa_name = NULL_TREE;
8740 gimple g;
8741
8742 type = TREE_TYPE (exp);
8743 mode = TYPE_MODE (type);
8744 unsignedp = TYPE_UNSIGNED (type);
8745
8746 treeop0 = treeop1 = treeop2 = NULL_TREE;
8747 if (!VL_EXP_CLASS_P (exp))
8748 switch (TREE_CODE_LENGTH (code))
8749 {
8750 default:
8751 case 3: treeop2 = TREE_OPERAND (exp, 2);
8752 case 2: treeop1 = TREE_OPERAND (exp, 1);
8753 case 1: treeop0 = TREE_OPERAND (exp, 0);
8754 case 0: break;
8755 }
8756 ops.code = code;
8757 ops.type = type;
8758 ops.op0 = treeop0;
8759 ops.op1 = treeop1;
8760 ops.op2 = treeop2;
8761 ops.location = loc;
8762
8763 ignore = (target == const0_rtx
8764 || ((CONVERT_EXPR_CODE_P (code)
8765 || code == COND_EXPR || code == VIEW_CONVERT_EXPR)
8766 && TREE_CODE (type) == VOID_TYPE));
8767
8768 /* An operation in what may be a bit-field type needs the
8769 result to be reduced to the precision of the bit-field type,
8770 which is narrower than that of the type's mode. */
8771 reduce_bit_field = (!ignore
8772 && INTEGRAL_TYPE_P (type)
8773 && GET_MODE_PRECISION (mode) > TYPE_PRECISION (type));
8774
8775 /* If we are going to ignore this result, we need only do something
8776 if there is a side-effect somewhere in the expression. If there
8777 is, short-circuit the most common cases here. Note that we must
8778 not call expand_expr with anything but const0_rtx in case this
8779 is an initial expansion of a size that contains a PLACEHOLDER_EXPR. */
8780
8781 if (ignore)
8782 {
8783 if (! TREE_SIDE_EFFECTS (exp))
8784 return const0_rtx;
8785
8786 /* Ensure we reference a volatile object even if value is ignored, but
8787 don't do this if all we are doing is taking its address. */
8788 if (TREE_THIS_VOLATILE (exp)
8789 && TREE_CODE (exp) != FUNCTION_DECL
8790 && mode != VOIDmode && mode != BLKmode
8791 && modifier != EXPAND_CONST_ADDRESS)
8792 {
8793 temp = expand_expr (exp, NULL_RTX, VOIDmode, modifier);
8794 if (MEM_P (temp))
8795 copy_to_reg (temp);
8796 return const0_rtx;
8797 }
8798
8799 if (TREE_CODE_CLASS (code) == tcc_unary
8800 || code == COMPONENT_REF || code == INDIRECT_REF)
8801 return expand_expr (treeop0, const0_rtx, VOIDmode,
8802 modifier);
8803
8804 else if (TREE_CODE_CLASS (code) == tcc_binary
8805 || TREE_CODE_CLASS (code) == tcc_comparison
8806 || code == ARRAY_REF || code == ARRAY_RANGE_REF)
8807 {
8808 expand_expr (treeop0, const0_rtx, VOIDmode, modifier);
8809 expand_expr (treeop1, const0_rtx, VOIDmode, modifier);
8810 return const0_rtx;
8811 }
8812 else if (code == BIT_FIELD_REF)
8813 {
8814 expand_expr (treeop0, const0_rtx, VOIDmode, modifier);
8815 expand_expr (treeop1, const0_rtx, VOIDmode, modifier);
8816 expand_expr (treeop2, const0_rtx, VOIDmode, modifier);
8817 return const0_rtx;
8818 }
8819
8820 target = 0;
8821 }
8822
8823 if (reduce_bit_field && modifier == EXPAND_STACK_PARM)
8824 target = 0;
8825
8826 /* Use subtarget as the target for operand 0 of a binary operation. */
8827 subtarget = get_subtarget (target);
8828 original_target = target;
8829
8830 switch (code)
8831 {
8832 case LABEL_DECL:
8833 {
8834 tree function = decl_function_context (exp);
8835
8836 temp = label_rtx (exp);
8837 temp = gen_rtx_LABEL_REF (Pmode, temp);
8838
8839 if (function != current_function_decl
8840 && function != 0)
8841 LABEL_REF_NONLOCAL_P (temp) = 1;
8842
8843 temp = gen_rtx_MEM (FUNCTION_MODE, temp);
8844 return temp;
8845 }
8846
8847 case SSA_NAME:
8848 /* ??? ivopts calls expander, without any preparation from
8849 out-of-ssa. So fake instructions as if this was an access to the
8850 base variable. This unnecessarily allocates a pseudo, see how we can
8851 reuse it, if partition base vars have it set already. */
8852 if (!currently_expanding_to_rtl)
8853 return expand_expr_real_1 (SSA_NAME_VAR (exp), target, tmode, modifier,
8854 NULL);
8855
8856 g = get_gimple_for_ssa_name (exp);
8857 /* For EXPAND_INITIALIZER try harder to get something simpler. */
8858 if (g == NULL
8859 && modifier == EXPAND_INITIALIZER
8860 && !SSA_NAME_IS_DEFAULT_DEF (exp)
8861 && (optimize || DECL_IGNORED_P (SSA_NAME_VAR (exp)))
8862 && stmt_is_replaceable_p (SSA_NAME_DEF_STMT (exp)))
8863 g = SSA_NAME_DEF_STMT (exp);
8864 if (g)
8865 return expand_expr_real (gimple_assign_rhs_to_tree (g), target, tmode,
8866 modifier, NULL);
8867
8868 ssa_name = exp;
8869 decl_rtl = get_rtx_for_ssa_name (ssa_name);
8870 exp = SSA_NAME_VAR (ssa_name);
8871 goto expand_decl_rtl;
8872
8873 case PARM_DECL:
8874 case VAR_DECL:
8875 /* If a static var's type was incomplete when the decl was written,
8876 but the type is complete now, lay out the decl now. */
8877 if (DECL_SIZE (exp) == 0
8878 && COMPLETE_OR_UNBOUND_ARRAY_TYPE_P (TREE_TYPE (exp))
8879 && (TREE_STATIC (exp) || DECL_EXTERNAL (exp)))
8880 layout_decl (exp, 0);
8881
8882 /* ... fall through ... */
8883
8884 case FUNCTION_DECL:
8885 case RESULT_DECL:
8886 decl_rtl = DECL_RTL (exp);
8887 expand_decl_rtl:
8888 gcc_assert (decl_rtl);
8889 decl_rtl = copy_rtx (decl_rtl);
8890 /* Record writes to register variables. */
8891 if (modifier == EXPAND_WRITE
8892 && REG_P (decl_rtl)
8893 && HARD_REGISTER_P (decl_rtl))
8894 add_to_hard_reg_set (&crtl->asm_clobbers,
8895 GET_MODE (decl_rtl), REGNO (decl_rtl));
8896
8897 /* Ensure variable marked as used even if it doesn't go through
8898 a parser. If it hasn't be used yet, write out an external
8899 definition. */
8900 if (! TREE_USED (exp))
8901 {
8902 assemble_external (exp);
8903 TREE_USED (exp) = 1;
8904 }
8905
8906 /* Show we haven't gotten RTL for this yet. */
8907 temp = 0;
8908
8909 /* Variables inherited from containing functions should have
8910 been lowered by this point. */
8911 context = decl_function_context (exp);
8912 gcc_assert (!context
8913 || context == current_function_decl
8914 || TREE_STATIC (exp)
8915 || DECL_EXTERNAL (exp)
8916 /* ??? C++ creates functions that are not TREE_STATIC. */
8917 || TREE_CODE (exp) == FUNCTION_DECL);
8918
8919 /* This is the case of an array whose size is to be determined
8920 from its initializer, while the initializer is still being parsed.
8921 See expand_decl. */
8922
8923 if (MEM_P (decl_rtl) && REG_P (XEXP (decl_rtl, 0)))
8924 temp = validize_mem (decl_rtl);
8925
8926 /* If DECL_RTL is memory, we are in the normal case and the
8927 address is not valid, get the address into a register. */
8928
8929 else if (MEM_P (decl_rtl) && modifier != EXPAND_INITIALIZER)
8930 {
8931 if (alt_rtl)
8932 *alt_rtl = decl_rtl;
8933 decl_rtl = use_anchored_address (decl_rtl);
8934 if (modifier != EXPAND_CONST_ADDRESS
8935 && modifier != EXPAND_SUM
8936 && !memory_address_addr_space_p (DECL_MODE (exp),
8937 XEXP (decl_rtl, 0),
8938 MEM_ADDR_SPACE (decl_rtl)))
8939 temp = replace_equiv_address (decl_rtl,
8940 copy_rtx (XEXP (decl_rtl, 0)));
8941 }
8942
8943 /* If we got something, return it. But first, set the alignment
8944 if the address is a register. */
8945 if (temp != 0)
8946 {
8947 if (MEM_P (temp) && REG_P (XEXP (temp, 0)))
8948 mark_reg_pointer (XEXP (temp, 0), DECL_ALIGN (exp));
8949
8950 return temp;
8951 }
8952
8953 /* If the mode of DECL_RTL does not match that of the decl, it
8954 must be a promoted value. We return a SUBREG of the wanted mode,
8955 but mark it so that we know that it was already extended. */
8956 if (REG_P (decl_rtl) && GET_MODE (decl_rtl) != DECL_MODE (exp))
8957 {
8958 enum machine_mode pmode;
8959
8960 /* Get the signedness to be used for this variable. Ensure we get
8961 the same mode we got when the variable was declared. */
8962 if (code == SSA_NAME
8963 && (g = SSA_NAME_DEF_STMT (ssa_name))
8964 && gimple_code (g) == GIMPLE_CALL)
8965 {
8966 gcc_assert (!gimple_call_internal_p (g));
8967 pmode = promote_function_mode (type, mode, &unsignedp,
8968 gimple_call_fntype (g),
8969 2);
8970 }
8971 else
8972 pmode = promote_decl_mode (exp, &unsignedp);
8973 gcc_assert (GET_MODE (decl_rtl) == pmode);
8974
8975 temp = gen_lowpart_SUBREG (mode, decl_rtl);
8976 SUBREG_PROMOTED_VAR_P (temp) = 1;
8977 SUBREG_PROMOTED_UNSIGNED_SET (temp, unsignedp);
8978 return temp;
8979 }
8980
8981 return decl_rtl;
8982
8983 case INTEGER_CST:
8984 temp = immed_double_const (TREE_INT_CST_LOW (exp),
8985 TREE_INT_CST_HIGH (exp), mode);
8986
8987 return temp;
8988
8989 case VECTOR_CST:
8990 {
8991 tree tmp = NULL_TREE;
8992 if (GET_MODE_CLASS (mode) == MODE_VECTOR_INT
8993 || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT
8994 || GET_MODE_CLASS (mode) == MODE_VECTOR_FRACT
8995 || GET_MODE_CLASS (mode) == MODE_VECTOR_UFRACT
8996 || GET_MODE_CLASS (mode) == MODE_VECTOR_ACCUM
8997 || GET_MODE_CLASS (mode) == MODE_VECTOR_UACCUM)
8998 return const_vector_from_tree (exp);
8999 if (GET_MODE_CLASS (mode) == MODE_INT)
9000 {
9001 tree type_for_mode = lang_hooks.types.type_for_mode (mode, 1);
9002 if (type_for_mode)
9003 tmp = fold_unary_loc (loc, VIEW_CONVERT_EXPR, type_for_mode, exp);
9004 }
9005 if (!tmp)
9006 tmp = build_constructor_from_list (type,
9007 TREE_VECTOR_CST_ELTS (exp));
9008 return expand_expr (tmp, ignore ? const0_rtx : target,
9009 tmode, modifier);
9010 }
9011
9012 case CONST_DECL:
9013 return expand_expr (DECL_INITIAL (exp), target, VOIDmode, modifier);
9014
9015 case REAL_CST:
9016 /* If optimized, generate immediate CONST_DOUBLE
9017 which will be turned into memory by reload if necessary.
9018
9019 We used to force a register so that loop.c could see it. But
9020 this does not allow gen_* patterns to perform optimizations with
9021 the constants. It also produces two insns in cases like "x = 1.0;".
9022 On most machines, floating-point constants are not permitted in
9023 many insns, so we'd end up copying it to a register in any case.
9024
9025 Now, we do the copying in expand_binop, if appropriate. */
9026 return CONST_DOUBLE_FROM_REAL_VALUE (TREE_REAL_CST (exp),
9027 TYPE_MODE (TREE_TYPE (exp)));
9028
9029 case FIXED_CST:
9030 return CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (exp),
9031 TYPE_MODE (TREE_TYPE (exp)));
9032
9033 case COMPLEX_CST:
9034 /* Handle evaluating a complex constant in a CONCAT target. */
9035 if (original_target && GET_CODE (original_target) == CONCAT)
9036 {
9037 enum machine_mode mode = TYPE_MODE (TREE_TYPE (TREE_TYPE (exp)));
9038 rtx rtarg, itarg;
9039
9040 rtarg = XEXP (original_target, 0);
9041 itarg = XEXP (original_target, 1);
9042
9043 /* Move the real and imaginary parts separately. */
9044 op0 = expand_expr (TREE_REALPART (exp), rtarg, mode, EXPAND_NORMAL);
9045 op1 = expand_expr (TREE_IMAGPART (exp), itarg, mode, EXPAND_NORMAL);
9046
9047 if (op0 != rtarg)
9048 emit_move_insn (rtarg, op0);
9049 if (op1 != itarg)
9050 emit_move_insn (itarg, op1);
9051
9052 return original_target;
9053 }
9054
9055 /* ... fall through ... */
9056
9057 case STRING_CST:
9058 temp = expand_expr_constant (exp, 1, modifier);
9059
9060 /* temp contains a constant address.
9061 On RISC machines where a constant address isn't valid,
9062 make some insns to get that address into a register. */
9063 if (modifier != EXPAND_CONST_ADDRESS
9064 && modifier != EXPAND_INITIALIZER
9065 && modifier != EXPAND_SUM
9066 && ! memory_address_addr_space_p (mode, XEXP (temp, 0),
9067 MEM_ADDR_SPACE (temp)))
9068 return replace_equiv_address (temp,
9069 copy_rtx (XEXP (temp, 0)));
9070 return temp;
9071
9072 case SAVE_EXPR:
9073 {
9074 tree val = treeop0;
9075 rtx ret = expand_expr_real_1 (val, target, tmode, modifier, alt_rtl);
9076
9077 if (!SAVE_EXPR_RESOLVED_P (exp))
9078 {
9079 /* We can indeed still hit this case, typically via builtin
9080 expanders calling save_expr immediately before expanding
9081 something. Assume this means that we only have to deal
9082 with non-BLKmode values. */
9083 gcc_assert (GET_MODE (ret) != BLKmode);
9084
9085 val = build_decl (EXPR_LOCATION (exp),
9086 VAR_DECL, NULL, TREE_TYPE (exp));
9087 DECL_ARTIFICIAL (val) = 1;
9088 DECL_IGNORED_P (val) = 1;
9089 treeop0 = val;
9090 TREE_OPERAND (exp, 0) = treeop0;
9091 SAVE_EXPR_RESOLVED_P (exp) = 1;
9092
9093 if (!CONSTANT_P (ret))
9094 ret = copy_to_reg (ret);
9095 SET_DECL_RTL (val, ret);
9096 }
9097
9098 return ret;
9099 }
9100
9101
9102 case CONSTRUCTOR:
9103 /* If we don't need the result, just ensure we evaluate any
9104 subexpressions. */
9105 if (ignore)
9106 {
9107 unsigned HOST_WIDE_INT idx;
9108 tree value;
9109
9110 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value)
9111 expand_expr (value, const0_rtx, VOIDmode, EXPAND_NORMAL);
9112
9113 return const0_rtx;
9114 }
9115
9116 return expand_constructor (exp, target, modifier, false);
9117
9118 case TARGET_MEM_REF:
9119 {
9120 addr_space_t as = TYPE_ADDR_SPACE (TREE_TYPE (exp));
9121 struct mem_address addr;
9122 enum insn_code icode;
9123 int align;
9124
9125 get_address_description (exp, &addr);
9126 op0 = addr_for_mem_ref (&addr, as, true);
9127 op0 = memory_address_addr_space (mode, op0, as);
9128 temp = gen_rtx_MEM (mode, op0);
9129 set_mem_attributes (temp, exp, 0);
9130 set_mem_addr_space (temp, as);
9131 align = MAX (TYPE_ALIGN (TREE_TYPE (exp)), get_object_alignment (exp));
9132 if (mode != BLKmode
9133 && (unsigned) align < GET_MODE_ALIGNMENT (mode)
9134 /* If the target does not have special handling for unaligned
9135 loads of mode then it can use regular moves for them. */
9136 && ((icode = optab_handler (movmisalign_optab, mode))
9137 != CODE_FOR_nothing))
9138 {
9139 struct expand_operand ops[2];
9140
9141 /* We've already validated the memory, and we're creating a
9142 new pseudo destination. The predicates really can't fail,
9143 nor can the generator. */
9144 create_output_operand (&ops[0], NULL_RTX, mode);
9145 create_fixed_operand (&ops[1], temp);
9146 expand_insn (icode, 2, ops);
9147 return ops[0].value;
9148 }
9149 return temp;
9150 }
9151
9152 case MEM_REF:
9153 {
9154 addr_space_t as
9155 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 1))));
9156 enum machine_mode address_mode;
9157 tree base = TREE_OPERAND (exp, 0);
9158 gimple def_stmt;
9159 enum insn_code icode;
9160 int align;
9161 /* Handle expansion of non-aliased memory with non-BLKmode. That
9162 might end up in a register. */
9163 if (TREE_CODE (base) == ADDR_EXPR)
9164 {
9165 HOST_WIDE_INT offset = mem_ref_offset (exp).low;
9166 tree bit_offset;
9167 base = TREE_OPERAND (base, 0);
9168 if (!DECL_P (base))
9169 {
9170 HOST_WIDE_INT off;
9171 base = get_addr_base_and_unit_offset (base, &off);
9172 gcc_assert (base);
9173 offset += off;
9174 }
9175 /* If we are expanding a MEM_REF of a non-BLKmode non-addressable
9176 decl we must use bitfield operations. */
9177 if (DECL_P (base)
9178 && !TREE_ADDRESSABLE (base)
9179 && DECL_MODE (base) != BLKmode
9180 && DECL_RTL_SET_P (base)
9181 && !MEM_P (DECL_RTL (base)))
9182 {
9183 tree bftype;
9184 if (offset == 0
9185 && host_integerp (TYPE_SIZE (TREE_TYPE (exp)), 1)
9186 && (GET_MODE_BITSIZE (DECL_MODE (base))
9187 == TREE_INT_CST_LOW (TYPE_SIZE (TREE_TYPE (exp)))))
9188 return expand_expr (build1 (VIEW_CONVERT_EXPR,
9189 TREE_TYPE (exp), base),
9190 target, tmode, modifier);
9191 bit_offset = bitsize_int (offset * BITS_PER_UNIT);
9192 bftype = TREE_TYPE (base);
9193 if (TYPE_MODE (TREE_TYPE (exp)) != BLKmode)
9194 bftype = TREE_TYPE (exp);
9195 return expand_expr (build3 (BIT_FIELD_REF, bftype,
9196 base,
9197 TYPE_SIZE (TREE_TYPE (exp)),
9198 bit_offset),
9199 target, tmode, modifier);
9200 }
9201 }
9202 address_mode = targetm.addr_space.address_mode (as);
9203 base = TREE_OPERAND (exp, 0);
9204 if ((def_stmt = get_def_for_expr (base, BIT_AND_EXPR)))
9205 {
9206 tree mask = gimple_assign_rhs2 (def_stmt);
9207 base = build2 (BIT_AND_EXPR, TREE_TYPE (base),
9208 gimple_assign_rhs1 (def_stmt), mask);
9209 TREE_OPERAND (exp, 0) = base;
9210 }
9211 align = MAX (TYPE_ALIGN (TREE_TYPE (exp)), get_object_alignment (exp));
9212 op0 = expand_expr (base, NULL_RTX, VOIDmode, EXPAND_SUM);
9213 op0 = memory_address_addr_space (address_mode, op0, as);
9214 if (!integer_zerop (TREE_OPERAND (exp, 1)))
9215 {
9216 rtx off
9217 = immed_double_int_const (mem_ref_offset (exp), address_mode);
9218 op0 = simplify_gen_binary (PLUS, address_mode, op0, off);
9219 }
9220 op0 = memory_address_addr_space (mode, op0, as);
9221 temp = gen_rtx_MEM (mode, op0);
9222 set_mem_attributes (temp, exp, 0);
9223 set_mem_addr_space (temp, as);
9224 if (TREE_THIS_VOLATILE (exp))
9225 MEM_VOLATILE_P (temp) = 1;
9226 if (mode != BLKmode
9227 && (unsigned) align < GET_MODE_ALIGNMENT (mode)
9228 /* If the target does not have special handling for unaligned
9229 loads of mode then it can use regular moves for them. */
9230 && ((icode = optab_handler (movmisalign_optab, mode))
9231 != CODE_FOR_nothing))
9232 {
9233 struct expand_operand ops[2];
9234
9235 /* We've already validated the memory, and we're creating a
9236 new pseudo destination. The predicates really can't fail,
9237 nor can the generator. */
9238 create_output_operand (&ops[0], NULL_RTX, mode);
9239 create_fixed_operand (&ops[1], temp);
9240 expand_insn (icode, 2, ops);
9241 return ops[0].value;
9242 }
9243 return temp;
9244 }
9245
9246 case ARRAY_REF:
9247
9248 {
9249 tree array = treeop0;
9250 tree index = treeop1;
9251
9252 /* Fold an expression like: "foo"[2].
9253 This is not done in fold so it won't happen inside &.
9254 Don't fold if this is for wide characters since it's too
9255 difficult to do correctly and this is a very rare case. */
9256
9257 if (modifier != EXPAND_CONST_ADDRESS
9258 && modifier != EXPAND_INITIALIZER
9259 && modifier != EXPAND_MEMORY)
9260 {
9261 tree t = fold_read_from_constant_string (exp);
9262
9263 if (t)
9264 return expand_expr (t, target, tmode, modifier);
9265 }
9266
9267 /* If this is a constant index into a constant array,
9268 just get the value from the array. Handle both the cases when
9269 we have an explicit constructor and when our operand is a variable
9270 that was declared const. */
9271
9272 if (modifier != EXPAND_CONST_ADDRESS
9273 && modifier != EXPAND_INITIALIZER
9274 && modifier != EXPAND_MEMORY
9275 && TREE_CODE (array) == CONSTRUCTOR
9276 && ! TREE_SIDE_EFFECTS (array)
9277 && TREE_CODE (index) == INTEGER_CST)
9278 {
9279 unsigned HOST_WIDE_INT ix;
9280 tree field, value;
9281
9282 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (array), ix,
9283 field, value)
9284 if (tree_int_cst_equal (field, index))
9285 {
9286 if (!TREE_SIDE_EFFECTS (value))
9287 return expand_expr (fold (value), target, tmode, modifier);
9288 break;
9289 }
9290 }
9291
9292 else if (optimize >= 1
9293 && modifier != EXPAND_CONST_ADDRESS
9294 && modifier != EXPAND_INITIALIZER
9295 && modifier != EXPAND_MEMORY
9296 && TREE_READONLY (array) && ! TREE_SIDE_EFFECTS (array)
9297 && TREE_CODE (array) == VAR_DECL && DECL_INITIAL (array)
9298 && TREE_CODE (DECL_INITIAL (array)) != ERROR_MARK
9299 && const_value_known_p (array))
9300 {
9301 if (TREE_CODE (index) == INTEGER_CST)
9302 {
9303 tree init = DECL_INITIAL (array);
9304
9305 if (TREE_CODE (init) == CONSTRUCTOR)
9306 {
9307 unsigned HOST_WIDE_INT ix;
9308 tree field, value;
9309
9310 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (init), ix,
9311 field, value)
9312 if (tree_int_cst_equal (field, index))
9313 {
9314 if (TREE_SIDE_EFFECTS (value))
9315 break;
9316
9317 if (TREE_CODE (value) == CONSTRUCTOR)
9318 {
9319 /* If VALUE is a CONSTRUCTOR, this
9320 optimization is only useful if
9321 this doesn't store the CONSTRUCTOR
9322 into memory. If it does, it is more
9323 efficient to just load the data from
9324 the array directly. */
9325 rtx ret = expand_constructor (value, target,
9326 modifier, true);
9327 if (ret == NULL_RTX)
9328 break;
9329 }
9330
9331 return expand_expr (fold (value), target, tmode,
9332 modifier);
9333 }
9334 }
9335 else if(TREE_CODE (init) == STRING_CST)
9336 {
9337 tree index1 = index;
9338 tree low_bound = array_ref_low_bound (exp);
9339 index1 = fold_convert_loc (loc, sizetype,
9340 treeop1);
9341
9342 /* Optimize the special-case of a zero lower bound.
9343
9344 We convert the low_bound to sizetype to avoid some problems
9345 with constant folding. (E.g. suppose the lower bound is 1,
9346 and its mode is QI. Without the conversion,l (ARRAY
9347 +(INDEX-(unsigned char)1)) becomes ((ARRAY+(-(unsigned char)1))
9348 +INDEX), which becomes (ARRAY+255+INDEX). Opps!) */
9349
9350 if (! integer_zerop (low_bound))
9351 index1 = size_diffop_loc (loc, index1,
9352 fold_convert_loc (loc, sizetype,
9353 low_bound));
9354
9355 if (0 > compare_tree_int (index1,
9356 TREE_STRING_LENGTH (init)))
9357 {
9358 tree type = TREE_TYPE (TREE_TYPE (init));
9359 enum machine_mode mode = TYPE_MODE (type);
9360
9361 if (GET_MODE_CLASS (mode) == MODE_INT
9362 && GET_MODE_SIZE (mode) == 1)
9363 return gen_int_mode (TREE_STRING_POINTER (init)
9364 [TREE_INT_CST_LOW (index1)],
9365 mode);
9366 }
9367 }
9368 }
9369 }
9370 }
9371 goto normal_inner_ref;
9372
9373 case COMPONENT_REF:
9374 /* If the operand is a CONSTRUCTOR, we can just extract the
9375 appropriate field if it is present. */
9376 if (TREE_CODE (treeop0) == CONSTRUCTOR)
9377 {
9378 unsigned HOST_WIDE_INT idx;
9379 tree field, value;
9380
9381 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (treeop0),
9382 idx, field, value)
9383 if (field == treeop1
9384 /* We can normally use the value of the field in the
9385 CONSTRUCTOR. However, if this is a bitfield in
9386 an integral mode that we can fit in a HOST_WIDE_INT,
9387 we must mask only the number of bits in the bitfield,
9388 since this is done implicitly by the constructor. If
9389 the bitfield does not meet either of those conditions,
9390 we can't do this optimization. */
9391 && (! DECL_BIT_FIELD (field)
9392 || ((GET_MODE_CLASS (DECL_MODE (field)) == MODE_INT)
9393 && (GET_MODE_PRECISION (DECL_MODE (field))
9394 <= HOST_BITS_PER_WIDE_INT))))
9395 {
9396 if (DECL_BIT_FIELD (field)
9397 && modifier == EXPAND_STACK_PARM)
9398 target = 0;
9399 op0 = expand_expr (value, target, tmode, modifier);
9400 if (DECL_BIT_FIELD (field))
9401 {
9402 HOST_WIDE_INT bitsize = TREE_INT_CST_LOW (DECL_SIZE (field));
9403 enum machine_mode imode = TYPE_MODE (TREE_TYPE (field));
9404
9405 if (TYPE_UNSIGNED (TREE_TYPE (field)))
9406 {
9407 op1 = GEN_INT (((HOST_WIDE_INT) 1 << bitsize) - 1);
9408 op0 = expand_and (imode, op0, op1, target);
9409 }
9410 else
9411 {
9412 int count = GET_MODE_PRECISION (imode) - bitsize;
9413
9414 op0 = expand_shift (LSHIFT_EXPR, imode, op0, count,
9415 target, 0);
9416 op0 = expand_shift (RSHIFT_EXPR, imode, op0, count,
9417 target, 0);
9418 }
9419 }
9420
9421 return op0;
9422 }
9423 }
9424 goto normal_inner_ref;
9425
9426 case BIT_FIELD_REF:
9427 case ARRAY_RANGE_REF:
9428 normal_inner_ref:
9429 {
9430 enum machine_mode mode1, mode2;
9431 HOST_WIDE_INT bitsize, bitpos;
9432 tree offset;
9433 int volatilep = 0, must_force_mem;
9434 bool packedp = false;
9435 tree tem = get_inner_reference (exp, &bitsize, &bitpos, &offset,
9436 &mode1, &unsignedp, &volatilep, true);
9437 rtx orig_op0, memloc;
9438
9439 /* If we got back the original object, something is wrong. Perhaps
9440 we are evaluating an expression too early. In any event, don't
9441 infinitely recurse. */
9442 gcc_assert (tem != exp);
9443
9444 if (TYPE_PACKED (TREE_TYPE (TREE_OPERAND (exp, 0)))
9445 || (TREE_CODE (TREE_OPERAND (exp, 1)) == FIELD_DECL
9446 && DECL_PACKED (TREE_OPERAND (exp, 1))))
9447 packedp = true;
9448
9449 /* If TEM's type is a union of variable size, pass TARGET to the inner
9450 computation, since it will need a temporary and TARGET is known
9451 to have to do. This occurs in unchecked conversion in Ada. */
9452 orig_op0 = op0
9453 = expand_expr (tem,
9454 (TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE
9455 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem)))
9456 != INTEGER_CST)
9457 && modifier != EXPAND_STACK_PARM
9458 ? target : NULL_RTX),
9459 VOIDmode,
9460 (modifier == EXPAND_INITIALIZER
9461 || modifier == EXPAND_CONST_ADDRESS
9462 || modifier == EXPAND_STACK_PARM)
9463 ? modifier : EXPAND_NORMAL);
9464
9465
9466 /* If the bitfield is volatile, we want to access it in the
9467 field's mode, not the computed mode.
9468 If a MEM has VOIDmode (external with incomplete type),
9469 use BLKmode for it instead. */
9470 if (MEM_P (op0))
9471 {
9472 if (volatilep && flag_strict_volatile_bitfields > 0)
9473 op0 = adjust_address (op0, mode1, 0);
9474 else if (GET_MODE (op0) == VOIDmode)
9475 op0 = adjust_address (op0, BLKmode, 0);
9476 }
9477
9478 mode2
9479 = CONSTANT_P (op0) ? TYPE_MODE (TREE_TYPE (tem)) : GET_MODE (op0);
9480
9481 /* If we have either an offset, a BLKmode result, or a reference
9482 outside the underlying object, we must force it to memory.
9483 Such a case can occur in Ada if we have unchecked conversion
9484 of an expression from a scalar type to an aggregate type or
9485 for an ARRAY_RANGE_REF whose type is BLKmode, or if we were
9486 passed a partially uninitialized object or a view-conversion
9487 to a larger size. */
9488 must_force_mem = (offset
9489 || mode1 == BLKmode
9490 || bitpos + bitsize > GET_MODE_BITSIZE (mode2));
9491
9492 /* Handle CONCAT first. */
9493 if (GET_CODE (op0) == CONCAT && !must_force_mem)
9494 {
9495 if (bitpos == 0
9496 && bitsize == GET_MODE_BITSIZE (GET_MODE (op0)))
9497 return op0;
9498 if (bitpos == 0
9499 && bitsize == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 0)))
9500 && bitsize)
9501 {
9502 op0 = XEXP (op0, 0);
9503 mode2 = GET_MODE (op0);
9504 }
9505 else if (bitpos == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 0)))
9506 && bitsize == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 1)))
9507 && bitpos
9508 && bitsize)
9509 {
9510 op0 = XEXP (op0, 1);
9511 bitpos = 0;
9512 mode2 = GET_MODE (op0);
9513 }
9514 else
9515 /* Otherwise force into memory. */
9516 must_force_mem = 1;
9517 }
9518
9519 /* If this is a constant, put it in a register if it is a legitimate
9520 constant and we don't need a memory reference. */
9521 if (CONSTANT_P (op0)
9522 && mode2 != BLKmode
9523 && targetm.legitimate_constant_p (mode2, op0)
9524 && !must_force_mem)
9525 op0 = force_reg (mode2, op0);
9526
9527 /* Otherwise, if this is a constant, try to force it to the constant
9528 pool. Note that back-ends, e.g. MIPS, may refuse to do so if it
9529 is a legitimate constant. */
9530 else if (CONSTANT_P (op0) && (memloc = force_const_mem (mode2, op0)))
9531 op0 = validize_mem (memloc);
9532
9533 /* Otherwise, if this is a constant or the object is not in memory
9534 and need be, put it there. */
9535 else if (CONSTANT_P (op0) || (!MEM_P (op0) && must_force_mem))
9536 {
9537 tree nt = build_qualified_type (TREE_TYPE (tem),
9538 (TYPE_QUALS (TREE_TYPE (tem))
9539 | TYPE_QUAL_CONST));
9540 memloc = assign_temp (nt, 1, 1, 1);
9541 emit_move_insn (memloc, op0);
9542 op0 = memloc;
9543 }
9544
9545 if (offset)
9546 {
9547 enum machine_mode address_mode;
9548 rtx offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode,
9549 EXPAND_SUM);
9550
9551 gcc_assert (MEM_P (op0));
9552
9553 address_mode
9554 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (op0));
9555 if (GET_MODE (offset_rtx) != address_mode)
9556 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
9557
9558 if (GET_MODE (op0) == BLKmode
9559 /* A constant address in OP0 can have VOIDmode, we must
9560 not try to call force_reg in that case. */
9561 && GET_MODE (XEXP (op0, 0)) != VOIDmode
9562 && bitsize != 0
9563 && (bitpos % bitsize) == 0
9564 && (bitsize % GET_MODE_ALIGNMENT (mode1)) == 0
9565 && MEM_ALIGN (op0) == GET_MODE_ALIGNMENT (mode1))
9566 {
9567 op0 = adjust_address (op0, mode1, bitpos / BITS_PER_UNIT);
9568 bitpos = 0;
9569 }
9570
9571 op0 = offset_address (op0, offset_rtx,
9572 highest_pow2_factor (offset));
9573 }
9574
9575 /* If OFFSET is making OP0 more aligned than BIGGEST_ALIGNMENT,
9576 record its alignment as BIGGEST_ALIGNMENT. */
9577 if (MEM_P (op0) && bitpos == 0 && offset != 0
9578 && is_aligning_offset (offset, tem))
9579 set_mem_align (op0, BIGGEST_ALIGNMENT);
9580
9581 /* Don't forget about volatility even if this is a bitfield. */
9582 if (MEM_P (op0) && volatilep && ! MEM_VOLATILE_P (op0))
9583 {
9584 if (op0 == orig_op0)
9585 op0 = copy_rtx (op0);
9586
9587 MEM_VOLATILE_P (op0) = 1;
9588 }
9589
9590 /* In cases where an aligned union has an unaligned object
9591 as a field, we might be extracting a BLKmode value from
9592 an integer-mode (e.g., SImode) object. Handle this case
9593 by doing the extract into an object as wide as the field
9594 (which we know to be the width of a basic mode), then
9595 storing into memory, and changing the mode to BLKmode. */
9596 if (mode1 == VOIDmode
9597 || REG_P (op0) || GET_CODE (op0) == SUBREG
9598 || (mode1 != BLKmode && ! direct_load[(int) mode1]
9599 && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
9600 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT
9601 && modifier != EXPAND_CONST_ADDRESS
9602 && modifier != EXPAND_INITIALIZER)
9603 /* If the field is volatile, we always want an aligned
9604 access. Only do this if the access is not already naturally
9605 aligned, otherwise "normal" (non-bitfield) volatile fields
9606 become non-addressable. */
9607 || (volatilep && flag_strict_volatile_bitfields > 0
9608 && (bitpos % GET_MODE_ALIGNMENT (mode) != 0))
9609 /* If the field isn't aligned enough to fetch as a memref,
9610 fetch it as a bit field. */
9611 || (mode1 != BLKmode
9612 && (((TYPE_ALIGN (TREE_TYPE (tem)) < GET_MODE_ALIGNMENT (mode)
9613 || (bitpos % GET_MODE_ALIGNMENT (mode) != 0)
9614 || (MEM_P (op0)
9615 && (MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode1)
9616 || (bitpos % GET_MODE_ALIGNMENT (mode1) != 0))))
9617 && ((modifier == EXPAND_CONST_ADDRESS
9618 || modifier == EXPAND_INITIALIZER)
9619 ? STRICT_ALIGNMENT
9620 : SLOW_UNALIGNED_ACCESS (mode1, MEM_ALIGN (op0))))
9621 || (bitpos % BITS_PER_UNIT != 0)))
9622 /* If the type and the field are a constant size and the
9623 size of the type isn't the same size as the bitfield,
9624 we must use bitfield operations. */
9625 || (bitsize >= 0
9626 && TYPE_SIZE (TREE_TYPE (exp))
9627 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
9628 && 0 != compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)),
9629 bitsize)))
9630 {
9631 enum machine_mode ext_mode = mode;
9632
9633 if (ext_mode == BLKmode
9634 && ! (target != 0 && MEM_P (op0)
9635 && MEM_P (target)
9636 && bitpos % BITS_PER_UNIT == 0))
9637 ext_mode = mode_for_size (bitsize, MODE_INT, 1);
9638
9639 if (ext_mode == BLKmode)
9640 {
9641 if (target == 0)
9642 target = assign_temp (type, 0, 1, 1);
9643
9644 if (bitsize == 0)
9645 return target;
9646
9647 /* In this case, BITPOS must start at a byte boundary and
9648 TARGET, if specified, must be a MEM. */
9649 gcc_assert (MEM_P (op0)
9650 && (!target || MEM_P (target))
9651 && !(bitpos % BITS_PER_UNIT));
9652
9653 emit_block_move (target,
9654 adjust_address (op0, VOIDmode,
9655 bitpos / BITS_PER_UNIT),
9656 GEN_INT ((bitsize + BITS_PER_UNIT - 1)
9657 / BITS_PER_UNIT),
9658 (modifier == EXPAND_STACK_PARM
9659 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
9660
9661 return target;
9662 }
9663
9664 op0 = validize_mem (op0);
9665
9666 if (MEM_P (op0) && REG_P (XEXP (op0, 0)))
9667 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
9668
9669 op0 = extract_bit_field (op0, bitsize, bitpos, unsignedp, packedp,
9670 (modifier == EXPAND_STACK_PARM
9671 ? NULL_RTX : target),
9672 ext_mode, ext_mode);
9673
9674 /* If the result is a record type and BITSIZE is narrower than
9675 the mode of OP0, an integral mode, and this is a big endian
9676 machine, we must put the field into the high-order bits. */
9677 if (TREE_CODE (type) == RECORD_TYPE && BYTES_BIG_ENDIAN
9678 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT
9679 && bitsize < (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (op0)))
9680 op0 = expand_shift (LSHIFT_EXPR, GET_MODE (op0), op0,
9681 GET_MODE_BITSIZE (GET_MODE (op0))
9682 - bitsize, op0, 1);
9683
9684 /* If the result type is BLKmode, store the data into a temporary
9685 of the appropriate type, but with the mode corresponding to the
9686 mode for the data we have (op0's mode). It's tempting to make
9687 this a constant type, since we know it's only being stored once,
9688 but that can cause problems if we are taking the address of this
9689 COMPONENT_REF because the MEM of any reference via that address
9690 will have flags corresponding to the type, which will not
9691 necessarily be constant. */
9692 if (mode == BLKmode)
9693 {
9694 HOST_WIDE_INT size = GET_MODE_BITSIZE (ext_mode);
9695 rtx new_rtx;
9696
9697 /* If the reference doesn't use the alias set of its type,
9698 we cannot create the temporary using that type. */
9699 if (component_uses_parent_alias_set (exp))
9700 {
9701 new_rtx = assign_stack_local (ext_mode, size, 0);
9702 set_mem_alias_set (new_rtx, get_alias_set (exp));
9703 }
9704 else
9705 new_rtx = assign_stack_temp_for_type (ext_mode, size, 0, type);
9706
9707 emit_move_insn (new_rtx, op0);
9708 op0 = copy_rtx (new_rtx);
9709 PUT_MODE (op0, BLKmode);
9710 set_mem_attributes (op0, exp, 1);
9711 }
9712
9713 return op0;
9714 }
9715
9716 /* If the result is BLKmode, use that to access the object
9717 now as well. */
9718 if (mode == BLKmode)
9719 mode1 = BLKmode;
9720
9721 /* Get a reference to just this component. */
9722 if (modifier == EXPAND_CONST_ADDRESS
9723 || modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
9724 op0 = adjust_address_nv (op0, mode1, bitpos / BITS_PER_UNIT);
9725 else
9726 op0 = adjust_address (op0, mode1, bitpos / BITS_PER_UNIT);
9727
9728 if (op0 == orig_op0)
9729 op0 = copy_rtx (op0);
9730
9731 set_mem_attributes (op0, exp, 0);
9732 if (REG_P (XEXP (op0, 0)))
9733 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
9734
9735 MEM_VOLATILE_P (op0) |= volatilep;
9736 if (mode == mode1 || mode1 == BLKmode || mode1 == tmode
9737 || modifier == EXPAND_CONST_ADDRESS
9738 || modifier == EXPAND_INITIALIZER)
9739 return op0;
9740 else if (target == 0)
9741 target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode);
9742
9743 convert_move (target, op0, unsignedp);
9744 return target;
9745 }
9746
9747 case OBJ_TYPE_REF:
9748 return expand_expr (OBJ_TYPE_REF_EXPR (exp), target, tmode, modifier);
9749
9750 case CALL_EXPR:
9751 /* All valid uses of __builtin_va_arg_pack () are removed during
9752 inlining. */
9753 if (CALL_EXPR_VA_ARG_PACK (exp))
9754 error ("%Kinvalid use of %<__builtin_va_arg_pack ()%>", exp);
9755 {
9756 tree fndecl = get_callee_fndecl (exp), attr;
9757
9758 if (fndecl
9759 && (attr = lookup_attribute ("error",
9760 DECL_ATTRIBUTES (fndecl))) != NULL)
9761 error ("%Kcall to %qs declared with attribute error: %s",
9762 exp, identifier_to_locale (lang_hooks.decl_printable_name (fndecl, 1)),
9763 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr))));
9764 if (fndecl
9765 && (attr = lookup_attribute ("warning",
9766 DECL_ATTRIBUTES (fndecl))) != NULL)
9767 warning_at (tree_nonartificial_location (exp),
9768 0, "%Kcall to %qs declared with attribute warning: %s",
9769 exp, identifier_to_locale (lang_hooks.decl_printable_name (fndecl, 1)),
9770 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr))));
9771
9772 /* Check for a built-in function. */
9773 if (fndecl && DECL_BUILT_IN (fndecl))
9774 {
9775 gcc_assert (DECL_BUILT_IN_CLASS (fndecl) != BUILT_IN_FRONTEND);
9776 return expand_builtin (exp, target, subtarget, tmode, ignore);
9777 }
9778 }
9779 return expand_call (exp, target, ignore);
9780
9781 case VIEW_CONVERT_EXPR:
9782 op0 = NULL_RTX;
9783
9784 /* If we are converting to BLKmode, try to avoid an intermediate
9785 temporary by fetching an inner memory reference. */
9786 if (mode == BLKmode
9787 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
9788 && TYPE_MODE (TREE_TYPE (treeop0)) != BLKmode
9789 && handled_component_p (treeop0))
9790 {
9791 enum machine_mode mode1;
9792 HOST_WIDE_INT bitsize, bitpos;
9793 tree offset;
9794 int unsignedp;
9795 int volatilep = 0;
9796 tree tem
9797 = get_inner_reference (treeop0, &bitsize, &bitpos,
9798 &offset, &mode1, &unsignedp, &volatilep,
9799 true);
9800 rtx orig_op0;
9801
9802 /* ??? We should work harder and deal with non-zero offsets. */
9803 if (!offset
9804 && (bitpos % BITS_PER_UNIT) == 0
9805 && bitsize >= 0
9806 && compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)), bitsize) == 0)
9807 {
9808 /* See the normal_inner_ref case for the rationale. */
9809 orig_op0
9810 = expand_expr (tem,
9811 (TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE
9812 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem)))
9813 != INTEGER_CST)
9814 && modifier != EXPAND_STACK_PARM
9815 ? target : NULL_RTX),
9816 VOIDmode,
9817 (modifier == EXPAND_INITIALIZER
9818 || modifier == EXPAND_CONST_ADDRESS
9819 || modifier == EXPAND_STACK_PARM)
9820 ? modifier : EXPAND_NORMAL);
9821
9822 if (MEM_P (orig_op0))
9823 {
9824 op0 = orig_op0;
9825
9826 /* Get a reference to just this component. */
9827 if (modifier == EXPAND_CONST_ADDRESS
9828 || modifier == EXPAND_SUM
9829 || modifier == EXPAND_INITIALIZER)
9830 op0 = adjust_address_nv (op0, mode, bitpos / BITS_PER_UNIT);
9831 else
9832 op0 = adjust_address (op0, mode, bitpos / BITS_PER_UNIT);
9833
9834 if (op0 == orig_op0)
9835 op0 = copy_rtx (op0);
9836
9837 set_mem_attributes (op0, treeop0, 0);
9838 if (REG_P (XEXP (op0, 0)))
9839 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
9840
9841 MEM_VOLATILE_P (op0) |= volatilep;
9842 }
9843 }
9844 }
9845
9846 if (!op0)
9847 op0 = expand_expr (treeop0,
9848 NULL_RTX, VOIDmode, modifier);
9849
9850 /* If the input and output modes are both the same, we are done. */
9851 if (mode == GET_MODE (op0))
9852 ;
9853 /* If neither mode is BLKmode, and both modes are the same size
9854 then we can use gen_lowpart. */
9855 else if (mode != BLKmode && GET_MODE (op0) != BLKmode
9856 && (GET_MODE_PRECISION (mode)
9857 == GET_MODE_PRECISION (GET_MODE (op0)))
9858 && !COMPLEX_MODE_P (GET_MODE (op0)))
9859 {
9860 if (GET_CODE (op0) == SUBREG)
9861 op0 = force_reg (GET_MODE (op0), op0);
9862 temp = gen_lowpart_common (mode, op0);
9863 if (temp)
9864 op0 = temp;
9865 else
9866 {
9867 if (!REG_P (op0) && !MEM_P (op0))
9868 op0 = force_reg (GET_MODE (op0), op0);
9869 op0 = gen_lowpart (mode, op0);
9870 }
9871 }
9872 /* If both types are integral, convert from one mode to the other. */
9873 else if (INTEGRAL_TYPE_P (type) && INTEGRAL_TYPE_P (TREE_TYPE (treeop0)))
9874 op0 = convert_modes (mode, GET_MODE (op0), op0,
9875 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
9876 /* As a last resort, spill op0 to memory, and reload it in a
9877 different mode. */
9878 else if (!MEM_P (op0))
9879 {
9880 /* If the operand is not a MEM, force it into memory. Since we
9881 are going to be changing the mode of the MEM, don't call
9882 force_const_mem for constants because we don't allow pool
9883 constants to change mode. */
9884 tree inner_type = TREE_TYPE (treeop0);
9885
9886 gcc_assert (!TREE_ADDRESSABLE (exp));
9887
9888 if (target == 0 || GET_MODE (target) != TYPE_MODE (inner_type))
9889 target
9890 = assign_stack_temp_for_type
9891 (TYPE_MODE (inner_type),
9892 GET_MODE_SIZE (TYPE_MODE (inner_type)), 0, inner_type);
9893
9894 emit_move_insn (target, op0);
9895 op0 = target;
9896 }
9897
9898 /* At this point, OP0 is in the correct mode. If the output type is
9899 such that the operand is known to be aligned, indicate that it is.
9900 Otherwise, we need only be concerned about alignment for non-BLKmode
9901 results. */
9902 if (MEM_P (op0))
9903 {
9904 op0 = copy_rtx (op0);
9905
9906 if (TYPE_ALIGN_OK (type))
9907 set_mem_align (op0, MAX (MEM_ALIGN (op0), TYPE_ALIGN (type)));
9908 else if (STRICT_ALIGNMENT
9909 && mode != BLKmode
9910 && MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode))
9911 {
9912 tree inner_type = TREE_TYPE (treeop0);
9913 HOST_WIDE_INT temp_size
9914 = MAX (int_size_in_bytes (inner_type),
9915 (HOST_WIDE_INT) GET_MODE_SIZE (mode));
9916 rtx new_rtx
9917 = assign_stack_temp_for_type (mode, temp_size, 0, type);
9918 rtx new_with_op0_mode
9919 = adjust_address (new_rtx, GET_MODE (op0), 0);
9920
9921 gcc_assert (!TREE_ADDRESSABLE (exp));
9922
9923 if (GET_MODE (op0) == BLKmode)
9924 emit_block_move (new_with_op0_mode, op0,
9925 GEN_INT (GET_MODE_SIZE (mode)),
9926 (modifier == EXPAND_STACK_PARM
9927 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
9928 else
9929 emit_move_insn (new_with_op0_mode, op0);
9930
9931 op0 = new_rtx;
9932 }
9933
9934 op0 = adjust_address (op0, mode, 0);
9935 }
9936
9937 return op0;
9938
9939 case MODIFY_EXPR:
9940 {
9941 tree lhs = treeop0;
9942 tree rhs = treeop1;
9943 gcc_assert (ignore);
9944
9945 /* Check for |= or &= of a bitfield of size one into another bitfield
9946 of size 1. In this case, (unless we need the result of the
9947 assignment) we can do this more efficiently with a
9948 test followed by an assignment, if necessary.
9949
9950 ??? At this point, we can't get a BIT_FIELD_REF here. But if
9951 things change so we do, this code should be enhanced to
9952 support it. */
9953 if (TREE_CODE (lhs) == COMPONENT_REF
9954 && (TREE_CODE (rhs) == BIT_IOR_EXPR
9955 || TREE_CODE (rhs) == BIT_AND_EXPR)
9956 && TREE_OPERAND (rhs, 0) == lhs
9957 && TREE_CODE (TREE_OPERAND (rhs, 1)) == COMPONENT_REF
9958 && integer_onep (DECL_SIZE (TREE_OPERAND (lhs, 1)))
9959 && integer_onep (DECL_SIZE (TREE_OPERAND (TREE_OPERAND (rhs, 1), 1))))
9960 {
9961 rtx label = gen_label_rtx ();
9962 int value = TREE_CODE (rhs) == BIT_IOR_EXPR;
9963 do_jump (TREE_OPERAND (rhs, 1),
9964 value ? label : 0,
9965 value ? 0 : label, -1);
9966 expand_assignment (lhs, build_int_cst (TREE_TYPE (rhs), value),
9967 MOVE_NONTEMPORAL (exp));
9968 do_pending_stack_adjust ();
9969 emit_label (label);
9970 return const0_rtx;
9971 }
9972
9973 expand_assignment (lhs, rhs, MOVE_NONTEMPORAL (exp));
9974 return const0_rtx;
9975 }
9976
9977 case ADDR_EXPR:
9978 return expand_expr_addr_expr (exp, target, tmode, modifier);
9979
9980 case REALPART_EXPR:
9981 op0 = expand_normal (treeop0);
9982 return read_complex_part (op0, false);
9983
9984 case IMAGPART_EXPR:
9985 op0 = expand_normal (treeop0);
9986 return read_complex_part (op0, true);
9987
9988 case RETURN_EXPR:
9989 case LABEL_EXPR:
9990 case GOTO_EXPR:
9991 case SWITCH_EXPR:
9992 case ASM_EXPR:
9993 /* Expanded in cfgexpand.c. */
9994 gcc_unreachable ();
9995
9996 case TRY_CATCH_EXPR:
9997 case CATCH_EXPR:
9998 case EH_FILTER_EXPR:
9999 case TRY_FINALLY_EXPR:
10000 /* Lowered by tree-eh.c. */
10001 gcc_unreachable ();
10002
10003 case WITH_CLEANUP_EXPR:
10004 case CLEANUP_POINT_EXPR:
10005 case TARGET_EXPR:
10006 case CASE_LABEL_EXPR:
10007 case VA_ARG_EXPR:
10008 case BIND_EXPR:
10009 case INIT_EXPR:
10010 case CONJ_EXPR:
10011 case COMPOUND_EXPR:
10012 case PREINCREMENT_EXPR:
10013 case PREDECREMENT_EXPR:
10014 case POSTINCREMENT_EXPR:
10015 case POSTDECREMENT_EXPR:
10016 case LOOP_EXPR:
10017 case EXIT_EXPR:
10018 /* Lowered by gimplify.c. */
10019 gcc_unreachable ();
10020
10021 case FDESC_EXPR:
10022 /* Function descriptors are not valid except for as
10023 initialization constants, and should not be expanded. */
10024 gcc_unreachable ();
10025
10026 case WITH_SIZE_EXPR:
10027 /* WITH_SIZE_EXPR expands to its first argument. The caller should
10028 have pulled out the size to use in whatever context it needed. */
10029 return expand_expr_real (treeop0, original_target, tmode,
10030 modifier, alt_rtl);
10031
10032 case COMPOUND_LITERAL_EXPR:
10033 {
10034 /* Initialize the anonymous variable declared in the compound
10035 literal, then return the variable. */
10036 tree decl = COMPOUND_LITERAL_EXPR_DECL (exp);
10037
10038 /* Create RTL for this variable. */
10039 if (!DECL_RTL_SET_P (decl))
10040 {
10041 if (DECL_HARD_REGISTER (decl))
10042 /* The user specified an assembler name for this variable.
10043 Set that up now. */
10044 rest_of_decl_compilation (decl, 0, 0);
10045 else
10046 expand_decl (decl);
10047 }
10048
10049 return expand_expr_real (decl, original_target, tmode,
10050 modifier, alt_rtl);
10051 }
10052
10053 default:
10054 return expand_expr_real_2 (&ops, target, tmode, modifier);
10055 }
10056 }
10057 \f
10058 /* Subroutine of above: reduce EXP to the precision of TYPE (in the
10059 signedness of TYPE), possibly returning the result in TARGET. */
10060 static rtx
10061 reduce_to_bit_field_precision (rtx exp, rtx target, tree type)
10062 {
10063 HOST_WIDE_INT prec = TYPE_PRECISION (type);
10064 if (target && GET_MODE (target) != GET_MODE (exp))
10065 target = 0;
10066 /* For constant values, reduce using build_int_cst_type. */
10067 if (CONST_INT_P (exp))
10068 {
10069 HOST_WIDE_INT value = INTVAL (exp);
10070 tree t = build_int_cst_type (type, value);
10071 return expand_expr (t, target, VOIDmode, EXPAND_NORMAL);
10072 }
10073 else if (TYPE_UNSIGNED (type))
10074 {
10075 rtx mask = immed_double_int_const (double_int_mask (prec),
10076 GET_MODE (exp));
10077 return expand_and (GET_MODE (exp), exp, mask, target);
10078 }
10079 else
10080 {
10081 int count = GET_MODE_PRECISION (GET_MODE (exp)) - prec;
10082 exp = expand_shift (LSHIFT_EXPR, GET_MODE (exp),
10083 exp, count, target, 0);
10084 return expand_shift (RSHIFT_EXPR, GET_MODE (exp),
10085 exp, count, target, 0);
10086 }
10087 }
10088 \f
10089 /* Subroutine of above: returns 1 if OFFSET corresponds to an offset that
10090 when applied to the address of EXP produces an address known to be
10091 aligned more than BIGGEST_ALIGNMENT. */
10092
10093 static int
10094 is_aligning_offset (const_tree offset, const_tree exp)
10095 {
10096 /* Strip off any conversions. */
10097 while (CONVERT_EXPR_P (offset))
10098 offset = TREE_OPERAND (offset, 0);
10099
10100 /* We must now have a BIT_AND_EXPR with a constant that is one less than
10101 power of 2 and which is larger than BIGGEST_ALIGNMENT. */
10102 if (TREE_CODE (offset) != BIT_AND_EXPR
10103 || !host_integerp (TREE_OPERAND (offset, 1), 1)
10104 || compare_tree_int (TREE_OPERAND (offset, 1),
10105 BIGGEST_ALIGNMENT / BITS_PER_UNIT) <= 0
10106 || !exact_log2 (tree_low_cst (TREE_OPERAND (offset, 1), 1) + 1) < 0)
10107 return 0;
10108
10109 /* Look at the first operand of BIT_AND_EXPR and strip any conversion.
10110 It must be NEGATE_EXPR. Then strip any more conversions. */
10111 offset = TREE_OPERAND (offset, 0);
10112 while (CONVERT_EXPR_P (offset))
10113 offset = TREE_OPERAND (offset, 0);
10114
10115 if (TREE_CODE (offset) != NEGATE_EXPR)
10116 return 0;
10117
10118 offset = TREE_OPERAND (offset, 0);
10119 while (CONVERT_EXPR_P (offset))
10120 offset = TREE_OPERAND (offset, 0);
10121
10122 /* This must now be the address of EXP. */
10123 return TREE_CODE (offset) == ADDR_EXPR && TREE_OPERAND (offset, 0) == exp;
10124 }
10125 \f
10126 /* Return the tree node if an ARG corresponds to a string constant or zero
10127 if it doesn't. If we return nonzero, set *PTR_OFFSET to the offset
10128 in bytes within the string that ARG is accessing. The type of the
10129 offset will be `sizetype'. */
10130
10131 tree
10132 string_constant (tree arg, tree *ptr_offset)
10133 {
10134 tree array, offset, lower_bound;
10135 STRIP_NOPS (arg);
10136
10137 if (TREE_CODE (arg) == ADDR_EXPR)
10138 {
10139 if (TREE_CODE (TREE_OPERAND (arg, 0)) == STRING_CST)
10140 {
10141 *ptr_offset = size_zero_node;
10142 return TREE_OPERAND (arg, 0);
10143 }
10144 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == VAR_DECL)
10145 {
10146 array = TREE_OPERAND (arg, 0);
10147 offset = size_zero_node;
10148 }
10149 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == ARRAY_REF)
10150 {
10151 array = TREE_OPERAND (TREE_OPERAND (arg, 0), 0);
10152 offset = TREE_OPERAND (TREE_OPERAND (arg, 0), 1);
10153 if (TREE_CODE (array) != STRING_CST
10154 && TREE_CODE (array) != VAR_DECL)
10155 return 0;
10156
10157 /* Check if the array has a nonzero lower bound. */
10158 lower_bound = array_ref_low_bound (TREE_OPERAND (arg, 0));
10159 if (!integer_zerop (lower_bound))
10160 {
10161 /* If the offset and base aren't both constants, return 0. */
10162 if (TREE_CODE (lower_bound) != INTEGER_CST)
10163 return 0;
10164 if (TREE_CODE (offset) != INTEGER_CST)
10165 return 0;
10166 /* Adjust offset by the lower bound. */
10167 offset = size_diffop (fold_convert (sizetype, offset),
10168 fold_convert (sizetype, lower_bound));
10169 }
10170 }
10171 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == MEM_REF)
10172 {
10173 array = TREE_OPERAND (TREE_OPERAND (arg, 0), 0);
10174 offset = TREE_OPERAND (TREE_OPERAND (arg, 0), 1);
10175 if (TREE_CODE (array) != ADDR_EXPR)
10176 return 0;
10177 array = TREE_OPERAND (array, 0);
10178 if (TREE_CODE (array) != STRING_CST
10179 && TREE_CODE (array) != VAR_DECL)
10180 return 0;
10181 }
10182 else
10183 return 0;
10184 }
10185 else if (TREE_CODE (arg) == PLUS_EXPR || TREE_CODE (arg) == POINTER_PLUS_EXPR)
10186 {
10187 tree arg0 = TREE_OPERAND (arg, 0);
10188 tree arg1 = TREE_OPERAND (arg, 1);
10189
10190 STRIP_NOPS (arg0);
10191 STRIP_NOPS (arg1);
10192
10193 if (TREE_CODE (arg0) == ADDR_EXPR
10194 && (TREE_CODE (TREE_OPERAND (arg0, 0)) == STRING_CST
10195 || TREE_CODE (TREE_OPERAND (arg0, 0)) == VAR_DECL))
10196 {
10197 array = TREE_OPERAND (arg0, 0);
10198 offset = arg1;
10199 }
10200 else if (TREE_CODE (arg1) == ADDR_EXPR
10201 && (TREE_CODE (TREE_OPERAND (arg1, 0)) == STRING_CST
10202 || TREE_CODE (TREE_OPERAND (arg1, 0)) == VAR_DECL))
10203 {
10204 array = TREE_OPERAND (arg1, 0);
10205 offset = arg0;
10206 }
10207 else
10208 return 0;
10209 }
10210 else
10211 return 0;
10212
10213 if (TREE_CODE (array) == STRING_CST)
10214 {
10215 *ptr_offset = fold_convert (sizetype, offset);
10216 return array;
10217 }
10218 else if (TREE_CODE (array) == VAR_DECL
10219 || TREE_CODE (array) == CONST_DECL)
10220 {
10221 int length;
10222
10223 /* Variables initialized to string literals can be handled too. */
10224 if (!const_value_known_p (array)
10225 || !DECL_INITIAL (array)
10226 || TREE_CODE (DECL_INITIAL (array)) != STRING_CST)
10227 return 0;
10228
10229 /* Avoid const char foo[4] = "abcde"; */
10230 if (DECL_SIZE_UNIT (array) == NULL_TREE
10231 || TREE_CODE (DECL_SIZE_UNIT (array)) != INTEGER_CST
10232 || (length = TREE_STRING_LENGTH (DECL_INITIAL (array))) <= 0
10233 || compare_tree_int (DECL_SIZE_UNIT (array), length) < 0)
10234 return 0;
10235
10236 /* If variable is bigger than the string literal, OFFSET must be constant
10237 and inside of the bounds of the string literal. */
10238 offset = fold_convert (sizetype, offset);
10239 if (compare_tree_int (DECL_SIZE_UNIT (array), length) > 0
10240 && (! host_integerp (offset, 1)
10241 || compare_tree_int (offset, length) >= 0))
10242 return 0;
10243
10244 *ptr_offset = offset;
10245 return DECL_INITIAL (array);
10246 }
10247
10248 return 0;
10249 }
10250 \f
10251 /* Generate code to calculate OPS, and exploded expression
10252 using a store-flag instruction and return an rtx for the result.
10253 OPS reflects a comparison.
10254
10255 If TARGET is nonzero, store the result there if convenient.
10256
10257 Return zero if there is no suitable set-flag instruction
10258 available on this machine.
10259
10260 Once expand_expr has been called on the arguments of the comparison,
10261 we are committed to doing the store flag, since it is not safe to
10262 re-evaluate the expression. We emit the store-flag insn by calling
10263 emit_store_flag, but only expand the arguments if we have a reason
10264 to believe that emit_store_flag will be successful. If we think that
10265 it will, but it isn't, we have to simulate the store-flag with a
10266 set/jump/set sequence. */
10267
10268 static rtx
10269 do_store_flag (sepops ops, rtx target, enum machine_mode mode)
10270 {
10271 enum rtx_code code;
10272 tree arg0, arg1, type;
10273 tree tem;
10274 enum machine_mode operand_mode;
10275 int unsignedp;
10276 rtx op0, op1;
10277 rtx subtarget = target;
10278 location_t loc = ops->location;
10279
10280 arg0 = ops->op0;
10281 arg1 = ops->op1;
10282
10283 /* Don't crash if the comparison was erroneous. */
10284 if (arg0 == error_mark_node || arg1 == error_mark_node)
10285 return const0_rtx;
10286
10287 type = TREE_TYPE (arg0);
10288 operand_mode = TYPE_MODE (type);
10289 unsignedp = TYPE_UNSIGNED (type);
10290
10291 /* We won't bother with BLKmode store-flag operations because it would mean
10292 passing a lot of information to emit_store_flag. */
10293 if (operand_mode == BLKmode)
10294 return 0;
10295
10296 /* We won't bother with store-flag operations involving function pointers
10297 when function pointers must be canonicalized before comparisons. */
10298 #ifdef HAVE_canonicalize_funcptr_for_compare
10299 if (HAVE_canonicalize_funcptr_for_compare
10300 && ((TREE_CODE (TREE_TYPE (arg0)) == POINTER_TYPE
10301 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg0)))
10302 == FUNCTION_TYPE))
10303 || (TREE_CODE (TREE_TYPE (arg1)) == POINTER_TYPE
10304 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg1)))
10305 == FUNCTION_TYPE))))
10306 return 0;
10307 #endif
10308
10309 STRIP_NOPS (arg0);
10310 STRIP_NOPS (arg1);
10311
10312 /* Get the rtx comparison code to use. We know that EXP is a comparison
10313 operation of some type. Some comparisons against 1 and -1 can be
10314 converted to comparisons with zero. Do so here so that the tests
10315 below will be aware that we have a comparison with zero. These
10316 tests will not catch constants in the first operand, but constants
10317 are rarely passed as the first operand. */
10318
10319 switch (ops->code)
10320 {
10321 case EQ_EXPR:
10322 code = EQ;
10323 break;
10324 case NE_EXPR:
10325 code = NE;
10326 break;
10327 case LT_EXPR:
10328 if (integer_onep (arg1))
10329 arg1 = integer_zero_node, code = unsignedp ? LEU : LE;
10330 else
10331 code = unsignedp ? LTU : LT;
10332 break;
10333 case LE_EXPR:
10334 if (! unsignedp && integer_all_onesp (arg1))
10335 arg1 = integer_zero_node, code = LT;
10336 else
10337 code = unsignedp ? LEU : LE;
10338 break;
10339 case GT_EXPR:
10340 if (! unsignedp && integer_all_onesp (arg1))
10341 arg1 = integer_zero_node, code = GE;
10342 else
10343 code = unsignedp ? GTU : GT;
10344 break;
10345 case GE_EXPR:
10346 if (integer_onep (arg1))
10347 arg1 = integer_zero_node, code = unsignedp ? GTU : GT;
10348 else
10349 code = unsignedp ? GEU : GE;
10350 break;
10351
10352 case UNORDERED_EXPR:
10353 code = UNORDERED;
10354 break;
10355 case ORDERED_EXPR:
10356 code = ORDERED;
10357 break;
10358 case UNLT_EXPR:
10359 code = UNLT;
10360 break;
10361 case UNLE_EXPR:
10362 code = UNLE;
10363 break;
10364 case UNGT_EXPR:
10365 code = UNGT;
10366 break;
10367 case UNGE_EXPR:
10368 code = UNGE;
10369 break;
10370 case UNEQ_EXPR:
10371 code = UNEQ;
10372 break;
10373 case LTGT_EXPR:
10374 code = LTGT;
10375 break;
10376
10377 default:
10378 gcc_unreachable ();
10379 }
10380
10381 /* Put a constant second. */
10382 if (TREE_CODE (arg0) == REAL_CST || TREE_CODE (arg0) == INTEGER_CST
10383 || TREE_CODE (arg0) == FIXED_CST)
10384 {
10385 tem = arg0; arg0 = arg1; arg1 = tem;
10386 code = swap_condition (code);
10387 }
10388
10389 /* If this is an equality or inequality test of a single bit, we can
10390 do this by shifting the bit being tested to the low-order bit and
10391 masking the result with the constant 1. If the condition was EQ,
10392 we xor it with 1. This does not require an scc insn and is faster
10393 than an scc insn even if we have it.
10394
10395 The code to make this transformation was moved into fold_single_bit_test,
10396 so we just call into the folder and expand its result. */
10397
10398 if ((code == NE || code == EQ)
10399 && TREE_CODE (arg0) == BIT_AND_EXPR && integer_zerop (arg1)
10400 && integer_pow2p (TREE_OPERAND (arg0, 1))
10401 && (TYPE_PRECISION (ops->type) != 1 || TYPE_UNSIGNED (ops->type)))
10402 {
10403 tree type = lang_hooks.types.type_for_mode (mode, unsignedp);
10404 return expand_expr (fold_single_bit_test (loc,
10405 code == NE ? NE_EXPR : EQ_EXPR,
10406 arg0, arg1, type),
10407 target, VOIDmode, EXPAND_NORMAL);
10408 }
10409
10410 if (! get_subtarget (target)
10411 || GET_MODE (subtarget) != operand_mode)
10412 subtarget = 0;
10413
10414 expand_operands (arg0, arg1, subtarget, &op0, &op1, EXPAND_NORMAL);
10415
10416 if (target == 0)
10417 target = gen_reg_rtx (mode);
10418
10419 /* Try a cstore if possible. */
10420 return emit_store_flag_force (target, code, op0, op1,
10421 operand_mode, unsignedp,
10422 (TYPE_PRECISION (ops->type) == 1
10423 && !TYPE_UNSIGNED (ops->type)) ? -1 : 1);
10424 }
10425 \f
10426
10427 /* Stubs in case we haven't got a casesi insn. */
10428 #ifndef HAVE_casesi
10429 # define HAVE_casesi 0
10430 # define gen_casesi(a, b, c, d, e) (0)
10431 # define CODE_FOR_casesi CODE_FOR_nothing
10432 #endif
10433
10434 /* Attempt to generate a casesi instruction. Returns 1 if successful,
10435 0 otherwise (i.e. if there is no casesi instruction). */
10436 int
10437 try_casesi (tree index_type, tree index_expr, tree minval, tree range,
10438 rtx table_label ATTRIBUTE_UNUSED, rtx default_label,
10439 rtx fallback_label ATTRIBUTE_UNUSED)
10440 {
10441 struct expand_operand ops[5];
10442 enum machine_mode index_mode = SImode;
10443 int index_bits = GET_MODE_BITSIZE (index_mode);
10444 rtx op1, op2, index;
10445
10446 if (! HAVE_casesi)
10447 return 0;
10448
10449 /* Convert the index to SImode. */
10450 if (GET_MODE_BITSIZE (TYPE_MODE (index_type)) > GET_MODE_BITSIZE (index_mode))
10451 {
10452 enum machine_mode omode = TYPE_MODE (index_type);
10453 rtx rangertx = expand_normal (range);
10454
10455 /* We must handle the endpoints in the original mode. */
10456 index_expr = build2 (MINUS_EXPR, index_type,
10457 index_expr, minval);
10458 minval = integer_zero_node;
10459 index = expand_normal (index_expr);
10460 if (default_label)
10461 emit_cmp_and_jump_insns (rangertx, index, LTU, NULL_RTX,
10462 omode, 1, default_label);
10463 /* Now we can safely truncate. */
10464 index = convert_to_mode (index_mode, index, 0);
10465 }
10466 else
10467 {
10468 if (TYPE_MODE (index_type) != index_mode)
10469 {
10470 index_type = lang_hooks.types.type_for_size (index_bits, 0);
10471 index_expr = fold_convert (index_type, index_expr);
10472 }
10473
10474 index = expand_normal (index_expr);
10475 }
10476
10477 do_pending_stack_adjust ();
10478
10479 op1 = expand_normal (minval);
10480 op2 = expand_normal (range);
10481
10482 create_input_operand (&ops[0], index, index_mode);
10483 create_convert_operand_from_type (&ops[1], op1, TREE_TYPE (minval));
10484 create_convert_operand_from_type (&ops[2], op2, TREE_TYPE (range));
10485 create_fixed_operand (&ops[3], table_label);
10486 create_fixed_operand (&ops[4], (default_label
10487 ? default_label
10488 : fallback_label));
10489 expand_jump_insn (CODE_FOR_casesi, 5, ops);
10490 return 1;
10491 }
10492
10493 /* Attempt to generate a tablejump instruction; same concept. */
10494 #ifndef HAVE_tablejump
10495 #define HAVE_tablejump 0
10496 #define gen_tablejump(x, y) (0)
10497 #endif
10498
10499 /* Subroutine of the next function.
10500
10501 INDEX is the value being switched on, with the lowest value
10502 in the table already subtracted.
10503 MODE is its expected mode (needed if INDEX is constant).
10504 RANGE is the length of the jump table.
10505 TABLE_LABEL is a CODE_LABEL rtx for the table itself.
10506
10507 DEFAULT_LABEL is a CODE_LABEL rtx to jump to if the
10508 index value is out of range. */
10509
10510 static void
10511 do_tablejump (rtx index, enum machine_mode mode, rtx range, rtx table_label,
10512 rtx default_label)
10513 {
10514 rtx temp, vector;
10515
10516 if (INTVAL (range) > cfun->cfg->max_jumptable_ents)
10517 cfun->cfg->max_jumptable_ents = INTVAL (range);
10518
10519 /* Do an unsigned comparison (in the proper mode) between the index
10520 expression and the value which represents the length of the range.
10521 Since we just finished subtracting the lower bound of the range
10522 from the index expression, this comparison allows us to simultaneously
10523 check that the original index expression value is both greater than
10524 or equal to the minimum value of the range and less than or equal to
10525 the maximum value of the range. */
10526
10527 if (default_label)
10528 emit_cmp_and_jump_insns (index, range, GTU, NULL_RTX, mode, 1,
10529 default_label);
10530
10531 /* If index is in range, it must fit in Pmode.
10532 Convert to Pmode so we can index with it. */
10533 if (mode != Pmode)
10534 index = convert_to_mode (Pmode, index, 1);
10535
10536 /* Don't let a MEM slip through, because then INDEX that comes
10537 out of PIC_CASE_VECTOR_ADDRESS won't be a valid address,
10538 and break_out_memory_refs will go to work on it and mess it up. */
10539 #ifdef PIC_CASE_VECTOR_ADDRESS
10540 if (flag_pic && !REG_P (index))
10541 index = copy_to_mode_reg (Pmode, index);
10542 #endif
10543
10544 /* ??? The only correct use of CASE_VECTOR_MODE is the one inside the
10545 GET_MODE_SIZE, because this indicates how large insns are. The other
10546 uses should all be Pmode, because they are addresses. This code
10547 could fail if addresses and insns are not the same size. */
10548 index = gen_rtx_PLUS (Pmode,
10549 gen_rtx_MULT (Pmode, index,
10550 GEN_INT (GET_MODE_SIZE (CASE_VECTOR_MODE))),
10551 gen_rtx_LABEL_REF (Pmode, table_label));
10552 #ifdef PIC_CASE_VECTOR_ADDRESS
10553 if (flag_pic)
10554 index = PIC_CASE_VECTOR_ADDRESS (index);
10555 else
10556 #endif
10557 index = memory_address (CASE_VECTOR_MODE, index);
10558 temp = gen_reg_rtx (CASE_VECTOR_MODE);
10559 vector = gen_const_mem (CASE_VECTOR_MODE, index);
10560 convert_move (temp, vector, 0);
10561
10562 emit_jump_insn (gen_tablejump (temp, table_label));
10563
10564 /* If we are generating PIC code or if the table is PC-relative, the
10565 table and JUMP_INSN must be adjacent, so don't output a BARRIER. */
10566 if (! CASE_VECTOR_PC_RELATIVE && ! flag_pic)
10567 emit_barrier ();
10568 }
10569
10570 int
10571 try_tablejump (tree index_type, tree index_expr, tree minval, tree range,
10572 rtx table_label, rtx default_label)
10573 {
10574 rtx index;
10575
10576 if (! HAVE_tablejump)
10577 return 0;
10578
10579 index_expr = fold_build2 (MINUS_EXPR, index_type,
10580 fold_convert (index_type, index_expr),
10581 fold_convert (index_type, minval));
10582 index = expand_normal (index_expr);
10583 do_pending_stack_adjust ();
10584
10585 do_tablejump (index, TYPE_MODE (index_type),
10586 convert_modes (TYPE_MODE (index_type),
10587 TYPE_MODE (TREE_TYPE (range)),
10588 expand_normal (range),
10589 TYPE_UNSIGNED (TREE_TYPE (range))),
10590 table_label, default_label);
10591 return 1;
10592 }
10593
10594 /* Return a CONST_VECTOR rtx for a VECTOR_CST tree. */
10595 static rtx
10596 const_vector_from_tree (tree exp)
10597 {
10598 rtvec v;
10599 int units, i;
10600 tree link, elt;
10601 enum machine_mode inner, mode;
10602
10603 mode = TYPE_MODE (TREE_TYPE (exp));
10604
10605 if (initializer_zerop (exp))
10606 return CONST0_RTX (mode);
10607
10608 units = GET_MODE_NUNITS (mode);
10609 inner = GET_MODE_INNER (mode);
10610
10611 v = rtvec_alloc (units);
10612
10613 link = TREE_VECTOR_CST_ELTS (exp);
10614 for (i = 0; link; link = TREE_CHAIN (link), ++i)
10615 {
10616 elt = TREE_VALUE (link);
10617
10618 if (TREE_CODE (elt) == REAL_CST)
10619 RTVEC_ELT (v, i) = CONST_DOUBLE_FROM_REAL_VALUE (TREE_REAL_CST (elt),
10620 inner);
10621 else if (TREE_CODE (elt) == FIXED_CST)
10622 RTVEC_ELT (v, i) = CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (elt),
10623 inner);
10624 else
10625 RTVEC_ELT (v, i) = immed_double_int_const (tree_to_double_int (elt),
10626 inner);
10627 }
10628
10629 /* Initialize remaining elements to 0. */
10630 for (; i < units; ++i)
10631 RTVEC_ELT (v, i) = CONST0_RTX (inner);
10632
10633 return gen_rtx_CONST_VECTOR (mode, v);
10634 }
10635
10636 /* Build a decl for a personality function given a language prefix. */
10637
10638 tree
10639 build_personality_function (const char *lang)
10640 {
10641 const char *unwind_and_version;
10642 tree decl, type;
10643 char *name;
10644
10645 switch (targetm_common.except_unwind_info (&global_options))
10646 {
10647 case UI_NONE:
10648 return NULL;
10649 case UI_SJLJ:
10650 unwind_and_version = "_sj0";
10651 break;
10652 case UI_DWARF2:
10653 case UI_TARGET:
10654 unwind_and_version = "_v0";
10655 break;
10656 default:
10657 gcc_unreachable ();
10658 }
10659
10660 name = ACONCAT (("__", lang, "_personality", unwind_and_version, NULL));
10661
10662 type = build_function_type_list (integer_type_node, integer_type_node,
10663 long_long_unsigned_type_node,
10664 ptr_type_node, ptr_type_node, NULL_TREE);
10665 decl = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL,
10666 get_identifier (name), type);
10667 DECL_ARTIFICIAL (decl) = 1;
10668 DECL_EXTERNAL (decl) = 1;
10669 TREE_PUBLIC (decl) = 1;
10670
10671 /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with
10672 are the flags assigned by targetm.encode_section_info. */
10673 SET_SYMBOL_REF_DECL (XEXP (DECL_RTL (decl), 0), NULL);
10674
10675 return decl;
10676 }
10677
10678 /* Extracts the personality function of DECL and returns the corresponding
10679 libfunc. */
10680
10681 rtx
10682 get_personality_function (tree decl)
10683 {
10684 tree personality = DECL_FUNCTION_PERSONALITY (decl);
10685 enum eh_personality_kind pk;
10686
10687 pk = function_needs_eh_personality (DECL_STRUCT_FUNCTION (decl));
10688 if (pk == eh_personality_none)
10689 return NULL;
10690
10691 if (!personality
10692 && pk == eh_personality_any)
10693 personality = lang_hooks.eh_personality ();
10694
10695 if (pk == eh_personality_lang)
10696 gcc_assert (personality != NULL_TREE);
10697
10698 return XEXP (DECL_RTL (personality), 0);
10699 }
10700
10701 #include "gt-expr.h"