* g++.dg/cpp0x/nullptr21.c: Remove printfs, make self-checking.
[gcc.git] / gcc / final.c
1 /* Convert RTL to assembler code and output it, for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009,
4 2010, 2011
5 Free Software Foundation, Inc.
6
7 This file is part of GCC.
8
9 GCC is free software; you can redistribute it and/or modify it under
10 the terms of the GNU General Public License as published by the Free
11 Software Foundation; either version 3, or (at your option) any later
12 version.
13
14 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
15 WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with GCC; see the file COPYING3. If not see
21 <http://www.gnu.org/licenses/>. */
22
23 /* This is the final pass of the compiler.
24 It looks at the rtl code for a function and outputs assembler code.
25
26 Call `final_start_function' to output the assembler code for function entry,
27 `final' to output assembler code for some RTL code,
28 `final_end_function' to output assembler code for function exit.
29 If a function is compiled in several pieces, each piece is
30 output separately with `final'.
31
32 Some optimizations are also done at this level.
33 Move instructions that were made unnecessary by good register allocation
34 are detected and omitted from the output. (Though most of these
35 are removed by the last jump pass.)
36
37 Instructions to set the condition codes are omitted when it can be
38 seen that the condition codes already had the desired values.
39
40 In some cases it is sufficient if the inherited condition codes
41 have related values, but this may require the following insn
42 (the one that tests the condition codes) to be modified.
43
44 The code for the function prologue and epilogue are generated
45 directly in assembler by the target functions function_prologue and
46 function_epilogue. Those instructions never exist as rtl. */
47
48 #include "config.h"
49 #include "system.h"
50 #include "coretypes.h"
51 #include "tm.h"
52
53 #include "tree.h"
54 #include "rtl.h"
55 #include "tm_p.h"
56 #include "regs.h"
57 #include "insn-config.h"
58 #include "insn-attr.h"
59 #include "recog.h"
60 #include "conditions.h"
61 #include "flags.h"
62 #include "hard-reg-set.h"
63 #include "output.h"
64 #include "except.h"
65 #include "function.h"
66 #include "rtl-error.h"
67 #include "toplev.h" /* exact_log2, floor_log2 */
68 #include "reload.h"
69 #include "intl.h"
70 #include "basic-block.h"
71 #include "target.h"
72 #include "targhooks.h"
73 #include "debug.h"
74 #include "expr.h"
75 #include "tree-pass.h"
76 #include "tree-flow.h"
77 #include "cgraph.h"
78 #include "coverage.h"
79 #include "df.h"
80 #include "vecprim.h"
81 #include "ggc.h"
82 #include "cfgloop.h"
83 #include "params.h"
84 #include "tree-pretty-print.h" /* for dump_function_header */
85
86 #ifdef XCOFF_DEBUGGING_INFO
87 #include "xcoffout.h" /* Needed for external data
88 declarations for e.g. AIX 4.x. */
89 #endif
90
91 #include "dwarf2out.h"
92
93 #ifdef DBX_DEBUGGING_INFO
94 #include "dbxout.h"
95 #endif
96
97 #ifdef SDB_DEBUGGING_INFO
98 #include "sdbout.h"
99 #endif
100
101 /* Most ports that aren't using cc0 don't need to define CC_STATUS_INIT.
102 So define a null default for it to save conditionalization later. */
103 #ifndef CC_STATUS_INIT
104 #define CC_STATUS_INIT
105 #endif
106
107 /* Is the given character a logical line separator for the assembler? */
108 #ifndef IS_ASM_LOGICAL_LINE_SEPARATOR
109 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == ';')
110 #endif
111
112 #ifndef JUMP_TABLES_IN_TEXT_SECTION
113 #define JUMP_TABLES_IN_TEXT_SECTION 0
114 #endif
115
116 /* Bitflags used by final_scan_insn. */
117 #define SEEN_BB 1
118 #define SEEN_NOTE 2
119 #define SEEN_EMITTED 4
120
121 /* Last insn processed by final_scan_insn. */
122 static rtx debug_insn;
123 rtx current_output_insn;
124
125 /* Line number of last NOTE. */
126 static int last_linenum;
127
128 /* Last discriminator written to assembly. */
129 static int last_discriminator;
130
131 /* Discriminator of current block. */
132 static int discriminator;
133
134 /* Highest line number in current block. */
135 static int high_block_linenum;
136
137 /* Likewise for function. */
138 static int high_function_linenum;
139
140 /* Filename of last NOTE. */
141 static const char *last_filename;
142
143 /* Override filename and line number. */
144 static const char *override_filename;
145 static int override_linenum;
146
147 /* Whether to force emission of a line note before the next insn. */
148 static bool force_source_line = false;
149
150 extern const int length_unit_log; /* This is defined in insn-attrtab.c. */
151
152 /* Nonzero while outputting an `asm' with operands.
153 This means that inconsistencies are the user's fault, so don't die.
154 The precise value is the insn being output, to pass to error_for_asm. */
155 rtx this_is_asm_operands;
156
157 /* Number of operands of this insn, for an `asm' with operands. */
158 static unsigned int insn_noperands;
159
160 /* Compare optimization flag. */
161
162 static rtx last_ignored_compare = 0;
163
164 /* Assign a unique number to each insn that is output.
165 This can be used to generate unique local labels. */
166
167 static int insn_counter = 0;
168
169 #ifdef HAVE_cc0
170 /* This variable contains machine-dependent flags (defined in tm.h)
171 set and examined by output routines
172 that describe how to interpret the condition codes properly. */
173
174 CC_STATUS cc_status;
175
176 /* During output of an insn, this contains a copy of cc_status
177 from before the insn. */
178
179 CC_STATUS cc_prev_status;
180 #endif
181
182 /* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */
183
184 static int block_depth;
185
186 /* Nonzero if have enabled APP processing of our assembler output. */
187
188 static int app_on;
189
190 /* If we are outputting an insn sequence, this contains the sequence rtx.
191 Zero otherwise. */
192
193 rtx final_sequence;
194
195 #ifdef ASSEMBLER_DIALECT
196
197 /* Number of the assembler dialect to use, starting at 0. */
198 static int dialect_number;
199 #endif
200
201 /* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */
202 rtx current_insn_predicate;
203
204 /* True if printing into -fdump-final-insns= dump. */
205 bool final_insns_dump_p;
206
207 #ifdef HAVE_ATTR_length
208 static int asm_insn_count (rtx);
209 #endif
210 static void profile_function (FILE *);
211 static void profile_after_prologue (FILE *);
212 static bool notice_source_line (rtx, bool *);
213 static rtx walk_alter_subreg (rtx *, bool *);
214 static void output_asm_name (void);
215 static void output_alternate_entry_point (FILE *, rtx);
216 static tree get_mem_expr_from_op (rtx, int *);
217 static void output_asm_operand_names (rtx *, int *, int);
218 #ifdef LEAF_REGISTERS
219 static void leaf_renumber_regs (rtx);
220 #endif
221 #ifdef HAVE_cc0
222 static int alter_cond (rtx);
223 #endif
224 #ifndef ADDR_VEC_ALIGN
225 static int final_addr_vec_align (rtx);
226 #endif
227 #ifdef HAVE_ATTR_length
228 static int align_fuzz (rtx, rtx, int, unsigned);
229 #endif
230 \f
231 /* Initialize data in final at the beginning of a compilation. */
232
233 void
234 init_final (const char *filename ATTRIBUTE_UNUSED)
235 {
236 app_on = 0;
237 final_sequence = 0;
238
239 #ifdef ASSEMBLER_DIALECT
240 dialect_number = ASSEMBLER_DIALECT;
241 #endif
242 }
243
244 /* Default target function prologue and epilogue assembler output.
245
246 If not overridden for epilogue code, then the function body itself
247 contains return instructions wherever needed. */
248 void
249 default_function_pro_epilogue (FILE *file ATTRIBUTE_UNUSED,
250 HOST_WIDE_INT size ATTRIBUTE_UNUSED)
251 {
252 }
253
254 void
255 default_function_switched_text_sections (FILE *file ATTRIBUTE_UNUSED,
256 tree decl ATTRIBUTE_UNUSED,
257 bool new_is_cold ATTRIBUTE_UNUSED)
258 {
259 }
260
261 /* Default target hook that outputs nothing to a stream. */
262 void
263 no_asm_to_stream (FILE *file ATTRIBUTE_UNUSED)
264 {
265 }
266
267 /* Enable APP processing of subsequent output.
268 Used before the output from an `asm' statement. */
269
270 void
271 app_enable (void)
272 {
273 if (! app_on)
274 {
275 fputs (ASM_APP_ON, asm_out_file);
276 app_on = 1;
277 }
278 }
279
280 /* Disable APP processing of subsequent output.
281 Called from varasm.c before most kinds of output. */
282
283 void
284 app_disable (void)
285 {
286 if (app_on)
287 {
288 fputs (ASM_APP_OFF, asm_out_file);
289 app_on = 0;
290 }
291 }
292 \f
293 /* Return the number of slots filled in the current
294 delayed branch sequence (we don't count the insn needing the
295 delay slot). Zero if not in a delayed branch sequence. */
296
297 #ifdef DELAY_SLOTS
298 int
299 dbr_sequence_length (void)
300 {
301 if (final_sequence != 0)
302 return XVECLEN (final_sequence, 0) - 1;
303 else
304 return 0;
305 }
306 #endif
307 \f
308 /* The next two pages contain routines used to compute the length of an insn
309 and to shorten branches. */
310
311 /* Arrays for insn lengths, and addresses. The latter is referenced by
312 `insn_current_length'. */
313
314 static int *insn_lengths;
315
316 VEC(int,heap) *insn_addresses_;
317
318 /* Max uid for which the above arrays are valid. */
319 static int insn_lengths_max_uid;
320
321 /* Address of insn being processed. Used by `insn_current_length'. */
322 int insn_current_address;
323
324 /* Address of insn being processed in previous iteration. */
325 int insn_last_address;
326
327 /* known invariant alignment of insn being processed. */
328 int insn_current_align;
329
330 /* After shorten_branches, for any insn, uid_align[INSN_UID (insn)]
331 gives the next following alignment insn that increases the known
332 alignment, or NULL_RTX if there is no such insn.
333 For any alignment obtained this way, we can again index uid_align with
334 its uid to obtain the next following align that in turn increases the
335 alignment, till we reach NULL_RTX; the sequence obtained this way
336 for each insn we'll call the alignment chain of this insn in the following
337 comments. */
338
339 struct label_alignment
340 {
341 short alignment;
342 short max_skip;
343 };
344
345 static rtx *uid_align;
346 static int *uid_shuid;
347 static struct label_alignment *label_align;
348
349 /* Indicate that branch shortening hasn't yet been done. */
350
351 void
352 init_insn_lengths (void)
353 {
354 if (uid_shuid)
355 {
356 free (uid_shuid);
357 uid_shuid = 0;
358 }
359 if (insn_lengths)
360 {
361 free (insn_lengths);
362 insn_lengths = 0;
363 insn_lengths_max_uid = 0;
364 }
365 #ifdef HAVE_ATTR_length
366 INSN_ADDRESSES_FREE ();
367 #endif
368 if (uid_align)
369 {
370 free (uid_align);
371 uid_align = 0;
372 }
373 }
374
375 /* Obtain the current length of an insn. If branch shortening has been done,
376 get its actual length. Otherwise, use FALLBACK_FN to calculate the
377 length. */
378 static inline int
379 get_attr_length_1 (rtx insn ATTRIBUTE_UNUSED,
380 int (*fallback_fn) (rtx) ATTRIBUTE_UNUSED)
381 {
382 #ifdef HAVE_ATTR_length
383 rtx body;
384 int i;
385 int length = 0;
386
387 if (insn_lengths_max_uid > INSN_UID (insn))
388 return insn_lengths[INSN_UID (insn)];
389 else
390 switch (GET_CODE (insn))
391 {
392 case NOTE:
393 case BARRIER:
394 case CODE_LABEL:
395 case DEBUG_INSN:
396 return 0;
397
398 case CALL_INSN:
399 length = fallback_fn (insn);
400 break;
401
402 case JUMP_INSN:
403 body = PATTERN (insn);
404 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
405 {
406 /* Alignment is machine-dependent and should be handled by
407 ADDR_VEC_ALIGN. */
408 }
409 else
410 length = fallback_fn (insn);
411 break;
412
413 case INSN:
414 body = PATTERN (insn);
415 if (GET_CODE (body) == USE || GET_CODE (body) == CLOBBER)
416 return 0;
417
418 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
419 length = asm_insn_count (body) * fallback_fn (insn);
420 else if (GET_CODE (body) == SEQUENCE)
421 for (i = 0; i < XVECLEN (body, 0); i++)
422 length += get_attr_length_1 (XVECEXP (body, 0, i), fallback_fn);
423 else
424 length = fallback_fn (insn);
425 break;
426
427 default:
428 break;
429 }
430
431 #ifdef ADJUST_INSN_LENGTH
432 ADJUST_INSN_LENGTH (insn, length);
433 #endif
434 return length;
435 #else /* not HAVE_ATTR_length */
436 return 0;
437 #define insn_default_length 0
438 #define insn_min_length 0
439 #endif /* not HAVE_ATTR_length */
440 }
441
442 /* Obtain the current length of an insn. If branch shortening has been done,
443 get its actual length. Otherwise, get its maximum length. */
444 int
445 get_attr_length (rtx insn)
446 {
447 return get_attr_length_1 (insn, insn_default_length);
448 }
449
450 /* Obtain the current length of an insn. If branch shortening has been done,
451 get its actual length. Otherwise, get its minimum length. */
452 int
453 get_attr_min_length (rtx insn)
454 {
455 return get_attr_length_1 (insn, insn_min_length);
456 }
457 \f
458 /* Code to handle alignment inside shorten_branches. */
459
460 /* Here is an explanation how the algorithm in align_fuzz can give
461 proper results:
462
463 Call a sequence of instructions beginning with alignment point X
464 and continuing until the next alignment point `block X'. When `X'
465 is used in an expression, it means the alignment value of the
466 alignment point.
467
468 Call the distance between the start of the first insn of block X, and
469 the end of the last insn of block X `IX', for the `inner size of X'.
470 This is clearly the sum of the instruction lengths.
471
472 Likewise with the next alignment-delimited block following X, which we
473 shall call block Y.
474
475 Call the distance between the start of the first insn of block X, and
476 the start of the first insn of block Y `OX', for the `outer size of X'.
477
478 The estimated padding is then OX - IX.
479
480 OX can be safely estimated as
481
482 if (X >= Y)
483 OX = round_up(IX, Y)
484 else
485 OX = round_up(IX, X) + Y - X
486
487 Clearly est(IX) >= real(IX), because that only depends on the
488 instruction lengths, and those being overestimated is a given.
489
490 Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so
491 we needn't worry about that when thinking about OX.
492
493 When X >= Y, the alignment provided by Y adds no uncertainty factor
494 for branch ranges starting before X, so we can just round what we have.
495 But when X < Y, we don't know anything about the, so to speak,
496 `middle bits', so we have to assume the worst when aligning up from an
497 address mod X to one mod Y, which is Y - X. */
498
499 #ifndef LABEL_ALIGN
500 #define LABEL_ALIGN(LABEL) align_labels_log
501 #endif
502
503 #ifndef LOOP_ALIGN
504 #define LOOP_ALIGN(LABEL) align_loops_log
505 #endif
506
507 #ifndef LABEL_ALIGN_AFTER_BARRIER
508 #define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0
509 #endif
510
511 #ifndef JUMP_ALIGN
512 #define JUMP_ALIGN(LABEL) align_jumps_log
513 #endif
514
515 int
516 default_label_align_after_barrier_max_skip (rtx insn ATTRIBUTE_UNUSED)
517 {
518 return 0;
519 }
520
521 int
522 default_loop_align_max_skip (rtx insn ATTRIBUTE_UNUSED)
523 {
524 return align_loops_max_skip;
525 }
526
527 int
528 default_label_align_max_skip (rtx insn ATTRIBUTE_UNUSED)
529 {
530 return align_labels_max_skip;
531 }
532
533 int
534 default_jump_align_max_skip (rtx insn ATTRIBUTE_UNUSED)
535 {
536 return align_jumps_max_skip;
537 }
538
539 #ifndef ADDR_VEC_ALIGN
540 static int
541 final_addr_vec_align (rtx addr_vec)
542 {
543 int align = GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec)));
544
545 if (align > BIGGEST_ALIGNMENT / BITS_PER_UNIT)
546 align = BIGGEST_ALIGNMENT / BITS_PER_UNIT;
547 return exact_log2 (align);
548
549 }
550
551 #define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC)
552 #endif
553
554 #ifndef INSN_LENGTH_ALIGNMENT
555 #define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log
556 #endif
557
558 #define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)])
559
560 static int min_labelno, max_labelno;
561
562 #define LABEL_TO_ALIGNMENT(LABEL) \
563 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment)
564
565 #define LABEL_TO_MAX_SKIP(LABEL) \
566 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip)
567
568 /* For the benefit of port specific code do this also as a function. */
569
570 int
571 label_to_alignment (rtx label)
572 {
573 if (CODE_LABEL_NUMBER (label) <= max_labelno)
574 return LABEL_TO_ALIGNMENT (label);
575 return 0;
576 }
577
578 int
579 label_to_max_skip (rtx label)
580 {
581 if (CODE_LABEL_NUMBER (label) <= max_labelno)
582 return LABEL_TO_MAX_SKIP (label);
583 return 0;
584 }
585
586 #ifdef HAVE_ATTR_length
587 /* The differences in addresses
588 between a branch and its target might grow or shrink depending on
589 the alignment the start insn of the range (the branch for a forward
590 branch or the label for a backward branch) starts out on; if these
591 differences are used naively, they can even oscillate infinitely.
592 We therefore want to compute a 'worst case' address difference that
593 is independent of the alignment the start insn of the range end
594 up on, and that is at least as large as the actual difference.
595 The function align_fuzz calculates the amount we have to add to the
596 naively computed difference, by traversing the part of the alignment
597 chain of the start insn of the range that is in front of the end insn
598 of the range, and considering for each alignment the maximum amount
599 that it might contribute to a size increase.
600
601 For casesi tables, we also want to know worst case minimum amounts of
602 address difference, in case a machine description wants to introduce
603 some common offset that is added to all offsets in a table.
604 For this purpose, align_fuzz with a growth argument of 0 computes the
605 appropriate adjustment. */
606
607 /* Compute the maximum delta by which the difference of the addresses of
608 START and END might grow / shrink due to a different address for start
609 which changes the size of alignment insns between START and END.
610 KNOWN_ALIGN_LOG is the alignment known for START.
611 GROWTH should be ~0 if the objective is to compute potential code size
612 increase, and 0 if the objective is to compute potential shrink.
613 The return value is undefined for any other value of GROWTH. */
614
615 static int
616 align_fuzz (rtx start, rtx end, int known_align_log, unsigned int growth)
617 {
618 int uid = INSN_UID (start);
619 rtx align_label;
620 int known_align = 1 << known_align_log;
621 int end_shuid = INSN_SHUID (end);
622 int fuzz = 0;
623
624 for (align_label = uid_align[uid]; align_label; align_label = uid_align[uid])
625 {
626 int align_addr, new_align;
627
628 uid = INSN_UID (align_label);
629 align_addr = INSN_ADDRESSES (uid) - insn_lengths[uid];
630 if (uid_shuid[uid] > end_shuid)
631 break;
632 known_align_log = LABEL_TO_ALIGNMENT (align_label);
633 new_align = 1 << known_align_log;
634 if (new_align < known_align)
635 continue;
636 fuzz += (-align_addr ^ growth) & (new_align - known_align);
637 known_align = new_align;
638 }
639 return fuzz;
640 }
641
642 /* Compute a worst-case reference address of a branch so that it
643 can be safely used in the presence of aligned labels. Since the
644 size of the branch itself is unknown, the size of the branch is
645 not included in the range. I.e. for a forward branch, the reference
646 address is the end address of the branch as known from the previous
647 branch shortening pass, minus a value to account for possible size
648 increase due to alignment. For a backward branch, it is the start
649 address of the branch as known from the current pass, plus a value
650 to account for possible size increase due to alignment.
651 NB.: Therefore, the maximum offset allowed for backward branches needs
652 to exclude the branch size. */
653
654 int
655 insn_current_reference_address (rtx branch)
656 {
657 rtx dest, seq;
658 int seq_uid;
659
660 if (! INSN_ADDRESSES_SET_P ())
661 return 0;
662
663 seq = NEXT_INSN (PREV_INSN (branch));
664 seq_uid = INSN_UID (seq);
665 if (!JUMP_P (branch))
666 /* This can happen for example on the PA; the objective is to know the
667 offset to address something in front of the start of the function.
668 Thus, we can treat it like a backward branch.
669 We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than
670 any alignment we'd encounter, so we skip the call to align_fuzz. */
671 return insn_current_address;
672 dest = JUMP_LABEL (branch);
673
674 /* BRANCH has no proper alignment chain set, so use SEQ.
675 BRANCH also has no INSN_SHUID. */
676 if (INSN_SHUID (seq) < INSN_SHUID (dest))
677 {
678 /* Forward branch. */
679 return (insn_last_address + insn_lengths[seq_uid]
680 - align_fuzz (seq, dest, length_unit_log, ~0));
681 }
682 else
683 {
684 /* Backward branch. */
685 return (insn_current_address
686 + align_fuzz (dest, seq, length_unit_log, ~0));
687 }
688 }
689 #endif /* HAVE_ATTR_length */
690 \f
691 /* Compute branch alignments based on frequency information in the
692 CFG. */
693
694 unsigned int
695 compute_alignments (void)
696 {
697 int log, max_skip, max_log;
698 basic_block bb;
699 int freq_max = 0;
700 int freq_threshold = 0;
701
702 if (label_align)
703 {
704 free (label_align);
705 label_align = 0;
706 }
707
708 max_labelno = max_label_num ();
709 min_labelno = get_first_label_num ();
710 label_align = XCNEWVEC (struct label_alignment, max_labelno - min_labelno + 1);
711
712 /* If not optimizing or optimizing for size, don't assign any alignments. */
713 if (! optimize || optimize_function_for_size_p (cfun))
714 return 0;
715
716 if (dump_file)
717 {
718 dump_reg_info (dump_file);
719 dump_flow_info (dump_file, TDF_DETAILS);
720 flow_loops_dump (dump_file, NULL, 1);
721 }
722 loop_optimizer_init (AVOID_CFG_MODIFICATIONS);
723 FOR_EACH_BB (bb)
724 if (bb->frequency > freq_max)
725 freq_max = bb->frequency;
726 freq_threshold = freq_max / PARAM_VALUE (PARAM_ALIGN_THRESHOLD);
727
728 if (dump_file)
729 fprintf(dump_file, "freq_max: %i\n",freq_max);
730 FOR_EACH_BB (bb)
731 {
732 rtx label = BB_HEAD (bb);
733 int fallthru_frequency = 0, branch_frequency = 0, has_fallthru = 0;
734 edge e;
735 edge_iterator ei;
736
737 if (!LABEL_P (label)
738 || optimize_bb_for_size_p (bb))
739 {
740 if (dump_file)
741 fprintf(dump_file, "BB %4i freq %4i loop %2i loop_depth %2i skipped.\n",
742 bb->index, bb->frequency, bb->loop_father->num, bb->loop_depth);
743 continue;
744 }
745 max_log = LABEL_ALIGN (label);
746 max_skip = targetm.asm_out.label_align_max_skip (label);
747
748 FOR_EACH_EDGE (e, ei, bb->preds)
749 {
750 if (e->flags & EDGE_FALLTHRU)
751 has_fallthru = 1, fallthru_frequency += EDGE_FREQUENCY (e);
752 else
753 branch_frequency += EDGE_FREQUENCY (e);
754 }
755 if (dump_file)
756 {
757 fprintf(dump_file, "BB %4i freq %4i loop %2i loop_depth %2i fall %4i branch %4i",
758 bb->index, bb->frequency, bb->loop_father->num,
759 bb->loop_depth,
760 fallthru_frequency, branch_frequency);
761 if (!bb->loop_father->inner && bb->loop_father->num)
762 fprintf (dump_file, " inner_loop");
763 if (bb->loop_father->header == bb)
764 fprintf (dump_file, " loop_header");
765 fprintf (dump_file, "\n");
766 }
767
768 /* There are two purposes to align block with no fallthru incoming edge:
769 1) to avoid fetch stalls when branch destination is near cache boundary
770 2) to improve cache efficiency in case the previous block is not executed
771 (so it does not need to be in the cache).
772
773 We to catch first case, we align frequently executed blocks.
774 To catch the second, we align blocks that are executed more frequently
775 than the predecessor and the predecessor is likely to not be executed
776 when function is called. */
777
778 if (!has_fallthru
779 && (branch_frequency > freq_threshold
780 || (bb->frequency > bb->prev_bb->frequency * 10
781 && (bb->prev_bb->frequency
782 <= ENTRY_BLOCK_PTR->frequency / 2))))
783 {
784 log = JUMP_ALIGN (label);
785 if (dump_file)
786 fprintf(dump_file, " jump alignment added.\n");
787 if (max_log < log)
788 {
789 max_log = log;
790 max_skip = targetm.asm_out.jump_align_max_skip (label);
791 }
792 }
793 /* In case block is frequent and reached mostly by non-fallthru edge,
794 align it. It is most likely a first block of loop. */
795 if (has_fallthru
796 && optimize_bb_for_speed_p (bb)
797 && branch_frequency + fallthru_frequency > freq_threshold
798 && (branch_frequency
799 > fallthru_frequency * PARAM_VALUE (PARAM_ALIGN_LOOP_ITERATIONS)))
800 {
801 log = LOOP_ALIGN (label);
802 if (dump_file)
803 fprintf(dump_file, " internal loop alignment added.\n");
804 if (max_log < log)
805 {
806 max_log = log;
807 max_skip = targetm.asm_out.loop_align_max_skip (label);
808 }
809 }
810 LABEL_TO_ALIGNMENT (label) = max_log;
811 LABEL_TO_MAX_SKIP (label) = max_skip;
812 }
813
814 loop_optimizer_finalize ();
815 free_dominance_info (CDI_DOMINATORS);
816 return 0;
817 }
818
819 struct rtl_opt_pass pass_compute_alignments =
820 {
821 {
822 RTL_PASS,
823 "alignments", /* name */
824 NULL, /* gate */
825 compute_alignments, /* execute */
826 NULL, /* sub */
827 NULL, /* next */
828 0, /* static_pass_number */
829 TV_NONE, /* tv_id */
830 0, /* properties_required */
831 0, /* properties_provided */
832 0, /* properties_destroyed */
833 0, /* todo_flags_start */
834 TODO_verify_rtl_sharing
835 | TODO_ggc_collect /* todo_flags_finish */
836 }
837 };
838
839 \f
840 /* Make a pass over all insns and compute their actual lengths by shortening
841 any branches of variable length if possible. */
842
843 /* shorten_branches might be called multiple times: for example, the SH
844 port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG.
845 In order to do this, it needs proper length information, which it obtains
846 by calling shorten_branches. This cannot be collapsed with
847 shorten_branches itself into a single pass unless we also want to integrate
848 reorg.c, since the branch splitting exposes new instructions with delay
849 slots. */
850
851 void
852 shorten_branches (rtx first ATTRIBUTE_UNUSED)
853 {
854 rtx insn;
855 int max_uid;
856 int i;
857 int max_log;
858 int max_skip;
859 #ifdef HAVE_ATTR_length
860 #define MAX_CODE_ALIGN 16
861 rtx seq;
862 int something_changed = 1;
863 char *varying_length;
864 rtx body;
865 int uid;
866 rtx align_tab[MAX_CODE_ALIGN];
867
868 #endif
869
870 /* Compute maximum UID and allocate label_align / uid_shuid. */
871 max_uid = get_max_uid ();
872
873 /* Free uid_shuid before reallocating it. */
874 free (uid_shuid);
875
876 uid_shuid = XNEWVEC (int, max_uid);
877
878 if (max_labelno != max_label_num ())
879 {
880 int old = max_labelno;
881 int n_labels;
882 int n_old_labels;
883
884 max_labelno = max_label_num ();
885
886 n_labels = max_labelno - min_labelno + 1;
887 n_old_labels = old - min_labelno + 1;
888
889 label_align = XRESIZEVEC (struct label_alignment, label_align, n_labels);
890
891 /* Range of labels grows monotonically in the function. Failing here
892 means that the initialization of array got lost. */
893 gcc_assert (n_old_labels <= n_labels);
894
895 memset (label_align + n_old_labels, 0,
896 (n_labels - n_old_labels) * sizeof (struct label_alignment));
897 }
898
899 /* Initialize label_align and set up uid_shuid to be strictly
900 monotonically rising with insn order. */
901 /* We use max_log here to keep track of the maximum alignment we want to
902 impose on the next CODE_LABEL (or the current one if we are processing
903 the CODE_LABEL itself). */
904
905 max_log = 0;
906 max_skip = 0;
907
908 for (insn = get_insns (), i = 1; insn; insn = NEXT_INSN (insn))
909 {
910 int log;
911
912 INSN_SHUID (insn) = i++;
913 if (INSN_P (insn))
914 continue;
915
916 if (LABEL_P (insn))
917 {
918 rtx next;
919 bool next_is_jumptable;
920
921 /* Merge in alignments computed by compute_alignments. */
922 log = LABEL_TO_ALIGNMENT (insn);
923 if (max_log < log)
924 {
925 max_log = log;
926 max_skip = LABEL_TO_MAX_SKIP (insn);
927 }
928
929 next = next_nonnote_insn (insn);
930 next_is_jumptable = next && JUMP_TABLE_DATA_P (next);
931 if (!next_is_jumptable)
932 {
933 log = LABEL_ALIGN (insn);
934 if (max_log < log)
935 {
936 max_log = log;
937 max_skip = targetm.asm_out.label_align_max_skip (insn);
938 }
939 }
940 /* ADDR_VECs only take room if read-only data goes into the text
941 section. */
942 if ((JUMP_TABLES_IN_TEXT_SECTION
943 || readonly_data_section == text_section)
944 && next_is_jumptable)
945 {
946 log = ADDR_VEC_ALIGN (next);
947 if (max_log < log)
948 {
949 max_log = log;
950 max_skip = targetm.asm_out.label_align_max_skip (insn);
951 }
952 }
953 LABEL_TO_ALIGNMENT (insn) = max_log;
954 LABEL_TO_MAX_SKIP (insn) = max_skip;
955 max_log = 0;
956 max_skip = 0;
957 }
958 else if (BARRIER_P (insn))
959 {
960 rtx label;
961
962 for (label = insn; label && ! INSN_P (label);
963 label = NEXT_INSN (label))
964 if (LABEL_P (label))
965 {
966 log = LABEL_ALIGN_AFTER_BARRIER (insn);
967 if (max_log < log)
968 {
969 max_log = log;
970 max_skip = targetm.asm_out.label_align_after_barrier_max_skip (label);
971 }
972 break;
973 }
974 }
975 }
976 #ifdef HAVE_ATTR_length
977
978 /* Allocate the rest of the arrays. */
979 insn_lengths = XNEWVEC (int, max_uid);
980 insn_lengths_max_uid = max_uid;
981 /* Syntax errors can lead to labels being outside of the main insn stream.
982 Initialize insn_addresses, so that we get reproducible results. */
983 INSN_ADDRESSES_ALLOC (max_uid);
984
985 varying_length = XCNEWVEC (char, max_uid);
986
987 /* Initialize uid_align. We scan instructions
988 from end to start, and keep in align_tab[n] the last seen insn
989 that does an alignment of at least n+1, i.e. the successor
990 in the alignment chain for an insn that does / has a known
991 alignment of n. */
992 uid_align = XCNEWVEC (rtx, max_uid);
993
994 for (i = MAX_CODE_ALIGN; --i >= 0;)
995 align_tab[i] = NULL_RTX;
996 seq = get_last_insn ();
997 for (; seq; seq = PREV_INSN (seq))
998 {
999 int uid = INSN_UID (seq);
1000 int log;
1001 log = (LABEL_P (seq) ? LABEL_TO_ALIGNMENT (seq) : 0);
1002 uid_align[uid] = align_tab[0];
1003 if (log)
1004 {
1005 /* Found an alignment label. */
1006 uid_align[uid] = align_tab[log];
1007 for (i = log - 1; i >= 0; i--)
1008 align_tab[i] = seq;
1009 }
1010 }
1011 #ifdef CASE_VECTOR_SHORTEN_MODE
1012 if (optimize)
1013 {
1014 /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum
1015 label fields. */
1016
1017 int min_shuid = INSN_SHUID (get_insns ()) - 1;
1018 int max_shuid = INSN_SHUID (get_last_insn ()) + 1;
1019 int rel;
1020
1021 for (insn = first; insn != 0; insn = NEXT_INSN (insn))
1022 {
1023 rtx min_lab = NULL_RTX, max_lab = NULL_RTX, pat;
1024 int len, i, min, max, insn_shuid;
1025 int min_align;
1026 addr_diff_vec_flags flags;
1027
1028 if (!JUMP_P (insn)
1029 || GET_CODE (PATTERN (insn)) != ADDR_DIFF_VEC)
1030 continue;
1031 pat = PATTERN (insn);
1032 len = XVECLEN (pat, 1);
1033 gcc_assert (len > 0);
1034 min_align = MAX_CODE_ALIGN;
1035 for (min = max_shuid, max = min_shuid, i = len - 1; i >= 0; i--)
1036 {
1037 rtx lab = XEXP (XVECEXP (pat, 1, i), 0);
1038 int shuid = INSN_SHUID (lab);
1039 if (shuid < min)
1040 {
1041 min = shuid;
1042 min_lab = lab;
1043 }
1044 if (shuid > max)
1045 {
1046 max = shuid;
1047 max_lab = lab;
1048 }
1049 if (min_align > LABEL_TO_ALIGNMENT (lab))
1050 min_align = LABEL_TO_ALIGNMENT (lab);
1051 }
1052 XEXP (pat, 2) = gen_rtx_LABEL_REF (Pmode, min_lab);
1053 XEXP (pat, 3) = gen_rtx_LABEL_REF (Pmode, max_lab);
1054 insn_shuid = INSN_SHUID (insn);
1055 rel = INSN_SHUID (XEXP (XEXP (pat, 0), 0));
1056 memset (&flags, 0, sizeof (flags));
1057 flags.min_align = min_align;
1058 flags.base_after_vec = rel > insn_shuid;
1059 flags.min_after_vec = min > insn_shuid;
1060 flags.max_after_vec = max > insn_shuid;
1061 flags.min_after_base = min > rel;
1062 flags.max_after_base = max > rel;
1063 ADDR_DIFF_VEC_FLAGS (pat) = flags;
1064 }
1065 }
1066 #endif /* CASE_VECTOR_SHORTEN_MODE */
1067
1068 /* Compute initial lengths, addresses, and varying flags for each insn. */
1069 for (insn_current_address = 0, insn = first;
1070 insn != 0;
1071 insn_current_address += insn_lengths[uid], insn = NEXT_INSN (insn))
1072 {
1073 uid = INSN_UID (insn);
1074
1075 insn_lengths[uid] = 0;
1076
1077 if (LABEL_P (insn))
1078 {
1079 int log = LABEL_TO_ALIGNMENT (insn);
1080 if (log)
1081 {
1082 int align = 1 << log;
1083 int new_address = (insn_current_address + align - 1) & -align;
1084 insn_lengths[uid] = new_address - insn_current_address;
1085 }
1086 }
1087
1088 INSN_ADDRESSES (uid) = insn_current_address + insn_lengths[uid];
1089
1090 if (NOTE_P (insn) || BARRIER_P (insn)
1091 || LABEL_P (insn) || DEBUG_INSN_P(insn))
1092 continue;
1093 if (INSN_DELETED_P (insn))
1094 continue;
1095
1096 body = PATTERN (insn);
1097 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
1098 {
1099 /* This only takes room if read-only data goes into the text
1100 section. */
1101 if (JUMP_TABLES_IN_TEXT_SECTION
1102 || readonly_data_section == text_section)
1103 insn_lengths[uid] = (XVECLEN (body,
1104 GET_CODE (body) == ADDR_DIFF_VEC)
1105 * GET_MODE_SIZE (GET_MODE (body)));
1106 /* Alignment is handled by ADDR_VEC_ALIGN. */
1107 }
1108 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
1109 insn_lengths[uid] = asm_insn_count (body) * insn_default_length (insn);
1110 else if (GET_CODE (body) == SEQUENCE)
1111 {
1112 int i;
1113 int const_delay_slots;
1114 #ifdef DELAY_SLOTS
1115 const_delay_slots = const_num_delay_slots (XVECEXP (body, 0, 0));
1116 #else
1117 const_delay_slots = 0;
1118 #endif
1119 /* Inside a delay slot sequence, we do not do any branch shortening
1120 if the shortening could change the number of delay slots
1121 of the branch. */
1122 for (i = 0; i < XVECLEN (body, 0); i++)
1123 {
1124 rtx inner_insn = XVECEXP (body, 0, i);
1125 int inner_uid = INSN_UID (inner_insn);
1126 int inner_length;
1127
1128 if (GET_CODE (body) == ASM_INPUT
1129 || asm_noperands (PATTERN (XVECEXP (body, 0, i))) >= 0)
1130 inner_length = (asm_insn_count (PATTERN (inner_insn))
1131 * insn_default_length (inner_insn));
1132 else
1133 inner_length = insn_default_length (inner_insn);
1134
1135 insn_lengths[inner_uid] = inner_length;
1136 if (const_delay_slots)
1137 {
1138 if ((varying_length[inner_uid]
1139 = insn_variable_length_p (inner_insn)) != 0)
1140 varying_length[uid] = 1;
1141 INSN_ADDRESSES (inner_uid) = (insn_current_address
1142 + insn_lengths[uid]);
1143 }
1144 else
1145 varying_length[inner_uid] = 0;
1146 insn_lengths[uid] += inner_length;
1147 }
1148 }
1149 else if (GET_CODE (body) != USE && GET_CODE (body) != CLOBBER)
1150 {
1151 insn_lengths[uid] = insn_default_length (insn);
1152 varying_length[uid] = insn_variable_length_p (insn);
1153 }
1154
1155 /* If needed, do any adjustment. */
1156 #ifdef ADJUST_INSN_LENGTH
1157 ADJUST_INSN_LENGTH (insn, insn_lengths[uid]);
1158 if (insn_lengths[uid] < 0)
1159 fatal_insn ("negative insn length", insn);
1160 #endif
1161 }
1162
1163 /* Now loop over all the insns finding varying length insns. For each,
1164 get the current insn length. If it has changed, reflect the change.
1165 When nothing changes for a full pass, we are done. */
1166
1167 while (something_changed)
1168 {
1169 something_changed = 0;
1170 insn_current_align = MAX_CODE_ALIGN - 1;
1171 for (insn_current_address = 0, insn = first;
1172 insn != 0;
1173 insn = NEXT_INSN (insn))
1174 {
1175 int new_length;
1176 #ifdef ADJUST_INSN_LENGTH
1177 int tmp_length;
1178 #endif
1179 int length_align;
1180
1181 uid = INSN_UID (insn);
1182
1183 if (LABEL_P (insn))
1184 {
1185 int log = LABEL_TO_ALIGNMENT (insn);
1186 if (log > insn_current_align)
1187 {
1188 int align = 1 << log;
1189 int new_address= (insn_current_address + align - 1) & -align;
1190 insn_lengths[uid] = new_address - insn_current_address;
1191 insn_current_align = log;
1192 insn_current_address = new_address;
1193 }
1194 else
1195 insn_lengths[uid] = 0;
1196 INSN_ADDRESSES (uid) = insn_current_address;
1197 continue;
1198 }
1199
1200 length_align = INSN_LENGTH_ALIGNMENT (insn);
1201 if (length_align < insn_current_align)
1202 insn_current_align = length_align;
1203
1204 insn_last_address = INSN_ADDRESSES (uid);
1205 INSN_ADDRESSES (uid) = insn_current_address;
1206
1207 #ifdef CASE_VECTOR_SHORTEN_MODE
1208 if (optimize && JUMP_P (insn)
1209 && GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
1210 {
1211 rtx body = PATTERN (insn);
1212 int old_length = insn_lengths[uid];
1213 rtx rel_lab = XEXP (XEXP (body, 0), 0);
1214 rtx min_lab = XEXP (XEXP (body, 2), 0);
1215 rtx max_lab = XEXP (XEXP (body, 3), 0);
1216 int rel_addr = INSN_ADDRESSES (INSN_UID (rel_lab));
1217 int min_addr = INSN_ADDRESSES (INSN_UID (min_lab));
1218 int max_addr = INSN_ADDRESSES (INSN_UID (max_lab));
1219 rtx prev;
1220 int rel_align = 0;
1221 addr_diff_vec_flags flags;
1222
1223 /* Avoid automatic aggregate initialization. */
1224 flags = ADDR_DIFF_VEC_FLAGS (body);
1225
1226 /* Try to find a known alignment for rel_lab. */
1227 for (prev = rel_lab;
1228 prev
1229 && ! insn_lengths[INSN_UID (prev)]
1230 && ! (varying_length[INSN_UID (prev)] & 1);
1231 prev = PREV_INSN (prev))
1232 if (varying_length[INSN_UID (prev)] & 2)
1233 {
1234 rel_align = LABEL_TO_ALIGNMENT (prev);
1235 break;
1236 }
1237
1238 /* See the comment on addr_diff_vec_flags in rtl.h for the
1239 meaning of the flags values. base: REL_LAB vec: INSN */
1240 /* Anything after INSN has still addresses from the last
1241 pass; adjust these so that they reflect our current
1242 estimate for this pass. */
1243 if (flags.base_after_vec)
1244 rel_addr += insn_current_address - insn_last_address;
1245 if (flags.min_after_vec)
1246 min_addr += insn_current_address - insn_last_address;
1247 if (flags.max_after_vec)
1248 max_addr += insn_current_address - insn_last_address;
1249 /* We want to know the worst case, i.e. lowest possible value
1250 for the offset of MIN_LAB. If MIN_LAB is after REL_LAB,
1251 its offset is positive, and we have to be wary of code shrink;
1252 otherwise, it is negative, and we have to be vary of code
1253 size increase. */
1254 if (flags.min_after_base)
1255 {
1256 /* If INSN is between REL_LAB and MIN_LAB, the size
1257 changes we are about to make can change the alignment
1258 within the observed offset, therefore we have to break
1259 it up into two parts that are independent. */
1260 if (! flags.base_after_vec && flags.min_after_vec)
1261 {
1262 min_addr -= align_fuzz (rel_lab, insn, rel_align, 0);
1263 min_addr -= align_fuzz (insn, min_lab, 0, 0);
1264 }
1265 else
1266 min_addr -= align_fuzz (rel_lab, min_lab, rel_align, 0);
1267 }
1268 else
1269 {
1270 if (flags.base_after_vec && ! flags.min_after_vec)
1271 {
1272 min_addr -= align_fuzz (min_lab, insn, 0, ~0);
1273 min_addr -= align_fuzz (insn, rel_lab, 0, ~0);
1274 }
1275 else
1276 min_addr -= align_fuzz (min_lab, rel_lab, 0, ~0);
1277 }
1278 /* Likewise, determine the highest lowest possible value
1279 for the offset of MAX_LAB. */
1280 if (flags.max_after_base)
1281 {
1282 if (! flags.base_after_vec && flags.max_after_vec)
1283 {
1284 max_addr += align_fuzz (rel_lab, insn, rel_align, ~0);
1285 max_addr += align_fuzz (insn, max_lab, 0, ~0);
1286 }
1287 else
1288 max_addr += align_fuzz (rel_lab, max_lab, rel_align, ~0);
1289 }
1290 else
1291 {
1292 if (flags.base_after_vec && ! flags.max_after_vec)
1293 {
1294 max_addr += align_fuzz (max_lab, insn, 0, 0);
1295 max_addr += align_fuzz (insn, rel_lab, 0, 0);
1296 }
1297 else
1298 max_addr += align_fuzz (max_lab, rel_lab, 0, 0);
1299 }
1300 PUT_MODE (body, CASE_VECTOR_SHORTEN_MODE (min_addr - rel_addr,
1301 max_addr - rel_addr,
1302 body));
1303 if (JUMP_TABLES_IN_TEXT_SECTION
1304 || readonly_data_section == text_section)
1305 {
1306 insn_lengths[uid]
1307 = (XVECLEN (body, 1) * GET_MODE_SIZE (GET_MODE (body)));
1308 insn_current_address += insn_lengths[uid];
1309 if (insn_lengths[uid] != old_length)
1310 something_changed = 1;
1311 }
1312
1313 continue;
1314 }
1315 #endif /* CASE_VECTOR_SHORTEN_MODE */
1316
1317 if (! (varying_length[uid]))
1318 {
1319 if (NONJUMP_INSN_P (insn)
1320 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1321 {
1322 int i;
1323
1324 body = PATTERN (insn);
1325 for (i = 0; i < XVECLEN (body, 0); i++)
1326 {
1327 rtx inner_insn = XVECEXP (body, 0, i);
1328 int inner_uid = INSN_UID (inner_insn);
1329
1330 INSN_ADDRESSES (inner_uid) = insn_current_address;
1331
1332 insn_current_address += insn_lengths[inner_uid];
1333 }
1334 }
1335 else
1336 insn_current_address += insn_lengths[uid];
1337
1338 continue;
1339 }
1340
1341 if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
1342 {
1343 int i;
1344
1345 body = PATTERN (insn);
1346 new_length = 0;
1347 for (i = 0; i < XVECLEN (body, 0); i++)
1348 {
1349 rtx inner_insn = XVECEXP (body, 0, i);
1350 int inner_uid = INSN_UID (inner_insn);
1351 int inner_length;
1352
1353 INSN_ADDRESSES (inner_uid) = insn_current_address;
1354
1355 /* insn_current_length returns 0 for insns with a
1356 non-varying length. */
1357 if (! varying_length[inner_uid])
1358 inner_length = insn_lengths[inner_uid];
1359 else
1360 inner_length = insn_current_length (inner_insn);
1361
1362 if (inner_length != insn_lengths[inner_uid])
1363 {
1364 insn_lengths[inner_uid] = inner_length;
1365 something_changed = 1;
1366 }
1367 insn_current_address += insn_lengths[inner_uid];
1368 new_length += inner_length;
1369 }
1370 }
1371 else
1372 {
1373 new_length = insn_current_length (insn);
1374 insn_current_address += new_length;
1375 }
1376
1377 #ifdef ADJUST_INSN_LENGTH
1378 /* If needed, do any adjustment. */
1379 tmp_length = new_length;
1380 ADJUST_INSN_LENGTH (insn, new_length);
1381 insn_current_address += (new_length - tmp_length);
1382 #endif
1383
1384 if (new_length != insn_lengths[uid])
1385 {
1386 insn_lengths[uid] = new_length;
1387 something_changed = 1;
1388 }
1389 }
1390 /* For a non-optimizing compile, do only a single pass. */
1391 if (!optimize)
1392 break;
1393 }
1394
1395 free (varying_length);
1396
1397 #endif /* HAVE_ATTR_length */
1398 }
1399
1400 #ifdef HAVE_ATTR_length
1401 /* Given the body of an INSN known to be generated by an ASM statement, return
1402 the number of machine instructions likely to be generated for this insn.
1403 This is used to compute its length. */
1404
1405 static int
1406 asm_insn_count (rtx body)
1407 {
1408 const char *templ;
1409
1410 if (GET_CODE (body) == ASM_INPUT)
1411 templ = XSTR (body, 0);
1412 else
1413 templ = decode_asm_operands (body, NULL, NULL, NULL, NULL, NULL);
1414
1415 return asm_str_count (templ);
1416 }
1417 #endif
1418
1419 /* Return the number of machine instructions likely to be generated for the
1420 inline-asm template. */
1421 int
1422 asm_str_count (const char *templ)
1423 {
1424 int count = 1;
1425
1426 if (!*templ)
1427 return 0;
1428
1429 for (; *templ; templ++)
1430 if (IS_ASM_LOGICAL_LINE_SEPARATOR (*templ, templ)
1431 || *templ == '\n')
1432 count++;
1433
1434 return count;
1435 }
1436 \f
1437 /* ??? This is probably the wrong place for these. */
1438 /* Structure recording the mapping from source file and directory
1439 names at compile time to those to be embedded in debug
1440 information. */
1441 typedef struct debug_prefix_map
1442 {
1443 const char *old_prefix;
1444 const char *new_prefix;
1445 size_t old_len;
1446 size_t new_len;
1447 struct debug_prefix_map *next;
1448 } debug_prefix_map;
1449
1450 /* Linked list of such structures. */
1451 debug_prefix_map *debug_prefix_maps;
1452
1453
1454 /* Record a debug file prefix mapping. ARG is the argument to
1455 -fdebug-prefix-map and must be of the form OLD=NEW. */
1456
1457 void
1458 add_debug_prefix_map (const char *arg)
1459 {
1460 debug_prefix_map *map;
1461 const char *p;
1462
1463 p = strchr (arg, '=');
1464 if (!p)
1465 {
1466 error ("invalid argument %qs to -fdebug-prefix-map", arg);
1467 return;
1468 }
1469 map = XNEW (debug_prefix_map);
1470 map->old_prefix = xstrndup (arg, p - arg);
1471 map->old_len = p - arg;
1472 p++;
1473 map->new_prefix = xstrdup (p);
1474 map->new_len = strlen (p);
1475 map->next = debug_prefix_maps;
1476 debug_prefix_maps = map;
1477 }
1478
1479 /* Perform user-specified mapping of debug filename prefixes. Return
1480 the new name corresponding to FILENAME. */
1481
1482 const char *
1483 remap_debug_filename (const char *filename)
1484 {
1485 debug_prefix_map *map;
1486 char *s;
1487 const char *name;
1488 size_t name_len;
1489
1490 for (map = debug_prefix_maps; map; map = map->next)
1491 if (filename_ncmp (filename, map->old_prefix, map->old_len) == 0)
1492 break;
1493 if (!map)
1494 return filename;
1495 name = filename + map->old_len;
1496 name_len = strlen (name) + 1;
1497 s = (char *) alloca (name_len + map->new_len);
1498 memcpy (s, map->new_prefix, map->new_len);
1499 memcpy (s + map->new_len, name, name_len);
1500 return ggc_strdup (s);
1501 }
1502 \f
1503 /* Return true if DWARF2 debug info can be emitted for DECL. */
1504
1505 static bool
1506 dwarf2_debug_info_emitted_p (tree decl)
1507 {
1508 if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG)
1509 return false;
1510
1511 if (DECL_IGNORED_P (decl))
1512 return false;
1513
1514 return true;
1515 }
1516
1517 /* Return scope resulting from combination of S1 and S2. */
1518 static tree
1519 choose_inner_scope (tree s1, tree s2)
1520 {
1521 if (!s1)
1522 return s2;
1523 if (!s2)
1524 return s1;
1525 if (BLOCK_NUMBER (s1) > BLOCK_NUMBER (s2))
1526 return s1;
1527 return s2;
1528 }
1529
1530 /* Emit lexical block notes needed to change scope from S1 to S2. */
1531
1532 static void
1533 change_scope (rtx orig_insn, tree s1, tree s2)
1534 {
1535 rtx insn = orig_insn;
1536 tree com = NULL_TREE;
1537 tree ts1 = s1, ts2 = s2;
1538 tree s;
1539
1540 while (ts1 != ts2)
1541 {
1542 gcc_assert (ts1 && ts2);
1543 if (BLOCK_NUMBER (ts1) > BLOCK_NUMBER (ts2))
1544 ts1 = BLOCK_SUPERCONTEXT (ts1);
1545 else if (BLOCK_NUMBER (ts1) < BLOCK_NUMBER (ts2))
1546 ts2 = BLOCK_SUPERCONTEXT (ts2);
1547 else
1548 {
1549 ts1 = BLOCK_SUPERCONTEXT (ts1);
1550 ts2 = BLOCK_SUPERCONTEXT (ts2);
1551 }
1552 }
1553 com = ts1;
1554
1555 /* Close scopes. */
1556 s = s1;
1557 while (s != com)
1558 {
1559 rtx note = emit_note_before (NOTE_INSN_BLOCK_END, insn);
1560 NOTE_BLOCK (note) = s;
1561 s = BLOCK_SUPERCONTEXT (s);
1562 }
1563
1564 /* Open scopes. */
1565 s = s2;
1566 while (s != com)
1567 {
1568 insn = emit_note_before (NOTE_INSN_BLOCK_BEG, insn);
1569 NOTE_BLOCK (insn) = s;
1570 s = BLOCK_SUPERCONTEXT (s);
1571 }
1572 }
1573
1574 /* Rebuild all the NOTE_INSN_BLOCK_BEG and NOTE_INSN_BLOCK_END notes based
1575 on the scope tree and the newly reordered instructions. */
1576
1577 static void
1578 reemit_insn_block_notes (void)
1579 {
1580 tree cur_block = DECL_INITIAL (cfun->decl);
1581 rtx insn, note;
1582
1583 insn = get_insns ();
1584 if (!active_insn_p (insn))
1585 insn = next_active_insn (insn);
1586 for (; insn; insn = next_active_insn (insn))
1587 {
1588 tree this_block;
1589
1590 /* Avoid putting scope notes between jump table and its label. */
1591 if (JUMP_TABLE_DATA_P (insn))
1592 continue;
1593
1594 this_block = insn_scope (insn);
1595 /* For sequences compute scope resulting from merging all scopes
1596 of instructions nested inside. */
1597 if (GET_CODE (PATTERN (insn)) == SEQUENCE)
1598 {
1599 int i;
1600 rtx body = PATTERN (insn);
1601
1602 this_block = NULL;
1603 for (i = 0; i < XVECLEN (body, 0); i++)
1604 this_block = choose_inner_scope (this_block,
1605 insn_scope (XVECEXP (body, 0, i)));
1606 }
1607 if (! this_block)
1608 continue;
1609
1610 if (this_block != cur_block)
1611 {
1612 change_scope (insn, cur_block, this_block);
1613 cur_block = this_block;
1614 }
1615 }
1616
1617 /* change_scope emits before the insn, not after. */
1618 note = emit_note (NOTE_INSN_DELETED);
1619 change_scope (note, cur_block, DECL_INITIAL (cfun->decl));
1620 delete_insn (note);
1621
1622 reorder_blocks ();
1623 }
1624
1625 /* Output assembler code for the start of a function,
1626 and initialize some of the variables in this file
1627 for the new function. The label for the function and associated
1628 assembler pseudo-ops have already been output in `assemble_start_function'.
1629
1630 FIRST is the first insn of the rtl for the function being compiled.
1631 FILE is the file to write assembler code to.
1632 OPTIMIZE_P is nonzero if we should eliminate redundant
1633 test and compare insns. */
1634
1635 void
1636 final_start_function (rtx first ATTRIBUTE_UNUSED, FILE *file,
1637 int optimize_p ATTRIBUTE_UNUSED)
1638 {
1639 block_depth = 0;
1640
1641 this_is_asm_operands = 0;
1642
1643 last_filename = locator_file (prologue_locator);
1644 last_linenum = locator_line (prologue_locator);
1645 last_discriminator = discriminator = 0;
1646
1647 high_block_linenum = high_function_linenum = last_linenum;
1648
1649 if (!DECL_IGNORED_P (current_function_decl))
1650 debug_hooks->begin_prologue (last_linenum, last_filename);
1651
1652 if (!dwarf2_debug_info_emitted_p (current_function_decl))
1653 dwarf2out_begin_prologue (0, NULL);
1654
1655 #ifdef LEAF_REG_REMAP
1656 if (crtl->uses_only_leaf_regs)
1657 leaf_renumber_regs (first);
1658 #endif
1659
1660 /* The Sun386i and perhaps other machines don't work right
1661 if the profiling code comes after the prologue. */
1662 if (targetm.profile_before_prologue () && crtl->profile)
1663 profile_function (file);
1664
1665 /* If debugging, assign block numbers to all of the blocks in this
1666 function. */
1667 if (write_symbols)
1668 {
1669 reemit_insn_block_notes ();
1670 number_blocks (current_function_decl);
1671 /* We never actually put out begin/end notes for the top-level
1672 block in the function. But, conceptually, that block is
1673 always needed. */
1674 TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl)) = 1;
1675 }
1676
1677 if (warn_frame_larger_than
1678 && get_frame_size () > frame_larger_than_size)
1679 {
1680 /* Issue a warning */
1681 warning (OPT_Wframe_larger_than_,
1682 "the frame size of %wd bytes is larger than %wd bytes",
1683 get_frame_size (), frame_larger_than_size);
1684 }
1685
1686 /* First output the function prologue: code to set up the stack frame. */
1687 targetm.asm_out.function_prologue (file, get_frame_size ());
1688
1689 /* If the machine represents the prologue as RTL, the profiling code must
1690 be emitted when NOTE_INSN_PROLOGUE_END is scanned. */
1691 #ifdef HAVE_prologue
1692 if (! HAVE_prologue)
1693 #endif
1694 profile_after_prologue (file);
1695 }
1696
1697 static void
1698 profile_after_prologue (FILE *file ATTRIBUTE_UNUSED)
1699 {
1700 if (!targetm.profile_before_prologue () && crtl->profile)
1701 profile_function (file);
1702 }
1703
1704 static void
1705 profile_function (FILE *file ATTRIBUTE_UNUSED)
1706 {
1707 #ifndef NO_PROFILE_COUNTERS
1708 # define NO_PROFILE_COUNTERS 0
1709 #endif
1710 #ifdef ASM_OUTPUT_REG_PUSH
1711 rtx sval = NULL, chain = NULL;
1712
1713 if (cfun->returns_struct)
1714 sval = targetm.calls.struct_value_rtx (TREE_TYPE (current_function_decl),
1715 true);
1716 if (cfun->static_chain_decl)
1717 chain = targetm.calls.static_chain (current_function_decl, true);
1718 #endif /* ASM_OUTPUT_REG_PUSH */
1719
1720 if (! NO_PROFILE_COUNTERS)
1721 {
1722 int align = MIN (BIGGEST_ALIGNMENT, LONG_TYPE_SIZE);
1723 switch_to_section (data_section);
1724 ASM_OUTPUT_ALIGN (file, floor_log2 (align / BITS_PER_UNIT));
1725 targetm.asm_out.internal_label (file, "LP", current_function_funcdef_no);
1726 assemble_integer (const0_rtx, LONG_TYPE_SIZE / BITS_PER_UNIT, align, 1);
1727 }
1728
1729 switch_to_section (current_function_section ());
1730
1731 #ifdef ASM_OUTPUT_REG_PUSH
1732 if (sval && REG_P (sval))
1733 ASM_OUTPUT_REG_PUSH (file, REGNO (sval));
1734 if (chain && REG_P (chain))
1735 ASM_OUTPUT_REG_PUSH (file, REGNO (chain));
1736 #endif
1737
1738 FUNCTION_PROFILER (file, current_function_funcdef_no);
1739
1740 #ifdef ASM_OUTPUT_REG_PUSH
1741 if (chain && REG_P (chain))
1742 ASM_OUTPUT_REG_POP (file, REGNO (chain));
1743 if (sval && REG_P (sval))
1744 ASM_OUTPUT_REG_POP (file, REGNO (sval));
1745 #endif
1746 }
1747
1748 /* Output assembler code for the end of a function.
1749 For clarity, args are same as those of `final_start_function'
1750 even though not all of them are needed. */
1751
1752 void
1753 final_end_function (void)
1754 {
1755 app_disable ();
1756
1757 if (!DECL_IGNORED_P (current_function_decl))
1758 debug_hooks->end_function (high_function_linenum);
1759
1760 /* Finally, output the function epilogue:
1761 code to restore the stack frame and return to the caller. */
1762 targetm.asm_out.function_epilogue (asm_out_file, get_frame_size ());
1763
1764 /* And debug output. */
1765 if (!DECL_IGNORED_P (current_function_decl))
1766 debug_hooks->end_epilogue (last_linenum, last_filename);
1767
1768 if (!dwarf2_debug_info_emitted_p (current_function_decl)
1769 && dwarf2out_do_frame ())
1770 dwarf2out_end_epilogue (last_linenum, last_filename);
1771 }
1772 \f
1773
1774 /* Dumper helper for basic block information. FILE is the assembly
1775 output file, and INSN is the instruction being emitted. */
1776
1777 static void
1778 dump_basic_block_info (FILE *file, rtx insn, basic_block *start_to_bb,
1779 basic_block *end_to_bb, int bb_map_size, int *bb_seqn)
1780 {
1781 basic_block bb;
1782
1783 if (!flag_debug_asm)
1784 return;
1785
1786 if (INSN_UID (insn) < bb_map_size
1787 && (bb = start_to_bb[INSN_UID (insn)]) != NULL)
1788 {
1789 edge e;
1790 edge_iterator ei;
1791
1792 fprintf (file, "%s BLOCK %d", ASM_COMMENT_START, bb->index);
1793 if (bb->frequency)
1794 fprintf (file, " freq:%d", bb->frequency);
1795 if (bb->count)
1796 fprintf (file, " count:" HOST_WIDEST_INT_PRINT_DEC,
1797 bb->count);
1798 fprintf (file, " seq:%d", (*bb_seqn)++);
1799 fprintf (file, "\n%s PRED:", ASM_COMMENT_START);
1800 FOR_EACH_EDGE (e, ei, bb->preds)
1801 {
1802 dump_edge_info (file, e, TDF_DETAILS, 0);
1803 }
1804 fprintf (file, "\n");
1805 }
1806 if (INSN_UID (insn) < bb_map_size
1807 && (bb = end_to_bb[INSN_UID (insn)]) != NULL)
1808 {
1809 edge e;
1810 edge_iterator ei;
1811
1812 fprintf (asm_out_file, "%s SUCC:", ASM_COMMENT_START);
1813 FOR_EACH_EDGE (e, ei, bb->succs)
1814 {
1815 dump_edge_info (asm_out_file, e, TDF_DETAILS, 1);
1816 }
1817 fprintf (file, "\n");
1818 }
1819 }
1820
1821 /* Output assembler code for some insns: all or part of a function.
1822 For description of args, see `final_start_function', above. */
1823
1824 void
1825 final (rtx first, FILE *file, int optimize_p)
1826 {
1827 rtx insn, next;
1828 int seen = 0;
1829
1830 /* Used for -dA dump. */
1831 basic_block *start_to_bb = NULL;
1832 basic_block *end_to_bb = NULL;
1833 int bb_map_size = 0;
1834 int bb_seqn = 0;
1835
1836 last_ignored_compare = 0;
1837
1838 #ifdef HAVE_cc0
1839 for (insn = first; insn; insn = NEXT_INSN (insn))
1840 {
1841 /* If CC tracking across branches is enabled, record the insn which
1842 jumps to each branch only reached from one place. */
1843 if (optimize_p && JUMP_P (insn))
1844 {
1845 rtx lab = JUMP_LABEL (insn);
1846 if (lab && LABEL_P (lab) && LABEL_NUSES (lab) == 1)
1847 {
1848 LABEL_REFS (lab) = insn;
1849 }
1850 }
1851 }
1852 #endif
1853
1854 init_recog ();
1855
1856 CC_STATUS_INIT;
1857
1858 if (flag_debug_asm)
1859 {
1860 basic_block bb;
1861
1862 bb_map_size = get_max_uid () + 1;
1863 start_to_bb = XCNEWVEC (basic_block, bb_map_size);
1864 end_to_bb = XCNEWVEC (basic_block, bb_map_size);
1865
1866 FOR_EACH_BB_REVERSE (bb)
1867 {
1868 start_to_bb[INSN_UID (BB_HEAD (bb))] = bb;
1869 end_to_bb[INSN_UID (BB_END (bb))] = bb;
1870 }
1871 }
1872
1873 /* Output the insns. */
1874 for (insn = first; insn;)
1875 {
1876 #ifdef HAVE_ATTR_length
1877 if ((unsigned) INSN_UID (insn) >= INSN_ADDRESSES_SIZE ())
1878 {
1879 /* This can be triggered by bugs elsewhere in the compiler if
1880 new insns are created after init_insn_lengths is called. */
1881 gcc_assert (NOTE_P (insn));
1882 insn_current_address = -1;
1883 }
1884 else
1885 insn_current_address = INSN_ADDRESSES (INSN_UID (insn));
1886 #endif /* HAVE_ATTR_length */
1887
1888 dump_basic_block_info (file, insn, start_to_bb, end_to_bb,
1889 bb_map_size, &bb_seqn);
1890 insn = final_scan_insn (insn, file, optimize_p, 0, &seen);
1891 }
1892
1893 if (flag_debug_asm)
1894 {
1895 free (start_to_bb);
1896 free (end_to_bb);
1897 }
1898
1899 /* Remove CFI notes, to avoid compare-debug failures. */
1900 for (insn = first; insn; insn = next)
1901 {
1902 next = NEXT_INSN (insn);
1903 if (NOTE_P (insn)
1904 && (NOTE_KIND (insn) == NOTE_INSN_CFI
1905 || NOTE_KIND (insn) == NOTE_INSN_CFI_LABEL))
1906 delete_insn (insn);
1907 }
1908 }
1909 \f
1910 const char *
1911 get_insn_template (int code, rtx insn)
1912 {
1913 switch (insn_data[code].output_format)
1914 {
1915 case INSN_OUTPUT_FORMAT_SINGLE:
1916 return insn_data[code].output.single;
1917 case INSN_OUTPUT_FORMAT_MULTI:
1918 return insn_data[code].output.multi[which_alternative];
1919 case INSN_OUTPUT_FORMAT_FUNCTION:
1920 gcc_assert (insn);
1921 return (*insn_data[code].output.function) (recog_data.operand, insn);
1922
1923 default:
1924 gcc_unreachable ();
1925 }
1926 }
1927
1928 /* Emit the appropriate declaration for an alternate-entry-point
1929 symbol represented by INSN, to FILE. INSN is a CODE_LABEL with
1930 LABEL_KIND != LABEL_NORMAL.
1931
1932 The case fall-through in this function is intentional. */
1933 static void
1934 output_alternate_entry_point (FILE *file, rtx insn)
1935 {
1936 const char *name = LABEL_NAME (insn);
1937
1938 switch (LABEL_KIND (insn))
1939 {
1940 case LABEL_WEAK_ENTRY:
1941 #ifdef ASM_WEAKEN_LABEL
1942 ASM_WEAKEN_LABEL (file, name);
1943 #endif
1944 case LABEL_GLOBAL_ENTRY:
1945 targetm.asm_out.globalize_label (file, name);
1946 case LABEL_STATIC_ENTRY:
1947 #ifdef ASM_OUTPUT_TYPE_DIRECTIVE
1948 ASM_OUTPUT_TYPE_DIRECTIVE (file, name, "function");
1949 #endif
1950 ASM_OUTPUT_LABEL (file, name);
1951 break;
1952
1953 case LABEL_NORMAL:
1954 default:
1955 gcc_unreachable ();
1956 }
1957 }
1958
1959 /* Given a CALL_INSN, find and return the nested CALL. */
1960 static rtx
1961 call_from_call_insn (rtx insn)
1962 {
1963 rtx x;
1964 gcc_assert (CALL_P (insn));
1965 x = PATTERN (insn);
1966
1967 while (GET_CODE (x) != CALL)
1968 {
1969 switch (GET_CODE (x))
1970 {
1971 default:
1972 gcc_unreachable ();
1973 case COND_EXEC:
1974 x = COND_EXEC_CODE (x);
1975 break;
1976 case PARALLEL:
1977 x = XVECEXP (x, 0, 0);
1978 break;
1979 case SET:
1980 x = XEXP (x, 1);
1981 break;
1982 }
1983 }
1984 return x;
1985 }
1986
1987 /* The final scan for one insn, INSN.
1988 Args are same as in `final', except that INSN
1989 is the insn being scanned.
1990 Value returned is the next insn to be scanned.
1991
1992 NOPEEPHOLES is the flag to disallow peephole processing (currently
1993 used for within delayed branch sequence output).
1994
1995 SEEN is used to track the end of the prologue, for emitting
1996 debug information. We force the emission of a line note after
1997 both NOTE_INSN_PROLOGUE_END and NOTE_INSN_FUNCTION_BEG, or
1998 at the beginning of the second basic block, whichever comes
1999 first. */
2000
2001 rtx
2002 final_scan_insn (rtx insn, FILE *file, int optimize_p ATTRIBUTE_UNUSED,
2003 int nopeepholes ATTRIBUTE_UNUSED, int *seen)
2004 {
2005 #ifdef HAVE_cc0
2006 rtx set;
2007 #endif
2008 rtx next;
2009
2010 insn_counter++;
2011
2012 /* Ignore deleted insns. These can occur when we split insns (due to a
2013 template of "#") while not optimizing. */
2014 if (INSN_DELETED_P (insn))
2015 return NEXT_INSN (insn);
2016
2017 switch (GET_CODE (insn))
2018 {
2019 case NOTE:
2020 switch (NOTE_KIND (insn))
2021 {
2022 case NOTE_INSN_DELETED:
2023 break;
2024
2025 case NOTE_INSN_SWITCH_TEXT_SECTIONS:
2026 in_cold_section_p = !in_cold_section_p;
2027
2028 if (dwarf2out_do_frame ())
2029 dwarf2out_switch_text_section ();
2030 else if (!DECL_IGNORED_P (current_function_decl))
2031 debug_hooks->switch_text_section ();
2032
2033 switch_to_section (current_function_section ());
2034 targetm.asm_out.function_switched_text_sections (asm_out_file,
2035 current_function_decl,
2036 in_cold_section_p);
2037 break;
2038
2039 case NOTE_INSN_BASIC_BLOCK:
2040 if (targetm.asm_out.unwind_emit)
2041 targetm.asm_out.unwind_emit (asm_out_file, insn);
2042
2043 if ((*seen & (SEEN_EMITTED | SEEN_BB)) == SEEN_BB)
2044 {
2045 *seen |= SEEN_EMITTED;
2046 force_source_line = true;
2047 }
2048 else
2049 *seen |= SEEN_BB;
2050
2051 discriminator = NOTE_BASIC_BLOCK (insn)->discriminator;
2052
2053 break;
2054
2055 case NOTE_INSN_EH_REGION_BEG:
2056 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHB",
2057 NOTE_EH_HANDLER (insn));
2058 break;
2059
2060 case NOTE_INSN_EH_REGION_END:
2061 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHE",
2062 NOTE_EH_HANDLER (insn));
2063 break;
2064
2065 case NOTE_INSN_PROLOGUE_END:
2066 targetm.asm_out.function_end_prologue (file);
2067 profile_after_prologue (file);
2068
2069 if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE)
2070 {
2071 *seen |= SEEN_EMITTED;
2072 force_source_line = true;
2073 }
2074 else
2075 *seen |= SEEN_NOTE;
2076
2077 break;
2078
2079 case NOTE_INSN_EPILOGUE_BEG:
2080 if (!DECL_IGNORED_P (current_function_decl))
2081 (*debug_hooks->begin_epilogue) (last_linenum, last_filename);
2082 targetm.asm_out.function_begin_epilogue (file);
2083 break;
2084
2085 case NOTE_INSN_CFI:
2086 dwarf2out_emit_cfi (NOTE_CFI (insn));
2087 break;
2088
2089 case NOTE_INSN_CFI_LABEL:
2090 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LCFI",
2091 NOTE_LABEL_NUMBER (insn));
2092 break;
2093
2094 case NOTE_INSN_FUNCTION_BEG:
2095 app_disable ();
2096 if (!DECL_IGNORED_P (current_function_decl))
2097 debug_hooks->end_prologue (last_linenum, last_filename);
2098
2099 if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE)
2100 {
2101 *seen |= SEEN_EMITTED;
2102 force_source_line = true;
2103 }
2104 else
2105 *seen |= SEEN_NOTE;
2106
2107 break;
2108
2109 case NOTE_INSN_BLOCK_BEG:
2110 if (debug_info_level == DINFO_LEVEL_NORMAL
2111 || debug_info_level == DINFO_LEVEL_VERBOSE
2112 || write_symbols == DWARF2_DEBUG
2113 || write_symbols == VMS_AND_DWARF2_DEBUG
2114 || write_symbols == VMS_DEBUG)
2115 {
2116 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
2117
2118 app_disable ();
2119 ++block_depth;
2120 high_block_linenum = last_linenum;
2121
2122 /* Output debugging info about the symbol-block beginning. */
2123 if (!DECL_IGNORED_P (current_function_decl))
2124 debug_hooks->begin_block (last_linenum, n);
2125
2126 /* Mark this block as output. */
2127 TREE_ASM_WRITTEN (NOTE_BLOCK (insn)) = 1;
2128 }
2129 if (write_symbols == DBX_DEBUG
2130 || write_symbols == SDB_DEBUG)
2131 {
2132 location_t *locus_ptr
2133 = block_nonartificial_location (NOTE_BLOCK (insn));
2134
2135 if (locus_ptr != NULL)
2136 {
2137 override_filename = LOCATION_FILE (*locus_ptr);
2138 override_linenum = LOCATION_LINE (*locus_ptr);
2139 }
2140 }
2141 break;
2142
2143 case NOTE_INSN_BLOCK_END:
2144 if (debug_info_level == DINFO_LEVEL_NORMAL
2145 || debug_info_level == DINFO_LEVEL_VERBOSE
2146 || write_symbols == DWARF2_DEBUG
2147 || write_symbols == VMS_AND_DWARF2_DEBUG
2148 || write_symbols == VMS_DEBUG)
2149 {
2150 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
2151
2152 app_disable ();
2153
2154 /* End of a symbol-block. */
2155 --block_depth;
2156 gcc_assert (block_depth >= 0);
2157
2158 if (!DECL_IGNORED_P (current_function_decl))
2159 debug_hooks->end_block (high_block_linenum, n);
2160 }
2161 if (write_symbols == DBX_DEBUG
2162 || write_symbols == SDB_DEBUG)
2163 {
2164 tree outer_block = BLOCK_SUPERCONTEXT (NOTE_BLOCK (insn));
2165 location_t *locus_ptr
2166 = block_nonartificial_location (outer_block);
2167
2168 if (locus_ptr != NULL)
2169 {
2170 override_filename = LOCATION_FILE (*locus_ptr);
2171 override_linenum = LOCATION_LINE (*locus_ptr);
2172 }
2173 else
2174 {
2175 override_filename = NULL;
2176 override_linenum = 0;
2177 }
2178 }
2179 break;
2180
2181 case NOTE_INSN_DELETED_LABEL:
2182 /* Emit the label. We may have deleted the CODE_LABEL because
2183 the label could be proved to be unreachable, though still
2184 referenced (in the form of having its address taken. */
2185 ASM_OUTPUT_DEBUG_LABEL (file, "L", CODE_LABEL_NUMBER (insn));
2186 break;
2187
2188 case NOTE_INSN_DELETED_DEBUG_LABEL:
2189 /* Similarly, but need to use different namespace for it. */
2190 if (CODE_LABEL_NUMBER (insn) != -1)
2191 ASM_OUTPUT_DEBUG_LABEL (file, "LDL", CODE_LABEL_NUMBER (insn));
2192 break;
2193
2194 case NOTE_INSN_VAR_LOCATION:
2195 case NOTE_INSN_CALL_ARG_LOCATION:
2196 if (!DECL_IGNORED_P (current_function_decl))
2197 debug_hooks->var_location (insn);
2198 break;
2199
2200 default:
2201 gcc_unreachable ();
2202 break;
2203 }
2204 break;
2205
2206 case BARRIER:
2207 break;
2208
2209 case CODE_LABEL:
2210 /* The target port might emit labels in the output function for
2211 some insn, e.g. sh.c output_branchy_insn. */
2212 if (CODE_LABEL_NUMBER (insn) <= max_labelno)
2213 {
2214 int align = LABEL_TO_ALIGNMENT (insn);
2215 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2216 int max_skip = LABEL_TO_MAX_SKIP (insn);
2217 #endif
2218
2219 if (align && NEXT_INSN (insn))
2220 {
2221 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2222 ASM_OUTPUT_MAX_SKIP_ALIGN (file, align, max_skip);
2223 #else
2224 #ifdef ASM_OUTPUT_ALIGN_WITH_NOP
2225 ASM_OUTPUT_ALIGN_WITH_NOP (file, align);
2226 #else
2227 ASM_OUTPUT_ALIGN (file, align);
2228 #endif
2229 #endif
2230 }
2231 }
2232 CC_STATUS_INIT;
2233
2234 if (!DECL_IGNORED_P (current_function_decl) && LABEL_NAME (insn))
2235 debug_hooks->label (insn);
2236
2237 app_disable ();
2238
2239 next = next_nonnote_insn (insn);
2240 /* If this label is followed by a jump-table, make sure we put
2241 the label in the read-only section. Also possibly write the
2242 label and jump table together. */
2243 if (next != 0 && JUMP_TABLE_DATA_P (next))
2244 {
2245 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2246 /* In this case, the case vector is being moved by the
2247 target, so don't output the label at all. Leave that
2248 to the back end macros. */
2249 #else
2250 if (! JUMP_TABLES_IN_TEXT_SECTION)
2251 {
2252 int log_align;
2253
2254 switch_to_section (targetm.asm_out.function_rodata_section
2255 (current_function_decl));
2256
2257 #ifdef ADDR_VEC_ALIGN
2258 log_align = ADDR_VEC_ALIGN (next);
2259 #else
2260 log_align = exact_log2 (BIGGEST_ALIGNMENT / BITS_PER_UNIT);
2261 #endif
2262 ASM_OUTPUT_ALIGN (file, log_align);
2263 }
2264 else
2265 switch_to_section (current_function_section ());
2266
2267 #ifdef ASM_OUTPUT_CASE_LABEL
2268 ASM_OUTPUT_CASE_LABEL (file, "L", CODE_LABEL_NUMBER (insn),
2269 next);
2270 #else
2271 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn));
2272 #endif
2273 #endif
2274 break;
2275 }
2276 if (LABEL_ALT_ENTRY_P (insn))
2277 output_alternate_entry_point (file, insn);
2278 else
2279 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn));
2280 break;
2281
2282 default:
2283 {
2284 rtx body = PATTERN (insn);
2285 int insn_code_number;
2286 const char *templ;
2287 bool is_stmt;
2288
2289 /* Reset this early so it is correct for ASM statements. */
2290 current_insn_predicate = NULL_RTX;
2291
2292 /* An INSN, JUMP_INSN or CALL_INSN.
2293 First check for special kinds that recog doesn't recognize. */
2294
2295 if (GET_CODE (body) == USE /* These are just declarations. */
2296 || GET_CODE (body) == CLOBBER)
2297 break;
2298
2299 #ifdef HAVE_cc0
2300 {
2301 /* If there is a REG_CC_SETTER note on this insn, it means that
2302 the setting of the condition code was done in the delay slot
2303 of the insn that branched here. So recover the cc status
2304 from the insn that set it. */
2305
2306 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2307 if (note)
2308 {
2309 NOTICE_UPDATE_CC (PATTERN (XEXP (note, 0)), XEXP (note, 0));
2310 cc_prev_status = cc_status;
2311 }
2312 }
2313 #endif
2314
2315 /* Detect insns that are really jump-tables
2316 and output them as such. */
2317
2318 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
2319 {
2320 #if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC))
2321 int vlen, idx;
2322 #endif
2323
2324 if (! JUMP_TABLES_IN_TEXT_SECTION)
2325 switch_to_section (targetm.asm_out.function_rodata_section
2326 (current_function_decl));
2327 else
2328 switch_to_section (current_function_section ());
2329
2330 app_disable ();
2331
2332 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2333 if (GET_CODE (body) == ADDR_VEC)
2334 {
2335 #ifdef ASM_OUTPUT_ADDR_VEC
2336 ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn), body);
2337 #else
2338 gcc_unreachable ();
2339 #endif
2340 }
2341 else
2342 {
2343 #ifdef ASM_OUTPUT_ADDR_DIFF_VEC
2344 ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn), body);
2345 #else
2346 gcc_unreachable ();
2347 #endif
2348 }
2349 #else
2350 vlen = XVECLEN (body, GET_CODE (body) == ADDR_DIFF_VEC);
2351 for (idx = 0; idx < vlen; idx++)
2352 {
2353 if (GET_CODE (body) == ADDR_VEC)
2354 {
2355 #ifdef ASM_OUTPUT_ADDR_VEC_ELT
2356 ASM_OUTPUT_ADDR_VEC_ELT
2357 (file, CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 0, idx), 0)));
2358 #else
2359 gcc_unreachable ();
2360 #endif
2361 }
2362 else
2363 {
2364 #ifdef ASM_OUTPUT_ADDR_DIFF_ELT
2365 ASM_OUTPUT_ADDR_DIFF_ELT
2366 (file,
2367 body,
2368 CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 1, idx), 0)),
2369 CODE_LABEL_NUMBER (XEXP (XEXP (body, 0), 0)));
2370 #else
2371 gcc_unreachable ();
2372 #endif
2373 }
2374 }
2375 #ifdef ASM_OUTPUT_CASE_END
2376 ASM_OUTPUT_CASE_END (file,
2377 CODE_LABEL_NUMBER (PREV_INSN (insn)),
2378 insn);
2379 #endif
2380 #endif
2381
2382 switch_to_section (current_function_section ());
2383
2384 break;
2385 }
2386 /* Output this line note if it is the first or the last line
2387 note in a row. */
2388 if (!DECL_IGNORED_P (current_function_decl)
2389 && notice_source_line (insn, &is_stmt))
2390 (*debug_hooks->source_line) (last_linenum, last_filename,
2391 last_discriminator, is_stmt);
2392
2393 if (GET_CODE (body) == ASM_INPUT)
2394 {
2395 const char *string = XSTR (body, 0);
2396
2397 /* There's no telling what that did to the condition codes. */
2398 CC_STATUS_INIT;
2399
2400 if (string[0])
2401 {
2402 expanded_location loc;
2403
2404 app_enable ();
2405 loc = expand_location (ASM_INPUT_SOURCE_LOCATION (body));
2406 if (*loc.file && loc.line)
2407 fprintf (asm_out_file, "%s %i \"%s\" 1\n",
2408 ASM_COMMENT_START, loc.line, loc.file);
2409 fprintf (asm_out_file, "\t%s\n", string);
2410 #if HAVE_AS_LINE_ZERO
2411 if (*loc.file && loc.line)
2412 fprintf (asm_out_file, "%s 0 \"\" 2\n", ASM_COMMENT_START);
2413 #endif
2414 }
2415 break;
2416 }
2417
2418 /* Detect `asm' construct with operands. */
2419 if (asm_noperands (body) >= 0)
2420 {
2421 unsigned int noperands = asm_noperands (body);
2422 rtx *ops = XALLOCAVEC (rtx, noperands);
2423 const char *string;
2424 location_t loc;
2425 expanded_location expanded;
2426
2427 /* There's no telling what that did to the condition codes. */
2428 CC_STATUS_INIT;
2429
2430 /* Get out the operand values. */
2431 string = decode_asm_operands (body, ops, NULL, NULL, NULL, &loc);
2432 /* Inhibit dying on what would otherwise be compiler bugs. */
2433 insn_noperands = noperands;
2434 this_is_asm_operands = insn;
2435 expanded = expand_location (loc);
2436
2437 #ifdef FINAL_PRESCAN_INSN
2438 FINAL_PRESCAN_INSN (insn, ops, insn_noperands);
2439 #endif
2440
2441 /* Output the insn using them. */
2442 if (string[0])
2443 {
2444 app_enable ();
2445 if (expanded.file && expanded.line)
2446 fprintf (asm_out_file, "%s %i \"%s\" 1\n",
2447 ASM_COMMENT_START, expanded.line, expanded.file);
2448 output_asm_insn (string, ops);
2449 #if HAVE_AS_LINE_ZERO
2450 if (expanded.file && expanded.line)
2451 fprintf (asm_out_file, "%s 0 \"\" 2\n", ASM_COMMENT_START);
2452 #endif
2453 }
2454
2455 if (targetm.asm_out.final_postscan_insn)
2456 targetm.asm_out.final_postscan_insn (file, insn, ops,
2457 insn_noperands);
2458
2459 this_is_asm_operands = 0;
2460 break;
2461 }
2462
2463 app_disable ();
2464
2465 if (GET_CODE (body) == SEQUENCE)
2466 {
2467 /* A delayed-branch sequence */
2468 int i;
2469
2470 final_sequence = body;
2471
2472 /* The first insn in this SEQUENCE might be a JUMP_INSN that will
2473 force the restoration of a comparison that was previously
2474 thought unnecessary. If that happens, cancel this sequence
2475 and cause that insn to be restored. */
2476
2477 next = final_scan_insn (XVECEXP (body, 0, 0), file, 0, 1, seen);
2478 if (next != XVECEXP (body, 0, 1))
2479 {
2480 final_sequence = 0;
2481 return next;
2482 }
2483
2484 for (i = 1; i < XVECLEN (body, 0); i++)
2485 {
2486 rtx insn = XVECEXP (body, 0, i);
2487 rtx next = NEXT_INSN (insn);
2488 /* We loop in case any instruction in a delay slot gets
2489 split. */
2490 do
2491 insn = final_scan_insn (insn, file, 0, 1, seen);
2492 while (insn != next);
2493 }
2494 #ifdef DBR_OUTPUT_SEQEND
2495 DBR_OUTPUT_SEQEND (file);
2496 #endif
2497 final_sequence = 0;
2498
2499 /* If the insn requiring the delay slot was a CALL_INSN, the
2500 insns in the delay slot are actually executed before the
2501 called function. Hence we don't preserve any CC-setting
2502 actions in these insns and the CC must be marked as being
2503 clobbered by the function. */
2504 if (CALL_P (XVECEXP (body, 0, 0)))
2505 {
2506 CC_STATUS_INIT;
2507 }
2508 break;
2509 }
2510
2511 /* We have a real machine instruction as rtl. */
2512
2513 body = PATTERN (insn);
2514
2515 #ifdef HAVE_cc0
2516 set = single_set (insn);
2517
2518 /* Check for redundant test and compare instructions
2519 (when the condition codes are already set up as desired).
2520 This is done only when optimizing; if not optimizing,
2521 it should be possible for the user to alter a variable
2522 with the debugger in between statements
2523 and the next statement should reexamine the variable
2524 to compute the condition codes. */
2525
2526 if (optimize_p)
2527 {
2528 if (set
2529 && GET_CODE (SET_DEST (set)) == CC0
2530 && insn != last_ignored_compare)
2531 {
2532 rtx src1, src2;
2533 if (GET_CODE (SET_SRC (set)) == SUBREG)
2534 SET_SRC (set) = alter_subreg (&SET_SRC (set));
2535
2536 src1 = SET_SRC (set);
2537 src2 = NULL_RTX;
2538 if (GET_CODE (SET_SRC (set)) == COMPARE)
2539 {
2540 if (GET_CODE (XEXP (SET_SRC (set), 0)) == SUBREG)
2541 XEXP (SET_SRC (set), 0)
2542 = alter_subreg (&XEXP (SET_SRC (set), 0));
2543 if (GET_CODE (XEXP (SET_SRC (set), 1)) == SUBREG)
2544 XEXP (SET_SRC (set), 1)
2545 = alter_subreg (&XEXP (SET_SRC (set), 1));
2546 if (XEXP (SET_SRC (set), 1)
2547 == CONST0_RTX (GET_MODE (XEXP (SET_SRC (set), 0))))
2548 src2 = XEXP (SET_SRC (set), 0);
2549 }
2550 if ((cc_status.value1 != 0
2551 && rtx_equal_p (src1, cc_status.value1))
2552 || (cc_status.value2 != 0
2553 && rtx_equal_p (src1, cc_status.value2))
2554 || (src2 != 0 && cc_status.value1 != 0
2555 && rtx_equal_p (src2, cc_status.value1))
2556 || (src2 != 0 && cc_status.value2 != 0
2557 && rtx_equal_p (src2, cc_status.value2)))
2558 {
2559 /* Don't delete insn if it has an addressing side-effect. */
2560 if (! FIND_REG_INC_NOTE (insn, NULL_RTX)
2561 /* or if anything in it is volatile. */
2562 && ! volatile_refs_p (PATTERN (insn)))
2563 {
2564 /* We don't really delete the insn; just ignore it. */
2565 last_ignored_compare = insn;
2566 break;
2567 }
2568 }
2569 }
2570 }
2571
2572 /* If this is a conditional branch, maybe modify it
2573 if the cc's are in a nonstandard state
2574 so that it accomplishes the same thing that it would
2575 do straightforwardly if the cc's were set up normally. */
2576
2577 if (cc_status.flags != 0
2578 && JUMP_P (insn)
2579 && GET_CODE (body) == SET
2580 && SET_DEST (body) == pc_rtx
2581 && GET_CODE (SET_SRC (body)) == IF_THEN_ELSE
2582 && COMPARISON_P (XEXP (SET_SRC (body), 0))
2583 && XEXP (XEXP (SET_SRC (body), 0), 0) == cc0_rtx)
2584 {
2585 /* This function may alter the contents of its argument
2586 and clear some of the cc_status.flags bits.
2587 It may also return 1 meaning condition now always true
2588 or -1 meaning condition now always false
2589 or 2 meaning condition nontrivial but altered. */
2590 int result = alter_cond (XEXP (SET_SRC (body), 0));
2591 /* If condition now has fixed value, replace the IF_THEN_ELSE
2592 with its then-operand or its else-operand. */
2593 if (result == 1)
2594 SET_SRC (body) = XEXP (SET_SRC (body), 1);
2595 if (result == -1)
2596 SET_SRC (body) = XEXP (SET_SRC (body), 2);
2597
2598 /* The jump is now either unconditional or a no-op.
2599 If it has become a no-op, don't try to output it.
2600 (It would not be recognized.) */
2601 if (SET_SRC (body) == pc_rtx)
2602 {
2603 delete_insn (insn);
2604 break;
2605 }
2606 else if (ANY_RETURN_P (SET_SRC (body)))
2607 /* Replace (set (pc) (return)) with (return). */
2608 PATTERN (insn) = body = SET_SRC (body);
2609
2610 /* Rerecognize the instruction if it has changed. */
2611 if (result != 0)
2612 INSN_CODE (insn) = -1;
2613 }
2614
2615 /* If this is a conditional trap, maybe modify it if the cc's
2616 are in a nonstandard state so that it accomplishes the same
2617 thing that it would do straightforwardly if the cc's were
2618 set up normally. */
2619 if (cc_status.flags != 0
2620 && NONJUMP_INSN_P (insn)
2621 && GET_CODE (body) == TRAP_IF
2622 && COMPARISON_P (TRAP_CONDITION (body))
2623 && XEXP (TRAP_CONDITION (body), 0) == cc0_rtx)
2624 {
2625 /* This function may alter the contents of its argument
2626 and clear some of the cc_status.flags bits.
2627 It may also return 1 meaning condition now always true
2628 or -1 meaning condition now always false
2629 or 2 meaning condition nontrivial but altered. */
2630 int result = alter_cond (TRAP_CONDITION (body));
2631
2632 /* If TRAP_CONDITION has become always false, delete the
2633 instruction. */
2634 if (result == -1)
2635 {
2636 delete_insn (insn);
2637 break;
2638 }
2639
2640 /* If TRAP_CONDITION has become always true, replace
2641 TRAP_CONDITION with const_true_rtx. */
2642 if (result == 1)
2643 TRAP_CONDITION (body) = const_true_rtx;
2644
2645 /* Rerecognize the instruction if it has changed. */
2646 if (result != 0)
2647 INSN_CODE (insn) = -1;
2648 }
2649
2650 /* Make same adjustments to instructions that examine the
2651 condition codes without jumping and instructions that
2652 handle conditional moves (if this machine has either one). */
2653
2654 if (cc_status.flags != 0
2655 && set != 0)
2656 {
2657 rtx cond_rtx, then_rtx, else_rtx;
2658
2659 if (!JUMP_P (insn)
2660 && GET_CODE (SET_SRC (set)) == IF_THEN_ELSE)
2661 {
2662 cond_rtx = XEXP (SET_SRC (set), 0);
2663 then_rtx = XEXP (SET_SRC (set), 1);
2664 else_rtx = XEXP (SET_SRC (set), 2);
2665 }
2666 else
2667 {
2668 cond_rtx = SET_SRC (set);
2669 then_rtx = const_true_rtx;
2670 else_rtx = const0_rtx;
2671 }
2672
2673 switch (GET_CODE (cond_rtx))
2674 {
2675 case GTU:
2676 case GT:
2677 case LTU:
2678 case LT:
2679 case GEU:
2680 case GE:
2681 case LEU:
2682 case LE:
2683 case EQ:
2684 case NE:
2685 {
2686 int result;
2687 if (XEXP (cond_rtx, 0) != cc0_rtx)
2688 break;
2689 result = alter_cond (cond_rtx);
2690 if (result == 1)
2691 validate_change (insn, &SET_SRC (set), then_rtx, 0);
2692 else if (result == -1)
2693 validate_change (insn, &SET_SRC (set), else_rtx, 0);
2694 else if (result == 2)
2695 INSN_CODE (insn) = -1;
2696 if (SET_DEST (set) == SET_SRC (set))
2697 delete_insn (insn);
2698 }
2699 break;
2700
2701 default:
2702 break;
2703 }
2704 }
2705
2706 #endif
2707
2708 #ifdef HAVE_peephole
2709 /* Do machine-specific peephole optimizations if desired. */
2710
2711 if (optimize_p && !flag_no_peephole && !nopeepholes)
2712 {
2713 rtx next = peephole (insn);
2714 /* When peepholing, if there were notes within the peephole,
2715 emit them before the peephole. */
2716 if (next != 0 && next != NEXT_INSN (insn))
2717 {
2718 rtx note, prev = PREV_INSN (insn);
2719
2720 for (note = NEXT_INSN (insn); note != next;
2721 note = NEXT_INSN (note))
2722 final_scan_insn (note, file, optimize_p, nopeepholes, seen);
2723
2724 /* Put the notes in the proper position for a later
2725 rescan. For example, the SH target can do this
2726 when generating a far jump in a delayed branch
2727 sequence. */
2728 note = NEXT_INSN (insn);
2729 PREV_INSN (note) = prev;
2730 NEXT_INSN (prev) = note;
2731 NEXT_INSN (PREV_INSN (next)) = insn;
2732 PREV_INSN (insn) = PREV_INSN (next);
2733 NEXT_INSN (insn) = next;
2734 PREV_INSN (next) = insn;
2735 }
2736
2737 /* PEEPHOLE might have changed this. */
2738 body = PATTERN (insn);
2739 }
2740 #endif
2741
2742 /* Try to recognize the instruction.
2743 If successful, verify that the operands satisfy the
2744 constraints for the instruction. Crash if they don't,
2745 since `reload' should have changed them so that they do. */
2746
2747 insn_code_number = recog_memoized (insn);
2748 cleanup_subreg_operands (insn);
2749
2750 /* Dump the insn in the assembly for debugging. */
2751 if (flag_dump_rtl_in_asm)
2752 {
2753 print_rtx_head = ASM_COMMENT_START;
2754 print_rtl_single (asm_out_file, insn);
2755 print_rtx_head = "";
2756 }
2757
2758 if (! constrain_operands_cached (1))
2759 fatal_insn_not_found (insn);
2760
2761 /* Some target machines need to prescan each insn before
2762 it is output. */
2763
2764 #ifdef FINAL_PRESCAN_INSN
2765 FINAL_PRESCAN_INSN (insn, recog_data.operand, recog_data.n_operands);
2766 #endif
2767
2768 if (targetm.have_conditional_execution ()
2769 && GET_CODE (PATTERN (insn)) == COND_EXEC)
2770 current_insn_predicate = COND_EXEC_TEST (PATTERN (insn));
2771
2772 #ifdef HAVE_cc0
2773 cc_prev_status = cc_status;
2774
2775 /* Update `cc_status' for this instruction.
2776 The instruction's output routine may change it further.
2777 If the output routine for a jump insn needs to depend
2778 on the cc status, it should look at cc_prev_status. */
2779
2780 NOTICE_UPDATE_CC (body, insn);
2781 #endif
2782
2783 current_output_insn = debug_insn = insn;
2784
2785 /* Find the proper template for this insn. */
2786 templ = get_insn_template (insn_code_number, insn);
2787
2788 /* If the C code returns 0, it means that it is a jump insn
2789 which follows a deleted test insn, and that test insn
2790 needs to be reinserted. */
2791 if (templ == 0)
2792 {
2793 rtx prev;
2794
2795 gcc_assert (prev_nonnote_insn (insn) == last_ignored_compare);
2796
2797 /* We have already processed the notes between the setter and
2798 the user. Make sure we don't process them again, this is
2799 particularly important if one of the notes is a block
2800 scope note or an EH note. */
2801 for (prev = insn;
2802 prev != last_ignored_compare;
2803 prev = PREV_INSN (prev))
2804 {
2805 if (NOTE_P (prev))
2806 delete_insn (prev); /* Use delete_note. */
2807 }
2808
2809 return prev;
2810 }
2811
2812 /* If the template is the string "#", it means that this insn must
2813 be split. */
2814 if (templ[0] == '#' && templ[1] == '\0')
2815 {
2816 rtx new_rtx = try_split (body, insn, 0);
2817
2818 /* If we didn't split the insn, go away. */
2819 if (new_rtx == insn && PATTERN (new_rtx) == body)
2820 fatal_insn ("could not split insn", insn);
2821
2822 #ifdef HAVE_ATTR_length
2823 /* This instruction should have been split in shorten_branches,
2824 to ensure that we would have valid length info for the
2825 splitees. */
2826 gcc_unreachable ();
2827 #endif
2828
2829 return new_rtx;
2830 }
2831
2832 /* ??? This will put the directives in the wrong place if
2833 get_insn_template outputs assembly directly. However calling it
2834 before get_insn_template breaks if the insns is split. */
2835 if (targetm.asm_out.unwind_emit_before_insn
2836 && targetm.asm_out.unwind_emit)
2837 targetm.asm_out.unwind_emit (asm_out_file, insn);
2838
2839 if (CALL_P (insn))
2840 {
2841 rtx x = call_from_call_insn (insn);
2842 x = XEXP (x, 0);
2843 if (x && MEM_P (x) && GET_CODE (XEXP (x, 0)) == SYMBOL_REF)
2844 {
2845 tree t;
2846 x = XEXP (x, 0);
2847 t = SYMBOL_REF_DECL (x);
2848 if (t)
2849 assemble_external (t);
2850 }
2851 if (!DECL_IGNORED_P (current_function_decl))
2852 debug_hooks->var_location (insn);
2853 }
2854
2855 /* Output assembler code from the template. */
2856 output_asm_insn (templ, recog_data.operand);
2857
2858 /* Some target machines need to postscan each insn after
2859 it is output. */
2860 if (targetm.asm_out.final_postscan_insn)
2861 targetm.asm_out.final_postscan_insn (file, insn, recog_data.operand,
2862 recog_data.n_operands);
2863
2864 if (!targetm.asm_out.unwind_emit_before_insn
2865 && targetm.asm_out.unwind_emit)
2866 targetm.asm_out.unwind_emit (asm_out_file, insn);
2867
2868 current_output_insn = debug_insn = 0;
2869 }
2870 }
2871 return NEXT_INSN (insn);
2872 }
2873 \f
2874 /* Return whether a source line note needs to be emitted before INSN.
2875 Sets IS_STMT to TRUE if the line should be marked as a possible
2876 breakpoint location. */
2877
2878 static bool
2879 notice_source_line (rtx insn, bool *is_stmt)
2880 {
2881 const char *filename;
2882 int linenum;
2883
2884 if (override_filename)
2885 {
2886 filename = override_filename;
2887 linenum = override_linenum;
2888 }
2889 else
2890 {
2891 filename = insn_file (insn);
2892 linenum = insn_line (insn);
2893 }
2894
2895 if (filename == NULL)
2896 return false;
2897
2898 if (force_source_line
2899 || filename != last_filename
2900 || last_linenum != linenum)
2901 {
2902 force_source_line = false;
2903 last_filename = filename;
2904 last_linenum = linenum;
2905 last_discriminator = discriminator;
2906 *is_stmt = true;
2907 high_block_linenum = MAX (last_linenum, high_block_linenum);
2908 high_function_linenum = MAX (last_linenum, high_function_linenum);
2909 return true;
2910 }
2911
2912 if (SUPPORTS_DISCRIMINATOR && last_discriminator != discriminator)
2913 {
2914 /* If the discriminator changed, but the line number did not,
2915 output the line table entry with is_stmt false so the
2916 debugger does not treat this as a breakpoint location. */
2917 last_discriminator = discriminator;
2918 *is_stmt = false;
2919 return true;
2920 }
2921
2922 return false;
2923 }
2924 \f
2925 /* For each operand in INSN, simplify (subreg (reg)) so that it refers
2926 directly to the desired hard register. */
2927
2928 void
2929 cleanup_subreg_operands (rtx insn)
2930 {
2931 int i;
2932 bool changed = false;
2933 extract_insn_cached (insn);
2934 for (i = 0; i < recog_data.n_operands; i++)
2935 {
2936 /* The following test cannot use recog_data.operand when testing
2937 for a SUBREG: the underlying object might have been changed
2938 already if we are inside a match_operator expression that
2939 matches the else clause. Instead we test the underlying
2940 expression directly. */
2941 if (GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
2942 {
2943 recog_data.operand[i] = alter_subreg (recog_data.operand_loc[i]);
2944 changed = true;
2945 }
2946 else if (GET_CODE (recog_data.operand[i]) == PLUS
2947 || GET_CODE (recog_data.operand[i]) == MULT
2948 || MEM_P (recog_data.operand[i]))
2949 recog_data.operand[i] = walk_alter_subreg (recog_data.operand_loc[i], &changed);
2950 }
2951
2952 for (i = 0; i < recog_data.n_dups; i++)
2953 {
2954 if (GET_CODE (*recog_data.dup_loc[i]) == SUBREG)
2955 {
2956 *recog_data.dup_loc[i] = alter_subreg (recog_data.dup_loc[i]);
2957 changed = true;
2958 }
2959 else if (GET_CODE (*recog_data.dup_loc[i]) == PLUS
2960 || GET_CODE (*recog_data.dup_loc[i]) == MULT
2961 || MEM_P (*recog_data.dup_loc[i]))
2962 *recog_data.dup_loc[i] = walk_alter_subreg (recog_data.dup_loc[i], &changed);
2963 }
2964 if (changed)
2965 df_insn_rescan (insn);
2966 }
2967
2968 /* If X is a SUBREG, replace it with a REG or a MEM,
2969 based on the thing it is a subreg of. */
2970
2971 rtx
2972 alter_subreg (rtx *xp)
2973 {
2974 rtx x = *xp;
2975 rtx y = SUBREG_REG (x);
2976
2977 /* simplify_subreg does not remove subreg from volatile references.
2978 We are required to. */
2979 if (MEM_P (y))
2980 {
2981 int offset = SUBREG_BYTE (x);
2982
2983 /* For paradoxical subregs on big-endian machines, SUBREG_BYTE
2984 contains 0 instead of the proper offset. See simplify_subreg. */
2985 if (offset == 0
2986 && GET_MODE_SIZE (GET_MODE (y)) < GET_MODE_SIZE (GET_MODE (x)))
2987 {
2988 int difference = GET_MODE_SIZE (GET_MODE (y))
2989 - GET_MODE_SIZE (GET_MODE (x));
2990 if (WORDS_BIG_ENDIAN)
2991 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
2992 if (BYTES_BIG_ENDIAN)
2993 offset += difference % UNITS_PER_WORD;
2994 }
2995
2996 *xp = adjust_address (y, GET_MODE (x), offset);
2997 }
2998 else
2999 {
3000 rtx new_rtx = simplify_subreg (GET_MODE (x), y, GET_MODE (y),
3001 SUBREG_BYTE (x));
3002
3003 if (new_rtx != 0)
3004 *xp = new_rtx;
3005 else if (REG_P (y))
3006 {
3007 /* Simplify_subreg can't handle some REG cases, but we have to. */
3008 unsigned int regno;
3009 HOST_WIDE_INT offset;
3010
3011 regno = subreg_regno (x);
3012 if (subreg_lowpart_p (x))
3013 offset = byte_lowpart_offset (GET_MODE (x), GET_MODE (y));
3014 else
3015 offset = SUBREG_BYTE (x);
3016 *xp = gen_rtx_REG_offset (y, GET_MODE (x), regno, offset);
3017 }
3018 }
3019
3020 return *xp;
3021 }
3022
3023 /* Do alter_subreg on all the SUBREGs contained in X. */
3024
3025 static rtx
3026 walk_alter_subreg (rtx *xp, bool *changed)
3027 {
3028 rtx x = *xp;
3029 switch (GET_CODE (x))
3030 {
3031 case PLUS:
3032 case MULT:
3033 case AND:
3034 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed);
3035 XEXP (x, 1) = walk_alter_subreg (&XEXP (x, 1), changed);
3036 break;
3037
3038 case MEM:
3039 case ZERO_EXTEND:
3040 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed);
3041 break;
3042
3043 case SUBREG:
3044 *changed = true;
3045 return alter_subreg (xp);
3046
3047 default:
3048 break;
3049 }
3050
3051 return *xp;
3052 }
3053 \f
3054 #ifdef HAVE_cc0
3055
3056 /* Given BODY, the body of a jump instruction, alter the jump condition
3057 as required by the bits that are set in cc_status.flags.
3058 Not all of the bits there can be handled at this level in all cases.
3059
3060 The value is normally 0.
3061 1 means that the condition has become always true.
3062 -1 means that the condition has become always false.
3063 2 means that COND has been altered. */
3064
3065 static int
3066 alter_cond (rtx cond)
3067 {
3068 int value = 0;
3069
3070 if (cc_status.flags & CC_REVERSED)
3071 {
3072 value = 2;
3073 PUT_CODE (cond, swap_condition (GET_CODE (cond)));
3074 }
3075
3076 if (cc_status.flags & CC_INVERTED)
3077 {
3078 value = 2;
3079 PUT_CODE (cond, reverse_condition (GET_CODE (cond)));
3080 }
3081
3082 if (cc_status.flags & CC_NOT_POSITIVE)
3083 switch (GET_CODE (cond))
3084 {
3085 case LE:
3086 case LEU:
3087 case GEU:
3088 /* Jump becomes unconditional. */
3089 return 1;
3090
3091 case GT:
3092 case GTU:
3093 case LTU:
3094 /* Jump becomes no-op. */
3095 return -1;
3096
3097 case GE:
3098 PUT_CODE (cond, EQ);
3099 value = 2;
3100 break;
3101
3102 case LT:
3103 PUT_CODE (cond, NE);
3104 value = 2;
3105 break;
3106
3107 default:
3108 break;
3109 }
3110
3111 if (cc_status.flags & CC_NOT_NEGATIVE)
3112 switch (GET_CODE (cond))
3113 {
3114 case GE:
3115 case GEU:
3116 /* Jump becomes unconditional. */
3117 return 1;
3118
3119 case LT:
3120 case LTU:
3121 /* Jump becomes no-op. */
3122 return -1;
3123
3124 case LE:
3125 case LEU:
3126 PUT_CODE (cond, EQ);
3127 value = 2;
3128 break;
3129
3130 case GT:
3131 case GTU:
3132 PUT_CODE (cond, NE);
3133 value = 2;
3134 break;
3135
3136 default:
3137 break;
3138 }
3139
3140 if (cc_status.flags & CC_NO_OVERFLOW)
3141 switch (GET_CODE (cond))
3142 {
3143 case GEU:
3144 /* Jump becomes unconditional. */
3145 return 1;
3146
3147 case LEU:
3148 PUT_CODE (cond, EQ);
3149 value = 2;
3150 break;
3151
3152 case GTU:
3153 PUT_CODE (cond, NE);
3154 value = 2;
3155 break;
3156
3157 case LTU:
3158 /* Jump becomes no-op. */
3159 return -1;
3160
3161 default:
3162 break;
3163 }
3164
3165 if (cc_status.flags & (CC_Z_IN_NOT_N | CC_Z_IN_N))
3166 switch (GET_CODE (cond))
3167 {
3168 default:
3169 gcc_unreachable ();
3170
3171 case NE:
3172 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? GE : LT);
3173 value = 2;
3174 break;
3175
3176 case EQ:
3177 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? LT : GE);
3178 value = 2;
3179 break;
3180 }
3181
3182 if (cc_status.flags & CC_NOT_SIGNED)
3183 /* The flags are valid if signed condition operators are converted
3184 to unsigned. */
3185 switch (GET_CODE (cond))
3186 {
3187 case LE:
3188 PUT_CODE (cond, LEU);
3189 value = 2;
3190 break;
3191
3192 case LT:
3193 PUT_CODE (cond, LTU);
3194 value = 2;
3195 break;
3196
3197 case GT:
3198 PUT_CODE (cond, GTU);
3199 value = 2;
3200 break;
3201
3202 case GE:
3203 PUT_CODE (cond, GEU);
3204 value = 2;
3205 break;
3206
3207 default:
3208 break;
3209 }
3210
3211 return value;
3212 }
3213 #endif
3214 \f
3215 /* Report inconsistency between the assembler template and the operands.
3216 In an `asm', it's the user's fault; otherwise, the compiler's fault. */
3217
3218 void
3219 output_operand_lossage (const char *cmsgid, ...)
3220 {
3221 char *fmt_string;
3222 char *new_message;
3223 const char *pfx_str;
3224 va_list ap;
3225
3226 va_start (ap, cmsgid);
3227
3228 pfx_str = this_is_asm_operands ? _("invalid 'asm': ") : "output_operand: ";
3229 asprintf (&fmt_string, "%s%s", pfx_str, _(cmsgid));
3230 vasprintf (&new_message, fmt_string, ap);
3231
3232 if (this_is_asm_operands)
3233 error_for_asm (this_is_asm_operands, "%s", new_message);
3234 else
3235 internal_error ("%s", new_message);
3236
3237 free (fmt_string);
3238 free (new_message);
3239 va_end (ap);
3240 }
3241 \f
3242 /* Output of assembler code from a template, and its subroutines. */
3243
3244 /* Annotate the assembly with a comment describing the pattern and
3245 alternative used. */
3246
3247 static void
3248 output_asm_name (void)
3249 {
3250 if (debug_insn)
3251 {
3252 int num = INSN_CODE (debug_insn);
3253 fprintf (asm_out_file, "\t%s %d\t%s",
3254 ASM_COMMENT_START, INSN_UID (debug_insn),
3255 insn_data[num].name);
3256 if (insn_data[num].n_alternatives > 1)
3257 fprintf (asm_out_file, "/%d", which_alternative + 1);
3258 #ifdef HAVE_ATTR_length
3259 fprintf (asm_out_file, "\t[length = %d]",
3260 get_attr_length (debug_insn));
3261 #endif
3262 /* Clear this so only the first assembler insn
3263 of any rtl insn will get the special comment for -dp. */
3264 debug_insn = 0;
3265 }
3266 }
3267
3268 /* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it
3269 or its address, return that expr . Set *PADDRESSP to 1 if the expr
3270 corresponds to the address of the object and 0 if to the object. */
3271
3272 static tree
3273 get_mem_expr_from_op (rtx op, int *paddressp)
3274 {
3275 tree expr;
3276 int inner_addressp;
3277
3278 *paddressp = 0;
3279
3280 if (REG_P (op))
3281 return REG_EXPR (op);
3282 else if (!MEM_P (op))
3283 return 0;
3284
3285 if (MEM_EXPR (op) != 0)
3286 return MEM_EXPR (op);
3287
3288 /* Otherwise we have an address, so indicate it and look at the address. */
3289 *paddressp = 1;
3290 op = XEXP (op, 0);
3291
3292 /* First check if we have a decl for the address, then look at the right side
3293 if it is a PLUS. Otherwise, strip off arithmetic and keep looking.
3294 But don't allow the address to itself be indirect. */
3295 if ((expr = get_mem_expr_from_op (op, &inner_addressp)) && ! inner_addressp)
3296 return expr;
3297 else if (GET_CODE (op) == PLUS
3298 && (expr = get_mem_expr_from_op (XEXP (op, 1), &inner_addressp)))
3299 return expr;
3300
3301 while (UNARY_P (op)
3302 || GET_RTX_CLASS (GET_CODE (op)) == RTX_BIN_ARITH)
3303 op = XEXP (op, 0);
3304
3305 expr = get_mem_expr_from_op (op, &inner_addressp);
3306 return inner_addressp ? 0 : expr;
3307 }
3308
3309 /* Output operand names for assembler instructions. OPERANDS is the
3310 operand vector, OPORDER is the order to write the operands, and NOPS
3311 is the number of operands to write. */
3312
3313 static void
3314 output_asm_operand_names (rtx *operands, int *oporder, int nops)
3315 {
3316 int wrote = 0;
3317 int i;
3318
3319 for (i = 0; i < nops; i++)
3320 {
3321 int addressp;
3322 rtx op = operands[oporder[i]];
3323 tree expr = get_mem_expr_from_op (op, &addressp);
3324
3325 fprintf (asm_out_file, "%c%s",
3326 wrote ? ',' : '\t', wrote ? "" : ASM_COMMENT_START);
3327 wrote = 1;
3328 if (expr)
3329 {
3330 fprintf (asm_out_file, "%s",
3331 addressp ? "*" : "");
3332 print_mem_expr (asm_out_file, expr);
3333 wrote = 1;
3334 }
3335 else if (REG_P (op) && ORIGINAL_REGNO (op)
3336 && ORIGINAL_REGNO (op) != REGNO (op))
3337 fprintf (asm_out_file, " tmp%i", ORIGINAL_REGNO (op));
3338 }
3339 }
3340
3341 #ifdef ASSEMBLER_DIALECT
3342 /* Helper function to parse assembler dialects in the asm string.
3343 This is called from output_asm_insn and asm_fprintf. */
3344 static const char *
3345 do_assembler_dialects (const char *p, int *dialect)
3346 {
3347 char c = *(p - 1);
3348
3349 switch (c)
3350 {
3351 case '{':
3352 {
3353 int i;
3354
3355 if (*dialect)
3356 output_operand_lossage ("nested assembly dialect alternatives");
3357 else
3358 *dialect = 1;
3359
3360 /* If we want the first dialect, do nothing. Otherwise, skip
3361 DIALECT_NUMBER of strings ending with '|'. */
3362 for (i = 0; i < dialect_number; i++)
3363 {
3364 while (*p && *p != '}' && *p++ != '|')
3365 ;
3366 if (*p == '}')
3367 break;
3368 }
3369
3370 if (*p == '\0')
3371 output_operand_lossage ("unterminated assembly dialect alternative");
3372 }
3373 break;
3374
3375 case '|':
3376 if (*dialect)
3377 {
3378 /* Skip to close brace. */
3379 do
3380 {
3381 if (*p == '\0')
3382 {
3383 output_operand_lossage ("unterminated assembly dialect alternative");
3384 break;
3385 }
3386 }
3387 while (*p++ != '}');
3388 *dialect = 0;
3389 }
3390 else
3391 putc (c, asm_out_file);
3392 break;
3393
3394 case '}':
3395 if (! *dialect)
3396 putc (c, asm_out_file);
3397 *dialect = 0;
3398 break;
3399 default:
3400 gcc_unreachable ();
3401 }
3402
3403 return p;
3404 }
3405 #endif
3406
3407 /* Output text from TEMPLATE to the assembler output file,
3408 obeying %-directions to substitute operands taken from
3409 the vector OPERANDS.
3410
3411 %N (for N a digit) means print operand N in usual manner.
3412 %lN means require operand N to be a CODE_LABEL or LABEL_REF
3413 and print the label name with no punctuation.
3414 %cN means require operand N to be a constant
3415 and print the constant expression with no punctuation.
3416 %aN means expect operand N to be a memory address
3417 (not a memory reference!) and print a reference
3418 to that address.
3419 %nN means expect operand N to be a constant
3420 and print a constant expression for minus the value
3421 of the operand, with no other punctuation. */
3422
3423 void
3424 output_asm_insn (const char *templ, rtx *operands)
3425 {
3426 const char *p;
3427 int c;
3428 #ifdef ASSEMBLER_DIALECT
3429 int dialect = 0;
3430 #endif
3431 int oporder[MAX_RECOG_OPERANDS];
3432 char opoutput[MAX_RECOG_OPERANDS];
3433 int ops = 0;
3434
3435 /* An insn may return a null string template
3436 in a case where no assembler code is needed. */
3437 if (*templ == 0)
3438 return;
3439
3440 memset (opoutput, 0, sizeof opoutput);
3441 p = templ;
3442 putc ('\t', asm_out_file);
3443
3444 #ifdef ASM_OUTPUT_OPCODE
3445 ASM_OUTPUT_OPCODE (asm_out_file, p);
3446 #endif
3447
3448 while ((c = *p++))
3449 switch (c)
3450 {
3451 case '\n':
3452 if (flag_verbose_asm)
3453 output_asm_operand_names (operands, oporder, ops);
3454 if (flag_print_asm_name)
3455 output_asm_name ();
3456
3457 ops = 0;
3458 memset (opoutput, 0, sizeof opoutput);
3459
3460 putc (c, asm_out_file);
3461 #ifdef ASM_OUTPUT_OPCODE
3462 while ((c = *p) == '\t')
3463 {
3464 putc (c, asm_out_file);
3465 p++;
3466 }
3467 ASM_OUTPUT_OPCODE (asm_out_file, p);
3468 #endif
3469 break;
3470
3471 #ifdef ASSEMBLER_DIALECT
3472 case '{':
3473 case '}':
3474 case '|':
3475 p = do_assembler_dialects (p, &dialect);
3476 break;
3477 #endif
3478
3479 case '%':
3480 /* %% outputs a single %. */
3481 if (*p == '%')
3482 {
3483 p++;
3484 putc (c, asm_out_file);
3485 }
3486 /* %= outputs a number which is unique to each insn in the entire
3487 compilation. This is useful for making local labels that are
3488 referred to more than once in a given insn. */
3489 else if (*p == '=')
3490 {
3491 p++;
3492 fprintf (asm_out_file, "%d", insn_counter);
3493 }
3494 /* % followed by a letter and some digits
3495 outputs an operand in a special way depending on the letter.
3496 Letters `acln' are implemented directly.
3497 Other letters are passed to `output_operand' so that
3498 the TARGET_PRINT_OPERAND hook can define them. */
3499 else if (ISALPHA (*p))
3500 {
3501 int letter = *p++;
3502 unsigned long opnum;
3503 char *endptr;
3504
3505 opnum = strtoul (p, &endptr, 10);
3506
3507 if (endptr == p)
3508 output_operand_lossage ("operand number missing "
3509 "after %%-letter");
3510 else if (this_is_asm_operands && opnum >= insn_noperands)
3511 output_operand_lossage ("operand number out of range");
3512 else if (letter == 'l')
3513 output_asm_label (operands[opnum]);
3514 else if (letter == 'a')
3515 output_address (operands[opnum]);
3516 else if (letter == 'c')
3517 {
3518 if (CONSTANT_ADDRESS_P (operands[opnum]))
3519 output_addr_const (asm_out_file, operands[opnum]);
3520 else
3521 output_operand (operands[opnum], 'c');
3522 }
3523 else if (letter == 'n')
3524 {
3525 if (CONST_INT_P (operands[opnum]))
3526 fprintf (asm_out_file, HOST_WIDE_INT_PRINT_DEC,
3527 - INTVAL (operands[opnum]));
3528 else
3529 {
3530 putc ('-', asm_out_file);
3531 output_addr_const (asm_out_file, operands[opnum]);
3532 }
3533 }
3534 else
3535 output_operand (operands[opnum], letter);
3536
3537 if (!opoutput[opnum])
3538 oporder[ops++] = opnum;
3539 opoutput[opnum] = 1;
3540
3541 p = endptr;
3542 c = *p;
3543 }
3544 /* % followed by a digit outputs an operand the default way. */
3545 else if (ISDIGIT (*p))
3546 {
3547 unsigned long opnum;
3548 char *endptr;
3549
3550 opnum = strtoul (p, &endptr, 10);
3551 if (this_is_asm_operands && opnum >= insn_noperands)
3552 output_operand_lossage ("operand number out of range");
3553 else
3554 output_operand (operands[opnum], 0);
3555
3556 if (!opoutput[opnum])
3557 oporder[ops++] = opnum;
3558 opoutput[opnum] = 1;
3559
3560 p = endptr;
3561 c = *p;
3562 }
3563 /* % followed by punctuation: output something for that
3564 punctuation character alone, with no operand. The
3565 TARGET_PRINT_OPERAND hook decides what is actually done. */
3566 else if (targetm.asm_out.print_operand_punct_valid_p ((unsigned char) *p))
3567 output_operand (NULL_RTX, *p++);
3568 else
3569 output_operand_lossage ("invalid %%-code");
3570 break;
3571
3572 default:
3573 putc (c, asm_out_file);
3574 }
3575
3576 /* Write out the variable names for operands, if we know them. */
3577 if (flag_verbose_asm)
3578 output_asm_operand_names (operands, oporder, ops);
3579 if (flag_print_asm_name)
3580 output_asm_name ();
3581
3582 putc ('\n', asm_out_file);
3583 }
3584 \f
3585 /* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */
3586
3587 void
3588 output_asm_label (rtx x)
3589 {
3590 char buf[256];
3591
3592 if (GET_CODE (x) == LABEL_REF)
3593 x = XEXP (x, 0);
3594 if (LABEL_P (x)
3595 || (NOTE_P (x)
3596 && NOTE_KIND (x) == NOTE_INSN_DELETED_LABEL))
3597 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3598 else
3599 output_operand_lossage ("'%%l' operand isn't a label");
3600
3601 assemble_name (asm_out_file, buf);
3602 }
3603
3604 /* Helper rtx-iteration-function for mark_symbol_refs_as_used and
3605 output_operand. Marks SYMBOL_REFs as referenced through use of
3606 assemble_external. */
3607
3608 static int
3609 mark_symbol_ref_as_used (rtx *xp, void *dummy ATTRIBUTE_UNUSED)
3610 {
3611 rtx x = *xp;
3612
3613 /* If we have a used symbol, we may have to emit assembly
3614 annotations corresponding to whether the symbol is external, weak
3615 or has non-default visibility. */
3616 if (GET_CODE (x) == SYMBOL_REF)
3617 {
3618 tree t;
3619
3620 t = SYMBOL_REF_DECL (x);
3621 if (t)
3622 assemble_external (t);
3623
3624 return -1;
3625 }
3626
3627 return 0;
3628 }
3629
3630 /* Marks SYMBOL_REFs in x as referenced through use of assemble_external. */
3631
3632 void
3633 mark_symbol_refs_as_used (rtx x)
3634 {
3635 for_each_rtx (&x, mark_symbol_ref_as_used, NULL);
3636 }
3637
3638 /* Print operand X using machine-dependent assembler syntax.
3639 CODE is a non-digit that preceded the operand-number in the % spec,
3640 such as 'z' if the spec was `%z3'. CODE is 0 if there was no char
3641 between the % and the digits.
3642 When CODE is a non-letter, X is 0.
3643
3644 The meanings of the letters are machine-dependent and controlled
3645 by TARGET_PRINT_OPERAND. */
3646
3647 void
3648 output_operand (rtx x, int code ATTRIBUTE_UNUSED)
3649 {
3650 if (x && GET_CODE (x) == SUBREG)
3651 x = alter_subreg (&x);
3652
3653 /* X must not be a pseudo reg. */
3654 gcc_assert (!x || !REG_P (x) || REGNO (x) < FIRST_PSEUDO_REGISTER);
3655
3656 targetm.asm_out.print_operand (asm_out_file, x, code);
3657
3658 if (x == NULL_RTX)
3659 return;
3660
3661 for_each_rtx (&x, mark_symbol_ref_as_used, NULL);
3662 }
3663
3664 /* Print a memory reference operand for address X using
3665 machine-dependent assembler syntax. */
3666
3667 void
3668 output_address (rtx x)
3669 {
3670 bool changed = false;
3671 walk_alter_subreg (&x, &changed);
3672 targetm.asm_out.print_operand_address (asm_out_file, x);
3673 }
3674 \f
3675 /* Print an integer constant expression in assembler syntax.
3676 Addition and subtraction are the only arithmetic
3677 that may appear in these expressions. */
3678
3679 void
3680 output_addr_const (FILE *file, rtx x)
3681 {
3682 char buf[256];
3683
3684 restart:
3685 switch (GET_CODE (x))
3686 {
3687 case PC:
3688 putc ('.', file);
3689 break;
3690
3691 case SYMBOL_REF:
3692 if (SYMBOL_REF_DECL (x))
3693 assemble_external (SYMBOL_REF_DECL (x));
3694 #ifdef ASM_OUTPUT_SYMBOL_REF
3695 ASM_OUTPUT_SYMBOL_REF (file, x);
3696 #else
3697 assemble_name (file, XSTR (x, 0));
3698 #endif
3699 break;
3700
3701 case LABEL_REF:
3702 x = XEXP (x, 0);
3703 /* Fall through. */
3704 case CODE_LABEL:
3705 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3706 #ifdef ASM_OUTPUT_LABEL_REF
3707 ASM_OUTPUT_LABEL_REF (file, buf);
3708 #else
3709 assemble_name (file, buf);
3710 #endif
3711 break;
3712
3713 case CONST_INT:
3714 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x));
3715 break;
3716
3717 case CONST:
3718 /* This used to output parentheses around the expression,
3719 but that does not work on the 386 (either ATT or BSD assembler). */
3720 output_addr_const (file, XEXP (x, 0));
3721 break;
3722
3723 case CONST_DOUBLE:
3724 if (GET_MODE (x) == VOIDmode)
3725 {
3726 /* We can use %d if the number is one word and positive. */
3727 if (CONST_DOUBLE_HIGH (x))
3728 fprintf (file, HOST_WIDE_INT_PRINT_DOUBLE_HEX,
3729 (unsigned HOST_WIDE_INT) CONST_DOUBLE_HIGH (x),
3730 (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (x));
3731 else if (CONST_DOUBLE_LOW (x) < 0)
3732 fprintf (file, HOST_WIDE_INT_PRINT_HEX,
3733 (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (x));
3734 else
3735 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x));
3736 }
3737 else
3738 /* We can't handle floating point constants;
3739 PRINT_OPERAND must handle them. */
3740 output_operand_lossage ("floating constant misused");
3741 break;
3742
3743 case CONST_FIXED:
3744 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_FIXED_VALUE_LOW (x));
3745 break;
3746
3747 case PLUS:
3748 /* Some assemblers need integer constants to appear last (eg masm). */
3749 if (CONST_INT_P (XEXP (x, 0)))
3750 {
3751 output_addr_const (file, XEXP (x, 1));
3752 if (INTVAL (XEXP (x, 0)) >= 0)
3753 fprintf (file, "+");
3754 output_addr_const (file, XEXP (x, 0));
3755 }
3756 else
3757 {
3758 output_addr_const (file, XEXP (x, 0));
3759 if (!CONST_INT_P (XEXP (x, 1))
3760 || INTVAL (XEXP (x, 1)) >= 0)
3761 fprintf (file, "+");
3762 output_addr_const (file, XEXP (x, 1));
3763 }
3764 break;
3765
3766 case MINUS:
3767 /* Avoid outputting things like x-x or x+5-x,
3768 since some assemblers can't handle that. */
3769 x = simplify_subtraction (x);
3770 if (GET_CODE (x) != MINUS)
3771 goto restart;
3772
3773 output_addr_const (file, XEXP (x, 0));
3774 fprintf (file, "-");
3775 if ((CONST_INT_P (XEXP (x, 1)) && INTVAL (XEXP (x, 1)) >= 0)
3776 || GET_CODE (XEXP (x, 1)) == PC
3777 || GET_CODE (XEXP (x, 1)) == SYMBOL_REF)
3778 output_addr_const (file, XEXP (x, 1));
3779 else
3780 {
3781 fputs (targetm.asm_out.open_paren, file);
3782 output_addr_const (file, XEXP (x, 1));
3783 fputs (targetm.asm_out.close_paren, file);
3784 }
3785 break;
3786
3787 case ZERO_EXTEND:
3788 case SIGN_EXTEND:
3789 case SUBREG:
3790 case TRUNCATE:
3791 output_addr_const (file, XEXP (x, 0));
3792 break;
3793
3794 default:
3795 if (targetm.asm_out.output_addr_const_extra (file, x))
3796 break;
3797
3798 output_operand_lossage ("invalid expression as operand");
3799 }
3800 }
3801 \f
3802 /* Output a quoted string. */
3803
3804 void
3805 output_quoted_string (FILE *asm_file, const char *string)
3806 {
3807 #ifdef OUTPUT_QUOTED_STRING
3808 OUTPUT_QUOTED_STRING (asm_file, string);
3809 #else
3810 char c;
3811
3812 putc ('\"', asm_file);
3813 while ((c = *string++) != 0)
3814 {
3815 if (ISPRINT (c))
3816 {
3817 if (c == '\"' || c == '\\')
3818 putc ('\\', asm_file);
3819 putc (c, asm_file);
3820 }
3821 else
3822 fprintf (asm_file, "\\%03o", (unsigned char) c);
3823 }
3824 putc ('\"', asm_file);
3825 #endif
3826 }
3827 \f
3828 /* Write a HOST_WIDE_INT number in hex form 0x1234, fast. */
3829
3830 void
3831 fprint_whex (FILE *f, unsigned HOST_WIDE_INT value)
3832 {
3833 char buf[2 + CHAR_BIT * sizeof (value) / 4];
3834 if (value == 0)
3835 putc ('0', f);
3836 else
3837 {
3838 char *p = buf + sizeof (buf);
3839 do
3840 *--p = "0123456789abcdef"[value % 16];
3841 while ((value /= 16) != 0);
3842 *--p = 'x';
3843 *--p = '0';
3844 fwrite (p, 1, buf + sizeof (buf) - p, f);
3845 }
3846 }
3847
3848 /* Internal function that prints an unsigned long in decimal in reverse.
3849 The output string IS NOT null-terminated. */
3850
3851 static int
3852 sprint_ul_rev (char *s, unsigned long value)
3853 {
3854 int i = 0;
3855 do
3856 {
3857 s[i] = "0123456789"[value % 10];
3858 value /= 10;
3859 i++;
3860 /* alternate version, without modulo */
3861 /* oldval = value; */
3862 /* value /= 10; */
3863 /* s[i] = "0123456789" [oldval - 10*value]; */
3864 /* i++ */
3865 }
3866 while (value != 0);
3867 return i;
3868 }
3869
3870 /* Write an unsigned long as decimal to a file, fast. */
3871
3872 void
3873 fprint_ul (FILE *f, unsigned long value)
3874 {
3875 /* python says: len(str(2**64)) == 20 */
3876 char s[20];
3877 int i;
3878
3879 i = sprint_ul_rev (s, value);
3880
3881 /* It's probably too small to bother with string reversal and fputs. */
3882 do
3883 {
3884 i--;
3885 putc (s[i], f);
3886 }
3887 while (i != 0);
3888 }
3889
3890 /* Write an unsigned long as decimal to a string, fast.
3891 s must be wide enough to not overflow, at least 21 chars.
3892 Returns the length of the string (without terminating '\0'). */
3893
3894 int
3895 sprint_ul (char *s, unsigned long value)
3896 {
3897 int len;
3898 char tmp_c;
3899 int i;
3900 int j;
3901
3902 len = sprint_ul_rev (s, value);
3903 s[len] = '\0';
3904
3905 /* Reverse the string. */
3906 i = 0;
3907 j = len - 1;
3908 while (i < j)
3909 {
3910 tmp_c = s[i];
3911 s[i] = s[j];
3912 s[j] = tmp_c;
3913 i++; j--;
3914 }
3915
3916 return len;
3917 }
3918
3919 /* A poor man's fprintf, with the added features of %I, %R, %L, and %U.
3920 %R prints the value of REGISTER_PREFIX.
3921 %L prints the value of LOCAL_LABEL_PREFIX.
3922 %U prints the value of USER_LABEL_PREFIX.
3923 %I prints the value of IMMEDIATE_PREFIX.
3924 %O runs ASM_OUTPUT_OPCODE to transform what follows in the string.
3925 Also supported are %d, %i, %u, %x, %X, %o, %c, %s and %%.
3926
3927 We handle alternate assembler dialects here, just like output_asm_insn. */
3928
3929 void
3930 asm_fprintf (FILE *file, const char *p, ...)
3931 {
3932 char buf[10];
3933 char *q, c;
3934 #ifdef ASSEMBLER_DIALECT
3935 int dialect = 0;
3936 #endif
3937 va_list argptr;
3938
3939 va_start (argptr, p);
3940
3941 buf[0] = '%';
3942
3943 while ((c = *p++))
3944 switch (c)
3945 {
3946 #ifdef ASSEMBLER_DIALECT
3947 case '{':
3948 case '}':
3949 case '|':
3950 p = do_assembler_dialects (p, &dialect);
3951 break;
3952 #endif
3953
3954 case '%':
3955 c = *p++;
3956 q = &buf[1];
3957 while (strchr ("-+ #0", c))
3958 {
3959 *q++ = c;
3960 c = *p++;
3961 }
3962 while (ISDIGIT (c) || c == '.')
3963 {
3964 *q++ = c;
3965 c = *p++;
3966 }
3967 switch (c)
3968 {
3969 case '%':
3970 putc ('%', file);
3971 break;
3972
3973 case 'd': case 'i': case 'u':
3974 case 'x': case 'X': case 'o':
3975 case 'c':
3976 *q++ = c;
3977 *q = 0;
3978 fprintf (file, buf, va_arg (argptr, int));
3979 break;
3980
3981 case 'w':
3982 /* This is a prefix to the 'd', 'i', 'u', 'x', 'X', and
3983 'o' cases, but we do not check for those cases. It
3984 means that the value is a HOST_WIDE_INT, which may be
3985 either `long' or `long long'. */
3986 memcpy (q, HOST_WIDE_INT_PRINT, strlen (HOST_WIDE_INT_PRINT));
3987 q += strlen (HOST_WIDE_INT_PRINT);
3988 *q++ = *p++;
3989 *q = 0;
3990 fprintf (file, buf, va_arg (argptr, HOST_WIDE_INT));
3991 break;
3992
3993 case 'l':
3994 *q++ = c;
3995 #ifdef HAVE_LONG_LONG
3996 if (*p == 'l')
3997 {
3998 *q++ = *p++;
3999 *q++ = *p++;
4000 *q = 0;
4001 fprintf (file, buf, va_arg (argptr, long long));
4002 }
4003 else
4004 #endif
4005 {
4006 *q++ = *p++;
4007 *q = 0;
4008 fprintf (file, buf, va_arg (argptr, long));
4009 }
4010
4011 break;
4012
4013 case 's':
4014 *q++ = c;
4015 *q = 0;
4016 fprintf (file, buf, va_arg (argptr, char *));
4017 break;
4018
4019 case 'O':
4020 #ifdef ASM_OUTPUT_OPCODE
4021 ASM_OUTPUT_OPCODE (asm_out_file, p);
4022 #endif
4023 break;
4024
4025 case 'R':
4026 #ifdef REGISTER_PREFIX
4027 fprintf (file, "%s", REGISTER_PREFIX);
4028 #endif
4029 break;
4030
4031 case 'I':
4032 #ifdef IMMEDIATE_PREFIX
4033 fprintf (file, "%s", IMMEDIATE_PREFIX);
4034 #endif
4035 break;
4036
4037 case 'L':
4038 #ifdef LOCAL_LABEL_PREFIX
4039 fprintf (file, "%s", LOCAL_LABEL_PREFIX);
4040 #endif
4041 break;
4042
4043 case 'U':
4044 fputs (user_label_prefix, file);
4045 break;
4046
4047 #ifdef ASM_FPRINTF_EXTENSIONS
4048 /* Uppercase letters are reserved for general use by asm_fprintf
4049 and so are not available to target specific code. In order to
4050 prevent the ASM_FPRINTF_EXTENSIONS macro from using them then,
4051 they are defined here. As they get turned into real extensions
4052 to asm_fprintf they should be removed from this list. */
4053 case 'A': case 'B': case 'C': case 'D': case 'E':
4054 case 'F': case 'G': case 'H': case 'J': case 'K':
4055 case 'M': case 'N': case 'P': case 'Q': case 'S':
4056 case 'T': case 'V': case 'W': case 'Y': case 'Z':
4057 break;
4058
4059 ASM_FPRINTF_EXTENSIONS (file, argptr, p)
4060 #endif
4061 default:
4062 gcc_unreachable ();
4063 }
4064 break;
4065
4066 default:
4067 putc (c, file);
4068 }
4069 va_end (argptr);
4070 }
4071 \f
4072 /* Return nonzero if this function has no function calls. */
4073
4074 int
4075 leaf_function_p (void)
4076 {
4077 rtx insn;
4078 rtx link;
4079
4080 if (crtl->profile || profile_arc_flag)
4081 return 0;
4082
4083 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4084 {
4085 if (CALL_P (insn)
4086 && ! SIBLING_CALL_P (insn))
4087 return 0;
4088 if (NONJUMP_INSN_P (insn)
4089 && GET_CODE (PATTERN (insn)) == SEQUENCE
4090 && CALL_P (XVECEXP (PATTERN (insn), 0, 0))
4091 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0)))
4092 return 0;
4093 }
4094 for (link = crtl->epilogue_delay_list;
4095 link;
4096 link = XEXP (link, 1))
4097 {
4098 insn = XEXP (link, 0);
4099
4100 if (CALL_P (insn)
4101 && ! SIBLING_CALL_P (insn))
4102 return 0;
4103 if (NONJUMP_INSN_P (insn)
4104 && GET_CODE (PATTERN (insn)) == SEQUENCE
4105 && CALL_P (XVECEXP (PATTERN (insn), 0, 0))
4106 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0)))
4107 return 0;
4108 }
4109
4110 return 1;
4111 }
4112
4113 /* Return 1 if branch is a forward branch.
4114 Uses insn_shuid array, so it works only in the final pass. May be used by
4115 output templates to customary add branch prediction hints.
4116 */
4117 int
4118 final_forward_branch_p (rtx insn)
4119 {
4120 int insn_id, label_id;
4121
4122 gcc_assert (uid_shuid);
4123 insn_id = INSN_SHUID (insn);
4124 label_id = INSN_SHUID (JUMP_LABEL (insn));
4125 /* We've hit some insns that does not have id information available. */
4126 gcc_assert (insn_id && label_id);
4127 return insn_id < label_id;
4128 }
4129
4130 /* On some machines, a function with no call insns
4131 can run faster if it doesn't create its own register window.
4132 When output, the leaf function should use only the "output"
4133 registers. Ordinarily, the function would be compiled to use
4134 the "input" registers to find its arguments; it is a candidate
4135 for leaf treatment if it uses only the "input" registers.
4136 Leaf function treatment means renumbering so the function
4137 uses the "output" registers instead. */
4138
4139 #ifdef LEAF_REGISTERS
4140
4141 /* Return 1 if this function uses only the registers that can be
4142 safely renumbered. */
4143
4144 int
4145 only_leaf_regs_used (void)
4146 {
4147 int i;
4148 const char *const permitted_reg_in_leaf_functions = LEAF_REGISTERS;
4149
4150 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
4151 if ((df_regs_ever_live_p (i) || global_regs[i])
4152 && ! permitted_reg_in_leaf_functions[i])
4153 return 0;
4154
4155 if (crtl->uses_pic_offset_table
4156 && pic_offset_table_rtx != 0
4157 && REG_P (pic_offset_table_rtx)
4158 && ! permitted_reg_in_leaf_functions[REGNO (pic_offset_table_rtx)])
4159 return 0;
4160
4161 return 1;
4162 }
4163
4164 /* Scan all instructions and renumber all registers into those
4165 available in leaf functions. */
4166
4167 static void
4168 leaf_renumber_regs (rtx first)
4169 {
4170 rtx insn;
4171
4172 /* Renumber only the actual patterns.
4173 The reg-notes can contain frame pointer refs,
4174 and renumbering them could crash, and should not be needed. */
4175 for (insn = first; insn; insn = NEXT_INSN (insn))
4176 if (INSN_P (insn))
4177 leaf_renumber_regs_insn (PATTERN (insn));
4178 for (insn = crtl->epilogue_delay_list;
4179 insn;
4180 insn = XEXP (insn, 1))
4181 if (INSN_P (XEXP (insn, 0)))
4182 leaf_renumber_regs_insn (PATTERN (XEXP (insn, 0)));
4183 }
4184
4185 /* Scan IN_RTX and its subexpressions, and renumber all regs into those
4186 available in leaf functions. */
4187
4188 void
4189 leaf_renumber_regs_insn (rtx in_rtx)
4190 {
4191 int i, j;
4192 const char *format_ptr;
4193
4194 if (in_rtx == 0)
4195 return;
4196
4197 /* Renumber all input-registers into output-registers.
4198 renumbered_regs would be 1 for an output-register;
4199 they */
4200
4201 if (REG_P (in_rtx))
4202 {
4203 int newreg;
4204
4205 /* Don't renumber the same reg twice. */
4206 if (in_rtx->used)
4207 return;
4208
4209 newreg = REGNO (in_rtx);
4210 /* Don't try to renumber pseudo regs. It is possible for a pseudo reg
4211 to reach here as part of a REG_NOTE. */
4212 if (newreg >= FIRST_PSEUDO_REGISTER)
4213 {
4214 in_rtx->used = 1;
4215 return;
4216 }
4217 newreg = LEAF_REG_REMAP (newreg);
4218 gcc_assert (newreg >= 0);
4219 df_set_regs_ever_live (REGNO (in_rtx), false);
4220 df_set_regs_ever_live (newreg, true);
4221 SET_REGNO (in_rtx, newreg);
4222 in_rtx->used = 1;
4223 }
4224
4225 if (INSN_P (in_rtx))
4226 {
4227 /* Inside a SEQUENCE, we find insns.
4228 Renumber just the patterns of these insns,
4229 just as we do for the top-level insns. */
4230 leaf_renumber_regs_insn (PATTERN (in_rtx));
4231 return;
4232 }
4233
4234 format_ptr = GET_RTX_FORMAT (GET_CODE (in_rtx));
4235
4236 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (in_rtx)); i++)
4237 switch (*format_ptr++)
4238 {
4239 case 'e':
4240 leaf_renumber_regs_insn (XEXP (in_rtx, i));
4241 break;
4242
4243 case 'E':
4244 if (NULL != XVEC (in_rtx, i))
4245 {
4246 for (j = 0; j < XVECLEN (in_rtx, i); j++)
4247 leaf_renumber_regs_insn (XVECEXP (in_rtx, i, j));
4248 }
4249 break;
4250
4251 case 'S':
4252 case 's':
4253 case '0':
4254 case 'i':
4255 case 'w':
4256 case 'n':
4257 case 'u':
4258 break;
4259
4260 default:
4261 gcc_unreachable ();
4262 }
4263 }
4264 #endif
4265 \f
4266 /* Turn the RTL into assembly. */
4267 static unsigned int
4268 rest_of_handle_final (void)
4269 {
4270 rtx x;
4271 const char *fnname;
4272
4273 /* Get the function's name, as described by its RTL. This may be
4274 different from the DECL_NAME name used in the source file. */
4275
4276 x = DECL_RTL (current_function_decl);
4277 gcc_assert (MEM_P (x));
4278 x = XEXP (x, 0);
4279 gcc_assert (GET_CODE (x) == SYMBOL_REF);
4280 fnname = XSTR (x, 0);
4281
4282 assemble_start_function (current_function_decl, fnname);
4283 final_start_function (get_insns (), asm_out_file, optimize);
4284 final (get_insns (), asm_out_file, optimize);
4285 final_end_function ();
4286
4287 /* The IA-64 ".handlerdata" directive must be issued before the ".endp"
4288 directive that closes the procedure descriptor. Similarly, for x64 SEH.
4289 Otherwise it's not strictly necessary, but it doesn't hurt either. */
4290 output_function_exception_table (fnname);
4291
4292 assemble_end_function (current_function_decl, fnname);
4293
4294 user_defined_section_attribute = false;
4295
4296 /* Free up reg info memory. */
4297 free_reg_info ();
4298
4299 if (! quiet_flag)
4300 fflush (asm_out_file);
4301
4302 /* Write DBX symbols if requested. */
4303
4304 /* Note that for those inline functions where we don't initially
4305 know for certain that we will be generating an out-of-line copy,
4306 the first invocation of this routine (rest_of_compilation) will
4307 skip over this code by doing a `goto exit_rest_of_compilation;'.
4308 Later on, wrapup_global_declarations will (indirectly) call
4309 rest_of_compilation again for those inline functions that need
4310 to have out-of-line copies generated. During that call, we
4311 *will* be routed past here. */
4312
4313 timevar_push (TV_SYMOUT);
4314 if (!DECL_IGNORED_P (current_function_decl))
4315 debug_hooks->function_decl (current_function_decl);
4316 timevar_pop (TV_SYMOUT);
4317
4318 /* Release the blocks that are linked to DECL_INITIAL() to free the memory. */
4319 DECL_INITIAL (current_function_decl) = error_mark_node;
4320
4321 if (DECL_STATIC_CONSTRUCTOR (current_function_decl)
4322 && targetm.have_ctors_dtors)
4323 targetm.asm_out.constructor (XEXP (DECL_RTL (current_function_decl), 0),
4324 decl_init_priority_lookup
4325 (current_function_decl));
4326 if (DECL_STATIC_DESTRUCTOR (current_function_decl)
4327 && targetm.have_ctors_dtors)
4328 targetm.asm_out.destructor (XEXP (DECL_RTL (current_function_decl), 0),
4329 decl_fini_priority_lookup
4330 (current_function_decl));
4331 return 0;
4332 }
4333
4334 struct rtl_opt_pass pass_final =
4335 {
4336 {
4337 RTL_PASS,
4338 "final", /* name */
4339 NULL, /* gate */
4340 rest_of_handle_final, /* execute */
4341 NULL, /* sub */
4342 NULL, /* next */
4343 0, /* static_pass_number */
4344 TV_FINAL, /* tv_id */
4345 0, /* properties_required */
4346 0, /* properties_provided */
4347 0, /* properties_destroyed */
4348 0, /* todo_flags_start */
4349 TODO_ggc_collect /* todo_flags_finish */
4350 }
4351 };
4352
4353
4354 static unsigned int
4355 rest_of_handle_shorten_branches (void)
4356 {
4357 /* Shorten branches. */
4358 shorten_branches (get_insns ());
4359 return 0;
4360 }
4361
4362 struct rtl_opt_pass pass_shorten_branches =
4363 {
4364 {
4365 RTL_PASS,
4366 "shorten", /* name */
4367 NULL, /* gate */
4368 rest_of_handle_shorten_branches, /* execute */
4369 NULL, /* sub */
4370 NULL, /* next */
4371 0, /* static_pass_number */
4372 TV_FINAL, /* tv_id */
4373 0, /* properties_required */
4374 0, /* properties_provided */
4375 0, /* properties_destroyed */
4376 0, /* todo_flags_start */
4377 0 /* todo_flags_finish */
4378 }
4379 };
4380
4381
4382 static unsigned int
4383 rest_of_clean_state (void)
4384 {
4385 rtx insn, next;
4386 FILE *final_output = NULL;
4387 int save_unnumbered = flag_dump_unnumbered;
4388 int save_noaddr = flag_dump_noaddr;
4389
4390 if (flag_dump_final_insns)
4391 {
4392 final_output = fopen (flag_dump_final_insns, "a");
4393 if (!final_output)
4394 {
4395 error ("could not open final insn dump file %qs: %m",
4396 flag_dump_final_insns);
4397 flag_dump_final_insns = NULL;
4398 }
4399 else
4400 {
4401 flag_dump_noaddr = flag_dump_unnumbered = 1;
4402 if (flag_compare_debug_opt || flag_compare_debug)
4403 dump_flags |= TDF_NOUID;
4404 dump_function_header (final_output, current_function_decl,
4405 dump_flags);
4406 final_insns_dump_p = true;
4407
4408 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4409 if (LABEL_P (insn))
4410 INSN_UID (insn) = CODE_LABEL_NUMBER (insn);
4411 else
4412 {
4413 if (NOTE_P (insn))
4414 set_block_for_insn (insn, NULL);
4415 INSN_UID (insn) = 0;
4416 }
4417 }
4418 }
4419
4420 /* It is very important to decompose the RTL instruction chain here:
4421 debug information keeps pointing into CODE_LABEL insns inside the function
4422 body. If these remain pointing to the other insns, we end up preserving
4423 whole RTL chain and attached detailed debug info in memory. */
4424 for (insn = get_insns (); insn; insn = next)
4425 {
4426 next = NEXT_INSN (insn);
4427 NEXT_INSN (insn) = NULL;
4428 PREV_INSN (insn) = NULL;
4429
4430 if (final_output
4431 && (!NOTE_P (insn) ||
4432 (NOTE_KIND (insn) != NOTE_INSN_VAR_LOCATION
4433 && NOTE_KIND (insn) != NOTE_INSN_CALL_ARG_LOCATION
4434 && NOTE_KIND (insn) != NOTE_INSN_BLOCK_BEG
4435 && NOTE_KIND (insn) != NOTE_INSN_BLOCK_END
4436 && NOTE_KIND (insn) != NOTE_INSN_DELETED_DEBUG_LABEL)))
4437 print_rtl_single (final_output, insn);
4438 }
4439
4440 if (final_output)
4441 {
4442 flag_dump_noaddr = save_noaddr;
4443 flag_dump_unnumbered = save_unnumbered;
4444 final_insns_dump_p = false;
4445
4446 if (fclose (final_output))
4447 {
4448 error ("could not close final insn dump file %qs: %m",
4449 flag_dump_final_insns);
4450 flag_dump_final_insns = NULL;
4451 }
4452 }
4453
4454 /* In case the function was not output,
4455 don't leave any temporary anonymous types
4456 queued up for sdb output. */
4457 #ifdef SDB_DEBUGGING_INFO
4458 if (write_symbols == SDB_DEBUG)
4459 sdbout_types (NULL_TREE);
4460 #endif
4461
4462 flag_rerun_cse_after_global_opts = 0;
4463 reload_completed = 0;
4464 epilogue_completed = 0;
4465 #ifdef STACK_REGS
4466 regstack_completed = 0;
4467 #endif
4468
4469 /* Clear out the insn_length contents now that they are no
4470 longer valid. */
4471 init_insn_lengths ();
4472
4473 /* Show no temporary slots allocated. */
4474 init_temp_slots ();
4475
4476 free_bb_for_insn ();
4477
4478 delete_tree_ssa ();
4479
4480 /* We can reduce stack alignment on call site only when we are sure that
4481 the function body just produced will be actually used in the final
4482 executable. */
4483 if (decl_binds_to_current_def_p (current_function_decl))
4484 {
4485 unsigned int pref = crtl->preferred_stack_boundary;
4486 if (crtl->stack_alignment_needed > crtl->preferred_stack_boundary)
4487 pref = crtl->stack_alignment_needed;
4488 cgraph_rtl_info (current_function_decl)->preferred_incoming_stack_boundary
4489 = pref;
4490 }
4491
4492 /* Make sure volatile mem refs aren't considered valid operands for
4493 arithmetic insns. We must call this here if this is a nested inline
4494 function, since the above code leaves us in the init_recog state,
4495 and the function context push/pop code does not save/restore volatile_ok.
4496
4497 ??? Maybe it isn't necessary for expand_start_function to call this
4498 anymore if we do it here? */
4499
4500 init_recog_no_volatile ();
4501
4502 /* We're done with this function. Free up memory if we can. */
4503 free_after_parsing (cfun);
4504 free_after_compilation (cfun);
4505 return 0;
4506 }
4507
4508 struct rtl_opt_pass pass_clean_state =
4509 {
4510 {
4511 RTL_PASS,
4512 "*clean_state", /* name */
4513 NULL, /* gate */
4514 rest_of_clean_state, /* execute */
4515 NULL, /* sub */
4516 NULL, /* next */
4517 0, /* static_pass_number */
4518 TV_FINAL, /* tv_id */
4519 0, /* properties_required */
4520 0, /* properties_provided */
4521 PROP_rtl, /* properties_destroyed */
4522 0, /* todo_flags_start */
4523 0 /* todo_flags_finish */
4524 }
4525 };