1aedfa388448c5871234dc47e1b5509ed6baf164
[gcc.git] / gcc / final.c
1 /* Convert RTL to assembler code and output it, for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000 Free Software Foundation, Inc.
4
5 This file is part of GNU CC.
6
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
10 any later version.
11
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
21
22
23 /* This is the final pass of the compiler.
24 It looks at the rtl code for a function and outputs assembler code.
25
26 Call `final_start_function' to output the assembler code for function entry,
27 `final' to output assembler code for some RTL code,
28 `final_end_function' to output assembler code for function exit.
29 If a function is compiled in several pieces, each piece is
30 output separately with `final'.
31
32 Some optimizations are also done at this level.
33 Move instructions that were made unnecessary by good register allocation
34 are detected and omitted from the output. (Though most of these
35 are removed by the last jump pass.)
36
37 Instructions to set the condition codes are omitted when it can be
38 seen that the condition codes already had the desired values.
39
40 In some cases it is sufficient if the inherited condition codes
41 have related values, but this may require the following insn
42 (the one that tests the condition codes) to be modified.
43
44 The code for the function prologue and epilogue are generated
45 directly as assembler code by the macros FUNCTION_PROLOGUE and
46 FUNCTION_EPILOGUE. Those instructions never exist as rtl. */
47
48 #include "config.h"
49 #include "system.h"
50
51 #include "tree.h"
52 #include "rtl.h"
53 #include "tm_p.h"
54 #include "regs.h"
55 #include "insn-config.h"
56 #include "insn-flags.h"
57 #include "insn-attr.h"
58 #include "insn-codes.h"
59 #include "recog.h"
60 #include "conditions.h"
61 #include "flags.h"
62 #include "real.h"
63 #include "hard-reg-set.h"
64 #include "defaults.h"
65 #include "output.h"
66 #include "except.h"
67 #include "function.h"
68 #include "toplev.h"
69 #include "reload.h"
70 #include "intl.h"
71 #include "basic-block.h"
72
73 /* Get N_SLINE and N_SOL from stab.h if we can expect the file to exist. */
74 #if defined (DBX_DEBUGGING_INFO) || defined (XCOFF_DEBUGGING_INFO)
75 #include "dbxout.h"
76 #if defined (USG) || !defined (HAVE_STAB_H)
77 #include "gstab.h" /* If doing DBX on sysV, use our own stab.h. */
78 #else
79 #include <stab.h>
80 #endif
81
82 #endif /* DBX_DEBUGGING_INFO || XCOFF_DEBUGGING_INFO */
83
84 #ifndef ACCUMULATE_OUTGOING_ARGS
85 #define ACCUMULATE_OUTGOING_ARGS 0
86 #endif
87
88 #ifdef XCOFF_DEBUGGING_INFO
89 #include "xcoffout.h"
90 #endif
91
92 #ifdef DWARF_DEBUGGING_INFO
93 #include "dwarfout.h"
94 #endif
95
96 #if defined (DWARF2_UNWIND_INFO) || defined (DWARF2_DEBUGGING_INFO)
97 #include "dwarf2out.h"
98 #endif
99
100 #ifdef SDB_DEBUGGING_INFO
101 #include "sdbout.h"
102 #endif
103
104 /* .stabd code for line number. */
105 #ifndef N_SLINE
106 #define N_SLINE 0x44
107 #endif
108
109 /* .stabs code for included file name. */
110 #ifndef N_SOL
111 #define N_SOL 0x84
112 #endif
113
114 #ifndef INT_TYPE_SIZE
115 #define INT_TYPE_SIZE BITS_PER_WORD
116 #endif
117
118 #ifndef LONG_TYPE_SIZE
119 #define LONG_TYPE_SIZE BITS_PER_WORD
120 #endif
121
122 /* If we aren't using cc0, CC_STATUS_INIT shouldn't exist. So define a
123 null default for it to save conditionalization later. */
124 #ifndef CC_STATUS_INIT
125 #define CC_STATUS_INIT
126 #endif
127
128 /* How to start an assembler comment. */
129 #ifndef ASM_COMMENT_START
130 #define ASM_COMMENT_START ";#"
131 #endif
132
133 /* Is the given character a logical line separator for the assembler? */
134 #ifndef IS_ASM_LOGICAL_LINE_SEPARATOR
135 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C) ((C) == ';')
136 #endif
137
138 #ifndef JUMP_TABLES_IN_TEXT_SECTION
139 #define JUMP_TABLES_IN_TEXT_SECTION 0
140 #endif
141
142 /* Last insn processed by final_scan_insn. */
143 static rtx debug_insn = 0;
144
145 /* Line number of last NOTE. */
146 static int last_linenum;
147
148 /* Highest line number in current block. */
149 static int high_block_linenum;
150
151 /* Likewise for function. */
152 static int high_function_linenum;
153
154 /* Filename of last NOTE. */
155 static const char *last_filename;
156
157 /* Number of basic blocks seen so far;
158 used if profile_block_flag is set. */
159 static int count_basic_blocks;
160
161 /* Number of instrumented arcs when profile_arc_flag is set. */
162 extern int count_instrumented_edges;
163
164 extern int length_unit_log; /* This is defined in insn-attrtab.c. */
165
166 /* Nonzero while outputting an `asm' with operands.
167 This means that inconsistencies are the user's fault, so don't abort.
168 The precise value is the insn being output, to pass to error_for_asm. */
169 static rtx this_is_asm_operands;
170
171 /* Number of operands of this insn, for an `asm' with operands. */
172 static unsigned int insn_noperands;
173
174 /* Compare optimization flag. */
175
176 static rtx last_ignored_compare = 0;
177
178 /* Flag indicating this insn is the start of a new basic block. */
179
180 static int new_block = 1;
181
182 /* Assign a unique number to each insn that is output.
183 This can be used to generate unique local labels. */
184
185 static int insn_counter = 0;
186
187 #ifdef HAVE_cc0
188 /* This variable contains machine-dependent flags (defined in tm.h)
189 set and examined by output routines
190 that describe how to interpret the condition codes properly. */
191
192 CC_STATUS cc_status;
193
194 /* During output of an insn, this contains a copy of cc_status
195 from before the insn. */
196
197 CC_STATUS cc_prev_status;
198 #endif
199
200 /* Indexed by hardware reg number, is 1 if that register is ever
201 used in the current function.
202
203 In life_analysis, or in stupid_life_analysis, this is set
204 up to record the hard regs used explicitly. Reload adds
205 in the hard regs used for holding pseudo regs. Final uses
206 it to generate the code in the function prologue and epilogue
207 to save and restore registers as needed. */
208
209 char regs_ever_live[FIRST_PSEUDO_REGISTER];
210
211 /* Nonzero means current function must be given a frame pointer.
212 Set in stmt.c if anything is allocated on the stack there.
213 Set in reload1.c if anything is allocated on the stack there. */
214
215 int frame_pointer_needed;
216
217 /* Assign unique numbers to labels generated for profiling. */
218
219 int profile_label_no;
220
221 /* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */
222
223 static int block_depth;
224
225 /* Nonzero if have enabled APP processing of our assembler output. */
226
227 static int app_on;
228
229 /* If we are outputting an insn sequence, this contains the sequence rtx.
230 Zero otherwise. */
231
232 rtx final_sequence;
233
234 #ifdef ASSEMBLER_DIALECT
235
236 /* Number of the assembler dialect to use, starting at 0. */
237 static int dialect_number;
238 #endif
239
240 /* Indexed by line number, nonzero if there is a note for that line. */
241
242 static char *line_note_exists;
243
244 #ifdef HAVE_conditional_execution
245 /* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */
246 rtx current_insn_predicate;
247 #endif
248
249 /* Linked list to hold line numbers for each basic block. */
250
251 struct bb_list {
252 struct bb_list *next; /* pointer to next basic block */
253 int line_num; /* line number */
254 int file_label_num; /* LPBC<n> label # for stored filename */
255 int func_label_num; /* LPBC<n> label # for stored function name */
256 };
257
258 static struct bb_list *bb_head = 0; /* Head of basic block list */
259 static struct bb_list **bb_tail = &bb_head; /* Ptr to store next bb ptr */
260 static int bb_file_label_num = -1; /* Current label # for file */
261 static int bb_func_label_num = -1; /* Current label # for func */
262
263 /* Linked list to hold the strings for each file and function name output. */
264
265 struct bb_str {
266 struct bb_str *next; /* pointer to next string */
267 const char *string; /* string */
268 int label_num; /* label number */
269 int length; /* string length */
270 };
271
272 static struct bb_str *sbb_head = 0; /* Head of string list. */
273 static struct bb_str **sbb_tail = &sbb_head; /* Ptr to store next bb str */
274 static int sbb_label_num = 0; /* Last label used */
275
276 #ifdef HAVE_ATTR_length
277 static int asm_insn_count PARAMS ((rtx));
278 #endif
279 static void profile_function PARAMS ((FILE *));
280 static void profile_after_prologue PARAMS ((FILE *));
281 static void add_bb PARAMS ((FILE *));
282 static int add_bb_string PARAMS ((const char *, int));
283 static void output_source_line PARAMS ((FILE *, rtx));
284 static rtx walk_alter_subreg PARAMS ((rtx));
285 static void output_asm_name PARAMS ((void));
286 static void output_operand PARAMS ((rtx, int));
287 #ifdef LEAF_REGISTERS
288 static void leaf_renumber_regs PARAMS ((rtx));
289 #endif
290 #ifdef HAVE_cc0
291 static int alter_cond PARAMS ((rtx));
292 #endif
293 #ifndef ADDR_VEC_ALIGN
294 static int final_addr_vec_align PARAMS ((rtx));
295 #endif
296 #ifdef HAVE_ATTR_length
297 static int align_fuzz PARAMS ((rtx, rtx, int, unsigned));
298 #endif
299 \f
300 /* Initialize data in final at the beginning of a compilation. */
301
302 void
303 init_final (filename)
304 const char *filename ATTRIBUTE_UNUSED;
305 {
306 app_on = 0;
307 final_sequence = 0;
308
309 #ifdef ASSEMBLER_DIALECT
310 dialect_number = ASSEMBLER_DIALECT;
311 #endif
312 }
313
314 /* Called at end of source file,
315 to output the block-profiling table for this entire compilation. */
316
317 void
318 end_final (filename)
319 const char *filename;
320 {
321 int i;
322
323 if (profile_block_flag || profile_arc_flag)
324 {
325 char name[20];
326 int align = exact_log2 (BIGGEST_ALIGNMENT / BITS_PER_UNIT);
327 int size, rounded;
328 struct bb_list *ptr;
329 struct bb_str *sptr;
330 int long_bytes = LONG_TYPE_SIZE / BITS_PER_UNIT;
331 int pointer_bytes = POINTER_SIZE / BITS_PER_UNIT;
332
333 if (profile_block_flag)
334 size = long_bytes * count_basic_blocks;
335 else
336 size = long_bytes * count_instrumented_edges;
337 rounded = size;
338
339 rounded += (BIGGEST_ALIGNMENT / BITS_PER_UNIT) - 1;
340 rounded = (rounded / (BIGGEST_ALIGNMENT / BITS_PER_UNIT)
341 * (BIGGEST_ALIGNMENT / BITS_PER_UNIT));
342
343 data_section ();
344
345 /* Output the main header, of 11 words:
346 0: 1 if this file is initialized, else 0.
347 1: address of file name (LPBX1).
348 2: address of table of counts (LPBX2).
349 3: number of counts in the table.
350 4: always 0, for compatibility with Sun.
351
352 The following are GNU extensions:
353
354 5: address of table of start addrs of basic blocks (LPBX3).
355 6: Number of bytes in this header.
356 7: address of table of function names (LPBX4).
357 8: address of table of line numbers (LPBX5) or 0.
358 9: address of table of file names (LPBX6) or 0.
359 10: space reserved for basic block profiling. */
360
361 ASM_OUTPUT_ALIGN (asm_out_file, align);
362
363 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 0);
364 /* zero word */
365 assemble_integer (const0_rtx, long_bytes, 1);
366
367 /* address of filename */
368 ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 1);
369 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name), pointer_bytes, 1);
370
371 /* address of count table */
372 ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 2);
373 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name), pointer_bytes, 1);
374
375 /* count of the # of basic blocks or # of instrumented arcs */
376 if (profile_block_flag)
377 assemble_integer (GEN_INT (count_basic_blocks), long_bytes, 1);
378 else
379 assemble_integer (GEN_INT (count_instrumented_edges), long_bytes, 1);
380
381 /* zero word (link field) */
382 assemble_integer (const0_rtx, pointer_bytes, 1);
383
384 /* address of basic block start address table */
385 if (profile_block_flag)
386 {
387 ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 3);
388 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name), pointer_bytes,
389 1);
390 }
391 else
392 assemble_integer (const0_rtx, pointer_bytes, 1);
393
394 /* byte count for extended structure. */
395 assemble_integer (GEN_INT (11 * UNITS_PER_WORD), long_bytes, 1);
396
397 /* address of function name table */
398 if (profile_block_flag)
399 {
400 ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 4);
401 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name), pointer_bytes,
402 1);
403 }
404 else
405 assemble_integer (const0_rtx, pointer_bytes, 1);
406
407 /* address of line number and filename tables if debugging. */
408 if (write_symbols != NO_DEBUG && profile_block_flag)
409 {
410 ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 5);
411 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name),
412 pointer_bytes, 1);
413 ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 6);
414 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name),
415 pointer_bytes, 1);
416 }
417 else
418 {
419 assemble_integer (const0_rtx, pointer_bytes, 1);
420 assemble_integer (const0_rtx, pointer_bytes, 1);
421 }
422
423 /* space for extension ptr (link field) */
424 assemble_integer (const0_rtx, UNITS_PER_WORD, 1);
425
426 /* Output the file name changing the suffix to .d for Sun tcov
427 compatibility. */
428 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 1);
429 {
430 char *cwd = getpwd ();
431 int len = strlen (filename) + strlen (cwd) + 1;
432 char *data_file = (char *) alloca (len + 4);
433
434 strcpy (data_file, cwd);
435 strcat (data_file, "/");
436 strcat (data_file, filename);
437 strip_off_ending (data_file, len);
438 if (profile_block_flag)
439 strcat (data_file, ".d");
440 else
441 strcat (data_file, ".da");
442 assemble_string (data_file, strlen (data_file) + 1);
443 }
444
445 /* Make space for the table of counts. */
446 if (size == 0)
447 {
448 /* Realign data section. */
449 ASM_OUTPUT_ALIGN (asm_out_file, align);
450 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 2);
451 if (size != 0)
452 assemble_zeros (size);
453 }
454 else
455 {
456 ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 2);
457 #ifdef ASM_OUTPUT_SHARED_LOCAL
458 if (flag_shared_data)
459 ASM_OUTPUT_SHARED_LOCAL (asm_out_file, name, size, rounded);
460 else
461 #endif
462 #ifdef ASM_OUTPUT_ALIGNED_DECL_LOCAL
463 ASM_OUTPUT_ALIGNED_DECL_LOCAL (asm_out_file, NULL_TREE, name, size,
464 BIGGEST_ALIGNMENT);
465 #else
466 #ifdef ASM_OUTPUT_ALIGNED_LOCAL
467 ASM_OUTPUT_ALIGNED_LOCAL (asm_out_file, name, size,
468 BIGGEST_ALIGNMENT);
469 #else
470 ASM_OUTPUT_LOCAL (asm_out_file, name, size, rounded);
471 #endif
472 #endif
473 }
474
475 /* Output any basic block strings */
476 if (profile_block_flag)
477 {
478 readonly_data_section ();
479 if (sbb_head)
480 {
481 ASM_OUTPUT_ALIGN (asm_out_file, align);
482 for (sptr = sbb_head; sptr != 0; sptr = sptr->next)
483 {
484 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBC",
485 sptr->label_num);
486 assemble_string (sptr->string, sptr->length);
487 }
488 }
489 }
490
491 /* Output the table of addresses. */
492 if (profile_block_flag)
493 {
494 /* Realign in new section */
495 ASM_OUTPUT_ALIGN (asm_out_file, align);
496 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 3);
497 for (i = 0; i < count_basic_blocks; i++)
498 {
499 ASM_GENERATE_INTERNAL_LABEL (name, "LPB", i);
500 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name),
501 pointer_bytes, 1);
502 }
503 }
504
505 /* Output the table of function names. */
506 if (profile_block_flag)
507 {
508 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 4);
509 for ((ptr = bb_head), (i = 0); ptr != 0; (ptr = ptr->next), i++)
510 {
511 if (ptr->func_label_num >= 0)
512 {
513 ASM_GENERATE_INTERNAL_LABEL (name, "LPBC",
514 ptr->func_label_num);
515 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name),
516 pointer_bytes, 1);
517 }
518 else
519 assemble_integer (const0_rtx, pointer_bytes, 1);
520 }
521
522 for ( ; i < count_basic_blocks; i++)
523 assemble_integer (const0_rtx, pointer_bytes, 1);
524 }
525
526 if (write_symbols != NO_DEBUG && profile_block_flag)
527 {
528 /* Output the table of line numbers. */
529 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 5);
530 for ((ptr = bb_head), (i = 0); ptr != 0; (ptr = ptr->next), i++)
531 assemble_integer (GEN_INT (ptr->line_num), long_bytes, 1);
532
533 for ( ; i < count_basic_blocks; i++)
534 assemble_integer (const0_rtx, long_bytes, 1);
535
536 /* Output the table of file names. */
537 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 6);
538 for ((ptr = bb_head), (i = 0); ptr != 0; (ptr = ptr->next), i++)
539 {
540 if (ptr->file_label_num >= 0)
541 {
542 ASM_GENERATE_INTERNAL_LABEL (name, "LPBC",
543 ptr->file_label_num);
544 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name),
545 pointer_bytes, 1);
546 }
547 else
548 assemble_integer (const0_rtx, pointer_bytes, 1);
549 }
550
551 for ( ; i < count_basic_blocks; i++)
552 assemble_integer (const0_rtx, pointer_bytes, 1);
553 }
554
555 /* End with the address of the table of addresses,
556 so we can find it easily, as the last word in the file's text. */
557 if (profile_block_flag)
558 {
559 ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 3);
560 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name), pointer_bytes,
561 1);
562 }
563 }
564 }
565
566 /* Enable APP processing of subsequent output.
567 Used before the output from an `asm' statement. */
568
569 void
570 app_enable ()
571 {
572 if (! app_on)
573 {
574 fputs (ASM_APP_ON, asm_out_file);
575 app_on = 1;
576 }
577 }
578
579 /* Disable APP processing of subsequent output.
580 Called from varasm.c before most kinds of output. */
581
582 void
583 app_disable ()
584 {
585 if (app_on)
586 {
587 fputs (ASM_APP_OFF, asm_out_file);
588 app_on = 0;
589 }
590 }
591 \f
592 /* Return the number of slots filled in the current
593 delayed branch sequence (we don't count the insn needing the
594 delay slot). Zero if not in a delayed branch sequence. */
595
596 #ifdef DELAY_SLOTS
597 int
598 dbr_sequence_length ()
599 {
600 if (final_sequence != 0)
601 return XVECLEN (final_sequence, 0) - 1;
602 else
603 return 0;
604 }
605 #endif
606 \f
607 /* The next two pages contain routines used to compute the length of an insn
608 and to shorten branches. */
609
610 /* Arrays for insn lengths, and addresses. The latter is referenced by
611 `insn_current_length'. */
612
613 static short *insn_lengths;
614 int *insn_addresses;
615
616 /* Max uid for which the above arrays are valid. */
617 static int insn_lengths_max_uid;
618
619 /* Address of insn being processed. Used by `insn_current_length'. */
620 int insn_current_address;
621
622 /* Address of insn being processed in previous iteration. */
623 int insn_last_address;
624
625 /* konwn invariant alignment of insn being processed. */
626 int insn_current_align;
627
628 /* After shorten_branches, for any insn, uid_align[INSN_UID (insn)]
629 gives the next following alignment insn that increases the known
630 alignment, or NULL_RTX if there is no such insn.
631 For any alignment obtained this way, we can again index uid_align with
632 its uid to obtain the next following align that in turn increases the
633 alignment, till we reach NULL_RTX; the sequence obtained this way
634 for each insn we'll call the alignment chain of this insn in the following
635 comments. */
636
637 struct label_alignment {
638 short alignment;
639 short max_skip;
640 };
641
642 static rtx *uid_align;
643 static int *uid_shuid;
644 static struct label_alignment *label_align;
645
646 /* Indicate that branch shortening hasn't yet been done. */
647
648 void
649 init_insn_lengths ()
650 {
651 if (label_align)
652 {
653 free (label_align);
654 label_align = 0;
655 }
656 if (uid_shuid)
657 {
658 free (uid_shuid);
659 uid_shuid = 0;
660 }
661 if (insn_lengths)
662 {
663 free (insn_lengths);
664 insn_lengths = 0;
665 insn_lengths_max_uid = 0;
666 }
667 if (insn_addresses)
668 {
669 free (insn_addresses);
670 insn_addresses = 0;
671 }
672 if (uid_align)
673 {
674 free (uid_align);
675 uid_align = 0;
676 }
677 }
678
679 /* Obtain the current length of an insn. If branch shortening has been done,
680 get its actual length. Otherwise, get its maximum length. */
681
682 int
683 get_attr_length (insn)
684 rtx insn ATTRIBUTE_UNUSED;
685 {
686 #ifdef HAVE_ATTR_length
687 rtx body;
688 int i;
689 int length = 0;
690
691 if (insn_lengths_max_uid > INSN_UID (insn))
692 return insn_lengths[INSN_UID (insn)];
693 else
694 switch (GET_CODE (insn))
695 {
696 case NOTE:
697 case BARRIER:
698 case CODE_LABEL:
699 return 0;
700
701 case CALL_INSN:
702 length = insn_default_length (insn);
703 break;
704
705 case JUMP_INSN:
706 body = PATTERN (insn);
707 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
708 {
709 /* Alignment is machine-dependent and should be handled by
710 ADDR_VEC_ALIGN. */
711 }
712 else
713 length = insn_default_length (insn);
714 break;
715
716 case INSN:
717 body = PATTERN (insn);
718 if (GET_CODE (body) == USE || GET_CODE (body) == CLOBBER)
719 return 0;
720
721 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
722 length = asm_insn_count (body) * insn_default_length (insn);
723 else if (GET_CODE (body) == SEQUENCE)
724 for (i = 0; i < XVECLEN (body, 0); i++)
725 length += get_attr_length (XVECEXP (body, 0, i));
726 else
727 length = insn_default_length (insn);
728 break;
729
730 default:
731 break;
732 }
733
734 #ifdef ADJUST_INSN_LENGTH
735 ADJUST_INSN_LENGTH (insn, length);
736 #endif
737 return length;
738 #else /* not HAVE_ATTR_length */
739 return 0;
740 #endif /* not HAVE_ATTR_length */
741 }
742 \f
743 /* Code to handle alignment inside shorten_branches. */
744
745 /* Here is an explanation how the algorithm in align_fuzz can give
746 proper results:
747
748 Call a sequence of instructions beginning with alignment point X
749 and continuing until the next alignment point `block X'. When `X'
750 is used in an expression, it means the alignment value of the
751 alignment point.
752
753 Call the distance between the start of the first insn of block X, and
754 the end of the last insn of block X `IX', for the `inner size of X'.
755 This is clearly the sum of the instruction lengths.
756
757 Likewise with the next alignment-delimited block following X, which we
758 shall call block Y.
759
760 Call the distance between the start of the first insn of block X, and
761 the start of the first insn of block Y `OX', for the `outer size of X'.
762
763 The estimated padding is then OX - IX.
764
765 OX can be safely estimated as
766
767 if (X >= Y)
768 OX = round_up(IX, Y)
769 else
770 OX = round_up(IX, X) + Y - X
771
772 Clearly est(IX) >= real(IX), because that only depends on the
773 instruction lengths, and those being overestimated is a given.
774
775 Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so
776 we needn't worry about that when thinking about OX.
777
778 When X >= Y, the alignment provided by Y adds no uncertainty factor
779 for branch ranges starting before X, so we can just round what we have.
780 But when X < Y, we don't know anything about the, so to speak,
781 `middle bits', so we have to assume the worst when aligning up from an
782 address mod X to one mod Y, which is Y - X. */
783
784 #ifndef LABEL_ALIGN
785 #define LABEL_ALIGN(LABEL) align_labels_log
786 #endif
787
788 #ifndef LABEL_ALIGN_MAX_SKIP
789 #define LABEL_ALIGN_MAX_SKIP (align_labels-1)
790 #endif
791
792 #ifndef LOOP_ALIGN
793 #define LOOP_ALIGN(LABEL) align_loops_log
794 #endif
795
796 #ifndef LOOP_ALIGN_MAX_SKIP
797 #define LOOP_ALIGN_MAX_SKIP (align_loops-1)
798 #endif
799
800 #ifndef LABEL_ALIGN_AFTER_BARRIER
801 #define LABEL_ALIGN_AFTER_BARRIER(LABEL) align_jumps_log
802 #endif
803
804 #ifndef LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP
805 #define LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP (align_jumps-1)
806 #endif
807
808 #ifndef ADDR_VEC_ALIGN
809 static int
810 final_addr_vec_align (addr_vec)
811 rtx addr_vec;
812 {
813 int align = exact_log2 (GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec))));
814
815 if (align > BIGGEST_ALIGNMENT / BITS_PER_UNIT)
816 align = BIGGEST_ALIGNMENT / BITS_PER_UNIT;
817 return align;
818
819 }
820 #define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC)
821 #endif
822
823 #ifndef INSN_LENGTH_ALIGNMENT
824 #define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log
825 #endif
826
827 #define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)])
828
829 static int min_labelno, max_labelno;
830
831 #define LABEL_TO_ALIGNMENT(LABEL) \
832 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment)
833
834 #define LABEL_TO_MAX_SKIP(LABEL) \
835 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip)
836
837 /* For the benefit of port specific code do this also as a function. */
838 int
839 label_to_alignment (label)
840 rtx label;
841 {
842 return LABEL_TO_ALIGNMENT (label);
843 }
844
845 #ifdef HAVE_ATTR_length
846 /* The differences in addresses
847 between a branch and its target might grow or shrink depending on
848 the alignment the start insn of the range (the branch for a forward
849 branch or the label for a backward branch) starts out on; if these
850 differences are used naively, they can even oscillate infinitely.
851 We therefore want to compute a 'worst case' address difference that
852 is independent of the alignment the start insn of the range end
853 up on, and that is at least as large as the actual difference.
854 The function align_fuzz calculates the amount we have to add to the
855 naively computed difference, by traversing the part of the alignment
856 chain of the start insn of the range that is in front of the end insn
857 of the range, and considering for each alignment the maximum amount
858 that it might contribute to a size increase.
859
860 For casesi tables, we also want to know worst case minimum amounts of
861 address difference, in case a machine description wants to introduce
862 some common offset that is added to all offsets in a table.
863 For this purpose, align_fuzz with a growth argument of 0 comuptes the
864 appropriate adjustment. */
865
866
867 /* Compute the maximum delta by which the difference of the addresses of
868 START and END might grow / shrink due to a different address for start
869 which changes the size of alignment insns between START and END.
870 KNOWN_ALIGN_LOG is the alignment known for START.
871 GROWTH should be ~0 if the objective is to compute potential code size
872 increase, and 0 if the objective is to compute potential shrink.
873 The return value is undefined for any other value of GROWTH. */
874 static int
875 align_fuzz (start, end, known_align_log, growth)
876 rtx start, end;
877 int known_align_log;
878 unsigned growth;
879 {
880 int uid = INSN_UID (start);
881 rtx align_label;
882 int known_align = 1 << known_align_log;
883 int end_shuid = INSN_SHUID (end);
884 int fuzz = 0;
885
886 for (align_label = uid_align[uid]; align_label; align_label = uid_align[uid])
887 {
888 int align_addr, new_align;
889
890 uid = INSN_UID (align_label);
891 align_addr = insn_addresses[uid] - insn_lengths[uid];
892 if (uid_shuid[uid] > end_shuid)
893 break;
894 known_align_log = LABEL_TO_ALIGNMENT (align_label);
895 new_align = 1 << known_align_log;
896 if (new_align < known_align)
897 continue;
898 fuzz += (-align_addr ^ growth) & (new_align - known_align);
899 known_align = new_align;
900 }
901 return fuzz;
902 }
903
904 /* Compute a worst-case reference address of a branch so that it
905 can be safely used in the presence of aligned labels. Since the
906 size of the branch itself is unknown, the size of the branch is
907 not included in the range. I.e. for a forward branch, the reference
908 address is the end address of the branch as known from the previous
909 branch shortening pass, minus a value to account for possible size
910 increase due to alignment. For a backward branch, it is the start
911 address of the branch as known from the current pass, plus a value
912 to account for possible size increase due to alignment.
913 NB.: Therefore, the maximum offset allowed for backward branches needs
914 to exclude the branch size. */
915 int
916 insn_current_reference_address (branch)
917 rtx branch;
918 {
919 rtx dest;
920 rtx seq = NEXT_INSN (PREV_INSN (branch));
921 int seq_uid = INSN_UID (seq);
922 if (GET_CODE (branch) != JUMP_INSN)
923 /* This can happen for example on the PA; the objective is to know the
924 offset to address something in front of the start of the function.
925 Thus, we can treat it like a backward branch.
926 We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than
927 any alignment we'd encounter, so we skip the call to align_fuzz. */
928 return insn_current_address;
929 dest = JUMP_LABEL (branch);
930 /* BRANCH has no proper alignment chain set, so use SEQ. */
931 if (INSN_SHUID (branch) < INSN_SHUID (dest))
932 {
933 /* Forward branch. */
934 return (insn_last_address + insn_lengths[seq_uid]
935 - align_fuzz (seq, dest, length_unit_log, ~0));
936 }
937 else
938 {
939 /* Backward branch. */
940 return (insn_current_address
941 + align_fuzz (dest, seq, length_unit_log, ~0));
942 }
943 }
944 #endif /* HAVE_ATTR_length */
945 \f
946 /* Make a pass over all insns and compute their actual lengths by shortening
947 any branches of variable length if possible. */
948
949 /* Give a default value for the lowest address in a function. */
950
951 #ifndef FIRST_INSN_ADDRESS
952 #define FIRST_INSN_ADDRESS 0
953 #endif
954
955 /* shorten_branches might be called multiple times: for example, the SH
956 port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG.
957 In order to do this, it needs proper length information, which it obtains
958 by calling shorten_branches. This cannot be collapsed with
959 shorten_branches itself into a single pass unless we also want to intergate
960 reorg.c, since the branch splitting exposes new instructions with delay
961 slots. */
962
963 void
964 shorten_branches (first)
965 rtx first ATTRIBUTE_UNUSED;
966 {
967 rtx insn;
968 int max_uid;
969 int i;
970 int max_log;
971 int max_skip;
972 #ifdef HAVE_ATTR_length
973 #define MAX_CODE_ALIGN 16
974 rtx seq;
975 int something_changed = 1;
976 char *varying_length;
977 rtx body;
978 int uid;
979 rtx align_tab[MAX_CODE_ALIGN];
980
981 /* In order to make sure that all instructions have valid length info,
982 we must split them before we compute the address/length info. */
983
984 for (insn = NEXT_INSN (first); insn; insn = NEXT_INSN (insn))
985 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
986 {
987 rtx old = insn;
988 /* Don't split the insn if it has been deleted. */
989 if (! INSN_DELETED_P (old))
990 insn = try_split (PATTERN (old), old, 1);
991 /* When not optimizing, the old insn will be still left around
992 with only the 'deleted' bit set. Transform it into a note
993 to avoid confusion of subsequent processing. */
994 if (INSN_DELETED_P (old))
995 {
996 PUT_CODE (old , NOTE);
997 NOTE_LINE_NUMBER (old) = NOTE_INSN_DELETED;
998 NOTE_SOURCE_FILE (old) = 0;
999 }
1000 }
1001 #endif
1002
1003 /* We must do some computations even when not actually shortening, in
1004 order to get the alignment information for the labels. */
1005
1006 init_insn_lengths ();
1007
1008 /* Compute maximum UID and allocate label_align / uid_shuid. */
1009 max_uid = get_max_uid ();
1010
1011 max_labelno = max_label_num ();
1012 min_labelno = get_first_label_num ();
1013 label_align = (struct label_alignment *)
1014 xcalloc ((max_labelno - min_labelno + 1), sizeof (struct label_alignment));
1015
1016 uid_shuid = (int *) xmalloc (max_uid * sizeof *uid_shuid);
1017
1018 /* Initialize label_align and set up uid_shuid to be strictly
1019 monotonically rising with insn order. */
1020 /* We use max_log here to keep track of the maximum alignment we want to
1021 impose on the next CODE_LABEL (or the current one if we are processing
1022 the CODE_LABEL itself). */
1023
1024 max_log = 0;
1025 max_skip = 0;
1026
1027 for (insn = get_insns (), i = 1; insn; insn = NEXT_INSN (insn))
1028 {
1029 int log;
1030
1031 INSN_SHUID (insn) = i++;
1032 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
1033 {
1034 /* reorg might make the first insn of a loop being run once only,
1035 and delete the label in front of it. Then we want to apply
1036 the loop alignment to the new label created by reorg, which
1037 is separated by the former loop start insn from the
1038 NOTE_INSN_LOOP_BEG. */
1039 }
1040 else if (GET_CODE (insn) == CODE_LABEL)
1041 {
1042 rtx next;
1043
1044 log = LABEL_ALIGN (insn);
1045 if (max_log < log)
1046 {
1047 max_log = log;
1048 max_skip = LABEL_ALIGN_MAX_SKIP;
1049 }
1050 next = NEXT_INSN (insn);
1051 /* ADDR_VECs only take room if read-only data goes into the text
1052 section. */
1053 if (JUMP_TABLES_IN_TEXT_SECTION
1054 #if !defined(READONLY_DATA_SECTION)
1055 || 1
1056 #endif
1057 )
1058 if (next && GET_CODE (next) == JUMP_INSN)
1059 {
1060 rtx nextbody = PATTERN (next);
1061 if (GET_CODE (nextbody) == ADDR_VEC
1062 || GET_CODE (nextbody) == ADDR_DIFF_VEC)
1063 {
1064 log = ADDR_VEC_ALIGN (next);
1065 if (max_log < log)
1066 {
1067 max_log = log;
1068 max_skip = LABEL_ALIGN_MAX_SKIP;
1069 }
1070 }
1071 }
1072 LABEL_TO_ALIGNMENT (insn) = max_log;
1073 LABEL_TO_MAX_SKIP (insn) = max_skip;
1074 max_log = 0;
1075 max_skip = 0;
1076 }
1077 else if (GET_CODE (insn) == BARRIER)
1078 {
1079 rtx label;
1080
1081 for (label = insn; label && GET_RTX_CLASS (GET_CODE (label)) != 'i';
1082 label = NEXT_INSN (label))
1083 if (GET_CODE (label) == CODE_LABEL)
1084 {
1085 log = LABEL_ALIGN_AFTER_BARRIER (insn);
1086 if (max_log < log)
1087 {
1088 max_log = log;
1089 max_skip = LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP;
1090 }
1091 break;
1092 }
1093 }
1094 /* Again, we allow NOTE_INSN_LOOP_BEG - INSN - CODE_LABEL
1095 sequences in order to handle reorg output efficiently. */
1096 else if (GET_CODE (insn) == NOTE
1097 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
1098 {
1099 rtx label;
1100 int nest = 0;
1101
1102 /* Search for the label that starts the loop.
1103 Don't skip past the end of the loop, since that could
1104 lead to putting an alignment where it does not belong.
1105 However, a label after a nested (non-)loop would be OK. */
1106 for (label = insn; label; label = NEXT_INSN (label))
1107 {
1108 if (GET_CODE (label) == NOTE
1109 && NOTE_LINE_NUMBER (label) == NOTE_INSN_LOOP_BEG)
1110 nest++;
1111 else if (GET_CODE (label) == NOTE
1112 && NOTE_LINE_NUMBER (label) == NOTE_INSN_LOOP_END
1113 && --nest == 0)
1114 break;
1115 else if (GET_CODE (label) == CODE_LABEL)
1116 {
1117 log = LOOP_ALIGN (label);
1118 if (max_log < log)
1119 {
1120 max_log = log;
1121 max_skip = LOOP_ALIGN_MAX_SKIP;
1122 }
1123 break;
1124 }
1125 }
1126 }
1127 else
1128 continue;
1129 }
1130 #ifdef HAVE_ATTR_length
1131
1132 /* Allocate the rest of the arrays. */
1133 insn_lengths = (short *) xmalloc (max_uid * sizeof (short));
1134 insn_lengths_max_uid = max_uid;
1135 /* Syntax errors can lead to labels being outside of the main insn stream.
1136 Initialize insn_addresses, so that we get reproducible results. */
1137 insn_addresses = (int *) xcalloc (max_uid, sizeof (int));
1138
1139 varying_length = (char *) xcalloc (max_uid, sizeof (char));
1140
1141 /* Initialize uid_align. We scan instructions
1142 from end to start, and keep in align_tab[n] the last seen insn
1143 that does an alignment of at least n+1, i.e. the successor
1144 in the alignment chain for an insn that does / has a known
1145 alignment of n. */
1146 uid_align = (rtx *) xcalloc (max_uid, sizeof *uid_align);
1147
1148 for (i = MAX_CODE_ALIGN; --i >= 0; )
1149 align_tab[i] = NULL_RTX;
1150 seq = get_last_insn ();
1151 for (; seq; seq = PREV_INSN (seq))
1152 {
1153 int uid = INSN_UID (seq);
1154 int log;
1155 log = (GET_CODE (seq) == CODE_LABEL ? LABEL_TO_ALIGNMENT (seq) : 0);
1156 uid_align[uid] = align_tab[0];
1157 if (log)
1158 {
1159 /* Found an alignment label. */
1160 uid_align[uid] = align_tab[log];
1161 for (i = log - 1; i >= 0; i--)
1162 align_tab[i] = seq;
1163 }
1164 }
1165 #ifdef CASE_VECTOR_SHORTEN_MODE
1166 if (optimize)
1167 {
1168 /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum
1169 label fields. */
1170
1171 int min_shuid = INSN_SHUID (get_insns ()) - 1;
1172 int max_shuid = INSN_SHUID (get_last_insn ()) + 1;
1173 int rel;
1174
1175 for (insn = first; insn != 0; insn = NEXT_INSN (insn))
1176 {
1177 rtx min_lab = NULL_RTX, max_lab = NULL_RTX, pat;
1178 int len, i, min, max, insn_shuid;
1179 int min_align;
1180 addr_diff_vec_flags flags;
1181
1182 if (GET_CODE (insn) != JUMP_INSN
1183 || GET_CODE (PATTERN (insn)) != ADDR_DIFF_VEC)
1184 continue;
1185 pat = PATTERN (insn);
1186 len = XVECLEN (pat, 1);
1187 if (len <= 0)
1188 abort ();
1189 min_align = MAX_CODE_ALIGN;
1190 for (min = max_shuid, max = min_shuid, i = len - 1; i >= 0; i--)
1191 {
1192 rtx lab = XEXP (XVECEXP (pat, 1, i), 0);
1193 int shuid = INSN_SHUID (lab);
1194 if (shuid < min)
1195 {
1196 min = shuid;
1197 min_lab = lab;
1198 }
1199 if (shuid > max)
1200 {
1201 max = shuid;
1202 max_lab = lab;
1203 }
1204 if (min_align > LABEL_TO_ALIGNMENT (lab))
1205 min_align = LABEL_TO_ALIGNMENT (lab);
1206 }
1207 XEXP (pat, 2) = gen_rtx_LABEL_REF (VOIDmode, min_lab);
1208 XEXP (pat, 3) = gen_rtx_LABEL_REF (VOIDmode, max_lab);
1209 insn_shuid = INSN_SHUID (insn);
1210 rel = INSN_SHUID (XEXP (XEXP (pat, 0), 0));
1211 flags.min_align = min_align;
1212 flags.base_after_vec = rel > insn_shuid;
1213 flags.min_after_vec = min > insn_shuid;
1214 flags.max_after_vec = max > insn_shuid;
1215 flags.min_after_base = min > rel;
1216 flags.max_after_base = max > rel;
1217 ADDR_DIFF_VEC_FLAGS (pat) = flags;
1218 }
1219 }
1220 #endif /* CASE_VECTOR_SHORTEN_MODE */
1221
1222
1223 /* Compute initial lengths, addresses, and varying flags for each insn. */
1224 for (insn_current_address = FIRST_INSN_ADDRESS, insn = first;
1225 insn != 0;
1226 insn_current_address += insn_lengths[uid], insn = NEXT_INSN (insn))
1227 {
1228 uid = INSN_UID (insn);
1229
1230 insn_lengths[uid] = 0;
1231
1232 if (GET_CODE (insn) == CODE_LABEL)
1233 {
1234 int log = LABEL_TO_ALIGNMENT (insn);
1235 if (log)
1236 {
1237 int align = 1 << log;
1238 int new_address = (insn_current_address + align - 1) & -align;
1239 insn_lengths[uid] = new_address - insn_current_address;
1240 insn_current_address = new_address;
1241 }
1242 }
1243
1244 insn_addresses[uid] = insn_current_address;
1245
1246 if (GET_CODE (insn) == NOTE || GET_CODE (insn) == BARRIER
1247 || GET_CODE (insn) == CODE_LABEL)
1248 continue;
1249 if (INSN_DELETED_P (insn))
1250 continue;
1251
1252 body = PATTERN (insn);
1253 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
1254 {
1255 /* This only takes room if read-only data goes into the text
1256 section. */
1257 if (JUMP_TABLES_IN_TEXT_SECTION
1258 #if !defined(READONLY_DATA_SECTION)
1259 || 1
1260 #endif
1261 )
1262 insn_lengths[uid] = (XVECLEN (body,
1263 GET_CODE (body) == ADDR_DIFF_VEC)
1264 * GET_MODE_SIZE (GET_MODE (body)));
1265 /* Alignment is handled by ADDR_VEC_ALIGN. */
1266 }
1267 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
1268 insn_lengths[uid] = asm_insn_count (body) * insn_default_length (insn);
1269 else if (GET_CODE (body) == SEQUENCE)
1270 {
1271 int i;
1272 int const_delay_slots;
1273 #ifdef DELAY_SLOTS
1274 const_delay_slots = const_num_delay_slots (XVECEXP (body, 0, 0));
1275 #else
1276 const_delay_slots = 0;
1277 #endif
1278 /* Inside a delay slot sequence, we do not do any branch shortening
1279 if the shortening could change the number of delay slots
1280 of the branch. */
1281 for (i = 0; i < XVECLEN (body, 0); i++)
1282 {
1283 rtx inner_insn = XVECEXP (body, 0, i);
1284 int inner_uid = INSN_UID (inner_insn);
1285 int inner_length;
1286
1287 if (GET_CODE (body) == ASM_INPUT
1288 || asm_noperands (PATTERN (XVECEXP (body, 0, i))) >= 0)
1289 inner_length = (asm_insn_count (PATTERN (inner_insn))
1290 * insn_default_length (inner_insn));
1291 else
1292 inner_length = insn_default_length (inner_insn);
1293
1294 insn_lengths[inner_uid] = inner_length;
1295 if (const_delay_slots)
1296 {
1297 if ((varying_length[inner_uid]
1298 = insn_variable_length_p (inner_insn)) != 0)
1299 varying_length[uid] = 1;
1300 insn_addresses[inner_uid] = (insn_current_address +
1301 insn_lengths[uid]);
1302 }
1303 else
1304 varying_length[inner_uid] = 0;
1305 insn_lengths[uid] += inner_length;
1306 }
1307 }
1308 else if (GET_CODE (body) != USE && GET_CODE (body) != CLOBBER)
1309 {
1310 insn_lengths[uid] = insn_default_length (insn);
1311 varying_length[uid] = insn_variable_length_p (insn);
1312 }
1313
1314 /* If needed, do any adjustment. */
1315 #ifdef ADJUST_INSN_LENGTH
1316 ADJUST_INSN_LENGTH (insn, insn_lengths[uid]);
1317 if (insn_lengths[uid] < 0)
1318 fatal_insn ("Negative insn length", insn);
1319 #endif
1320 }
1321
1322 /* Now loop over all the insns finding varying length insns. For each,
1323 get the current insn length. If it has changed, reflect the change.
1324 When nothing changes for a full pass, we are done. */
1325
1326 while (something_changed)
1327 {
1328 something_changed = 0;
1329 insn_current_align = MAX_CODE_ALIGN - 1;
1330 for (insn_current_address = FIRST_INSN_ADDRESS, insn = first;
1331 insn != 0;
1332 insn = NEXT_INSN (insn))
1333 {
1334 int new_length;
1335 #ifdef ADJUST_INSN_LENGTH
1336 int tmp_length;
1337 #endif
1338 int length_align;
1339
1340 uid = INSN_UID (insn);
1341
1342 if (GET_CODE (insn) == CODE_LABEL)
1343 {
1344 int log = LABEL_TO_ALIGNMENT (insn);
1345 if (log > insn_current_align)
1346 {
1347 int align = 1 << log;
1348 int new_address= (insn_current_address + align - 1) & -align;
1349 insn_lengths[uid] = new_address - insn_current_address;
1350 insn_current_align = log;
1351 insn_current_address = new_address;
1352 }
1353 else
1354 insn_lengths[uid] = 0;
1355 insn_addresses[uid] = insn_current_address;
1356 continue;
1357 }
1358
1359 length_align = INSN_LENGTH_ALIGNMENT (insn);
1360 if (length_align < insn_current_align)
1361 insn_current_align = length_align;
1362
1363 insn_last_address = insn_addresses[uid];
1364 insn_addresses[uid] = insn_current_address;
1365
1366 #ifdef CASE_VECTOR_SHORTEN_MODE
1367 if (optimize && GET_CODE (insn) == JUMP_INSN
1368 && GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
1369 {
1370 rtx body = PATTERN (insn);
1371 int old_length = insn_lengths[uid];
1372 rtx rel_lab = XEXP (XEXP (body, 0), 0);
1373 rtx min_lab = XEXP (XEXP (body, 2), 0);
1374 rtx max_lab = XEXP (XEXP (body, 3), 0);
1375 addr_diff_vec_flags flags = ADDR_DIFF_VEC_FLAGS (body);
1376 int rel_addr = insn_addresses[INSN_UID (rel_lab)];
1377 int min_addr = insn_addresses[INSN_UID (min_lab)];
1378 int max_addr = insn_addresses[INSN_UID (max_lab)];
1379 rtx prev;
1380 int rel_align = 0;
1381
1382 /* Try to find a known alignment for rel_lab. */
1383 for (prev = rel_lab;
1384 prev
1385 && ! insn_lengths[INSN_UID (prev)]
1386 && ! (varying_length[INSN_UID (prev)] & 1);
1387 prev = PREV_INSN (prev))
1388 if (varying_length[INSN_UID (prev)] & 2)
1389 {
1390 rel_align = LABEL_TO_ALIGNMENT (prev);
1391 break;
1392 }
1393
1394 /* See the comment on addr_diff_vec_flags in rtl.h for the
1395 meaning of the flags values. base: REL_LAB vec: INSN */
1396 /* Anything after INSN has still addresses from the last
1397 pass; adjust these so that they reflect our current
1398 estimate for this pass. */
1399 if (flags.base_after_vec)
1400 rel_addr += insn_current_address - insn_last_address;
1401 if (flags.min_after_vec)
1402 min_addr += insn_current_address - insn_last_address;
1403 if (flags.max_after_vec)
1404 max_addr += insn_current_address - insn_last_address;
1405 /* We want to know the worst case, i.e. lowest possible value
1406 for the offset of MIN_LAB. If MIN_LAB is after REL_LAB,
1407 its offset is positive, and we have to be wary of code shrink;
1408 otherwise, it is negative, and we have to be vary of code
1409 size increase. */
1410 if (flags.min_after_base)
1411 {
1412 /* If INSN is between REL_LAB and MIN_LAB, the size
1413 changes we are about to make can change the alignment
1414 within the observed offset, therefore we have to break
1415 it up into two parts that are independent. */
1416 if (! flags.base_after_vec && flags.min_after_vec)
1417 {
1418 min_addr -= align_fuzz (rel_lab, insn, rel_align, 0);
1419 min_addr -= align_fuzz (insn, min_lab, 0, 0);
1420 }
1421 else
1422 min_addr -= align_fuzz (rel_lab, min_lab, rel_align, 0);
1423 }
1424 else
1425 {
1426 if (flags.base_after_vec && ! flags.min_after_vec)
1427 {
1428 min_addr -= align_fuzz (min_lab, insn, 0, ~0);
1429 min_addr -= align_fuzz (insn, rel_lab, 0, ~0);
1430 }
1431 else
1432 min_addr -= align_fuzz (min_lab, rel_lab, 0, ~0);
1433 }
1434 /* Likewise, determine the highest lowest possible value
1435 for the offset of MAX_LAB. */
1436 if (flags.max_after_base)
1437 {
1438 if (! flags.base_after_vec && flags.max_after_vec)
1439 {
1440 max_addr += align_fuzz (rel_lab, insn, rel_align, ~0);
1441 max_addr += align_fuzz (insn, max_lab, 0, ~0);
1442 }
1443 else
1444 max_addr += align_fuzz (rel_lab, max_lab, rel_align, ~0);
1445 }
1446 else
1447 {
1448 if (flags.base_after_vec && ! flags.max_after_vec)
1449 {
1450 max_addr += align_fuzz (max_lab, insn, 0, 0);
1451 max_addr += align_fuzz (insn, rel_lab, 0, 0);
1452 }
1453 else
1454 max_addr += align_fuzz (max_lab, rel_lab, 0, 0);
1455 }
1456 PUT_MODE (body, CASE_VECTOR_SHORTEN_MODE (min_addr - rel_addr,
1457 max_addr - rel_addr,
1458 body));
1459 if (JUMP_TABLES_IN_TEXT_SECTION
1460 #if !defined(READONLY_DATA_SECTION)
1461 || 1
1462 #endif
1463 )
1464 {
1465 insn_lengths[uid]
1466 = (XVECLEN (body, 1) * GET_MODE_SIZE (GET_MODE (body)));
1467 insn_current_address += insn_lengths[uid];
1468 if (insn_lengths[uid] != old_length)
1469 something_changed = 1;
1470 }
1471
1472 continue;
1473 }
1474 #endif /* CASE_VECTOR_SHORTEN_MODE */
1475
1476 if (! (varying_length[uid]))
1477 {
1478 insn_current_address += insn_lengths[uid];
1479 continue;
1480 }
1481 if (GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
1482 {
1483 int i;
1484
1485 body = PATTERN (insn);
1486 new_length = 0;
1487 for (i = 0; i < XVECLEN (body, 0); i++)
1488 {
1489 rtx inner_insn = XVECEXP (body, 0, i);
1490 int inner_uid = INSN_UID (inner_insn);
1491 int inner_length;
1492
1493 insn_addresses[inner_uid] = insn_current_address;
1494
1495 /* insn_current_length returns 0 for insns with a
1496 non-varying length. */
1497 if (! varying_length[inner_uid])
1498 inner_length = insn_lengths[inner_uid];
1499 else
1500 inner_length = insn_current_length (inner_insn);
1501
1502 if (inner_length != insn_lengths[inner_uid])
1503 {
1504 insn_lengths[inner_uid] = inner_length;
1505 something_changed = 1;
1506 }
1507 insn_current_address += insn_lengths[inner_uid];
1508 new_length += inner_length;
1509 }
1510 }
1511 else
1512 {
1513 new_length = insn_current_length (insn);
1514 insn_current_address += new_length;
1515 }
1516
1517 #ifdef ADJUST_INSN_LENGTH
1518 /* If needed, do any adjustment. */
1519 tmp_length = new_length;
1520 ADJUST_INSN_LENGTH (insn, new_length);
1521 insn_current_address += (new_length - tmp_length);
1522 #endif
1523
1524 if (new_length != insn_lengths[uid])
1525 {
1526 insn_lengths[uid] = new_length;
1527 something_changed = 1;
1528 }
1529 }
1530 /* For a non-optimizing compile, do only a single pass. */
1531 if (!optimize)
1532 break;
1533 }
1534
1535 free (varying_length);
1536
1537 #endif /* HAVE_ATTR_length */
1538 }
1539
1540 #ifdef HAVE_ATTR_length
1541 /* Given the body of an INSN known to be generated by an ASM statement, return
1542 the number of machine instructions likely to be generated for this insn.
1543 This is used to compute its length. */
1544
1545 static int
1546 asm_insn_count (body)
1547 rtx body;
1548 {
1549 const char *template;
1550 int count = 1;
1551
1552 if (GET_CODE (body) == ASM_INPUT)
1553 template = XSTR (body, 0);
1554 else
1555 template = decode_asm_operands (body, NULL_PTR, NULL_PTR,
1556 NULL_PTR, NULL_PTR);
1557
1558 for ( ; *template; template++)
1559 if (IS_ASM_LOGICAL_LINE_SEPARATOR(*template) || *template == '\n')
1560 count++;
1561
1562 return count;
1563 }
1564 #endif
1565 \f
1566 /* Output assembler code for the start of a function,
1567 and initialize some of the variables in this file
1568 for the new function. The label for the function and associated
1569 assembler pseudo-ops have already been output in `assemble_start_function'.
1570
1571 FIRST is the first insn of the rtl for the function being compiled.
1572 FILE is the file to write assembler code to.
1573 OPTIMIZE is nonzero if we should eliminate redundant
1574 test and compare insns. */
1575
1576 void
1577 final_start_function (first, file, optimize)
1578 rtx first;
1579 FILE *file;
1580 int optimize ATTRIBUTE_UNUSED;
1581 {
1582 block_depth = 0;
1583
1584 this_is_asm_operands = 0;
1585
1586 #ifdef NON_SAVING_SETJMP
1587 /* A function that calls setjmp should save and restore all the
1588 call-saved registers on a system where longjmp clobbers them. */
1589 if (NON_SAVING_SETJMP && current_function_calls_setjmp)
1590 {
1591 int i;
1592
1593 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1594 if (!call_used_regs[i])
1595 regs_ever_live[i] = 1;
1596 }
1597 #endif
1598
1599 /* Initial line number is supposed to be output
1600 before the function's prologue and label
1601 so that the function's address will not appear to be
1602 in the last statement of the preceding function. */
1603 if (NOTE_LINE_NUMBER (first) != NOTE_INSN_DELETED)
1604 last_linenum = high_block_linenum = high_function_linenum
1605 = NOTE_LINE_NUMBER (first);
1606
1607 #if defined (DWARF2_UNWIND_INFO) || defined (DWARF2_DEBUGGING_INFO)
1608 /* Output DWARF definition of the function. */
1609 if (dwarf2out_do_frame ())
1610 dwarf2out_begin_prologue ();
1611 else
1612 current_function_func_begin_label = 0;
1613 #endif
1614
1615 /* For SDB and XCOFF, the function beginning must be marked between
1616 the function label and the prologue. We always need this, even when
1617 -g1 was used. Defer on MIPS systems so that parameter descriptions
1618 follow function entry. */
1619 #if defined(SDB_DEBUGGING_INFO) && !defined(MIPS_DEBUGGING_INFO)
1620 if (write_symbols == SDB_DEBUG)
1621 sdbout_begin_function (last_linenum);
1622 else
1623 #endif
1624 #ifdef XCOFF_DEBUGGING_INFO
1625 if (write_symbols == XCOFF_DEBUG)
1626 xcoffout_begin_function (file, last_linenum);
1627 else
1628 #endif
1629 /* But only output line number for other debug info types if -g2
1630 or better. */
1631 if (NOTE_LINE_NUMBER (first) != NOTE_INSN_DELETED)
1632 output_source_line (file, first);
1633
1634 #ifdef LEAF_REG_REMAP
1635 if (current_function_uses_only_leaf_regs)
1636 leaf_renumber_regs (first);
1637 #endif
1638
1639 /* The Sun386i and perhaps other machines don't work right
1640 if the profiling code comes after the prologue. */
1641 #ifdef PROFILE_BEFORE_PROLOGUE
1642 if (profile_flag)
1643 profile_function (file);
1644 #endif /* PROFILE_BEFORE_PROLOGUE */
1645
1646 #if defined (DWARF2_UNWIND_INFO) && defined (HAVE_prologue)
1647 if (dwarf2out_do_frame ())
1648 dwarf2out_frame_debug (NULL_RTX);
1649 #endif
1650
1651 /* If debugging, assign block numbers to all of the blocks in this
1652 function. */
1653 if (write_symbols)
1654 {
1655 number_blocks (current_function_decl);
1656 remove_unnecessary_notes ();
1657 /* We never actually put out begin/end notes for the top-level
1658 block in the function. But, conceptually, that block is
1659 always needed. */
1660 TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl)) = 1;
1661 }
1662
1663 #ifdef FUNCTION_PROLOGUE
1664 /* First output the function prologue: code to set up the stack frame. */
1665 FUNCTION_PROLOGUE (file, get_frame_size ());
1666 #endif
1667
1668 /* If the machine represents the prologue as RTL, the profiling code must
1669 be emitted when NOTE_INSN_PROLOGUE_END is scanned. */
1670 #ifdef HAVE_prologue
1671 if (! HAVE_prologue)
1672 #endif
1673 profile_after_prologue (file);
1674
1675 profile_label_no++;
1676
1677 /* If we are doing basic block profiling, remember a printable version
1678 of the function name. */
1679 if (profile_block_flag)
1680 {
1681 bb_func_label_num
1682 = add_bb_string ((*decl_printable_name) (current_function_decl, 2), FALSE);
1683 }
1684 }
1685
1686 static void
1687 profile_after_prologue (file)
1688 FILE *file ATTRIBUTE_UNUSED;
1689 {
1690 #ifdef FUNCTION_BLOCK_PROFILER
1691 if (profile_block_flag)
1692 {
1693 FUNCTION_BLOCK_PROFILER (file, count_basic_blocks);
1694 }
1695 #endif /* FUNCTION_BLOCK_PROFILER */
1696
1697 #ifndef PROFILE_BEFORE_PROLOGUE
1698 if (profile_flag)
1699 profile_function (file);
1700 #endif /* not PROFILE_BEFORE_PROLOGUE */
1701 }
1702
1703 static void
1704 profile_function (file)
1705 FILE *file;
1706 {
1707 int align = MIN (BIGGEST_ALIGNMENT, LONG_TYPE_SIZE);
1708 #if defined(ASM_OUTPUT_REG_PUSH)
1709 #if defined(STRUCT_VALUE_INCOMING_REGNUM) || defined(STRUCT_VALUE_REGNUM)
1710 int sval = current_function_returns_struct;
1711 #endif
1712 #if defined(STATIC_CHAIN_INCOMING_REGNUM) || defined(STATIC_CHAIN_REGNUM)
1713 int cxt = current_function_needs_context;
1714 #endif
1715 #endif /* ASM_OUTPUT_REG_PUSH */
1716
1717 data_section ();
1718 ASM_OUTPUT_ALIGN (file, floor_log2 (align / BITS_PER_UNIT));
1719 ASM_OUTPUT_INTERNAL_LABEL (file, "LP", profile_label_no);
1720 assemble_integer (const0_rtx, LONG_TYPE_SIZE / BITS_PER_UNIT, 1);
1721
1722 function_section (current_function_decl);
1723
1724 #if defined(STRUCT_VALUE_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1725 if (sval)
1726 ASM_OUTPUT_REG_PUSH (file, STRUCT_VALUE_INCOMING_REGNUM);
1727 #else
1728 #if defined(STRUCT_VALUE_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1729 if (sval)
1730 {
1731 ASM_OUTPUT_REG_PUSH (file, STRUCT_VALUE_REGNUM);
1732 }
1733 #endif
1734 #endif
1735
1736 #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1737 if (cxt)
1738 ASM_OUTPUT_REG_PUSH (file, STATIC_CHAIN_INCOMING_REGNUM);
1739 #else
1740 #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1741 if (cxt)
1742 {
1743 ASM_OUTPUT_REG_PUSH (file, STATIC_CHAIN_REGNUM);
1744 }
1745 #endif
1746 #endif
1747
1748 FUNCTION_PROFILER (file, profile_label_no);
1749
1750 #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1751 if (cxt)
1752 ASM_OUTPUT_REG_POP (file, STATIC_CHAIN_INCOMING_REGNUM);
1753 #else
1754 #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1755 if (cxt)
1756 {
1757 ASM_OUTPUT_REG_POP (file, STATIC_CHAIN_REGNUM);
1758 }
1759 #endif
1760 #endif
1761
1762 #if defined(STRUCT_VALUE_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1763 if (sval)
1764 ASM_OUTPUT_REG_POP (file, STRUCT_VALUE_INCOMING_REGNUM);
1765 #else
1766 #if defined(STRUCT_VALUE_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1767 if (sval)
1768 {
1769 ASM_OUTPUT_REG_POP (file, STRUCT_VALUE_REGNUM);
1770 }
1771 #endif
1772 #endif
1773 }
1774
1775 /* Output assembler code for the end of a function.
1776 For clarity, args are same as those of `final_start_function'
1777 even though not all of them are needed. */
1778
1779 void
1780 final_end_function (first, file, optimize)
1781 rtx first ATTRIBUTE_UNUSED;
1782 FILE *file;
1783 int optimize ATTRIBUTE_UNUSED;
1784 {
1785 app_disable ();
1786
1787 #ifdef SDB_DEBUGGING_INFO
1788 if (write_symbols == SDB_DEBUG)
1789 sdbout_end_function (high_function_linenum);
1790 #endif
1791
1792 #ifdef DWARF_DEBUGGING_INFO
1793 if (write_symbols == DWARF_DEBUG)
1794 dwarfout_end_function ();
1795 #endif
1796
1797 #ifdef XCOFF_DEBUGGING_INFO
1798 if (write_symbols == XCOFF_DEBUG)
1799 xcoffout_end_function (file, high_function_linenum);
1800 #endif
1801
1802 #ifdef FUNCTION_EPILOGUE
1803 /* Finally, output the function epilogue:
1804 code to restore the stack frame and return to the caller. */
1805 FUNCTION_EPILOGUE (file, get_frame_size ());
1806 #endif
1807
1808 #ifdef SDB_DEBUGGING_INFO
1809 if (write_symbols == SDB_DEBUG)
1810 sdbout_end_epilogue ();
1811 #endif
1812
1813 #ifdef DWARF_DEBUGGING_INFO
1814 if (write_symbols == DWARF_DEBUG)
1815 dwarfout_end_epilogue ();
1816 #endif
1817
1818 #if defined (DWARF2_UNWIND_INFO) || defined (DWARF2_DEBUGGING_INFO)
1819 if (dwarf2out_do_frame ())
1820 dwarf2out_end_epilogue ();
1821 #endif
1822
1823 #ifdef XCOFF_DEBUGGING_INFO
1824 if (write_symbols == XCOFF_DEBUG)
1825 xcoffout_end_epilogue (file);
1826 #endif
1827
1828 bb_func_label_num = -1; /* not in function, nuke label # */
1829
1830 /* If FUNCTION_EPILOGUE is not defined, then the function body
1831 itself contains return instructions wherever needed. */
1832 }
1833 \f
1834 /* Add a block to the linked list that remembers the current line/file/function
1835 for basic block profiling. Emit the label in front of the basic block and
1836 the instructions that increment the count field. */
1837
1838 static void
1839 add_bb (file)
1840 FILE *file;
1841 {
1842 struct bb_list *ptr = (struct bb_list *) permalloc (sizeof (struct bb_list));
1843
1844 /* Add basic block to linked list. */
1845 ptr->next = 0;
1846 ptr->line_num = last_linenum;
1847 ptr->file_label_num = bb_file_label_num;
1848 ptr->func_label_num = bb_func_label_num;
1849 *bb_tail = ptr;
1850 bb_tail = &ptr->next;
1851
1852 /* Enable the table of basic-block use counts
1853 to point at the code it applies to. */
1854 ASM_OUTPUT_INTERNAL_LABEL (file, "LPB", count_basic_blocks);
1855
1856 /* Before first insn of this basic block, increment the
1857 count of times it was entered. */
1858 #ifdef BLOCK_PROFILER
1859 BLOCK_PROFILER (file, count_basic_blocks);
1860 #endif
1861 #ifdef HAVE_cc0
1862 CC_STATUS_INIT;
1863 #endif
1864
1865 new_block = 0;
1866 count_basic_blocks++;
1867 }
1868
1869 /* Add a string to be used for basic block profiling. */
1870
1871 static int
1872 add_bb_string (string, perm_p)
1873 const char *string;
1874 int perm_p;
1875 {
1876 int len;
1877 struct bb_str *ptr = 0;
1878
1879 if (!string)
1880 {
1881 string = "<unknown>";
1882 perm_p = TRUE;
1883 }
1884
1885 /* Allocate a new string if the current string isn't permanent. If
1886 the string is permanent search for the same string in other
1887 allocations. */
1888
1889 len = strlen (string) + 1;
1890 if (!perm_p)
1891 {
1892 char *p = (char *) permalloc (len);
1893 bcopy (string, p, len);
1894 string = p;
1895 }
1896 else
1897 for (ptr = sbb_head; ptr != (struct bb_str *) 0; ptr = ptr->next)
1898 if (ptr->string == string)
1899 break;
1900
1901 /* Allocate a new string block if we need to. */
1902 if (!ptr)
1903 {
1904 ptr = (struct bb_str *) permalloc (sizeof (*ptr));
1905 ptr->next = 0;
1906 ptr->length = len;
1907 ptr->label_num = sbb_label_num++;
1908 ptr->string = string;
1909 *sbb_tail = ptr;
1910 sbb_tail = &ptr->next;
1911 }
1912
1913 return ptr->label_num;
1914 }
1915
1916 \f
1917 /* Output assembler code for some insns: all or part of a function.
1918 For description of args, see `final_start_function', above.
1919
1920 PRESCAN is 1 if we are not really outputting,
1921 just scanning as if we were outputting.
1922 Prescanning deletes and rearranges insns just like ordinary output.
1923 PRESCAN is -2 if we are outputting after having prescanned.
1924 In this case, don't try to delete or rearrange insns
1925 because that has already been done.
1926 Prescanning is done only on certain machines. */
1927
1928 void
1929 final (first, file, optimize, prescan)
1930 rtx first;
1931 FILE *file;
1932 int optimize;
1933 int prescan;
1934 {
1935 register rtx insn;
1936 int max_line = 0;
1937 int max_uid = 0;
1938
1939 last_ignored_compare = 0;
1940 new_block = 1;
1941
1942 check_exception_handler_labels ();
1943
1944 /* Make a map indicating which line numbers appear in this function.
1945 When producing SDB debugging info, delete troublesome line number
1946 notes from inlined functions in other files as well as duplicate
1947 line number notes. */
1948 #ifdef SDB_DEBUGGING_INFO
1949 if (write_symbols == SDB_DEBUG)
1950 {
1951 rtx last = 0;
1952 for (insn = first; insn; insn = NEXT_INSN (insn))
1953 if (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) > 0)
1954 {
1955 if ((RTX_INTEGRATED_P (insn)
1956 && strcmp (NOTE_SOURCE_FILE (insn), main_input_filename) != 0)
1957 || (last != 0
1958 && NOTE_LINE_NUMBER (insn) == NOTE_LINE_NUMBER (last)
1959 && NOTE_SOURCE_FILE (insn) == NOTE_SOURCE_FILE (last)))
1960 {
1961 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
1962 NOTE_SOURCE_FILE (insn) = 0;
1963 continue;
1964 }
1965 last = insn;
1966 if (NOTE_LINE_NUMBER (insn) > max_line)
1967 max_line = NOTE_LINE_NUMBER (insn);
1968 }
1969 }
1970 else
1971 #endif
1972 {
1973 for (insn = first; insn; insn = NEXT_INSN (insn))
1974 if (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) > max_line)
1975 max_line = NOTE_LINE_NUMBER (insn);
1976 }
1977
1978 line_note_exists = (char *) xcalloc (max_line + 1, sizeof (char));
1979
1980 for (insn = first; insn; insn = NEXT_INSN (insn))
1981 {
1982 if (INSN_UID (insn) > max_uid) /* find largest UID */
1983 max_uid = INSN_UID (insn);
1984 if (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) > 0)
1985 line_note_exists[NOTE_LINE_NUMBER (insn)] = 1;
1986 #ifdef HAVE_cc0
1987 /* If CC tracking across branches is enabled, record the insn which
1988 jumps to each branch only reached from one place. */
1989 if (optimize && GET_CODE (insn) == JUMP_INSN)
1990 {
1991 rtx lab = JUMP_LABEL (insn);
1992 if (lab && LABEL_NUSES (lab) == 1)
1993 {
1994 LABEL_REFS (lab) = insn;
1995 }
1996 }
1997 #endif
1998 }
1999
2000 /* Initialize insn_eh_region table if eh is being used. */
2001
2002 init_insn_eh_region (first, max_uid);
2003
2004 init_recog ();
2005
2006 CC_STATUS_INIT;
2007
2008 /* Output the insns. */
2009 for (insn = NEXT_INSN (first); insn;)
2010 {
2011 #ifdef HAVE_ATTR_length
2012 insn_current_address = insn_addresses[INSN_UID (insn)];
2013 #endif
2014 insn = final_scan_insn (insn, file, optimize, prescan, 0);
2015 }
2016
2017 /* Do basic-block profiling here
2018 if the last insn was a conditional branch. */
2019 if (profile_block_flag && new_block)
2020 add_bb (file);
2021
2022 free_insn_eh_region ();
2023 free (line_note_exists);
2024 line_note_exists = NULL;
2025 }
2026 \f
2027 const char *
2028 get_insn_template (code, insn)
2029 int code;
2030 rtx insn;
2031 {
2032 const void *output = insn_data[code].output;
2033 switch (insn_data[code].output_format)
2034 {
2035 case INSN_OUTPUT_FORMAT_SINGLE:
2036 return (const char *) output;
2037 case INSN_OUTPUT_FORMAT_MULTI:
2038 return ((const char * const *) output)[which_alternative];
2039 case INSN_OUTPUT_FORMAT_FUNCTION:
2040 if (insn == NULL)
2041 abort ();
2042 return (* (insn_output_fn) output) (recog_data.operand, insn);
2043
2044 default:
2045 abort ();
2046 }
2047 }
2048 /* The final scan for one insn, INSN.
2049 Args are same as in `final', except that INSN
2050 is the insn being scanned.
2051 Value returned is the next insn to be scanned.
2052
2053 NOPEEPHOLES is the flag to disallow peephole processing (currently
2054 used for within delayed branch sequence output). */
2055
2056 rtx
2057 final_scan_insn (insn, file, optimize, prescan, nopeepholes)
2058 rtx insn;
2059 FILE *file;
2060 int optimize ATTRIBUTE_UNUSED;
2061 int prescan;
2062 int nopeepholes ATTRIBUTE_UNUSED;
2063 {
2064 #ifdef HAVE_cc0
2065 rtx set;
2066 #endif
2067
2068 insn_counter++;
2069
2070 /* Ignore deleted insns. These can occur when we split insns (due to a
2071 template of "#") while not optimizing. */
2072 if (INSN_DELETED_P (insn))
2073 return NEXT_INSN (insn);
2074
2075 switch (GET_CODE (insn))
2076 {
2077 case NOTE:
2078 if (prescan > 0)
2079 break;
2080
2081 switch (NOTE_LINE_NUMBER (insn))
2082 {
2083 case NOTE_INSN_DELETED:
2084 case NOTE_INSN_LOOP_BEG:
2085 case NOTE_INSN_LOOP_END:
2086 case NOTE_INSN_LOOP_CONT:
2087 case NOTE_INSN_LOOP_VTOP:
2088 case NOTE_INSN_FUNCTION_END:
2089 case NOTE_INSN_SETJMP:
2090 case NOTE_INSN_REPEATED_LINE_NUMBER:
2091 case NOTE_INSN_RANGE_BEG:
2092 case NOTE_INSN_RANGE_END:
2093 case NOTE_INSN_LIVE:
2094 case NOTE_INSN_EXPECTED_VALUE:
2095 break;
2096
2097 case NOTE_INSN_BASIC_BLOCK:
2098 if (flag_debug_asm)
2099 fprintf (asm_out_file, "\t%s basic block %d\n",
2100 ASM_COMMENT_START, NOTE_BASIC_BLOCK (insn)->index);
2101 break;
2102
2103 case NOTE_INSN_EH_REGION_BEG:
2104 if (! exceptions_via_longjmp)
2105 {
2106 ASM_OUTPUT_INTERNAL_LABEL (file, "LEHB", NOTE_EH_HANDLER (insn));
2107 if (! flag_new_exceptions)
2108 add_eh_table_entry (NOTE_EH_HANDLER (insn));
2109 #ifdef ASM_OUTPUT_EH_REGION_BEG
2110 ASM_OUTPUT_EH_REGION_BEG (file, NOTE_EH_HANDLER (insn));
2111 #endif
2112 }
2113 break;
2114
2115 case NOTE_INSN_EH_REGION_END:
2116 if (! exceptions_via_longjmp)
2117 {
2118 ASM_OUTPUT_INTERNAL_LABEL (file, "LEHE", NOTE_EH_HANDLER (insn));
2119 if (flag_new_exceptions)
2120 add_eh_table_entry (NOTE_EH_HANDLER (insn));
2121 #ifdef ASM_OUTPUT_EH_REGION_END
2122 ASM_OUTPUT_EH_REGION_END (file, NOTE_EH_HANDLER (insn));
2123 #endif
2124 }
2125 break;
2126
2127 case NOTE_INSN_PROLOGUE_END:
2128 #ifdef FUNCTION_END_PROLOGUE
2129 FUNCTION_END_PROLOGUE (file);
2130 #endif
2131 profile_after_prologue (file);
2132 break;
2133
2134 case NOTE_INSN_EPILOGUE_BEG:
2135 #ifdef FUNCTION_BEGIN_EPILOGUE
2136 FUNCTION_BEGIN_EPILOGUE (file);
2137 #endif
2138 break;
2139
2140 case NOTE_INSN_FUNCTION_BEG:
2141 if (write_symbols == NO_DEBUG)
2142 break;
2143 #if defined(SDB_DEBUGGING_INFO) && defined(MIPS_DEBUGGING_INFO)
2144 /* MIPS stabs require the parameter descriptions to be after the
2145 function entry point rather than before. */
2146 if (write_symbols == SDB_DEBUG)
2147 {
2148 app_disable ();
2149 sdbout_begin_function (last_linenum);
2150 }
2151 else
2152 #endif
2153 #ifdef DWARF_DEBUGGING_INFO
2154 /* This outputs a marker where the function body starts, so it
2155 must be after the prologue. */
2156 if (write_symbols == DWARF_DEBUG)
2157 {
2158 app_disable ();
2159 dwarfout_begin_function ();
2160 }
2161 #endif
2162 break;
2163
2164 case NOTE_INSN_BLOCK_BEG:
2165 if (debug_info_level == DINFO_LEVEL_NORMAL
2166 || debug_info_level == DINFO_LEVEL_VERBOSE
2167 || write_symbols == DWARF_DEBUG
2168 || write_symbols == DWARF2_DEBUG)
2169 {
2170 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
2171
2172 app_disable ();
2173 ++block_depth;
2174 high_block_linenum = last_linenum;
2175
2176 /* Output debugging info about the symbol-block beginning. */
2177 #ifdef SDB_DEBUGGING_INFO
2178 if (write_symbols == SDB_DEBUG)
2179 sdbout_begin_block (file, last_linenum, n);
2180 #endif
2181 #ifdef XCOFF_DEBUGGING_INFO
2182 if (write_symbols == XCOFF_DEBUG)
2183 xcoffout_begin_block (file, last_linenum, n);
2184 #endif
2185 #ifdef DBX_DEBUGGING_INFO
2186 if (write_symbols == DBX_DEBUG)
2187 ASM_OUTPUT_INTERNAL_LABEL (file, "LBB", n);
2188 #endif
2189 #ifdef DWARF_DEBUGGING_INFO
2190 if (write_symbols == DWARF_DEBUG)
2191 dwarfout_begin_block (n);
2192 #endif
2193 #ifdef DWARF2_DEBUGGING_INFO
2194 if (write_symbols == DWARF2_DEBUG)
2195 dwarf2out_begin_block (n);
2196 #endif
2197
2198 /* Mark this block as output. */
2199 TREE_ASM_WRITTEN (NOTE_BLOCK (insn)) = 1;
2200 }
2201 break;
2202
2203 case NOTE_INSN_BLOCK_END:
2204 if (debug_info_level == DINFO_LEVEL_NORMAL
2205 || debug_info_level == DINFO_LEVEL_VERBOSE
2206 || write_symbols == DWARF_DEBUG
2207 || write_symbols == DWARF2_DEBUG)
2208 {
2209 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
2210
2211 app_disable ();
2212
2213 /* End of a symbol-block. */
2214 --block_depth;
2215 if (block_depth < 0)
2216 abort ();
2217
2218 #ifdef XCOFF_DEBUGGING_INFO
2219 if (write_symbols == XCOFF_DEBUG)
2220 xcoffout_end_block (file, high_block_linenum, n);
2221 #endif
2222 #ifdef DBX_DEBUGGING_INFO
2223 if (write_symbols == DBX_DEBUG)
2224 ASM_OUTPUT_INTERNAL_LABEL (file, "LBE", n);
2225 #endif
2226 #ifdef SDB_DEBUGGING_INFO
2227 if (write_symbols == SDB_DEBUG)
2228 sdbout_end_block (file, high_block_linenum, n);
2229 #endif
2230 #ifdef DWARF_DEBUGGING_INFO
2231 if (write_symbols == DWARF_DEBUG)
2232 dwarfout_end_block (n);
2233 #endif
2234 #ifdef DWARF2_DEBUGGING_INFO
2235 if (write_symbols == DWARF2_DEBUG)
2236 dwarf2out_end_block (n);
2237 #endif
2238 }
2239 break;
2240
2241 case NOTE_INSN_DELETED_LABEL:
2242 /* Emit the label. We may have deleted the CODE_LABEL because
2243 the label could be proved to be unreachable, though still
2244 referenced (in the form of having its address taken. */
2245 /* ??? Figure out how not to do this unconditionally. This
2246 interferes with bundling on LIW targets. */
2247 ASM_OUTPUT_INTERNAL_LABEL (file, "L", CODE_LABEL_NUMBER (insn));
2248
2249 if (debug_info_level == DINFO_LEVEL_NORMAL
2250 || debug_info_level == DINFO_LEVEL_VERBOSE)
2251 {
2252 #ifdef DWARF_DEBUGGING_INFO
2253 if (write_symbols == DWARF_DEBUG)
2254 dwarfout_label (insn);
2255 #endif
2256 #ifdef DWARF2_DEBUGGING_INFO
2257 if (write_symbols == DWARF2_DEBUG)
2258 dwarf2out_label (insn);
2259 #endif
2260 }
2261 break;
2262
2263 case 0:
2264 break;
2265
2266 default:
2267 if (NOTE_LINE_NUMBER (insn) <= 0)
2268 abort ();
2269
2270 /* This note is a line-number. */
2271 {
2272 register rtx note;
2273 int note_after = 0;
2274
2275 /* If there is anything real after this note, output it.
2276 If another line note follows, omit this one. */
2277 for (note = NEXT_INSN (insn); note; note = NEXT_INSN (note))
2278 {
2279 if (GET_CODE (note) != NOTE && GET_CODE (note) != CODE_LABEL)
2280 break;
2281
2282 /* These types of notes can be significant
2283 so make sure the preceding line number stays. */
2284 else if (GET_CODE (note) == NOTE
2285 && (NOTE_LINE_NUMBER (note) == NOTE_INSN_BLOCK_BEG
2286 || NOTE_LINE_NUMBER (note) == NOTE_INSN_BLOCK_END
2287 || NOTE_LINE_NUMBER (note) == NOTE_INSN_FUNCTION_BEG))
2288 break;
2289 else if (GET_CODE (note) == NOTE && NOTE_LINE_NUMBER (note) > 0)
2290 {
2291 /* Another line note follows; we can delete this note
2292 if no intervening line numbers have notes elsewhere. */
2293 int num;
2294 for (num = NOTE_LINE_NUMBER (insn) + 1;
2295 num < NOTE_LINE_NUMBER (note);
2296 num++)
2297 if (line_note_exists[num])
2298 break;
2299
2300 if (num >= NOTE_LINE_NUMBER (note))
2301 note_after = 1;
2302 break;
2303 }
2304 }
2305
2306 /* Output this line note if it is the first or the last line
2307 note in a row. */
2308 if (!note_after)
2309 output_source_line (file, insn);
2310 }
2311 break;
2312 }
2313 break;
2314
2315 case BARRIER:
2316 #if defined (DWARF2_UNWIND_INFO)
2317 /* If we push arguments, we need to check all insns for stack
2318 adjustments. */
2319 if (!ACCUMULATE_OUTGOING_ARGS && dwarf2out_do_frame ())
2320 dwarf2out_frame_debug (insn);
2321 #endif
2322 break;
2323
2324 case CODE_LABEL:
2325 /* The target port might emit labels in the output function for
2326 some insn, e.g. sh.c output_branchy_insn. */
2327 if (CODE_LABEL_NUMBER (insn) <= max_labelno)
2328 {
2329 int align = LABEL_TO_ALIGNMENT (insn);
2330 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2331 int max_skip = LABEL_TO_MAX_SKIP (insn);
2332 #endif
2333
2334 if (align && NEXT_INSN (insn))
2335 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2336 ASM_OUTPUT_MAX_SKIP_ALIGN (file, align, max_skip);
2337 #else
2338 ASM_OUTPUT_ALIGN (file, align);
2339 #endif
2340 }
2341 #ifdef HAVE_cc0
2342 CC_STATUS_INIT;
2343 /* If this label is reached from only one place, set the condition
2344 codes from the instruction just before the branch. */
2345
2346 /* Disabled because some insns set cc_status in the C output code
2347 and NOTICE_UPDATE_CC alone can set incorrect status. */
2348 if (0 /* optimize && LABEL_NUSES (insn) == 1*/)
2349 {
2350 rtx jump = LABEL_REFS (insn);
2351 rtx barrier = prev_nonnote_insn (insn);
2352 rtx prev;
2353 /* If the LABEL_REFS field of this label has been set to point
2354 at a branch, the predecessor of the branch is a regular
2355 insn, and that branch is the only way to reach this label,
2356 set the condition codes based on the branch and its
2357 predecessor. */
2358 if (barrier && GET_CODE (barrier) == BARRIER
2359 && jump && GET_CODE (jump) == JUMP_INSN
2360 && (prev = prev_nonnote_insn (jump))
2361 && GET_CODE (prev) == INSN)
2362 {
2363 NOTICE_UPDATE_CC (PATTERN (prev), prev);
2364 NOTICE_UPDATE_CC (PATTERN (jump), jump);
2365 }
2366 }
2367 #endif
2368 if (prescan > 0)
2369 break;
2370 new_block = 1;
2371
2372 #ifdef FINAL_PRESCAN_LABEL
2373 FINAL_PRESCAN_INSN (insn, NULL_PTR, 0);
2374 #endif
2375
2376 #ifdef SDB_DEBUGGING_INFO
2377 if (write_symbols == SDB_DEBUG && LABEL_NAME (insn))
2378 sdbout_label (insn);
2379 #endif
2380 #ifdef DWARF_DEBUGGING_INFO
2381 if (write_symbols == DWARF_DEBUG && LABEL_NAME (insn))
2382 dwarfout_label (insn);
2383 #endif
2384 #ifdef DWARF2_DEBUGGING_INFO
2385 if (write_symbols == DWARF2_DEBUG && LABEL_NAME (insn))
2386 dwarf2out_label (insn);
2387 #endif
2388 if (app_on)
2389 {
2390 fputs (ASM_APP_OFF, file);
2391 app_on = 0;
2392 }
2393 if (NEXT_INSN (insn) != 0
2394 && GET_CODE (NEXT_INSN (insn)) == JUMP_INSN)
2395 {
2396 rtx nextbody = PATTERN (NEXT_INSN (insn));
2397
2398 /* If this label is followed by a jump-table,
2399 make sure we put the label in the read-only section. Also
2400 possibly write the label and jump table together. */
2401
2402 if (GET_CODE (nextbody) == ADDR_VEC
2403 || GET_CODE (nextbody) == ADDR_DIFF_VEC)
2404 {
2405 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2406 /* In this case, the case vector is being moved by the
2407 target, so don't output the label at all. Leave that
2408 to the back end macros. */
2409 #else
2410 if (! JUMP_TABLES_IN_TEXT_SECTION)
2411 {
2412 readonly_data_section ();
2413 #ifdef READONLY_DATA_SECTION
2414 ASM_OUTPUT_ALIGN (file,
2415 exact_log2 (BIGGEST_ALIGNMENT
2416 / BITS_PER_UNIT));
2417 #endif /* READONLY_DATA_SECTION */
2418 }
2419 else
2420 function_section (current_function_decl);
2421
2422 #ifdef ASM_OUTPUT_CASE_LABEL
2423 ASM_OUTPUT_CASE_LABEL (file, "L", CODE_LABEL_NUMBER (insn),
2424 NEXT_INSN (insn));
2425 #else
2426 if (LABEL_ALTERNATE_NAME (insn))
2427 ASM_OUTPUT_ALTERNATE_LABEL_NAME (file, insn);
2428 else
2429 ASM_OUTPUT_INTERNAL_LABEL (file, "L", CODE_LABEL_NUMBER (insn));
2430 #endif
2431 #endif
2432 break;
2433 }
2434 }
2435 if (LABEL_ALTERNATE_NAME (insn))
2436 ASM_OUTPUT_ALTERNATE_LABEL_NAME (file, insn);
2437 else
2438 ASM_OUTPUT_INTERNAL_LABEL (file, "L", CODE_LABEL_NUMBER (insn));
2439 break;
2440
2441 default:
2442 {
2443 register rtx body = PATTERN (insn);
2444 int insn_code_number;
2445 const char *template;
2446 #ifdef HAVE_cc0
2447 rtx note;
2448 #endif
2449
2450 /* An INSN, JUMP_INSN or CALL_INSN.
2451 First check for special kinds that recog doesn't recognize. */
2452
2453 if (GET_CODE (body) == USE /* These are just declarations */
2454 || GET_CODE (body) == CLOBBER)
2455 break;
2456
2457 #ifdef HAVE_cc0
2458 /* If there is a REG_CC_SETTER note on this insn, it means that
2459 the setting of the condition code was done in the delay slot
2460 of the insn that branched here. So recover the cc status
2461 from the insn that set it. */
2462
2463 note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2464 if (note)
2465 {
2466 NOTICE_UPDATE_CC (PATTERN (XEXP (note, 0)), XEXP (note, 0));
2467 cc_prev_status = cc_status;
2468 }
2469 #endif
2470
2471 /* Detect insns that are really jump-tables
2472 and output them as such. */
2473
2474 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
2475 {
2476 #if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC))
2477 register int vlen, idx;
2478 #endif
2479
2480 if (prescan > 0)
2481 break;
2482
2483 if (app_on)
2484 {
2485 fputs (ASM_APP_OFF, file);
2486 app_on = 0;
2487 }
2488
2489 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2490 if (GET_CODE (body) == ADDR_VEC)
2491 {
2492 #ifdef ASM_OUTPUT_ADDR_VEC
2493 ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn), body);
2494 #else
2495 abort();
2496 #endif
2497 }
2498 else
2499 {
2500 #ifdef ASM_OUTPUT_ADDR_DIFF_VEC
2501 ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn), body);
2502 #else
2503 abort();
2504 #endif
2505 }
2506 #else
2507 vlen = XVECLEN (body, GET_CODE (body) == ADDR_DIFF_VEC);
2508 for (idx = 0; idx < vlen; idx++)
2509 {
2510 if (GET_CODE (body) == ADDR_VEC)
2511 {
2512 #ifdef ASM_OUTPUT_ADDR_VEC_ELT
2513 ASM_OUTPUT_ADDR_VEC_ELT
2514 (file, CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 0, idx), 0)));
2515 #else
2516 abort ();
2517 #endif
2518 }
2519 else
2520 {
2521 #ifdef ASM_OUTPUT_ADDR_DIFF_ELT
2522 ASM_OUTPUT_ADDR_DIFF_ELT
2523 (file,
2524 body,
2525 CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 1, idx), 0)),
2526 CODE_LABEL_NUMBER (XEXP (XEXP (body, 0), 0)));
2527 #else
2528 abort ();
2529 #endif
2530 }
2531 }
2532 #ifdef ASM_OUTPUT_CASE_END
2533 ASM_OUTPUT_CASE_END (file,
2534 CODE_LABEL_NUMBER (PREV_INSN (insn)),
2535 insn);
2536 #endif
2537 #endif
2538
2539 function_section (current_function_decl);
2540
2541 break;
2542 }
2543
2544 /* Do basic-block profiling when we reach a new block.
2545 Done here to avoid jump tables. */
2546 if (profile_block_flag && new_block)
2547 add_bb (file);
2548
2549 if (GET_CODE (body) == ASM_INPUT)
2550 {
2551 /* There's no telling what that did to the condition codes. */
2552 CC_STATUS_INIT;
2553 if (prescan > 0)
2554 break;
2555 if (! app_on)
2556 {
2557 fputs (ASM_APP_ON, file);
2558 app_on = 1;
2559 }
2560 fprintf (asm_out_file, "\t%s\n", XSTR (body, 0));
2561 break;
2562 }
2563
2564 /* Detect `asm' construct with operands. */
2565 if (asm_noperands (body) >= 0)
2566 {
2567 unsigned int noperands = asm_noperands (body);
2568 rtx *ops = (rtx *) alloca (noperands * sizeof (rtx));
2569 const char *string;
2570
2571 /* There's no telling what that did to the condition codes. */
2572 CC_STATUS_INIT;
2573 if (prescan > 0)
2574 break;
2575
2576 if (! app_on)
2577 {
2578 fputs (ASM_APP_ON, file);
2579 app_on = 1;
2580 }
2581
2582 /* Get out the operand values. */
2583 string = decode_asm_operands (body, ops, NULL_PTR,
2584 NULL_PTR, NULL_PTR);
2585 /* Inhibit aborts on what would otherwise be compiler bugs. */
2586 insn_noperands = noperands;
2587 this_is_asm_operands = insn;
2588
2589 /* Output the insn using them. */
2590 output_asm_insn (string, ops);
2591 this_is_asm_operands = 0;
2592 break;
2593 }
2594
2595 if (prescan <= 0 && app_on)
2596 {
2597 fputs (ASM_APP_OFF, file);
2598 app_on = 0;
2599 }
2600
2601 if (GET_CODE (body) == SEQUENCE)
2602 {
2603 /* A delayed-branch sequence */
2604 register int i;
2605 rtx next;
2606
2607 if (prescan > 0)
2608 break;
2609 final_sequence = body;
2610
2611 /* The first insn in this SEQUENCE might be a JUMP_INSN that will
2612 force the restoration of a comparison that was previously
2613 thought unnecessary. If that happens, cancel this sequence
2614 and cause that insn to be restored. */
2615
2616 next = final_scan_insn (XVECEXP (body, 0, 0), file, 0, prescan, 1);
2617 if (next != XVECEXP (body, 0, 1))
2618 {
2619 final_sequence = 0;
2620 return next;
2621 }
2622
2623 for (i = 1; i < XVECLEN (body, 0); i++)
2624 {
2625 rtx insn = XVECEXP (body, 0, i);
2626 rtx next = NEXT_INSN (insn);
2627 /* We loop in case any instruction in a delay slot gets
2628 split. */
2629 do
2630 insn = final_scan_insn (insn, file, 0, prescan, 1);
2631 while (insn != next);
2632 }
2633 #ifdef DBR_OUTPUT_SEQEND
2634 DBR_OUTPUT_SEQEND (file);
2635 #endif
2636 final_sequence = 0;
2637
2638 /* If the insn requiring the delay slot was a CALL_INSN, the
2639 insns in the delay slot are actually executed before the
2640 called function. Hence we don't preserve any CC-setting
2641 actions in these insns and the CC must be marked as being
2642 clobbered by the function. */
2643 if (GET_CODE (XVECEXP (body, 0, 0)) == CALL_INSN)
2644 {
2645 CC_STATUS_INIT;
2646 }
2647
2648 /* Following a conditional branch sequence, we have a new basic
2649 block. */
2650 if (profile_block_flag)
2651 {
2652 rtx insn = XVECEXP (body, 0, 0);
2653 rtx body = PATTERN (insn);
2654
2655 if ((GET_CODE (insn) == JUMP_INSN && GET_CODE (body) == SET
2656 && GET_CODE (SET_SRC (body)) != LABEL_REF)
2657 || (GET_CODE (insn) == JUMP_INSN
2658 && GET_CODE (body) == PARALLEL
2659 && GET_CODE (XVECEXP (body, 0, 0)) == SET
2660 && GET_CODE (SET_SRC (XVECEXP (body, 0, 0))) != LABEL_REF))
2661 new_block = 1;
2662 }
2663 break;
2664 }
2665
2666 /* We have a real machine instruction as rtl. */
2667
2668 body = PATTERN (insn);
2669
2670 #ifdef HAVE_cc0
2671 set = single_set(insn);
2672
2673 /* Check for redundant test and compare instructions
2674 (when the condition codes are already set up as desired).
2675 This is done only when optimizing; if not optimizing,
2676 it should be possible for the user to alter a variable
2677 with the debugger in between statements
2678 and the next statement should reexamine the variable
2679 to compute the condition codes. */
2680
2681 if (optimize)
2682 {
2683 #if 0
2684 rtx set = single_set(insn);
2685 #endif
2686
2687 if (set
2688 && GET_CODE (SET_DEST (set)) == CC0
2689 && insn != last_ignored_compare)
2690 {
2691 if (GET_CODE (SET_SRC (set)) == SUBREG)
2692 SET_SRC (set) = alter_subreg (SET_SRC (set));
2693 else if (GET_CODE (SET_SRC (set)) == COMPARE)
2694 {
2695 if (GET_CODE (XEXP (SET_SRC (set), 0)) == SUBREG)
2696 XEXP (SET_SRC (set), 0)
2697 = alter_subreg (XEXP (SET_SRC (set), 0));
2698 if (GET_CODE (XEXP (SET_SRC (set), 1)) == SUBREG)
2699 XEXP (SET_SRC (set), 1)
2700 = alter_subreg (XEXP (SET_SRC (set), 1));
2701 }
2702 if ((cc_status.value1 != 0
2703 && rtx_equal_p (SET_SRC (set), cc_status.value1))
2704 || (cc_status.value2 != 0
2705 && rtx_equal_p (SET_SRC (set), cc_status.value2)))
2706 {
2707 /* Don't delete insn if it has an addressing side-effect. */
2708 if (! FIND_REG_INC_NOTE (insn, 0)
2709 /* or if anything in it is volatile. */
2710 && ! volatile_refs_p (PATTERN (insn)))
2711 {
2712 /* We don't really delete the insn; just ignore it. */
2713 last_ignored_compare = insn;
2714 break;
2715 }
2716 }
2717 }
2718 }
2719 #endif
2720
2721 /* Following a conditional branch, we have a new basic block.
2722 But if we are inside a sequence, the new block starts after the
2723 last insn of the sequence. */
2724 if (profile_block_flag && final_sequence == 0
2725 && ((GET_CODE (insn) == JUMP_INSN && GET_CODE (body) == SET
2726 && GET_CODE (SET_SRC (body)) != LABEL_REF)
2727 || (GET_CODE (insn) == JUMP_INSN && GET_CODE (body) == PARALLEL
2728 && GET_CODE (XVECEXP (body, 0, 0)) == SET
2729 && GET_CODE (SET_SRC (XVECEXP (body, 0, 0))) != LABEL_REF)))
2730 new_block = 1;
2731
2732 #ifndef STACK_REGS
2733 /* Don't bother outputting obvious no-ops, even without -O.
2734 This optimization is fast and doesn't interfere with debugging.
2735 Don't do this if the insn is in a delay slot, since this
2736 will cause an improper number of delay insns to be written. */
2737 if (final_sequence == 0
2738 && prescan >= 0
2739 && GET_CODE (insn) == INSN && GET_CODE (body) == SET
2740 && GET_CODE (SET_SRC (body)) == REG
2741 && GET_CODE (SET_DEST (body)) == REG
2742 && REGNO (SET_SRC (body)) == REGNO (SET_DEST (body)))
2743 break;
2744 #endif
2745
2746 #ifdef HAVE_cc0
2747 /* If this is a conditional branch, maybe modify it
2748 if the cc's are in a nonstandard state
2749 so that it accomplishes the same thing that it would
2750 do straightforwardly if the cc's were set up normally. */
2751
2752 if (cc_status.flags != 0
2753 && GET_CODE (insn) == JUMP_INSN
2754 && GET_CODE (body) == SET
2755 && SET_DEST (body) == pc_rtx
2756 && GET_CODE (SET_SRC (body)) == IF_THEN_ELSE
2757 && GET_RTX_CLASS (GET_CODE (XEXP (SET_SRC (body), 0))) == '<'
2758 && XEXP (XEXP (SET_SRC (body), 0), 0) == cc0_rtx
2759 /* This is done during prescan; it is not done again
2760 in final scan when prescan has been done. */
2761 && prescan >= 0)
2762 {
2763 /* This function may alter the contents of its argument
2764 and clear some of the cc_status.flags bits.
2765 It may also return 1 meaning condition now always true
2766 or -1 meaning condition now always false
2767 or 2 meaning condition nontrivial but altered. */
2768 register int result = alter_cond (XEXP (SET_SRC (body), 0));
2769 /* If condition now has fixed value, replace the IF_THEN_ELSE
2770 with its then-operand or its else-operand. */
2771 if (result == 1)
2772 SET_SRC (body) = XEXP (SET_SRC (body), 1);
2773 if (result == -1)
2774 SET_SRC (body) = XEXP (SET_SRC (body), 2);
2775
2776 /* The jump is now either unconditional or a no-op.
2777 If it has become a no-op, don't try to output it.
2778 (It would not be recognized.) */
2779 if (SET_SRC (body) == pc_rtx)
2780 {
2781 PUT_CODE (insn, NOTE);
2782 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
2783 NOTE_SOURCE_FILE (insn) = 0;
2784 break;
2785 }
2786 else if (GET_CODE (SET_SRC (body)) == RETURN)
2787 /* Replace (set (pc) (return)) with (return). */
2788 PATTERN (insn) = body = SET_SRC (body);
2789
2790 /* Rerecognize the instruction if it has changed. */
2791 if (result != 0)
2792 INSN_CODE (insn) = -1;
2793 }
2794
2795 /* Make same adjustments to instructions that examine the
2796 condition codes without jumping and instructions that
2797 handle conditional moves (if this machine has either one). */
2798
2799 if (cc_status.flags != 0
2800 && set != 0)
2801 {
2802 rtx cond_rtx, then_rtx, else_rtx;
2803
2804 if (GET_CODE (insn) != JUMP_INSN
2805 && GET_CODE (SET_SRC (set)) == IF_THEN_ELSE)
2806 {
2807 cond_rtx = XEXP (SET_SRC (set), 0);
2808 then_rtx = XEXP (SET_SRC (set), 1);
2809 else_rtx = XEXP (SET_SRC (set), 2);
2810 }
2811 else
2812 {
2813 cond_rtx = SET_SRC (set);
2814 then_rtx = const_true_rtx;
2815 else_rtx = const0_rtx;
2816 }
2817
2818 switch (GET_CODE (cond_rtx))
2819 {
2820 case GTU:
2821 case GT:
2822 case LTU:
2823 case LT:
2824 case GEU:
2825 case GE:
2826 case LEU:
2827 case LE:
2828 case EQ:
2829 case NE:
2830 {
2831 register int result;
2832 if (XEXP (cond_rtx, 0) != cc0_rtx)
2833 break;
2834 result = alter_cond (cond_rtx);
2835 if (result == 1)
2836 validate_change (insn, &SET_SRC (set), then_rtx, 0);
2837 else if (result == -1)
2838 validate_change (insn, &SET_SRC (set), else_rtx, 0);
2839 else if (result == 2)
2840 INSN_CODE (insn) = -1;
2841 if (SET_DEST (set) == SET_SRC (set))
2842 {
2843 PUT_CODE (insn, NOTE);
2844 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
2845 NOTE_SOURCE_FILE (insn) = 0;
2846 }
2847 }
2848 break;
2849
2850 default:
2851 break;
2852 }
2853 }
2854
2855 #endif
2856
2857 #ifdef HAVE_peephole
2858 /* Do machine-specific peephole optimizations if desired. */
2859
2860 if (optimize && !flag_no_peephole && !nopeepholes)
2861 {
2862 rtx next = peephole (insn);
2863 /* When peepholing, if there were notes within the peephole,
2864 emit them before the peephole. */
2865 if (next != 0 && next != NEXT_INSN (insn))
2866 {
2867 rtx prev = PREV_INSN (insn);
2868 rtx note;
2869
2870 for (note = NEXT_INSN (insn); note != next;
2871 note = NEXT_INSN (note))
2872 final_scan_insn (note, file, optimize, prescan, nopeepholes);
2873
2874 /* In case this is prescan, put the notes
2875 in proper position for later rescan. */
2876 note = NEXT_INSN (insn);
2877 PREV_INSN (note) = prev;
2878 NEXT_INSN (prev) = note;
2879 NEXT_INSN (PREV_INSN (next)) = insn;
2880 PREV_INSN (insn) = PREV_INSN (next);
2881 NEXT_INSN (insn) = next;
2882 PREV_INSN (next) = insn;
2883 }
2884
2885 /* PEEPHOLE might have changed this. */
2886 body = PATTERN (insn);
2887 }
2888 #endif
2889
2890 /* Try to recognize the instruction.
2891 If successful, verify that the operands satisfy the
2892 constraints for the instruction. Crash if they don't,
2893 since `reload' should have changed them so that they do. */
2894
2895 insn_code_number = recog_memoized (insn);
2896 extract_insn (insn);
2897 cleanup_subreg_operands (insn);
2898
2899 if (! constrain_operands (1))
2900 fatal_insn_not_found (insn);
2901
2902 /* Some target machines need to prescan each insn before
2903 it is output. */
2904
2905 #ifdef FINAL_PRESCAN_INSN
2906 FINAL_PRESCAN_INSN (insn, recog_data.operand, recog_data.n_operands);
2907 #endif
2908
2909 #ifdef HAVE_conditional_execution
2910 if (GET_CODE (PATTERN (insn)) == COND_EXEC)
2911 current_insn_predicate = COND_EXEC_TEST (PATTERN (insn));
2912 else
2913 current_insn_predicate = NULL_RTX;
2914 #endif
2915
2916 #ifdef HAVE_cc0
2917 cc_prev_status = cc_status;
2918
2919 /* Update `cc_status' for this instruction.
2920 The instruction's output routine may change it further.
2921 If the output routine for a jump insn needs to depend
2922 on the cc status, it should look at cc_prev_status. */
2923
2924 NOTICE_UPDATE_CC (body, insn);
2925 #endif
2926
2927 debug_insn = insn;
2928
2929 #if defined (DWARF2_UNWIND_INFO)
2930 /* If we push arguments, we want to know where the calls are. */
2931 if (!ACCUMULATE_OUTGOING_ARGS && GET_CODE (insn) == CALL_INSN
2932 && dwarf2out_do_frame ())
2933 dwarf2out_frame_debug (insn);
2934 #endif
2935
2936 /* Find the proper template for this insn. */
2937 template = get_insn_template (insn_code_number, insn);
2938
2939 /* If the C code returns 0, it means that it is a jump insn
2940 which follows a deleted test insn, and that test insn
2941 needs to be reinserted. */
2942 if (template == 0)
2943 {
2944 if (prev_nonnote_insn (insn) != last_ignored_compare)
2945 abort ();
2946 new_block = 0;
2947 return prev_nonnote_insn (insn);
2948 }
2949
2950 /* If the template is the string "#", it means that this insn must
2951 be split. */
2952 if (template[0] == '#' && template[1] == '\0')
2953 {
2954 rtx new = try_split (body, insn, 0);
2955
2956 /* If we didn't split the insn, go away. */
2957 if (new == insn && PATTERN (new) == body)
2958 fatal_insn ("Could not split insn", insn);
2959
2960 #ifdef HAVE_ATTR_length
2961 /* This instruction should have been split in shorten_branches,
2962 to ensure that we would have valid length info for the
2963 splitees. */
2964 abort ();
2965 #endif
2966
2967 new_block = 0;
2968 return new;
2969 }
2970
2971 if (prescan > 0)
2972 break;
2973
2974 /* Output assembler code from the template. */
2975
2976 output_asm_insn (template, recog_data.operand);
2977
2978 #if defined (DWARF2_UNWIND_INFO)
2979 /* If we push arguments, we need to check all insns for stack
2980 adjustments. */
2981 if (!ACCUMULATE_OUTGOING_ARGS)
2982 {
2983 if (GET_CODE (insn) == INSN && dwarf2out_do_frame ())
2984 dwarf2out_frame_debug (insn);
2985 }
2986 else
2987 {
2988 #if defined (HAVE_prologue)
2989 /* If this insn is part of the prologue, emit DWARF v2
2990 call frame info. */
2991 if (RTX_FRAME_RELATED_P (insn) && dwarf2out_do_frame ())
2992 dwarf2out_frame_debug (insn);
2993 #endif
2994 }
2995 #endif
2996
2997 #if 0
2998 /* It's not at all clear why we did this and doing so interferes
2999 with tests we'd like to do to use REG_WAS_0 notes, so let's try
3000 with this out. */
3001
3002 /* Mark this insn as having been output. */
3003 INSN_DELETED_P (insn) = 1;
3004 #endif
3005
3006 debug_insn = 0;
3007 }
3008 }
3009 return NEXT_INSN (insn);
3010 }
3011 \f
3012 /* Output debugging info to the assembler file FILE
3013 based on the NOTE-insn INSN, assumed to be a line number. */
3014
3015 static void
3016 output_source_line (file, insn)
3017 FILE *file ATTRIBUTE_UNUSED;
3018 rtx insn;
3019 {
3020 register const char *filename = NOTE_SOURCE_FILE (insn);
3021
3022 /* Remember filename for basic block profiling.
3023 Filenames are allocated on the permanent obstack
3024 or are passed in ARGV, so we don't have to save
3025 the string. */
3026
3027 if (profile_block_flag && last_filename != filename)
3028 bb_file_label_num = add_bb_string (filename, TRUE);
3029
3030 last_filename = filename;
3031 last_linenum = NOTE_LINE_NUMBER (insn);
3032 high_block_linenum = MAX (last_linenum, high_block_linenum);
3033 high_function_linenum = MAX (last_linenum, high_function_linenum);
3034
3035 if (write_symbols != NO_DEBUG)
3036 {
3037 #ifdef SDB_DEBUGGING_INFO
3038 if (write_symbols == SDB_DEBUG
3039 #if 0 /* People like having line numbers even in wrong file! */
3040 /* COFF can't handle multiple source files--lose, lose. */
3041 && !strcmp (filename, main_input_filename)
3042 #endif
3043 /* COFF relative line numbers must be positive. */
3044 && last_linenum > sdb_begin_function_line)
3045 {
3046 #ifdef ASM_OUTPUT_SOURCE_LINE
3047 ASM_OUTPUT_SOURCE_LINE (file, last_linenum);
3048 #else
3049 fprintf (file, "\t.ln\t%d\n",
3050 ((sdb_begin_function_line > -1)
3051 ? last_linenum - sdb_begin_function_line : 1));
3052 #endif
3053 }
3054 #endif
3055
3056 #if defined (DBX_DEBUGGING_INFO)
3057 if (write_symbols == DBX_DEBUG)
3058 dbxout_source_line (file, filename, NOTE_LINE_NUMBER (insn));
3059 #endif
3060
3061 #if defined (XCOFF_DEBUGGING_INFO)
3062 if (write_symbols == XCOFF_DEBUG)
3063 xcoffout_source_line (file, filename, insn);
3064 #endif
3065
3066 #ifdef DWARF_DEBUGGING_INFO
3067 if (write_symbols == DWARF_DEBUG)
3068 dwarfout_line (filename, NOTE_LINE_NUMBER (insn));
3069 #endif
3070
3071 #ifdef DWARF2_DEBUGGING_INFO
3072 if (write_symbols == DWARF2_DEBUG)
3073 dwarf2out_line (filename, NOTE_LINE_NUMBER (insn));
3074 #endif
3075 }
3076 }
3077 \f
3078
3079 /* For each operand in INSN, simplify (subreg (reg)) so that it refers
3080 directly to the desired hard register. */
3081 void
3082 cleanup_subreg_operands (insn)
3083 rtx insn;
3084 {
3085 int i;
3086
3087 extract_insn (insn);
3088 for (i = 0; i < recog_data.n_operands; i++)
3089 {
3090 if (GET_CODE (recog_data.operand[i]) == SUBREG)
3091 recog_data.operand[i] = alter_subreg (recog_data.operand[i]);
3092 else if (GET_CODE (recog_data.operand[i]) == PLUS
3093 || GET_CODE (recog_data.operand[i]) == MULT)
3094 recog_data.operand[i] = walk_alter_subreg (recog_data.operand[i]);
3095 }
3096
3097 for (i = 0; i < recog_data.n_dups; i++)
3098 {
3099 if (GET_CODE (*recog_data.dup_loc[i]) == SUBREG)
3100 *recog_data.dup_loc[i] = alter_subreg (*recog_data.dup_loc[i]);
3101 else if (GET_CODE (*recog_data.dup_loc[i]) == PLUS
3102 || GET_CODE (*recog_data.dup_loc[i]) == MULT)
3103 *recog_data.dup_loc[i] = walk_alter_subreg (*recog_data.dup_loc[i]);
3104 }
3105 }
3106
3107 /* If X is a SUBREG, replace it with a REG or a MEM,
3108 based on the thing it is a subreg of. */
3109
3110 rtx
3111 alter_subreg (x)
3112 register rtx x;
3113 {
3114 register rtx y = SUBREG_REG (x);
3115
3116 if (GET_CODE (y) == SUBREG)
3117 y = alter_subreg (y);
3118
3119 /* If reload is operating, we may be replacing inside this SUBREG.
3120 Check for that and make a new one if so. */
3121 if (reload_in_progress && find_replacement (&SUBREG_REG (x)) != 0)
3122 x = copy_rtx (x);
3123
3124 if (GET_CODE (y) == REG)
3125 {
3126 int regno;
3127 /* If the word size is larger than the size of this register,
3128 adjust the register number to compensate. */
3129 /* ??? Note that this just catches stragglers created by/for
3130 integrate. It would be better if we either caught these
3131 earlier, or kept _all_ subregs until now and eliminate
3132 gen_lowpart and friends. */
3133
3134 #ifdef ALTER_HARD_SUBREG
3135 regno = ALTER_HARD_SUBREG(GET_MODE (x), SUBREG_WORD (x),
3136 GET_MODE (y), REGNO (y));
3137 #else
3138 regno = REGNO (y) + SUBREG_WORD (x);
3139 #endif
3140 PUT_CODE (x, REG);
3141 REGNO (x) = regno;
3142 /* This field has a different meaning for REGs and SUBREGs. Make sure
3143 to clear it! */
3144 x->used = 0;
3145 }
3146 else if (GET_CODE (y) == MEM)
3147 {
3148 register int offset = SUBREG_WORD (x) * UNITS_PER_WORD;
3149
3150 if (BYTES_BIG_ENDIAN)
3151 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x)))
3152 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (y))));
3153 PUT_CODE (x, MEM);
3154 MEM_COPY_ATTRIBUTES (x, y);
3155 XEXP (x, 0) = plus_constant (XEXP (y, 0), offset);
3156 }
3157
3158 return x;
3159 }
3160
3161 /* Do alter_subreg on all the SUBREGs contained in X. */
3162
3163 static rtx
3164 walk_alter_subreg (x)
3165 rtx x;
3166 {
3167 switch (GET_CODE (x))
3168 {
3169 case PLUS:
3170 case MULT:
3171 XEXP (x, 0) = walk_alter_subreg (XEXP (x, 0));
3172 XEXP (x, 1) = walk_alter_subreg (XEXP (x, 1));
3173 break;
3174
3175 case MEM:
3176 XEXP (x, 0) = walk_alter_subreg (XEXP (x, 0));
3177 break;
3178
3179 case SUBREG:
3180 return alter_subreg (x);
3181
3182 default:
3183 break;
3184 }
3185
3186 return x;
3187 }
3188 \f
3189 #ifdef HAVE_cc0
3190
3191 /* Given BODY, the body of a jump instruction, alter the jump condition
3192 as required by the bits that are set in cc_status.flags.
3193 Not all of the bits there can be handled at this level in all cases.
3194
3195 The value is normally 0.
3196 1 means that the condition has become always true.
3197 -1 means that the condition has become always false.
3198 2 means that COND has been altered. */
3199
3200 static int
3201 alter_cond (cond)
3202 register rtx cond;
3203 {
3204 int value = 0;
3205
3206 if (cc_status.flags & CC_REVERSED)
3207 {
3208 value = 2;
3209 PUT_CODE (cond, swap_condition (GET_CODE (cond)));
3210 }
3211
3212 if (cc_status.flags & CC_INVERTED)
3213 {
3214 value = 2;
3215 PUT_CODE (cond, reverse_condition (GET_CODE (cond)));
3216 }
3217
3218 if (cc_status.flags & CC_NOT_POSITIVE)
3219 switch (GET_CODE (cond))
3220 {
3221 case LE:
3222 case LEU:
3223 case GEU:
3224 /* Jump becomes unconditional. */
3225 return 1;
3226
3227 case GT:
3228 case GTU:
3229 case LTU:
3230 /* Jump becomes no-op. */
3231 return -1;
3232
3233 case GE:
3234 PUT_CODE (cond, EQ);
3235 value = 2;
3236 break;
3237
3238 case LT:
3239 PUT_CODE (cond, NE);
3240 value = 2;
3241 break;
3242
3243 default:
3244 break;
3245 }
3246
3247 if (cc_status.flags & CC_NOT_NEGATIVE)
3248 switch (GET_CODE (cond))
3249 {
3250 case GE:
3251 case GEU:
3252 /* Jump becomes unconditional. */
3253 return 1;
3254
3255 case LT:
3256 case LTU:
3257 /* Jump becomes no-op. */
3258 return -1;
3259
3260 case LE:
3261 case LEU:
3262 PUT_CODE (cond, EQ);
3263 value = 2;
3264 break;
3265
3266 case GT:
3267 case GTU:
3268 PUT_CODE (cond, NE);
3269 value = 2;
3270 break;
3271
3272 default:
3273 break;
3274 }
3275
3276 if (cc_status.flags & CC_NO_OVERFLOW)
3277 switch (GET_CODE (cond))
3278 {
3279 case GEU:
3280 /* Jump becomes unconditional. */
3281 return 1;
3282
3283 case LEU:
3284 PUT_CODE (cond, EQ);
3285 value = 2;
3286 break;
3287
3288 case GTU:
3289 PUT_CODE (cond, NE);
3290 value = 2;
3291 break;
3292
3293 case LTU:
3294 /* Jump becomes no-op. */
3295 return -1;
3296
3297 default:
3298 break;
3299 }
3300
3301 if (cc_status.flags & (CC_Z_IN_NOT_N | CC_Z_IN_N))
3302 switch (GET_CODE (cond))
3303 {
3304 default:
3305 abort ();
3306
3307 case NE:
3308 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? GE : LT);
3309 value = 2;
3310 break;
3311
3312 case EQ:
3313 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? LT : GE);
3314 value = 2;
3315 break;
3316 }
3317
3318 if (cc_status.flags & CC_NOT_SIGNED)
3319 /* The flags are valid if signed condition operators are converted
3320 to unsigned. */
3321 switch (GET_CODE (cond))
3322 {
3323 case LE:
3324 PUT_CODE (cond, LEU);
3325 value = 2;
3326 break;
3327
3328 case LT:
3329 PUT_CODE (cond, LTU);
3330 value = 2;
3331 break;
3332
3333 case GT:
3334 PUT_CODE (cond, GTU);
3335 value = 2;
3336 break;
3337
3338 case GE:
3339 PUT_CODE (cond, GEU);
3340 value = 2;
3341 break;
3342
3343 default:
3344 break;
3345 }
3346
3347 return value;
3348 }
3349 #endif
3350 \f
3351 /* Report inconsistency between the assembler template and the operands.
3352 In an `asm', it's the user's fault; otherwise, the compiler's fault. */
3353
3354 void
3355 output_operand_lossage (msgid)
3356 const char *msgid;
3357 {
3358 if (this_is_asm_operands)
3359 error_for_asm (this_is_asm_operands, "invalid `asm': %s", _(msgid));
3360 else
3361 {
3362 error ("output_operand: %s", _(msgid));
3363 abort ();
3364 }
3365 }
3366 \f
3367 /* Output of assembler code from a template, and its subroutines. */
3368
3369 /* Output text from TEMPLATE to the assembler output file,
3370 obeying %-directions to substitute operands taken from
3371 the vector OPERANDS.
3372
3373 %N (for N a digit) means print operand N in usual manner.
3374 %lN means require operand N to be a CODE_LABEL or LABEL_REF
3375 and print the label name with no punctuation.
3376 %cN means require operand N to be a constant
3377 and print the constant expression with no punctuation.
3378 %aN means expect operand N to be a memory address
3379 (not a memory reference!) and print a reference
3380 to that address.
3381 %nN means expect operand N to be a constant
3382 and print a constant expression for minus the value
3383 of the operand, with no other punctuation. */
3384
3385 static void
3386 output_asm_name ()
3387 {
3388 if (flag_print_asm_name)
3389 {
3390 /* Annotate the assembly with a comment describing the pattern and
3391 alternative used. */
3392 if (debug_insn)
3393 {
3394 register int num = INSN_CODE (debug_insn);
3395 fprintf (asm_out_file, "\t%s %d\t%s",
3396 ASM_COMMENT_START, INSN_UID (debug_insn),
3397 insn_data[num].name);
3398 if (insn_data[num].n_alternatives > 1)
3399 fprintf (asm_out_file, "/%d", which_alternative + 1);
3400 #ifdef HAVE_ATTR_length
3401 fprintf (asm_out_file, "\t[length = %d]",
3402 get_attr_length (debug_insn));
3403 #endif
3404 /* Clear this so only the first assembler insn
3405 of any rtl insn will get the special comment for -dp. */
3406 debug_insn = 0;
3407 }
3408 }
3409 }
3410
3411 void
3412 output_asm_insn (template, operands)
3413 const char *template;
3414 rtx *operands;
3415 {
3416 register const char *p;
3417 register int c;
3418
3419 /* An insn may return a null string template
3420 in a case where no assembler code is needed. */
3421 if (*template == 0)
3422 return;
3423
3424 p = template;
3425 putc ('\t', asm_out_file);
3426
3427 #ifdef ASM_OUTPUT_OPCODE
3428 ASM_OUTPUT_OPCODE (asm_out_file, p);
3429 #endif
3430
3431 while ((c = *p++))
3432 switch (c)
3433 {
3434 case '\n':
3435 output_asm_name ();
3436 putc (c, asm_out_file);
3437 #ifdef ASM_OUTPUT_OPCODE
3438 while ((c = *p) == '\t')
3439 {
3440 putc (c, asm_out_file);
3441 p++;
3442 }
3443 ASM_OUTPUT_OPCODE (asm_out_file, p);
3444 #endif
3445 break;
3446
3447 #ifdef ASSEMBLER_DIALECT
3448 case '{':
3449 {
3450 register int i;
3451
3452 /* If we want the first dialect, do nothing. Otherwise, skip
3453 DIALECT_NUMBER of strings ending with '|'. */
3454 for (i = 0; i < dialect_number; i++)
3455 {
3456 while (*p && *p != '}' && *p++ != '|')
3457 ;
3458 if (*p == '}')
3459 break;
3460 if (*p == '|')
3461 p++;
3462 }
3463 }
3464 break;
3465
3466 case '|':
3467 /* Skip to close brace. */
3468 while (*p && *p++ != '}')
3469 ;
3470 break;
3471
3472 case '}':
3473 break;
3474 #endif
3475
3476 case '%':
3477 /* %% outputs a single %. */
3478 if (*p == '%')
3479 {
3480 p++;
3481 putc (c, asm_out_file);
3482 }
3483 /* %= outputs a number which is unique to each insn in the entire
3484 compilation. This is useful for making local labels that are
3485 referred to more than once in a given insn. */
3486 else if (*p == '=')
3487 {
3488 p++;
3489 fprintf (asm_out_file, "%d", insn_counter);
3490 }
3491 /* % followed by a letter and some digits
3492 outputs an operand in a special way depending on the letter.
3493 Letters `acln' are implemented directly.
3494 Other letters are passed to `output_operand' so that
3495 the PRINT_OPERAND macro can define them. */
3496 else if (ISLOWER(*p) || ISUPPER(*p))
3497 {
3498 int letter = *p++;
3499 c = atoi (p);
3500
3501 if (! (*p >= '0' && *p <= '9'))
3502 output_operand_lossage ("operand number missing after %-letter");
3503 else if (this_is_asm_operands && (c < 0 || (unsigned int) c >= insn_noperands))
3504 output_operand_lossage ("operand number out of range");
3505 else if (letter == 'l')
3506 output_asm_label (operands[c]);
3507 else if (letter == 'a')
3508 output_address (operands[c]);
3509 else if (letter == 'c')
3510 {
3511 if (CONSTANT_ADDRESS_P (operands[c]))
3512 output_addr_const (asm_out_file, operands[c]);
3513 else
3514 output_operand (operands[c], 'c');
3515 }
3516 else if (letter == 'n')
3517 {
3518 if (GET_CODE (operands[c]) == CONST_INT)
3519 fprintf (asm_out_file, HOST_WIDE_INT_PRINT_DEC,
3520 - INTVAL (operands[c]));
3521 else
3522 {
3523 putc ('-', asm_out_file);
3524 output_addr_const (asm_out_file, operands[c]);
3525 }
3526 }
3527 else
3528 output_operand (operands[c], letter);
3529
3530 while ((c = *p) >= '0' && c <= '9') p++;
3531 }
3532 /* % followed by a digit outputs an operand the default way. */
3533 else if (*p >= '0' && *p <= '9')
3534 {
3535 c = atoi (p);
3536 if (this_is_asm_operands && (c < 0 || (unsigned int) c >= insn_noperands))
3537 output_operand_lossage ("operand number out of range");
3538 else
3539 output_operand (operands[c], 0);
3540 while ((c = *p) >= '0' && c <= '9') p++;
3541 }
3542 /* % followed by punctuation: output something for that
3543 punctuation character alone, with no operand.
3544 The PRINT_OPERAND macro decides what is actually done. */
3545 #ifdef PRINT_OPERAND_PUNCT_VALID_P
3546 else if (PRINT_OPERAND_PUNCT_VALID_P ((unsigned char)*p))
3547 output_operand (NULL_RTX, *p++);
3548 #endif
3549 else
3550 output_operand_lossage ("invalid %%-code");
3551 break;
3552
3553 default:
3554 putc (c, asm_out_file);
3555 }
3556
3557 output_asm_name ();
3558
3559 putc ('\n', asm_out_file);
3560 }
3561 \f
3562 /* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */
3563
3564 void
3565 output_asm_label (x)
3566 rtx x;
3567 {
3568 char buf[256];
3569
3570 if (GET_CODE (x) == LABEL_REF)
3571 x = XEXP (x, 0);
3572 if (GET_CODE (x) == CODE_LABEL
3573 || (GET_CODE (x) == NOTE
3574 && NOTE_LINE_NUMBER (x) == NOTE_INSN_DELETED_LABEL))
3575 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3576 else
3577 output_operand_lossage ("`%l' operand isn't a label");
3578
3579 assemble_name (asm_out_file, buf);
3580 }
3581
3582 /* Print operand X using machine-dependent assembler syntax.
3583 The macro PRINT_OPERAND is defined just to control this function.
3584 CODE is a non-digit that preceded the operand-number in the % spec,
3585 such as 'z' if the spec was `%z3'. CODE is 0 if there was no char
3586 between the % and the digits.
3587 When CODE is a non-letter, X is 0.
3588
3589 The meanings of the letters are machine-dependent and controlled
3590 by PRINT_OPERAND. */
3591
3592 static void
3593 output_operand (x, code)
3594 rtx x;
3595 int code ATTRIBUTE_UNUSED;
3596 {
3597 if (x && GET_CODE (x) == SUBREG)
3598 x = alter_subreg (x);
3599
3600 /* If X is a pseudo-register, abort now rather than writing trash to the
3601 assembler file. */
3602
3603 if (x && GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER)
3604 abort ();
3605
3606 PRINT_OPERAND (asm_out_file, x, code);
3607 }
3608
3609 /* Print a memory reference operand for address X
3610 using machine-dependent assembler syntax.
3611 The macro PRINT_OPERAND_ADDRESS exists just to control this function. */
3612
3613 void
3614 output_address (x)
3615 rtx x;
3616 {
3617 walk_alter_subreg (x);
3618 PRINT_OPERAND_ADDRESS (asm_out_file, x);
3619 }
3620 \f
3621 /* Print an integer constant expression in assembler syntax.
3622 Addition and subtraction are the only arithmetic
3623 that may appear in these expressions. */
3624
3625 void
3626 output_addr_const (file, x)
3627 FILE *file;
3628 rtx x;
3629 {
3630 char buf[256];
3631
3632 restart:
3633 switch (GET_CODE (x))
3634 {
3635 case PC:
3636 if (flag_pic)
3637 putc ('.', file);
3638 else
3639 abort ();
3640 break;
3641
3642 case SYMBOL_REF:
3643 assemble_name (file, XSTR (x, 0));
3644 break;
3645
3646 case LABEL_REF:
3647 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (XEXP (x, 0)));
3648 assemble_name (file, buf);
3649 break;
3650
3651 case CODE_LABEL:
3652 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3653 assemble_name (file, buf);
3654 break;
3655
3656 case CONST_INT:
3657 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x));
3658 break;
3659
3660 case CONST:
3661 /* This used to output parentheses around the expression,
3662 but that does not work on the 386 (either ATT or BSD assembler). */
3663 output_addr_const (file, XEXP (x, 0));
3664 break;
3665
3666 case CONST_DOUBLE:
3667 if (GET_MODE (x) == VOIDmode)
3668 {
3669 /* We can use %d if the number is one word and positive. */
3670 if (CONST_DOUBLE_HIGH (x))
3671 fprintf (file, HOST_WIDE_INT_PRINT_DOUBLE_HEX,
3672 CONST_DOUBLE_HIGH (x), CONST_DOUBLE_LOW (x));
3673 else if (CONST_DOUBLE_LOW (x) < 0)
3674 fprintf (file, HOST_WIDE_INT_PRINT_HEX, CONST_DOUBLE_LOW (x));
3675 else
3676 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x));
3677 }
3678 else
3679 /* We can't handle floating point constants;
3680 PRINT_OPERAND must handle them. */
3681 output_operand_lossage ("floating constant misused");
3682 break;
3683
3684 case PLUS:
3685 /* Some assemblers need integer constants to appear last (eg masm). */
3686 if (GET_CODE (XEXP (x, 0)) == CONST_INT)
3687 {
3688 output_addr_const (file, XEXP (x, 1));
3689 if (INTVAL (XEXP (x, 0)) >= 0)
3690 fprintf (file, "+");
3691 output_addr_const (file, XEXP (x, 0));
3692 }
3693 else
3694 {
3695 output_addr_const (file, XEXP (x, 0));
3696 if (INTVAL (XEXP (x, 1)) >= 0)
3697 fprintf (file, "+");
3698 output_addr_const (file, XEXP (x, 1));
3699 }
3700 break;
3701
3702 case MINUS:
3703 /* Avoid outputting things like x-x or x+5-x,
3704 since some assemblers can't handle that. */
3705 x = simplify_subtraction (x);
3706 if (GET_CODE (x) != MINUS)
3707 goto restart;
3708
3709 output_addr_const (file, XEXP (x, 0));
3710 fprintf (file, "-");
3711 if (GET_CODE (XEXP (x, 1)) == CONST_INT
3712 && INTVAL (XEXP (x, 1)) < 0)
3713 {
3714 fprintf (file, "%s", ASM_OPEN_PAREN);
3715 output_addr_const (file, XEXP (x, 1));
3716 fprintf (file, "%s", ASM_CLOSE_PAREN);
3717 }
3718 else
3719 output_addr_const (file, XEXP (x, 1));
3720 break;
3721
3722 case ZERO_EXTEND:
3723 case SIGN_EXTEND:
3724 output_addr_const (file, XEXP (x, 0));
3725 break;
3726
3727 default:
3728 output_operand_lossage ("invalid expression as operand");
3729 }
3730 }
3731 \f
3732 /* A poor man's fprintf, with the added features of %I, %R, %L, and %U.
3733 %R prints the value of REGISTER_PREFIX.
3734 %L prints the value of LOCAL_LABEL_PREFIX.
3735 %U prints the value of USER_LABEL_PREFIX.
3736 %I prints the value of IMMEDIATE_PREFIX.
3737 %O runs ASM_OUTPUT_OPCODE to transform what follows in the string.
3738 Also supported are %d, %x, %s, %e, %f, %g and %%.
3739
3740 We handle alternate assembler dialects here, just like output_asm_insn. */
3741
3742 void
3743 asm_fprintf VPARAMS ((FILE *file, const char *p, ...))
3744 {
3745 #ifndef ANSI_PROTOTYPES
3746 FILE *file;
3747 const char *p;
3748 #endif
3749 va_list argptr;
3750 char buf[10];
3751 char *q, c;
3752
3753 VA_START (argptr, p);
3754
3755 #ifndef ANSI_PROTOTYPES
3756 file = va_arg (argptr, FILE *);
3757 p = va_arg (argptr, const char *);
3758 #endif
3759
3760 buf[0] = '%';
3761
3762 while ((c = *p++))
3763 switch (c)
3764 {
3765 #ifdef ASSEMBLER_DIALECT
3766 case '{':
3767 {
3768 int i;
3769
3770 /* If we want the first dialect, do nothing. Otherwise, skip
3771 DIALECT_NUMBER of strings ending with '|'. */
3772 for (i = 0; i < dialect_number; i++)
3773 {
3774 while (*p && *p++ != '|')
3775 ;
3776
3777 if (*p == '|')
3778 p++;
3779 }
3780 }
3781 break;
3782
3783 case '|':
3784 /* Skip to close brace. */
3785 while (*p && *p++ != '}')
3786 ;
3787 break;
3788
3789 case '}':
3790 break;
3791 #endif
3792
3793 case '%':
3794 c = *p++;
3795 q = &buf[1];
3796 while ((c >= '0' && c <= '9') || c == '.')
3797 {
3798 *q++ = c;
3799 c = *p++;
3800 }
3801 switch (c)
3802 {
3803 case '%':
3804 fprintf (file, "%%");
3805 break;
3806
3807 case 'd': case 'i': case 'u':
3808 case 'x': case 'p': case 'X':
3809 case 'o':
3810 *q++ = c;
3811 *q = 0;
3812 fprintf (file, buf, va_arg (argptr, int));
3813 break;
3814
3815 case 'w':
3816 /* This is a prefix to the 'd', 'i', 'u', 'x', 'p', and 'X' cases,
3817 but we do not check for those cases. It means that the value
3818 is a HOST_WIDE_INT, which may be either `int' or `long'. */
3819
3820 #if HOST_BITS_PER_WIDE_INT == HOST_BITS_PER_INT
3821 #else
3822 #if HOST_BITS_PER_WIDE_INT == HOST_BITS_PER_LONG
3823 *q++ = 'l';
3824 #else
3825 *q++ = 'l';
3826 *q++ = 'l';
3827 #endif
3828 #endif
3829
3830 *q++ = *p++;
3831 *q = 0;
3832 fprintf (file, buf, va_arg (argptr, HOST_WIDE_INT));
3833 break;
3834
3835 case 'l':
3836 *q++ = c;
3837 *q++ = *p++;
3838 *q = 0;
3839 fprintf (file, buf, va_arg (argptr, long));
3840 break;
3841
3842 case 'e':
3843 case 'f':
3844 case 'g':
3845 *q++ = c;
3846 *q = 0;
3847 fprintf (file, buf, va_arg (argptr, double));
3848 break;
3849
3850 case 's':
3851 *q++ = c;
3852 *q = 0;
3853 fprintf (file, buf, va_arg (argptr, char *));
3854 break;
3855
3856 case 'O':
3857 #ifdef ASM_OUTPUT_OPCODE
3858 ASM_OUTPUT_OPCODE (asm_out_file, p);
3859 #endif
3860 break;
3861
3862 case 'R':
3863 #ifdef REGISTER_PREFIX
3864 fprintf (file, "%s", REGISTER_PREFIX);
3865 #endif
3866 break;
3867
3868 case 'I':
3869 #ifdef IMMEDIATE_PREFIX
3870 fprintf (file, "%s", IMMEDIATE_PREFIX);
3871 #endif
3872 break;
3873
3874 case 'L':
3875 #ifdef LOCAL_LABEL_PREFIX
3876 fprintf (file, "%s", LOCAL_LABEL_PREFIX);
3877 #endif
3878 break;
3879
3880 case 'U':
3881 fputs (user_label_prefix, file);
3882 break;
3883
3884 #ifdef ASM_FPRINTF_EXTENSIONS
3885 /* Upper case letters are reserved for general use by asm_fprintf
3886 and so are not available to target specific code. In order to
3887 prevent the ASM_FPRINTF_EXTENSIONS macro from using them then,
3888 they are defined here. As they get turned into real extensions
3889 to asm_fprintf they should be removed from this list. */
3890 case 'A': case 'B': case 'C': case 'D': case 'E':
3891 case 'F': case 'G': case 'H': case 'J': case 'K':
3892 case 'M': case 'N': case 'P': case 'Q': case 'S':
3893 case 'T': case 'V': case 'W': case 'Y': case 'Z':
3894 break;
3895
3896 ASM_FPRINTF_EXTENSIONS (file, argptr, p)
3897 #endif
3898 default:
3899 abort ();
3900 }
3901 break;
3902
3903 default:
3904 fputc (c, file);
3905 }
3906 va_end (argptr);
3907 }
3908 \f
3909 /* Split up a CONST_DOUBLE or integer constant rtx
3910 into two rtx's for single words,
3911 storing in *FIRST the word that comes first in memory in the target
3912 and in *SECOND the other. */
3913
3914 void
3915 split_double (value, first, second)
3916 rtx value;
3917 rtx *first, *second;
3918 {
3919 if (GET_CODE (value) == CONST_INT)
3920 {
3921 if (HOST_BITS_PER_WIDE_INT >= (2 * BITS_PER_WORD))
3922 {
3923 /* In this case the CONST_INT holds both target words.
3924 Extract the bits from it into two word-sized pieces.
3925 Sign extend each half to HOST_WIDE_INT. */
3926 rtx low, high;
3927 /* On machines where HOST_BITS_PER_WIDE_INT == BITS_PER_WORD
3928 the shift below will cause a compiler warning, even though
3929 this code won't be executed. So put the shift amounts in
3930 variables to avoid the warning. */
3931 int rshift = HOST_BITS_PER_WIDE_INT - BITS_PER_WORD;
3932 int lshift = HOST_BITS_PER_WIDE_INT - 2 * BITS_PER_WORD;
3933
3934 low = GEN_INT ((INTVAL (value) << rshift) >> rshift);
3935 high = GEN_INT ((INTVAL (value) << lshift) >> rshift);
3936 if (WORDS_BIG_ENDIAN)
3937 {
3938 *first = high;
3939 *second = low;
3940 }
3941 else
3942 {
3943 *first = low;
3944 *second = high;
3945 }
3946 }
3947 else
3948 {
3949 /* The rule for using CONST_INT for a wider mode
3950 is that we regard the value as signed.
3951 So sign-extend it. */
3952 rtx high = (INTVAL (value) < 0 ? constm1_rtx : const0_rtx);
3953 if (WORDS_BIG_ENDIAN)
3954 {
3955 *first = high;
3956 *second = value;
3957 }
3958 else
3959 {
3960 *first = value;
3961 *second = high;
3962 }
3963 }
3964 }
3965 else if (GET_CODE (value) != CONST_DOUBLE)
3966 {
3967 if (WORDS_BIG_ENDIAN)
3968 {
3969 *first = const0_rtx;
3970 *second = value;
3971 }
3972 else
3973 {
3974 *first = value;
3975 *second = const0_rtx;
3976 }
3977 }
3978 else if (GET_MODE (value) == VOIDmode
3979 /* This is the old way we did CONST_DOUBLE integers. */
3980 || GET_MODE_CLASS (GET_MODE (value)) == MODE_INT)
3981 {
3982 /* In an integer, the words are defined as most and least significant.
3983 So order them by the target's convention. */
3984 if (WORDS_BIG_ENDIAN)
3985 {
3986 *first = GEN_INT (CONST_DOUBLE_HIGH (value));
3987 *second = GEN_INT (CONST_DOUBLE_LOW (value));
3988 }
3989 else
3990 {
3991 *first = GEN_INT (CONST_DOUBLE_LOW (value));
3992 *second = GEN_INT (CONST_DOUBLE_HIGH (value));
3993 }
3994 }
3995 else
3996 {
3997 #ifdef REAL_ARITHMETIC
3998 REAL_VALUE_TYPE r; long l[2];
3999 REAL_VALUE_FROM_CONST_DOUBLE (r, value);
4000
4001 /* Note, this converts the REAL_VALUE_TYPE to the target's
4002 format, splits up the floating point double and outputs
4003 exactly 32 bits of it into each of l[0] and l[1] --
4004 not necessarily BITS_PER_WORD bits. */
4005 REAL_VALUE_TO_TARGET_DOUBLE (r, l);
4006
4007 /* If 32 bits is an entire word for the target, but not for the host,
4008 then sign-extend on the host so that the number will look the same
4009 way on the host that it would on the target. See for instance
4010 simplify_unary_operation. The #if is needed to avoid compiler
4011 warnings. */
4012
4013 #if HOST_BITS_PER_LONG > 32
4014 if (BITS_PER_WORD < HOST_BITS_PER_LONG && BITS_PER_WORD == 32)
4015 {
4016 if (l[0] & ((long) 1 << 31))
4017 l[0] |= ((long) (-1) << 32);
4018 if (l[1] & ((long) 1 << 31))
4019 l[1] |= ((long) (-1) << 32);
4020 }
4021 #endif
4022
4023 *first = GEN_INT ((HOST_WIDE_INT) l[0]);
4024 *second = GEN_INT ((HOST_WIDE_INT) l[1]);
4025 #else
4026 if ((HOST_FLOAT_FORMAT != TARGET_FLOAT_FORMAT
4027 || HOST_BITS_PER_WIDE_INT != BITS_PER_WORD)
4028 && ! flag_pretend_float)
4029 abort ();
4030
4031 if (
4032 #ifdef HOST_WORDS_BIG_ENDIAN
4033 WORDS_BIG_ENDIAN
4034 #else
4035 ! WORDS_BIG_ENDIAN
4036 #endif
4037 )
4038 {
4039 /* Host and target agree => no need to swap. */
4040 *first = GEN_INT (CONST_DOUBLE_LOW (value));
4041 *second = GEN_INT (CONST_DOUBLE_HIGH (value));
4042 }
4043 else
4044 {
4045 *second = GEN_INT (CONST_DOUBLE_LOW (value));
4046 *first = GEN_INT (CONST_DOUBLE_HIGH (value));
4047 }
4048 #endif /* no REAL_ARITHMETIC */
4049 }
4050 }
4051 \f
4052 /* Return nonzero if this function has no function calls. */
4053
4054 int
4055 leaf_function_p ()
4056 {
4057 rtx insn;
4058
4059 if (profile_flag || profile_block_flag || profile_arc_flag)
4060 return 0;
4061
4062 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4063 {
4064 if (GET_CODE (insn) == CALL_INSN
4065 && ! SIBLING_CALL_P (insn))
4066 return 0;
4067 if (GET_CODE (insn) == INSN
4068 && GET_CODE (PATTERN (insn)) == SEQUENCE
4069 && GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) == CALL_INSN
4070 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0)))
4071 return 0;
4072 }
4073 for (insn = current_function_epilogue_delay_list; insn; insn = XEXP (insn, 1))
4074 {
4075 if (GET_CODE (XEXP (insn, 0)) == CALL_INSN
4076 && ! SIBLING_CALL_P (insn))
4077 return 0;
4078 if (GET_CODE (XEXP (insn, 0)) == INSN
4079 && GET_CODE (PATTERN (XEXP (insn, 0))) == SEQUENCE
4080 && GET_CODE (XVECEXP (PATTERN (XEXP (insn, 0)), 0, 0)) == CALL_INSN
4081 && ! SIBLING_CALL_P (XVECEXP (PATTERN (XEXP (insn, 0)), 0, 0)))
4082 return 0;
4083 }
4084
4085 return 1;
4086 }
4087
4088 /* On some machines, a function with no call insns
4089 can run faster if it doesn't create its own register window.
4090 When output, the leaf function should use only the "output"
4091 registers. Ordinarily, the function would be compiled to use
4092 the "input" registers to find its arguments; it is a candidate
4093 for leaf treatment if it uses only the "input" registers.
4094 Leaf function treatment means renumbering so the function
4095 uses the "output" registers instead. */
4096
4097 #ifdef LEAF_REGISTERS
4098
4099 /* Return 1 if this function uses only the registers that can be
4100 safely renumbered. */
4101
4102 int
4103 only_leaf_regs_used ()
4104 {
4105 int i;
4106 char *permitted_reg_in_leaf_functions = LEAF_REGISTERS;
4107
4108 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
4109 if ((regs_ever_live[i] || global_regs[i])
4110 && ! permitted_reg_in_leaf_functions[i])
4111 return 0;
4112
4113 if (current_function_uses_pic_offset_table
4114 && pic_offset_table_rtx != 0
4115 && GET_CODE (pic_offset_table_rtx) == REG
4116 && ! permitted_reg_in_leaf_functions[REGNO (pic_offset_table_rtx)])
4117 return 0;
4118
4119 return 1;
4120 }
4121
4122 /* Scan all instructions and renumber all registers into those
4123 available in leaf functions. */
4124
4125 static void
4126 leaf_renumber_regs (first)
4127 rtx first;
4128 {
4129 rtx insn;
4130
4131 /* Renumber only the actual patterns.
4132 The reg-notes can contain frame pointer refs,
4133 and renumbering them could crash, and should not be needed. */
4134 for (insn = first; insn; insn = NEXT_INSN (insn))
4135 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
4136 leaf_renumber_regs_insn (PATTERN (insn));
4137 for (insn = current_function_epilogue_delay_list; insn; insn = XEXP (insn, 1))
4138 if (GET_RTX_CLASS (GET_CODE (XEXP (insn, 0))) == 'i')
4139 leaf_renumber_regs_insn (PATTERN (XEXP (insn, 0)));
4140 }
4141
4142 /* Scan IN_RTX and its subexpressions, and renumber all regs into those
4143 available in leaf functions. */
4144
4145 void
4146 leaf_renumber_regs_insn (in_rtx)
4147 register rtx in_rtx;
4148 {
4149 register int i, j;
4150 register const char *format_ptr;
4151
4152 if (in_rtx == 0)
4153 return;
4154
4155 /* Renumber all input-registers into output-registers.
4156 renumbered_regs would be 1 for an output-register;
4157 they */
4158
4159 if (GET_CODE (in_rtx) == REG)
4160 {
4161 int newreg;
4162
4163 /* Don't renumber the same reg twice. */
4164 if (in_rtx->used)
4165 return;
4166
4167 newreg = REGNO (in_rtx);
4168 /* Don't try to renumber pseudo regs. It is possible for a pseudo reg
4169 to reach here as part of a REG_NOTE. */
4170 if (newreg >= FIRST_PSEUDO_REGISTER)
4171 {
4172 in_rtx->used = 1;
4173 return;
4174 }
4175 newreg = LEAF_REG_REMAP (newreg);
4176 if (newreg < 0)
4177 abort ();
4178 regs_ever_live[REGNO (in_rtx)] = 0;
4179 regs_ever_live[newreg] = 1;
4180 REGNO (in_rtx) = newreg;
4181 in_rtx->used = 1;
4182 }
4183
4184 if (GET_RTX_CLASS (GET_CODE (in_rtx)) == 'i')
4185 {
4186 /* Inside a SEQUENCE, we find insns.
4187 Renumber just the patterns of these insns,
4188 just as we do for the top-level insns. */
4189 leaf_renumber_regs_insn (PATTERN (in_rtx));
4190 return;
4191 }
4192
4193 format_ptr = GET_RTX_FORMAT (GET_CODE (in_rtx));
4194
4195 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (in_rtx)); i++)
4196 switch (*format_ptr++)
4197 {
4198 case 'e':
4199 leaf_renumber_regs_insn (XEXP (in_rtx, i));
4200 break;
4201
4202 case 'E':
4203 if (NULL != XVEC (in_rtx, i))
4204 {
4205 for (j = 0; j < XVECLEN (in_rtx, i); j++)
4206 leaf_renumber_regs_insn (XVECEXP (in_rtx, i, j));
4207 }
4208 break;
4209
4210 case 'S':
4211 case 's':
4212 case '0':
4213 case 'i':
4214 case 'w':
4215 case 'n':
4216 case 'u':
4217 break;
4218
4219 default:
4220 abort ();
4221 }
4222 }
4223 #endif