1 /* Convert RTL to assembler code and output it, for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
22 /* This is the final pass of the compiler.
23 It looks at the rtl code for a function and outputs assembler code.
25 Call `final_start_function' to output the assembler code for function entry,
26 `final' to output assembler code for some RTL code,
27 `final_end_function' to output assembler code for function exit.
28 If a function is compiled in several pieces, each piece is
29 output separately with `final'.
31 Some optimizations are also done at this level.
32 Move instructions that were made unnecessary by good register allocation
33 are detected and omitted from the output. (Though most of these
34 are removed by the last jump pass.)
36 Instructions to set the condition codes are omitted when it can be
37 seen that the condition codes already had the desired values.
39 In some cases it is sufficient if the inherited condition codes
40 have related values, but this may require the following insn
41 (the one that tests the condition codes) to be modified.
43 The code for the function prologue and epilogue are generated
44 directly in assembler by the target functions function_prologue and
45 function_epilogue. Those instructions never exist as rtl. */
49 #include "coretypes.h"
56 #include "insn-config.h"
57 #include "insn-attr.h"
59 #include "conditions.h"
62 #include "hard-reg-set.h"
69 #include "basic-block.h"
73 #include "cfglayout.h"
74 #include "tree-pass.h"
84 #ifdef XCOFF_DEBUGGING_INFO
85 #include "xcoffout.h" /* Needed for external data
86 declarations for e.g. AIX 4.x. */
89 #if defined (DWARF2_UNWIND_INFO) || defined (DWARF2_DEBUGGING_INFO)
90 #include "dwarf2out.h"
93 #ifdef DBX_DEBUGGING_INFO
97 #ifdef SDB_DEBUGGING_INFO
101 /* If we aren't using cc0, CC_STATUS_INIT shouldn't exist. So define a
102 null default for it to save conditionalization later. */
103 #ifndef CC_STATUS_INIT
104 #define CC_STATUS_INIT
107 /* How to start an assembler comment. */
108 #ifndef ASM_COMMENT_START
109 #define ASM_COMMENT_START ";#"
112 /* Is the given character a logical line separator for the assembler? */
113 #ifndef IS_ASM_LOGICAL_LINE_SEPARATOR
114 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == ';')
117 #ifndef JUMP_TABLES_IN_TEXT_SECTION
118 #define JUMP_TABLES_IN_TEXT_SECTION 0
121 /* Bitflags used by final_scan_insn. */
124 #define SEEN_EMITTED 4
126 /* Last insn processed by final_scan_insn. */
127 static rtx debug_insn
;
128 rtx current_output_insn
;
130 /* Line number of last NOTE. */
131 static int last_linenum
;
133 /* Highest line number in current block. */
134 static int high_block_linenum
;
136 /* Likewise for function. */
137 static int high_function_linenum
;
139 /* Filename of last NOTE. */
140 static const char *last_filename
;
142 /* Override filename and line number. */
143 static const char *override_filename
;
144 static int override_linenum
;
146 /* Whether to force emission of a line note before the next insn. */
147 static bool force_source_line
= false;
149 extern const int length_unit_log
; /* This is defined in insn-attrtab.c. */
151 /* Nonzero while outputting an `asm' with operands.
152 This means that inconsistencies are the user's fault, so don't die.
153 The precise value is the insn being output, to pass to error_for_asm. */
154 rtx this_is_asm_operands
;
156 /* Number of operands of this insn, for an `asm' with operands. */
157 static unsigned int insn_noperands
;
159 /* Compare optimization flag. */
161 static rtx last_ignored_compare
= 0;
163 /* Assign a unique number to each insn that is output.
164 This can be used to generate unique local labels. */
166 static int insn_counter
= 0;
169 /* This variable contains machine-dependent flags (defined in tm.h)
170 set and examined by output routines
171 that describe how to interpret the condition codes properly. */
175 /* During output of an insn, this contains a copy of cc_status
176 from before the insn. */
178 CC_STATUS cc_prev_status
;
181 /* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */
183 static int block_depth
;
185 /* Nonzero if have enabled APP processing of our assembler output. */
189 /* If we are outputting an insn sequence, this contains the sequence rtx.
194 #ifdef ASSEMBLER_DIALECT
196 /* Number of the assembler dialect to use, starting at 0. */
197 static int dialect_number
;
200 #ifdef HAVE_conditional_execution
201 /* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */
202 rtx current_insn_predicate
;
205 #ifdef HAVE_ATTR_length
206 static int asm_insn_count (rtx
);
208 static void profile_function (FILE *);
209 static void profile_after_prologue (FILE *);
210 static bool notice_source_line (rtx
);
211 static rtx
walk_alter_subreg (rtx
*, bool *);
212 static void output_asm_name (void);
213 static void output_alternate_entry_point (FILE *, rtx
);
214 static tree
get_mem_expr_from_op (rtx
, int *);
215 static void output_asm_operand_names (rtx
*, int *, int);
216 static void output_operand (rtx
, int);
217 #ifdef LEAF_REGISTERS
218 static void leaf_renumber_regs (rtx
);
221 static int alter_cond (rtx
);
223 #ifndef ADDR_VEC_ALIGN
224 static int final_addr_vec_align (rtx
);
226 #ifdef HAVE_ATTR_length
227 static int align_fuzz (rtx
, rtx
, int, unsigned);
230 /* Initialize data in final at the beginning of a compilation. */
233 init_final (const char *filename ATTRIBUTE_UNUSED
)
238 #ifdef ASSEMBLER_DIALECT
239 dialect_number
= ASSEMBLER_DIALECT
;
243 /* Default target function prologue and epilogue assembler output.
245 If not overridden for epilogue code, then the function body itself
246 contains return instructions wherever needed. */
248 default_function_pro_epilogue (FILE *file ATTRIBUTE_UNUSED
,
249 HOST_WIDE_INT size ATTRIBUTE_UNUSED
)
253 /* Default target hook that outputs nothing to a stream. */
255 no_asm_to_stream (FILE *file ATTRIBUTE_UNUSED
)
259 /* Enable APP processing of subsequent output.
260 Used before the output from an `asm' statement. */
267 fputs (ASM_APP_ON
, asm_out_file
);
272 /* Disable APP processing of subsequent output.
273 Called from varasm.c before most kinds of output. */
280 fputs (ASM_APP_OFF
, asm_out_file
);
285 /* Return the number of slots filled in the current
286 delayed branch sequence (we don't count the insn needing the
287 delay slot). Zero if not in a delayed branch sequence. */
291 dbr_sequence_length (void)
293 if (final_sequence
!= 0)
294 return XVECLEN (final_sequence
, 0) - 1;
300 /* The next two pages contain routines used to compute the length of an insn
301 and to shorten branches. */
303 /* Arrays for insn lengths, and addresses. The latter is referenced by
304 `insn_current_length'. */
306 static int *insn_lengths
;
308 VEC(int,heap
) *insn_addresses_
;
310 /* Max uid for which the above arrays are valid. */
311 static int insn_lengths_max_uid
;
313 /* Address of insn being processed. Used by `insn_current_length'. */
314 int insn_current_address
;
316 /* Address of insn being processed in previous iteration. */
317 int insn_last_address
;
319 /* known invariant alignment of insn being processed. */
320 int insn_current_align
;
322 /* After shorten_branches, for any insn, uid_align[INSN_UID (insn)]
323 gives the next following alignment insn that increases the known
324 alignment, or NULL_RTX if there is no such insn.
325 For any alignment obtained this way, we can again index uid_align with
326 its uid to obtain the next following align that in turn increases the
327 alignment, till we reach NULL_RTX; the sequence obtained this way
328 for each insn we'll call the alignment chain of this insn in the following
331 struct label_alignment
337 static rtx
*uid_align
;
338 static int *uid_shuid
;
339 static struct label_alignment
*label_align
;
341 /* Indicate that branch shortening hasn't yet been done. */
344 init_insn_lengths (void)
355 insn_lengths_max_uid
= 0;
357 #ifdef HAVE_ATTR_length
358 INSN_ADDRESSES_FREE ();
367 /* Obtain the current length of an insn. If branch shortening has been done,
368 get its actual length. Otherwise, use FALLBACK_FN to calculate the
371 get_attr_length_1 (rtx insn ATTRIBUTE_UNUSED
,
372 int (*fallback_fn
) (rtx
) ATTRIBUTE_UNUSED
)
374 #ifdef HAVE_ATTR_length
379 if (insn_lengths_max_uid
> INSN_UID (insn
))
380 return insn_lengths
[INSN_UID (insn
)];
382 switch (GET_CODE (insn
))
390 length
= fallback_fn (insn
);
394 body
= PATTERN (insn
);
395 if (GET_CODE (body
) == ADDR_VEC
|| GET_CODE (body
) == ADDR_DIFF_VEC
)
397 /* Alignment is machine-dependent and should be handled by
401 length
= fallback_fn (insn
);
405 body
= PATTERN (insn
);
406 if (GET_CODE (body
) == USE
|| GET_CODE (body
) == CLOBBER
)
409 else if (GET_CODE (body
) == ASM_INPUT
|| asm_noperands (body
) >= 0)
410 length
= asm_insn_count (body
) * fallback_fn (insn
);
411 else if (GET_CODE (body
) == SEQUENCE
)
412 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
413 length
+= get_attr_length_1 (XVECEXP (body
, 0, i
), fallback_fn
);
415 length
= fallback_fn (insn
);
422 #ifdef ADJUST_INSN_LENGTH
423 ADJUST_INSN_LENGTH (insn
, length
);
426 #else /* not HAVE_ATTR_length */
428 #define insn_default_length 0
429 #define insn_min_length 0
430 #endif /* not HAVE_ATTR_length */
433 /* Obtain the current length of an insn. If branch shortening has been done,
434 get its actual length. Otherwise, get its maximum length. */
436 get_attr_length (rtx insn
)
438 return get_attr_length_1 (insn
, insn_default_length
);
441 /* Obtain the current length of an insn. If branch shortening has been done,
442 get its actual length. Otherwise, get its minimum length. */
444 get_attr_min_length (rtx insn
)
446 return get_attr_length_1 (insn
, insn_min_length
);
449 /* Code to handle alignment inside shorten_branches. */
451 /* Here is an explanation how the algorithm in align_fuzz can give
454 Call a sequence of instructions beginning with alignment point X
455 and continuing until the next alignment point `block X'. When `X'
456 is used in an expression, it means the alignment value of the
459 Call the distance between the start of the first insn of block X, and
460 the end of the last insn of block X `IX', for the `inner size of X'.
461 This is clearly the sum of the instruction lengths.
463 Likewise with the next alignment-delimited block following X, which we
466 Call the distance between the start of the first insn of block X, and
467 the start of the first insn of block Y `OX', for the `outer size of X'.
469 The estimated padding is then OX - IX.
471 OX can be safely estimated as
476 OX = round_up(IX, X) + Y - X
478 Clearly est(IX) >= real(IX), because that only depends on the
479 instruction lengths, and those being overestimated is a given.
481 Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so
482 we needn't worry about that when thinking about OX.
484 When X >= Y, the alignment provided by Y adds no uncertainty factor
485 for branch ranges starting before X, so we can just round what we have.
486 But when X < Y, we don't know anything about the, so to speak,
487 `middle bits', so we have to assume the worst when aligning up from an
488 address mod X to one mod Y, which is Y - X. */
491 #define LABEL_ALIGN(LABEL) align_labels_log
494 #ifndef LABEL_ALIGN_MAX_SKIP
495 #define LABEL_ALIGN_MAX_SKIP align_labels_max_skip
499 #define LOOP_ALIGN(LABEL) align_loops_log
502 #ifndef LOOP_ALIGN_MAX_SKIP
503 #define LOOP_ALIGN_MAX_SKIP align_loops_max_skip
506 #ifndef LABEL_ALIGN_AFTER_BARRIER
507 #define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0
510 #ifndef LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP
511 #define LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP 0
515 #define JUMP_ALIGN(LABEL) align_jumps_log
518 #ifndef JUMP_ALIGN_MAX_SKIP
519 #define JUMP_ALIGN_MAX_SKIP align_jumps_max_skip
522 #ifndef ADDR_VEC_ALIGN
524 final_addr_vec_align (rtx addr_vec
)
526 int align
= GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec
)));
528 if (align
> BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
)
529 align
= BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
;
530 return exact_log2 (align
);
534 #define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC)
537 #ifndef INSN_LENGTH_ALIGNMENT
538 #define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log
541 #define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)])
543 static int min_labelno
, max_labelno
;
545 #define LABEL_TO_ALIGNMENT(LABEL) \
546 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment)
548 #define LABEL_TO_MAX_SKIP(LABEL) \
549 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip)
551 /* For the benefit of port specific code do this also as a function. */
554 label_to_alignment (rtx label
)
556 return LABEL_TO_ALIGNMENT (label
);
559 #ifdef HAVE_ATTR_length
560 /* The differences in addresses
561 between a branch and its target might grow or shrink depending on
562 the alignment the start insn of the range (the branch for a forward
563 branch or the label for a backward branch) starts out on; if these
564 differences are used naively, they can even oscillate infinitely.
565 We therefore want to compute a 'worst case' address difference that
566 is independent of the alignment the start insn of the range end
567 up on, and that is at least as large as the actual difference.
568 The function align_fuzz calculates the amount we have to add to the
569 naively computed difference, by traversing the part of the alignment
570 chain of the start insn of the range that is in front of the end insn
571 of the range, and considering for each alignment the maximum amount
572 that it might contribute to a size increase.
574 For casesi tables, we also want to know worst case minimum amounts of
575 address difference, in case a machine description wants to introduce
576 some common offset that is added to all offsets in a table.
577 For this purpose, align_fuzz with a growth argument of 0 computes the
578 appropriate adjustment. */
580 /* Compute the maximum delta by which the difference of the addresses of
581 START and END might grow / shrink due to a different address for start
582 which changes the size of alignment insns between START and END.
583 KNOWN_ALIGN_LOG is the alignment known for START.
584 GROWTH should be ~0 if the objective is to compute potential code size
585 increase, and 0 if the objective is to compute potential shrink.
586 The return value is undefined for any other value of GROWTH. */
589 align_fuzz (rtx start
, rtx end
, int known_align_log
, unsigned int growth
)
591 int uid
= INSN_UID (start
);
593 int known_align
= 1 << known_align_log
;
594 int end_shuid
= INSN_SHUID (end
);
597 for (align_label
= uid_align
[uid
]; align_label
; align_label
= uid_align
[uid
])
599 int align_addr
, new_align
;
601 uid
= INSN_UID (align_label
);
602 align_addr
= INSN_ADDRESSES (uid
) - insn_lengths
[uid
];
603 if (uid_shuid
[uid
] > end_shuid
)
605 known_align_log
= LABEL_TO_ALIGNMENT (align_label
);
606 new_align
= 1 << known_align_log
;
607 if (new_align
< known_align
)
609 fuzz
+= (-align_addr
^ growth
) & (new_align
- known_align
);
610 known_align
= new_align
;
615 /* Compute a worst-case reference address of a branch so that it
616 can be safely used in the presence of aligned labels. Since the
617 size of the branch itself is unknown, the size of the branch is
618 not included in the range. I.e. for a forward branch, the reference
619 address is the end address of the branch as known from the previous
620 branch shortening pass, minus a value to account for possible size
621 increase due to alignment. For a backward branch, it is the start
622 address of the branch as known from the current pass, plus a value
623 to account for possible size increase due to alignment.
624 NB.: Therefore, the maximum offset allowed for backward branches needs
625 to exclude the branch size. */
628 insn_current_reference_address (rtx branch
)
633 if (! INSN_ADDRESSES_SET_P ())
636 seq
= NEXT_INSN (PREV_INSN (branch
));
637 seq_uid
= INSN_UID (seq
);
638 if (!JUMP_P (branch
))
639 /* This can happen for example on the PA; the objective is to know the
640 offset to address something in front of the start of the function.
641 Thus, we can treat it like a backward branch.
642 We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than
643 any alignment we'd encounter, so we skip the call to align_fuzz. */
644 return insn_current_address
;
645 dest
= JUMP_LABEL (branch
);
647 /* BRANCH has no proper alignment chain set, so use SEQ.
648 BRANCH also has no INSN_SHUID. */
649 if (INSN_SHUID (seq
) < INSN_SHUID (dest
))
651 /* Forward branch. */
652 return (insn_last_address
+ insn_lengths
[seq_uid
]
653 - align_fuzz (seq
, dest
, length_unit_log
, ~0));
657 /* Backward branch. */
658 return (insn_current_address
659 + align_fuzz (dest
, seq
, length_unit_log
, ~0));
662 #endif /* HAVE_ATTR_length */
664 /* Compute branch alignments based on frequency information in the
668 compute_alignments (void)
670 int log
, max_skip
, max_log
;
673 int freq_threshold
= 0;
681 max_labelno
= max_label_num ();
682 min_labelno
= get_first_label_num ();
683 label_align
= XCNEWVEC (struct label_alignment
, max_labelno
- min_labelno
+ 1);
685 /* If not optimizing or optimizing for size, don't assign any alignments. */
686 if (! optimize
|| optimize_function_for_size_p (cfun
))
691 dump_flow_info (dump_file
, TDF_DETAILS
);
692 flow_loops_dump (dump_file
, NULL
, 1);
693 loop_optimizer_init (AVOID_CFG_MODIFICATIONS
);
696 if (bb
->frequency
> freq_max
)
697 freq_max
= bb
->frequency
;
698 freq_threshold
= freq_max
/ PARAM_VALUE (PARAM_ALIGN_THRESHOLD
);
701 fprintf(dump_file
, "freq_max: %i\n",freq_max
);
704 rtx label
= BB_HEAD (bb
);
705 int fallthru_frequency
= 0, branch_frequency
= 0, has_fallthru
= 0;
710 || optimize_bb_for_size_p (bb
))
713 fprintf(dump_file
, "BB %4i freq %4i loop %2i loop_depth %2i skipped.\n",
714 bb
->index
, bb
->frequency
, bb
->loop_father
->num
, bb
->loop_depth
);
717 max_log
= LABEL_ALIGN (label
);
718 max_skip
= LABEL_ALIGN_MAX_SKIP
;
720 FOR_EACH_EDGE (e
, ei
, bb
->preds
)
722 if (e
->flags
& EDGE_FALLTHRU
)
723 has_fallthru
= 1, fallthru_frequency
+= EDGE_FREQUENCY (e
);
725 branch_frequency
+= EDGE_FREQUENCY (e
);
729 fprintf(dump_file
, "BB %4i freq %4i loop %2i loop_depth %2i fall %4i branch %4i",
730 bb
->index
, bb
->frequency
, bb
->loop_father
->num
,
732 fallthru_frequency
, branch_frequency
);
733 if (!bb
->loop_father
->inner
&& bb
->loop_father
->num
)
734 fprintf (dump_file
, " inner_loop");
735 if (bb
->loop_father
->header
== bb
)
736 fprintf (dump_file
, " loop_header");
737 fprintf (dump_file
, "\n");
740 /* There are two purposes to align block with no fallthru incoming edge:
741 1) to avoid fetch stalls when branch destination is near cache boundary
742 2) to improve cache efficiency in case the previous block is not executed
743 (so it does not need to be in the cache).
745 We to catch first case, we align frequently executed blocks.
746 To catch the second, we align blocks that are executed more frequently
747 than the predecessor and the predecessor is likely to not be executed
748 when function is called. */
751 && (branch_frequency
> freq_threshold
752 || (bb
->frequency
> bb
->prev_bb
->frequency
* 10
753 && (bb
->prev_bb
->frequency
754 <= ENTRY_BLOCK_PTR
->frequency
/ 2))))
756 log
= JUMP_ALIGN (label
);
758 fprintf(dump_file
, " jump alignment added.\n");
762 max_skip
= JUMP_ALIGN_MAX_SKIP
;
765 /* In case block is frequent and reached mostly by non-fallthru edge,
766 align it. It is most likely a first block of loop. */
768 && optimize_bb_for_speed_p (bb
)
769 && branch_frequency
+ fallthru_frequency
> freq_threshold
771 > fallthru_frequency
* PARAM_VALUE (PARAM_ALIGN_LOOP_ITERATIONS
)))
773 log
= LOOP_ALIGN (label
);
775 fprintf(dump_file
, " internal loop alignment added.\n");
779 max_skip
= LOOP_ALIGN_MAX_SKIP
;
782 LABEL_TO_ALIGNMENT (label
) = max_log
;
783 LABEL_TO_MAX_SKIP (label
) = max_skip
;
788 loop_optimizer_finalize ();
789 free_dominance_info (CDI_DOMINATORS
);
794 struct rtl_opt_pass pass_compute_alignments
=
798 "alignments", /* name */
800 compute_alignments
, /* execute */
803 0, /* static_pass_number */
805 0, /* properties_required */
806 0, /* properties_provided */
807 0, /* properties_destroyed */
808 0, /* todo_flags_start */
809 TODO_dump_func
| TODO_verify_rtl_sharing
810 | TODO_ggc_collect
/* todo_flags_finish */
815 /* Make a pass over all insns and compute their actual lengths by shortening
816 any branches of variable length if possible. */
818 /* shorten_branches might be called multiple times: for example, the SH
819 port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG.
820 In order to do this, it needs proper length information, which it obtains
821 by calling shorten_branches. This cannot be collapsed with
822 shorten_branches itself into a single pass unless we also want to integrate
823 reorg.c, since the branch splitting exposes new instructions with delay
827 shorten_branches (rtx first ATTRIBUTE_UNUSED
)
834 #ifdef HAVE_ATTR_length
835 #define MAX_CODE_ALIGN 16
837 int something_changed
= 1;
838 char *varying_length
;
841 rtx align_tab
[MAX_CODE_ALIGN
];
845 /* Compute maximum UID and allocate label_align / uid_shuid. */
846 max_uid
= get_max_uid ();
848 /* Free uid_shuid before reallocating it. */
851 uid_shuid
= XNEWVEC (int, max_uid
);
853 if (max_labelno
!= max_label_num ())
855 int old
= max_labelno
;
859 max_labelno
= max_label_num ();
861 n_labels
= max_labelno
- min_labelno
+ 1;
862 n_old_labels
= old
- min_labelno
+ 1;
864 label_align
= XRESIZEVEC (struct label_alignment
, label_align
, n_labels
);
866 /* Range of labels grows monotonically in the function. Failing here
867 means that the initialization of array got lost. */
868 gcc_assert (n_old_labels
<= n_labels
);
870 memset (label_align
+ n_old_labels
, 0,
871 (n_labels
- n_old_labels
) * sizeof (struct label_alignment
));
874 /* Initialize label_align and set up uid_shuid to be strictly
875 monotonically rising with insn order. */
876 /* We use max_log here to keep track of the maximum alignment we want to
877 impose on the next CODE_LABEL (or the current one if we are processing
878 the CODE_LABEL itself). */
883 for (insn
= get_insns (), i
= 1; insn
; insn
= NEXT_INSN (insn
))
887 INSN_SHUID (insn
) = i
++;
895 /* Merge in alignments computed by compute_alignments. */
896 log
= LABEL_TO_ALIGNMENT (insn
);
900 max_skip
= LABEL_TO_MAX_SKIP (insn
);
903 log
= LABEL_ALIGN (insn
);
907 max_skip
= LABEL_ALIGN_MAX_SKIP
;
909 next
= next_nonnote_insn (insn
);
910 /* ADDR_VECs only take room if read-only data goes into the text
912 if (JUMP_TABLES_IN_TEXT_SECTION
913 || readonly_data_section
== text_section
)
914 if (next
&& JUMP_P (next
))
916 rtx nextbody
= PATTERN (next
);
917 if (GET_CODE (nextbody
) == ADDR_VEC
918 || GET_CODE (nextbody
) == ADDR_DIFF_VEC
)
920 log
= ADDR_VEC_ALIGN (next
);
924 max_skip
= LABEL_ALIGN_MAX_SKIP
;
928 LABEL_TO_ALIGNMENT (insn
) = max_log
;
929 LABEL_TO_MAX_SKIP (insn
) = max_skip
;
933 else if (BARRIER_P (insn
))
937 for (label
= insn
; label
&& ! INSN_P (label
);
938 label
= NEXT_INSN (label
))
941 log
= LABEL_ALIGN_AFTER_BARRIER (insn
);
945 max_skip
= LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP
;
951 #ifdef HAVE_ATTR_length
953 /* Allocate the rest of the arrays. */
954 insn_lengths
= XNEWVEC (int, max_uid
);
955 insn_lengths_max_uid
= max_uid
;
956 /* Syntax errors can lead to labels being outside of the main insn stream.
957 Initialize insn_addresses, so that we get reproducible results. */
958 INSN_ADDRESSES_ALLOC (max_uid
);
960 varying_length
= XCNEWVEC (char, max_uid
);
962 /* Initialize uid_align. We scan instructions
963 from end to start, and keep in align_tab[n] the last seen insn
964 that does an alignment of at least n+1, i.e. the successor
965 in the alignment chain for an insn that does / has a known
967 uid_align
= XCNEWVEC (rtx
, max_uid
);
969 for (i
= MAX_CODE_ALIGN
; --i
>= 0;)
970 align_tab
[i
] = NULL_RTX
;
971 seq
= get_last_insn ();
972 for (; seq
; seq
= PREV_INSN (seq
))
974 int uid
= INSN_UID (seq
);
976 log
= (LABEL_P (seq
) ? LABEL_TO_ALIGNMENT (seq
) : 0);
977 uid_align
[uid
] = align_tab
[0];
980 /* Found an alignment label. */
981 uid_align
[uid
] = align_tab
[log
];
982 for (i
= log
- 1; i
>= 0; i
--)
986 #ifdef CASE_VECTOR_SHORTEN_MODE
989 /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum
992 int min_shuid
= INSN_SHUID (get_insns ()) - 1;
993 int max_shuid
= INSN_SHUID (get_last_insn ()) + 1;
996 for (insn
= first
; insn
!= 0; insn
= NEXT_INSN (insn
))
998 rtx min_lab
= NULL_RTX
, max_lab
= NULL_RTX
, pat
;
999 int len
, i
, min
, max
, insn_shuid
;
1001 addr_diff_vec_flags flags
;
1004 || GET_CODE (PATTERN (insn
)) != ADDR_DIFF_VEC
)
1006 pat
= PATTERN (insn
);
1007 len
= XVECLEN (pat
, 1);
1008 gcc_assert (len
> 0);
1009 min_align
= MAX_CODE_ALIGN
;
1010 for (min
= max_shuid
, max
= min_shuid
, i
= len
- 1; i
>= 0; i
--)
1012 rtx lab
= XEXP (XVECEXP (pat
, 1, i
), 0);
1013 int shuid
= INSN_SHUID (lab
);
1024 if (min_align
> LABEL_TO_ALIGNMENT (lab
))
1025 min_align
= LABEL_TO_ALIGNMENT (lab
);
1027 XEXP (pat
, 2) = gen_rtx_LABEL_REF (Pmode
, min_lab
);
1028 XEXP (pat
, 3) = gen_rtx_LABEL_REF (Pmode
, max_lab
);
1029 insn_shuid
= INSN_SHUID (insn
);
1030 rel
= INSN_SHUID (XEXP (XEXP (pat
, 0), 0));
1031 memset (&flags
, 0, sizeof (flags
));
1032 flags
.min_align
= min_align
;
1033 flags
.base_after_vec
= rel
> insn_shuid
;
1034 flags
.min_after_vec
= min
> insn_shuid
;
1035 flags
.max_after_vec
= max
> insn_shuid
;
1036 flags
.min_after_base
= min
> rel
;
1037 flags
.max_after_base
= max
> rel
;
1038 ADDR_DIFF_VEC_FLAGS (pat
) = flags
;
1041 #endif /* CASE_VECTOR_SHORTEN_MODE */
1043 /* Compute initial lengths, addresses, and varying flags for each insn. */
1044 for (insn_current_address
= 0, insn
= first
;
1046 insn_current_address
+= insn_lengths
[uid
], insn
= NEXT_INSN (insn
))
1048 uid
= INSN_UID (insn
);
1050 insn_lengths
[uid
] = 0;
1054 int log
= LABEL_TO_ALIGNMENT (insn
);
1057 int align
= 1 << log
;
1058 int new_address
= (insn_current_address
+ align
- 1) & -align
;
1059 insn_lengths
[uid
] = new_address
- insn_current_address
;
1063 INSN_ADDRESSES (uid
) = insn_current_address
+ insn_lengths
[uid
];
1065 if (NOTE_P (insn
) || BARRIER_P (insn
)
1068 if (INSN_DELETED_P (insn
))
1071 body
= PATTERN (insn
);
1072 if (GET_CODE (body
) == ADDR_VEC
|| GET_CODE (body
) == ADDR_DIFF_VEC
)
1074 /* This only takes room if read-only data goes into the text
1076 if (JUMP_TABLES_IN_TEXT_SECTION
1077 || readonly_data_section
== text_section
)
1078 insn_lengths
[uid
] = (XVECLEN (body
,
1079 GET_CODE (body
) == ADDR_DIFF_VEC
)
1080 * GET_MODE_SIZE (GET_MODE (body
)));
1081 /* Alignment is handled by ADDR_VEC_ALIGN. */
1083 else if (GET_CODE (body
) == ASM_INPUT
|| asm_noperands (body
) >= 0)
1084 insn_lengths
[uid
] = asm_insn_count (body
) * insn_default_length (insn
);
1085 else if (GET_CODE (body
) == SEQUENCE
)
1088 int const_delay_slots
;
1090 const_delay_slots
= const_num_delay_slots (XVECEXP (body
, 0, 0));
1092 const_delay_slots
= 0;
1094 /* Inside a delay slot sequence, we do not do any branch shortening
1095 if the shortening could change the number of delay slots
1097 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
1099 rtx inner_insn
= XVECEXP (body
, 0, i
);
1100 int inner_uid
= INSN_UID (inner_insn
);
1103 if (GET_CODE (body
) == ASM_INPUT
1104 || asm_noperands (PATTERN (XVECEXP (body
, 0, i
))) >= 0)
1105 inner_length
= (asm_insn_count (PATTERN (inner_insn
))
1106 * insn_default_length (inner_insn
));
1108 inner_length
= insn_default_length (inner_insn
);
1110 insn_lengths
[inner_uid
] = inner_length
;
1111 if (const_delay_slots
)
1113 if ((varying_length
[inner_uid
]
1114 = insn_variable_length_p (inner_insn
)) != 0)
1115 varying_length
[uid
] = 1;
1116 INSN_ADDRESSES (inner_uid
) = (insn_current_address
1117 + insn_lengths
[uid
]);
1120 varying_length
[inner_uid
] = 0;
1121 insn_lengths
[uid
] += inner_length
;
1124 else if (GET_CODE (body
) != USE
&& GET_CODE (body
) != CLOBBER
)
1126 insn_lengths
[uid
] = insn_default_length (insn
);
1127 varying_length
[uid
] = insn_variable_length_p (insn
);
1130 /* If needed, do any adjustment. */
1131 #ifdef ADJUST_INSN_LENGTH
1132 ADJUST_INSN_LENGTH (insn
, insn_lengths
[uid
]);
1133 if (insn_lengths
[uid
] < 0)
1134 fatal_insn ("negative insn length", insn
);
1138 /* Now loop over all the insns finding varying length insns. For each,
1139 get the current insn length. If it has changed, reflect the change.
1140 When nothing changes for a full pass, we are done. */
1142 while (something_changed
)
1144 something_changed
= 0;
1145 insn_current_align
= MAX_CODE_ALIGN
- 1;
1146 for (insn_current_address
= 0, insn
= first
;
1148 insn
= NEXT_INSN (insn
))
1151 #ifdef ADJUST_INSN_LENGTH
1156 uid
= INSN_UID (insn
);
1160 int log
= LABEL_TO_ALIGNMENT (insn
);
1161 if (log
> insn_current_align
)
1163 int align
= 1 << log
;
1164 int new_address
= (insn_current_address
+ align
- 1) & -align
;
1165 insn_lengths
[uid
] = new_address
- insn_current_address
;
1166 insn_current_align
= log
;
1167 insn_current_address
= new_address
;
1170 insn_lengths
[uid
] = 0;
1171 INSN_ADDRESSES (uid
) = insn_current_address
;
1175 length_align
= INSN_LENGTH_ALIGNMENT (insn
);
1176 if (length_align
< insn_current_align
)
1177 insn_current_align
= length_align
;
1179 insn_last_address
= INSN_ADDRESSES (uid
);
1180 INSN_ADDRESSES (uid
) = insn_current_address
;
1182 #ifdef CASE_VECTOR_SHORTEN_MODE
1183 if (optimize
&& JUMP_P (insn
)
1184 && GET_CODE (PATTERN (insn
)) == ADDR_DIFF_VEC
)
1186 rtx body
= PATTERN (insn
);
1187 int old_length
= insn_lengths
[uid
];
1188 rtx rel_lab
= XEXP (XEXP (body
, 0), 0);
1189 rtx min_lab
= XEXP (XEXP (body
, 2), 0);
1190 rtx max_lab
= XEXP (XEXP (body
, 3), 0);
1191 int rel_addr
= INSN_ADDRESSES (INSN_UID (rel_lab
));
1192 int min_addr
= INSN_ADDRESSES (INSN_UID (min_lab
));
1193 int max_addr
= INSN_ADDRESSES (INSN_UID (max_lab
));
1196 addr_diff_vec_flags flags
;
1198 /* Avoid automatic aggregate initialization. */
1199 flags
= ADDR_DIFF_VEC_FLAGS (body
);
1201 /* Try to find a known alignment for rel_lab. */
1202 for (prev
= rel_lab
;
1204 && ! insn_lengths
[INSN_UID (prev
)]
1205 && ! (varying_length
[INSN_UID (prev
)] & 1);
1206 prev
= PREV_INSN (prev
))
1207 if (varying_length
[INSN_UID (prev
)] & 2)
1209 rel_align
= LABEL_TO_ALIGNMENT (prev
);
1213 /* See the comment on addr_diff_vec_flags in rtl.h for the
1214 meaning of the flags values. base: REL_LAB vec: INSN */
1215 /* Anything after INSN has still addresses from the last
1216 pass; adjust these so that they reflect our current
1217 estimate for this pass. */
1218 if (flags
.base_after_vec
)
1219 rel_addr
+= insn_current_address
- insn_last_address
;
1220 if (flags
.min_after_vec
)
1221 min_addr
+= insn_current_address
- insn_last_address
;
1222 if (flags
.max_after_vec
)
1223 max_addr
+= insn_current_address
- insn_last_address
;
1224 /* We want to know the worst case, i.e. lowest possible value
1225 for the offset of MIN_LAB. If MIN_LAB is after REL_LAB,
1226 its offset is positive, and we have to be wary of code shrink;
1227 otherwise, it is negative, and we have to be vary of code
1229 if (flags
.min_after_base
)
1231 /* If INSN is between REL_LAB and MIN_LAB, the size
1232 changes we are about to make can change the alignment
1233 within the observed offset, therefore we have to break
1234 it up into two parts that are independent. */
1235 if (! flags
.base_after_vec
&& flags
.min_after_vec
)
1237 min_addr
-= align_fuzz (rel_lab
, insn
, rel_align
, 0);
1238 min_addr
-= align_fuzz (insn
, min_lab
, 0, 0);
1241 min_addr
-= align_fuzz (rel_lab
, min_lab
, rel_align
, 0);
1245 if (flags
.base_after_vec
&& ! flags
.min_after_vec
)
1247 min_addr
-= align_fuzz (min_lab
, insn
, 0, ~0);
1248 min_addr
-= align_fuzz (insn
, rel_lab
, 0, ~0);
1251 min_addr
-= align_fuzz (min_lab
, rel_lab
, 0, ~0);
1253 /* Likewise, determine the highest lowest possible value
1254 for the offset of MAX_LAB. */
1255 if (flags
.max_after_base
)
1257 if (! flags
.base_after_vec
&& flags
.max_after_vec
)
1259 max_addr
+= align_fuzz (rel_lab
, insn
, rel_align
, ~0);
1260 max_addr
+= align_fuzz (insn
, max_lab
, 0, ~0);
1263 max_addr
+= align_fuzz (rel_lab
, max_lab
, rel_align
, ~0);
1267 if (flags
.base_after_vec
&& ! flags
.max_after_vec
)
1269 max_addr
+= align_fuzz (max_lab
, insn
, 0, 0);
1270 max_addr
+= align_fuzz (insn
, rel_lab
, 0, 0);
1273 max_addr
+= align_fuzz (max_lab
, rel_lab
, 0, 0);
1275 PUT_MODE (body
, CASE_VECTOR_SHORTEN_MODE (min_addr
- rel_addr
,
1276 max_addr
- rel_addr
,
1278 if (JUMP_TABLES_IN_TEXT_SECTION
1279 || readonly_data_section
== text_section
)
1282 = (XVECLEN (body
, 1) * GET_MODE_SIZE (GET_MODE (body
)));
1283 insn_current_address
+= insn_lengths
[uid
];
1284 if (insn_lengths
[uid
] != old_length
)
1285 something_changed
= 1;
1290 #endif /* CASE_VECTOR_SHORTEN_MODE */
1292 if (! (varying_length
[uid
]))
1294 if (NONJUMP_INSN_P (insn
)
1295 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
1299 body
= PATTERN (insn
);
1300 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
1302 rtx inner_insn
= XVECEXP (body
, 0, i
);
1303 int inner_uid
= INSN_UID (inner_insn
);
1305 INSN_ADDRESSES (inner_uid
) = insn_current_address
;
1307 insn_current_address
+= insn_lengths
[inner_uid
];
1311 insn_current_address
+= insn_lengths
[uid
];
1316 if (NONJUMP_INSN_P (insn
) && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
1320 body
= PATTERN (insn
);
1322 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
1324 rtx inner_insn
= XVECEXP (body
, 0, i
);
1325 int inner_uid
= INSN_UID (inner_insn
);
1328 INSN_ADDRESSES (inner_uid
) = insn_current_address
;
1330 /* insn_current_length returns 0 for insns with a
1331 non-varying length. */
1332 if (! varying_length
[inner_uid
])
1333 inner_length
= insn_lengths
[inner_uid
];
1335 inner_length
= insn_current_length (inner_insn
);
1337 if (inner_length
!= insn_lengths
[inner_uid
])
1339 insn_lengths
[inner_uid
] = inner_length
;
1340 something_changed
= 1;
1342 insn_current_address
+= insn_lengths
[inner_uid
];
1343 new_length
+= inner_length
;
1348 new_length
= insn_current_length (insn
);
1349 insn_current_address
+= new_length
;
1352 #ifdef ADJUST_INSN_LENGTH
1353 /* If needed, do any adjustment. */
1354 tmp_length
= new_length
;
1355 ADJUST_INSN_LENGTH (insn
, new_length
);
1356 insn_current_address
+= (new_length
- tmp_length
);
1359 if (new_length
!= insn_lengths
[uid
])
1361 insn_lengths
[uid
] = new_length
;
1362 something_changed
= 1;
1365 /* For a non-optimizing compile, do only a single pass. */
1370 free (varying_length
);
1372 #endif /* HAVE_ATTR_length */
1375 #ifdef HAVE_ATTR_length
1376 /* Given the body of an INSN known to be generated by an ASM statement, return
1377 the number of machine instructions likely to be generated for this insn.
1378 This is used to compute its length. */
1381 asm_insn_count (rtx body
)
1386 if (GET_CODE (body
) == ASM_INPUT
)
1387 templ
= XSTR (body
, 0);
1389 templ
= decode_asm_operands (body
, NULL
, NULL
, NULL
, NULL
, NULL
);
1394 for (; *templ
; templ
++)
1395 if (IS_ASM_LOGICAL_LINE_SEPARATOR (*templ
, templ
)
1403 /* ??? This is probably the wrong place for these. */
1404 /* Structure recording the mapping from source file and directory
1405 names at compile time to those to be embedded in debug
1407 typedef struct debug_prefix_map
1409 const char *old_prefix
;
1410 const char *new_prefix
;
1413 struct debug_prefix_map
*next
;
1416 /* Linked list of such structures. */
1417 debug_prefix_map
*debug_prefix_maps
;
1420 /* Record a debug file prefix mapping. ARG is the argument to
1421 -fdebug-prefix-map and must be of the form OLD=NEW. */
1424 add_debug_prefix_map (const char *arg
)
1426 debug_prefix_map
*map
;
1429 p
= strchr (arg
, '=');
1432 error ("invalid argument %qs to -fdebug-prefix-map", arg
);
1435 map
= XNEW (debug_prefix_map
);
1436 map
->old_prefix
= ggc_alloc_string (arg
, p
- arg
);
1437 map
->old_len
= p
- arg
;
1439 map
->new_prefix
= ggc_strdup (p
);
1440 map
->new_len
= strlen (p
);
1441 map
->next
= debug_prefix_maps
;
1442 debug_prefix_maps
= map
;
1445 /* Perform user-specified mapping of debug filename prefixes. Return
1446 the new name corresponding to FILENAME. */
1449 remap_debug_filename (const char *filename
)
1451 debug_prefix_map
*map
;
1456 for (map
= debug_prefix_maps
; map
; map
= map
->next
)
1457 if (strncmp (filename
, map
->old_prefix
, map
->old_len
) == 0)
1461 name
= filename
+ map
->old_len
;
1462 name_len
= strlen (name
) + 1;
1463 s
= (char *) alloca (name_len
+ map
->new_len
);
1464 memcpy (s
, map
->new_prefix
, map
->new_len
);
1465 memcpy (s
+ map
->new_len
, name
, name_len
);
1466 return ggc_strdup (s
);
1469 /* Output assembler code for the start of a function,
1470 and initialize some of the variables in this file
1471 for the new function. The label for the function and associated
1472 assembler pseudo-ops have already been output in `assemble_start_function'.
1474 FIRST is the first insn of the rtl for the function being compiled.
1475 FILE is the file to write assembler code to.
1476 OPTIMIZE is nonzero if we should eliminate redundant
1477 test and compare insns. */
1480 final_start_function (rtx first ATTRIBUTE_UNUSED
, FILE *file
,
1481 int optimize ATTRIBUTE_UNUSED
)
1485 this_is_asm_operands
= 0;
1487 last_filename
= locator_file (prologue_locator
);
1488 last_linenum
= locator_line (prologue_locator
);
1490 high_block_linenum
= high_function_linenum
= last_linenum
;
1492 (*debug_hooks
->begin_prologue
) (last_linenum
, last_filename
);
1494 #if defined (DWARF2_UNWIND_INFO) || defined (TARGET_UNWIND_INFO)
1495 if (write_symbols
!= DWARF2_DEBUG
&& write_symbols
!= VMS_AND_DWARF2_DEBUG
)
1496 dwarf2out_begin_prologue (0, NULL
);
1499 #ifdef LEAF_REG_REMAP
1500 if (current_function_uses_only_leaf_regs
)
1501 leaf_renumber_regs (first
);
1504 /* The Sun386i and perhaps other machines don't work right
1505 if the profiling code comes after the prologue. */
1506 #ifdef PROFILE_BEFORE_PROLOGUE
1508 profile_function (file
);
1509 #endif /* PROFILE_BEFORE_PROLOGUE */
1511 #if defined (DWARF2_UNWIND_INFO) && defined (HAVE_prologue)
1512 if (dwarf2out_do_frame ())
1513 dwarf2out_frame_debug (NULL_RTX
, false);
1516 /* If debugging, assign block numbers to all of the blocks in this
1520 reemit_insn_block_notes ();
1521 number_blocks (current_function_decl
);
1522 /* We never actually put out begin/end notes for the top-level
1523 block in the function. But, conceptually, that block is
1525 TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl
)) = 1;
1528 if (warn_frame_larger_than
1529 && get_frame_size () > frame_larger_than_size
)
1531 /* Issue a warning */
1532 warning (OPT_Wframe_larger_than_
,
1533 "the frame size of %wd bytes is larger than %wd bytes",
1534 get_frame_size (), frame_larger_than_size
);
1537 /* First output the function prologue: code to set up the stack frame. */
1538 targetm
.asm_out
.function_prologue (file
, get_frame_size ());
1540 /* If the machine represents the prologue as RTL, the profiling code must
1541 be emitted when NOTE_INSN_PROLOGUE_END is scanned. */
1542 #ifdef HAVE_prologue
1543 if (! HAVE_prologue
)
1545 profile_after_prologue (file
);
1549 profile_after_prologue (FILE *file ATTRIBUTE_UNUSED
)
1551 #ifndef PROFILE_BEFORE_PROLOGUE
1553 profile_function (file
);
1554 #endif /* not PROFILE_BEFORE_PROLOGUE */
1558 profile_function (FILE *file ATTRIBUTE_UNUSED
)
1560 #ifndef NO_PROFILE_COUNTERS
1561 # define NO_PROFILE_COUNTERS 0
1563 #if defined(ASM_OUTPUT_REG_PUSH)
1564 int sval
= cfun
->returns_struct
;
1565 rtx svrtx
= targetm
.calls
.struct_value_rtx (TREE_TYPE (current_function_decl
), 1);
1566 #if defined(STATIC_CHAIN_INCOMING_REGNUM) || defined(STATIC_CHAIN_REGNUM)
1567 int cxt
= cfun
->static_chain_decl
!= NULL
;
1569 #endif /* ASM_OUTPUT_REG_PUSH */
1571 if (! NO_PROFILE_COUNTERS
)
1573 int align
= MIN (BIGGEST_ALIGNMENT
, LONG_TYPE_SIZE
);
1574 switch_to_section (data_section
);
1575 ASM_OUTPUT_ALIGN (file
, floor_log2 (align
/ BITS_PER_UNIT
));
1576 targetm
.asm_out
.internal_label (file
, "LP", current_function_funcdef_no
);
1577 assemble_integer (const0_rtx
, LONG_TYPE_SIZE
/ BITS_PER_UNIT
, align
, 1);
1580 switch_to_section (current_function_section ());
1582 #if defined(ASM_OUTPUT_REG_PUSH)
1583 if (sval
&& svrtx
!= NULL_RTX
&& REG_P (svrtx
))
1585 ASM_OUTPUT_REG_PUSH (file
, REGNO (svrtx
));
1589 #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1591 ASM_OUTPUT_REG_PUSH (file
, STATIC_CHAIN_INCOMING_REGNUM
);
1593 #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1596 ASM_OUTPUT_REG_PUSH (file
, STATIC_CHAIN_REGNUM
);
1601 FUNCTION_PROFILER (file
, current_function_funcdef_no
);
1603 #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1605 ASM_OUTPUT_REG_POP (file
, STATIC_CHAIN_INCOMING_REGNUM
);
1607 #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1610 ASM_OUTPUT_REG_POP (file
, STATIC_CHAIN_REGNUM
);
1615 #if defined(ASM_OUTPUT_REG_PUSH)
1616 if (sval
&& svrtx
!= NULL_RTX
&& REG_P (svrtx
))
1618 ASM_OUTPUT_REG_POP (file
, REGNO (svrtx
));
1623 /* Output assembler code for the end of a function.
1624 For clarity, args are same as those of `final_start_function'
1625 even though not all of them are needed. */
1628 final_end_function (void)
1632 (*debug_hooks
->end_function
) (high_function_linenum
);
1634 /* Finally, output the function epilogue:
1635 code to restore the stack frame and return to the caller. */
1636 targetm
.asm_out
.function_epilogue (asm_out_file
, get_frame_size ());
1638 /* And debug output. */
1639 (*debug_hooks
->end_epilogue
) (last_linenum
, last_filename
);
1641 #if defined (DWARF2_UNWIND_INFO)
1642 if (write_symbols
!= DWARF2_DEBUG
&& write_symbols
!= VMS_AND_DWARF2_DEBUG
1643 && dwarf2out_do_frame ())
1644 dwarf2out_end_epilogue (last_linenum
, last_filename
);
1648 /* Output assembler code for some insns: all or part of a function.
1649 For description of args, see `final_start_function', above. */
1652 final (rtx first
, FILE *file
, int optimize
)
1658 last_ignored_compare
= 0;
1660 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
1662 if (INSN_UID (insn
) > max_uid
) /* Find largest UID. */
1663 max_uid
= INSN_UID (insn
);
1665 /* If CC tracking across branches is enabled, record the insn which
1666 jumps to each branch only reached from one place. */
1667 if (optimize
&& JUMP_P (insn
))
1669 rtx lab
= JUMP_LABEL (insn
);
1670 if (lab
&& LABEL_NUSES (lab
) == 1)
1672 LABEL_REFS (lab
) = insn
;
1682 /* Output the insns. */
1683 for (insn
= first
; insn
;)
1685 #ifdef HAVE_ATTR_length
1686 if ((unsigned) INSN_UID (insn
) >= INSN_ADDRESSES_SIZE ())
1688 /* This can be triggered by bugs elsewhere in the compiler if
1689 new insns are created after init_insn_lengths is called. */
1690 gcc_assert (NOTE_P (insn
));
1691 insn_current_address
= -1;
1694 insn_current_address
= INSN_ADDRESSES (INSN_UID (insn
));
1695 #endif /* HAVE_ATTR_length */
1697 insn
= final_scan_insn (insn
, file
, optimize
, 0, &seen
);
1702 get_insn_template (int code
, rtx insn
)
1704 switch (insn_data
[code
].output_format
)
1706 case INSN_OUTPUT_FORMAT_SINGLE
:
1707 return insn_data
[code
].output
.single
;
1708 case INSN_OUTPUT_FORMAT_MULTI
:
1709 return insn_data
[code
].output
.multi
[which_alternative
];
1710 case INSN_OUTPUT_FORMAT_FUNCTION
:
1712 return (*insn_data
[code
].output
.function
) (recog_data
.operand
, insn
);
1719 /* Emit the appropriate declaration for an alternate-entry-point
1720 symbol represented by INSN, to FILE. INSN is a CODE_LABEL with
1721 LABEL_KIND != LABEL_NORMAL.
1723 The case fall-through in this function is intentional. */
1725 output_alternate_entry_point (FILE *file
, rtx insn
)
1727 const char *name
= LABEL_NAME (insn
);
1729 switch (LABEL_KIND (insn
))
1731 case LABEL_WEAK_ENTRY
:
1732 #ifdef ASM_WEAKEN_LABEL
1733 ASM_WEAKEN_LABEL (file
, name
);
1735 case LABEL_GLOBAL_ENTRY
:
1736 targetm
.asm_out
.globalize_label (file
, name
);
1737 case LABEL_STATIC_ENTRY
:
1738 #ifdef ASM_OUTPUT_TYPE_DIRECTIVE
1739 ASM_OUTPUT_TYPE_DIRECTIVE (file
, name
, "function");
1741 ASM_OUTPUT_LABEL (file
, name
);
1750 /* Given a CALL_INSN, find and return the nested CALL. */
1752 call_from_call_insn (rtx insn
)
1755 gcc_assert (CALL_P (insn
));
1758 while (GET_CODE (x
) != CALL
)
1760 switch (GET_CODE (x
))
1765 x
= COND_EXEC_CODE (x
);
1768 x
= XVECEXP (x
, 0, 0);
1778 /* The final scan for one insn, INSN.
1779 Args are same as in `final', except that INSN
1780 is the insn being scanned.
1781 Value returned is the next insn to be scanned.
1783 NOPEEPHOLES is the flag to disallow peephole processing (currently
1784 used for within delayed branch sequence output).
1786 SEEN is used to track the end of the prologue, for emitting
1787 debug information. We force the emission of a line note after
1788 both NOTE_INSN_PROLOGUE_END and NOTE_INSN_FUNCTION_BEG, or
1789 at the beginning of the second basic block, whichever comes
1793 final_scan_insn (rtx insn
, FILE *file
, int optimize ATTRIBUTE_UNUSED
,
1794 int nopeepholes ATTRIBUTE_UNUSED
, int *seen
)
1803 /* Ignore deleted insns. These can occur when we split insns (due to a
1804 template of "#") while not optimizing. */
1805 if (INSN_DELETED_P (insn
))
1806 return NEXT_INSN (insn
);
1808 switch (GET_CODE (insn
))
1811 switch (NOTE_KIND (insn
))
1813 case NOTE_INSN_DELETED
:
1816 case NOTE_INSN_SWITCH_TEXT_SECTIONS
:
1817 in_cold_section_p
= !in_cold_section_p
;
1818 #ifdef DWARF2_UNWIND_INFO
1819 if (dwarf2out_do_frame ())
1820 dwarf2out_switch_text_section ();
1823 (*debug_hooks
->switch_text_section
) ();
1825 switch_to_section (current_function_section ());
1828 case NOTE_INSN_BASIC_BLOCK
:
1829 #ifdef TARGET_UNWIND_INFO
1830 targetm
.asm_out
.unwind_emit (asm_out_file
, insn
);
1834 fprintf (asm_out_file
, "\t%s basic block %d\n",
1835 ASM_COMMENT_START
, NOTE_BASIC_BLOCK (insn
)->index
);
1837 if ((*seen
& (SEEN_EMITTED
| SEEN_BB
)) == SEEN_BB
)
1839 *seen
|= SEEN_EMITTED
;
1840 force_source_line
= true;
1847 case NOTE_INSN_EH_REGION_BEG
:
1848 ASM_OUTPUT_DEBUG_LABEL (asm_out_file
, "LEHB",
1849 NOTE_EH_HANDLER (insn
));
1852 case NOTE_INSN_EH_REGION_END
:
1853 ASM_OUTPUT_DEBUG_LABEL (asm_out_file
, "LEHE",
1854 NOTE_EH_HANDLER (insn
));
1857 case NOTE_INSN_PROLOGUE_END
:
1858 targetm
.asm_out
.function_end_prologue (file
);
1859 profile_after_prologue (file
);
1861 if ((*seen
& (SEEN_EMITTED
| SEEN_NOTE
)) == SEEN_NOTE
)
1863 *seen
|= SEEN_EMITTED
;
1864 force_source_line
= true;
1871 case NOTE_INSN_EPILOGUE_BEG
:
1872 targetm
.asm_out
.function_begin_epilogue (file
);
1875 case NOTE_INSN_FUNCTION_BEG
:
1877 (*debug_hooks
->end_prologue
) (last_linenum
, last_filename
);
1879 if ((*seen
& (SEEN_EMITTED
| SEEN_NOTE
)) == SEEN_NOTE
)
1881 *seen
|= SEEN_EMITTED
;
1882 force_source_line
= true;
1889 case NOTE_INSN_BLOCK_BEG
:
1890 if (debug_info_level
== DINFO_LEVEL_NORMAL
1891 || debug_info_level
== DINFO_LEVEL_VERBOSE
1892 || write_symbols
== DWARF2_DEBUG
1893 || write_symbols
== VMS_AND_DWARF2_DEBUG
1894 || write_symbols
== VMS_DEBUG
)
1896 int n
= BLOCK_NUMBER (NOTE_BLOCK (insn
));
1900 high_block_linenum
= last_linenum
;
1902 /* Output debugging info about the symbol-block beginning. */
1903 (*debug_hooks
->begin_block
) (last_linenum
, n
);
1905 /* Mark this block as output. */
1906 TREE_ASM_WRITTEN (NOTE_BLOCK (insn
)) = 1;
1908 if (write_symbols
== DBX_DEBUG
1909 || write_symbols
== SDB_DEBUG
)
1911 location_t
*locus_ptr
1912 = block_nonartificial_location (NOTE_BLOCK (insn
));
1914 if (locus_ptr
!= NULL
)
1916 override_filename
= LOCATION_FILE (*locus_ptr
);
1917 override_linenum
= LOCATION_LINE (*locus_ptr
);
1922 case NOTE_INSN_BLOCK_END
:
1923 if (debug_info_level
== DINFO_LEVEL_NORMAL
1924 || debug_info_level
== DINFO_LEVEL_VERBOSE
1925 || write_symbols
== DWARF2_DEBUG
1926 || write_symbols
== VMS_AND_DWARF2_DEBUG
1927 || write_symbols
== VMS_DEBUG
)
1929 int n
= BLOCK_NUMBER (NOTE_BLOCK (insn
));
1933 /* End of a symbol-block. */
1935 gcc_assert (block_depth
>= 0);
1937 (*debug_hooks
->end_block
) (high_block_linenum
, n
);
1939 if (write_symbols
== DBX_DEBUG
1940 || write_symbols
== SDB_DEBUG
)
1942 tree outer_block
= BLOCK_SUPERCONTEXT (NOTE_BLOCK (insn
));
1943 location_t
*locus_ptr
1944 = block_nonartificial_location (outer_block
);
1946 if (locus_ptr
!= NULL
)
1948 override_filename
= LOCATION_FILE (*locus_ptr
);
1949 override_linenum
= LOCATION_LINE (*locus_ptr
);
1953 override_filename
= NULL
;
1954 override_linenum
= 0;
1959 case NOTE_INSN_DELETED_LABEL
:
1960 /* Emit the label. We may have deleted the CODE_LABEL because
1961 the label could be proved to be unreachable, though still
1962 referenced (in the form of having its address taken. */
1963 ASM_OUTPUT_DEBUG_LABEL (file
, "L", CODE_LABEL_NUMBER (insn
));
1966 case NOTE_INSN_VAR_LOCATION
:
1967 (*debug_hooks
->var_location
) (insn
);
1977 #if defined (DWARF2_UNWIND_INFO)
1978 if (dwarf2out_do_frame ())
1979 dwarf2out_frame_debug (insn
, false);
1984 /* The target port might emit labels in the output function for
1985 some insn, e.g. sh.c output_branchy_insn. */
1986 if (CODE_LABEL_NUMBER (insn
) <= max_labelno
)
1988 int align
= LABEL_TO_ALIGNMENT (insn
);
1989 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
1990 int max_skip
= LABEL_TO_MAX_SKIP (insn
);
1993 if (align
&& NEXT_INSN (insn
))
1995 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
1996 ASM_OUTPUT_MAX_SKIP_ALIGN (file
, align
, max_skip
);
1998 #ifdef ASM_OUTPUT_ALIGN_WITH_NOP
1999 ASM_OUTPUT_ALIGN_WITH_NOP (file
, align
);
2001 ASM_OUTPUT_ALIGN (file
, align
);
2010 if (LABEL_NAME (insn
))
2011 (*debug_hooks
->label
) (insn
);
2015 next
= next_nonnote_insn (insn
);
2016 if (next
!= 0 && JUMP_P (next
))
2018 rtx nextbody
= PATTERN (next
);
2020 /* If this label is followed by a jump-table,
2021 make sure we put the label in the read-only section. Also
2022 possibly write the label and jump table together. */
2024 if (GET_CODE (nextbody
) == ADDR_VEC
2025 || GET_CODE (nextbody
) == ADDR_DIFF_VEC
)
2027 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2028 /* In this case, the case vector is being moved by the
2029 target, so don't output the label at all. Leave that
2030 to the back end macros. */
2032 if (! JUMP_TABLES_IN_TEXT_SECTION
)
2036 switch_to_section (targetm
.asm_out
.function_rodata_section
2037 (current_function_decl
));
2039 #ifdef ADDR_VEC_ALIGN
2040 log_align
= ADDR_VEC_ALIGN (next
);
2042 log_align
= exact_log2 (BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
);
2044 ASM_OUTPUT_ALIGN (file
, log_align
);
2047 switch_to_section (current_function_section ());
2049 #ifdef ASM_OUTPUT_CASE_LABEL
2050 ASM_OUTPUT_CASE_LABEL (file
, "L", CODE_LABEL_NUMBER (insn
),
2053 targetm
.asm_out
.internal_label (file
, "L", CODE_LABEL_NUMBER (insn
));
2059 if (LABEL_ALT_ENTRY_P (insn
))
2060 output_alternate_entry_point (file
, insn
);
2062 targetm
.asm_out
.internal_label (file
, "L", CODE_LABEL_NUMBER (insn
));
2067 rtx body
= PATTERN (insn
);
2068 int insn_code_number
;
2071 #ifdef HAVE_conditional_execution
2072 /* Reset this early so it is correct for ASM statements. */
2073 current_insn_predicate
= NULL_RTX
;
2075 /* An INSN, JUMP_INSN or CALL_INSN.
2076 First check for special kinds that recog doesn't recognize. */
2078 if (GET_CODE (body
) == USE
/* These are just declarations. */
2079 || GET_CODE (body
) == CLOBBER
)
2084 /* If there is a REG_CC_SETTER note on this insn, it means that
2085 the setting of the condition code was done in the delay slot
2086 of the insn that branched here. So recover the cc status
2087 from the insn that set it. */
2089 rtx note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
2092 NOTICE_UPDATE_CC (PATTERN (XEXP (note
, 0)), XEXP (note
, 0));
2093 cc_prev_status
= cc_status
;
2098 /* Detect insns that are really jump-tables
2099 and output them as such. */
2101 if (GET_CODE (body
) == ADDR_VEC
|| GET_CODE (body
) == ADDR_DIFF_VEC
)
2103 #if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC))
2107 if (! JUMP_TABLES_IN_TEXT_SECTION
)
2108 switch_to_section (targetm
.asm_out
.function_rodata_section
2109 (current_function_decl
));
2111 switch_to_section (current_function_section ());
2115 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2116 if (GET_CODE (body
) == ADDR_VEC
)
2118 #ifdef ASM_OUTPUT_ADDR_VEC
2119 ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn
), body
);
2126 #ifdef ASM_OUTPUT_ADDR_DIFF_VEC
2127 ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn
), body
);
2133 vlen
= XVECLEN (body
, GET_CODE (body
) == ADDR_DIFF_VEC
);
2134 for (idx
= 0; idx
< vlen
; idx
++)
2136 if (GET_CODE (body
) == ADDR_VEC
)
2138 #ifdef ASM_OUTPUT_ADDR_VEC_ELT
2139 ASM_OUTPUT_ADDR_VEC_ELT
2140 (file
, CODE_LABEL_NUMBER (XEXP (XVECEXP (body
, 0, idx
), 0)));
2147 #ifdef ASM_OUTPUT_ADDR_DIFF_ELT
2148 ASM_OUTPUT_ADDR_DIFF_ELT
2151 CODE_LABEL_NUMBER (XEXP (XVECEXP (body
, 1, idx
), 0)),
2152 CODE_LABEL_NUMBER (XEXP (XEXP (body
, 0), 0)));
2158 #ifdef ASM_OUTPUT_CASE_END
2159 ASM_OUTPUT_CASE_END (file
,
2160 CODE_LABEL_NUMBER (PREV_INSN (insn
)),
2165 switch_to_section (current_function_section ());
2169 /* Output this line note if it is the first or the last line
2171 if (notice_source_line (insn
))
2173 (*debug_hooks
->source_line
) (last_linenum
, last_filename
);
2176 if (GET_CODE (body
) == ASM_INPUT
)
2178 const char *string
= XSTR (body
, 0);
2180 /* There's no telling what that did to the condition codes. */
2185 expanded_location loc
;
2188 loc
= expand_location (ASM_INPUT_SOURCE_LOCATION (body
));
2189 if (*loc
.file
&& loc
.line
)
2190 fprintf (asm_out_file
, "%s %i \"%s\" 1\n",
2191 ASM_COMMENT_START
, loc
.line
, loc
.file
);
2192 fprintf (asm_out_file
, "\t%s\n", string
);
2193 #if HAVE_AS_LINE_ZERO
2194 if (*loc
.file
&& loc
.line
)
2195 fprintf (asm_out_file
, "%s 0 \"\" 2\n", ASM_COMMENT_START
);
2201 /* Detect `asm' construct with operands. */
2202 if (asm_noperands (body
) >= 0)
2204 unsigned int noperands
= asm_noperands (body
);
2205 rtx
*ops
= XALLOCAVEC (rtx
, noperands
);
2208 expanded_location expanded
;
2210 /* There's no telling what that did to the condition codes. */
2213 /* Get out the operand values. */
2214 string
= decode_asm_operands (body
, ops
, NULL
, NULL
, NULL
, &loc
);
2215 /* Inhibit dying on what would otherwise be compiler bugs. */
2216 insn_noperands
= noperands
;
2217 this_is_asm_operands
= insn
;
2218 expanded
= expand_location (loc
);
2220 #ifdef FINAL_PRESCAN_INSN
2221 FINAL_PRESCAN_INSN (insn
, ops
, insn_noperands
);
2224 /* Output the insn using them. */
2228 if (expanded
.file
&& expanded
.line
)
2229 fprintf (asm_out_file
, "%s %i \"%s\" 1\n",
2230 ASM_COMMENT_START
, expanded
.line
, expanded
.file
);
2231 output_asm_insn (string
, ops
);
2232 #if HAVE_AS_LINE_ZERO
2233 if (expanded
.file
&& expanded
.line
)
2234 fprintf (asm_out_file
, "%s 0 \"\" 2\n", ASM_COMMENT_START
);
2238 if (targetm
.asm_out
.final_postscan_insn
)
2239 targetm
.asm_out
.final_postscan_insn (file
, insn
, ops
,
2242 this_is_asm_operands
= 0;
2248 if (GET_CODE (body
) == SEQUENCE
)
2250 /* A delayed-branch sequence */
2253 final_sequence
= body
;
2255 /* Record the delay slots' frame information before the branch.
2256 This is needed for delayed calls: see execute_cfa_program(). */
2257 #if defined (DWARF2_UNWIND_INFO)
2258 if (dwarf2out_do_frame ())
2259 for (i
= 1; i
< XVECLEN (body
, 0); i
++)
2260 dwarf2out_frame_debug (XVECEXP (body
, 0, i
), false);
2263 /* The first insn in this SEQUENCE might be a JUMP_INSN that will
2264 force the restoration of a comparison that was previously
2265 thought unnecessary. If that happens, cancel this sequence
2266 and cause that insn to be restored. */
2268 next
= final_scan_insn (XVECEXP (body
, 0, 0), file
, 0, 1, seen
);
2269 if (next
!= XVECEXP (body
, 0, 1))
2275 for (i
= 1; i
< XVECLEN (body
, 0); i
++)
2277 rtx insn
= XVECEXP (body
, 0, i
);
2278 rtx next
= NEXT_INSN (insn
);
2279 /* We loop in case any instruction in a delay slot gets
2282 insn
= final_scan_insn (insn
, file
, 0, 1, seen
);
2283 while (insn
!= next
);
2285 #ifdef DBR_OUTPUT_SEQEND
2286 DBR_OUTPUT_SEQEND (file
);
2290 /* If the insn requiring the delay slot was a CALL_INSN, the
2291 insns in the delay slot are actually executed before the
2292 called function. Hence we don't preserve any CC-setting
2293 actions in these insns and the CC must be marked as being
2294 clobbered by the function. */
2295 if (CALL_P (XVECEXP (body
, 0, 0)))
2302 /* We have a real machine instruction as rtl. */
2304 body
= PATTERN (insn
);
2307 set
= single_set (insn
);
2309 /* Check for redundant test and compare instructions
2310 (when the condition codes are already set up as desired).
2311 This is done only when optimizing; if not optimizing,
2312 it should be possible for the user to alter a variable
2313 with the debugger in between statements
2314 and the next statement should reexamine the variable
2315 to compute the condition codes. */
2320 && GET_CODE (SET_DEST (set
)) == CC0
2321 && insn
!= last_ignored_compare
)
2324 if (GET_CODE (SET_SRC (set
)) == SUBREG
)
2325 SET_SRC (set
) = alter_subreg (&SET_SRC (set
));
2327 src1
= SET_SRC (set
);
2329 if (GET_CODE (SET_SRC (set
)) == COMPARE
)
2331 if (GET_CODE (XEXP (SET_SRC (set
), 0)) == SUBREG
)
2332 XEXP (SET_SRC (set
), 0)
2333 = alter_subreg (&XEXP (SET_SRC (set
), 0));
2334 if (GET_CODE (XEXP (SET_SRC (set
), 1)) == SUBREG
)
2335 XEXP (SET_SRC (set
), 1)
2336 = alter_subreg (&XEXP (SET_SRC (set
), 1));
2337 if (XEXP (SET_SRC (set
), 1)
2338 == CONST0_RTX (GET_MODE (XEXP (SET_SRC (set
), 0))))
2339 src2
= XEXP (SET_SRC (set
), 0);
2341 if ((cc_status
.value1
!= 0
2342 && rtx_equal_p (src1
, cc_status
.value1
))
2343 || (cc_status
.value2
!= 0
2344 && rtx_equal_p (src1
, cc_status
.value2
))
2345 || (src2
!= 0 && cc_status
.value1
!= 0
2346 && rtx_equal_p (src2
, cc_status
.value1
))
2347 || (src2
!= 0 && cc_status
.value2
!= 0
2348 && rtx_equal_p (src2
, cc_status
.value2
)))
2350 /* Don't delete insn if it has an addressing side-effect. */
2351 if (! FIND_REG_INC_NOTE (insn
, NULL_RTX
)
2352 /* or if anything in it is volatile. */
2353 && ! volatile_refs_p (PATTERN (insn
)))
2355 /* We don't really delete the insn; just ignore it. */
2356 last_ignored_compare
= insn
;
2363 /* If this is a conditional branch, maybe modify it
2364 if the cc's are in a nonstandard state
2365 so that it accomplishes the same thing that it would
2366 do straightforwardly if the cc's were set up normally. */
2368 if (cc_status
.flags
!= 0
2370 && GET_CODE (body
) == SET
2371 && SET_DEST (body
) == pc_rtx
2372 && GET_CODE (SET_SRC (body
)) == IF_THEN_ELSE
2373 && COMPARISON_P (XEXP (SET_SRC (body
), 0))
2374 && XEXP (XEXP (SET_SRC (body
), 0), 0) == cc0_rtx
)
2376 /* This function may alter the contents of its argument
2377 and clear some of the cc_status.flags bits.
2378 It may also return 1 meaning condition now always true
2379 or -1 meaning condition now always false
2380 or 2 meaning condition nontrivial but altered. */
2381 int result
= alter_cond (XEXP (SET_SRC (body
), 0));
2382 /* If condition now has fixed value, replace the IF_THEN_ELSE
2383 with its then-operand or its else-operand. */
2385 SET_SRC (body
) = XEXP (SET_SRC (body
), 1);
2387 SET_SRC (body
) = XEXP (SET_SRC (body
), 2);
2389 /* The jump is now either unconditional or a no-op.
2390 If it has become a no-op, don't try to output it.
2391 (It would not be recognized.) */
2392 if (SET_SRC (body
) == pc_rtx
)
2397 else if (GET_CODE (SET_SRC (body
)) == RETURN
)
2398 /* Replace (set (pc) (return)) with (return). */
2399 PATTERN (insn
) = body
= SET_SRC (body
);
2401 /* Rerecognize the instruction if it has changed. */
2403 INSN_CODE (insn
) = -1;
2406 /* If this is a conditional trap, maybe modify it if the cc's
2407 are in a nonstandard state so that it accomplishes the same
2408 thing that it would do straightforwardly if the cc's were
2410 if (cc_status
.flags
!= 0
2411 && NONJUMP_INSN_P (insn
)
2412 && GET_CODE (body
) == TRAP_IF
2413 && COMPARISON_P (TRAP_CONDITION (body
))
2414 && XEXP (TRAP_CONDITION (body
), 0) == cc0_rtx
)
2416 /* This function may alter the contents of its argument
2417 and clear some of the cc_status.flags bits.
2418 It may also return 1 meaning condition now always true
2419 or -1 meaning condition now always false
2420 or 2 meaning condition nontrivial but altered. */
2421 int result
= alter_cond (TRAP_CONDITION (body
));
2423 /* If TRAP_CONDITION has become always false, delete the
2431 /* If TRAP_CONDITION has become always true, replace
2432 TRAP_CONDITION with const_true_rtx. */
2434 TRAP_CONDITION (body
) = const_true_rtx
;
2436 /* Rerecognize the instruction if it has changed. */
2438 INSN_CODE (insn
) = -1;
2441 /* Make same adjustments to instructions that examine the
2442 condition codes without jumping and instructions that
2443 handle conditional moves (if this machine has either one). */
2445 if (cc_status
.flags
!= 0
2448 rtx cond_rtx
, then_rtx
, else_rtx
;
2451 && GET_CODE (SET_SRC (set
)) == IF_THEN_ELSE
)
2453 cond_rtx
= XEXP (SET_SRC (set
), 0);
2454 then_rtx
= XEXP (SET_SRC (set
), 1);
2455 else_rtx
= XEXP (SET_SRC (set
), 2);
2459 cond_rtx
= SET_SRC (set
);
2460 then_rtx
= const_true_rtx
;
2461 else_rtx
= const0_rtx
;
2464 switch (GET_CODE (cond_rtx
))
2478 if (XEXP (cond_rtx
, 0) != cc0_rtx
)
2480 result
= alter_cond (cond_rtx
);
2482 validate_change (insn
, &SET_SRC (set
), then_rtx
, 0);
2483 else if (result
== -1)
2484 validate_change (insn
, &SET_SRC (set
), else_rtx
, 0);
2485 else if (result
== 2)
2486 INSN_CODE (insn
) = -1;
2487 if (SET_DEST (set
) == SET_SRC (set
))
2499 #ifdef HAVE_peephole
2500 /* Do machine-specific peephole optimizations if desired. */
2502 if (optimize
&& !flag_no_peephole
&& !nopeepholes
)
2504 rtx next
= peephole (insn
);
2505 /* When peepholing, if there were notes within the peephole,
2506 emit them before the peephole. */
2507 if (next
!= 0 && next
!= NEXT_INSN (insn
))
2509 rtx note
, prev
= PREV_INSN (insn
);
2511 for (note
= NEXT_INSN (insn
); note
!= next
;
2512 note
= NEXT_INSN (note
))
2513 final_scan_insn (note
, file
, optimize
, nopeepholes
, seen
);
2515 /* Put the notes in the proper position for a later
2516 rescan. For example, the SH target can do this
2517 when generating a far jump in a delayed branch
2519 note
= NEXT_INSN (insn
);
2520 PREV_INSN (note
) = prev
;
2521 NEXT_INSN (prev
) = note
;
2522 NEXT_INSN (PREV_INSN (next
)) = insn
;
2523 PREV_INSN (insn
) = PREV_INSN (next
);
2524 NEXT_INSN (insn
) = next
;
2525 PREV_INSN (next
) = insn
;
2528 /* PEEPHOLE might have changed this. */
2529 body
= PATTERN (insn
);
2533 /* Try to recognize the instruction.
2534 If successful, verify that the operands satisfy the
2535 constraints for the instruction. Crash if they don't,
2536 since `reload' should have changed them so that they do. */
2538 insn_code_number
= recog_memoized (insn
);
2539 cleanup_subreg_operands (insn
);
2541 /* Dump the insn in the assembly for debugging. */
2542 if (flag_dump_rtl_in_asm
)
2544 print_rtx_head
= ASM_COMMENT_START
;
2545 print_rtl_single (asm_out_file
, insn
);
2546 print_rtx_head
= "";
2549 if (! constrain_operands_cached (1))
2550 fatal_insn_not_found (insn
);
2552 /* Some target machines need to prescan each insn before
2555 #ifdef FINAL_PRESCAN_INSN
2556 FINAL_PRESCAN_INSN (insn
, recog_data
.operand
, recog_data
.n_operands
);
2559 #ifdef HAVE_conditional_execution
2560 if (GET_CODE (PATTERN (insn
)) == COND_EXEC
)
2561 current_insn_predicate
= COND_EXEC_TEST (PATTERN (insn
));
2565 cc_prev_status
= cc_status
;
2567 /* Update `cc_status' for this instruction.
2568 The instruction's output routine may change it further.
2569 If the output routine for a jump insn needs to depend
2570 on the cc status, it should look at cc_prev_status. */
2572 NOTICE_UPDATE_CC (body
, insn
);
2575 current_output_insn
= debug_insn
= insn
;
2577 #if defined (DWARF2_UNWIND_INFO)
2578 if (CALL_P (insn
) && dwarf2out_do_frame ())
2579 dwarf2out_frame_debug (insn
, false);
2582 /* Find the proper template for this insn. */
2583 templ
= get_insn_template (insn_code_number
, insn
);
2585 /* If the C code returns 0, it means that it is a jump insn
2586 which follows a deleted test insn, and that test insn
2587 needs to be reinserted. */
2592 gcc_assert (prev_nonnote_insn (insn
) == last_ignored_compare
);
2594 /* We have already processed the notes between the setter and
2595 the user. Make sure we don't process them again, this is
2596 particularly important if one of the notes is a block
2597 scope note or an EH note. */
2599 prev
!= last_ignored_compare
;
2600 prev
= PREV_INSN (prev
))
2603 delete_insn (prev
); /* Use delete_note. */
2609 /* If the template is the string "#", it means that this insn must
2611 if (templ
[0] == '#' && templ
[1] == '\0')
2613 rtx new_rtx
= try_split (body
, insn
, 0);
2615 /* If we didn't split the insn, go away. */
2616 if (new_rtx
== insn
&& PATTERN (new_rtx
) == body
)
2617 fatal_insn ("could not split insn", insn
);
2619 #ifdef HAVE_ATTR_length
2620 /* This instruction should have been split in shorten_branches,
2621 to ensure that we would have valid length info for the
2629 #ifdef TARGET_UNWIND_INFO
2630 /* ??? This will put the directives in the wrong place if
2631 get_insn_template outputs assembly directly. However calling it
2632 before get_insn_template breaks if the insns is split. */
2633 targetm
.asm_out
.unwind_emit (asm_out_file
, insn
);
2638 rtx x
= call_from_call_insn (insn
);
2640 if (x
&& MEM_P (x
) && GET_CODE (XEXP (x
, 0)) == SYMBOL_REF
)
2644 t
= SYMBOL_REF_DECL (x
);
2646 assemble_external (t
);
2650 /* Output assembler code from the template. */
2651 output_asm_insn (templ
, recog_data
.operand
);
2653 /* Some target machines need to postscan each insn after
2655 if (targetm
.asm_out
.final_postscan_insn
)
2656 targetm
.asm_out
.final_postscan_insn (file
, insn
, recog_data
.operand
,
2657 recog_data
.n_operands
);
2659 /* If necessary, report the effect that the instruction has on
2660 the unwind info. We've already done this for delay slots
2661 and call instructions. */
2662 #if defined (DWARF2_UNWIND_INFO)
2663 if (final_sequence
== 0
2664 #if !defined (HAVE_prologue)
2665 && !ACCUMULATE_OUTGOING_ARGS
2667 && dwarf2out_do_frame ())
2668 dwarf2out_frame_debug (insn
, true);
2671 current_output_insn
= debug_insn
= 0;
2674 return NEXT_INSN (insn
);
2677 /* Return whether a source line note needs to be emitted before INSN. */
2680 notice_source_line (rtx insn
)
2682 const char *filename
;
2685 if (override_filename
)
2687 filename
= override_filename
;
2688 linenum
= override_linenum
;
2692 filename
= insn_file (insn
);
2693 linenum
= insn_line (insn
);
2697 && (force_source_line
2698 || filename
!= last_filename
2699 || last_linenum
!= linenum
))
2701 force_source_line
= false;
2702 last_filename
= filename
;
2703 last_linenum
= linenum
;
2704 high_block_linenum
= MAX (last_linenum
, high_block_linenum
);
2705 high_function_linenum
= MAX (last_linenum
, high_function_linenum
);
2711 /* For each operand in INSN, simplify (subreg (reg)) so that it refers
2712 directly to the desired hard register. */
2715 cleanup_subreg_operands (rtx insn
)
2718 bool changed
= false;
2719 extract_insn_cached (insn
);
2720 for (i
= 0; i
< recog_data
.n_operands
; i
++)
2722 /* The following test cannot use recog_data.operand when testing
2723 for a SUBREG: the underlying object might have been changed
2724 already if we are inside a match_operator expression that
2725 matches the else clause. Instead we test the underlying
2726 expression directly. */
2727 if (GET_CODE (*recog_data
.operand_loc
[i
]) == SUBREG
)
2729 recog_data
.operand
[i
] = alter_subreg (recog_data
.operand_loc
[i
]);
2732 else if (GET_CODE (recog_data
.operand
[i
]) == PLUS
2733 || GET_CODE (recog_data
.operand
[i
]) == MULT
2734 || MEM_P (recog_data
.operand
[i
]))
2735 recog_data
.operand
[i
] = walk_alter_subreg (recog_data
.operand_loc
[i
], &changed
);
2738 for (i
= 0; i
< recog_data
.n_dups
; i
++)
2740 if (GET_CODE (*recog_data
.dup_loc
[i
]) == SUBREG
)
2742 *recog_data
.dup_loc
[i
] = alter_subreg (recog_data
.dup_loc
[i
]);
2745 else if (GET_CODE (*recog_data
.dup_loc
[i
]) == PLUS
2746 || GET_CODE (*recog_data
.dup_loc
[i
]) == MULT
2747 || MEM_P (*recog_data
.dup_loc
[i
]))
2748 *recog_data
.dup_loc
[i
] = walk_alter_subreg (recog_data
.dup_loc
[i
], &changed
);
2751 df_insn_rescan (insn
);
2754 /* If X is a SUBREG, replace it with a REG or a MEM,
2755 based on the thing it is a subreg of. */
2758 alter_subreg (rtx
*xp
)
2761 rtx y
= SUBREG_REG (x
);
2763 /* simplify_subreg does not remove subreg from volatile references.
2764 We are required to. */
2767 int offset
= SUBREG_BYTE (x
);
2769 /* For paradoxical subregs on big-endian machines, SUBREG_BYTE
2770 contains 0 instead of the proper offset. See simplify_subreg. */
2772 && GET_MODE_SIZE (GET_MODE (y
)) < GET_MODE_SIZE (GET_MODE (x
)))
2774 int difference
= GET_MODE_SIZE (GET_MODE (y
))
2775 - GET_MODE_SIZE (GET_MODE (x
));
2776 if (WORDS_BIG_ENDIAN
)
2777 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
2778 if (BYTES_BIG_ENDIAN
)
2779 offset
+= difference
% UNITS_PER_WORD
;
2782 *xp
= adjust_address (y
, GET_MODE (x
), offset
);
2786 rtx new_rtx
= simplify_subreg (GET_MODE (x
), y
, GET_MODE (y
),
2793 /* Simplify_subreg can't handle some REG cases, but we have to. */
2795 HOST_WIDE_INT offset
;
2797 regno
= subreg_regno (x
);
2798 if (subreg_lowpart_p (x
))
2799 offset
= byte_lowpart_offset (GET_MODE (x
), GET_MODE (y
));
2801 offset
= SUBREG_BYTE (x
);
2802 *xp
= gen_rtx_REG_offset (y
, GET_MODE (x
), regno
, offset
);
2809 /* Do alter_subreg on all the SUBREGs contained in X. */
2812 walk_alter_subreg (rtx
*xp
, bool *changed
)
2815 switch (GET_CODE (x
))
2820 XEXP (x
, 0) = walk_alter_subreg (&XEXP (x
, 0), changed
);
2821 XEXP (x
, 1) = walk_alter_subreg (&XEXP (x
, 1), changed
);
2826 XEXP (x
, 0) = walk_alter_subreg (&XEXP (x
, 0), changed
);
2831 return alter_subreg (xp
);
2842 /* Given BODY, the body of a jump instruction, alter the jump condition
2843 as required by the bits that are set in cc_status.flags.
2844 Not all of the bits there can be handled at this level in all cases.
2846 The value is normally 0.
2847 1 means that the condition has become always true.
2848 -1 means that the condition has become always false.
2849 2 means that COND has been altered. */
2852 alter_cond (rtx cond
)
2856 if (cc_status
.flags
& CC_REVERSED
)
2859 PUT_CODE (cond
, swap_condition (GET_CODE (cond
)));
2862 if (cc_status
.flags
& CC_INVERTED
)
2865 PUT_CODE (cond
, reverse_condition (GET_CODE (cond
)));
2868 if (cc_status
.flags
& CC_NOT_POSITIVE
)
2869 switch (GET_CODE (cond
))
2874 /* Jump becomes unconditional. */
2880 /* Jump becomes no-op. */
2884 PUT_CODE (cond
, EQ
);
2889 PUT_CODE (cond
, NE
);
2897 if (cc_status
.flags
& CC_NOT_NEGATIVE
)
2898 switch (GET_CODE (cond
))
2902 /* Jump becomes unconditional. */
2907 /* Jump becomes no-op. */
2912 PUT_CODE (cond
, EQ
);
2918 PUT_CODE (cond
, NE
);
2926 if (cc_status
.flags
& CC_NO_OVERFLOW
)
2927 switch (GET_CODE (cond
))
2930 /* Jump becomes unconditional. */
2934 PUT_CODE (cond
, EQ
);
2939 PUT_CODE (cond
, NE
);
2944 /* Jump becomes no-op. */
2951 if (cc_status
.flags
& (CC_Z_IN_NOT_N
| CC_Z_IN_N
))
2952 switch (GET_CODE (cond
))
2958 PUT_CODE (cond
, cc_status
.flags
& CC_Z_IN_N
? GE
: LT
);
2963 PUT_CODE (cond
, cc_status
.flags
& CC_Z_IN_N
? LT
: GE
);
2968 if (cc_status
.flags
& CC_NOT_SIGNED
)
2969 /* The flags are valid if signed condition operators are converted
2971 switch (GET_CODE (cond
))
2974 PUT_CODE (cond
, LEU
);
2979 PUT_CODE (cond
, LTU
);
2984 PUT_CODE (cond
, GTU
);
2989 PUT_CODE (cond
, GEU
);
3001 /* Report inconsistency between the assembler template and the operands.
3002 In an `asm', it's the user's fault; otherwise, the compiler's fault. */
3005 output_operand_lossage (const char *cmsgid
, ...)
3009 const char *pfx_str
;
3012 va_start (ap
, cmsgid
);
3014 pfx_str
= this_is_asm_operands
? _("invalid 'asm': ") : "output_operand: ";
3015 asprintf (&fmt_string
, "%s%s", pfx_str
, _(cmsgid
));
3016 vasprintf (&new_message
, fmt_string
, ap
);
3018 if (this_is_asm_operands
)
3019 error_for_asm (this_is_asm_operands
, "%s", new_message
);
3021 internal_error ("%s", new_message
);
3028 /* Output of assembler code from a template, and its subroutines. */
3030 /* Annotate the assembly with a comment describing the pattern and
3031 alternative used. */
3034 output_asm_name (void)
3038 int num
= INSN_CODE (debug_insn
);
3039 fprintf (asm_out_file
, "\t%s %d\t%s",
3040 ASM_COMMENT_START
, INSN_UID (debug_insn
),
3041 insn_data
[num
].name
);
3042 if (insn_data
[num
].n_alternatives
> 1)
3043 fprintf (asm_out_file
, "/%d", which_alternative
+ 1);
3044 #ifdef HAVE_ATTR_length
3045 fprintf (asm_out_file
, "\t[length = %d]",
3046 get_attr_length (debug_insn
));
3048 /* Clear this so only the first assembler insn
3049 of any rtl insn will get the special comment for -dp. */
3054 /* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it
3055 or its address, return that expr . Set *PADDRESSP to 1 if the expr
3056 corresponds to the address of the object and 0 if to the object. */
3059 get_mem_expr_from_op (rtx op
, int *paddressp
)
3067 return REG_EXPR (op
);
3068 else if (!MEM_P (op
))
3071 if (MEM_EXPR (op
) != 0)
3072 return MEM_EXPR (op
);
3074 /* Otherwise we have an address, so indicate it and look at the address. */
3078 /* First check if we have a decl for the address, then look at the right side
3079 if it is a PLUS. Otherwise, strip off arithmetic and keep looking.
3080 But don't allow the address to itself be indirect. */
3081 if ((expr
= get_mem_expr_from_op (op
, &inner_addressp
)) && ! inner_addressp
)
3083 else if (GET_CODE (op
) == PLUS
3084 && (expr
= get_mem_expr_from_op (XEXP (op
, 1), &inner_addressp
)))
3087 while (GET_RTX_CLASS (GET_CODE (op
)) == RTX_UNARY
3088 || GET_RTX_CLASS (GET_CODE (op
)) == RTX_BIN_ARITH
)
3091 expr
= get_mem_expr_from_op (op
, &inner_addressp
);
3092 return inner_addressp
? 0 : expr
;
3095 /* Output operand names for assembler instructions. OPERANDS is the
3096 operand vector, OPORDER is the order to write the operands, and NOPS
3097 is the number of operands to write. */
3100 output_asm_operand_names (rtx
*operands
, int *oporder
, int nops
)
3105 for (i
= 0; i
< nops
; i
++)
3108 rtx op
= operands
[oporder
[i
]];
3109 tree expr
= get_mem_expr_from_op (op
, &addressp
);
3111 fprintf (asm_out_file
, "%c%s",
3112 wrote
? ',' : '\t', wrote
? "" : ASM_COMMENT_START
);
3116 fprintf (asm_out_file
, "%s",
3117 addressp
? "*" : "");
3118 print_mem_expr (asm_out_file
, expr
);
3121 else if (REG_P (op
) && ORIGINAL_REGNO (op
)
3122 && ORIGINAL_REGNO (op
) != REGNO (op
))
3123 fprintf (asm_out_file
, " tmp%i", ORIGINAL_REGNO (op
));
3127 /* Output text from TEMPLATE to the assembler output file,
3128 obeying %-directions to substitute operands taken from
3129 the vector OPERANDS.
3131 %N (for N a digit) means print operand N in usual manner.
3132 %lN means require operand N to be a CODE_LABEL or LABEL_REF
3133 and print the label name with no punctuation.
3134 %cN means require operand N to be a constant
3135 and print the constant expression with no punctuation.
3136 %aN means expect operand N to be a memory address
3137 (not a memory reference!) and print a reference
3139 %nN means expect operand N to be a constant
3140 and print a constant expression for minus the value
3141 of the operand, with no other punctuation. */
3144 output_asm_insn (const char *templ
, rtx
*operands
)
3148 #ifdef ASSEMBLER_DIALECT
3151 int oporder
[MAX_RECOG_OPERANDS
];
3152 char opoutput
[MAX_RECOG_OPERANDS
];
3155 /* An insn may return a null string template
3156 in a case where no assembler code is needed. */
3160 memset (opoutput
, 0, sizeof opoutput
);
3162 putc ('\t', asm_out_file
);
3164 #ifdef ASM_OUTPUT_OPCODE
3165 ASM_OUTPUT_OPCODE (asm_out_file
, p
);
3172 if (flag_verbose_asm
)
3173 output_asm_operand_names (operands
, oporder
, ops
);
3174 if (flag_print_asm_name
)
3178 memset (opoutput
, 0, sizeof opoutput
);
3180 putc (c
, asm_out_file
);
3181 #ifdef ASM_OUTPUT_OPCODE
3182 while ((c
= *p
) == '\t')
3184 putc (c
, asm_out_file
);
3187 ASM_OUTPUT_OPCODE (asm_out_file
, p
);
3191 #ifdef ASSEMBLER_DIALECT
3197 output_operand_lossage ("nested assembly dialect alternatives");
3201 /* If we want the first dialect, do nothing. Otherwise, skip
3202 DIALECT_NUMBER of strings ending with '|'. */
3203 for (i
= 0; i
< dialect_number
; i
++)
3205 while (*p
&& *p
!= '}' && *p
++ != '|')
3214 output_operand_lossage ("unterminated assembly dialect alternative");
3221 /* Skip to close brace. */
3226 output_operand_lossage ("unterminated assembly dialect alternative");
3230 while (*p
++ != '}');
3234 putc (c
, asm_out_file
);
3239 putc (c
, asm_out_file
);
3245 /* %% outputs a single %. */
3249 putc (c
, asm_out_file
);
3251 /* %= outputs a number which is unique to each insn in the entire
3252 compilation. This is useful for making local labels that are
3253 referred to more than once in a given insn. */
3257 fprintf (asm_out_file
, "%d", insn_counter
);
3259 /* % followed by a letter and some digits
3260 outputs an operand in a special way depending on the letter.
3261 Letters `acln' are implemented directly.
3262 Other letters are passed to `output_operand' so that
3263 the PRINT_OPERAND macro can define them. */
3264 else if (ISALPHA (*p
))
3267 unsigned long opnum
;
3270 opnum
= strtoul (p
, &endptr
, 10);
3273 output_operand_lossage ("operand number missing "
3275 else if (this_is_asm_operands
&& opnum
>= insn_noperands
)
3276 output_operand_lossage ("operand number out of range");
3277 else if (letter
== 'l')
3278 output_asm_label (operands
[opnum
]);
3279 else if (letter
== 'a')
3280 output_address (operands
[opnum
]);
3281 else if (letter
== 'c')
3283 if (CONSTANT_ADDRESS_P (operands
[opnum
]))
3284 output_addr_const (asm_out_file
, operands
[opnum
]);
3286 output_operand (operands
[opnum
], 'c');
3288 else if (letter
== 'n')
3290 if (GET_CODE (operands
[opnum
]) == CONST_INT
)
3291 fprintf (asm_out_file
, HOST_WIDE_INT_PRINT_DEC
,
3292 - INTVAL (operands
[opnum
]));
3295 putc ('-', asm_out_file
);
3296 output_addr_const (asm_out_file
, operands
[opnum
]);
3300 output_operand (operands
[opnum
], letter
);
3302 if (!opoutput
[opnum
])
3303 oporder
[ops
++] = opnum
;
3304 opoutput
[opnum
] = 1;
3309 /* % followed by a digit outputs an operand the default way. */
3310 else if (ISDIGIT (*p
))
3312 unsigned long opnum
;
3315 opnum
= strtoul (p
, &endptr
, 10);
3316 if (this_is_asm_operands
&& opnum
>= insn_noperands
)
3317 output_operand_lossage ("operand number out of range");
3319 output_operand (operands
[opnum
], 0);
3321 if (!opoutput
[opnum
])
3322 oporder
[ops
++] = opnum
;
3323 opoutput
[opnum
] = 1;
3328 /* % followed by punctuation: output something for that
3329 punctuation character alone, with no operand.
3330 The PRINT_OPERAND macro decides what is actually done. */
3331 #ifdef PRINT_OPERAND_PUNCT_VALID_P
3332 else if (PRINT_OPERAND_PUNCT_VALID_P ((unsigned char) *p
))
3333 output_operand (NULL_RTX
, *p
++);
3336 output_operand_lossage ("invalid %%-code");
3340 putc (c
, asm_out_file
);
3343 /* Write out the variable names for operands, if we know them. */
3344 if (flag_verbose_asm
)
3345 output_asm_operand_names (operands
, oporder
, ops
);
3346 if (flag_print_asm_name
)
3349 putc ('\n', asm_out_file
);
3352 /* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */
3355 output_asm_label (rtx x
)
3359 if (GET_CODE (x
) == LABEL_REF
)
3363 && NOTE_KIND (x
) == NOTE_INSN_DELETED_LABEL
))
3364 ASM_GENERATE_INTERNAL_LABEL (buf
, "L", CODE_LABEL_NUMBER (x
));
3366 output_operand_lossage ("'%%l' operand isn't a label");
3368 assemble_name (asm_out_file
, buf
);
3371 /* Helper rtx-iteration-function for mark_symbol_refs_as_used and
3372 output_operand. Marks SYMBOL_REFs as referenced through use of
3373 assemble_external. */
3376 mark_symbol_ref_as_used (rtx
*xp
, void *dummy ATTRIBUTE_UNUSED
)
3380 /* If we have a used symbol, we may have to emit assembly
3381 annotations corresponding to whether the symbol is external, weak
3382 or has non-default visibility. */
3383 if (GET_CODE (x
) == SYMBOL_REF
)
3387 t
= SYMBOL_REF_DECL (x
);
3389 assemble_external (t
);
3397 /* Marks SYMBOL_REFs in x as referenced through use of assemble_external. */
3400 mark_symbol_refs_as_used (rtx x
)
3402 for_each_rtx (&x
, mark_symbol_ref_as_used
, NULL
);
3405 /* Print operand X using machine-dependent assembler syntax.
3406 The macro PRINT_OPERAND is defined just to control this function.
3407 CODE is a non-digit that preceded the operand-number in the % spec,
3408 such as 'z' if the spec was `%z3'. CODE is 0 if there was no char
3409 between the % and the digits.
3410 When CODE is a non-letter, X is 0.
3412 The meanings of the letters are machine-dependent and controlled
3413 by PRINT_OPERAND. */
3416 output_operand (rtx x
, int code ATTRIBUTE_UNUSED
)
3418 if (x
&& GET_CODE (x
) == SUBREG
)
3419 x
= alter_subreg (&x
);
3421 /* X must not be a pseudo reg. */
3422 gcc_assert (!x
|| !REG_P (x
) || REGNO (x
) < FIRST_PSEUDO_REGISTER
);
3424 PRINT_OPERAND (asm_out_file
, x
, code
);
3429 for_each_rtx (&x
, mark_symbol_ref_as_used
, NULL
);
3432 /* Print a memory reference operand for address X
3433 using machine-dependent assembler syntax.
3434 The macro PRINT_OPERAND_ADDRESS exists just to control this function. */
3437 output_address (rtx x
)
3439 bool changed
= false;
3440 walk_alter_subreg (&x
, &changed
);
3441 PRINT_OPERAND_ADDRESS (asm_out_file
, x
);
3444 /* Print an integer constant expression in assembler syntax.
3445 Addition and subtraction are the only arithmetic
3446 that may appear in these expressions. */
3449 output_addr_const (FILE *file
, rtx x
)
3454 switch (GET_CODE (x
))
3461 if (SYMBOL_REF_DECL (x
))
3463 mark_decl_referenced (SYMBOL_REF_DECL (x
));
3464 assemble_external (SYMBOL_REF_DECL (x
));
3466 #ifdef ASM_OUTPUT_SYMBOL_REF
3467 ASM_OUTPUT_SYMBOL_REF (file
, x
);
3469 assemble_name (file
, XSTR (x
, 0));
3477 ASM_GENERATE_INTERNAL_LABEL (buf
, "L", CODE_LABEL_NUMBER (x
));
3478 #ifdef ASM_OUTPUT_LABEL_REF
3479 ASM_OUTPUT_LABEL_REF (file
, buf
);
3481 assemble_name (file
, buf
);
3486 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, INTVAL (x
));
3490 /* This used to output parentheses around the expression,
3491 but that does not work on the 386 (either ATT or BSD assembler). */
3492 output_addr_const (file
, XEXP (x
, 0));
3496 if (GET_MODE (x
) == VOIDmode
)
3498 /* We can use %d if the number is one word and positive. */
3499 if (CONST_DOUBLE_HIGH (x
))
3500 fprintf (file
, HOST_WIDE_INT_PRINT_DOUBLE_HEX
,
3501 (unsigned HOST_WIDE_INT
) CONST_DOUBLE_HIGH (x
),
3502 (unsigned HOST_WIDE_INT
) CONST_DOUBLE_LOW (x
));
3503 else if (CONST_DOUBLE_LOW (x
) < 0)
3504 fprintf (file
, HOST_WIDE_INT_PRINT_HEX
,
3505 (unsigned HOST_WIDE_INT
) CONST_DOUBLE_LOW (x
));
3507 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, CONST_DOUBLE_LOW (x
));
3510 /* We can't handle floating point constants;
3511 PRINT_OPERAND must handle them. */
3512 output_operand_lossage ("floating constant misused");
3516 fprintf (file
, HOST_WIDE_INT_PRINT_HEX
,
3517 (unsigned HOST_WIDE_INT
) CONST_FIXED_VALUE_LOW (x
));
3521 /* Some assemblers need integer constants to appear last (eg masm). */
3522 if (GET_CODE (XEXP (x
, 0)) == CONST_INT
)
3524 output_addr_const (file
, XEXP (x
, 1));
3525 if (INTVAL (XEXP (x
, 0)) >= 0)
3526 fprintf (file
, "+");
3527 output_addr_const (file
, XEXP (x
, 0));
3531 output_addr_const (file
, XEXP (x
, 0));
3532 if (GET_CODE (XEXP (x
, 1)) != CONST_INT
3533 || INTVAL (XEXP (x
, 1)) >= 0)
3534 fprintf (file
, "+");
3535 output_addr_const (file
, XEXP (x
, 1));
3540 /* Avoid outputting things like x-x or x+5-x,
3541 since some assemblers can't handle that. */
3542 x
= simplify_subtraction (x
);
3543 if (GET_CODE (x
) != MINUS
)
3546 output_addr_const (file
, XEXP (x
, 0));
3547 fprintf (file
, "-");
3548 if ((GET_CODE (XEXP (x
, 1)) == CONST_INT
&& INTVAL (XEXP (x
, 1)) >= 0)
3549 || GET_CODE (XEXP (x
, 1)) == PC
3550 || GET_CODE (XEXP (x
, 1)) == SYMBOL_REF
)
3551 output_addr_const (file
, XEXP (x
, 1));
3554 fputs (targetm
.asm_out
.open_paren
, file
);
3555 output_addr_const (file
, XEXP (x
, 1));
3556 fputs (targetm
.asm_out
.close_paren
, file
);
3564 output_addr_const (file
, XEXP (x
, 0));
3568 #ifdef OUTPUT_ADDR_CONST_EXTRA
3569 OUTPUT_ADDR_CONST_EXTRA (file
, x
, fail
);
3574 output_operand_lossage ("invalid expression as operand");
3578 /* A poor man's fprintf, with the added features of %I, %R, %L, and %U.
3579 %R prints the value of REGISTER_PREFIX.
3580 %L prints the value of LOCAL_LABEL_PREFIX.
3581 %U prints the value of USER_LABEL_PREFIX.
3582 %I prints the value of IMMEDIATE_PREFIX.
3583 %O runs ASM_OUTPUT_OPCODE to transform what follows in the string.
3584 Also supported are %d, %i, %u, %x, %X, %o, %c, %s and %%.
3586 We handle alternate assembler dialects here, just like output_asm_insn. */
3589 asm_fprintf (FILE *file
, const char *p
, ...)
3595 va_start (argptr
, p
);
3602 #ifdef ASSEMBLER_DIALECT
3607 /* If we want the first dialect, do nothing. Otherwise, skip
3608 DIALECT_NUMBER of strings ending with '|'. */
3609 for (i
= 0; i
< dialect_number
; i
++)
3611 while (*p
&& *p
++ != '|')
3621 /* Skip to close brace. */
3622 while (*p
&& *p
++ != '}')
3633 while (strchr ("-+ #0", c
))
3638 while (ISDIGIT (c
) || c
== '.')
3649 case 'd': case 'i': case 'u':
3650 case 'x': case 'X': case 'o':
3654 fprintf (file
, buf
, va_arg (argptr
, int));
3658 /* This is a prefix to the 'd', 'i', 'u', 'x', 'X', and
3659 'o' cases, but we do not check for those cases. It
3660 means that the value is a HOST_WIDE_INT, which may be
3661 either `long' or `long long'. */
3662 memcpy (q
, HOST_WIDE_INT_PRINT
, strlen (HOST_WIDE_INT_PRINT
));
3663 q
+= strlen (HOST_WIDE_INT_PRINT
);
3666 fprintf (file
, buf
, va_arg (argptr
, HOST_WIDE_INT
));
3671 #ifdef HAVE_LONG_LONG
3677 fprintf (file
, buf
, va_arg (argptr
, long long));
3684 fprintf (file
, buf
, va_arg (argptr
, long));
3692 fprintf (file
, buf
, va_arg (argptr
, char *));
3696 #ifdef ASM_OUTPUT_OPCODE
3697 ASM_OUTPUT_OPCODE (asm_out_file
, p
);
3702 #ifdef REGISTER_PREFIX
3703 fprintf (file
, "%s", REGISTER_PREFIX
);
3708 #ifdef IMMEDIATE_PREFIX
3709 fprintf (file
, "%s", IMMEDIATE_PREFIX
);
3714 #ifdef LOCAL_LABEL_PREFIX
3715 fprintf (file
, "%s", LOCAL_LABEL_PREFIX
);
3720 fputs (user_label_prefix
, file
);
3723 #ifdef ASM_FPRINTF_EXTENSIONS
3724 /* Uppercase letters are reserved for general use by asm_fprintf
3725 and so are not available to target specific code. In order to
3726 prevent the ASM_FPRINTF_EXTENSIONS macro from using them then,
3727 they are defined here. As they get turned into real extensions
3728 to asm_fprintf they should be removed from this list. */
3729 case 'A': case 'B': case 'C': case 'D': case 'E':
3730 case 'F': case 'G': case 'H': case 'J': case 'K':
3731 case 'M': case 'N': case 'P': case 'Q': case 'S':
3732 case 'T': case 'V': case 'W': case 'Y': case 'Z':
3735 ASM_FPRINTF_EXTENSIONS (file
, argptr
, p
)
3748 /* Split up a CONST_DOUBLE or integer constant rtx
3749 into two rtx's for single words,
3750 storing in *FIRST the word that comes first in memory in the target
3751 and in *SECOND the other. */
3754 split_double (rtx value
, rtx
*first
, rtx
*second
)
3756 if (GET_CODE (value
) == CONST_INT
)
3758 if (HOST_BITS_PER_WIDE_INT
>= (2 * BITS_PER_WORD
))
3760 /* In this case the CONST_INT holds both target words.
3761 Extract the bits from it into two word-sized pieces.
3762 Sign extend each half to HOST_WIDE_INT. */
3763 unsigned HOST_WIDE_INT low
, high
;
3764 unsigned HOST_WIDE_INT mask
, sign_bit
, sign_extend
;
3766 /* Set sign_bit to the most significant bit of a word. */
3768 sign_bit
<<= BITS_PER_WORD
- 1;
3770 /* Set mask so that all bits of the word are set. We could
3771 have used 1 << BITS_PER_WORD instead of basing the
3772 calculation on sign_bit. However, on machines where
3773 HOST_BITS_PER_WIDE_INT == BITS_PER_WORD, it could cause a
3774 compiler warning, even though the code would never be
3776 mask
= sign_bit
<< 1;
3779 /* Set sign_extend as any remaining bits. */
3780 sign_extend
= ~mask
;
3782 /* Pick the lower word and sign-extend it. */
3783 low
= INTVAL (value
);
3788 /* Pick the higher word, shifted to the least significant
3789 bits, and sign-extend it. */
3790 high
= INTVAL (value
);
3791 high
>>= BITS_PER_WORD
- 1;
3794 if (high
& sign_bit
)
3795 high
|= sign_extend
;
3797 /* Store the words in the target machine order. */
3798 if (WORDS_BIG_ENDIAN
)
3800 *first
= GEN_INT (high
);
3801 *second
= GEN_INT (low
);
3805 *first
= GEN_INT (low
);
3806 *second
= GEN_INT (high
);
3811 /* The rule for using CONST_INT for a wider mode
3812 is that we regard the value as signed.
3813 So sign-extend it. */
3814 rtx high
= (INTVAL (value
) < 0 ? constm1_rtx
: const0_rtx
);
3815 if (WORDS_BIG_ENDIAN
)
3827 else if (GET_CODE (value
) != CONST_DOUBLE
)
3829 if (WORDS_BIG_ENDIAN
)
3831 *first
= const0_rtx
;
3837 *second
= const0_rtx
;
3840 else if (GET_MODE (value
) == VOIDmode
3841 /* This is the old way we did CONST_DOUBLE integers. */
3842 || GET_MODE_CLASS (GET_MODE (value
)) == MODE_INT
)
3844 /* In an integer, the words are defined as most and least significant.
3845 So order them by the target's convention. */
3846 if (WORDS_BIG_ENDIAN
)
3848 *first
= GEN_INT (CONST_DOUBLE_HIGH (value
));
3849 *second
= GEN_INT (CONST_DOUBLE_LOW (value
));
3853 *first
= GEN_INT (CONST_DOUBLE_LOW (value
));
3854 *second
= GEN_INT (CONST_DOUBLE_HIGH (value
));
3861 REAL_VALUE_FROM_CONST_DOUBLE (r
, value
);
3863 /* Note, this converts the REAL_VALUE_TYPE to the target's
3864 format, splits up the floating point double and outputs
3865 exactly 32 bits of it into each of l[0] and l[1] --
3866 not necessarily BITS_PER_WORD bits. */
3867 REAL_VALUE_TO_TARGET_DOUBLE (r
, l
);
3869 /* If 32 bits is an entire word for the target, but not for the host,
3870 then sign-extend on the host so that the number will look the same
3871 way on the host that it would on the target. See for instance
3872 simplify_unary_operation. The #if is needed to avoid compiler
3875 #if HOST_BITS_PER_LONG > 32
3876 if (BITS_PER_WORD
< HOST_BITS_PER_LONG
&& BITS_PER_WORD
== 32)
3878 if (l
[0] & ((long) 1 << 31))
3879 l
[0] |= ((long) (-1) << 32);
3880 if (l
[1] & ((long) 1 << 31))
3881 l
[1] |= ((long) (-1) << 32);
3885 *first
= GEN_INT (l
[0]);
3886 *second
= GEN_INT (l
[1]);
3890 /* Return nonzero if this function has no function calls. */
3893 leaf_function_p (void)
3898 if (crtl
->profile
|| profile_arc_flag
)
3901 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
3904 && ! SIBLING_CALL_P (insn
))
3906 if (NONJUMP_INSN_P (insn
)
3907 && GET_CODE (PATTERN (insn
)) == SEQUENCE
3908 && CALL_P (XVECEXP (PATTERN (insn
), 0, 0))
3909 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn
), 0, 0)))
3912 for (link
= crtl
->epilogue_delay_list
;
3914 link
= XEXP (link
, 1))
3916 insn
= XEXP (link
, 0);
3919 && ! SIBLING_CALL_P (insn
))
3921 if (NONJUMP_INSN_P (insn
)
3922 && GET_CODE (PATTERN (insn
)) == SEQUENCE
3923 && CALL_P (XVECEXP (PATTERN (insn
), 0, 0))
3924 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn
), 0, 0)))
3931 /* Return 1 if branch is a forward branch.
3932 Uses insn_shuid array, so it works only in the final pass. May be used by
3933 output templates to customary add branch prediction hints.
3936 final_forward_branch_p (rtx insn
)
3938 int insn_id
, label_id
;
3940 gcc_assert (uid_shuid
);
3941 insn_id
= INSN_SHUID (insn
);
3942 label_id
= INSN_SHUID (JUMP_LABEL (insn
));
3943 /* We've hit some insns that does not have id information available. */
3944 gcc_assert (insn_id
&& label_id
);
3945 return insn_id
< label_id
;
3948 /* On some machines, a function with no call insns
3949 can run faster if it doesn't create its own register window.
3950 When output, the leaf function should use only the "output"
3951 registers. Ordinarily, the function would be compiled to use
3952 the "input" registers to find its arguments; it is a candidate
3953 for leaf treatment if it uses only the "input" registers.
3954 Leaf function treatment means renumbering so the function
3955 uses the "output" registers instead. */
3957 #ifdef LEAF_REGISTERS
3959 /* Return 1 if this function uses only the registers that can be
3960 safely renumbered. */
3963 only_leaf_regs_used (void)
3966 const char *const permitted_reg_in_leaf_functions
= LEAF_REGISTERS
;
3968 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
3969 if ((df_regs_ever_live_p (i
) || global_regs
[i
])
3970 && ! permitted_reg_in_leaf_functions
[i
])
3973 if (crtl
->uses_pic_offset_table
3974 && pic_offset_table_rtx
!= 0
3975 && REG_P (pic_offset_table_rtx
)
3976 && ! permitted_reg_in_leaf_functions
[REGNO (pic_offset_table_rtx
)])
3982 /* Scan all instructions and renumber all registers into those
3983 available in leaf functions. */
3986 leaf_renumber_regs (rtx first
)
3990 /* Renumber only the actual patterns.
3991 The reg-notes can contain frame pointer refs,
3992 and renumbering them could crash, and should not be needed. */
3993 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
3995 leaf_renumber_regs_insn (PATTERN (insn
));
3996 for (insn
= crtl
->epilogue_delay_list
;
3998 insn
= XEXP (insn
, 1))
3999 if (INSN_P (XEXP (insn
, 0)))
4000 leaf_renumber_regs_insn (PATTERN (XEXP (insn
, 0)));
4003 /* Scan IN_RTX and its subexpressions, and renumber all regs into those
4004 available in leaf functions. */
4007 leaf_renumber_regs_insn (rtx in_rtx
)
4010 const char *format_ptr
;
4015 /* Renumber all input-registers into output-registers.
4016 renumbered_regs would be 1 for an output-register;
4023 /* Don't renumber the same reg twice. */
4027 newreg
= REGNO (in_rtx
);
4028 /* Don't try to renumber pseudo regs. It is possible for a pseudo reg
4029 to reach here as part of a REG_NOTE. */
4030 if (newreg
>= FIRST_PSEUDO_REGISTER
)
4035 newreg
= LEAF_REG_REMAP (newreg
);
4036 gcc_assert (newreg
>= 0);
4037 df_set_regs_ever_live (REGNO (in_rtx
), false);
4038 df_set_regs_ever_live (newreg
, true);
4039 SET_REGNO (in_rtx
, newreg
);
4043 if (INSN_P (in_rtx
))
4045 /* Inside a SEQUENCE, we find insns.
4046 Renumber just the patterns of these insns,
4047 just as we do for the top-level insns. */
4048 leaf_renumber_regs_insn (PATTERN (in_rtx
));
4052 format_ptr
= GET_RTX_FORMAT (GET_CODE (in_rtx
));
4054 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (in_rtx
)); i
++)
4055 switch (*format_ptr
++)
4058 leaf_renumber_regs_insn (XEXP (in_rtx
, i
));
4062 if (NULL
!= XVEC (in_rtx
, i
))
4064 for (j
= 0; j
< XVECLEN (in_rtx
, i
); j
++)
4065 leaf_renumber_regs_insn (XVECEXP (in_rtx
, i
, j
));
4085 /* When -gused is used, emit debug info for only used symbols. But in
4086 addition to the standard intercepted debug_hooks there are some direct
4087 calls into this file, i.e., dbxout_symbol, dbxout_parms, and dbxout_reg_params.
4088 Those routines may also be called from a higher level intercepted routine. So
4089 to prevent recording data for an inner call to one of these for an intercept,
4090 we maintain an intercept nesting counter (debug_nesting). We only save the
4091 intercepted arguments if the nesting is 1. */
4092 int debug_nesting
= 0;
4094 static tree
*symbol_queue
;
4095 int symbol_queue_index
= 0;
4096 static int symbol_queue_size
= 0;
4098 /* Generate the symbols for any queued up type symbols we encountered
4099 while generating the type info for some originally used symbol.
4100 This might generate additional entries in the queue. Only when
4101 the nesting depth goes to 0 is this routine called. */
4104 debug_flush_symbol_queue (void)
4108 /* Make sure that additionally queued items are not flushed
4113 for (i
= 0; i
< symbol_queue_index
; ++i
)
4115 /* If we pushed queued symbols then such symbols must be
4116 output no matter what anyone else says. Specifically,
4117 we need to make sure dbxout_symbol() thinks the symbol was
4118 used and also we need to override TYPE_DECL_SUPPRESS_DEBUG
4119 which may be set for outside reasons. */
4120 int saved_tree_used
= TREE_USED (symbol_queue
[i
]);
4121 int saved_suppress_debug
= TYPE_DECL_SUPPRESS_DEBUG (symbol_queue
[i
]);
4122 TREE_USED (symbol_queue
[i
]) = 1;
4123 TYPE_DECL_SUPPRESS_DEBUG (symbol_queue
[i
]) = 0;
4125 #ifdef DBX_DEBUGGING_INFO
4126 dbxout_symbol (symbol_queue
[i
], 0);
4129 TREE_USED (symbol_queue
[i
]) = saved_tree_used
;
4130 TYPE_DECL_SUPPRESS_DEBUG (symbol_queue
[i
]) = saved_suppress_debug
;
4133 symbol_queue_index
= 0;
4137 /* Queue a type symbol needed as part of the definition of a decl
4138 symbol. These symbols are generated when debug_flush_symbol_queue()
4142 debug_queue_symbol (tree decl
)
4144 if (symbol_queue_index
>= symbol_queue_size
)
4146 symbol_queue_size
+= 10;
4147 symbol_queue
= XRESIZEVEC (tree
, symbol_queue
, symbol_queue_size
);
4150 symbol_queue
[symbol_queue_index
++] = decl
;
4153 /* Free symbol queue. */
4155 debug_free_queue (void)
4159 free (symbol_queue
);
4160 symbol_queue
= NULL
;
4161 symbol_queue_size
= 0;
4165 /* Turn the RTL into assembly. */
4167 rest_of_handle_final (void)
4172 /* Get the function's name, as described by its RTL. This may be
4173 different from the DECL_NAME name used in the source file. */
4175 x
= DECL_RTL (current_function_decl
);
4176 gcc_assert (MEM_P (x
));
4178 gcc_assert (GET_CODE (x
) == SYMBOL_REF
);
4179 fnname
= XSTR (x
, 0);
4181 assemble_start_function (current_function_decl
, fnname
);
4182 final_start_function (get_insns (), asm_out_file
, optimize
);
4183 final (get_insns (), asm_out_file
, optimize
);
4184 final_end_function ();
4186 #ifdef TARGET_UNWIND_INFO
4187 /* ??? The IA-64 ".handlerdata" directive must be issued before
4188 the ".endp" directive that closes the procedure descriptor. */
4189 output_function_exception_table (fnname
);
4192 assemble_end_function (current_function_decl
, fnname
);
4194 #ifndef TARGET_UNWIND_INFO
4195 /* Otherwise, it feels unclean to switch sections in the middle. */
4196 output_function_exception_table (fnname
);
4199 user_defined_section_attribute
= false;
4201 /* Free up reg info memory. */
4205 fflush (asm_out_file
);
4207 /* Write DBX symbols if requested. */
4209 /* Note that for those inline functions where we don't initially
4210 know for certain that we will be generating an out-of-line copy,
4211 the first invocation of this routine (rest_of_compilation) will
4212 skip over this code by doing a `goto exit_rest_of_compilation;'.
4213 Later on, wrapup_global_declarations will (indirectly) call
4214 rest_of_compilation again for those inline functions that need
4215 to have out-of-line copies generated. During that call, we
4216 *will* be routed past here. */
4218 timevar_push (TV_SYMOUT
);
4219 (*debug_hooks
->function_decl
) (current_function_decl
);
4220 timevar_pop (TV_SYMOUT
);
4222 /* Release the blocks that are linked to DECL_INITIAL() to free the memory. */
4223 DECL_INITIAL (current_function_decl
) = error_mark_node
;
4225 if (DECL_STATIC_CONSTRUCTOR (current_function_decl
)
4226 && targetm
.have_ctors_dtors
)
4227 targetm
.asm_out
.constructor (XEXP (DECL_RTL (current_function_decl
), 0),
4228 decl_init_priority_lookup
4229 (current_function_decl
));
4230 if (DECL_STATIC_DESTRUCTOR (current_function_decl
)
4231 && targetm
.have_ctors_dtors
)
4232 targetm
.asm_out
.destructor (XEXP (DECL_RTL (current_function_decl
), 0),
4233 decl_fini_priority_lookup
4234 (current_function_decl
));
4238 struct rtl_opt_pass pass_final
=
4244 rest_of_handle_final
, /* execute */
4247 0, /* static_pass_number */
4248 TV_FINAL
, /* tv_id */
4249 0, /* properties_required */
4250 0, /* properties_provided */
4251 0, /* properties_destroyed */
4252 0, /* todo_flags_start */
4253 TODO_ggc_collect
/* todo_flags_finish */
4259 rest_of_handle_shorten_branches (void)
4261 /* Shorten branches. */
4262 shorten_branches (get_insns ());
4266 struct rtl_opt_pass pass_shorten_branches
=
4270 "shorten", /* name */
4272 rest_of_handle_shorten_branches
, /* execute */
4275 0, /* static_pass_number */
4276 TV_FINAL
, /* tv_id */
4277 0, /* properties_required */
4278 0, /* properties_provided */
4279 0, /* properties_destroyed */
4280 0, /* todo_flags_start */
4281 TODO_dump_func
/* todo_flags_finish */
4287 rest_of_clean_state (void)
4291 /* It is very important to decompose the RTL instruction chain here:
4292 debug information keeps pointing into CODE_LABEL insns inside the function
4293 body. If these remain pointing to the other insns, we end up preserving
4294 whole RTL chain and attached detailed debug info in memory. */
4295 for (insn
= get_insns (); insn
; insn
= next
)
4297 next
= NEXT_INSN (insn
);
4298 NEXT_INSN (insn
) = NULL
;
4299 PREV_INSN (insn
) = NULL
;
4302 /* In case the function was not output,
4303 don't leave any temporary anonymous types
4304 queued up for sdb output. */
4305 #ifdef SDB_DEBUGGING_INFO
4306 if (write_symbols
== SDB_DEBUG
)
4307 sdbout_types (NULL_TREE
);
4310 flag_rerun_cse_after_global_opts
= 0;
4311 reload_completed
= 0;
4312 epilogue_completed
= 0;
4314 regstack_completed
= 0;
4317 /* Clear out the insn_length contents now that they are no
4319 init_insn_lengths ();
4321 /* Show no temporary slots allocated. */
4324 free_bb_for_insn ();
4326 if (targetm
.binds_local_p (current_function_decl
))
4328 unsigned int pref
= crtl
->preferred_stack_boundary
;
4329 if (crtl
->stack_alignment_needed
> crtl
->preferred_stack_boundary
)
4330 pref
= crtl
->stack_alignment_needed
;
4331 cgraph_rtl_info (current_function_decl
)->preferred_incoming_stack_boundary
4335 /* Make sure volatile mem refs aren't considered valid operands for
4336 arithmetic insns. We must call this here if this is a nested inline
4337 function, since the above code leaves us in the init_recog state,
4338 and the function context push/pop code does not save/restore volatile_ok.
4340 ??? Maybe it isn't necessary for expand_start_function to call this
4341 anymore if we do it here? */
4343 init_recog_no_volatile ();
4345 /* We're done with this function. Free up memory if we can. */
4346 free_after_parsing (cfun
);
4347 free_after_compilation (cfun
);
4351 struct rtl_opt_pass pass_clean_state
=
4357 rest_of_clean_state
, /* execute */
4360 0, /* static_pass_number */
4361 TV_FINAL
, /* tv_id */
4362 0, /* properties_required */
4363 0, /* properties_provided */
4364 PROP_rtl
, /* properties_destroyed */
4365 0, /* todo_flags_start */
4366 0 /* todo_flags_finish */