sched-rgn.c (add_branch_dependences): Keep insns in a SCHED_GROUP at the end of BB...
[gcc.git] / gcc / final.c
1 /* Convert RTL to assembler code and output it, for GNU compiler.
2 Copyright (C) 1987-2013 Free Software Foundation, Inc.
3
4 This file is part of GCC.
5
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
9 version.
10
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
19
20 /* This is the final pass of the compiler.
21 It looks at the rtl code for a function and outputs assembler code.
22
23 Call `final_start_function' to output the assembler code for function entry,
24 `final' to output assembler code for some RTL code,
25 `final_end_function' to output assembler code for function exit.
26 If a function is compiled in several pieces, each piece is
27 output separately with `final'.
28
29 Some optimizations are also done at this level.
30 Move instructions that were made unnecessary by good register allocation
31 are detected and omitted from the output. (Though most of these
32 are removed by the last jump pass.)
33
34 Instructions to set the condition codes are omitted when it can be
35 seen that the condition codes already had the desired values.
36
37 In some cases it is sufficient if the inherited condition codes
38 have related values, but this may require the following insn
39 (the one that tests the condition codes) to be modified.
40
41 The code for the function prologue and epilogue are generated
42 directly in assembler by the target functions function_prologue and
43 function_epilogue. Those instructions never exist as rtl. */
44
45 #include "config.h"
46 #include "system.h"
47 #include "coretypes.h"
48 #include "tm.h"
49
50 #include "tree.h"
51 #include "rtl.h"
52 #include "tm_p.h"
53 #include "regs.h"
54 #include "insn-config.h"
55 #include "insn-attr.h"
56 #include "recog.h"
57 #include "conditions.h"
58 #include "flags.h"
59 #include "hard-reg-set.h"
60 #include "output.h"
61 #include "except.h"
62 #include "function.h"
63 #include "rtl-error.h"
64 #include "toplev.h" /* exact_log2, floor_log2 */
65 #include "reload.h"
66 #include "intl.h"
67 #include "basic-block.h"
68 #include "target.h"
69 #include "targhooks.h"
70 #include "debug.h"
71 #include "expr.h"
72 #include "tree-pass.h"
73 #include "cgraph.h"
74 #include "tree-ssa.h"
75 #include "coverage.h"
76 #include "df.h"
77 #include "ggc.h"
78 #include "cfgloop.h"
79 #include "params.h"
80 #include "tree-pretty-print.h" /* for dump_function_header */
81 #include "asan.h"
82
83 #ifdef XCOFF_DEBUGGING_INFO
84 #include "xcoffout.h" /* Needed for external data
85 declarations for e.g. AIX 4.x. */
86 #endif
87
88 #include "dwarf2out.h"
89
90 #ifdef DBX_DEBUGGING_INFO
91 #include "dbxout.h"
92 #endif
93
94 #ifdef SDB_DEBUGGING_INFO
95 #include "sdbout.h"
96 #endif
97
98 /* Most ports that aren't using cc0 don't need to define CC_STATUS_INIT.
99 So define a null default for it to save conditionalization later. */
100 #ifndef CC_STATUS_INIT
101 #define CC_STATUS_INIT
102 #endif
103
104 /* Is the given character a logical line separator for the assembler? */
105 #ifndef IS_ASM_LOGICAL_LINE_SEPARATOR
106 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == ';')
107 #endif
108
109 #ifndef JUMP_TABLES_IN_TEXT_SECTION
110 #define JUMP_TABLES_IN_TEXT_SECTION 0
111 #endif
112
113 /* Bitflags used by final_scan_insn. */
114 #define SEEN_BB 1
115 #define SEEN_NOTE 2
116 #define SEEN_EMITTED 4
117
118 /* Last insn processed by final_scan_insn. */
119 static rtx debug_insn;
120 rtx current_output_insn;
121
122 /* Line number of last NOTE. */
123 static int last_linenum;
124
125 /* Last discriminator written to assembly. */
126 static int last_discriminator;
127
128 /* Discriminator of current block. */
129 static int discriminator;
130
131 /* Highest line number in current block. */
132 static int high_block_linenum;
133
134 /* Likewise for function. */
135 static int high_function_linenum;
136
137 /* Filename of last NOTE. */
138 static const char *last_filename;
139
140 /* Override filename and line number. */
141 static const char *override_filename;
142 static int override_linenum;
143
144 /* Whether to force emission of a line note before the next insn. */
145 static bool force_source_line = false;
146
147 extern const int length_unit_log; /* This is defined in insn-attrtab.c. */
148
149 /* Nonzero while outputting an `asm' with operands.
150 This means that inconsistencies are the user's fault, so don't die.
151 The precise value is the insn being output, to pass to error_for_asm. */
152 rtx this_is_asm_operands;
153
154 /* Number of operands of this insn, for an `asm' with operands. */
155 static unsigned int insn_noperands;
156
157 /* Compare optimization flag. */
158
159 static rtx last_ignored_compare = 0;
160
161 /* Assign a unique number to each insn that is output.
162 This can be used to generate unique local labels. */
163
164 static int insn_counter = 0;
165
166 #ifdef HAVE_cc0
167 /* This variable contains machine-dependent flags (defined in tm.h)
168 set and examined by output routines
169 that describe how to interpret the condition codes properly. */
170
171 CC_STATUS cc_status;
172
173 /* During output of an insn, this contains a copy of cc_status
174 from before the insn. */
175
176 CC_STATUS cc_prev_status;
177 #endif
178
179 /* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */
180
181 static int block_depth;
182
183 /* Nonzero if have enabled APP processing of our assembler output. */
184
185 static int app_on;
186
187 /* If we are outputting an insn sequence, this contains the sequence rtx.
188 Zero otherwise. */
189
190 rtx final_sequence;
191
192 #ifdef ASSEMBLER_DIALECT
193
194 /* Number of the assembler dialect to use, starting at 0. */
195 static int dialect_number;
196 #endif
197
198 /* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */
199 rtx current_insn_predicate;
200
201 /* True if printing into -fdump-final-insns= dump. */
202 bool final_insns_dump_p;
203
204 /* True if profile_function should be called, but hasn't been called yet. */
205 static bool need_profile_function;
206
207 static int asm_insn_count (rtx);
208 static void profile_function (FILE *);
209 static void profile_after_prologue (FILE *);
210 static bool notice_source_line (rtx, bool *);
211 static rtx walk_alter_subreg (rtx *, bool *);
212 static void output_asm_name (void);
213 static void output_alternate_entry_point (FILE *, rtx);
214 static tree get_mem_expr_from_op (rtx, int *);
215 static void output_asm_operand_names (rtx *, int *, int);
216 #ifdef LEAF_REGISTERS
217 static void leaf_renumber_regs (rtx);
218 #endif
219 #ifdef HAVE_cc0
220 static int alter_cond (rtx);
221 #endif
222 #ifndef ADDR_VEC_ALIGN
223 static int final_addr_vec_align (rtx);
224 #endif
225 static int align_fuzz (rtx, rtx, int, unsigned);
226 \f
227 /* Initialize data in final at the beginning of a compilation. */
228
229 void
230 init_final (const char *filename ATTRIBUTE_UNUSED)
231 {
232 app_on = 0;
233 final_sequence = 0;
234
235 #ifdef ASSEMBLER_DIALECT
236 dialect_number = ASSEMBLER_DIALECT;
237 #endif
238 }
239
240 /* Default target function prologue and epilogue assembler output.
241
242 If not overridden for epilogue code, then the function body itself
243 contains return instructions wherever needed. */
244 void
245 default_function_pro_epilogue (FILE *file ATTRIBUTE_UNUSED,
246 HOST_WIDE_INT size ATTRIBUTE_UNUSED)
247 {
248 }
249
250 void
251 default_function_switched_text_sections (FILE *file ATTRIBUTE_UNUSED,
252 tree decl ATTRIBUTE_UNUSED,
253 bool new_is_cold ATTRIBUTE_UNUSED)
254 {
255 }
256
257 /* Default target hook that outputs nothing to a stream. */
258 void
259 no_asm_to_stream (FILE *file ATTRIBUTE_UNUSED)
260 {
261 }
262
263 /* Enable APP processing of subsequent output.
264 Used before the output from an `asm' statement. */
265
266 void
267 app_enable (void)
268 {
269 if (! app_on)
270 {
271 fputs (ASM_APP_ON, asm_out_file);
272 app_on = 1;
273 }
274 }
275
276 /* Disable APP processing of subsequent output.
277 Called from varasm.c before most kinds of output. */
278
279 void
280 app_disable (void)
281 {
282 if (app_on)
283 {
284 fputs (ASM_APP_OFF, asm_out_file);
285 app_on = 0;
286 }
287 }
288 \f
289 /* Return the number of slots filled in the current
290 delayed branch sequence (we don't count the insn needing the
291 delay slot). Zero if not in a delayed branch sequence. */
292
293 #ifdef DELAY_SLOTS
294 int
295 dbr_sequence_length (void)
296 {
297 if (final_sequence != 0)
298 return XVECLEN (final_sequence, 0) - 1;
299 else
300 return 0;
301 }
302 #endif
303 \f
304 /* The next two pages contain routines used to compute the length of an insn
305 and to shorten branches. */
306
307 /* Arrays for insn lengths, and addresses. The latter is referenced by
308 `insn_current_length'. */
309
310 static int *insn_lengths;
311
312 vec<int> insn_addresses_;
313
314 /* Max uid for which the above arrays are valid. */
315 static int insn_lengths_max_uid;
316
317 /* Address of insn being processed. Used by `insn_current_length'. */
318 int insn_current_address;
319
320 /* Address of insn being processed in previous iteration. */
321 int insn_last_address;
322
323 /* known invariant alignment of insn being processed. */
324 int insn_current_align;
325
326 /* After shorten_branches, for any insn, uid_align[INSN_UID (insn)]
327 gives the next following alignment insn that increases the known
328 alignment, or NULL_RTX if there is no such insn.
329 For any alignment obtained this way, we can again index uid_align with
330 its uid to obtain the next following align that in turn increases the
331 alignment, till we reach NULL_RTX; the sequence obtained this way
332 for each insn we'll call the alignment chain of this insn in the following
333 comments. */
334
335 struct label_alignment
336 {
337 short alignment;
338 short max_skip;
339 };
340
341 static rtx *uid_align;
342 static int *uid_shuid;
343 static struct label_alignment *label_align;
344
345 /* Indicate that branch shortening hasn't yet been done. */
346
347 void
348 init_insn_lengths (void)
349 {
350 if (uid_shuid)
351 {
352 free (uid_shuid);
353 uid_shuid = 0;
354 }
355 if (insn_lengths)
356 {
357 free (insn_lengths);
358 insn_lengths = 0;
359 insn_lengths_max_uid = 0;
360 }
361 if (HAVE_ATTR_length)
362 INSN_ADDRESSES_FREE ();
363 if (uid_align)
364 {
365 free (uid_align);
366 uid_align = 0;
367 }
368 }
369
370 /* Obtain the current length of an insn. If branch shortening has been done,
371 get its actual length. Otherwise, use FALLBACK_FN to calculate the
372 length. */
373 static inline int
374 get_attr_length_1 (rtx insn, int (*fallback_fn) (rtx))
375 {
376 rtx body;
377 int i;
378 int length = 0;
379
380 if (!HAVE_ATTR_length)
381 return 0;
382
383 if (insn_lengths_max_uid > INSN_UID (insn))
384 return insn_lengths[INSN_UID (insn)];
385 else
386 switch (GET_CODE (insn))
387 {
388 case NOTE:
389 case BARRIER:
390 case CODE_LABEL:
391 case DEBUG_INSN:
392 return 0;
393
394 case CALL_INSN:
395 case JUMP_INSN:
396 length = fallback_fn (insn);
397 break;
398
399 case INSN:
400 body = PATTERN (insn);
401 if (GET_CODE (body) == USE || GET_CODE (body) == CLOBBER)
402 return 0;
403
404 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
405 length = asm_insn_count (body) * fallback_fn (insn);
406 else if (GET_CODE (body) == SEQUENCE)
407 for (i = 0; i < XVECLEN (body, 0); i++)
408 length += get_attr_length_1 (XVECEXP (body, 0, i), fallback_fn);
409 else
410 length = fallback_fn (insn);
411 break;
412
413 default:
414 break;
415 }
416
417 #ifdef ADJUST_INSN_LENGTH
418 ADJUST_INSN_LENGTH (insn, length);
419 #endif
420 return length;
421 }
422
423 /* Obtain the current length of an insn. If branch shortening has been done,
424 get its actual length. Otherwise, get its maximum length. */
425 int
426 get_attr_length (rtx insn)
427 {
428 return get_attr_length_1 (insn, insn_default_length);
429 }
430
431 /* Obtain the current length of an insn. If branch shortening has been done,
432 get its actual length. Otherwise, get its minimum length. */
433 int
434 get_attr_min_length (rtx insn)
435 {
436 return get_attr_length_1 (insn, insn_min_length);
437 }
438 \f
439 /* Code to handle alignment inside shorten_branches. */
440
441 /* Here is an explanation how the algorithm in align_fuzz can give
442 proper results:
443
444 Call a sequence of instructions beginning with alignment point X
445 and continuing until the next alignment point `block X'. When `X'
446 is used in an expression, it means the alignment value of the
447 alignment point.
448
449 Call the distance between the start of the first insn of block X, and
450 the end of the last insn of block X `IX', for the `inner size of X'.
451 This is clearly the sum of the instruction lengths.
452
453 Likewise with the next alignment-delimited block following X, which we
454 shall call block Y.
455
456 Call the distance between the start of the first insn of block X, and
457 the start of the first insn of block Y `OX', for the `outer size of X'.
458
459 The estimated padding is then OX - IX.
460
461 OX can be safely estimated as
462
463 if (X >= Y)
464 OX = round_up(IX, Y)
465 else
466 OX = round_up(IX, X) + Y - X
467
468 Clearly est(IX) >= real(IX), because that only depends on the
469 instruction lengths, and those being overestimated is a given.
470
471 Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so
472 we needn't worry about that when thinking about OX.
473
474 When X >= Y, the alignment provided by Y adds no uncertainty factor
475 for branch ranges starting before X, so we can just round what we have.
476 But when X < Y, we don't know anything about the, so to speak,
477 `middle bits', so we have to assume the worst when aligning up from an
478 address mod X to one mod Y, which is Y - X. */
479
480 #ifndef LABEL_ALIGN
481 #define LABEL_ALIGN(LABEL) align_labels_log
482 #endif
483
484 #ifndef LOOP_ALIGN
485 #define LOOP_ALIGN(LABEL) align_loops_log
486 #endif
487
488 #ifndef LABEL_ALIGN_AFTER_BARRIER
489 #define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0
490 #endif
491
492 #ifndef JUMP_ALIGN
493 #define JUMP_ALIGN(LABEL) align_jumps_log
494 #endif
495
496 int
497 default_label_align_after_barrier_max_skip (rtx insn ATTRIBUTE_UNUSED)
498 {
499 return 0;
500 }
501
502 int
503 default_loop_align_max_skip (rtx insn ATTRIBUTE_UNUSED)
504 {
505 return align_loops_max_skip;
506 }
507
508 int
509 default_label_align_max_skip (rtx insn ATTRIBUTE_UNUSED)
510 {
511 return align_labels_max_skip;
512 }
513
514 int
515 default_jump_align_max_skip (rtx insn ATTRIBUTE_UNUSED)
516 {
517 return align_jumps_max_skip;
518 }
519
520 #ifndef ADDR_VEC_ALIGN
521 static int
522 final_addr_vec_align (rtx addr_vec)
523 {
524 int align = GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec)));
525
526 if (align > BIGGEST_ALIGNMENT / BITS_PER_UNIT)
527 align = BIGGEST_ALIGNMENT / BITS_PER_UNIT;
528 return exact_log2 (align);
529
530 }
531
532 #define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC)
533 #endif
534
535 #ifndef INSN_LENGTH_ALIGNMENT
536 #define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log
537 #endif
538
539 #define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)])
540
541 static int min_labelno, max_labelno;
542
543 #define LABEL_TO_ALIGNMENT(LABEL) \
544 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment)
545
546 #define LABEL_TO_MAX_SKIP(LABEL) \
547 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip)
548
549 /* For the benefit of port specific code do this also as a function. */
550
551 int
552 label_to_alignment (rtx label)
553 {
554 if (CODE_LABEL_NUMBER (label) <= max_labelno)
555 return LABEL_TO_ALIGNMENT (label);
556 return 0;
557 }
558
559 int
560 label_to_max_skip (rtx label)
561 {
562 if (CODE_LABEL_NUMBER (label) <= max_labelno)
563 return LABEL_TO_MAX_SKIP (label);
564 return 0;
565 }
566
567 /* The differences in addresses
568 between a branch and its target might grow or shrink depending on
569 the alignment the start insn of the range (the branch for a forward
570 branch or the label for a backward branch) starts out on; if these
571 differences are used naively, they can even oscillate infinitely.
572 We therefore want to compute a 'worst case' address difference that
573 is independent of the alignment the start insn of the range end
574 up on, and that is at least as large as the actual difference.
575 The function align_fuzz calculates the amount we have to add to the
576 naively computed difference, by traversing the part of the alignment
577 chain of the start insn of the range that is in front of the end insn
578 of the range, and considering for each alignment the maximum amount
579 that it might contribute to a size increase.
580
581 For casesi tables, we also want to know worst case minimum amounts of
582 address difference, in case a machine description wants to introduce
583 some common offset that is added to all offsets in a table.
584 For this purpose, align_fuzz with a growth argument of 0 computes the
585 appropriate adjustment. */
586
587 /* Compute the maximum delta by which the difference of the addresses of
588 START and END might grow / shrink due to a different address for start
589 which changes the size of alignment insns between START and END.
590 KNOWN_ALIGN_LOG is the alignment known for START.
591 GROWTH should be ~0 if the objective is to compute potential code size
592 increase, and 0 if the objective is to compute potential shrink.
593 The return value is undefined for any other value of GROWTH. */
594
595 static int
596 align_fuzz (rtx start, rtx end, int known_align_log, unsigned int growth)
597 {
598 int uid = INSN_UID (start);
599 rtx align_label;
600 int known_align = 1 << known_align_log;
601 int end_shuid = INSN_SHUID (end);
602 int fuzz = 0;
603
604 for (align_label = uid_align[uid]; align_label; align_label = uid_align[uid])
605 {
606 int align_addr, new_align;
607
608 uid = INSN_UID (align_label);
609 align_addr = INSN_ADDRESSES (uid) - insn_lengths[uid];
610 if (uid_shuid[uid] > end_shuid)
611 break;
612 known_align_log = LABEL_TO_ALIGNMENT (align_label);
613 new_align = 1 << known_align_log;
614 if (new_align < known_align)
615 continue;
616 fuzz += (-align_addr ^ growth) & (new_align - known_align);
617 known_align = new_align;
618 }
619 return fuzz;
620 }
621
622 /* Compute a worst-case reference address of a branch so that it
623 can be safely used in the presence of aligned labels. Since the
624 size of the branch itself is unknown, the size of the branch is
625 not included in the range. I.e. for a forward branch, the reference
626 address is the end address of the branch as known from the previous
627 branch shortening pass, minus a value to account for possible size
628 increase due to alignment. For a backward branch, it is the start
629 address of the branch as known from the current pass, plus a value
630 to account for possible size increase due to alignment.
631 NB.: Therefore, the maximum offset allowed for backward branches needs
632 to exclude the branch size. */
633
634 int
635 insn_current_reference_address (rtx branch)
636 {
637 rtx dest, seq;
638 int seq_uid;
639
640 if (! INSN_ADDRESSES_SET_P ())
641 return 0;
642
643 seq = NEXT_INSN (PREV_INSN (branch));
644 seq_uid = INSN_UID (seq);
645 if (!JUMP_P (branch))
646 /* This can happen for example on the PA; the objective is to know the
647 offset to address something in front of the start of the function.
648 Thus, we can treat it like a backward branch.
649 We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than
650 any alignment we'd encounter, so we skip the call to align_fuzz. */
651 return insn_current_address;
652 dest = JUMP_LABEL (branch);
653
654 /* BRANCH has no proper alignment chain set, so use SEQ.
655 BRANCH also has no INSN_SHUID. */
656 if (INSN_SHUID (seq) < INSN_SHUID (dest))
657 {
658 /* Forward branch. */
659 return (insn_last_address + insn_lengths[seq_uid]
660 - align_fuzz (seq, dest, length_unit_log, ~0));
661 }
662 else
663 {
664 /* Backward branch. */
665 return (insn_current_address
666 + align_fuzz (dest, seq, length_unit_log, ~0));
667 }
668 }
669 \f
670 /* Compute branch alignments based on frequency information in the
671 CFG. */
672
673 unsigned int
674 compute_alignments (void)
675 {
676 int log, max_skip, max_log;
677 basic_block bb;
678 int freq_max = 0;
679 int freq_threshold = 0;
680
681 if (label_align)
682 {
683 free (label_align);
684 label_align = 0;
685 }
686
687 max_labelno = max_label_num ();
688 min_labelno = get_first_label_num ();
689 label_align = XCNEWVEC (struct label_alignment, max_labelno - min_labelno + 1);
690
691 /* If not optimizing or optimizing for size, don't assign any alignments. */
692 if (! optimize || optimize_function_for_size_p (cfun))
693 return 0;
694
695 if (dump_file)
696 {
697 dump_reg_info (dump_file);
698 dump_flow_info (dump_file, TDF_DETAILS);
699 flow_loops_dump (dump_file, NULL, 1);
700 }
701 loop_optimizer_init (AVOID_CFG_MODIFICATIONS);
702 FOR_EACH_BB (bb)
703 if (bb->frequency > freq_max)
704 freq_max = bb->frequency;
705 freq_threshold = freq_max / PARAM_VALUE (PARAM_ALIGN_THRESHOLD);
706
707 if (dump_file)
708 fprintf (dump_file, "freq_max: %i\n",freq_max);
709 FOR_EACH_BB (bb)
710 {
711 rtx label = BB_HEAD (bb);
712 int fallthru_frequency = 0, branch_frequency = 0, has_fallthru = 0;
713 edge e;
714 edge_iterator ei;
715
716 if (!LABEL_P (label)
717 || optimize_bb_for_size_p (bb))
718 {
719 if (dump_file)
720 fprintf (dump_file,
721 "BB %4i freq %4i loop %2i loop_depth %2i skipped.\n",
722 bb->index, bb->frequency, bb->loop_father->num,
723 bb_loop_depth (bb));
724 continue;
725 }
726 max_log = LABEL_ALIGN (label);
727 max_skip = targetm.asm_out.label_align_max_skip (label);
728
729 FOR_EACH_EDGE (e, ei, bb->preds)
730 {
731 if (e->flags & EDGE_FALLTHRU)
732 has_fallthru = 1, fallthru_frequency += EDGE_FREQUENCY (e);
733 else
734 branch_frequency += EDGE_FREQUENCY (e);
735 }
736 if (dump_file)
737 {
738 fprintf (dump_file, "BB %4i freq %4i loop %2i loop_depth"
739 " %2i fall %4i branch %4i",
740 bb->index, bb->frequency, bb->loop_father->num,
741 bb_loop_depth (bb),
742 fallthru_frequency, branch_frequency);
743 if (!bb->loop_father->inner && bb->loop_father->num)
744 fprintf (dump_file, " inner_loop");
745 if (bb->loop_father->header == bb)
746 fprintf (dump_file, " loop_header");
747 fprintf (dump_file, "\n");
748 }
749
750 /* There are two purposes to align block with no fallthru incoming edge:
751 1) to avoid fetch stalls when branch destination is near cache boundary
752 2) to improve cache efficiency in case the previous block is not executed
753 (so it does not need to be in the cache).
754
755 We to catch first case, we align frequently executed blocks.
756 To catch the second, we align blocks that are executed more frequently
757 than the predecessor and the predecessor is likely to not be executed
758 when function is called. */
759
760 if (!has_fallthru
761 && (branch_frequency > freq_threshold
762 || (bb->frequency > bb->prev_bb->frequency * 10
763 && (bb->prev_bb->frequency
764 <= ENTRY_BLOCK_PTR->frequency / 2))))
765 {
766 log = JUMP_ALIGN (label);
767 if (dump_file)
768 fprintf (dump_file, " jump alignment added.\n");
769 if (max_log < log)
770 {
771 max_log = log;
772 max_skip = targetm.asm_out.jump_align_max_skip (label);
773 }
774 }
775 /* In case block is frequent and reached mostly by non-fallthru edge,
776 align it. It is most likely a first block of loop. */
777 if (has_fallthru
778 && optimize_bb_for_speed_p (bb)
779 && branch_frequency + fallthru_frequency > freq_threshold
780 && (branch_frequency
781 > fallthru_frequency * PARAM_VALUE (PARAM_ALIGN_LOOP_ITERATIONS)))
782 {
783 log = LOOP_ALIGN (label);
784 if (dump_file)
785 fprintf (dump_file, " internal loop alignment added.\n");
786 if (max_log < log)
787 {
788 max_log = log;
789 max_skip = targetm.asm_out.loop_align_max_skip (label);
790 }
791 }
792 LABEL_TO_ALIGNMENT (label) = max_log;
793 LABEL_TO_MAX_SKIP (label) = max_skip;
794 }
795
796 loop_optimizer_finalize ();
797 free_dominance_info (CDI_DOMINATORS);
798 return 0;
799 }
800
801 /* Grow the LABEL_ALIGN array after new labels are created. */
802
803 static void
804 grow_label_align (void)
805 {
806 int old = max_labelno;
807 int n_labels;
808 int n_old_labels;
809
810 max_labelno = max_label_num ();
811
812 n_labels = max_labelno - min_labelno + 1;
813 n_old_labels = old - min_labelno + 1;
814
815 label_align = XRESIZEVEC (struct label_alignment, label_align, n_labels);
816
817 /* Range of labels grows monotonically in the function. Failing here
818 means that the initialization of array got lost. */
819 gcc_assert (n_old_labels <= n_labels);
820
821 memset (label_align + n_old_labels, 0,
822 (n_labels - n_old_labels) * sizeof (struct label_alignment));
823 }
824
825 /* Update the already computed alignment information. LABEL_PAIRS is a vector
826 made up of pairs of labels for which the alignment information of the first
827 element will be copied from that of the second element. */
828
829 void
830 update_alignments (vec<rtx> &label_pairs)
831 {
832 unsigned int i = 0;
833 rtx iter, label;
834
835 if (max_labelno != max_label_num ())
836 grow_label_align ();
837
838 FOR_EACH_VEC_ELT (label_pairs, i, iter)
839 if (i & 1)
840 {
841 LABEL_TO_ALIGNMENT (label) = LABEL_TO_ALIGNMENT (iter);
842 LABEL_TO_MAX_SKIP (label) = LABEL_TO_MAX_SKIP (iter);
843 }
844 else
845 label = iter;
846 }
847
848 namespace {
849
850 const pass_data pass_data_compute_alignments =
851 {
852 RTL_PASS, /* type */
853 "alignments", /* name */
854 OPTGROUP_NONE, /* optinfo_flags */
855 false, /* has_gate */
856 true, /* has_execute */
857 TV_NONE, /* tv_id */
858 0, /* properties_required */
859 0, /* properties_provided */
860 0, /* properties_destroyed */
861 0, /* todo_flags_start */
862 TODO_verify_rtl_sharing, /* todo_flags_finish */
863 };
864
865 class pass_compute_alignments : public rtl_opt_pass
866 {
867 public:
868 pass_compute_alignments (gcc::context *ctxt)
869 : rtl_opt_pass (pass_data_compute_alignments, ctxt)
870 {}
871
872 /* opt_pass methods: */
873 unsigned int execute () { return compute_alignments (); }
874
875 }; // class pass_compute_alignments
876
877 } // anon namespace
878
879 rtl_opt_pass *
880 make_pass_compute_alignments (gcc::context *ctxt)
881 {
882 return new pass_compute_alignments (ctxt);
883 }
884
885 \f
886 /* Make a pass over all insns and compute their actual lengths by shortening
887 any branches of variable length if possible. */
888
889 /* shorten_branches might be called multiple times: for example, the SH
890 port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG.
891 In order to do this, it needs proper length information, which it obtains
892 by calling shorten_branches. This cannot be collapsed with
893 shorten_branches itself into a single pass unless we also want to integrate
894 reorg.c, since the branch splitting exposes new instructions with delay
895 slots. */
896
897 void
898 shorten_branches (rtx first)
899 {
900 rtx insn;
901 int max_uid;
902 int i;
903 int max_log;
904 int max_skip;
905 #define MAX_CODE_ALIGN 16
906 rtx seq;
907 int something_changed = 1;
908 char *varying_length;
909 rtx body;
910 int uid;
911 rtx align_tab[MAX_CODE_ALIGN];
912
913 /* Compute maximum UID and allocate label_align / uid_shuid. */
914 max_uid = get_max_uid ();
915
916 /* Free uid_shuid before reallocating it. */
917 free (uid_shuid);
918
919 uid_shuid = XNEWVEC (int, max_uid);
920
921 if (max_labelno != max_label_num ())
922 grow_label_align ();
923
924 /* Initialize label_align and set up uid_shuid to be strictly
925 monotonically rising with insn order. */
926 /* We use max_log here to keep track of the maximum alignment we want to
927 impose on the next CODE_LABEL (or the current one if we are processing
928 the CODE_LABEL itself). */
929
930 max_log = 0;
931 max_skip = 0;
932
933 for (insn = get_insns (), i = 1; insn; insn = NEXT_INSN (insn))
934 {
935 int log;
936
937 INSN_SHUID (insn) = i++;
938 if (INSN_P (insn))
939 continue;
940
941 if (LABEL_P (insn))
942 {
943 rtx next;
944 bool next_is_jumptable;
945
946 /* Merge in alignments computed by compute_alignments. */
947 log = LABEL_TO_ALIGNMENT (insn);
948 if (max_log < log)
949 {
950 max_log = log;
951 max_skip = LABEL_TO_MAX_SKIP (insn);
952 }
953
954 next = next_nonnote_insn (insn);
955 next_is_jumptable = next && JUMP_TABLE_DATA_P (next);
956 if (!next_is_jumptable)
957 {
958 log = LABEL_ALIGN (insn);
959 if (max_log < log)
960 {
961 max_log = log;
962 max_skip = targetm.asm_out.label_align_max_skip (insn);
963 }
964 }
965 /* ADDR_VECs only take room if read-only data goes into the text
966 section. */
967 if ((JUMP_TABLES_IN_TEXT_SECTION
968 || readonly_data_section == text_section)
969 && next_is_jumptable)
970 {
971 log = ADDR_VEC_ALIGN (next);
972 if (max_log < log)
973 {
974 max_log = log;
975 max_skip = targetm.asm_out.label_align_max_skip (insn);
976 }
977 }
978 LABEL_TO_ALIGNMENT (insn) = max_log;
979 LABEL_TO_MAX_SKIP (insn) = max_skip;
980 max_log = 0;
981 max_skip = 0;
982 }
983 else if (BARRIER_P (insn))
984 {
985 rtx label;
986
987 for (label = insn; label && ! INSN_P (label);
988 label = NEXT_INSN (label))
989 if (LABEL_P (label))
990 {
991 log = LABEL_ALIGN_AFTER_BARRIER (insn);
992 if (max_log < log)
993 {
994 max_log = log;
995 max_skip = targetm.asm_out.label_align_after_barrier_max_skip (label);
996 }
997 break;
998 }
999 }
1000 }
1001 if (!HAVE_ATTR_length)
1002 return;
1003
1004 /* Allocate the rest of the arrays. */
1005 insn_lengths = XNEWVEC (int, max_uid);
1006 insn_lengths_max_uid = max_uid;
1007 /* Syntax errors can lead to labels being outside of the main insn stream.
1008 Initialize insn_addresses, so that we get reproducible results. */
1009 INSN_ADDRESSES_ALLOC (max_uid);
1010
1011 varying_length = XCNEWVEC (char, max_uid);
1012
1013 /* Initialize uid_align. We scan instructions
1014 from end to start, and keep in align_tab[n] the last seen insn
1015 that does an alignment of at least n+1, i.e. the successor
1016 in the alignment chain for an insn that does / has a known
1017 alignment of n. */
1018 uid_align = XCNEWVEC (rtx, max_uid);
1019
1020 for (i = MAX_CODE_ALIGN; --i >= 0;)
1021 align_tab[i] = NULL_RTX;
1022 seq = get_last_insn ();
1023 for (; seq; seq = PREV_INSN (seq))
1024 {
1025 int uid = INSN_UID (seq);
1026 int log;
1027 log = (LABEL_P (seq) ? LABEL_TO_ALIGNMENT (seq) : 0);
1028 uid_align[uid] = align_tab[0];
1029 if (log)
1030 {
1031 /* Found an alignment label. */
1032 uid_align[uid] = align_tab[log];
1033 for (i = log - 1; i >= 0; i--)
1034 align_tab[i] = seq;
1035 }
1036 }
1037
1038 /* When optimizing, we start assuming minimum length, and keep increasing
1039 lengths as we find the need for this, till nothing changes.
1040 When not optimizing, we start assuming maximum lengths, and
1041 do a single pass to update the lengths. */
1042 bool increasing = optimize != 0;
1043
1044 #ifdef CASE_VECTOR_SHORTEN_MODE
1045 if (optimize)
1046 {
1047 /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum
1048 label fields. */
1049
1050 int min_shuid = INSN_SHUID (get_insns ()) - 1;
1051 int max_shuid = INSN_SHUID (get_last_insn ()) + 1;
1052 int rel;
1053
1054 for (insn = first; insn != 0; insn = NEXT_INSN (insn))
1055 {
1056 rtx min_lab = NULL_RTX, max_lab = NULL_RTX, pat;
1057 int len, i, min, max, insn_shuid;
1058 int min_align;
1059 addr_diff_vec_flags flags;
1060
1061 if (! JUMP_TABLE_DATA_P (insn)
1062 || GET_CODE (PATTERN (insn)) != ADDR_DIFF_VEC)
1063 continue;
1064 pat = PATTERN (insn);
1065 len = XVECLEN (pat, 1);
1066 gcc_assert (len > 0);
1067 min_align = MAX_CODE_ALIGN;
1068 for (min = max_shuid, max = min_shuid, i = len - 1; i >= 0; i--)
1069 {
1070 rtx lab = XEXP (XVECEXP (pat, 1, i), 0);
1071 int shuid = INSN_SHUID (lab);
1072 if (shuid < min)
1073 {
1074 min = shuid;
1075 min_lab = lab;
1076 }
1077 if (shuid > max)
1078 {
1079 max = shuid;
1080 max_lab = lab;
1081 }
1082 if (min_align > LABEL_TO_ALIGNMENT (lab))
1083 min_align = LABEL_TO_ALIGNMENT (lab);
1084 }
1085 XEXP (pat, 2) = gen_rtx_LABEL_REF (Pmode, min_lab);
1086 XEXP (pat, 3) = gen_rtx_LABEL_REF (Pmode, max_lab);
1087 insn_shuid = INSN_SHUID (insn);
1088 rel = INSN_SHUID (XEXP (XEXP (pat, 0), 0));
1089 memset (&flags, 0, sizeof (flags));
1090 flags.min_align = min_align;
1091 flags.base_after_vec = rel > insn_shuid;
1092 flags.min_after_vec = min > insn_shuid;
1093 flags.max_after_vec = max > insn_shuid;
1094 flags.min_after_base = min > rel;
1095 flags.max_after_base = max > rel;
1096 ADDR_DIFF_VEC_FLAGS (pat) = flags;
1097
1098 if (increasing)
1099 PUT_MODE (pat, CASE_VECTOR_SHORTEN_MODE (0, 0, pat));
1100 }
1101 }
1102 #endif /* CASE_VECTOR_SHORTEN_MODE */
1103
1104 /* Compute initial lengths, addresses, and varying flags for each insn. */
1105 int (*length_fun) (rtx) = increasing ? insn_min_length : insn_default_length;
1106
1107 for (insn_current_address = 0, insn = first;
1108 insn != 0;
1109 insn_current_address += insn_lengths[uid], insn = NEXT_INSN (insn))
1110 {
1111 uid = INSN_UID (insn);
1112
1113 insn_lengths[uid] = 0;
1114
1115 if (LABEL_P (insn))
1116 {
1117 int log = LABEL_TO_ALIGNMENT (insn);
1118 if (log)
1119 {
1120 int align = 1 << log;
1121 int new_address = (insn_current_address + align - 1) & -align;
1122 insn_lengths[uid] = new_address - insn_current_address;
1123 }
1124 }
1125
1126 INSN_ADDRESSES (uid) = insn_current_address + insn_lengths[uid];
1127
1128 if (NOTE_P (insn) || BARRIER_P (insn)
1129 || LABEL_P (insn) || DEBUG_INSN_P (insn))
1130 continue;
1131 if (INSN_DELETED_P (insn))
1132 continue;
1133
1134 body = PATTERN (insn);
1135 if (JUMP_TABLE_DATA_P (insn))
1136 {
1137 /* This only takes room if read-only data goes into the text
1138 section. */
1139 if (JUMP_TABLES_IN_TEXT_SECTION
1140 || readonly_data_section == text_section)
1141 insn_lengths[uid] = (XVECLEN (body,
1142 GET_CODE (body) == ADDR_DIFF_VEC)
1143 * GET_MODE_SIZE (GET_MODE (body)));
1144 /* Alignment is handled by ADDR_VEC_ALIGN. */
1145 }
1146 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
1147 insn_lengths[uid] = asm_insn_count (body) * insn_default_length (insn);
1148 else if (GET_CODE (body) == SEQUENCE)
1149 {
1150 int i;
1151 int const_delay_slots;
1152 #ifdef DELAY_SLOTS
1153 const_delay_slots = const_num_delay_slots (XVECEXP (body, 0, 0));
1154 #else
1155 const_delay_slots = 0;
1156 #endif
1157 int (*inner_length_fun) (rtx)
1158 = const_delay_slots ? length_fun : insn_default_length;
1159 /* Inside a delay slot sequence, we do not do any branch shortening
1160 if the shortening could change the number of delay slots
1161 of the branch. */
1162 for (i = 0; i < XVECLEN (body, 0); i++)
1163 {
1164 rtx inner_insn = XVECEXP (body, 0, i);
1165 int inner_uid = INSN_UID (inner_insn);
1166 int inner_length;
1167
1168 if (GET_CODE (body) == ASM_INPUT
1169 || asm_noperands (PATTERN (XVECEXP (body, 0, i))) >= 0)
1170 inner_length = (asm_insn_count (PATTERN (inner_insn))
1171 * insn_default_length (inner_insn));
1172 else
1173 inner_length = inner_length_fun (inner_insn);
1174
1175 insn_lengths[inner_uid] = inner_length;
1176 if (const_delay_slots)
1177 {
1178 if ((varying_length[inner_uid]
1179 = insn_variable_length_p (inner_insn)) != 0)
1180 varying_length[uid] = 1;
1181 INSN_ADDRESSES (inner_uid) = (insn_current_address
1182 + insn_lengths[uid]);
1183 }
1184 else
1185 varying_length[inner_uid] = 0;
1186 insn_lengths[uid] += inner_length;
1187 }
1188 }
1189 else if (GET_CODE (body) != USE && GET_CODE (body) != CLOBBER)
1190 {
1191 insn_lengths[uid] = length_fun (insn);
1192 varying_length[uid] = insn_variable_length_p (insn);
1193 }
1194
1195 /* If needed, do any adjustment. */
1196 #ifdef ADJUST_INSN_LENGTH
1197 ADJUST_INSN_LENGTH (insn, insn_lengths[uid]);
1198 if (insn_lengths[uid] < 0)
1199 fatal_insn ("negative insn length", insn);
1200 #endif
1201 }
1202
1203 /* Now loop over all the insns finding varying length insns. For each,
1204 get the current insn length. If it has changed, reflect the change.
1205 When nothing changes for a full pass, we are done. */
1206
1207 while (something_changed)
1208 {
1209 something_changed = 0;
1210 insn_current_align = MAX_CODE_ALIGN - 1;
1211 for (insn_current_address = 0, insn = first;
1212 insn != 0;
1213 insn = NEXT_INSN (insn))
1214 {
1215 int new_length;
1216 #ifdef ADJUST_INSN_LENGTH
1217 int tmp_length;
1218 #endif
1219 int length_align;
1220
1221 uid = INSN_UID (insn);
1222
1223 if (LABEL_P (insn))
1224 {
1225 int log = LABEL_TO_ALIGNMENT (insn);
1226
1227 #ifdef CASE_VECTOR_SHORTEN_MODE
1228 /* If the mode of a following jump table was changed, we
1229 may need to update the alignment of this label. */
1230 rtx next;
1231 bool next_is_jumptable;
1232
1233 next = next_nonnote_insn (insn);
1234 next_is_jumptable = next && JUMP_TABLE_DATA_P (next);
1235 if ((JUMP_TABLES_IN_TEXT_SECTION
1236 || readonly_data_section == text_section)
1237 && next_is_jumptable)
1238 {
1239 int newlog = ADDR_VEC_ALIGN (next);
1240 if (newlog != log)
1241 {
1242 log = newlog;
1243 LABEL_TO_ALIGNMENT (insn) = log;
1244 something_changed = 1;
1245 }
1246 }
1247 #endif
1248
1249 if (log > insn_current_align)
1250 {
1251 int align = 1 << log;
1252 int new_address= (insn_current_address + align - 1) & -align;
1253 insn_lengths[uid] = new_address - insn_current_address;
1254 insn_current_align = log;
1255 insn_current_address = new_address;
1256 }
1257 else
1258 insn_lengths[uid] = 0;
1259 INSN_ADDRESSES (uid) = insn_current_address;
1260 continue;
1261 }
1262
1263 length_align = INSN_LENGTH_ALIGNMENT (insn);
1264 if (length_align < insn_current_align)
1265 insn_current_align = length_align;
1266
1267 insn_last_address = INSN_ADDRESSES (uid);
1268 INSN_ADDRESSES (uid) = insn_current_address;
1269
1270 #ifdef CASE_VECTOR_SHORTEN_MODE
1271 if (optimize
1272 && JUMP_TABLE_DATA_P (insn)
1273 && GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
1274 {
1275 rtx body = PATTERN (insn);
1276 int old_length = insn_lengths[uid];
1277 rtx rel_lab = XEXP (XEXP (body, 0), 0);
1278 rtx min_lab = XEXP (XEXP (body, 2), 0);
1279 rtx max_lab = XEXP (XEXP (body, 3), 0);
1280 int rel_addr = INSN_ADDRESSES (INSN_UID (rel_lab));
1281 int min_addr = INSN_ADDRESSES (INSN_UID (min_lab));
1282 int max_addr = INSN_ADDRESSES (INSN_UID (max_lab));
1283 rtx prev;
1284 int rel_align = 0;
1285 addr_diff_vec_flags flags;
1286 enum machine_mode vec_mode;
1287
1288 /* Avoid automatic aggregate initialization. */
1289 flags = ADDR_DIFF_VEC_FLAGS (body);
1290
1291 /* Try to find a known alignment for rel_lab. */
1292 for (prev = rel_lab;
1293 prev
1294 && ! insn_lengths[INSN_UID (prev)]
1295 && ! (varying_length[INSN_UID (prev)] & 1);
1296 prev = PREV_INSN (prev))
1297 if (varying_length[INSN_UID (prev)] & 2)
1298 {
1299 rel_align = LABEL_TO_ALIGNMENT (prev);
1300 break;
1301 }
1302
1303 /* See the comment on addr_diff_vec_flags in rtl.h for the
1304 meaning of the flags values. base: REL_LAB vec: INSN */
1305 /* Anything after INSN has still addresses from the last
1306 pass; adjust these so that they reflect our current
1307 estimate for this pass. */
1308 if (flags.base_after_vec)
1309 rel_addr += insn_current_address - insn_last_address;
1310 if (flags.min_after_vec)
1311 min_addr += insn_current_address - insn_last_address;
1312 if (flags.max_after_vec)
1313 max_addr += insn_current_address - insn_last_address;
1314 /* We want to know the worst case, i.e. lowest possible value
1315 for the offset of MIN_LAB. If MIN_LAB is after REL_LAB,
1316 its offset is positive, and we have to be wary of code shrink;
1317 otherwise, it is negative, and we have to be vary of code
1318 size increase. */
1319 if (flags.min_after_base)
1320 {
1321 /* If INSN is between REL_LAB and MIN_LAB, the size
1322 changes we are about to make can change the alignment
1323 within the observed offset, therefore we have to break
1324 it up into two parts that are independent. */
1325 if (! flags.base_after_vec && flags.min_after_vec)
1326 {
1327 min_addr -= align_fuzz (rel_lab, insn, rel_align, 0);
1328 min_addr -= align_fuzz (insn, min_lab, 0, 0);
1329 }
1330 else
1331 min_addr -= align_fuzz (rel_lab, min_lab, rel_align, 0);
1332 }
1333 else
1334 {
1335 if (flags.base_after_vec && ! flags.min_after_vec)
1336 {
1337 min_addr -= align_fuzz (min_lab, insn, 0, ~0);
1338 min_addr -= align_fuzz (insn, rel_lab, 0, ~0);
1339 }
1340 else
1341 min_addr -= align_fuzz (min_lab, rel_lab, 0, ~0);
1342 }
1343 /* Likewise, determine the highest lowest possible value
1344 for the offset of MAX_LAB. */
1345 if (flags.max_after_base)
1346 {
1347 if (! flags.base_after_vec && flags.max_after_vec)
1348 {
1349 max_addr += align_fuzz (rel_lab, insn, rel_align, ~0);
1350 max_addr += align_fuzz (insn, max_lab, 0, ~0);
1351 }
1352 else
1353 max_addr += align_fuzz (rel_lab, max_lab, rel_align, ~0);
1354 }
1355 else
1356 {
1357 if (flags.base_after_vec && ! flags.max_after_vec)
1358 {
1359 max_addr += align_fuzz (max_lab, insn, 0, 0);
1360 max_addr += align_fuzz (insn, rel_lab, 0, 0);
1361 }
1362 else
1363 max_addr += align_fuzz (max_lab, rel_lab, 0, 0);
1364 }
1365 vec_mode = CASE_VECTOR_SHORTEN_MODE (min_addr - rel_addr,
1366 max_addr - rel_addr, body);
1367 if (!increasing
1368 || (GET_MODE_SIZE (vec_mode)
1369 >= GET_MODE_SIZE (GET_MODE (body))))
1370 PUT_MODE (body, vec_mode);
1371 if (JUMP_TABLES_IN_TEXT_SECTION
1372 || readonly_data_section == text_section)
1373 {
1374 insn_lengths[uid]
1375 = (XVECLEN (body, 1) * GET_MODE_SIZE (GET_MODE (body)));
1376 insn_current_address += insn_lengths[uid];
1377 if (insn_lengths[uid] != old_length)
1378 something_changed = 1;
1379 }
1380
1381 continue;
1382 }
1383 #endif /* CASE_VECTOR_SHORTEN_MODE */
1384
1385 if (! (varying_length[uid]))
1386 {
1387 if (NONJUMP_INSN_P (insn)
1388 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1389 {
1390 int i;
1391
1392 body = PATTERN (insn);
1393 for (i = 0; i < XVECLEN (body, 0); i++)
1394 {
1395 rtx inner_insn = XVECEXP (body, 0, i);
1396 int inner_uid = INSN_UID (inner_insn);
1397
1398 INSN_ADDRESSES (inner_uid) = insn_current_address;
1399
1400 insn_current_address += insn_lengths[inner_uid];
1401 }
1402 }
1403 else
1404 insn_current_address += insn_lengths[uid];
1405
1406 continue;
1407 }
1408
1409 if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
1410 {
1411 int i;
1412
1413 body = PATTERN (insn);
1414 new_length = 0;
1415 for (i = 0; i < XVECLEN (body, 0); i++)
1416 {
1417 rtx inner_insn = XVECEXP (body, 0, i);
1418 int inner_uid = INSN_UID (inner_insn);
1419 int inner_length;
1420
1421 INSN_ADDRESSES (inner_uid) = insn_current_address;
1422
1423 /* insn_current_length returns 0 for insns with a
1424 non-varying length. */
1425 if (! varying_length[inner_uid])
1426 inner_length = insn_lengths[inner_uid];
1427 else
1428 inner_length = insn_current_length (inner_insn);
1429
1430 if (inner_length != insn_lengths[inner_uid])
1431 {
1432 if (!increasing || inner_length > insn_lengths[inner_uid])
1433 {
1434 insn_lengths[inner_uid] = inner_length;
1435 something_changed = 1;
1436 }
1437 else
1438 inner_length = insn_lengths[inner_uid];
1439 }
1440 insn_current_address += inner_length;
1441 new_length += inner_length;
1442 }
1443 }
1444 else
1445 {
1446 new_length = insn_current_length (insn);
1447 insn_current_address += new_length;
1448 }
1449
1450 #ifdef ADJUST_INSN_LENGTH
1451 /* If needed, do any adjustment. */
1452 tmp_length = new_length;
1453 ADJUST_INSN_LENGTH (insn, new_length);
1454 insn_current_address += (new_length - tmp_length);
1455 #endif
1456
1457 if (new_length != insn_lengths[uid]
1458 && (!increasing || new_length > insn_lengths[uid]))
1459 {
1460 insn_lengths[uid] = new_length;
1461 something_changed = 1;
1462 }
1463 else
1464 insn_current_address += insn_lengths[uid] - new_length;
1465 }
1466 /* For a non-optimizing compile, do only a single pass. */
1467 if (!increasing)
1468 break;
1469 }
1470
1471 free (varying_length);
1472 }
1473
1474 /* Given the body of an INSN known to be generated by an ASM statement, return
1475 the number of machine instructions likely to be generated for this insn.
1476 This is used to compute its length. */
1477
1478 static int
1479 asm_insn_count (rtx body)
1480 {
1481 const char *templ;
1482
1483 if (GET_CODE (body) == ASM_INPUT)
1484 templ = XSTR (body, 0);
1485 else
1486 templ = decode_asm_operands (body, NULL, NULL, NULL, NULL, NULL);
1487
1488 return asm_str_count (templ);
1489 }
1490
1491 /* Return the number of machine instructions likely to be generated for the
1492 inline-asm template. */
1493 int
1494 asm_str_count (const char *templ)
1495 {
1496 int count = 1;
1497
1498 if (!*templ)
1499 return 0;
1500
1501 for (; *templ; templ++)
1502 if (IS_ASM_LOGICAL_LINE_SEPARATOR (*templ, templ)
1503 || *templ == '\n')
1504 count++;
1505
1506 return count;
1507 }
1508 \f
1509 /* ??? This is probably the wrong place for these. */
1510 /* Structure recording the mapping from source file and directory
1511 names at compile time to those to be embedded in debug
1512 information. */
1513 typedef struct debug_prefix_map
1514 {
1515 const char *old_prefix;
1516 const char *new_prefix;
1517 size_t old_len;
1518 size_t new_len;
1519 struct debug_prefix_map *next;
1520 } debug_prefix_map;
1521
1522 /* Linked list of such structures. */
1523 static debug_prefix_map *debug_prefix_maps;
1524
1525
1526 /* Record a debug file prefix mapping. ARG is the argument to
1527 -fdebug-prefix-map and must be of the form OLD=NEW. */
1528
1529 void
1530 add_debug_prefix_map (const char *arg)
1531 {
1532 debug_prefix_map *map;
1533 const char *p;
1534
1535 p = strchr (arg, '=');
1536 if (!p)
1537 {
1538 error ("invalid argument %qs to -fdebug-prefix-map", arg);
1539 return;
1540 }
1541 map = XNEW (debug_prefix_map);
1542 map->old_prefix = xstrndup (arg, p - arg);
1543 map->old_len = p - arg;
1544 p++;
1545 map->new_prefix = xstrdup (p);
1546 map->new_len = strlen (p);
1547 map->next = debug_prefix_maps;
1548 debug_prefix_maps = map;
1549 }
1550
1551 /* Perform user-specified mapping of debug filename prefixes. Return
1552 the new name corresponding to FILENAME. */
1553
1554 const char *
1555 remap_debug_filename (const char *filename)
1556 {
1557 debug_prefix_map *map;
1558 char *s;
1559 const char *name;
1560 size_t name_len;
1561
1562 for (map = debug_prefix_maps; map; map = map->next)
1563 if (filename_ncmp (filename, map->old_prefix, map->old_len) == 0)
1564 break;
1565 if (!map)
1566 return filename;
1567 name = filename + map->old_len;
1568 name_len = strlen (name) + 1;
1569 s = (char *) alloca (name_len + map->new_len);
1570 memcpy (s, map->new_prefix, map->new_len);
1571 memcpy (s + map->new_len, name, name_len);
1572 return ggc_strdup (s);
1573 }
1574 \f
1575 /* Return true if DWARF2 debug info can be emitted for DECL. */
1576
1577 static bool
1578 dwarf2_debug_info_emitted_p (tree decl)
1579 {
1580 if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG)
1581 return false;
1582
1583 if (DECL_IGNORED_P (decl))
1584 return false;
1585
1586 return true;
1587 }
1588
1589 /* Return scope resulting from combination of S1 and S2. */
1590 static tree
1591 choose_inner_scope (tree s1, tree s2)
1592 {
1593 if (!s1)
1594 return s2;
1595 if (!s2)
1596 return s1;
1597 if (BLOCK_NUMBER (s1) > BLOCK_NUMBER (s2))
1598 return s1;
1599 return s2;
1600 }
1601
1602 /* Emit lexical block notes needed to change scope from S1 to S2. */
1603
1604 static void
1605 change_scope (rtx orig_insn, tree s1, tree s2)
1606 {
1607 rtx insn = orig_insn;
1608 tree com = NULL_TREE;
1609 tree ts1 = s1, ts2 = s2;
1610 tree s;
1611
1612 while (ts1 != ts2)
1613 {
1614 gcc_assert (ts1 && ts2);
1615 if (BLOCK_NUMBER (ts1) > BLOCK_NUMBER (ts2))
1616 ts1 = BLOCK_SUPERCONTEXT (ts1);
1617 else if (BLOCK_NUMBER (ts1) < BLOCK_NUMBER (ts2))
1618 ts2 = BLOCK_SUPERCONTEXT (ts2);
1619 else
1620 {
1621 ts1 = BLOCK_SUPERCONTEXT (ts1);
1622 ts2 = BLOCK_SUPERCONTEXT (ts2);
1623 }
1624 }
1625 com = ts1;
1626
1627 /* Close scopes. */
1628 s = s1;
1629 while (s != com)
1630 {
1631 rtx note = emit_note_before (NOTE_INSN_BLOCK_END, insn);
1632 NOTE_BLOCK (note) = s;
1633 s = BLOCK_SUPERCONTEXT (s);
1634 }
1635
1636 /* Open scopes. */
1637 s = s2;
1638 while (s != com)
1639 {
1640 insn = emit_note_before (NOTE_INSN_BLOCK_BEG, insn);
1641 NOTE_BLOCK (insn) = s;
1642 s = BLOCK_SUPERCONTEXT (s);
1643 }
1644 }
1645
1646 /* Rebuild all the NOTE_INSN_BLOCK_BEG and NOTE_INSN_BLOCK_END notes based
1647 on the scope tree and the newly reordered instructions. */
1648
1649 static void
1650 reemit_insn_block_notes (void)
1651 {
1652 tree cur_block = DECL_INITIAL (cfun->decl);
1653 rtx insn, note;
1654
1655 insn = get_insns ();
1656 for (; insn; insn = NEXT_INSN (insn))
1657 {
1658 tree this_block;
1659
1660 /* Prevent lexical blocks from straddling section boundaries. */
1661 if (NOTE_P (insn) && NOTE_KIND (insn) == NOTE_INSN_SWITCH_TEXT_SECTIONS)
1662 {
1663 for (tree s = cur_block; s != DECL_INITIAL (cfun->decl);
1664 s = BLOCK_SUPERCONTEXT (s))
1665 {
1666 rtx note = emit_note_before (NOTE_INSN_BLOCK_END, insn);
1667 NOTE_BLOCK (note) = s;
1668 note = emit_note_after (NOTE_INSN_BLOCK_BEG, insn);
1669 NOTE_BLOCK (note) = s;
1670 }
1671 }
1672
1673 if (!active_insn_p (insn))
1674 continue;
1675
1676 /* Avoid putting scope notes between jump table and its label. */
1677 if (JUMP_TABLE_DATA_P (insn))
1678 continue;
1679
1680 this_block = insn_scope (insn);
1681 /* For sequences compute scope resulting from merging all scopes
1682 of instructions nested inside. */
1683 if (GET_CODE (PATTERN (insn)) == SEQUENCE)
1684 {
1685 int i;
1686 rtx body = PATTERN (insn);
1687
1688 this_block = NULL;
1689 for (i = 0; i < XVECLEN (body, 0); i++)
1690 this_block = choose_inner_scope (this_block,
1691 insn_scope (XVECEXP (body, 0, i)));
1692 }
1693 if (! this_block)
1694 {
1695 if (INSN_LOCATION (insn) == UNKNOWN_LOCATION)
1696 continue;
1697 else
1698 this_block = DECL_INITIAL (cfun->decl);
1699 }
1700
1701 if (this_block != cur_block)
1702 {
1703 change_scope (insn, cur_block, this_block);
1704 cur_block = this_block;
1705 }
1706 }
1707
1708 /* change_scope emits before the insn, not after. */
1709 note = emit_note (NOTE_INSN_DELETED);
1710 change_scope (note, cur_block, DECL_INITIAL (cfun->decl));
1711 delete_insn (note);
1712
1713 reorder_blocks ();
1714 }
1715
1716 /* Output assembler code for the start of a function,
1717 and initialize some of the variables in this file
1718 for the new function. The label for the function and associated
1719 assembler pseudo-ops have already been output in `assemble_start_function'.
1720
1721 FIRST is the first insn of the rtl for the function being compiled.
1722 FILE is the file to write assembler code to.
1723 OPTIMIZE_P is nonzero if we should eliminate redundant
1724 test and compare insns. */
1725
1726 void
1727 final_start_function (rtx first, FILE *file,
1728 int optimize_p ATTRIBUTE_UNUSED)
1729 {
1730 block_depth = 0;
1731
1732 this_is_asm_operands = 0;
1733
1734 need_profile_function = false;
1735
1736 last_filename = LOCATION_FILE (prologue_location);
1737 last_linenum = LOCATION_LINE (prologue_location);
1738 last_discriminator = discriminator = 0;
1739
1740 high_block_linenum = high_function_linenum = last_linenum;
1741
1742 if (flag_sanitize & SANITIZE_ADDRESS)
1743 asan_function_start ();
1744
1745 if (!DECL_IGNORED_P (current_function_decl))
1746 debug_hooks->begin_prologue (last_linenum, last_filename);
1747
1748 if (!dwarf2_debug_info_emitted_p (current_function_decl))
1749 dwarf2out_begin_prologue (0, NULL);
1750
1751 #ifdef LEAF_REG_REMAP
1752 if (crtl->uses_only_leaf_regs)
1753 leaf_renumber_regs (first);
1754 #endif
1755
1756 /* The Sun386i and perhaps other machines don't work right
1757 if the profiling code comes after the prologue. */
1758 if (targetm.profile_before_prologue () && crtl->profile)
1759 {
1760 if (targetm.asm_out.function_prologue
1761 == default_function_pro_epilogue
1762 #ifdef HAVE_prologue
1763 && HAVE_prologue
1764 #endif
1765 )
1766 {
1767 rtx insn;
1768 for (insn = first; insn; insn = NEXT_INSN (insn))
1769 if (!NOTE_P (insn))
1770 {
1771 insn = NULL_RTX;
1772 break;
1773 }
1774 else if (NOTE_KIND (insn) == NOTE_INSN_BASIC_BLOCK
1775 || NOTE_KIND (insn) == NOTE_INSN_FUNCTION_BEG)
1776 break;
1777 else if (NOTE_KIND (insn) == NOTE_INSN_DELETED
1778 || NOTE_KIND (insn) == NOTE_INSN_VAR_LOCATION)
1779 continue;
1780 else
1781 {
1782 insn = NULL_RTX;
1783 break;
1784 }
1785
1786 if (insn)
1787 need_profile_function = true;
1788 else
1789 profile_function (file);
1790 }
1791 else
1792 profile_function (file);
1793 }
1794
1795 /* If debugging, assign block numbers to all of the blocks in this
1796 function. */
1797 if (write_symbols)
1798 {
1799 reemit_insn_block_notes ();
1800 number_blocks (current_function_decl);
1801 /* We never actually put out begin/end notes for the top-level
1802 block in the function. But, conceptually, that block is
1803 always needed. */
1804 TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl)) = 1;
1805 }
1806
1807 if (warn_frame_larger_than
1808 && get_frame_size () > frame_larger_than_size)
1809 {
1810 /* Issue a warning */
1811 warning (OPT_Wframe_larger_than_,
1812 "the frame size of %wd bytes is larger than %wd bytes",
1813 get_frame_size (), frame_larger_than_size);
1814 }
1815
1816 /* First output the function prologue: code to set up the stack frame. */
1817 targetm.asm_out.function_prologue (file, get_frame_size ());
1818
1819 /* If the machine represents the prologue as RTL, the profiling code must
1820 be emitted when NOTE_INSN_PROLOGUE_END is scanned. */
1821 #ifdef HAVE_prologue
1822 if (! HAVE_prologue)
1823 #endif
1824 profile_after_prologue (file);
1825 }
1826
1827 static void
1828 profile_after_prologue (FILE *file ATTRIBUTE_UNUSED)
1829 {
1830 if (!targetm.profile_before_prologue () && crtl->profile)
1831 profile_function (file);
1832 }
1833
1834 static void
1835 profile_function (FILE *file ATTRIBUTE_UNUSED)
1836 {
1837 #ifndef NO_PROFILE_COUNTERS
1838 # define NO_PROFILE_COUNTERS 0
1839 #endif
1840 #ifdef ASM_OUTPUT_REG_PUSH
1841 rtx sval = NULL, chain = NULL;
1842
1843 if (cfun->returns_struct)
1844 sval = targetm.calls.struct_value_rtx (TREE_TYPE (current_function_decl),
1845 true);
1846 if (cfun->static_chain_decl)
1847 chain = targetm.calls.static_chain (current_function_decl, true);
1848 #endif /* ASM_OUTPUT_REG_PUSH */
1849
1850 if (! NO_PROFILE_COUNTERS)
1851 {
1852 int align = MIN (BIGGEST_ALIGNMENT, LONG_TYPE_SIZE);
1853 switch_to_section (data_section);
1854 ASM_OUTPUT_ALIGN (file, floor_log2 (align / BITS_PER_UNIT));
1855 targetm.asm_out.internal_label (file, "LP", current_function_funcdef_no);
1856 assemble_integer (const0_rtx, LONG_TYPE_SIZE / BITS_PER_UNIT, align, 1);
1857 }
1858
1859 switch_to_section (current_function_section ());
1860
1861 #ifdef ASM_OUTPUT_REG_PUSH
1862 if (sval && REG_P (sval))
1863 ASM_OUTPUT_REG_PUSH (file, REGNO (sval));
1864 if (chain && REG_P (chain))
1865 ASM_OUTPUT_REG_PUSH (file, REGNO (chain));
1866 #endif
1867
1868 FUNCTION_PROFILER (file, current_function_funcdef_no);
1869
1870 #ifdef ASM_OUTPUT_REG_PUSH
1871 if (chain && REG_P (chain))
1872 ASM_OUTPUT_REG_POP (file, REGNO (chain));
1873 if (sval && REG_P (sval))
1874 ASM_OUTPUT_REG_POP (file, REGNO (sval));
1875 #endif
1876 }
1877
1878 /* Output assembler code for the end of a function.
1879 For clarity, args are same as those of `final_start_function'
1880 even though not all of them are needed. */
1881
1882 void
1883 final_end_function (void)
1884 {
1885 app_disable ();
1886
1887 if (!DECL_IGNORED_P (current_function_decl))
1888 debug_hooks->end_function (high_function_linenum);
1889
1890 /* Finally, output the function epilogue:
1891 code to restore the stack frame and return to the caller. */
1892 targetm.asm_out.function_epilogue (asm_out_file, get_frame_size ());
1893
1894 /* And debug output. */
1895 if (!DECL_IGNORED_P (current_function_decl))
1896 debug_hooks->end_epilogue (last_linenum, last_filename);
1897
1898 if (!dwarf2_debug_info_emitted_p (current_function_decl)
1899 && dwarf2out_do_frame ())
1900 dwarf2out_end_epilogue (last_linenum, last_filename);
1901 }
1902 \f
1903
1904 /* Dumper helper for basic block information. FILE is the assembly
1905 output file, and INSN is the instruction being emitted. */
1906
1907 static void
1908 dump_basic_block_info (FILE *file, rtx insn, basic_block *start_to_bb,
1909 basic_block *end_to_bb, int bb_map_size, int *bb_seqn)
1910 {
1911 basic_block bb;
1912
1913 if (!flag_debug_asm)
1914 return;
1915
1916 if (INSN_UID (insn) < bb_map_size
1917 && (bb = start_to_bb[INSN_UID (insn)]) != NULL)
1918 {
1919 edge e;
1920 edge_iterator ei;
1921
1922 fprintf (file, "%s BLOCK %d", ASM_COMMENT_START, bb->index);
1923 if (bb->frequency)
1924 fprintf (file, " freq:%d", bb->frequency);
1925 if (bb->count)
1926 fprintf (file, " count:" HOST_WIDEST_INT_PRINT_DEC,
1927 bb->count);
1928 fprintf (file, " seq:%d", (*bb_seqn)++);
1929 fprintf (file, "\n%s PRED:", ASM_COMMENT_START);
1930 FOR_EACH_EDGE (e, ei, bb->preds)
1931 {
1932 dump_edge_info (file, e, TDF_DETAILS, 0);
1933 }
1934 fprintf (file, "\n");
1935 }
1936 if (INSN_UID (insn) < bb_map_size
1937 && (bb = end_to_bb[INSN_UID (insn)]) != NULL)
1938 {
1939 edge e;
1940 edge_iterator ei;
1941
1942 fprintf (asm_out_file, "%s SUCC:", ASM_COMMENT_START);
1943 FOR_EACH_EDGE (e, ei, bb->succs)
1944 {
1945 dump_edge_info (asm_out_file, e, TDF_DETAILS, 1);
1946 }
1947 fprintf (file, "\n");
1948 }
1949 }
1950
1951 /* Output assembler code for some insns: all or part of a function.
1952 For description of args, see `final_start_function', above. */
1953
1954 void
1955 final (rtx first, FILE *file, int optimize_p)
1956 {
1957 rtx insn, next;
1958 int seen = 0;
1959
1960 /* Used for -dA dump. */
1961 basic_block *start_to_bb = NULL;
1962 basic_block *end_to_bb = NULL;
1963 int bb_map_size = 0;
1964 int bb_seqn = 0;
1965
1966 last_ignored_compare = 0;
1967
1968 #ifdef HAVE_cc0
1969 for (insn = first; insn; insn = NEXT_INSN (insn))
1970 {
1971 /* If CC tracking across branches is enabled, record the insn which
1972 jumps to each branch only reached from one place. */
1973 if (optimize_p && JUMP_P (insn))
1974 {
1975 rtx lab = JUMP_LABEL (insn);
1976 if (lab && LABEL_P (lab) && LABEL_NUSES (lab) == 1)
1977 {
1978 LABEL_REFS (lab) = insn;
1979 }
1980 }
1981 }
1982 #endif
1983
1984 init_recog ();
1985
1986 CC_STATUS_INIT;
1987
1988 if (flag_debug_asm)
1989 {
1990 basic_block bb;
1991
1992 bb_map_size = get_max_uid () + 1;
1993 start_to_bb = XCNEWVEC (basic_block, bb_map_size);
1994 end_to_bb = XCNEWVEC (basic_block, bb_map_size);
1995
1996 /* There is no cfg for a thunk. */
1997 if (!cfun->is_thunk)
1998 FOR_EACH_BB_REVERSE (bb)
1999 {
2000 start_to_bb[INSN_UID (BB_HEAD (bb))] = bb;
2001 end_to_bb[INSN_UID (BB_END (bb))] = bb;
2002 }
2003 }
2004
2005 /* Output the insns. */
2006 for (insn = first; insn;)
2007 {
2008 if (HAVE_ATTR_length)
2009 {
2010 if ((unsigned) INSN_UID (insn) >= INSN_ADDRESSES_SIZE ())
2011 {
2012 /* This can be triggered by bugs elsewhere in the compiler if
2013 new insns are created after init_insn_lengths is called. */
2014 gcc_assert (NOTE_P (insn));
2015 insn_current_address = -1;
2016 }
2017 else
2018 insn_current_address = INSN_ADDRESSES (INSN_UID (insn));
2019 }
2020
2021 dump_basic_block_info (file, insn, start_to_bb, end_to_bb,
2022 bb_map_size, &bb_seqn);
2023 insn = final_scan_insn (insn, file, optimize_p, 0, &seen);
2024 }
2025
2026 if (flag_debug_asm)
2027 {
2028 free (start_to_bb);
2029 free (end_to_bb);
2030 }
2031
2032 /* Remove CFI notes, to avoid compare-debug failures. */
2033 for (insn = first; insn; insn = next)
2034 {
2035 next = NEXT_INSN (insn);
2036 if (NOTE_P (insn)
2037 && (NOTE_KIND (insn) == NOTE_INSN_CFI
2038 || NOTE_KIND (insn) == NOTE_INSN_CFI_LABEL))
2039 delete_insn (insn);
2040 }
2041 }
2042 \f
2043 const char *
2044 get_insn_template (int code, rtx insn)
2045 {
2046 switch (insn_data[code].output_format)
2047 {
2048 case INSN_OUTPUT_FORMAT_SINGLE:
2049 return insn_data[code].output.single;
2050 case INSN_OUTPUT_FORMAT_MULTI:
2051 return insn_data[code].output.multi[which_alternative];
2052 case INSN_OUTPUT_FORMAT_FUNCTION:
2053 gcc_assert (insn);
2054 return (*insn_data[code].output.function) (recog_data.operand, insn);
2055
2056 default:
2057 gcc_unreachable ();
2058 }
2059 }
2060
2061 /* Emit the appropriate declaration for an alternate-entry-point
2062 symbol represented by INSN, to FILE. INSN is a CODE_LABEL with
2063 LABEL_KIND != LABEL_NORMAL.
2064
2065 The case fall-through in this function is intentional. */
2066 static void
2067 output_alternate_entry_point (FILE *file, rtx insn)
2068 {
2069 const char *name = LABEL_NAME (insn);
2070
2071 switch (LABEL_KIND (insn))
2072 {
2073 case LABEL_WEAK_ENTRY:
2074 #ifdef ASM_WEAKEN_LABEL
2075 ASM_WEAKEN_LABEL (file, name);
2076 #endif
2077 case LABEL_GLOBAL_ENTRY:
2078 targetm.asm_out.globalize_label (file, name);
2079 case LABEL_STATIC_ENTRY:
2080 #ifdef ASM_OUTPUT_TYPE_DIRECTIVE
2081 ASM_OUTPUT_TYPE_DIRECTIVE (file, name, "function");
2082 #endif
2083 ASM_OUTPUT_LABEL (file, name);
2084 break;
2085
2086 case LABEL_NORMAL:
2087 default:
2088 gcc_unreachable ();
2089 }
2090 }
2091
2092 /* Given a CALL_INSN, find and return the nested CALL. */
2093 static rtx
2094 call_from_call_insn (rtx insn)
2095 {
2096 rtx x;
2097 gcc_assert (CALL_P (insn));
2098 x = PATTERN (insn);
2099
2100 while (GET_CODE (x) != CALL)
2101 {
2102 switch (GET_CODE (x))
2103 {
2104 default:
2105 gcc_unreachable ();
2106 case COND_EXEC:
2107 x = COND_EXEC_CODE (x);
2108 break;
2109 case PARALLEL:
2110 x = XVECEXP (x, 0, 0);
2111 break;
2112 case SET:
2113 x = XEXP (x, 1);
2114 break;
2115 }
2116 }
2117 return x;
2118 }
2119
2120 /* The final scan for one insn, INSN.
2121 Args are same as in `final', except that INSN
2122 is the insn being scanned.
2123 Value returned is the next insn to be scanned.
2124
2125 NOPEEPHOLES is the flag to disallow peephole processing (currently
2126 used for within delayed branch sequence output).
2127
2128 SEEN is used to track the end of the prologue, for emitting
2129 debug information. We force the emission of a line note after
2130 both NOTE_INSN_PROLOGUE_END and NOTE_INSN_FUNCTION_BEG, or
2131 at the beginning of the second basic block, whichever comes
2132 first. */
2133
2134 rtx
2135 final_scan_insn (rtx insn, FILE *file, int optimize_p ATTRIBUTE_UNUSED,
2136 int nopeepholes ATTRIBUTE_UNUSED, int *seen)
2137 {
2138 #ifdef HAVE_cc0
2139 rtx set;
2140 #endif
2141 rtx next;
2142
2143 insn_counter++;
2144
2145 /* Ignore deleted insns. These can occur when we split insns (due to a
2146 template of "#") while not optimizing. */
2147 if (INSN_DELETED_P (insn))
2148 return NEXT_INSN (insn);
2149
2150 switch (GET_CODE (insn))
2151 {
2152 case NOTE:
2153 switch (NOTE_KIND (insn))
2154 {
2155 case NOTE_INSN_DELETED:
2156 break;
2157
2158 case NOTE_INSN_SWITCH_TEXT_SECTIONS:
2159 in_cold_section_p = !in_cold_section_p;
2160
2161 if (dwarf2out_do_frame ())
2162 dwarf2out_switch_text_section ();
2163 else if (!DECL_IGNORED_P (current_function_decl))
2164 debug_hooks->switch_text_section ();
2165
2166 switch_to_section (current_function_section ());
2167 targetm.asm_out.function_switched_text_sections (asm_out_file,
2168 current_function_decl,
2169 in_cold_section_p);
2170 break;
2171
2172 case NOTE_INSN_BASIC_BLOCK:
2173 if (need_profile_function)
2174 {
2175 profile_function (asm_out_file);
2176 need_profile_function = false;
2177 }
2178
2179 if (targetm.asm_out.unwind_emit)
2180 targetm.asm_out.unwind_emit (asm_out_file, insn);
2181
2182 if ((*seen & (SEEN_EMITTED | SEEN_BB)) == SEEN_BB)
2183 {
2184 *seen |= SEEN_EMITTED;
2185 force_source_line = true;
2186 }
2187 else
2188 *seen |= SEEN_BB;
2189
2190 discriminator = NOTE_BASIC_BLOCK (insn)->discriminator;
2191
2192 break;
2193
2194 case NOTE_INSN_EH_REGION_BEG:
2195 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHB",
2196 NOTE_EH_HANDLER (insn));
2197 break;
2198
2199 case NOTE_INSN_EH_REGION_END:
2200 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHE",
2201 NOTE_EH_HANDLER (insn));
2202 break;
2203
2204 case NOTE_INSN_PROLOGUE_END:
2205 targetm.asm_out.function_end_prologue (file);
2206 profile_after_prologue (file);
2207
2208 if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE)
2209 {
2210 *seen |= SEEN_EMITTED;
2211 force_source_line = true;
2212 }
2213 else
2214 *seen |= SEEN_NOTE;
2215
2216 break;
2217
2218 case NOTE_INSN_EPILOGUE_BEG:
2219 if (!DECL_IGNORED_P (current_function_decl))
2220 (*debug_hooks->begin_epilogue) (last_linenum, last_filename);
2221 targetm.asm_out.function_begin_epilogue (file);
2222 break;
2223
2224 case NOTE_INSN_CFI:
2225 dwarf2out_emit_cfi (NOTE_CFI (insn));
2226 break;
2227
2228 case NOTE_INSN_CFI_LABEL:
2229 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LCFI",
2230 NOTE_LABEL_NUMBER (insn));
2231 break;
2232
2233 case NOTE_INSN_FUNCTION_BEG:
2234 if (need_profile_function)
2235 {
2236 profile_function (asm_out_file);
2237 need_profile_function = false;
2238 }
2239
2240 app_disable ();
2241 if (!DECL_IGNORED_P (current_function_decl))
2242 debug_hooks->end_prologue (last_linenum, last_filename);
2243
2244 if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE)
2245 {
2246 *seen |= SEEN_EMITTED;
2247 force_source_line = true;
2248 }
2249 else
2250 *seen |= SEEN_NOTE;
2251
2252 break;
2253
2254 case NOTE_INSN_BLOCK_BEG:
2255 if (debug_info_level == DINFO_LEVEL_NORMAL
2256 || debug_info_level == DINFO_LEVEL_VERBOSE
2257 || write_symbols == DWARF2_DEBUG
2258 || write_symbols == VMS_AND_DWARF2_DEBUG
2259 || write_symbols == VMS_DEBUG)
2260 {
2261 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
2262
2263 app_disable ();
2264 ++block_depth;
2265 high_block_linenum = last_linenum;
2266
2267 /* Output debugging info about the symbol-block beginning. */
2268 if (!DECL_IGNORED_P (current_function_decl))
2269 debug_hooks->begin_block (last_linenum, n);
2270
2271 /* Mark this block as output. */
2272 TREE_ASM_WRITTEN (NOTE_BLOCK (insn)) = 1;
2273 }
2274 if (write_symbols == DBX_DEBUG
2275 || write_symbols == SDB_DEBUG)
2276 {
2277 location_t *locus_ptr
2278 = block_nonartificial_location (NOTE_BLOCK (insn));
2279
2280 if (locus_ptr != NULL)
2281 {
2282 override_filename = LOCATION_FILE (*locus_ptr);
2283 override_linenum = LOCATION_LINE (*locus_ptr);
2284 }
2285 }
2286 break;
2287
2288 case NOTE_INSN_BLOCK_END:
2289 if (debug_info_level == DINFO_LEVEL_NORMAL
2290 || debug_info_level == DINFO_LEVEL_VERBOSE
2291 || write_symbols == DWARF2_DEBUG
2292 || write_symbols == VMS_AND_DWARF2_DEBUG
2293 || write_symbols == VMS_DEBUG)
2294 {
2295 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
2296
2297 app_disable ();
2298
2299 /* End of a symbol-block. */
2300 --block_depth;
2301 gcc_assert (block_depth >= 0);
2302
2303 if (!DECL_IGNORED_P (current_function_decl))
2304 debug_hooks->end_block (high_block_linenum, n);
2305 }
2306 if (write_symbols == DBX_DEBUG
2307 || write_symbols == SDB_DEBUG)
2308 {
2309 tree outer_block = BLOCK_SUPERCONTEXT (NOTE_BLOCK (insn));
2310 location_t *locus_ptr
2311 = block_nonartificial_location (outer_block);
2312
2313 if (locus_ptr != NULL)
2314 {
2315 override_filename = LOCATION_FILE (*locus_ptr);
2316 override_linenum = LOCATION_LINE (*locus_ptr);
2317 }
2318 else
2319 {
2320 override_filename = NULL;
2321 override_linenum = 0;
2322 }
2323 }
2324 break;
2325
2326 case NOTE_INSN_DELETED_LABEL:
2327 /* Emit the label. We may have deleted the CODE_LABEL because
2328 the label could be proved to be unreachable, though still
2329 referenced (in the form of having its address taken. */
2330 ASM_OUTPUT_DEBUG_LABEL (file, "L", CODE_LABEL_NUMBER (insn));
2331 break;
2332
2333 case NOTE_INSN_DELETED_DEBUG_LABEL:
2334 /* Similarly, but need to use different namespace for it. */
2335 if (CODE_LABEL_NUMBER (insn) != -1)
2336 ASM_OUTPUT_DEBUG_LABEL (file, "LDL", CODE_LABEL_NUMBER (insn));
2337 break;
2338
2339 case NOTE_INSN_VAR_LOCATION:
2340 case NOTE_INSN_CALL_ARG_LOCATION:
2341 if (!DECL_IGNORED_P (current_function_decl))
2342 debug_hooks->var_location (insn);
2343 break;
2344
2345 default:
2346 gcc_unreachable ();
2347 break;
2348 }
2349 break;
2350
2351 case BARRIER:
2352 break;
2353
2354 case CODE_LABEL:
2355 /* The target port might emit labels in the output function for
2356 some insn, e.g. sh.c output_branchy_insn. */
2357 if (CODE_LABEL_NUMBER (insn) <= max_labelno)
2358 {
2359 int align = LABEL_TO_ALIGNMENT (insn);
2360 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2361 int max_skip = LABEL_TO_MAX_SKIP (insn);
2362 #endif
2363
2364 if (align && NEXT_INSN (insn))
2365 {
2366 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2367 ASM_OUTPUT_MAX_SKIP_ALIGN (file, align, max_skip);
2368 #else
2369 #ifdef ASM_OUTPUT_ALIGN_WITH_NOP
2370 ASM_OUTPUT_ALIGN_WITH_NOP (file, align);
2371 #else
2372 ASM_OUTPUT_ALIGN (file, align);
2373 #endif
2374 #endif
2375 }
2376 }
2377 CC_STATUS_INIT;
2378
2379 if (!DECL_IGNORED_P (current_function_decl) && LABEL_NAME (insn))
2380 debug_hooks->label (insn);
2381
2382 app_disable ();
2383
2384 next = next_nonnote_insn (insn);
2385 /* If this label is followed by a jump-table, make sure we put
2386 the label in the read-only section. Also possibly write the
2387 label and jump table together. */
2388 if (next != 0 && JUMP_TABLE_DATA_P (next))
2389 {
2390 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2391 /* In this case, the case vector is being moved by the
2392 target, so don't output the label at all. Leave that
2393 to the back end macros. */
2394 #else
2395 if (! JUMP_TABLES_IN_TEXT_SECTION)
2396 {
2397 int log_align;
2398
2399 switch_to_section (targetm.asm_out.function_rodata_section
2400 (current_function_decl));
2401
2402 #ifdef ADDR_VEC_ALIGN
2403 log_align = ADDR_VEC_ALIGN (next);
2404 #else
2405 log_align = exact_log2 (BIGGEST_ALIGNMENT / BITS_PER_UNIT);
2406 #endif
2407 ASM_OUTPUT_ALIGN (file, log_align);
2408 }
2409 else
2410 switch_to_section (current_function_section ());
2411
2412 #ifdef ASM_OUTPUT_CASE_LABEL
2413 ASM_OUTPUT_CASE_LABEL (file, "L", CODE_LABEL_NUMBER (insn),
2414 next);
2415 #else
2416 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn));
2417 #endif
2418 #endif
2419 break;
2420 }
2421 if (LABEL_ALT_ENTRY_P (insn))
2422 output_alternate_entry_point (file, insn);
2423 else
2424 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn));
2425 break;
2426
2427 default:
2428 {
2429 rtx body = PATTERN (insn);
2430 int insn_code_number;
2431 const char *templ;
2432 bool is_stmt;
2433
2434 /* Reset this early so it is correct for ASM statements. */
2435 current_insn_predicate = NULL_RTX;
2436
2437 /* An INSN, JUMP_INSN or CALL_INSN.
2438 First check for special kinds that recog doesn't recognize. */
2439
2440 if (GET_CODE (body) == USE /* These are just declarations. */
2441 || GET_CODE (body) == CLOBBER)
2442 break;
2443
2444 #ifdef HAVE_cc0
2445 {
2446 /* If there is a REG_CC_SETTER note on this insn, it means that
2447 the setting of the condition code was done in the delay slot
2448 of the insn that branched here. So recover the cc status
2449 from the insn that set it. */
2450
2451 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2452 if (note)
2453 {
2454 NOTICE_UPDATE_CC (PATTERN (XEXP (note, 0)), XEXP (note, 0));
2455 cc_prev_status = cc_status;
2456 }
2457 }
2458 #endif
2459
2460 /* Detect insns that are really jump-tables
2461 and output them as such. */
2462
2463 if (JUMP_TABLE_DATA_P (insn))
2464 {
2465 #if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC))
2466 int vlen, idx;
2467 #endif
2468
2469 if (! JUMP_TABLES_IN_TEXT_SECTION)
2470 switch_to_section (targetm.asm_out.function_rodata_section
2471 (current_function_decl));
2472 else
2473 switch_to_section (current_function_section ());
2474
2475 app_disable ();
2476
2477 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2478 if (GET_CODE (body) == ADDR_VEC)
2479 {
2480 #ifdef ASM_OUTPUT_ADDR_VEC
2481 ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn), body);
2482 #else
2483 gcc_unreachable ();
2484 #endif
2485 }
2486 else
2487 {
2488 #ifdef ASM_OUTPUT_ADDR_DIFF_VEC
2489 ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn), body);
2490 #else
2491 gcc_unreachable ();
2492 #endif
2493 }
2494 #else
2495 vlen = XVECLEN (body, GET_CODE (body) == ADDR_DIFF_VEC);
2496 for (idx = 0; idx < vlen; idx++)
2497 {
2498 if (GET_CODE (body) == ADDR_VEC)
2499 {
2500 #ifdef ASM_OUTPUT_ADDR_VEC_ELT
2501 ASM_OUTPUT_ADDR_VEC_ELT
2502 (file, CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 0, idx), 0)));
2503 #else
2504 gcc_unreachable ();
2505 #endif
2506 }
2507 else
2508 {
2509 #ifdef ASM_OUTPUT_ADDR_DIFF_ELT
2510 ASM_OUTPUT_ADDR_DIFF_ELT
2511 (file,
2512 body,
2513 CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 1, idx), 0)),
2514 CODE_LABEL_NUMBER (XEXP (XEXP (body, 0), 0)));
2515 #else
2516 gcc_unreachable ();
2517 #endif
2518 }
2519 }
2520 #ifdef ASM_OUTPUT_CASE_END
2521 ASM_OUTPUT_CASE_END (file,
2522 CODE_LABEL_NUMBER (PREV_INSN (insn)),
2523 insn);
2524 #endif
2525 #endif
2526
2527 switch_to_section (current_function_section ());
2528
2529 break;
2530 }
2531 /* Output this line note if it is the first or the last line
2532 note in a row. */
2533 if (!DECL_IGNORED_P (current_function_decl)
2534 && notice_source_line (insn, &is_stmt))
2535 (*debug_hooks->source_line) (last_linenum, last_filename,
2536 last_discriminator, is_stmt);
2537
2538 if (GET_CODE (body) == ASM_INPUT)
2539 {
2540 const char *string = XSTR (body, 0);
2541
2542 /* There's no telling what that did to the condition codes. */
2543 CC_STATUS_INIT;
2544
2545 if (string[0])
2546 {
2547 expanded_location loc;
2548
2549 app_enable ();
2550 loc = expand_location (ASM_INPUT_SOURCE_LOCATION (body));
2551 if (*loc.file && loc.line)
2552 fprintf (asm_out_file, "%s %i \"%s\" 1\n",
2553 ASM_COMMENT_START, loc.line, loc.file);
2554 fprintf (asm_out_file, "\t%s\n", string);
2555 #if HAVE_AS_LINE_ZERO
2556 if (*loc.file && loc.line)
2557 fprintf (asm_out_file, "%s 0 \"\" 2\n", ASM_COMMENT_START);
2558 #endif
2559 }
2560 break;
2561 }
2562
2563 /* Detect `asm' construct with operands. */
2564 if (asm_noperands (body) >= 0)
2565 {
2566 unsigned int noperands = asm_noperands (body);
2567 rtx *ops = XALLOCAVEC (rtx, noperands);
2568 const char *string;
2569 location_t loc;
2570 expanded_location expanded;
2571
2572 /* There's no telling what that did to the condition codes. */
2573 CC_STATUS_INIT;
2574
2575 /* Get out the operand values. */
2576 string = decode_asm_operands (body, ops, NULL, NULL, NULL, &loc);
2577 /* Inhibit dying on what would otherwise be compiler bugs. */
2578 insn_noperands = noperands;
2579 this_is_asm_operands = insn;
2580 expanded = expand_location (loc);
2581
2582 #ifdef FINAL_PRESCAN_INSN
2583 FINAL_PRESCAN_INSN (insn, ops, insn_noperands);
2584 #endif
2585
2586 /* Output the insn using them. */
2587 if (string[0])
2588 {
2589 app_enable ();
2590 if (expanded.file && expanded.line)
2591 fprintf (asm_out_file, "%s %i \"%s\" 1\n",
2592 ASM_COMMENT_START, expanded.line, expanded.file);
2593 output_asm_insn (string, ops);
2594 #if HAVE_AS_LINE_ZERO
2595 if (expanded.file && expanded.line)
2596 fprintf (asm_out_file, "%s 0 \"\" 2\n", ASM_COMMENT_START);
2597 #endif
2598 }
2599
2600 if (targetm.asm_out.final_postscan_insn)
2601 targetm.asm_out.final_postscan_insn (file, insn, ops,
2602 insn_noperands);
2603
2604 this_is_asm_operands = 0;
2605 break;
2606 }
2607
2608 app_disable ();
2609
2610 if (GET_CODE (body) == SEQUENCE)
2611 {
2612 /* A delayed-branch sequence */
2613 int i;
2614
2615 final_sequence = body;
2616
2617 /* The first insn in this SEQUENCE might be a JUMP_INSN that will
2618 force the restoration of a comparison that was previously
2619 thought unnecessary. If that happens, cancel this sequence
2620 and cause that insn to be restored. */
2621
2622 next = final_scan_insn (XVECEXP (body, 0, 0), file, 0, 1, seen);
2623 if (next != XVECEXP (body, 0, 1))
2624 {
2625 final_sequence = 0;
2626 return next;
2627 }
2628
2629 for (i = 1; i < XVECLEN (body, 0); i++)
2630 {
2631 rtx insn = XVECEXP (body, 0, i);
2632 rtx next = NEXT_INSN (insn);
2633 /* We loop in case any instruction in a delay slot gets
2634 split. */
2635 do
2636 insn = final_scan_insn (insn, file, 0, 1, seen);
2637 while (insn != next);
2638 }
2639 #ifdef DBR_OUTPUT_SEQEND
2640 DBR_OUTPUT_SEQEND (file);
2641 #endif
2642 final_sequence = 0;
2643
2644 /* If the insn requiring the delay slot was a CALL_INSN, the
2645 insns in the delay slot are actually executed before the
2646 called function. Hence we don't preserve any CC-setting
2647 actions in these insns and the CC must be marked as being
2648 clobbered by the function. */
2649 if (CALL_P (XVECEXP (body, 0, 0)))
2650 {
2651 CC_STATUS_INIT;
2652 }
2653 break;
2654 }
2655
2656 /* We have a real machine instruction as rtl. */
2657
2658 body = PATTERN (insn);
2659
2660 #ifdef HAVE_cc0
2661 set = single_set (insn);
2662
2663 /* Check for redundant test and compare instructions
2664 (when the condition codes are already set up as desired).
2665 This is done only when optimizing; if not optimizing,
2666 it should be possible for the user to alter a variable
2667 with the debugger in between statements
2668 and the next statement should reexamine the variable
2669 to compute the condition codes. */
2670
2671 if (optimize_p)
2672 {
2673 if (set
2674 && GET_CODE (SET_DEST (set)) == CC0
2675 && insn != last_ignored_compare)
2676 {
2677 rtx src1, src2;
2678 if (GET_CODE (SET_SRC (set)) == SUBREG)
2679 SET_SRC (set) = alter_subreg (&SET_SRC (set), true);
2680
2681 src1 = SET_SRC (set);
2682 src2 = NULL_RTX;
2683 if (GET_CODE (SET_SRC (set)) == COMPARE)
2684 {
2685 if (GET_CODE (XEXP (SET_SRC (set), 0)) == SUBREG)
2686 XEXP (SET_SRC (set), 0)
2687 = alter_subreg (&XEXP (SET_SRC (set), 0), true);
2688 if (GET_CODE (XEXP (SET_SRC (set), 1)) == SUBREG)
2689 XEXP (SET_SRC (set), 1)
2690 = alter_subreg (&XEXP (SET_SRC (set), 1), true);
2691 if (XEXP (SET_SRC (set), 1)
2692 == CONST0_RTX (GET_MODE (XEXP (SET_SRC (set), 0))))
2693 src2 = XEXP (SET_SRC (set), 0);
2694 }
2695 if ((cc_status.value1 != 0
2696 && rtx_equal_p (src1, cc_status.value1))
2697 || (cc_status.value2 != 0
2698 && rtx_equal_p (src1, cc_status.value2))
2699 || (src2 != 0 && cc_status.value1 != 0
2700 && rtx_equal_p (src2, cc_status.value1))
2701 || (src2 != 0 && cc_status.value2 != 0
2702 && rtx_equal_p (src2, cc_status.value2)))
2703 {
2704 /* Don't delete insn if it has an addressing side-effect. */
2705 if (! FIND_REG_INC_NOTE (insn, NULL_RTX)
2706 /* or if anything in it is volatile. */
2707 && ! volatile_refs_p (PATTERN (insn)))
2708 {
2709 /* We don't really delete the insn; just ignore it. */
2710 last_ignored_compare = insn;
2711 break;
2712 }
2713 }
2714 }
2715 }
2716
2717 /* If this is a conditional branch, maybe modify it
2718 if the cc's are in a nonstandard state
2719 so that it accomplishes the same thing that it would
2720 do straightforwardly if the cc's were set up normally. */
2721
2722 if (cc_status.flags != 0
2723 && JUMP_P (insn)
2724 && GET_CODE (body) == SET
2725 && SET_DEST (body) == pc_rtx
2726 && GET_CODE (SET_SRC (body)) == IF_THEN_ELSE
2727 && COMPARISON_P (XEXP (SET_SRC (body), 0))
2728 && XEXP (XEXP (SET_SRC (body), 0), 0) == cc0_rtx)
2729 {
2730 /* This function may alter the contents of its argument
2731 and clear some of the cc_status.flags bits.
2732 It may also return 1 meaning condition now always true
2733 or -1 meaning condition now always false
2734 or 2 meaning condition nontrivial but altered. */
2735 int result = alter_cond (XEXP (SET_SRC (body), 0));
2736 /* If condition now has fixed value, replace the IF_THEN_ELSE
2737 with its then-operand or its else-operand. */
2738 if (result == 1)
2739 SET_SRC (body) = XEXP (SET_SRC (body), 1);
2740 if (result == -1)
2741 SET_SRC (body) = XEXP (SET_SRC (body), 2);
2742
2743 /* The jump is now either unconditional or a no-op.
2744 If it has become a no-op, don't try to output it.
2745 (It would not be recognized.) */
2746 if (SET_SRC (body) == pc_rtx)
2747 {
2748 delete_insn (insn);
2749 break;
2750 }
2751 else if (ANY_RETURN_P (SET_SRC (body)))
2752 /* Replace (set (pc) (return)) with (return). */
2753 PATTERN (insn) = body = SET_SRC (body);
2754
2755 /* Rerecognize the instruction if it has changed. */
2756 if (result != 0)
2757 INSN_CODE (insn) = -1;
2758 }
2759
2760 /* If this is a conditional trap, maybe modify it if the cc's
2761 are in a nonstandard state so that it accomplishes the same
2762 thing that it would do straightforwardly if the cc's were
2763 set up normally. */
2764 if (cc_status.flags != 0
2765 && NONJUMP_INSN_P (insn)
2766 && GET_CODE (body) == TRAP_IF
2767 && COMPARISON_P (TRAP_CONDITION (body))
2768 && XEXP (TRAP_CONDITION (body), 0) == cc0_rtx)
2769 {
2770 /* This function may alter the contents of its argument
2771 and clear some of the cc_status.flags bits.
2772 It may also return 1 meaning condition now always true
2773 or -1 meaning condition now always false
2774 or 2 meaning condition nontrivial but altered. */
2775 int result = alter_cond (TRAP_CONDITION (body));
2776
2777 /* If TRAP_CONDITION has become always false, delete the
2778 instruction. */
2779 if (result == -1)
2780 {
2781 delete_insn (insn);
2782 break;
2783 }
2784
2785 /* If TRAP_CONDITION has become always true, replace
2786 TRAP_CONDITION with const_true_rtx. */
2787 if (result == 1)
2788 TRAP_CONDITION (body) = const_true_rtx;
2789
2790 /* Rerecognize the instruction if it has changed. */
2791 if (result != 0)
2792 INSN_CODE (insn) = -1;
2793 }
2794
2795 /* Make same adjustments to instructions that examine the
2796 condition codes without jumping and instructions that
2797 handle conditional moves (if this machine has either one). */
2798
2799 if (cc_status.flags != 0
2800 && set != 0)
2801 {
2802 rtx cond_rtx, then_rtx, else_rtx;
2803
2804 if (!JUMP_P (insn)
2805 && GET_CODE (SET_SRC (set)) == IF_THEN_ELSE)
2806 {
2807 cond_rtx = XEXP (SET_SRC (set), 0);
2808 then_rtx = XEXP (SET_SRC (set), 1);
2809 else_rtx = XEXP (SET_SRC (set), 2);
2810 }
2811 else
2812 {
2813 cond_rtx = SET_SRC (set);
2814 then_rtx = const_true_rtx;
2815 else_rtx = const0_rtx;
2816 }
2817
2818 if (COMPARISON_P (cond_rtx)
2819 && XEXP (cond_rtx, 0) == cc0_rtx)
2820 {
2821 int result;
2822 result = alter_cond (cond_rtx);
2823 if (result == 1)
2824 validate_change (insn, &SET_SRC (set), then_rtx, 0);
2825 else if (result == -1)
2826 validate_change (insn, &SET_SRC (set), else_rtx, 0);
2827 else if (result == 2)
2828 INSN_CODE (insn) = -1;
2829 if (SET_DEST (set) == SET_SRC (set))
2830 delete_insn (insn);
2831 }
2832 }
2833
2834 #endif
2835
2836 #ifdef HAVE_peephole
2837 /* Do machine-specific peephole optimizations if desired. */
2838
2839 if (optimize_p && !flag_no_peephole && !nopeepholes)
2840 {
2841 rtx next = peephole (insn);
2842 /* When peepholing, if there were notes within the peephole,
2843 emit them before the peephole. */
2844 if (next != 0 && next != NEXT_INSN (insn))
2845 {
2846 rtx note, prev = PREV_INSN (insn);
2847
2848 for (note = NEXT_INSN (insn); note != next;
2849 note = NEXT_INSN (note))
2850 final_scan_insn (note, file, optimize_p, nopeepholes, seen);
2851
2852 /* Put the notes in the proper position for a later
2853 rescan. For example, the SH target can do this
2854 when generating a far jump in a delayed branch
2855 sequence. */
2856 note = NEXT_INSN (insn);
2857 PREV_INSN (note) = prev;
2858 NEXT_INSN (prev) = note;
2859 NEXT_INSN (PREV_INSN (next)) = insn;
2860 PREV_INSN (insn) = PREV_INSN (next);
2861 NEXT_INSN (insn) = next;
2862 PREV_INSN (next) = insn;
2863 }
2864
2865 /* PEEPHOLE might have changed this. */
2866 body = PATTERN (insn);
2867 }
2868 #endif
2869
2870 /* Try to recognize the instruction.
2871 If successful, verify that the operands satisfy the
2872 constraints for the instruction. Crash if they don't,
2873 since `reload' should have changed them so that they do. */
2874
2875 insn_code_number = recog_memoized (insn);
2876 cleanup_subreg_operands (insn);
2877
2878 /* Dump the insn in the assembly for debugging (-dAP).
2879 If the final dump is requested as slim RTL, dump slim
2880 RTL to the assembly file also. */
2881 if (flag_dump_rtl_in_asm)
2882 {
2883 print_rtx_head = ASM_COMMENT_START;
2884 if (! (dump_flags & TDF_SLIM))
2885 print_rtl_single (asm_out_file, insn);
2886 else
2887 dump_insn_slim (asm_out_file, insn);
2888 print_rtx_head = "";
2889 }
2890
2891 if (! constrain_operands_cached (1))
2892 fatal_insn_not_found (insn);
2893
2894 /* Some target machines need to prescan each insn before
2895 it is output. */
2896
2897 #ifdef FINAL_PRESCAN_INSN
2898 FINAL_PRESCAN_INSN (insn, recog_data.operand, recog_data.n_operands);
2899 #endif
2900
2901 if (targetm.have_conditional_execution ()
2902 && GET_CODE (PATTERN (insn)) == COND_EXEC)
2903 current_insn_predicate = COND_EXEC_TEST (PATTERN (insn));
2904
2905 #ifdef HAVE_cc0
2906 cc_prev_status = cc_status;
2907
2908 /* Update `cc_status' for this instruction.
2909 The instruction's output routine may change it further.
2910 If the output routine for a jump insn needs to depend
2911 on the cc status, it should look at cc_prev_status. */
2912
2913 NOTICE_UPDATE_CC (body, insn);
2914 #endif
2915
2916 current_output_insn = debug_insn = insn;
2917
2918 /* Find the proper template for this insn. */
2919 templ = get_insn_template (insn_code_number, insn);
2920
2921 /* If the C code returns 0, it means that it is a jump insn
2922 which follows a deleted test insn, and that test insn
2923 needs to be reinserted. */
2924 if (templ == 0)
2925 {
2926 rtx prev;
2927
2928 gcc_assert (prev_nonnote_insn (insn) == last_ignored_compare);
2929
2930 /* We have already processed the notes between the setter and
2931 the user. Make sure we don't process them again, this is
2932 particularly important if one of the notes is a block
2933 scope note or an EH note. */
2934 for (prev = insn;
2935 prev != last_ignored_compare;
2936 prev = PREV_INSN (prev))
2937 {
2938 if (NOTE_P (prev))
2939 delete_insn (prev); /* Use delete_note. */
2940 }
2941
2942 return prev;
2943 }
2944
2945 /* If the template is the string "#", it means that this insn must
2946 be split. */
2947 if (templ[0] == '#' && templ[1] == '\0')
2948 {
2949 rtx new_rtx = try_split (body, insn, 0);
2950
2951 /* If we didn't split the insn, go away. */
2952 if (new_rtx == insn && PATTERN (new_rtx) == body)
2953 fatal_insn ("could not split insn", insn);
2954
2955 /* If we have a length attribute, this instruction should have
2956 been split in shorten_branches, to ensure that we would have
2957 valid length info for the splitees. */
2958 gcc_assert (!HAVE_ATTR_length);
2959
2960 return new_rtx;
2961 }
2962
2963 /* ??? This will put the directives in the wrong place if
2964 get_insn_template outputs assembly directly. However calling it
2965 before get_insn_template breaks if the insns is split. */
2966 if (targetm.asm_out.unwind_emit_before_insn
2967 && targetm.asm_out.unwind_emit)
2968 targetm.asm_out.unwind_emit (asm_out_file, insn);
2969
2970 if (CALL_P (insn))
2971 {
2972 rtx x = call_from_call_insn (insn);
2973 x = XEXP (x, 0);
2974 if (x && MEM_P (x) && GET_CODE (XEXP (x, 0)) == SYMBOL_REF)
2975 {
2976 tree t;
2977 x = XEXP (x, 0);
2978 t = SYMBOL_REF_DECL (x);
2979 if (t)
2980 assemble_external (t);
2981 }
2982 if (!DECL_IGNORED_P (current_function_decl))
2983 debug_hooks->var_location (insn);
2984 }
2985
2986 /* Output assembler code from the template. */
2987 output_asm_insn (templ, recog_data.operand);
2988
2989 /* Some target machines need to postscan each insn after
2990 it is output. */
2991 if (targetm.asm_out.final_postscan_insn)
2992 targetm.asm_out.final_postscan_insn (file, insn, recog_data.operand,
2993 recog_data.n_operands);
2994
2995 if (!targetm.asm_out.unwind_emit_before_insn
2996 && targetm.asm_out.unwind_emit)
2997 targetm.asm_out.unwind_emit (asm_out_file, insn);
2998
2999 current_output_insn = debug_insn = 0;
3000 }
3001 }
3002 return NEXT_INSN (insn);
3003 }
3004 \f
3005 /* Return whether a source line note needs to be emitted before INSN.
3006 Sets IS_STMT to TRUE if the line should be marked as a possible
3007 breakpoint location. */
3008
3009 static bool
3010 notice_source_line (rtx insn, bool *is_stmt)
3011 {
3012 const char *filename;
3013 int linenum;
3014
3015 if (override_filename)
3016 {
3017 filename = override_filename;
3018 linenum = override_linenum;
3019 }
3020 else
3021 {
3022 filename = insn_file (insn);
3023 linenum = insn_line (insn);
3024 }
3025
3026 if (filename == NULL)
3027 return false;
3028
3029 if (force_source_line
3030 || filename != last_filename
3031 || last_linenum != linenum)
3032 {
3033 force_source_line = false;
3034 last_filename = filename;
3035 last_linenum = linenum;
3036 last_discriminator = discriminator;
3037 *is_stmt = true;
3038 high_block_linenum = MAX (last_linenum, high_block_linenum);
3039 high_function_linenum = MAX (last_linenum, high_function_linenum);
3040 return true;
3041 }
3042
3043 if (SUPPORTS_DISCRIMINATOR && last_discriminator != discriminator)
3044 {
3045 /* If the discriminator changed, but the line number did not,
3046 output the line table entry with is_stmt false so the
3047 debugger does not treat this as a breakpoint location. */
3048 last_discriminator = discriminator;
3049 *is_stmt = false;
3050 return true;
3051 }
3052
3053 return false;
3054 }
3055 \f
3056 /* For each operand in INSN, simplify (subreg (reg)) so that it refers
3057 directly to the desired hard register. */
3058
3059 void
3060 cleanup_subreg_operands (rtx insn)
3061 {
3062 int i;
3063 bool changed = false;
3064 extract_insn_cached (insn);
3065 for (i = 0; i < recog_data.n_operands; i++)
3066 {
3067 /* The following test cannot use recog_data.operand when testing
3068 for a SUBREG: the underlying object might have been changed
3069 already if we are inside a match_operator expression that
3070 matches the else clause. Instead we test the underlying
3071 expression directly. */
3072 if (GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
3073 {
3074 recog_data.operand[i] = alter_subreg (recog_data.operand_loc[i], true);
3075 changed = true;
3076 }
3077 else if (GET_CODE (recog_data.operand[i]) == PLUS
3078 || GET_CODE (recog_data.operand[i]) == MULT
3079 || MEM_P (recog_data.operand[i]))
3080 recog_data.operand[i] = walk_alter_subreg (recog_data.operand_loc[i], &changed);
3081 }
3082
3083 for (i = 0; i < recog_data.n_dups; i++)
3084 {
3085 if (GET_CODE (*recog_data.dup_loc[i]) == SUBREG)
3086 {
3087 *recog_data.dup_loc[i] = alter_subreg (recog_data.dup_loc[i], true);
3088 changed = true;
3089 }
3090 else if (GET_CODE (*recog_data.dup_loc[i]) == PLUS
3091 || GET_CODE (*recog_data.dup_loc[i]) == MULT
3092 || MEM_P (*recog_data.dup_loc[i]))
3093 *recog_data.dup_loc[i] = walk_alter_subreg (recog_data.dup_loc[i], &changed);
3094 }
3095 if (changed)
3096 df_insn_rescan (insn);
3097 }
3098
3099 /* If X is a SUBREG, try to replace it with a REG or a MEM, based on
3100 the thing it is a subreg of. Do it anyway if FINAL_P. */
3101
3102 rtx
3103 alter_subreg (rtx *xp, bool final_p)
3104 {
3105 rtx x = *xp;
3106 rtx y = SUBREG_REG (x);
3107
3108 /* simplify_subreg does not remove subreg from volatile references.
3109 We are required to. */
3110 if (MEM_P (y))
3111 {
3112 int offset = SUBREG_BYTE (x);
3113
3114 /* For paradoxical subregs on big-endian machines, SUBREG_BYTE
3115 contains 0 instead of the proper offset. See simplify_subreg. */
3116 if (offset == 0
3117 && GET_MODE_SIZE (GET_MODE (y)) < GET_MODE_SIZE (GET_MODE (x)))
3118 {
3119 int difference = GET_MODE_SIZE (GET_MODE (y))
3120 - GET_MODE_SIZE (GET_MODE (x));
3121 if (WORDS_BIG_ENDIAN)
3122 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
3123 if (BYTES_BIG_ENDIAN)
3124 offset += difference % UNITS_PER_WORD;
3125 }
3126
3127 if (final_p)
3128 *xp = adjust_address (y, GET_MODE (x), offset);
3129 else
3130 *xp = adjust_address_nv (y, GET_MODE (x), offset);
3131 }
3132 else
3133 {
3134 rtx new_rtx = simplify_subreg (GET_MODE (x), y, GET_MODE (y),
3135 SUBREG_BYTE (x));
3136
3137 if (new_rtx != 0)
3138 *xp = new_rtx;
3139 else if (final_p && REG_P (y))
3140 {
3141 /* Simplify_subreg can't handle some REG cases, but we have to. */
3142 unsigned int regno;
3143 HOST_WIDE_INT offset;
3144
3145 regno = subreg_regno (x);
3146 if (subreg_lowpart_p (x))
3147 offset = byte_lowpart_offset (GET_MODE (x), GET_MODE (y));
3148 else
3149 offset = SUBREG_BYTE (x);
3150 *xp = gen_rtx_REG_offset (y, GET_MODE (x), regno, offset);
3151 }
3152 }
3153
3154 return *xp;
3155 }
3156
3157 /* Do alter_subreg on all the SUBREGs contained in X. */
3158
3159 static rtx
3160 walk_alter_subreg (rtx *xp, bool *changed)
3161 {
3162 rtx x = *xp;
3163 switch (GET_CODE (x))
3164 {
3165 case PLUS:
3166 case MULT:
3167 case AND:
3168 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed);
3169 XEXP (x, 1) = walk_alter_subreg (&XEXP (x, 1), changed);
3170 break;
3171
3172 case MEM:
3173 case ZERO_EXTEND:
3174 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed);
3175 break;
3176
3177 case SUBREG:
3178 *changed = true;
3179 return alter_subreg (xp, true);
3180
3181 default:
3182 break;
3183 }
3184
3185 return *xp;
3186 }
3187 \f
3188 #ifdef HAVE_cc0
3189
3190 /* Given BODY, the body of a jump instruction, alter the jump condition
3191 as required by the bits that are set in cc_status.flags.
3192 Not all of the bits there can be handled at this level in all cases.
3193
3194 The value is normally 0.
3195 1 means that the condition has become always true.
3196 -1 means that the condition has become always false.
3197 2 means that COND has been altered. */
3198
3199 static int
3200 alter_cond (rtx cond)
3201 {
3202 int value = 0;
3203
3204 if (cc_status.flags & CC_REVERSED)
3205 {
3206 value = 2;
3207 PUT_CODE (cond, swap_condition (GET_CODE (cond)));
3208 }
3209
3210 if (cc_status.flags & CC_INVERTED)
3211 {
3212 value = 2;
3213 PUT_CODE (cond, reverse_condition (GET_CODE (cond)));
3214 }
3215
3216 if (cc_status.flags & CC_NOT_POSITIVE)
3217 switch (GET_CODE (cond))
3218 {
3219 case LE:
3220 case LEU:
3221 case GEU:
3222 /* Jump becomes unconditional. */
3223 return 1;
3224
3225 case GT:
3226 case GTU:
3227 case LTU:
3228 /* Jump becomes no-op. */
3229 return -1;
3230
3231 case GE:
3232 PUT_CODE (cond, EQ);
3233 value = 2;
3234 break;
3235
3236 case LT:
3237 PUT_CODE (cond, NE);
3238 value = 2;
3239 break;
3240
3241 default:
3242 break;
3243 }
3244
3245 if (cc_status.flags & CC_NOT_NEGATIVE)
3246 switch (GET_CODE (cond))
3247 {
3248 case GE:
3249 case GEU:
3250 /* Jump becomes unconditional. */
3251 return 1;
3252
3253 case LT:
3254 case LTU:
3255 /* Jump becomes no-op. */
3256 return -1;
3257
3258 case LE:
3259 case LEU:
3260 PUT_CODE (cond, EQ);
3261 value = 2;
3262 break;
3263
3264 case GT:
3265 case GTU:
3266 PUT_CODE (cond, NE);
3267 value = 2;
3268 break;
3269
3270 default:
3271 break;
3272 }
3273
3274 if (cc_status.flags & CC_NO_OVERFLOW)
3275 switch (GET_CODE (cond))
3276 {
3277 case GEU:
3278 /* Jump becomes unconditional. */
3279 return 1;
3280
3281 case LEU:
3282 PUT_CODE (cond, EQ);
3283 value = 2;
3284 break;
3285
3286 case GTU:
3287 PUT_CODE (cond, NE);
3288 value = 2;
3289 break;
3290
3291 case LTU:
3292 /* Jump becomes no-op. */
3293 return -1;
3294
3295 default:
3296 break;
3297 }
3298
3299 if (cc_status.flags & (CC_Z_IN_NOT_N | CC_Z_IN_N))
3300 switch (GET_CODE (cond))
3301 {
3302 default:
3303 gcc_unreachable ();
3304
3305 case NE:
3306 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? GE : LT);
3307 value = 2;
3308 break;
3309
3310 case EQ:
3311 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? LT : GE);
3312 value = 2;
3313 break;
3314 }
3315
3316 if (cc_status.flags & CC_NOT_SIGNED)
3317 /* The flags are valid if signed condition operators are converted
3318 to unsigned. */
3319 switch (GET_CODE (cond))
3320 {
3321 case LE:
3322 PUT_CODE (cond, LEU);
3323 value = 2;
3324 break;
3325
3326 case LT:
3327 PUT_CODE (cond, LTU);
3328 value = 2;
3329 break;
3330
3331 case GT:
3332 PUT_CODE (cond, GTU);
3333 value = 2;
3334 break;
3335
3336 case GE:
3337 PUT_CODE (cond, GEU);
3338 value = 2;
3339 break;
3340
3341 default:
3342 break;
3343 }
3344
3345 return value;
3346 }
3347 #endif
3348 \f
3349 /* Report inconsistency between the assembler template and the operands.
3350 In an `asm', it's the user's fault; otherwise, the compiler's fault. */
3351
3352 void
3353 output_operand_lossage (const char *cmsgid, ...)
3354 {
3355 char *fmt_string;
3356 char *new_message;
3357 const char *pfx_str;
3358 va_list ap;
3359
3360 va_start (ap, cmsgid);
3361
3362 pfx_str = this_is_asm_operands ? _("invalid 'asm': ") : "output_operand: ";
3363 asprintf (&fmt_string, "%s%s", pfx_str, _(cmsgid));
3364 vasprintf (&new_message, fmt_string, ap);
3365
3366 if (this_is_asm_operands)
3367 error_for_asm (this_is_asm_operands, "%s", new_message);
3368 else
3369 internal_error ("%s", new_message);
3370
3371 free (fmt_string);
3372 free (new_message);
3373 va_end (ap);
3374 }
3375 \f
3376 /* Output of assembler code from a template, and its subroutines. */
3377
3378 /* Annotate the assembly with a comment describing the pattern and
3379 alternative used. */
3380
3381 static void
3382 output_asm_name (void)
3383 {
3384 if (debug_insn)
3385 {
3386 int num = INSN_CODE (debug_insn);
3387 fprintf (asm_out_file, "\t%s %d\t%s",
3388 ASM_COMMENT_START, INSN_UID (debug_insn),
3389 insn_data[num].name);
3390 if (insn_data[num].n_alternatives > 1)
3391 fprintf (asm_out_file, "/%d", which_alternative + 1);
3392
3393 if (HAVE_ATTR_length)
3394 fprintf (asm_out_file, "\t[length = %d]",
3395 get_attr_length (debug_insn));
3396
3397 /* Clear this so only the first assembler insn
3398 of any rtl insn will get the special comment for -dp. */
3399 debug_insn = 0;
3400 }
3401 }
3402
3403 /* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it
3404 or its address, return that expr . Set *PADDRESSP to 1 if the expr
3405 corresponds to the address of the object and 0 if to the object. */
3406
3407 static tree
3408 get_mem_expr_from_op (rtx op, int *paddressp)
3409 {
3410 tree expr;
3411 int inner_addressp;
3412
3413 *paddressp = 0;
3414
3415 if (REG_P (op))
3416 return REG_EXPR (op);
3417 else if (!MEM_P (op))
3418 return 0;
3419
3420 if (MEM_EXPR (op) != 0)
3421 return MEM_EXPR (op);
3422
3423 /* Otherwise we have an address, so indicate it and look at the address. */
3424 *paddressp = 1;
3425 op = XEXP (op, 0);
3426
3427 /* First check if we have a decl for the address, then look at the right side
3428 if it is a PLUS. Otherwise, strip off arithmetic and keep looking.
3429 But don't allow the address to itself be indirect. */
3430 if ((expr = get_mem_expr_from_op (op, &inner_addressp)) && ! inner_addressp)
3431 return expr;
3432 else if (GET_CODE (op) == PLUS
3433 && (expr = get_mem_expr_from_op (XEXP (op, 1), &inner_addressp)))
3434 return expr;
3435
3436 while (UNARY_P (op)
3437 || GET_RTX_CLASS (GET_CODE (op)) == RTX_BIN_ARITH)
3438 op = XEXP (op, 0);
3439
3440 expr = get_mem_expr_from_op (op, &inner_addressp);
3441 return inner_addressp ? 0 : expr;
3442 }
3443
3444 /* Output operand names for assembler instructions. OPERANDS is the
3445 operand vector, OPORDER is the order to write the operands, and NOPS
3446 is the number of operands to write. */
3447
3448 static void
3449 output_asm_operand_names (rtx *operands, int *oporder, int nops)
3450 {
3451 int wrote = 0;
3452 int i;
3453
3454 for (i = 0; i < nops; i++)
3455 {
3456 int addressp;
3457 rtx op = operands[oporder[i]];
3458 tree expr = get_mem_expr_from_op (op, &addressp);
3459
3460 fprintf (asm_out_file, "%c%s",
3461 wrote ? ',' : '\t', wrote ? "" : ASM_COMMENT_START);
3462 wrote = 1;
3463 if (expr)
3464 {
3465 fprintf (asm_out_file, "%s",
3466 addressp ? "*" : "");
3467 print_mem_expr (asm_out_file, expr);
3468 wrote = 1;
3469 }
3470 else if (REG_P (op) && ORIGINAL_REGNO (op)
3471 && ORIGINAL_REGNO (op) != REGNO (op))
3472 fprintf (asm_out_file, " tmp%i", ORIGINAL_REGNO (op));
3473 }
3474 }
3475
3476 #ifdef ASSEMBLER_DIALECT
3477 /* Helper function to parse assembler dialects in the asm string.
3478 This is called from output_asm_insn and asm_fprintf. */
3479 static const char *
3480 do_assembler_dialects (const char *p, int *dialect)
3481 {
3482 char c = *(p - 1);
3483
3484 switch (c)
3485 {
3486 case '{':
3487 {
3488 int i;
3489
3490 if (*dialect)
3491 output_operand_lossage ("nested assembly dialect alternatives");
3492 else
3493 *dialect = 1;
3494
3495 /* If we want the first dialect, do nothing. Otherwise, skip
3496 DIALECT_NUMBER of strings ending with '|'. */
3497 for (i = 0; i < dialect_number; i++)
3498 {
3499 while (*p && *p != '}')
3500 {
3501 if (*p == '|')
3502 {
3503 p++;
3504 break;
3505 }
3506
3507 /* Skip over any character after a percent sign. */
3508 if (*p == '%')
3509 p++;
3510 if (*p)
3511 p++;
3512 }
3513
3514 if (*p == '}')
3515 break;
3516 }
3517
3518 if (*p == '\0')
3519 output_operand_lossage ("unterminated assembly dialect alternative");
3520 }
3521 break;
3522
3523 case '|':
3524 if (*dialect)
3525 {
3526 /* Skip to close brace. */
3527 do
3528 {
3529 if (*p == '\0')
3530 {
3531 output_operand_lossage ("unterminated assembly dialect alternative");
3532 break;
3533 }
3534
3535 /* Skip over any character after a percent sign. */
3536 if (*p == '%' && p[1])
3537 {
3538 p += 2;
3539 continue;
3540 }
3541
3542 if (*p++ == '}')
3543 break;
3544 }
3545 while (1);
3546
3547 *dialect = 0;
3548 }
3549 else
3550 putc (c, asm_out_file);
3551 break;
3552
3553 case '}':
3554 if (! *dialect)
3555 putc (c, asm_out_file);
3556 *dialect = 0;
3557 break;
3558 default:
3559 gcc_unreachable ();
3560 }
3561
3562 return p;
3563 }
3564 #endif
3565
3566 /* Output text from TEMPLATE to the assembler output file,
3567 obeying %-directions to substitute operands taken from
3568 the vector OPERANDS.
3569
3570 %N (for N a digit) means print operand N in usual manner.
3571 %lN means require operand N to be a CODE_LABEL or LABEL_REF
3572 and print the label name with no punctuation.
3573 %cN means require operand N to be a constant
3574 and print the constant expression with no punctuation.
3575 %aN means expect operand N to be a memory address
3576 (not a memory reference!) and print a reference
3577 to that address.
3578 %nN means expect operand N to be a constant
3579 and print a constant expression for minus the value
3580 of the operand, with no other punctuation. */
3581
3582 void
3583 output_asm_insn (const char *templ, rtx *operands)
3584 {
3585 const char *p;
3586 int c;
3587 #ifdef ASSEMBLER_DIALECT
3588 int dialect = 0;
3589 #endif
3590 int oporder[MAX_RECOG_OPERANDS];
3591 char opoutput[MAX_RECOG_OPERANDS];
3592 int ops = 0;
3593
3594 /* An insn may return a null string template
3595 in a case where no assembler code is needed. */
3596 if (*templ == 0)
3597 return;
3598
3599 memset (opoutput, 0, sizeof opoutput);
3600 p = templ;
3601 putc ('\t', asm_out_file);
3602
3603 #ifdef ASM_OUTPUT_OPCODE
3604 ASM_OUTPUT_OPCODE (asm_out_file, p);
3605 #endif
3606
3607 while ((c = *p++))
3608 switch (c)
3609 {
3610 case '\n':
3611 if (flag_verbose_asm)
3612 output_asm_operand_names (operands, oporder, ops);
3613 if (flag_print_asm_name)
3614 output_asm_name ();
3615
3616 ops = 0;
3617 memset (opoutput, 0, sizeof opoutput);
3618
3619 putc (c, asm_out_file);
3620 #ifdef ASM_OUTPUT_OPCODE
3621 while ((c = *p) == '\t')
3622 {
3623 putc (c, asm_out_file);
3624 p++;
3625 }
3626 ASM_OUTPUT_OPCODE (asm_out_file, p);
3627 #endif
3628 break;
3629
3630 #ifdef ASSEMBLER_DIALECT
3631 case '{':
3632 case '}':
3633 case '|':
3634 p = do_assembler_dialects (p, &dialect);
3635 break;
3636 #endif
3637
3638 case '%':
3639 /* %% outputs a single %. %{, %} and %| print {, } and | respectively
3640 if ASSEMBLER_DIALECT defined and these characters have a special
3641 meaning as dialect delimiters.*/
3642 if (*p == '%'
3643 #ifdef ASSEMBLER_DIALECT
3644 || *p == '{' || *p == '}' || *p == '|'
3645 #endif
3646 )
3647 {
3648 putc (*p, asm_out_file);
3649 p++;
3650 }
3651 /* %= outputs a number which is unique to each insn in the entire
3652 compilation. This is useful for making local labels that are
3653 referred to more than once in a given insn. */
3654 else if (*p == '=')
3655 {
3656 p++;
3657 fprintf (asm_out_file, "%d", insn_counter);
3658 }
3659 /* % followed by a letter and some digits
3660 outputs an operand in a special way depending on the letter.
3661 Letters `acln' are implemented directly.
3662 Other letters are passed to `output_operand' so that
3663 the TARGET_PRINT_OPERAND hook can define them. */
3664 else if (ISALPHA (*p))
3665 {
3666 int letter = *p++;
3667 unsigned long opnum;
3668 char *endptr;
3669
3670 opnum = strtoul (p, &endptr, 10);
3671
3672 if (endptr == p)
3673 output_operand_lossage ("operand number missing "
3674 "after %%-letter");
3675 else if (this_is_asm_operands && opnum >= insn_noperands)
3676 output_operand_lossage ("operand number out of range");
3677 else if (letter == 'l')
3678 output_asm_label (operands[opnum]);
3679 else if (letter == 'a')
3680 output_address (operands[opnum]);
3681 else if (letter == 'c')
3682 {
3683 if (CONSTANT_ADDRESS_P (operands[opnum]))
3684 output_addr_const (asm_out_file, operands[opnum]);
3685 else
3686 output_operand (operands[opnum], 'c');
3687 }
3688 else if (letter == 'n')
3689 {
3690 if (CONST_INT_P (operands[opnum]))
3691 fprintf (asm_out_file, HOST_WIDE_INT_PRINT_DEC,
3692 - INTVAL (operands[opnum]));
3693 else
3694 {
3695 putc ('-', asm_out_file);
3696 output_addr_const (asm_out_file, operands[opnum]);
3697 }
3698 }
3699 else
3700 output_operand (operands[opnum], letter);
3701
3702 if (!opoutput[opnum])
3703 oporder[ops++] = opnum;
3704 opoutput[opnum] = 1;
3705
3706 p = endptr;
3707 c = *p;
3708 }
3709 /* % followed by a digit outputs an operand the default way. */
3710 else if (ISDIGIT (*p))
3711 {
3712 unsigned long opnum;
3713 char *endptr;
3714
3715 opnum = strtoul (p, &endptr, 10);
3716 if (this_is_asm_operands && opnum >= insn_noperands)
3717 output_operand_lossage ("operand number out of range");
3718 else
3719 output_operand (operands[opnum], 0);
3720
3721 if (!opoutput[opnum])
3722 oporder[ops++] = opnum;
3723 opoutput[opnum] = 1;
3724
3725 p = endptr;
3726 c = *p;
3727 }
3728 /* % followed by punctuation: output something for that
3729 punctuation character alone, with no operand. The
3730 TARGET_PRINT_OPERAND hook decides what is actually done. */
3731 else if (targetm.asm_out.print_operand_punct_valid_p ((unsigned char) *p))
3732 output_operand (NULL_RTX, *p++);
3733 else
3734 output_operand_lossage ("invalid %%-code");
3735 break;
3736
3737 default:
3738 putc (c, asm_out_file);
3739 }
3740
3741 /* Write out the variable names for operands, if we know them. */
3742 if (flag_verbose_asm)
3743 output_asm_operand_names (operands, oporder, ops);
3744 if (flag_print_asm_name)
3745 output_asm_name ();
3746
3747 putc ('\n', asm_out_file);
3748 }
3749 \f
3750 /* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */
3751
3752 void
3753 output_asm_label (rtx x)
3754 {
3755 char buf[256];
3756
3757 if (GET_CODE (x) == LABEL_REF)
3758 x = XEXP (x, 0);
3759 if (LABEL_P (x)
3760 || (NOTE_P (x)
3761 && NOTE_KIND (x) == NOTE_INSN_DELETED_LABEL))
3762 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3763 else
3764 output_operand_lossage ("'%%l' operand isn't a label");
3765
3766 assemble_name (asm_out_file, buf);
3767 }
3768
3769 /* Helper rtx-iteration-function for mark_symbol_refs_as_used and
3770 output_operand. Marks SYMBOL_REFs as referenced through use of
3771 assemble_external. */
3772
3773 static int
3774 mark_symbol_ref_as_used (rtx *xp, void *dummy ATTRIBUTE_UNUSED)
3775 {
3776 rtx x = *xp;
3777
3778 /* If we have a used symbol, we may have to emit assembly
3779 annotations corresponding to whether the symbol is external, weak
3780 or has non-default visibility. */
3781 if (GET_CODE (x) == SYMBOL_REF)
3782 {
3783 tree t;
3784
3785 t = SYMBOL_REF_DECL (x);
3786 if (t)
3787 assemble_external (t);
3788
3789 return -1;
3790 }
3791
3792 return 0;
3793 }
3794
3795 /* Marks SYMBOL_REFs in x as referenced through use of assemble_external. */
3796
3797 void
3798 mark_symbol_refs_as_used (rtx x)
3799 {
3800 for_each_rtx (&x, mark_symbol_ref_as_used, NULL);
3801 }
3802
3803 /* Print operand X using machine-dependent assembler syntax.
3804 CODE is a non-digit that preceded the operand-number in the % spec,
3805 such as 'z' if the spec was `%z3'. CODE is 0 if there was no char
3806 between the % and the digits.
3807 When CODE is a non-letter, X is 0.
3808
3809 The meanings of the letters are machine-dependent and controlled
3810 by TARGET_PRINT_OPERAND. */
3811
3812 void
3813 output_operand (rtx x, int code ATTRIBUTE_UNUSED)
3814 {
3815 if (x && GET_CODE (x) == SUBREG)
3816 x = alter_subreg (&x, true);
3817
3818 /* X must not be a pseudo reg. */
3819 gcc_assert (!x || !REG_P (x) || REGNO (x) < FIRST_PSEUDO_REGISTER);
3820
3821 targetm.asm_out.print_operand (asm_out_file, x, code);
3822
3823 if (x == NULL_RTX)
3824 return;
3825
3826 for_each_rtx (&x, mark_symbol_ref_as_used, NULL);
3827 }
3828
3829 /* Print a memory reference operand for address X using
3830 machine-dependent assembler syntax. */
3831
3832 void
3833 output_address (rtx x)
3834 {
3835 bool changed = false;
3836 walk_alter_subreg (&x, &changed);
3837 targetm.asm_out.print_operand_address (asm_out_file, x);
3838 }
3839 \f
3840 /* Print an integer constant expression in assembler syntax.
3841 Addition and subtraction are the only arithmetic
3842 that may appear in these expressions. */
3843
3844 void
3845 output_addr_const (FILE *file, rtx x)
3846 {
3847 char buf[256];
3848
3849 restart:
3850 switch (GET_CODE (x))
3851 {
3852 case PC:
3853 putc ('.', file);
3854 break;
3855
3856 case SYMBOL_REF:
3857 if (SYMBOL_REF_DECL (x))
3858 assemble_external (SYMBOL_REF_DECL (x));
3859 #ifdef ASM_OUTPUT_SYMBOL_REF
3860 ASM_OUTPUT_SYMBOL_REF (file, x);
3861 #else
3862 assemble_name (file, XSTR (x, 0));
3863 #endif
3864 break;
3865
3866 case LABEL_REF:
3867 x = XEXP (x, 0);
3868 /* Fall through. */
3869 case CODE_LABEL:
3870 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3871 #ifdef ASM_OUTPUT_LABEL_REF
3872 ASM_OUTPUT_LABEL_REF (file, buf);
3873 #else
3874 assemble_name (file, buf);
3875 #endif
3876 break;
3877
3878 case CONST_INT:
3879 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x));
3880 break;
3881
3882 case CONST:
3883 /* This used to output parentheses around the expression,
3884 but that does not work on the 386 (either ATT or BSD assembler). */
3885 output_addr_const (file, XEXP (x, 0));
3886 break;
3887
3888 case CONST_DOUBLE:
3889 if (GET_MODE (x) == VOIDmode)
3890 {
3891 /* We can use %d if the number is one word and positive. */
3892 if (CONST_DOUBLE_HIGH (x))
3893 fprintf (file, HOST_WIDE_INT_PRINT_DOUBLE_HEX,
3894 (unsigned HOST_WIDE_INT) CONST_DOUBLE_HIGH (x),
3895 (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (x));
3896 else if (CONST_DOUBLE_LOW (x) < 0)
3897 fprintf (file, HOST_WIDE_INT_PRINT_HEX,
3898 (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (x));
3899 else
3900 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x));
3901 }
3902 else
3903 /* We can't handle floating point constants;
3904 PRINT_OPERAND must handle them. */
3905 output_operand_lossage ("floating constant misused");
3906 break;
3907
3908 case CONST_FIXED:
3909 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_FIXED_VALUE_LOW (x));
3910 break;
3911
3912 case PLUS:
3913 /* Some assemblers need integer constants to appear last (eg masm). */
3914 if (CONST_INT_P (XEXP (x, 0)))
3915 {
3916 output_addr_const (file, XEXP (x, 1));
3917 if (INTVAL (XEXP (x, 0)) >= 0)
3918 fprintf (file, "+");
3919 output_addr_const (file, XEXP (x, 0));
3920 }
3921 else
3922 {
3923 output_addr_const (file, XEXP (x, 0));
3924 if (!CONST_INT_P (XEXP (x, 1))
3925 || INTVAL (XEXP (x, 1)) >= 0)
3926 fprintf (file, "+");
3927 output_addr_const (file, XEXP (x, 1));
3928 }
3929 break;
3930
3931 case MINUS:
3932 /* Avoid outputting things like x-x or x+5-x,
3933 since some assemblers can't handle that. */
3934 x = simplify_subtraction (x);
3935 if (GET_CODE (x) != MINUS)
3936 goto restart;
3937
3938 output_addr_const (file, XEXP (x, 0));
3939 fprintf (file, "-");
3940 if ((CONST_INT_P (XEXP (x, 1)) && INTVAL (XEXP (x, 1)) >= 0)
3941 || GET_CODE (XEXP (x, 1)) == PC
3942 || GET_CODE (XEXP (x, 1)) == SYMBOL_REF)
3943 output_addr_const (file, XEXP (x, 1));
3944 else
3945 {
3946 fputs (targetm.asm_out.open_paren, file);
3947 output_addr_const (file, XEXP (x, 1));
3948 fputs (targetm.asm_out.close_paren, file);
3949 }
3950 break;
3951
3952 case ZERO_EXTEND:
3953 case SIGN_EXTEND:
3954 case SUBREG:
3955 case TRUNCATE:
3956 output_addr_const (file, XEXP (x, 0));
3957 break;
3958
3959 default:
3960 if (targetm.asm_out.output_addr_const_extra (file, x))
3961 break;
3962
3963 output_operand_lossage ("invalid expression as operand");
3964 }
3965 }
3966 \f
3967 /* Output a quoted string. */
3968
3969 void
3970 output_quoted_string (FILE *asm_file, const char *string)
3971 {
3972 #ifdef OUTPUT_QUOTED_STRING
3973 OUTPUT_QUOTED_STRING (asm_file, string);
3974 #else
3975 char c;
3976
3977 putc ('\"', asm_file);
3978 while ((c = *string++) != 0)
3979 {
3980 if (ISPRINT (c))
3981 {
3982 if (c == '\"' || c == '\\')
3983 putc ('\\', asm_file);
3984 putc (c, asm_file);
3985 }
3986 else
3987 fprintf (asm_file, "\\%03o", (unsigned char) c);
3988 }
3989 putc ('\"', asm_file);
3990 #endif
3991 }
3992 \f
3993 /* Write a HOST_WIDE_INT number in hex form 0x1234, fast. */
3994
3995 void
3996 fprint_whex (FILE *f, unsigned HOST_WIDE_INT value)
3997 {
3998 char buf[2 + CHAR_BIT * sizeof (value) / 4];
3999 if (value == 0)
4000 putc ('0', f);
4001 else
4002 {
4003 char *p = buf + sizeof (buf);
4004 do
4005 *--p = "0123456789abcdef"[value % 16];
4006 while ((value /= 16) != 0);
4007 *--p = 'x';
4008 *--p = '0';
4009 fwrite (p, 1, buf + sizeof (buf) - p, f);
4010 }
4011 }
4012
4013 /* Internal function that prints an unsigned long in decimal in reverse.
4014 The output string IS NOT null-terminated. */
4015
4016 static int
4017 sprint_ul_rev (char *s, unsigned long value)
4018 {
4019 int i = 0;
4020 do
4021 {
4022 s[i] = "0123456789"[value % 10];
4023 value /= 10;
4024 i++;
4025 /* alternate version, without modulo */
4026 /* oldval = value; */
4027 /* value /= 10; */
4028 /* s[i] = "0123456789" [oldval - 10*value]; */
4029 /* i++ */
4030 }
4031 while (value != 0);
4032 return i;
4033 }
4034
4035 /* Write an unsigned long as decimal to a file, fast. */
4036
4037 void
4038 fprint_ul (FILE *f, unsigned long value)
4039 {
4040 /* python says: len(str(2**64)) == 20 */
4041 char s[20];
4042 int i;
4043
4044 i = sprint_ul_rev (s, value);
4045
4046 /* It's probably too small to bother with string reversal and fputs. */
4047 do
4048 {
4049 i--;
4050 putc (s[i], f);
4051 }
4052 while (i != 0);
4053 }
4054
4055 /* Write an unsigned long as decimal to a string, fast.
4056 s must be wide enough to not overflow, at least 21 chars.
4057 Returns the length of the string (without terminating '\0'). */
4058
4059 int
4060 sprint_ul (char *s, unsigned long value)
4061 {
4062 int len;
4063 char tmp_c;
4064 int i;
4065 int j;
4066
4067 len = sprint_ul_rev (s, value);
4068 s[len] = '\0';
4069
4070 /* Reverse the string. */
4071 i = 0;
4072 j = len - 1;
4073 while (i < j)
4074 {
4075 tmp_c = s[i];
4076 s[i] = s[j];
4077 s[j] = tmp_c;
4078 i++; j--;
4079 }
4080
4081 return len;
4082 }
4083
4084 /* A poor man's fprintf, with the added features of %I, %R, %L, and %U.
4085 %R prints the value of REGISTER_PREFIX.
4086 %L prints the value of LOCAL_LABEL_PREFIX.
4087 %U prints the value of USER_LABEL_PREFIX.
4088 %I prints the value of IMMEDIATE_PREFIX.
4089 %O runs ASM_OUTPUT_OPCODE to transform what follows in the string.
4090 Also supported are %d, %i, %u, %x, %X, %o, %c, %s and %%.
4091
4092 We handle alternate assembler dialects here, just like output_asm_insn. */
4093
4094 void
4095 asm_fprintf (FILE *file, const char *p, ...)
4096 {
4097 char buf[10];
4098 char *q, c;
4099 #ifdef ASSEMBLER_DIALECT
4100 int dialect = 0;
4101 #endif
4102 va_list argptr;
4103
4104 va_start (argptr, p);
4105
4106 buf[0] = '%';
4107
4108 while ((c = *p++))
4109 switch (c)
4110 {
4111 #ifdef ASSEMBLER_DIALECT
4112 case '{':
4113 case '}':
4114 case '|':
4115 p = do_assembler_dialects (p, &dialect);
4116 break;
4117 #endif
4118
4119 case '%':
4120 c = *p++;
4121 q = &buf[1];
4122 while (strchr ("-+ #0", c))
4123 {
4124 *q++ = c;
4125 c = *p++;
4126 }
4127 while (ISDIGIT (c) || c == '.')
4128 {
4129 *q++ = c;
4130 c = *p++;
4131 }
4132 switch (c)
4133 {
4134 case '%':
4135 putc ('%', file);
4136 break;
4137
4138 case 'd': case 'i': case 'u':
4139 case 'x': case 'X': case 'o':
4140 case 'c':
4141 *q++ = c;
4142 *q = 0;
4143 fprintf (file, buf, va_arg (argptr, int));
4144 break;
4145
4146 case 'w':
4147 /* This is a prefix to the 'd', 'i', 'u', 'x', 'X', and
4148 'o' cases, but we do not check for those cases. It
4149 means that the value is a HOST_WIDE_INT, which may be
4150 either `long' or `long long'. */
4151 memcpy (q, HOST_WIDE_INT_PRINT, strlen (HOST_WIDE_INT_PRINT));
4152 q += strlen (HOST_WIDE_INT_PRINT);
4153 *q++ = *p++;
4154 *q = 0;
4155 fprintf (file, buf, va_arg (argptr, HOST_WIDE_INT));
4156 break;
4157
4158 case 'l':
4159 *q++ = c;
4160 #ifdef HAVE_LONG_LONG
4161 if (*p == 'l')
4162 {
4163 *q++ = *p++;
4164 *q++ = *p++;
4165 *q = 0;
4166 fprintf (file, buf, va_arg (argptr, long long));
4167 }
4168 else
4169 #endif
4170 {
4171 *q++ = *p++;
4172 *q = 0;
4173 fprintf (file, buf, va_arg (argptr, long));
4174 }
4175
4176 break;
4177
4178 case 's':
4179 *q++ = c;
4180 *q = 0;
4181 fprintf (file, buf, va_arg (argptr, char *));
4182 break;
4183
4184 case 'O':
4185 #ifdef ASM_OUTPUT_OPCODE
4186 ASM_OUTPUT_OPCODE (asm_out_file, p);
4187 #endif
4188 break;
4189
4190 case 'R':
4191 #ifdef REGISTER_PREFIX
4192 fprintf (file, "%s", REGISTER_PREFIX);
4193 #endif
4194 break;
4195
4196 case 'I':
4197 #ifdef IMMEDIATE_PREFIX
4198 fprintf (file, "%s", IMMEDIATE_PREFIX);
4199 #endif
4200 break;
4201
4202 case 'L':
4203 #ifdef LOCAL_LABEL_PREFIX
4204 fprintf (file, "%s", LOCAL_LABEL_PREFIX);
4205 #endif
4206 break;
4207
4208 case 'U':
4209 fputs (user_label_prefix, file);
4210 break;
4211
4212 #ifdef ASM_FPRINTF_EXTENSIONS
4213 /* Uppercase letters are reserved for general use by asm_fprintf
4214 and so are not available to target specific code. In order to
4215 prevent the ASM_FPRINTF_EXTENSIONS macro from using them then,
4216 they are defined here. As they get turned into real extensions
4217 to asm_fprintf they should be removed from this list. */
4218 case 'A': case 'B': case 'C': case 'D': case 'E':
4219 case 'F': case 'G': case 'H': case 'J': case 'K':
4220 case 'M': case 'N': case 'P': case 'Q': case 'S':
4221 case 'T': case 'V': case 'W': case 'Y': case 'Z':
4222 break;
4223
4224 ASM_FPRINTF_EXTENSIONS (file, argptr, p)
4225 #endif
4226 default:
4227 gcc_unreachable ();
4228 }
4229 break;
4230
4231 default:
4232 putc (c, file);
4233 }
4234 va_end (argptr);
4235 }
4236 \f
4237 /* Return nonzero if this function has no function calls. */
4238
4239 int
4240 leaf_function_p (void)
4241 {
4242 rtx insn;
4243
4244 if (crtl->profile || profile_arc_flag)
4245 return 0;
4246
4247 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4248 {
4249 if (CALL_P (insn)
4250 && ! SIBLING_CALL_P (insn))
4251 return 0;
4252 if (NONJUMP_INSN_P (insn)
4253 && GET_CODE (PATTERN (insn)) == SEQUENCE
4254 && CALL_P (XVECEXP (PATTERN (insn), 0, 0))
4255 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0)))
4256 return 0;
4257 }
4258
4259 return 1;
4260 }
4261
4262 /* Return 1 if branch is a forward branch.
4263 Uses insn_shuid array, so it works only in the final pass. May be used by
4264 output templates to customary add branch prediction hints.
4265 */
4266 int
4267 final_forward_branch_p (rtx insn)
4268 {
4269 int insn_id, label_id;
4270
4271 gcc_assert (uid_shuid);
4272 insn_id = INSN_SHUID (insn);
4273 label_id = INSN_SHUID (JUMP_LABEL (insn));
4274 /* We've hit some insns that does not have id information available. */
4275 gcc_assert (insn_id && label_id);
4276 return insn_id < label_id;
4277 }
4278
4279 /* On some machines, a function with no call insns
4280 can run faster if it doesn't create its own register window.
4281 When output, the leaf function should use only the "output"
4282 registers. Ordinarily, the function would be compiled to use
4283 the "input" registers to find its arguments; it is a candidate
4284 for leaf treatment if it uses only the "input" registers.
4285 Leaf function treatment means renumbering so the function
4286 uses the "output" registers instead. */
4287
4288 #ifdef LEAF_REGISTERS
4289
4290 /* Return 1 if this function uses only the registers that can be
4291 safely renumbered. */
4292
4293 int
4294 only_leaf_regs_used (void)
4295 {
4296 int i;
4297 const char *const permitted_reg_in_leaf_functions = LEAF_REGISTERS;
4298
4299 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
4300 if ((df_regs_ever_live_p (i) || global_regs[i])
4301 && ! permitted_reg_in_leaf_functions[i])
4302 return 0;
4303
4304 if (crtl->uses_pic_offset_table
4305 && pic_offset_table_rtx != 0
4306 && REG_P (pic_offset_table_rtx)
4307 && ! permitted_reg_in_leaf_functions[REGNO (pic_offset_table_rtx)])
4308 return 0;
4309
4310 return 1;
4311 }
4312
4313 /* Scan all instructions and renumber all registers into those
4314 available in leaf functions. */
4315
4316 static void
4317 leaf_renumber_regs (rtx first)
4318 {
4319 rtx insn;
4320
4321 /* Renumber only the actual patterns.
4322 The reg-notes can contain frame pointer refs,
4323 and renumbering them could crash, and should not be needed. */
4324 for (insn = first; insn; insn = NEXT_INSN (insn))
4325 if (INSN_P (insn))
4326 leaf_renumber_regs_insn (PATTERN (insn));
4327 }
4328
4329 /* Scan IN_RTX and its subexpressions, and renumber all regs into those
4330 available in leaf functions. */
4331
4332 void
4333 leaf_renumber_regs_insn (rtx in_rtx)
4334 {
4335 int i, j;
4336 const char *format_ptr;
4337
4338 if (in_rtx == 0)
4339 return;
4340
4341 /* Renumber all input-registers into output-registers.
4342 renumbered_regs would be 1 for an output-register;
4343 they */
4344
4345 if (REG_P (in_rtx))
4346 {
4347 int newreg;
4348
4349 /* Don't renumber the same reg twice. */
4350 if (in_rtx->used)
4351 return;
4352
4353 newreg = REGNO (in_rtx);
4354 /* Don't try to renumber pseudo regs. It is possible for a pseudo reg
4355 to reach here as part of a REG_NOTE. */
4356 if (newreg >= FIRST_PSEUDO_REGISTER)
4357 {
4358 in_rtx->used = 1;
4359 return;
4360 }
4361 newreg = LEAF_REG_REMAP (newreg);
4362 gcc_assert (newreg >= 0);
4363 df_set_regs_ever_live (REGNO (in_rtx), false);
4364 df_set_regs_ever_live (newreg, true);
4365 SET_REGNO (in_rtx, newreg);
4366 in_rtx->used = 1;
4367 }
4368
4369 if (INSN_P (in_rtx))
4370 {
4371 /* Inside a SEQUENCE, we find insns.
4372 Renumber just the patterns of these insns,
4373 just as we do for the top-level insns. */
4374 leaf_renumber_regs_insn (PATTERN (in_rtx));
4375 return;
4376 }
4377
4378 format_ptr = GET_RTX_FORMAT (GET_CODE (in_rtx));
4379
4380 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (in_rtx)); i++)
4381 switch (*format_ptr++)
4382 {
4383 case 'e':
4384 leaf_renumber_regs_insn (XEXP (in_rtx, i));
4385 break;
4386
4387 case 'E':
4388 if (NULL != XVEC (in_rtx, i))
4389 {
4390 for (j = 0; j < XVECLEN (in_rtx, i); j++)
4391 leaf_renumber_regs_insn (XVECEXP (in_rtx, i, j));
4392 }
4393 break;
4394
4395 case 'S':
4396 case 's':
4397 case '0':
4398 case 'i':
4399 case 'w':
4400 case 'n':
4401 case 'u':
4402 break;
4403
4404 default:
4405 gcc_unreachable ();
4406 }
4407 }
4408 #endif
4409 \f
4410 /* Turn the RTL into assembly. */
4411 static unsigned int
4412 rest_of_handle_final (void)
4413 {
4414 rtx x;
4415 const char *fnname;
4416
4417 /* Get the function's name, as described by its RTL. This may be
4418 different from the DECL_NAME name used in the source file. */
4419
4420 x = DECL_RTL (current_function_decl);
4421 gcc_assert (MEM_P (x));
4422 x = XEXP (x, 0);
4423 gcc_assert (GET_CODE (x) == SYMBOL_REF);
4424 fnname = XSTR (x, 0);
4425
4426 assemble_start_function (current_function_decl, fnname);
4427 final_start_function (get_insns (), asm_out_file, optimize);
4428 final (get_insns (), asm_out_file, optimize);
4429 final_end_function ();
4430
4431 /* The IA-64 ".handlerdata" directive must be issued before the ".endp"
4432 directive that closes the procedure descriptor. Similarly, for x64 SEH.
4433 Otherwise it's not strictly necessary, but it doesn't hurt either. */
4434 output_function_exception_table (fnname);
4435
4436 assemble_end_function (current_function_decl, fnname);
4437
4438 user_defined_section_attribute = false;
4439
4440 /* Free up reg info memory. */
4441 free_reg_info ();
4442
4443 if (! quiet_flag)
4444 fflush (asm_out_file);
4445
4446 /* Write DBX symbols if requested. */
4447
4448 /* Note that for those inline functions where we don't initially
4449 know for certain that we will be generating an out-of-line copy,
4450 the first invocation of this routine (rest_of_compilation) will
4451 skip over this code by doing a `goto exit_rest_of_compilation;'.
4452 Later on, wrapup_global_declarations will (indirectly) call
4453 rest_of_compilation again for those inline functions that need
4454 to have out-of-line copies generated. During that call, we
4455 *will* be routed past here. */
4456
4457 timevar_push (TV_SYMOUT);
4458 if (!DECL_IGNORED_P (current_function_decl))
4459 debug_hooks->function_decl (current_function_decl);
4460 timevar_pop (TV_SYMOUT);
4461
4462 /* Release the blocks that are linked to DECL_INITIAL() to free the memory. */
4463 DECL_INITIAL (current_function_decl) = error_mark_node;
4464
4465 if (DECL_STATIC_CONSTRUCTOR (current_function_decl)
4466 && targetm.have_ctors_dtors)
4467 targetm.asm_out.constructor (XEXP (DECL_RTL (current_function_decl), 0),
4468 decl_init_priority_lookup
4469 (current_function_decl));
4470 if (DECL_STATIC_DESTRUCTOR (current_function_decl)
4471 && targetm.have_ctors_dtors)
4472 targetm.asm_out.destructor (XEXP (DECL_RTL (current_function_decl), 0),
4473 decl_fini_priority_lookup
4474 (current_function_decl));
4475 return 0;
4476 }
4477
4478 namespace {
4479
4480 const pass_data pass_data_final =
4481 {
4482 RTL_PASS, /* type */
4483 "final", /* name */
4484 OPTGROUP_NONE, /* optinfo_flags */
4485 false, /* has_gate */
4486 true, /* has_execute */
4487 TV_FINAL, /* tv_id */
4488 0, /* properties_required */
4489 0, /* properties_provided */
4490 0, /* properties_destroyed */
4491 0, /* todo_flags_start */
4492 0, /* todo_flags_finish */
4493 };
4494
4495 class pass_final : public rtl_opt_pass
4496 {
4497 public:
4498 pass_final (gcc::context *ctxt)
4499 : rtl_opt_pass (pass_data_final, ctxt)
4500 {}
4501
4502 /* opt_pass methods: */
4503 unsigned int execute () { return rest_of_handle_final (); }
4504
4505 }; // class pass_final
4506
4507 } // anon namespace
4508
4509 rtl_opt_pass *
4510 make_pass_final (gcc::context *ctxt)
4511 {
4512 return new pass_final (ctxt);
4513 }
4514
4515
4516 static unsigned int
4517 rest_of_handle_shorten_branches (void)
4518 {
4519 /* Shorten branches. */
4520 shorten_branches (get_insns ());
4521 return 0;
4522 }
4523
4524 namespace {
4525
4526 const pass_data pass_data_shorten_branches =
4527 {
4528 RTL_PASS, /* type */
4529 "shorten", /* name */
4530 OPTGROUP_NONE, /* optinfo_flags */
4531 false, /* has_gate */
4532 true, /* has_execute */
4533 TV_SHORTEN_BRANCH, /* tv_id */
4534 0, /* properties_required */
4535 0, /* properties_provided */
4536 0, /* properties_destroyed */
4537 0, /* todo_flags_start */
4538 0, /* todo_flags_finish */
4539 };
4540
4541 class pass_shorten_branches : public rtl_opt_pass
4542 {
4543 public:
4544 pass_shorten_branches (gcc::context *ctxt)
4545 : rtl_opt_pass (pass_data_shorten_branches, ctxt)
4546 {}
4547
4548 /* opt_pass methods: */
4549 unsigned int execute () { return rest_of_handle_shorten_branches (); }
4550
4551 }; // class pass_shorten_branches
4552
4553 } // anon namespace
4554
4555 rtl_opt_pass *
4556 make_pass_shorten_branches (gcc::context *ctxt)
4557 {
4558 return new pass_shorten_branches (ctxt);
4559 }
4560
4561
4562 static unsigned int
4563 rest_of_clean_state (void)
4564 {
4565 rtx insn, next;
4566 FILE *final_output = NULL;
4567 int save_unnumbered = flag_dump_unnumbered;
4568 int save_noaddr = flag_dump_noaddr;
4569
4570 if (flag_dump_final_insns)
4571 {
4572 final_output = fopen (flag_dump_final_insns, "a");
4573 if (!final_output)
4574 {
4575 error ("could not open final insn dump file %qs: %m",
4576 flag_dump_final_insns);
4577 flag_dump_final_insns = NULL;
4578 }
4579 else
4580 {
4581 flag_dump_noaddr = flag_dump_unnumbered = 1;
4582 if (flag_compare_debug_opt || flag_compare_debug)
4583 dump_flags |= TDF_NOUID;
4584 dump_function_header (final_output, current_function_decl,
4585 dump_flags);
4586 final_insns_dump_p = true;
4587
4588 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4589 if (LABEL_P (insn))
4590 INSN_UID (insn) = CODE_LABEL_NUMBER (insn);
4591 else
4592 {
4593 if (NOTE_P (insn))
4594 set_block_for_insn (insn, NULL);
4595 INSN_UID (insn) = 0;
4596 }
4597 }
4598 }
4599
4600 /* It is very important to decompose the RTL instruction chain here:
4601 debug information keeps pointing into CODE_LABEL insns inside the function
4602 body. If these remain pointing to the other insns, we end up preserving
4603 whole RTL chain and attached detailed debug info in memory. */
4604 for (insn = get_insns (); insn; insn = next)
4605 {
4606 next = NEXT_INSN (insn);
4607 NEXT_INSN (insn) = NULL;
4608 PREV_INSN (insn) = NULL;
4609
4610 if (final_output
4611 && (!NOTE_P (insn) ||
4612 (NOTE_KIND (insn) != NOTE_INSN_VAR_LOCATION
4613 && NOTE_KIND (insn) != NOTE_INSN_CALL_ARG_LOCATION
4614 && NOTE_KIND (insn) != NOTE_INSN_BLOCK_BEG
4615 && NOTE_KIND (insn) != NOTE_INSN_BLOCK_END
4616 && NOTE_KIND (insn) != NOTE_INSN_DELETED_DEBUG_LABEL)))
4617 print_rtl_single (final_output, insn);
4618 }
4619
4620 if (final_output)
4621 {
4622 flag_dump_noaddr = save_noaddr;
4623 flag_dump_unnumbered = save_unnumbered;
4624 final_insns_dump_p = false;
4625
4626 if (fclose (final_output))
4627 {
4628 error ("could not close final insn dump file %qs: %m",
4629 flag_dump_final_insns);
4630 flag_dump_final_insns = NULL;
4631 }
4632 }
4633
4634 /* In case the function was not output,
4635 don't leave any temporary anonymous types
4636 queued up for sdb output. */
4637 #ifdef SDB_DEBUGGING_INFO
4638 if (write_symbols == SDB_DEBUG)
4639 sdbout_types (NULL_TREE);
4640 #endif
4641
4642 flag_rerun_cse_after_global_opts = 0;
4643 reload_completed = 0;
4644 epilogue_completed = 0;
4645 #ifdef STACK_REGS
4646 regstack_completed = 0;
4647 #endif
4648
4649 /* Clear out the insn_length contents now that they are no
4650 longer valid. */
4651 init_insn_lengths ();
4652
4653 /* Show no temporary slots allocated. */
4654 init_temp_slots ();
4655
4656 free_bb_for_insn ();
4657
4658 delete_tree_ssa ();
4659
4660 /* We can reduce stack alignment on call site only when we are sure that
4661 the function body just produced will be actually used in the final
4662 executable. */
4663 if (decl_binds_to_current_def_p (current_function_decl))
4664 {
4665 unsigned int pref = crtl->preferred_stack_boundary;
4666 if (crtl->stack_alignment_needed > crtl->preferred_stack_boundary)
4667 pref = crtl->stack_alignment_needed;
4668 cgraph_rtl_info (current_function_decl)->preferred_incoming_stack_boundary
4669 = pref;
4670 }
4671
4672 /* Make sure volatile mem refs aren't considered valid operands for
4673 arithmetic insns. We must call this here if this is a nested inline
4674 function, since the above code leaves us in the init_recog state,
4675 and the function context push/pop code does not save/restore volatile_ok.
4676
4677 ??? Maybe it isn't necessary for expand_start_function to call this
4678 anymore if we do it here? */
4679
4680 init_recog_no_volatile ();
4681
4682 /* We're done with this function. Free up memory if we can. */
4683 free_after_parsing (cfun);
4684 free_after_compilation (cfun);
4685 return 0;
4686 }
4687
4688 namespace {
4689
4690 const pass_data pass_data_clean_state =
4691 {
4692 RTL_PASS, /* type */
4693 "*clean_state", /* name */
4694 OPTGROUP_NONE, /* optinfo_flags */
4695 false, /* has_gate */
4696 true, /* has_execute */
4697 TV_FINAL, /* tv_id */
4698 0, /* properties_required */
4699 0, /* properties_provided */
4700 PROP_rtl, /* properties_destroyed */
4701 0, /* todo_flags_start */
4702 0, /* todo_flags_finish */
4703 };
4704
4705 class pass_clean_state : public rtl_opt_pass
4706 {
4707 public:
4708 pass_clean_state (gcc::context *ctxt)
4709 : rtl_opt_pass (pass_data_clean_state, ctxt)
4710 {}
4711
4712 /* opt_pass methods: */
4713 unsigned int execute () { return rest_of_clean_state (); }
4714
4715 }; // class pass_clean_state
4716
4717 } // anon namespace
4718
4719 rtl_opt_pass *
4720 make_pass_clean_state (gcc::context *ctxt)
4721 {
4722 return new pass_clean_state (ctxt);
4723 }