timevar.c (validate_phases): Use size_t for memory.
[gcc.git] / gcc / final.c
1 /* Convert RTL to assembler code and output it, for GNU compiler.
2 Copyright (C) 1987-2013 Free Software Foundation, Inc.
3
4 This file is part of GCC.
5
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
9 version.
10
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
19
20 /* This is the final pass of the compiler.
21 It looks at the rtl code for a function and outputs assembler code.
22
23 Call `final_start_function' to output the assembler code for function entry,
24 `final' to output assembler code for some RTL code,
25 `final_end_function' to output assembler code for function exit.
26 If a function is compiled in several pieces, each piece is
27 output separately with `final'.
28
29 Some optimizations are also done at this level.
30 Move instructions that were made unnecessary by good register allocation
31 are detected and omitted from the output. (Though most of these
32 are removed by the last jump pass.)
33
34 Instructions to set the condition codes are omitted when it can be
35 seen that the condition codes already had the desired values.
36
37 In some cases it is sufficient if the inherited condition codes
38 have related values, but this may require the following insn
39 (the one that tests the condition codes) to be modified.
40
41 The code for the function prologue and epilogue are generated
42 directly in assembler by the target functions function_prologue and
43 function_epilogue. Those instructions never exist as rtl. */
44
45 #include "config.h"
46 #include "system.h"
47 #include "coretypes.h"
48 #include "tm.h"
49
50 #include "tree.h"
51 #include "rtl.h"
52 #include "tm_p.h"
53 #include "regs.h"
54 #include "insn-config.h"
55 #include "insn-attr.h"
56 #include "recog.h"
57 #include "conditions.h"
58 #include "flags.h"
59 #include "hard-reg-set.h"
60 #include "output.h"
61 #include "except.h"
62 #include "function.h"
63 #include "rtl-error.h"
64 #include "toplev.h" /* exact_log2, floor_log2 */
65 #include "reload.h"
66 #include "intl.h"
67 #include "basic-block.h"
68 #include "target.h"
69 #include "targhooks.h"
70 #include "debug.h"
71 #include "expr.h"
72 #include "tree-pass.h"
73 #include "tree-flow.h"
74 #include "cgraph.h"
75 #include "coverage.h"
76 #include "df.h"
77 #include "ggc.h"
78 #include "cfgloop.h"
79 #include "params.h"
80 #include "tree-pretty-print.h" /* for dump_function_header */
81
82 #ifdef XCOFF_DEBUGGING_INFO
83 #include "xcoffout.h" /* Needed for external data
84 declarations for e.g. AIX 4.x. */
85 #endif
86
87 #include "dwarf2out.h"
88
89 #ifdef DBX_DEBUGGING_INFO
90 #include "dbxout.h"
91 #endif
92
93 #ifdef SDB_DEBUGGING_INFO
94 #include "sdbout.h"
95 #endif
96
97 /* Most ports that aren't using cc0 don't need to define CC_STATUS_INIT.
98 So define a null default for it to save conditionalization later. */
99 #ifndef CC_STATUS_INIT
100 #define CC_STATUS_INIT
101 #endif
102
103 /* Is the given character a logical line separator for the assembler? */
104 #ifndef IS_ASM_LOGICAL_LINE_SEPARATOR
105 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == ';')
106 #endif
107
108 #ifndef JUMP_TABLES_IN_TEXT_SECTION
109 #define JUMP_TABLES_IN_TEXT_SECTION 0
110 #endif
111
112 /* Bitflags used by final_scan_insn. */
113 #define SEEN_BB 1
114 #define SEEN_NOTE 2
115 #define SEEN_EMITTED 4
116
117 /* Last insn processed by final_scan_insn. */
118 static rtx debug_insn;
119 rtx current_output_insn;
120
121 /* Line number of last NOTE. */
122 static int last_linenum;
123
124 /* Last discriminator written to assembly. */
125 static int last_discriminator;
126
127 /* Discriminator of current block. */
128 static int discriminator;
129
130 /* Highest line number in current block. */
131 static int high_block_linenum;
132
133 /* Likewise for function. */
134 static int high_function_linenum;
135
136 /* Filename of last NOTE. */
137 static const char *last_filename;
138
139 /* Override filename and line number. */
140 static const char *override_filename;
141 static int override_linenum;
142
143 /* Whether to force emission of a line note before the next insn. */
144 static bool force_source_line = false;
145
146 extern const int length_unit_log; /* This is defined in insn-attrtab.c. */
147
148 /* Nonzero while outputting an `asm' with operands.
149 This means that inconsistencies are the user's fault, so don't die.
150 The precise value is the insn being output, to pass to error_for_asm. */
151 rtx this_is_asm_operands;
152
153 /* Number of operands of this insn, for an `asm' with operands. */
154 static unsigned int insn_noperands;
155
156 /* Compare optimization flag. */
157
158 static rtx last_ignored_compare = 0;
159
160 /* Assign a unique number to each insn that is output.
161 This can be used to generate unique local labels. */
162
163 static int insn_counter = 0;
164
165 #ifdef HAVE_cc0
166 /* This variable contains machine-dependent flags (defined in tm.h)
167 set and examined by output routines
168 that describe how to interpret the condition codes properly. */
169
170 CC_STATUS cc_status;
171
172 /* During output of an insn, this contains a copy of cc_status
173 from before the insn. */
174
175 CC_STATUS cc_prev_status;
176 #endif
177
178 /* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */
179
180 static int block_depth;
181
182 /* Nonzero if have enabled APP processing of our assembler output. */
183
184 static int app_on;
185
186 /* If we are outputting an insn sequence, this contains the sequence rtx.
187 Zero otherwise. */
188
189 rtx final_sequence;
190
191 #ifdef ASSEMBLER_DIALECT
192
193 /* Number of the assembler dialect to use, starting at 0. */
194 static int dialect_number;
195 #endif
196
197 /* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */
198 rtx current_insn_predicate;
199
200 /* True if printing into -fdump-final-insns= dump. */
201 bool final_insns_dump_p;
202
203 /* True if profile_function should be called, but hasn't been called yet. */
204 static bool need_profile_function;
205
206 static int asm_insn_count (rtx);
207 static void profile_function (FILE *);
208 static void profile_after_prologue (FILE *);
209 static bool notice_source_line (rtx, bool *);
210 static rtx walk_alter_subreg (rtx *, bool *);
211 static void output_asm_name (void);
212 static void output_alternate_entry_point (FILE *, rtx);
213 static tree get_mem_expr_from_op (rtx, int *);
214 static void output_asm_operand_names (rtx *, int *, int);
215 #ifdef LEAF_REGISTERS
216 static void leaf_renumber_regs (rtx);
217 #endif
218 #ifdef HAVE_cc0
219 static int alter_cond (rtx);
220 #endif
221 #ifndef ADDR_VEC_ALIGN
222 static int final_addr_vec_align (rtx);
223 #endif
224 static int align_fuzz (rtx, rtx, int, unsigned);
225 \f
226 /* Initialize data in final at the beginning of a compilation. */
227
228 void
229 init_final (const char *filename ATTRIBUTE_UNUSED)
230 {
231 app_on = 0;
232 final_sequence = 0;
233
234 #ifdef ASSEMBLER_DIALECT
235 dialect_number = ASSEMBLER_DIALECT;
236 #endif
237 }
238
239 /* Default target function prologue and epilogue assembler output.
240
241 If not overridden for epilogue code, then the function body itself
242 contains return instructions wherever needed. */
243 void
244 default_function_pro_epilogue (FILE *file ATTRIBUTE_UNUSED,
245 HOST_WIDE_INT size ATTRIBUTE_UNUSED)
246 {
247 }
248
249 void
250 default_function_switched_text_sections (FILE *file ATTRIBUTE_UNUSED,
251 tree decl ATTRIBUTE_UNUSED,
252 bool new_is_cold ATTRIBUTE_UNUSED)
253 {
254 }
255
256 /* Default target hook that outputs nothing to a stream. */
257 void
258 no_asm_to_stream (FILE *file ATTRIBUTE_UNUSED)
259 {
260 }
261
262 /* Enable APP processing of subsequent output.
263 Used before the output from an `asm' statement. */
264
265 void
266 app_enable (void)
267 {
268 if (! app_on)
269 {
270 fputs (ASM_APP_ON, asm_out_file);
271 app_on = 1;
272 }
273 }
274
275 /* Disable APP processing of subsequent output.
276 Called from varasm.c before most kinds of output. */
277
278 void
279 app_disable (void)
280 {
281 if (app_on)
282 {
283 fputs (ASM_APP_OFF, asm_out_file);
284 app_on = 0;
285 }
286 }
287 \f
288 /* Return the number of slots filled in the current
289 delayed branch sequence (we don't count the insn needing the
290 delay slot). Zero if not in a delayed branch sequence. */
291
292 #ifdef DELAY_SLOTS
293 int
294 dbr_sequence_length (void)
295 {
296 if (final_sequence != 0)
297 return XVECLEN (final_sequence, 0) - 1;
298 else
299 return 0;
300 }
301 #endif
302 \f
303 /* The next two pages contain routines used to compute the length of an insn
304 and to shorten branches. */
305
306 /* Arrays for insn lengths, and addresses. The latter is referenced by
307 `insn_current_length'. */
308
309 static int *insn_lengths;
310
311 vec<int> insn_addresses_;
312
313 /* Max uid for which the above arrays are valid. */
314 static int insn_lengths_max_uid;
315
316 /* Address of insn being processed. Used by `insn_current_length'. */
317 int insn_current_address;
318
319 /* Address of insn being processed in previous iteration. */
320 int insn_last_address;
321
322 /* known invariant alignment of insn being processed. */
323 int insn_current_align;
324
325 /* After shorten_branches, for any insn, uid_align[INSN_UID (insn)]
326 gives the next following alignment insn that increases the known
327 alignment, or NULL_RTX if there is no such insn.
328 For any alignment obtained this way, we can again index uid_align with
329 its uid to obtain the next following align that in turn increases the
330 alignment, till we reach NULL_RTX; the sequence obtained this way
331 for each insn we'll call the alignment chain of this insn in the following
332 comments. */
333
334 struct label_alignment
335 {
336 short alignment;
337 short max_skip;
338 };
339
340 static rtx *uid_align;
341 static int *uid_shuid;
342 static struct label_alignment *label_align;
343
344 /* Indicate that branch shortening hasn't yet been done. */
345
346 void
347 init_insn_lengths (void)
348 {
349 if (uid_shuid)
350 {
351 free (uid_shuid);
352 uid_shuid = 0;
353 }
354 if (insn_lengths)
355 {
356 free (insn_lengths);
357 insn_lengths = 0;
358 insn_lengths_max_uid = 0;
359 }
360 if (HAVE_ATTR_length)
361 INSN_ADDRESSES_FREE ();
362 if (uid_align)
363 {
364 free (uid_align);
365 uid_align = 0;
366 }
367 }
368
369 /* Obtain the current length of an insn. If branch shortening has been done,
370 get its actual length. Otherwise, use FALLBACK_FN to calculate the
371 length. */
372 static inline int
373 get_attr_length_1 (rtx insn, int (*fallback_fn) (rtx))
374 {
375 rtx body;
376 int i;
377 int length = 0;
378
379 if (!HAVE_ATTR_length)
380 return 0;
381
382 if (insn_lengths_max_uid > INSN_UID (insn))
383 return insn_lengths[INSN_UID (insn)];
384 else
385 switch (GET_CODE (insn))
386 {
387 case NOTE:
388 case BARRIER:
389 case CODE_LABEL:
390 case DEBUG_INSN:
391 return 0;
392
393 case CALL_INSN:
394 case JUMP_INSN:
395 length = fallback_fn (insn);
396 break;
397
398 case INSN:
399 body = PATTERN (insn);
400 if (GET_CODE (body) == USE || GET_CODE (body) == CLOBBER)
401 return 0;
402
403 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
404 length = asm_insn_count (body) * fallback_fn (insn);
405 else if (GET_CODE (body) == SEQUENCE)
406 for (i = 0; i < XVECLEN (body, 0); i++)
407 length += get_attr_length_1 (XVECEXP (body, 0, i), fallback_fn);
408 else
409 length = fallback_fn (insn);
410 break;
411
412 default:
413 break;
414 }
415
416 #ifdef ADJUST_INSN_LENGTH
417 ADJUST_INSN_LENGTH (insn, length);
418 #endif
419 return length;
420 }
421
422 /* Obtain the current length of an insn. If branch shortening has been done,
423 get its actual length. Otherwise, get its maximum length. */
424 int
425 get_attr_length (rtx insn)
426 {
427 return get_attr_length_1 (insn, insn_default_length);
428 }
429
430 /* Obtain the current length of an insn. If branch shortening has been done,
431 get its actual length. Otherwise, get its minimum length. */
432 int
433 get_attr_min_length (rtx insn)
434 {
435 return get_attr_length_1 (insn, insn_min_length);
436 }
437 \f
438 /* Code to handle alignment inside shorten_branches. */
439
440 /* Here is an explanation how the algorithm in align_fuzz can give
441 proper results:
442
443 Call a sequence of instructions beginning with alignment point X
444 and continuing until the next alignment point `block X'. When `X'
445 is used in an expression, it means the alignment value of the
446 alignment point.
447
448 Call the distance between the start of the first insn of block X, and
449 the end of the last insn of block X `IX', for the `inner size of X'.
450 This is clearly the sum of the instruction lengths.
451
452 Likewise with the next alignment-delimited block following X, which we
453 shall call block Y.
454
455 Call the distance between the start of the first insn of block X, and
456 the start of the first insn of block Y `OX', for the `outer size of X'.
457
458 The estimated padding is then OX - IX.
459
460 OX can be safely estimated as
461
462 if (X >= Y)
463 OX = round_up(IX, Y)
464 else
465 OX = round_up(IX, X) + Y - X
466
467 Clearly est(IX) >= real(IX), because that only depends on the
468 instruction lengths, and those being overestimated is a given.
469
470 Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so
471 we needn't worry about that when thinking about OX.
472
473 When X >= Y, the alignment provided by Y adds no uncertainty factor
474 for branch ranges starting before X, so we can just round what we have.
475 But when X < Y, we don't know anything about the, so to speak,
476 `middle bits', so we have to assume the worst when aligning up from an
477 address mod X to one mod Y, which is Y - X. */
478
479 #ifndef LABEL_ALIGN
480 #define LABEL_ALIGN(LABEL) align_labels_log
481 #endif
482
483 #ifndef LOOP_ALIGN
484 #define LOOP_ALIGN(LABEL) align_loops_log
485 #endif
486
487 #ifndef LABEL_ALIGN_AFTER_BARRIER
488 #define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0
489 #endif
490
491 #ifndef JUMP_ALIGN
492 #define JUMP_ALIGN(LABEL) align_jumps_log
493 #endif
494
495 int
496 default_label_align_after_barrier_max_skip (rtx insn ATTRIBUTE_UNUSED)
497 {
498 return 0;
499 }
500
501 int
502 default_loop_align_max_skip (rtx insn ATTRIBUTE_UNUSED)
503 {
504 return align_loops_max_skip;
505 }
506
507 int
508 default_label_align_max_skip (rtx insn ATTRIBUTE_UNUSED)
509 {
510 return align_labels_max_skip;
511 }
512
513 int
514 default_jump_align_max_skip (rtx insn ATTRIBUTE_UNUSED)
515 {
516 return align_jumps_max_skip;
517 }
518
519 #ifndef ADDR_VEC_ALIGN
520 static int
521 final_addr_vec_align (rtx addr_vec)
522 {
523 int align = GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec)));
524
525 if (align > BIGGEST_ALIGNMENT / BITS_PER_UNIT)
526 align = BIGGEST_ALIGNMENT / BITS_PER_UNIT;
527 return exact_log2 (align);
528
529 }
530
531 #define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC)
532 #endif
533
534 #ifndef INSN_LENGTH_ALIGNMENT
535 #define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log
536 #endif
537
538 #define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)])
539
540 static int min_labelno, max_labelno;
541
542 #define LABEL_TO_ALIGNMENT(LABEL) \
543 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment)
544
545 #define LABEL_TO_MAX_SKIP(LABEL) \
546 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip)
547
548 /* For the benefit of port specific code do this also as a function. */
549
550 int
551 label_to_alignment (rtx label)
552 {
553 if (CODE_LABEL_NUMBER (label) <= max_labelno)
554 return LABEL_TO_ALIGNMENT (label);
555 return 0;
556 }
557
558 int
559 label_to_max_skip (rtx label)
560 {
561 if (CODE_LABEL_NUMBER (label) <= max_labelno)
562 return LABEL_TO_MAX_SKIP (label);
563 return 0;
564 }
565
566 /* The differences in addresses
567 between a branch and its target might grow or shrink depending on
568 the alignment the start insn of the range (the branch for a forward
569 branch or the label for a backward branch) starts out on; if these
570 differences are used naively, they can even oscillate infinitely.
571 We therefore want to compute a 'worst case' address difference that
572 is independent of the alignment the start insn of the range end
573 up on, and that is at least as large as the actual difference.
574 The function align_fuzz calculates the amount we have to add to the
575 naively computed difference, by traversing the part of the alignment
576 chain of the start insn of the range that is in front of the end insn
577 of the range, and considering for each alignment the maximum amount
578 that it might contribute to a size increase.
579
580 For casesi tables, we also want to know worst case minimum amounts of
581 address difference, in case a machine description wants to introduce
582 some common offset that is added to all offsets in a table.
583 For this purpose, align_fuzz with a growth argument of 0 computes the
584 appropriate adjustment. */
585
586 /* Compute the maximum delta by which the difference of the addresses of
587 START and END might grow / shrink due to a different address for start
588 which changes the size of alignment insns between START and END.
589 KNOWN_ALIGN_LOG is the alignment known for START.
590 GROWTH should be ~0 if the objective is to compute potential code size
591 increase, and 0 if the objective is to compute potential shrink.
592 The return value is undefined for any other value of GROWTH. */
593
594 static int
595 align_fuzz (rtx start, rtx end, int known_align_log, unsigned int growth)
596 {
597 int uid = INSN_UID (start);
598 rtx align_label;
599 int known_align = 1 << known_align_log;
600 int end_shuid = INSN_SHUID (end);
601 int fuzz = 0;
602
603 for (align_label = uid_align[uid]; align_label; align_label = uid_align[uid])
604 {
605 int align_addr, new_align;
606
607 uid = INSN_UID (align_label);
608 align_addr = INSN_ADDRESSES (uid) - insn_lengths[uid];
609 if (uid_shuid[uid] > end_shuid)
610 break;
611 known_align_log = LABEL_TO_ALIGNMENT (align_label);
612 new_align = 1 << known_align_log;
613 if (new_align < known_align)
614 continue;
615 fuzz += (-align_addr ^ growth) & (new_align - known_align);
616 known_align = new_align;
617 }
618 return fuzz;
619 }
620
621 /* Compute a worst-case reference address of a branch so that it
622 can be safely used in the presence of aligned labels. Since the
623 size of the branch itself is unknown, the size of the branch is
624 not included in the range. I.e. for a forward branch, the reference
625 address is the end address of the branch as known from the previous
626 branch shortening pass, minus a value to account for possible size
627 increase due to alignment. For a backward branch, it is the start
628 address of the branch as known from the current pass, plus a value
629 to account for possible size increase due to alignment.
630 NB.: Therefore, the maximum offset allowed for backward branches needs
631 to exclude the branch size. */
632
633 int
634 insn_current_reference_address (rtx branch)
635 {
636 rtx dest, seq;
637 int seq_uid;
638
639 if (! INSN_ADDRESSES_SET_P ())
640 return 0;
641
642 seq = NEXT_INSN (PREV_INSN (branch));
643 seq_uid = INSN_UID (seq);
644 if (!JUMP_P (branch))
645 /* This can happen for example on the PA; the objective is to know the
646 offset to address something in front of the start of the function.
647 Thus, we can treat it like a backward branch.
648 We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than
649 any alignment we'd encounter, so we skip the call to align_fuzz. */
650 return insn_current_address;
651 dest = JUMP_LABEL (branch);
652
653 /* BRANCH has no proper alignment chain set, so use SEQ.
654 BRANCH also has no INSN_SHUID. */
655 if (INSN_SHUID (seq) < INSN_SHUID (dest))
656 {
657 /* Forward branch. */
658 return (insn_last_address + insn_lengths[seq_uid]
659 - align_fuzz (seq, dest, length_unit_log, ~0));
660 }
661 else
662 {
663 /* Backward branch. */
664 return (insn_current_address
665 + align_fuzz (dest, seq, length_unit_log, ~0));
666 }
667 }
668 \f
669 /* Compute branch alignments based on frequency information in the
670 CFG. */
671
672 unsigned int
673 compute_alignments (void)
674 {
675 int log, max_skip, max_log;
676 basic_block bb;
677 int freq_max = 0;
678 int freq_threshold = 0;
679
680 if (label_align)
681 {
682 free (label_align);
683 label_align = 0;
684 }
685
686 max_labelno = max_label_num ();
687 min_labelno = get_first_label_num ();
688 label_align = XCNEWVEC (struct label_alignment, max_labelno - min_labelno + 1);
689
690 /* If not optimizing or optimizing for size, don't assign any alignments. */
691 if (! optimize || optimize_function_for_size_p (cfun))
692 return 0;
693
694 if (dump_file)
695 {
696 dump_reg_info (dump_file);
697 dump_flow_info (dump_file, TDF_DETAILS);
698 flow_loops_dump (dump_file, NULL, 1);
699 }
700 loop_optimizer_init (AVOID_CFG_MODIFICATIONS);
701 FOR_EACH_BB (bb)
702 if (bb->frequency > freq_max)
703 freq_max = bb->frequency;
704 freq_threshold = freq_max / PARAM_VALUE (PARAM_ALIGN_THRESHOLD);
705
706 if (dump_file)
707 fprintf(dump_file, "freq_max: %i\n",freq_max);
708 FOR_EACH_BB (bb)
709 {
710 rtx label = BB_HEAD (bb);
711 int fallthru_frequency = 0, branch_frequency = 0, has_fallthru = 0;
712 edge e;
713 edge_iterator ei;
714
715 if (!LABEL_P (label)
716 || optimize_bb_for_size_p (bb))
717 {
718 if (dump_file)
719 fprintf(dump_file, "BB %4i freq %4i loop %2i loop_depth %2i skipped.\n",
720 bb->index, bb->frequency, bb->loop_father->num,
721 bb_loop_depth (bb));
722 continue;
723 }
724 max_log = LABEL_ALIGN (label);
725 max_skip = targetm.asm_out.label_align_max_skip (label);
726
727 FOR_EACH_EDGE (e, ei, bb->preds)
728 {
729 if (e->flags & EDGE_FALLTHRU)
730 has_fallthru = 1, fallthru_frequency += EDGE_FREQUENCY (e);
731 else
732 branch_frequency += EDGE_FREQUENCY (e);
733 }
734 if (dump_file)
735 {
736 fprintf(dump_file, "BB %4i freq %4i loop %2i loop_depth %2i fall %4i branch %4i",
737 bb->index, bb->frequency, bb->loop_father->num,
738 bb_loop_depth (bb),
739 fallthru_frequency, branch_frequency);
740 if (!bb->loop_father->inner && bb->loop_father->num)
741 fprintf (dump_file, " inner_loop");
742 if (bb->loop_father->header == bb)
743 fprintf (dump_file, " loop_header");
744 fprintf (dump_file, "\n");
745 }
746
747 /* There are two purposes to align block with no fallthru incoming edge:
748 1) to avoid fetch stalls when branch destination is near cache boundary
749 2) to improve cache efficiency in case the previous block is not executed
750 (so it does not need to be in the cache).
751
752 We to catch first case, we align frequently executed blocks.
753 To catch the second, we align blocks that are executed more frequently
754 than the predecessor and the predecessor is likely to not be executed
755 when function is called. */
756
757 if (!has_fallthru
758 && (branch_frequency > freq_threshold
759 || (bb->frequency > bb->prev_bb->frequency * 10
760 && (bb->prev_bb->frequency
761 <= ENTRY_BLOCK_PTR->frequency / 2))))
762 {
763 log = JUMP_ALIGN (label);
764 if (dump_file)
765 fprintf(dump_file, " jump alignment added.\n");
766 if (max_log < log)
767 {
768 max_log = log;
769 max_skip = targetm.asm_out.jump_align_max_skip (label);
770 }
771 }
772 /* In case block is frequent and reached mostly by non-fallthru edge,
773 align it. It is most likely a first block of loop. */
774 if (has_fallthru
775 && optimize_bb_for_speed_p (bb)
776 && branch_frequency + fallthru_frequency > freq_threshold
777 && (branch_frequency
778 > fallthru_frequency * PARAM_VALUE (PARAM_ALIGN_LOOP_ITERATIONS)))
779 {
780 log = LOOP_ALIGN (label);
781 if (dump_file)
782 fprintf(dump_file, " internal loop alignment added.\n");
783 if (max_log < log)
784 {
785 max_log = log;
786 max_skip = targetm.asm_out.loop_align_max_skip (label);
787 }
788 }
789 LABEL_TO_ALIGNMENT (label) = max_log;
790 LABEL_TO_MAX_SKIP (label) = max_skip;
791 }
792
793 loop_optimizer_finalize ();
794 free_dominance_info (CDI_DOMINATORS);
795 return 0;
796 }
797
798 /* Grow the LABEL_ALIGN array after new labels are created. */
799
800 static void
801 grow_label_align (void)
802 {
803 int old = max_labelno;
804 int n_labels;
805 int n_old_labels;
806
807 max_labelno = max_label_num ();
808
809 n_labels = max_labelno - min_labelno + 1;
810 n_old_labels = old - min_labelno + 1;
811
812 label_align = XRESIZEVEC (struct label_alignment, label_align, n_labels);
813
814 /* Range of labels grows monotonically in the function. Failing here
815 means that the initialization of array got lost. */
816 gcc_assert (n_old_labels <= n_labels);
817
818 memset (label_align + n_old_labels, 0,
819 (n_labels - n_old_labels) * sizeof (struct label_alignment));
820 }
821
822 /* Update the already computed alignment information. LABEL_PAIRS is a vector
823 made up of pairs of labels for which the alignment information of the first
824 element will be copied from that of the second element. */
825
826 void
827 update_alignments (vec<rtx> &label_pairs)
828 {
829 unsigned int i = 0;
830 rtx iter, label;
831
832 if (max_labelno != max_label_num ())
833 grow_label_align ();
834
835 FOR_EACH_VEC_ELT (label_pairs, i, iter)
836 if (i & 1)
837 {
838 LABEL_TO_ALIGNMENT (label) = LABEL_TO_ALIGNMENT (iter);
839 LABEL_TO_MAX_SKIP (label) = LABEL_TO_MAX_SKIP (iter);
840 }
841 else
842 label = iter;
843 }
844
845 namespace {
846
847 const pass_data pass_data_compute_alignments =
848 {
849 RTL_PASS, /* type */
850 "alignments", /* name */
851 OPTGROUP_NONE, /* optinfo_flags */
852 false, /* has_gate */
853 true, /* has_execute */
854 TV_NONE, /* tv_id */
855 0, /* properties_required */
856 0, /* properties_provided */
857 0, /* properties_destroyed */
858 0, /* todo_flags_start */
859 TODO_verify_rtl_sharing, /* todo_flags_finish */
860 };
861
862 class pass_compute_alignments : public rtl_opt_pass
863 {
864 public:
865 pass_compute_alignments(gcc::context *ctxt)
866 : rtl_opt_pass(pass_data_compute_alignments, ctxt)
867 {}
868
869 /* opt_pass methods: */
870 unsigned int execute () { return compute_alignments (); }
871
872 }; // class pass_compute_alignments
873
874 } // anon namespace
875
876 rtl_opt_pass *
877 make_pass_compute_alignments (gcc::context *ctxt)
878 {
879 return new pass_compute_alignments (ctxt);
880 }
881
882 \f
883 /* Make a pass over all insns and compute their actual lengths by shortening
884 any branches of variable length if possible. */
885
886 /* shorten_branches might be called multiple times: for example, the SH
887 port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG.
888 In order to do this, it needs proper length information, which it obtains
889 by calling shorten_branches. This cannot be collapsed with
890 shorten_branches itself into a single pass unless we also want to integrate
891 reorg.c, since the branch splitting exposes new instructions with delay
892 slots. */
893
894 void
895 shorten_branches (rtx first)
896 {
897 rtx insn;
898 int max_uid;
899 int i;
900 int max_log;
901 int max_skip;
902 #define MAX_CODE_ALIGN 16
903 rtx seq;
904 int something_changed = 1;
905 char *varying_length;
906 rtx body;
907 int uid;
908 rtx align_tab[MAX_CODE_ALIGN];
909
910 /* Compute maximum UID and allocate label_align / uid_shuid. */
911 max_uid = get_max_uid ();
912
913 /* Free uid_shuid before reallocating it. */
914 free (uid_shuid);
915
916 uid_shuid = XNEWVEC (int, max_uid);
917
918 if (max_labelno != max_label_num ())
919 grow_label_align ();
920
921 /* Initialize label_align and set up uid_shuid to be strictly
922 monotonically rising with insn order. */
923 /* We use max_log here to keep track of the maximum alignment we want to
924 impose on the next CODE_LABEL (or the current one if we are processing
925 the CODE_LABEL itself). */
926
927 max_log = 0;
928 max_skip = 0;
929
930 for (insn = get_insns (), i = 1; insn; insn = NEXT_INSN (insn))
931 {
932 int log;
933
934 INSN_SHUID (insn) = i++;
935 if (INSN_P (insn))
936 continue;
937
938 if (LABEL_P (insn))
939 {
940 rtx next;
941 bool next_is_jumptable;
942
943 /* Merge in alignments computed by compute_alignments. */
944 log = LABEL_TO_ALIGNMENT (insn);
945 if (max_log < log)
946 {
947 max_log = log;
948 max_skip = LABEL_TO_MAX_SKIP (insn);
949 }
950
951 next = next_nonnote_insn (insn);
952 next_is_jumptable = next && JUMP_TABLE_DATA_P (next);
953 if (!next_is_jumptable)
954 {
955 log = LABEL_ALIGN (insn);
956 if (max_log < log)
957 {
958 max_log = log;
959 max_skip = targetm.asm_out.label_align_max_skip (insn);
960 }
961 }
962 /* ADDR_VECs only take room if read-only data goes into the text
963 section. */
964 if ((JUMP_TABLES_IN_TEXT_SECTION
965 || readonly_data_section == text_section)
966 && next_is_jumptable)
967 {
968 log = ADDR_VEC_ALIGN (next);
969 if (max_log < log)
970 {
971 max_log = log;
972 max_skip = targetm.asm_out.label_align_max_skip (insn);
973 }
974 }
975 LABEL_TO_ALIGNMENT (insn) = max_log;
976 LABEL_TO_MAX_SKIP (insn) = max_skip;
977 max_log = 0;
978 max_skip = 0;
979 }
980 else if (BARRIER_P (insn))
981 {
982 rtx label;
983
984 for (label = insn; label && ! INSN_P (label);
985 label = NEXT_INSN (label))
986 if (LABEL_P (label))
987 {
988 log = LABEL_ALIGN_AFTER_BARRIER (insn);
989 if (max_log < log)
990 {
991 max_log = log;
992 max_skip = targetm.asm_out.label_align_after_barrier_max_skip (label);
993 }
994 break;
995 }
996 }
997 }
998 if (!HAVE_ATTR_length)
999 return;
1000
1001 /* Allocate the rest of the arrays. */
1002 insn_lengths = XNEWVEC (int, max_uid);
1003 insn_lengths_max_uid = max_uid;
1004 /* Syntax errors can lead to labels being outside of the main insn stream.
1005 Initialize insn_addresses, so that we get reproducible results. */
1006 INSN_ADDRESSES_ALLOC (max_uid);
1007
1008 varying_length = XCNEWVEC (char, max_uid);
1009
1010 /* Initialize uid_align. We scan instructions
1011 from end to start, and keep in align_tab[n] the last seen insn
1012 that does an alignment of at least n+1, i.e. the successor
1013 in the alignment chain for an insn that does / has a known
1014 alignment of n. */
1015 uid_align = XCNEWVEC (rtx, max_uid);
1016
1017 for (i = MAX_CODE_ALIGN; --i >= 0;)
1018 align_tab[i] = NULL_RTX;
1019 seq = get_last_insn ();
1020 for (; seq; seq = PREV_INSN (seq))
1021 {
1022 int uid = INSN_UID (seq);
1023 int log;
1024 log = (LABEL_P (seq) ? LABEL_TO_ALIGNMENT (seq) : 0);
1025 uid_align[uid] = align_tab[0];
1026 if (log)
1027 {
1028 /* Found an alignment label. */
1029 uid_align[uid] = align_tab[log];
1030 for (i = log - 1; i >= 0; i--)
1031 align_tab[i] = seq;
1032 }
1033 }
1034
1035 /* When optimizing, we start assuming minimum length, and keep increasing
1036 lengths as we find the need for this, till nothing changes.
1037 When not optimizing, we start assuming maximum lengths, and
1038 do a single pass to update the lengths. */
1039 bool increasing = optimize != 0;
1040
1041 #ifdef CASE_VECTOR_SHORTEN_MODE
1042 if (optimize)
1043 {
1044 /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum
1045 label fields. */
1046
1047 int min_shuid = INSN_SHUID (get_insns ()) - 1;
1048 int max_shuid = INSN_SHUID (get_last_insn ()) + 1;
1049 int rel;
1050
1051 for (insn = first; insn != 0; insn = NEXT_INSN (insn))
1052 {
1053 rtx min_lab = NULL_RTX, max_lab = NULL_RTX, pat;
1054 int len, i, min, max, insn_shuid;
1055 int min_align;
1056 addr_diff_vec_flags flags;
1057
1058 if (! JUMP_TABLE_DATA_P (insn)
1059 || GET_CODE (PATTERN (insn)) != ADDR_DIFF_VEC)
1060 continue;
1061 pat = PATTERN (insn);
1062 len = XVECLEN (pat, 1);
1063 gcc_assert (len > 0);
1064 min_align = MAX_CODE_ALIGN;
1065 for (min = max_shuid, max = min_shuid, i = len - 1; i >= 0; i--)
1066 {
1067 rtx lab = XEXP (XVECEXP (pat, 1, i), 0);
1068 int shuid = INSN_SHUID (lab);
1069 if (shuid < min)
1070 {
1071 min = shuid;
1072 min_lab = lab;
1073 }
1074 if (shuid > max)
1075 {
1076 max = shuid;
1077 max_lab = lab;
1078 }
1079 if (min_align > LABEL_TO_ALIGNMENT (lab))
1080 min_align = LABEL_TO_ALIGNMENT (lab);
1081 }
1082 XEXP (pat, 2) = gen_rtx_LABEL_REF (Pmode, min_lab);
1083 XEXP (pat, 3) = gen_rtx_LABEL_REF (Pmode, max_lab);
1084 insn_shuid = INSN_SHUID (insn);
1085 rel = INSN_SHUID (XEXP (XEXP (pat, 0), 0));
1086 memset (&flags, 0, sizeof (flags));
1087 flags.min_align = min_align;
1088 flags.base_after_vec = rel > insn_shuid;
1089 flags.min_after_vec = min > insn_shuid;
1090 flags.max_after_vec = max > insn_shuid;
1091 flags.min_after_base = min > rel;
1092 flags.max_after_base = max > rel;
1093 ADDR_DIFF_VEC_FLAGS (pat) = flags;
1094
1095 if (increasing)
1096 PUT_MODE (pat, CASE_VECTOR_SHORTEN_MODE (0, 0, pat));
1097 }
1098 }
1099 #endif /* CASE_VECTOR_SHORTEN_MODE */
1100
1101 /* Compute initial lengths, addresses, and varying flags for each insn. */
1102 int (*length_fun) (rtx) = increasing ? insn_min_length : insn_default_length;
1103
1104 for (insn_current_address = 0, insn = first;
1105 insn != 0;
1106 insn_current_address += insn_lengths[uid], insn = NEXT_INSN (insn))
1107 {
1108 uid = INSN_UID (insn);
1109
1110 insn_lengths[uid] = 0;
1111
1112 if (LABEL_P (insn))
1113 {
1114 int log = LABEL_TO_ALIGNMENT (insn);
1115 if (log)
1116 {
1117 int align = 1 << log;
1118 int new_address = (insn_current_address + align - 1) & -align;
1119 insn_lengths[uid] = new_address - insn_current_address;
1120 }
1121 }
1122
1123 INSN_ADDRESSES (uid) = insn_current_address + insn_lengths[uid];
1124
1125 if (NOTE_P (insn) || BARRIER_P (insn)
1126 || LABEL_P (insn) || DEBUG_INSN_P(insn))
1127 continue;
1128 if (INSN_DELETED_P (insn))
1129 continue;
1130
1131 body = PATTERN (insn);
1132 if (JUMP_TABLE_DATA_P (insn))
1133 {
1134 /* This only takes room if read-only data goes into the text
1135 section. */
1136 if (JUMP_TABLES_IN_TEXT_SECTION
1137 || readonly_data_section == text_section)
1138 insn_lengths[uid] = (XVECLEN (body,
1139 GET_CODE (body) == ADDR_DIFF_VEC)
1140 * GET_MODE_SIZE (GET_MODE (body)));
1141 /* Alignment is handled by ADDR_VEC_ALIGN. */
1142 }
1143 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
1144 insn_lengths[uid] = asm_insn_count (body) * insn_default_length (insn);
1145 else if (GET_CODE (body) == SEQUENCE)
1146 {
1147 int i;
1148 int const_delay_slots;
1149 #ifdef DELAY_SLOTS
1150 const_delay_slots = const_num_delay_slots (XVECEXP (body, 0, 0));
1151 #else
1152 const_delay_slots = 0;
1153 #endif
1154 int (*inner_length_fun) (rtx)
1155 = const_delay_slots ? length_fun : insn_default_length;
1156 /* Inside a delay slot sequence, we do not do any branch shortening
1157 if the shortening could change the number of delay slots
1158 of the branch. */
1159 for (i = 0; i < XVECLEN (body, 0); i++)
1160 {
1161 rtx inner_insn = XVECEXP (body, 0, i);
1162 int inner_uid = INSN_UID (inner_insn);
1163 int inner_length;
1164
1165 if (GET_CODE (body) == ASM_INPUT
1166 || asm_noperands (PATTERN (XVECEXP (body, 0, i))) >= 0)
1167 inner_length = (asm_insn_count (PATTERN (inner_insn))
1168 * insn_default_length (inner_insn));
1169 else
1170 inner_length = inner_length_fun (inner_insn);
1171
1172 insn_lengths[inner_uid] = inner_length;
1173 if (const_delay_slots)
1174 {
1175 if ((varying_length[inner_uid]
1176 = insn_variable_length_p (inner_insn)) != 0)
1177 varying_length[uid] = 1;
1178 INSN_ADDRESSES (inner_uid) = (insn_current_address
1179 + insn_lengths[uid]);
1180 }
1181 else
1182 varying_length[inner_uid] = 0;
1183 insn_lengths[uid] += inner_length;
1184 }
1185 }
1186 else if (GET_CODE (body) != USE && GET_CODE (body) != CLOBBER)
1187 {
1188 insn_lengths[uid] = length_fun (insn);
1189 varying_length[uid] = insn_variable_length_p (insn);
1190 }
1191
1192 /* If needed, do any adjustment. */
1193 #ifdef ADJUST_INSN_LENGTH
1194 ADJUST_INSN_LENGTH (insn, insn_lengths[uid]);
1195 if (insn_lengths[uid] < 0)
1196 fatal_insn ("negative insn length", insn);
1197 #endif
1198 }
1199
1200 /* Now loop over all the insns finding varying length insns. For each,
1201 get the current insn length. If it has changed, reflect the change.
1202 When nothing changes for a full pass, we are done. */
1203
1204 while (something_changed)
1205 {
1206 something_changed = 0;
1207 insn_current_align = MAX_CODE_ALIGN - 1;
1208 for (insn_current_address = 0, insn = first;
1209 insn != 0;
1210 insn = NEXT_INSN (insn))
1211 {
1212 int new_length;
1213 #ifdef ADJUST_INSN_LENGTH
1214 int tmp_length;
1215 #endif
1216 int length_align;
1217
1218 uid = INSN_UID (insn);
1219
1220 if (LABEL_P (insn))
1221 {
1222 int log = LABEL_TO_ALIGNMENT (insn);
1223
1224 #ifdef CASE_VECTOR_SHORTEN_MODE
1225 /* If the mode of a following jump table was changed, we
1226 may need to update the alignment of this label. */
1227 rtx next;
1228 bool next_is_jumptable;
1229
1230 next = next_nonnote_insn (insn);
1231 next_is_jumptable = next && JUMP_TABLE_DATA_P (next);
1232 if ((JUMP_TABLES_IN_TEXT_SECTION
1233 || readonly_data_section == text_section)
1234 && next_is_jumptable)
1235 {
1236 int newlog = ADDR_VEC_ALIGN (next);
1237 if (newlog != log)
1238 {
1239 log = newlog;
1240 LABEL_TO_ALIGNMENT (insn) = log;
1241 something_changed = 1;
1242 }
1243 }
1244 #endif
1245
1246 if (log > insn_current_align)
1247 {
1248 int align = 1 << log;
1249 int new_address= (insn_current_address + align - 1) & -align;
1250 insn_lengths[uid] = new_address - insn_current_address;
1251 insn_current_align = log;
1252 insn_current_address = new_address;
1253 }
1254 else
1255 insn_lengths[uid] = 0;
1256 INSN_ADDRESSES (uid) = insn_current_address;
1257 continue;
1258 }
1259
1260 length_align = INSN_LENGTH_ALIGNMENT (insn);
1261 if (length_align < insn_current_align)
1262 insn_current_align = length_align;
1263
1264 insn_last_address = INSN_ADDRESSES (uid);
1265 INSN_ADDRESSES (uid) = insn_current_address;
1266
1267 #ifdef CASE_VECTOR_SHORTEN_MODE
1268 if (optimize
1269 && JUMP_TABLE_DATA_P (insn)
1270 && GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
1271 {
1272 rtx body = PATTERN (insn);
1273 int old_length = insn_lengths[uid];
1274 rtx rel_lab = XEXP (XEXP (body, 0), 0);
1275 rtx min_lab = XEXP (XEXP (body, 2), 0);
1276 rtx max_lab = XEXP (XEXP (body, 3), 0);
1277 int rel_addr = INSN_ADDRESSES (INSN_UID (rel_lab));
1278 int min_addr = INSN_ADDRESSES (INSN_UID (min_lab));
1279 int max_addr = INSN_ADDRESSES (INSN_UID (max_lab));
1280 rtx prev;
1281 int rel_align = 0;
1282 addr_diff_vec_flags flags;
1283 enum machine_mode vec_mode;
1284
1285 /* Avoid automatic aggregate initialization. */
1286 flags = ADDR_DIFF_VEC_FLAGS (body);
1287
1288 /* Try to find a known alignment for rel_lab. */
1289 for (prev = rel_lab;
1290 prev
1291 && ! insn_lengths[INSN_UID (prev)]
1292 && ! (varying_length[INSN_UID (prev)] & 1);
1293 prev = PREV_INSN (prev))
1294 if (varying_length[INSN_UID (prev)] & 2)
1295 {
1296 rel_align = LABEL_TO_ALIGNMENT (prev);
1297 break;
1298 }
1299
1300 /* See the comment on addr_diff_vec_flags in rtl.h for the
1301 meaning of the flags values. base: REL_LAB vec: INSN */
1302 /* Anything after INSN has still addresses from the last
1303 pass; adjust these so that they reflect our current
1304 estimate for this pass. */
1305 if (flags.base_after_vec)
1306 rel_addr += insn_current_address - insn_last_address;
1307 if (flags.min_after_vec)
1308 min_addr += insn_current_address - insn_last_address;
1309 if (flags.max_after_vec)
1310 max_addr += insn_current_address - insn_last_address;
1311 /* We want to know the worst case, i.e. lowest possible value
1312 for the offset of MIN_LAB. If MIN_LAB is after REL_LAB,
1313 its offset is positive, and we have to be wary of code shrink;
1314 otherwise, it is negative, and we have to be vary of code
1315 size increase. */
1316 if (flags.min_after_base)
1317 {
1318 /* If INSN is between REL_LAB and MIN_LAB, the size
1319 changes we are about to make can change the alignment
1320 within the observed offset, therefore we have to break
1321 it up into two parts that are independent. */
1322 if (! flags.base_after_vec && flags.min_after_vec)
1323 {
1324 min_addr -= align_fuzz (rel_lab, insn, rel_align, 0);
1325 min_addr -= align_fuzz (insn, min_lab, 0, 0);
1326 }
1327 else
1328 min_addr -= align_fuzz (rel_lab, min_lab, rel_align, 0);
1329 }
1330 else
1331 {
1332 if (flags.base_after_vec && ! flags.min_after_vec)
1333 {
1334 min_addr -= align_fuzz (min_lab, insn, 0, ~0);
1335 min_addr -= align_fuzz (insn, rel_lab, 0, ~0);
1336 }
1337 else
1338 min_addr -= align_fuzz (min_lab, rel_lab, 0, ~0);
1339 }
1340 /* Likewise, determine the highest lowest possible value
1341 for the offset of MAX_LAB. */
1342 if (flags.max_after_base)
1343 {
1344 if (! flags.base_after_vec && flags.max_after_vec)
1345 {
1346 max_addr += align_fuzz (rel_lab, insn, rel_align, ~0);
1347 max_addr += align_fuzz (insn, max_lab, 0, ~0);
1348 }
1349 else
1350 max_addr += align_fuzz (rel_lab, max_lab, rel_align, ~0);
1351 }
1352 else
1353 {
1354 if (flags.base_after_vec && ! flags.max_after_vec)
1355 {
1356 max_addr += align_fuzz (max_lab, insn, 0, 0);
1357 max_addr += align_fuzz (insn, rel_lab, 0, 0);
1358 }
1359 else
1360 max_addr += align_fuzz (max_lab, rel_lab, 0, 0);
1361 }
1362 vec_mode = CASE_VECTOR_SHORTEN_MODE (min_addr - rel_addr,
1363 max_addr - rel_addr, body);
1364 if (!increasing
1365 || (GET_MODE_SIZE (vec_mode)
1366 >= GET_MODE_SIZE (GET_MODE (body))))
1367 PUT_MODE (body, vec_mode);
1368 if (JUMP_TABLES_IN_TEXT_SECTION
1369 || readonly_data_section == text_section)
1370 {
1371 insn_lengths[uid]
1372 = (XVECLEN (body, 1) * GET_MODE_SIZE (GET_MODE (body)));
1373 insn_current_address += insn_lengths[uid];
1374 if (insn_lengths[uid] != old_length)
1375 something_changed = 1;
1376 }
1377
1378 continue;
1379 }
1380 #endif /* CASE_VECTOR_SHORTEN_MODE */
1381
1382 if (! (varying_length[uid]))
1383 {
1384 if (NONJUMP_INSN_P (insn)
1385 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1386 {
1387 int i;
1388
1389 body = PATTERN (insn);
1390 for (i = 0; i < XVECLEN (body, 0); i++)
1391 {
1392 rtx inner_insn = XVECEXP (body, 0, i);
1393 int inner_uid = INSN_UID (inner_insn);
1394
1395 INSN_ADDRESSES (inner_uid) = insn_current_address;
1396
1397 insn_current_address += insn_lengths[inner_uid];
1398 }
1399 }
1400 else
1401 insn_current_address += insn_lengths[uid];
1402
1403 continue;
1404 }
1405
1406 if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
1407 {
1408 int i;
1409
1410 body = PATTERN (insn);
1411 new_length = 0;
1412 for (i = 0; i < XVECLEN (body, 0); i++)
1413 {
1414 rtx inner_insn = XVECEXP (body, 0, i);
1415 int inner_uid = INSN_UID (inner_insn);
1416 int inner_length;
1417
1418 INSN_ADDRESSES (inner_uid) = insn_current_address;
1419
1420 /* insn_current_length returns 0 for insns with a
1421 non-varying length. */
1422 if (! varying_length[inner_uid])
1423 inner_length = insn_lengths[inner_uid];
1424 else
1425 inner_length = insn_current_length (inner_insn);
1426
1427 if (inner_length != insn_lengths[inner_uid])
1428 {
1429 if (!increasing || inner_length > insn_lengths[inner_uid])
1430 {
1431 insn_lengths[inner_uid] = inner_length;
1432 something_changed = 1;
1433 }
1434 else
1435 inner_length = insn_lengths[inner_uid];
1436 }
1437 insn_current_address += inner_length;
1438 new_length += inner_length;
1439 }
1440 }
1441 else
1442 {
1443 new_length = insn_current_length (insn);
1444 insn_current_address += new_length;
1445 }
1446
1447 #ifdef ADJUST_INSN_LENGTH
1448 /* If needed, do any adjustment. */
1449 tmp_length = new_length;
1450 ADJUST_INSN_LENGTH (insn, new_length);
1451 insn_current_address += (new_length - tmp_length);
1452 #endif
1453
1454 if (new_length != insn_lengths[uid]
1455 && (!increasing || new_length > insn_lengths[uid]))
1456 {
1457 insn_lengths[uid] = new_length;
1458 something_changed = 1;
1459 }
1460 else
1461 insn_current_address += insn_lengths[uid] - new_length;
1462 }
1463 /* For a non-optimizing compile, do only a single pass. */
1464 if (!increasing)
1465 break;
1466 }
1467
1468 free (varying_length);
1469 }
1470
1471 /* Given the body of an INSN known to be generated by an ASM statement, return
1472 the number of machine instructions likely to be generated for this insn.
1473 This is used to compute its length. */
1474
1475 static int
1476 asm_insn_count (rtx body)
1477 {
1478 const char *templ;
1479
1480 if (GET_CODE (body) == ASM_INPUT)
1481 templ = XSTR (body, 0);
1482 else
1483 templ = decode_asm_operands (body, NULL, NULL, NULL, NULL, NULL);
1484
1485 return asm_str_count (templ);
1486 }
1487
1488 /* Return the number of machine instructions likely to be generated for the
1489 inline-asm template. */
1490 int
1491 asm_str_count (const char *templ)
1492 {
1493 int count = 1;
1494
1495 if (!*templ)
1496 return 0;
1497
1498 for (; *templ; templ++)
1499 if (IS_ASM_LOGICAL_LINE_SEPARATOR (*templ, templ)
1500 || *templ == '\n')
1501 count++;
1502
1503 return count;
1504 }
1505 \f
1506 /* ??? This is probably the wrong place for these. */
1507 /* Structure recording the mapping from source file and directory
1508 names at compile time to those to be embedded in debug
1509 information. */
1510 typedef struct debug_prefix_map
1511 {
1512 const char *old_prefix;
1513 const char *new_prefix;
1514 size_t old_len;
1515 size_t new_len;
1516 struct debug_prefix_map *next;
1517 } debug_prefix_map;
1518
1519 /* Linked list of such structures. */
1520 static debug_prefix_map *debug_prefix_maps;
1521
1522
1523 /* Record a debug file prefix mapping. ARG is the argument to
1524 -fdebug-prefix-map and must be of the form OLD=NEW. */
1525
1526 void
1527 add_debug_prefix_map (const char *arg)
1528 {
1529 debug_prefix_map *map;
1530 const char *p;
1531
1532 p = strchr (arg, '=');
1533 if (!p)
1534 {
1535 error ("invalid argument %qs to -fdebug-prefix-map", arg);
1536 return;
1537 }
1538 map = XNEW (debug_prefix_map);
1539 map->old_prefix = xstrndup (arg, p - arg);
1540 map->old_len = p - arg;
1541 p++;
1542 map->new_prefix = xstrdup (p);
1543 map->new_len = strlen (p);
1544 map->next = debug_prefix_maps;
1545 debug_prefix_maps = map;
1546 }
1547
1548 /* Perform user-specified mapping of debug filename prefixes. Return
1549 the new name corresponding to FILENAME. */
1550
1551 const char *
1552 remap_debug_filename (const char *filename)
1553 {
1554 debug_prefix_map *map;
1555 char *s;
1556 const char *name;
1557 size_t name_len;
1558
1559 for (map = debug_prefix_maps; map; map = map->next)
1560 if (filename_ncmp (filename, map->old_prefix, map->old_len) == 0)
1561 break;
1562 if (!map)
1563 return filename;
1564 name = filename + map->old_len;
1565 name_len = strlen (name) + 1;
1566 s = (char *) alloca (name_len + map->new_len);
1567 memcpy (s, map->new_prefix, map->new_len);
1568 memcpy (s + map->new_len, name, name_len);
1569 return ggc_strdup (s);
1570 }
1571 \f
1572 /* Return true if DWARF2 debug info can be emitted for DECL. */
1573
1574 static bool
1575 dwarf2_debug_info_emitted_p (tree decl)
1576 {
1577 if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG)
1578 return false;
1579
1580 if (DECL_IGNORED_P (decl))
1581 return false;
1582
1583 return true;
1584 }
1585
1586 /* Return scope resulting from combination of S1 and S2. */
1587 static tree
1588 choose_inner_scope (tree s1, tree s2)
1589 {
1590 if (!s1)
1591 return s2;
1592 if (!s2)
1593 return s1;
1594 if (BLOCK_NUMBER (s1) > BLOCK_NUMBER (s2))
1595 return s1;
1596 return s2;
1597 }
1598
1599 /* Emit lexical block notes needed to change scope from S1 to S2. */
1600
1601 static void
1602 change_scope (rtx orig_insn, tree s1, tree s2)
1603 {
1604 rtx insn = orig_insn;
1605 tree com = NULL_TREE;
1606 tree ts1 = s1, ts2 = s2;
1607 tree s;
1608
1609 while (ts1 != ts2)
1610 {
1611 gcc_assert (ts1 && ts2);
1612 if (BLOCK_NUMBER (ts1) > BLOCK_NUMBER (ts2))
1613 ts1 = BLOCK_SUPERCONTEXT (ts1);
1614 else if (BLOCK_NUMBER (ts1) < BLOCK_NUMBER (ts2))
1615 ts2 = BLOCK_SUPERCONTEXT (ts2);
1616 else
1617 {
1618 ts1 = BLOCK_SUPERCONTEXT (ts1);
1619 ts2 = BLOCK_SUPERCONTEXT (ts2);
1620 }
1621 }
1622 com = ts1;
1623
1624 /* Close scopes. */
1625 s = s1;
1626 while (s != com)
1627 {
1628 rtx note = emit_note_before (NOTE_INSN_BLOCK_END, insn);
1629 NOTE_BLOCK (note) = s;
1630 s = BLOCK_SUPERCONTEXT (s);
1631 }
1632
1633 /* Open scopes. */
1634 s = s2;
1635 while (s != com)
1636 {
1637 insn = emit_note_before (NOTE_INSN_BLOCK_BEG, insn);
1638 NOTE_BLOCK (insn) = s;
1639 s = BLOCK_SUPERCONTEXT (s);
1640 }
1641 }
1642
1643 /* Rebuild all the NOTE_INSN_BLOCK_BEG and NOTE_INSN_BLOCK_END notes based
1644 on the scope tree and the newly reordered instructions. */
1645
1646 static void
1647 reemit_insn_block_notes (void)
1648 {
1649 tree cur_block = DECL_INITIAL (cfun->decl);
1650 rtx insn, note;
1651
1652 insn = get_insns ();
1653 for (; insn; insn = next_insn (insn))
1654 {
1655 tree this_block;
1656
1657 /* Prevent lexical blocks from straddling section boundaries. */
1658 if (NOTE_P (insn) && NOTE_KIND (insn) == NOTE_INSN_SWITCH_TEXT_SECTIONS)
1659 {
1660 for (tree s = cur_block; s != DECL_INITIAL (cfun->decl);
1661 s = BLOCK_SUPERCONTEXT (s))
1662 {
1663 rtx note = emit_note_before (NOTE_INSN_BLOCK_END, insn);
1664 NOTE_BLOCK (note) = s;
1665 note = emit_note_after (NOTE_INSN_BLOCK_BEG, insn);
1666 NOTE_BLOCK (note) = s;
1667 }
1668 }
1669
1670 if (!active_insn_p (insn))
1671 continue;
1672
1673 /* Avoid putting scope notes between jump table and its label. */
1674 if (JUMP_TABLE_DATA_P (insn))
1675 continue;
1676
1677 this_block = insn_scope (insn);
1678 /* For sequences compute scope resulting from merging all scopes
1679 of instructions nested inside. */
1680 if (GET_CODE (PATTERN (insn)) == SEQUENCE)
1681 {
1682 int i;
1683 rtx body = PATTERN (insn);
1684
1685 this_block = NULL;
1686 for (i = 0; i < XVECLEN (body, 0); i++)
1687 this_block = choose_inner_scope (this_block,
1688 insn_scope (XVECEXP (body, 0, i)));
1689 }
1690 if (! this_block)
1691 {
1692 if (INSN_LOCATION (insn) == UNKNOWN_LOCATION)
1693 continue;
1694 else
1695 this_block = DECL_INITIAL (cfun->decl);
1696 }
1697
1698 if (this_block != cur_block)
1699 {
1700 change_scope (insn, cur_block, this_block);
1701 cur_block = this_block;
1702 }
1703 }
1704
1705 /* change_scope emits before the insn, not after. */
1706 note = emit_note (NOTE_INSN_DELETED);
1707 change_scope (note, cur_block, DECL_INITIAL (cfun->decl));
1708 delete_insn (note);
1709
1710 reorder_blocks ();
1711 }
1712
1713 /* Output assembler code for the start of a function,
1714 and initialize some of the variables in this file
1715 for the new function. The label for the function and associated
1716 assembler pseudo-ops have already been output in `assemble_start_function'.
1717
1718 FIRST is the first insn of the rtl for the function being compiled.
1719 FILE is the file to write assembler code to.
1720 OPTIMIZE_P is nonzero if we should eliminate redundant
1721 test and compare insns. */
1722
1723 void
1724 final_start_function (rtx first, FILE *file,
1725 int optimize_p ATTRIBUTE_UNUSED)
1726 {
1727 block_depth = 0;
1728
1729 this_is_asm_operands = 0;
1730
1731 need_profile_function = false;
1732
1733 last_filename = LOCATION_FILE (prologue_location);
1734 last_linenum = LOCATION_LINE (prologue_location);
1735 last_discriminator = discriminator = 0;
1736
1737 high_block_linenum = high_function_linenum = last_linenum;
1738
1739 if (!DECL_IGNORED_P (current_function_decl))
1740 debug_hooks->begin_prologue (last_linenum, last_filename);
1741
1742 if (!dwarf2_debug_info_emitted_p (current_function_decl))
1743 dwarf2out_begin_prologue (0, NULL);
1744
1745 #ifdef LEAF_REG_REMAP
1746 if (crtl->uses_only_leaf_regs)
1747 leaf_renumber_regs (first);
1748 #endif
1749
1750 /* The Sun386i and perhaps other machines don't work right
1751 if the profiling code comes after the prologue. */
1752 if (targetm.profile_before_prologue () && crtl->profile)
1753 {
1754 if (targetm.asm_out.function_prologue
1755 == default_function_pro_epilogue
1756 #ifdef HAVE_prologue
1757 && HAVE_prologue
1758 #endif
1759 )
1760 {
1761 rtx insn;
1762 for (insn = first; insn; insn = NEXT_INSN (insn))
1763 if (!NOTE_P (insn))
1764 {
1765 insn = NULL_RTX;
1766 break;
1767 }
1768 else if (NOTE_KIND (insn) == NOTE_INSN_BASIC_BLOCK
1769 || NOTE_KIND (insn) == NOTE_INSN_FUNCTION_BEG)
1770 break;
1771 else if (NOTE_KIND (insn) == NOTE_INSN_DELETED
1772 || NOTE_KIND (insn) == NOTE_INSN_VAR_LOCATION)
1773 continue;
1774 else
1775 {
1776 insn = NULL_RTX;
1777 break;
1778 }
1779
1780 if (insn)
1781 need_profile_function = true;
1782 else
1783 profile_function (file);
1784 }
1785 else
1786 profile_function (file);
1787 }
1788
1789 /* If debugging, assign block numbers to all of the blocks in this
1790 function. */
1791 if (write_symbols)
1792 {
1793 reemit_insn_block_notes ();
1794 number_blocks (current_function_decl);
1795 /* We never actually put out begin/end notes for the top-level
1796 block in the function. But, conceptually, that block is
1797 always needed. */
1798 TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl)) = 1;
1799 }
1800
1801 if (warn_frame_larger_than
1802 && get_frame_size () > frame_larger_than_size)
1803 {
1804 /* Issue a warning */
1805 warning (OPT_Wframe_larger_than_,
1806 "the frame size of %wd bytes is larger than %wd bytes",
1807 get_frame_size (), frame_larger_than_size);
1808 }
1809
1810 /* First output the function prologue: code to set up the stack frame. */
1811 targetm.asm_out.function_prologue (file, get_frame_size ());
1812
1813 /* If the machine represents the prologue as RTL, the profiling code must
1814 be emitted when NOTE_INSN_PROLOGUE_END is scanned. */
1815 #ifdef HAVE_prologue
1816 if (! HAVE_prologue)
1817 #endif
1818 profile_after_prologue (file);
1819 }
1820
1821 static void
1822 profile_after_prologue (FILE *file ATTRIBUTE_UNUSED)
1823 {
1824 if (!targetm.profile_before_prologue () && crtl->profile)
1825 profile_function (file);
1826 }
1827
1828 static void
1829 profile_function (FILE *file ATTRIBUTE_UNUSED)
1830 {
1831 #ifndef NO_PROFILE_COUNTERS
1832 # define NO_PROFILE_COUNTERS 0
1833 #endif
1834 #ifdef ASM_OUTPUT_REG_PUSH
1835 rtx sval = NULL, chain = NULL;
1836
1837 if (cfun->returns_struct)
1838 sval = targetm.calls.struct_value_rtx (TREE_TYPE (current_function_decl),
1839 true);
1840 if (cfun->static_chain_decl)
1841 chain = targetm.calls.static_chain (current_function_decl, true);
1842 #endif /* ASM_OUTPUT_REG_PUSH */
1843
1844 if (! NO_PROFILE_COUNTERS)
1845 {
1846 int align = MIN (BIGGEST_ALIGNMENT, LONG_TYPE_SIZE);
1847 switch_to_section (data_section);
1848 ASM_OUTPUT_ALIGN (file, floor_log2 (align / BITS_PER_UNIT));
1849 targetm.asm_out.internal_label (file, "LP", current_function_funcdef_no);
1850 assemble_integer (const0_rtx, LONG_TYPE_SIZE / BITS_PER_UNIT, align, 1);
1851 }
1852
1853 switch_to_section (current_function_section ());
1854
1855 #ifdef ASM_OUTPUT_REG_PUSH
1856 if (sval && REG_P (sval))
1857 ASM_OUTPUT_REG_PUSH (file, REGNO (sval));
1858 if (chain && REG_P (chain))
1859 ASM_OUTPUT_REG_PUSH (file, REGNO (chain));
1860 #endif
1861
1862 FUNCTION_PROFILER (file, current_function_funcdef_no);
1863
1864 #ifdef ASM_OUTPUT_REG_PUSH
1865 if (chain && REG_P (chain))
1866 ASM_OUTPUT_REG_POP (file, REGNO (chain));
1867 if (sval && REG_P (sval))
1868 ASM_OUTPUT_REG_POP (file, REGNO (sval));
1869 #endif
1870 }
1871
1872 /* Output assembler code for the end of a function.
1873 For clarity, args are same as those of `final_start_function'
1874 even though not all of them are needed. */
1875
1876 void
1877 final_end_function (void)
1878 {
1879 app_disable ();
1880
1881 if (!DECL_IGNORED_P (current_function_decl))
1882 debug_hooks->end_function (high_function_linenum);
1883
1884 /* Finally, output the function epilogue:
1885 code to restore the stack frame and return to the caller. */
1886 targetm.asm_out.function_epilogue (asm_out_file, get_frame_size ());
1887
1888 /* And debug output. */
1889 if (!DECL_IGNORED_P (current_function_decl))
1890 debug_hooks->end_epilogue (last_linenum, last_filename);
1891
1892 if (!dwarf2_debug_info_emitted_p (current_function_decl)
1893 && dwarf2out_do_frame ())
1894 dwarf2out_end_epilogue (last_linenum, last_filename);
1895 }
1896 \f
1897
1898 /* Dumper helper for basic block information. FILE is the assembly
1899 output file, and INSN is the instruction being emitted. */
1900
1901 static void
1902 dump_basic_block_info (FILE *file, rtx insn, basic_block *start_to_bb,
1903 basic_block *end_to_bb, int bb_map_size, int *bb_seqn)
1904 {
1905 basic_block bb;
1906
1907 if (!flag_debug_asm)
1908 return;
1909
1910 if (INSN_UID (insn) < bb_map_size
1911 && (bb = start_to_bb[INSN_UID (insn)]) != NULL)
1912 {
1913 edge e;
1914 edge_iterator ei;
1915
1916 fprintf (file, "%s BLOCK %d", ASM_COMMENT_START, bb->index);
1917 if (bb->frequency)
1918 fprintf (file, " freq:%d", bb->frequency);
1919 if (bb->count)
1920 fprintf (file, " count:" HOST_WIDEST_INT_PRINT_DEC,
1921 bb->count);
1922 fprintf (file, " seq:%d", (*bb_seqn)++);
1923 fprintf (file, "\n%s PRED:", ASM_COMMENT_START);
1924 FOR_EACH_EDGE (e, ei, bb->preds)
1925 {
1926 dump_edge_info (file, e, TDF_DETAILS, 0);
1927 }
1928 fprintf (file, "\n");
1929 }
1930 if (INSN_UID (insn) < bb_map_size
1931 && (bb = end_to_bb[INSN_UID (insn)]) != NULL)
1932 {
1933 edge e;
1934 edge_iterator ei;
1935
1936 fprintf (asm_out_file, "%s SUCC:", ASM_COMMENT_START);
1937 FOR_EACH_EDGE (e, ei, bb->succs)
1938 {
1939 dump_edge_info (asm_out_file, e, TDF_DETAILS, 1);
1940 }
1941 fprintf (file, "\n");
1942 }
1943 }
1944
1945 /* Output assembler code for some insns: all or part of a function.
1946 For description of args, see `final_start_function', above. */
1947
1948 void
1949 final (rtx first, FILE *file, int optimize_p)
1950 {
1951 rtx insn, next;
1952 int seen = 0;
1953
1954 /* Used for -dA dump. */
1955 basic_block *start_to_bb = NULL;
1956 basic_block *end_to_bb = NULL;
1957 int bb_map_size = 0;
1958 int bb_seqn = 0;
1959
1960 last_ignored_compare = 0;
1961
1962 #ifdef HAVE_cc0
1963 for (insn = first; insn; insn = NEXT_INSN (insn))
1964 {
1965 /* If CC tracking across branches is enabled, record the insn which
1966 jumps to each branch only reached from one place. */
1967 if (optimize_p && JUMP_P (insn))
1968 {
1969 rtx lab = JUMP_LABEL (insn);
1970 if (lab && LABEL_P (lab) && LABEL_NUSES (lab) == 1)
1971 {
1972 LABEL_REFS (lab) = insn;
1973 }
1974 }
1975 }
1976 #endif
1977
1978 init_recog ();
1979
1980 CC_STATUS_INIT;
1981
1982 if (flag_debug_asm)
1983 {
1984 basic_block bb;
1985
1986 bb_map_size = get_max_uid () + 1;
1987 start_to_bb = XCNEWVEC (basic_block, bb_map_size);
1988 end_to_bb = XCNEWVEC (basic_block, bb_map_size);
1989
1990 /* There is no cfg for a thunk. */
1991 if (!cfun->is_thunk)
1992 FOR_EACH_BB_REVERSE (bb)
1993 {
1994 start_to_bb[INSN_UID (BB_HEAD (bb))] = bb;
1995 end_to_bb[INSN_UID (BB_END (bb))] = bb;
1996 }
1997 }
1998
1999 /* Output the insns. */
2000 for (insn = first; insn;)
2001 {
2002 if (HAVE_ATTR_length)
2003 {
2004 if ((unsigned) INSN_UID (insn) >= INSN_ADDRESSES_SIZE ())
2005 {
2006 /* This can be triggered by bugs elsewhere in the compiler if
2007 new insns are created after init_insn_lengths is called. */
2008 gcc_assert (NOTE_P (insn));
2009 insn_current_address = -1;
2010 }
2011 else
2012 insn_current_address = INSN_ADDRESSES (INSN_UID (insn));
2013 }
2014
2015 dump_basic_block_info (file, insn, start_to_bb, end_to_bb,
2016 bb_map_size, &bb_seqn);
2017 insn = final_scan_insn (insn, file, optimize_p, 0, &seen);
2018 }
2019
2020 if (flag_debug_asm)
2021 {
2022 free (start_to_bb);
2023 free (end_to_bb);
2024 }
2025
2026 /* Remove CFI notes, to avoid compare-debug failures. */
2027 for (insn = first; insn; insn = next)
2028 {
2029 next = NEXT_INSN (insn);
2030 if (NOTE_P (insn)
2031 && (NOTE_KIND (insn) == NOTE_INSN_CFI
2032 || NOTE_KIND (insn) == NOTE_INSN_CFI_LABEL))
2033 delete_insn (insn);
2034 }
2035 }
2036 \f
2037 const char *
2038 get_insn_template (int code, rtx insn)
2039 {
2040 switch (insn_data[code].output_format)
2041 {
2042 case INSN_OUTPUT_FORMAT_SINGLE:
2043 return insn_data[code].output.single;
2044 case INSN_OUTPUT_FORMAT_MULTI:
2045 return insn_data[code].output.multi[which_alternative];
2046 case INSN_OUTPUT_FORMAT_FUNCTION:
2047 gcc_assert (insn);
2048 return (*insn_data[code].output.function) (recog_data.operand, insn);
2049
2050 default:
2051 gcc_unreachable ();
2052 }
2053 }
2054
2055 /* Emit the appropriate declaration for an alternate-entry-point
2056 symbol represented by INSN, to FILE. INSN is a CODE_LABEL with
2057 LABEL_KIND != LABEL_NORMAL.
2058
2059 The case fall-through in this function is intentional. */
2060 static void
2061 output_alternate_entry_point (FILE *file, rtx insn)
2062 {
2063 const char *name = LABEL_NAME (insn);
2064
2065 switch (LABEL_KIND (insn))
2066 {
2067 case LABEL_WEAK_ENTRY:
2068 #ifdef ASM_WEAKEN_LABEL
2069 ASM_WEAKEN_LABEL (file, name);
2070 #endif
2071 case LABEL_GLOBAL_ENTRY:
2072 targetm.asm_out.globalize_label (file, name);
2073 case LABEL_STATIC_ENTRY:
2074 #ifdef ASM_OUTPUT_TYPE_DIRECTIVE
2075 ASM_OUTPUT_TYPE_DIRECTIVE (file, name, "function");
2076 #endif
2077 ASM_OUTPUT_LABEL (file, name);
2078 break;
2079
2080 case LABEL_NORMAL:
2081 default:
2082 gcc_unreachable ();
2083 }
2084 }
2085
2086 /* Given a CALL_INSN, find and return the nested CALL. */
2087 static rtx
2088 call_from_call_insn (rtx insn)
2089 {
2090 rtx x;
2091 gcc_assert (CALL_P (insn));
2092 x = PATTERN (insn);
2093
2094 while (GET_CODE (x) != CALL)
2095 {
2096 switch (GET_CODE (x))
2097 {
2098 default:
2099 gcc_unreachable ();
2100 case COND_EXEC:
2101 x = COND_EXEC_CODE (x);
2102 break;
2103 case PARALLEL:
2104 x = XVECEXP (x, 0, 0);
2105 break;
2106 case SET:
2107 x = XEXP (x, 1);
2108 break;
2109 }
2110 }
2111 return x;
2112 }
2113
2114 /* The final scan for one insn, INSN.
2115 Args are same as in `final', except that INSN
2116 is the insn being scanned.
2117 Value returned is the next insn to be scanned.
2118
2119 NOPEEPHOLES is the flag to disallow peephole processing (currently
2120 used for within delayed branch sequence output).
2121
2122 SEEN is used to track the end of the prologue, for emitting
2123 debug information. We force the emission of a line note after
2124 both NOTE_INSN_PROLOGUE_END and NOTE_INSN_FUNCTION_BEG, or
2125 at the beginning of the second basic block, whichever comes
2126 first. */
2127
2128 rtx
2129 final_scan_insn (rtx insn, FILE *file, int optimize_p ATTRIBUTE_UNUSED,
2130 int nopeepholes ATTRIBUTE_UNUSED, int *seen)
2131 {
2132 #ifdef HAVE_cc0
2133 rtx set;
2134 #endif
2135 rtx next;
2136
2137 insn_counter++;
2138
2139 /* Ignore deleted insns. These can occur when we split insns (due to a
2140 template of "#") while not optimizing. */
2141 if (INSN_DELETED_P (insn))
2142 return NEXT_INSN (insn);
2143
2144 switch (GET_CODE (insn))
2145 {
2146 case NOTE:
2147 switch (NOTE_KIND (insn))
2148 {
2149 case NOTE_INSN_DELETED:
2150 break;
2151
2152 case NOTE_INSN_SWITCH_TEXT_SECTIONS:
2153 in_cold_section_p = !in_cold_section_p;
2154
2155 if (dwarf2out_do_frame ())
2156 dwarf2out_switch_text_section ();
2157 else if (!DECL_IGNORED_P (current_function_decl))
2158 debug_hooks->switch_text_section ();
2159
2160 switch_to_section (current_function_section ());
2161 targetm.asm_out.function_switched_text_sections (asm_out_file,
2162 current_function_decl,
2163 in_cold_section_p);
2164 break;
2165
2166 case NOTE_INSN_BASIC_BLOCK:
2167 if (need_profile_function)
2168 {
2169 profile_function (asm_out_file);
2170 need_profile_function = false;
2171 }
2172
2173 if (targetm.asm_out.unwind_emit)
2174 targetm.asm_out.unwind_emit (asm_out_file, insn);
2175
2176 if ((*seen & (SEEN_EMITTED | SEEN_BB)) == SEEN_BB)
2177 {
2178 *seen |= SEEN_EMITTED;
2179 force_source_line = true;
2180 }
2181 else
2182 *seen |= SEEN_BB;
2183
2184 discriminator = NOTE_BASIC_BLOCK (insn)->discriminator;
2185
2186 break;
2187
2188 case NOTE_INSN_EH_REGION_BEG:
2189 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHB",
2190 NOTE_EH_HANDLER (insn));
2191 break;
2192
2193 case NOTE_INSN_EH_REGION_END:
2194 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHE",
2195 NOTE_EH_HANDLER (insn));
2196 break;
2197
2198 case NOTE_INSN_PROLOGUE_END:
2199 targetm.asm_out.function_end_prologue (file);
2200 profile_after_prologue (file);
2201
2202 if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE)
2203 {
2204 *seen |= SEEN_EMITTED;
2205 force_source_line = true;
2206 }
2207 else
2208 *seen |= SEEN_NOTE;
2209
2210 break;
2211
2212 case NOTE_INSN_EPILOGUE_BEG:
2213 if (!DECL_IGNORED_P (current_function_decl))
2214 (*debug_hooks->begin_epilogue) (last_linenum, last_filename);
2215 targetm.asm_out.function_begin_epilogue (file);
2216 break;
2217
2218 case NOTE_INSN_CFI:
2219 dwarf2out_emit_cfi (NOTE_CFI (insn));
2220 break;
2221
2222 case NOTE_INSN_CFI_LABEL:
2223 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LCFI",
2224 NOTE_LABEL_NUMBER (insn));
2225 break;
2226
2227 case NOTE_INSN_FUNCTION_BEG:
2228 if (need_profile_function)
2229 {
2230 profile_function (asm_out_file);
2231 need_profile_function = false;
2232 }
2233
2234 app_disable ();
2235 if (!DECL_IGNORED_P (current_function_decl))
2236 debug_hooks->end_prologue (last_linenum, last_filename);
2237
2238 if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE)
2239 {
2240 *seen |= SEEN_EMITTED;
2241 force_source_line = true;
2242 }
2243 else
2244 *seen |= SEEN_NOTE;
2245
2246 break;
2247
2248 case NOTE_INSN_BLOCK_BEG:
2249 if (debug_info_level == DINFO_LEVEL_NORMAL
2250 || debug_info_level == DINFO_LEVEL_VERBOSE
2251 || write_symbols == DWARF2_DEBUG
2252 || write_symbols == VMS_AND_DWARF2_DEBUG
2253 || write_symbols == VMS_DEBUG)
2254 {
2255 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
2256
2257 app_disable ();
2258 ++block_depth;
2259 high_block_linenum = last_linenum;
2260
2261 /* Output debugging info about the symbol-block beginning. */
2262 if (!DECL_IGNORED_P (current_function_decl))
2263 debug_hooks->begin_block (last_linenum, n);
2264
2265 /* Mark this block as output. */
2266 TREE_ASM_WRITTEN (NOTE_BLOCK (insn)) = 1;
2267 }
2268 if (write_symbols == DBX_DEBUG
2269 || write_symbols == SDB_DEBUG)
2270 {
2271 location_t *locus_ptr
2272 = block_nonartificial_location (NOTE_BLOCK (insn));
2273
2274 if (locus_ptr != NULL)
2275 {
2276 override_filename = LOCATION_FILE (*locus_ptr);
2277 override_linenum = LOCATION_LINE (*locus_ptr);
2278 }
2279 }
2280 break;
2281
2282 case NOTE_INSN_BLOCK_END:
2283 if (debug_info_level == DINFO_LEVEL_NORMAL
2284 || debug_info_level == DINFO_LEVEL_VERBOSE
2285 || write_symbols == DWARF2_DEBUG
2286 || write_symbols == VMS_AND_DWARF2_DEBUG
2287 || write_symbols == VMS_DEBUG)
2288 {
2289 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
2290
2291 app_disable ();
2292
2293 /* End of a symbol-block. */
2294 --block_depth;
2295 gcc_assert (block_depth >= 0);
2296
2297 if (!DECL_IGNORED_P (current_function_decl))
2298 debug_hooks->end_block (high_block_linenum, n);
2299 }
2300 if (write_symbols == DBX_DEBUG
2301 || write_symbols == SDB_DEBUG)
2302 {
2303 tree outer_block = BLOCK_SUPERCONTEXT (NOTE_BLOCK (insn));
2304 location_t *locus_ptr
2305 = block_nonartificial_location (outer_block);
2306
2307 if (locus_ptr != NULL)
2308 {
2309 override_filename = LOCATION_FILE (*locus_ptr);
2310 override_linenum = LOCATION_LINE (*locus_ptr);
2311 }
2312 else
2313 {
2314 override_filename = NULL;
2315 override_linenum = 0;
2316 }
2317 }
2318 break;
2319
2320 case NOTE_INSN_DELETED_LABEL:
2321 /* Emit the label. We may have deleted the CODE_LABEL because
2322 the label could be proved to be unreachable, though still
2323 referenced (in the form of having its address taken. */
2324 ASM_OUTPUT_DEBUG_LABEL (file, "L", CODE_LABEL_NUMBER (insn));
2325 break;
2326
2327 case NOTE_INSN_DELETED_DEBUG_LABEL:
2328 /* Similarly, but need to use different namespace for it. */
2329 if (CODE_LABEL_NUMBER (insn) != -1)
2330 ASM_OUTPUT_DEBUG_LABEL (file, "LDL", CODE_LABEL_NUMBER (insn));
2331 break;
2332
2333 case NOTE_INSN_VAR_LOCATION:
2334 case NOTE_INSN_CALL_ARG_LOCATION:
2335 if (!DECL_IGNORED_P (current_function_decl))
2336 debug_hooks->var_location (insn);
2337 break;
2338
2339 default:
2340 gcc_unreachable ();
2341 break;
2342 }
2343 break;
2344
2345 case BARRIER:
2346 break;
2347
2348 case CODE_LABEL:
2349 /* The target port might emit labels in the output function for
2350 some insn, e.g. sh.c output_branchy_insn. */
2351 if (CODE_LABEL_NUMBER (insn) <= max_labelno)
2352 {
2353 int align = LABEL_TO_ALIGNMENT (insn);
2354 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2355 int max_skip = LABEL_TO_MAX_SKIP (insn);
2356 #endif
2357
2358 if (align && NEXT_INSN (insn))
2359 {
2360 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2361 ASM_OUTPUT_MAX_SKIP_ALIGN (file, align, max_skip);
2362 #else
2363 #ifdef ASM_OUTPUT_ALIGN_WITH_NOP
2364 ASM_OUTPUT_ALIGN_WITH_NOP (file, align);
2365 #else
2366 ASM_OUTPUT_ALIGN (file, align);
2367 #endif
2368 #endif
2369 }
2370 }
2371 CC_STATUS_INIT;
2372
2373 if (!DECL_IGNORED_P (current_function_decl) && LABEL_NAME (insn))
2374 debug_hooks->label (insn);
2375
2376 app_disable ();
2377
2378 next = next_nonnote_insn (insn);
2379 /* If this label is followed by a jump-table, make sure we put
2380 the label in the read-only section. Also possibly write the
2381 label and jump table together. */
2382 if (next != 0 && JUMP_TABLE_DATA_P (next))
2383 {
2384 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2385 /* In this case, the case vector is being moved by the
2386 target, so don't output the label at all. Leave that
2387 to the back end macros. */
2388 #else
2389 if (! JUMP_TABLES_IN_TEXT_SECTION)
2390 {
2391 int log_align;
2392
2393 switch_to_section (targetm.asm_out.function_rodata_section
2394 (current_function_decl));
2395
2396 #ifdef ADDR_VEC_ALIGN
2397 log_align = ADDR_VEC_ALIGN (next);
2398 #else
2399 log_align = exact_log2 (BIGGEST_ALIGNMENT / BITS_PER_UNIT);
2400 #endif
2401 ASM_OUTPUT_ALIGN (file, log_align);
2402 }
2403 else
2404 switch_to_section (current_function_section ());
2405
2406 #ifdef ASM_OUTPUT_CASE_LABEL
2407 ASM_OUTPUT_CASE_LABEL (file, "L", CODE_LABEL_NUMBER (insn),
2408 next);
2409 #else
2410 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn));
2411 #endif
2412 #endif
2413 break;
2414 }
2415 if (LABEL_ALT_ENTRY_P (insn))
2416 output_alternate_entry_point (file, insn);
2417 else
2418 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn));
2419 break;
2420
2421 default:
2422 {
2423 rtx body = PATTERN (insn);
2424 int insn_code_number;
2425 const char *templ;
2426 bool is_stmt;
2427
2428 /* Reset this early so it is correct for ASM statements. */
2429 current_insn_predicate = NULL_RTX;
2430
2431 /* An INSN, JUMP_INSN or CALL_INSN.
2432 First check for special kinds that recog doesn't recognize. */
2433
2434 if (GET_CODE (body) == USE /* These are just declarations. */
2435 || GET_CODE (body) == CLOBBER)
2436 break;
2437
2438 #ifdef HAVE_cc0
2439 {
2440 /* If there is a REG_CC_SETTER note on this insn, it means that
2441 the setting of the condition code was done in the delay slot
2442 of the insn that branched here. So recover the cc status
2443 from the insn that set it. */
2444
2445 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2446 if (note)
2447 {
2448 NOTICE_UPDATE_CC (PATTERN (XEXP (note, 0)), XEXP (note, 0));
2449 cc_prev_status = cc_status;
2450 }
2451 }
2452 #endif
2453
2454 /* Detect insns that are really jump-tables
2455 and output them as such. */
2456
2457 if (JUMP_TABLE_DATA_P (insn))
2458 {
2459 #if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC))
2460 int vlen, idx;
2461 #endif
2462
2463 if (! JUMP_TABLES_IN_TEXT_SECTION)
2464 switch_to_section (targetm.asm_out.function_rodata_section
2465 (current_function_decl));
2466 else
2467 switch_to_section (current_function_section ());
2468
2469 app_disable ();
2470
2471 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2472 if (GET_CODE (body) == ADDR_VEC)
2473 {
2474 #ifdef ASM_OUTPUT_ADDR_VEC
2475 ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn), body);
2476 #else
2477 gcc_unreachable ();
2478 #endif
2479 }
2480 else
2481 {
2482 #ifdef ASM_OUTPUT_ADDR_DIFF_VEC
2483 ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn), body);
2484 #else
2485 gcc_unreachable ();
2486 #endif
2487 }
2488 #else
2489 vlen = XVECLEN (body, GET_CODE (body) == ADDR_DIFF_VEC);
2490 for (idx = 0; idx < vlen; idx++)
2491 {
2492 if (GET_CODE (body) == ADDR_VEC)
2493 {
2494 #ifdef ASM_OUTPUT_ADDR_VEC_ELT
2495 ASM_OUTPUT_ADDR_VEC_ELT
2496 (file, CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 0, idx), 0)));
2497 #else
2498 gcc_unreachable ();
2499 #endif
2500 }
2501 else
2502 {
2503 #ifdef ASM_OUTPUT_ADDR_DIFF_ELT
2504 ASM_OUTPUT_ADDR_DIFF_ELT
2505 (file,
2506 body,
2507 CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 1, idx), 0)),
2508 CODE_LABEL_NUMBER (XEXP (XEXP (body, 0), 0)));
2509 #else
2510 gcc_unreachable ();
2511 #endif
2512 }
2513 }
2514 #ifdef ASM_OUTPUT_CASE_END
2515 ASM_OUTPUT_CASE_END (file,
2516 CODE_LABEL_NUMBER (PREV_INSN (insn)),
2517 insn);
2518 #endif
2519 #endif
2520
2521 switch_to_section (current_function_section ());
2522
2523 break;
2524 }
2525 /* Output this line note if it is the first or the last line
2526 note in a row. */
2527 if (!DECL_IGNORED_P (current_function_decl)
2528 && notice_source_line (insn, &is_stmt))
2529 (*debug_hooks->source_line) (last_linenum, last_filename,
2530 last_discriminator, is_stmt);
2531
2532 if (GET_CODE (body) == ASM_INPUT)
2533 {
2534 const char *string = XSTR (body, 0);
2535
2536 /* There's no telling what that did to the condition codes. */
2537 CC_STATUS_INIT;
2538
2539 if (string[0])
2540 {
2541 expanded_location loc;
2542
2543 app_enable ();
2544 loc = expand_location (ASM_INPUT_SOURCE_LOCATION (body));
2545 if (*loc.file && loc.line)
2546 fprintf (asm_out_file, "%s %i \"%s\" 1\n",
2547 ASM_COMMENT_START, loc.line, loc.file);
2548 fprintf (asm_out_file, "\t%s\n", string);
2549 #if HAVE_AS_LINE_ZERO
2550 if (*loc.file && loc.line)
2551 fprintf (asm_out_file, "%s 0 \"\" 2\n", ASM_COMMENT_START);
2552 #endif
2553 }
2554 break;
2555 }
2556
2557 /* Detect `asm' construct with operands. */
2558 if (asm_noperands (body) >= 0)
2559 {
2560 unsigned int noperands = asm_noperands (body);
2561 rtx *ops = XALLOCAVEC (rtx, noperands);
2562 const char *string;
2563 location_t loc;
2564 expanded_location expanded;
2565
2566 /* There's no telling what that did to the condition codes. */
2567 CC_STATUS_INIT;
2568
2569 /* Get out the operand values. */
2570 string = decode_asm_operands (body, ops, NULL, NULL, NULL, &loc);
2571 /* Inhibit dying on what would otherwise be compiler bugs. */
2572 insn_noperands = noperands;
2573 this_is_asm_operands = insn;
2574 expanded = expand_location (loc);
2575
2576 #ifdef FINAL_PRESCAN_INSN
2577 FINAL_PRESCAN_INSN (insn, ops, insn_noperands);
2578 #endif
2579
2580 /* Output the insn using them. */
2581 if (string[0])
2582 {
2583 app_enable ();
2584 if (expanded.file && expanded.line)
2585 fprintf (asm_out_file, "%s %i \"%s\" 1\n",
2586 ASM_COMMENT_START, expanded.line, expanded.file);
2587 output_asm_insn (string, ops);
2588 #if HAVE_AS_LINE_ZERO
2589 if (expanded.file && expanded.line)
2590 fprintf (asm_out_file, "%s 0 \"\" 2\n", ASM_COMMENT_START);
2591 #endif
2592 }
2593
2594 if (targetm.asm_out.final_postscan_insn)
2595 targetm.asm_out.final_postscan_insn (file, insn, ops,
2596 insn_noperands);
2597
2598 this_is_asm_operands = 0;
2599 break;
2600 }
2601
2602 app_disable ();
2603
2604 if (GET_CODE (body) == SEQUENCE)
2605 {
2606 /* A delayed-branch sequence */
2607 int i;
2608
2609 final_sequence = body;
2610
2611 /* The first insn in this SEQUENCE might be a JUMP_INSN that will
2612 force the restoration of a comparison that was previously
2613 thought unnecessary. If that happens, cancel this sequence
2614 and cause that insn to be restored. */
2615
2616 next = final_scan_insn (XVECEXP (body, 0, 0), file, 0, 1, seen);
2617 if (next != XVECEXP (body, 0, 1))
2618 {
2619 final_sequence = 0;
2620 return next;
2621 }
2622
2623 for (i = 1; i < XVECLEN (body, 0); i++)
2624 {
2625 rtx insn = XVECEXP (body, 0, i);
2626 rtx next = NEXT_INSN (insn);
2627 /* We loop in case any instruction in a delay slot gets
2628 split. */
2629 do
2630 insn = final_scan_insn (insn, file, 0, 1, seen);
2631 while (insn != next);
2632 }
2633 #ifdef DBR_OUTPUT_SEQEND
2634 DBR_OUTPUT_SEQEND (file);
2635 #endif
2636 final_sequence = 0;
2637
2638 /* If the insn requiring the delay slot was a CALL_INSN, the
2639 insns in the delay slot are actually executed before the
2640 called function. Hence we don't preserve any CC-setting
2641 actions in these insns and the CC must be marked as being
2642 clobbered by the function. */
2643 if (CALL_P (XVECEXP (body, 0, 0)))
2644 {
2645 CC_STATUS_INIT;
2646 }
2647 break;
2648 }
2649
2650 /* We have a real machine instruction as rtl. */
2651
2652 body = PATTERN (insn);
2653
2654 #ifdef HAVE_cc0
2655 set = single_set (insn);
2656
2657 /* Check for redundant test and compare instructions
2658 (when the condition codes are already set up as desired).
2659 This is done only when optimizing; if not optimizing,
2660 it should be possible for the user to alter a variable
2661 with the debugger in between statements
2662 and the next statement should reexamine the variable
2663 to compute the condition codes. */
2664
2665 if (optimize_p)
2666 {
2667 if (set
2668 && GET_CODE (SET_DEST (set)) == CC0
2669 && insn != last_ignored_compare)
2670 {
2671 rtx src1, src2;
2672 if (GET_CODE (SET_SRC (set)) == SUBREG)
2673 SET_SRC (set) = alter_subreg (&SET_SRC (set), true);
2674
2675 src1 = SET_SRC (set);
2676 src2 = NULL_RTX;
2677 if (GET_CODE (SET_SRC (set)) == COMPARE)
2678 {
2679 if (GET_CODE (XEXP (SET_SRC (set), 0)) == SUBREG)
2680 XEXP (SET_SRC (set), 0)
2681 = alter_subreg (&XEXP (SET_SRC (set), 0), true);
2682 if (GET_CODE (XEXP (SET_SRC (set), 1)) == SUBREG)
2683 XEXP (SET_SRC (set), 1)
2684 = alter_subreg (&XEXP (SET_SRC (set), 1), true);
2685 if (XEXP (SET_SRC (set), 1)
2686 == CONST0_RTX (GET_MODE (XEXP (SET_SRC (set), 0))))
2687 src2 = XEXP (SET_SRC (set), 0);
2688 }
2689 if ((cc_status.value1 != 0
2690 && rtx_equal_p (src1, cc_status.value1))
2691 || (cc_status.value2 != 0
2692 && rtx_equal_p (src1, cc_status.value2))
2693 || (src2 != 0 && cc_status.value1 != 0
2694 && rtx_equal_p (src2, cc_status.value1))
2695 || (src2 != 0 && cc_status.value2 != 0
2696 && rtx_equal_p (src2, cc_status.value2)))
2697 {
2698 /* Don't delete insn if it has an addressing side-effect. */
2699 if (! FIND_REG_INC_NOTE (insn, NULL_RTX)
2700 /* or if anything in it is volatile. */
2701 && ! volatile_refs_p (PATTERN (insn)))
2702 {
2703 /* We don't really delete the insn; just ignore it. */
2704 last_ignored_compare = insn;
2705 break;
2706 }
2707 }
2708 }
2709 }
2710
2711 /* If this is a conditional branch, maybe modify it
2712 if the cc's are in a nonstandard state
2713 so that it accomplishes the same thing that it would
2714 do straightforwardly if the cc's were set up normally. */
2715
2716 if (cc_status.flags != 0
2717 && JUMP_P (insn)
2718 && GET_CODE (body) == SET
2719 && SET_DEST (body) == pc_rtx
2720 && GET_CODE (SET_SRC (body)) == IF_THEN_ELSE
2721 && COMPARISON_P (XEXP (SET_SRC (body), 0))
2722 && XEXP (XEXP (SET_SRC (body), 0), 0) == cc0_rtx)
2723 {
2724 /* This function may alter the contents of its argument
2725 and clear some of the cc_status.flags bits.
2726 It may also return 1 meaning condition now always true
2727 or -1 meaning condition now always false
2728 or 2 meaning condition nontrivial but altered. */
2729 int result = alter_cond (XEXP (SET_SRC (body), 0));
2730 /* If condition now has fixed value, replace the IF_THEN_ELSE
2731 with its then-operand or its else-operand. */
2732 if (result == 1)
2733 SET_SRC (body) = XEXP (SET_SRC (body), 1);
2734 if (result == -1)
2735 SET_SRC (body) = XEXP (SET_SRC (body), 2);
2736
2737 /* The jump is now either unconditional or a no-op.
2738 If it has become a no-op, don't try to output it.
2739 (It would not be recognized.) */
2740 if (SET_SRC (body) == pc_rtx)
2741 {
2742 delete_insn (insn);
2743 break;
2744 }
2745 else if (ANY_RETURN_P (SET_SRC (body)))
2746 /* Replace (set (pc) (return)) with (return). */
2747 PATTERN (insn) = body = SET_SRC (body);
2748
2749 /* Rerecognize the instruction if it has changed. */
2750 if (result != 0)
2751 INSN_CODE (insn) = -1;
2752 }
2753
2754 /* If this is a conditional trap, maybe modify it if the cc's
2755 are in a nonstandard state so that it accomplishes the same
2756 thing that it would do straightforwardly if the cc's were
2757 set up normally. */
2758 if (cc_status.flags != 0
2759 && NONJUMP_INSN_P (insn)
2760 && GET_CODE (body) == TRAP_IF
2761 && COMPARISON_P (TRAP_CONDITION (body))
2762 && XEXP (TRAP_CONDITION (body), 0) == cc0_rtx)
2763 {
2764 /* This function may alter the contents of its argument
2765 and clear some of the cc_status.flags bits.
2766 It may also return 1 meaning condition now always true
2767 or -1 meaning condition now always false
2768 or 2 meaning condition nontrivial but altered. */
2769 int result = alter_cond (TRAP_CONDITION (body));
2770
2771 /* If TRAP_CONDITION has become always false, delete the
2772 instruction. */
2773 if (result == -1)
2774 {
2775 delete_insn (insn);
2776 break;
2777 }
2778
2779 /* If TRAP_CONDITION has become always true, replace
2780 TRAP_CONDITION with const_true_rtx. */
2781 if (result == 1)
2782 TRAP_CONDITION (body) = const_true_rtx;
2783
2784 /* Rerecognize the instruction if it has changed. */
2785 if (result != 0)
2786 INSN_CODE (insn) = -1;
2787 }
2788
2789 /* Make same adjustments to instructions that examine the
2790 condition codes without jumping and instructions that
2791 handle conditional moves (if this machine has either one). */
2792
2793 if (cc_status.flags != 0
2794 && set != 0)
2795 {
2796 rtx cond_rtx, then_rtx, else_rtx;
2797
2798 if (!JUMP_P (insn)
2799 && GET_CODE (SET_SRC (set)) == IF_THEN_ELSE)
2800 {
2801 cond_rtx = XEXP (SET_SRC (set), 0);
2802 then_rtx = XEXP (SET_SRC (set), 1);
2803 else_rtx = XEXP (SET_SRC (set), 2);
2804 }
2805 else
2806 {
2807 cond_rtx = SET_SRC (set);
2808 then_rtx = const_true_rtx;
2809 else_rtx = const0_rtx;
2810 }
2811
2812 if (COMPARISON_P (cond_rtx)
2813 && XEXP (cond_rtx, 0) == cc0_rtx)
2814 {
2815 int result;
2816 result = alter_cond (cond_rtx);
2817 if (result == 1)
2818 validate_change (insn, &SET_SRC (set), then_rtx, 0);
2819 else if (result == -1)
2820 validate_change (insn, &SET_SRC (set), else_rtx, 0);
2821 else if (result == 2)
2822 INSN_CODE (insn) = -1;
2823 if (SET_DEST (set) == SET_SRC (set))
2824 delete_insn (insn);
2825 }
2826 }
2827
2828 #endif
2829
2830 #ifdef HAVE_peephole
2831 /* Do machine-specific peephole optimizations if desired. */
2832
2833 if (optimize_p && !flag_no_peephole && !nopeepholes)
2834 {
2835 rtx next = peephole (insn);
2836 /* When peepholing, if there were notes within the peephole,
2837 emit them before the peephole. */
2838 if (next != 0 && next != NEXT_INSN (insn))
2839 {
2840 rtx note, prev = PREV_INSN (insn);
2841
2842 for (note = NEXT_INSN (insn); note != next;
2843 note = NEXT_INSN (note))
2844 final_scan_insn (note, file, optimize_p, nopeepholes, seen);
2845
2846 /* Put the notes in the proper position for a later
2847 rescan. For example, the SH target can do this
2848 when generating a far jump in a delayed branch
2849 sequence. */
2850 note = NEXT_INSN (insn);
2851 PREV_INSN (note) = prev;
2852 NEXT_INSN (prev) = note;
2853 NEXT_INSN (PREV_INSN (next)) = insn;
2854 PREV_INSN (insn) = PREV_INSN (next);
2855 NEXT_INSN (insn) = next;
2856 PREV_INSN (next) = insn;
2857 }
2858
2859 /* PEEPHOLE might have changed this. */
2860 body = PATTERN (insn);
2861 }
2862 #endif
2863
2864 /* Try to recognize the instruction.
2865 If successful, verify that the operands satisfy the
2866 constraints for the instruction. Crash if they don't,
2867 since `reload' should have changed them so that they do. */
2868
2869 insn_code_number = recog_memoized (insn);
2870 cleanup_subreg_operands (insn);
2871
2872 /* Dump the insn in the assembly for debugging (-dAP).
2873 If the final dump is requested as slim RTL, dump slim
2874 RTL to the assembly file also. */
2875 if (flag_dump_rtl_in_asm)
2876 {
2877 print_rtx_head = ASM_COMMENT_START;
2878 if (! (dump_flags & TDF_SLIM))
2879 print_rtl_single (asm_out_file, insn);
2880 else
2881 dump_insn_slim (asm_out_file, insn);
2882 print_rtx_head = "";
2883 }
2884
2885 if (! constrain_operands_cached (1))
2886 fatal_insn_not_found (insn);
2887
2888 /* Some target machines need to prescan each insn before
2889 it is output. */
2890
2891 #ifdef FINAL_PRESCAN_INSN
2892 FINAL_PRESCAN_INSN (insn, recog_data.operand, recog_data.n_operands);
2893 #endif
2894
2895 if (targetm.have_conditional_execution ()
2896 && GET_CODE (PATTERN (insn)) == COND_EXEC)
2897 current_insn_predicate = COND_EXEC_TEST (PATTERN (insn));
2898
2899 #ifdef HAVE_cc0
2900 cc_prev_status = cc_status;
2901
2902 /* Update `cc_status' for this instruction.
2903 The instruction's output routine may change it further.
2904 If the output routine for a jump insn needs to depend
2905 on the cc status, it should look at cc_prev_status. */
2906
2907 NOTICE_UPDATE_CC (body, insn);
2908 #endif
2909
2910 current_output_insn = debug_insn = insn;
2911
2912 /* Find the proper template for this insn. */
2913 templ = get_insn_template (insn_code_number, insn);
2914
2915 /* If the C code returns 0, it means that it is a jump insn
2916 which follows a deleted test insn, and that test insn
2917 needs to be reinserted. */
2918 if (templ == 0)
2919 {
2920 rtx prev;
2921
2922 gcc_assert (prev_nonnote_insn (insn) == last_ignored_compare);
2923
2924 /* We have already processed the notes between the setter and
2925 the user. Make sure we don't process them again, this is
2926 particularly important if one of the notes is a block
2927 scope note or an EH note. */
2928 for (prev = insn;
2929 prev != last_ignored_compare;
2930 prev = PREV_INSN (prev))
2931 {
2932 if (NOTE_P (prev))
2933 delete_insn (prev); /* Use delete_note. */
2934 }
2935
2936 return prev;
2937 }
2938
2939 /* If the template is the string "#", it means that this insn must
2940 be split. */
2941 if (templ[0] == '#' && templ[1] == '\0')
2942 {
2943 rtx new_rtx = try_split (body, insn, 0);
2944
2945 /* If we didn't split the insn, go away. */
2946 if (new_rtx == insn && PATTERN (new_rtx) == body)
2947 fatal_insn ("could not split insn", insn);
2948
2949 /* If we have a length attribute, this instruction should have
2950 been split in shorten_branches, to ensure that we would have
2951 valid length info for the splitees. */
2952 gcc_assert (!HAVE_ATTR_length);
2953
2954 return new_rtx;
2955 }
2956
2957 /* ??? This will put the directives in the wrong place if
2958 get_insn_template outputs assembly directly. However calling it
2959 before get_insn_template breaks if the insns is split. */
2960 if (targetm.asm_out.unwind_emit_before_insn
2961 && targetm.asm_out.unwind_emit)
2962 targetm.asm_out.unwind_emit (asm_out_file, insn);
2963
2964 if (CALL_P (insn))
2965 {
2966 rtx x = call_from_call_insn (insn);
2967 x = XEXP (x, 0);
2968 if (x && MEM_P (x) && GET_CODE (XEXP (x, 0)) == SYMBOL_REF)
2969 {
2970 tree t;
2971 x = XEXP (x, 0);
2972 t = SYMBOL_REF_DECL (x);
2973 if (t)
2974 assemble_external (t);
2975 }
2976 if (!DECL_IGNORED_P (current_function_decl))
2977 debug_hooks->var_location (insn);
2978 }
2979
2980 /* Output assembler code from the template. */
2981 output_asm_insn (templ, recog_data.operand);
2982
2983 /* Some target machines need to postscan each insn after
2984 it is output. */
2985 if (targetm.asm_out.final_postscan_insn)
2986 targetm.asm_out.final_postscan_insn (file, insn, recog_data.operand,
2987 recog_data.n_operands);
2988
2989 if (!targetm.asm_out.unwind_emit_before_insn
2990 && targetm.asm_out.unwind_emit)
2991 targetm.asm_out.unwind_emit (asm_out_file, insn);
2992
2993 current_output_insn = debug_insn = 0;
2994 }
2995 }
2996 return NEXT_INSN (insn);
2997 }
2998 \f
2999 /* Return whether a source line note needs to be emitted before INSN.
3000 Sets IS_STMT to TRUE if the line should be marked as a possible
3001 breakpoint location. */
3002
3003 static bool
3004 notice_source_line (rtx insn, bool *is_stmt)
3005 {
3006 const char *filename;
3007 int linenum;
3008
3009 if (override_filename)
3010 {
3011 filename = override_filename;
3012 linenum = override_linenum;
3013 }
3014 else
3015 {
3016 filename = insn_file (insn);
3017 linenum = insn_line (insn);
3018 }
3019
3020 if (filename == NULL)
3021 return false;
3022
3023 if (force_source_line
3024 || filename != last_filename
3025 || last_linenum != linenum)
3026 {
3027 force_source_line = false;
3028 last_filename = filename;
3029 last_linenum = linenum;
3030 last_discriminator = discriminator;
3031 *is_stmt = true;
3032 high_block_linenum = MAX (last_linenum, high_block_linenum);
3033 high_function_linenum = MAX (last_linenum, high_function_linenum);
3034 return true;
3035 }
3036
3037 if (SUPPORTS_DISCRIMINATOR && last_discriminator != discriminator)
3038 {
3039 /* If the discriminator changed, but the line number did not,
3040 output the line table entry with is_stmt false so the
3041 debugger does not treat this as a breakpoint location. */
3042 last_discriminator = discriminator;
3043 *is_stmt = false;
3044 return true;
3045 }
3046
3047 return false;
3048 }
3049 \f
3050 /* For each operand in INSN, simplify (subreg (reg)) so that it refers
3051 directly to the desired hard register. */
3052
3053 void
3054 cleanup_subreg_operands (rtx insn)
3055 {
3056 int i;
3057 bool changed = false;
3058 extract_insn_cached (insn);
3059 for (i = 0; i < recog_data.n_operands; i++)
3060 {
3061 /* The following test cannot use recog_data.operand when testing
3062 for a SUBREG: the underlying object might have been changed
3063 already if we are inside a match_operator expression that
3064 matches the else clause. Instead we test the underlying
3065 expression directly. */
3066 if (GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
3067 {
3068 recog_data.operand[i] = alter_subreg (recog_data.operand_loc[i], true);
3069 changed = true;
3070 }
3071 else if (GET_CODE (recog_data.operand[i]) == PLUS
3072 || GET_CODE (recog_data.operand[i]) == MULT
3073 || MEM_P (recog_data.operand[i]))
3074 recog_data.operand[i] = walk_alter_subreg (recog_data.operand_loc[i], &changed);
3075 }
3076
3077 for (i = 0; i < recog_data.n_dups; i++)
3078 {
3079 if (GET_CODE (*recog_data.dup_loc[i]) == SUBREG)
3080 {
3081 *recog_data.dup_loc[i] = alter_subreg (recog_data.dup_loc[i], true);
3082 changed = true;
3083 }
3084 else if (GET_CODE (*recog_data.dup_loc[i]) == PLUS
3085 || GET_CODE (*recog_data.dup_loc[i]) == MULT
3086 || MEM_P (*recog_data.dup_loc[i]))
3087 *recog_data.dup_loc[i] = walk_alter_subreg (recog_data.dup_loc[i], &changed);
3088 }
3089 if (changed)
3090 df_insn_rescan (insn);
3091 }
3092
3093 /* If X is a SUBREG, try to replace it with a REG or a MEM, based on
3094 the thing it is a subreg of. Do it anyway if FINAL_P. */
3095
3096 rtx
3097 alter_subreg (rtx *xp, bool final_p)
3098 {
3099 rtx x = *xp;
3100 rtx y = SUBREG_REG (x);
3101
3102 /* simplify_subreg does not remove subreg from volatile references.
3103 We are required to. */
3104 if (MEM_P (y))
3105 {
3106 int offset = SUBREG_BYTE (x);
3107
3108 /* For paradoxical subregs on big-endian machines, SUBREG_BYTE
3109 contains 0 instead of the proper offset. See simplify_subreg. */
3110 if (offset == 0
3111 && GET_MODE_SIZE (GET_MODE (y)) < GET_MODE_SIZE (GET_MODE (x)))
3112 {
3113 int difference = GET_MODE_SIZE (GET_MODE (y))
3114 - GET_MODE_SIZE (GET_MODE (x));
3115 if (WORDS_BIG_ENDIAN)
3116 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
3117 if (BYTES_BIG_ENDIAN)
3118 offset += difference % UNITS_PER_WORD;
3119 }
3120
3121 if (final_p)
3122 *xp = adjust_address (y, GET_MODE (x), offset);
3123 else
3124 *xp = adjust_address_nv (y, GET_MODE (x), offset);
3125 }
3126 else
3127 {
3128 rtx new_rtx = simplify_subreg (GET_MODE (x), y, GET_MODE (y),
3129 SUBREG_BYTE (x));
3130
3131 if (new_rtx != 0)
3132 *xp = new_rtx;
3133 else if (final_p && REG_P (y))
3134 {
3135 /* Simplify_subreg can't handle some REG cases, but we have to. */
3136 unsigned int regno;
3137 HOST_WIDE_INT offset;
3138
3139 regno = subreg_regno (x);
3140 if (subreg_lowpart_p (x))
3141 offset = byte_lowpart_offset (GET_MODE (x), GET_MODE (y));
3142 else
3143 offset = SUBREG_BYTE (x);
3144 *xp = gen_rtx_REG_offset (y, GET_MODE (x), regno, offset);
3145 }
3146 }
3147
3148 return *xp;
3149 }
3150
3151 /* Do alter_subreg on all the SUBREGs contained in X. */
3152
3153 static rtx
3154 walk_alter_subreg (rtx *xp, bool *changed)
3155 {
3156 rtx x = *xp;
3157 switch (GET_CODE (x))
3158 {
3159 case PLUS:
3160 case MULT:
3161 case AND:
3162 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed);
3163 XEXP (x, 1) = walk_alter_subreg (&XEXP (x, 1), changed);
3164 break;
3165
3166 case MEM:
3167 case ZERO_EXTEND:
3168 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed);
3169 break;
3170
3171 case SUBREG:
3172 *changed = true;
3173 return alter_subreg (xp, true);
3174
3175 default:
3176 break;
3177 }
3178
3179 return *xp;
3180 }
3181 \f
3182 #ifdef HAVE_cc0
3183
3184 /* Given BODY, the body of a jump instruction, alter the jump condition
3185 as required by the bits that are set in cc_status.flags.
3186 Not all of the bits there can be handled at this level in all cases.
3187
3188 The value is normally 0.
3189 1 means that the condition has become always true.
3190 -1 means that the condition has become always false.
3191 2 means that COND has been altered. */
3192
3193 static int
3194 alter_cond (rtx cond)
3195 {
3196 int value = 0;
3197
3198 if (cc_status.flags & CC_REVERSED)
3199 {
3200 value = 2;
3201 PUT_CODE (cond, swap_condition (GET_CODE (cond)));
3202 }
3203
3204 if (cc_status.flags & CC_INVERTED)
3205 {
3206 value = 2;
3207 PUT_CODE (cond, reverse_condition (GET_CODE (cond)));
3208 }
3209
3210 if (cc_status.flags & CC_NOT_POSITIVE)
3211 switch (GET_CODE (cond))
3212 {
3213 case LE:
3214 case LEU:
3215 case GEU:
3216 /* Jump becomes unconditional. */
3217 return 1;
3218
3219 case GT:
3220 case GTU:
3221 case LTU:
3222 /* Jump becomes no-op. */
3223 return -1;
3224
3225 case GE:
3226 PUT_CODE (cond, EQ);
3227 value = 2;
3228 break;
3229
3230 case LT:
3231 PUT_CODE (cond, NE);
3232 value = 2;
3233 break;
3234
3235 default:
3236 break;
3237 }
3238
3239 if (cc_status.flags & CC_NOT_NEGATIVE)
3240 switch (GET_CODE (cond))
3241 {
3242 case GE:
3243 case GEU:
3244 /* Jump becomes unconditional. */
3245 return 1;
3246
3247 case LT:
3248 case LTU:
3249 /* Jump becomes no-op. */
3250 return -1;
3251
3252 case LE:
3253 case LEU:
3254 PUT_CODE (cond, EQ);
3255 value = 2;
3256 break;
3257
3258 case GT:
3259 case GTU:
3260 PUT_CODE (cond, NE);
3261 value = 2;
3262 break;
3263
3264 default:
3265 break;
3266 }
3267
3268 if (cc_status.flags & CC_NO_OVERFLOW)
3269 switch (GET_CODE (cond))
3270 {
3271 case GEU:
3272 /* Jump becomes unconditional. */
3273 return 1;
3274
3275 case LEU:
3276 PUT_CODE (cond, EQ);
3277 value = 2;
3278 break;
3279
3280 case GTU:
3281 PUT_CODE (cond, NE);
3282 value = 2;
3283 break;
3284
3285 case LTU:
3286 /* Jump becomes no-op. */
3287 return -1;
3288
3289 default:
3290 break;
3291 }
3292
3293 if (cc_status.flags & (CC_Z_IN_NOT_N | CC_Z_IN_N))
3294 switch (GET_CODE (cond))
3295 {
3296 default:
3297 gcc_unreachable ();
3298
3299 case NE:
3300 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? GE : LT);
3301 value = 2;
3302 break;
3303
3304 case EQ:
3305 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? LT : GE);
3306 value = 2;
3307 break;
3308 }
3309
3310 if (cc_status.flags & CC_NOT_SIGNED)
3311 /* The flags are valid if signed condition operators are converted
3312 to unsigned. */
3313 switch (GET_CODE (cond))
3314 {
3315 case LE:
3316 PUT_CODE (cond, LEU);
3317 value = 2;
3318 break;
3319
3320 case LT:
3321 PUT_CODE (cond, LTU);
3322 value = 2;
3323 break;
3324
3325 case GT:
3326 PUT_CODE (cond, GTU);
3327 value = 2;
3328 break;
3329
3330 case GE:
3331 PUT_CODE (cond, GEU);
3332 value = 2;
3333 break;
3334
3335 default:
3336 break;
3337 }
3338
3339 return value;
3340 }
3341 #endif
3342 \f
3343 /* Report inconsistency between the assembler template and the operands.
3344 In an `asm', it's the user's fault; otherwise, the compiler's fault. */
3345
3346 void
3347 output_operand_lossage (const char *cmsgid, ...)
3348 {
3349 char *fmt_string;
3350 char *new_message;
3351 const char *pfx_str;
3352 va_list ap;
3353
3354 va_start (ap, cmsgid);
3355
3356 pfx_str = this_is_asm_operands ? _("invalid 'asm': ") : "output_operand: ";
3357 asprintf (&fmt_string, "%s%s", pfx_str, _(cmsgid));
3358 vasprintf (&new_message, fmt_string, ap);
3359
3360 if (this_is_asm_operands)
3361 error_for_asm (this_is_asm_operands, "%s", new_message);
3362 else
3363 internal_error ("%s", new_message);
3364
3365 free (fmt_string);
3366 free (new_message);
3367 va_end (ap);
3368 }
3369 \f
3370 /* Output of assembler code from a template, and its subroutines. */
3371
3372 /* Annotate the assembly with a comment describing the pattern and
3373 alternative used. */
3374
3375 static void
3376 output_asm_name (void)
3377 {
3378 if (debug_insn)
3379 {
3380 int num = INSN_CODE (debug_insn);
3381 fprintf (asm_out_file, "\t%s %d\t%s",
3382 ASM_COMMENT_START, INSN_UID (debug_insn),
3383 insn_data[num].name);
3384 if (insn_data[num].n_alternatives > 1)
3385 fprintf (asm_out_file, "/%d", which_alternative + 1);
3386
3387 if (HAVE_ATTR_length)
3388 fprintf (asm_out_file, "\t[length = %d]",
3389 get_attr_length (debug_insn));
3390
3391 /* Clear this so only the first assembler insn
3392 of any rtl insn will get the special comment for -dp. */
3393 debug_insn = 0;
3394 }
3395 }
3396
3397 /* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it
3398 or its address, return that expr . Set *PADDRESSP to 1 if the expr
3399 corresponds to the address of the object and 0 if to the object. */
3400
3401 static tree
3402 get_mem_expr_from_op (rtx op, int *paddressp)
3403 {
3404 tree expr;
3405 int inner_addressp;
3406
3407 *paddressp = 0;
3408
3409 if (REG_P (op))
3410 return REG_EXPR (op);
3411 else if (!MEM_P (op))
3412 return 0;
3413
3414 if (MEM_EXPR (op) != 0)
3415 return MEM_EXPR (op);
3416
3417 /* Otherwise we have an address, so indicate it and look at the address. */
3418 *paddressp = 1;
3419 op = XEXP (op, 0);
3420
3421 /* First check if we have a decl for the address, then look at the right side
3422 if it is a PLUS. Otherwise, strip off arithmetic and keep looking.
3423 But don't allow the address to itself be indirect. */
3424 if ((expr = get_mem_expr_from_op (op, &inner_addressp)) && ! inner_addressp)
3425 return expr;
3426 else if (GET_CODE (op) == PLUS
3427 && (expr = get_mem_expr_from_op (XEXP (op, 1), &inner_addressp)))
3428 return expr;
3429
3430 while (UNARY_P (op)
3431 || GET_RTX_CLASS (GET_CODE (op)) == RTX_BIN_ARITH)
3432 op = XEXP (op, 0);
3433
3434 expr = get_mem_expr_from_op (op, &inner_addressp);
3435 return inner_addressp ? 0 : expr;
3436 }
3437
3438 /* Output operand names for assembler instructions. OPERANDS is the
3439 operand vector, OPORDER is the order to write the operands, and NOPS
3440 is the number of operands to write. */
3441
3442 static void
3443 output_asm_operand_names (rtx *operands, int *oporder, int nops)
3444 {
3445 int wrote = 0;
3446 int i;
3447
3448 for (i = 0; i < nops; i++)
3449 {
3450 int addressp;
3451 rtx op = operands[oporder[i]];
3452 tree expr = get_mem_expr_from_op (op, &addressp);
3453
3454 fprintf (asm_out_file, "%c%s",
3455 wrote ? ',' : '\t', wrote ? "" : ASM_COMMENT_START);
3456 wrote = 1;
3457 if (expr)
3458 {
3459 fprintf (asm_out_file, "%s",
3460 addressp ? "*" : "");
3461 print_mem_expr (asm_out_file, expr);
3462 wrote = 1;
3463 }
3464 else if (REG_P (op) && ORIGINAL_REGNO (op)
3465 && ORIGINAL_REGNO (op) != REGNO (op))
3466 fprintf (asm_out_file, " tmp%i", ORIGINAL_REGNO (op));
3467 }
3468 }
3469
3470 #ifdef ASSEMBLER_DIALECT
3471 /* Helper function to parse assembler dialects in the asm string.
3472 This is called from output_asm_insn and asm_fprintf. */
3473 static const char *
3474 do_assembler_dialects (const char *p, int *dialect)
3475 {
3476 char c = *(p - 1);
3477
3478 switch (c)
3479 {
3480 case '{':
3481 {
3482 int i;
3483
3484 if (*dialect)
3485 output_operand_lossage ("nested assembly dialect alternatives");
3486 else
3487 *dialect = 1;
3488
3489 /* If we want the first dialect, do nothing. Otherwise, skip
3490 DIALECT_NUMBER of strings ending with '|'. */
3491 for (i = 0; i < dialect_number; i++)
3492 {
3493 while (*p && *p != '}')
3494 {
3495 if (*p == '|')
3496 {
3497 p++;
3498 break;
3499 }
3500
3501 /* Skip over any character after a percent sign. */
3502 if (*p == '%')
3503 p++;
3504 if (*p)
3505 p++;
3506 }
3507
3508 if (*p == '}')
3509 break;
3510 }
3511
3512 if (*p == '\0')
3513 output_operand_lossage ("unterminated assembly dialect alternative");
3514 }
3515 break;
3516
3517 case '|':
3518 if (*dialect)
3519 {
3520 /* Skip to close brace. */
3521 do
3522 {
3523 if (*p == '\0')
3524 {
3525 output_operand_lossage ("unterminated assembly dialect alternative");
3526 break;
3527 }
3528
3529 /* Skip over any character after a percent sign. */
3530 if (*p == '%' && p[1])
3531 {
3532 p += 2;
3533 continue;
3534 }
3535
3536 if (*p++ == '}')
3537 break;
3538 }
3539 while (1);
3540
3541 *dialect = 0;
3542 }
3543 else
3544 putc (c, asm_out_file);
3545 break;
3546
3547 case '}':
3548 if (! *dialect)
3549 putc (c, asm_out_file);
3550 *dialect = 0;
3551 break;
3552 default:
3553 gcc_unreachable ();
3554 }
3555
3556 return p;
3557 }
3558 #endif
3559
3560 /* Output text from TEMPLATE to the assembler output file,
3561 obeying %-directions to substitute operands taken from
3562 the vector OPERANDS.
3563
3564 %N (for N a digit) means print operand N in usual manner.
3565 %lN means require operand N to be a CODE_LABEL or LABEL_REF
3566 and print the label name with no punctuation.
3567 %cN means require operand N to be a constant
3568 and print the constant expression with no punctuation.
3569 %aN means expect operand N to be a memory address
3570 (not a memory reference!) and print a reference
3571 to that address.
3572 %nN means expect operand N to be a constant
3573 and print a constant expression for minus the value
3574 of the operand, with no other punctuation. */
3575
3576 void
3577 output_asm_insn (const char *templ, rtx *operands)
3578 {
3579 const char *p;
3580 int c;
3581 #ifdef ASSEMBLER_DIALECT
3582 int dialect = 0;
3583 #endif
3584 int oporder[MAX_RECOG_OPERANDS];
3585 char opoutput[MAX_RECOG_OPERANDS];
3586 int ops = 0;
3587
3588 /* An insn may return a null string template
3589 in a case where no assembler code is needed. */
3590 if (*templ == 0)
3591 return;
3592
3593 memset (opoutput, 0, sizeof opoutput);
3594 p = templ;
3595 putc ('\t', asm_out_file);
3596
3597 #ifdef ASM_OUTPUT_OPCODE
3598 ASM_OUTPUT_OPCODE (asm_out_file, p);
3599 #endif
3600
3601 while ((c = *p++))
3602 switch (c)
3603 {
3604 case '\n':
3605 if (flag_verbose_asm)
3606 output_asm_operand_names (operands, oporder, ops);
3607 if (flag_print_asm_name)
3608 output_asm_name ();
3609
3610 ops = 0;
3611 memset (opoutput, 0, sizeof opoutput);
3612
3613 putc (c, asm_out_file);
3614 #ifdef ASM_OUTPUT_OPCODE
3615 while ((c = *p) == '\t')
3616 {
3617 putc (c, asm_out_file);
3618 p++;
3619 }
3620 ASM_OUTPUT_OPCODE (asm_out_file, p);
3621 #endif
3622 break;
3623
3624 #ifdef ASSEMBLER_DIALECT
3625 case '{':
3626 case '}':
3627 case '|':
3628 p = do_assembler_dialects (p, &dialect);
3629 break;
3630 #endif
3631
3632 case '%':
3633 /* %% outputs a single %. %{, %} and %| print {, } and | respectively
3634 if ASSEMBLER_DIALECT defined and these characters have a special
3635 meaning as dialect delimiters.*/
3636 if (*p == '%'
3637 #ifdef ASSEMBLER_DIALECT
3638 || *p == '{' || *p == '}' || *p == '|'
3639 #endif
3640 )
3641 {
3642 putc (*p, asm_out_file);
3643 p++;
3644 }
3645 /* %= outputs a number which is unique to each insn in the entire
3646 compilation. This is useful for making local labels that are
3647 referred to more than once in a given insn. */
3648 else if (*p == '=')
3649 {
3650 p++;
3651 fprintf (asm_out_file, "%d", insn_counter);
3652 }
3653 /* % followed by a letter and some digits
3654 outputs an operand in a special way depending on the letter.
3655 Letters `acln' are implemented directly.
3656 Other letters are passed to `output_operand' so that
3657 the TARGET_PRINT_OPERAND hook can define them. */
3658 else if (ISALPHA (*p))
3659 {
3660 int letter = *p++;
3661 unsigned long opnum;
3662 char *endptr;
3663
3664 opnum = strtoul (p, &endptr, 10);
3665
3666 if (endptr == p)
3667 output_operand_lossage ("operand number missing "
3668 "after %%-letter");
3669 else if (this_is_asm_operands && opnum >= insn_noperands)
3670 output_operand_lossage ("operand number out of range");
3671 else if (letter == 'l')
3672 output_asm_label (operands[opnum]);
3673 else if (letter == 'a')
3674 output_address (operands[opnum]);
3675 else if (letter == 'c')
3676 {
3677 if (CONSTANT_ADDRESS_P (operands[opnum]))
3678 output_addr_const (asm_out_file, operands[opnum]);
3679 else
3680 output_operand (operands[opnum], 'c');
3681 }
3682 else if (letter == 'n')
3683 {
3684 if (CONST_INT_P (operands[opnum]))
3685 fprintf (asm_out_file, HOST_WIDE_INT_PRINT_DEC,
3686 - INTVAL (operands[opnum]));
3687 else
3688 {
3689 putc ('-', asm_out_file);
3690 output_addr_const (asm_out_file, operands[opnum]);
3691 }
3692 }
3693 else
3694 output_operand (operands[opnum], letter);
3695
3696 if (!opoutput[opnum])
3697 oporder[ops++] = opnum;
3698 opoutput[opnum] = 1;
3699
3700 p = endptr;
3701 c = *p;
3702 }
3703 /* % followed by a digit outputs an operand the default way. */
3704 else if (ISDIGIT (*p))
3705 {
3706 unsigned long opnum;
3707 char *endptr;
3708
3709 opnum = strtoul (p, &endptr, 10);
3710 if (this_is_asm_operands && opnum >= insn_noperands)
3711 output_operand_lossage ("operand number out of range");
3712 else
3713 output_operand (operands[opnum], 0);
3714
3715 if (!opoutput[opnum])
3716 oporder[ops++] = opnum;
3717 opoutput[opnum] = 1;
3718
3719 p = endptr;
3720 c = *p;
3721 }
3722 /* % followed by punctuation: output something for that
3723 punctuation character alone, with no operand. The
3724 TARGET_PRINT_OPERAND hook decides what is actually done. */
3725 else if (targetm.asm_out.print_operand_punct_valid_p ((unsigned char) *p))
3726 output_operand (NULL_RTX, *p++);
3727 else
3728 output_operand_lossage ("invalid %%-code");
3729 break;
3730
3731 default:
3732 putc (c, asm_out_file);
3733 }
3734
3735 /* Write out the variable names for operands, if we know them. */
3736 if (flag_verbose_asm)
3737 output_asm_operand_names (operands, oporder, ops);
3738 if (flag_print_asm_name)
3739 output_asm_name ();
3740
3741 putc ('\n', asm_out_file);
3742 }
3743 \f
3744 /* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */
3745
3746 void
3747 output_asm_label (rtx x)
3748 {
3749 char buf[256];
3750
3751 if (GET_CODE (x) == LABEL_REF)
3752 x = XEXP (x, 0);
3753 if (LABEL_P (x)
3754 || (NOTE_P (x)
3755 && NOTE_KIND (x) == NOTE_INSN_DELETED_LABEL))
3756 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3757 else
3758 output_operand_lossage ("'%%l' operand isn't a label");
3759
3760 assemble_name (asm_out_file, buf);
3761 }
3762
3763 /* Helper rtx-iteration-function for mark_symbol_refs_as_used and
3764 output_operand. Marks SYMBOL_REFs as referenced through use of
3765 assemble_external. */
3766
3767 static int
3768 mark_symbol_ref_as_used (rtx *xp, void *dummy ATTRIBUTE_UNUSED)
3769 {
3770 rtx x = *xp;
3771
3772 /* If we have a used symbol, we may have to emit assembly
3773 annotations corresponding to whether the symbol is external, weak
3774 or has non-default visibility. */
3775 if (GET_CODE (x) == SYMBOL_REF)
3776 {
3777 tree t;
3778
3779 t = SYMBOL_REF_DECL (x);
3780 if (t)
3781 assemble_external (t);
3782
3783 return -1;
3784 }
3785
3786 return 0;
3787 }
3788
3789 /* Marks SYMBOL_REFs in x as referenced through use of assemble_external. */
3790
3791 void
3792 mark_symbol_refs_as_used (rtx x)
3793 {
3794 for_each_rtx (&x, mark_symbol_ref_as_used, NULL);
3795 }
3796
3797 /* Print operand X using machine-dependent assembler syntax.
3798 CODE is a non-digit that preceded the operand-number in the % spec,
3799 such as 'z' if the spec was `%z3'. CODE is 0 if there was no char
3800 between the % and the digits.
3801 When CODE is a non-letter, X is 0.
3802
3803 The meanings of the letters are machine-dependent and controlled
3804 by TARGET_PRINT_OPERAND. */
3805
3806 void
3807 output_operand (rtx x, int code ATTRIBUTE_UNUSED)
3808 {
3809 if (x && GET_CODE (x) == SUBREG)
3810 x = alter_subreg (&x, true);
3811
3812 /* X must not be a pseudo reg. */
3813 gcc_assert (!x || !REG_P (x) || REGNO (x) < FIRST_PSEUDO_REGISTER);
3814
3815 targetm.asm_out.print_operand (asm_out_file, x, code);
3816
3817 if (x == NULL_RTX)
3818 return;
3819
3820 for_each_rtx (&x, mark_symbol_ref_as_used, NULL);
3821 }
3822
3823 /* Print a memory reference operand for address X using
3824 machine-dependent assembler syntax. */
3825
3826 void
3827 output_address (rtx x)
3828 {
3829 bool changed = false;
3830 walk_alter_subreg (&x, &changed);
3831 targetm.asm_out.print_operand_address (asm_out_file, x);
3832 }
3833 \f
3834 /* Print an integer constant expression in assembler syntax.
3835 Addition and subtraction are the only arithmetic
3836 that may appear in these expressions. */
3837
3838 void
3839 output_addr_const (FILE *file, rtx x)
3840 {
3841 char buf[256];
3842
3843 restart:
3844 switch (GET_CODE (x))
3845 {
3846 case PC:
3847 putc ('.', file);
3848 break;
3849
3850 case SYMBOL_REF:
3851 if (SYMBOL_REF_DECL (x))
3852 assemble_external (SYMBOL_REF_DECL (x));
3853 #ifdef ASM_OUTPUT_SYMBOL_REF
3854 ASM_OUTPUT_SYMBOL_REF (file, x);
3855 #else
3856 assemble_name (file, XSTR (x, 0));
3857 #endif
3858 break;
3859
3860 case LABEL_REF:
3861 x = XEXP (x, 0);
3862 /* Fall through. */
3863 case CODE_LABEL:
3864 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3865 #ifdef ASM_OUTPUT_LABEL_REF
3866 ASM_OUTPUT_LABEL_REF (file, buf);
3867 #else
3868 assemble_name (file, buf);
3869 #endif
3870 break;
3871
3872 case CONST_INT:
3873 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x));
3874 break;
3875
3876 case CONST:
3877 /* This used to output parentheses around the expression,
3878 but that does not work on the 386 (either ATT or BSD assembler). */
3879 output_addr_const (file, XEXP (x, 0));
3880 break;
3881
3882 case CONST_DOUBLE:
3883 if (GET_MODE (x) == VOIDmode)
3884 {
3885 /* We can use %d if the number is one word and positive. */
3886 if (CONST_DOUBLE_HIGH (x))
3887 fprintf (file, HOST_WIDE_INT_PRINT_DOUBLE_HEX,
3888 (unsigned HOST_WIDE_INT) CONST_DOUBLE_HIGH (x),
3889 (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (x));
3890 else if (CONST_DOUBLE_LOW (x) < 0)
3891 fprintf (file, HOST_WIDE_INT_PRINT_HEX,
3892 (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (x));
3893 else
3894 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x));
3895 }
3896 else
3897 /* We can't handle floating point constants;
3898 PRINT_OPERAND must handle them. */
3899 output_operand_lossage ("floating constant misused");
3900 break;
3901
3902 case CONST_FIXED:
3903 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_FIXED_VALUE_LOW (x));
3904 break;
3905
3906 case PLUS:
3907 /* Some assemblers need integer constants to appear last (eg masm). */
3908 if (CONST_INT_P (XEXP (x, 0)))
3909 {
3910 output_addr_const (file, XEXP (x, 1));
3911 if (INTVAL (XEXP (x, 0)) >= 0)
3912 fprintf (file, "+");
3913 output_addr_const (file, XEXP (x, 0));
3914 }
3915 else
3916 {
3917 output_addr_const (file, XEXP (x, 0));
3918 if (!CONST_INT_P (XEXP (x, 1))
3919 || INTVAL (XEXP (x, 1)) >= 0)
3920 fprintf (file, "+");
3921 output_addr_const (file, XEXP (x, 1));
3922 }
3923 break;
3924
3925 case MINUS:
3926 /* Avoid outputting things like x-x or x+5-x,
3927 since some assemblers can't handle that. */
3928 x = simplify_subtraction (x);
3929 if (GET_CODE (x) != MINUS)
3930 goto restart;
3931
3932 output_addr_const (file, XEXP (x, 0));
3933 fprintf (file, "-");
3934 if ((CONST_INT_P (XEXP (x, 1)) && INTVAL (XEXP (x, 1)) >= 0)
3935 || GET_CODE (XEXP (x, 1)) == PC
3936 || GET_CODE (XEXP (x, 1)) == SYMBOL_REF)
3937 output_addr_const (file, XEXP (x, 1));
3938 else
3939 {
3940 fputs (targetm.asm_out.open_paren, file);
3941 output_addr_const (file, XEXP (x, 1));
3942 fputs (targetm.asm_out.close_paren, file);
3943 }
3944 break;
3945
3946 case ZERO_EXTEND:
3947 case SIGN_EXTEND:
3948 case SUBREG:
3949 case TRUNCATE:
3950 output_addr_const (file, XEXP (x, 0));
3951 break;
3952
3953 default:
3954 if (targetm.asm_out.output_addr_const_extra (file, x))
3955 break;
3956
3957 output_operand_lossage ("invalid expression as operand");
3958 }
3959 }
3960 \f
3961 /* Output a quoted string. */
3962
3963 void
3964 output_quoted_string (FILE *asm_file, const char *string)
3965 {
3966 #ifdef OUTPUT_QUOTED_STRING
3967 OUTPUT_QUOTED_STRING (asm_file, string);
3968 #else
3969 char c;
3970
3971 putc ('\"', asm_file);
3972 while ((c = *string++) != 0)
3973 {
3974 if (ISPRINT (c))
3975 {
3976 if (c == '\"' || c == '\\')
3977 putc ('\\', asm_file);
3978 putc (c, asm_file);
3979 }
3980 else
3981 fprintf (asm_file, "\\%03o", (unsigned char) c);
3982 }
3983 putc ('\"', asm_file);
3984 #endif
3985 }
3986 \f
3987 /* Write a HOST_WIDE_INT number in hex form 0x1234, fast. */
3988
3989 void
3990 fprint_whex (FILE *f, unsigned HOST_WIDE_INT value)
3991 {
3992 char buf[2 + CHAR_BIT * sizeof (value) / 4];
3993 if (value == 0)
3994 putc ('0', f);
3995 else
3996 {
3997 char *p = buf + sizeof (buf);
3998 do
3999 *--p = "0123456789abcdef"[value % 16];
4000 while ((value /= 16) != 0);
4001 *--p = 'x';
4002 *--p = '0';
4003 fwrite (p, 1, buf + sizeof (buf) - p, f);
4004 }
4005 }
4006
4007 /* Internal function that prints an unsigned long in decimal in reverse.
4008 The output string IS NOT null-terminated. */
4009
4010 static int
4011 sprint_ul_rev (char *s, unsigned long value)
4012 {
4013 int i = 0;
4014 do
4015 {
4016 s[i] = "0123456789"[value % 10];
4017 value /= 10;
4018 i++;
4019 /* alternate version, without modulo */
4020 /* oldval = value; */
4021 /* value /= 10; */
4022 /* s[i] = "0123456789" [oldval - 10*value]; */
4023 /* i++ */
4024 }
4025 while (value != 0);
4026 return i;
4027 }
4028
4029 /* Write an unsigned long as decimal to a file, fast. */
4030
4031 void
4032 fprint_ul (FILE *f, unsigned long value)
4033 {
4034 /* python says: len(str(2**64)) == 20 */
4035 char s[20];
4036 int i;
4037
4038 i = sprint_ul_rev (s, value);
4039
4040 /* It's probably too small to bother with string reversal and fputs. */
4041 do
4042 {
4043 i--;
4044 putc (s[i], f);
4045 }
4046 while (i != 0);
4047 }
4048
4049 /* Write an unsigned long as decimal to a string, fast.
4050 s must be wide enough to not overflow, at least 21 chars.
4051 Returns the length of the string (without terminating '\0'). */
4052
4053 int
4054 sprint_ul (char *s, unsigned long value)
4055 {
4056 int len;
4057 char tmp_c;
4058 int i;
4059 int j;
4060
4061 len = sprint_ul_rev (s, value);
4062 s[len] = '\0';
4063
4064 /* Reverse the string. */
4065 i = 0;
4066 j = len - 1;
4067 while (i < j)
4068 {
4069 tmp_c = s[i];
4070 s[i] = s[j];
4071 s[j] = tmp_c;
4072 i++; j--;
4073 }
4074
4075 return len;
4076 }
4077
4078 /* A poor man's fprintf, with the added features of %I, %R, %L, and %U.
4079 %R prints the value of REGISTER_PREFIX.
4080 %L prints the value of LOCAL_LABEL_PREFIX.
4081 %U prints the value of USER_LABEL_PREFIX.
4082 %I prints the value of IMMEDIATE_PREFIX.
4083 %O runs ASM_OUTPUT_OPCODE to transform what follows in the string.
4084 Also supported are %d, %i, %u, %x, %X, %o, %c, %s and %%.
4085
4086 We handle alternate assembler dialects here, just like output_asm_insn. */
4087
4088 void
4089 asm_fprintf (FILE *file, const char *p, ...)
4090 {
4091 char buf[10];
4092 char *q, c;
4093 #ifdef ASSEMBLER_DIALECT
4094 int dialect = 0;
4095 #endif
4096 va_list argptr;
4097
4098 va_start (argptr, p);
4099
4100 buf[0] = '%';
4101
4102 while ((c = *p++))
4103 switch (c)
4104 {
4105 #ifdef ASSEMBLER_DIALECT
4106 case '{':
4107 case '}':
4108 case '|':
4109 p = do_assembler_dialects (p, &dialect);
4110 break;
4111 #endif
4112
4113 case '%':
4114 c = *p++;
4115 q = &buf[1];
4116 while (strchr ("-+ #0", c))
4117 {
4118 *q++ = c;
4119 c = *p++;
4120 }
4121 while (ISDIGIT (c) || c == '.')
4122 {
4123 *q++ = c;
4124 c = *p++;
4125 }
4126 switch (c)
4127 {
4128 case '%':
4129 putc ('%', file);
4130 break;
4131
4132 case 'd': case 'i': case 'u':
4133 case 'x': case 'X': case 'o':
4134 case 'c':
4135 *q++ = c;
4136 *q = 0;
4137 fprintf (file, buf, va_arg (argptr, int));
4138 break;
4139
4140 case 'w':
4141 /* This is a prefix to the 'd', 'i', 'u', 'x', 'X', and
4142 'o' cases, but we do not check for those cases. It
4143 means that the value is a HOST_WIDE_INT, which may be
4144 either `long' or `long long'. */
4145 memcpy (q, HOST_WIDE_INT_PRINT, strlen (HOST_WIDE_INT_PRINT));
4146 q += strlen (HOST_WIDE_INT_PRINT);
4147 *q++ = *p++;
4148 *q = 0;
4149 fprintf (file, buf, va_arg (argptr, HOST_WIDE_INT));
4150 break;
4151
4152 case 'l':
4153 *q++ = c;
4154 #ifdef HAVE_LONG_LONG
4155 if (*p == 'l')
4156 {
4157 *q++ = *p++;
4158 *q++ = *p++;
4159 *q = 0;
4160 fprintf (file, buf, va_arg (argptr, long long));
4161 }
4162 else
4163 #endif
4164 {
4165 *q++ = *p++;
4166 *q = 0;
4167 fprintf (file, buf, va_arg (argptr, long));
4168 }
4169
4170 break;
4171
4172 case 's':
4173 *q++ = c;
4174 *q = 0;
4175 fprintf (file, buf, va_arg (argptr, char *));
4176 break;
4177
4178 case 'O':
4179 #ifdef ASM_OUTPUT_OPCODE
4180 ASM_OUTPUT_OPCODE (asm_out_file, p);
4181 #endif
4182 break;
4183
4184 case 'R':
4185 #ifdef REGISTER_PREFIX
4186 fprintf (file, "%s", REGISTER_PREFIX);
4187 #endif
4188 break;
4189
4190 case 'I':
4191 #ifdef IMMEDIATE_PREFIX
4192 fprintf (file, "%s", IMMEDIATE_PREFIX);
4193 #endif
4194 break;
4195
4196 case 'L':
4197 #ifdef LOCAL_LABEL_PREFIX
4198 fprintf (file, "%s", LOCAL_LABEL_PREFIX);
4199 #endif
4200 break;
4201
4202 case 'U':
4203 fputs (user_label_prefix, file);
4204 break;
4205
4206 #ifdef ASM_FPRINTF_EXTENSIONS
4207 /* Uppercase letters are reserved for general use by asm_fprintf
4208 and so are not available to target specific code. In order to
4209 prevent the ASM_FPRINTF_EXTENSIONS macro from using them then,
4210 they are defined here. As they get turned into real extensions
4211 to asm_fprintf they should be removed from this list. */
4212 case 'A': case 'B': case 'C': case 'D': case 'E':
4213 case 'F': case 'G': case 'H': case 'J': case 'K':
4214 case 'M': case 'N': case 'P': case 'Q': case 'S':
4215 case 'T': case 'V': case 'W': case 'Y': case 'Z':
4216 break;
4217
4218 ASM_FPRINTF_EXTENSIONS (file, argptr, p)
4219 #endif
4220 default:
4221 gcc_unreachable ();
4222 }
4223 break;
4224
4225 default:
4226 putc (c, file);
4227 }
4228 va_end (argptr);
4229 }
4230 \f
4231 /* Return nonzero if this function has no function calls. */
4232
4233 int
4234 leaf_function_p (void)
4235 {
4236 rtx insn;
4237
4238 if (crtl->profile || profile_arc_flag)
4239 return 0;
4240
4241 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4242 {
4243 if (CALL_P (insn)
4244 && ! SIBLING_CALL_P (insn))
4245 return 0;
4246 if (NONJUMP_INSN_P (insn)
4247 && GET_CODE (PATTERN (insn)) == SEQUENCE
4248 && CALL_P (XVECEXP (PATTERN (insn), 0, 0))
4249 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0)))
4250 return 0;
4251 }
4252
4253 return 1;
4254 }
4255
4256 /* Return 1 if branch is a forward branch.
4257 Uses insn_shuid array, so it works only in the final pass. May be used by
4258 output templates to customary add branch prediction hints.
4259 */
4260 int
4261 final_forward_branch_p (rtx insn)
4262 {
4263 int insn_id, label_id;
4264
4265 gcc_assert (uid_shuid);
4266 insn_id = INSN_SHUID (insn);
4267 label_id = INSN_SHUID (JUMP_LABEL (insn));
4268 /* We've hit some insns that does not have id information available. */
4269 gcc_assert (insn_id && label_id);
4270 return insn_id < label_id;
4271 }
4272
4273 /* On some machines, a function with no call insns
4274 can run faster if it doesn't create its own register window.
4275 When output, the leaf function should use only the "output"
4276 registers. Ordinarily, the function would be compiled to use
4277 the "input" registers to find its arguments; it is a candidate
4278 for leaf treatment if it uses only the "input" registers.
4279 Leaf function treatment means renumbering so the function
4280 uses the "output" registers instead. */
4281
4282 #ifdef LEAF_REGISTERS
4283
4284 /* Return 1 if this function uses only the registers that can be
4285 safely renumbered. */
4286
4287 int
4288 only_leaf_regs_used (void)
4289 {
4290 int i;
4291 const char *const permitted_reg_in_leaf_functions = LEAF_REGISTERS;
4292
4293 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
4294 if ((df_regs_ever_live_p (i) || global_regs[i])
4295 && ! permitted_reg_in_leaf_functions[i])
4296 return 0;
4297
4298 if (crtl->uses_pic_offset_table
4299 && pic_offset_table_rtx != 0
4300 && REG_P (pic_offset_table_rtx)
4301 && ! permitted_reg_in_leaf_functions[REGNO (pic_offset_table_rtx)])
4302 return 0;
4303
4304 return 1;
4305 }
4306
4307 /* Scan all instructions and renumber all registers into those
4308 available in leaf functions. */
4309
4310 static void
4311 leaf_renumber_regs (rtx first)
4312 {
4313 rtx insn;
4314
4315 /* Renumber only the actual patterns.
4316 The reg-notes can contain frame pointer refs,
4317 and renumbering them could crash, and should not be needed. */
4318 for (insn = first; insn; insn = NEXT_INSN (insn))
4319 if (INSN_P (insn))
4320 leaf_renumber_regs_insn (PATTERN (insn));
4321 }
4322
4323 /* Scan IN_RTX and its subexpressions, and renumber all regs into those
4324 available in leaf functions. */
4325
4326 void
4327 leaf_renumber_regs_insn (rtx in_rtx)
4328 {
4329 int i, j;
4330 const char *format_ptr;
4331
4332 if (in_rtx == 0)
4333 return;
4334
4335 /* Renumber all input-registers into output-registers.
4336 renumbered_regs would be 1 for an output-register;
4337 they */
4338
4339 if (REG_P (in_rtx))
4340 {
4341 int newreg;
4342
4343 /* Don't renumber the same reg twice. */
4344 if (in_rtx->used)
4345 return;
4346
4347 newreg = REGNO (in_rtx);
4348 /* Don't try to renumber pseudo regs. It is possible for a pseudo reg
4349 to reach here as part of a REG_NOTE. */
4350 if (newreg >= FIRST_PSEUDO_REGISTER)
4351 {
4352 in_rtx->used = 1;
4353 return;
4354 }
4355 newreg = LEAF_REG_REMAP (newreg);
4356 gcc_assert (newreg >= 0);
4357 df_set_regs_ever_live (REGNO (in_rtx), false);
4358 df_set_regs_ever_live (newreg, true);
4359 SET_REGNO (in_rtx, newreg);
4360 in_rtx->used = 1;
4361 }
4362
4363 if (INSN_P (in_rtx))
4364 {
4365 /* Inside a SEQUENCE, we find insns.
4366 Renumber just the patterns of these insns,
4367 just as we do for the top-level insns. */
4368 leaf_renumber_regs_insn (PATTERN (in_rtx));
4369 return;
4370 }
4371
4372 format_ptr = GET_RTX_FORMAT (GET_CODE (in_rtx));
4373
4374 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (in_rtx)); i++)
4375 switch (*format_ptr++)
4376 {
4377 case 'e':
4378 leaf_renumber_regs_insn (XEXP (in_rtx, i));
4379 break;
4380
4381 case 'E':
4382 if (NULL != XVEC (in_rtx, i))
4383 {
4384 for (j = 0; j < XVECLEN (in_rtx, i); j++)
4385 leaf_renumber_regs_insn (XVECEXP (in_rtx, i, j));
4386 }
4387 break;
4388
4389 case 'S':
4390 case 's':
4391 case '0':
4392 case 'i':
4393 case 'w':
4394 case 'n':
4395 case 'u':
4396 break;
4397
4398 default:
4399 gcc_unreachable ();
4400 }
4401 }
4402 #endif
4403 \f
4404 /* Turn the RTL into assembly. */
4405 static unsigned int
4406 rest_of_handle_final (void)
4407 {
4408 rtx x;
4409 const char *fnname;
4410
4411 /* Get the function's name, as described by its RTL. This may be
4412 different from the DECL_NAME name used in the source file. */
4413
4414 x = DECL_RTL (current_function_decl);
4415 gcc_assert (MEM_P (x));
4416 x = XEXP (x, 0);
4417 gcc_assert (GET_CODE (x) == SYMBOL_REF);
4418 fnname = XSTR (x, 0);
4419
4420 assemble_start_function (current_function_decl, fnname);
4421 final_start_function (get_insns (), asm_out_file, optimize);
4422 final (get_insns (), asm_out_file, optimize);
4423 final_end_function ();
4424
4425 /* The IA-64 ".handlerdata" directive must be issued before the ".endp"
4426 directive that closes the procedure descriptor. Similarly, for x64 SEH.
4427 Otherwise it's not strictly necessary, but it doesn't hurt either. */
4428 output_function_exception_table (fnname);
4429
4430 assemble_end_function (current_function_decl, fnname);
4431
4432 user_defined_section_attribute = false;
4433
4434 /* Free up reg info memory. */
4435 free_reg_info ();
4436
4437 if (! quiet_flag)
4438 fflush (asm_out_file);
4439
4440 /* Write DBX symbols if requested. */
4441
4442 /* Note that for those inline functions where we don't initially
4443 know for certain that we will be generating an out-of-line copy,
4444 the first invocation of this routine (rest_of_compilation) will
4445 skip over this code by doing a `goto exit_rest_of_compilation;'.
4446 Later on, wrapup_global_declarations will (indirectly) call
4447 rest_of_compilation again for those inline functions that need
4448 to have out-of-line copies generated. During that call, we
4449 *will* be routed past here. */
4450
4451 timevar_push (TV_SYMOUT);
4452 if (!DECL_IGNORED_P (current_function_decl))
4453 debug_hooks->function_decl (current_function_decl);
4454 timevar_pop (TV_SYMOUT);
4455
4456 /* Release the blocks that are linked to DECL_INITIAL() to free the memory. */
4457 DECL_INITIAL (current_function_decl) = error_mark_node;
4458
4459 if (DECL_STATIC_CONSTRUCTOR (current_function_decl)
4460 && targetm.have_ctors_dtors)
4461 targetm.asm_out.constructor (XEXP (DECL_RTL (current_function_decl), 0),
4462 decl_init_priority_lookup
4463 (current_function_decl));
4464 if (DECL_STATIC_DESTRUCTOR (current_function_decl)
4465 && targetm.have_ctors_dtors)
4466 targetm.asm_out.destructor (XEXP (DECL_RTL (current_function_decl), 0),
4467 decl_fini_priority_lookup
4468 (current_function_decl));
4469 return 0;
4470 }
4471
4472 namespace {
4473
4474 const pass_data pass_data_final =
4475 {
4476 RTL_PASS, /* type */
4477 "final", /* name */
4478 OPTGROUP_NONE, /* optinfo_flags */
4479 false, /* has_gate */
4480 true, /* has_execute */
4481 TV_FINAL, /* tv_id */
4482 0, /* properties_required */
4483 0, /* properties_provided */
4484 0, /* properties_destroyed */
4485 0, /* todo_flags_start */
4486 0, /* todo_flags_finish */
4487 };
4488
4489 class pass_final : public rtl_opt_pass
4490 {
4491 public:
4492 pass_final(gcc::context *ctxt)
4493 : rtl_opt_pass(pass_data_final, ctxt)
4494 {}
4495
4496 /* opt_pass methods: */
4497 unsigned int execute () { return rest_of_handle_final (); }
4498
4499 }; // class pass_final
4500
4501 } // anon namespace
4502
4503 rtl_opt_pass *
4504 make_pass_final (gcc::context *ctxt)
4505 {
4506 return new pass_final (ctxt);
4507 }
4508
4509
4510 static unsigned int
4511 rest_of_handle_shorten_branches (void)
4512 {
4513 /* Shorten branches. */
4514 shorten_branches (get_insns ());
4515 return 0;
4516 }
4517
4518 namespace {
4519
4520 const pass_data pass_data_shorten_branches =
4521 {
4522 RTL_PASS, /* type */
4523 "shorten", /* name */
4524 OPTGROUP_NONE, /* optinfo_flags */
4525 false, /* has_gate */
4526 true, /* has_execute */
4527 TV_SHORTEN_BRANCH, /* tv_id */
4528 0, /* properties_required */
4529 0, /* properties_provided */
4530 0, /* properties_destroyed */
4531 0, /* todo_flags_start */
4532 0, /* todo_flags_finish */
4533 };
4534
4535 class pass_shorten_branches : public rtl_opt_pass
4536 {
4537 public:
4538 pass_shorten_branches(gcc::context *ctxt)
4539 : rtl_opt_pass(pass_data_shorten_branches, ctxt)
4540 {}
4541
4542 /* opt_pass methods: */
4543 unsigned int execute () { return rest_of_handle_shorten_branches (); }
4544
4545 }; // class pass_shorten_branches
4546
4547 } // anon namespace
4548
4549 rtl_opt_pass *
4550 make_pass_shorten_branches (gcc::context *ctxt)
4551 {
4552 return new pass_shorten_branches (ctxt);
4553 }
4554
4555
4556 static unsigned int
4557 rest_of_clean_state (void)
4558 {
4559 rtx insn, next;
4560 FILE *final_output = NULL;
4561 int save_unnumbered = flag_dump_unnumbered;
4562 int save_noaddr = flag_dump_noaddr;
4563
4564 if (flag_dump_final_insns)
4565 {
4566 final_output = fopen (flag_dump_final_insns, "a");
4567 if (!final_output)
4568 {
4569 error ("could not open final insn dump file %qs: %m",
4570 flag_dump_final_insns);
4571 flag_dump_final_insns = NULL;
4572 }
4573 else
4574 {
4575 flag_dump_noaddr = flag_dump_unnumbered = 1;
4576 if (flag_compare_debug_opt || flag_compare_debug)
4577 dump_flags |= TDF_NOUID;
4578 dump_function_header (final_output, current_function_decl,
4579 dump_flags);
4580 final_insns_dump_p = true;
4581
4582 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4583 if (LABEL_P (insn))
4584 INSN_UID (insn) = CODE_LABEL_NUMBER (insn);
4585 else
4586 {
4587 if (NOTE_P (insn))
4588 set_block_for_insn (insn, NULL);
4589 INSN_UID (insn) = 0;
4590 }
4591 }
4592 }
4593
4594 /* It is very important to decompose the RTL instruction chain here:
4595 debug information keeps pointing into CODE_LABEL insns inside the function
4596 body. If these remain pointing to the other insns, we end up preserving
4597 whole RTL chain and attached detailed debug info in memory. */
4598 for (insn = get_insns (); insn; insn = next)
4599 {
4600 next = NEXT_INSN (insn);
4601 NEXT_INSN (insn) = NULL;
4602 PREV_INSN (insn) = NULL;
4603
4604 if (final_output
4605 && (!NOTE_P (insn) ||
4606 (NOTE_KIND (insn) != NOTE_INSN_VAR_LOCATION
4607 && NOTE_KIND (insn) != NOTE_INSN_CALL_ARG_LOCATION
4608 && NOTE_KIND (insn) != NOTE_INSN_BLOCK_BEG
4609 && NOTE_KIND (insn) != NOTE_INSN_BLOCK_END
4610 && NOTE_KIND (insn) != NOTE_INSN_DELETED_DEBUG_LABEL)))
4611 print_rtl_single (final_output, insn);
4612 }
4613
4614 if (final_output)
4615 {
4616 flag_dump_noaddr = save_noaddr;
4617 flag_dump_unnumbered = save_unnumbered;
4618 final_insns_dump_p = false;
4619
4620 if (fclose (final_output))
4621 {
4622 error ("could not close final insn dump file %qs: %m",
4623 flag_dump_final_insns);
4624 flag_dump_final_insns = NULL;
4625 }
4626 }
4627
4628 /* In case the function was not output,
4629 don't leave any temporary anonymous types
4630 queued up for sdb output. */
4631 #ifdef SDB_DEBUGGING_INFO
4632 if (write_symbols == SDB_DEBUG)
4633 sdbout_types (NULL_TREE);
4634 #endif
4635
4636 flag_rerun_cse_after_global_opts = 0;
4637 reload_completed = 0;
4638 epilogue_completed = 0;
4639 #ifdef STACK_REGS
4640 regstack_completed = 0;
4641 #endif
4642
4643 /* Clear out the insn_length contents now that they are no
4644 longer valid. */
4645 init_insn_lengths ();
4646
4647 /* Show no temporary slots allocated. */
4648 init_temp_slots ();
4649
4650 free_bb_for_insn ();
4651
4652 delete_tree_ssa ();
4653
4654 /* We can reduce stack alignment on call site only when we are sure that
4655 the function body just produced will be actually used in the final
4656 executable. */
4657 if (decl_binds_to_current_def_p (current_function_decl))
4658 {
4659 unsigned int pref = crtl->preferred_stack_boundary;
4660 if (crtl->stack_alignment_needed > crtl->preferred_stack_boundary)
4661 pref = crtl->stack_alignment_needed;
4662 cgraph_rtl_info (current_function_decl)->preferred_incoming_stack_boundary
4663 = pref;
4664 }
4665
4666 /* Make sure volatile mem refs aren't considered valid operands for
4667 arithmetic insns. We must call this here if this is a nested inline
4668 function, since the above code leaves us in the init_recog state,
4669 and the function context push/pop code does not save/restore volatile_ok.
4670
4671 ??? Maybe it isn't necessary for expand_start_function to call this
4672 anymore if we do it here? */
4673
4674 init_recog_no_volatile ();
4675
4676 /* We're done with this function. Free up memory if we can. */
4677 free_after_parsing (cfun);
4678 free_after_compilation (cfun);
4679 return 0;
4680 }
4681
4682 namespace {
4683
4684 const pass_data pass_data_clean_state =
4685 {
4686 RTL_PASS, /* type */
4687 "*clean_state", /* name */
4688 OPTGROUP_NONE, /* optinfo_flags */
4689 false, /* has_gate */
4690 true, /* has_execute */
4691 TV_FINAL, /* tv_id */
4692 0, /* properties_required */
4693 0, /* properties_provided */
4694 PROP_rtl, /* properties_destroyed */
4695 0, /* todo_flags_start */
4696 0, /* todo_flags_finish */
4697 };
4698
4699 class pass_clean_state : public rtl_opt_pass
4700 {
4701 public:
4702 pass_clean_state(gcc::context *ctxt)
4703 : rtl_opt_pass(pass_data_clean_state, ctxt)
4704 {}
4705
4706 /* opt_pass methods: */
4707 unsigned int execute () { return rest_of_clean_state (); }
4708
4709 }; // class pass_clean_state
4710
4711 } // anon namespace
4712
4713 rtl_opt_pass *
4714 make_pass_clean_state (gcc::context *ctxt)
4715 {
4716 return new pass_clean_state (ctxt);
4717 }