rx.c (add_vector_labels): New.
[gcc.git] / gcc / final.c
1 /* Convert RTL to assembler code and output it, for GNU compiler.
2 Copyright (C) 1987-2014 Free Software Foundation, Inc.
3
4 This file is part of GCC.
5
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
9 version.
10
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
19
20 /* This is the final pass of the compiler.
21 It looks at the rtl code for a function and outputs assembler code.
22
23 Call `final_start_function' to output the assembler code for function entry,
24 `final' to output assembler code for some RTL code,
25 `final_end_function' to output assembler code for function exit.
26 If a function is compiled in several pieces, each piece is
27 output separately with `final'.
28
29 Some optimizations are also done at this level.
30 Move instructions that were made unnecessary by good register allocation
31 are detected and omitted from the output. (Though most of these
32 are removed by the last jump pass.)
33
34 Instructions to set the condition codes are omitted when it can be
35 seen that the condition codes already had the desired values.
36
37 In some cases it is sufficient if the inherited condition codes
38 have related values, but this may require the following insn
39 (the one that tests the condition codes) to be modified.
40
41 The code for the function prologue and epilogue are generated
42 directly in assembler by the target functions function_prologue and
43 function_epilogue. Those instructions never exist as rtl. */
44
45 #include "config.h"
46 #include "system.h"
47 #include "coretypes.h"
48 #include "tm.h"
49
50 #include "tree.h"
51 #include "varasm.h"
52 #include "rtl.h"
53 #include "tm_p.h"
54 #include "regs.h"
55 #include "insn-config.h"
56 #include "insn-attr.h"
57 #include "recog.h"
58 #include "conditions.h"
59 #include "flags.h"
60 #include "hard-reg-set.h"
61 #include "output.h"
62 #include "except.h"
63 #include "function.h"
64 #include "rtl-error.h"
65 #include "toplev.h" /* exact_log2, floor_log2 */
66 #include "reload.h"
67 #include "intl.h"
68 #include "basic-block.h"
69 #include "target.h"
70 #include "targhooks.h"
71 #include "debug.h"
72 #include "expr.h"
73 #include "tree-pass.h"
74 #include "cgraph.h"
75 #include "tree-ssa.h"
76 #include "coverage.h"
77 #include "df.h"
78 #include "ggc.h"
79 #include "cfgloop.h"
80 #include "params.h"
81 #include "tree-pretty-print.h" /* for dump_function_header */
82 #include "asan.h"
83 #include "wide-int-print.h"
84
85 #ifdef XCOFF_DEBUGGING_INFO
86 #include "xcoffout.h" /* Needed for external data
87 declarations for e.g. AIX 4.x. */
88 #endif
89
90 #include "dwarf2out.h"
91
92 #ifdef DBX_DEBUGGING_INFO
93 #include "dbxout.h"
94 #endif
95
96 #ifdef SDB_DEBUGGING_INFO
97 #include "sdbout.h"
98 #endif
99
100 /* Most ports that aren't using cc0 don't need to define CC_STATUS_INIT.
101 So define a null default for it to save conditionalization later. */
102 #ifndef CC_STATUS_INIT
103 #define CC_STATUS_INIT
104 #endif
105
106 /* Is the given character a logical line separator for the assembler? */
107 #ifndef IS_ASM_LOGICAL_LINE_SEPARATOR
108 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == ';')
109 #endif
110
111 #ifndef JUMP_TABLES_IN_TEXT_SECTION
112 #define JUMP_TABLES_IN_TEXT_SECTION 0
113 #endif
114
115 /* Bitflags used by final_scan_insn. */
116 #define SEEN_NOTE 1
117 #define SEEN_EMITTED 2
118
119 /* Last insn processed by final_scan_insn. */
120 static rtx debug_insn;
121 rtx current_output_insn;
122
123 /* Line number of last NOTE. */
124 static int last_linenum;
125
126 /* Last discriminator written to assembly. */
127 static int last_discriminator;
128
129 /* Discriminator of current block. */
130 static int discriminator;
131
132 /* Highest line number in current block. */
133 static int high_block_linenum;
134
135 /* Likewise for function. */
136 static int high_function_linenum;
137
138 /* Filename of last NOTE. */
139 static const char *last_filename;
140
141 /* Override filename and line number. */
142 static const char *override_filename;
143 static int override_linenum;
144
145 /* Whether to force emission of a line note before the next insn. */
146 static bool force_source_line = false;
147
148 extern const int length_unit_log; /* This is defined in insn-attrtab.c. */
149
150 /* Nonzero while outputting an `asm' with operands.
151 This means that inconsistencies are the user's fault, so don't die.
152 The precise value is the insn being output, to pass to error_for_asm. */
153 rtx this_is_asm_operands;
154
155 /* Number of operands of this insn, for an `asm' with operands. */
156 static unsigned int insn_noperands;
157
158 /* Compare optimization flag. */
159
160 static rtx last_ignored_compare = 0;
161
162 /* Assign a unique number to each insn that is output.
163 This can be used to generate unique local labels. */
164
165 static int insn_counter = 0;
166
167 #ifdef HAVE_cc0
168 /* This variable contains machine-dependent flags (defined in tm.h)
169 set and examined by output routines
170 that describe how to interpret the condition codes properly. */
171
172 CC_STATUS cc_status;
173
174 /* During output of an insn, this contains a copy of cc_status
175 from before the insn. */
176
177 CC_STATUS cc_prev_status;
178 #endif
179
180 /* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */
181
182 static int block_depth;
183
184 /* Nonzero if have enabled APP processing of our assembler output. */
185
186 static int app_on;
187
188 /* If we are outputting an insn sequence, this contains the sequence rtx.
189 Zero otherwise. */
190
191 rtx final_sequence;
192
193 #ifdef ASSEMBLER_DIALECT
194
195 /* Number of the assembler dialect to use, starting at 0. */
196 static int dialect_number;
197 #endif
198
199 /* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */
200 rtx current_insn_predicate;
201
202 /* True if printing into -fdump-final-insns= dump. */
203 bool final_insns_dump_p;
204
205 /* True if profile_function should be called, but hasn't been called yet. */
206 static bool need_profile_function;
207
208 static int asm_insn_count (rtx);
209 static void profile_function (FILE *);
210 static void profile_after_prologue (FILE *);
211 static bool notice_source_line (rtx, bool *);
212 static rtx walk_alter_subreg (rtx *, bool *);
213 static void output_asm_name (void);
214 static void output_alternate_entry_point (FILE *, rtx);
215 static tree get_mem_expr_from_op (rtx, int *);
216 static void output_asm_operand_names (rtx *, int *, int);
217 #ifdef LEAF_REGISTERS
218 static void leaf_renumber_regs (rtx);
219 #endif
220 #ifdef HAVE_cc0
221 static int alter_cond (rtx);
222 #endif
223 #ifndef ADDR_VEC_ALIGN
224 static int final_addr_vec_align (rtx);
225 #endif
226 static int align_fuzz (rtx, rtx, int, unsigned);
227 \f
228 /* Initialize data in final at the beginning of a compilation. */
229
230 void
231 init_final (const char *filename ATTRIBUTE_UNUSED)
232 {
233 app_on = 0;
234 final_sequence = 0;
235
236 #ifdef ASSEMBLER_DIALECT
237 dialect_number = ASSEMBLER_DIALECT;
238 #endif
239 }
240
241 /* Default target function prologue and epilogue assembler output.
242
243 If not overridden for epilogue code, then the function body itself
244 contains return instructions wherever needed. */
245 void
246 default_function_pro_epilogue (FILE *file ATTRIBUTE_UNUSED,
247 HOST_WIDE_INT size ATTRIBUTE_UNUSED)
248 {
249 }
250
251 void
252 default_function_switched_text_sections (FILE *file ATTRIBUTE_UNUSED,
253 tree decl ATTRIBUTE_UNUSED,
254 bool new_is_cold ATTRIBUTE_UNUSED)
255 {
256 }
257
258 /* Default target hook that outputs nothing to a stream. */
259 void
260 no_asm_to_stream (FILE *file ATTRIBUTE_UNUSED)
261 {
262 }
263
264 /* Enable APP processing of subsequent output.
265 Used before the output from an `asm' statement. */
266
267 void
268 app_enable (void)
269 {
270 if (! app_on)
271 {
272 fputs (ASM_APP_ON, asm_out_file);
273 app_on = 1;
274 }
275 }
276
277 /* Disable APP processing of subsequent output.
278 Called from varasm.c before most kinds of output. */
279
280 void
281 app_disable (void)
282 {
283 if (app_on)
284 {
285 fputs (ASM_APP_OFF, asm_out_file);
286 app_on = 0;
287 }
288 }
289 \f
290 /* Return the number of slots filled in the current
291 delayed branch sequence (we don't count the insn needing the
292 delay slot). Zero if not in a delayed branch sequence. */
293
294 #ifdef DELAY_SLOTS
295 int
296 dbr_sequence_length (void)
297 {
298 if (final_sequence != 0)
299 return XVECLEN (final_sequence, 0) - 1;
300 else
301 return 0;
302 }
303 #endif
304 \f
305 /* The next two pages contain routines used to compute the length of an insn
306 and to shorten branches. */
307
308 /* Arrays for insn lengths, and addresses. The latter is referenced by
309 `insn_current_length'. */
310
311 static int *insn_lengths;
312
313 vec<int> insn_addresses_;
314
315 /* Max uid for which the above arrays are valid. */
316 static int insn_lengths_max_uid;
317
318 /* Address of insn being processed. Used by `insn_current_length'. */
319 int insn_current_address;
320
321 /* Address of insn being processed in previous iteration. */
322 int insn_last_address;
323
324 /* known invariant alignment of insn being processed. */
325 int insn_current_align;
326
327 /* After shorten_branches, for any insn, uid_align[INSN_UID (insn)]
328 gives the next following alignment insn that increases the known
329 alignment, or NULL_RTX if there is no such insn.
330 For any alignment obtained this way, we can again index uid_align with
331 its uid to obtain the next following align that in turn increases the
332 alignment, till we reach NULL_RTX; the sequence obtained this way
333 for each insn we'll call the alignment chain of this insn in the following
334 comments. */
335
336 struct label_alignment
337 {
338 short alignment;
339 short max_skip;
340 };
341
342 static rtx *uid_align;
343 static int *uid_shuid;
344 static struct label_alignment *label_align;
345
346 /* Indicate that branch shortening hasn't yet been done. */
347
348 void
349 init_insn_lengths (void)
350 {
351 if (uid_shuid)
352 {
353 free (uid_shuid);
354 uid_shuid = 0;
355 }
356 if (insn_lengths)
357 {
358 free (insn_lengths);
359 insn_lengths = 0;
360 insn_lengths_max_uid = 0;
361 }
362 if (HAVE_ATTR_length)
363 INSN_ADDRESSES_FREE ();
364 if (uid_align)
365 {
366 free (uid_align);
367 uid_align = 0;
368 }
369 }
370
371 /* Obtain the current length of an insn. If branch shortening has been done,
372 get its actual length. Otherwise, use FALLBACK_FN to calculate the
373 length. */
374 static int
375 get_attr_length_1 (rtx insn, int (*fallback_fn) (rtx))
376 {
377 rtx body;
378 int i;
379 int length = 0;
380
381 if (!HAVE_ATTR_length)
382 return 0;
383
384 if (insn_lengths_max_uid > INSN_UID (insn))
385 return insn_lengths[INSN_UID (insn)];
386 else
387 switch (GET_CODE (insn))
388 {
389 case NOTE:
390 case BARRIER:
391 case CODE_LABEL:
392 case DEBUG_INSN:
393 return 0;
394
395 case CALL_INSN:
396 case JUMP_INSN:
397 length = fallback_fn (insn);
398 break;
399
400 case INSN:
401 body = PATTERN (insn);
402 if (GET_CODE (body) == USE || GET_CODE (body) == CLOBBER)
403 return 0;
404
405 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
406 length = asm_insn_count (body) * fallback_fn (insn);
407 else if (GET_CODE (body) == SEQUENCE)
408 for (i = 0; i < XVECLEN (body, 0); i++)
409 length += get_attr_length_1 (XVECEXP (body, 0, i), fallback_fn);
410 else
411 length = fallback_fn (insn);
412 break;
413
414 default:
415 break;
416 }
417
418 #ifdef ADJUST_INSN_LENGTH
419 ADJUST_INSN_LENGTH (insn, length);
420 #endif
421 return length;
422 }
423
424 /* Obtain the current length of an insn. If branch shortening has been done,
425 get its actual length. Otherwise, get its maximum length. */
426 int
427 get_attr_length (rtx insn)
428 {
429 return get_attr_length_1 (insn, insn_default_length);
430 }
431
432 /* Obtain the current length of an insn. If branch shortening has been done,
433 get its actual length. Otherwise, get its minimum length. */
434 int
435 get_attr_min_length (rtx insn)
436 {
437 return get_attr_length_1 (insn, insn_min_length);
438 }
439 \f
440 /* Code to handle alignment inside shorten_branches. */
441
442 /* Here is an explanation how the algorithm in align_fuzz can give
443 proper results:
444
445 Call a sequence of instructions beginning with alignment point X
446 and continuing until the next alignment point `block X'. When `X'
447 is used in an expression, it means the alignment value of the
448 alignment point.
449
450 Call the distance between the start of the first insn of block X, and
451 the end of the last insn of block X `IX', for the `inner size of X'.
452 This is clearly the sum of the instruction lengths.
453
454 Likewise with the next alignment-delimited block following X, which we
455 shall call block Y.
456
457 Call the distance between the start of the first insn of block X, and
458 the start of the first insn of block Y `OX', for the `outer size of X'.
459
460 The estimated padding is then OX - IX.
461
462 OX can be safely estimated as
463
464 if (X >= Y)
465 OX = round_up(IX, Y)
466 else
467 OX = round_up(IX, X) + Y - X
468
469 Clearly est(IX) >= real(IX), because that only depends on the
470 instruction lengths, and those being overestimated is a given.
471
472 Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so
473 we needn't worry about that when thinking about OX.
474
475 When X >= Y, the alignment provided by Y adds no uncertainty factor
476 for branch ranges starting before X, so we can just round what we have.
477 But when X < Y, we don't know anything about the, so to speak,
478 `middle bits', so we have to assume the worst when aligning up from an
479 address mod X to one mod Y, which is Y - X. */
480
481 #ifndef LABEL_ALIGN
482 #define LABEL_ALIGN(LABEL) align_labels_log
483 #endif
484
485 #ifndef LOOP_ALIGN
486 #define LOOP_ALIGN(LABEL) align_loops_log
487 #endif
488
489 #ifndef LABEL_ALIGN_AFTER_BARRIER
490 #define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0
491 #endif
492
493 #ifndef JUMP_ALIGN
494 #define JUMP_ALIGN(LABEL) align_jumps_log
495 #endif
496
497 int
498 default_label_align_after_barrier_max_skip (rtx insn ATTRIBUTE_UNUSED)
499 {
500 return 0;
501 }
502
503 int
504 default_loop_align_max_skip (rtx insn ATTRIBUTE_UNUSED)
505 {
506 return align_loops_max_skip;
507 }
508
509 int
510 default_label_align_max_skip (rtx insn ATTRIBUTE_UNUSED)
511 {
512 return align_labels_max_skip;
513 }
514
515 int
516 default_jump_align_max_skip (rtx insn ATTRIBUTE_UNUSED)
517 {
518 return align_jumps_max_skip;
519 }
520
521 #ifndef ADDR_VEC_ALIGN
522 static int
523 final_addr_vec_align (rtx addr_vec)
524 {
525 int align = GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec)));
526
527 if (align > BIGGEST_ALIGNMENT / BITS_PER_UNIT)
528 align = BIGGEST_ALIGNMENT / BITS_PER_UNIT;
529 return exact_log2 (align);
530
531 }
532
533 #define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC)
534 #endif
535
536 #ifndef INSN_LENGTH_ALIGNMENT
537 #define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log
538 #endif
539
540 #define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)])
541
542 static int min_labelno, max_labelno;
543
544 #define LABEL_TO_ALIGNMENT(LABEL) \
545 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment)
546
547 #define LABEL_TO_MAX_SKIP(LABEL) \
548 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip)
549
550 /* For the benefit of port specific code do this also as a function. */
551
552 int
553 label_to_alignment (rtx label)
554 {
555 if (CODE_LABEL_NUMBER (label) <= max_labelno)
556 return LABEL_TO_ALIGNMENT (label);
557 return 0;
558 }
559
560 int
561 label_to_max_skip (rtx label)
562 {
563 if (CODE_LABEL_NUMBER (label) <= max_labelno)
564 return LABEL_TO_MAX_SKIP (label);
565 return 0;
566 }
567
568 /* The differences in addresses
569 between a branch and its target might grow or shrink depending on
570 the alignment the start insn of the range (the branch for a forward
571 branch or the label for a backward branch) starts out on; if these
572 differences are used naively, they can even oscillate infinitely.
573 We therefore want to compute a 'worst case' address difference that
574 is independent of the alignment the start insn of the range end
575 up on, and that is at least as large as the actual difference.
576 The function align_fuzz calculates the amount we have to add to the
577 naively computed difference, by traversing the part of the alignment
578 chain of the start insn of the range that is in front of the end insn
579 of the range, and considering for each alignment the maximum amount
580 that it might contribute to a size increase.
581
582 For casesi tables, we also want to know worst case minimum amounts of
583 address difference, in case a machine description wants to introduce
584 some common offset that is added to all offsets in a table.
585 For this purpose, align_fuzz with a growth argument of 0 computes the
586 appropriate adjustment. */
587
588 /* Compute the maximum delta by which the difference of the addresses of
589 START and END might grow / shrink due to a different address for start
590 which changes the size of alignment insns between START and END.
591 KNOWN_ALIGN_LOG is the alignment known for START.
592 GROWTH should be ~0 if the objective is to compute potential code size
593 increase, and 0 if the objective is to compute potential shrink.
594 The return value is undefined for any other value of GROWTH. */
595
596 static int
597 align_fuzz (rtx start, rtx end, int known_align_log, unsigned int growth)
598 {
599 int uid = INSN_UID (start);
600 rtx align_label;
601 int known_align = 1 << known_align_log;
602 int end_shuid = INSN_SHUID (end);
603 int fuzz = 0;
604
605 for (align_label = uid_align[uid]; align_label; align_label = uid_align[uid])
606 {
607 int align_addr, new_align;
608
609 uid = INSN_UID (align_label);
610 align_addr = INSN_ADDRESSES (uid) - insn_lengths[uid];
611 if (uid_shuid[uid] > end_shuid)
612 break;
613 known_align_log = LABEL_TO_ALIGNMENT (align_label);
614 new_align = 1 << known_align_log;
615 if (new_align < known_align)
616 continue;
617 fuzz += (-align_addr ^ growth) & (new_align - known_align);
618 known_align = new_align;
619 }
620 return fuzz;
621 }
622
623 /* Compute a worst-case reference address of a branch so that it
624 can be safely used in the presence of aligned labels. Since the
625 size of the branch itself is unknown, the size of the branch is
626 not included in the range. I.e. for a forward branch, the reference
627 address is the end address of the branch as known from the previous
628 branch shortening pass, minus a value to account for possible size
629 increase due to alignment. For a backward branch, it is the start
630 address of the branch as known from the current pass, plus a value
631 to account for possible size increase due to alignment.
632 NB.: Therefore, the maximum offset allowed for backward branches needs
633 to exclude the branch size. */
634
635 int
636 insn_current_reference_address (rtx branch)
637 {
638 rtx dest, seq;
639 int seq_uid;
640
641 if (! INSN_ADDRESSES_SET_P ())
642 return 0;
643
644 seq = NEXT_INSN (PREV_INSN (branch));
645 seq_uid = INSN_UID (seq);
646 if (!JUMP_P (branch))
647 /* This can happen for example on the PA; the objective is to know the
648 offset to address something in front of the start of the function.
649 Thus, we can treat it like a backward branch.
650 We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than
651 any alignment we'd encounter, so we skip the call to align_fuzz. */
652 return insn_current_address;
653 dest = JUMP_LABEL (branch);
654
655 /* BRANCH has no proper alignment chain set, so use SEQ.
656 BRANCH also has no INSN_SHUID. */
657 if (INSN_SHUID (seq) < INSN_SHUID (dest))
658 {
659 /* Forward branch. */
660 return (insn_last_address + insn_lengths[seq_uid]
661 - align_fuzz (seq, dest, length_unit_log, ~0));
662 }
663 else
664 {
665 /* Backward branch. */
666 return (insn_current_address
667 + align_fuzz (dest, seq, length_unit_log, ~0));
668 }
669 }
670 \f
671 /* Compute branch alignments based on frequency information in the
672 CFG. */
673
674 unsigned int
675 compute_alignments (void)
676 {
677 int log, max_skip, max_log;
678 basic_block bb;
679 int freq_max = 0;
680 int freq_threshold = 0;
681
682 if (label_align)
683 {
684 free (label_align);
685 label_align = 0;
686 }
687
688 max_labelno = max_label_num ();
689 min_labelno = get_first_label_num ();
690 label_align = XCNEWVEC (struct label_alignment, max_labelno - min_labelno + 1);
691
692 /* If not optimizing or optimizing for size, don't assign any alignments. */
693 if (! optimize || optimize_function_for_size_p (cfun))
694 return 0;
695
696 if (dump_file)
697 {
698 dump_reg_info (dump_file);
699 dump_flow_info (dump_file, TDF_DETAILS);
700 flow_loops_dump (dump_file, NULL, 1);
701 }
702 loop_optimizer_init (AVOID_CFG_MODIFICATIONS);
703 FOR_EACH_BB_FN (bb, cfun)
704 if (bb->frequency > freq_max)
705 freq_max = bb->frequency;
706 freq_threshold = freq_max / PARAM_VALUE (PARAM_ALIGN_THRESHOLD);
707
708 if (dump_file)
709 fprintf (dump_file, "freq_max: %i\n",freq_max);
710 FOR_EACH_BB_FN (bb, cfun)
711 {
712 rtx label = BB_HEAD (bb);
713 int fallthru_frequency = 0, branch_frequency = 0, has_fallthru = 0;
714 edge e;
715 edge_iterator ei;
716
717 if (!LABEL_P (label)
718 || optimize_bb_for_size_p (bb))
719 {
720 if (dump_file)
721 fprintf (dump_file,
722 "BB %4i freq %4i loop %2i loop_depth %2i skipped.\n",
723 bb->index, bb->frequency, bb->loop_father->num,
724 bb_loop_depth (bb));
725 continue;
726 }
727 max_log = LABEL_ALIGN (label);
728 max_skip = targetm.asm_out.label_align_max_skip (label);
729
730 FOR_EACH_EDGE (e, ei, bb->preds)
731 {
732 if (e->flags & EDGE_FALLTHRU)
733 has_fallthru = 1, fallthru_frequency += EDGE_FREQUENCY (e);
734 else
735 branch_frequency += EDGE_FREQUENCY (e);
736 }
737 if (dump_file)
738 {
739 fprintf (dump_file, "BB %4i freq %4i loop %2i loop_depth"
740 " %2i fall %4i branch %4i",
741 bb->index, bb->frequency, bb->loop_father->num,
742 bb_loop_depth (bb),
743 fallthru_frequency, branch_frequency);
744 if (!bb->loop_father->inner && bb->loop_father->num)
745 fprintf (dump_file, " inner_loop");
746 if (bb->loop_father->header == bb)
747 fprintf (dump_file, " loop_header");
748 fprintf (dump_file, "\n");
749 }
750
751 /* There are two purposes to align block with no fallthru incoming edge:
752 1) to avoid fetch stalls when branch destination is near cache boundary
753 2) to improve cache efficiency in case the previous block is not executed
754 (so it does not need to be in the cache).
755
756 We to catch first case, we align frequently executed blocks.
757 To catch the second, we align blocks that are executed more frequently
758 than the predecessor and the predecessor is likely to not be executed
759 when function is called. */
760
761 if (!has_fallthru
762 && (branch_frequency > freq_threshold
763 || (bb->frequency > bb->prev_bb->frequency * 10
764 && (bb->prev_bb->frequency
765 <= ENTRY_BLOCK_PTR_FOR_FN (cfun)->frequency / 2))))
766 {
767 log = JUMP_ALIGN (label);
768 if (dump_file)
769 fprintf (dump_file, " jump alignment added.\n");
770 if (max_log < log)
771 {
772 max_log = log;
773 max_skip = targetm.asm_out.jump_align_max_skip (label);
774 }
775 }
776 /* In case block is frequent and reached mostly by non-fallthru edge,
777 align it. It is most likely a first block of loop. */
778 if (has_fallthru
779 && !(single_succ_p (bb)
780 && single_succ (bb) == EXIT_BLOCK_PTR_FOR_FN (cfun))
781 && optimize_bb_for_speed_p (bb)
782 && branch_frequency + fallthru_frequency > freq_threshold
783 && (branch_frequency
784 > fallthru_frequency * PARAM_VALUE (PARAM_ALIGN_LOOP_ITERATIONS)))
785 {
786 log = LOOP_ALIGN (label);
787 if (dump_file)
788 fprintf (dump_file, " internal loop alignment added.\n");
789 if (max_log < log)
790 {
791 max_log = log;
792 max_skip = targetm.asm_out.loop_align_max_skip (label);
793 }
794 }
795 LABEL_TO_ALIGNMENT (label) = max_log;
796 LABEL_TO_MAX_SKIP (label) = max_skip;
797 }
798
799 loop_optimizer_finalize ();
800 free_dominance_info (CDI_DOMINATORS);
801 return 0;
802 }
803
804 /* Grow the LABEL_ALIGN array after new labels are created. */
805
806 static void
807 grow_label_align (void)
808 {
809 int old = max_labelno;
810 int n_labels;
811 int n_old_labels;
812
813 max_labelno = max_label_num ();
814
815 n_labels = max_labelno - min_labelno + 1;
816 n_old_labels = old - min_labelno + 1;
817
818 label_align = XRESIZEVEC (struct label_alignment, label_align, n_labels);
819
820 /* Range of labels grows monotonically in the function. Failing here
821 means that the initialization of array got lost. */
822 gcc_assert (n_old_labels <= n_labels);
823
824 memset (label_align + n_old_labels, 0,
825 (n_labels - n_old_labels) * sizeof (struct label_alignment));
826 }
827
828 /* Update the already computed alignment information. LABEL_PAIRS is a vector
829 made up of pairs of labels for which the alignment information of the first
830 element will be copied from that of the second element. */
831
832 void
833 update_alignments (vec<rtx> &label_pairs)
834 {
835 unsigned int i = 0;
836 rtx iter, label = NULL_RTX;
837
838 if (max_labelno != max_label_num ())
839 grow_label_align ();
840
841 FOR_EACH_VEC_ELT (label_pairs, i, iter)
842 if (i & 1)
843 {
844 LABEL_TO_ALIGNMENT (label) = LABEL_TO_ALIGNMENT (iter);
845 LABEL_TO_MAX_SKIP (label) = LABEL_TO_MAX_SKIP (iter);
846 }
847 else
848 label = iter;
849 }
850
851 namespace {
852
853 const pass_data pass_data_compute_alignments =
854 {
855 RTL_PASS, /* type */
856 "alignments", /* name */
857 OPTGROUP_NONE, /* optinfo_flags */
858 true, /* has_execute */
859 TV_NONE, /* tv_id */
860 0, /* properties_required */
861 0, /* properties_provided */
862 0, /* properties_destroyed */
863 0, /* todo_flags_start */
864 0, /* todo_flags_finish */
865 };
866
867 class pass_compute_alignments : public rtl_opt_pass
868 {
869 public:
870 pass_compute_alignments (gcc::context *ctxt)
871 : rtl_opt_pass (pass_data_compute_alignments, ctxt)
872 {}
873
874 /* opt_pass methods: */
875 virtual unsigned int execute (function *) { return compute_alignments (); }
876
877 }; // class pass_compute_alignments
878
879 } // anon namespace
880
881 rtl_opt_pass *
882 make_pass_compute_alignments (gcc::context *ctxt)
883 {
884 return new pass_compute_alignments (ctxt);
885 }
886
887 \f
888 /* Make a pass over all insns and compute their actual lengths by shortening
889 any branches of variable length if possible. */
890
891 /* shorten_branches might be called multiple times: for example, the SH
892 port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG.
893 In order to do this, it needs proper length information, which it obtains
894 by calling shorten_branches. This cannot be collapsed with
895 shorten_branches itself into a single pass unless we also want to integrate
896 reorg.c, since the branch splitting exposes new instructions with delay
897 slots. */
898
899 void
900 shorten_branches (rtx first)
901 {
902 rtx insn;
903 int max_uid;
904 int i;
905 int max_log;
906 int max_skip;
907 #define MAX_CODE_ALIGN 16
908 rtx seq;
909 int something_changed = 1;
910 char *varying_length;
911 rtx body;
912 int uid;
913 rtx align_tab[MAX_CODE_ALIGN];
914
915 /* Compute maximum UID and allocate label_align / uid_shuid. */
916 max_uid = get_max_uid ();
917
918 /* Free uid_shuid before reallocating it. */
919 free (uid_shuid);
920
921 uid_shuid = XNEWVEC (int, max_uid);
922
923 if (max_labelno != max_label_num ())
924 grow_label_align ();
925
926 /* Initialize label_align and set up uid_shuid to be strictly
927 monotonically rising with insn order. */
928 /* We use max_log here to keep track of the maximum alignment we want to
929 impose on the next CODE_LABEL (or the current one if we are processing
930 the CODE_LABEL itself). */
931
932 max_log = 0;
933 max_skip = 0;
934
935 for (insn = get_insns (), i = 1; insn; insn = NEXT_INSN (insn))
936 {
937 int log;
938
939 INSN_SHUID (insn) = i++;
940 if (INSN_P (insn))
941 continue;
942
943 if (LABEL_P (insn))
944 {
945 rtx next;
946 bool next_is_jumptable;
947
948 /* Merge in alignments computed by compute_alignments. */
949 log = LABEL_TO_ALIGNMENT (insn);
950 if (max_log < log)
951 {
952 max_log = log;
953 max_skip = LABEL_TO_MAX_SKIP (insn);
954 }
955
956 next = next_nonnote_insn (insn);
957 next_is_jumptable = next && JUMP_TABLE_DATA_P (next);
958 if (!next_is_jumptable)
959 {
960 log = LABEL_ALIGN (insn);
961 if (max_log < log)
962 {
963 max_log = log;
964 max_skip = targetm.asm_out.label_align_max_skip (insn);
965 }
966 }
967 /* ADDR_VECs only take room if read-only data goes into the text
968 section. */
969 if ((JUMP_TABLES_IN_TEXT_SECTION
970 || readonly_data_section == text_section)
971 && next_is_jumptable)
972 {
973 log = ADDR_VEC_ALIGN (next);
974 if (max_log < log)
975 {
976 max_log = log;
977 max_skip = targetm.asm_out.label_align_max_skip (insn);
978 }
979 }
980 LABEL_TO_ALIGNMENT (insn) = max_log;
981 LABEL_TO_MAX_SKIP (insn) = max_skip;
982 max_log = 0;
983 max_skip = 0;
984 }
985 else if (BARRIER_P (insn))
986 {
987 rtx label;
988
989 for (label = insn; label && ! INSN_P (label);
990 label = NEXT_INSN (label))
991 if (LABEL_P (label))
992 {
993 log = LABEL_ALIGN_AFTER_BARRIER (insn);
994 if (max_log < log)
995 {
996 max_log = log;
997 max_skip = targetm.asm_out.label_align_after_barrier_max_skip (label);
998 }
999 break;
1000 }
1001 }
1002 }
1003 if (!HAVE_ATTR_length)
1004 return;
1005
1006 /* Allocate the rest of the arrays. */
1007 insn_lengths = XNEWVEC (int, max_uid);
1008 insn_lengths_max_uid = max_uid;
1009 /* Syntax errors can lead to labels being outside of the main insn stream.
1010 Initialize insn_addresses, so that we get reproducible results. */
1011 INSN_ADDRESSES_ALLOC (max_uid);
1012
1013 varying_length = XCNEWVEC (char, max_uid);
1014
1015 /* Initialize uid_align. We scan instructions
1016 from end to start, and keep in align_tab[n] the last seen insn
1017 that does an alignment of at least n+1, i.e. the successor
1018 in the alignment chain for an insn that does / has a known
1019 alignment of n. */
1020 uid_align = XCNEWVEC (rtx, max_uid);
1021
1022 for (i = MAX_CODE_ALIGN; --i >= 0;)
1023 align_tab[i] = NULL_RTX;
1024 seq = get_last_insn ();
1025 for (; seq; seq = PREV_INSN (seq))
1026 {
1027 int uid = INSN_UID (seq);
1028 int log;
1029 log = (LABEL_P (seq) ? LABEL_TO_ALIGNMENT (seq) : 0);
1030 uid_align[uid] = align_tab[0];
1031 if (log)
1032 {
1033 /* Found an alignment label. */
1034 uid_align[uid] = align_tab[log];
1035 for (i = log - 1; i >= 0; i--)
1036 align_tab[i] = seq;
1037 }
1038 }
1039
1040 /* When optimizing, we start assuming minimum length, and keep increasing
1041 lengths as we find the need for this, till nothing changes.
1042 When not optimizing, we start assuming maximum lengths, and
1043 do a single pass to update the lengths. */
1044 bool increasing = optimize != 0;
1045
1046 #ifdef CASE_VECTOR_SHORTEN_MODE
1047 if (optimize)
1048 {
1049 /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum
1050 label fields. */
1051
1052 int min_shuid = INSN_SHUID (get_insns ()) - 1;
1053 int max_shuid = INSN_SHUID (get_last_insn ()) + 1;
1054 int rel;
1055
1056 for (insn = first; insn != 0; insn = NEXT_INSN (insn))
1057 {
1058 rtx min_lab = NULL_RTX, max_lab = NULL_RTX, pat;
1059 int len, i, min, max, insn_shuid;
1060 int min_align;
1061 addr_diff_vec_flags flags;
1062
1063 if (! JUMP_TABLE_DATA_P (insn)
1064 || GET_CODE (PATTERN (insn)) != ADDR_DIFF_VEC)
1065 continue;
1066 pat = PATTERN (insn);
1067 len = XVECLEN (pat, 1);
1068 gcc_assert (len > 0);
1069 min_align = MAX_CODE_ALIGN;
1070 for (min = max_shuid, max = min_shuid, i = len - 1; i >= 0; i--)
1071 {
1072 rtx lab = XEXP (XVECEXP (pat, 1, i), 0);
1073 int shuid = INSN_SHUID (lab);
1074 if (shuid < min)
1075 {
1076 min = shuid;
1077 min_lab = lab;
1078 }
1079 if (shuid > max)
1080 {
1081 max = shuid;
1082 max_lab = lab;
1083 }
1084 if (min_align > LABEL_TO_ALIGNMENT (lab))
1085 min_align = LABEL_TO_ALIGNMENT (lab);
1086 }
1087 XEXP (pat, 2) = gen_rtx_LABEL_REF (Pmode, min_lab);
1088 XEXP (pat, 3) = gen_rtx_LABEL_REF (Pmode, max_lab);
1089 insn_shuid = INSN_SHUID (insn);
1090 rel = INSN_SHUID (XEXP (XEXP (pat, 0), 0));
1091 memset (&flags, 0, sizeof (flags));
1092 flags.min_align = min_align;
1093 flags.base_after_vec = rel > insn_shuid;
1094 flags.min_after_vec = min > insn_shuid;
1095 flags.max_after_vec = max > insn_shuid;
1096 flags.min_after_base = min > rel;
1097 flags.max_after_base = max > rel;
1098 ADDR_DIFF_VEC_FLAGS (pat) = flags;
1099
1100 if (increasing)
1101 PUT_MODE (pat, CASE_VECTOR_SHORTEN_MODE (0, 0, pat));
1102 }
1103 }
1104 #endif /* CASE_VECTOR_SHORTEN_MODE */
1105
1106 /* Compute initial lengths, addresses, and varying flags for each insn. */
1107 int (*length_fun) (rtx) = increasing ? insn_min_length : insn_default_length;
1108
1109 for (insn_current_address = 0, insn = first;
1110 insn != 0;
1111 insn_current_address += insn_lengths[uid], insn = NEXT_INSN (insn))
1112 {
1113 uid = INSN_UID (insn);
1114
1115 insn_lengths[uid] = 0;
1116
1117 if (LABEL_P (insn))
1118 {
1119 int log = LABEL_TO_ALIGNMENT (insn);
1120 if (log)
1121 {
1122 int align = 1 << log;
1123 int new_address = (insn_current_address + align - 1) & -align;
1124 insn_lengths[uid] = new_address - insn_current_address;
1125 }
1126 }
1127
1128 INSN_ADDRESSES (uid) = insn_current_address + insn_lengths[uid];
1129
1130 if (NOTE_P (insn) || BARRIER_P (insn)
1131 || LABEL_P (insn) || DEBUG_INSN_P (insn))
1132 continue;
1133 if (INSN_DELETED_P (insn))
1134 continue;
1135
1136 body = PATTERN (insn);
1137 if (JUMP_TABLE_DATA_P (insn))
1138 {
1139 /* This only takes room if read-only data goes into the text
1140 section. */
1141 if (JUMP_TABLES_IN_TEXT_SECTION
1142 || readonly_data_section == text_section)
1143 insn_lengths[uid] = (XVECLEN (body,
1144 GET_CODE (body) == ADDR_DIFF_VEC)
1145 * GET_MODE_SIZE (GET_MODE (body)));
1146 /* Alignment is handled by ADDR_VEC_ALIGN. */
1147 }
1148 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
1149 insn_lengths[uid] = asm_insn_count (body) * insn_default_length (insn);
1150 else if (GET_CODE (body) == SEQUENCE)
1151 {
1152 int i;
1153 int const_delay_slots;
1154 #ifdef DELAY_SLOTS
1155 const_delay_slots = const_num_delay_slots (XVECEXP (body, 0, 0));
1156 #else
1157 const_delay_slots = 0;
1158 #endif
1159 int (*inner_length_fun) (rtx)
1160 = const_delay_slots ? length_fun : insn_default_length;
1161 /* Inside a delay slot sequence, we do not do any branch shortening
1162 if the shortening could change the number of delay slots
1163 of the branch. */
1164 for (i = 0; i < XVECLEN (body, 0); i++)
1165 {
1166 rtx inner_insn = XVECEXP (body, 0, i);
1167 int inner_uid = INSN_UID (inner_insn);
1168 int inner_length;
1169
1170 if (GET_CODE (body) == ASM_INPUT
1171 || asm_noperands (PATTERN (XVECEXP (body, 0, i))) >= 0)
1172 inner_length = (asm_insn_count (PATTERN (inner_insn))
1173 * insn_default_length (inner_insn));
1174 else
1175 inner_length = inner_length_fun (inner_insn);
1176
1177 insn_lengths[inner_uid] = inner_length;
1178 if (const_delay_slots)
1179 {
1180 if ((varying_length[inner_uid]
1181 = insn_variable_length_p (inner_insn)) != 0)
1182 varying_length[uid] = 1;
1183 INSN_ADDRESSES (inner_uid) = (insn_current_address
1184 + insn_lengths[uid]);
1185 }
1186 else
1187 varying_length[inner_uid] = 0;
1188 insn_lengths[uid] += inner_length;
1189 }
1190 }
1191 else if (GET_CODE (body) != USE && GET_CODE (body) != CLOBBER)
1192 {
1193 insn_lengths[uid] = length_fun (insn);
1194 varying_length[uid] = insn_variable_length_p (insn);
1195 }
1196
1197 /* If needed, do any adjustment. */
1198 #ifdef ADJUST_INSN_LENGTH
1199 ADJUST_INSN_LENGTH (insn, insn_lengths[uid]);
1200 if (insn_lengths[uid] < 0)
1201 fatal_insn ("negative insn length", insn);
1202 #endif
1203 }
1204
1205 /* Now loop over all the insns finding varying length insns. For each,
1206 get the current insn length. If it has changed, reflect the change.
1207 When nothing changes for a full pass, we are done. */
1208
1209 while (something_changed)
1210 {
1211 something_changed = 0;
1212 insn_current_align = MAX_CODE_ALIGN - 1;
1213 for (insn_current_address = 0, insn = first;
1214 insn != 0;
1215 insn = NEXT_INSN (insn))
1216 {
1217 int new_length;
1218 #ifdef ADJUST_INSN_LENGTH
1219 int tmp_length;
1220 #endif
1221 int length_align;
1222
1223 uid = INSN_UID (insn);
1224
1225 if (LABEL_P (insn))
1226 {
1227 int log = LABEL_TO_ALIGNMENT (insn);
1228
1229 #ifdef CASE_VECTOR_SHORTEN_MODE
1230 /* If the mode of a following jump table was changed, we
1231 may need to update the alignment of this label. */
1232 rtx next;
1233 bool next_is_jumptable;
1234
1235 next = next_nonnote_insn (insn);
1236 next_is_jumptable = next && JUMP_TABLE_DATA_P (next);
1237 if ((JUMP_TABLES_IN_TEXT_SECTION
1238 || readonly_data_section == text_section)
1239 && next_is_jumptable)
1240 {
1241 int newlog = ADDR_VEC_ALIGN (next);
1242 if (newlog != log)
1243 {
1244 log = newlog;
1245 LABEL_TO_ALIGNMENT (insn) = log;
1246 something_changed = 1;
1247 }
1248 }
1249 #endif
1250
1251 if (log > insn_current_align)
1252 {
1253 int align = 1 << log;
1254 int new_address= (insn_current_address + align - 1) & -align;
1255 insn_lengths[uid] = new_address - insn_current_address;
1256 insn_current_align = log;
1257 insn_current_address = new_address;
1258 }
1259 else
1260 insn_lengths[uid] = 0;
1261 INSN_ADDRESSES (uid) = insn_current_address;
1262 continue;
1263 }
1264
1265 length_align = INSN_LENGTH_ALIGNMENT (insn);
1266 if (length_align < insn_current_align)
1267 insn_current_align = length_align;
1268
1269 insn_last_address = INSN_ADDRESSES (uid);
1270 INSN_ADDRESSES (uid) = insn_current_address;
1271
1272 #ifdef CASE_VECTOR_SHORTEN_MODE
1273 if (optimize
1274 && JUMP_TABLE_DATA_P (insn)
1275 && GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
1276 {
1277 rtx body = PATTERN (insn);
1278 int old_length = insn_lengths[uid];
1279 rtx rel_lab = XEXP (XEXP (body, 0), 0);
1280 rtx min_lab = XEXP (XEXP (body, 2), 0);
1281 rtx max_lab = XEXP (XEXP (body, 3), 0);
1282 int rel_addr = INSN_ADDRESSES (INSN_UID (rel_lab));
1283 int min_addr = INSN_ADDRESSES (INSN_UID (min_lab));
1284 int max_addr = INSN_ADDRESSES (INSN_UID (max_lab));
1285 rtx prev;
1286 int rel_align = 0;
1287 addr_diff_vec_flags flags;
1288 enum machine_mode vec_mode;
1289
1290 /* Avoid automatic aggregate initialization. */
1291 flags = ADDR_DIFF_VEC_FLAGS (body);
1292
1293 /* Try to find a known alignment for rel_lab. */
1294 for (prev = rel_lab;
1295 prev
1296 && ! insn_lengths[INSN_UID (prev)]
1297 && ! (varying_length[INSN_UID (prev)] & 1);
1298 prev = PREV_INSN (prev))
1299 if (varying_length[INSN_UID (prev)] & 2)
1300 {
1301 rel_align = LABEL_TO_ALIGNMENT (prev);
1302 break;
1303 }
1304
1305 /* See the comment on addr_diff_vec_flags in rtl.h for the
1306 meaning of the flags values. base: REL_LAB vec: INSN */
1307 /* Anything after INSN has still addresses from the last
1308 pass; adjust these so that they reflect our current
1309 estimate for this pass. */
1310 if (flags.base_after_vec)
1311 rel_addr += insn_current_address - insn_last_address;
1312 if (flags.min_after_vec)
1313 min_addr += insn_current_address - insn_last_address;
1314 if (flags.max_after_vec)
1315 max_addr += insn_current_address - insn_last_address;
1316 /* We want to know the worst case, i.e. lowest possible value
1317 for the offset of MIN_LAB. If MIN_LAB is after REL_LAB,
1318 its offset is positive, and we have to be wary of code shrink;
1319 otherwise, it is negative, and we have to be vary of code
1320 size increase. */
1321 if (flags.min_after_base)
1322 {
1323 /* If INSN is between REL_LAB and MIN_LAB, the size
1324 changes we are about to make can change the alignment
1325 within the observed offset, therefore we have to break
1326 it up into two parts that are independent. */
1327 if (! flags.base_after_vec && flags.min_after_vec)
1328 {
1329 min_addr -= align_fuzz (rel_lab, insn, rel_align, 0);
1330 min_addr -= align_fuzz (insn, min_lab, 0, 0);
1331 }
1332 else
1333 min_addr -= align_fuzz (rel_lab, min_lab, rel_align, 0);
1334 }
1335 else
1336 {
1337 if (flags.base_after_vec && ! flags.min_after_vec)
1338 {
1339 min_addr -= align_fuzz (min_lab, insn, 0, ~0);
1340 min_addr -= align_fuzz (insn, rel_lab, 0, ~0);
1341 }
1342 else
1343 min_addr -= align_fuzz (min_lab, rel_lab, 0, ~0);
1344 }
1345 /* Likewise, determine the highest lowest possible value
1346 for the offset of MAX_LAB. */
1347 if (flags.max_after_base)
1348 {
1349 if (! flags.base_after_vec && flags.max_after_vec)
1350 {
1351 max_addr += align_fuzz (rel_lab, insn, rel_align, ~0);
1352 max_addr += align_fuzz (insn, max_lab, 0, ~0);
1353 }
1354 else
1355 max_addr += align_fuzz (rel_lab, max_lab, rel_align, ~0);
1356 }
1357 else
1358 {
1359 if (flags.base_after_vec && ! flags.max_after_vec)
1360 {
1361 max_addr += align_fuzz (max_lab, insn, 0, 0);
1362 max_addr += align_fuzz (insn, rel_lab, 0, 0);
1363 }
1364 else
1365 max_addr += align_fuzz (max_lab, rel_lab, 0, 0);
1366 }
1367 vec_mode = CASE_VECTOR_SHORTEN_MODE (min_addr - rel_addr,
1368 max_addr - rel_addr, body);
1369 if (!increasing
1370 || (GET_MODE_SIZE (vec_mode)
1371 >= GET_MODE_SIZE (GET_MODE (body))))
1372 PUT_MODE (body, vec_mode);
1373 if (JUMP_TABLES_IN_TEXT_SECTION
1374 || readonly_data_section == text_section)
1375 {
1376 insn_lengths[uid]
1377 = (XVECLEN (body, 1) * GET_MODE_SIZE (GET_MODE (body)));
1378 insn_current_address += insn_lengths[uid];
1379 if (insn_lengths[uid] != old_length)
1380 something_changed = 1;
1381 }
1382
1383 continue;
1384 }
1385 #endif /* CASE_VECTOR_SHORTEN_MODE */
1386
1387 if (! (varying_length[uid]))
1388 {
1389 if (NONJUMP_INSN_P (insn)
1390 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1391 {
1392 int i;
1393
1394 body = PATTERN (insn);
1395 for (i = 0; i < XVECLEN (body, 0); i++)
1396 {
1397 rtx inner_insn = XVECEXP (body, 0, i);
1398 int inner_uid = INSN_UID (inner_insn);
1399
1400 INSN_ADDRESSES (inner_uid) = insn_current_address;
1401
1402 insn_current_address += insn_lengths[inner_uid];
1403 }
1404 }
1405 else
1406 insn_current_address += insn_lengths[uid];
1407
1408 continue;
1409 }
1410
1411 if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
1412 {
1413 int i;
1414
1415 body = PATTERN (insn);
1416 new_length = 0;
1417 for (i = 0; i < XVECLEN (body, 0); i++)
1418 {
1419 rtx inner_insn = XVECEXP (body, 0, i);
1420 int inner_uid = INSN_UID (inner_insn);
1421 int inner_length;
1422
1423 INSN_ADDRESSES (inner_uid) = insn_current_address;
1424
1425 /* insn_current_length returns 0 for insns with a
1426 non-varying length. */
1427 if (! varying_length[inner_uid])
1428 inner_length = insn_lengths[inner_uid];
1429 else
1430 inner_length = insn_current_length (inner_insn);
1431
1432 if (inner_length != insn_lengths[inner_uid])
1433 {
1434 if (!increasing || inner_length > insn_lengths[inner_uid])
1435 {
1436 insn_lengths[inner_uid] = inner_length;
1437 something_changed = 1;
1438 }
1439 else
1440 inner_length = insn_lengths[inner_uid];
1441 }
1442 insn_current_address += inner_length;
1443 new_length += inner_length;
1444 }
1445 }
1446 else
1447 {
1448 new_length = insn_current_length (insn);
1449 insn_current_address += new_length;
1450 }
1451
1452 #ifdef ADJUST_INSN_LENGTH
1453 /* If needed, do any adjustment. */
1454 tmp_length = new_length;
1455 ADJUST_INSN_LENGTH (insn, new_length);
1456 insn_current_address += (new_length - tmp_length);
1457 #endif
1458
1459 if (new_length != insn_lengths[uid]
1460 && (!increasing || new_length > insn_lengths[uid]))
1461 {
1462 insn_lengths[uid] = new_length;
1463 something_changed = 1;
1464 }
1465 else
1466 insn_current_address += insn_lengths[uid] - new_length;
1467 }
1468 /* For a non-optimizing compile, do only a single pass. */
1469 if (!increasing)
1470 break;
1471 }
1472
1473 free (varying_length);
1474 }
1475
1476 /* Given the body of an INSN known to be generated by an ASM statement, return
1477 the number of machine instructions likely to be generated for this insn.
1478 This is used to compute its length. */
1479
1480 static int
1481 asm_insn_count (rtx body)
1482 {
1483 const char *templ;
1484
1485 if (GET_CODE (body) == ASM_INPUT)
1486 templ = XSTR (body, 0);
1487 else
1488 templ = decode_asm_operands (body, NULL, NULL, NULL, NULL, NULL);
1489
1490 return asm_str_count (templ);
1491 }
1492
1493 /* Return the number of machine instructions likely to be generated for the
1494 inline-asm template. */
1495 int
1496 asm_str_count (const char *templ)
1497 {
1498 int count = 1;
1499
1500 if (!*templ)
1501 return 0;
1502
1503 for (; *templ; templ++)
1504 if (IS_ASM_LOGICAL_LINE_SEPARATOR (*templ, templ)
1505 || *templ == '\n')
1506 count++;
1507
1508 return count;
1509 }
1510 \f
1511 /* ??? This is probably the wrong place for these. */
1512 /* Structure recording the mapping from source file and directory
1513 names at compile time to those to be embedded in debug
1514 information. */
1515 typedef struct debug_prefix_map
1516 {
1517 const char *old_prefix;
1518 const char *new_prefix;
1519 size_t old_len;
1520 size_t new_len;
1521 struct debug_prefix_map *next;
1522 } debug_prefix_map;
1523
1524 /* Linked list of such structures. */
1525 static debug_prefix_map *debug_prefix_maps;
1526
1527
1528 /* Record a debug file prefix mapping. ARG is the argument to
1529 -fdebug-prefix-map and must be of the form OLD=NEW. */
1530
1531 void
1532 add_debug_prefix_map (const char *arg)
1533 {
1534 debug_prefix_map *map;
1535 const char *p;
1536
1537 p = strchr (arg, '=');
1538 if (!p)
1539 {
1540 error ("invalid argument %qs to -fdebug-prefix-map", arg);
1541 return;
1542 }
1543 map = XNEW (debug_prefix_map);
1544 map->old_prefix = xstrndup (arg, p - arg);
1545 map->old_len = p - arg;
1546 p++;
1547 map->new_prefix = xstrdup (p);
1548 map->new_len = strlen (p);
1549 map->next = debug_prefix_maps;
1550 debug_prefix_maps = map;
1551 }
1552
1553 /* Perform user-specified mapping of debug filename prefixes. Return
1554 the new name corresponding to FILENAME. */
1555
1556 const char *
1557 remap_debug_filename (const char *filename)
1558 {
1559 debug_prefix_map *map;
1560 char *s;
1561 const char *name;
1562 size_t name_len;
1563
1564 for (map = debug_prefix_maps; map; map = map->next)
1565 if (filename_ncmp (filename, map->old_prefix, map->old_len) == 0)
1566 break;
1567 if (!map)
1568 return filename;
1569 name = filename + map->old_len;
1570 name_len = strlen (name) + 1;
1571 s = (char *) alloca (name_len + map->new_len);
1572 memcpy (s, map->new_prefix, map->new_len);
1573 memcpy (s + map->new_len, name, name_len);
1574 return ggc_strdup (s);
1575 }
1576 \f
1577 /* Return true if DWARF2 debug info can be emitted for DECL. */
1578
1579 static bool
1580 dwarf2_debug_info_emitted_p (tree decl)
1581 {
1582 if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG)
1583 return false;
1584
1585 if (DECL_IGNORED_P (decl))
1586 return false;
1587
1588 return true;
1589 }
1590
1591 /* Return scope resulting from combination of S1 and S2. */
1592 static tree
1593 choose_inner_scope (tree s1, tree s2)
1594 {
1595 if (!s1)
1596 return s2;
1597 if (!s2)
1598 return s1;
1599 if (BLOCK_NUMBER (s1) > BLOCK_NUMBER (s2))
1600 return s1;
1601 return s2;
1602 }
1603
1604 /* Emit lexical block notes needed to change scope from S1 to S2. */
1605
1606 static void
1607 change_scope (rtx orig_insn, tree s1, tree s2)
1608 {
1609 rtx insn = orig_insn;
1610 tree com = NULL_TREE;
1611 tree ts1 = s1, ts2 = s2;
1612 tree s;
1613
1614 while (ts1 != ts2)
1615 {
1616 gcc_assert (ts1 && ts2);
1617 if (BLOCK_NUMBER (ts1) > BLOCK_NUMBER (ts2))
1618 ts1 = BLOCK_SUPERCONTEXT (ts1);
1619 else if (BLOCK_NUMBER (ts1) < BLOCK_NUMBER (ts2))
1620 ts2 = BLOCK_SUPERCONTEXT (ts2);
1621 else
1622 {
1623 ts1 = BLOCK_SUPERCONTEXT (ts1);
1624 ts2 = BLOCK_SUPERCONTEXT (ts2);
1625 }
1626 }
1627 com = ts1;
1628
1629 /* Close scopes. */
1630 s = s1;
1631 while (s != com)
1632 {
1633 rtx note = emit_note_before (NOTE_INSN_BLOCK_END, insn);
1634 NOTE_BLOCK (note) = s;
1635 s = BLOCK_SUPERCONTEXT (s);
1636 }
1637
1638 /* Open scopes. */
1639 s = s2;
1640 while (s != com)
1641 {
1642 insn = emit_note_before (NOTE_INSN_BLOCK_BEG, insn);
1643 NOTE_BLOCK (insn) = s;
1644 s = BLOCK_SUPERCONTEXT (s);
1645 }
1646 }
1647
1648 /* Rebuild all the NOTE_INSN_BLOCK_BEG and NOTE_INSN_BLOCK_END notes based
1649 on the scope tree and the newly reordered instructions. */
1650
1651 static void
1652 reemit_insn_block_notes (void)
1653 {
1654 tree cur_block = DECL_INITIAL (cfun->decl);
1655 rtx insn, note;
1656
1657 insn = get_insns ();
1658 for (; insn; insn = NEXT_INSN (insn))
1659 {
1660 tree this_block;
1661
1662 /* Prevent lexical blocks from straddling section boundaries. */
1663 if (NOTE_P (insn) && NOTE_KIND (insn) == NOTE_INSN_SWITCH_TEXT_SECTIONS)
1664 {
1665 for (tree s = cur_block; s != DECL_INITIAL (cfun->decl);
1666 s = BLOCK_SUPERCONTEXT (s))
1667 {
1668 rtx note = emit_note_before (NOTE_INSN_BLOCK_END, insn);
1669 NOTE_BLOCK (note) = s;
1670 note = emit_note_after (NOTE_INSN_BLOCK_BEG, insn);
1671 NOTE_BLOCK (note) = s;
1672 }
1673 }
1674
1675 if (!active_insn_p (insn))
1676 continue;
1677
1678 /* Avoid putting scope notes between jump table and its label. */
1679 if (JUMP_TABLE_DATA_P (insn))
1680 continue;
1681
1682 this_block = insn_scope (insn);
1683 /* For sequences compute scope resulting from merging all scopes
1684 of instructions nested inside. */
1685 if (GET_CODE (PATTERN (insn)) == SEQUENCE)
1686 {
1687 int i;
1688 rtx body = PATTERN (insn);
1689
1690 this_block = NULL;
1691 for (i = 0; i < XVECLEN (body, 0); i++)
1692 this_block = choose_inner_scope (this_block,
1693 insn_scope (XVECEXP (body, 0, i)));
1694 }
1695 if (! this_block)
1696 {
1697 if (INSN_LOCATION (insn) == UNKNOWN_LOCATION)
1698 continue;
1699 else
1700 this_block = DECL_INITIAL (cfun->decl);
1701 }
1702
1703 if (this_block != cur_block)
1704 {
1705 change_scope (insn, cur_block, this_block);
1706 cur_block = this_block;
1707 }
1708 }
1709
1710 /* change_scope emits before the insn, not after. */
1711 note = emit_note (NOTE_INSN_DELETED);
1712 change_scope (note, cur_block, DECL_INITIAL (cfun->decl));
1713 delete_insn (note);
1714
1715 reorder_blocks ();
1716 }
1717
1718 /* Output assembler code for the start of a function,
1719 and initialize some of the variables in this file
1720 for the new function. The label for the function and associated
1721 assembler pseudo-ops have already been output in `assemble_start_function'.
1722
1723 FIRST is the first insn of the rtl for the function being compiled.
1724 FILE is the file to write assembler code to.
1725 OPTIMIZE_P is nonzero if we should eliminate redundant
1726 test and compare insns. */
1727
1728 void
1729 final_start_function (rtx first, FILE *file,
1730 int optimize_p ATTRIBUTE_UNUSED)
1731 {
1732 block_depth = 0;
1733
1734 this_is_asm_operands = 0;
1735
1736 need_profile_function = false;
1737
1738 last_filename = LOCATION_FILE (prologue_location);
1739 last_linenum = LOCATION_LINE (prologue_location);
1740 last_discriminator = discriminator = 0;
1741
1742 high_block_linenum = high_function_linenum = last_linenum;
1743
1744 if (flag_sanitize & SANITIZE_ADDRESS)
1745 asan_function_start ();
1746
1747 if (!DECL_IGNORED_P (current_function_decl))
1748 debug_hooks->begin_prologue (last_linenum, last_filename);
1749
1750 if (!dwarf2_debug_info_emitted_p (current_function_decl))
1751 dwarf2out_begin_prologue (0, NULL);
1752
1753 #ifdef LEAF_REG_REMAP
1754 if (crtl->uses_only_leaf_regs)
1755 leaf_renumber_regs (first);
1756 #endif
1757
1758 /* The Sun386i and perhaps other machines don't work right
1759 if the profiling code comes after the prologue. */
1760 if (targetm.profile_before_prologue () && crtl->profile)
1761 {
1762 if (targetm.asm_out.function_prologue
1763 == default_function_pro_epilogue
1764 #ifdef HAVE_prologue
1765 && HAVE_prologue
1766 #endif
1767 )
1768 {
1769 rtx insn;
1770 for (insn = first; insn; insn = NEXT_INSN (insn))
1771 if (!NOTE_P (insn))
1772 {
1773 insn = NULL_RTX;
1774 break;
1775 }
1776 else if (NOTE_KIND (insn) == NOTE_INSN_BASIC_BLOCK
1777 || NOTE_KIND (insn) == NOTE_INSN_FUNCTION_BEG)
1778 break;
1779 else if (NOTE_KIND (insn) == NOTE_INSN_DELETED
1780 || NOTE_KIND (insn) == NOTE_INSN_VAR_LOCATION)
1781 continue;
1782 else
1783 {
1784 insn = NULL_RTX;
1785 break;
1786 }
1787
1788 if (insn)
1789 need_profile_function = true;
1790 else
1791 profile_function (file);
1792 }
1793 else
1794 profile_function (file);
1795 }
1796
1797 /* If debugging, assign block numbers to all of the blocks in this
1798 function. */
1799 if (write_symbols)
1800 {
1801 reemit_insn_block_notes ();
1802 number_blocks (current_function_decl);
1803 /* We never actually put out begin/end notes for the top-level
1804 block in the function. But, conceptually, that block is
1805 always needed. */
1806 TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl)) = 1;
1807 }
1808
1809 if (warn_frame_larger_than
1810 && get_frame_size () > frame_larger_than_size)
1811 {
1812 /* Issue a warning */
1813 warning (OPT_Wframe_larger_than_,
1814 "the frame size of %wd bytes is larger than %wd bytes",
1815 get_frame_size (), frame_larger_than_size);
1816 }
1817
1818 /* First output the function prologue: code to set up the stack frame. */
1819 targetm.asm_out.function_prologue (file, get_frame_size ());
1820
1821 /* If the machine represents the prologue as RTL, the profiling code must
1822 be emitted when NOTE_INSN_PROLOGUE_END is scanned. */
1823 #ifdef HAVE_prologue
1824 if (! HAVE_prologue)
1825 #endif
1826 profile_after_prologue (file);
1827 }
1828
1829 static void
1830 profile_after_prologue (FILE *file ATTRIBUTE_UNUSED)
1831 {
1832 if (!targetm.profile_before_prologue () && crtl->profile)
1833 profile_function (file);
1834 }
1835
1836 static void
1837 profile_function (FILE *file ATTRIBUTE_UNUSED)
1838 {
1839 #ifndef NO_PROFILE_COUNTERS
1840 # define NO_PROFILE_COUNTERS 0
1841 #endif
1842 #ifdef ASM_OUTPUT_REG_PUSH
1843 rtx sval = NULL, chain = NULL;
1844
1845 if (cfun->returns_struct)
1846 sval = targetm.calls.struct_value_rtx (TREE_TYPE (current_function_decl),
1847 true);
1848 if (cfun->static_chain_decl)
1849 chain = targetm.calls.static_chain (current_function_decl, true);
1850 #endif /* ASM_OUTPUT_REG_PUSH */
1851
1852 if (! NO_PROFILE_COUNTERS)
1853 {
1854 int align = MIN (BIGGEST_ALIGNMENT, LONG_TYPE_SIZE);
1855 switch_to_section (data_section);
1856 ASM_OUTPUT_ALIGN (file, floor_log2 (align / BITS_PER_UNIT));
1857 targetm.asm_out.internal_label (file, "LP", current_function_funcdef_no);
1858 assemble_integer (const0_rtx, LONG_TYPE_SIZE / BITS_PER_UNIT, align, 1);
1859 }
1860
1861 switch_to_section (current_function_section ());
1862
1863 #ifdef ASM_OUTPUT_REG_PUSH
1864 if (sval && REG_P (sval))
1865 ASM_OUTPUT_REG_PUSH (file, REGNO (sval));
1866 if (chain && REG_P (chain))
1867 ASM_OUTPUT_REG_PUSH (file, REGNO (chain));
1868 #endif
1869
1870 FUNCTION_PROFILER (file, current_function_funcdef_no);
1871
1872 #ifdef ASM_OUTPUT_REG_PUSH
1873 if (chain && REG_P (chain))
1874 ASM_OUTPUT_REG_POP (file, REGNO (chain));
1875 if (sval && REG_P (sval))
1876 ASM_OUTPUT_REG_POP (file, REGNO (sval));
1877 #endif
1878 }
1879
1880 /* Output assembler code for the end of a function.
1881 For clarity, args are same as those of `final_start_function'
1882 even though not all of them are needed. */
1883
1884 void
1885 final_end_function (void)
1886 {
1887 app_disable ();
1888
1889 if (!DECL_IGNORED_P (current_function_decl))
1890 debug_hooks->end_function (high_function_linenum);
1891
1892 /* Finally, output the function epilogue:
1893 code to restore the stack frame and return to the caller. */
1894 targetm.asm_out.function_epilogue (asm_out_file, get_frame_size ());
1895
1896 /* And debug output. */
1897 if (!DECL_IGNORED_P (current_function_decl))
1898 debug_hooks->end_epilogue (last_linenum, last_filename);
1899
1900 if (!dwarf2_debug_info_emitted_p (current_function_decl)
1901 && dwarf2out_do_frame ())
1902 dwarf2out_end_epilogue (last_linenum, last_filename);
1903 }
1904 \f
1905
1906 /* Dumper helper for basic block information. FILE is the assembly
1907 output file, and INSN is the instruction being emitted. */
1908
1909 static void
1910 dump_basic_block_info (FILE *file, rtx insn, basic_block *start_to_bb,
1911 basic_block *end_to_bb, int bb_map_size, int *bb_seqn)
1912 {
1913 basic_block bb;
1914
1915 if (!flag_debug_asm)
1916 return;
1917
1918 if (INSN_UID (insn) < bb_map_size
1919 && (bb = start_to_bb[INSN_UID (insn)]) != NULL)
1920 {
1921 edge e;
1922 edge_iterator ei;
1923
1924 fprintf (file, "%s BLOCK %d", ASM_COMMENT_START, bb->index);
1925 if (bb->frequency)
1926 fprintf (file, " freq:%d", bb->frequency);
1927 if (bb->count)
1928 fprintf (file, " count:%"PRId64,
1929 bb->count);
1930 fprintf (file, " seq:%d", (*bb_seqn)++);
1931 fprintf (file, "\n%s PRED:", ASM_COMMENT_START);
1932 FOR_EACH_EDGE (e, ei, bb->preds)
1933 {
1934 dump_edge_info (file, e, TDF_DETAILS, 0);
1935 }
1936 fprintf (file, "\n");
1937 }
1938 if (INSN_UID (insn) < bb_map_size
1939 && (bb = end_to_bb[INSN_UID (insn)]) != NULL)
1940 {
1941 edge e;
1942 edge_iterator ei;
1943
1944 fprintf (asm_out_file, "%s SUCC:", ASM_COMMENT_START);
1945 FOR_EACH_EDGE (e, ei, bb->succs)
1946 {
1947 dump_edge_info (asm_out_file, e, TDF_DETAILS, 1);
1948 }
1949 fprintf (file, "\n");
1950 }
1951 }
1952
1953 /* Output assembler code for some insns: all or part of a function.
1954 For description of args, see `final_start_function', above. */
1955
1956 void
1957 final (rtx first, FILE *file, int optimize_p)
1958 {
1959 rtx insn, next;
1960 int seen = 0;
1961
1962 /* Used for -dA dump. */
1963 basic_block *start_to_bb = NULL;
1964 basic_block *end_to_bb = NULL;
1965 int bb_map_size = 0;
1966 int bb_seqn = 0;
1967
1968 last_ignored_compare = 0;
1969
1970 #ifdef HAVE_cc0
1971 for (insn = first; insn; insn = NEXT_INSN (insn))
1972 {
1973 /* If CC tracking across branches is enabled, record the insn which
1974 jumps to each branch only reached from one place. */
1975 if (optimize_p && JUMP_P (insn))
1976 {
1977 rtx lab = JUMP_LABEL (insn);
1978 if (lab && LABEL_P (lab) && LABEL_NUSES (lab) == 1)
1979 {
1980 LABEL_REFS (lab) = insn;
1981 }
1982 }
1983 }
1984 #endif
1985
1986 init_recog ();
1987
1988 CC_STATUS_INIT;
1989
1990 if (flag_debug_asm)
1991 {
1992 basic_block bb;
1993
1994 bb_map_size = get_max_uid () + 1;
1995 start_to_bb = XCNEWVEC (basic_block, bb_map_size);
1996 end_to_bb = XCNEWVEC (basic_block, bb_map_size);
1997
1998 /* There is no cfg for a thunk. */
1999 if (!cfun->is_thunk)
2000 FOR_EACH_BB_REVERSE_FN (bb, cfun)
2001 {
2002 start_to_bb[INSN_UID (BB_HEAD (bb))] = bb;
2003 end_to_bb[INSN_UID (BB_END (bb))] = bb;
2004 }
2005 }
2006
2007 /* Output the insns. */
2008 for (insn = first; insn;)
2009 {
2010 if (HAVE_ATTR_length)
2011 {
2012 if ((unsigned) INSN_UID (insn) >= INSN_ADDRESSES_SIZE ())
2013 {
2014 /* This can be triggered by bugs elsewhere in the compiler if
2015 new insns are created after init_insn_lengths is called. */
2016 gcc_assert (NOTE_P (insn));
2017 insn_current_address = -1;
2018 }
2019 else
2020 insn_current_address = INSN_ADDRESSES (INSN_UID (insn));
2021 }
2022
2023 dump_basic_block_info (file, insn, start_to_bb, end_to_bb,
2024 bb_map_size, &bb_seqn);
2025 insn = final_scan_insn (insn, file, optimize_p, 0, &seen);
2026 }
2027
2028 if (flag_debug_asm)
2029 {
2030 free (start_to_bb);
2031 free (end_to_bb);
2032 }
2033
2034 /* Remove CFI notes, to avoid compare-debug failures. */
2035 for (insn = first; insn; insn = next)
2036 {
2037 next = NEXT_INSN (insn);
2038 if (NOTE_P (insn)
2039 && (NOTE_KIND (insn) == NOTE_INSN_CFI
2040 || NOTE_KIND (insn) == NOTE_INSN_CFI_LABEL))
2041 delete_insn (insn);
2042 }
2043 }
2044 \f
2045 const char *
2046 get_insn_template (int code, rtx insn)
2047 {
2048 switch (insn_data[code].output_format)
2049 {
2050 case INSN_OUTPUT_FORMAT_SINGLE:
2051 return insn_data[code].output.single;
2052 case INSN_OUTPUT_FORMAT_MULTI:
2053 return insn_data[code].output.multi[which_alternative];
2054 case INSN_OUTPUT_FORMAT_FUNCTION:
2055 gcc_assert (insn);
2056 return (*insn_data[code].output.function) (recog_data.operand, insn);
2057
2058 default:
2059 gcc_unreachable ();
2060 }
2061 }
2062
2063 /* Emit the appropriate declaration for an alternate-entry-point
2064 symbol represented by INSN, to FILE. INSN is a CODE_LABEL with
2065 LABEL_KIND != LABEL_NORMAL.
2066
2067 The case fall-through in this function is intentional. */
2068 static void
2069 output_alternate_entry_point (FILE *file, rtx insn)
2070 {
2071 const char *name = LABEL_NAME (insn);
2072
2073 switch (LABEL_KIND (insn))
2074 {
2075 case LABEL_WEAK_ENTRY:
2076 #ifdef ASM_WEAKEN_LABEL
2077 ASM_WEAKEN_LABEL (file, name);
2078 #endif
2079 case LABEL_GLOBAL_ENTRY:
2080 targetm.asm_out.globalize_label (file, name);
2081 case LABEL_STATIC_ENTRY:
2082 #ifdef ASM_OUTPUT_TYPE_DIRECTIVE
2083 ASM_OUTPUT_TYPE_DIRECTIVE (file, name, "function");
2084 #endif
2085 ASM_OUTPUT_LABEL (file, name);
2086 break;
2087
2088 case LABEL_NORMAL:
2089 default:
2090 gcc_unreachable ();
2091 }
2092 }
2093
2094 /* Given a CALL_INSN, find and return the nested CALL. */
2095 static rtx
2096 call_from_call_insn (rtx insn)
2097 {
2098 rtx x;
2099 gcc_assert (CALL_P (insn));
2100 x = PATTERN (insn);
2101
2102 while (GET_CODE (x) != CALL)
2103 {
2104 switch (GET_CODE (x))
2105 {
2106 default:
2107 gcc_unreachable ();
2108 case COND_EXEC:
2109 x = COND_EXEC_CODE (x);
2110 break;
2111 case PARALLEL:
2112 x = XVECEXP (x, 0, 0);
2113 break;
2114 case SET:
2115 x = XEXP (x, 1);
2116 break;
2117 }
2118 }
2119 return x;
2120 }
2121
2122 /* The final scan for one insn, INSN.
2123 Args are same as in `final', except that INSN
2124 is the insn being scanned.
2125 Value returned is the next insn to be scanned.
2126
2127 NOPEEPHOLES is the flag to disallow peephole processing (currently
2128 used for within delayed branch sequence output).
2129
2130 SEEN is used to track the end of the prologue, for emitting
2131 debug information. We force the emission of a line note after
2132 both NOTE_INSN_PROLOGUE_END and NOTE_INSN_FUNCTION_BEG. */
2133
2134 rtx
2135 final_scan_insn (rtx insn, FILE *file, int optimize_p ATTRIBUTE_UNUSED,
2136 int nopeepholes ATTRIBUTE_UNUSED, int *seen)
2137 {
2138 #ifdef HAVE_cc0
2139 rtx set;
2140 #endif
2141 rtx next;
2142
2143 insn_counter++;
2144
2145 /* Ignore deleted insns. These can occur when we split insns (due to a
2146 template of "#") while not optimizing. */
2147 if (INSN_DELETED_P (insn))
2148 return NEXT_INSN (insn);
2149
2150 switch (GET_CODE (insn))
2151 {
2152 case NOTE:
2153 switch (NOTE_KIND (insn))
2154 {
2155 case NOTE_INSN_DELETED:
2156 break;
2157
2158 case NOTE_INSN_SWITCH_TEXT_SECTIONS:
2159 in_cold_section_p = !in_cold_section_p;
2160
2161 if (dwarf2out_do_frame ())
2162 dwarf2out_switch_text_section ();
2163 else if (!DECL_IGNORED_P (current_function_decl))
2164 debug_hooks->switch_text_section ();
2165
2166 switch_to_section (current_function_section ());
2167 targetm.asm_out.function_switched_text_sections (asm_out_file,
2168 current_function_decl,
2169 in_cold_section_p);
2170 /* Emit a label for the split cold section. Form label name by
2171 suffixing "cold" to the original function's name. */
2172 if (in_cold_section_p)
2173 {
2174 tree cold_function_name
2175 = clone_function_name (current_function_decl, "cold");
2176 ASM_OUTPUT_LABEL (asm_out_file,
2177 IDENTIFIER_POINTER (cold_function_name));
2178 }
2179 break;
2180
2181 case NOTE_INSN_BASIC_BLOCK:
2182 if (need_profile_function)
2183 {
2184 profile_function (asm_out_file);
2185 need_profile_function = false;
2186 }
2187
2188 if (targetm.asm_out.unwind_emit)
2189 targetm.asm_out.unwind_emit (asm_out_file, insn);
2190
2191 discriminator = NOTE_BASIC_BLOCK (insn)->discriminator;
2192
2193 break;
2194
2195 case NOTE_INSN_EH_REGION_BEG:
2196 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHB",
2197 NOTE_EH_HANDLER (insn));
2198 break;
2199
2200 case NOTE_INSN_EH_REGION_END:
2201 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHE",
2202 NOTE_EH_HANDLER (insn));
2203 break;
2204
2205 case NOTE_INSN_PROLOGUE_END:
2206 targetm.asm_out.function_end_prologue (file);
2207 profile_after_prologue (file);
2208
2209 if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE)
2210 {
2211 *seen |= SEEN_EMITTED;
2212 force_source_line = true;
2213 }
2214 else
2215 *seen |= SEEN_NOTE;
2216
2217 break;
2218
2219 case NOTE_INSN_EPILOGUE_BEG:
2220 if (!DECL_IGNORED_P (current_function_decl))
2221 (*debug_hooks->begin_epilogue) (last_linenum, last_filename);
2222 targetm.asm_out.function_begin_epilogue (file);
2223 break;
2224
2225 case NOTE_INSN_CFI:
2226 dwarf2out_emit_cfi (NOTE_CFI (insn));
2227 break;
2228
2229 case NOTE_INSN_CFI_LABEL:
2230 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LCFI",
2231 NOTE_LABEL_NUMBER (insn));
2232 break;
2233
2234 case NOTE_INSN_FUNCTION_BEG:
2235 if (need_profile_function)
2236 {
2237 profile_function (asm_out_file);
2238 need_profile_function = false;
2239 }
2240
2241 app_disable ();
2242 if (!DECL_IGNORED_P (current_function_decl))
2243 debug_hooks->end_prologue (last_linenum, last_filename);
2244
2245 if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE)
2246 {
2247 *seen |= SEEN_EMITTED;
2248 force_source_line = true;
2249 }
2250 else
2251 *seen |= SEEN_NOTE;
2252
2253 break;
2254
2255 case NOTE_INSN_BLOCK_BEG:
2256 if (debug_info_level == DINFO_LEVEL_NORMAL
2257 || debug_info_level == DINFO_LEVEL_VERBOSE
2258 || write_symbols == DWARF2_DEBUG
2259 || write_symbols == VMS_AND_DWARF2_DEBUG
2260 || write_symbols == VMS_DEBUG)
2261 {
2262 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
2263
2264 app_disable ();
2265 ++block_depth;
2266 high_block_linenum = last_linenum;
2267
2268 /* Output debugging info about the symbol-block beginning. */
2269 if (!DECL_IGNORED_P (current_function_decl))
2270 debug_hooks->begin_block (last_linenum, n);
2271
2272 /* Mark this block as output. */
2273 TREE_ASM_WRITTEN (NOTE_BLOCK (insn)) = 1;
2274 }
2275 if (write_symbols == DBX_DEBUG
2276 || write_symbols == SDB_DEBUG)
2277 {
2278 location_t *locus_ptr
2279 = block_nonartificial_location (NOTE_BLOCK (insn));
2280
2281 if (locus_ptr != NULL)
2282 {
2283 override_filename = LOCATION_FILE (*locus_ptr);
2284 override_linenum = LOCATION_LINE (*locus_ptr);
2285 }
2286 }
2287 break;
2288
2289 case NOTE_INSN_BLOCK_END:
2290 if (debug_info_level == DINFO_LEVEL_NORMAL
2291 || debug_info_level == DINFO_LEVEL_VERBOSE
2292 || write_symbols == DWARF2_DEBUG
2293 || write_symbols == VMS_AND_DWARF2_DEBUG
2294 || write_symbols == VMS_DEBUG)
2295 {
2296 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
2297
2298 app_disable ();
2299
2300 /* End of a symbol-block. */
2301 --block_depth;
2302 gcc_assert (block_depth >= 0);
2303
2304 if (!DECL_IGNORED_P (current_function_decl))
2305 debug_hooks->end_block (high_block_linenum, n);
2306 }
2307 if (write_symbols == DBX_DEBUG
2308 || write_symbols == SDB_DEBUG)
2309 {
2310 tree outer_block = BLOCK_SUPERCONTEXT (NOTE_BLOCK (insn));
2311 location_t *locus_ptr
2312 = block_nonartificial_location (outer_block);
2313
2314 if (locus_ptr != NULL)
2315 {
2316 override_filename = LOCATION_FILE (*locus_ptr);
2317 override_linenum = LOCATION_LINE (*locus_ptr);
2318 }
2319 else
2320 {
2321 override_filename = NULL;
2322 override_linenum = 0;
2323 }
2324 }
2325 break;
2326
2327 case NOTE_INSN_DELETED_LABEL:
2328 /* Emit the label. We may have deleted the CODE_LABEL because
2329 the label could be proved to be unreachable, though still
2330 referenced (in the form of having its address taken. */
2331 ASM_OUTPUT_DEBUG_LABEL (file, "L", CODE_LABEL_NUMBER (insn));
2332 break;
2333
2334 case NOTE_INSN_DELETED_DEBUG_LABEL:
2335 /* Similarly, but need to use different namespace for it. */
2336 if (CODE_LABEL_NUMBER (insn) != -1)
2337 ASM_OUTPUT_DEBUG_LABEL (file, "LDL", CODE_LABEL_NUMBER (insn));
2338 break;
2339
2340 case NOTE_INSN_VAR_LOCATION:
2341 case NOTE_INSN_CALL_ARG_LOCATION:
2342 if (!DECL_IGNORED_P (current_function_decl))
2343 debug_hooks->var_location (insn);
2344 break;
2345
2346 default:
2347 gcc_unreachable ();
2348 break;
2349 }
2350 break;
2351
2352 case BARRIER:
2353 break;
2354
2355 case CODE_LABEL:
2356 /* The target port might emit labels in the output function for
2357 some insn, e.g. sh.c output_branchy_insn. */
2358 if (CODE_LABEL_NUMBER (insn) <= max_labelno)
2359 {
2360 int align = LABEL_TO_ALIGNMENT (insn);
2361 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2362 int max_skip = LABEL_TO_MAX_SKIP (insn);
2363 #endif
2364
2365 if (align && NEXT_INSN (insn))
2366 {
2367 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2368 ASM_OUTPUT_MAX_SKIP_ALIGN (file, align, max_skip);
2369 #else
2370 #ifdef ASM_OUTPUT_ALIGN_WITH_NOP
2371 ASM_OUTPUT_ALIGN_WITH_NOP (file, align);
2372 #else
2373 ASM_OUTPUT_ALIGN (file, align);
2374 #endif
2375 #endif
2376 }
2377 }
2378 CC_STATUS_INIT;
2379
2380 if (!DECL_IGNORED_P (current_function_decl) && LABEL_NAME (insn))
2381 debug_hooks->label (insn);
2382
2383 app_disable ();
2384
2385 next = next_nonnote_insn (insn);
2386 /* If this label is followed by a jump-table, make sure we put
2387 the label in the read-only section. Also possibly write the
2388 label and jump table together. */
2389 if (next != 0 && JUMP_TABLE_DATA_P (next))
2390 {
2391 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2392 /* In this case, the case vector is being moved by the
2393 target, so don't output the label at all. Leave that
2394 to the back end macros. */
2395 #else
2396 if (! JUMP_TABLES_IN_TEXT_SECTION)
2397 {
2398 int log_align;
2399
2400 switch_to_section (targetm.asm_out.function_rodata_section
2401 (current_function_decl));
2402
2403 #ifdef ADDR_VEC_ALIGN
2404 log_align = ADDR_VEC_ALIGN (next);
2405 #else
2406 log_align = exact_log2 (BIGGEST_ALIGNMENT / BITS_PER_UNIT);
2407 #endif
2408 ASM_OUTPUT_ALIGN (file, log_align);
2409 }
2410 else
2411 switch_to_section (current_function_section ());
2412
2413 #ifdef ASM_OUTPUT_CASE_LABEL
2414 ASM_OUTPUT_CASE_LABEL (file, "L", CODE_LABEL_NUMBER (insn),
2415 next);
2416 #else
2417 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn));
2418 #endif
2419 #endif
2420 break;
2421 }
2422 if (LABEL_ALT_ENTRY_P (insn))
2423 output_alternate_entry_point (file, insn);
2424 else
2425 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn));
2426 break;
2427
2428 default:
2429 {
2430 rtx body = PATTERN (insn);
2431 int insn_code_number;
2432 const char *templ;
2433 bool is_stmt;
2434
2435 /* Reset this early so it is correct for ASM statements. */
2436 current_insn_predicate = NULL_RTX;
2437
2438 /* An INSN, JUMP_INSN or CALL_INSN.
2439 First check for special kinds that recog doesn't recognize. */
2440
2441 if (GET_CODE (body) == USE /* These are just declarations. */
2442 || GET_CODE (body) == CLOBBER)
2443 break;
2444
2445 #ifdef HAVE_cc0
2446 {
2447 /* If there is a REG_CC_SETTER note on this insn, it means that
2448 the setting of the condition code was done in the delay slot
2449 of the insn that branched here. So recover the cc status
2450 from the insn that set it. */
2451
2452 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2453 if (note)
2454 {
2455 NOTICE_UPDATE_CC (PATTERN (XEXP (note, 0)), XEXP (note, 0));
2456 cc_prev_status = cc_status;
2457 }
2458 }
2459 #endif
2460
2461 /* Detect insns that are really jump-tables
2462 and output them as such. */
2463
2464 if (JUMP_TABLE_DATA_P (insn))
2465 {
2466 #if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC))
2467 int vlen, idx;
2468 #endif
2469
2470 if (! JUMP_TABLES_IN_TEXT_SECTION)
2471 switch_to_section (targetm.asm_out.function_rodata_section
2472 (current_function_decl));
2473 else
2474 switch_to_section (current_function_section ());
2475
2476 app_disable ();
2477
2478 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2479 if (GET_CODE (body) == ADDR_VEC)
2480 {
2481 #ifdef ASM_OUTPUT_ADDR_VEC
2482 ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn), body);
2483 #else
2484 gcc_unreachable ();
2485 #endif
2486 }
2487 else
2488 {
2489 #ifdef ASM_OUTPUT_ADDR_DIFF_VEC
2490 ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn), body);
2491 #else
2492 gcc_unreachable ();
2493 #endif
2494 }
2495 #else
2496 vlen = XVECLEN (body, GET_CODE (body) == ADDR_DIFF_VEC);
2497 for (idx = 0; idx < vlen; idx++)
2498 {
2499 if (GET_CODE (body) == ADDR_VEC)
2500 {
2501 #ifdef ASM_OUTPUT_ADDR_VEC_ELT
2502 ASM_OUTPUT_ADDR_VEC_ELT
2503 (file, CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 0, idx), 0)));
2504 #else
2505 gcc_unreachable ();
2506 #endif
2507 }
2508 else
2509 {
2510 #ifdef ASM_OUTPUT_ADDR_DIFF_ELT
2511 ASM_OUTPUT_ADDR_DIFF_ELT
2512 (file,
2513 body,
2514 CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 1, idx), 0)),
2515 CODE_LABEL_NUMBER (XEXP (XEXP (body, 0), 0)));
2516 #else
2517 gcc_unreachable ();
2518 #endif
2519 }
2520 }
2521 #ifdef ASM_OUTPUT_CASE_END
2522 ASM_OUTPUT_CASE_END (file,
2523 CODE_LABEL_NUMBER (PREV_INSN (insn)),
2524 insn);
2525 #endif
2526 #endif
2527
2528 switch_to_section (current_function_section ());
2529
2530 break;
2531 }
2532 /* Output this line note if it is the first or the last line
2533 note in a row. */
2534 if (!DECL_IGNORED_P (current_function_decl)
2535 && notice_source_line (insn, &is_stmt))
2536 (*debug_hooks->source_line) (last_linenum, last_filename,
2537 last_discriminator, is_stmt);
2538
2539 if (GET_CODE (body) == ASM_INPUT)
2540 {
2541 const char *string = XSTR (body, 0);
2542
2543 /* There's no telling what that did to the condition codes. */
2544 CC_STATUS_INIT;
2545
2546 if (string[0])
2547 {
2548 expanded_location loc;
2549
2550 app_enable ();
2551 loc = expand_location (ASM_INPUT_SOURCE_LOCATION (body));
2552 if (*loc.file && loc.line)
2553 fprintf (asm_out_file, "%s %i \"%s\" 1\n",
2554 ASM_COMMENT_START, loc.line, loc.file);
2555 fprintf (asm_out_file, "\t%s\n", string);
2556 #if HAVE_AS_LINE_ZERO
2557 if (*loc.file && loc.line)
2558 fprintf (asm_out_file, "%s 0 \"\" 2\n", ASM_COMMENT_START);
2559 #endif
2560 }
2561 break;
2562 }
2563
2564 /* Detect `asm' construct with operands. */
2565 if (asm_noperands (body) >= 0)
2566 {
2567 unsigned int noperands = asm_noperands (body);
2568 rtx *ops = XALLOCAVEC (rtx, noperands);
2569 const char *string;
2570 location_t loc;
2571 expanded_location expanded;
2572
2573 /* There's no telling what that did to the condition codes. */
2574 CC_STATUS_INIT;
2575
2576 /* Get out the operand values. */
2577 string = decode_asm_operands (body, ops, NULL, NULL, NULL, &loc);
2578 /* Inhibit dying on what would otherwise be compiler bugs. */
2579 insn_noperands = noperands;
2580 this_is_asm_operands = insn;
2581 expanded = expand_location (loc);
2582
2583 #ifdef FINAL_PRESCAN_INSN
2584 FINAL_PRESCAN_INSN (insn, ops, insn_noperands);
2585 #endif
2586
2587 /* Output the insn using them. */
2588 if (string[0])
2589 {
2590 app_enable ();
2591 if (expanded.file && expanded.line)
2592 fprintf (asm_out_file, "%s %i \"%s\" 1\n",
2593 ASM_COMMENT_START, expanded.line, expanded.file);
2594 output_asm_insn (string, ops);
2595 #if HAVE_AS_LINE_ZERO
2596 if (expanded.file && expanded.line)
2597 fprintf (asm_out_file, "%s 0 \"\" 2\n", ASM_COMMENT_START);
2598 #endif
2599 }
2600
2601 if (targetm.asm_out.final_postscan_insn)
2602 targetm.asm_out.final_postscan_insn (file, insn, ops,
2603 insn_noperands);
2604
2605 this_is_asm_operands = 0;
2606 break;
2607 }
2608
2609 app_disable ();
2610
2611 if (GET_CODE (body) == SEQUENCE)
2612 {
2613 /* A delayed-branch sequence */
2614 int i;
2615
2616 final_sequence = body;
2617
2618 /* The first insn in this SEQUENCE might be a JUMP_INSN that will
2619 force the restoration of a comparison that was previously
2620 thought unnecessary. If that happens, cancel this sequence
2621 and cause that insn to be restored. */
2622
2623 next = final_scan_insn (XVECEXP (body, 0, 0), file, 0, 1, seen);
2624 if (next != XVECEXP (body, 0, 1))
2625 {
2626 final_sequence = 0;
2627 return next;
2628 }
2629
2630 for (i = 1; i < XVECLEN (body, 0); i++)
2631 {
2632 rtx insn = XVECEXP (body, 0, i);
2633 rtx next = NEXT_INSN (insn);
2634 /* We loop in case any instruction in a delay slot gets
2635 split. */
2636 do
2637 insn = final_scan_insn (insn, file, 0, 1, seen);
2638 while (insn != next);
2639 }
2640 #ifdef DBR_OUTPUT_SEQEND
2641 DBR_OUTPUT_SEQEND (file);
2642 #endif
2643 final_sequence = 0;
2644
2645 /* If the insn requiring the delay slot was a CALL_INSN, the
2646 insns in the delay slot are actually executed before the
2647 called function. Hence we don't preserve any CC-setting
2648 actions in these insns and the CC must be marked as being
2649 clobbered by the function. */
2650 if (CALL_P (XVECEXP (body, 0, 0)))
2651 {
2652 CC_STATUS_INIT;
2653 }
2654 break;
2655 }
2656
2657 /* We have a real machine instruction as rtl. */
2658
2659 body = PATTERN (insn);
2660
2661 #ifdef HAVE_cc0
2662 set = single_set (insn);
2663
2664 /* Check for redundant test and compare instructions
2665 (when the condition codes are already set up as desired).
2666 This is done only when optimizing; if not optimizing,
2667 it should be possible for the user to alter a variable
2668 with the debugger in between statements
2669 and the next statement should reexamine the variable
2670 to compute the condition codes. */
2671
2672 if (optimize_p)
2673 {
2674 if (set
2675 && GET_CODE (SET_DEST (set)) == CC0
2676 && insn != last_ignored_compare)
2677 {
2678 rtx src1, src2;
2679 if (GET_CODE (SET_SRC (set)) == SUBREG)
2680 SET_SRC (set) = alter_subreg (&SET_SRC (set), true);
2681
2682 src1 = SET_SRC (set);
2683 src2 = NULL_RTX;
2684 if (GET_CODE (SET_SRC (set)) == COMPARE)
2685 {
2686 if (GET_CODE (XEXP (SET_SRC (set), 0)) == SUBREG)
2687 XEXP (SET_SRC (set), 0)
2688 = alter_subreg (&XEXP (SET_SRC (set), 0), true);
2689 if (GET_CODE (XEXP (SET_SRC (set), 1)) == SUBREG)
2690 XEXP (SET_SRC (set), 1)
2691 = alter_subreg (&XEXP (SET_SRC (set), 1), true);
2692 if (XEXP (SET_SRC (set), 1)
2693 == CONST0_RTX (GET_MODE (XEXP (SET_SRC (set), 0))))
2694 src2 = XEXP (SET_SRC (set), 0);
2695 }
2696 if ((cc_status.value1 != 0
2697 && rtx_equal_p (src1, cc_status.value1))
2698 || (cc_status.value2 != 0
2699 && rtx_equal_p (src1, cc_status.value2))
2700 || (src2 != 0 && cc_status.value1 != 0
2701 && rtx_equal_p (src2, cc_status.value1))
2702 || (src2 != 0 && cc_status.value2 != 0
2703 && rtx_equal_p (src2, cc_status.value2)))
2704 {
2705 /* Don't delete insn if it has an addressing side-effect. */
2706 if (! FIND_REG_INC_NOTE (insn, NULL_RTX)
2707 /* or if anything in it is volatile. */
2708 && ! volatile_refs_p (PATTERN (insn)))
2709 {
2710 /* We don't really delete the insn; just ignore it. */
2711 last_ignored_compare = insn;
2712 break;
2713 }
2714 }
2715 }
2716 }
2717
2718 /* If this is a conditional branch, maybe modify it
2719 if the cc's are in a nonstandard state
2720 so that it accomplishes the same thing that it would
2721 do straightforwardly if the cc's were set up normally. */
2722
2723 if (cc_status.flags != 0
2724 && JUMP_P (insn)
2725 && GET_CODE (body) == SET
2726 && SET_DEST (body) == pc_rtx
2727 && GET_CODE (SET_SRC (body)) == IF_THEN_ELSE
2728 && COMPARISON_P (XEXP (SET_SRC (body), 0))
2729 && XEXP (XEXP (SET_SRC (body), 0), 0) == cc0_rtx)
2730 {
2731 /* This function may alter the contents of its argument
2732 and clear some of the cc_status.flags bits.
2733 It may also return 1 meaning condition now always true
2734 or -1 meaning condition now always false
2735 or 2 meaning condition nontrivial but altered. */
2736 int result = alter_cond (XEXP (SET_SRC (body), 0));
2737 /* If condition now has fixed value, replace the IF_THEN_ELSE
2738 with its then-operand or its else-operand. */
2739 if (result == 1)
2740 SET_SRC (body) = XEXP (SET_SRC (body), 1);
2741 if (result == -1)
2742 SET_SRC (body) = XEXP (SET_SRC (body), 2);
2743
2744 /* The jump is now either unconditional or a no-op.
2745 If it has become a no-op, don't try to output it.
2746 (It would not be recognized.) */
2747 if (SET_SRC (body) == pc_rtx)
2748 {
2749 delete_insn (insn);
2750 break;
2751 }
2752 else if (ANY_RETURN_P (SET_SRC (body)))
2753 /* Replace (set (pc) (return)) with (return). */
2754 PATTERN (insn) = body = SET_SRC (body);
2755
2756 /* Rerecognize the instruction if it has changed. */
2757 if (result != 0)
2758 INSN_CODE (insn) = -1;
2759 }
2760
2761 /* If this is a conditional trap, maybe modify it if the cc's
2762 are in a nonstandard state so that it accomplishes the same
2763 thing that it would do straightforwardly if the cc's were
2764 set up normally. */
2765 if (cc_status.flags != 0
2766 && NONJUMP_INSN_P (insn)
2767 && GET_CODE (body) == TRAP_IF
2768 && COMPARISON_P (TRAP_CONDITION (body))
2769 && XEXP (TRAP_CONDITION (body), 0) == cc0_rtx)
2770 {
2771 /* This function may alter the contents of its argument
2772 and clear some of the cc_status.flags bits.
2773 It may also return 1 meaning condition now always true
2774 or -1 meaning condition now always false
2775 or 2 meaning condition nontrivial but altered. */
2776 int result = alter_cond (TRAP_CONDITION (body));
2777
2778 /* If TRAP_CONDITION has become always false, delete the
2779 instruction. */
2780 if (result == -1)
2781 {
2782 delete_insn (insn);
2783 break;
2784 }
2785
2786 /* If TRAP_CONDITION has become always true, replace
2787 TRAP_CONDITION with const_true_rtx. */
2788 if (result == 1)
2789 TRAP_CONDITION (body) = const_true_rtx;
2790
2791 /* Rerecognize the instruction if it has changed. */
2792 if (result != 0)
2793 INSN_CODE (insn) = -1;
2794 }
2795
2796 /* Make same adjustments to instructions that examine the
2797 condition codes without jumping and instructions that
2798 handle conditional moves (if this machine has either one). */
2799
2800 if (cc_status.flags != 0
2801 && set != 0)
2802 {
2803 rtx cond_rtx, then_rtx, else_rtx;
2804
2805 if (!JUMP_P (insn)
2806 && GET_CODE (SET_SRC (set)) == IF_THEN_ELSE)
2807 {
2808 cond_rtx = XEXP (SET_SRC (set), 0);
2809 then_rtx = XEXP (SET_SRC (set), 1);
2810 else_rtx = XEXP (SET_SRC (set), 2);
2811 }
2812 else
2813 {
2814 cond_rtx = SET_SRC (set);
2815 then_rtx = const_true_rtx;
2816 else_rtx = const0_rtx;
2817 }
2818
2819 if (COMPARISON_P (cond_rtx)
2820 && XEXP (cond_rtx, 0) == cc0_rtx)
2821 {
2822 int result;
2823 result = alter_cond (cond_rtx);
2824 if (result == 1)
2825 validate_change (insn, &SET_SRC (set), then_rtx, 0);
2826 else if (result == -1)
2827 validate_change (insn, &SET_SRC (set), else_rtx, 0);
2828 else if (result == 2)
2829 INSN_CODE (insn) = -1;
2830 if (SET_DEST (set) == SET_SRC (set))
2831 delete_insn (insn);
2832 }
2833 }
2834
2835 #endif
2836
2837 #ifdef HAVE_peephole
2838 /* Do machine-specific peephole optimizations if desired. */
2839
2840 if (optimize_p && !flag_no_peephole && !nopeepholes)
2841 {
2842 rtx next = peephole (insn);
2843 /* When peepholing, if there were notes within the peephole,
2844 emit them before the peephole. */
2845 if (next != 0 && next != NEXT_INSN (insn))
2846 {
2847 rtx note, prev = PREV_INSN (insn);
2848
2849 for (note = NEXT_INSN (insn); note != next;
2850 note = NEXT_INSN (note))
2851 final_scan_insn (note, file, optimize_p, nopeepholes, seen);
2852
2853 /* Put the notes in the proper position for a later
2854 rescan. For example, the SH target can do this
2855 when generating a far jump in a delayed branch
2856 sequence. */
2857 note = NEXT_INSN (insn);
2858 PREV_INSN (note) = prev;
2859 NEXT_INSN (prev) = note;
2860 NEXT_INSN (PREV_INSN (next)) = insn;
2861 PREV_INSN (insn) = PREV_INSN (next);
2862 NEXT_INSN (insn) = next;
2863 PREV_INSN (next) = insn;
2864 }
2865
2866 /* PEEPHOLE might have changed this. */
2867 body = PATTERN (insn);
2868 }
2869 #endif
2870
2871 /* Try to recognize the instruction.
2872 If successful, verify that the operands satisfy the
2873 constraints for the instruction. Crash if they don't,
2874 since `reload' should have changed them so that they do. */
2875
2876 insn_code_number = recog_memoized (insn);
2877 cleanup_subreg_operands (insn);
2878
2879 /* Dump the insn in the assembly for debugging (-dAP).
2880 If the final dump is requested as slim RTL, dump slim
2881 RTL to the assembly file also. */
2882 if (flag_dump_rtl_in_asm)
2883 {
2884 print_rtx_head = ASM_COMMENT_START;
2885 if (! (dump_flags & TDF_SLIM))
2886 print_rtl_single (asm_out_file, insn);
2887 else
2888 dump_insn_slim (asm_out_file, insn);
2889 print_rtx_head = "";
2890 }
2891
2892 if (! constrain_operands_cached (1))
2893 fatal_insn_not_found (insn);
2894
2895 /* Some target machines need to prescan each insn before
2896 it is output. */
2897
2898 #ifdef FINAL_PRESCAN_INSN
2899 FINAL_PRESCAN_INSN (insn, recog_data.operand, recog_data.n_operands);
2900 #endif
2901
2902 if (targetm.have_conditional_execution ()
2903 && GET_CODE (PATTERN (insn)) == COND_EXEC)
2904 current_insn_predicate = COND_EXEC_TEST (PATTERN (insn));
2905
2906 #ifdef HAVE_cc0
2907 cc_prev_status = cc_status;
2908
2909 /* Update `cc_status' for this instruction.
2910 The instruction's output routine may change it further.
2911 If the output routine for a jump insn needs to depend
2912 on the cc status, it should look at cc_prev_status. */
2913
2914 NOTICE_UPDATE_CC (body, insn);
2915 #endif
2916
2917 current_output_insn = debug_insn = insn;
2918
2919 /* Find the proper template for this insn. */
2920 templ = get_insn_template (insn_code_number, insn);
2921
2922 /* If the C code returns 0, it means that it is a jump insn
2923 which follows a deleted test insn, and that test insn
2924 needs to be reinserted. */
2925 if (templ == 0)
2926 {
2927 rtx prev;
2928
2929 gcc_assert (prev_nonnote_insn (insn) == last_ignored_compare);
2930
2931 /* We have already processed the notes between the setter and
2932 the user. Make sure we don't process them again, this is
2933 particularly important if one of the notes is a block
2934 scope note or an EH note. */
2935 for (prev = insn;
2936 prev != last_ignored_compare;
2937 prev = PREV_INSN (prev))
2938 {
2939 if (NOTE_P (prev))
2940 delete_insn (prev); /* Use delete_note. */
2941 }
2942
2943 return prev;
2944 }
2945
2946 /* If the template is the string "#", it means that this insn must
2947 be split. */
2948 if (templ[0] == '#' && templ[1] == '\0')
2949 {
2950 rtx new_rtx = try_split (body, insn, 0);
2951
2952 /* If we didn't split the insn, go away. */
2953 if (new_rtx == insn && PATTERN (new_rtx) == body)
2954 fatal_insn ("could not split insn", insn);
2955
2956 /* If we have a length attribute, this instruction should have
2957 been split in shorten_branches, to ensure that we would have
2958 valid length info for the splitees. */
2959 gcc_assert (!HAVE_ATTR_length);
2960
2961 return new_rtx;
2962 }
2963
2964 /* ??? This will put the directives in the wrong place if
2965 get_insn_template outputs assembly directly. However calling it
2966 before get_insn_template breaks if the insns is split. */
2967 if (targetm.asm_out.unwind_emit_before_insn
2968 && targetm.asm_out.unwind_emit)
2969 targetm.asm_out.unwind_emit (asm_out_file, insn);
2970
2971 if (CALL_P (insn))
2972 {
2973 rtx x = call_from_call_insn (insn);
2974 x = XEXP (x, 0);
2975 if (x && MEM_P (x) && GET_CODE (XEXP (x, 0)) == SYMBOL_REF)
2976 {
2977 tree t;
2978 x = XEXP (x, 0);
2979 t = SYMBOL_REF_DECL (x);
2980 if (t)
2981 assemble_external (t);
2982 }
2983 if (!DECL_IGNORED_P (current_function_decl))
2984 debug_hooks->var_location (insn);
2985 }
2986
2987 /* Output assembler code from the template. */
2988 output_asm_insn (templ, recog_data.operand);
2989
2990 /* Some target machines need to postscan each insn after
2991 it is output. */
2992 if (targetm.asm_out.final_postscan_insn)
2993 targetm.asm_out.final_postscan_insn (file, insn, recog_data.operand,
2994 recog_data.n_operands);
2995
2996 if (!targetm.asm_out.unwind_emit_before_insn
2997 && targetm.asm_out.unwind_emit)
2998 targetm.asm_out.unwind_emit (asm_out_file, insn);
2999
3000 current_output_insn = debug_insn = 0;
3001 }
3002 }
3003 return NEXT_INSN (insn);
3004 }
3005 \f
3006 /* Return whether a source line note needs to be emitted before INSN.
3007 Sets IS_STMT to TRUE if the line should be marked as a possible
3008 breakpoint location. */
3009
3010 static bool
3011 notice_source_line (rtx insn, bool *is_stmt)
3012 {
3013 const char *filename;
3014 int linenum;
3015
3016 if (override_filename)
3017 {
3018 filename = override_filename;
3019 linenum = override_linenum;
3020 }
3021 else
3022 {
3023 filename = insn_file (insn);
3024 linenum = insn_line (insn);
3025 }
3026
3027 if (filename == NULL)
3028 return false;
3029
3030 if (force_source_line
3031 || filename != last_filename
3032 || last_linenum != linenum)
3033 {
3034 force_source_line = false;
3035 last_filename = filename;
3036 last_linenum = linenum;
3037 last_discriminator = discriminator;
3038 *is_stmt = true;
3039 high_block_linenum = MAX (last_linenum, high_block_linenum);
3040 high_function_linenum = MAX (last_linenum, high_function_linenum);
3041 return true;
3042 }
3043
3044 if (SUPPORTS_DISCRIMINATOR && last_discriminator != discriminator)
3045 {
3046 /* If the discriminator changed, but the line number did not,
3047 output the line table entry with is_stmt false so the
3048 debugger does not treat this as a breakpoint location. */
3049 last_discriminator = discriminator;
3050 *is_stmt = false;
3051 return true;
3052 }
3053
3054 return false;
3055 }
3056 \f
3057 /* For each operand in INSN, simplify (subreg (reg)) so that it refers
3058 directly to the desired hard register. */
3059
3060 void
3061 cleanup_subreg_operands (rtx insn)
3062 {
3063 int i;
3064 bool changed = false;
3065 extract_insn_cached (insn);
3066 for (i = 0; i < recog_data.n_operands; i++)
3067 {
3068 /* The following test cannot use recog_data.operand when testing
3069 for a SUBREG: the underlying object might have been changed
3070 already if we are inside a match_operator expression that
3071 matches the else clause. Instead we test the underlying
3072 expression directly. */
3073 if (GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
3074 {
3075 recog_data.operand[i] = alter_subreg (recog_data.operand_loc[i], true);
3076 changed = true;
3077 }
3078 else if (GET_CODE (recog_data.operand[i]) == PLUS
3079 || GET_CODE (recog_data.operand[i]) == MULT
3080 || MEM_P (recog_data.operand[i]))
3081 recog_data.operand[i] = walk_alter_subreg (recog_data.operand_loc[i], &changed);
3082 }
3083
3084 for (i = 0; i < recog_data.n_dups; i++)
3085 {
3086 if (GET_CODE (*recog_data.dup_loc[i]) == SUBREG)
3087 {
3088 *recog_data.dup_loc[i] = alter_subreg (recog_data.dup_loc[i], true);
3089 changed = true;
3090 }
3091 else if (GET_CODE (*recog_data.dup_loc[i]) == PLUS
3092 || GET_CODE (*recog_data.dup_loc[i]) == MULT
3093 || MEM_P (*recog_data.dup_loc[i]))
3094 *recog_data.dup_loc[i] = walk_alter_subreg (recog_data.dup_loc[i], &changed);
3095 }
3096 if (changed)
3097 df_insn_rescan (insn);
3098 }
3099
3100 /* If X is a SUBREG, try to replace it with a REG or a MEM, based on
3101 the thing it is a subreg of. Do it anyway if FINAL_P. */
3102
3103 rtx
3104 alter_subreg (rtx *xp, bool final_p)
3105 {
3106 rtx x = *xp;
3107 rtx y = SUBREG_REG (x);
3108
3109 /* simplify_subreg does not remove subreg from volatile references.
3110 We are required to. */
3111 if (MEM_P (y))
3112 {
3113 int offset = SUBREG_BYTE (x);
3114
3115 /* For paradoxical subregs on big-endian machines, SUBREG_BYTE
3116 contains 0 instead of the proper offset. See simplify_subreg. */
3117 if (offset == 0
3118 && GET_MODE_SIZE (GET_MODE (y)) < GET_MODE_SIZE (GET_MODE (x)))
3119 {
3120 int difference = GET_MODE_SIZE (GET_MODE (y))
3121 - GET_MODE_SIZE (GET_MODE (x));
3122 if (WORDS_BIG_ENDIAN)
3123 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
3124 if (BYTES_BIG_ENDIAN)
3125 offset += difference % UNITS_PER_WORD;
3126 }
3127
3128 if (final_p)
3129 *xp = adjust_address (y, GET_MODE (x), offset);
3130 else
3131 *xp = adjust_address_nv (y, GET_MODE (x), offset);
3132 }
3133 else
3134 {
3135 rtx new_rtx = simplify_subreg (GET_MODE (x), y, GET_MODE (y),
3136 SUBREG_BYTE (x));
3137
3138 if (new_rtx != 0)
3139 *xp = new_rtx;
3140 else if (final_p && REG_P (y))
3141 {
3142 /* Simplify_subreg can't handle some REG cases, but we have to. */
3143 unsigned int regno;
3144 HOST_WIDE_INT offset;
3145
3146 regno = subreg_regno (x);
3147 if (subreg_lowpart_p (x))
3148 offset = byte_lowpart_offset (GET_MODE (x), GET_MODE (y));
3149 else
3150 offset = SUBREG_BYTE (x);
3151 *xp = gen_rtx_REG_offset (y, GET_MODE (x), regno, offset);
3152 }
3153 }
3154
3155 return *xp;
3156 }
3157
3158 /* Do alter_subreg on all the SUBREGs contained in X. */
3159
3160 static rtx
3161 walk_alter_subreg (rtx *xp, bool *changed)
3162 {
3163 rtx x = *xp;
3164 switch (GET_CODE (x))
3165 {
3166 case PLUS:
3167 case MULT:
3168 case AND:
3169 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed);
3170 XEXP (x, 1) = walk_alter_subreg (&XEXP (x, 1), changed);
3171 break;
3172
3173 case MEM:
3174 case ZERO_EXTEND:
3175 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed);
3176 break;
3177
3178 case SUBREG:
3179 *changed = true;
3180 return alter_subreg (xp, true);
3181
3182 default:
3183 break;
3184 }
3185
3186 return *xp;
3187 }
3188 \f
3189 #ifdef HAVE_cc0
3190
3191 /* Given BODY, the body of a jump instruction, alter the jump condition
3192 as required by the bits that are set in cc_status.flags.
3193 Not all of the bits there can be handled at this level in all cases.
3194
3195 The value is normally 0.
3196 1 means that the condition has become always true.
3197 -1 means that the condition has become always false.
3198 2 means that COND has been altered. */
3199
3200 static int
3201 alter_cond (rtx cond)
3202 {
3203 int value = 0;
3204
3205 if (cc_status.flags & CC_REVERSED)
3206 {
3207 value = 2;
3208 PUT_CODE (cond, swap_condition (GET_CODE (cond)));
3209 }
3210
3211 if (cc_status.flags & CC_INVERTED)
3212 {
3213 value = 2;
3214 PUT_CODE (cond, reverse_condition (GET_CODE (cond)));
3215 }
3216
3217 if (cc_status.flags & CC_NOT_POSITIVE)
3218 switch (GET_CODE (cond))
3219 {
3220 case LE:
3221 case LEU:
3222 case GEU:
3223 /* Jump becomes unconditional. */
3224 return 1;
3225
3226 case GT:
3227 case GTU:
3228 case LTU:
3229 /* Jump becomes no-op. */
3230 return -1;
3231
3232 case GE:
3233 PUT_CODE (cond, EQ);
3234 value = 2;
3235 break;
3236
3237 case LT:
3238 PUT_CODE (cond, NE);
3239 value = 2;
3240 break;
3241
3242 default:
3243 break;
3244 }
3245
3246 if (cc_status.flags & CC_NOT_NEGATIVE)
3247 switch (GET_CODE (cond))
3248 {
3249 case GE:
3250 case GEU:
3251 /* Jump becomes unconditional. */
3252 return 1;
3253
3254 case LT:
3255 case LTU:
3256 /* Jump becomes no-op. */
3257 return -1;
3258
3259 case LE:
3260 case LEU:
3261 PUT_CODE (cond, EQ);
3262 value = 2;
3263 break;
3264
3265 case GT:
3266 case GTU:
3267 PUT_CODE (cond, NE);
3268 value = 2;
3269 break;
3270
3271 default:
3272 break;
3273 }
3274
3275 if (cc_status.flags & CC_NO_OVERFLOW)
3276 switch (GET_CODE (cond))
3277 {
3278 case GEU:
3279 /* Jump becomes unconditional. */
3280 return 1;
3281
3282 case LEU:
3283 PUT_CODE (cond, EQ);
3284 value = 2;
3285 break;
3286
3287 case GTU:
3288 PUT_CODE (cond, NE);
3289 value = 2;
3290 break;
3291
3292 case LTU:
3293 /* Jump becomes no-op. */
3294 return -1;
3295
3296 default:
3297 break;
3298 }
3299
3300 if (cc_status.flags & (CC_Z_IN_NOT_N | CC_Z_IN_N))
3301 switch (GET_CODE (cond))
3302 {
3303 default:
3304 gcc_unreachable ();
3305
3306 case NE:
3307 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? GE : LT);
3308 value = 2;
3309 break;
3310
3311 case EQ:
3312 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? LT : GE);
3313 value = 2;
3314 break;
3315 }
3316
3317 if (cc_status.flags & CC_NOT_SIGNED)
3318 /* The flags are valid if signed condition operators are converted
3319 to unsigned. */
3320 switch (GET_CODE (cond))
3321 {
3322 case LE:
3323 PUT_CODE (cond, LEU);
3324 value = 2;
3325 break;
3326
3327 case LT:
3328 PUT_CODE (cond, LTU);
3329 value = 2;
3330 break;
3331
3332 case GT:
3333 PUT_CODE (cond, GTU);
3334 value = 2;
3335 break;
3336
3337 case GE:
3338 PUT_CODE (cond, GEU);
3339 value = 2;
3340 break;
3341
3342 default:
3343 break;
3344 }
3345
3346 return value;
3347 }
3348 #endif
3349 \f
3350 /* Report inconsistency between the assembler template and the operands.
3351 In an `asm', it's the user's fault; otherwise, the compiler's fault. */
3352
3353 void
3354 output_operand_lossage (const char *cmsgid, ...)
3355 {
3356 char *fmt_string;
3357 char *new_message;
3358 const char *pfx_str;
3359 va_list ap;
3360
3361 va_start (ap, cmsgid);
3362
3363 pfx_str = this_is_asm_operands ? _("invalid 'asm': ") : "output_operand: ";
3364 asprintf (&fmt_string, "%s%s", pfx_str, _(cmsgid));
3365 vasprintf (&new_message, fmt_string, ap);
3366
3367 if (this_is_asm_operands)
3368 error_for_asm (this_is_asm_operands, "%s", new_message);
3369 else
3370 internal_error ("%s", new_message);
3371
3372 free (fmt_string);
3373 free (new_message);
3374 va_end (ap);
3375 }
3376 \f
3377 /* Output of assembler code from a template, and its subroutines. */
3378
3379 /* Annotate the assembly with a comment describing the pattern and
3380 alternative used. */
3381
3382 static void
3383 output_asm_name (void)
3384 {
3385 if (debug_insn)
3386 {
3387 int num = INSN_CODE (debug_insn);
3388 fprintf (asm_out_file, "\t%s %d\t%s",
3389 ASM_COMMENT_START, INSN_UID (debug_insn),
3390 insn_data[num].name);
3391 if (insn_data[num].n_alternatives > 1)
3392 fprintf (asm_out_file, "/%d", which_alternative + 1);
3393
3394 if (HAVE_ATTR_length)
3395 fprintf (asm_out_file, "\t[length = %d]",
3396 get_attr_length (debug_insn));
3397
3398 /* Clear this so only the first assembler insn
3399 of any rtl insn will get the special comment for -dp. */
3400 debug_insn = 0;
3401 }
3402 }
3403
3404 /* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it
3405 or its address, return that expr . Set *PADDRESSP to 1 if the expr
3406 corresponds to the address of the object and 0 if to the object. */
3407
3408 static tree
3409 get_mem_expr_from_op (rtx op, int *paddressp)
3410 {
3411 tree expr;
3412 int inner_addressp;
3413
3414 *paddressp = 0;
3415
3416 if (REG_P (op))
3417 return REG_EXPR (op);
3418 else if (!MEM_P (op))
3419 return 0;
3420
3421 if (MEM_EXPR (op) != 0)
3422 return MEM_EXPR (op);
3423
3424 /* Otherwise we have an address, so indicate it and look at the address. */
3425 *paddressp = 1;
3426 op = XEXP (op, 0);
3427
3428 /* First check if we have a decl for the address, then look at the right side
3429 if it is a PLUS. Otherwise, strip off arithmetic and keep looking.
3430 But don't allow the address to itself be indirect. */
3431 if ((expr = get_mem_expr_from_op (op, &inner_addressp)) && ! inner_addressp)
3432 return expr;
3433 else if (GET_CODE (op) == PLUS
3434 && (expr = get_mem_expr_from_op (XEXP (op, 1), &inner_addressp)))
3435 return expr;
3436
3437 while (UNARY_P (op)
3438 || GET_RTX_CLASS (GET_CODE (op)) == RTX_BIN_ARITH)
3439 op = XEXP (op, 0);
3440
3441 expr = get_mem_expr_from_op (op, &inner_addressp);
3442 return inner_addressp ? 0 : expr;
3443 }
3444
3445 /* Output operand names for assembler instructions. OPERANDS is the
3446 operand vector, OPORDER is the order to write the operands, and NOPS
3447 is the number of operands to write. */
3448
3449 static void
3450 output_asm_operand_names (rtx *operands, int *oporder, int nops)
3451 {
3452 int wrote = 0;
3453 int i;
3454
3455 for (i = 0; i < nops; i++)
3456 {
3457 int addressp;
3458 rtx op = operands[oporder[i]];
3459 tree expr = get_mem_expr_from_op (op, &addressp);
3460
3461 fprintf (asm_out_file, "%c%s",
3462 wrote ? ',' : '\t', wrote ? "" : ASM_COMMENT_START);
3463 wrote = 1;
3464 if (expr)
3465 {
3466 fprintf (asm_out_file, "%s",
3467 addressp ? "*" : "");
3468 print_mem_expr (asm_out_file, expr);
3469 wrote = 1;
3470 }
3471 else if (REG_P (op) && ORIGINAL_REGNO (op)
3472 && ORIGINAL_REGNO (op) != REGNO (op))
3473 fprintf (asm_out_file, " tmp%i", ORIGINAL_REGNO (op));
3474 }
3475 }
3476
3477 #ifdef ASSEMBLER_DIALECT
3478 /* Helper function to parse assembler dialects in the asm string.
3479 This is called from output_asm_insn and asm_fprintf. */
3480 static const char *
3481 do_assembler_dialects (const char *p, int *dialect)
3482 {
3483 char c = *(p - 1);
3484
3485 switch (c)
3486 {
3487 case '{':
3488 {
3489 int i;
3490
3491 if (*dialect)
3492 output_operand_lossage ("nested assembly dialect alternatives");
3493 else
3494 *dialect = 1;
3495
3496 /* If we want the first dialect, do nothing. Otherwise, skip
3497 DIALECT_NUMBER of strings ending with '|'. */
3498 for (i = 0; i < dialect_number; i++)
3499 {
3500 while (*p && *p != '}')
3501 {
3502 if (*p == '|')
3503 {
3504 p++;
3505 break;
3506 }
3507
3508 /* Skip over any character after a percent sign. */
3509 if (*p == '%')
3510 p++;
3511 if (*p)
3512 p++;
3513 }
3514
3515 if (*p == '}')
3516 break;
3517 }
3518
3519 if (*p == '\0')
3520 output_operand_lossage ("unterminated assembly dialect alternative");
3521 }
3522 break;
3523
3524 case '|':
3525 if (*dialect)
3526 {
3527 /* Skip to close brace. */
3528 do
3529 {
3530 if (*p == '\0')
3531 {
3532 output_operand_lossage ("unterminated assembly dialect alternative");
3533 break;
3534 }
3535
3536 /* Skip over any character after a percent sign. */
3537 if (*p == '%' && p[1])
3538 {
3539 p += 2;
3540 continue;
3541 }
3542
3543 if (*p++ == '}')
3544 break;
3545 }
3546 while (1);
3547
3548 *dialect = 0;
3549 }
3550 else
3551 putc (c, asm_out_file);
3552 break;
3553
3554 case '}':
3555 if (! *dialect)
3556 putc (c, asm_out_file);
3557 *dialect = 0;
3558 break;
3559 default:
3560 gcc_unreachable ();
3561 }
3562
3563 return p;
3564 }
3565 #endif
3566
3567 /* Output text from TEMPLATE to the assembler output file,
3568 obeying %-directions to substitute operands taken from
3569 the vector OPERANDS.
3570
3571 %N (for N a digit) means print operand N in usual manner.
3572 %lN means require operand N to be a CODE_LABEL or LABEL_REF
3573 and print the label name with no punctuation.
3574 %cN means require operand N to be a constant
3575 and print the constant expression with no punctuation.
3576 %aN means expect operand N to be a memory address
3577 (not a memory reference!) and print a reference
3578 to that address.
3579 %nN means expect operand N to be a constant
3580 and print a constant expression for minus the value
3581 of the operand, with no other punctuation. */
3582
3583 void
3584 output_asm_insn (const char *templ, rtx *operands)
3585 {
3586 const char *p;
3587 int c;
3588 #ifdef ASSEMBLER_DIALECT
3589 int dialect = 0;
3590 #endif
3591 int oporder[MAX_RECOG_OPERANDS];
3592 char opoutput[MAX_RECOG_OPERANDS];
3593 int ops = 0;
3594
3595 /* An insn may return a null string template
3596 in a case where no assembler code is needed. */
3597 if (*templ == 0)
3598 return;
3599
3600 memset (opoutput, 0, sizeof opoutput);
3601 p = templ;
3602 putc ('\t', asm_out_file);
3603
3604 #ifdef ASM_OUTPUT_OPCODE
3605 ASM_OUTPUT_OPCODE (asm_out_file, p);
3606 #endif
3607
3608 while ((c = *p++))
3609 switch (c)
3610 {
3611 case '\n':
3612 if (flag_verbose_asm)
3613 output_asm_operand_names (operands, oporder, ops);
3614 if (flag_print_asm_name)
3615 output_asm_name ();
3616
3617 ops = 0;
3618 memset (opoutput, 0, sizeof opoutput);
3619
3620 putc (c, asm_out_file);
3621 #ifdef ASM_OUTPUT_OPCODE
3622 while ((c = *p) == '\t')
3623 {
3624 putc (c, asm_out_file);
3625 p++;
3626 }
3627 ASM_OUTPUT_OPCODE (asm_out_file, p);
3628 #endif
3629 break;
3630
3631 #ifdef ASSEMBLER_DIALECT
3632 case '{':
3633 case '}':
3634 case '|':
3635 p = do_assembler_dialects (p, &dialect);
3636 break;
3637 #endif
3638
3639 case '%':
3640 /* %% outputs a single %. %{, %} and %| print {, } and | respectively
3641 if ASSEMBLER_DIALECT defined and these characters have a special
3642 meaning as dialect delimiters.*/
3643 if (*p == '%'
3644 #ifdef ASSEMBLER_DIALECT
3645 || *p == '{' || *p == '}' || *p == '|'
3646 #endif
3647 )
3648 {
3649 putc (*p, asm_out_file);
3650 p++;
3651 }
3652 /* %= outputs a number which is unique to each insn in the entire
3653 compilation. This is useful for making local labels that are
3654 referred to more than once in a given insn. */
3655 else if (*p == '=')
3656 {
3657 p++;
3658 fprintf (asm_out_file, "%d", insn_counter);
3659 }
3660 /* % followed by a letter and some digits
3661 outputs an operand in a special way depending on the letter.
3662 Letters `acln' are implemented directly.
3663 Other letters are passed to `output_operand' so that
3664 the TARGET_PRINT_OPERAND hook can define them. */
3665 else if (ISALPHA (*p))
3666 {
3667 int letter = *p++;
3668 unsigned long opnum;
3669 char *endptr;
3670
3671 opnum = strtoul (p, &endptr, 10);
3672
3673 if (endptr == p)
3674 output_operand_lossage ("operand number missing "
3675 "after %%-letter");
3676 else if (this_is_asm_operands && opnum >= insn_noperands)
3677 output_operand_lossage ("operand number out of range");
3678 else if (letter == 'l')
3679 output_asm_label (operands[opnum]);
3680 else if (letter == 'a')
3681 output_address (operands[opnum]);
3682 else if (letter == 'c')
3683 {
3684 if (CONSTANT_ADDRESS_P (operands[opnum]))
3685 output_addr_const (asm_out_file, operands[opnum]);
3686 else
3687 output_operand (operands[opnum], 'c');
3688 }
3689 else if (letter == 'n')
3690 {
3691 if (CONST_INT_P (operands[opnum]))
3692 fprintf (asm_out_file, HOST_WIDE_INT_PRINT_DEC,
3693 - INTVAL (operands[opnum]));
3694 else
3695 {
3696 putc ('-', asm_out_file);
3697 output_addr_const (asm_out_file, operands[opnum]);
3698 }
3699 }
3700 else
3701 output_operand (operands[opnum], letter);
3702
3703 if (!opoutput[opnum])
3704 oporder[ops++] = opnum;
3705 opoutput[opnum] = 1;
3706
3707 p = endptr;
3708 c = *p;
3709 }
3710 /* % followed by a digit outputs an operand the default way. */
3711 else if (ISDIGIT (*p))
3712 {
3713 unsigned long opnum;
3714 char *endptr;
3715
3716 opnum = strtoul (p, &endptr, 10);
3717 if (this_is_asm_operands && opnum >= insn_noperands)
3718 output_operand_lossage ("operand number out of range");
3719 else
3720 output_operand (operands[opnum], 0);
3721
3722 if (!opoutput[opnum])
3723 oporder[ops++] = opnum;
3724 opoutput[opnum] = 1;
3725
3726 p = endptr;
3727 c = *p;
3728 }
3729 /* % followed by punctuation: output something for that
3730 punctuation character alone, with no operand. The
3731 TARGET_PRINT_OPERAND hook decides what is actually done. */
3732 else if (targetm.asm_out.print_operand_punct_valid_p ((unsigned char) *p))
3733 output_operand (NULL_RTX, *p++);
3734 else
3735 output_operand_lossage ("invalid %%-code");
3736 break;
3737
3738 default:
3739 putc (c, asm_out_file);
3740 }
3741
3742 /* Write out the variable names for operands, if we know them. */
3743 if (flag_verbose_asm)
3744 output_asm_operand_names (operands, oporder, ops);
3745 if (flag_print_asm_name)
3746 output_asm_name ();
3747
3748 putc ('\n', asm_out_file);
3749 }
3750 \f
3751 /* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */
3752
3753 void
3754 output_asm_label (rtx x)
3755 {
3756 char buf[256];
3757
3758 if (GET_CODE (x) == LABEL_REF)
3759 x = XEXP (x, 0);
3760 if (LABEL_P (x)
3761 || (NOTE_P (x)
3762 && NOTE_KIND (x) == NOTE_INSN_DELETED_LABEL))
3763 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3764 else
3765 output_operand_lossage ("'%%l' operand isn't a label");
3766
3767 assemble_name (asm_out_file, buf);
3768 }
3769
3770 /* Helper rtx-iteration-function for mark_symbol_refs_as_used and
3771 output_operand. Marks SYMBOL_REFs as referenced through use of
3772 assemble_external. */
3773
3774 static int
3775 mark_symbol_ref_as_used (rtx *xp, void *dummy ATTRIBUTE_UNUSED)
3776 {
3777 rtx x = *xp;
3778
3779 /* If we have a used symbol, we may have to emit assembly
3780 annotations corresponding to whether the symbol is external, weak
3781 or has non-default visibility. */
3782 if (GET_CODE (x) == SYMBOL_REF)
3783 {
3784 tree t;
3785
3786 t = SYMBOL_REF_DECL (x);
3787 if (t)
3788 assemble_external (t);
3789
3790 return -1;
3791 }
3792
3793 return 0;
3794 }
3795
3796 /* Marks SYMBOL_REFs in x as referenced through use of assemble_external. */
3797
3798 void
3799 mark_symbol_refs_as_used (rtx x)
3800 {
3801 for_each_rtx (&x, mark_symbol_ref_as_used, NULL);
3802 }
3803
3804 /* Print operand X using machine-dependent assembler syntax.
3805 CODE is a non-digit that preceded the operand-number in the % spec,
3806 such as 'z' if the spec was `%z3'. CODE is 0 if there was no char
3807 between the % and the digits.
3808 When CODE is a non-letter, X is 0.
3809
3810 The meanings of the letters are machine-dependent and controlled
3811 by TARGET_PRINT_OPERAND. */
3812
3813 void
3814 output_operand (rtx x, int code ATTRIBUTE_UNUSED)
3815 {
3816 if (x && GET_CODE (x) == SUBREG)
3817 x = alter_subreg (&x, true);
3818
3819 /* X must not be a pseudo reg. */
3820 gcc_assert (!x || !REG_P (x) || REGNO (x) < FIRST_PSEUDO_REGISTER);
3821
3822 targetm.asm_out.print_operand (asm_out_file, x, code);
3823
3824 if (x == NULL_RTX)
3825 return;
3826
3827 for_each_rtx (&x, mark_symbol_ref_as_used, NULL);
3828 }
3829
3830 /* Print a memory reference operand for address X using
3831 machine-dependent assembler syntax. */
3832
3833 void
3834 output_address (rtx x)
3835 {
3836 bool changed = false;
3837 walk_alter_subreg (&x, &changed);
3838 targetm.asm_out.print_operand_address (asm_out_file, x);
3839 }
3840 \f
3841 /* Print an integer constant expression in assembler syntax.
3842 Addition and subtraction are the only arithmetic
3843 that may appear in these expressions. */
3844
3845 void
3846 output_addr_const (FILE *file, rtx x)
3847 {
3848 char buf[256];
3849
3850 restart:
3851 switch (GET_CODE (x))
3852 {
3853 case PC:
3854 putc ('.', file);
3855 break;
3856
3857 case SYMBOL_REF:
3858 if (SYMBOL_REF_DECL (x))
3859 assemble_external (SYMBOL_REF_DECL (x));
3860 #ifdef ASM_OUTPUT_SYMBOL_REF
3861 ASM_OUTPUT_SYMBOL_REF (file, x);
3862 #else
3863 assemble_name (file, XSTR (x, 0));
3864 #endif
3865 break;
3866
3867 case LABEL_REF:
3868 x = XEXP (x, 0);
3869 /* Fall through. */
3870 case CODE_LABEL:
3871 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3872 #ifdef ASM_OUTPUT_LABEL_REF
3873 ASM_OUTPUT_LABEL_REF (file, buf);
3874 #else
3875 assemble_name (file, buf);
3876 #endif
3877 break;
3878
3879 case CONST_INT:
3880 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x));
3881 break;
3882
3883 case CONST:
3884 /* This used to output parentheses around the expression,
3885 but that does not work on the 386 (either ATT or BSD assembler). */
3886 output_addr_const (file, XEXP (x, 0));
3887 break;
3888
3889 case CONST_WIDE_INT:
3890 /* We do not know the mode here so we have to use a round about
3891 way to build a wide-int to get it printed properly. */
3892 {
3893 wide_int w = wide_int::from_array (&CONST_WIDE_INT_ELT (x, 0),
3894 CONST_WIDE_INT_NUNITS (x),
3895 CONST_WIDE_INT_NUNITS (x)
3896 * HOST_BITS_PER_WIDE_INT,
3897 false);
3898 print_decs (w, file);
3899 }
3900 break;
3901
3902 case CONST_DOUBLE:
3903 if (CONST_DOUBLE_AS_INT_P (x))
3904 {
3905 /* We can use %d if the number is one word and positive. */
3906 if (CONST_DOUBLE_HIGH (x))
3907 fprintf (file, HOST_WIDE_INT_PRINT_DOUBLE_HEX,
3908 (unsigned HOST_WIDE_INT) CONST_DOUBLE_HIGH (x),
3909 (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (x));
3910 else if (CONST_DOUBLE_LOW (x) < 0)
3911 fprintf (file, HOST_WIDE_INT_PRINT_HEX,
3912 (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (x));
3913 else
3914 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x));
3915 }
3916 else
3917 /* We can't handle floating point constants;
3918 PRINT_OPERAND must handle them. */
3919 output_operand_lossage ("floating constant misused");
3920 break;
3921
3922 case CONST_FIXED:
3923 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_FIXED_VALUE_LOW (x));
3924 break;
3925
3926 case PLUS:
3927 /* Some assemblers need integer constants to appear last (eg masm). */
3928 if (CONST_INT_P (XEXP (x, 0)))
3929 {
3930 output_addr_const (file, XEXP (x, 1));
3931 if (INTVAL (XEXP (x, 0)) >= 0)
3932 fprintf (file, "+");
3933 output_addr_const (file, XEXP (x, 0));
3934 }
3935 else
3936 {
3937 output_addr_const (file, XEXP (x, 0));
3938 if (!CONST_INT_P (XEXP (x, 1))
3939 || INTVAL (XEXP (x, 1)) >= 0)
3940 fprintf (file, "+");
3941 output_addr_const (file, XEXP (x, 1));
3942 }
3943 break;
3944
3945 case MINUS:
3946 /* Avoid outputting things like x-x or x+5-x,
3947 since some assemblers can't handle that. */
3948 x = simplify_subtraction (x);
3949 if (GET_CODE (x) != MINUS)
3950 goto restart;
3951
3952 output_addr_const (file, XEXP (x, 0));
3953 fprintf (file, "-");
3954 if ((CONST_INT_P (XEXP (x, 1)) && INTVAL (XEXP (x, 1)) >= 0)
3955 || GET_CODE (XEXP (x, 1)) == PC
3956 || GET_CODE (XEXP (x, 1)) == SYMBOL_REF)
3957 output_addr_const (file, XEXP (x, 1));
3958 else
3959 {
3960 fputs (targetm.asm_out.open_paren, file);
3961 output_addr_const (file, XEXP (x, 1));
3962 fputs (targetm.asm_out.close_paren, file);
3963 }
3964 break;
3965
3966 case ZERO_EXTEND:
3967 case SIGN_EXTEND:
3968 case SUBREG:
3969 case TRUNCATE:
3970 output_addr_const (file, XEXP (x, 0));
3971 break;
3972
3973 default:
3974 if (targetm.asm_out.output_addr_const_extra (file, x))
3975 break;
3976
3977 output_operand_lossage ("invalid expression as operand");
3978 }
3979 }
3980 \f
3981 /* Output a quoted string. */
3982
3983 void
3984 output_quoted_string (FILE *asm_file, const char *string)
3985 {
3986 #ifdef OUTPUT_QUOTED_STRING
3987 OUTPUT_QUOTED_STRING (asm_file, string);
3988 #else
3989 char c;
3990
3991 putc ('\"', asm_file);
3992 while ((c = *string++) != 0)
3993 {
3994 if (ISPRINT (c))
3995 {
3996 if (c == '\"' || c == '\\')
3997 putc ('\\', asm_file);
3998 putc (c, asm_file);
3999 }
4000 else
4001 fprintf (asm_file, "\\%03o", (unsigned char) c);
4002 }
4003 putc ('\"', asm_file);
4004 #endif
4005 }
4006 \f
4007 /* Write a HOST_WIDE_INT number in hex form 0x1234, fast. */
4008
4009 void
4010 fprint_whex (FILE *f, unsigned HOST_WIDE_INT value)
4011 {
4012 char buf[2 + CHAR_BIT * sizeof (value) / 4];
4013 if (value == 0)
4014 putc ('0', f);
4015 else
4016 {
4017 char *p = buf + sizeof (buf);
4018 do
4019 *--p = "0123456789abcdef"[value % 16];
4020 while ((value /= 16) != 0);
4021 *--p = 'x';
4022 *--p = '0';
4023 fwrite (p, 1, buf + sizeof (buf) - p, f);
4024 }
4025 }
4026
4027 /* Internal function that prints an unsigned long in decimal in reverse.
4028 The output string IS NOT null-terminated. */
4029
4030 static int
4031 sprint_ul_rev (char *s, unsigned long value)
4032 {
4033 int i = 0;
4034 do
4035 {
4036 s[i] = "0123456789"[value % 10];
4037 value /= 10;
4038 i++;
4039 /* alternate version, without modulo */
4040 /* oldval = value; */
4041 /* value /= 10; */
4042 /* s[i] = "0123456789" [oldval - 10*value]; */
4043 /* i++ */
4044 }
4045 while (value != 0);
4046 return i;
4047 }
4048
4049 /* Write an unsigned long as decimal to a file, fast. */
4050
4051 void
4052 fprint_ul (FILE *f, unsigned long value)
4053 {
4054 /* python says: len(str(2**64)) == 20 */
4055 char s[20];
4056 int i;
4057
4058 i = sprint_ul_rev (s, value);
4059
4060 /* It's probably too small to bother with string reversal and fputs. */
4061 do
4062 {
4063 i--;
4064 putc (s[i], f);
4065 }
4066 while (i != 0);
4067 }
4068
4069 /* Write an unsigned long as decimal to a string, fast.
4070 s must be wide enough to not overflow, at least 21 chars.
4071 Returns the length of the string (without terminating '\0'). */
4072
4073 int
4074 sprint_ul (char *s, unsigned long value)
4075 {
4076 int len;
4077 char tmp_c;
4078 int i;
4079 int j;
4080
4081 len = sprint_ul_rev (s, value);
4082 s[len] = '\0';
4083
4084 /* Reverse the string. */
4085 i = 0;
4086 j = len - 1;
4087 while (i < j)
4088 {
4089 tmp_c = s[i];
4090 s[i] = s[j];
4091 s[j] = tmp_c;
4092 i++; j--;
4093 }
4094
4095 return len;
4096 }
4097
4098 /* A poor man's fprintf, with the added features of %I, %R, %L, and %U.
4099 %R prints the value of REGISTER_PREFIX.
4100 %L prints the value of LOCAL_LABEL_PREFIX.
4101 %U prints the value of USER_LABEL_PREFIX.
4102 %I prints the value of IMMEDIATE_PREFIX.
4103 %O runs ASM_OUTPUT_OPCODE to transform what follows in the string.
4104 Also supported are %d, %i, %u, %x, %X, %o, %c, %s and %%.
4105
4106 We handle alternate assembler dialects here, just like output_asm_insn. */
4107
4108 void
4109 asm_fprintf (FILE *file, const char *p, ...)
4110 {
4111 char buf[10];
4112 char *q, c;
4113 #ifdef ASSEMBLER_DIALECT
4114 int dialect = 0;
4115 #endif
4116 va_list argptr;
4117
4118 va_start (argptr, p);
4119
4120 buf[0] = '%';
4121
4122 while ((c = *p++))
4123 switch (c)
4124 {
4125 #ifdef ASSEMBLER_DIALECT
4126 case '{':
4127 case '}':
4128 case '|':
4129 p = do_assembler_dialects (p, &dialect);
4130 break;
4131 #endif
4132
4133 case '%':
4134 c = *p++;
4135 q = &buf[1];
4136 while (strchr ("-+ #0", c))
4137 {
4138 *q++ = c;
4139 c = *p++;
4140 }
4141 while (ISDIGIT (c) || c == '.')
4142 {
4143 *q++ = c;
4144 c = *p++;
4145 }
4146 switch (c)
4147 {
4148 case '%':
4149 putc ('%', file);
4150 break;
4151
4152 case 'd': case 'i': case 'u':
4153 case 'x': case 'X': case 'o':
4154 case 'c':
4155 *q++ = c;
4156 *q = 0;
4157 fprintf (file, buf, va_arg (argptr, int));
4158 break;
4159
4160 case 'w':
4161 /* This is a prefix to the 'd', 'i', 'u', 'x', 'X', and
4162 'o' cases, but we do not check for those cases. It
4163 means that the value is a HOST_WIDE_INT, which may be
4164 either `long' or `long long'. */
4165 memcpy (q, HOST_WIDE_INT_PRINT, strlen (HOST_WIDE_INT_PRINT));
4166 q += strlen (HOST_WIDE_INT_PRINT);
4167 *q++ = *p++;
4168 *q = 0;
4169 fprintf (file, buf, va_arg (argptr, HOST_WIDE_INT));
4170 break;
4171
4172 case 'l':
4173 *q++ = c;
4174 #ifdef HAVE_LONG_LONG
4175 if (*p == 'l')
4176 {
4177 *q++ = *p++;
4178 *q++ = *p++;
4179 *q = 0;
4180 fprintf (file, buf, va_arg (argptr, long long));
4181 }
4182 else
4183 #endif
4184 {
4185 *q++ = *p++;
4186 *q = 0;
4187 fprintf (file, buf, va_arg (argptr, long));
4188 }
4189
4190 break;
4191
4192 case 's':
4193 *q++ = c;
4194 *q = 0;
4195 fprintf (file, buf, va_arg (argptr, char *));
4196 break;
4197
4198 case 'O':
4199 #ifdef ASM_OUTPUT_OPCODE
4200 ASM_OUTPUT_OPCODE (asm_out_file, p);
4201 #endif
4202 break;
4203
4204 case 'R':
4205 #ifdef REGISTER_PREFIX
4206 fprintf (file, "%s", REGISTER_PREFIX);
4207 #endif
4208 break;
4209
4210 case 'I':
4211 #ifdef IMMEDIATE_PREFIX
4212 fprintf (file, "%s", IMMEDIATE_PREFIX);
4213 #endif
4214 break;
4215
4216 case 'L':
4217 #ifdef LOCAL_LABEL_PREFIX
4218 fprintf (file, "%s", LOCAL_LABEL_PREFIX);
4219 #endif
4220 break;
4221
4222 case 'U':
4223 fputs (user_label_prefix, file);
4224 break;
4225
4226 #ifdef ASM_FPRINTF_EXTENSIONS
4227 /* Uppercase letters are reserved for general use by asm_fprintf
4228 and so are not available to target specific code. In order to
4229 prevent the ASM_FPRINTF_EXTENSIONS macro from using them then,
4230 they are defined here. As they get turned into real extensions
4231 to asm_fprintf they should be removed from this list. */
4232 case 'A': case 'B': case 'C': case 'D': case 'E':
4233 case 'F': case 'G': case 'H': case 'J': case 'K':
4234 case 'M': case 'N': case 'P': case 'Q': case 'S':
4235 case 'T': case 'V': case 'W': case 'Y': case 'Z':
4236 break;
4237
4238 ASM_FPRINTF_EXTENSIONS (file, argptr, p)
4239 #endif
4240 default:
4241 gcc_unreachable ();
4242 }
4243 break;
4244
4245 default:
4246 putc (c, file);
4247 }
4248 va_end (argptr);
4249 }
4250 \f
4251 /* Return nonzero if this function has no function calls. */
4252
4253 int
4254 leaf_function_p (void)
4255 {
4256 rtx insn;
4257
4258 /* Some back-ends (e.g. s390) want leaf functions to stay leaf
4259 functions even if they call mcount. */
4260 if (crtl->profile && !targetm.keep_leaf_when_profiled ())
4261 return 0;
4262
4263 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4264 {
4265 if (CALL_P (insn)
4266 && ! SIBLING_CALL_P (insn))
4267 return 0;
4268 if (NONJUMP_INSN_P (insn)
4269 && GET_CODE (PATTERN (insn)) == SEQUENCE
4270 && CALL_P (XVECEXP (PATTERN (insn), 0, 0))
4271 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0)))
4272 return 0;
4273 }
4274
4275 return 1;
4276 }
4277
4278 /* Return 1 if branch is a forward branch.
4279 Uses insn_shuid array, so it works only in the final pass. May be used by
4280 output templates to customary add branch prediction hints.
4281 */
4282 int
4283 final_forward_branch_p (rtx insn)
4284 {
4285 int insn_id, label_id;
4286
4287 gcc_assert (uid_shuid);
4288 insn_id = INSN_SHUID (insn);
4289 label_id = INSN_SHUID (JUMP_LABEL (insn));
4290 /* We've hit some insns that does not have id information available. */
4291 gcc_assert (insn_id && label_id);
4292 return insn_id < label_id;
4293 }
4294
4295 /* On some machines, a function with no call insns
4296 can run faster if it doesn't create its own register window.
4297 When output, the leaf function should use only the "output"
4298 registers. Ordinarily, the function would be compiled to use
4299 the "input" registers to find its arguments; it is a candidate
4300 for leaf treatment if it uses only the "input" registers.
4301 Leaf function treatment means renumbering so the function
4302 uses the "output" registers instead. */
4303
4304 #ifdef LEAF_REGISTERS
4305
4306 /* Return 1 if this function uses only the registers that can be
4307 safely renumbered. */
4308
4309 int
4310 only_leaf_regs_used (void)
4311 {
4312 int i;
4313 const char *const permitted_reg_in_leaf_functions = LEAF_REGISTERS;
4314
4315 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
4316 if ((df_regs_ever_live_p (i) || global_regs[i])
4317 && ! permitted_reg_in_leaf_functions[i])
4318 return 0;
4319
4320 if (crtl->uses_pic_offset_table
4321 && pic_offset_table_rtx != 0
4322 && REG_P (pic_offset_table_rtx)
4323 && ! permitted_reg_in_leaf_functions[REGNO (pic_offset_table_rtx)])
4324 return 0;
4325
4326 return 1;
4327 }
4328
4329 /* Scan all instructions and renumber all registers into those
4330 available in leaf functions. */
4331
4332 static void
4333 leaf_renumber_regs (rtx first)
4334 {
4335 rtx insn;
4336
4337 /* Renumber only the actual patterns.
4338 The reg-notes can contain frame pointer refs,
4339 and renumbering them could crash, and should not be needed. */
4340 for (insn = first; insn; insn = NEXT_INSN (insn))
4341 if (INSN_P (insn))
4342 leaf_renumber_regs_insn (PATTERN (insn));
4343 }
4344
4345 /* Scan IN_RTX and its subexpressions, and renumber all regs into those
4346 available in leaf functions. */
4347
4348 void
4349 leaf_renumber_regs_insn (rtx in_rtx)
4350 {
4351 int i, j;
4352 const char *format_ptr;
4353
4354 if (in_rtx == 0)
4355 return;
4356
4357 /* Renumber all input-registers into output-registers.
4358 renumbered_regs would be 1 for an output-register;
4359 they */
4360
4361 if (REG_P (in_rtx))
4362 {
4363 int newreg;
4364
4365 /* Don't renumber the same reg twice. */
4366 if (in_rtx->used)
4367 return;
4368
4369 newreg = REGNO (in_rtx);
4370 /* Don't try to renumber pseudo regs. It is possible for a pseudo reg
4371 to reach here as part of a REG_NOTE. */
4372 if (newreg >= FIRST_PSEUDO_REGISTER)
4373 {
4374 in_rtx->used = 1;
4375 return;
4376 }
4377 newreg = LEAF_REG_REMAP (newreg);
4378 gcc_assert (newreg >= 0);
4379 df_set_regs_ever_live (REGNO (in_rtx), false);
4380 df_set_regs_ever_live (newreg, true);
4381 SET_REGNO (in_rtx, newreg);
4382 in_rtx->used = 1;
4383 }
4384
4385 if (INSN_P (in_rtx))
4386 {
4387 /* Inside a SEQUENCE, we find insns.
4388 Renumber just the patterns of these insns,
4389 just as we do for the top-level insns. */
4390 leaf_renumber_regs_insn (PATTERN (in_rtx));
4391 return;
4392 }
4393
4394 format_ptr = GET_RTX_FORMAT (GET_CODE (in_rtx));
4395
4396 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (in_rtx)); i++)
4397 switch (*format_ptr++)
4398 {
4399 case 'e':
4400 leaf_renumber_regs_insn (XEXP (in_rtx, i));
4401 break;
4402
4403 case 'E':
4404 if (NULL != XVEC (in_rtx, i))
4405 {
4406 for (j = 0; j < XVECLEN (in_rtx, i); j++)
4407 leaf_renumber_regs_insn (XVECEXP (in_rtx, i, j));
4408 }
4409 break;
4410
4411 case 'S':
4412 case 's':
4413 case '0':
4414 case 'i':
4415 case 'w':
4416 case 'n':
4417 case 'u':
4418 break;
4419
4420 default:
4421 gcc_unreachable ();
4422 }
4423 }
4424 #endif
4425 \f
4426 /* Turn the RTL into assembly. */
4427 static unsigned int
4428 rest_of_handle_final (void)
4429 {
4430 rtx x;
4431 const char *fnname;
4432
4433 /* Get the function's name, as described by its RTL. This may be
4434 different from the DECL_NAME name used in the source file. */
4435
4436 x = DECL_RTL (current_function_decl);
4437 gcc_assert (MEM_P (x));
4438 x = XEXP (x, 0);
4439 gcc_assert (GET_CODE (x) == SYMBOL_REF);
4440 fnname = XSTR (x, 0);
4441
4442 assemble_start_function (current_function_decl, fnname);
4443 final_start_function (get_insns (), asm_out_file, optimize);
4444 final (get_insns (), asm_out_file, optimize);
4445 final_end_function ();
4446
4447 /* The IA-64 ".handlerdata" directive must be issued before the ".endp"
4448 directive that closes the procedure descriptor. Similarly, for x64 SEH.
4449 Otherwise it's not strictly necessary, but it doesn't hurt either. */
4450 output_function_exception_table (fnname);
4451
4452 assemble_end_function (current_function_decl, fnname);
4453
4454 user_defined_section_attribute = false;
4455
4456 /* Free up reg info memory. */
4457 free_reg_info ();
4458
4459 if (! quiet_flag)
4460 fflush (asm_out_file);
4461
4462 /* Write DBX symbols if requested. */
4463
4464 /* Note that for those inline functions where we don't initially
4465 know for certain that we will be generating an out-of-line copy,
4466 the first invocation of this routine (rest_of_compilation) will
4467 skip over this code by doing a `goto exit_rest_of_compilation;'.
4468 Later on, wrapup_global_declarations will (indirectly) call
4469 rest_of_compilation again for those inline functions that need
4470 to have out-of-line copies generated. During that call, we
4471 *will* be routed past here. */
4472
4473 timevar_push (TV_SYMOUT);
4474 if (!DECL_IGNORED_P (current_function_decl))
4475 debug_hooks->function_decl (current_function_decl);
4476 timevar_pop (TV_SYMOUT);
4477
4478 /* Release the blocks that are linked to DECL_INITIAL() to free the memory. */
4479 DECL_INITIAL (current_function_decl) = error_mark_node;
4480
4481 if (DECL_STATIC_CONSTRUCTOR (current_function_decl)
4482 && targetm.have_ctors_dtors)
4483 targetm.asm_out.constructor (XEXP (DECL_RTL (current_function_decl), 0),
4484 decl_init_priority_lookup
4485 (current_function_decl));
4486 if (DECL_STATIC_DESTRUCTOR (current_function_decl)
4487 && targetm.have_ctors_dtors)
4488 targetm.asm_out.destructor (XEXP (DECL_RTL (current_function_decl), 0),
4489 decl_fini_priority_lookup
4490 (current_function_decl));
4491 return 0;
4492 }
4493
4494 namespace {
4495
4496 const pass_data pass_data_final =
4497 {
4498 RTL_PASS, /* type */
4499 "final", /* name */
4500 OPTGROUP_NONE, /* optinfo_flags */
4501 true, /* has_execute */
4502 TV_FINAL, /* tv_id */
4503 0, /* properties_required */
4504 0, /* properties_provided */
4505 0, /* properties_destroyed */
4506 0, /* todo_flags_start */
4507 0, /* todo_flags_finish */
4508 };
4509
4510 class pass_final : public rtl_opt_pass
4511 {
4512 public:
4513 pass_final (gcc::context *ctxt)
4514 : rtl_opt_pass (pass_data_final, ctxt)
4515 {}
4516
4517 /* opt_pass methods: */
4518 virtual unsigned int execute (function *) { return rest_of_handle_final (); }
4519
4520 }; // class pass_final
4521
4522 } // anon namespace
4523
4524 rtl_opt_pass *
4525 make_pass_final (gcc::context *ctxt)
4526 {
4527 return new pass_final (ctxt);
4528 }
4529
4530
4531 static unsigned int
4532 rest_of_handle_shorten_branches (void)
4533 {
4534 /* Shorten branches. */
4535 shorten_branches (get_insns ());
4536 return 0;
4537 }
4538
4539 namespace {
4540
4541 const pass_data pass_data_shorten_branches =
4542 {
4543 RTL_PASS, /* type */
4544 "shorten", /* name */
4545 OPTGROUP_NONE, /* optinfo_flags */
4546 true, /* has_execute */
4547 TV_SHORTEN_BRANCH, /* tv_id */
4548 0, /* properties_required */
4549 0, /* properties_provided */
4550 0, /* properties_destroyed */
4551 0, /* todo_flags_start */
4552 0, /* todo_flags_finish */
4553 };
4554
4555 class pass_shorten_branches : public rtl_opt_pass
4556 {
4557 public:
4558 pass_shorten_branches (gcc::context *ctxt)
4559 : rtl_opt_pass (pass_data_shorten_branches, ctxt)
4560 {}
4561
4562 /* opt_pass methods: */
4563 virtual unsigned int execute (function *)
4564 {
4565 return rest_of_handle_shorten_branches ();
4566 }
4567
4568 }; // class pass_shorten_branches
4569
4570 } // anon namespace
4571
4572 rtl_opt_pass *
4573 make_pass_shorten_branches (gcc::context *ctxt)
4574 {
4575 return new pass_shorten_branches (ctxt);
4576 }
4577
4578
4579 static unsigned int
4580 rest_of_clean_state (void)
4581 {
4582 rtx insn, next;
4583 FILE *final_output = NULL;
4584 int save_unnumbered = flag_dump_unnumbered;
4585 int save_noaddr = flag_dump_noaddr;
4586
4587 if (flag_dump_final_insns)
4588 {
4589 final_output = fopen (flag_dump_final_insns, "a");
4590 if (!final_output)
4591 {
4592 error ("could not open final insn dump file %qs: %m",
4593 flag_dump_final_insns);
4594 flag_dump_final_insns = NULL;
4595 }
4596 else
4597 {
4598 flag_dump_noaddr = flag_dump_unnumbered = 1;
4599 if (flag_compare_debug_opt || flag_compare_debug)
4600 dump_flags |= TDF_NOUID;
4601 dump_function_header (final_output, current_function_decl,
4602 dump_flags);
4603 final_insns_dump_p = true;
4604
4605 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4606 if (LABEL_P (insn))
4607 INSN_UID (insn) = CODE_LABEL_NUMBER (insn);
4608 else
4609 {
4610 if (NOTE_P (insn))
4611 set_block_for_insn (insn, NULL);
4612 INSN_UID (insn) = 0;
4613 }
4614 }
4615 }
4616
4617 /* It is very important to decompose the RTL instruction chain here:
4618 debug information keeps pointing into CODE_LABEL insns inside the function
4619 body. If these remain pointing to the other insns, we end up preserving
4620 whole RTL chain and attached detailed debug info in memory. */
4621 for (insn = get_insns (); insn; insn = next)
4622 {
4623 next = NEXT_INSN (insn);
4624 NEXT_INSN (insn) = NULL;
4625 PREV_INSN (insn) = NULL;
4626
4627 if (final_output
4628 && (!NOTE_P (insn) ||
4629 (NOTE_KIND (insn) != NOTE_INSN_VAR_LOCATION
4630 && NOTE_KIND (insn) != NOTE_INSN_CALL_ARG_LOCATION
4631 && NOTE_KIND (insn) != NOTE_INSN_BLOCK_BEG
4632 && NOTE_KIND (insn) != NOTE_INSN_BLOCK_END
4633 && NOTE_KIND (insn) != NOTE_INSN_DELETED_DEBUG_LABEL)))
4634 print_rtl_single (final_output, insn);
4635 }
4636
4637 if (final_output)
4638 {
4639 flag_dump_noaddr = save_noaddr;
4640 flag_dump_unnumbered = save_unnumbered;
4641 final_insns_dump_p = false;
4642
4643 if (fclose (final_output))
4644 {
4645 error ("could not close final insn dump file %qs: %m",
4646 flag_dump_final_insns);
4647 flag_dump_final_insns = NULL;
4648 }
4649 }
4650
4651 /* In case the function was not output,
4652 don't leave any temporary anonymous types
4653 queued up for sdb output. */
4654 #ifdef SDB_DEBUGGING_INFO
4655 if (write_symbols == SDB_DEBUG)
4656 sdbout_types (NULL_TREE);
4657 #endif
4658
4659 flag_rerun_cse_after_global_opts = 0;
4660 reload_completed = 0;
4661 epilogue_completed = 0;
4662 #ifdef STACK_REGS
4663 regstack_completed = 0;
4664 #endif
4665
4666 /* Clear out the insn_length contents now that they are no
4667 longer valid. */
4668 init_insn_lengths ();
4669
4670 /* Show no temporary slots allocated. */
4671 init_temp_slots ();
4672
4673 free_bb_for_insn ();
4674
4675 delete_tree_ssa ();
4676
4677 /* We can reduce stack alignment on call site only when we are sure that
4678 the function body just produced will be actually used in the final
4679 executable. */
4680 if (decl_binds_to_current_def_p (current_function_decl))
4681 {
4682 unsigned int pref = crtl->preferred_stack_boundary;
4683 if (crtl->stack_alignment_needed > crtl->preferred_stack_boundary)
4684 pref = crtl->stack_alignment_needed;
4685 cgraph_rtl_info (current_function_decl)->preferred_incoming_stack_boundary
4686 = pref;
4687 }
4688
4689 /* Make sure volatile mem refs aren't considered valid operands for
4690 arithmetic insns. We must call this here if this is a nested inline
4691 function, since the above code leaves us in the init_recog state,
4692 and the function context push/pop code does not save/restore volatile_ok.
4693
4694 ??? Maybe it isn't necessary for expand_start_function to call this
4695 anymore if we do it here? */
4696
4697 init_recog_no_volatile ();
4698
4699 /* We're done with this function. Free up memory if we can. */
4700 free_after_parsing (cfun);
4701 free_after_compilation (cfun);
4702 return 0;
4703 }
4704
4705 namespace {
4706
4707 const pass_data pass_data_clean_state =
4708 {
4709 RTL_PASS, /* type */
4710 "*clean_state", /* name */
4711 OPTGROUP_NONE, /* optinfo_flags */
4712 true, /* has_execute */
4713 TV_FINAL, /* tv_id */
4714 0, /* properties_required */
4715 0, /* properties_provided */
4716 PROP_rtl, /* properties_destroyed */
4717 0, /* todo_flags_start */
4718 0, /* todo_flags_finish */
4719 };
4720
4721 class pass_clean_state : public rtl_opt_pass
4722 {
4723 public:
4724 pass_clean_state (gcc::context *ctxt)
4725 : rtl_opt_pass (pass_data_clean_state, ctxt)
4726 {}
4727
4728 /* opt_pass methods: */
4729 virtual unsigned int execute (function *)
4730 {
4731 return rest_of_clean_state ();
4732 }
4733
4734 }; // class pass_clean_state
4735
4736 } // anon namespace
4737
4738 rtl_opt_pass *
4739 make_pass_clean_state (gcc::context *ctxt)
4740 {
4741 return new pass_clean_state (ctxt);
4742 }