gensupport.c (init_rtx_reader_args_cb): Start counting code generating patterns from...
[gcc.git] / gcc / final.c
1 /* Convert RTL to assembler code and output it, for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009,
4 2010, 2011
5 Free Software Foundation, Inc.
6
7 This file is part of GCC.
8
9 GCC is free software; you can redistribute it and/or modify it under
10 the terms of the GNU General Public License as published by the Free
11 Software Foundation; either version 3, or (at your option) any later
12 version.
13
14 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
15 WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with GCC; see the file COPYING3. If not see
21 <http://www.gnu.org/licenses/>. */
22
23 /* This is the final pass of the compiler.
24 It looks at the rtl code for a function and outputs assembler code.
25
26 Call `final_start_function' to output the assembler code for function entry,
27 `final' to output assembler code for some RTL code,
28 `final_end_function' to output assembler code for function exit.
29 If a function is compiled in several pieces, each piece is
30 output separately with `final'.
31
32 Some optimizations are also done at this level.
33 Move instructions that were made unnecessary by good register allocation
34 are detected and omitted from the output. (Though most of these
35 are removed by the last jump pass.)
36
37 Instructions to set the condition codes are omitted when it can be
38 seen that the condition codes already had the desired values.
39
40 In some cases it is sufficient if the inherited condition codes
41 have related values, but this may require the following insn
42 (the one that tests the condition codes) to be modified.
43
44 The code for the function prologue and epilogue are generated
45 directly in assembler by the target functions function_prologue and
46 function_epilogue. Those instructions never exist as rtl. */
47
48 #include "config.h"
49 #include "system.h"
50 #include "coretypes.h"
51 #include "tm.h"
52
53 #include "tree.h"
54 #include "rtl.h"
55 #include "tm_p.h"
56 #include "regs.h"
57 #include "insn-config.h"
58 #include "insn-attr.h"
59 #include "recog.h"
60 #include "conditions.h"
61 #include "flags.h"
62 #include "hard-reg-set.h"
63 #include "output.h"
64 #include "except.h"
65 #include "function.h"
66 #include "rtl-error.h"
67 #include "toplev.h" /* exact_log2, floor_log2 */
68 #include "reload.h"
69 #include "intl.h"
70 #include "basic-block.h"
71 #include "target.h"
72 #include "targhooks.h"
73 #include "debug.h"
74 #include "expr.h"
75 #include "tree-pass.h"
76 #include "tree-flow.h"
77 #include "timevar.h"
78 #include "cgraph.h"
79 #include "coverage.h"
80 #include "df.h"
81 #include "vecprim.h"
82 #include "ggc.h"
83 #include "cfgloop.h"
84 #include "params.h"
85 #include "tree-pretty-print.h" /* for dump_function_header */
86
87 #ifdef XCOFF_DEBUGGING_INFO
88 #include "xcoffout.h" /* Needed for external data
89 declarations for e.g. AIX 4.x. */
90 #endif
91
92 #include "dwarf2out.h"
93
94 #ifdef DBX_DEBUGGING_INFO
95 #include "dbxout.h"
96 #endif
97
98 #ifdef SDB_DEBUGGING_INFO
99 #include "sdbout.h"
100 #endif
101
102 /* Most ports that aren't using cc0 don't need to define CC_STATUS_INIT.
103 So define a null default for it to save conditionalization later. */
104 #ifndef CC_STATUS_INIT
105 #define CC_STATUS_INIT
106 #endif
107
108 /* Is the given character a logical line separator for the assembler? */
109 #ifndef IS_ASM_LOGICAL_LINE_SEPARATOR
110 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == ';')
111 #endif
112
113 #ifndef JUMP_TABLES_IN_TEXT_SECTION
114 #define JUMP_TABLES_IN_TEXT_SECTION 0
115 #endif
116
117 /* Bitflags used by final_scan_insn. */
118 #define SEEN_BB 1
119 #define SEEN_NOTE 2
120 #define SEEN_EMITTED 4
121
122 /* Last insn processed by final_scan_insn. */
123 static rtx debug_insn;
124 rtx current_output_insn;
125
126 /* Line number of last NOTE. */
127 static int last_linenum;
128
129 /* Last discriminator written to assembly. */
130 static int last_discriminator;
131
132 /* Discriminator of current block. */
133 static int discriminator;
134
135 /* Highest line number in current block. */
136 static int high_block_linenum;
137
138 /* Likewise for function. */
139 static int high_function_linenum;
140
141 /* Filename of last NOTE. */
142 static const char *last_filename;
143
144 /* Override filename and line number. */
145 static const char *override_filename;
146 static int override_linenum;
147
148 /* Whether to force emission of a line note before the next insn. */
149 static bool force_source_line = false;
150
151 extern const int length_unit_log; /* This is defined in insn-attrtab.c. */
152
153 /* Nonzero while outputting an `asm' with operands.
154 This means that inconsistencies are the user's fault, so don't die.
155 The precise value is the insn being output, to pass to error_for_asm. */
156 rtx this_is_asm_operands;
157
158 /* Number of operands of this insn, for an `asm' with operands. */
159 static unsigned int insn_noperands;
160
161 /* Compare optimization flag. */
162
163 static rtx last_ignored_compare = 0;
164
165 /* Assign a unique number to each insn that is output.
166 This can be used to generate unique local labels. */
167
168 static int insn_counter = 0;
169
170 #ifdef HAVE_cc0
171 /* This variable contains machine-dependent flags (defined in tm.h)
172 set and examined by output routines
173 that describe how to interpret the condition codes properly. */
174
175 CC_STATUS cc_status;
176
177 /* During output of an insn, this contains a copy of cc_status
178 from before the insn. */
179
180 CC_STATUS cc_prev_status;
181 #endif
182
183 /* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */
184
185 static int block_depth;
186
187 /* Nonzero if have enabled APP processing of our assembler output. */
188
189 static int app_on;
190
191 /* If we are outputting an insn sequence, this contains the sequence rtx.
192 Zero otherwise. */
193
194 rtx final_sequence;
195
196 #ifdef ASSEMBLER_DIALECT
197
198 /* Number of the assembler dialect to use, starting at 0. */
199 static int dialect_number;
200 #endif
201
202 /* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */
203 rtx current_insn_predicate;
204
205 /* True if printing into -fdump-final-insns= dump. */
206 bool final_insns_dump_p;
207
208 #ifdef HAVE_ATTR_length
209 static int asm_insn_count (rtx);
210 #endif
211 static void profile_function (FILE *);
212 static void profile_after_prologue (FILE *);
213 static bool notice_source_line (rtx, bool *);
214 static rtx walk_alter_subreg (rtx *, bool *);
215 static void output_asm_name (void);
216 static void output_alternate_entry_point (FILE *, rtx);
217 static tree get_mem_expr_from_op (rtx, int *);
218 static void output_asm_operand_names (rtx *, int *, int);
219 #ifdef LEAF_REGISTERS
220 static void leaf_renumber_regs (rtx);
221 #endif
222 #ifdef HAVE_cc0
223 static int alter_cond (rtx);
224 #endif
225 #ifndef ADDR_VEC_ALIGN
226 static int final_addr_vec_align (rtx);
227 #endif
228 #ifdef HAVE_ATTR_length
229 static int align_fuzz (rtx, rtx, int, unsigned);
230 #endif
231 \f
232 /* Initialize data in final at the beginning of a compilation. */
233
234 void
235 init_final (const char *filename ATTRIBUTE_UNUSED)
236 {
237 app_on = 0;
238 final_sequence = 0;
239
240 #ifdef ASSEMBLER_DIALECT
241 dialect_number = ASSEMBLER_DIALECT;
242 #endif
243 }
244
245 /* Default target function prologue and epilogue assembler output.
246
247 If not overridden for epilogue code, then the function body itself
248 contains return instructions wherever needed. */
249 void
250 default_function_pro_epilogue (FILE *file ATTRIBUTE_UNUSED,
251 HOST_WIDE_INT size ATTRIBUTE_UNUSED)
252 {
253 }
254
255 void
256 default_function_switched_text_sections (FILE *file ATTRIBUTE_UNUSED,
257 tree decl ATTRIBUTE_UNUSED,
258 bool new_is_cold ATTRIBUTE_UNUSED)
259 {
260 }
261
262 /* Default target hook that outputs nothing to a stream. */
263 void
264 no_asm_to_stream (FILE *file ATTRIBUTE_UNUSED)
265 {
266 }
267
268 /* Enable APP processing of subsequent output.
269 Used before the output from an `asm' statement. */
270
271 void
272 app_enable (void)
273 {
274 if (! app_on)
275 {
276 fputs (ASM_APP_ON, asm_out_file);
277 app_on = 1;
278 }
279 }
280
281 /* Disable APP processing of subsequent output.
282 Called from varasm.c before most kinds of output. */
283
284 void
285 app_disable (void)
286 {
287 if (app_on)
288 {
289 fputs (ASM_APP_OFF, asm_out_file);
290 app_on = 0;
291 }
292 }
293 \f
294 /* Return the number of slots filled in the current
295 delayed branch sequence (we don't count the insn needing the
296 delay slot). Zero if not in a delayed branch sequence. */
297
298 #ifdef DELAY_SLOTS
299 int
300 dbr_sequence_length (void)
301 {
302 if (final_sequence != 0)
303 return XVECLEN (final_sequence, 0) - 1;
304 else
305 return 0;
306 }
307 #endif
308 \f
309 /* The next two pages contain routines used to compute the length of an insn
310 and to shorten branches. */
311
312 /* Arrays for insn lengths, and addresses. The latter is referenced by
313 `insn_current_length'. */
314
315 static int *insn_lengths;
316
317 VEC(int,heap) *insn_addresses_;
318
319 /* Max uid for which the above arrays are valid. */
320 static int insn_lengths_max_uid;
321
322 /* Address of insn being processed. Used by `insn_current_length'. */
323 int insn_current_address;
324
325 /* Address of insn being processed in previous iteration. */
326 int insn_last_address;
327
328 /* known invariant alignment of insn being processed. */
329 int insn_current_align;
330
331 /* After shorten_branches, for any insn, uid_align[INSN_UID (insn)]
332 gives the next following alignment insn that increases the known
333 alignment, or NULL_RTX if there is no such insn.
334 For any alignment obtained this way, we can again index uid_align with
335 its uid to obtain the next following align that in turn increases the
336 alignment, till we reach NULL_RTX; the sequence obtained this way
337 for each insn we'll call the alignment chain of this insn in the following
338 comments. */
339
340 struct label_alignment
341 {
342 short alignment;
343 short max_skip;
344 };
345
346 static rtx *uid_align;
347 static int *uid_shuid;
348 static struct label_alignment *label_align;
349
350 /* Indicate that branch shortening hasn't yet been done. */
351
352 void
353 init_insn_lengths (void)
354 {
355 if (uid_shuid)
356 {
357 free (uid_shuid);
358 uid_shuid = 0;
359 }
360 if (insn_lengths)
361 {
362 free (insn_lengths);
363 insn_lengths = 0;
364 insn_lengths_max_uid = 0;
365 }
366 #ifdef HAVE_ATTR_length
367 INSN_ADDRESSES_FREE ();
368 #endif
369 if (uid_align)
370 {
371 free (uid_align);
372 uid_align = 0;
373 }
374 }
375
376 /* Obtain the current length of an insn. If branch shortening has been done,
377 get its actual length. Otherwise, use FALLBACK_FN to calculate the
378 length. */
379 static inline int
380 get_attr_length_1 (rtx insn ATTRIBUTE_UNUSED,
381 int (*fallback_fn) (rtx) ATTRIBUTE_UNUSED)
382 {
383 #ifdef HAVE_ATTR_length
384 rtx body;
385 int i;
386 int length = 0;
387
388 if (insn_lengths_max_uid > INSN_UID (insn))
389 return insn_lengths[INSN_UID (insn)];
390 else
391 switch (GET_CODE (insn))
392 {
393 case NOTE:
394 case BARRIER:
395 case CODE_LABEL:
396 case DEBUG_INSN:
397 return 0;
398
399 case CALL_INSN:
400 length = fallback_fn (insn);
401 break;
402
403 case JUMP_INSN:
404 body = PATTERN (insn);
405 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
406 {
407 /* Alignment is machine-dependent and should be handled by
408 ADDR_VEC_ALIGN. */
409 }
410 else
411 length = fallback_fn (insn);
412 break;
413
414 case INSN:
415 body = PATTERN (insn);
416 if (GET_CODE (body) == USE || GET_CODE (body) == CLOBBER)
417 return 0;
418
419 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
420 length = asm_insn_count (body) * fallback_fn (insn);
421 else if (GET_CODE (body) == SEQUENCE)
422 for (i = 0; i < XVECLEN (body, 0); i++)
423 length += get_attr_length_1 (XVECEXP (body, 0, i), fallback_fn);
424 else
425 length = fallback_fn (insn);
426 break;
427
428 default:
429 break;
430 }
431
432 #ifdef ADJUST_INSN_LENGTH
433 ADJUST_INSN_LENGTH (insn, length);
434 #endif
435 return length;
436 #else /* not HAVE_ATTR_length */
437 return 0;
438 #define insn_default_length 0
439 #define insn_min_length 0
440 #endif /* not HAVE_ATTR_length */
441 }
442
443 /* Obtain the current length of an insn. If branch shortening has been done,
444 get its actual length. Otherwise, get its maximum length. */
445 int
446 get_attr_length (rtx insn)
447 {
448 return get_attr_length_1 (insn, insn_default_length);
449 }
450
451 /* Obtain the current length of an insn. If branch shortening has been done,
452 get its actual length. Otherwise, get its minimum length. */
453 int
454 get_attr_min_length (rtx insn)
455 {
456 return get_attr_length_1 (insn, insn_min_length);
457 }
458 \f
459 /* Code to handle alignment inside shorten_branches. */
460
461 /* Here is an explanation how the algorithm in align_fuzz can give
462 proper results:
463
464 Call a sequence of instructions beginning with alignment point X
465 and continuing until the next alignment point `block X'. When `X'
466 is used in an expression, it means the alignment value of the
467 alignment point.
468
469 Call the distance between the start of the first insn of block X, and
470 the end of the last insn of block X `IX', for the `inner size of X'.
471 This is clearly the sum of the instruction lengths.
472
473 Likewise with the next alignment-delimited block following X, which we
474 shall call block Y.
475
476 Call the distance between the start of the first insn of block X, and
477 the start of the first insn of block Y `OX', for the `outer size of X'.
478
479 The estimated padding is then OX - IX.
480
481 OX can be safely estimated as
482
483 if (X >= Y)
484 OX = round_up(IX, Y)
485 else
486 OX = round_up(IX, X) + Y - X
487
488 Clearly est(IX) >= real(IX), because that only depends on the
489 instruction lengths, and those being overestimated is a given.
490
491 Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so
492 we needn't worry about that when thinking about OX.
493
494 When X >= Y, the alignment provided by Y adds no uncertainty factor
495 for branch ranges starting before X, so we can just round what we have.
496 But when X < Y, we don't know anything about the, so to speak,
497 `middle bits', so we have to assume the worst when aligning up from an
498 address mod X to one mod Y, which is Y - X. */
499
500 #ifndef LABEL_ALIGN
501 #define LABEL_ALIGN(LABEL) align_labels_log
502 #endif
503
504 #ifndef LOOP_ALIGN
505 #define LOOP_ALIGN(LABEL) align_loops_log
506 #endif
507
508 #ifndef LABEL_ALIGN_AFTER_BARRIER
509 #define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0
510 #endif
511
512 #ifndef JUMP_ALIGN
513 #define JUMP_ALIGN(LABEL) align_jumps_log
514 #endif
515
516 int
517 default_label_align_after_barrier_max_skip (rtx insn ATTRIBUTE_UNUSED)
518 {
519 return 0;
520 }
521
522 int
523 default_loop_align_max_skip (rtx insn ATTRIBUTE_UNUSED)
524 {
525 return align_loops_max_skip;
526 }
527
528 int
529 default_label_align_max_skip (rtx insn ATTRIBUTE_UNUSED)
530 {
531 return align_labels_max_skip;
532 }
533
534 int
535 default_jump_align_max_skip (rtx insn ATTRIBUTE_UNUSED)
536 {
537 return align_jumps_max_skip;
538 }
539
540 #ifndef ADDR_VEC_ALIGN
541 static int
542 final_addr_vec_align (rtx addr_vec)
543 {
544 int align = GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec)));
545
546 if (align > BIGGEST_ALIGNMENT / BITS_PER_UNIT)
547 align = BIGGEST_ALIGNMENT / BITS_PER_UNIT;
548 return exact_log2 (align);
549
550 }
551
552 #define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC)
553 #endif
554
555 #ifndef INSN_LENGTH_ALIGNMENT
556 #define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log
557 #endif
558
559 #define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)])
560
561 static int min_labelno, max_labelno;
562
563 #define LABEL_TO_ALIGNMENT(LABEL) \
564 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment)
565
566 #define LABEL_TO_MAX_SKIP(LABEL) \
567 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip)
568
569 /* For the benefit of port specific code do this also as a function. */
570
571 int
572 label_to_alignment (rtx label)
573 {
574 if (CODE_LABEL_NUMBER (label) <= max_labelno)
575 return LABEL_TO_ALIGNMENT (label);
576 return 0;
577 }
578
579 int
580 label_to_max_skip (rtx label)
581 {
582 if (CODE_LABEL_NUMBER (label) <= max_labelno)
583 return LABEL_TO_MAX_SKIP (label);
584 return 0;
585 }
586
587 #ifdef HAVE_ATTR_length
588 /* The differences in addresses
589 between a branch and its target might grow or shrink depending on
590 the alignment the start insn of the range (the branch for a forward
591 branch or the label for a backward branch) starts out on; if these
592 differences are used naively, they can even oscillate infinitely.
593 We therefore want to compute a 'worst case' address difference that
594 is independent of the alignment the start insn of the range end
595 up on, and that is at least as large as the actual difference.
596 The function align_fuzz calculates the amount we have to add to the
597 naively computed difference, by traversing the part of the alignment
598 chain of the start insn of the range that is in front of the end insn
599 of the range, and considering for each alignment the maximum amount
600 that it might contribute to a size increase.
601
602 For casesi tables, we also want to know worst case minimum amounts of
603 address difference, in case a machine description wants to introduce
604 some common offset that is added to all offsets in a table.
605 For this purpose, align_fuzz with a growth argument of 0 computes the
606 appropriate adjustment. */
607
608 /* Compute the maximum delta by which the difference of the addresses of
609 START and END might grow / shrink due to a different address for start
610 which changes the size of alignment insns between START and END.
611 KNOWN_ALIGN_LOG is the alignment known for START.
612 GROWTH should be ~0 if the objective is to compute potential code size
613 increase, and 0 if the objective is to compute potential shrink.
614 The return value is undefined for any other value of GROWTH. */
615
616 static int
617 align_fuzz (rtx start, rtx end, int known_align_log, unsigned int growth)
618 {
619 int uid = INSN_UID (start);
620 rtx align_label;
621 int known_align = 1 << known_align_log;
622 int end_shuid = INSN_SHUID (end);
623 int fuzz = 0;
624
625 for (align_label = uid_align[uid]; align_label; align_label = uid_align[uid])
626 {
627 int align_addr, new_align;
628
629 uid = INSN_UID (align_label);
630 align_addr = INSN_ADDRESSES (uid) - insn_lengths[uid];
631 if (uid_shuid[uid] > end_shuid)
632 break;
633 known_align_log = LABEL_TO_ALIGNMENT (align_label);
634 new_align = 1 << known_align_log;
635 if (new_align < known_align)
636 continue;
637 fuzz += (-align_addr ^ growth) & (new_align - known_align);
638 known_align = new_align;
639 }
640 return fuzz;
641 }
642
643 /* Compute a worst-case reference address of a branch so that it
644 can be safely used in the presence of aligned labels. Since the
645 size of the branch itself is unknown, the size of the branch is
646 not included in the range. I.e. for a forward branch, the reference
647 address is the end address of the branch as known from the previous
648 branch shortening pass, minus a value to account for possible size
649 increase due to alignment. For a backward branch, it is the start
650 address of the branch as known from the current pass, plus a value
651 to account for possible size increase due to alignment.
652 NB.: Therefore, the maximum offset allowed for backward branches needs
653 to exclude the branch size. */
654
655 int
656 insn_current_reference_address (rtx branch)
657 {
658 rtx dest, seq;
659 int seq_uid;
660
661 if (! INSN_ADDRESSES_SET_P ())
662 return 0;
663
664 seq = NEXT_INSN (PREV_INSN (branch));
665 seq_uid = INSN_UID (seq);
666 if (!JUMP_P (branch))
667 /* This can happen for example on the PA; the objective is to know the
668 offset to address something in front of the start of the function.
669 Thus, we can treat it like a backward branch.
670 We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than
671 any alignment we'd encounter, so we skip the call to align_fuzz. */
672 return insn_current_address;
673 dest = JUMP_LABEL (branch);
674
675 /* BRANCH has no proper alignment chain set, so use SEQ.
676 BRANCH also has no INSN_SHUID. */
677 if (INSN_SHUID (seq) < INSN_SHUID (dest))
678 {
679 /* Forward branch. */
680 return (insn_last_address + insn_lengths[seq_uid]
681 - align_fuzz (seq, dest, length_unit_log, ~0));
682 }
683 else
684 {
685 /* Backward branch. */
686 return (insn_current_address
687 + align_fuzz (dest, seq, length_unit_log, ~0));
688 }
689 }
690 #endif /* HAVE_ATTR_length */
691 \f
692 /* Compute branch alignments based on frequency information in the
693 CFG. */
694
695 unsigned int
696 compute_alignments (void)
697 {
698 int log, max_skip, max_log;
699 basic_block bb;
700 int freq_max = 0;
701 int freq_threshold = 0;
702
703 if (label_align)
704 {
705 free (label_align);
706 label_align = 0;
707 }
708
709 max_labelno = max_label_num ();
710 min_labelno = get_first_label_num ();
711 label_align = XCNEWVEC (struct label_alignment, max_labelno - min_labelno + 1);
712
713 /* If not optimizing or optimizing for size, don't assign any alignments. */
714 if (! optimize || optimize_function_for_size_p (cfun))
715 return 0;
716
717 if (dump_file)
718 {
719 dump_reg_info (dump_file);
720 dump_flow_info (dump_file, TDF_DETAILS);
721 flow_loops_dump (dump_file, NULL, 1);
722 }
723 loop_optimizer_init (AVOID_CFG_MODIFICATIONS);
724 FOR_EACH_BB (bb)
725 if (bb->frequency > freq_max)
726 freq_max = bb->frequency;
727 freq_threshold = freq_max / PARAM_VALUE (PARAM_ALIGN_THRESHOLD);
728
729 if (dump_file)
730 fprintf(dump_file, "freq_max: %i\n",freq_max);
731 FOR_EACH_BB (bb)
732 {
733 rtx label = BB_HEAD (bb);
734 int fallthru_frequency = 0, branch_frequency = 0, has_fallthru = 0;
735 edge e;
736 edge_iterator ei;
737
738 if (!LABEL_P (label)
739 || optimize_bb_for_size_p (bb))
740 {
741 if (dump_file)
742 fprintf(dump_file, "BB %4i freq %4i loop %2i loop_depth %2i skipped.\n",
743 bb->index, bb->frequency, bb->loop_father->num, bb->loop_depth);
744 continue;
745 }
746 max_log = LABEL_ALIGN (label);
747 max_skip = targetm.asm_out.label_align_max_skip (label);
748
749 FOR_EACH_EDGE (e, ei, bb->preds)
750 {
751 if (e->flags & EDGE_FALLTHRU)
752 has_fallthru = 1, fallthru_frequency += EDGE_FREQUENCY (e);
753 else
754 branch_frequency += EDGE_FREQUENCY (e);
755 }
756 if (dump_file)
757 {
758 fprintf(dump_file, "BB %4i freq %4i loop %2i loop_depth %2i fall %4i branch %4i",
759 bb->index, bb->frequency, bb->loop_father->num,
760 bb->loop_depth,
761 fallthru_frequency, branch_frequency);
762 if (!bb->loop_father->inner && bb->loop_father->num)
763 fprintf (dump_file, " inner_loop");
764 if (bb->loop_father->header == bb)
765 fprintf (dump_file, " loop_header");
766 fprintf (dump_file, "\n");
767 }
768
769 /* There are two purposes to align block with no fallthru incoming edge:
770 1) to avoid fetch stalls when branch destination is near cache boundary
771 2) to improve cache efficiency in case the previous block is not executed
772 (so it does not need to be in the cache).
773
774 We to catch first case, we align frequently executed blocks.
775 To catch the second, we align blocks that are executed more frequently
776 than the predecessor and the predecessor is likely to not be executed
777 when function is called. */
778
779 if (!has_fallthru
780 && (branch_frequency > freq_threshold
781 || (bb->frequency > bb->prev_bb->frequency * 10
782 && (bb->prev_bb->frequency
783 <= ENTRY_BLOCK_PTR->frequency / 2))))
784 {
785 log = JUMP_ALIGN (label);
786 if (dump_file)
787 fprintf(dump_file, " jump alignment added.\n");
788 if (max_log < log)
789 {
790 max_log = log;
791 max_skip = targetm.asm_out.jump_align_max_skip (label);
792 }
793 }
794 /* In case block is frequent and reached mostly by non-fallthru edge,
795 align it. It is most likely a first block of loop. */
796 if (has_fallthru
797 && optimize_bb_for_speed_p (bb)
798 && branch_frequency + fallthru_frequency > freq_threshold
799 && (branch_frequency
800 > fallthru_frequency * PARAM_VALUE (PARAM_ALIGN_LOOP_ITERATIONS)))
801 {
802 log = LOOP_ALIGN (label);
803 if (dump_file)
804 fprintf(dump_file, " internal loop alignment added.\n");
805 if (max_log < log)
806 {
807 max_log = log;
808 max_skip = targetm.asm_out.loop_align_max_skip (label);
809 }
810 }
811 LABEL_TO_ALIGNMENT (label) = max_log;
812 LABEL_TO_MAX_SKIP (label) = max_skip;
813 }
814
815 loop_optimizer_finalize ();
816 free_dominance_info (CDI_DOMINATORS);
817 return 0;
818 }
819
820 struct rtl_opt_pass pass_compute_alignments =
821 {
822 {
823 RTL_PASS,
824 "alignments", /* name */
825 NULL, /* gate */
826 compute_alignments, /* execute */
827 NULL, /* sub */
828 NULL, /* next */
829 0, /* static_pass_number */
830 TV_NONE, /* tv_id */
831 0, /* properties_required */
832 0, /* properties_provided */
833 0, /* properties_destroyed */
834 0, /* todo_flags_start */
835 TODO_verify_rtl_sharing
836 | TODO_ggc_collect /* todo_flags_finish */
837 }
838 };
839
840 \f
841 /* Make a pass over all insns and compute their actual lengths by shortening
842 any branches of variable length if possible. */
843
844 /* shorten_branches might be called multiple times: for example, the SH
845 port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG.
846 In order to do this, it needs proper length information, which it obtains
847 by calling shorten_branches. This cannot be collapsed with
848 shorten_branches itself into a single pass unless we also want to integrate
849 reorg.c, since the branch splitting exposes new instructions with delay
850 slots. */
851
852 void
853 shorten_branches (rtx first ATTRIBUTE_UNUSED)
854 {
855 rtx insn;
856 int max_uid;
857 int i;
858 int max_log;
859 int max_skip;
860 #ifdef HAVE_ATTR_length
861 #define MAX_CODE_ALIGN 16
862 rtx seq;
863 int something_changed = 1;
864 char *varying_length;
865 rtx body;
866 int uid;
867 rtx align_tab[MAX_CODE_ALIGN];
868
869 #endif
870
871 /* Compute maximum UID and allocate label_align / uid_shuid. */
872 max_uid = get_max_uid ();
873
874 /* Free uid_shuid before reallocating it. */
875 free (uid_shuid);
876
877 uid_shuid = XNEWVEC (int, max_uid);
878
879 if (max_labelno != max_label_num ())
880 {
881 int old = max_labelno;
882 int n_labels;
883 int n_old_labels;
884
885 max_labelno = max_label_num ();
886
887 n_labels = max_labelno - min_labelno + 1;
888 n_old_labels = old - min_labelno + 1;
889
890 label_align = XRESIZEVEC (struct label_alignment, label_align, n_labels);
891
892 /* Range of labels grows monotonically in the function. Failing here
893 means that the initialization of array got lost. */
894 gcc_assert (n_old_labels <= n_labels);
895
896 memset (label_align + n_old_labels, 0,
897 (n_labels - n_old_labels) * sizeof (struct label_alignment));
898 }
899
900 /* Initialize label_align and set up uid_shuid to be strictly
901 monotonically rising with insn order. */
902 /* We use max_log here to keep track of the maximum alignment we want to
903 impose on the next CODE_LABEL (or the current one if we are processing
904 the CODE_LABEL itself). */
905
906 max_log = 0;
907 max_skip = 0;
908
909 for (insn = get_insns (), i = 1; insn; insn = NEXT_INSN (insn))
910 {
911 int log;
912
913 INSN_SHUID (insn) = i++;
914 if (INSN_P (insn))
915 continue;
916
917 if (LABEL_P (insn))
918 {
919 rtx next;
920 bool next_is_jumptable;
921
922 /* Merge in alignments computed by compute_alignments. */
923 log = LABEL_TO_ALIGNMENT (insn);
924 if (max_log < log)
925 {
926 max_log = log;
927 max_skip = LABEL_TO_MAX_SKIP (insn);
928 }
929
930 next = next_nonnote_insn (insn);
931 next_is_jumptable = next && JUMP_TABLE_DATA_P (next);
932 if (!next_is_jumptable)
933 {
934 log = LABEL_ALIGN (insn);
935 if (max_log < log)
936 {
937 max_log = log;
938 max_skip = targetm.asm_out.label_align_max_skip (insn);
939 }
940 }
941 /* ADDR_VECs only take room if read-only data goes into the text
942 section. */
943 if ((JUMP_TABLES_IN_TEXT_SECTION
944 || readonly_data_section == text_section)
945 && next_is_jumptable)
946 {
947 log = ADDR_VEC_ALIGN (next);
948 if (max_log < log)
949 {
950 max_log = log;
951 max_skip = targetm.asm_out.label_align_max_skip (insn);
952 }
953 }
954 LABEL_TO_ALIGNMENT (insn) = max_log;
955 LABEL_TO_MAX_SKIP (insn) = max_skip;
956 max_log = 0;
957 max_skip = 0;
958 }
959 else if (BARRIER_P (insn))
960 {
961 rtx label;
962
963 for (label = insn; label && ! INSN_P (label);
964 label = NEXT_INSN (label))
965 if (LABEL_P (label))
966 {
967 log = LABEL_ALIGN_AFTER_BARRIER (insn);
968 if (max_log < log)
969 {
970 max_log = log;
971 max_skip = targetm.asm_out.label_align_after_barrier_max_skip (label);
972 }
973 break;
974 }
975 }
976 }
977 #ifdef HAVE_ATTR_length
978
979 /* Allocate the rest of the arrays. */
980 insn_lengths = XNEWVEC (int, max_uid);
981 insn_lengths_max_uid = max_uid;
982 /* Syntax errors can lead to labels being outside of the main insn stream.
983 Initialize insn_addresses, so that we get reproducible results. */
984 INSN_ADDRESSES_ALLOC (max_uid);
985
986 varying_length = XCNEWVEC (char, max_uid);
987
988 /* Initialize uid_align. We scan instructions
989 from end to start, and keep in align_tab[n] the last seen insn
990 that does an alignment of at least n+1, i.e. the successor
991 in the alignment chain for an insn that does / has a known
992 alignment of n. */
993 uid_align = XCNEWVEC (rtx, max_uid);
994
995 for (i = MAX_CODE_ALIGN; --i >= 0;)
996 align_tab[i] = NULL_RTX;
997 seq = get_last_insn ();
998 for (; seq; seq = PREV_INSN (seq))
999 {
1000 int uid = INSN_UID (seq);
1001 int log;
1002 log = (LABEL_P (seq) ? LABEL_TO_ALIGNMENT (seq) : 0);
1003 uid_align[uid] = align_tab[0];
1004 if (log)
1005 {
1006 /* Found an alignment label. */
1007 uid_align[uid] = align_tab[log];
1008 for (i = log - 1; i >= 0; i--)
1009 align_tab[i] = seq;
1010 }
1011 }
1012 #ifdef CASE_VECTOR_SHORTEN_MODE
1013 if (optimize)
1014 {
1015 /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum
1016 label fields. */
1017
1018 int min_shuid = INSN_SHUID (get_insns ()) - 1;
1019 int max_shuid = INSN_SHUID (get_last_insn ()) + 1;
1020 int rel;
1021
1022 for (insn = first; insn != 0; insn = NEXT_INSN (insn))
1023 {
1024 rtx min_lab = NULL_RTX, max_lab = NULL_RTX, pat;
1025 int len, i, min, max, insn_shuid;
1026 int min_align;
1027 addr_diff_vec_flags flags;
1028
1029 if (!JUMP_P (insn)
1030 || GET_CODE (PATTERN (insn)) != ADDR_DIFF_VEC)
1031 continue;
1032 pat = PATTERN (insn);
1033 len = XVECLEN (pat, 1);
1034 gcc_assert (len > 0);
1035 min_align = MAX_CODE_ALIGN;
1036 for (min = max_shuid, max = min_shuid, i = len - 1; i >= 0; i--)
1037 {
1038 rtx lab = XEXP (XVECEXP (pat, 1, i), 0);
1039 int shuid = INSN_SHUID (lab);
1040 if (shuid < min)
1041 {
1042 min = shuid;
1043 min_lab = lab;
1044 }
1045 if (shuid > max)
1046 {
1047 max = shuid;
1048 max_lab = lab;
1049 }
1050 if (min_align > LABEL_TO_ALIGNMENT (lab))
1051 min_align = LABEL_TO_ALIGNMENT (lab);
1052 }
1053 XEXP (pat, 2) = gen_rtx_LABEL_REF (Pmode, min_lab);
1054 XEXP (pat, 3) = gen_rtx_LABEL_REF (Pmode, max_lab);
1055 insn_shuid = INSN_SHUID (insn);
1056 rel = INSN_SHUID (XEXP (XEXP (pat, 0), 0));
1057 memset (&flags, 0, sizeof (flags));
1058 flags.min_align = min_align;
1059 flags.base_after_vec = rel > insn_shuid;
1060 flags.min_after_vec = min > insn_shuid;
1061 flags.max_after_vec = max > insn_shuid;
1062 flags.min_after_base = min > rel;
1063 flags.max_after_base = max > rel;
1064 ADDR_DIFF_VEC_FLAGS (pat) = flags;
1065 }
1066 }
1067 #endif /* CASE_VECTOR_SHORTEN_MODE */
1068
1069 /* Compute initial lengths, addresses, and varying flags for each insn. */
1070 for (insn_current_address = 0, insn = first;
1071 insn != 0;
1072 insn_current_address += insn_lengths[uid], insn = NEXT_INSN (insn))
1073 {
1074 uid = INSN_UID (insn);
1075
1076 insn_lengths[uid] = 0;
1077
1078 if (LABEL_P (insn))
1079 {
1080 int log = LABEL_TO_ALIGNMENT (insn);
1081 if (log)
1082 {
1083 int align = 1 << log;
1084 int new_address = (insn_current_address + align - 1) & -align;
1085 insn_lengths[uid] = new_address - insn_current_address;
1086 }
1087 }
1088
1089 INSN_ADDRESSES (uid) = insn_current_address + insn_lengths[uid];
1090
1091 if (NOTE_P (insn) || BARRIER_P (insn)
1092 || LABEL_P (insn) || DEBUG_INSN_P(insn))
1093 continue;
1094 if (INSN_DELETED_P (insn))
1095 continue;
1096
1097 body = PATTERN (insn);
1098 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
1099 {
1100 /* This only takes room if read-only data goes into the text
1101 section. */
1102 if (JUMP_TABLES_IN_TEXT_SECTION
1103 || readonly_data_section == text_section)
1104 insn_lengths[uid] = (XVECLEN (body,
1105 GET_CODE (body) == ADDR_DIFF_VEC)
1106 * GET_MODE_SIZE (GET_MODE (body)));
1107 /* Alignment is handled by ADDR_VEC_ALIGN. */
1108 }
1109 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
1110 insn_lengths[uid] = asm_insn_count (body) * insn_default_length (insn);
1111 else if (GET_CODE (body) == SEQUENCE)
1112 {
1113 int i;
1114 int const_delay_slots;
1115 #ifdef DELAY_SLOTS
1116 const_delay_slots = const_num_delay_slots (XVECEXP (body, 0, 0));
1117 #else
1118 const_delay_slots = 0;
1119 #endif
1120 /* Inside a delay slot sequence, we do not do any branch shortening
1121 if the shortening could change the number of delay slots
1122 of the branch. */
1123 for (i = 0; i < XVECLEN (body, 0); i++)
1124 {
1125 rtx inner_insn = XVECEXP (body, 0, i);
1126 int inner_uid = INSN_UID (inner_insn);
1127 int inner_length;
1128
1129 if (GET_CODE (body) == ASM_INPUT
1130 || asm_noperands (PATTERN (XVECEXP (body, 0, i))) >= 0)
1131 inner_length = (asm_insn_count (PATTERN (inner_insn))
1132 * insn_default_length (inner_insn));
1133 else
1134 inner_length = insn_default_length (inner_insn);
1135
1136 insn_lengths[inner_uid] = inner_length;
1137 if (const_delay_slots)
1138 {
1139 if ((varying_length[inner_uid]
1140 = insn_variable_length_p (inner_insn)) != 0)
1141 varying_length[uid] = 1;
1142 INSN_ADDRESSES (inner_uid) = (insn_current_address
1143 + insn_lengths[uid]);
1144 }
1145 else
1146 varying_length[inner_uid] = 0;
1147 insn_lengths[uid] += inner_length;
1148 }
1149 }
1150 else if (GET_CODE (body) != USE && GET_CODE (body) != CLOBBER)
1151 {
1152 insn_lengths[uid] = insn_default_length (insn);
1153 varying_length[uid] = insn_variable_length_p (insn);
1154 }
1155
1156 /* If needed, do any adjustment. */
1157 #ifdef ADJUST_INSN_LENGTH
1158 ADJUST_INSN_LENGTH (insn, insn_lengths[uid]);
1159 if (insn_lengths[uid] < 0)
1160 fatal_insn ("negative insn length", insn);
1161 #endif
1162 }
1163
1164 /* Now loop over all the insns finding varying length insns. For each,
1165 get the current insn length. If it has changed, reflect the change.
1166 When nothing changes for a full pass, we are done. */
1167
1168 while (something_changed)
1169 {
1170 something_changed = 0;
1171 insn_current_align = MAX_CODE_ALIGN - 1;
1172 for (insn_current_address = 0, insn = first;
1173 insn != 0;
1174 insn = NEXT_INSN (insn))
1175 {
1176 int new_length;
1177 #ifdef ADJUST_INSN_LENGTH
1178 int tmp_length;
1179 #endif
1180 int length_align;
1181
1182 uid = INSN_UID (insn);
1183
1184 if (LABEL_P (insn))
1185 {
1186 int log = LABEL_TO_ALIGNMENT (insn);
1187 if (log > insn_current_align)
1188 {
1189 int align = 1 << log;
1190 int new_address= (insn_current_address + align - 1) & -align;
1191 insn_lengths[uid] = new_address - insn_current_address;
1192 insn_current_align = log;
1193 insn_current_address = new_address;
1194 }
1195 else
1196 insn_lengths[uid] = 0;
1197 INSN_ADDRESSES (uid) = insn_current_address;
1198 continue;
1199 }
1200
1201 length_align = INSN_LENGTH_ALIGNMENT (insn);
1202 if (length_align < insn_current_align)
1203 insn_current_align = length_align;
1204
1205 insn_last_address = INSN_ADDRESSES (uid);
1206 INSN_ADDRESSES (uid) = insn_current_address;
1207
1208 #ifdef CASE_VECTOR_SHORTEN_MODE
1209 if (optimize && JUMP_P (insn)
1210 && GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
1211 {
1212 rtx body = PATTERN (insn);
1213 int old_length = insn_lengths[uid];
1214 rtx rel_lab = XEXP (XEXP (body, 0), 0);
1215 rtx min_lab = XEXP (XEXP (body, 2), 0);
1216 rtx max_lab = XEXP (XEXP (body, 3), 0);
1217 int rel_addr = INSN_ADDRESSES (INSN_UID (rel_lab));
1218 int min_addr = INSN_ADDRESSES (INSN_UID (min_lab));
1219 int max_addr = INSN_ADDRESSES (INSN_UID (max_lab));
1220 rtx prev;
1221 int rel_align = 0;
1222 addr_diff_vec_flags flags;
1223
1224 /* Avoid automatic aggregate initialization. */
1225 flags = ADDR_DIFF_VEC_FLAGS (body);
1226
1227 /* Try to find a known alignment for rel_lab. */
1228 for (prev = rel_lab;
1229 prev
1230 && ! insn_lengths[INSN_UID (prev)]
1231 && ! (varying_length[INSN_UID (prev)] & 1);
1232 prev = PREV_INSN (prev))
1233 if (varying_length[INSN_UID (prev)] & 2)
1234 {
1235 rel_align = LABEL_TO_ALIGNMENT (prev);
1236 break;
1237 }
1238
1239 /* See the comment on addr_diff_vec_flags in rtl.h for the
1240 meaning of the flags values. base: REL_LAB vec: INSN */
1241 /* Anything after INSN has still addresses from the last
1242 pass; adjust these so that they reflect our current
1243 estimate for this pass. */
1244 if (flags.base_after_vec)
1245 rel_addr += insn_current_address - insn_last_address;
1246 if (flags.min_after_vec)
1247 min_addr += insn_current_address - insn_last_address;
1248 if (flags.max_after_vec)
1249 max_addr += insn_current_address - insn_last_address;
1250 /* We want to know the worst case, i.e. lowest possible value
1251 for the offset of MIN_LAB. If MIN_LAB is after REL_LAB,
1252 its offset is positive, and we have to be wary of code shrink;
1253 otherwise, it is negative, and we have to be vary of code
1254 size increase. */
1255 if (flags.min_after_base)
1256 {
1257 /* If INSN is between REL_LAB and MIN_LAB, the size
1258 changes we are about to make can change the alignment
1259 within the observed offset, therefore we have to break
1260 it up into two parts that are independent. */
1261 if (! flags.base_after_vec && flags.min_after_vec)
1262 {
1263 min_addr -= align_fuzz (rel_lab, insn, rel_align, 0);
1264 min_addr -= align_fuzz (insn, min_lab, 0, 0);
1265 }
1266 else
1267 min_addr -= align_fuzz (rel_lab, min_lab, rel_align, 0);
1268 }
1269 else
1270 {
1271 if (flags.base_after_vec && ! flags.min_after_vec)
1272 {
1273 min_addr -= align_fuzz (min_lab, insn, 0, ~0);
1274 min_addr -= align_fuzz (insn, rel_lab, 0, ~0);
1275 }
1276 else
1277 min_addr -= align_fuzz (min_lab, rel_lab, 0, ~0);
1278 }
1279 /* Likewise, determine the highest lowest possible value
1280 for the offset of MAX_LAB. */
1281 if (flags.max_after_base)
1282 {
1283 if (! flags.base_after_vec && flags.max_after_vec)
1284 {
1285 max_addr += align_fuzz (rel_lab, insn, rel_align, ~0);
1286 max_addr += align_fuzz (insn, max_lab, 0, ~0);
1287 }
1288 else
1289 max_addr += align_fuzz (rel_lab, max_lab, rel_align, ~0);
1290 }
1291 else
1292 {
1293 if (flags.base_after_vec && ! flags.max_after_vec)
1294 {
1295 max_addr += align_fuzz (max_lab, insn, 0, 0);
1296 max_addr += align_fuzz (insn, rel_lab, 0, 0);
1297 }
1298 else
1299 max_addr += align_fuzz (max_lab, rel_lab, 0, 0);
1300 }
1301 PUT_MODE (body, CASE_VECTOR_SHORTEN_MODE (min_addr - rel_addr,
1302 max_addr - rel_addr,
1303 body));
1304 if (JUMP_TABLES_IN_TEXT_SECTION
1305 || readonly_data_section == text_section)
1306 {
1307 insn_lengths[uid]
1308 = (XVECLEN (body, 1) * GET_MODE_SIZE (GET_MODE (body)));
1309 insn_current_address += insn_lengths[uid];
1310 if (insn_lengths[uid] != old_length)
1311 something_changed = 1;
1312 }
1313
1314 continue;
1315 }
1316 #endif /* CASE_VECTOR_SHORTEN_MODE */
1317
1318 if (! (varying_length[uid]))
1319 {
1320 if (NONJUMP_INSN_P (insn)
1321 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1322 {
1323 int i;
1324
1325 body = PATTERN (insn);
1326 for (i = 0; i < XVECLEN (body, 0); i++)
1327 {
1328 rtx inner_insn = XVECEXP (body, 0, i);
1329 int inner_uid = INSN_UID (inner_insn);
1330
1331 INSN_ADDRESSES (inner_uid) = insn_current_address;
1332
1333 insn_current_address += insn_lengths[inner_uid];
1334 }
1335 }
1336 else
1337 insn_current_address += insn_lengths[uid];
1338
1339 continue;
1340 }
1341
1342 if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
1343 {
1344 int i;
1345
1346 body = PATTERN (insn);
1347 new_length = 0;
1348 for (i = 0; i < XVECLEN (body, 0); i++)
1349 {
1350 rtx inner_insn = XVECEXP (body, 0, i);
1351 int inner_uid = INSN_UID (inner_insn);
1352 int inner_length;
1353
1354 INSN_ADDRESSES (inner_uid) = insn_current_address;
1355
1356 /* insn_current_length returns 0 for insns with a
1357 non-varying length. */
1358 if (! varying_length[inner_uid])
1359 inner_length = insn_lengths[inner_uid];
1360 else
1361 inner_length = insn_current_length (inner_insn);
1362
1363 if (inner_length != insn_lengths[inner_uid])
1364 {
1365 insn_lengths[inner_uid] = inner_length;
1366 something_changed = 1;
1367 }
1368 insn_current_address += insn_lengths[inner_uid];
1369 new_length += inner_length;
1370 }
1371 }
1372 else
1373 {
1374 new_length = insn_current_length (insn);
1375 insn_current_address += new_length;
1376 }
1377
1378 #ifdef ADJUST_INSN_LENGTH
1379 /* If needed, do any adjustment. */
1380 tmp_length = new_length;
1381 ADJUST_INSN_LENGTH (insn, new_length);
1382 insn_current_address += (new_length - tmp_length);
1383 #endif
1384
1385 if (new_length != insn_lengths[uid])
1386 {
1387 insn_lengths[uid] = new_length;
1388 something_changed = 1;
1389 }
1390 }
1391 /* For a non-optimizing compile, do only a single pass. */
1392 if (!optimize)
1393 break;
1394 }
1395
1396 free (varying_length);
1397
1398 #endif /* HAVE_ATTR_length */
1399 }
1400
1401 #ifdef HAVE_ATTR_length
1402 /* Given the body of an INSN known to be generated by an ASM statement, return
1403 the number of machine instructions likely to be generated for this insn.
1404 This is used to compute its length. */
1405
1406 static int
1407 asm_insn_count (rtx body)
1408 {
1409 const char *templ;
1410
1411 if (GET_CODE (body) == ASM_INPUT)
1412 templ = XSTR (body, 0);
1413 else
1414 templ = decode_asm_operands (body, NULL, NULL, NULL, NULL, NULL);
1415
1416 return asm_str_count (templ);
1417 }
1418 #endif
1419
1420 /* Return the number of machine instructions likely to be generated for the
1421 inline-asm template. */
1422 int
1423 asm_str_count (const char *templ)
1424 {
1425 int count = 1;
1426
1427 if (!*templ)
1428 return 0;
1429
1430 for (; *templ; templ++)
1431 if (IS_ASM_LOGICAL_LINE_SEPARATOR (*templ, templ)
1432 || *templ == '\n')
1433 count++;
1434
1435 return count;
1436 }
1437 \f
1438 /* ??? This is probably the wrong place for these. */
1439 /* Structure recording the mapping from source file and directory
1440 names at compile time to those to be embedded in debug
1441 information. */
1442 typedef struct debug_prefix_map
1443 {
1444 const char *old_prefix;
1445 const char *new_prefix;
1446 size_t old_len;
1447 size_t new_len;
1448 struct debug_prefix_map *next;
1449 } debug_prefix_map;
1450
1451 /* Linked list of such structures. */
1452 debug_prefix_map *debug_prefix_maps;
1453
1454
1455 /* Record a debug file prefix mapping. ARG is the argument to
1456 -fdebug-prefix-map and must be of the form OLD=NEW. */
1457
1458 void
1459 add_debug_prefix_map (const char *arg)
1460 {
1461 debug_prefix_map *map;
1462 const char *p;
1463
1464 p = strchr (arg, '=');
1465 if (!p)
1466 {
1467 error ("invalid argument %qs to -fdebug-prefix-map", arg);
1468 return;
1469 }
1470 map = XNEW (debug_prefix_map);
1471 map->old_prefix = xstrndup (arg, p - arg);
1472 map->old_len = p - arg;
1473 p++;
1474 map->new_prefix = xstrdup (p);
1475 map->new_len = strlen (p);
1476 map->next = debug_prefix_maps;
1477 debug_prefix_maps = map;
1478 }
1479
1480 /* Perform user-specified mapping of debug filename prefixes. Return
1481 the new name corresponding to FILENAME. */
1482
1483 const char *
1484 remap_debug_filename (const char *filename)
1485 {
1486 debug_prefix_map *map;
1487 char *s;
1488 const char *name;
1489 size_t name_len;
1490
1491 for (map = debug_prefix_maps; map; map = map->next)
1492 if (filename_ncmp (filename, map->old_prefix, map->old_len) == 0)
1493 break;
1494 if (!map)
1495 return filename;
1496 name = filename + map->old_len;
1497 name_len = strlen (name) + 1;
1498 s = (char *) alloca (name_len + map->new_len);
1499 memcpy (s, map->new_prefix, map->new_len);
1500 memcpy (s + map->new_len, name, name_len);
1501 return ggc_strdup (s);
1502 }
1503 \f
1504 /* Return true if DWARF2 debug info can be emitted for DECL. */
1505
1506 static bool
1507 dwarf2_debug_info_emitted_p (tree decl)
1508 {
1509 if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG)
1510 return false;
1511
1512 if (DECL_IGNORED_P (decl))
1513 return false;
1514
1515 return true;
1516 }
1517
1518 /* Return scope resulting from combination of S1 and S2. */
1519 static tree
1520 choose_inner_scope (tree s1, tree s2)
1521 {
1522 if (!s1)
1523 return s2;
1524 if (!s2)
1525 return s1;
1526 if (BLOCK_NUMBER (s1) > BLOCK_NUMBER (s2))
1527 return s1;
1528 return s2;
1529 }
1530
1531 /* Emit lexical block notes needed to change scope from S1 to S2. */
1532
1533 static void
1534 change_scope (rtx orig_insn, tree s1, tree s2)
1535 {
1536 rtx insn = orig_insn;
1537 tree com = NULL_TREE;
1538 tree ts1 = s1, ts2 = s2;
1539 tree s;
1540
1541 while (ts1 != ts2)
1542 {
1543 gcc_assert (ts1 && ts2);
1544 if (BLOCK_NUMBER (ts1) > BLOCK_NUMBER (ts2))
1545 ts1 = BLOCK_SUPERCONTEXT (ts1);
1546 else if (BLOCK_NUMBER (ts1) < BLOCK_NUMBER (ts2))
1547 ts2 = BLOCK_SUPERCONTEXT (ts2);
1548 else
1549 {
1550 ts1 = BLOCK_SUPERCONTEXT (ts1);
1551 ts2 = BLOCK_SUPERCONTEXT (ts2);
1552 }
1553 }
1554 com = ts1;
1555
1556 /* Close scopes. */
1557 s = s1;
1558 while (s != com)
1559 {
1560 rtx note = emit_note_before (NOTE_INSN_BLOCK_END, insn);
1561 NOTE_BLOCK (note) = s;
1562 s = BLOCK_SUPERCONTEXT (s);
1563 }
1564
1565 /* Open scopes. */
1566 s = s2;
1567 while (s != com)
1568 {
1569 insn = emit_note_before (NOTE_INSN_BLOCK_BEG, insn);
1570 NOTE_BLOCK (insn) = s;
1571 s = BLOCK_SUPERCONTEXT (s);
1572 }
1573 }
1574
1575 /* Rebuild all the NOTE_INSN_BLOCK_BEG and NOTE_INSN_BLOCK_END notes based
1576 on the scope tree and the newly reordered instructions. */
1577
1578 static void
1579 reemit_insn_block_notes (void)
1580 {
1581 tree cur_block = DECL_INITIAL (cfun->decl);
1582 rtx insn, note;
1583
1584 insn = get_insns ();
1585 if (!active_insn_p (insn))
1586 insn = next_active_insn (insn);
1587 for (; insn; insn = next_active_insn (insn))
1588 {
1589 tree this_block;
1590
1591 /* Avoid putting scope notes between jump table and its label. */
1592 if (JUMP_TABLE_DATA_P (insn))
1593 continue;
1594
1595 this_block = insn_scope (insn);
1596 /* For sequences compute scope resulting from merging all scopes
1597 of instructions nested inside. */
1598 if (GET_CODE (PATTERN (insn)) == SEQUENCE)
1599 {
1600 int i;
1601 rtx body = PATTERN (insn);
1602
1603 this_block = NULL;
1604 for (i = 0; i < XVECLEN (body, 0); i++)
1605 this_block = choose_inner_scope (this_block,
1606 insn_scope (XVECEXP (body, 0, i)));
1607 }
1608 if (! this_block)
1609 continue;
1610
1611 if (this_block != cur_block)
1612 {
1613 change_scope (insn, cur_block, this_block);
1614 cur_block = this_block;
1615 }
1616 }
1617
1618 /* change_scope emits before the insn, not after. */
1619 note = emit_note (NOTE_INSN_DELETED);
1620 change_scope (note, cur_block, DECL_INITIAL (cfun->decl));
1621 delete_insn (note);
1622
1623 reorder_blocks ();
1624 }
1625
1626 /* Output assembler code for the start of a function,
1627 and initialize some of the variables in this file
1628 for the new function. The label for the function and associated
1629 assembler pseudo-ops have already been output in `assemble_start_function'.
1630
1631 FIRST is the first insn of the rtl for the function being compiled.
1632 FILE is the file to write assembler code to.
1633 OPTIMIZE_P is nonzero if we should eliminate redundant
1634 test and compare insns. */
1635
1636 void
1637 final_start_function (rtx first ATTRIBUTE_UNUSED, FILE *file,
1638 int optimize_p ATTRIBUTE_UNUSED)
1639 {
1640 block_depth = 0;
1641
1642 this_is_asm_operands = 0;
1643
1644 last_filename = locator_file (prologue_locator);
1645 last_linenum = locator_line (prologue_locator);
1646 last_discriminator = discriminator = 0;
1647
1648 high_block_linenum = high_function_linenum = last_linenum;
1649
1650 if (!DECL_IGNORED_P (current_function_decl))
1651 debug_hooks->begin_prologue (last_linenum, last_filename);
1652
1653 if (!dwarf2_debug_info_emitted_p (current_function_decl))
1654 dwarf2out_begin_prologue (0, NULL);
1655
1656 #ifdef LEAF_REG_REMAP
1657 if (crtl->uses_only_leaf_regs)
1658 leaf_renumber_regs (first);
1659 #endif
1660
1661 /* The Sun386i and perhaps other machines don't work right
1662 if the profiling code comes after the prologue. */
1663 if (targetm.profile_before_prologue () && crtl->profile)
1664 profile_function (file);
1665
1666 /* If debugging, assign block numbers to all of the blocks in this
1667 function. */
1668 if (write_symbols)
1669 {
1670 reemit_insn_block_notes ();
1671 number_blocks (current_function_decl);
1672 /* We never actually put out begin/end notes for the top-level
1673 block in the function. But, conceptually, that block is
1674 always needed. */
1675 TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl)) = 1;
1676 }
1677
1678 if (warn_frame_larger_than
1679 && get_frame_size () > frame_larger_than_size)
1680 {
1681 /* Issue a warning */
1682 warning (OPT_Wframe_larger_than_,
1683 "the frame size of %wd bytes is larger than %wd bytes",
1684 get_frame_size (), frame_larger_than_size);
1685 }
1686
1687 /* First output the function prologue: code to set up the stack frame. */
1688 targetm.asm_out.function_prologue (file, get_frame_size ());
1689
1690 /* If the machine represents the prologue as RTL, the profiling code must
1691 be emitted when NOTE_INSN_PROLOGUE_END is scanned. */
1692 #ifdef HAVE_prologue
1693 if (! HAVE_prologue)
1694 #endif
1695 profile_after_prologue (file);
1696 }
1697
1698 static void
1699 profile_after_prologue (FILE *file ATTRIBUTE_UNUSED)
1700 {
1701 if (!targetm.profile_before_prologue () && crtl->profile)
1702 profile_function (file);
1703 }
1704
1705 static void
1706 profile_function (FILE *file ATTRIBUTE_UNUSED)
1707 {
1708 #ifndef NO_PROFILE_COUNTERS
1709 # define NO_PROFILE_COUNTERS 0
1710 #endif
1711 #ifdef ASM_OUTPUT_REG_PUSH
1712 rtx sval = NULL, chain = NULL;
1713
1714 if (cfun->returns_struct)
1715 sval = targetm.calls.struct_value_rtx (TREE_TYPE (current_function_decl),
1716 true);
1717 if (cfun->static_chain_decl)
1718 chain = targetm.calls.static_chain (current_function_decl, true);
1719 #endif /* ASM_OUTPUT_REG_PUSH */
1720
1721 if (! NO_PROFILE_COUNTERS)
1722 {
1723 int align = MIN (BIGGEST_ALIGNMENT, LONG_TYPE_SIZE);
1724 switch_to_section (data_section);
1725 ASM_OUTPUT_ALIGN (file, floor_log2 (align / BITS_PER_UNIT));
1726 targetm.asm_out.internal_label (file, "LP", current_function_funcdef_no);
1727 assemble_integer (const0_rtx, LONG_TYPE_SIZE / BITS_PER_UNIT, align, 1);
1728 }
1729
1730 switch_to_section (current_function_section ());
1731
1732 #ifdef ASM_OUTPUT_REG_PUSH
1733 if (sval && REG_P (sval))
1734 ASM_OUTPUT_REG_PUSH (file, REGNO (sval));
1735 if (chain && REG_P (chain))
1736 ASM_OUTPUT_REG_PUSH (file, REGNO (chain));
1737 #endif
1738
1739 FUNCTION_PROFILER (file, current_function_funcdef_no);
1740
1741 #ifdef ASM_OUTPUT_REG_PUSH
1742 if (chain && REG_P (chain))
1743 ASM_OUTPUT_REG_POP (file, REGNO (chain));
1744 if (sval && REG_P (sval))
1745 ASM_OUTPUT_REG_POP (file, REGNO (sval));
1746 #endif
1747 }
1748
1749 /* Output assembler code for the end of a function.
1750 For clarity, args are same as those of `final_start_function'
1751 even though not all of them are needed. */
1752
1753 void
1754 final_end_function (void)
1755 {
1756 app_disable ();
1757
1758 if (!DECL_IGNORED_P (current_function_decl))
1759 debug_hooks->end_function (high_function_linenum);
1760
1761 /* Finally, output the function epilogue:
1762 code to restore the stack frame and return to the caller. */
1763 targetm.asm_out.function_epilogue (asm_out_file, get_frame_size ());
1764
1765 /* And debug output. */
1766 if (!DECL_IGNORED_P (current_function_decl))
1767 debug_hooks->end_epilogue (last_linenum, last_filename);
1768
1769 if (!dwarf2_debug_info_emitted_p (current_function_decl)
1770 && dwarf2out_do_frame ())
1771 dwarf2out_end_epilogue (last_linenum, last_filename);
1772 }
1773 \f
1774
1775 /* Dumper helper for basic block information. FILE is the assembly
1776 output file, and INSN is the instruction being emitted. */
1777
1778 static void
1779 dump_basic_block_info (FILE *file, rtx insn, basic_block *start_to_bb,
1780 basic_block *end_to_bb, int bb_map_size, int *bb_seqn)
1781 {
1782 basic_block bb;
1783
1784 if (!flag_debug_asm)
1785 return;
1786
1787 if (INSN_UID (insn) < bb_map_size
1788 && (bb = start_to_bb[INSN_UID (insn)]) != NULL)
1789 {
1790 edge e;
1791 edge_iterator ei;
1792
1793 fprintf (file, "%s BLOCK %d", ASM_COMMENT_START, bb->index);
1794 if (bb->frequency)
1795 fprintf (file, " freq:%d", bb->frequency);
1796 if (bb->count)
1797 fprintf (file, " count:" HOST_WIDEST_INT_PRINT_DEC,
1798 bb->count);
1799 fprintf (file, " seq:%d", (*bb_seqn)++);
1800 fprintf (file, "\n%s PRED:", ASM_COMMENT_START);
1801 FOR_EACH_EDGE (e, ei, bb->preds)
1802 {
1803 dump_edge_info (file, e, 0);
1804 }
1805 fprintf (file, "\n");
1806 }
1807 if (INSN_UID (insn) < bb_map_size
1808 && (bb = end_to_bb[INSN_UID (insn)]) != NULL)
1809 {
1810 edge e;
1811 edge_iterator ei;
1812
1813 fprintf (asm_out_file, "%s SUCC:", ASM_COMMENT_START);
1814 FOR_EACH_EDGE (e, ei, bb->succs)
1815 {
1816 dump_edge_info (asm_out_file, e, 1);
1817 }
1818 fprintf (file, "\n");
1819 }
1820 }
1821
1822 /* Output assembler code for some insns: all or part of a function.
1823 For description of args, see `final_start_function', above. */
1824
1825 void
1826 final (rtx first, FILE *file, int optimize_p)
1827 {
1828 rtx insn, next;
1829 int max_uid = 0;
1830 int seen = 0;
1831
1832 /* Used for -dA dump. */
1833 basic_block *start_to_bb = NULL;
1834 basic_block *end_to_bb = NULL;
1835 int bb_map_size = 0;
1836 int bb_seqn = 0;
1837
1838 last_ignored_compare = 0;
1839
1840 for (insn = first; insn; insn = NEXT_INSN (insn))
1841 {
1842 if (INSN_UID (insn) > max_uid) /* Find largest UID. */
1843 max_uid = INSN_UID (insn);
1844 #ifdef HAVE_cc0
1845 /* If CC tracking across branches is enabled, record the insn which
1846 jumps to each branch only reached from one place. */
1847 if (optimize_p && JUMP_P (insn))
1848 {
1849 rtx lab = JUMP_LABEL (insn);
1850 if (lab && LABEL_P (lab) && LABEL_NUSES (lab) == 1)
1851 {
1852 LABEL_REFS (lab) = insn;
1853 }
1854 }
1855 #endif
1856 }
1857
1858 init_recog ();
1859
1860 CC_STATUS_INIT;
1861
1862 if (flag_debug_asm)
1863 {
1864 basic_block bb;
1865
1866 bb_map_size = get_max_uid () + 1;
1867 start_to_bb = XCNEWVEC (basic_block, bb_map_size);
1868 end_to_bb = XCNEWVEC (basic_block, bb_map_size);
1869
1870 FOR_EACH_BB_REVERSE (bb)
1871 {
1872 start_to_bb[INSN_UID (BB_HEAD (bb))] = bb;
1873 end_to_bb[INSN_UID (BB_END (bb))] = bb;
1874 }
1875 }
1876
1877 /* Output the insns. */
1878 for (insn = first; insn;)
1879 {
1880 #ifdef HAVE_ATTR_length
1881 if ((unsigned) INSN_UID (insn) >= INSN_ADDRESSES_SIZE ())
1882 {
1883 /* This can be triggered by bugs elsewhere in the compiler if
1884 new insns are created after init_insn_lengths is called. */
1885 gcc_assert (NOTE_P (insn));
1886 insn_current_address = -1;
1887 }
1888 else
1889 insn_current_address = INSN_ADDRESSES (INSN_UID (insn));
1890 #endif /* HAVE_ATTR_length */
1891
1892 dump_basic_block_info (file, insn, start_to_bb, end_to_bb,
1893 bb_map_size, &bb_seqn);
1894 insn = final_scan_insn (insn, file, optimize_p, 0, &seen);
1895 }
1896
1897 if (flag_debug_asm)
1898 {
1899 free (start_to_bb);
1900 free (end_to_bb);
1901 }
1902
1903 /* Remove CFI notes, to avoid compare-debug failures. */
1904 for (insn = first; insn; insn = next)
1905 {
1906 next = NEXT_INSN (insn);
1907 if (NOTE_P (insn)
1908 && (NOTE_KIND (insn) == NOTE_INSN_CFI
1909 || NOTE_KIND (insn) == NOTE_INSN_CFI_LABEL))
1910 delete_insn (insn);
1911 }
1912 }
1913 \f
1914 const char *
1915 get_insn_template (int code, rtx insn)
1916 {
1917 switch (insn_data[code].output_format)
1918 {
1919 case INSN_OUTPUT_FORMAT_SINGLE:
1920 return insn_data[code].output.single;
1921 case INSN_OUTPUT_FORMAT_MULTI:
1922 return insn_data[code].output.multi[which_alternative];
1923 case INSN_OUTPUT_FORMAT_FUNCTION:
1924 gcc_assert (insn);
1925 return (*insn_data[code].output.function) (recog_data.operand, insn);
1926
1927 default:
1928 gcc_unreachable ();
1929 }
1930 }
1931
1932 /* Emit the appropriate declaration for an alternate-entry-point
1933 symbol represented by INSN, to FILE. INSN is a CODE_LABEL with
1934 LABEL_KIND != LABEL_NORMAL.
1935
1936 The case fall-through in this function is intentional. */
1937 static void
1938 output_alternate_entry_point (FILE *file, rtx insn)
1939 {
1940 const char *name = LABEL_NAME (insn);
1941
1942 switch (LABEL_KIND (insn))
1943 {
1944 case LABEL_WEAK_ENTRY:
1945 #ifdef ASM_WEAKEN_LABEL
1946 ASM_WEAKEN_LABEL (file, name);
1947 #endif
1948 case LABEL_GLOBAL_ENTRY:
1949 targetm.asm_out.globalize_label (file, name);
1950 case LABEL_STATIC_ENTRY:
1951 #ifdef ASM_OUTPUT_TYPE_DIRECTIVE
1952 ASM_OUTPUT_TYPE_DIRECTIVE (file, name, "function");
1953 #endif
1954 ASM_OUTPUT_LABEL (file, name);
1955 break;
1956
1957 case LABEL_NORMAL:
1958 default:
1959 gcc_unreachable ();
1960 }
1961 }
1962
1963 /* Given a CALL_INSN, find and return the nested CALL. */
1964 static rtx
1965 call_from_call_insn (rtx insn)
1966 {
1967 rtx x;
1968 gcc_assert (CALL_P (insn));
1969 x = PATTERN (insn);
1970
1971 while (GET_CODE (x) != CALL)
1972 {
1973 switch (GET_CODE (x))
1974 {
1975 default:
1976 gcc_unreachable ();
1977 case COND_EXEC:
1978 x = COND_EXEC_CODE (x);
1979 break;
1980 case PARALLEL:
1981 x = XVECEXP (x, 0, 0);
1982 break;
1983 case SET:
1984 x = XEXP (x, 1);
1985 break;
1986 }
1987 }
1988 return x;
1989 }
1990
1991 /* The final scan for one insn, INSN.
1992 Args are same as in `final', except that INSN
1993 is the insn being scanned.
1994 Value returned is the next insn to be scanned.
1995
1996 NOPEEPHOLES is the flag to disallow peephole processing (currently
1997 used for within delayed branch sequence output).
1998
1999 SEEN is used to track the end of the prologue, for emitting
2000 debug information. We force the emission of a line note after
2001 both NOTE_INSN_PROLOGUE_END and NOTE_INSN_FUNCTION_BEG, or
2002 at the beginning of the second basic block, whichever comes
2003 first. */
2004
2005 rtx
2006 final_scan_insn (rtx insn, FILE *file, int optimize_p ATTRIBUTE_UNUSED,
2007 int nopeepholes ATTRIBUTE_UNUSED, int *seen)
2008 {
2009 #ifdef HAVE_cc0
2010 rtx set;
2011 #endif
2012 rtx next;
2013
2014 insn_counter++;
2015
2016 /* Ignore deleted insns. These can occur when we split insns (due to a
2017 template of "#") while not optimizing. */
2018 if (INSN_DELETED_P (insn))
2019 return NEXT_INSN (insn);
2020
2021 switch (GET_CODE (insn))
2022 {
2023 case NOTE:
2024 switch (NOTE_KIND (insn))
2025 {
2026 case NOTE_INSN_DELETED:
2027 break;
2028
2029 case NOTE_INSN_SWITCH_TEXT_SECTIONS:
2030 in_cold_section_p = !in_cold_section_p;
2031
2032 if (dwarf2out_do_frame ())
2033 dwarf2out_switch_text_section ();
2034 else if (!DECL_IGNORED_P (current_function_decl))
2035 debug_hooks->switch_text_section ();
2036
2037 switch_to_section (current_function_section ());
2038 targetm.asm_out.function_switched_text_sections (asm_out_file,
2039 current_function_decl,
2040 in_cold_section_p);
2041 break;
2042
2043 case NOTE_INSN_BASIC_BLOCK:
2044 if (targetm.asm_out.unwind_emit)
2045 targetm.asm_out.unwind_emit (asm_out_file, insn);
2046
2047 if ((*seen & (SEEN_EMITTED | SEEN_BB)) == SEEN_BB)
2048 {
2049 *seen |= SEEN_EMITTED;
2050 force_source_line = true;
2051 }
2052 else
2053 *seen |= SEEN_BB;
2054
2055 discriminator = NOTE_BASIC_BLOCK (insn)->discriminator;
2056
2057 break;
2058
2059 case NOTE_INSN_EH_REGION_BEG:
2060 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHB",
2061 NOTE_EH_HANDLER (insn));
2062 break;
2063
2064 case NOTE_INSN_EH_REGION_END:
2065 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHE",
2066 NOTE_EH_HANDLER (insn));
2067 break;
2068
2069 case NOTE_INSN_PROLOGUE_END:
2070 targetm.asm_out.function_end_prologue (file);
2071 profile_after_prologue (file);
2072
2073 if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE)
2074 {
2075 *seen |= SEEN_EMITTED;
2076 force_source_line = true;
2077 }
2078 else
2079 *seen |= SEEN_NOTE;
2080
2081 break;
2082
2083 case NOTE_INSN_EPILOGUE_BEG:
2084 if (!DECL_IGNORED_P (current_function_decl))
2085 (*debug_hooks->begin_epilogue) (last_linenum, last_filename);
2086 targetm.asm_out.function_begin_epilogue (file);
2087 break;
2088
2089 case NOTE_INSN_CFI:
2090 dwarf2out_emit_cfi (NOTE_CFI (insn));
2091 break;
2092
2093 case NOTE_INSN_CFI_LABEL:
2094 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LCFI",
2095 NOTE_LABEL_NUMBER (insn));
2096 break;
2097
2098 case NOTE_INSN_FUNCTION_BEG:
2099 app_disable ();
2100 if (!DECL_IGNORED_P (current_function_decl))
2101 debug_hooks->end_prologue (last_linenum, last_filename);
2102
2103 if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE)
2104 {
2105 *seen |= SEEN_EMITTED;
2106 force_source_line = true;
2107 }
2108 else
2109 *seen |= SEEN_NOTE;
2110
2111 break;
2112
2113 case NOTE_INSN_BLOCK_BEG:
2114 if (debug_info_level == DINFO_LEVEL_NORMAL
2115 || debug_info_level == DINFO_LEVEL_VERBOSE
2116 || write_symbols == DWARF2_DEBUG
2117 || write_symbols == VMS_AND_DWARF2_DEBUG
2118 || write_symbols == VMS_DEBUG)
2119 {
2120 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
2121
2122 app_disable ();
2123 ++block_depth;
2124 high_block_linenum = last_linenum;
2125
2126 /* Output debugging info about the symbol-block beginning. */
2127 if (!DECL_IGNORED_P (current_function_decl))
2128 debug_hooks->begin_block (last_linenum, n);
2129
2130 /* Mark this block as output. */
2131 TREE_ASM_WRITTEN (NOTE_BLOCK (insn)) = 1;
2132 }
2133 if (write_symbols == DBX_DEBUG
2134 || write_symbols == SDB_DEBUG)
2135 {
2136 location_t *locus_ptr
2137 = block_nonartificial_location (NOTE_BLOCK (insn));
2138
2139 if (locus_ptr != NULL)
2140 {
2141 override_filename = LOCATION_FILE (*locus_ptr);
2142 override_linenum = LOCATION_LINE (*locus_ptr);
2143 }
2144 }
2145 break;
2146
2147 case NOTE_INSN_BLOCK_END:
2148 if (debug_info_level == DINFO_LEVEL_NORMAL
2149 || debug_info_level == DINFO_LEVEL_VERBOSE
2150 || write_symbols == DWARF2_DEBUG
2151 || write_symbols == VMS_AND_DWARF2_DEBUG
2152 || write_symbols == VMS_DEBUG)
2153 {
2154 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
2155
2156 app_disable ();
2157
2158 /* End of a symbol-block. */
2159 --block_depth;
2160 gcc_assert (block_depth >= 0);
2161
2162 if (!DECL_IGNORED_P (current_function_decl))
2163 debug_hooks->end_block (high_block_linenum, n);
2164 }
2165 if (write_symbols == DBX_DEBUG
2166 || write_symbols == SDB_DEBUG)
2167 {
2168 tree outer_block = BLOCK_SUPERCONTEXT (NOTE_BLOCK (insn));
2169 location_t *locus_ptr
2170 = block_nonartificial_location (outer_block);
2171
2172 if (locus_ptr != NULL)
2173 {
2174 override_filename = LOCATION_FILE (*locus_ptr);
2175 override_linenum = LOCATION_LINE (*locus_ptr);
2176 }
2177 else
2178 {
2179 override_filename = NULL;
2180 override_linenum = 0;
2181 }
2182 }
2183 break;
2184
2185 case NOTE_INSN_DELETED_LABEL:
2186 /* Emit the label. We may have deleted the CODE_LABEL because
2187 the label could be proved to be unreachable, though still
2188 referenced (in the form of having its address taken. */
2189 ASM_OUTPUT_DEBUG_LABEL (file, "L", CODE_LABEL_NUMBER (insn));
2190 break;
2191
2192 case NOTE_INSN_DELETED_DEBUG_LABEL:
2193 /* Similarly, but need to use different namespace for it. */
2194 if (CODE_LABEL_NUMBER (insn) != -1)
2195 ASM_OUTPUT_DEBUG_LABEL (file, "LDL", CODE_LABEL_NUMBER (insn));
2196 break;
2197
2198 case NOTE_INSN_VAR_LOCATION:
2199 case NOTE_INSN_CALL_ARG_LOCATION:
2200 if (!DECL_IGNORED_P (current_function_decl))
2201 debug_hooks->var_location (insn);
2202 break;
2203
2204 default:
2205 gcc_unreachable ();
2206 break;
2207 }
2208 break;
2209
2210 case BARRIER:
2211 break;
2212
2213 case CODE_LABEL:
2214 /* The target port might emit labels in the output function for
2215 some insn, e.g. sh.c output_branchy_insn. */
2216 if (CODE_LABEL_NUMBER (insn) <= max_labelno)
2217 {
2218 int align = LABEL_TO_ALIGNMENT (insn);
2219 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2220 int max_skip = LABEL_TO_MAX_SKIP (insn);
2221 #endif
2222
2223 if (align && NEXT_INSN (insn))
2224 {
2225 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2226 ASM_OUTPUT_MAX_SKIP_ALIGN (file, align, max_skip);
2227 #else
2228 #ifdef ASM_OUTPUT_ALIGN_WITH_NOP
2229 ASM_OUTPUT_ALIGN_WITH_NOP (file, align);
2230 #else
2231 ASM_OUTPUT_ALIGN (file, align);
2232 #endif
2233 #endif
2234 }
2235 }
2236 CC_STATUS_INIT;
2237
2238 if (!DECL_IGNORED_P (current_function_decl) && LABEL_NAME (insn))
2239 debug_hooks->label (insn);
2240
2241 app_disable ();
2242
2243 next = next_nonnote_insn (insn);
2244 /* If this label is followed by a jump-table, make sure we put
2245 the label in the read-only section. Also possibly write the
2246 label and jump table together. */
2247 if (next != 0 && JUMP_TABLE_DATA_P (next))
2248 {
2249 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2250 /* In this case, the case vector is being moved by the
2251 target, so don't output the label at all. Leave that
2252 to the back end macros. */
2253 #else
2254 if (! JUMP_TABLES_IN_TEXT_SECTION)
2255 {
2256 int log_align;
2257
2258 switch_to_section (targetm.asm_out.function_rodata_section
2259 (current_function_decl));
2260
2261 #ifdef ADDR_VEC_ALIGN
2262 log_align = ADDR_VEC_ALIGN (next);
2263 #else
2264 log_align = exact_log2 (BIGGEST_ALIGNMENT / BITS_PER_UNIT);
2265 #endif
2266 ASM_OUTPUT_ALIGN (file, log_align);
2267 }
2268 else
2269 switch_to_section (current_function_section ());
2270
2271 #ifdef ASM_OUTPUT_CASE_LABEL
2272 ASM_OUTPUT_CASE_LABEL (file, "L", CODE_LABEL_NUMBER (insn),
2273 next);
2274 #else
2275 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn));
2276 #endif
2277 #endif
2278 break;
2279 }
2280 if (LABEL_ALT_ENTRY_P (insn))
2281 output_alternate_entry_point (file, insn);
2282 else
2283 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn));
2284 break;
2285
2286 default:
2287 {
2288 rtx body = PATTERN (insn);
2289 int insn_code_number;
2290 const char *templ;
2291 bool is_stmt;
2292
2293 /* Reset this early so it is correct for ASM statements. */
2294 current_insn_predicate = NULL_RTX;
2295
2296 /* An INSN, JUMP_INSN or CALL_INSN.
2297 First check for special kinds that recog doesn't recognize. */
2298
2299 if (GET_CODE (body) == USE /* These are just declarations. */
2300 || GET_CODE (body) == CLOBBER)
2301 break;
2302
2303 #ifdef HAVE_cc0
2304 {
2305 /* If there is a REG_CC_SETTER note on this insn, it means that
2306 the setting of the condition code was done in the delay slot
2307 of the insn that branched here. So recover the cc status
2308 from the insn that set it. */
2309
2310 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2311 if (note)
2312 {
2313 NOTICE_UPDATE_CC (PATTERN (XEXP (note, 0)), XEXP (note, 0));
2314 cc_prev_status = cc_status;
2315 }
2316 }
2317 #endif
2318
2319 /* Detect insns that are really jump-tables
2320 and output them as such. */
2321
2322 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
2323 {
2324 #if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC))
2325 int vlen, idx;
2326 #endif
2327
2328 if (! JUMP_TABLES_IN_TEXT_SECTION)
2329 switch_to_section (targetm.asm_out.function_rodata_section
2330 (current_function_decl));
2331 else
2332 switch_to_section (current_function_section ());
2333
2334 app_disable ();
2335
2336 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2337 if (GET_CODE (body) == ADDR_VEC)
2338 {
2339 #ifdef ASM_OUTPUT_ADDR_VEC
2340 ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn), body);
2341 #else
2342 gcc_unreachable ();
2343 #endif
2344 }
2345 else
2346 {
2347 #ifdef ASM_OUTPUT_ADDR_DIFF_VEC
2348 ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn), body);
2349 #else
2350 gcc_unreachable ();
2351 #endif
2352 }
2353 #else
2354 vlen = XVECLEN (body, GET_CODE (body) == ADDR_DIFF_VEC);
2355 for (idx = 0; idx < vlen; idx++)
2356 {
2357 if (GET_CODE (body) == ADDR_VEC)
2358 {
2359 #ifdef ASM_OUTPUT_ADDR_VEC_ELT
2360 ASM_OUTPUT_ADDR_VEC_ELT
2361 (file, CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 0, idx), 0)));
2362 #else
2363 gcc_unreachable ();
2364 #endif
2365 }
2366 else
2367 {
2368 #ifdef ASM_OUTPUT_ADDR_DIFF_ELT
2369 ASM_OUTPUT_ADDR_DIFF_ELT
2370 (file,
2371 body,
2372 CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 1, idx), 0)),
2373 CODE_LABEL_NUMBER (XEXP (XEXP (body, 0), 0)));
2374 #else
2375 gcc_unreachable ();
2376 #endif
2377 }
2378 }
2379 #ifdef ASM_OUTPUT_CASE_END
2380 ASM_OUTPUT_CASE_END (file,
2381 CODE_LABEL_NUMBER (PREV_INSN (insn)),
2382 insn);
2383 #endif
2384 #endif
2385
2386 switch_to_section (current_function_section ());
2387
2388 break;
2389 }
2390 /* Output this line note if it is the first or the last line
2391 note in a row. */
2392 if (!DECL_IGNORED_P (current_function_decl)
2393 && notice_source_line (insn, &is_stmt))
2394 (*debug_hooks->source_line) (last_linenum, last_filename,
2395 last_discriminator, is_stmt);
2396
2397 if (GET_CODE (body) == ASM_INPUT)
2398 {
2399 const char *string = XSTR (body, 0);
2400
2401 /* There's no telling what that did to the condition codes. */
2402 CC_STATUS_INIT;
2403
2404 if (string[0])
2405 {
2406 expanded_location loc;
2407
2408 app_enable ();
2409 loc = expand_location (ASM_INPUT_SOURCE_LOCATION (body));
2410 if (*loc.file && loc.line)
2411 fprintf (asm_out_file, "%s %i \"%s\" 1\n",
2412 ASM_COMMENT_START, loc.line, loc.file);
2413 fprintf (asm_out_file, "\t%s\n", string);
2414 #if HAVE_AS_LINE_ZERO
2415 if (*loc.file && loc.line)
2416 fprintf (asm_out_file, "%s 0 \"\" 2\n", ASM_COMMENT_START);
2417 #endif
2418 }
2419 break;
2420 }
2421
2422 /* Detect `asm' construct with operands. */
2423 if (asm_noperands (body) >= 0)
2424 {
2425 unsigned int noperands = asm_noperands (body);
2426 rtx *ops = XALLOCAVEC (rtx, noperands);
2427 const char *string;
2428 location_t loc;
2429 expanded_location expanded;
2430
2431 /* There's no telling what that did to the condition codes. */
2432 CC_STATUS_INIT;
2433
2434 /* Get out the operand values. */
2435 string = decode_asm_operands (body, ops, NULL, NULL, NULL, &loc);
2436 /* Inhibit dying on what would otherwise be compiler bugs. */
2437 insn_noperands = noperands;
2438 this_is_asm_operands = insn;
2439 expanded = expand_location (loc);
2440
2441 #ifdef FINAL_PRESCAN_INSN
2442 FINAL_PRESCAN_INSN (insn, ops, insn_noperands);
2443 #endif
2444
2445 /* Output the insn using them. */
2446 if (string[0])
2447 {
2448 app_enable ();
2449 if (expanded.file && expanded.line)
2450 fprintf (asm_out_file, "%s %i \"%s\" 1\n",
2451 ASM_COMMENT_START, expanded.line, expanded.file);
2452 output_asm_insn (string, ops);
2453 #if HAVE_AS_LINE_ZERO
2454 if (expanded.file && expanded.line)
2455 fprintf (asm_out_file, "%s 0 \"\" 2\n", ASM_COMMENT_START);
2456 #endif
2457 }
2458
2459 if (targetm.asm_out.final_postscan_insn)
2460 targetm.asm_out.final_postscan_insn (file, insn, ops,
2461 insn_noperands);
2462
2463 this_is_asm_operands = 0;
2464 break;
2465 }
2466
2467 app_disable ();
2468
2469 if (GET_CODE (body) == SEQUENCE)
2470 {
2471 /* A delayed-branch sequence */
2472 int i;
2473
2474 final_sequence = body;
2475
2476 /* The first insn in this SEQUENCE might be a JUMP_INSN that will
2477 force the restoration of a comparison that was previously
2478 thought unnecessary. If that happens, cancel this sequence
2479 and cause that insn to be restored. */
2480
2481 next = final_scan_insn (XVECEXP (body, 0, 0), file, 0, 1, seen);
2482 if (next != XVECEXP (body, 0, 1))
2483 {
2484 final_sequence = 0;
2485 return next;
2486 }
2487
2488 for (i = 1; i < XVECLEN (body, 0); i++)
2489 {
2490 rtx insn = XVECEXP (body, 0, i);
2491 rtx next = NEXT_INSN (insn);
2492 /* We loop in case any instruction in a delay slot gets
2493 split. */
2494 do
2495 insn = final_scan_insn (insn, file, 0, 1, seen);
2496 while (insn != next);
2497 }
2498 #ifdef DBR_OUTPUT_SEQEND
2499 DBR_OUTPUT_SEQEND (file);
2500 #endif
2501 final_sequence = 0;
2502
2503 /* If the insn requiring the delay slot was a CALL_INSN, the
2504 insns in the delay slot are actually executed before the
2505 called function. Hence we don't preserve any CC-setting
2506 actions in these insns and the CC must be marked as being
2507 clobbered by the function. */
2508 if (CALL_P (XVECEXP (body, 0, 0)))
2509 {
2510 CC_STATUS_INIT;
2511 }
2512 break;
2513 }
2514
2515 /* We have a real machine instruction as rtl. */
2516
2517 body = PATTERN (insn);
2518
2519 #ifdef HAVE_cc0
2520 set = single_set (insn);
2521
2522 /* Check for redundant test and compare instructions
2523 (when the condition codes are already set up as desired).
2524 This is done only when optimizing; if not optimizing,
2525 it should be possible for the user to alter a variable
2526 with the debugger in between statements
2527 and the next statement should reexamine the variable
2528 to compute the condition codes. */
2529
2530 if (optimize_p)
2531 {
2532 if (set
2533 && GET_CODE (SET_DEST (set)) == CC0
2534 && insn != last_ignored_compare)
2535 {
2536 rtx src1, src2;
2537 if (GET_CODE (SET_SRC (set)) == SUBREG)
2538 SET_SRC (set) = alter_subreg (&SET_SRC (set));
2539
2540 src1 = SET_SRC (set);
2541 src2 = NULL_RTX;
2542 if (GET_CODE (SET_SRC (set)) == COMPARE)
2543 {
2544 if (GET_CODE (XEXP (SET_SRC (set), 0)) == SUBREG)
2545 XEXP (SET_SRC (set), 0)
2546 = alter_subreg (&XEXP (SET_SRC (set), 0));
2547 if (GET_CODE (XEXP (SET_SRC (set), 1)) == SUBREG)
2548 XEXP (SET_SRC (set), 1)
2549 = alter_subreg (&XEXP (SET_SRC (set), 1));
2550 if (XEXP (SET_SRC (set), 1)
2551 == CONST0_RTX (GET_MODE (XEXP (SET_SRC (set), 0))))
2552 src2 = XEXP (SET_SRC (set), 0);
2553 }
2554 if ((cc_status.value1 != 0
2555 && rtx_equal_p (src1, cc_status.value1))
2556 || (cc_status.value2 != 0
2557 && rtx_equal_p (src1, cc_status.value2))
2558 || (src2 != 0 && cc_status.value1 != 0
2559 && rtx_equal_p (src2, cc_status.value1))
2560 || (src2 != 0 && cc_status.value2 != 0
2561 && rtx_equal_p (src2, cc_status.value2)))
2562 {
2563 /* Don't delete insn if it has an addressing side-effect. */
2564 if (! FIND_REG_INC_NOTE (insn, NULL_RTX)
2565 /* or if anything in it is volatile. */
2566 && ! volatile_refs_p (PATTERN (insn)))
2567 {
2568 /* We don't really delete the insn; just ignore it. */
2569 last_ignored_compare = insn;
2570 break;
2571 }
2572 }
2573 }
2574 }
2575
2576 /* If this is a conditional branch, maybe modify it
2577 if the cc's are in a nonstandard state
2578 so that it accomplishes the same thing that it would
2579 do straightforwardly if the cc's were set up normally. */
2580
2581 if (cc_status.flags != 0
2582 && JUMP_P (insn)
2583 && GET_CODE (body) == SET
2584 && SET_DEST (body) == pc_rtx
2585 && GET_CODE (SET_SRC (body)) == IF_THEN_ELSE
2586 && COMPARISON_P (XEXP (SET_SRC (body), 0))
2587 && XEXP (XEXP (SET_SRC (body), 0), 0) == cc0_rtx)
2588 {
2589 /* This function may alter the contents of its argument
2590 and clear some of the cc_status.flags bits.
2591 It may also return 1 meaning condition now always true
2592 or -1 meaning condition now always false
2593 or 2 meaning condition nontrivial but altered. */
2594 int result = alter_cond (XEXP (SET_SRC (body), 0));
2595 /* If condition now has fixed value, replace the IF_THEN_ELSE
2596 with its then-operand or its else-operand. */
2597 if (result == 1)
2598 SET_SRC (body) = XEXP (SET_SRC (body), 1);
2599 if (result == -1)
2600 SET_SRC (body) = XEXP (SET_SRC (body), 2);
2601
2602 /* The jump is now either unconditional or a no-op.
2603 If it has become a no-op, don't try to output it.
2604 (It would not be recognized.) */
2605 if (SET_SRC (body) == pc_rtx)
2606 {
2607 delete_insn (insn);
2608 break;
2609 }
2610 else if (ANY_RETURN_P (SET_SRC (body)))
2611 /* Replace (set (pc) (return)) with (return). */
2612 PATTERN (insn) = body = SET_SRC (body);
2613
2614 /* Rerecognize the instruction if it has changed. */
2615 if (result != 0)
2616 INSN_CODE (insn) = -1;
2617 }
2618
2619 /* If this is a conditional trap, maybe modify it if the cc's
2620 are in a nonstandard state so that it accomplishes the same
2621 thing that it would do straightforwardly if the cc's were
2622 set up normally. */
2623 if (cc_status.flags != 0
2624 && NONJUMP_INSN_P (insn)
2625 && GET_CODE (body) == TRAP_IF
2626 && COMPARISON_P (TRAP_CONDITION (body))
2627 && XEXP (TRAP_CONDITION (body), 0) == cc0_rtx)
2628 {
2629 /* This function may alter the contents of its argument
2630 and clear some of the cc_status.flags bits.
2631 It may also return 1 meaning condition now always true
2632 or -1 meaning condition now always false
2633 or 2 meaning condition nontrivial but altered. */
2634 int result = alter_cond (TRAP_CONDITION (body));
2635
2636 /* If TRAP_CONDITION has become always false, delete the
2637 instruction. */
2638 if (result == -1)
2639 {
2640 delete_insn (insn);
2641 break;
2642 }
2643
2644 /* If TRAP_CONDITION has become always true, replace
2645 TRAP_CONDITION with const_true_rtx. */
2646 if (result == 1)
2647 TRAP_CONDITION (body) = const_true_rtx;
2648
2649 /* Rerecognize the instruction if it has changed. */
2650 if (result != 0)
2651 INSN_CODE (insn) = -1;
2652 }
2653
2654 /* Make same adjustments to instructions that examine the
2655 condition codes without jumping and instructions that
2656 handle conditional moves (if this machine has either one). */
2657
2658 if (cc_status.flags != 0
2659 && set != 0)
2660 {
2661 rtx cond_rtx, then_rtx, else_rtx;
2662
2663 if (!JUMP_P (insn)
2664 && GET_CODE (SET_SRC (set)) == IF_THEN_ELSE)
2665 {
2666 cond_rtx = XEXP (SET_SRC (set), 0);
2667 then_rtx = XEXP (SET_SRC (set), 1);
2668 else_rtx = XEXP (SET_SRC (set), 2);
2669 }
2670 else
2671 {
2672 cond_rtx = SET_SRC (set);
2673 then_rtx = const_true_rtx;
2674 else_rtx = const0_rtx;
2675 }
2676
2677 switch (GET_CODE (cond_rtx))
2678 {
2679 case GTU:
2680 case GT:
2681 case LTU:
2682 case LT:
2683 case GEU:
2684 case GE:
2685 case LEU:
2686 case LE:
2687 case EQ:
2688 case NE:
2689 {
2690 int result;
2691 if (XEXP (cond_rtx, 0) != cc0_rtx)
2692 break;
2693 result = alter_cond (cond_rtx);
2694 if (result == 1)
2695 validate_change (insn, &SET_SRC (set), then_rtx, 0);
2696 else if (result == -1)
2697 validate_change (insn, &SET_SRC (set), else_rtx, 0);
2698 else if (result == 2)
2699 INSN_CODE (insn) = -1;
2700 if (SET_DEST (set) == SET_SRC (set))
2701 delete_insn (insn);
2702 }
2703 break;
2704
2705 default:
2706 break;
2707 }
2708 }
2709
2710 #endif
2711
2712 #ifdef HAVE_peephole
2713 /* Do machine-specific peephole optimizations if desired. */
2714
2715 if (optimize_p && !flag_no_peephole && !nopeepholes)
2716 {
2717 rtx next = peephole (insn);
2718 /* When peepholing, if there were notes within the peephole,
2719 emit them before the peephole. */
2720 if (next != 0 && next != NEXT_INSN (insn))
2721 {
2722 rtx note, prev = PREV_INSN (insn);
2723
2724 for (note = NEXT_INSN (insn); note != next;
2725 note = NEXT_INSN (note))
2726 final_scan_insn (note, file, optimize_p, nopeepholes, seen);
2727
2728 /* Put the notes in the proper position for a later
2729 rescan. For example, the SH target can do this
2730 when generating a far jump in a delayed branch
2731 sequence. */
2732 note = NEXT_INSN (insn);
2733 PREV_INSN (note) = prev;
2734 NEXT_INSN (prev) = note;
2735 NEXT_INSN (PREV_INSN (next)) = insn;
2736 PREV_INSN (insn) = PREV_INSN (next);
2737 NEXT_INSN (insn) = next;
2738 PREV_INSN (next) = insn;
2739 }
2740
2741 /* PEEPHOLE might have changed this. */
2742 body = PATTERN (insn);
2743 }
2744 #endif
2745
2746 /* Try to recognize the instruction.
2747 If successful, verify that the operands satisfy the
2748 constraints for the instruction. Crash if they don't,
2749 since `reload' should have changed them so that they do. */
2750
2751 insn_code_number = recog_memoized (insn);
2752 cleanup_subreg_operands (insn);
2753
2754 /* Dump the insn in the assembly for debugging. */
2755 if (flag_dump_rtl_in_asm)
2756 {
2757 print_rtx_head = ASM_COMMENT_START;
2758 print_rtl_single (asm_out_file, insn);
2759 print_rtx_head = "";
2760 }
2761
2762 if (! constrain_operands_cached (1))
2763 fatal_insn_not_found (insn);
2764
2765 /* Some target machines need to prescan each insn before
2766 it is output. */
2767
2768 #ifdef FINAL_PRESCAN_INSN
2769 FINAL_PRESCAN_INSN (insn, recog_data.operand, recog_data.n_operands);
2770 #endif
2771
2772 if (targetm.have_conditional_execution ()
2773 && GET_CODE (PATTERN (insn)) == COND_EXEC)
2774 current_insn_predicate = COND_EXEC_TEST (PATTERN (insn));
2775
2776 #ifdef HAVE_cc0
2777 cc_prev_status = cc_status;
2778
2779 /* Update `cc_status' for this instruction.
2780 The instruction's output routine may change it further.
2781 If the output routine for a jump insn needs to depend
2782 on the cc status, it should look at cc_prev_status. */
2783
2784 NOTICE_UPDATE_CC (body, insn);
2785 #endif
2786
2787 current_output_insn = debug_insn = insn;
2788
2789 /* Find the proper template for this insn. */
2790 templ = get_insn_template (insn_code_number, insn);
2791
2792 /* If the C code returns 0, it means that it is a jump insn
2793 which follows a deleted test insn, and that test insn
2794 needs to be reinserted. */
2795 if (templ == 0)
2796 {
2797 rtx prev;
2798
2799 gcc_assert (prev_nonnote_insn (insn) == last_ignored_compare);
2800
2801 /* We have already processed the notes between the setter and
2802 the user. Make sure we don't process them again, this is
2803 particularly important if one of the notes is a block
2804 scope note or an EH note. */
2805 for (prev = insn;
2806 prev != last_ignored_compare;
2807 prev = PREV_INSN (prev))
2808 {
2809 if (NOTE_P (prev))
2810 delete_insn (prev); /* Use delete_note. */
2811 }
2812
2813 return prev;
2814 }
2815
2816 /* If the template is the string "#", it means that this insn must
2817 be split. */
2818 if (templ[0] == '#' && templ[1] == '\0')
2819 {
2820 rtx new_rtx = try_split (body, insn, 0);
2821
2822 /* If we didn't split the insn, go away. */
2823 if (new_rtx == insn && PATTERN (new_rtx) == body)
2824 fatal_insn ("could not split insn", insn);
2825
2826 #ifdef HAVE_ATTR_length
2827 /* This instruction should have been split in shorten_branches,
2828 to ensure that we would have valid length info for the
2829 splitees. */
2830 gcc_unreachable ();
2831 #endif
2832
2833 return new_rtx;
2834 }
2835
2836 /* ??? This will put the directives in the wrong place if
2837 get_insn_template outputs assembly directly. However calling it
2838 before get_insn_template breaks if the insns is split. */
2839 if (targetm.asm_out.unwind_emit_before_insn
2840 && targetm.asm_out.unwind_emit)
2841 targetm.asm_out.unwind_emit (asm_out_file, insn);
2842
2843 if (CALL_P (insn))
2844 {
2845 rtx x = call_from_call_insn (insn);
2846 x = XEXP (x, 0);
2847 if (x && MEM_P (x) && GET_CODE (XEXP (x, 0)) == SYMBOL_REF)
2848 {
2849 tree t;
2850 x = XEXP (x, 0);
2851 t = SYMBOL_REF_DECL (x);
2852 if (t)
2853 assemble_external (t);
2854 }
2855 if (!DECL_IGNORED_P (current_function_decl))
2856 debug_hooks->var_location (insn);
2857 }
2858
2859 /* Output assembler code from the template. */
2860 output_asm_insn (templ, recog_data.operand);
2861
2862 /* Some target machines need to postscan each insn after
2863 it is output. */
2864 if (targetm.asm_out.final_postscan_insn)
2865 targetm.asm_out.final_postscan_insn (file, insn, recog_data.operand,
2866 recog_data.n_operands);
2867
2868 if (!targetm.asm_out.unwind_emit_before_insn
2869 && targetm.asm_out.unwind_emit)
2870 targetm.asm_out.unwind_emit (asm_out_file, insn);
2871
2872 current_output_insn = debug_insn = 0;
2873 }
2874 }
2875 return NEXT_INSN (insn);
2876 }
2877 \f
2878 /* Return whether a source line note needs to be emitted before INSN.
2879 Sets IS_STMT to TRUE if the line should be marked as a possible
2880 breakpoint location. */
2881
2882 static bool
2883 notice_source_line (rtx insn, bool *is_stmt)
2884 {
2885 const char *filename;
2886 int linenum;
2887
2888 if (override_filename)
2889 {
2890 filename = override_filename;
2891 linenum = override_linenum;
2892 }
2893 else
2894 {
2895 filename = insn_file (insn);
2896 linenum = insn_line (insn);
2897 }
2898
2899 if (filename == NULL)
2900 return false;
2901
2902 if (force_source_line
2903 || filename != last_filename
2904 || last_linenum != linenum)
2905 {
2906 force_source_line = false;
2907 last_filename = filename;
2908 last_linenum = linenum;
2909 last_discriminator = discriminator;
2910 *is_stmt = true;
2911 high_block_linenum = MAX (last_linenum, high_block_linenum);
2912 high_function_linenum = MAX (last_linenum, high_function_linenum);
2913 return true;
2914 }
2915
2916 if (SUPPORTS_DISCRIMINATOR && last_discriminator != discriminator)
2917 {
2918 /* If the discriminator changed, but the line number did not,
2919 output the line table entry with is_stmt false so the
2920 debugger does not treat this as a breakpoint location. */
2921 last_discriminator = discriminator;
2922 *is_stmt = false;
2923 return true;
2924 }
2925
2926 return false;
2927 }
2928 \f
2929 /* For each operand in INSN, simplify (subreg (reg)) so that it refers
2930 directly to the desired hard register. */
2931
2932 void
2933 cleanup_subreg_operands (rtx insn)
2934 {
2935 int i;
2936 bool changed = false;
2937 extract_insn_cached (insn);
2938 for (i = 0; i < recog_data.n_operands; i++)
2939 {
2940 /* The following test cannot use recog_data.operand when testing
2941 for a SUBREG: the underlying object might have been changed
2942 already if we are inside a match_operator expression that
2943 matches the else clause. Instead we test the underlying
2944 expression directly. */
2945 if (GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
2946 {
2947 recog_data.operand[i] = alter_subreg (recog_data.operand_loc[i]);
2948 changed = true;
2949 }
2950 else if (GET_CODE (recog_data.operand[i]) == PLUS
2951 || GET_CODE (recog_data.operand[i]) == MULT
2952 || MEM_P (recog_data.operand[i]))
2953 recog_data.operand[i] = walk_alter_subreg (recog_data.operand_loc[i], &changed);
2954 }
2955
2956 for (i = 0; i < recog_data.n_dups; i++)
2957 {
2958 if (GET_CODE (*recog_data.dup_loc[i]) == SUBREG)
2959 {
2960 *recog_data.dup_loc[i] = alter_subreg (recog_data.dup_loc[i]);
2961 changed = true;
2962 }
2963 else if (GET_CODE (*recog_data.dup_loc[i]) == PLUS
2964 || GET_CODE (*recog_data.dup_loc[i]) == MULT
2965 || MEM_P (*recog_data.dup_loc[i]))
2966 *recog_data.dup_loc[i] = walk_alter_subreg (recog_data.dup_loc[i], &changed);
2967 }
2968 if (changed)
2969 df_insn_rescan (insn);
2970 }
2971
2972 /* If X is a SUBREG, replace it with a REG or a MEM,
2973 based on the thing it is a subreg of. */
2974
2975 rtx
2976 alter_subreg (rtx *xp)
2977 {
2978 rtx x = *xp;
2979 rtx y = SUBREG_REG (x);
2980
2981 /* simplify_subreg does not remove subreg from volatile references.
2982 We are required to. */
2983 if (MEM_P (y))
2984 {
2985 int offset = SUBREG_BYTE (x);
2986
2987 /* For paradoxical subregs on big-endian machines, SUBREG_BYTE
2988 contains 0 instead of the proper offset. See simplify_subreg. */
2989 if (offset == 0
2990 && GET_MODE_SIZE (GET_MODE (y)) < GET_MODE_SIZE (GET_MODE (x)))
2991 {
2992 int difference = GET_MODE_SIZE (GET_MODE (y))
2993 - GET_MODE_SIZE (GET_MODE (x));
2994 if (WORDS_BIG_ENDIAN)
2995 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
2996 if (BYTES_BIG_ENDIAN)
2997 offset += difference % UNITS_PER_WORD;
2998 }
2999
3000 *xp = adjust_address (y, GET_MODE (x), offset);
3001 }
3002 else
3003 {
3004 rtx new_rtx = simplify_subreg (GET_MODE (x), y, GET_MODE (y),
3005 SUBREG_BYTE (x));
3006
3007 if (new_rtx != 0)
3008 *xp = new_rtx;
3009 else if (REG_P (y))
3010 {
3011 /* Simplify_subreg can't handle some REG cases, but we have to. */
3012 unsigned int regno;
3013 HOST_WIDE_INT offset;
3014
3015 regno = subreg_regno (x);
3016 if (subreg_lowpart_p (x))
3017 offset = byte_lowpart_offset (GET_MODE (x), GET_MODE (y));
3018 else
3019 offset = SUBREG_BYTE (x);
3020 *xp = gen_rtx_REG_offset (y, GET_MODE (x), regno, offset);
3021 }
3022 }
3023
3024 return *xp;
3025 }
3026
3027 /* Do alter_subreg on all the SUBREGs contained in X. */
3028
3029 static rtx
3030 walk_alter_subreg (rtx *xp, bool *changed)
3031 {
3032 rtx x = *xp;
3033 switch (GET_CODE (x))
3034 {
3035 case PLUS:
3036 case MULT:
3037 case AND:
3038 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed);
3039 XEXP (x, 1) = walk_alter_subreg (&XEXP (x, 1), changed);
3040 break;
3041
3042 case MEM:
3043 case ZERO_EXTEND:
3044 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed);
3045 break;
3046
3047 case SUBREG:
3048 *changed = true;
3049 return alter_subreg (xp);
3050
3051 default:
3052 break;
3053 }
3054
3055 return *xp;
3056 }
3057 \f
3058 #ifdef HAVE_cc0
3059
3060 /* Given BODY, the body of a jump instruction, alter the jump condition
3061 as required by the bits that are set in cc_status.flags.
3062 Not all of the bits there can be handled at this level in all cases.
3063
3064 The value is normally 0.
3065 1 means that the condition has become always true.
3066 -1 means that the condition has become always false.
3067 2 means that COND has been altered. */
3068
3069 static int
3070 alter_cond (rtx cond)
3071 {
3072 int value = 0;
3073
3074 if (cc_status.flags & CC_REVERSED)
3075 {
3076 value = 2;
3077 PUT_CODE (cond, swap_condition (GET_CODE (cond)));
3078 }
3079
3080 if (cc_status.flags & CC_INVERTED)
3081 {
3082 value = 2;
3083 PUT_CODE (cond, reverse_condition (GET_CODE (cond)));
3084 }
3085
3086 if (cc_status.flags & CC_NOT_POSITIVE)
3087 switch (GET_CODE (cond))
3088 {
3089 case LE:
3090 case LEU:
3091 case GEU:
3092 /* Jump becomes unconditional. */
3093 return 1;
3094
3095 case GT:
3096 case GTU:
3097 case LTU:
3098 /* Jump becomes no-op. */
3099 return -1;
3100
3101 case GE:
3102 PUT_CODE (cond, EQ);
3103 value = 2;
3104 break;
3105
3106 case LT:
3107 PUT_CODE (cond, NE);
3108 value = 2;
3109 break;
3110
3111 default:
3112 break;
3113 }
3114
3115 if (cc_status.flags & CC_NOT_NEGATIVE)
3116 switch (GET_CODE (cond))
3117 {
3118 case GE:
3119 case GEU:
3120 /* Jump becomes unconditional. */
3121 return 1;
3122
3123 case LT:
3124 case LTU:
3125 /* Jump becomes no-op. */
3126 return -1;
3127
3128 case LE:
3129 case LEU:
3130 PUT_CODE (cond, EQ);
3131 value = 2;
3132 break;
3133
3134 case GT:
3135 case GTU:
3136 PUT_CODE (cond, NE);
3137 value = 2;
3138 break;
3139
3140 default:
3141 break;
3142 }
3143
3144 if (cc_status.flags & CC_NO_OVERFLOW)
3145 switch (GET_CODE (cond))
3146 {
3147 case GEU:
3148 /* Jump becomes unconditional. */
3149 return 1;
3150
3151 case LEU:
3152 PUT_CODE (cond, EQ);
3153 value = 2;
3154 break;
3155
3156 case GTU:
3157 PUT_CODE (cond, NE);
3158 value = 2;
3159 break;
3160
3161 case LTU:
3162 /* Jump becomes no-op. */
3163 return -1;
3164
3165 default:
3166 break;
3167 }
3168
3169 if (cc_status.flags & (CC_Z_IN_NOT_N | CC_Z_IN_N))
3170 switch (GET_CODE (cond))
3171 {
3172 default:
3173 gcc_unreachable ();
3174
3175 case NE:
3176 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? GE : LT);
3177 value = 2;
3178 break;
3179
3180 case EQ:
3181 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? LT : GE);
3182 value = 2;
3183 break;
3184 }
3185
3186 if (cc_status.flags & CC_NOT_SIGNED)
3187 /* The flags are valid if signed condition operators are converted
3188 to unsigned. */
3189 switch (GET_CODE (cond))
3190 {
3191 case LE:
3192 PUT_CODE (cond, LEU);
3193 value = 2;
3194 break;
3195
3196 case LT:
3197 PUT_CODE (cond, LTU);
3198 value = 2;
3199 break;
3200
3201 case GT:
3202 PUT_CODE (cond, GTU);
3203 value = 2;
3204 break;
3205
3206 case GE:
3207 PUT_CODE (cond, GEU);
3208 value = 2;
3209 break;
3210
3211 default:
3212 break;
3213 }
3214
3215 return value;
3216 }
3217 #endif
3218 \f
3219 /* Report inconsistency between the assembler template and the operands.
3220 In an `asm', it's the user's fault; otherwise, the compiler's fault. */
3221
3222 void
3223 output_operand_lossage (const char *cmsgid, ...)
3224 {
3225 char *fmt_string;
3226 char *new_message;
3227 const char *pfx_str;
3228 va_list ap;
3229
3230 va_start (ap, cmsgid);
3231
3232 pfx_str = this_is_asm_operands ? _("invalid 'asm': ") : "output_operand: ";
3233 asprintf (&fmt_string, "%s%s", pfx_str, _(cmsgid));
3234 vasprintf (&new_message, fmt_string, ap);
3235
3236 if (this_is_asm_operands)
3237 error_for_asm (this_is_asm_operands, "%s", new_message);
3238 else
3239 internal_error ("%s", new_message);
3240
3241 free (fmt_string);
3242 free (new_message);
3243 va_end (ap);
3244 }
3245 \f
3246 /* Output of assembler code from a template, and its subroutines. */
3247
3248 /* Annotate the assembly with a comment describing the pattern and
3249 alternative used. */
3250
3251 static void
3252 output_asm_name (void)
3253 {
3254 if (debug_insn)
3255 {
3256 int num = INSN_CODE (debug_insn);
3257 fprintf (asm_out_file, "\t%s %d\t%s",
3258 ASM_COMMENT_START, INSN_UID (debug_insn),
3259 insn_data[num].name);
3260 if (insn_data[num].n_alternatives > 1)
3261 fprintf (asm_out_file, "/%d", which_alternative + 1);
3262 #ifdef HAVE_ATTR_length
3263 fprintf (asm_out_file, "\t[length = %d]",
3264 get_attr_length (debug_insn));
3265 #endif
3266 /* Clear this so only the first assembler insn
3267 of any rtl insn will get the special comment for -dp. */
3268 debug_insn = 0;
3269 }
3270 }
3271
3272 /* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it
3273 or its address, return that expr . Set *PADDRESSP to 1 if the expr
3274 corresponds to the address of the object and 0 if to the object. */
3275
3276 static tree
3277 get_mem_expr_from_op (rtx op, int *paddressp)
3278 {
3279 tree expr;
3280 int inner_addressp;
3281
3282 *paddressp = 0;
3283
3284 if (REG_P (op))
3285 return REG_EXPR (op);
3286 else if (!MEM_P (op))
3287 return 0;
3288
3289 if (MEM_EXPR (op) != 0)
3290 return MEM_EXPR (op);
3291
3292 /* Otherwise we have an address, so indicate it and look at the address. */
3293 *paddressp = 1;
3294 op = XEXP (op, 0);
3295
3296 /* First check if we have a decl for the address, then look at the right side
3297 if it is a PLUS. Otherwise, strip off arithmetic and keep looking.
3298 But don't allow the address to itself be indirect. */
3299 if ((expr = get_mem_expr_from_op (op, &inner_addressp)) && ! inner_addressp)
3300 return expr;
3301 else if (GET_CODE (op) == PLUS
3302 && (expr = get_mem_expr_from_op (XEXP (op, 1), &inner_addressp)))
3303 return expr;
3304
3305 while (UNARY_P (op)
3306 || GET_RTX_CLASS (GET_CODE (op)) == RTX_BIN_ARITH)
3307 op = XEXP (op, 0);
3308
3309 expr = get_mem_expr_from_op (op, &inner_addressp);
3310 return inner_addressp ? 0 : expr;
3311 }
3312
3313 /* Output operand names for assembler instructions. OPERANDS is the
3314 operand vector, OPORDER is the order to write the operands, and NOPS
3315 is the number of operands to write. */
3316
3317 static void
3318 output_asm_operand_names (rtx *operands, int *oporder, int nops)
3319 {
3320 int wrote = 0;
3321 int i;
3322
3323 for (i = 0; i < nops; i++)
3324 {
3325 int addressp;
3326 rtx op = operands[oporder[i]];
3327 tree expr = get_mem_expr_from_op (op, &addressp);
3328
3329 fprintf (asm_out_file, "%c%s",
3330 wrote ? ',' : '\t', wrote ? "" : ASM_COMMENT_START);
3331 wrote = 1;
3332 if (expr)
3333 {
3334 fprintf (asm_out_file, "%s",
3335 addressp ? "*" : "");
3336 print_mem_expr (asm_out_file, expr);
3337 wrote = 1;
3338 }
3339 else if (REG_P (op) && ORIGINAL_REGNO (op)
3340 && ORIGINAL_REGNO (op) != REGNO (op))
3341 fprintf (asm_out_file, " tmp%i", ORIGINAL_REGNO (op));
3342 }
3343 }
3344
3345 /* Output text from TEMPLATE to the assembler output file,
3346 obeying %-directions to substitute operands taken from
3347 the vector OPERANDS.
3348
3349 %N (for N a digit) means print operand N in usual manner.
3350 %lN means require operand N to be a CODE_LABEL or LABEL_REF
3351 and print the label name with no punctuation.
3352 %cN means require operand N to be a constant
3353 and print the constant expression with no punctuation.
3354 %aN means expect operand N to be a memory address
3355 (not a memory reference!) and print a reference
3356 to that address.
3357 %nN means expect operand N to be a constant
3358 and print a constant expression for minus the value
3359 of the operand, with no other punctuation. */
3360
3361 void
3362 output_asm_insn (const char *templ, rtx *operands)
3363 {
3364 const char *p;
3365 int c;
3366 #ifdef ASSEMBLER_DIALECT
3367 int dialect = 0;
3368 #endif
3369 int oporder[MAX_RECOG_OPERANDS];
3370 char opoutput[MAX_RECOG_OPERANDS];
3371 int ops = 0;
3372
3373 /* An insn may return a null string template
3374 in a case where no assembler code is needed. */
3375 if (*templ == 0)
3376 return;
3377
3378 memset (opoutput, 0, sizeof opoutput);
3379 p = templ;
3380 putc ('\t', asm_out_file);
3381
3382 #ifdef ASM_OUTPUT_OPCODE
3383 ASM_OUTPUT_OPCODE (asm_out_file, p);
3384 #endif
3385
3386 while ((c = *p++))
3387 switch (c)
3388 {
3389 case '\n':
3390 if (flag_verbose_asm)
3391 output_asm_operand_names (operands, oporder, ops);
3392 if (flag_print_asm_name)
3393 output_asm_name ();
3394
3395 ops = 0;
3396 memset (opoutput, 0, sizeof opoutput);
3397
3398 putc (c, asm_out_file);
3399 #ifdef ASM_OUTPUT_OPCODE
3400 while ((c = *p) == '\t')
3401 {
3402 putc (c, asm_out_file);
3403 p++;
3404 }
3405 ASM_OUTPUT_OPCODE (asm_out_file, p);
3406 #endif
3407 break;
3408
3409 #ifdef ASSEMBLER_DIALECT
3410 case '{':
3411 {
3412 int i;
3413
3414 if (dialect)
3415 output_operand_lossage ("nested assembly dialect alternatives");
3416 else
3417 dialect = 1;
3418
3419 /* If we want the first dialect, do nothing. Otherwise, skip
3420 DIALECT_NUMBER of strings ending with '|'. */
3421 for (i = 0; i < dialect_number; i++)
3422 {
3423 while (*p && *p != '}' && *p++ != '|')
3424 ;
3425 if (*p == '}')
3426 break;
3427 if (*p == '|')
3428 p++;
3429 }
3430
3431 if (*p == '\0')
3432 output_operand_lossage ("unterminated assembly dialect alternative");
3433 }
3434 break;
3435
3436 case '|':
3437 if (dialect)
3438 {
3439 /* Skip to close brace. */
3440 do
3441 {
3442 if (*p == '\0')
3443 {
3444 output_operand_lossage ("unterminated assembly dialect alternative");
3445 break;
3446 }
3447 }
3448 while (*p++ != '}');
3449 dialect = 0;
3450 }
3451 else
3452 putc (c, asm_out_file);
3453 break;
3454
3455 case '}':
3456 if (! dialect)
3457 putc (c, asm_out_file);
3458 dialect = 0;
3459 break;
3460 #endif
3461
3462 case '%':
3463 /* %% outputs a single %. */
3464 if (*p == '%')
3465 {
3466 p++;
3467 putc (c, asm_out_file);
3468 }
3469 /* %= outputs a number which is unique to each insn in the entire
3470 compilation. This is useful for making local labels that are
3471 referred to more than once in a given insn. */
3472 else if (*p == '=')
3473 {
3474 p++;
3475 fprintf (asm_out_file, "%d", insn_counter);
3476 }
3477 /* % followed by a letter and some digits
3478 outputs an operand in a special way depending on the letter.
3479 Letters `acln' are implemented directly.
3480 Other letters are passed to `output_operand' so that
3481 the TARGET_PRINT_OPERAND hook can define them. */
3482 else if (ISALPHA (*p))
3483 {
3484 int letter = *p++;
3485 unsigned long opnum;
3486 char *endptr;
3487
3488 opnum = strtoul (p, &endptr, 10);
3489
3490 if (endptr == p)
3491 output_operand_lossage ("operand number missing "
3492 "after %%-letter");
3493 else if (this_is_asm_operands && opnum >= insn_noperands)
3494 output_operand_lossage ("operand number out of range");
3495 else if (letter == 'l')
3496 output_asm_label (operands[opnum]);
3497 else if (letter == 'a')
3498 output_address (operands[opnum]);
3499 else if (letter == 'c')
3500 {
3501 if (CONSTANT_ADDRESS_P (operands[opnum]))
3502 output_addr_const (asm_out_file, operands[opnum]);
3503 else
3504 output_operand (operands[opnum], 'c');
3505 }
3506 else if (letter == 'n')
3507 {
3508 if (CONST_INT_P (operands[opnum]))
3509 fprintf (asm_out_file, HOST_WIDE_INT_PRINT_DEC,
3510 - INTVAL (operands[opnum]));
3511 else
3512 {
3513 putc ('-', asm_out_file);
3514 output_addr_const (asm_out_file, operands[opnum]);
3515 }
3516 }
3517 else
3518 output_operand (operands[opnum], letter);
3519
3520 if (!opoutput[opnum])
3521 oporder[ops++] = opnum;
3522 opoutput[opnum] = 1;
3523
3524 p = endptr;
3525 c = *p;
3526 }
3527 /* % followed by a digit outputs an operand the default way. */
3528 else if (ISDIGIT (*p))
3529 {
3530 unsigned long opnum;
3531 char *endptr;
3532
3533 opnum = strtoul (p, &endptr, 10);
3534 if (this_is_asm_operands && opnum >= insn_noperands)
3535 output_operand_lossage ("operand number out of range");
3536 else
3537 output_operand (operands[opnum], 0);
3538
3539 if (!opoutput[opnum])
3540 oporder[ops++] = opnum;
3541 opoutput[opnum] = 1;
3542
3543 p = endptr;
3544 c = *p;
3545 }
3546 /* % followed by punctuation: output something for that
3547 punctuation character alone, with no operand. The
3548 TARGET_PRINT_OPERAND hook decides what is actually done. */
3549 else if (targetm.asm_out.print_operand_punct_valid_p ((unsigned char) *p))
3550 output_operand (NULL_RTX, *p++);
3551 else
3552 output_operand_lossage ("invalid %%-code");
3553 break;
3554
3555 default:
3556 putc (c, asm_out_file);
3557 }
3558
3559 /* Write out the variable names for operands, if we know them. */
3560 if (flag_verbose_asm)
3561 output_asm_operand_names (operands, oporder, ops);
3562 if (flag_print_asm_name)
3563 output_asm_name ();
3564
3565 putc ('\n', asm_out_file);
3566 }
3567 \f
3568 /* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */
3569
3570 void
3571 output_asm_label (rtx x)
3572 {
3573 char buf[256];
3574
3575 if (GET_CODE (x) == LABEL_REF)
3576 x = XEXP (x, 0);
3577 if (LABEL_P (x)
3578 || (NOTE_P (x)
3579 && NOTE_KIND (x) == NOTE_INSN_DELETED_LABEL))
3580 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3581 else
3582 output_operand_lossage ("'%%l' operand isn't a label");
3583
3584 assemble_name (asm_out_file, buf);
3585 }
3586
3587 /* Helper rtx-iteration-function for mark_symbol_refs_as_used and
3588 output_operand. Marks SYMBOL_REFs as referenced through use of
3589 assemble_external. */
3590
3591 static int
3592 mark_symbol_ref_as_used (rtx *xp, void *dummy ATTRIBUTE_UNUSED)
3593 {
3594 rtx x = *xp;
3595
3596 /* If we have a used symbol, we may have to emit assembly
3597 annotations corresponding to whether the symbol is external, weak
3598 or has non-default visibility. */
3599 if (GET_CODE (x) == SYMBOL_REF)
3600 {
3601 tree t;
3602
3603 t = SYMBOL_REF_DECL (x);
3604 if (t)
3605 assemble_external (t);
3606
3607 return -1;
3608 }
3609
3610 return 0;
3611 }
3612
3613 /* Marks SYMBOL_REFs in x as referenced through use of assemble_external. */
3614
3615 void
3616 mark_symbol_refs_as_used (rtx x)
3617 {
3618 for_each_rtx (&x, mark_symbol_ref_as_used, NULL);
3619 }
3620
3621 /* Print operand X using machine-dependent assembler syntax.
3622 CODE is a non-digit that preceded the operand-number in the % spec,
3623 such as 'z' if the spec was `%z3'. CODE is 0 if there was no char
3624 between the % and the digits.
3625 When CODE is a non-letter, X is 0.
3626
3627 The meanings of the letters are machine-dependent and controlled
3628 by TARGET_PRINT_OPERAND. */
3629
3630 void
3631 output_operand (rtx x, int code ATTRIBUTE_UNUSED)
3632 {
3633 if (x && GET_CODE (x) == SUBREG)
3634 x = alter_subreg (&x);
3635
3636 /* X must not be a pseudo reg. */
3637 gcc_assert (!x || !REG_P (x) || REGNO (x) < FIRST_PSEUDO_REGISTER);
3638
3639 targetm.asm_out.print_operand (asm_out_file, x, code);
3640
3641 if (x == NULL_RTX)
3642 return;
3643
3644 for_each_rtx (&x, mark_symbol_ref_as_used, NULL);
3645 }
3646
3647 /* Print a memory reference operand for address X using
3648 machine-dependent assembler syntax. */
3649
3650 void
3651 output_address (rtx x)
3652 {
3653 bool changed = false;
3654 walk_alter_subreg (&x, &changed);
3655 targetm.asm_out.print_operand_address (asm_out_file, x);
3656 }
3657 \f
3658 /* Print an integer constant expression in assembler syntax.
3659 Addition and subtraction are the only arithmetic
3660 that may appear in these expressions. */
3661
3662 void
3663 output_addr_const (FILE *file, rtx x)
3664 {
3665 char buf[256];
3666
3667 restart:
3668 switch (GET_CODE (x))
3669 {
3670 case PC:
3671 putc ('.', file);
3672 break;
3673
3674 case SYMBOL_REF:
3675 if (SYMBOL_REF_DECL (x))
3676 assemble_external (SYMBOL_REF_DECL (x));
3677 #ifdef ASM_OUTPUT_SYMBOL_REF
3678 ASM_OUTPUT_SYMBOL_REF (file, x);
3679 #else
3680 assemble_name (file, XSTR (x, 0));
3681 #endif
3682 break;
3683
3684 case LABEL_REF:
3685 x = XEXP (x, 0);
3686 /* Fall through. */
3687 case CODE_LABEL:
3688 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3689 #ifdef ASM_OUTPUT_LABEL_REF
3690 ASM_OUTPUT_LABEL_REF (file, buf);
3691 #else
3692 assemble_name (file, buf);
3693 #endif
3694 break;
3695
3696 case CONST_INT:
3697 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x));
3698 break;
3699
3700 case CONST:
3701 /* This used to output parentheses around the expression,
3702 but that does not work on the 386 (either ATT or BSD assembler). */
3703 output_addr_const (file, XEXP (x, 0));
3704 break;
3705
3706 case CONST_DOUBLE:
3707 if (GET_MODE (x) == VOIDmode)
3708 {
3709 /* We can use %d if the number is one word and positive. */
3710 if (CONST_DOUBLE_HIGH (x))
3711 fprintf (file, HOST_WIDE_INT_PRINT_DOUBLE_HEX,
3712 (unsigned HOST_WIDE_INT) CONST_DOUBLE_HIGH (x),
3713 (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (x));
3714 else if (CONST_DOUBLE_LOW (x) < 0)
3715 fprintf (file, HOST_WIDE_INT_PRINT_HEX,
3716 (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (x));
3717 else
3718 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x));
3719 }
3720 else
3721 /* We can't handle floating point constants;
3722 PRINT_OPERAND must handle them. */
3723 output_operand_lossage ("floating constant misused");
3724 break;
3725
3726 case CONST_FIXED:
3727 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_FIXED_VALUE_LOW (x));
3728 break;
3729
3730 case PLUS:
3731 /* Some assemblers need integer constants to appear last (eg masm). */
3732 if (CONST_INT_P (XEXP (x, 0)))
3733 {
3734 output_addr_const (file, XEXP (x, 1));
3735 if (INTVAL (XEXP (x, 0)) >= 0)
3736 fprintf (file, "+");
3737 output_addr_const (file, XEXP (x, 0));
3738 }
3739 else
3740 {
3741 output_addr_const (file, XEXP (x, 0));
3742 if (!CONST_INT_P (XEXP (x, 1))
3743 || INTVAL (XEXP (x, 1)) >= 0)
3744 fprintf (file, "+");
3745 output_addr_const (file, XEXP (x, 1));
3746 }
3747 break;
3748
3749 case MINUS:
3750 /* Avoid outputting things like x-x or x+5-x,
3751 since some assemblers can't handle that. */
3752 x = simplify_subtraction (x);
3753 if (GET_CODE (x) != MINUS)
3754 goto restart;
3755
3756 output_addr_const (file, XEXP (x, 0));
3757 fprintf (file, "-");
3758 if ((CONST_INT_P (XEXP (x, 1)) && INTVAL (XEXP (x, 1)) >= 0)
3759 || GET_CODE (XEXP (x, 1)) == PC
3760 || GET_CODE (XEXP (x, 1)) == SYMBOL_REF)
3761 output_addr_const (file, XEXP (x, 1));
3762 else
3763 {
3764 fputs (targetm.asm_out.open_paren, file);
3765 output_addr_const (file, XEXP (x, 1));
3766 fputs (targetm.asm_out.close_paren, file);
3767 }
3768 break;
3769
3770 case ZERO_EXTEND:
3771 case SIGN_EXTEND:
3772 case SUBREG:
3773 case TRUNCATE:
3774 output_addr_const (file, XEXP (x, 0));
3775 break;
3776
3777 default:
3778 if (targetm.asm_out.output_addr_const_extra (file, x))
3779 break;
3780
3781 output_operand_lossage ("invalid expression as operand");
3782 }
3783 }
3784 \f
3785 /* Output a quoted string. */
3786
3787 void
3788 output_quoted_string (FILE *asm_file, const char *string)
3789 {
3790 #ifdef OUTPUT_QUOTED_STRING
3791 OUTPUT_QUOTED_STRING (asm_file, string);
3792 #else
3793 char c;
3794
3795 putc ('\"', asm_file);
3796 while ((c = *string++) != 0)
3797 {
3798 if (ISPRINT (c))
3799 {
3800 if (c == '\"' || c == '\\')
3801 putc ('\\', asm_file);
3802 putc (c, asm_file);
3803 }
3804 else
3805 fprintf (asm_file, "\\%03o", (unsigned char) c);
3806 }
3807 putc ('\"', asm_file);
3808 #endif
3809 }
3810 \f
3811 /* Write a HOST_WIDE_INT number in hex form 0x1234, fast. */
3812
3813 void
3814 fprint_whex (FILE *f, unsigned HOST_WIDE_INT value)
3815 {
3816 char buf[2 + CHAR_BIT * sizeof (value) / 4];
3817 if (value == 0)
3818 putc ('0', f);
3819 else
3820 {
3821 char *p = buf + sizeof (buf);
3822 do
3823 *--p = "0123456789abcdef"[value % 16];
3824 while ((value /= 16) != 0);
3825 *--p = 'x';
3826 *--p = '0';
3827 fwrite (p, 1, buf + sizeof (buf) - p, f);
3828 }
3829 }
3830
3831 /* Internal function that prints an unsigned long in decimal in reverse.
3832 The output string IS NOT null-terminated. */
3833
3834 static int
3835 sprint_ul_rev (char *s, unsigned long value)
3836 {
3837 int i = 0;
3838 do
3839 {
3840 s[i] = "0123456789"[value % 10];
3841 value /= 10;
3842 i++;
3843 /* alternate version, without modulo */
3844 /* oldval = value; */
3845 /* value /= 10; */
3846 /* s[i] = "0123456789" [oldval - 10*value]; */
3847 /* i++ */
3848 }
3849 while (value != 0);
3850 return i;
3851 }
3852
3853 /* Write an unsigned long as decimal to a file, fast. */
3854
3855 void
3856 fprint_ul (FILE *f, unsigned long value)
3857 {
3858 /* python says: len(str(2**64)) == 20 */
3859 char s[20];
3860 int i;
3861
3862 i = sprint_ul_rev (s, value);
3863
3864 /* It's probably too small to bother with string reversal and fputs. */
3865 do
3866 {
3867 i--;
3868 putc (s[i], f);
3869 }
3870 while (i != 0);
3871 }
3872
3873 /* Write an unsigned long as decimal to a string, fast.
3874 s must be wide enough to not overflow, at least 21 chars.
3875 Returns the length of the string (without terminating '\0'). */
3876
3877 int
3878 sprint_ul (char *s, unsigned long value)
3879 {
3880 int len;
3881 char tmp_c;
3882 int i;
3883 int j;
3884
3885 len = sprint_ul_rev (s, value);
3886 s[len] = '\0';
3887
3888 /* Reverse the string. */
3889 i = 0;
3890 j = len - 1;
3891 while (i < j)
3892 {
3893 tmp_c = s[i];
3894 s[i] = s[j];
3895 s[j] = tmp_c;
3896 i++; j--;
3897 }
3898
3899 return len;
3900 }
3901
3902 /* A poor man's fprintf, with the added features of %I, %R, %L, and %U.
3903 %R prints the value of REGISTER_PREFIX.
3904 %L prints the value of LOCAL_LABEL_PREFIX.
3905 %U prints the value of USER_LABEL_PREFIX.
3906 %I prints the value of IMMEDIATE_PREFIX.
3907 %O runs ASM_OUTPUT_OPCODE to transform what follows in the string.
3908 Also supported are %d, %i, %u, %x, %X, %o, %c, %s and %%.
3909
3910 We handle alternate assembler dialects here, just like output_asm_insn. */
3911
3912 void
3913 asm_fprintf (FILE *file, const char *p, ...)
3914 {
3915 char buf[10];
3916 char *q, c;
3917 va_list argptr;
3918
3919 va_start (argptr, p);
3920
3921 buf[0] = '%';
3922
3923 while ((c = *p++))
3924 switch (c)
3925 {
3926 #ifdef ASSEMBLER_DIALECT
3927 case '{':
3928 {
3929 int i;
3930
3931 /* If we want the first dialect, do nothing. Otherwise, skip
3932 DIALECT_NUMBER of strings ending with '|'. */
3933 for (i = 0; i < dialect_number; i++)
3934 {
3935 while (*p && *p++ != '|')
3936 ;
3937
3938 if (*p == '|')
3939 p++;
3940 }
3941 }
3942 break;
3943
3944 case '|':
3945 /* Skip to close brace. */
3946 while (*p && *p++ != '}')
3947 ;
3948 break;
3949
3950 case '}':
3951 break;
3952 #endif
3953
3954 case '%':
3955 c = *p++;
3956 q = &buf[1];
3957 while (strchr ("-+ #0", c))
3958 {
3959 *q++ = c;
3960 c = *p++;
3961 }
3962 while (ISDIGIT (c) || c == '.')
3963 {
3964 *q++ = c;
3965 c = *p++;
3966 }
3967 switch (c)
3968 {
3969 case '%':
3970 putc ('%', file);
3971 break;
3972
3973 case 'd': case 'i': case 'u':
3974 case 'x': case 'X': case 'o':
3975 case 'c':
3976 *q++ = c;
3977 *q = 0;
3978 fprintf (file, buf, va_arg (argptr, int));
3979 break;
3980
3981 case 'w':
3982 /* This is a prefix to the 'd', 'i', 'u', 'x', 'X', and
3983 'o' cases, but we do not check for those cases. It
3984 means that the value is a HOST_WIDE_INT, which may be
3985 either `long' or `long long'. */
3986 memcpy (q, HOST_WIDE_INT_PRINT, strlen (HOST_WIDE_INT_PRINT));
3987 q += strlen (HOST_WIDE_INT_PRINT);
3988 *q++ = *p++;
3989 *q = 0;
3990 fprintf (file, buf, va_arg (argptr, HOST_WIDE_INT));
3991 break;
3992
3993 case 'l':
3994 *q++ = c;
3995 #ifdef HAVE_LONG_LONG
3996 if (*p == 'l')
3997 {
3998 *q++ = *p++;
3999 *q++ = *p++;
4000 *q = 0;
4001 fprintf (file, buf, va_arg (argptr, long long));
4002 }
4003 else
4004 #endif
4005 {
4006 *q++ = *p++;
4007 *q = 0;
4008 fprintf (file, buf, va_arg (argptr, long));
4009 }
4010
4011 break;
4012
4013 case 's':
4014 *q++ = c;
4015 *q = 0;
4016 fprintf (file, buf, va_arg (argptr, char *));
4017 break;
4018
4019 case 'O':
4020 #ifdef ASM_OUTPUT_OPCODE
4021 ASM_OUTPUT_OPCODE (asm_out_file, p);
4022 #endif
4023 break;
4024
4025 case 'R':
4026 #ifdef REGISTER_PREFIX
4027 fprintf (file, "%s", REGISTER_PREFIX);
4028 #endif
4029 break;
4030
4031 case 'I':
4032 #ifdef IMMEDIATE_PREFIX
4033 fprintf (file, "%s", IMMEDIATE_PREFIX);
4034 #endif
4035 break;
4036
4037 case 'L':
4038 #ifdef LOCAL_LABEL_PREFIX
4039 fprintf (file, "%s", LOCAL_LABEL_PREFIX);
4040 #endif
4041 break;
4042
4043 case 'U':
4044 fputs (user_label_prefix, file);
4045 break;
4046
4047 #ifdef ASM_FPRINTF_EXTENSIONS
4048 /* Uppercase letters are reserved for general use by asm_fprintf
4049 and so are not available to target specific code. In order to
4050 prevent the ASM_FPRINTF_EXTENSIONS macro from using them then,
4051 they are defined here. As they get turned into real extensions
4052 to asm_fprintf they should be removed from this list. */
4053 case 'A': case 'B': case 'C': case 'D': case 'E':
4054 case 'F': case 'G': case 'H': case 'J': case 'K':
4055 case 'M': case 'N': case 'P': case 'Q': case 'S':
4056 case 'T': case 'V': case 'W': case 'Y': case 'Z':
4057 break;
4058
4059 ASM_FPRINTF_EXTENSIONS (file, argptr, p)
4060 #endif
4061 default:
4062 gcc_unreachable ();
4063 }
4064 break;
4065
4066 default:
4067 putc (c, file);
4068 }
4069 va_end (argptr);
4070 }
4071 \f
4072 /* Return nonzero if this function has no function calls. */
4073
4074 int
4075 leaf_function_p (void)
4076 {
4077 rtx insn;
4078 rtx link;
4079
4080 if (crtl->profile || profile_arc_flag)
4081 return 0;
4082
4083 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4084 {
4085 if (CALL_P (insn)
4086 && ! SIBLING_CALL_P (insn))
4087 return 0;
4088 if (NONJUMP_INSN_P (insn)
4089 && GET_CODE (PATTERN (insn)) == SEQUENCE
4090 && CALL_P (XVECEXP (PATTERN (insn), 0, 0))
4091 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0)))
4092 return 0;
4093 }
4094 for (link = crtl->epilogue_delay_list;
4095 link;
4096 link = XEXP (link, 1))
4097 {
4098 insn = XEXP (link, 0);
4099
4100 if (CALL_P (insn)
4101 && ! SIBLING_CALL_P (insn))
4102 return 0;
4103 if (NONJUMP_INSN_P (insn)
4104 && GET_CODE (PATTERN (insn)) == SEQUENCE
4105 && CALL_P (XVECEXP (PATTERN (insn), 0, 0))
4106 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0)))
4107 return 0;
4108 }
4109
4110 return 1;
4111 }
4112
4113 /* Return 1 if branch is a forward branch.
4114 Uses insn_shuid array, so it works only in the final pass. May be used by
4115 output templates to customary add branch prediction hints.
4116 */
4117 int
4118 final_forward_branch_p (rtx insn)
4119 {
4120 int insn_id, label_id;
4121
4122 gcc_assert (uid_shuid);
4123 insn_id = INSN_SHUID (insn);
4124 label_id = INSN_SHUID (JUMP_LABEL (insn));
4125 /* We've hit some insns that does not have id information available. */
4126 gcc_assert (insn_id && label_id);
4127 return insn_id < label_id;
4128 }
4129
4130 /* On some machines, a function with no call insns
4131 can run faster if it doesn't create its own register window.
4132 When output, the leaf function should use only the "output"
4133 registers. Ordinarily, the function would be compiled to use
4134 the "input" registers to find its arguments; it is a candidate
4135 for leaf treatment if it uses only the "input" registers.
4136 Leaf function treatment means renumbering so the function
4137 uses the "output" registers instead. */
4138
4139 #ifdef LEAF_REGISTERS
4140
4141 /* Return 1 if this function uses only the registers that can be
4142 safely renumbered. */
4143
4144 int
4145 only_leaf_regs_used (void)
4146 {
4147 int i;
4148 const char *const permitted_reg_in_leaf_functions = LEAF_REGISTERS;
4149
4150 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
4151 if ((df_regs_ever_live_p (i) || global_regs[i])
4152 && ! permitted_reg_in_leaf_functions[i])
4153 return 0;
4154
4155 if (crtl->uses_pic_offset_table
4156 && pic_offset_table_rtx != 0
4157 && REG_P (pic_offset_table_rtx)
4158 && ! permitted_reg_in_leaf_functions[REGNO (pic_offset_table_rtx)])
4159 return 0;
4160
4161 return 1;
4162 }
4163
4164 /* Scan all instructions and renumber all registers into those
4165 available in leaf functions. */
4166
4167 static void
4168 leaf_renumber_regs (rtx first)
4169 {
4170 rtx insn;
4171
4172 /* Renumber only the actual patterns.
4173 The reg-notes can contain frame pointer refs,
4174 and renumbering them could crash, and should not be needed. */
4175 for (insn = first; insn; insn = NEXT_INSN (insn))
4176 if (INSN_P (insn))
4177 leaf_renumber_regs_insn (PATTERN (insn));
4178 for (insn = crtl->epilogue_delay_list;
4179 insn;
4180 insn = XEXP (insn, 1))
4181 if (INSN_P (XEXP (insn, 0)))
4182 leaf_renumber_regs_insn (PATTERN (XEXP (insn, 0)));
4183 }
4184
4185 /* Scan IN_RTX and its subexpressions, and renumber all regs into those
4186 available in leaf functions. */
4187
4188 void
4189 leaf_renumber_regs_insn (rtx in_rtx)
4190 {
4191 int i, j;
4192 const char *format_ptr;
4193
4194 if (in_rtx == 0)
4195 return;
4196
4197 /* Renumber all input-registers into output-registers.
4198 renumbered_regs would be 1 for an output-register;
4199 they */
4200
4201 if (REG_P (in_rtx))
4202 {
4203 int newreg;
4204
4205 /* Don't renumber the same reg twice. */
4206 if (in_rtx->used)
4207 return;
4208
4209 newreg = REGNO (in_rtx);
4210 /* Don't try to renumber pseudo regs. It is possible for a pseudo reg
4211 to reach here as part of a REG_NOTE. */
4212 if (newreg >= FIRST_PSEUDO_REGISTER)
4213 {
4214 in_rtx->used = 1;
4215 return;
4216 }
4217 newreg = LEAF_REG_REMAP (newreg);
4218 gcc_assert (newreg >= 0);
4219 df_set_regs_ever_live (REGNO (in_rtx), false);
4220 df_set_regs_ever_live (newreg, true);
4221 SET_REGNO (in_rtx, newreg);
4222 in_rtx->used = 1;
4223 }
4224
4225 if (INSN_P (in_rtx))
4226 {
4227 /* Inside a SEQUENCE, we find insns.
4228 Renumber just the patterns of these insns,
4229 just as we do for the top-level insns. */
4230 leaf_renumber_regs_insn (PATTERN (in_rtx));
4231 return;
4232 }
4233
4234 format_ptr = GET_RTX_FORMAT (GET_CODE (in_rtx));
4235
4236 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (in_rtx)); i++)
4237 switch (*format_ptr++)
4238 {
4239 case 'e':
4240 leaf_renumber_regs_insn (XEXP (in_rtx, i));
4241 break;
4242
4243 case 'E':
4244 if (NULL != XVEC (in_rtx, i))
4245 {
4246 for (j = 0; j < XVECLEN (in_rtx, i); j++)
4247 leaf_renumber_regs_insn (XVECEXP (in_rtx, i, j));
4248 }
4249 break;
4250
4251 case 'S':
4252 case 's':
4253 case '0':
4254 case 'i':
4255 case 'w':
4256 case 'n':
4257 case 'u':
4258 break;
4259
4260 default:
4261 gcc_unreachable ();
4262 }
4263 }
4264 #endif
4265 \f
4266 /* Turn the RTL into assembly. */
4267 static unsigned int
4268 rest_of_handle_final (void)
4269 {
4270 rtx x;
4271 const char *fnname;
4272
4273 /* Get the function's name, as described by its RTL. This may be
4274 different from the DECL_NAME name used in the source file. */
4275
4276 x = DECL_RTL (current_function_decl);
4277 gcc_assert (MEM_P (x));
4278 x = XEXP (x, 0);
4279 gcc_assert (GET_CODE (x) == SYMBOL_REF);
4280 fnname = XSTR (x, 0);
4281
4282 assemble_start_function (current_function_decl, fnname);
4283 final_start_function (get_insns (), asm_out_file, optimize);
4284 final (get_insns (), asm_out_file, optimize);
4285 final_end_function ();
4286
4287 /* The IA-64 ".handlerdata" directive must be issued before the ".endp"
4288 directive that closes the procedure descriptor. Similarly, for x64 SEH.
4289 Otherwise it's not strictly necessary, but it doesn't hurt either. */
4290 output_function_exception_table (fnname);
4291
4292 assemble_end_function (current_function_decl, fnname);
4293
4294 user_defined_section_attribute = false;
4295
4296 /* Free up reg info memory. */
4297 free_reg_info ();
4298
4299 if (! quiet_flag)
4300 fflush (asm_out_file);
4301
4302 /* Write DBX symbols if requested. */
4303
4304 /* Note that for those inline functions where we don't initially
4305 know for certain that we will be generating an out-of-line copy,
4306 the first invocation of this routine (rest_of_compilation) will
4307 skip over this code by doing a `goto exit_rest_of_compilation;'.
4308 Later on, wrapup_global_declarations will (indirectly) call
4309 rest_of_compilation again for those inline functions that need
4310 to have out-of-line copies generated. During that call, we
4311 *will* be routed past here. */
4312
4313 timevar_push (TV_SYMOUT);
4314 if (!DECL_IGNORED_P (current_function_decl))
4315 debug_hooks->function_decl (current_function_decl);
4316 timevar_pop (TV_SYMOUT);
4317
4318 /* Release the blocks that are linked to DECL_INITIAL() to free the memory. */
4319 DECL_INITIAL (current_function_decl) = error_mark_node;
4320
4321 if (DECL_STATIC_CONSTRUCTOR (current_function_decl)
4322 && targetm.have_ctors_dtors)
4323 targetm.asm_out.constructor (XEXP (DECL_RTL (current_function_decl), 0),
4324 decl_init_priority_lookup
4325 (current_function_decl));
4326 if (DECL_STATIC_DESTRUCTOR (current_function_decl)
4327 && targetm.have_ctors_dtors)
4328 targetm.asm_out.destructor (XEXP (DECL_RTL (current_function_decl), 0),
4329 decl_fini_priority_lookup
4330 (current_function_decl));
4331 return 0;
4332 }
4333
4334 struct rtl_opt_pass pass_final =
4335 {
4336 {
4337 RTL_PASS,
4338 "final", /* name */
4339 NULL, /* gate */
4340 rest_of_handle_final, /* execute */
4341 NULL, /* sub */
4342 NULL, /* next */
4343 0, /* static_pass_number */
4344 TV_FINAL, /* tv_id */
4345 0, /* properties_required */
4346 0, /* properties_provided */
4347 0, /* properties_destroyed */
4348 0, /* todo_flags_start */
4349 TODO_ggc_collect /* todo_flags_finish */
4350 }
4351 };
4352
4353
4354 static unsigned int
4355 rest_of_handle_shorten_branches (void)
4356 {
4357 /* Shorten branches. */
4358 shorten_branches (get_insns ());
4359 return 0;
4360 }
4361
4362 struct rtl_opt_pass pass_shorten_branches =
4363 {
4364 {
4365 RTL_PASS,
4366 "shorten", /* name */
4367 NULL, /* gate */
4368 rest_of_handle_shorten_branches, /* execute */
4369 NULL, /* sub */
4370 NULL, /* next */
4371 0, /* static_pass_number */
4372 TV_FINAL, /* tv_id */
4373 0, /* properties_required */
4374 0, /* properties_provided */
4375 0, /* properties_destroyed */
4376 0, /* todo_flags_start */
4377 0 /* todo_flags_finish */
4378 }
4379 };
4380
4381
4382 static unsigned int
4383 rest_of_clean_state (void)
4384 {
4385 rtx insn, next;
4386 FILE *final_output = NULL;
4387 int save_unnumbered = flag_dump_unnumbered;
4388 int save_noaddr = flag_dump_noaddr;
4389
4390 if (flag_dump_final_insns)
4391 {
4392 final_output = fopen (flag_dump_final_insns, "a");
4393 if (!final_output)
4394 {
4395 error ("could not open final insn dump file %qs: %m",
4396 flag_dump_final_insns);
4397 flag_dump_final_insns = NULL;
4398 }
4399 else
4400 {
4401 flag_dump_noaddr = flag_dump_unnumbered = 1;
4402 if (flag_compare_debug_opt || flag_compare_debug)
4403 dump_flags |= TDF_NOUID;
4404 dump_function_header (final_output, current_function_decl,
4405 dump_flags);
4406 final_insns_dump_p = true;
4407
4408 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4409 if (LABEL_P (insn))
4410 INSN_UID (insn) = CODE_LABEL_NUMBER (insn);
4411 else
4412 {
4413 if (NOTE_P (insn))
4414 set_block_for_insn (insn, NULL);
4415 INSN_UID (insn) = 0;
4416 }
4417 }
4418 }
4419
4420 /* It is very important to decompose the RTL instruction chain here:
4421 debug information keeps pointing into CODE_LABEL insns inside the function
4422 body. If these remain pointing to the other insns, we end up preserving
4423 whole RTL chain and attached detailed debug info in memory. */
4424 for (insn = get_insns (); insn; insn = next)
4425 {
4426 next = NEXT_INSN (insn);
4427 NEXT_INSN (insn) = NULL;
4428 PREV_INSN (insn) = NULL;
4429
4430 if (final_output
4431 && (!NOTE_P (insn) ||
4432 (NOTE_KIND (insn) != NOTE_INSN_VAR_LOCATION
4433 && NOTE_KIND (insn) != NOTE_INSN_CALL_ARG_LOCATION
4434 && NOTE_KIND (insn) != NOTE_INSN_BLOCK_BEG
4435 && NOTE_KIND (insn) != NOTE_INSN_BLOCK_END
4436 && NOTE_KIND (insn) != NOTE_INSN_DELETED_DEBUG_LABEL)))
4437 print_rtl_single (final_output, insn);
4438 }
4439
4440 if (final_output)
4441 {
4442 flag_dump_noaddr = save_noaddr;
4443 flag_dump_unnumbered = save_unnumbered;
4444 final_insns_dump_p = false;
4445
4446 if (fclose (final_output))
4447 {
4448 error ("could not close final insn dump file %qs: %m",
4449 flag_dump_final_insns);
4450 flag_dump_final_insns = NULL;
4451 }
4452 }
4453
4454 /* In case the function was not output,
4455 don't leave any temporary anonymous types
4456 queued up for sdb output. */
4457 #ifdef SDB_DEBUGGING_INFO
4458 if (write_symbols == SDB_DEBUG)
4459 sdbout_types (NULL_TREE);
4460 #endif
4461
4462 flag_rerun_cse_after_global_opts = 0;
4463 reload_completed = 0;
4464 epilogue_completed = 0;
4465 #ifdef STACK_REGS
4466 regstack_completed = 0;
4467 #endif
4468
4469 /* Clear out the insn_length contents now that they are no
4470 longer valid. */
4471 init_insn_lengths ();
4472
4473 /* Show no temporary slots allocated. */
4474 init_temp_slots ();
4475
4476 free_bb_for_insn ();
4477
4478 delete_tree_ssa ();
4479
4480 /* We can reduce stack alignment on call site only when we are sure that
4481 the function body just produced will be actually used in the final
4482 executable. */
4483 if (decl_binds_to_current_def_p (current_function_decl))
4484 {
4485 unsigned int pref = crtl->preferred_stack_boundary;
4486 if (crtl->stack_alignment_needed > crtl->preferred_stack_boundary)
4487 pref = crtl->stack_alignment_needed;
4488 cgraph_rtl_info (current_function_decl)->preferred_incoming_stack_boundary
4489 = pref;
4490 }
4491
4492 /* Make sure volatile mem refs aren't considered valid operands for
4493 arithmetic insns. We must call this here if this is a nested inline
4494 function, since the above code leaves us in the init_recog state,
4495 and the function context push/pop code does not save/restore volatile_ok.
4496
4497 ??? Maybe it isn't necessary for expand_start_function to call this
4498 anymore if we do it here? */
4499
4500 init_recog_no_volatile ();
4501
4502 /* We're done with this function. Free up memory if we can. */
4503 free_after_parsing (cfun);
4504 free_after_compilation (cfun);
4505 return 0;
4506 }
4507
4508 struct rtl_opt_pass pass_clean_state =
4509 {
4510 {
4511 RTL_PASS,
4512 "*clean_state", /* name */
4513 NULL, /* gate */
4514 rest_of_clean_state, /* execute */
4515 NULL, /* sub */
4516 NULL, /* next */
4517 0, /* static_pass_number */
4518 TV_FINAL, /* tv_id */
4519 0, /* properties_required */
4520 0, /* properties_provided */
4521 PROP_rtl, /* properties_destroyed */
4522 0, /* todo_flags_start */
4523 0 /* todo_flags_finish */
4524 }
4525 };