cfgexpand.c (expand_one_var): Use specific wording in error message for non-local...
[gcc.git] / gcc / final.c
1 /* Convert RTL to assembler code and output it, for GNU compiler.
2 Copyright (C) 1987-2018 Free Software Foundation, Inc.
3
4 This file is part of GCC.
5
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
9 version.
10
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
19
20 /* This is the final pass of the compiler.
21 It looks at the rtl code for a function and outputs assembler code.
22
23 Call `final_start_function' to output the assembler code for function entry,
24 `final' to output assembler code for some RTL code,
25 `final_end_function' to output assembler code for function exit.
26 If a function is compiled in several pieces, each piece is
27 output separately with `final'.
28
29 Some optimizations are also done at this level.
30 Move instructions that were made unnecessary by good register allocation
31 are detected and omitted from the output. (Though most of these
32 are removed by the last jump pass.)
33
34 Instructions to set the condition codes are omitted when it can be
35 seen that the condition codes already had the desired values.
36
37 In some cases it is sufficient if the inherited condition codes
38 have related values, but this may require the following insn
39 (the one that tests the condition codes) to be modified.
40
41 The code for the function prologue and epilogue are generated
42 directly in assembler by the target functions function_prologue and
43 function_epilogue. Those instructions never exist as rtl. */
44
45 #include "config.h"
46 #define INCLUDE_ALGORITHM /* reverse */
47 #include "system.h"
48 #include "coretypes.h"
49 #include "backend.h"
50 #include "target.h"
51 #include "rtl.h"
52 #include "tree.h"
53 #include "cfghooks.h"
54 #include "df.h"
55 #include "memmodel.h"
56 #include "tm_p.h"
57 #include "insn-config.h"
58 #include "regs.h"
59 #include "emit-rtl.h"
60 #include "recog.h"
61 #include "cgraph.h"
62 #include "tree-pretty-print.h" /* for dump_function_header */
63 #include "varasm.h"
64 #include "insn-attr.h"
65 #include "conditions.h"
66 #include "flags.h"
67 #include "output.h"
68 #include "except.h"
69 #include "rtl-error.h"
70 #include "toplev.h" /* exact_log2, floor_log2 */
71 #include "reload.h"
72 #include "intl.h"
73 #include "cfgrtl.h"
74 #include "debug.h"
75 #include "tree-pass.h"
76 #include "tree-ssa.h"
77 #include "cfgloop.h"
78 #include "params.h"
79 #include "stringpool.h"
80 #include "attribs.h"
81 #include "asan.h"
82 #include "rtl-iter.h"
83 #include "print-rtl.h"
84
85 #ifdef XCOFF_DEBUGGING_INFO
86 #include "xcoffout.h" /* Needed for external data declarations. */
87 #endif
88
89 #include "dwarf2out.h"
90
91 #ifdef DBX_DEBUGGING_INFO
92 #include "dbxout.h"
93 #endif
94
95 /* Most ports that aren't using cc0 don't need to define CC_STATUS_INIT.
96 So define a null default for it to save conditionalization later. */
97 #ifndef CC_STATUS_INIT
98 #define CC_STATUS_INIT
99 #endif
100
101 /* Is the given character a logical line separator for the assembler? */
102 #ifndef IS_ASM_LOGICAL_LINE_SEPARATOR
103 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == ';')
104 #endif
105
106 #ifndef JUMP_TABLES_IN_TEXT_SECTION
107 #define JUMP_TABLES_IN_TEXT_SECTION 0
108 #endif
109
110 /* Bitflags used by final_scan_insn. */
111 #define SEEN_NOTE 1
112 #define SEEN_EMITTED 2
113 #define SEEN_NEXT_VIEW 4
114
115 /* Last insn processed by final_scan_insn. */
116 static rtx_insn *debug_insn;
117 rtx_insn *current_output_insn;
118
119 /* Line number of last NOTE. */
120 static int last_linenum;
121
122 /* Column number of last NOTE. */
123 static int last_columnnum;
124
125 /* Discriminator written to assembly. */
126 static int last_discriminator;
127
128 /* Discriminator to be written to assembly for current instruction.
129 Note: actual usage depends on loc_discriminator_kind setting. */
130 static int discriminator;
131
132 /* Discriminator identifying current basic block among others sharing
133 the same locus. */
134 static int bb_discriminator;
135
136 /* Basic block discriminator for previous instruction. */
137 static int last_bb_discriminator;
138
139 /* Highest line number in current block. */
140 static int high_block_linenum;
141
142 /* Likewise for function. */
143 static int high_function_linenum;
144
145 /* Filename of last NOTE. */
146 static const char *last_filename;
147
148 /* Override filename, line and column number. */
149 static const char *override_filename;
150 static int override_linenum;
151 static int override_columnnum;
152
153 /* Whether to force emission of a line note before the next insn. */
154 static bool force_source_line = false;
155
156 extern const int length_unit_log; /* This is defined in insn-attrtab.c. */
157
158 /* Nonzero while outputting an `asm' with operands.
159 This means that inconsistencies are the user's fault, so don't die.
160 The precise value is the insn being output, to pass to error_for_asm. */
161 const rtx_insn *this_is_asm_operands;
162
163 /* Number of operands of this insn, for an `asm' with operands. */
164 static unsigned int insn_noperands;
165
166 /* Compare optimization flag. */
167
168 static rtx last_ignored_compare = 0;
169
170 /* Assign a unique number to each insn that is output.
171 This can be used to generate unique local labels. */
172
173 static int insn_counter = 0;
174
175 /* This variable contains machine-dependent flags (defined in tm.h)
176 set and examined by output routines
177 that describe how to interpret the condition codes properly. */
178
179 CC_STATUS cc_status;
180
181 /* During output of an insn, this contains a copy of cc_status
182 from before the insn. */
183
184 CC_STATUS cc_prev_status;
185
186 /* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */
187
188 static int block_depth;
189
190 /* Nonzero if have enabled APP processing of our assembler output. */
191
192 static int app_on;
193
194 /* If we are outputting an insn sequence, this contains the sequence rtx.
195 Zero otherwise. */
196
197 rtx_sequence *final_sequence;
198
199 #ifdef ASSEMBLER_DIALECT
200
201 /* Number of the assembler dialect to use, starting at 0. */
202 static int dialect_number;
203 #endif
204
205 /* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */
206 rtx current_insn_predicate;
207
208 /* True if printing into -fdump-final-insns= dump. */
209 bool final_insns_dump_p;
210
211 /* True if profile_function should be called, but hasn't been called yet. */
212 static bool need_profile_function;
213
214 static int asm_insn_count (rtx);
215 static void profile_function (FILE *);
216 static void profile_after_prologue (FILE *);
217 static bool notice_source_line (rtx_insn *, bool *);
218 static rtx walk_alter_subreg (rtx *, bool *);
219 static void output_asm_name (void);
220 static void output_alternate_entry_point (FILE *, rtx_insn *);
221 static tree get_mem_expr_from_op (rtx, int *);
222 static void output_asm_operand_names (rtx *, int *, int);
223 #ifdef LEAF_REGISTERS
224 static void leaf_renumber_regs (rtx_insn *);
225 #endif
226 #if HAVE_cc0
227 static int alter_cond (rtx);
228 #endif
229 static int align_fuzz (rtx, rtx, int, unsigned);
230 static void collect_fn_hard_reg_usage (void);
231 static tree get_call_fndecl (rtx_insn *);
232 \f
233 /* Initialize data in final at the beginning of a compilation. */
234
235 void
236 init_final (const char *filename ATTRIBUTE_UNUSED)
237 {
238 app_on = 0;
239 final_sequence = 0;
240
241 #ifdef ASSEMBLER_DIALECT
242 dialect_number = ASSEMBLER_DIALECT;
243 #endif
244 }
245
246 /* Default target function prologue and epilogue assembler output.
247
248 If not overridden for epilogue code, then the function body itself
249 contains return instructions wherever needed. */
250 void
251 default_function_pro_epilogue (FILE *)
252 {
253 }
254
255 void
256 default_function_switched_text_sections (FILE *file ATTRIBUTE_UNUSED,
257 tree decl ATTRIBUTE_UNUSED,
258 bool new_is_cold ATTRIBUTE_UNUSED)
259 {
260 }
261
262 /* Default target hook that outputs nothing to a stream. */
263 void
264 no_asm_to_stream (FILE *file ATTRIBUTE_UNUSED)
265 {
266 }
267
268 /* Enable APP processing of subsequent output.
269 Used before the output from an `asm' statement. */
270
271 void
272 app_enable (void)
273 {
274 if (! app_on)
275 {
276 fputs (ASM_APP_ON, asm_out_file);
277 app_on = 1;
278 }
279 }
280
281 /* Disable APP processing of subsequent output.
282 Called from varasm.c before most kinds of output. */
283
284 void
285 app_disable (void)
286 {
287 if (app_on)
288 {
289 fputs (ASM_APP_OFF, asm_out_file);
290 app_on = 0;
291 }
292 }
293 \f
294 /* Return the number of slots filled in the current
295 delayed branch sequence (we don't count the insn needing the
296 delay slot). Zero if not in a delayed branch sequence. */
297
298 int
299 dbr_sequence_length (void)
300 {
301 if (final_sequence != 0)
302 return XVECLEN (final_sequence, 0) - 1;
303 else
304 return 0;
305 }
306 \f
307 /* The next two pages contain routines used to compute the length of an insn
308 and to shorten branches. */
309
310 /* Arrays for insn lengths, and addresses. The latter is referenced by
311 `insn_current_length'. */
312
313 static int *insn_lengths;
314
315 vec<int> insn_addresses_;
316
317 /* Max uid for which the above arrays are valid. */
318 static int insn_lengths_max_uid;
319
320 /* Address of insn being processed. Used by `insn_current_length'. */
321 int insn_current_address;
322
323 /* Address of insn being processed in previous iteration. */
324 int insn_last_address;
325
326 /* known invariant alignment of insn being processed. */
327 int insn_current_align;
328
329 /* After shorten_branches, for any insn, uid_align[INSN_UID (insn)]
330 gives the next following alignment insn that increases the known
331 alignment, or NULL_RTX if there is no such insn.
332 For any alignment obtained this way, we can again index uid_align with
333 its uid to obtain the next following align that in turn increases the
334 alignment, till we reach NULL_RTX; the sequence obtained this way
335 for each insn we'll call the alignment chain of this insn in the following
336 comments. */
337
338 static rtx *uid_align;
339 static int *uid_shuid;
340 static vec<align_flags> label_align;
341
342 /* Indicate that branch shortening hasn't yet been done. */
343
344 void
345 init_insn_lengths (void)
346 {
347 if (uid_shuid)
348 {
349 free (uid_shuid);
350 uid_shuid = 0;
351 }
352 if (insn_lengths)
353 {
354 free (insn_lengths);
355 insn_lengths = 0;
356 insn_lengths_max_uid = 0;
357 }
358 if (HAVE_ATTR_length)
359 INSN_ADDRESSES_FREE ();
360 if (uid_align)
361 {
362 free (uid_align);
363 uid_align = 0;
364 }
365 }
366
367 /* Obtain the current length of an insn. If branch shortening has been done,
368 get its actual length. Otherwise, use FALLBACK_FN to calculate the
369 length. */
370 static int
371 get_attr_length_1 (rtx_insn *insn, int (*fallback_fn) (rtx_insn *))
372 {
373 rtx body;
374 int i;
375 int length = 0;
376
377 if (!HAVE_ATTR_length)
378 return 0;
379
380 if (insn_lengths_max_uid > INSN_UID (insn))
381 return insn_lengths[INSN_UID (insn)];
382 else
383 switch (GET_CODE (insn))
384 {
385 case NOTE:
386 case BARRIER:
387 case CODE_LABEL:
388 case DEBUG_INSN:
389 return 0;
390
391 case CALL_INSN:
392 case JUMP_INSN:
393 length = fallback_fn (insn);
394 break;
395
396 case INSN:
397 body = PATTERN (insn);
398 if (GET_CODE (body) == USE || GET_CODE (body) == CLOBBER)
399 return 0;
400
401 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
402 length = asm_insn_count (body) * fallback_fn (insn);
403 else if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (body))
404 for (i = 0; i < seq->len (); i++)
405 length += get_attr_length_1 (seq->insn (i), fallback_fn);
406 else
407 length = fallback_fn (insn);
408 break;
409
410 default:
411 break;
412 }
413
414 #ifdef ADJUST_INSN_LENGTH
415 ADJUST_INSN_LENGTH (insn, length);
416 #endif
417 return length;
418 }
419
420 /* Obtain the current length of an insn. If branch shortening has been done,
421 get its actual length. Otherwise, get its maximum length. */
422 int
423 get_attr_length (rtx_insn *insn)
424 {
425 return get_attr_length_1 (insn, insn_default_length);
426 }
427
428 /* Obtain the current length of an insn. If branch shortening has been done,
429 get its actual length. Otherwise, get its minimum length. */
430 int
431 get_attr_min_length (rtx_insn *insn)
432 {
433 return get_attr_length_1 (insn, insn_min_length);
434 }
435 \f
436 /* Code to handle alignment inside shorten_branches. */
437
438 /* Here is an explanation how the algorithm in align_fuzz can give
439 proper results:
440
441 Call a sequence of instructions beginning with alignment point X
442 and continuing until the next alignment point `block X'. When `X'
443 is used in an expression, it means the alignment value of the
444 alignment point.
445
446 Call the distance between the start of the first insn of block X, and
447 the end of the last insn of block X `IX', for the `inner size of X'.
448 This is clearly the sum of the instruction lengths.
449
450 Likewise with the next alignment-delimited block following X, which we
451 shall call block Y.
452
453 Call the distance between the start of the first insn of block X, and
454 the start of the first insn of block Y `OX', for the `outer size of X'.
455
456 The estimated padding is then OX - IX.
457
458 OX can be safely estimated as
459
460 if (X >= Y)
461 OX = round_up(IX, Y)
462 else
463 OX = round_up(IX, X) + Y - X
464
465 Clearly est(IX) >= real(IX), because that only depends on the
466 instruction lengths, and those being overestimated is a given.
467
468 Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so
469 we needn't worry about that when thinking about OX.
470
471 When X >= Y, the alignment provided by Y adds no uncertainty factor
472 for branch ranges starting before X, so we can just round what we have.
473 But when X < Y, we don't know anything about the, so to speak,
474 `middle bits', so we have to assume the worst when aligning up from an
475 address mod X to one mod Y, which is Y - X. */
476
477 #ifndef LABEL_ALIGN
478 #define LABEL_ALIGN(LABEL) align_labels
479 #endif
480
481 #ifndef LOOP_ALIGN
482 #define LOOP_ALIGN(LABEL) align_loops
483 #endif
484
485 #ifndef LABEL_ALIGN_AFTER_BARRIER
486 #define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0
487 #endif
488
489 #ifndef JUMP_ALIGN
490 #define JUMP_ALIGN(LABEL) align_jumps
491 #endif
492
493 #ifndef ADDR_VEC_ALIGN
494 static int
495 final_addr_vec_align (rtx_jump_table_data *addr_vec)
496 {
497 int align = GET_MODE_SIZE (addr_vec->get_data_mode ());
498
499 if (align > BIGGEST_ALIGNMENT / BITS_PER_UNIT)
500 align = BIGGEST_ALIGNMENT / BITS_PER_UNIT;
501 return exact_log2 (align);
502
503 }
504
505 #define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC)
506 #endif
507
508 #ifndef INSN_LENGTH_ALIGNMENT
509 #define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log
510 #endif
511
512 #define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)])
513
514 static int min_labelno, max_labelno;
515
516 #define LABEL_TO_ALIGNMENT(LABEL) \
517 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno])
518
519 /* For the benefit of port specific code do this also as a function. */
520
521 align_flags
522 label_to_alignment (rtx label)
523 {
524 if (CODE_LABEL_NUMBER (label) <= max_labelno)
525 return LABEL_TO_ALIGNMENT (label);
526 return align_flags ();
527 }
528
529 /* The differences in addresses
530 between a branch and its target might grow or shrink depending on
531 the alignment the start insn of the range (the branch for a forward
532 branch or the label for a backward branch) starts out on; if these
533 differences are used naively, they can even oscillate infinitely.
534 We therefore want to compute a 'worst case' address difference that
535 is independent of the alignment the start insn of the range end
536 up on, and that is at least as large as the actual difference.
537 The function align_fuzz calculates the amount we have to add to the
538 naively computed difference, by traversing the part of the alignment
539 chain of the start insn of the range that is in front of the end insn
540 of the range, and considering for each alignment the maximum amount
541 that it might contribute to a size increase.
542
543 For casesi tables, we also want to know worst case minimum amounts of
544 address difference, in case a machine description wants to introduce
545 some common offset that is added to all offsets in a table.
546 For this purpose, align_fuzz with a growth argument of 0 computes the
547 appropriate adjustment. */
548
549 /* Compute the maximum delta by which the difference of the addresses of
550 START and END might grow / shrink due to a different address for start
551 which changes the size of alignment insns between START and END.
552 KNOWN_ALIGN_LOG is the alignment known for START.
553 GROWTH should be ~0 if the objective is to compute potential code size
554 increase, and 0 if the objective is to compute potential shrink.
555 The return value is undefined for any other value of GROWTH. */
556
557 static int
558 align_fuzz (rtx start, rtx end, int known_align_log, unsigned int growth)
559 {
560 int uid = INSN_UID (start);
561 rtx align_label;
562 int known_align = 1 << known_align_log;
563 int end_shuid = INSN_SHUID (end);
564 int fuzz = 0;
565
566 for (align_label = uid_align[uid]; align_label; align_label = uid_align[uid])
567 {
568 int align_addr, new_align;
569
570 uid = INSN_UID (align_label);
571 align_addr = INSN_ADDRESSES (uid) - insn_lengths[uid];
572 if (uid_shuid[uid] > end_shuid)
573 break;
574 align_flags alignment = LABEL_TO_ALIGNMENT (align_label);
575 new_align = 1 << alignment.levels[0].log;
576 if (new_align < known_align)
577 continue;
578 fuzz += (-align_addr ^ growth) & (new_align - known_align);
579 known_align = new_align;
580 }
581 return fuzz;
582 }
583
584 /* Compute a worst-case reference address of a branch so that it
585 can be safely used in the presence of aligned labels. Since the
586 size of the branch itself is unknown, the size of the branch is
587 not included in the range. I.e. for a forward branch, the reference
588 address is the end address of the branch as known from the previous
589 branch shortening pass, minus a value to account for possible size
590 increase due to alignment. For a backward branch, it is the start
591 address of the branch as known from the current pass, plus a value
592 to account for possible size increase due to alignment.
593 NB.: Therefore, the maximum offset allowed for backward branches needs
594 to exclude the branch size. */
595
596 int
597 insn_current_reference_address (rtx_insn *branch)
598 {
599 rtx dest;
600 int seq_uid;
601
602 if (! INSN_ADDRESSES_SET_P ())
603 return 0;
604
605 rtx_insn *seq = NEXT_INSN (PREV_INSN (branch));
606 seq_uid = INSN_UID (seq);
607 if (!JUMP_P (branch))
608 /* This can happen for example on the PA; the objective is to know the
609 offset to address something in front of the start of the function.
610 Thus, we can treat it like a backward branch.
611 We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than
612 any alignment we'd encounter, so we skip the call to align_fuzz. */
613 return insn_current_address;
614 dest = JUMP_LABEL (branch);
615
616 /* BRANCH has no proper alignment chain set, so use SEQ.
617 BRANCH also has no INSN_SHUID. */
618 if (INSN_SHUID (seq) < INSN_SHUID (dest))
619 {
620 /* Forward branch. */
621 return (insn_last_address + insn_lengths[seq_uid]
622 - align_fuzz (seq, dest, length_unit_log, ~0));
623 }
624 else
625 {
626 /* Backward branch. */
627 return (insn_current_address
628 + align_fuzz (dest, seq, length_unit_log, ~0));
629 }
630 }
631 \f
632 /* Compute branch alignments based on CFG profile. */
633
634 unsigned int
635 compute_alignments (void)
636 {
637 basic_block bb;
638 align_flags max_alignment;
639
640 label_align.truncate (0);
641
642 max_labelno = max_label_num ();
643 min_labelno = get_first_label_num ();
644 label_align.safe_grow_cleared (max_labelno - min_labelno + 1);
645
646 /* If not optimizing or optimizing for size, don't assign any alignments. */
647 if (! optimize || optimize_function_for_size_p (cfun))
648 return 0;
649
650 if (dump_file)
651 {
652 dump_reg_info (dump_file);
653 dump_flow_info (dump_file, TDF_DETAILS);
654 flow_loops_dump (dump_file, NULL, 1);
655 }
656 loop_optimizer_init (AVOID_CFG_MODIFICATIONS);
657 profile_count count_threshold = cfun->cfg->count_max.apply_scale
658 (1, PARAM_VALUE (PARAM_ALIGN_THRESHOLD));
659
660 if (dump_file)
661 {
662 fprintf (dump_file, "count_max: ");
663 cfun->cfg->count_max.dump (dump_file);
664 fprintf (dump_file, "\n");
665 }
666 FOR_EACH_BB_FN (bb, cfun)
667 {
668 rtx_insn *label = BB_HEAD (bb);
669 bool has_fallthru = 0;
670 edge e;
671 edge_iterator ei;
672
673 if (!LABEL_P (label)
674 || optimize_bb_for_size_p (bb))
675 {
676 if (dump_file)
677 fprintf (dump_file,
678 "BB %4i loop %2i loop_depth %2i skipped.\n",
679 bb->index,
680 bb->loop_father->num,
681 bb_loop_depth (bb));
682 continue;
683 }
684 max_alignment = LABEL_ALIGN (label);
685 profile_count fallthru_count = profile_count::zero ();
686 profile_count branch_count = profile_count::zero ();
687
688 FOR_EACH_EDGE (e, ei, bb->preds)
689 {
690 if (e->flags & EDGE_FALLTHRU)
691 has_fallthru = 1, fallthru_count += e->count ();
692 else
693 branch_count += e->count ();
694 }
695 if (dump_file)
696 {
697 fprintf (dump_file, "BB %4i loop %2i loop_depth"
698 " %2i fall ",
699 bb->index, bb->loop_father->num,
700 bb_loop_depth (bb));
701 fallthru_count.dump (dump_file);
702 fprintf (dump_file, " branch ");
703 branch_count.dump (dump_file);
704 if (!bb->loop_father->inner && bb->loop_father->num)
705 fprintf (dump_file, " inner_loop");
706 if (bb->loop_father->header == bb)
707 fprintf (dump_file, " loop_header");
708 fprintf (dump_file, "\n");
709 }
710 if (!fallthru_count.initialized_p () || !branch_count.initialized_p ())
711 continue;
712
713 /* There are two purposes to align block with no fallthru incoming edge:
714 1) to avoid fetch stalls when branch destination is near cache boundary
715 2) to improve cache efficiency in case the previous block is not executed
716 (so it does not need to be in the cache).
717
718 We to catch first case, we align frequently executed blocks.
719 To catch the second, we align blocks that are executed more frequently
720 than the predecessor and the predecessor is likely to not be executed
721 when function is called. */
722
723 if (!has_fallthru
724 && (branch_count > count_threshold
725 || (bb->count > bb->prev_bb->count.apply_scale (10, 1)
726 && (bb->prev_bb->count
727 <= ENTRY_BLOCK_PTR_FOR_FN (cfun)
728 ->count.apply_scale (1, 2)))))
729 {
730 align_flags alignment = JUMP_ALIGN (label);
731 if (dump_file)
732 fprintf (dump_file, " jump alignment added.\n");
733 max_alignment = align_flags::max (max_alignment, alignment);
734 }
735 /* In case block is frequent and reached mostly by non-fallthru edge,
736 align it. It is most likely a first block of loop. */
737 if (has_fallthru
738 && !(single_succ_p (bb)
739 && single_succ (bb) == EXIT_BLOCK_PTR_FOR_FN (cfun))
740 && optimize_bb_for_speed_p (bb)
741 && branch_count + fallthru_count > count_threshold
742 && (branch_count
743 > fallthru_count.apply_scale
744 (PARAM_VALUE (PARAM_ALIGN_LOOP_ITERATIONS), 1)))
745 {
746 align_flags alignment = LOOP_ALIGN (label);
747 if (dump_file)
748 fprintf (dump_file, " internal loop alignment added.\n");
749 max_alignment = align_flags::max (max_alignment, alignment);
750 }
751 LABEL_TO_ALIGNMENT (label) = max_alignment;
752 }
753
754 loop_optimizer_finalize ();
755 free_dominance_info (CDI_DOMINATORS);
756 return 0;
757 }
758
759 /* Grow the LABEL_ALIGN array after new labels are created. */
760
761 static void
762 grow_label_align (void)
763 {
764 int old = max_labelno;
765 int n_labels;
766 int n_old_labels;
767
768 max_labelno = max_label_num ();
769
770 n_labels = max_labelno - min_labelno + 1;
771 n_old_labels = old - min_labelno + 1;
772
773 label_align.safe_grow_cleared (n_labels);
774
775 /* Range of labels grows monotonically in the function. Failing here
776 means that the initialization of array got lost. */
777 gcc_assert (n_old_labels <= n_labels);
778 }
779
780 /* Update the already computed alignment information. LABEL_PAIRS is a vector
781 made up of pairs of labels for which the alignment information of the first
782 element will be copied from that of the second element. */
783
784 void
785 update_alignments (vec<rtx> &label_pairs)
786 {
787 unsigned int i = 0;
788 rtx iter, label = NULL_RTX;
789
790 if (max_labelno != max_label_num ())
791 grow_label_align ();
792
793 FOR_EACH_VEC_ELT (label_pairs, i, iter)
794 if (i & 1)
795 LABEL_TO_ALIGNMENT (label) = LABEL_TO_ALIGNMENT (iter);
796 else
797 label = iter;
798 }
799
800 namespace {
801
802 const pass_data pass_data_compute_alignments =
803 {
804 RTL_PASS, /* type */
805 "alignments", /* name */
806 OPTGROUP_NONE, /* optinfo_flags */
807 TV_NONE, /* tv_id */
808 0, /* properties_required */
809 0, /* properties_provided */
810 0, /* properties_destroyed */
811 0, /* todo_flags_start */
812 0, /* todo_flags_finish */
813 };
814
815 class pass_compute_alignments : public rtl_opt_pass
816 {
817 public:
818 pass_compute_alignments (gcc::context *ctxt)
819 : rtl_opt_pass (pass_data_compute_alignments, ctxt)
820 {}
821
822 /* opt_pass methods: */
823 virtual unsigned int execute (function *) { return compute_alignments (); }
824
825 }; // class pass_compute_alignments
826
827 } // anon namespace
828
829 rtl_opt_pass *
830 make_pass_compute_alignments (gcc::context *ctxt)
831 {
832 return new pass_compute_alignments (ctxt);
833 }
834
835 \f
836 /* Make a pass over all insns and compute their actual lengths by shortening
837 any branches of variable length if possible. */
838
839 /* shorten_branches might be called multiple times: for example, the SH
840 port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG.
841 In order to do this, it needs proper length information, which it obtains
842 by calling shorten_branches. This cannot be collapsed with
843 shorten_branches itself into a single pass unless we also want to integrate
844 reorg.c, since the branch splitting exposes new instructions with delay
845 slots. */
846
847 void
848 shorten_branches (rtx_insn *first)
849 {
850 rtx_insn *insn;
851 int max_uid;
852 int i;
853 rtx_insn *seq;
854 int something_changed = 1;
855 char *varying_length;
856 rtx body;
857 int uid;
858 rtx align_tab[MAX_CODE_ALIGN + 1];
859
860 /* Compute maximum UID and allocate label_align / uid_shuid. */
861 max_uid = get_max_uid ();
862
863 /* Free uid_shuid before reallocating it. */
864 free (uid_shuid);
865
866 uid_shuid = XNEWVEC (int, max_uid);
867
868 if (max_labelno != max_label_num ())
869 grow_label_align ();
870
871 /* Initialize label_align and set up uid_shuid to be strictly
872 monotonically rising with insn order. */
873 /* We use alignment here to keep track of the maximum alignment we want to
874 impose on the next CODE_LABEL (or the current one if we are processing
875 the CODE_LABEL itself). */
876
877 align_flags max_alignment;
878
879 for (insn = get_insns (), i = 1; insn; insn = NEXT_INSN (insn))
880 {
881 INSN_SHUID (insn) = i++;
882 if (INSN_P (insn))
883 continue;
884
885 if (rtx_code_label *label = dyn_cast <rtx_code_label *> (insn))
886 {
887 /* Merge in alignments computed by compute_alignments. */
888 align_flags alignment = LABEL_TO_ALIGNMENT (label);
889 max_alignment = align_flags::max (max_alignment, alignment);
890
891 rtx_jump_table_data *table = jump_table_for_label (label);
892 if (!table)
893 {
894 align_flags alignment = LABEL_ALIGN (label);
895 max_alignment = align_flags::max (max_alignment, alignment);
896 }
897 /* ADDR_VECs only take room if read-only data goes into the text
898 section. */
899 if ((JUMP_TABLES_IN_TEXT_SECTION
900 || readonly_data_section == text_section)
901 && table)
902 {
903 align_flags alignment = align_flags (ADDR_VEC_ALIGN (table));
904 max_alignment = align_flags::max (max_alignment, alignment);
905 }
906 LABEL_TO_ALIGNMENT (label) = max_alignment;
907 max_alignment = align_flags ();
908 }
909 else if (BARRIER_P (insn))
910 {
911 rtx_insn *label;
912
913 for (label = insn; label && ! INSN_P (label);
914 label = NEXT_INSN (label))
915 if (LABEL_P (label))
916 {
917 align_flags alignment
918 = align_flags (LABEL_ALIGN_AFTER_BARRIER (insn));
919 max_alignment = align_flags::max (max_alignment, alignment);
920 break;
921 }
922 }
923 }
924 if (!HAVE_ATTR_length)
925 return;
926
927 /* Allocate the rest of the arrays. */
928 insn_lengths = XNEWVEC (int, max_uid);
929 insn_lengths_max_uid = max_uid;
930 /* Syntax errors can lead to labels being outside of the main insn stream.
931 Initialize insn_addresses, so that we get reproducible results. */
932 INSN_ADDRESSES_ALLOC (max_uid);
933
934 varying_length = XCNEWVEC (char, max_uid);
935
936 /* Initialize uid_align. We scan instructions
937 from end to start, and keep in align_tab[n] the last seen insn
938 that does an alignment of at least n+1, i.e. the successor
939 in the alignment chain for an insn that does / has a known
940 alignment of n. */
941 uid_align = XCNEWVEC (rtx, max_uid);
942
943 for (i = MAX_CODE_ALIGN + 1; --i >= 0;)
944 align_tab[i] = NULL_RTX;
945 seq = get_last_insn ();
946 for (; seq; seq = PREV_INSN (seq))
947 {
948 int uid = INSN_UID (seq);
949 int log;
950 log = (LABEL_P (seq) ? LABEL_TO_ALIGNMENT (seq).levels[0].log : 0);
951 uid_align[uid] = align_tab[0];
952 if (log)
953 {
954 /* Found an alignment label. */
955 gcc_checking_assert (log < MAX_CODE_ALIGN + 1);
956 uid_align[uid] = align_tab[log];
957 for (i = log - 1; i >= 0; i--)
958 align_tab[i] = seq;
959 }
960 }
961
962 /* When optimizing, we start assuming minimum length, and keep increasing
963 lengths as we find the need for this, till nothing changes.
964 When not optimizing, we start assuming maximum lengths, and
965 do a single pass to update the lengths. */
966 bool increasing = optimize != 0;
967
968 #ifdef CASE_VECTOR_SHORTEN_MODE
969 if (optimize)
970 {
971 /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum
972 label fields. */
973
974 int min_shuid = INSN_SHUID (get_insns ()) - 1;
975 int max_shuid = INSN_SHUID (get_last_insn ()) + 1;
976 int rel;
977
978 for (insn = first; insn != 0; insn = NEXT_INSN (insn))
979 {
980 rtx min_lab = NULL_RTX, max_lab = NULL_RTX, pat;
981 int len, i, min, max, insn_shuid;
982 int min_align;
983 addr_diff_vec_flags flags;
984
985 if (! JUMP_TABLE_DATA_P (insn)
986 || GET_CODE (PATTERN (insn)) != ADDR_DIFF_VEC)
987 continue;
988 pat = PATTERN (insn);
989 len = XVECLEN (pat, 1);
990 gcc_assert (len > 0);
991 min_align = MAX_CODE_ALIGN;
992 for (min = max_shuid, max = min_shuid, i = len - 1; i >= 0; i--)
993 {
994 rtx lab = XEXP (XVECEXP (pat, 1, i), 0);
995 int shuid = INSN_SHUID (lab);
996 if (shuid < min)
997 {
998 min = shuid;
999 min_lab = lab;
1000 }
1001 if (shuid > max)
1002 {
1003 max = shuid;
1004 max_lab = lab;
1005 }
1006
1007 int label_alignment = LABEL_TO_ALIGNMENT (lab).levels[0].log;
1008 if (min_align > label_alignment)
1009 min_align = label_alignment;
1010 }
1011 XEXP (pat, 2) = gen_rtx_LABEL_REF (Pmode, min_lab);
1012 XEXP (pat, 3) = gen_rtx_LABEL_REF (Pmode, max_lab);
1013 insn_shuid = INSN_SHUID (insn);
1014 rel = INSN_SHUID (XEXP (XEXP (pat, 0), 0));
1015 memset (&flags, 0, sizeof (flags));
1016 flags.min_align = min_align;
1017 flags.base_after_vec = rel > insn_shuid;
1018 flags.min_after_vec = min > insn_shuid;
1019 flags.max_after_vec = max > insn_shuid;
1020 flags.min_after_base = min > rel;
1021 flags.max_after_base = max > rel;
1022 ADDR_DIFF_VEC_FLAGS (pat) = flags;
1023
1024 if (increasing)
1025 PUT_MODE (pat, CASE_VECTOR_SHORTEN_MODE (0, 0, pat));
1026 }
1027 }
1028 #endif /* CASE_VECTOR_SHORTEN_MODE */
1029
1030 /* Compute initial lengths, addresses, and varying flags for each insn. */
1031 int (*length_fun) (rtx_insn *) = increasing ? insn_min_length : insn_default_length;
1032
1033 for (insn_current_address = 0, insn = first;
1034 insn != 0;
1035 insn_current_address += insn_lengths[uid], insn = NEXT_INSN (insn))
1036 {
1037 uid = INSN_UID (insn);
1038
1039 insn_lengths[uid] = 0;
1040
1041 if (LABEL_P (insn))
1042 {
1043 int log = LABEL_TO_ALIGNMENT (insn).levels[0].log;
1044 if (log)
1045 {
1046 int align = 1 << log;
1047 int new_address = (insn_current_address + align - 1) & -align;
1048 insn_lengths[uid] = new_address - insn_current_address;
1049 }
1050 }
1051
1052 INSN_ADDRESSES (uid) = insn_current_address + insn_lengths[uid];
1053
1054 if (NOTE_P (insn) || BARRIER_P (insn)
1055 || LABEL_P (insn) || DEBUG_INSN_P (insn))
1056 continue;
1057 if (insn->deleted ())
1058 continue;
1059
1060 body = PATTERN (insn);
1061 if (rtx_jump_table_data *table = dyn_cast <rtx_jump_table_data *> (insn))
1062 {
1063 /* This only takes room if read-only data goes into the text
1064 section. */
1065 if (JUMP_TABLES_IN_TEXT_SECTION
1066 || readonly_data_section == text_section)
1067 insn_lengths[uid] = (XVECLEN (body,
1068 GET_CODE (body) == ADDR_DIFF_VEC)
1069 * GET_MODE_SIZE (table->get_data_mode ()));
1070 /* Alignment is handled by ADDR_VEC_ALIGN. */
1071 }
1072 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
1073 insn_lengths[uid] = asm_insn_count (body) * insn_default_length (insn);
1074 else if (rtx_sequence *body_seq = dyn_cast <rtx_sequence *> (body))
1075 {
1076 int i;
1077 int const_delay_slots;
1078 if (DELAY_SLOTS)
1079 const_delay_slots = const_num_delay_slots (body_seq->insn (0));
1080 else
1081 const_delay_slots = 0;
1082
1083 int (*inner_length_fun) (rtx_insn *)
1084 = const_delay_slots ? length_fun : insn_default_length;
1085 /* Inside a delay slot sequence, we do not do any branch shortening
1086 if the shortening could change the number of delay slots
1087 of the branch. */
1088 for (i = 0; i < body_seq->len (); i++)
1089 {
1090 rtx_insn *inner_insn = body_seq->insn (i);
1091 int inner_uid = INSN_UID (inner_insn);
1092 int inner_length;
1093
1094 if (GET_CODE (PATTERN (inner_insn)) == ASM_INPUT
1095 || asm_noperands (PATTERN (inner_insn)) >= 0)
1096 inner_length = (asm_insn_count (PATTERN (inner_insn))
1097 * insn_default_length (inner_insn));
1098 else
1099 inner_length = inner_length_fun (inner_insn);
1100
1101 insn_lengths[inner_uid] = inner_length;
1102 if (const_delay_slots)
1103 {
1104 if ((varying_length[inner_uid]
1105 = insn_variable_length_p (inner_insn)) != 0)
1106 varying_length[uid] = 1;
1107 INSN_ADDRESSES (inner_uid) = (insn_current_address
1108 + insn_lengths[uid]);
1109 }
1110 else
1111 varying_length[inner_uid] = 0;
1112 insn_lengths[uid] += inner_length;
1113 }
1114 }
1115 else if (GET_CODE (body) != USE && GET_CODE (body) != CLOBBER)
1116 {
1117 insn_lengths[uid] = length_fun (insn);
1118 varying_length[uid] = insn_variable_length_p (insn);
1119 }
1120
1121 /* If needed, do any adjustment. */
1122 #ifdef ADJUST_INSN_LENGTH
1123 ADJUST_INSN_LENGTH (insn, insn_lengths[uid]);
1124 if (insn_lengths[uid] < 0)
1125 fatal_insn ("negative insn length", insn);
1126 #endif
1127 }
1128
1129 /* Now loop over all the insns finding varying length insns. For each,
1130 get the current insn length. If it has changed, reflect the change.
1131 When nothing changes for a full pass, we are done. */
1132
1133 while (something_changed)
1134 {
1135 something_changed = 0;
1136 insn_current_align = MAX_CODE_ALIGN - 1;
1137 for (insn_current_address = 0, insn = first;
1138 insn != 0;
1139 insn = NEXT_INSN (insn))
1140 {
1141 int new_length;
1142 #ifdef ADJUST_INSN_LENGTH
1143 int tmp_length;
1144 #endif
1145 int length_align;
1146
1147 uid = INSN_UID (insn);
1148
1149 if (rtx_code_label *label = dyn_cast <rtx_code_label *> (insn))
1150 {
1151 int log = LABEL_TO_ALIGNMENT (label).levels[0].log;
1152
1153 #ifdef CASE_VECTOR_SHORTEN_MODE
1154 /* If the mode of a following jump table was changed, we
1155 may need to update the alignment of this label. */
1156
1157 if (JUMP_TABLES_IN_TEXT_SECTION
1158 || readonly_data_section == text_section)
1159 {
1160 rtx_jump_table_data *table = jump_table_for_label (label);
1161 if (table)
1162 {
1163 int newlog = ADDR_VEC_ALIGN (table);
1164 if (newlog != log)
1165 {
1166 log = newlog;
1167 LABEL_TO_ALIGNMENT (insn) = log;
1168 something_changed = 1;
1169 }
1170 }
1171 }
1172 #endif
1173
1174 if (log > insn_current_align)
1175 {
1176 int align = 1 << log;
1177 int new_address= (insn_current_address + align - 1) & -align;
1178 insn_lengths[uid] = new_address - insn_current_address;
1179 insn_current_align = log;
1180 insn_current_address = new_address;
1181 }
1182 else
1183 insn_lengths[uid] = 0;
1184 INSN_ADDRESSES (uid) = insn_current_address;
1185 continue;
1186 }
1187
1188 length_align = INSN_LENGTH_ALIGNMENT (insn);
1189 if (length_align < insn_current_align)
1190 insn_current_align = length_align;
1191
1192 insn_last_address = INSN_ADDRESSES (uid);
1193 INSN_ADDRESSES (uid) = insn_current_address;
1194
1195 #ifdef CASE_VECTOR_SHORTEN_MODE
1196 if (optimize
1197 && JUMP_TABLE_DATA_P (insn)
1198 && GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
1199 {
1200 rtx_jump_table_data *table = as_a <rtx_jump_table_data *> (insn);
1201 rtx body = PATTERN (insn);
1202 int old_length = insn_lengths[uid];
1203 rtx_insn *rel_lab =
1204 safe_as_a <rtx_insn *> (XEXP (XEXP (body, 0), 0));
1205 rtx min_lab = XEXP (XEXP (body, 2), 0);
1206 rtx max_lab = XEXP (XEXP (body, 3), 0);
1207 int rel_addr = INSN_ADDRESSES (INSN_UID (rel_lab));
1208 int min_addr = INSN_ADDRESSES (INSN_UID (min_lab));
1209 int max_addr = INSN_ADDRESSES (INSN_UID (max_lab));
1210 rtx_insn *prev;
1211 int rel_align = 0;
1212 addr_diff_vec_flags flags;
1213 scalar_int_mode vec_mode;
1214
1215 /* Avoid automatic aggregate initialization. */
1216 flags = ADDR_DIFF_VEC_FLAGS (body);
1217
1218 /* Try to find a known alignment for rel_lab. */
1219 for (prev = rel_lab;
1220 prev
1221 && ! insn_lengths[INSN_UID (prev)]
1222 && ! (varying_length[INSN_UID (prev)] & 1);
1223 prev = PREV_INSN (prev))
1224 if (varying_length[INSN_UID (prev)] & 2)
1225 {
1226 rel_align = LABEL_TO_ALIGNMENT (prev).levels[0].log;
1227 break;
1228 }
1229
1230 /* See the comment on addr_diff_vec_flags in rtl.h for the
1231 meaning of the flags values. base: REL_LAB vec: INSN */
1232 /* Anything after INSN has still addresses from the last
1233 pass; adjust these so that they reflect our current
1234 estimate for this pass. */
1235 if (flags.base_after_vec)
1236 rel_addr += insn_current_address - insn_last_address;
1237 if (flags.min_after_vec)
1238 min_addr += insn_current_address - insn_last_address;
1239 if (flags.max_after_vec)
1240 max_addr += insn_current_address - insn_last_address;
1241 /* We want to know the worst case, i.e. lowest possible value
1242 for the offset of MIN_LAB. If MIN_LAB is after REL_LAB,
1243 its offset is positive, and we have to be wary of code shrink;
1244 otherwise, it is negative, and we have to be vary of code
1245 size increase. */
1246 if (flags.min_after_base)
1247 {
1248 /* If INSN is between REL_LAB and MIN_LAB, the size
1249 changes we are about to make can change the alignment
1250 within the observed offset, therefore we have to break
1251 it up into two parts that are independent. */
1252 if (! flags.base_after_vec && flags.min_after_vec)
1253 {
1254 min_addr -= align_fuzz (rel_lab, insn, rel_align, 0);
1255 min_addr -= align_fuzz (insn, min_lab, 0, 0);
1256 }
1257 else
1258 min_addr -= align_fuzz (rel_lab, min_lab, rel_align, 0);
1259 }
1260 else
1261 {
1262 if (flags.base_after_vec && ! flags.min_after_vec)
1263 {
1264 min_addr -= align_fuzz (min_lab, insn, 0, ~0);
1265 min_addr -= align_fuzz (insn, rel_lab, 0, ~0);
1266 }
1267 else
1268 min_addr -= align_fuzz (min_lab, rel_lab, 0, ~0);
1269 }
1270 /* Likewise, determine the highest lowest possible value
1271 for the offset of MAX_LAB. */
1272 if (flags.max_after_base)
1273 {
1274 if (! flags.base_after_vec && flags.max_after_vec)
1275 {
1276 max_addr += align_fuzz (rel_lab, insn, rel_align, ~0);
1277 max_addr += align_fuzz (insn, max_lab, 0, ~0);
1278 }
1279 else
1280 max_addr += align_fuzz (rel_lab, max_lab, rel_align, ~0);
1281 }
1282 else
1283 {
1284 if (flags.base_after_vec && ! flags.max_after_vec)
1285 {
1286 max_addr += align_fuzz (max_lab, insn, 0, 0);
1287 max_addr += align_fuzz (insn, rel_lab, 0, 0);
1288 }
1289 else
1290 max_addr += align_fuzz (max_lab, rel_lab, 0, 0);
1291 }
1292 vec_mode = CASE_VECTOR_SHORTEN_MODE (min_addr - rel_addr,
1293 max_addr - rel_addr, body);
1294 if (!increasing
1295 || (GET_MODE_SIZE (vec_mode)
1296 >= GET_MODE_SIZE (table->get_data_mode ())))
1297 PUT_MODE (body, vec_mode);
1298 if (JUMP_TABLES_IN_TEXT_SECTION
1299 || readonly_data_section == text_section)
1300 {
1301 insn_lengths[uid]
1302 = (XVECLEN (body, 1)
1303 * GET_MODE_SIZE (table->get_data_mode ()));
1304 insn_current_address += insn_lengths[uid];
1305 if (insn_lengths[uid] != old_length)
1306 something_changed = 1;
1307 }
1308
1309 continue;
1310 }
1311 #endif /* CASE_VECTOR_SHORTEN_MODE */
1312
1313 if (! (varying_length[uid]))
1314 {
1315 if (NONJUMP_INSN_P (insn)
1316 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1317 {
1318 int i;
1319
1320 body = PATTERN (insn);
1321 for (i = 0; i < XVECLEN (body, 0); i++)
1322 {
1323 rtx inner_insn = XVECEXP (body, 0, i);
1324 int inner_uid = INSN_UID (inner_insn);
1325
1326 INSN_ADDRESSES (inner_uid) = insn_current_address;
1327
1328 insn_current_address += insn_lengths[inner_uid];
1329 }
1330 }
1331 else
1332 insn_current_address += insn_lengths[uid];
1333
1334 continue;
1335 }
1336
1337 if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
1338 {
1339 rtx_sequence *seqn = as_a <rtx_sequence *> (PATTERN (insn));
1340 int i;
1341
1342 body = PATTERN (insn);
1343 new_length = 0;
1344 for (i = 0; i < seqn->len (); i++)
1345 {
1346 rtx_insn *inner_insn = seqn->insn (i);
1347 int inner_uid = INSN_UID (inner_insn);
1348 int inner_length;
1349
1350 INSN_ADDRESSES (inner_uid) = insn_current_address;
1351
1352 /* insn_current_length returns 0 for insns with a
1353 non-varying length. */
1354 if (! varying_length[inner_uid])
1355 inner_length = insn_lengths[inner_uid];
1356 else
1357 inner_length = insn_current_length (inner_insn);
1358
1359 if (inner_length != insn_lengths[inner_uid])
1360 {
1361 if (!increasing || inner_length > insn_lengths[inner_uid])
1362 {
1363 insn_lengths[inner_uid] = inner_length;
1364 something_changed = 1;
1365 }
1366 else
1367 inner_length = insn_lengths[inner_uid];
1368 }
1369 insn_current_address += inner_length;
1370 new_length += inner_length;
1371 }
1372 }
1373 else
1374 {
1375 new_length = insn_current_length (insn);
1376 insn_current_address += new_length;
1377 }
1378
1379 #ifdef ADJUST_INSN_LENGTH
1380 /* If needed, do any adjustment. */
1381 tmp_length = new_length;
1382 ADJUST_INSN_LENGTH (insn, new_length);
1383 insn_current_address += (new_length - tmp_length);
1384 #endif
1385
1386 if (new_length != insn_lengths[uid]
1387 && (!increasing || new_length > insn_lengths[uid]))
1388 {
1389 insn_lengths[uid] = new_length;
1390 something_changed = 1;
1391 }
1392 else
1393 insn_current_address += insn_lengths[uid] - new_length;
1394 }
1395 /* For a non-optimizing compile, do only a single pass. */
1396 if (!increasing)
1397 break;
1398 }
1399 crtl->max_insn_address = insn_current_address;
1400 free (varying_length);
1401 }
1402
1403 /* Given the body of an INSN known to be generated by an ASM statement, return
1404 the number of machine instructions likely to be generated for this insn.
1405 This is used to compute its length. */
1406
1407 static int
1408 asm_insn_count (rtx body)
1409 {
1410 const char *templ;
1411
1412 if (GET_CODE (body) == ASM_INPUT)
1413 templ = XSTR (body, 0);
1414 else
1415 templ = decode_asm_operands (body, NULL, NULL, NULL, NULL, NULL);
1416
1417 return asm_str_count (templ);
1418 }
1419
1420 /* Return the number of machine instructions likely to be generated for the
1421 inline-asm template. */
1422 int
1423 asm_str_count (const char *templ)
1424 {
1425 int count = 1;
1426
1427 if (!*templ)
1428 return 0;
1429
1430 for (; *templ; templ++)
1431 if (IS_ASM_LOGICAL_LINE_SEPARATOR (*templ, templ)
1432 || *templ == '\n')
1433 count++;
1434
1435 return count;
1436 }
1437 \f
1438 /* Return true if DWARF2 debug info can be emitted for DECL. */
1439
1440 static bool
1441 dwarf2_debug_info_emitted_p (tree decl)
1442 {
1443 if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG)
1444 return false;
1445
1446 if (DECL_IGNORED_P (decl))
1447 return false;
1448
1449 return true;
1450 }
1451
1452 /* Return scope resulting from combination of S1 and S2. */
1453 static tree
1454 choose_inner_scope (tree s1, tree s2)
1455 {
1456 if (!s1)
1457 return s2;
1458 if (!s2)
1459 return s1;
1460 if (BLOCK_NUMBER (s1) > BLOCK_NUMBER (s2))
1461 return s1;
1462 return s2;
1463 }
1464
1465 /* Emit lexical block notes needed to change scope from S1 to S2. */
1466
1467 static void
1468 change_scope (rtx_insn *orig_insn, tree s1, tree s2)
1469 {
1470 rtx_insn *insn = orig_insn;
1471 tree com = NULL_TREE;
1472 tree ts1 = s1, ts2 = s2;
1473 tree s;
1474
1475 while (ts1 != ts2)
1476 {
1477 gcc_assert (ts1 && ts2);
1478 if (BLOCK_NUMBER (ts1) > BLOCK_NUMBER (ts2))
1479 ts1 = BLOCK_SUPERCONTEXT (ts1);
1480 else if (BLOCK_NUMBER (ts1) < BLOCK_NUMBER (ts2))
1481 ts2 = BLOCK_SUPERCONTEXT (ts2);
1482 else
1483 {
1484 ts1 = BLOCK_SUPERCONTEXT (ts1);
1485 ts2 = BLOCK_SUPERCONTEXT (ts2);
1486 }
1487 }
1488 com = ts1;
1489
1490 /* Close scopes. */
1491 s = s1;
1492 while (s != com)
1493 {
1494 rtx_note *note = emit_note_before (NOTE_INSN_BLOCK_END, insn);
1495 NOTE_BLOCK (note) = s;
1496 s = BLOCK_SUPERCONTEXT (s);
1497 }
1498
1499 /* Open scopes. */
1500 s = s2;
1501 while (s != com)
1502 {
1503 insn = emit_note_before (NOTE_INSN_BLOCK_BEG, insn);
1504 NOTE_BLOCK (insn) = s;
1505 s = BLOCK_SUPERCONTEXT (s);
1506 }
1507 }
1508
1509 /* Rebuild all the NOTE_INSN_BLOCK_BEG and NOTE_INSN_BLOCK_END notes based
1510 on the scope tree and the newly reordered instructions. */
1511
1512 static void
1513 reemit_insn_block_notes (void)
1514 {
1515 tree cur_block = DECL_INITIAL (cfun->decl);
1516 rtx_insn *insn;
1517
1518 insn = get_insns ();
1519 for (; insn; insn = NEXT_INSN (insn))
1520 {
1521 tree this_block;
1522
1523 /* Prevent lexical blocks from straddling section boundaries. */
1524 if (NOTE_P (insn))
1525 switch (NOTE_KIND (insn))
1526 {
1527 case NOTE_INSN_SWITCH_TEXT_SECTIONS:
1528 {
1529 for (tree s = cur_block; s != DECL_INITIAL (cfun->decl);
1530 s = BLOCK_SUPERCONTEXT (s))
1531 {
1532 rtx_note *note = emit_note_before (NOTE_INSN_BLOCK_END, insn);
1533 NOTE_BLOCK (note) = s;
1534 note = emit_note_after (NOTE_INSN_BLOCK_BEG, insn);
1535 NOTE_BLOCK (note) = s;
1536 }
1537 }
1538 break;
1539
1540 case NOTE_INSN_BEGIN_STMT:
1541 case NOTE_INSN_INLINE_ENTRY:
1542 this_block = LOCATION_BLOCK (NOTE_MARKER_LOCATION (insn));
1543 goto set_cur_block_to_this_block;
1544
1545 default:
1546 continue;
1547 }
1548
1549 if (!active_insn_p (insn))
1550 continue;
1551
1552 /* Avoid putting scope notes between jump table and its label. */
1553 if (JUMP_TABLE_DATA_P (insn))
1554 continue;
1555
1556 this_block = insn_scope (insn);
1557 /* For sequences compute scope resulting from merging all scopes
1558 of instructions nested inside. */
1559 if (rtx_sequence *body = dyn_cast <rtx_sequence *> (PATTERN (insn)))
1560 {
1561 int i;
1562
1563 this_block = NULL;
1564 for (i = 0; i < body->len (); i++)
1565 this_block = choose_inner_scope (this_block,
1566 insn_scope (body->insn (i)));
1567 }
1568 set_cur_block_to_this_block:
1569 if (! this_block)
1570 {
1571 if (INSN_LOCATION (insn) == UNKNOWN_LOCATION)
1572 continue;
1573 else
1574 this_block = DECL_INITIAL (cfun->decl);
1575 }
1576
1577 if (this_block != cur_block)
1578 {
1579 change_scope (insn, cur_block, this_block);
1580 cur_block = this_block;
1581 }
1582 }
1583
1584 /* change_scope emits before the insn, not after. */
1585 rtx_note *note = emit_note (NOTE_INSN_DELETED);
1586 change_scope (note, cur_block, DECL_INITIAL (cfun->decl));
1587 delete_insn (note);
1588
1589 reorder_blocks ();
1590 }
1591
1592 static const char *some_local_dynamic_name;
1593
1594 /* Locate some local-dynamic symbol still in use by this function
1595 so that we can print its name in local-dynamic base patterns.
1596 Return null if there are no local-dynamic references. */
1597
1598 const char *
1599 get_some_local_dynamic_name ()
1600 {
1601 subrtx_iterator::array_type array;
1602 rtx_insn *insn;
1603
1604 if (some_local_dynamic_name)
1605 return some_local_dynamic_name;
1606
1607 for (insn = get_insns (); insn ; insn = NEXT_INSN (insn))
1608 if (NONDEBUG_INSN_P (insn))
1609 FOR_EACH_SUBRTX (iter, array, PATTERN (insn), ALL)
1610 {
1611 const_rtx x = *iter;
1612 if (GET_CODE (x) == SYMBOL_REF)
1613 {
1614 if (SYMBOL_REF_TLS_MODEL (x) == TLS_MODEL_LOCAL_DYNAMIC)
1615 return some_local_dynamic_name = XSTR (x, 0);
1616 if (CONSTANT_POOL_ADDRESS_P (x))
1617 iter.substitute (get_pool_constant (x));
1618 }
1619 }
1620
1621 return 0;
1622 }
1623
1624 /* Arrange for us to emit a source location note before any further
1625 real insns or section changes, by setting the SEEN_NEXT_VIEW bit in
1626 *SEEN, as long as we are keeping track of location views. The bit
1627 indicates we have referenced the next view at the current PC, so we
1628 have to emit it. This should be called next to the var_location
1629 debug hook. */
1630
1631 static inline void
1632 set_next_view_needed (int *seen)
1633 {
1634 if (debug_variable_location_views)
1635 *seen |= SEEN_NEXT_VIEW;
1636 }
1637
1638 /* Clear the flag in *SEEN indicating we need to emit the next view.
1639 This should be called next to the source_line debug hook. */
1640
1641 static inline void
1642 clear_next_view_needed (int *seen)
1643 {
1644 *seen &= ~SEEN_NEXT_VIEW;
1645 }
1646
1647 /* Test whether we have a pending request to emit the next view in
1648 *SEEN, and emit it if needed, clearing the request bit. */
1649
1650 static inline void
1651 maybe_output_next_view (int *seen)
1652 {
1653 if ((*seen & SEEN_NEXT_VIEW) != 0)
1654 {
1655 clear_next_view_needed (seen);
1656 (*debug_hooks->source_line) (last_linenum, last_columnnum,
1657 last_filename, last_discriminator,
1658 false);
1659 }
1660 }
1661
1662 /* We want to emit param bindings (before the first begin_stmt) in the
1663 initial view, if we are emitting views. To that end, we may
1664 consume initial notes in the function, processing them in
1665 final_start_function, before signaling the beginning of the
1666 prologue, rather than in final.
1667
1668 We don't test whether the DECLs are PARM_DECLs: the assumption is
1669 that there will be a NOTE_INSN_BEGIN_STMT marker before any
1670 non-parameter NOTE_INSN_VAR_LOCATION. It's ok if the marker is not
1671 there, we'll just have more variable locations bound in the initial
1672 view, which is consistent with their being bound without any code
1673 that would give them a value. */
1674
1675 static inline bool
1676 in_initial_view_p (rtx_insn *insn)
1677 {
1678 return (!DECL_IGNORED_P (current_function_decl)
1679 && debug_variable_location_views
1680 && insn && GET_CODE (insn) == NOTE
1681 && (NOTE_KIND (insn) == NOTE_INSN_VAR_LOCATION
1682 || NOTE_KIND (insn) == NOTE_INSN_DELETED));
1683 }
1684
1685 /* Output assembler code for the start of a function,
1686 and initialize some of the variables in this file
1687 for the new function. The label for the function and associated
1688 assembler pseudo-ops have already been output in `assemble_start_function'.
1689
1690 FIRST is the first insn of the rtl for the function being compiled.
1691 FILE is the file to write assembler code to.
1692 SEEN should be initially set to zero, and it may be updated to
1693 indicate we have references to the next location view, that would
1694 require us to emit it at the current PC.
1695 OPTIMIZE_P is nonzero if we should eliminate redundant
1696 test and compare insns. */
1697
1698 static void
1699 final_start_function_1 (rtx_insn **firstp, FILE *file, int *seen,
1700 int optimize_p ATTRIBUTE_UNUSED)
1701 {
1702 block_depth = 0;
1703
1704 this_is_asm_operands = 0;
1705
1706 need_profile_function = false;
1707
1708 last_filename = LOCATION_FILE (prologue_location);
1709 last_linenum = LOCATION_LINE (prologue_location);
1710 last_columnnum = LOCATION_COLUMN (prologue_location);
1711 last_discriminator = discriminator = 0;
1712 last_bb_discriminator = bb_discriminator = 0;
1713
1714 high_block_linenum = high_function_linenum = last_linenum;
1715
1716 if (flag_sanitize & SANITIZE_ADDRESS)
1717 asan_function_start ();
1718
1719 rtx_insn *first = *firstp;
1720 if (in_initial_view_p (first))
1721 {
1722 do
1723 {
1724 final_scan_insn (first, file, 0, 0, seen);
1725 first = NEXT_INSN (first);
1726 }
1727 while (in_initial_view_p (first));
1728 *firstp = first;
1729 }
1730
1731 if (!DECL_IGNORED_P (current_function_decl))
1732 debug_hooks->begin_prologue (last_linenum, last_columnnum,
1733 last_filename);
1734
1735 if (!dwarf2_debug_info_emitted_p (current_function_decl))
1736 dwarf2out_begin_prologue (0, 0, NULL);
1737
1738 #ifdef LEAF_REG_REMAP
1739 if (crtl->uses_only_leaf_regs)
1740 leaf_renumber_regs (first);
1741 #endif
1742
1743 /* The Sun386i and perhaps other machines don't work right
1744 if the profiling code comes after the prologue. */
1745 if (targetm.profile_before_prologue () && crtl->profile)
1746 {
1747 if (targetm.asm_out.function_prologue == default_function_pro_epilogue
1748 && targetm.have_prologue ())
1749 {
1750 rtx_insn *insn;
1751 for (insn = first; insn; insn = NEXT_INSN (insn))
1752 if (!NOTE_P (insn))
1753 {
1754 insn = NULL;
1755 break;
1756 }
1757 else if (NOTE_KIND (insn) == NOTE_INSN_BASIC_BLOCK
1758 || NOTE_KIND (insn) == NOTE_INSN_FUNCTION_BEG)
1759 break;
1760 else if (NOTE_KIND (insn) == NOTE_INSN_DELETED
1761 || NOTE_KIND (insn) == NOTE_INSN_VAR_LOCATION)
1762 continue;
1763 else
1764 {
1765 insn = NULL;
1766 break;
1767 }
1768
1769 if (insn)
1770 need_profile_function = true;
1771 else
1772 profile_function (file);
1773 }
1774 else
1775 profile_function (file);
1776 }
1777
1778 /* If debugging, assign block numbers to all of the blocks in this
1779 function. */
1780 if (write_symbols)
1781 {
1782 reemit_insn_block_notes ();
1783 number_blocks (current_function_decl);
1784 /* We never actually put out begin/end notes for the top-level
1785 block in the function. But, conceptually, that block is
1786 always needed. */
1787 TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl)) = 1;
1788 }
1789
1790 unsigned HOST_WIDE_INT min_frame_size
1791 = constant_lower_bound (get_frame_size ());
1792 if (min_frame_size > (unsigned HOST_WIDE_INT) warn_frame_larger_than_size)
1793 {
1794 /* Issue a warning */
1795 warning (OPT_Wframe_larger_than_,
1796 "the frame size of %wu bytes is larger than %wu bytes",
1797 min_frame_size, warn_frame_larger_than_size);
1798 }
1799
1800 /* First output the function prologue: code to set up the stack frame. */
1801 targetm.asm_out.function_prologue (file);
1802
1803 /* If the machine represents the prologue as RTL, the profiling code must
1804 be emitted when NOTE_INSN_PROLOGUE_END is scanned. */
1805 if (! targetm.have_prologue ())
1806 profile_after_prologue (file);
1807 }
1808
1809 /* This is an exported final_start_function_1, callable without SEEN. */
1810
1811 void
1812 final_start_function (rtx_insn *first, FILE *file,
1813 int optimize_p ATTRIBUTE_UNUSED)
1814 {
1815 int seen = 0;
1816 final_start_function_1 (&first, file, &seen, optimize_p);
1817 gcc_assert (seen == 0);
1818 }
1819
1820 static void
1821 profile_after_prologue (FILE *file ATTRIBUTE_UNUSED)
1822 {
1823 if (!targetm.profile_before_prologue () && crtl->profile)
1824 profile_function (file);
1825 }
1826
1827 static void
1828 profile_function (FILE *file ATTRIBUTE_UNUSED)
1829 {
1830 #ifndef NO_PROFILE_COUNTERS
1831 # define NO_PROFILE_COUNTERS 0
1832 #endif
1833 #ifdef ASM_OUTPUT_REG_PUSH
1834 rtx sval = NULL, chain = NULL;
1835
1836 if (cfun->returns_struct)
1837 sval = targetm.calls.struct_value_rtx (TREE_TYPE (current_function_decl),
1838 true);
1839 if (cfun->static_chain_decl)
1840 chain = targetm.calls.static_chain (current_function_decl, true);
1841 #endif /* ASM_OUTPUT_REG_PUSH */
1842
1843 if (! NO_PROFILE_COUNTERS)
1844 {
1845 int align = MIN (BIGGEST_ALIGNMENT, LONG_TYPE_SIZE);
1846 switch_to_section (data_section);
1847 ASM_OUTPUT_ALIGN (file, floor_log2 (align / BITS_PER_UNIT));
1848 targetm.asm_out.internal_label (file, "LP", current_function_funcdef_no);
1849 assemble_integer (const0_rtx, LONG_TYPE_SIZE / BITS_PER_UNIT, align, 1);
1850 }
1851
1852 switch_to_section (current_function_section ());
1853
1854 #ifdef ASM_OUTPUT_REG_PUSH
1855 if (sval && REG_P (sval))
1856 ASM_OUTPUT_REG_PUSH (file, REGNO (sval));
1857 if (chain && REG_P (chain))
1858 ASM_OUTPUT_REG_PUSH (file, REGNO (chain));
1859 #endif
1860
1861 FUNCTION_PROFILER (file, current_function_funcdef_no);
1862
1863 #ifdef ASM_OUTPUT_REG_PUSH
1864 if (chain && REG_P (chain))
1865 ASM_OUTPUT_REG_POP (file, REGNO (chain));
1866 if (sval && REG_P (sval))
1867 ASM_OUTPUT_REG_POP (file, REGNO (sval));
1868 #endif
1869 }
1870
1871 /* Output assembler code for the end of a function.
1872 For clarity, args are same as those of `final_start_function'
1873 even though not all of them are needed. */
1874
1875 void
1876 final_end_function (void)
1877 {
1878 app_disable ();
1879
1880 if (!DECL_IGNORED_P (current_function_decl))
1881 debug_hooks->end_function (high_function_linenum);
1882
1883 /* Finally, output the function epilogue:
1884 code to restore the stack frame and return to the caller. */
1885 targetm.asm_out.function_epilogue (asm_out_file);
1886
1887 /* And debug output. */
1888 if (!DECL_IGNORED_P (current_function_decl))
1889 debug_hooks->end_epilogue (last_linenum, last_filename);
1890
1891 if (!dwarf2_debug_info_emitted_p (current_function_decl)
1892 && dwarf2out_do_frame ())
1893 dwarf2out_end_epilogue (last_linenum, last_filename);
1894
1895 some_local_dynamic_name = 0;
1896 }
1897 \f
1898
1899 /* Dumper helper for basic block information. FILE is the assembly
1900 output file, and INSN is the instruction being emitted. */
1901
1902 static void
1903 dump_basic_block_info (FILE *file, rtx_insn *insn, basic_block *start_to_bb,
1904 basic_block *end_to_bb, int bb_map_size, int *bb_seqn)
1905 {
1906 basic_block bb;
1907
1908 if (!flag_debug_asm)
1909 return;
1910
1911 if (INSN_UID (insn) < bb_map_size
1912 && (bb = start_to_bb[INSN_UID (insn)]) != NULL)
1913 {
1914 edge e;
1915 edge_iterator ei;
1916
1917 fprintf (file, "%s BLOCK %d", ASM_COMMENT_START, bb->index);
1918 if (bb->count.initialized_p ())
1919 {
1920 fprintf (file, ", count:");
1921 bb->count.dump (file);
1922 }
1923 fprintf (file, " seq:%d", (*bb_seqn)++);
1924 fprintf (file, "\n%s PRED:", ASM_COMMENT_START);
1925 FOR_EACH_EDGE (e, ei, bb->preds)
1926 {
1927 dump_edge_info (file, e, TDF_DETAILS, 0);
1928 }
1929 fprintf (file, "\n");
1930 }
1931 if (INSN_UID (insn) < bb_map_size
1932 && (bb = end_to_bb[INSN_UID (insn)]) != NULL)
1933 {
1934 edge e;
1935 edge_iterator ei;
1936
1937 fprintf (asm_out_file, "%s SUCC:", ASM_COMMENT_START);
1938 FOR_EACH_EDGE (e, ei, bb->succs)
1939 {
1940 dump_edge_info (asm_out_file, e, TDF_DETAILS, 1);
1941 }
1942 fprintf (file, "\n");
1943 }
1944 }
1945
1946 /* Output assembler code for some insns: all or part of a function.
1947 For description of args, see `final_start_function', above. */
1948
1949 static void
1950 final_1 (rtx_insn *first, FILE *file, int seen, int optimize_p)
1951 {
1952 rtx_insn *insn, *next;
1953
1954 /* Used for -dA dump. */
1955 basic_block *start_to_bb = NULL;
1956 basic_block *end_to_bb = NULL;
1957 int bb_map_size = 0;
1958 int bb_seqn = 0;
1959
1960 last_ignored_compare = 0;
1961
1962 if (HAVE_cc0)
1963 for (insn = first; insn; insn = NEXT_INSN (insn))
1964 {
1965 /* If CC tracking across branches is enabled, record the insn which
1966 jumps to each branch only reached from one place. */
1967 if (optimize_p && JUMP_P (insn))
1968 {
1969 rtx lab = JUMP_LABEL (insn);
1970 if (lab && LABEL_P (lab) && LABEL_NUSES (lab) == 1)
1971 {
1972 LABEL_REFS (lab) = insn;
1973 }
1974 }
1975 }
1976
1977 init_recog ();
1978
1979 CC_STATUS_INIT;
1980
1981 if (flag_debug_asm)
1982 {
1983 basic_block bb;
1984
1985 bb_map_size = get_max_uid () + 1;
1986 start_to_bb = XCNEWVEC (basic_block, bb_map_size);
1987 end_to_bb = XCNEWVEC (basic_block, bb_map_size);
1988
1989 /* There is no cfg for a thunk. */
1990 if (!cfun->is_thunk)
1991 FOR_EACH_BB_REVERSE_FN (bb, cfun)
1992 {
1993 start_to_bb[INSN_UID (BB_HEAD (bb))] = bb;
1994 end_to_bb[INSN_UID (BB_END (bb))] = bb;
1995 }
1996 }
1997
1998 /* Output the insns. */
1999 for (insn = first; insn;)
2000 {
2001 if (HAVE_ATTR_length)
2002 {
2003 if ((unsigned) INSN_UID (insn) >= INSN_ADDRESSES_SIZE ())
2004 {
2005 /* This can be triggered by bugs elsewhere in the compiler if
2006 new insns are created after init_insn_lengths is called. */
2007 gcc_assert (NOTE_P (insn));
2008 insn_current_address = -1;
2009 }
2010 else
2011 insn_current_address = INSN_ADDRESSES (INSN_UID (insn));
2012 /* final can be seen as an iteration of shorten_branches that
2013 does nothing (since a fixed point has already been reached). */
2014 insn_last_address = insn_current_address;
2015 }
2016
2017 dump_basic_block_info (file, insn, start_to_bb, end_to_bb,
2018 bb_map_size, &bb_seqn);
2019 insn = final_scan_insn (insn, file, optimize_p, 0, &seen);
2020 }
2021
2022 maybe_output_next_view (&seen);
2023
2024 if (flag_debug_asm)
2025 {
2026 free (start_to_bb);
2027 free (end_to_bb);
2028 }
2029
2030 /* Remove CFI notes, to avoid compare-debug failures. */
2031 for (insn = first; insn; insn = next)
2032 {
2033 next = NEXT_INSN (insn);
2034 if (NOTE_P (insn)
2035 && (NOTE_KIND (insn) == NOTE_INSN_CFI
2036 || NOTE_KIND (insn) == NOTE_INSN_CFI_LABEL))
2037 delete_insn (insn);
2038 }
2039 }
2040
2041 /* This is an exported final_1, callable without SEEN. */
2042
2043 void
2044 final (rtx_insn *first, FILE *file, int optimize_p)
2045 {
2046 /* Those that use the internal final_start_function_1/final_1 API
2047 skip initial debug bind notes in final_start_function_1, and pass
2048 the modified FIRST to final_1. But those that use the public
2049 final_start_function/final APIs, final_start_function can't move
2050 FIRST because it's not passed by reference, so if they were
2051 skipped there, skip them again here. */
2052 while (in_initial_view_p (first))
2053 first = NEXT_INSN (first);
2054
2055 final_1 (first, file, 0, optimize_p);
2056 }
2057 \f
2058 const char *
2059 get_insn_template (int code, rtx_insn *insn)
2060 {
2061 switch (insn_data[code].output_format)
2062 {
2063 case INSN_OUTPUT_FORMAT_SINGLE:
2064 return insn_data[code].output.single;
2065 case INSN_OUTPUT_FORMAT_MULTI:
2066 return insn_data[code].output.multi[which_alternative];
2067 case INSN_OUTPUT_FORMAT_FUNCTION:
2068 gcc_assert (insn);
2069 return (*insn_data[code].output.function) (recog_data.operand, insn);
2070
2071 default:
2072 gcc_unreachable ();
2073 }
2074 }
2075
2076 /* Emit the appropriate declaration for an alternate-entry-point
2077 symbol represented by INSN, to FILE. INSN is a CODE_LABEL with
2078 LABEL_KIND != LABEL_NORMAL.
2079
2080 The case fall-through in this function is intentional. */
2081 static void
2082 output_alternate_entry_point (FILE *file, rtx_insn *insn)
2083 {
2084 const char *name = LABEL_NAME (insn);
2085
2086 switch (LABEL_KIND (insn))
2087 {
2088 case LABEL_WEAK_ENTRY:
2089 #ifdef ASM_WEAKEN_LABEL
2090 ASM_WEAKEN_LABEL (file, name);
2091 gcc_fallthrough ();
2092 #endif
2093 case LABEL_GLOBAL_ENTRY:
2094 targetm.asm_out.globalize_label (file, name);
2095 gcc_fallthrough ();
2096 case LABEL_STATIC_ENTRY:
2097 #ifdef ASM_OUTPUT_TYPE_DIRECTIVE
2098 ASM_OUTPUT_TYPE_DIRECTIVE (file, name, "function");
2099 #endif
2100 ASM_OUTPUT_LABEL (file, name);
2101 break;
2102
2103 case LABEL_NORMAL:
2104 default:
2105 gcc_unreachable ();
2106 }
2107 }
2108
2109 /* Given a CALL_INSN, find and return the nested CALL. */
2110 static rtx
2111 call_from_call_insn (rtx_call_insn *insn)
2112 {
2113 rtx x;
2114 gcc_assert (CALL_P (insn));
2115 x = PATTERN (insn);
2116
2117 while (GET_CODE (x) != CALL)
2118 {
2119 switch (GET_CODE (x))
2120 {
2121 default:
2122 gcc_unreachable ();
2123 case COND_EXEC:
2124 x = COND_EXEC_CODE (x);
2125 break;
2126 case PARALLEL:
2127 x = XVECEXP (x, 0, 0);
2128 break;
2129 case SET:
2130 x = XEXP (x, 1);
2131 break;
2132 }
2133 }
2134 return x;
2135 }
2136
2137 /* Print a comment into the asm showing FILENAME, LINENUM, and the
2138 corresponding source line, if available. */
2139
2140 static void
2141 asm_show_source (const char *filename, int linenum)
2142 {
2143 if (!filename)
2144 return;
2145
2146 char_span line = location_get_source_line (filename, linenum);
2147 if (!line)
2148 return;
2149
2150 fprintf (asm_out_file, "%s %s:%i: ", ASM_COMMENT_START, filename, linenum);
2151 /* "line" is not 0-terminated, so we must use its length. */
2152 fwrite (line.get_buffer (), 1, line.length (), asm_out_file);
2153 fputc ('\n', asm_out_file);
2154 }
2155
2156 /* The final scan for one insn, INSN.
2157 Args are same as in `final', except that INSN
2158 is the insn being scanned.
2159 Value returned is the next insn to be scanned.
2160
2161 NOPEEPHOLES is the flag to disallow peephole processing (currently
2162 used for within delayed branch sequence output).
2163
2164 SEEN is used to track the end of the prologue, for emitting
2165 debug information. We force the emission of a line note after
2166 both NOTE_INSN_PROLOGUE_END and NOTE_INSN_FUNCTION_BEG. */
2167
2168 static rtx_insn *
2169 final_scan_insn_1 (rtx_insn *insn, FILE *file, int optimize_p ATTRIBUTE_UNUSED,
2170 int nopeepholes ATTRIBUTE_UNUSED, int *seen)
2171 {
2172 #if HAVE_cc0
2173 rtx set;
2174 #endif
2175 rtx_insn *next;
2176 rtx_jump_table_data *table;
2177
2178 insn_counter++;
2179
2180 /* Ignore deleted insns. These can occur when we split insns (due to a
2181 template of "#") while not optimizing. */
2182 if (insn->deleted ())
2183 return NEXT_INSN (insn);
2184
2185 switch (GET_CODE (insn))
2186 {
2187 case NOTE:
2188 switch (NOTE_KIND (insn))
2189 {
2190 case NOTE_INSN_DELETED:
2191 case NOTE_INSN_UPDATE_SJLJ_CONTEXT:
2192 break;
2193
2194 case NOTE_INSN_SWITCH_TEXT_SECTIONS:
2195 maybe_output_next_view (seen);
2196
2197 output_function_exception_table (0);
2198
2199 if (targetm.asm_out.unwind_emit)
2200 targetm.asm_out.unwind_emit (asm_out_file, insn);
2201
2202 in_cold_section_p = !in_cold_section_p;
2203
2204 if (in_cold_section_p)
2205 cold_function_name
2206 = clone_function_name (current_function_decl, "cold");
2207
2208 if (dwarf2out_do_frame ())
2209 {
2210 dwarf2out_switch_text_section ();
2211 if (!dwarf2_debug_info_emitted_p (current_function_decl)
2212 && !DECL_IGNORED_P (current_function_decl))
2213 debug_hooks->switch_text_section ();
2214 }
2215 else if (!DECL_IGNORED_P (current_function_decl))
2216 debug_hooks->switch_text_section ();
2217
2218 switch_to_section (current_function_section ());
2219 targetm.asm_out.function_switched_text_sections (asm_out_file,
2220 current_function_decl,
2221 in_cold_section_p);
2222 /* Emit a label for the split cold section. Form label name by
2223 suffixing "cold" to the original function's name. */
2224 if (in_cold_section_p)
2225 {
2226 #ifdef ASM_DECLARE_COLD_FUNCTION_NAME
2227 ASM_DECLARE_COLD_FUNCTION_NAME (asm_out_file,
2228 IDENTIFIER_POINTER
2229 (cold_function_name),
2230 current_function_decl);
2231 #else
2232 ASM_OUTPUT_LABEL (asm_out_file,
2233 IDENTIFIER_POINTER (cold_function_name));
2234 #endif
2235 if (dwarf2out_do_frame ()
2236 && cfun->fde->dw_fde_second_begin != NULL)
2237 ASM_OUTPUT_LABEL (asm_out_file, cfun->fde->dw_fde_second_begin);
2238 }
2239 break;
2240
2241 case NOTE_INSN_BASIC_BLOCK:
2242 if (need_profile_function)
2243 {
2244 profile_function (asm_out_file);
2245 need_profile_function = false;
2246 }
2247
2248 if (targetm.asm_out.unwind_emit)
2249 targetm.asm_out.unwind_emit (asm_out_file, insn);
2250
2251 bb_discriminator = NOTE_BASIC_BLOCK (insn)->discriminator;
2252 break;
2253
2254 case NOTE_INSN_EH_REGION_BEG:
2255 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHB",
2256 NOTE_EH_HANDLER (insn));
2257 break;
2258
2259 case NOTE_INSN_EH_REGION_END:
2260 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHE",
2261 NOTE_EH_HANDLER (insn));
2262 break;
2263
2264 case NOTE_INSN_PROLOGUE_END:
2265 targetm.asm_out.function_end_prologue (file);
2266 profile_after_prologue (file);
2267
2268 if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE)
2269 {
2270 *seen |= SEEN_EMITTED;
2271 force_source_line = true;
2272 }
2273 else
2274 *seen |= SEEN_NOTE;
2275
2276 break;
2277
2278 case NOTE_INSN_EPILOGUE_BEG:
2279 if (!DECL_IGNORED_P (current_function_decl))
2280 (*debug_hooks->begin_epilogue) (last_linenum, last_filename);
2281 targetm.asm_out.function_begin_epilogue (file);
2282 break;
2283
2284 case NOTE_INSN_CFI:
2285 dwarf2out_emit_cfi (NOTE_CFI (insn));
2286 break;
2287
2288 case NOTE_INSN_CFI_LABEL:
2289 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LCFI",
2290 NOTE_LABEL_NUMBER (insn));
2291 break;
2292
2293 case NOTE_INSN_FUNCTION_BEG:
2294 if (need_profile_function)
2295 {
2296 profile_function (asm_out_file);
2297 need_profile_function = false;
2298 }
2299
2300 app_disable ();
2301 if (!DECL_IGNORED_P (current_function_decl))
2302 debug_hooks->end_prologue (last_linenum, last_filename);
2303
2304 if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE)
2305 {
2306 *seen |= SEEN_EMITTED;
2307 force_source_line = true;
2308 }
2309 else
2310 *seen |= SEEN_NOTE;
2311
2312 break;
2313
2314 case NOTE_INSN_BLOCK_BEG:
2315 if (debug_info_level == DINFO_LEVEL_NORMAL
2316 || debug_info_level == DINFO_LEVEL_VERBOSE
2317 || write_symbols == DWARF2_DEBUG
2318 || write_symbols == VMS_AND_DWARF2_DEBUG
2319 || write_symbols == VMS_DEBUG)
2320 {
2321 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
2322
2323 app_disable ();
2324 ++block_depth;
2325 high_block_linenum = last_linenum;
2326
2327 /* Output debugging info about the symbol-block beginning. */
2328 if (!DECL_IGNORED_P (current_function_decl))
2329 debug_hooks->begin_block (last_linenum, n);
2330
2331 /* Mark this block as output. */
2332 TREE_ASM_WRITTEN (NOTE_BLOCK (insn)) = 1;
2333 BLOCK_IN_COLD_SECTION_P (NOTE_BLOCK (insn)) = in_cold_section_p;
2334 }
2335 if (write_symbols == DBX_DEBUG)
2336 {
2337 location_t *locus_ptr
2338 = block_nonartificial_location (NOTE_BLOCK (insn));
2339
2340 if (locus_ptr != NULL)
2341 {
2342 override_filename = LOCATION_FILE (*locus_ptr);
2343 override_linenum = LOCATION_LINE (*locus_ptr);
2344 override_columnnum = LOCATION_COLUMN (*locus_ptr);
2345 }
2346 }
2347 break;
2348
2349 case NOTE_INSN_BLOCK_END:
2350 maybe_output_next_view (seen);
2351
2352 if (debug_info_level == DINFO_LEVEL_NORMAL
2353 || debug_info_level == DINFO_LEVEL_VERBOSE
2354 || write_symbols == DWARF2_DEBUG
2355 || write_symbols == VMS_AND_DWARF2_DEBUG
2356 || write_symbols == VMS_DEBUG)
2357 {
2358 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
2359
2360 app_disable ();
2361
2362 /* End of a symbol-block. */
2363 --block_depth;
2364 gcc_assert (block_depth >= 0);
2365
2366 if (!DECL_IGNORED_P (current_function_decl))
2367 debug_hooks->end_block (high_block_linenum, n);
2368 gcc_assert (BLOCK_IN_COLD_SECTION_P (NOTE_BLOCK (insn))
2369 == in_cold_section_p);
2370 }
2371 if (write_symbols == DBX_DEBUG)
2372 {
2373 tree outer_block = BLOCK_SUPERCONTEXT (NOTE_BLOCK (insn));
2374 location_t *locus_ptr
2375 = block_nonartificial_location (outer_block);
2376
2377 if (locus_ptr != NULL)
2378 {
2379 override_filename = LOCATION_FILE (*locus_ptr);
2380 override_linenum = LOCATION_LINE (*locus_ptr);
2381 override_columnnum = LOCATION_COLUMN (*locus_ptr);
2382 }
2383 else
2384 {
2385 override_filename = NULL;
2386 override_linenum = 0;
2387 override_columnnum = 0;
2388 }
2389 }
2390 break;
2391
2392 case NOTE_INSN_DELETED_LABEL:
2393 /* Emit the label. We may have deleted the CODE_LABEL because
2394 the label could be proved to be unreachable, though still
2395 referenced (in the form of having its address taken. */
2396 ASM_OUTPUT_DEBUG_LABEL (file, "L", CODE_LABEL_NUMBER (insn));
2397 break;
2398
2399 case NOTE_INSN_DELETED_DEBUG_LABEL:
2400 /* Similarly, but need to use different namespace for it. */
2401 if (CODE_LABEL_NUMBER (insn) != -1)
2402 ASM_OUTPUT_DEBUG_LABEL (file, "LDL", CODE_LABEL_NUMBER (insn));
2403 break;
2404
2405 case NOTE_INSN_VAR_LOCATION:
2406 if (!DECL_IGNORED_P (current_function_decl))
2407 {
2408 debug_hooks->var_location (insn);
2409 set_next_view_needed (seen);
2410 }
2411 break;
2412
2413 case NOTE_INSN_BEGIN_STMT:
2414 gcc_checking_assert (cfun->debug_nonbind_markers);
2415 if (!DECL_IGNORED_P (current_function_decl)
2416 && notice_source_line (insn, NULL))
2417 {
2418 output_source_line:
2419 (*debug_hooks->source_line) (last_linenum, last_columnnum,
2420 last_filename, last_discriminator,
2421 true);
2422 clear_next_view_needed (seen);
2423 }
2424 break;
2425
2426 case NOTE_INSN_INLINE_ENTRY:
2427 gcc_checking_assert (cfun->debug_nonbind_markers);
2428 if (!DECL_IGNORED_P (current_function_decl))
2429 {
2430 if (!notice_source_line (insn, NULL))
2431 break;
2432 (*debug_hooks->inline_entry) (LOCATION_BLOCK
2433 (NOTE_MARKER_LOCATION (insn)));
2434 goto output_source_line;
2435 }
2436 break;
2437
2438 default:
2439 gcc_unreachable ();
2440 break;
2441 }
2442 break;
2443
2444 case BARRIER:
2445 break;
2446
2447 case CODE_LABEL:
2448 /* The target port might emit labels in the output function for
2449 some insn, e.g. sh.c output_branchy_insn. */
2450 if (CODE_LABEL_NUMBER (insn) <= max_labelno)
2451 {
2452 align_flags alignment = LABEL_TO_ALIGNMENT (insn);
2453 if (alignment.levels[0].log && NEXT_INSN (insn))
2454 {
2455 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2456 /* Output both primary and secondary alignment. */
2457 ASM_OUTPUT_MAX_SKIP_ALIGN (file, alignment.levels[0].log,
2458 alignment.levels[0].maxskip);
2459 ASM_OUTPUT_MAX_SKIP_ALIGN (file, alignment.levels[1].log,
2460 alignment.levels[1].maxskip);
2461 #else
2462 #ifdef ASM_OUTPUT_ALIGN_WITH_NOP
2463 ASM_OUTPUT_ALIGN_WITH_NOP (file, alignment.levels[0].log);
2464 #else
2465 ASM_OUTPUT_ALIGN (file, alignment.levels[0].log);
2466 #endif
2467 #endif
2468 }
2469 }
2470 CC_STATUS_INIT;
2471
2472 if (!DECL_IGNORED_P (current_function_decl) && LABEL_NAME (insn))
2473 debug_hooks->label (as_a <rtx_code_label *> (insn));
2474
2475 app_disable ();
2476
2477 /* If this label is followed by a jump-table, make sure we put
2478 the label in the read-only section. Also possibly write the
2479 label and jump table together. */
2480 table = jump_table_for_label (as_a <rtx_code_label *> (insn));
2481 if (table)
2482 {
2483 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2484 /* In this case, the case vector is being moved by the
2485 target, so don't output the label at all. Leave that
2486 to the back end macros. */
2487 #else
2488 if (! JUMP_TABLES_IN_TEXT_SECTION)
2489 {
2490 int log_align;
2491
2492 switch_to_section (targetm.asm_out.function_rodata_section
2493 (current_function_decl));
2494
2495 #ifdef ADDR_VEC_ALIGN
2496 log_align = ADDR_VEC_ALIGN (table);
2497 #else
2498 log_align = exact_log2 (BIGGEST_ALIGNMENT / BITS_PER_UNIT);
2499 #endif
2500 ASM_OUTPUT_ALIGN (file, log_align);
2501 }
2502 else
2503 switch_to_section (current_function_section ());
2504
2505 #ifdef ASM_OUTPUT_CASE_LABEL
2506 ASM_OUTPUT_CASE_LABEL (file, "L", CODE_LABEL_NUMBER (insn), table);
2507 #else
2508 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn));
2509 #endif
2510 #endif
2511 break;
2512 }
2513 if (LABEL_ALT_ENTRY_P (insn))
2514 output_alternate_entry_point (file, insn);
2515 else
2516 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn));
2517 break;
2518
2519 default:
2520 {
2521 rtx body = PATTERN (insn);
2522 int insn_code_number;
2523 const char *templ;
2524 bool is_stmt, *is_stmt_p;
2525
2526 if (MAY_HAVE_DEBUG_MARKER_INSNS && cfun->debug_nonbind_markers)
2527 {
2528 is_stmt = false;
2529 is_stmt_p = NULL;
2530 }
2531 else
2532 is_stmt_p = &is_stmt;
2533
2534 /* Reset this early so it is correct for ASM statements. */
2535 current_insn_predicate = NULL_RTX;
2536
2537 /* An INSN, JUMP_INSN or CALL_INSN.
2538 First check for special kinds that recog doesn't recognize. */
2539
2540 if (GET_CODE (body) == USE /* These are just declarations. */
2541 || GET_CODE (body) == CLOBBER)
2542 break;
2543
2544 #if HAVE_cc0
2545 {
2546 /* If there is a REG_CC_SETTER note on this insn, it means that
2547 the setting of the condition code was done in the delay slot
2548 of the insn that branched here. So recover the cc status
2549 from the insn that set it. */
2550
2551 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2552 if (note)
2553 {
2554 rtx_insn *other = as_a <rtx_insn *> (XEXP (note, 0));
2555 NOTICE_UPDATE_CC (PATTERN (other), other);
2556 cc_prev_status = cc_status;
2557 }
2558 }
2559 #endif
2560
2561 /* Detect insns that are really jump-tables
2562 and output them as such. */
2563
2564 if (JUMP_TABLE_DATA_P (insn))
2565 {
2566 #if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC))
2567 int vlen, idx;
2568 #endif
2569
2570 if (! JUMP_TABLES_IN_TEXT_SECTION)
2571 switch_to_section (targetm.asm_out.function_rodata_section
2572 (current_function_decl));
2573 else
2574 switch_to_section (current_function_section ());
2575
2576 app_disable ();
2577
2578 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2579 if (GET_CODE (body) == ADDR_VEC)
2580 {
2581 #ifdef ASM_OUTPUT_ADDR_VEC
2582 ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn), body);
2583 #else
2584 gcc_unreachable ();
2585 #endif
2586 }
2587 else
2588 {
2589 #ifdef ASM_OUTPUT_ADDR_DIFF_VEC
2590 ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn), body);
2591 #else
2592 gcc_unreachable ();
2593 #endif
2594 }
2595 #else
2596 vlen = XVECLEN (body, GET_CODE (body) == ADDR_DIFF_VEC);
2597 for (idx = 0; idx < vlen; idx++)
2598 {
2599 if (GET_CODE (body) == ADDR_VEC)
2600 {
2601 #ifdef ASM_OUTPUT_ADDR_VEC_ELT
2602 ASM_OUTPUT_ADDR_VEC_ELT
2603 (file, CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 0, idx), 0)));
2604 #else
2605 gcc_unreachable ();
2606 #endif
2607 }
2608 else
2609 {
2610 #ifdef ASM_OUTPUT_ADDR_DIFF_ELT
2611 ASM_OUTPUT_ADDR_DIFF_ELT
2612 (file,
2613 body,
2614 CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 1, idx), 0)),
2615 CODE_LABEL_NUMBER (XEXP (XEXP (body, 0), 0)));
2616 #else
2617 gcc_unreachable ();
2618 #endif
2619 }
2620 }
2621 #ifdef ASM_OUTPUT_CASE_END
2622 ASM_OUTPUT_CASE_END (file,
2623 CODE_LABEL_NUMBER (PREV_INSN (insn)),
2624 insn);
2625 #endif
2626 #endif
2627
2628 switch_to_section (current_function_section ());
2629
2630 if (debug_variable_location_views
2631 && !DECL_IGNORED_P (current_function_decl))
2632 debug_hooks->var_location (insn);
2633
2634 break;
2635 }
2636 /* Output this line note if it is the first or the last line
2637 note in a row. */
2638 if (!DECL_IGNORED_P (current_function_decl)
2639 && notice_source_line (insn, is_stmt_p))
2640 {
2641 if (flag_verbose_asm)
2642 asm_show_source (last_filename, last_linenum);
2643 (*debug_hooks->source_line) (last_linenum, last_columnnum,
2644 last_filename, last_discriminator,
2645 is_stmt);
2646 clear_next_view_needed (seen);
2647 }
2648 else
2649 maybe_output_next_view (seen);
2650
2651 gcc_checking_assert (!DEBUG_INSN_P (insn));
2652
2653 if (GET_CODE (body) == PARALLEL
2654 && GET_CODE (XVECEXP (body, 0, 0)) == ASM_INPUT)
2655 body = XVECEXP (body, 0, 0);
2656
2657 if (GET_CODE (body) == ASM_INPUT)
2658 {
2659 const char *string = XSTR (body, 0);
2660
2661 /* There's no telling what that did to the condition codes. */
2662 CC_STATUS_INIT;
2663
2664 if (string[0])
2665 {
2666 expanded_location loc;
2667
2668 app_enable ();
2669 loc = expand_location (ASM_INPUT_SOURCE_LOCATION (body));
2670 if (*loc.file && loc.line)
2671 fprintf (asm_out_file, "%s %i \"%s\" 1\n",
2672 ASM_COMMENT_START, loc.line, loc.file);
2673 fprintf (asm_out_file, "\t%s\n", string);
2674 #if HAVE_AS_LINE_ZERO
2675 if (*loc.file && loc.line)
2676 fprintf (asm_out_file, "%s 0 \"\" 2\n", ASM_COMMENT_START);
2677 #endif
2678 }
2679 break;
2680 }
2681
2682 /* Detect `asm' construct with operands. */
2683 if (asm_noperands (body) >= 0)
2684 {
2685 unsigned int noperands = asm_noperands (body);
2686 rtx *ops = XALLOCAVEC (rtx, noperands);
2687 const char *string;
2688 location_t loc;
2689 expanded_location expanded;
2690
2691 /* There's no telling what that did to the condition codes. */
2692 CC_STATUS_INIT;
2693
2694 /* Get out the operand values. */
2695 string = decode_asm_operands (body, ops, NULL, NULL, NULL, &loc);
2696 /* Inhibit dying on what would otherwise be compiler bugs. */
2697 insn_noperands = noperands;
2698 this_is_asm_operands = insn;
2699 expanded = expand_location (loc);
2700
2701 #ifdef FINAL_PRESCAN_INSN
2702 FINAL_PRESCAN_INSN (insn, ops, insn_noperands);
2703 #endif
2704
2705 /* Output the insn using them. */
2706 if (string[0])
2707 {
2708 app_enable ();
2709 if (expanded.file && expanded.line)
2710 fprintf (asm_out_file, "%s %i \"%s\" 1\n",
2711 ASM_COMMENT_START, expanded.line, expanded.file);
2712 output_asm_insn (string, ops);
2713 #if HAVE_AS_LINE_ZERO
2714 if (expanded.file && expanded.line)
2715 fprintf (asm_out_file, "%s 0 \"\" 2\n", ASM_COMMENT_START);
2716 #endif
2717 }
2718
2719 if (targetm.asm_out.final_postscan_insn)
2720 targetm.asm_out.final_postscan_insn (file, insn, ops,
2721 insn_noperands);
2722
2723 this_is_asm_operands = 0;
2724 break;
2725 }
2726
2727 app_disable ();
2728
2729 if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (body))
2730 {
2731 /* A delayed-branch sequence */
2732 int i;
2733
2734 final_sequence = seq;
2735
2736 /* The first insn in this SEQUENCE might be a JUMP_INSN that will
2737 force the restoration of a comparison that was previously
2738 thought unnecessary. If that happens, cancel this sequence
2739 and cause that insn to be restored. */
2740
2741 next = final_scan_insn (seq->insn (0), file, 0, 1, seen);
2742 if (next != seq->insn (1))
2743 {
2744 final_sequence = 0;
2745 return next;
2746 }
2747
2748 for (i = 1; i < seq->len (); i++)
2749 {
2750 rtx_insn *insn = seq->insn (i);
2751 rtx_insn *next = NEXT_INSN (insn);
2752 /* We loop in case any instruction in a delay slot gets
2753 split. */
2754 do
2755 insn = final_scan_insn (insn, file, 0, 1, seen);
2756 while (insn != next);
2757 }
2758 #ifdef DBR_OUTPUT_SEQEND
2759 DBR_OUTPUT_SEQEND (file);
2760 #endif
2761 final_sequence = 0;
2762
2763 /* If the insn requiring the delay slot was a CALL_INSN, the
2764 insns in the delay slot are actually executed before the
2765 called function. Hence we don't preserve any CC-setting
2766 actions in these insns and the CC must be marked as being
2767 clobbered by the function. */
2768 if (CALL_P (seq->insn (0)))
2769 {
2770 CC_STATUS_INIT;
2771 }
2772 break;
2773 }
2774
2775 /* We have a real machine instruction as rtl. */
2776
2777 body = PATTERN (insn);
2778
2779 #if HAVE_cc0
2780 set = single_set (insn);
2781
2782 /* Check for redundant test and compare instructions
2783 (when the condition codes are already set up as desired).
2784 This is done only when optimizing; if not optimizing,
2785 it should be possible for the user to alter a variable
2786 with the debugger in between statements
2787 and the next statement should reexamine the variable
2788 to compute the condition codes. */
2789
2790 if (optimize_p)
2791 {
2792 if (set
2793 && GET_CODE (SET_DEST (set)) == CC0
2794 && insn != last_ignored_compare)
2795 {
2796 rtx src1, src2;
2797 if (GET_CODE (SET_SRC (set)) == SUBREG)
2798 SET_SRC (set) = alter_subreg (&SET_SRC (set), true);
2799
2800 src1 = SET_SRC (set);
2801 src2 = NULL_RTX;
2802 if (GET_CODE (SET_SRC (set)) == COMPARE)
2803 {
2804 if (GET_CODE (XEXP (SET_SRC (set), 0)) == SUBREG)
2805 XEXP (SET_SRC (set), 0)
2806 = alter_subreg (&XEXP (SET_SRC (set), 0), true);
2807 if (GET_CODE (XEXP (SET_SRC (set), 1)) == SUBREG)
2808 XEXP (SET_SRC (set), 1)
2809 = alter_subreg (&XEXP (SET_SRC (set), 1), true);
2810 if (XEXP (SET_SRC (set), 1)
2811 == CONST0_RTX (GET_MODE (XEXP (SET_SRC (set), 0))))
2812 src2 = XEXP (SET_SRC (set), 0);
2813 }
2814 if ((cc_status.value1 != 0
2815 && rtx_equal_p (src1, cc_status.value1))
2816 || (cc_status.value2 != 0
2817 && rtx_equal_p (src1, cc_status.value2))
2818 || (src2 != 0 && cc_status.value1 != 0
2819 && rtx_equal_p (src2, cc_status.value1))
2820 || (src2 != 0 && cc_status.value2 != 0
2821 && rtx_equal_p (src2, cc_status.value2)))
2822 {
2823 /* Don't delete insn if it has an addressing side-effect. */
2824 if (! FIND_REG_INC_NOTE (insn, NULL_RTX)
2825 /* or if anything in it is volatile. */
2826 && ! volatile_refs_p (PATTERN (insn)))
2827 {
2828 /* We don't really delete the insn; just ignore it. */
2829 last_ignored_compare = insn;
2830 break;
2831 }
2832 }
2833 }
2834 }
2835
2836 /* If this is a conditional branch, maybe modify it
2837 if the cc's are in a nonstandard state
2838 so that it accomplishes the same thing that it would
2839 do straightforwardly if the cc's were set up normally. */
2840
2841 if (cc_status.flags != 0
2842 && JUMP_P (insn)
2843 && GET_CODE (body) == SET
2844 && SET_DEST (body) == pc_rtx
2845 && GET_CODE (SET_SRC (body)) == IF_THEN_ELSE
2846 && COMPARISON_P (XEXP (SET_SRC (body), 0))
2847 && XEXP (XEXP (SET_SRC (body), 0), 0) == cc0_rtx)
2848 {
2849 /* This function may alter the contents of its argument
2850 and clear some of the cc_status.flags bits.
2851 It may also return 1 meaning condition now always true
2852 or -1 meaning condition now always false
2853 or 2 meaning condition nontrivial but altered. */
2854 int result = alter_cond (XEXP (SET_SRC (body), 0));
2855 /* If condition now has fixed value, replace the IF_THEN_ELSE
2856 with its then-operand or its else-operand. */
2857 if (result == 1)
2858 SET_SRC (body) = XEXP (SET_SRC (body), 1);
2859 if (result == -1)
2860 SET_SRC (body) = XEXP (SET_SRC (body), 2);
2861
2862 /* The jump is now either unconditional or a no-op.
2863 If it has become a no-op, don't try to output it.
2864 (It would not be recognized.) */
2865 if (SET_SRC (body) == pc_rtx)
2866 {
2867 delete_insn (insn);
2868 break;
2869 }
2870 else if (ANY_RETURN_P (SET_SRC (body)))
2871 /* Replace (set (pc) (return)) with (return). */
2872 PATTERN (insn) = body = SET_SRC (body);
2873
2874 /* Rerecognize the instruction if it has changed. */
2875 if (result != 0)
2876 INSN_CODE (insn) = -1;
2877 }
2878
2879 /* If this is a conditional trap, maybe modify it if the cc's
2880 are in a nonstandard state so that it accomplishes the same
2881 thing that it would do straightforwardly if the cc's were
2882 set up normally. */
2883 if (cc_status.flags != 0
2884 && NONJUMP_INSN_P (insn)
2885 && GET_CODE (body) == TRAP_IF
2886 && COMPARISON_P (TRAP_CONDITION (body))
2887 && XEXP (TRAP_CONDITION (body), 0) == cc0_rtx)
2888 {
2889 /* This function may alter the contents of its argument
2890 and clear some of the cc_status.flags bits.
2891 It may also return 1 meaning condition now always true
2892 or -1 meaning condition now always false
2893 or 2 meaning condition nontrivial but altered. */
2894 int result = alter_cond (TRAP_CONDITION (body));
2895
2896 /* If TRAP_CONDITION has become always false, delete the
2897 instruction. */
2898 if (result == -1)
2899 {
2900 delete_insn (insn);
2901 break;
2902 }
2903
2904 /* If TRAP_CONDITION has become always true, replace
2905 TRAP_CONDITION with const_true_rtx. */
2906 if (result == 1)
2907 TRAP_CONDITION (body) = const_true_rtx;
2908
2909 /* Rerecognize the instruction if it has changed. */
2910 if (result != 0)
2911 INSN_CODE (insn) = -1;
2912 }
2913
2914 /* Make same adjustments to instructions that examine the
2915 condition codes without jumping and instructions that
2916 handle conditional moves (if this machine has either one). */
2917
2918 if (cc_status.flags != 0
2919 && set != 0)
2920 {
2921 rtx cond_rtx, then_rtx, else_rtx;
2922
2923 if (!JUMP_P (insn)
2924 && GET_CODE (SET_SRC (set)) == IF_THEN_ELSE)
2925 {
2926 cond_rtx = XEXP (SET_SRC (set), 0);
2927 then_rtx = XEXP (SET_SRC (set), 1);
2928 else_rtx = XEXP (SET_SRC (set), 2);
2929 }
2930 else
2931 {
2932 cond_rtx = SET_SRC (set);
2933 then_rtx = const_true_rtx;
2934 else_rtx = const0_rtx;
2935 }
2936
2937 if (COMPARISON_P (cond_rtx)
2938 && XEXP (cond_rtx, 0) == cc0_rtx)
2939 {
2940 int result;
2941 result = alter_cond (cond_rtx);
2942 if (result == 1)
2943 validate_change (insn, &SET_SRC (set), then_rtx, 0);
2944 else if (result == -1)
2945 validate_change (insn, &SET_SRC (set), else_rtx, 0);
2946 else if (result == 2)
2947 INSN_CODE (insn) = -1;
2948 if (SET_DEST (set) == SET_SRC (set))
2949 delete_insn (insn);
2950 }
2951 }
2952
2953 #endif
2954
2955 /* Do machine-specific peephole optimizations if desired. */
2956
2957 if (HAVE_peephole && optimize_p && !flag_no_peephole && !nopeepholes)
2958 {
2959 rtx_insn *next = peephole (insn);
2960 /* When peepholing, if there were notes within the peephole,
2961 emit them before the peephole. */
2962 if (next != 0 && next != NEXT_INSN (insn))
2963 {
2964 rtx_insn *note, *prev = PREV_INSN (insn);
2965
2966 for (note = NEXT_INSN (insn); note != next;
2967 note = NEXT_INSN (note))
2968 final_scan_insn (note, file, optimize_p, nopeepholes, seen);
2969
2970 /* Put the notes in the proper position for a later
2971 rescan. For example, the SH target can do this
2972 when generating a far jump in a delayed branch
2973 sequence. */
2974 note = NEXT_INSN (insn);
2975 SET_PREV_INSN (note) = prev;
2976 SET_NEXT_INSN (prev) = note;
2977 SET_NEXT_INSN (PREV_INSN (next)) = insn;
2978 SET_PREV_INSN (insn) = PREV_INSN (next);
2979 SET_NEXT_INSN (insn) = next;
2980 SET_PREV_INSN (next) = insn;
2981 }
2982
2983 /* PEEPHOLE might have changed this. */
2984 body = PATTERN (insn);
2985 }
2986
2987 /* Try to recognize the instruction.
2988 If successful, verify that the operands satisfy the
2989 constraints for the instruction. Crash if they don't,
2990 since `reload' should have changed them so that they do. */
2991
2992 insn_code_number = recog_memoized (insn);
2993 cleanup_subreg_operands (insn);
2994
2995 /* Dump the insn in the assembly for debugging (-dAP).
2996 If the final dump is requested as slim RTL, dump slim
2997 RTL to the assembly file also. */
2998 if (flag_dump_rtl_in_asm)
2999 {
3000 print_rtx_head = ASM_COMMENT_START;
3001 if (! (dump_flags & TDF_SLIM))
3002 print_rtl_single (asm_out_file, insn);
3003 else
3004 dump_insn_slim (asm_out_file, insn);
3005 print_rtx_head = "";
3006 }
3007
3008 if (! constrain_operands_cached (insn, 1))
3009 fatal_insn_not_found (insn);
3010
3011 /* Some target machines need to prescan each insn before
3012 it is output. */
3013
3014 #ifdef FINAL_PRESCAN_INSN
3015 FINAL_PRESCAN_INSN (insn, recog_data.operand, recog_data.n_operands);
3016 #endif
3017
3018 if (targetm.have_conditional_execution ()
3019 && GET_CODE (PATTERN (insn)) == COND_EXEC)
3020 current_insn_predicate = COND_EXEC_TEST (PATTERN (insn));
3021
3022 #if HAVE_cc0
3023 cc_prev_status = cc_status;
3024
3025 /* Update `cc_status' for this instruction.
3026 The instruction's output routine may change it further.
3027 If the output routine for a jump insn needs to depend
3028 on the cc status, it should look at cc_prev_status. */
3029
3030 NOTICE_UPDATE_CC (body, insn);
3031 #endif
3032
3033 current_output_insn = debug_insn = insn;
3034
3035 /* Find the proper template for this insn. */
3036 templ = get_insn_template (insn_code_number, insn);
3037
3038 /* If the C code returns 0, it means that it is a jump insn
3039 which follows a deleted test insn, and that test insn
3040 needs to be reinserted. */
3041 if (templ == 0)
3042 {
3043 rtx_insn *prev;
3044
3045 gcc_assert (prev_nonnote_insn (insn) == last_ignored_compare);
3046
3047 /* We have already processed the notes between the setter and
3048 the user. Make sure we don't process them again, this is
3049 particularly important if one of the notes is a block
3050 scope note or an EH note. */
3051 for (prev = insn;
3052 prev != last_ignored_compare;
3053 prev = PREV_INSN (prev))
3054 {
3055 if (NOTE_P (prev))
3056 delete_insn (prev); /* Use delete_note. */
3057 }
3058
3059 return prev;
3060 }
3061
3062 /* If the template is the string "#", it means that this insn must
3063 be split. */
3064 if (templ[0] == '#' && templ[1] == '\0')
3065 {
3066 rtx_insn *new_rtx = try_split (body, insn, 0);
3067
3068 /* If we didn't split the insn, go away. */
3069 if (new_rtx == insn && PATTERN (new_rtx) == body)
3070 fatal_insn ("could not split insn", insn);
3071
3072 /* If we have a length attribute, this instruction should have
3073 been split in shorten_branches, to ensure that we would have
3074 valid length info for the splitees. */
3075 gcc_assert (!HAVE_ATTR_length);
3076
3077 return new_rtx;
3078 }
3079
3080 /* ??? This will put the directives in the wrong place if
3081 get_insn_template outputs assembly directly. However calling it
3082 before get_insn_template breaks if the insns is split. */
3083 if (targetm.asm_out.unwind_emit_before_insn
3084 && targetm.asm_out.unwind_emit)
3085 targetm.asm_out.unwind_emit (asm_out_file, insn);
3086
3087 rtx_call_insn *call_insn = dyn_cast <rtx_call_insn *> (insn);
3088 if (call_insn != NULL)
3089 {
3090 rtx x = call_from_call_insn (call_insn);
3091 x = XEXP (x, 0);
3092 if (x && MEM_P (x) && GET_CODE (XEXP (x, 0)) == SYMBOL_REF)
3093 {
3094 tree t;
3095 x = XEXP (x, 0);
3096 t = SYMBOL_REF_DECL (x);
3097 if (t)
3098 assemble_external (t);
3099 }
3100 }
3101
3102 /* Output assembler code from the template. */
3103 output_asm_insn (templ, recog_data.operand);
3104
3105 /* Some target machines need to postscan each insn after
3106 it is output. */
3107 if (targetm.asm_out.final_postscan_insn)
3108 targetm.asm_out.final_postscan_insn (file, insn, recog_data.operand,
3109 recog_data.n_operands);
3110
3111 if (!targetm.asm_out.unwind_emit_before_insn
3112 && targetm.asm_out.unwind_emit)
3113 targetm.asm_out.unwind_emit (asm_out_file, insn);
3114
3115 /* Let the debug info back-end know about this call. We do this only
3116 after the instruction has been emitted because labels that may be
3117 created to reference the call instruction must appear after it. */
3118 if ((debug_variable_location_views || call_insn != NULL)
3119 && !DECL_IGNORED_P (current_function_decl))
3120 debug_hooks->var_location (insn);
3121
3122 current_output_insn = debug_insn = 0;
3123 }
3124 }
3125 return NEXT_INSN (insn);
3126 }
3127
3128 /* This is a wrapper around final_scan_insn_1 that allows ports to
3129 call it recursively without a known value for SEEN. The value is
3130 saved at the outermost call, and recovered for recursive calls.
3131 Recursive calls MUST pass NULL, or the same pointer if they can
3132 otherwise get to it. */
3133
3134 rtx_insn *
3135 final_scan_insn (rtx_insn *insn, FILE *file, int optimize_p,
3136 int nopeepholes, int *seen)
3137 {
3138 static int *enclosing_seen;
3139 static int recursion_counter;
3140
3141 gcc_assert (seen || recursion_counter);
3142 gcc_assert (!recursion_counter || !seen || seen == enclosing_seen);
3143
3144 if (!recursion_counter++)
3145 enclosing_seen = seen;
3146 else if (!seen)
3147 seen = enclosing_seen;
3148
3149 rtx_insn *ret = final_scan_insn_1 (insn, file, optimize_p, nopeepholes, seen);
3150
3151 if (!--recursion_counter)
3152 enclosing_seen = NULL;
3153
3154 return ret;
3155 }
3156
3157 \f
3158
3159 /* Map DECLs to instance discriminators. This is allocated and
3160 defined in ada/gcc-interfaces/trans.c, when compiling with -gnateS.
3161 Mappings from this table are saved and restored for LTO, so
3162 link-time compilation will have this map set, at least in
3163 partitions containing at least one DECL with an associated instance
3164 discriminator. */
3165
3166 decl_to_instance_map_t *decl_to_instance_map;
3167
3168 /* Return the instance number assigned to DECL. */
3169
3170 static inline int
3171 map_decl_to_instance (const_tree decl)
3172 {
3173 int *inst;
3174
3175 if (!decl_to_instance_map || !decl || !DECL_P (decl))
3176 return 0;
3177
3178 inst = decl_to_instance_map->get (decl);
3179
3180 if (!inst)
3181 return 0;
3182
3183 return *inst;
3184 }
3185
3186 /* Set DISCRIMINATOR to the appropriate value, possibly derived from LOC. */
3187
3188 static inline void
3189 maybe_set_discriminator (location_t loc)
3190 {
3191 if (!decl_to_instance_map)
3192 discriminator = bb_discriminator;
3193 else
3194 {
3195 tree block = LOCATION_BLOCK (loc);
3196
3197 while (block && TREE_CODE (block) == BLOCK
3198 && !inlined_function_outer_scope_p (block))
3199 block = BLOCK_SUPERCONTEXT (block);
3200
3201 tree decl;
3202
3203 if (!block)
3204 decl = current_function_decl;
3205 else if (DECL_P (block))
3206 decl = block;
3207 else
3208 decl = block_ultimate_origin (block);
3209
3210 discriminator = map_decl_to_instance (decl);
3211 }
3212 }
3213
3214 /* Return whether a source line note needs to be emitted before INSN.
3215 Sets IS_STMT to TRUE if the line should be marked as a possible
3216 breakpoint location. */
3217
3218 static bool
3219 notice_source_line (rtx_insn *insn, bool *is_stmt)
3220 {
3221 const char *filename;
3222 int linenum, columnnum;
3223
3224 if (NOTE_MARKER_P (insn))
3225 {
3226 location_t loc = NOTE_MARKER_LOCATION (insn);
3227 expanded_location xloc = expand_location (loc);
3228 if (xloc.line == 0)
3229 {
3230 gcc_checking_assert (LOCATION_LOCUS (loc) == UNKNOWN_LOCATION
3231 || LOCATION_LOCUS (loc) == BUILTINS_LOCATION);
3232 return false;
3233 }
3234 filename = xloc.file;
3235 linenum = xloc.line;
3236 columnnum = xloc.column;
3237 maybe_set_discriminator (loc);
3238 force_source_line = true;
3239 }
3240 else if (override_filename)
3241 {
3242 filename = override_filename;
3243 linenum = override_linenum;
3244 columnnum = override_columnnum;
3245 }
3246 else if (INSN_HAS_LOCATION (insn))
3247 {
3248 expanded_location xloc = insn_location (insn);
3249 filename = xloc.file;
3250 linenum = xloc.line;
3251 columnnum = xloc.column;
3252 maybe_set_discriminator (INSN_LOCATION (insn));
3253 }
3254 else
3255 {
3256 filename = NULL;
3257 linenum = 0;
3258 columnnum = 0;
3259 }
3260
3261 if (filename == NULL)
3262 return false;
3263
3264 if (force_source_line
3265 || filename != last_filename
3266 || last_linenum != linenum
3267 || (debug_column_info && last_columnnum != columnnum))
3268 {
3269 force_source_line = false;
3270 last_filename = filename;
3271 last_linenum = linenum;
3272 last_columnnum = columnnum;
3273 last_discriminator = discriminator;
3274 if (is_stmt)
3275 *is_stmt = true;
3276 high_block_linenum = MAX (last_linenum, high_block_linenum);
3277 high_function_linenum = MAX (last_linenum, high_function_linenum);
3278 return true;
3279 }
3280
3281 if (SUPPORTS_DISCRIMINATOR && last_discriminator != discriminator)
3282 {
3283 /* If the discriminator changed, but the line number did not,
3284 output the line table entry with is_stmt false so the
3285 debugger does not treat this as a breakpoint location. */
3286 last_discriminator = discriminator;
3287 if (is_stmt)
3288 *is_stmt = false;
3289 return true;
3290 }
3291
3292 return false;
3293 }
3294 \f
3295 /* For each operand in INSN, simplify (subreg (reg)) so that it refers
3296 directly to the desired hard register. */
3297
3298 void
3299 cleanup_subreg_operands (rtx_insn *insn)
3300 {
3301 int i;
3302 bool changed = false;
3303 extract_insn_cached (insn);
3304 for (i = 0; i < recog_data.n_operands; i++)
3305 {
3306 /* The following test cannot use recog_data.operand when testing
3307 for a SUBREG: the underlying object might have been changed
3308 already if we are inside a match_operator expression that
3309 matches the else clause. Instead we test the underlying
3310 expression directly. */
3311 if (GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
3312 {
3313 recog_data.operand[i] = alter_subreg (recog_data.operand_loc[i], true);
3314 changed = true;
3315 }
3316 else if (GET_CODE (recog_data.operand[i]) == PLUS
3317 || GET_CODE (recog_data.operand[i]) == MULT
3318 || MEM_P (recog_data.operand[i]))
3319 recog_data.operand[i] = walk_alter_subreg (recog_data.operand_loc[i], &changed);
3320 }
3321
3322 for (i = 0; i < recog_data.n_dups; i++)
3323 {
3324 if (GET_CODE (*recog_data.dup_loc[i]) == SUBREG)
3325 {
3326 *recog_data.dup_loc[i] = alter_subreg (recog_data.dup_loc[i], true);
3327 changed = true;
3328 }
3329 else if (GET_CODE (*recog_data.dup_loc[i]) == PLUS
3330 || GET_CODE (*recog_data.dup_loc[i]) == MULT
3331 || MEM_P (*recog_data.dup_loc[i]))
3332 *recog_data.dup_loc[i] = walk_alter_subreg (recog_data.dup_loc[i], &changed);
3333 }
3334 if (changed)
3335 df_insn_rescan (insn);
3336 }
3337
3338 /* If X is a SUBREG, try to replace it with a REG or a MEM, based on
3339 the thing it is a subreg of. Do it anyway if FINAL_P. */
3340
3341 rtx
3342 alter_subreg (rtx *xp, bool final_p)
3343 {
3344 rtx x = *xp;
3345 rtx y = SUBREG_REG (x);
3346
3347 /* simplify_subreg does not remove subreg from volatile references.
3348 We are required to. */
3349 if (MEM_P (y))
3350 {
3351 poly_int64 offset = SUBREG_BYTE (x);
3352
3353 /* For paradoxical subregs on big-endian machines, SUBREG_BYTE
3354 contains 0 instead of the proper offset. See simplify_subreg. */
3355 if (paradoxical_subreg_p (x))
3356 offset = byte_lowpart_offset (GET_MODE (x), GET_MODE (y));
3357
3358 if (final_p)
3359 *xp = adjust_address (y, GET_MODE (x), offset);
3360 else
3361 *xp = adjust_address_nv (y, GET_MODE (x), offset);
3362 }
3363 else if (REG_P (y) && HARD_REGISTER_P (y))
3364 {
3365 rtx new_rtx = simplify_subreg (GET_MODE (x), y, GET_MODE (y),
3366 SUBREG_BYTE (x));
3367
3368 if (new_rtx != 0)
3369 *xp = new_rtx;
3370 else if (final_p && REG_P (y))
3371 {
3372 /* Simplify_subreg can't handle some REG cases, but we have to. */
3373 unsigned int regno;
3374 poly_int64 offset;
3375
3376 regno = subreg_regno (x);
3377 if (subreg_lowpart_p (x))
3378 offset = byte_lowpart_offset (GET_MODE (x), GET_MODE (y));
3379 else
3380 offset = SUBREG_BYTE (x);
3381 *xp = gen_rtx_REG_offset (y, GET_MODE (x), regno, offset);
3382 }
3383 }
3384
3385 return *xp;
3386 }
3387
3388 /* Do alter_subreg on all the SUBREGs contained in X. */
3389
3390 static rtx
3391 walk_alter_subreg (rtx *xp, bool *changed)
3392 {
3393 rtx x = *xp;
3394 switch (GET_CODE (x))
3395 {
3396 case PLUS:
3397 case MULT:
3398 case AND:
3399 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed);
3400 XEXP (x, 1) = walk_alter_subreg (&XEXP (x, 1), changed);
3401 break;
3402
3403 case MEM:
3404 case ZERO_EXTEND:
3405 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed);
3406 break;
3407
3408 case SUBREG:
3409 *changed = true;
3410 return alter_subreg (xp, true);
3411
3412 default:
3413 break;
3414 }
3415
3416 return *xp;
3417 }
3418 \f
3419 #if HAVE_cc0
3420
3421 /* Given BODY, the body of a jump instruction, alter the jump condition
3422 as required by the bits that are set in cc_status.flags.
3423 Not all of the bits there can be handled at this level in all cases.
3424
3425 The value is normally 0.
3426 1 means that the condition has become always true.
3427 -1 means that the condition has become always false.
3428 2 means that COND has been altered. */
3429
3430 static int
3431 alter_cond (rtx cond)
3432 {
3433 int value = 0;
3434
3435 if (cc_status.flags & CC_REVERSED)
3436 {
3437 value = 2;
3438 PUT_CODE (cond, swap_condition (GET_CODE (cond)));
3439 }
3440
3441 if (cc_status.flags & CC_INVERTED)
3442 {
3443 value = 2;
3444 PUT_CODE (cond, reverse_condition (GET_CODE (cond)));
3445 }
3446
3447 if (cc_status.flags & CC_NOT_POSITIVE)
3448 switch (GET_CODE (cond))
3449 {
3450 case LE:
3451 case LEU:
3452 case GEU:
3453 /* Jump becomes unconditional. */
3454 return 1;
3455
3456 case GT:
3457 case GTU:
3458 case LTU:
3459 /* Jump becomes no-op. */
3460 return -1;
3461
3462 case GE:
3463 PUT_CODE (cond, EQ);
3464 value = 2;
3465 break;
3466
3467 case LT:
3468 PUT_CODE (cond, NE);
3469 value = 2;
3470 break;
3471
3472 default:
3473 break;
3474 }
3475
3476 if (cc_status.flags & CC_NOT_NEGATIVE)
3477 switch (GET_CODE (cond))
3478 {
3479 case GE:
3480 case GEU:
3481 /* Jump becomes unconditional. */
3482 return 1;
3483
3484 case LT:
3485 case LTU:
3486 /* Jump becomes no-op. */
3487 return -1;
3488
3489 case LE:
3490 case LEU:
3491 PUT_CODE (cond, EQ);
3492 value = 2;
3493 break;
3494
3495 case GT:
3496 case GTU:
3497 PUT_CODE (cond, NE);
3498 value = 2;
3499 break;
3500
3501 default:
3502 break;
3503 }
3504
3505 if (cc_status.flags & CC_NO_OVERFLOW)
3506 switch (GET_CODE (cond))
3507 {
3508 case GEU:
3509 /* Jump becomes unconditional. */
3510 return 1;
3511
3512 case LEU:
3513 PUT_CODE (cond, EQ);
3514 value = 2;
3515 break;
3516
3517 case GTU:
3518 PUT_CODE (cond, NE);
3519 value = 2;
3520 break;
3521
3522 case LTU:
3523 /* Jump becomes no-op. */
3524 return -1;
3525
3526 default:
3527 break;
3528 }
3529
3530 if (cc_status.flags & (CC_Z_IN_NOT_N | CC_Z_IN_N))
3531 switch (GET_CODE (cond))
3532 {
3533 default:
3534 gcc_unreachable ();
3535
3536 case NE:
3537 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? GE : LT);
3538 value = 2;
3539 break;
3540
3541 case EQ:
3542 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? LT : GE);
3543 value = 2;
3544 break;
3545 }
3546
3547 if (cc_status.flags & CC_NOT_SIGNED)
3548 /* The flags are valid if signed condition operators are converted
3549 to unsigned. */
3550 switch (GET_CODE (cond))
3551 {
3552 case LE:
3553 PUT_CODE (cond, LEU);
3554 value = 2;
3555 break;
3556
3557 case LT:
3558 PUT_CODE (cond, LTU);
3559 value = 2;
3560 break;
3561
3562 case GT:
3563 PUT_CODE (cond, GTU);
3564 value = 2;
3565 break;
3566
3567 case GE:
3568 PUT_CODE (cond, GEU);
3569 value = 2;
3570 break;
3571
3572 default:
3573 break;
3574 }
3575
3576 return value;
3577 }
3578 #endif
3579 \f
3580 /* Report inconsistency between the assembler template and the operands.
3581 In an `asm', it's the user's fault; otherwise, the compiler's fault. */
3582
3583 void
3584 output_operand_lossage (const char *cmsgid, ...)
3585 {
3586 char *fmt_string;
3587 char *new_message;
3588 const char *pfx_str;
3589 va_list ap;
3590
3591 va_start (ap, cmsgid);
3592
3593 pfx_str = this_is_asm_operands ? _("invalid 'asm': ") : "output_operand: ";
3594 fmt_string = xasprintf ("%s%s", pfx_str, _(cmsgid));
3595 new_message = xvasprintf (fmt_string, ap);
3596
3597 if (this_is_asm_operands)
3598 error_for_asm (this_is_asm_operands, "%s", new_message);
3599 else
3600 internal_error ("%s", new_message);
3601
3602 free (fmt_string);
3603 free (new_message);
3604 va_end (ap);
3605 }
3606 \f
3607 /* Output of assembler code from a template, and its subroutines. */
3608
3609 /* Annotate the assembly with a comment describing the pattern and
3610 alternative used. */
3611
3612 static void
3613 output_asm_name (void)
3614 {
3615 if (debug_insn)
3616 {
3617 fprintf (asm_out_file, "\t%s %d\t",
3618 ASM_COMMENT_START, INSN_UID (debug_insn));
3619
3620 fprintf (asm_out_file, "[c=%d",
3621 insn_cost (debug_insn, optimize_insn_for_speed_p ()));
3622 if (HAVE_ATTR_length)
3623 fprintf (asm_out_file, " l=%d",
3624 get_attr_length (debug_insn));
3625 fprintf (asm_out_file, "] ");
3626
3627 int num = INSN_CODE (debug_insn);
3628 fprintf (asm_out_file, "%s", insn_data[num].name);
3629 if (insn_data[num].n_alternatives > 1)
3630 fprintf (asm_out_file, "/%d", which_alternative);
3631
3632 /* Clear this so only the first assembler insn
3633 of any rtl insn will get the special comment for -dp. */
3634 debug_insn = 0;
3635 }
3636 }
3637
3638 /* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it
3639 or its address, return that expr . Set *PADDRESSP to 1 if the expr
3640 corresponds to the address of the object and 0 if to the object. */
3641
3642 static tree
3643 get_mem_expr_from_op (rtx op, int *paddressp)
3644 {
3645 tree expr;
3646 int inner_addressp;
3647
3648 *paddressp = 0;
3649
3650 if (REG_P (op))
3651 return REG_EXPR (op);
3652 else if (!MEM_P (op))
3653 return 0;
3654
3655 if (MEM_EXPR (op) != 0)
3656 return MEM_EXPR (op);
3657
3658 /* Otherwise we have an address, so indicate it and look at the address. */
3659 *paddressp = 1;
3660 op = XEXP (op, 0);
3661
3662 /* First check if we have a decl for the address, then look at the right side
3663 if it is a PLUS. Otherwise, strip off arithmetic and keep looking.
3664 But don't allow the address to itself be indirect. */
3665 if ((expr = get_mem_expr_from_op (op, &inner_addressp)) && ! inner_addressp)
3666 return expr;
3667 else if (GET_CODE (op) == PLUS
3668 && (expr = get_mem_expr_from_op (XEXP (op, 1), &inner_addressp)))
3669 return expr;
3670
3671 while (UNARY_P (op)
3672 || GET_RTX_CLASS (GET_CODE (op)) == RTX_BIN_ARITH)
3673 op = XEXP (op, 0);
3674
3675 expr = get_mem_expr_from_op (op, &inner_addressp);
3676 return inner_addressp ? 0 : expr;
3677 }
3678
3679 /* Output operand names for assembler instructions. OPERANDS is the
3680 operand vector, OPORDER is the order to write the operands, and NOPS
3681 is the number of operands to write. */
3682
3683 static void
3684 output_asm_operand_names (rtx *operands, int *oporder, int nops)
3685 {
3686 int wrote = 0;
3687 int i;
3688
3689 for (i = 0; i < nops; i++)
3690 {
3691 int addressp;
3692 rtx op = operands[oporder[i]];
3693 tree expr = get_mem_expr_from_op (op, &addressp);
3694
3695 fprintf (asm_out_file, "%c%s",
3696 wrote ? ',' : '\t', wrote ? "" : ASM_COMMENT_START);
3697 wrote = 1;
3698 if (expr)
3699 {
3700 fprintf (asm_out_file, "%s",
3701 addressp ? "*" : "");
3702 print_mem_expr (asm_out_file, expr);
3703 wrote = 1;
3704 }
3705 else if (REG_P (op) && ORIGINAL_REGNO (op)
3706 && ORIGINAL_REGNO (op) != REGNO (op))
3707 fprintf (asm_out_file, " tmp%i", ORIGINAL_REGNO (op));
3708 }
3709 }
3710
3711 #ifdef ASSEMBLER_DIALECT
3712 /* Helper function to parse assembler dialects in the asm string.
3713 This is called from output_asm_insn and asm_fprintf. */
3714 static const char *
3715 do_assembler_dialects (const char *p, int *dialect)
3716 {
3717 char c = *(p - 1);
3718
3719 switch (c)
3720 {
3721 case '{':
3722 {
3723 int i;
3724
3725 if (*dialect)
3726 output_operand_lossage ("nested assembly dialect alternatives");
3727 else
3728 *dialect = 1;
3729
3730 /* If we want the first dialect, do nothing. Otherwise, skip
3731 DIALECT_NUMBER of strings ending with '|'. */
3732 for (i = 0; i < dialect_number; i++)
3733 {
3734 while (*p && *p != '}')
3735 {
3736 if (*p == '|')
3737 {
3738 p++;
3739 break;
3740 }
3741
3742 /* Skip over any character after a percent sign. */
3743 if (*p == '%')
3744 p++;
3745 if (*p)
3746 p++;
3747 }
3748
3749 if (*p == '}')
3750 break;
3751 }
3752
3753 if (*p == '\0')
3754 output_operand_lossage ("unterminated assembly dialect alternative");
3755 }
3756 break;
3757
3758 case '|':
3759 if (*dialect)
3760 {
3761 /* Skip to close brace. */
3762 do
3763 {
3764 if (*p == '\0')
3765 {
3766 output_operand_lossage ("unterminated assembly dialect alternative");
3767 break;
3768 }
3769
3770 /* Skip over any character after a percent sign. */
3771 if (*p == '%' && p[1])
3772 {
3773 p += 2;
3774 continue;
3775 }
3776
3777 if (*p++ == '}')
3778 break;
3779 }
3780 while (1);
3781
3782 *dialect = 0;
3783 }
3784 else
3785 putc (c, asm_out_file);
3786 break;
3787
3788 case '}':
3789 if (! *dialect)
3790 putc (c, asm_out_file);
3791 *dialect = 0;
3792 break;
3793 default:
3794 gcc_unreachable ();
3795 }
3796
3797 return p;
3798 }
3799 #endif
3800
3801 /* Output text from TEMPLATE to the assembler output file,
3802 obeying %-directions to substitute operands taken from
3803 the vector OPERANDS.
3804
3805 %N (for N a digit) means print operand N in usual manner.
3806 %lN means require operand N to be a CODE_LABEL or LABEL_REF
3807 and print the label name with no punctuation.
3808 %cN means require operand N to be a constant
3809 and print the constant expression with no punctuation.
3810 %aN means expect operand N to be a memory address
3811 (not a memory reference!) and print a reference
3812 to that address.
3813 %nN means expect operand N to be a constant
3814 and print a constant expression for minus the value
3815 of the operand, with no other punctuation. */
3816
3817 void
3818 output_asm_insn (const char *templ, rtx *operands)
3819 {
3820 const char *p;
3821 int c;
3822 #ifdef ASSEMBLER_DIALECT
3823 int dialect = 0;
3824 #endif
3825 int oporder[MAX_RECOG_OPERANDS];
3826 char opoutput[MAX_RECOG_OPERANDS];
3827 int ops = 0;
3828
3829 /* An insn may return a null string template
3830 in a case where no assembler code is needed. */
3831 if (*templ == 0)
3832 return;
3833
3834 memset (opoutput, 0, sizeof opoutput);
3835 p = templ;
3836 putc ('\t', asm_out_file);
3837
3838 #ifdef ASM_OUTPUT_OPCODE
3839 ASM_OUTPUT_OPCODE (asm_out_file, p);
3840 #endif
3841
3842 while ((c = *p++))
3843 switch (c)
3844 {
3845 case '\n':
3846 if (flag_verbose_asm)
3847 output_asm_operand_names (operands, oporder, ops);
3848 if (flag_print_asm_name)
3849 output_asm_name ();
3850
3851 ops = 0;
3852 memset (opoutput, 0, sizeof opoutput);
3853
3854 putc (c, asm_out_file);
3855 #ifdef ASM_OUTPUT_OPCODE
3856 while ((c = *p) == '\t')
3857 {
3858 putc (c, asm_out_file);
3859 p++;
3860 }
3861 ASM_OUTPUT_OPCODE (asm_out_file, p);
3862 #endif
3863 break;
3864
3865 #ifdef ASSEMBLER_DIALECT
3866 case '{':
3867 case '}':
3868 case '|':
3869 p = do_assembler_dialects (p, &dialect);
3870 break;
3871 #endif
3872
3873 case '%':
3874 /* %% outputs a single %. %{, %} and %| print {, } and | respectively
3875 if ASSEMBLER_DIALECT defined and these characters have a special
3876 meaning as dialect delimiters.*/
3877 if (*p == '%'
3878 #ifdef ASSEMBLER_DIALECT
3879 || *p == '{' || *p == '}' || *p == '|'
3880 #endif
3881 )
3882 {
3883 putc (*p, asm_out_file);
3884 p++;
3885 }
3886 /* %= outputs a number which is unique to each insn in the entire
3887 compilation. This is useful for making local labels that are
3888 referred to more than once in a given insn. */
3889 else if (*p == '=')
3890 {
3891 p++;
3892 fprintf (asm_out_file, "%d", insn_counter);
3893 }
3894 /* % followed by a letter and some digits
3895 outputs an operand in a special way depending on the letter.
3896 Letters `acln' are implemented directly.
3897 Other letters are passed to `output_operand' so that
3898 the TARGET_PRINT_OPERAND hook can define them. */
3899 else if (ISALPHA (*p))
3900 {
3901 int letter = *p++;
3902 unsigned long opnum;
3903 char *endptr;
3904
3905 opnum = strtoul (p, &endptr, 10);
3906
3907 if (endptr == p)
3908 output_operand_lossage ("operand number missing "
3909 "after %%-letter");
3910 else if (this_is_asm_operands && opnum >= insn_noperands)
3911 output_operand_lossage ("operand number out of range");
3912 else if (letter == 'l')
3913 output_asm_label (operands[opnum]);
3914 else if (letter == 'a')
3915 output_address (VOIDmode, operands[opnum]);
3916 else if (letter == 'c')
3917 {
3918 if (CONSTANT_ADDRESS_P (operands[opnum]))
3919 output_addr_const (asm_out_file, operands[opnum]);
3920 else
3921 output_operand (operands[opnum], 'c');
3922 }
3923 else if (letter == 'n')
3924 {
3925 if (CONST_INT_P (operands[opnum]))
3926 fprintf (asm_out_file, HOST_WIDE_INT_PRINT_DEC,
3927 - INTVAL (operands[opnum]));
3928 else
3929 {
3930 putc ('-', asm_out_file);
3931 output_addr_const (asm_out_file, operands[opnum]);
3932 }
3933 }
3934 else
3935 output_operand (operands[opnum], letter);
3936
3937 if (!opoutput[opnum])
3938 oporder[ops++] = opnum;
3939 opoutput[opnum] = 1;
3940
3941 p = endptr;
3942 c = *p;
3943 }
3944 /* % followed by a digit outputs an operand the default way. */
3945 else if (ISDIGIT (*p))
3946 {
3947 unsigned long opnum;
3948 char *endptr;
3949
3950 opnum = strtoul (p, &endptr, 10);
3951 if (this_is_asm_operands && opnum >= insn_noperands)
3952 output_operand_lossage ("operand number out of range");
3953 else
3954 output_operand (operands[opnum], 0);
3955
3956 if (!opoutput[opnum])
3957 oporder[ops++] = opnum;
3958 opoutput[opnum] = 1;
3959
3960 p = endptr;
3961 c = *p;
3962 }
3963 /* % followed by punctuation: output something for that
3964 punctuation character alone, with no operand. The
3965 TARGET_PRINT_OPERAND hook decides what is actually done. */
3966 else if (targetm.asm_out.print_operand_punct_valid_p ((unsigned char) *p))
3967 output_operand (NULL_RTX, *p++);
3968 else
3969 output_operand_lossage ("invalid %%-code");
3970 break;
3971
3972 default:
3973 putc (c, asm_out_file);
3974 }
3975
3976 /* Try to keep the asm a bit more readable. */
3977 if ((flag_verbose_asm || flag_print_asm_name) && strlen (templ) < 9)
3978 putc ('\t', asm_out_file);
3979
3980 /* Write out the variable names for operands, if we know them. */
3981 if (flag_verbose_asm)
3982 output_asm_operand_names (operands, oporder, ops);
3983 if (flag_print_asm_name)
3984 output_asm_name ();
3985
3986 putc ('\n', asm_out_file);
3987 }
3988 \f
3989 /* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */
3990
3991 void
3992 output_asm_label (rtx x)
3993 {
3994 char buf[256];
3995
3996 if (GET_CODE (x) == LABEL_REF)
3997 x = label_ref_label (x);
3998 if (LABEL_P (x)
3999 || (NOTE_P (x)
4000 && NOTE_KIND (x) == NOTE_INSN_DELETED_LABEL))
4001 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
4002 else
4003 output_operand_lossage ("'%%l' operand isn't a label");
4004
4005 assemble_name (asm_out_file, buf);
4006 }
4007
4008 /* Marks SYMBOL_REFs in x as referenced through use of assemble_external. */
4009
4010 void
4011 mark_symbol_refs_as_used (rtx x)
4012 {
4013 subrtx_iterator::array_type array;
4014 FOR_EACH_SUBRTX (iter, array, x, ALL)
4015 {
4016 const_rtx x = *iter;
4017 if (GET_CODE (x) == SYMBOL_REF)
4018 if (tree t = SYMBOL_REF_DECL (x))
4019 assemble_external (t);
4020 }
4021 }
4022
4023 /* Print operand X using machine-dependent assembler syntax.
4024 CODE is a non-digit that preceded the operand-number in the % spec,
4025 such as 'z' if the spec was `%z3'. CODE is 0 if there was no char
4026 between the % and the digits.
4027 When CODE is a non-letter, X is 0.
4028
4029 The meanings of the letters are machine-dependent and controlled
4030 by TARGET_PRINT_OPERAND. */
4031
4032 void
4033 output_operand (rtx x, int code ATTRIBUTE_UNUSED)
4034 {
4035 if (x && GET_CODE (x) == SUBREG)
4036 x = alter_subreg (&x, true);
4037
4038 /* X must not be a pseudo reg. */
4039 if (!targetm.no_register_allocation)
4040 gcc_assert (!x || !REG_P (x) || REGNO (x) < FIRST_PSEUDO_REGISTER);
4041
4042 targetm.asm_out.print_operand (asm_out_file, x, code);
4043
4044 if (x == NULL_RTX)
4045 return;
4046
4047 mark_symbol_refs_as_used (x);
4048 }
4049
4050 /* Print a memory reference operand for address X using
4051 machine-dependent assembler syntax. */
4052
4053 void
4054 output_address (machine_mode mode, rtx x)
4055 {
4056 bool changed = false;
4057 walk_alter_subreg (&x, &changed);
4058 targetm.asm_out.print_operand_address (asm_out_file, mode, x);
4059 }
4060 \f
4061 /* Print an integer constant expression in assembler syntax.
4062 Addition and subtraction are the only arithmetic
4063 that may appear in these expressions. */
4064
4065 void
4066 output_addr_const (FILE *file, rtx x)
4067 {
4068 char buf[256];
4069
4070 restart:
4071 switch (GET_CODE (x))
4072 {
4073 case PC:
4074 putc ('.', file);
4075 break;
4076
4077 case SYMBOL_REF:
4078 if (SYMBOL_REF_DECL (x))
4079 assemble_external (SYMBOL_REF_DECL (x));
4080 #ifdef ASM_OUTPUT_SYMBOL_REF
4081 ASM_OUTPUT_SYMBOL_REF (file, x);
4082 #else
4083 assemble_name (file, XSTR (x, 0));
4084 #endif
4085 break;
4086
4087 case LABEL_REF:
4088 x = label_ref_label (x);
4089 /* Fall through. */
4090 case CODE_LABEL:
4091 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
4092 #ifdef ASM_OUTPUT_LABEL_REF
4093 ASM_OUTPUT_LABEL_REF (file, buf);
4094 #else
4095 assemble_name (file, buf);
4096 #endif
4097 break;
4098
4099 case CONST_INT:
4100 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x));
4101 break;
4102
4103 case CONST:
4104 /* This used to output parentheses around the expression,
4105 but that does not work on the 386 (either ATT or BSD assembler). */
4106 output_addr_const (file, XEXP (x, 0));
4107 break;
4108
4109 case CONST_WIDE_INT:
4110 /* We do not know the mode here so we have to use a round about
4111 way to build a wide-int to get it printed properly. */
4112 {
4113 wide_int w = wide_int::from_array (&CONST_WIDE_INT_ELT (x, 0),
4114 CONST_WIDE_INT_NUNITS (x),
4115 CONST_WIDE_INT_NUNITS (x)
4116 * HOST_BITS_PER_WIDE_INT,
4117 false);
4118 print_decs (w, file);
4119 }
4120 break;
4121
4122 case CONST_DOUBLE:
4123 if (CONST_DOUBLE_AS_INT_P (x))
4124 {
4125 /* We can use %d if the number is one word and positive. */
4126 if (CONST_DOUBLE_HIGH (x))
4127 fprintf (file, HOST_WIDE_INT_PRINT_DOUBLE_HEX,
4128 (unsigned HOST_WIDE_INT) CONST_DOUBLE_HIGH (x),
4129 (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (x));
4130 else if (CONST_DOUBLE_LOW (x) < 0)
4131 fprintf (file, HOST_WIDE_INT_PRINT_HEX,
4132 (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (x));
4133 else
4134 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x));
4135 }
4136 else
4137 /* We can't handle floating point constants;
4138 PRINT_OPERAND must handle them. */
4139 output_operand_lossage ("floating constant misused");
4140 break;
4141
4142 case CONST_FIXED:
4143 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_FIXED_VALUE_LOW (x));
4144 break;
4145
4146 case PLUS:
4147 /* Some assemblers need integer constants to appear last (eg masm). */
4148 if (CONST_INT_P (XEXP (x, 0)))
4149 {
4150 output_addr_const (file, XEXP (x, 1));
4151 if (INTVAL (XEXP (x, 0)) >= 0)
4152 fprintf (file, "+");
4153 output_addr_const (file, XEXP (x, 0));
4154 }
4155 else
4156 {
4157 output_addr_const (file, XEXP (x, 0));
4158 if (!CONST_INT_P (XEXP (x, 1))
4159 || INTVAL (XEXP (x, 1)) >= 0)
4160 fprintf (file, "+");
4161 output_addr_const (file, XEXP (x, 1));
4162 }
4163 break;
4164
4165 case MINUS:
4166 /* Avoid outputting things like x-x or x+5-x,
4167 since some assemblers can't handle that. */
4168 x = simplify_subtraction (x);
4169 if (GET_CODE (x) != MINUS)
4170 goto restart;
4171
4172 output_addr_const (file, XEXP (x, 0));
4173 fprintf (file, "-");
4174 if ((CONST_INT_P (XEXP (x, 1)) && INTVAL (XEXP (x, 1)) >= 0)
4175 || GET_CODE (XEXP (x, 1)) == PC
4176 || GET_CODE (XEXP (x, 1)) == SYMBOL_REF)
4177 output_addr_const (file, XEXP (x, 1));
4178 else
4179 {
4180 fputs (targetm.asm_out.open_paren, file);
4181 output_addr_const (file, XEXP (x, 1));
4182 fputs (targetm.asm_out.close_paren, file);
4183 }
4184 break;
4185
4186 case ZERO_EXTEND:
4187 case SIGN_EXTEND:
4188 case SUBREG:
4189 case TRUNCATE:
4190 output_addr_const (file, XEXP (x, 0));
4191 break;
4192
4193 default:
4194 if (targetm.asm_out.output_addr_const_extra (file, x))
4195 break;
4196
4197 output_operand_lossage ("invalid expression as operand");
4198 }
4199 }
4200 \f
4201 /* Output a quoted string. */
4202
4203 void
4204 output_quoted_string (FILE *asm_file, const char *string)
4205 {
4206 #ifdef OUTPUT_QUOTED_STRING
4207 OUTPUT_QUOTED_STRING (asm_file, string);
4208 #else
4209 char c;
4210
4211 putc ('\"', asm_file);
4212 while ((c = *string++) != 0)
4213 {
4214 if (ISPRINT (c))
4215 {
4216 if (c == '\"' || c == '\\')
4217 putc ('\\', asm_file);
4218 putc (c, asm_file);
4219 }
4220 else
4221 fprintf (asm_file, "\\%03o", (unsigned char) c);
4222 }
4223 putc ('\"', asm_file);
4224 #endif
4225 }
4226 \f
4227 /* Write a HOST_WIDE_INT number in hex form 0x1234, fast. */
4228
4229 void
4230 fprint_whex (FILE *f, unsigned HOST_WIDE_INT value)
4231 {
4232 char buf[2 + CHAR_BIT * sizeof (value) / 4];
4233 if (value == 0)
4234 putc ('0', f);
4235 else
4236 {
4237 char *p = buf + sizeof (buf);
4238 do
4239 *--p = "0123456789abcdef"[value % 16];
4240 while ((value /= 16) != 0);
4241 *--p = 'x';
4242 *--p = '0';
4243 fwrite (p, 1, buf + sizeof (buf) - p, f);
4244 }
4245 }
4246
4247 /* Internal function that prints an unsigned long in decimal in reverse.
4248 The output string IS NOT null-terminated. */
4249
4250 static int
4251 sprint_ul_rev (char *s, unsigned long value)
4252 {
4253 int i = 0;
4254 do
4255 {
4256 s[i] = "0123456789"[value % 10];
4257 value /= 10;
4258 i++;
4259 /* alternate version, without modulo */
4260 /* oldval = value; */
4261 /* value /= 10; */
4262 /* s[i] = "0123456789" [oldval - 10*value]; */
4263 /* i++ */
4264 }
4265 while (value != 0);
4266 return i;
4267 }
4268
4269 /* Write an unsigned long as decimal to a file, fast. */
4270
4271 void
4272 fprint_ul (FILE *f, unsigned long value)
4273 {
4274 /* python says: len(str(2**64)) == 20 */
4275 char s[20];
4276 int i;
4277
4278 i = sprint_ul_rev (s, value);
4279
4280 /* It's probably too small to bother with string reversal and fputs. */
4281 do
4282 {
4283 i--;
4284 putc (s[i], f);
4285 }
4286 while (i != 0);
4287 }
4288
4289 /* Write an unsigned long as decimal to a string, fast.
4290 s must be wide enough to not overflow, at least 21 chars.
4291 Returns the length of the string (without terminating '\0'). */
4292
4293 int
4294 sprint_ul (char *s, unsigned long value)
4295 {
4296 int len = sprint_ul_rev (s, value);
4297 s[len] = '\0';
4298
4299 std::reverse (s, s + len);
4300 return len;
4301 }
4302
4303 /* A poor man's fprintf, with the added features of %I, %R, %L, and %U.
4304 %R prints the value of REGISTER_PREFIX.
4305 %L prints the value of LOCAL_LABEL_PREFIX.
4306 %U prints the value of USER_LABEL_PREFIX.
4307 %I prints the value of IMMEDIATE_PREFIX.
4308 %O runs ASM_OUTPUT_OPCODE to transform what follows in the string.
4309 Also supported are %d, %i, %u, %x, %X, %o, %c, %s and %%.
4310
4311 We handle alternate assembler dialects here, just like output_asm_insn. */
4312
4313 void
4314 asm_fprintf (FILE *file, const char *p, ...)
4315 {
4316 char buf[10];
4317 char *q, c;
4318 #ifdef ASSEMBLER_DIALECT
4319 int dialect = 0;
4320 #endif
4321 va_list argptr;
4322
4323 va_start (argptr, p);
4324
4325 buf[0] = '%';
4326
4327 while ((c = *p++))
4328 switch (c)
4329 {
4330 #ifdef ASSEMBLER_DIALECT
4331 case '{':
4332 case '}':
4333 case '|':
4334 p = do_assembler_dialects (p, &dialect);
4335 break;
4336 #endif
4337
4338 case '%':
4339 c = *p++;
4340 q = &buf[1];
4341 while (strchr ("-+ #0", c))
4342 {
4343 *q++ = c;
4344 c = *p++;
4345 }
4346 while (ISDIGIT (c) || c == '.')
4347 {
4348 *q++ = c;
4349 c = *p++;
4350 }
4351 switch (c)
4352 {
4353 case '%':
4354 putc ('%', file);
4355 break;
4356
4357 case 'd': case 'i': case 'u':
4358 case 'x': case 'X': case 'o':
4359 case 'c':
4360 *q++ = c;
4361 *q = 0;
4362 fprintf (file, buf, va_arg (argptr, int));
4363 break;
4364
4365 case 'w':
4366 /* This is a prefix to the 'd', 'i', 'u', 'x', 'X', and
4367 'o' cases, but we do not check for those cases. It
4368 means that the value is a HOST_WIDE_INT, which may be
4369 either `long' or `long long'. */
4370 memcpy (q, HOST_WIDE_INT_PRINT, strlen (HOST_WIDE_INT_PRINT));
4371 q += strlen (HOST_WIDE_INT_PRINT);
4372 *q++ = *p++;
4373 *q = 0;
4374 fprintf (file, buf, va_arg (argptr, HOST_WIDE_INT));
4375 break;
4376
4377 case 'l':
4378 *q++ = c;
4379 #ifdef HAVE_LONG_LONG
4380 if (*p == 'l')
4381 {
4382 *q++ = *p++;
4383 *q++ = *p++;
4384 *q = 0;
4385 fprintf (file, buf, va_arg (argptr, long long));
4386 }
4387 else
4388 #endif
4389 {
4390 *q++ = *p++;
4391 *q = 0;
4392 fprintf (file, buf, va_arg (argptr, long));
4393 }
4394
4395 break;
4396
4397 case 's':
4398 *q++ = c;
4399 *q = 0;
4400 fprintf (file, buf, va_arg (argptr, char *));
4401 break;
4402
4403 case 'O':
4404 #ifdef ASM_OUTPUT_OPCODE
4405 ASM_OUTPUT_OPCODE (asm_out_file, p);
4406 #endif
4407 break;
4408
4409 case 'R':
4410 #ifdef REGISTER_PREFIX
4411 fprintf (file, "%s", REGISTER_PREFIX);
4412 #endif
4413 break;
4414
4415 case 'I':
4416 #ifdef IMMEDIATE_PREFIX
4417 fprintf (file, "%s", IMMEDIATE_PREFIX);
4418 #endif
4419 break;
4420
4421 case 'L':
4422 #ifdef LOCAL_LABEL_PREFIX
4423 fprintf (file, "%s", LOCAL_LABEL_PREFIX);
4424 #endif
4425 break;
4426
4427 case 'U':
4428 fputs (user_label_prefix, file);
4429 break;
4430
4431 #ifdef ASM_FPRINTF_EXTENSIONS
4432 /* Uppercase letters are reserved for general use by asm_fprintf
4433 and so are not available to target specific code. In order to
4434 prevent the ASM_FPRINTF_EXTENSIONS macro from using them then,
4435 they are defined here. As they get turned into real extensions
4436 to asm_fprintf they should be removed from this list. */
4437 case 'A': case 'B': case 'C': case 'D': case 'E':
4438 case 'F': case 'G': case 'H': case 'J': case 'K':
4439 case 'M': case 'N': case 'P': case 'Q': case 'S':
4440 case 'T': case 'V': case 'W': case 'Y': case 'Z':
4441 break;
4442
4443 ASM_FPRINTF_EXTENSIONS (file, argptr, p)
4444 #endif
4445 default:
4446 gcc_unreachable ();
4447 }
4448 break;
4449
4450 default:
4451 putc (c, file);
4452 }
4453 va_end (argptr);
4454 }
4455 \f
4456 /* Return nonzero if this function has no function calls. */
4457
4458 int
4459 leaf_function_p (void)
4460 {
4461 rtx_insn *insn;
4462
4463 /* Ensure we walk the entire function body. */
4464 gcc_assert (!in_sequence_p ());
4465
4466 /* Some back-ends (e.g. s390) want leaf functions to stay leaf
4467 functions even if they call mcount. */
4468 if (crtl->profile && !targetm.keep_leaf_when_profiled ())
4469 return 0;
4470
4471 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4472 {
4473 if (CALL_P (insn)
4474 && ! SIBLING_CALL_P (insn))
4475 return 0;
4476 if (NONJUMP_INSN_P (insn)
4477 && GET_CODE (PATTERN (insn)) == SEQUENCE
4478 && CALL_P (XVECEXP (PATTERN (insn), 0, 0))
4479 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0)))
4480 return 0;
4481 }
4482
4483 return 1;
4484 }
4485
4486 /* Return 1 if branch is a forward branch.
4487 Uses insn_shuid array, so it works only in the final pass. May be used by
4488 output templates to customary add branch prediction hints.
4489 */
4490 int
4491 final_forward_branch_p (rtx_insn *insn)
4492 {
4493 int insn_id, label_id;
4494
4495 gcc_assert (uid_shuid);
4496 insn_id = INSN_SHUID (insn);
4497 label_id = INSN_SHUID (JUMP_LABEL (insn));
4498 /* We've hit some insns that does not have id information available. */
4499 gcc_assert (insn_id && label_id);
4500 return insn_id < label_id;
4501 }
4502
4503 /* On some machines, a function with no call insns
4504 can run faster if it doesn't create its own register window.
4505 When output, the leaf function should use only the "output"
4506 registers. Ordinarily, the function would be compiled to use
4507 the "input" registers to find its arguments; it is a candidate
4508 for leaf treatment if it uses only the "input" registers.
4509 Leaf function treatment means renumbering so the function
4510 uses the "output" registers instead. */
4511
4512 #ifdef LEAF_REGISTERS
4513
4514 /* Return 1 if this function uses only the registers that can be
4515 safely renumbered. */
4516
4517 int
4518 only_leaf_regs_used (void)
4519 {
4520 int i;
4521 const char *const permitted_reg_in_leaf_functions = LEAF_REGISTERS;
4522
4523 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
4524 if ((df_regs_ever_live_p (i) || global_regs[i])
4525 && ! permitted_reg_in_leaf_functions[i])
4526 return 0;
4527
4528 if (crtl->uses_pic_offset_table
4529 && pic_offset_table_rtx != 0
4530 && REG_P (pic_offset_table_rtx)
4531 && ! permitted_reg_in_leaf_functions[REGNO (pic_offset_table_rtx)])
4532 return 0;
4533
4534 return 1;
4535 }
4536
4537 /* Scan all instructions and renumber all registers into those
4538 available in leaf functions. */
4539
4540 static void
4541 leaf_renumber_regs (rtx_insn *first)
4542 {
4543 rtx_insn *insn;
4544
4545 /* Renumber only the actual patterns.
4546 The reg-notes can contain frame pointer refs,
4547 and renumbering them could crash, and should not be needed. */
4548 for (insn = first; insn; insn = NEXT_INSN (insn))
4549 if (INSN_P (insn))
4550 leaf_renumber_regs_insn (PATTERN (insn));
4551 }
4552
4553 /* Scan IN_RTX and its subexpressions, and renumber all regs into those
4554 available in leaf functions. */
4555
4556 void
4557 leaf_renumber_regs_insn (rtx in_rtx)
4558 {
4559 int i, j;
4560 const char *format_ptr;
4561
4562 if (in_rtx == 0)
4563 return;
4564
4565 /* Renumber all input-registers into output-registers.
4566 renumbered_regs would be 1 for an output-register;
4567 they */
4568
4569 if (REG_P (in_rtx))
4570 {
4571 int newreg;
4572
4573 /* Don't renumber the same reg twice. */
4574 if (in_rtx->used)
4575 return;
4576
4577 newreg = REGNO (in_rtx);
4578 /* Don't try to renumber pseudo regs. It is possible for a pseudo reg
4579 to reach here as part of a REG_NOTE. */
4580 if (newreg >= FIRST_PSEUDO_REGISTER)
4581 {
4582 in_rtx->used = 1;
4583 return;
4584 }
4585 newreg = LEAF_REG_REMAP (newreg);
4586 gcc_assert (newreg >= 0);
4587 df_set_regs_ever_live (REGNO (in_rtx), false);
4588 df_set_regs_ever_live (newreg, true);
4589 SET_REGNO (in_rtx, newreg);
4590 in_rtx->used = 1;
4591 return;
4592 }
4593
4594 if (INSN_P (in_rtx))
4595 {
4596 /* Inside a SEQUENCE, we find insns.
4597 Renumber just the patterns of these insns,
4598 just as we do for the top-level insns. */
4599 leaf_renumber_regs_insn (PATTERN (in_rtx));
4600 return;
4601 }
4602
4603 format_ptr = GET_RTX_FORMAT (GET_CODE (in_rtx));
4604
4605 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (in_rtx)); i++)
4606 switch (*format_ptr++)
4607 {
4608 case 'e':
4609 leaf_renumber_regs_insn (XEXP (in_rtx, i));
4610 break;
4611
4612 case 'E':
4613 if (XVEC (in_rtx, i) != NULL)
4614 for (j = 0; j < XVECLEN (in_rtx, i); j++)
4615 leaf_renumber_regs_insn (XVECEXP (in_rtx, i, j));
4616 break;
4617
4618 case 'S':
4619 case 's':
4620 case '0':
4621 case 'i':
4622 case 'w':
4623 case 'p':
4624 case 'n':
4625 case 'u':
4626 break;
4627
4628 default:
4629 gcc_unreachable ();
4630 }
4631 }
4632 #endif
4633 \f
4634 /* Turn the RTL into assembly. */
4635 static unsigned int
4636 rest_of_handle_final (void)
4637 {
4638 const char *fnname = get_fnname_from_decl (current_function_decl);
4639
4640 /* Turn debug markers into notes if the var-tracking pass has not
4641 been invoked. */
4642 if (!flag_var_tracking && MAY_HAVE_DEBUG_MARKER_INSNS)
4643 delete_vta_debug_insns (false);
4644
4645 assemble_start_function (current_function_decl, fnname);
4646 rtx_insn *first = get_insns ();
4647 int seen = 0;
4648 final_start_function_1 (&first, asm_out_file, &seen, optimize);
4649 final_1 (first, asm_out_file, seen, optimize);
4650 if (flag_ipa_ra
4651 && !lookup_attribute ("noipa", DECL_ATTRIBUTES (current_function_decl)))
4652 collect_fn_hard_reg_usage ();
4653 final_end_function ();
4654
4655 /* The IA-64 ".handlerdata" directive must be issued before the ".endp"
4656 directive that closes the procedure descriptor. Similarly, for x64 SEH.
4657 Otherwise it's not strictly necessary, but it doesn't hurt either. */
4658 output_function_exception_table (crtl->has_bb_partition ? 1 : 0);
4659
4660 assemble_end_function (current_function_decl, fnname);
4661
4662 /* Free up reg info memory. */
4663 free_reg_info ();
4664
4665 if (! quiet_flag)
4666 fflush (asm_out_file);
4667
4668 /* Write DBX symbols if requested. */
4669
4670 /* Note that for those inline functions where we don't initially
4671 know for certain that we will be generating an out-of-line copy,
4672 the first invocation of this routine (rest_of_compilation) will
4673 skip over this code by doing a `goto exit_rest_of_compilation;'.
4674 Later on, wrapup_global_declarations will (indirectly) call
4675 rest_of_compilation again for those inline functions that need
4676 to have out-of-line copies generated. During that call, we
4677 *will* be routed past here. */
4678
4679 timevar_push (TV_SYMOUT);
4680 if (!DECL_IGNORED_P (current_function_decl))
4681 debug_hooks->function_decl (current_function_decl);
4682 timevar_pop (TV_SYMOUT);
4683
4684 /* Release the blocks that are linked to DECL_INITIAL() to free the memory. */
4685 DECL_INITIAL (current_function_decl) = error_mark_node;
4686
4687 if (DECL_STATIC_CONSTRUCTOR (current_function_decl)
4688 && targetm.have_ctors_dtors)
4689 targetm.asm_out.constructor (XEXP (DECL_RTL (current_function_decl), 0),
4690 decl_init_priority_lookup
4691 (current_function_decl));
4692 if (DECL_STATIC_DESTRUCTOR (current_function_decl)
4693 && targetm.have_ctors_dtors)
4694 targetm.asm_out.destructor (XEXP (DECL_RTL (current_function_decl), 0),
4695 decl_fini_priority_lookup
4696 (current_function_decl));
4697 return 0;
4698 }
4699
4700 namespace {
4701
4702 const pass_data pass_data_final =
4703 {
4704 RTL_PASS, /* type */
4705 "final", /* name */
4706 OPTGROUP_NONE, /* optinfo_flags */
4707 TV_FINAL, /* tv_id */
4708 0, /* properties_required */
4709 0, /* properties_provided */
4710 0, /* properties_destroyed */
4711 0, /* todo_flags_start */
4712 0, /* todo_flags_finish */
4713 };
4714
4715 class pass_final : public rtl_opt_pass
4716 {
4717 public:
4718 pass_final (gcc::context *ctxt)
4719 : rtl_opt_pass (pass_data_final, ctxt)
4720 {}
4721
4722 /* opt_pass methods: */
4723 virtual unsigned int execute (function *) { return rest_of_handle_final (); }
4724
4725 }; // class pass_final
4726
4727 } // anon namespace
4728
4729 rtl_opt_pass *
4730 make_pass_final (gcc::context *ctxt)
4731 {
4732 return new pass_final (ctxt);
4733 }
4734
4735
4736 static unsigned int
4737 rest_of_handle_shorten_branches (void)
4738 {
4739 /* Shorten branches. */
4740 shorten_branches (get_insns ());
4741 return 0;
4742 }
4743
4744 namespace {
4745
4746 const pass_data pass_data_shorten_branches =
4747 {
4748 RTL_PASS, /* type */
4749 "shorten", /* name */
4750 OPTGROUP_NONE, /* optinfo_flags */
4751 TV_SHORTEN_BRANCH, /* tv_id */
4752 0, /* properties_required */
4753 0, /* properties_provided */
4754 0, /* properties_destroyed */
4755 0, /* todo_flags_start */
4756 0, /* todo_flags_finish */
4757 };
4758
4759 class pass_shorten_branches : public rtl_opt_pass
4760 {
4761 public:
4762 pass_shorten_branches (gcc::context *ctxt)
4763 : rtl_opt_pass (pass_data_shorten_branches, ctxt)
4764 {}
4765
4766 /* opt_pass methods: */
4767 virtual unsigned int execute (function *)
4768 {
4769 return rest_of_handle_shorten_branches ();
4770 }
4771
4772 }; // class pass_shorten_branches
4773
4774 } // anon namespace
4775
4776 rtl_opt_pass *
4777 make_pass_shorten_branches (gcc::context *ctxt)
4778 {
4779 return new pass_shorten_branches (ctxt);
4780 }
4781
4782
4783 static unsigned int
4784 rest_of_clean_state (void)
4785 {
4786 rtx_insn *insn, *next;
4787 FILE *final_output = NULL;
4788 int save_unnumbered = flag_dump_unnumbered;
4789 int save_noaddr = flag_dump_noaddr;
4790
4791 if (flag_dump_final_insns)
4792 {
4793 final_output = fopen (flag_dump_final_insns, "a");
4794 if (!final_output)
4795 {
4796 error ("could not open final insn dump file %qs: %m",
4797 flag_dump_final_insns);
4798 flag_dump_final_insns = NULL;
4799 }
4800 else
4801 {
4802 flag_dump_noaddr = flag_dump_unnumbered = 1;
4803 if (flag_compare_debug_opt || flag_compare_debug)
4804 dump_flags |= TDF_NOUID | TDF_COMPARE_DEBUG;
4805 dump_function_header (final_output, current_function_decl,
4806 dump_flags);
4807 final_insns_dump_p = true;
4808
4809 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4810 if (LABEL_P (insn))
4811 INSN_UID (insn) = CODE_LABEL_NUMBER (insn);
4812 else
4813 {
4814 if (NOTE_P (insn))
4815 set_block_for_insn (insn, NULL);
4816 INSN_UID (insn) = 0;
4817 }
4818 }
4819 }
4820
4821 /* It is very important to decompose the RTL instruction chain here:
4822 debug information keeps pointing into CODE_LABEL insns inside the function
4823 body. If these remain pointing to the other insns, we end up preserving
4824 whole RTL chain and attached detailed debug info in memory. */
4825 for (insn = get_insns (); insn; insn = next)
4826 {
4827 next = NEXT_INSN (insn);
4828 SET_NEXT_INSN (insn) = NULL;
4829 SET_PREV_INSN (insn) = NULL;
4830
4831 rtx_insn *call_insn = insn;
4832 if (NONJUMP_INSN_P (call_insn)
4833 && GET_CODE (PATTERN (call_insn)) == SEQUENCE)
4834 {
4835 rtx_sequence *seq = as_a <rtx_sequence *> (PATTERN (call_insn));
4836 call_insn = seq->insn (0);
4837 }
4838 if (CALL_P (call_insn))
4839 {
4840 rtx note
4841 = find_reg_note (call_insn, REG_CALL_ARG_LOCATION, NULL_RTX);
4842 if (note)
4843 remove_note (call_insn, note);
4844 }
4845
4846 if (final_output
4847 && (!NOTE_P (insn)
4848 || (NOTE_KIND (insn) != NOTE_INSN_VAR_LOCATION
4849 && NOTE_KIND (insn) != NOTE_INSN_BEGIN_STMT
4850 && NOTE_KIND (insn) != NOTE_INSN_INLINE_ENTRY
4851 && NOTE_KIND (insn) != NOTE_INSN_BLOCK_BEG
4852 && NOTE_KIND (insn) != NOTE_INSN_BLOCK_END
4853 && NOTE_KIND (insn) != NOTE_INSN_DELETED_DEBUG_LABEL)))
4854 print_rtl_single (final_output, insn);
4855 }
4856
4857 if (final_output)
4858 {
4859 flag_dump_noaddr = save_noaddr;
4860 flag_dump_unnumbered = save_unnumbered;
4861 final_insns_dump_p = false;
4862
4863 if (fclose (final_output))
4864 {
4865 error ("could not close final insn dump file %qs: %m",
4866 flag_dump_final_insns);
4867 flag_dump_final_insns = NULL;
4868 }
4869 }
4870
4871 flag_rerun_cse_after_global_opts = 0;
4872 reload_completed = 0;
4873 epilogue_completed = 0;
4874 #ifdef STACK_REGS
4875 regstack_completed = 0;
4876 #endif
4877
4878 /* Clear out the insn_length contents now that they are no
4879 longer valid. */
4880 init_insn_lengths ();
4881
4882 /* Show no temporary slots allocated. */
4883 init_temp_slots ();
4884
4885 free_bb_for_insn ();
4886
4887 if (cfun->gimple_df)
4888 delete_tree_ssa (cfun);
4889
4890 /* We can reduce stack alignment on call site only when we are sure that
4891 the function body just produced will be actually used in the final
4892 executable. */
4893 if (decl_binds_to_current_def_p (current_function_decl))
4894 {
4895 unsigned int pref = crtl->preferred_stack_boundary;
4896 if (crtl->stack_alignment_needed > crtl->preferred_stack_boundary)
4897 pref = crtl->stack_alignment_needed;
4898 cgraph_node::rtl_info (current_function_decl)
4899 ->preferred_incoming_stack_boundary = pref;
4900 }
4901
4902 /* Make sure volatile mem refs aren't considered valid operands for
4903 arithmetic insns. We must call this here if this is a nested inline
4904 function, since the above code leaves us in the init_recog state,
4905 and the function context push/pop code does not save/restore volatile_ok.
4906
4907 ??? Maybe it isn't necessary for expand_start_function to call this
4908 anymore if we do it here? */
4909
4910 init_recog_no_volatile ();
4911
4912 /* We're done with this function. Free up memory if we can. */
4913 free_after_parsing (cfun);
4914 free_after_compilation (cfun);
4915 return 0;
4916 }
4917
4918 namespace {
4919
4920 const pass_data pass_data_clean_state =
4921 {
4922 RTL_PASS, /* type */
4923 "*clean_state", /* name */
4924 OPTGROUP_NONE, /* optinfo_flags */
4925 TV_FINAL, /* tv_id */
4926 0, /* properties_required */
4927 0, /* properties_provided */
4928 PROP_rtl, /* properties_destroyed */
4929 0, /* todo_flags_start */
4930 0, /* todo_flags_finish */
4931 };
4932
4933 class pass_clean_state : public rtl_opt_pass
4934 {
4935 public:
4936 pass_clean_state (gcc::context *ctxt)
4937 : rtl_opt_pass (pass_data_clean_state, ctxt)
4938 {}
4939
4940 /* opt_pass methods: */
4941 virtual unsigned int execute (function *)
4942 {
4943 return rest_of_clean_state ();
4944 }
4945
4946 }; // class pass_clean_state
4947
4948 } // anon namespace
4949
4950 rtl_opt_pass *
4951 make_pass_clean_state (gcc::context *ctxt)
4952 {
4953 return new pass_clean_state (ctxt);
4954 }
4955
4956 /* Return true if INSN is a call to the current function. */
4957
4958 static bool
4959 self_recursive_call_p (rtx_insn *insn)
4960 {
4961 tree fndecl = get_call_fndecl (insn);
4962 return (fndecl == current_function_decl
4963 && decl_binds_to_current_def_p (fndecl));
4964 }
4965
4966 /* Collect hard register usage for the current function. */
4967
4968 static void
4969 collect_fn_hard_reg_usage (void)
4970 {
4971 rtx_insn *insn;
4972 #ifdef STACK_REGS
4973 int i;
4974 #endif
4975 struct cgraph_rtl_info *node;
4976 HARD_REG_SET function_used_regs;
4977
4978 /* ??? To be removed when all the ports have been fixed. */
4979 if (!targetm.call_fusage_contains_non_callee_clobbers)
4980 return;
4981
4982 CLEAR_HARD_REG_SET (function_used_regs);
4983
4984 for (insn = get_insns (); insn != NULL_RTX; insn = next_insn (insn))
4985 {
4986 HARD_REG_SET insn_used_regs;
4987
4988 if (!NONDEBUG_INSN_P (insn))
4989 continue;
4990
4991 if (CALL_P (insn)
4992 && !self_recursive_call_p (insn))
4993 {
4994 if (!get_call_reg_set_usage (insn, &insn_used_regs,
4995 call_used_reg_set))
4996 return;
4997
4998 IOR_HARD_REG_SET (function_used_regs, insn_used_regs);
4999 }
5000
5001 find_all_hard_reg_sets (insn, &insn_used_regs, false);
5002 IOR_HARD_REG_SET (function_used_regs, insn_used_regs);
5003 }
5004
5005 /* Be conservative - mark fixed and global registers as used. */
5006 IOR_HARD_REG_SET (function_used_regs, fixed_reg_set);
5007
5008 #ifdef STACK_REGS
5009 /* Handle STACK_REGS conservatively, since the df-framework does not
5010 provide accurate information for them. */
5011
5012 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
5013 SET_HARD_REG_BIT (function_used_regs, i);
5014 #endif
5015
5016 /* The information we have gathered is only interesting if it exposes a
5017 register from the call_used_regs that is not used in this function. */
5018 if (hard_reg_set_subset_p (call_used_reg_set, function_used_regs))
5019 return;
5020
5021 node = cgraph_node::rtl_info (current_function_decl);
5022 gcc_assert (node != NULL);
5023
5024 COPY_HARD_REG_SET (node->function_used_regs, function_used_regs);
5025 node->function_used_regs_valid = 1;
5026 }
5027
5028 /* Get the declaration of the function called by INSN. */
5029
5030 static tree
5031 get_call_fndecl (rtx_insn *insn)
5032 {
5033 rtx note, datum;
5034
5035 note = find_reg_note (insn, REG_CALL_DECL, NULL_RTX);
5036 if (note == NULL_RTX)
5037 return NULL_TREE;
5038
5039 datum = XEXP (note, 0);
5040 if (datum != NULL_RTX)
5041 return SYMBOL_REF_DECL (datum);
5042
5043 return NULL_TREE;
5044 }
5045
5046 /* Return the cgraph_rtl_info of the function called by INSN. Returns NULL for
5047 call targets that can be overwritten. */
5048
5049 static struct cgraph_rtl_info *
5050 get_call_cgraph_rtl_info (rtx_insn *insn)
5051 {
5052 tree fndecl;
5053
5054 if (insn == NULL_RTX)
5055 return NULL;
5056
5057 fndecl = get_call_fndecl (insn);
5058 if (fndecl == NULL_TREE
5059 || !decl_binds_to_current_def_p (fndecl))
5060 return NULL;
5061
5062 return cgraph_node::rtl_info (fndecl);
5063 }
5064
5065 /* Find hard registers used by function call instruction INSN, and return them
5066 in REG_SET. Return DEFAULT_SET in REG_SET if not found. */
5067
5068 bool
5069 get_call_reg_set_usage (rtx_insn *insn, HARD_REG_SET *reg_set,
5070 HARD_REG_SET default_set)
5071 {
5072 if (flag_ipa_ra)
5073 {
5074 struct cgraph_rtl_info *node = get_call_cgraph_rtl_info (insn);
5075 if (node != NULL
5076 && node->function_used_regs_valid)
5077 {
5078 COPY_HARD_REG_SET (*reg_set, node->function_used_regs);
5079 AND_HARD_REG_SET (*reg_set, default_set);
5080 return true;
5081 }
5082 }
5083
5084 COPY_HARD_REG_SET (*reg_set, default_set);
5085 return false;
5086 }