Makefile.in (C_AND_OBJC_OBJS): Add c-dump.o.
[gcc.git] / gcc / final.c
1 /* Convert RTL to assembler code and output it, for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000 Free Software Foundation, Inc.
4
5 This file is part of GNU CC.
6
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
10 any later version.
11
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
21
22 /* This is the final pass of the compiler.
23 It looks at the rtl code for a function and outputs assembler code.
24
25 Call `final_start_function' to output the assembler code for function entry,
26 `final' to output assembler code for some RTL code,
27 `final_end_function' to output assembler code for function exit.
28 If a function is compiled in several pieces, each piece is
29 output separately with `final'.
30
31 Some optimizations are also done at this level.
32 Move instructions that were made unnecessary by good register allocation
33 are detected and omitted from the output. (Though most of these
34 are removed by the last jump pass.)
35
36 Instructions to set the condition codes are omitted when it can be
37 seen that the condition codes already had the desired values.
38
39 In some cases it is sufficient if the inherited condition codes
40 have related values, but this may require the following insn
41 (the one that tests the condition codes) to be modified.
42
43 The code for the function prologue and epilogue are generated
44 directly as assembler code by the macros FUNCTION_PROLOGUE and
45 FUNCTION_EPILOGUE. Those instructions never exist as rtl. */
46
47 #include "config.h"
48 #include "system.h"
49
50 #include "tree.h"
51 #include "rtl.h"
52 #include "tm_p.h"
53 #include "regs.h"
54 #include "insn-config.h"
55 #include "insn-flags.h"
56 #include "insn-attr.h"
57 #include "insn-codes.h"
58 #include "recog.h"
59 #include "conditions.h"
60 #include "flags.h"
61 #include "real.h"
62 #include "hard-reg-set.h"
63 #include "defaults.h"
64 #include "output.h"
65 #include "except.h"
66 #include "function.h"
67 #include "toplev.h"
68 #include "reload.h"
69 #include "intl.h"
70 #include "basic-block.h"
71
72 /* Get N_SLINE and N_SOL from stab.h if we can expect the file to exist. */
73 #if defined (DBX_DEBUGGING_INFO) || defined (XCOFF_DEBUGGING_INFO)
74 #include "dbxout.h"
75 #if defined (USG) || !defined (HAVE_STAB_H)
76 #include "gstab.h" /* If doing DBX on sysV, use our own stab.h. */
77 #else
78 #include <stab.h>
79 #endif
80
81 #endif /* DBX_DEBUGGING_INFO || XCOFF_DEBUGGING_INFO */
82
83 #ifndef ACCUMULATE_OUTGOING_ARGS
84 #define ACCUMULATE_OUTGOING_ARGS 0
85 #endif
86
87 #ifdef XCOFF_DEBUGGING_INFO
88 #include "xcoffout.h"
89 #endif
90
91 #ifdef DWARF_DEBUGGING_INFO
92 #include "dwarfout.h"
93 #endif
94
95 #if defined (DWARF2_UNWIND_INFO) || defined (DWARF2_DEBUGGING_INFO)
96 #include "dwarf2out.h"
97 #endif
98
99 #ifdef SDB_DEBUGGING_INFO
100 #include "sdbout.h"
101 #endif
102
103 /* .stabd code for line number. */
104 #ifndef N_SLINE
105 #define N_SLINE 0x44
106 #endif
107
108 /* .stabs code for included file name. */
109 #ifndef N_SOL
110 #define N_SOL 0x84
111 #endif
112
113 /* If we aren't using cc0, CC_STATUS_INIT shouldn't exist. So define a
114 null default for it to save conditionalization later. */
115 #ifndef CC_STATUS_INIT
116 #define CC_STATUS_INIT
117 #endif
118
119 /* How to start an assembler comment. */
120 #ifndef ASM_COMMENT_START
121 #define ASM_COMMENT_START ";#"
122 #endif
123
124 /* Is the given character a logical line separator for the assembler? */
125 #ifndef IS_ASM_LOGICAL_LINE_SEPARATOR
126 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C) ((C) == ';')
127 #endif
128
129 #ifndef JUMP_TABLES_IN_TEXT_SECTION
130 #define JUMP_TABLES_IN_TEXT_SECTION 0
131 #endif
132
133 /* Last insn processed by final_scan_insn. */
134 static rtx debug_insn;
135 rtx current_output_insn;
136
137 /* Line number of last NOTE. */
138 static int last_linenum;
139
140 /* Highest line number in current block. */
141 static int high_block_linenum;
142
143 /* Likewise for function. */
144 static int high_function_linenum;
145
146 /* Filename of last NOTE. */
147 static const char *last_filename;
148
149 /* Number of basic blocks seen so far;
150 used if profile_block_flag is set. */
151 static int count_basic_blocks;
152
153 /* Number of instrumented arcs when profile_arc_flag is set. */
154 extern int count_instrumented_edges;
155
156 extern int length_unit_log; /* This is defined in insn-attrtab.c. */
157
158 /* Nonzero while outputting an `asm' with operands.
159 This means that inconsistencies are the user's fault, so don't abort.
160 The precise value is the insn being output, to pass to error_for_asm. */
161 static rtx this_is_asm_operands;
162
163 /* Number of operands of this insn, for an `asm' with operands. */
164 static unsigned int insn_noperands;
165
166 /* Compare optimization flag. */
167
168 static rtx last_ignored_compare = 0;
169
170 /* Flag indicating this insn is the start of a new basic block. */
171
172 static int new_block = 1;
173
174 /* Assign a unique number to each insn that is output.
175 This can be used to generate unique local labels. */
176
177 static int insn_counter = 0;
178
179 #ifdef HAVE_cc0
180 /* This variable contains machine-dependent flags (defined in tm.h)
181 set and examined by output routines
182 that describe how to interpret the condition codes properly. */
183
184 CC_STATUS cc_status;
185
186 /* During output of an insn, this contains a copy of cc_status
187 from before the insn. */
188
189 CC_STATUS cc_prev_status;
190 #endif
191
192 /* Indexed by hardware reg number, is 1 if that register is ever
193 used in the current function.
194
195 In life_analysis, or in stupid_life_analysis, this is set
196 up to record the hard regs used explicitly. Reload adds
197 in the hard regs used for holding pseudo regs. Final uses
198 it to generate the code in the function prologue and epilogue
199 to save and restore registers as needed. */
200
201 char regs_ever_live[FIRST_PSEUDO_REGISTER];
202
203 /* Nonzero means current function must be given a frame pointer.
204 Set in stmt.c if anything is allocated on the stack there.
205 Set in reload1.c if anything is allocated on the stack there. */
206
207 int frame_pointer_needed;
208
209 /* Assign unique numbers to labels generated for profiling. */
210
211 int profile_label_no;
212
213 /* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */
214
215 static int block_depth;
216
217 /* Nonzero if have enabled APP processing of our assembler output. */
218
219 static int app_on;
220
221 /* If we are outputting an insn sequence, this contains the sequence rtx.
222 Zero otherwise. */
223
224 rtx final_sequence;
225
226 #ifdef ASSEMBLER_DIALECT
227
228 /* Number of the assembler dialect to use, starting at 0. */
229 static int dialect_number;
230 #endif
231
232 /* Indexed by line number, nonzero if there is a note for that line. */
233
234 static char *line_note_exists;
235
236 #ifdef HAVE_conditional_execution
237 /* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */
238 rtx current_insn_predicate;
239 #endif
240
241 /* Linked list to hold line numbers for each basic block. */
242
243 struct bb_list
244 {
245 struct bb_list *next; /* pointer to next basic block */
246 int line_num; /* line number */
247 int file_label_num; /* LPBC<n> label # for stored filename */
248 int func_label_num; /* LPBC<n> label # for stored function name */
249 };
250
251 static struct bb_list *bb_head = 0; /* Head of basic block list */
252 static struct bb_list **bb_tail = &bb_head; /* Ptr to store next bb ptr */
253 static int bb_file_label_num = -1; /* Current label # for file */
254 static int bb_func_label_num = -1; /* Current label # for func */
255
256 /* Linked list to hold the strings for each file and function name output. */
257
258 struct bb_str
259 {
260 struct bb_str *next; /* pointer to next string */
261 const char *string; /* string */
262 int label_num; /* label number */
263 int length; /* string length */
264 };
265
266 static struct bb_str *sbb_head = 0; /* Head of string list. */
267 static struct bb_str **sbb_tail = &sbb_head; /* Ptr to store next bb str */
268 static int sbb_label_num = 0; /* Last label used */
269
270 #ifdef HAVE_ATTR_length
271 static int asm_insn_count PARAMS ((rtx));
272 #endif
273 static void profile_function PARAMS ((FILE *));
274 static void profile_after_prologue PARAMS ((FILE *));
275 static void add_bb PARAMS ((FILE *));
276 static int add_bb_string PARAMS ((const char *, int));
277 static void output_source_line PARAMS ((FILE *, rtx));
278 static rtx walk_alter_subreg PARAMS ((rtx));
279 static void output_asm_name PARAMS ((void));
280 static void output_operand PARAMS ((rtx, int));
281 #ifdef LEAF_REGISTERS
282 static void leaf_renumber_regs PARAMS ((rtx));
283 #endif
284 #ifdef HAVE_cc0
285 static int alter_cond PARAMS ((rtx));
286 #endif
287 #ifndef ADDR_VEC_ALIGN
288 static int final_addr_vec_align PARAMS ((rtx));
289 #endif
290 #ifdef HAVE_ATTR_length
291 static int align_fuzz PARAMS ((rtx, rtx, int, unsigned));
292 #endif
293 \f
294 /* Initialize data in final at the beginning of a compilation. */
295
296 void
297 init_final (filename)
298 const char *filename ATTRIBUTE_UNUSED;
299 {
300 app_on = 0;
301 final_sequence = 0;
302
303 #ifdef ASSEMBLER_DIALECT
304 dialect_number = ASSEMBLER_DIALECT;
305 #endif
306 }
307
308 /* Called at end of source file,
309 to output the block-profiling table for this entire compilation. */
310
311 void
312 end_final (filename)
313 const char *filename;
314 {
315 int i;
316
317 if (profile_block_flag || profile_arc_flag)
318 {
319 char name[20];
320 int align = exact_log2 (BIGGEST_ALIGNMENT / BITS_PER_UNIT);
321 int size, rounded;
322 struct bb_list *ptr;
323 struct bb_str *sptr;
324 int long_bytes = LONG_TYPE_SIZE / BITS_PER_UNIT;
325 int pointer_bytes = POINTER_SIZE / BITS_PER_UNIT;
326
327 if (profile_block_flag)
328 size = long_bytes * count_basic_blocks;
329 else
330 size = long_bytes * count_instrumented_edges;
331 rounded = size;
332
333 rounded += (BIGGEST_ALIGNMENT / BITS_PER_UNIT) - 1;
334 rounded = (rounded / (BIGGEST_ALIGNMENT / BITS_PER_UNIT)
335 * (BIGGEST_ALIGNMENT / BITS_PER_UNIT));
336
337 data_section ();
338
339 /* Output the main header, of 11 words:
340 0: 1 if this file is initialized, else 0.
341 1: address of file name (LPBX1).
342 2: address of table of counts (LPBX2).
343 3: number of counts in the table.
344 4: always 0, for compatibility with Sun.
345
346 The following are GNU extensions:
347
348 5: address of table of start addrs of basic blocks (LPBX3).
349 6: Number of bytes in this header.
350 7: address of table of function names (LPBX4).
351 8: address of table of line numbers (LPBX5) or 0.
352 9: address of table of file names (LPBX6) or 0.
353 10: space reserved for basic block profiling. */
354
355 ASM_OUTPUT_ALIGN (asm_out_file, align);
356
357 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 0);
358 /* zero word */
359 assemble_integer (const0_rtx, long_bytes, 1);
360
361 /* address of filename */
362 ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 1);
363 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name), pointer_bytes, 1);
364
365 /* address of count table */
366 ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 2);
367 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name), pointer_bytes, 1);
368
369 /* count of the # of basic blocks or # of instrumented arcs */
370 if (profile_block_flag)
371 assemble_integer (GEN_INT (count_basic_blocks), long_bytes, 1);
372 else
373 assemble_integer (GEN_INT (count_instrumented_edges), long_bytes, 1);
374
375 /* zero word (link field) */
376 assemble_integer (const0_rtx, pointer_bytes, 1);
377
378 /* address of basic block start address table */
379 if (profile_block_flag)
380 {
381 ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 3);
382 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name), pointer_bytes,
383 1);
384 }
385 else
386 assemble_integer (const0_rtx, pointer_bytes, 1);
387
388 /* byte count for extended structure. */
389 assemble_integer (GEN_INT (11 * UNITS_PER_WORD), long_bytes, 1);
390
391 /* address of function name table */
392 if (profile_block_flag)
393 {
394 ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 4);
395 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name), pointer_bytes,
396 1);
397 }
398 else
399 assemble_integer (const0_rtx, pointer_bytes, 1);
400
401 /* address of line number and filename tables if debugging. */
402 if (write_symbols != NO_DEBUG && profile_block_flag)
403 {
404 ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 5);
405 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name),
406 pointer_bytes, 1);
407 ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 6);
408 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name),
409 pointer_bytes, 1);
410 }
411 else
412 {
413 assemble_integer (const0_rtx, pointer_bytes, 1);
414 assemble_integer (const0_rtx, pointer_bytes, 1);
415 }
416
417 /* space for extension ptr (link field) */
418 assemble_integer (const0_rtx, UNITS_PER_WORD, 1);
419
420 /* Output the file name changing the suffix to .d for Sun tcov
421 compatibility. */
422 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 1);
423 {
424 char *cwd = getpwd ();
425 int len = strlen (filename) + strlen (cwd) + 1;
426 char *data_file = (char *) alloca (len + 4);
427
428 strcpy (data_file, cwd);
429 strcat (data_file, "/");
430 strcat (data_file, filename);
431 strip_off_ending (data_file, len);
432 if (profile_block_flag)
433 strcat (data_file, ".d");
434 else
435 strcat (data_file, ".da");
436 assemble_string (data_file, strlen (data_file) + 1);
437 }
438
439 /* Make space for the table of counts. */
440 if (size == 0)
441 {
442 /* Realign data section. */
443 ASM_OUTPUT_ALIGN (asm_out_file, align);
444 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 2);
445 if (size != 0)
446 assemble_zeros (size);
447 }
448 else
449 {
450 ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 2);
451 #ifdef ASM_OUTPUT_SHARED_LOCAL
452 if (flag_shared_data)
453 ASM_OUTPUT_SHARED_LOCAL (asm_out_file, name, size, rounded);
454 else
455 #endif
456 #ifdef ASM_OUTPUT_ALIGNED_DECL_LOCAL
457 ASM_OUTPUT_ALIGNED_DECL_LOCAL (asm_out_file, NULL_TREE, name,
458 size, BIGGEST_ALIGNMENT);
459 #else
460 #ifdef ASM_OUTPUT_ALIGNED_LOCAL
461 ASM_OUTPUT_ALIGNED_LOCAL (asm_out_file, name, size,
462 BIGGEST_ALIGNMENT);
463 #else
464 ASM_OUTPUT_LOCAL (asm_out_file, name, size, rounded);
465 #endif
466 #endif
467 }
468
469 /* Output any basic block strings */
470 if (profile_block_flag)
471 {
472 readonly_data_section ();
473 if (sbb_head)
474 {
475 ASM_OUTPUT_ALIGN (asm_out_file, align);
476 for (sptr = sbb_head; sptr != 0; sptr = sptr->next)
477 {
478 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBC",
479 sptr->label_num);
480 assemble_string (sptr->string, sptr->length);
481 }
482 }
483 }
484
485 /* Output the table of addresses. */
486 if (profile_block_flag)
487 {
488 /* Realign in new section */
489 ASM_OUTPUT_ALIGN (asm_out_file, align);
490 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 3);
491 for (i = 0; i < count_basic_blocks; i++)
492 {
493 ASM_GENERATE_INTERNAL_LABEL (name, "LPB", i);
494 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name),
495 pointer_bytes, 1);
496 }
497 }
498
499 /* Output the table of function names. */
500 if (profile_block_flag)
501 {
502 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 4);
503 for ((ptr = bb_head), (i = 0); ptr != 0; (ptr = ptr->next), i++)
504 {
505 if (ptr->func_label_num >= 0)
506 {
507 ASM_GENERATE_INTERNAL_LABEL (name, "LPBC",
508 ptr->func_label_num);
509 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name),
510 pointer_bytes, 1);
511 }
512 else
513 assemble_integer (const0_rtx, pointer_bytes, 1);
514 }
515
516 for (; i < count_basic_blocks; i++)
517 assemble_integer (const0_rtx, pointer_bytes, 1);
518 }
519
520 if (write_symbols != NO_DEBUG && profile_block_flag)
521 {
522 /* Output the table of line numbers. */
523 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 5);
524 for ((ptr = bb_head), (i = 0); ptr != 0; (ptr = ptr->next), i++)
525 assemble_integer (GEN_INT (ptr->line_num), long_bytes, 1);
526
527 for (; i < count_basic_blocks; i++)
528 assemble_integer (const0_rtx, long_bytes, 1);
529
530 /* Output the table of file names. */
531 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 6);
532 for ((ptr = bb_head), (i = 0); ptr != 0; (ptr = ptr->next), i++)
533 {
534 if (ptr->file_label_num >= 0)
535 {
536 ASM_GENERATE_INTERNAL_LABEL (name, "LPBC",
537 ptr->file_label_num);
538 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name),
539 pointer_bytes, 1);
540 }
541 else
542 assemble_integer (const0_rtx, pointer_bytes, 1);
543 }
544
545 for (; i < count_basic_blocks; i++)
546 assemble_integer (const0_rtx, pointer_bytes, 1);
547 }
548
549 /* End with the address of the table of addresses,
550 so we can find it easily, as the last word in the file's text. */
551 if (profile_block_flag)
552 {
553 ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 3);
554 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name), pointer_bytes,
555 1);
556 }
557 }
558 }
559
560 /* Enable APP processing of subsequent output.
561 Used before the output from an `asm' statement. */
562
563 void
564 app_enable ()
565 {
566 if (! app_on)
567 {
568 fputs (ASM_APP_ON, asm_out_file);
569 app_on = 1;
570 }
571 }
572
573 /* Disable APP processing of subsequent output.
574 Called from varasm.c before most kinds of output. */
575
576 void
577 app_disable ()
578 {
579 if (app_on)
580 {
581 fputs (ASM_APP_OFF, asm_out_file);
582 app_on = 0;
583 }
584 }
585 \f
586 /* Return the number of slots filled in the current
587 delayed branch sequence (we don't count the insn needing the
588 delay slot). Zero if not in a delayed branch sequence. */
589
590 #ifdef DELAY_SLOTS
591 int
592 dbr_sequence_length ()
593 {
594 if (final_sequence != 0)
595 return XVECLEN (final_sequence, 0) - 1;
596 else
597 return 0;
598 }
599 #endif
600 \f
601 /* The next two pages contain routines used to compute the length of an insn
602 and to shorten branches. */
603
604 /* Arrays for insn lengths, and addresses. The latter is referenced by
605 `insn_current_length'. */
606
607 static short *insn_lengths;
608
609 #ifdef HAVE_ATTR_length
610 varray_type insn_addresses_;
611 #endif
612
613 /* Max uid for which the above arrays are valid. */
614 static int insn_lengths_max_uid;
615
616 /* Address of insn being processed. Used by `insn_current_length'. */
617 int insn_current_address;
618
619 /* Address of insn being processed in previous iteration. */
620 int insn_last_address;
621
622 /* konwn invariant alignment of insn being processed. */
623 int insn_current_align;
624
625 /* After shorten_branches, for any insn, uid_align[INSN_UID (insn)]
626 gives the next following alignment insn that increases the known
627 alignment, or NULL_RTX if there is no such insn.
628 For any alignment obtained this way, we can again index uid_align with
629 its uid to obtain the next following align that in turn increases the
630 alignment, till we reach NULL_RTX; the sequence obtained this way
631 for each insn we'll call the alignment chain of this insn in the following
632 comments. */
633
634 struct label_alignment
635 {
636 short alignment;
637 short max_skip;
638 };
639
640 static rtx *uid_align;
641 static int *uid_shuid;
642 static struct label_alignment *label_align;
643
644 /* Indicate that branch shortening hasn't yet been done. */
645
646 void
647 init_insn_lengths ()
648 {
649 if (label_align)
650 {
651 free (label_align);
652 label_align = 0;
653 }
654 if (uid_shuid)
655 {
656 free (uid_shuid);
657 uid_shuid = 0;
658 }
659 if (insn_lengths)
660 {
661 free (insn_lengths);
662 insn_lengths = 0;
663 insn_lengths_max_uid = 0;
664 }
665 #ifdef HAVE_ATTR_length
666 INSN_ADDRESSES_FREE ();
667 #endif
668 if (uid_align)
669 {
670 free (uid_align);
671 uid_align = 0;
672 }
673 }
674
675 /* Obtain the current length of an insn. If branch shortening has been done,
676 get its actual length. Otherwise, get its maximum length. */
677
678 int
679 get_attr_length (insn)
680 rtx insn ATTRIBUTE_UNUSED;
681 {
682 #ifdef HAVE_ATTR_length
683 rtx body;
684 int i;
685 int length = 0;
686
687 if (insn_lengths_max_uid > INSN_UID (insn))
688 return insn_lengths[INSN_UID (insn)];
689 else
690 switch (GET_CODE (insn))
691 {
692 case NOTE:
693 case BARRIER:
694 case CODE_LABEL:
695 return 0;
696
697 case CALL_INSN:
698 length = insn_default_length (insn);
699 break;
700
701 case JUMP_INSN:
702 body = PATTERN (insn);
703 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
704 {
705 /* Alignment is machine-dependent and should be handled by
706 ADDR_VEC_ALIGN. */
707 }
708 else
709 length = insn_default_length (insn);
710 break;
711
712 case INSN:
713 body = PATTERN (insn);
714 if (GET_CODE (body) == USE || GET_CODE (body) == CLOBBER)
715 return 0;
716
717 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
718 length = asm_insn_count (body) * insn_default_length (insn);
719 else if (GET_CODE (body) == SEQUENCE)
720 for (i = 0; i < XVECLEN (body, 0); i++)
721 length += get_attr_length (XVECEXP (body, 0, i));
722 else
723 length = insn_default_length (insn);
724 break;
725
726 default:
727 break;
728 }
729
730 #ifdef ADJUST_INSN_LENGTH
731 ADJUST_INSN_LENGTH (insn, length);
732 #endif
733 return length;
734 #else /* not HAVE_ATTR_length */
735 return 0;
736 #endif /* not HAVE_ATTR_length */
737 }
738 \f
739 /* Code to handle alignment inside shorten_branches. */
740
741 /* Here is an explanation how the algorithm in align_fuzz can give
742 proper results:
743
744 Call a sequence of instructions beginning with alignment point X
745 and continuing until the next alignment point `block X'. When `X'
746 is used in an expression, it means the alignment value of the
747 alignment point.
748
749 Call the distance between the start of the first insn of block X, and
750 the end of the last insn of block X `IX', for the `inner size of X'.
751 This is clearly the sum of the instruction lengths.
752
753 Likewise with the next alignment-delimited block following X, which we
754 shall call block Y.
755
756 Call the distance between the start of the first insn of block X, and
757 the start of the first insn of block Y `OX', for the `outer size of X'.
758
759 The estimated padding is then OX - IX.
760
761 OX can be safely estimated as
762
763 if (X >= Y)
764 OX = round_up(IX, Y)
765 else
766 OX = round_up(IX, X) + Y - X
767
768 Clearly est(IX) >= real(IX), because that only depends on the
769 instruction lengths, and those being overestimated is a given.
770
771 Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so
772 we needn't worry about that when thinking about OX.
773
774 When X >= Y, the alignment provided by Y adds no uncertainty factor
775 for branch ranges starting before X, so we can just round what we have.
776 But when X < Y, we don't know anything about the, so to speak,
777 `middle bits', so we have to assume the worst when aligning up from an
778 address mod X to one mod Y, which is Y - X. */
779
780 #ifndef LABEL_ALIGN
781 #define LABEL_ALIGN(LABEL) align_labels_log
782 #endif
783
784 #ifndef LABEL_ALIGN_MAX_SKIP
785 #define LABEL_ALIGN_MAX_SKIP (align_labels-1)
786 #endif
787
788 #ifndef LOOP_ALIGN
789 #define LOOP_ALIGN(LABEL) align_loops_log
790 #endif
791
792 #ifndef LOOP_ALIGN_MAX_SKIP
793 #define LOOP_ALIGN_MAX_SKIP (align_loops-1)
794 #endif
795
796 #ifndef LABEL_ALIGN_AFTER_BARRIER
797 #define LABEL_ALIGN_AFTER_BARRIER(LABEL) align_jumps_log
798 #endif
799
800 #ifndef LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP
801 #define LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP (align_jumps-1)
802 #endif
803
804 #ifndef ADDR_VEC_ALIGN
805 static int
806 final_addr_vec_align (addr_vec)
807 rtx addr_vec;
808 {
809 int align = exact_log2 (GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec))));
810
811 if (align > BIGGEST_ALIGNMENT / BITS_PER_UNIT)
812 align = BIGGEST_ALIGNMENT / BITS_PER_UNIT;
813 return align;
814
815 }
816
817 #define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC)
818 #endif
819
820 #ifndef INSN_LENGTH_ALIGNMENT
821 #define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log
822 #endif
823
824 #define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)])
825
826 static int min_labelno, max_labelno;
827
828 #define LABEL_TO_ALIGNMENT(LABEL) \
829 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment)
830
831 #define LABEL_TO_MAX_SKIP(LABEL) \
832 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip)
833
834 /* For the benefit of port specific code do this also as a function. */
835
836 int
837 label_to_alignment (label)
838 rtx label;
839 {
840 return LABEL_TO_ALIGNMENT (label);
841 }
842
843 #ifdef HAVE_ATTR_length
844 /* The differences in addresses
845 between a branch and its target might grow or shrink depending on
846 the alignment the start insn of the range (the branch for a forward
847 branch or the label for a backward branch) starts out on; if these
848 differences are used naively, they can even oscillate infinitely.
849 We therefore want to compute a 'worst case' address difference that
850 is independent of the alignment the start insn of the range end
851 up on, and that is at least as large as the actual difference.
852 The function align_fuzz calculates the amount we have to add to the
853 naively computed difference, by traversing the part of the alignment
854 chain of the start insn of the range that is in front of the end insn
855 of the range, and considering for each alignment the maximum amount
856 that it might contribute to a size increase.
857
858 For casesi tables, we also want to know worst case minimum amounts of
859 address difference, in case a machine description wants to introduce
860 some common offset that is added to all offsets in a table.
861 For this purpose, align_fuzz with a growth argument of 0 comuptes the
862 appropriate adjustment. */
863
864 /* Compute the maximum delta by which the difference of the addresses of
865 START and END might grow / shrink due to a different address for start
866 which changes the size of alignment insns between START and END.
867 KNOWN_ALIGN_LOG is the alignment known for START.
868 GROWTH should be ~0 if the objective is to compute potential code size
869 increase, and 0 if the objective is to compute potential shrink.
870 The return value is undefined for any other value of GROWTH. */
871
872 static int
873 align_fuzz (start, end, known_align_log, growth)
874 rtx start, end;
875 int known_align_log;
876 unsigned growth;
877 {
878 int uid = INSN_UID (start);
879 rtx align_label;
880 int known_align = 1 << known_align_log;
881 int end_shuid = INSN_SHUID (end);
882 int fuzz = 0;
883
884 for (align_label = uid_align[uid]; align_label; align_label = uid_align[uid])
885 {
886 int align_addr, new_align;
887
888 uid = INSN_UID (align_label);
889 align_addr = INSN_ADDRESSES (uid) - insn_lengths[uid];
890 if (uid_shuid[uid] > end_shuid)
891 break;
892 known_align_log = LABEL_TO_ALIGNMENT (align_label);
893 new_align = 1 << known_align_log;
894 if (new_align < known_align)
895 continue;
896 fuzz += (-align_addr ^ growth) & (new_align - known_align);
897 known_align = new_align;
898 }
899 return fuzz;
900 }
901
902 /* Compute a worst-case reference address of a branch so that it
903 can be safely used in the presence of aligned labels. Since the
904 size of the branch itself is unknown, the size of the branch is
905 not included in the range. I.e. for a forward branch, the reference
906 address is the end address of the branch as known from the previous
907 branch shortening pass, minus a value to account for possible size
908 increase due to alignment. For a backward branch, it is the start
909 address of the branch as known from the current pass, plus a value
910 to account for possible size increase due to alignment.
911 NB.: Therefore, the maximum offset allowed for backward branches needs
912 to exclude the branch size. */
913
914 int
915 insn_current_reference_address (branch)
916 rtx branch;
917 {
918 rtx dest, seq;
919 int seq_uid;
920
921 if (! INSN_ADDRESSES_SET_P ())
922 return 0;
923
924 seq = NEXT_INSN (PREV_INSN (branch));
925 seq_uid = INSN_UID (seq);
926 if (GET_CODE (branch) != JUMP_INSN)
927 /* This can happen for example on the PA; the objective is to know the
928 offset to address something in front of the start of the function.
929 Thus, we can treat it like a backward branch.
930 We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than
931 any alignment we'd encounter, so we skip the call to align_fuzz. */
932 return insn_current_address;
933 dest = JUMP_LABEL (branch);
934
935 /* BRANCH has no proper alignment chain set, so use SEQ.
936 BRANCH also has no INSN_SHUID. */
937 if (INSN_SHUID (seq) < INSN_SHUID (dest))
938 {
939 /* Forward branch. */
940 return (insn_last_address + insn_lengths[seq_uid]
941 - align_fuzz (seq, dest, length_unit_log, ~0));
942 }
943 else
944 {
945 /* Backward branch. */
946 return (insn_current_address
947 + align_fuzz (dest, seq, length_unit_log, ~0));
948 }
949 }
950 #endif /* HAVE_ATTR_length */
951 \f
952 /* Make a pass over all insns and compute their actual lengths by shortening
953 any branches of variable length if possible. */
954
955 /* Give a default value for the lowest address in a function. */
956
957 #ifndef FIRST_INSN_ADDRESS
958 #define FIRST_INSN_ADDRESS 0
959 #endif
960
961 /* shorten_branches might be called multiple times: for example, the SH
962 port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG.
963 In order to do this, it needs proper length information, which it obtains
964 by calling shorten_branches. This cannot be collapsed with
965 shorten_branches itself into a single pass unless we also want to intergate
966 reorg.c, since the branch splitting exposes new instructions with delay
967 slots. */
968
969 void
970 shorten_branches (first)
971 rtx first ATTRIBUTE_UNUSED;
972 {
973 rtx insn;
974 int max_uid;
975 int i;
976 int max_log;
977 int max_skip;
978 #ifdef HAVE_ATTR_length
979 #define MAX_CODE_ALIGN 16
980 rtx seq;
981 int something_changed = 1;
982 char *varying_length;
983 rtx body;
984 int uid;
985 rtx align_tab[MAX_CODE_ALIGN];
986
987 /* In order to make sure that all instructions have valid length info,
988 we must split them before we compute the address/length info. */
989
990 for (insn = NEXT_INSN (first); insn; insn = NEXT_INSN (insn))
991 if (INSN_P (insn))
992 {
993 rtx old = insn;
994 /* Don't split the insn if it has been deleted. */
995 if (! INSN_DELETED_P (old))
996 insn = try_split (PATTERN (old), old, 1);
997 /* When not optimizing, the old insn will be still left around
998 with only the 'deleted' bit set. Transform it into a note
999 to avoid confusion of subsequent processing. */
1000 if (INSN_DELETED_P (old))
1001 {
1002 PUT_CODE (old, NOTE);
1003 NOTE_LINE_NUMBER (old) = NOTE_INSN_DELETED;
1004 NOTE_SOURCE_FILE (old) = 0;
1005 }
1006 }
1007 #endif
1008
1009 /* We must do some computations even when not actually shortening, in
1010 order to get the alignment information for the labels. */
1011
1012 init_insn_lengths ();
1013
1014 /* Compute maximum UID and allocate label_align / uid_shuid. */
1015 max_uid = get_max_uid ();
1016
1017 max_labelno = max_label_num ();
1018 min_labelno = get_first_label_num ();
1019 label_align = (struct label_alignment *)
1020 xcalloc ((max_labelno - min_labelno + 1), sizeof (struct label_alignment));
1021
1022 uid_shuid = (int *) xmalloc (max_uid * sizeof *uid_shuid);
1023
1024 /* Initialize label_align and set up uid_shuid to be strictly
1025 monotonically rising with insn order. */
1026 /* We use max_log here to keep track of the maximum alignment we want to
1027 impose on the next CODE_LABEL (or the current one if we are processing
1028 the CODE_LABEL itself). */
1029
1030 max_log = 0;
1031 max_skip = 0;
1032
1033 for (insn = get_insns (), i = 1; insn; insn = NEXT_INSN (insn))
1034 {
1035 int log;
1036
1037 INSN_SHUID (insn) = i++;
1038 if (INSN_P (insn))
1039 {
1040 /* reorg might make the first insn of a loop being run once only,
1041 and delete the label in front of it. Then we want to apply
1042 the loop alignment to the new label created by reorg, which
1043 is separated by the former loop start insn from the
1044 NOTE_INSN_LOOP_BEG. */
1045 }
1046 else if (GET_CODE (insn) == CODE_LABEL)
1047 {
1048 rtx next;
1049
1050 log = LABEL_ALIGN (insn);
1051 if (max_log < log)
1052 {
1053 max_log = log;
1054 max_skip = LABEL_ALIGN_MAX_SKIP;
1055 }
1056 next = NEXT_INSN (insn);
1057 /* ADDR_VECs only take room if read-only data goes into the text
1058 section. */
1059 if (JUMP_TABLES_IN_TEXT_SECTION
1060 #if !defined(READONLY_DATA_SECTION)
1061 || 1
1062 #endif
1063 )
1064 if (next && GET_CODE (next) == JUMP_INSN)
1065 {
1066 rtx nextbody = PATTERN (next);
1067 if (GET_CODE (nextbody) == ADDR_VEC
1068 || GET_CODE (nextbody) == ADDR_DIFF_VEC)
1069 {
1070 log = ADDR_VEC_ALIGN (next);
1071 if (max_log < log)
1072 {
1073 max_log = log;
1074 max_skip = LABEL_ALIGN_MAX_SKIP;
1075 }
1076 }
1077 }
1078 LABEL_TO_ALIGNMENT (insn) = max_log;
1079 LABEL_TO_MAX_SKIP (insn) = max_skip;
1080 max_log = 0;
1081 max_skip = 0;
1082 }
1083 else if (GET_CODE (insn) == BARRIER)
1084 {
1085 rtx label;
1086
1087 for (label = insn; label && ! INSN_P (label);
1088 label = NEXT_INSN (label))
1089 if (GET_CODE (label) == CODE_LABEL)
1090 {
1091 log = LABEL_ALIGN_AFTER_BARRIER (insn);
1092 if (max_log < log)
1093 {
1094 max_log = log;
1095 max_skip = LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP;
1096 }
1097 break;
1098 }
1099 }
1100 /* Again, we allow NOTE_INSN_LOOP_BEG - INSN - CODE_LABEL
1101 sequences in order to handle reorg output efficiently. */
1102 else if (GET_CODE (insn) == NOTE
1103 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
1104 {
1105 rtx label;
1106 int nest = 0;
1107
1108 /* Search for the label that starts the loop.
1109 Don't skip past the end of the loop, since that could
1110 lead to putting an alignment where it does not belong.
1111 However, a label after a nested (non-)loop would be OK. */
1112 for (label = insn; label; label = NEXT_INSN (label))
1113 {
1114 if (GET_CODE (label) == NOTE
1115 && NOTE_LINE_NUMBER (label) == NOTE_INSN_LOOP_BEG)
1116 nest++;
1117 else if (GET_CODE (label) == NOTE
1118 && NOTE_LINE_NUMBER (label) == NOTE_INSN_LOOP_END
1119 && --nest == 0)
1120 break;
1121 else if (GET_CODE (label) == CODE_LABEL)
1122 {
1123 log = LOOP_ALIGN (label);
1124 if (max_log < log)
1125 {
1126 max_log = log;
1127 max_skip = LOOP_ALIGN_MAX_SKIP;
1128 }
1129 break;
1130 }
1131 }
1132 }
1133 else
1134 continue;
1135 }
1136 #ifdef HAVE_ATTR_length
1137
1138 /* Allocate the rest of the arrays. */
1139 insn_lengths = (short *) xmalloc (max_uid * sizeof (short));
1140 insn_lengths_max_uid = max_uid;
1141 /* Syntax errors can lead to labels being outside of the main insn stream.
1142 Initialize insn_addresses, so that we get reproducible results. */
1143 INSN_ADDRESSES_ALLOC (max_uid);
1144
1145 varying_length = (char *) xcalloc (max_uid, sizeof (char));
1146
1147 /* Initialize uid_align. We scan instructions
1148 from end to start, and keep in align_tab[n] the last seen insn
1149 that does an alignment of at least n+1, i.e. the successor
1150 in the alignment chain for an insn that does / has a known
1151 alignment of n. */
1152 uid_align = (rtx *) xcalloc (max_uid, sizeof *uid_align);
1153
1154 for (i = MAX_CODE_ALIGN; --i >= 0;)
1155 align_tab[i] = NULL_RTX;
1156 seq = get_last_insn ();
1157 for (; seq; seq = PREV_INSN (seq))
1158 {
1159 int uid = INSN_UID (seq);
1160 int log;
1161 log = (GET_CODE (seq) == CODE_LABEL ? LABEL_TO_ALIGNMENT (seq) : 0);
1162 uid_align[uid] = align_tab[0];
1163 if (log)
1164 {
1165 /* Found an alignment label. */
1166 uid_align[uid] = align_tab[log];
1167 for (i = log - 1; i >= 0; i--)
1168 align_tab[i] = seq;
1169 }
1170 }
1171 #ifdef CASE_VECTOR_SHORTEN_MODE
1172 if (optimize)
1173 {
1174 /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum
1175 label fields. */
1176
1177 int min_shuid = INSN_SHUID (get_insns ()) - 1;
1178 int max_shuid = INSN_SHUID (get_last_insn ()) + 1;
1179 int rel;
1180
1181 for (insn = first; insn != 0; insn = NEXT_INSN (insn))
1182 {
1183 rtx min_lab = NULL_RTX, max_lab = NULL_RTX, pat;
1184 int len, i, min, max, insn_shuid;
1185 int min_align;
1186 addr_diff_vec_flags flags;
1187
1188 if (GET_CODE (insn) != JUMP_INSN
1189 || GET_CODE (PATTERN (insn)) != ADDR_DIFF_VEC)
1190 continue;
1191 pat = PATTERN (insn);
1192 len = XVECLEN (pat, 1);
1193 if (len <= 0)
1194 abort ();
1195 min_align = MAX_CODE_ALIGN;
1196 for (min = max_shuid, max = min_shuid, i = len - 1; i >= 0; i--)
1197 {
1198 rtx lab = XEXP (XVECEXP (pat, 1, i), 0);
1199 int shuid = INSN_SHUID (lab);
1200 if (shuid < min)
1201 {
1202 min = shuid;
1203 min_lab = lab;
1204 }
1205 if (shuid > max)
1206 {
1207 max = shuid;
1208 max_lab = lab;
1209 }
1210 if (min_align > LABEL_TO_ALIGNMENT (lab))
1211 min_align = LABEL_TO_ALIGNMENT (lab);
1212 }
1213 XEXP (pat, 2) = gen_rtx_LABEL_REF (VOIDmode, min_lab);
1214 XEXP (pat, 3) = gen_rtx_LABEL_REF (VOIDmode, max_lab);
1215 insn_shuid = INSN_SHUID (insn);
1216 rel = INSN_SHUID (XEXP (XEXP (pat, 0), 0));
1217 flags.min_align = min_align;
1218 flags.base_after_vec = rel > insn_shuid;
1219 flags.min_after_vec = min > insn_shuid;
1220 flags.max_after_vec = max > insn_shuid;
1221 flags.min_after_base = min > rel;
1222 flags.max_after_base = max > rel;
1223 ADDR_DIFF_VEC_FLAGS (pat) = flags;
1224 }
1225 }
1226 #endif /* CASE_VECTOR_SHORTEN_MODE */
1227
1228 /* Compute initial lengths, addresses, and varying flags for each insn. */
1229 for (insn_current_address = FIRST_INSN_ADDRESS, insn = first;
1230 insn != 0;
1231 insn_current_address += insn_lengths[uid], insn = NEXT_INSN (insn))
1232 {
1233 uid = INSN_UID (insn);
1234
1235 insn_lengths[uid] = 0;
1236
1237 if (GET_CODE (insn) == CODE_LABEL)
1238 {
1239 int log = LABEL_TO_ALIGNMENT (insn);
1240 if (log)
1241 {
1242 int align = 1 << log;
1243 int new_address = (insn_current_address + align - 1) & -align;
1244 insn_lengths[uid] = new_address - insn_current_address;
1245 }
1246 }
1247
1248 INSN_ADDRESSES (uid) = insn_current_address;
1249
1250 if (GET_CODE (insn) == NOTE || GET_CODE (insn) == BARRIER
1251 || GET_CODE (insn) == CODE_LABEL)
1252 continue;
1253 if (INSN_DELETED_P (insn))
1254 continue;
1255
1256 body = PATTERN (insn);
1257 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
1258 {
1259 /* This only takes room if read-only data goes into the text
1260 section. */
1261 if (JUMP_TABLES_IN_TEXT_SECTION
1262 #if !defined(READONLY_DATA_SECTION)
1263 || 1
1264 #endif
1265 )
1266 insn_lengths[uid] = (XVECLEN (body,
1267 GET_CODE (body) == ADDR_DIFF_VEC)
1268 * GET_MODE_SIZE (GET_MODE (body)));
1269 /* Alignment is handled by ADDR_VEC_ALIGN. */
1270 }
1271 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
1272 insn_lengths[uid] = asm_insn_count (body) * insn_default_length (insn);
1273 else if (GET_CODE (body) == SEQUENCE)
1274 {
1275 int i;
1276 int const_delay_slots;
1277 #ifdef DELAY_SLOTS
1278 const_delay_slots = const_num_delay_slots (XVECEXP (body, 0, 0));
1279 #else
1280 const_delay_slots = 0;
1281 #endif
1282 /* Inside a delay slot sequence, we do not do any branch shortening
1283 if the shortening could change the number of delay slots
1284 of the branch. */
1285 for (i = 0; i < XVECLEN (body, 0); i++)
1286 {
1287 rtx inner_insn = XVECEXP (body, 0, i);
1288 int inner_uid = INSN_UID (inner_insn);
1289 int inner_length;
1290
1291 if (GET_CODE (body) == ASM_INPUT
1292 || asm_noperands (PATTERN (XVECEXP (body, 0, i))) >= 0)
1293 inner_length = (asm_insn_count (PATTERN (inner_insn))
1294 * insn_default_length (inner_insn));
1295 else
1296 inner_length = insn_default_length (inner_insn);
1297
1298 insn_lengths[inner_uid] = inner_length;
1299 if (const_delay_slots)
1300 {
1301 if ((varying_length[inner_uid]
1302 = insn_variable_length_p (inner_insn)) != 0)
1303 varying_length[uid] = 1;
1304 INSN_ADDRESSES (inner_uid) = (insn_current_address
1305 + insn_lengths[uid]);
1306 }
1307 else
1308 varying_length[inner_uid] = 0;
1309 insn_lengths[uid] += inner_length;
1310 }
1311 }
1312 else if (GET_CODE (body) != USE && GET_CODE (body) != CLOBBER)
1313 {
1314 insn_lengths[uid] = insn_default_length (insn);
1315 varying_length[uid] = insn_variable_length_p (insn);
1316 }
1317
1318 /* If needed, do any adjustment. */
1319 #ifdef ADJUST_INSN_LENGTH
1320 ADJUST_INSN_LENGTH (insn, insn_lengths[uid]);
1321 if (insn_lengths[uid] < 0)
1322 fatal_insn ("Negative insn length", insn);
1323 #endif
1324 }
1325
1326 /* Now loop over all the insns finding varying length insns. For each,
1327 get the current insn length. If it has changed, reflect the change.
1328 When nothing changes for a full pass, we are done. */
1329
1330 while (something_changed)
1331 {
1332 something_changed = 0;
1333 insn_current_align = MAX_CODE_ALIGN - 1;
1334 for (insn_current_address = FIRST_INSN_ADDRESS, insn = first;
1335 insn != 0;
1336 insn = NEXT_INSN (insn))
1337 {
1338 int new_length;
1339 #ifdef ADJUST_INSN_LENGTH
1340 int tmp_length;
1341 #endif
1342 int length_align;
1343
1344 uid = INSN_UID (insn);
1345
1346 if (GET_CODE (insn) == CODE_LABEL)
1347 {
1348 int log = LABEL_TO_ALIGNMENT (insn);
1349 if (log > insn_current_align)
1350 {
1351 int align = 1 << log;
1352 int new_address= (insn_current_address + align - 1) & -align;
1353 insn_lengths[uid] = new_address - insn_current_address;
1354 insn_current_align = log;
1355 insn_current_address = new_address;
1356 }
1357 else
1358 insn_lengths[uid] = 0;
1359 INSN_ADDRESSES (uid) = insn_current_address;
1360 continue;
1361 }
1362
1363 length_align = INSN_LENGTH_ALIGNMENT (insn);
1364 if (length_align < insn_current_align)
1365 insn_current_align = length_align;
1366
1367 insn_last_address = INSN_ADDRESSES (uid);
1368 INSN_ADDRESSES (uid) = insn_current_address;
1369
1370 #ifdef CASE_VECTOR_SHORTEN_MODE
1371 if (optimize && GET_CODE (insn) == JUMP_INSN
1372 && GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
1373 {
1374 rtx body = PATTERN (insn);
1375 int old_length = insn_lengths[uid];
1376 rtx rel_lab = XEXP (XEXP (body, 0), 0);
1377 rtx min_lab = XEXP (XEXP (body, 2), 0);
1378 rtx max_lab = XEXP (XEXP (body, 3), 0);
1379 addr_diff_vec_flags flags = ADDR_DIFF_VEC_FLAGS (body);
1380 int rel_addr = INSN_ADDRESSES (INSN_UID (rel_lab));
1381 int min_addr = INSN_ADDRESSES (INSN_UID (min_lab));
1382 int max_addr = INSN_ADDRESSES (INSN_UID (max_lab));
1383 rtx prev;
1384 int rel_align = 0;
1385
1386 /* Try to find a known alignment for rel_lab. */
1387 for (prev = rel_lab;
1388 prev
1389 && ! insn_lengths[INSN_UID (prev)]
1390 && ! (varying_length[INSN_UID (prev)] & 1);
1391 prev = PREV_INSN (prev))
1392 if (varying_length[INSN_UID (prev)] & 2)
1393 {
1394 rel_align = LABEL_TO_ALIGNMENT (prev);
1395 break;
1396 }
1397
1398 /* See the comment on addr_diff_vec_flags in rtl.h for the
1399 meaning of the flags values. base: REL_LAB vec: INSN */
1400 /* Anything after INSN has still addresses from the last
1401 pass; adjust these so that they reflect our current
1402 estimate for this pass. */
1403 if (flags.base_after_vec)
1404 rel_addr += insn_current_address - insn_last_address;
1405 if (flags.min_after_vec)
1406 min_addr += insn_current_address - insn_last_address;
1407 if (flags.max_after_vec)
1408 max_addr += insn_current_address - insn_last_address;
1409 /* We want to know the worst case, i.e. lowest possible value
1410 for the offset of MIN_LAB. If MIN_LAB is after REL_LAB,
1411 its offset is positive, and we have to be wary of code shrink;
1412 otherwise, it is negative, and we have to be vary of code
1413 size increase. */
1414 if (flags.min_after_base)
1415 {
1416 /* If INSN is between REL_LAB and MIN_LAB, the size
1417 changes we are about to make can change the alignment
1418 within the observed offset, therefore we have to break
1419 it up into two parts that are independent. */
1420 if (! flags.base_after_vec && flags.min_after_vec)
1421 {
1422 min_addr -= align_fuzz (rel_lab, insn, rel_align, 0);
1423 min_addr -= align_fuzz (insn, min_lab, 0, 0);
1424 }
1425 else
1426 min_addr -= align_fuzz (rel_lab, min_lab, rel_align, 0);
1427 }
1428 else
1429 {
1430 if (flags.base_after_vec && ! flags.min_after_vec)
1431 {
1432 min_addr -= align_fuzz (min_lab, insn, 0, ~0);
1433 min_addr -= align_fuzz (insn, rel_lab, 0, ~0);
1434 }
1435 else
1436 min_addr -= align_fuzz (min_lab, rel_lab, 0, ~0);
1437 }
1438 /* Likewise, determine the highest lowest possible value
1439 for the offset of MAX_LAB. */
1440 if (flags.max_after_base)
1441 {
1442 if (! flags.base_after_vec && flags.max_after_vec)
1443 {
1444 max_addr += align_fuzz (rel_lab, insn, rel_align, ~0);
1445 max_addr += align_fuzz (insn, max_lab, 0, ~0);
1446 }
1447 else
1448 max_addr += align_fuzz (rel_lab, max_lab, rel_align, ~0);
1449 }
1450 else
1451 {
1452 if (flags.base_after_vec && ! flags.max_after_vec)
1453 {
1454 max_addr += align_fuzz (max_lab, insn, 0, 0);
1455 max_addr += align_fuzz (insn, rel_lab, 0, 0);
1456 }
1457 else
1458 max_addr += align_fuzz (max_lab, rel_lab, 0, 0);
1459 }
1460 PUT_MODE (body, CASE_VECTOR_SHORTEN_MODE (min_addr - rel_addr,
1461 max_addr - rel_addr,
1462 body));
1463 if (JUMP_TABLES_IN_TEXT_SECTION
1464 #if !defined(READONLY_DATA_SECTION)
1465 || 1
1466 #endif
1467 )
1468 {
1469 insn_lengths[uid]
1470 = (XVECLEN (body, 1) * GET_MODE_SIZE (GET_MODE (body)));
1471 insn_current_address += insn_lengths[uid];
1472 if (insn_lengths[uid] != old_length)
1473 something_changed = 1;
1474 }
1475
1476 continue;
1477 }
1478 #endif /* CASE_VECTOR_SHORTEN_MODE */
1479
1480 if (! (varying_length[uid]))
1481 {
1482 insn_current_address += insn_lengths[uid];
1483 continue;
1484 }
1485 if (GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
1486 {
1487 int i;
1488
1489 body = PATTERN (insn);
1490 new_length = 0;
1491 for (i = 0; i < XVECLEN (body, 0); i++)
1492 {
1493 rtx inner_insn = XVECEXP (body, 0, i);
1494 int inner_uid = INSN_UID (inner_insn);
1495 int inner_length;
1496
1497 INSN_ADDRESSES (inner_uid) = insn_current_address;
1498
1499 /* insn_current_length returns 0 for insns with a
1500 non-varying length. */
1501 if (! varying_length[inner_uid])
1502 inner_length = insn_lengths[inner_uid];
1503 else
1504 inner_length = insn_current_length (inner_insn);
1505
1506 if (inner_length != insn_lengths[inner_uid])
1507 {
1508 insn_lengths[inner_uid] = inner_length;
1509 something_changed = 1;
1510 }
1511 insn_current_address += insn_lengths[inner_uid];
1512 new_length += inner_length;
1513 }
1514 }
1515 else
1516 {
1517 new_length = insn_current_length (insn);
1518 insn_current_address += new_length;
1519 }
1520
1521 #ifdef ADJUST_INSN_LENGTH
1522 /* If needed, do any adjustment. */
1523 tmp_length = new_length;
1524 ADJUST_INSN_LENGTH (insn, new_length);
1525 insn_current_address += (new_length - tmp_length);
1526 #endif
1527
1528 if (new_length != insn_lengths[uid])
1529 {
1530 insn_lengths[uid] = new_length;
1531 something_changed = 1;
1532 }
1533 }
1534 /* For a non-optimizing compile, do only a single pass. */
1535 if (!optimize)
1536 break;
1537 }
1538
1539 free (varying_length);
1540
1541 #endif /* HAVE_ATTR_length */
1542 }
1543
1544 #ifdef HAVE_ATTR_length
1545 /* Given the body of an INSN known to be generated by an ASM statement, return
1546 the number of machine instructions likely to be generated for this insn.
1547 This is used to compute its length. */
1548
1549 static int
1550 asm_insn_count (body)
1551 rtx body;
1552 {
1553 const char *template;
1554 int count = 1;
1555
1556 if (GET_CODE (body) == ASM_INPUT)
1557 template = XSTR (body, 0);
1558 else
1559 template = decode_asm_operands (body, NULL_PTR, NULL_PTR,
1560 NULL_PTR, NULL_PTR);
1561
1562 for (; *template; template++)
1563 if (IS_ASM_LOGICAL_LINE_SEPARATOR (*template) || *template == '\n')
1564 count++;
1565
1566 return count;
1567 }
1568 #endif
1569 \f
1570 /* Output assembler code for the start of a function,
1571 and initialize some of the variables in this file
1572 for the new function. The label for the function and associated
1573 assembler pseudo-ops have already been output in `assemble_start_function'.
1574
1575 FIRST is the first insn of the rtl for the function being compiled.
1576 FILE is the file to write assembler code to.
1577 OPTIMIZE is nonzero if we should eliminate redundant
1578 test and compare insns. */
1579
1580 void
1581 final_start_function (first, file, optimize)
1582 rtx first;
1583 FILE *file;
1584 int optimize ATTRIBUTE_UNUSED;
1585 {
1586 block_depth = 0;
1587
1588 this_is_asm_operands = 0;
1589
1590 #ifdef NON_SAVING_SETJMP
1591 /* A function that calls setjmp should save and restore all the
1592 call-saved registers on a system where longjmp clobbers them. */
1593 if (NON_SAVING_SETJMP && current_function_calls_setjmp)
1594 {
1595 int i;
1596
1597 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1598 if (!call_used_regs[i])
1599 regs_ever_live[i] = 1;
1600 }
1601 #endif
1602
1603 /* Initial line number is supposed to be output
1604 before the function's prologue and label
1605 so that the function's address will not appear to be
1606 in the last statement of the preceding function. */
1607 if (NOTE_LINE_NUMBER (first) != NOTE_INSN_DELETED)
1608 last_linenum = high_block_linenum = high_function_linenum
1609 = NOTE_LINE_NUMBER (first);
1610
1611 #if defined (DWARF2_UNWIND_INFO) || defined (DWARF2_DEBUGGING_INFO)
1612 /* Output DWARF definition of the function. */
1613 if (dwarf2out_do_frame ())
1614 dwarf2out_begin_prologue ();
1615 else
1616 current_function_func_begin_label = 0;
1617 #endif
1618
1619 /* For SDB and XCOFF, the function beginning must be marked between
1620 the function label and the prologue. We always need this, even when
1621 -g1 was used. Defer on MIPS systems so that parameter descriptions
1622 follow function entry. */
1623 #if defined(SDB_DEBUGGING_INFO) && !defined(MIPS_DEBUGGING_INFO)
1624 if (write_symbols == SDB_DEBUG)
1625 sdbout_begin_function (last_linenum);
1626 else
1627 #endif
1628 #ifdef XCOFF_DEBUGGING_INFO
1629 if (write_symbols == XCOFF_DEBUG)
1630 xcoffout_begin_function (file, last_linenum);
1631 else
1632 #endif
1633 /* But only output line number for other debug info types if -g2
1634 or better. */
1635 if (NOTE_LINE_NUMBER (first) != NOTE_INSN_DELETED)
1636 output_source_line (file, first);
1637
1638 #ifdef LEAF_REG_REMAP
1639 if (current_function_uses_only_leaf_regs)
1640 leaf_renumber_regs (first);
1641 #endif
1642
1643 /* The Sun386i and perhaps other machines don't work right
1644 if the profiling code comes after the prologue. */
1645 #ifdef PROFILE_BEFORE_PROLOGUE
1646 if (profile_flag)
1647 profile_function (file);
1648 #endif /* PROFILE_BEFORE_PROLOGUE */
1649
1650 #if defined (DWARF2_UNWIND_INFO) && defined (HAVE_prologue)
1651 if (dwarf2out_do_frame ())
1652 dwarf2out_frame_debug (NULL_RTX);
1653 #endif
1654
1655 /* If debugging, assign block numbers to all of the blocks in this
1656 function. */
1657 if (write_symbols)
1658 {
1659 number_blocks (current_function_decl);
1660 remove_unnecessary_notes ();
1661 /* We never actually put out begin/end notes for the top-level
1662 block in the function. But, conceptually, that block is
1663 always needed. */
1664 TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl)) = 1;
1665 }
1666
1667 #ifdef FUNCTION_PROLOGUE
1668 /* First output the function prologue: code to set up the stack frame. */
1669 FUNCTION_PROLOGUE (file, get_frame_size ());
1670 #endif
1671
1672 /* If the machine represents the prologue as RTL, the profiling code must
1673 be emitted when NOTE_INSN_PROLOGUE_END is scanned. */
1674 #ifdef HAVE_prologue
1675 if (! HAVE_prologue)
1676 #endif
1677 profile_after_prologue (file);
1678
1679 profile_label_no++;
1680
1681 /* If we are doing basic block profiling, remember a printable version
1682 of the function name. */
1683 if (profile_block_flag)
1684 {
1685 bb_func_label_num =
1686 add_bb_string ((*decl_printable_name) (current_function_decl, 2),
1687 FALSE);
1688 }
1689 }
1690
1691 static void
1692 profile_after_prologue (file)
1693 FILE *file ATTRIBUTE_UNUSED;
1694 {
1695 #ifdef FUNCTION_BLOCK_PROFILER
1696 if (profile_block_flag)
1697 {
1698 FUNCTION_BLOCK_PROFILER (file, count_basic_blocks);
1699 }
1700 #endif /* FUNCTION_BLOCK_PROFILER */
1701
1702 #ifndef PROFILE_BEFORE_PROLOGUE
1703 if (profile_flag)
1704 profile_function (file);
1705 #endif /* not PROFILE_BEFORE_PROLOGUE */
1706 }
1707
1708 static void
1709 profile_function (file)
1710 FILE *file;
1711 {
1712 #ifndef NO_PROFILE_COUNTERS
1713 int align = MIN (BIGGEST_ALIGNMENT, LONG_TYPE_SIZE);
1714 #endif
1715 #if defined(ASM_OUTPUT_REG_PUSH)
1716 #if defined(STRUCT_VALUE_INCOMING_REGNUM) || defined(STRUCT_VALUE_REGNUM)
1717 int sval = current_function_returns_struct;
1718 #endif
1719 #if defined(STATIC_CHAIN_INCOMING_REGNUM) || defined(STATIC_CHAIN_REGNUM)
1720 int cxt = current_function_needs_context;
1721 #endif
1722 #endif /* ASM_OUTPUT_REG_PUSH */
1723
1724 #ifndef NO_PROFILE_COUNTERS
1725 data_section ();
1726 ASM_OUTPUT_ALIGN (file, floor_log2 (align / BITS_PER_UNIT));
1727 ASM_OUTPUT_INTERNAL_LABEL (file, "LP", profile_label_no);
1728 assemble_integer (const0_rtx, LONG_TYPE_SIZE / BITS_PER_UNIT, 1);
1729 #endif
1730
1731 function_section (current_function_decl);
1732
1733 #if defined(STRUCT_VALUE_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1734 if (sval)
1735 ASM_OUTPUT_REG_PUSH (file, STRUCT_VALUE_INCOMING_REGNUM);
1736 #else
1737 #if defined(STRUCT_VALUE_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1738 if (sval)
1739 {
1740 ASM_OUTPUT_REG_PUSH (file, STRUCT_VALUE_REGNUM);
1741 }
1742 #endif
1743 #endif
1744
1745 #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1746 if (cxt)
1747 ASM_OUTPUT_REG_PUSH (file, STATIC_CHAIN_INCOMING_REGNUM);
1748 #else
1749 #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1750 if (cxt)
1751 {
1752 ASM_OUTPUT_REG_PUSH (file, STATIC_CHAIN_REGNUM);
1753 }
1754 #endif
1755 #endif
1756
1757 FUNCTION_PROFILER (file, profile_label_no);
1758
1759 #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1760 if (cxt)
1761 ASM_OUTPUT_REG_POP (file, STATIC_CHAIN_INCOMING_REGNUM);
1762 #else
1763 #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1764 if (cxt)
1765 {
1766 ASM_OUTPUT_REG_POP (file, STATIC_CHAIN_REGNUM);
1767 }
1768 #endif
1769 #endif
1770
1771 #if defined(STRUCT_VALUE_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1772 if (sval)
1773 ASM_OUTPUT_REG_POP (file, STRUCT_VALUE_INCOMING_REGNUM);
1774 #else
1775 #if defined(STRUCT_VALUE_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1776 if (sval)
1777 {
1778 ASM_OUTPUT_REG_POP (file, STRUCT_VALUE_REGNUM);
1779 }
1780 #endif
1781 #endif
1782 }
1783
1784 /* Output assembler code for the end of a function.
1785 For clarity, args are same as those of `final_start_function'
1786 even though not all of them are needed. */
1787
1788 void
1789 final_end_function (first, file, optimize)
1790 rtx first ATTRIBUTE_UNUSED;
1791 FILE *file ATTRIBUTE_UNUSED;
1792 int optimize ATTRIBUTE_UNUSED;
1793 {
1794 app_disable ();
1795
1796 #ifdef SDB_DEBUGGING_INFO
1797 if (write_symbols == SDB_DEBUG)
1798 sdbout_end_function (high_function_linenum);
1799 #endif
1800
1801 #ifdef DWARF_DEBUGGING_INFO
1802 if (write_symbols == DWARF_DEBUG)
1803 dwarfout_end_function ();
1804 #endif
1805
1806 #ifdef XCOFF_DEBUGGING_INFO
1807 if (write_symbols == XCOFF_DEBUG)
1808 xcoffout_end_function (file, high_function_linenum);
1809 #endif
1810
1811 #ifdef FUNCTION_EPILOGUE
1812 /* Finally, output the function epilogue:
1813 code to restore the stack frame and return to the caller. */
1814 FUNCTION_EPILOGUE (file, get_frame_size ());
1815 #endif
1816
1817 #ifdef SDB_DEBUGGING_INFO
1818 if (write_symbols == SDB_DEBUG)
1819 sdbout_end_epilogue ();
1820 #endif
1821
1822 #ifdef DWARF_DEBUGGING_INFO
1823 if (write_symbols == DWARF_DEBUG)
1824 dwarfout_end_epilogue ();
1825 #endif
1826
1827 #if defined (DWARF2_UNWIND_INFO) || defined (DWARF2_DEBUGGING_INFO)
1828 if (dwarf2out_do_frame ())
1829 dwarf2out_end_epilogue ();
1830 #endif
1831
1832 #ifdef XCOFF_DEBUGGING_INFO
1833 if (write_symbols == XCOFF_DEBUG)
1834 xcoffout_end_epilogue (file);
1835 #endif
1836
1837 bb_func_label_num = -1; /* not in function, nuke label # */
1838
1839 #ifdef IA64_UNWIND_INFO
1840 output_function_exception_table ();
1841 #endif
1842
1843 /* If FUNCTION_EPILOGUE is not defined, then the function body
1844 itself contains return instructions wherever needed. */
1845 }
1846 \f
1847 /* Add a block to the linked list that remembers the current line/file/function
1848 for basic block profiling. Emit the label in front of the basic block and
1849 the instructions that increment the count field. */
1850
1851 static void
1852 add_bb (file)
1853 FILE *file;
1854 {
1855 struct bb_list *ptr =
1856 (struct bb_list *) permalloc (sizeof (struct bb_list));
1857
1858 /* Add basic block to linked list. */
1859 ptr->next = 0;
1860 ptr->line_num = last_linenum;
1861 ptr->file_label_num = bb_file_label_num;
1862 ptr->func_label_num = bb_func_label_num;
1863 *bb_tail = ptr;
1864 bb_tail = &ptr->next;
1865
1866 /* Enable the table of basic-block use counts
1867 to point at the code it applies to. */
1868 ASM_OUTPUT_INTERNAL_LABEL (file, "LPB", count_basic_blocks);
1869
1870 /* Before first insn of this basic block, increment the
1871 count of times it was entered. */
1872 #ifdef BLOCK_PROFILER
1873 BLOCK_PROFILER (file, count_basic_blocks);
1874 #endif
1875 #ifdef HAVE_cc0
1876 CC_STATUS_INIT;
1877 #endif
1878
1879 new_block = 0;
1880 count_basic_blocks++;
1881 }
1882
1883 /* Add a string to be used for basic block profiling. */
1884
1885 static int
1886 add_bb_string (string, perm_p)
1887 const char *string;
1888 int perm_p;
1889 {
1890 int len;
1891 struct bb_str *ptr = 0;
1892
1893 if (!string)
1894 {
1895 string = "<unknown>";
1896 perm_p = TRUE;
1897 }
1898
1899 /* Allocate a new string if the current string isn't permanent. If
1900 the string is permanent search for the same string in other
1901 allocations. */
1902
1903 len = strlen (string) + 1;
1904 if (!perm_p)
1905 {
1906 char *p = (char *) permalloc (len);
1907 bcopy (string, p, len);
1908 string = p;
1909 }
1910 else
1911 for (ptr = sbb_head; ptr != (struct bb_str *) 0; ptr = ptr->next)
1912 if (ptr->string == string)
1913 break;
1914
1915 /* Allocate a new string block if we need to. */
1916 if (!ptr)
1917 {
1918 ptr = (struct bb_str *) permalloc (sizeof (*ptr));
1919 ptr->next = 0;
1920 ptr->length = len;
1921 ptr->label_num = sbb_label_num++;
1922 ptr->string = string;
1923 *sbb_tail = ptr;
1924 sbb_tail = &ptr->next;
1925 }
1926
1927 return ptr->label_num;
1928 }
1929 \f
1930 /* Output assembler code for some insns: all or part of a function.
1931 For description of args, see `final_start_function', above.
1932
1933 PRESCAN is 1 if we are not really outputting,
1934 just scanning as if we were outputting.
1935 Prescanning deletes and rearranges insns just like ordinary output.
1936 PRESCAN is -2 if we are outputting after having prescanned.
1937 In this case, don't try to delete or rearrange insns
1938 because that has already been done.
1939 Prescanning is done only on certain machines. */
1940
1941 void
1942 final (first, file, optimize, prescan)
1943 rtx first;
1944 FILE *file;
1945 int optimize;
1946 int prescan;
1947 {
1948 register rtx insn;
1949 int max_line = 0;
1950 int max_uid = 0;
1951
1952 last_ignored_compare = 0;
1953 new_block = 1;
1954
1955 check_exception_handler_labels ();
1956
1957 /* Make a map indicating which line numbers appear in this function.
1958 When producing SDB debugging info, delete troublesome line number
1959 notes from inlined functions in other files as well as duplicate
1960 line number notes. */
1961 #ifdef SDB_DEBUGGING_INFO
1962 if (write_symbols == SDB_DEBUG)
1963 {
1964 rtx last = 0;
1965 for (insn = first; insn; insn = NEXT_INSN (insn))
1966 if (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) > 0)
1967 {
1968 if ((RTX_INTEGRATED_P (insn)
1969 && strcmp (NOTE_SOURCE_FILE (insn), main_input_filename) != 0)
1970 || (last != 0
1971 && NOTE_LINE_NUMBER (insn) == NOTE_LINE_NUMBER (last)
1972 && NOTE_SOURCE_FILE (insn) == NOTE_SOURCE_FILE (last)))
1973 {
1974 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
1975 NOTE_SOURCE_FILE (insn) = 0;
1976 continue;
1977 }
1978 last = insn;
1979 if (NOTE_LINE_NUMBER (insn) > max_line)
1980 max_line = NOTE_LINE_NUMBER (insn);
1981 }
1982 }
1983 else
1984 #endif
1985 {
1986 for (insn = first; insn; insn = NEXT_INSN (insn))
1987 if (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) > max_line)
1988 max_line = NOTE_LINE_NUMBER (insn);
1989 }
1990
1991 line_note_exists = (char *) xcalloc (max_line + 1, sizeof (char));
1992
1993 for (insn = first; insn; insn = NEXT_INSN (insn))
1994 {
1995 if (INSN_UID (insn) > max_uid) /* find largest UID */
1996 max_uid = INSN_UID (insn);
1997 if (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) > 0)
1998 line_note_exists[NOTE_LINE_NUMBER (insn)] = 1;
1999 #ifdef HAVE_cc0
2000 /* If CC tracking across branches is enabled, record the insn which
2001 jumps to each branch only reached from one place. */
2002 if (optimize && GET_CODE (insn) == JUMP_INSN)
2003 {
2004 rtx lab = JUMP_LABEL (insn);
2005 if (lab && LABEL_NUSES (lab) == 1)
2006 {
2007 LABEL_REFS (lab) = insn;
2008 }
2009 }
2010 #endif
2011 }
2012
2013 /* Initialize insn_eh_region table if eh is being used. */
2014
2015 init_insn_eh_region (first, max_uid);
2016
2017 init_recog ();
2018
2019 CC_STATUS_INIT;
2020
2021 /* Output the insns. */
2022 for (insn = NEXT_INSN (first); insn;)
2023 {
2024 #ifdef HAVE_ATTR_length
2025 if (INSN_UID (insn) >= INSN_ADDRESSES_SIZE ())
2026 {
2027 #ifdef STACK_REGS
2028 /* Irritatingly, the reg-stack pass is creating new instructions
2029 and because of REG_DEAD note abuse it has to run after
2030 shorten_branches. Fake address of -1 then. */
2031 insn_current_address = -1;
2032 #else
2033 /* This can be triggered by bugs elsewhere in the compiler if
2034 new insns are created after init_insn_lengths is called. */
2035 abort ();
2036 #endif
2037 }
2038 else
2039 insn_current_address = INSN_ADDRESSES (INSN_UID (insn));
2040 #endif /* HAVE_ATTR_length */
2041
2042 insn = final_scan_insn (insn, file, optimize, prescan, 0);
2043 }
2044
2045 /* Do basic-block profiling here
2046 if the last insn was a conditional branch. */
2047 if (profile_block_flag && new_block)
2048 add_bb (file);
2049
2050 free_insn_eh_region ();
2051 free (line_note_exists);
2052 line_note_exists = NULL;
2053 }
2054 \f
2055 const char *
2056 get_insn_template (code, insn)
2057 int code;
2058 rtx insn;
2059 {
2060 const void *output = insn_data[code].output;
2061 switch (insn_data[code].output_format)
2062 {
2063 case INSN_OUTPUT_FORMAT_SINGLE:
2064 return (const char *) output;
2065 case INSN_OUTPUT_FORMAT_MULTI:
2066 return ((const char *const *) output)[which_alternative];
2067 case INSN_OUTPUT_FORMAT_FUNCTION:
2068 if (insn == NULL)
2069 abort ();
2070 return (*(insn_output_fn) output) (recog_data.operand, insn);
2071
2072 default:
2073 abort ();
2074 }
2075 }
2076
2077 /* The final scan for one insn, INSN.
2078 Args are same as in `final', except that INSN
2079 is the insn being scanned.
2080 Value returned is the next insn to be scanned.
2081
2082 NOPEEPHOLES is the flag to disallow peephole processing (currently
2083 used for within delayed branch sequence output). */
2084
2085 rtx
2086 final_scan_insn (insn, file, optimize, prescan, nopeepholes)
2087 rtx insn;
2088 FILE *file;
2089 int optimize ATTRIBUTE_UNUSED;
2090 int prescan;
2091 int nopeepholes ATTRIBUTE_UNUSED;
2092 {
2093 #ifdef HAVE_cc0
2094 rtx set;
2095 #endif
2096
2097 insn_counter++;
2098
2099 /* Ignore deleted insns. These can occur when we split insns (due to a
2100 template of "#") while not optimizing. */
2101 if (INSN_DELETED_P (insn))
2102 return NEXT_INSN (insn);
2103
2104 switch (GET_CODE (insn))
2105 {
2106 case NOTE:
2107 if (prescan > 0)
2108 break;
2109
2110 switch (NOTE_LINE_NUMBER (insn))
2111 {
2112 case NOTE_INSN_DELETED:
2113 case NOTE_INSN_LOOP_BEG:
2114 case NOTE_INSN_LOOP_END:
2115 case NOTE_INSN_LOOP_CONT:
2116 case NOTE_INSN_LOOP_VTOP:
2117 case NOTE_INSN_FUNCTION_END:
2118 case NOTE_INSN_SETJMP:
2119 case NOTE_INSN_REPEATED_LINE_NUMBER:
2120 case NOTE_INSN_RANGE_BEG:
2121 case NOTE_INSN_RANGE_END:
2122 case NOTE_INSN_LIVE:
2123 case NOTE_INSN_EXPECTED_VALUE:
2124 break;
2125
2126 case NOTE_INSN_BASIC_BLOCK:
2127 if (flag_debug_asm)
2128 fprintf (asm_out_file, "\t%s basic block %d\n",
2129 ASM_COMMENT_START, NOTE_BASIC_BLOCK (insn)->index);
2130 break;
2131
2132 case NOTE_INSN_EH_REGION_BEG:
2133 if (! exceptions_via_longjmp)
2134 {
2135 ASM_OUTPUT_INTERNAL_LABEL (file, "LEHB", NOTE_EH_HANDLER (insn));
2136 if (! flag_new_exceptions)
2137 add_eh_table_entry (NOTE_EH_HANDLER (insn));
2138 #ifdef ASM_OUTPUT_EH_REGION_BEG
2139 ASM_OUTPUT_EH_REGION_BEG (file, NOTE_EH_HANDLER (insn));
2140 #endif
2141 }
2142 break;
2143
2144 case NOTE_INSN_EH_REGION_END:
2145 if (! exceptions_via_longjmp)
2146 {
2147 ASM_OUTPUT_INTERNAL_LABEL (file, "LEHE", NOTE_EH_HANDLER (insn));
2148 if (flag_new_exceptions)
2149 add_eh_table_entry (NOTE_EH_HANDLER (insn));
2150 #ifdef ASM_OUTPUT_EH_REGION_END
2151 ASM_OUTPUT_EH_REGION_END (file, NOTE_EH_HANDLER (insn));
2152 #endif
2153 }
2154 break;
2155
2156 case NOTE_INSN_PROLOGUE_END:
2157 #ifdef FUNCTION_END_PROLOGUE
2158 FUNCTION_END_PROLOGUE (file);
2159 #endif
2160 profile_after_prologue (file);
2161 break;
2162
2163 case NOTE_INSN_EPILOGUE_BEG:
2164 #ifdef FUNCTION_BEGIN_EPILOGUE
2165 FUNCTION_BEGIN_EPILOGUE (file);
2166 #endif
2167 break;
2168
2169 case NOTE_INSN_FUNCTION_BEG:
2170 #if defined(SDB_DEBUGGING_INFO) && defined(MIPS_DEBUGGING_INFO)
2171 /* MIPS stabs require the parameter descriptions to be after the
2172 function entry point rather than before. */
2173 if (write_symbols == SDB_DEBUG)
2174 {
2175 app_disable ();
2176 sdbout_begin_function (last_linenum);
2177 }
2178 #endif
2179 #ifdef DWARF_DEBUGGING_INFO
2180 /* This outputs a marker where the function body starts, so it
2181 must be after the prologue. */
2182 if (write_symbols == DWARF_DEBUG)
2183 {
2184 app_disable ();
2185 dwarfout_begin_function ();
2186 }
2187 #endif
2188 break;
2189
2190 case NOTE_INSN_BLOCK_BEG:
2191 if (debug_info_level == DINFO_LEVEL_NORMAL
2192 || debug_info_level == DINFO_LEVEL_VERBOSE
2193 || write_symbols == DWARF_DEBUG
2194 || write_symbols == DWARF2_DEBUG)
2195 {
2196 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
2197
2198 app_disable ();
2199 ++block_depth;
2200 high_block_linenum = last_linenum;
2201
2202 /* Output debugging info about the symbol-block beginning. */
2203 #ifdef SDB_DEBUGGING_INFO
2204 if (write_symbols == SDB_DEBUG)
2205 sdbout_begin_block (file, last_linenum, n);
2206 #endif
2207 #ifdef XCOFF_DEBUGGING_INFO
2208 if (write_symbols == XCOFF_DEBUG)
2209 xcoffout_begin_block (file, last_linenum, n);
2210 #endif
2211 #ifdef DBX_DEBUGGING_INFO
2212 if (write_symbols == DBX_DEBUG)
2213 ASM_OUTPUT_INTERNAL_LABEL (file, "LBB", n);
2214 #endif
2215 #ifdef DWARF_DEBUGGING_INFO
2216 if (write_symbols == DWARF_DEBUG)
2217 dwarfout_begin_block (n);
2218 #endif
2219 #ifdef DWARF2_DEBUGGING_INFO
2220 if (write_symbols == DWARF2_DEBUG)
2221 dwarf2out_begin_block (n);
2222 #endif
2223
2224 /* Mark this block as output. */
2225 TREE_ASM_WRITTEN (NOTE_BLOCK (insn)) = 1;
2226 }
2227 break;
2228
2229 case NOTE_INSN_BLOCK_END:
2230 if (debug_info_level == DINFO_LEVEL_NORMAL
2231 || debug_info_level == DINFO_LEVEL_VERBOSE
2232 || write_symbols == DWARF_DEBUG
2233 || write_symbols == DWARF2_DEBUG)
2234 {
2235 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
2236
2237 app_disable ();
2238
2239 /* End of a symbol-block. */
2240 --block_depth;
2241 if (block_depth < 0)
2242 abort ();
2243
2244 #ifdef XCOFF_DEBUGGING_INFO
2245 if (write_symbols == XCOFF_DEBUG)
2246 xcoffout_end_block (file, high_block_linenum, n);
2247 #endif
2248 #ifdef DBX_DEBUGGING_INFO
2249 if (write_symbols == DBX_DEBUG)
2250 ASM_OUTPUT_INTERNAL_LABEL (file, "LBE", n);
2251 #endif
2252 #ifdef SDB_DEBUGGING_INFO
2253 if (write_symbols == SDB_DEBUG)
2254 sdbout_end_block (file, high_block_linenum, n);
2255 #endif
2256 #ifdef DWARF_DEBUGGING_INFO
2257 if (write_symbols == DWARF_DEBUG)
2258 dwarfout_end_block (n);
2259 #endif
2260 #ifdef DWARF2_DEBUGGING_INFO
2261 if (write_symbols == DWARF2_DEBUG)
2262 dwarf2out_end_block (n);
2263 #endif
2264 }
2265 break;
2266
2267 case NOTE_INSN_DELETED_LABEL:
2268 /* Emit the label. We may have deleted the CODE_LABEL because
2269 the label could be proved to be unreachable, though still
2270 referenced (in the form of having its address taken. */
2271 ASM_OUTPUT_DEBUG_LABEL (file, "L", CODE_LABEL_NUMBER (insn));
2272 break;
2273
2274 case 0:
2275 break;
2276
2277 default:
2278 if (NOTE_LINE_NUMBER (insn) <= 0)
2279 abort ();
2280
2281 /* This note is a line-number. */
2282 {
2283 register rtx note;
2284 int note_after = 0;
2285
2286 /* If there is anything real after this note, output it.
2287 If another line note follows, omit this one. */
2288 for (note = NEXT_INSN (insn); note; note = NEXT_INSN (note))
2289 {
2290 if (GET_CODE (note) != NOTE && GET_CODE (note) != CODE_LABEL)
2291 break;
2292
2293 /* These types of notes can be significant
2294 so make sure the preceding line number stays. */
2295 else if (GET_CODE (note) == NOTE
2296 && (NOTE_LINE_NUMBER (note) == NOTE_INSN_BLOCK_BEG
2297 || NOTE_LINE_NUMBER (note) == NOTE_INSN_BLOCK_END
2298 || NOTE_LINE_NUMBER (note) == NOTE_INSN_FUNCTION_BEG))
2299 break;
2300 else if (GET_CODE (note) == NOTE && NOTE_LINE_NUMBER (note) > 0)
2301 {
2302 /* Another line note follows; we can delete this note
2303 if no intervening line numbers have notes elsewhere. */
2304 int num;
2305 for (num = NOTE_LINE_NUMBER (insn) + 1;
2306 num < NOTE_LINE_NUMBER (note);
2307 num++)
2308 if (line_note_exists[num])
2309 break;
2310
2311 if (num >= NOTE_LINE_NUMBER (note))
2312 note_after = 1;
2313 break;
2314 }
2315 }
2316
2317 /* Output this line note if it is the first or the last line
2318 note in a row. */
2319 if (!note_after)
2320 output_source_line (file, insn);
2321 }
2322 break;
2323 }
2324 break;
2325
2326 case BARRIER:
2327 #if defined (DWARF2_UNWIND_INFO)
2328 /* If we push arguments, we need to check all insns for stack
2329 adjustments. */
2330 if (!ACCUMULATE_OUTGOING_ARGS && dwarf2out_do_frame ())
2331 dwarf2out_frame_debug (insn);
2332 #endif
2333 break;
2334
2335 case CODE_LABEL:
2336 /* The target port might emit labels in the output function for
2337 some insn, e.g. sh.c output_branchy_insn. */
2338 if (CODE_LABEL_NUMBER (insn) <= max_labelno)
2339 {
2340 int align = LABEL_TO_ALIGNMENT (insn);
2341 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2342 int max_skip = LABEL_TO_MAX_SKIP (insn);
2343 #endif
2344
2345 if (align && NEXT_INSN (insn))
2346 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2347 ASM_OUTPUT_MAX_SKIP_ALIGN (file, align, max_skip);
2348 #else
2349 ASM_OUTPUT_ALIGN (file, align);
2350 #endif
2351 }
2352 #ifdef HAVE_cc0
2353 CC_STATUS_INIT;
2354 /* If this label is reached from only one place, set the condition
2355 codes from the instruction just before the branch. */
2356
2357 /* Disabled because some insns set cc_status in the C output code
2358 and NOTICE_UPDATE_CC alone can set incorrect status. */
2359 if (0 /* optimize && LABEL_NUSES (insn) == 1*/)
2360 {
2361 rtx jump = LABEL_REFS (insn);
2362 rtx barrier = prev_nonnote_insn (insn);
2363 rtx prev;
2364 /* If the LABEL_REFS field of this label has been set to point
2365 at a branch, the predecessor of the branch is a regular
2366 insn, and that branch is the only way to reach this label,
2367 set the condition codes based on the branch and its
2368 predecessor. */
2369 if (barrier && GET_CODE (barrier) == BARRIER
2370 && jump && GET_CODE (jump) == JUMP_INSN
2371 && (prev = prev_nonnote_insn (jump))
2372 && GET_CODE (prev) == INSN)
2373 {
2374 NOTICE_UPDATE_CC (PATTERN (prev), prev);
2375 NOTICE_UPDATE_CC (PATTERN (jump), jump);
2376 }
2377 }
2378 #endif
2379 if (prescan > 0)
2380 break;
2381 new_block = 1;
2382
2383 #ifdef FINAL_PRESCAN_LABEL
2384 FINAL_PRESCAN_INSN (insn, NULL_PTR, 0);
2385 #endif
2386
2387 #ifdef SDB_DEBUGGING_INFO
2388 if (write_symbols == SDB_DEBUG && LABEL_NAME (insn))
2389 sdbout_label (insn);
2390 #endif
2391 if (app_on)
2392 {
2393 fputs (ASM_APP_OFF, file);
2394 app_on = 0;
2395 }
2396 if (NEXT_INSN (insn) != 0
2397 && GET_CODE (NEXT_INSN (insn)) == JUMP_INSN)
2398 {
2399 rtx nextbody = PATTERN (NEXT_INSN (insn));
2400
2401 /* If this label is followed by a jump-table,
2402 make sure we put the label in the read-only section. Also
2403 possibly write the label and jump table together. */
2404
2405 if (GET_CODE (nextbody) == ADDR_VEC
2406 || GET_CODE (nextbody) == ADDR_DIFF_VEC)
2407 {
2408 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2409 /* In this case, the case vector is being moved by the
2410 target, so don't output the label at all. Leave that
2411 to the back end macros. */
2412 #else
2413 if (! JUMP_TABLES_IN_TEXT_SECTION)
2414 {
2415 readonly_data_section ();
2416 #ifdef READONLY_DATA_SECTION
2417 ASM_OUTPUT_ALIGN (file,
2418 exact_log2 (BIGGEST_ALIGNMENT
2419 / BITS_PER_UNIT));
2420 #endif /* READONLY_DATA_SECTION */
2421 }
2422 else
2423 function_section (current_function_decl);
2424
2425 #ifdef ASM_OUTPUT_CASE_LABEL
2426 ASM_OUTPUT_CASE_LABEL (file, "L", CODE_LABEL_NUMBER (insn),
2427 NEXT_INSN (insn));
2428 #else
2429 if (LABEL_ALTERNATE_NAME (insn))
2430 ASM_OUTPUT_ALTERNATE_LABEL_NAME (file, insn);
2431 else
2432 ASM_OUTPUT_INTERNAL_LABEL (file, "L", CODE_LABEL_NUMBER (insn));
2433 #endif
2434 #endif
2435 break;
2436 }
2437 }
2438 if (LABEL_ALTERNATE_NAME (insn))
2439 ASM_OUTPUT_ALTERNATE_LABEL_NAME (file, insn);
2440 else
2441 ASM_OUTPUT_INTERNAL_LABEL (file, "L", CODE_LABEL_NUMBER (insn));
2442 break;
2443
2444 default:
2445 {
2446 register rtx body = PATTERN (insn);
2447 int insn_code_number;
2448 const char *template;
2449 #ifdef HAVE_cc0
2450 rtx note;
2451 #endif
2452
2453 /* An INSN, JUMP_INSN or CALL_INSN.
2454 First check for special kinds that recog doesn't recognize. */
2455
2456 if (GET_CODE (body) == USE /* These are just declarations */
2457 || GET_CODE (body) == CLOBBER)
2458 break;
2459
2460 #ifdef HAVE_cc0
2461 /* If there is a REG_CC_SETTER note on this insn, it means that
2462 the setting of the condition code was done in the delay slot
2463 of the insn that branched here. So recover the cc status
2464 from the insn that set it. */
2465
2466 note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2467 if (note)
2468 {
2469 NOTICE_UPDATE_CC (PATTERN (XEXP (note, 0)), XEXP (note, 0));
2470 cc_prev_status = cc_status;
2471 }
2472 #endif
2473
2474 /* Detect insns that are really jump-tables
2475 and output them as such. */
2476
2477 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
2478 {
2479 #if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC))
2480 register int vlen, idx;
2481 #endif
2482
2483 if (prescan > 0)
2484 break;
2485
2486 if (app_on)
2487 {
2488 fputs (ASM_APP_OFF, file);
2489 app_on = 0;
2490 }
2491
2492 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2493 if (GET_CODE (body) == ADDR_VEC)
2494 {
2495 #ifdef ASM_OUTPUT_ADDR_VEC
2496 ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn), body);
2497 #else
2498 abort ();
2499 #endif
2500 }
2501 else
2502 {
2503 #ifdef ASM_OUTPUT_ADDR_DIFF_VEC
2504 ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn), body);
2505 #else
2506 abort ();
2507 #endif
2508 }
2509 #else
2510 vlen = XVECLEN (body, GET_CODE (body) == ADDR_DIFF_VEC);
2511 for (idx = 0; idx < vlen; idx++)
2512 {
2513 if (GET_CODE (body) == ADDR_VEC)
2514 {
2515 #ifdef ASM_OUTPUT_ADDR_VEC_ELT
2516 ASM_OUTPUT_ADDR_VEC_ELT
2517 (file, CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 0, idx), 0)));
2518 #else
2519 abort ();
2520 #endif
2521 }
2522 else
2523 {
2524 #ifdef ASM_OUTPUT_ADDR_DIFF_ELT
2525 ASM_OUTPUT_ADDR_DIFF_ELT
2526 (file,
2527 body,
2528 CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 1, idx), 0)),
2529 CODE_LABEL_NUMBER (XEXP (XEXP (body, 0), 0)));
2530 #else
2531 abort ();
2532 #endif
2533 }
2534 }
2535 #ifdef ASM_OUTPUT_CASE_END
2536 ASM_OUTPUT_CASE_END (file,
2537 CODE_LABEL_NUMBER (PREV_INSN (insn)),
2538 insn);
2539 #endif
2540 #endif
2541
2542 function_section (current_function_decl);
2543
2544 break;
2545 }
2546
2547 /* Do basic-block profiling when we reach a new block.
2548 Done here to avoid jump tables. */
2549 if (profile_block_flag && new_block)
2550 add_bb (file);
2551
2552 if (GET_CODE (body) == ASM_INPUT)
2553 {
2554 /* There's no telling what that did to the condition codes. */
2555 CC_STATUS_INIT;
2556 if (prescan > 0)
2557 break;
2558 if (! app_on)
2559 {
2560 fputs (ASM_APP_ON, file);
2561 app_on = 1;
2562 }
2563 fprintf (asm_out_file, "\t%s\n", XSTR (body, 0));
2564 break;
2565 }
2566
2567 /* Detect `asm' construct with operands. */
2568 if (asm_noperands (body) >= 0)
2569 {
2570 unsigned int noperands = asm_noperands (body);
2571 rtx *ops = (rtx *) alloca (noperands * sizeof (rtx));
2572 const char *string;
2573
2574 /* There's no telling what that did to the condition codes. */
2575 CC_STATUS_INIT;
2576 if (prescan > 0)
2577 break;
2578
2579 if (! app_on)
2580 {
2581 fputs (ASM_APP_ON, file);
2582 app_on = 1;
2583 }
2584
2585 /* Get out the operand values. */
2586 string = decode_asm_operands (body, ops, NULL_PTR,
2587 NULL_PTR, NULL_PTR);
2588 /* Inhibit aborts on what would otherwise be compiler bugs. */
2589 insn_noperands = noperands;
2590 this_is_asm_operands = insn;
2591
2592 /* Output the insn using them. */
2593 output_asm_insn (string, ops);
2594 this_is_asm_operands = 0;
2595 break;
2596 }
2597
2598 if (prescan <= 0 && app_on)
2599 {
2600 fputs (ASM_APP_OFF, file);
2601 app_on = 0;
2602 }
2603
2604 if (GET_CODE (body) == SEQUENCE)
2605 {
2606 /* A delayed-branch sequence */
2607 register int i;
2608 rtx next;
2609
2610 if (prescan > 0)
2611 break;
2612 final_sequence = body;
2613
2614 /* The first insn in this SEQUENCE might be a JUMP_INSN that will
2615 force the restoration of a comparison that was previously
2616 thought unnecessary. If that happens, cancel this sequence
2617 and cause that insn to be restored. */
2618
2619 next = final_scan_insn (XVECEXP (body, 0, 0), file, 0, prescan, 1);
2620 if (next != XVECEXP (body, 0, 1))
2621 {
2622 final_sequence = 0;
2623 return next;
2624 }
2625
2626 for (i = 1; i < XVECLEN (body, 0); i++)
2627 {
2628 rtx insn = XVECEXP (body, 0, i);
2629 rtx next = NEXT_INSN (insn);
2630 /* We loop in case any instruction in a delay slot gets
2631 split. */
2632 do
2633 insn = final_scan_insn (insn, file, 0, prescan, 1);
2634 while (insn != next);
2635 }
2636 #ifdef DBR_OUTPUT_SEQEND
2637 DBR_OUTPUT_SEQEND (file);
2638 #endif
2639 final_sequence = 0;
2640
2641 /* If the insn requiring the delay slot was a CALL_INSN, the
2642 insns in the delay slot are actually executed before the
2643 called function. Hence we don't preserve any CC-setting
2644 actions in these insns and the CC must be marked as being
2645 clobbered by the function. */
2646 if (GET_CODE (XVECEXP (body, 0, 0)) == CALL_INSN)
2647 {
2648 CC_STATUS_INIT;
2649 }
2650
2651 /* Following a conditional branch sequence, we have a new basic
2652 block. */
2653 if (profile_block_flag)
2654 {
2655 rtx insn = XVECEXP (body, 0, 0);
2656 rtx body = PATTERN (insn);
2657
2658 if ((GET_CODE (insn) == JUMP_INSN && GET_CODE (body) == SET
2659 && GET_CODE (SET_SRC (body)) != LABEL_REF)
2660 || (GET_CODE (insn) == JUMP_INSN
2661 && GET_CODE (body) == PARALLEL
2662 && GET_CODE (XVECEXP (body, 0, 0)) == SET
2663 && GET_CODE (SET_SRC (XVECEXP (body, 0, 0))) != LABEL_REF))
2664 new_block = 1;
2665 }
2666 break;
2667 }
2668
2669 /* We have a real machine instruction as rtl. */
2670
2671 body = PATTERN (insn);
2672
2673 #ifdef HAVE_cc0
2674 set = single_set (insn);
2675
2676 /* Check for redundant test and compare instructions
2677 (when the condition codes are already set up as desired).
2678 This is done only when optimizing; if not optimizing,
2679 it should be possible for the user to alter a variable
2680 with the debugger in between statements
2681 and the next statement should reexamine the variable
2682 to compute the condition codes. */
2683
2684 if (optimize)
2685 {
2686 #if 0
2687 rtx set = single_set (insn);
2688 #endif
2689
2690 if (set
2691 && GET_CODE (SET_DEST (set)) == CC0
2692 && insn != last_ignored_compare)
2693 {
2694 if (GET_CODE (SET_SRC (set)) == SUBREG)
2695 SET_SRC (set) = alter_subreg (SET_SRC (set));
2696 else if (GET_CODE (SET_SRC (set)) == COMPARE)
2697 {
2698 if (GET_CODE (XEXP (SET_SRC (set), 0)) == SUBREG)
2699 XEXP (SET_SRC (set), 0)
2700 = alter_subreg (XEXP (SET_SRC (set), 0));
2701 if (GET_CODE (XEXP (SET_SRC (set), 1)) == SUBREG)
2702 XEXP (SET_SRC (set), 1)
2703 = alter_subreg (XEXP (SET_SRC (set), 1));
2704 }
2705 if ((cc_status.value1 != 0
2706 && rtx_equal_p (SET_SRC (set), cc_status.value1))
2707 || (cc_status.value2 != 0
2708 && rtx_equal_p (SET_SRC (set), cc_status.value2)))
2709 {
2710 /* Don't delete insn if it has an addressing side-effect. */
2711 if (! FIND_REG_INC_NOTE (insn, 0)
2712 /* or if anything in it is volatile. */
2713 && ! volatile_refs_p (PATTERN (insn)))
2714 {
2715 /* We don't really delete the insn; just ignore it. */
2716 last_ignored_compare = insn;
2717 break;
2718 }
2719 }
2720 }
2721 }
2722 #endif
2723
2724 /* Following a conditional branch, we have a new basic block.
2725 But if we are inside a sequence, the new block starts after the
2726 last insn of the sequence. */
2727 if (profile_block_flag && final_sequence == 0
2728 && ((GET_CODE (insn) == JUMP_INSN && GET_CODE (body) == SET
2729 && GET_CODE (SET_SRC (body)) != LABEL_REF)
2730 || (GET_CODE (insn) == JUMP_INSN && GET_CODE (body) == PARALLEL
2731 && GET_CODE (XVECEXP (body, 0, 0)) == SET
2732 && GET_CODE (SET_SRC (XVECEXP (body, 0, 0))) != LABEL_REF)))
2733 new_block = 1;
2734
2735 #ifndef STACK_REGS
2736 /* Don't bother outputting obvious no-ops, even without -O.
2737 This optimization is fast and doesn't interfere with debugging.
2738 Don't do this if the insn is in a delay slot, since this
2739 will cause an improper number of delay insns to be written. */
2740 if (final_sequence == 0
2741 && prescan >= 0
2742 && GET_CODE (insn) == INSN && GET_CODE (body) == SET
2743 && GET_CODE (SET_SRC (body)) == REG
2744 && GET_CODE (SET_DEST (body)) == REG
2745 && REGNO (SET_SRC (body)) == REGNO (SET_DEST (body)))
2746 break;
2747 #endif
2748
2749 #ifdef HAVE_cc0
2750 /* If this is a conditional branch, maybe modify it
2751 if the cc's are in a nonstandard state
2752 so that it accomplishes the same thing that it would
2753 do straightforwardly if the cc's were set up normally. */
2754
2755 if (cc_status.flags != 0
2756 && GET_CODE (insn) == JUMP_INSN
2757 && GET_CODE (body) == SET
2758 && SET_DEST (body) == pc_rtx
2759 && GET_CODE (SET_SRC (body)) == IF_THEN_ELSE
2760 && GET_RTX_CLASS (GET_CODE (XEXP (SET_SRC (body), 0))) == '<'
2761 && XEXP (XEXP (SET_SRC (body), 0), 0) == cc0_rtx
2762 /* This is done during prescan; it is not done again
2763 in final scan when prescan has been done. */
2764 && prescan >= 0)
2765 {
2766 /* This function may alter the contents of its argument
2767 and clear some of the cc_status.flags bits.
2768 It may also return 1 meaning condition now always true
2769 or -1 meaning condition now always false
2770 or 2 meaning condition nontrivial but altered. */
2771 register int result = alter_cond (XEXP (SET_SRC (body), 0));
2772 /* If condition now has fixed value, replace the IF_THEN_ELSE
2773 with its then-operand or its else-operand. */
2774 if (result == 1)
2775 SET_SRC (body) = XEXP (SET_SRC (body), 1);
2776 if (result == -1)
2777 SET_SRC (body) = XEXP (SET_SRC (body), 2);
2778
2779 /* The jump is now either unconditional or a no-op.
2780 If it has become a no-op, don't try to output it.
2781 (It would not be recognized.) */
2782 if (SET_SRC (body) == pc_rtx)
2783 {
2784 PUT_CODE (insn, NOTE);
2785 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
2786 NOTE_SOURCE_FILE (insn) = 0;
2787 break;
2788 }
2789 else if (GET_CODE (SET_SRC (body)) == RETURN)
2790 /* Replace (set (pc) (return)) with (return). */
2791 PATTERN (insn) = body = SET_SRC (body);
2792
2793 /* Rerecognize the instruction if it has changed. */
2794 if (result != 0)
2795 INSN_CODE (insn) = -1;
2796 }
2797
2798 /* Make same adjustments to instructions that examine the
2799 condition codes without jumping and instructions that
2800 handle conditional moves (if this machine has either one). */
2801
2802 if (cc_status.flags != 0
2803 && set != 0)
2804 {
2805 rtx cond_rtx, then_rtx, else_rtx;
2806
2807 if (GET_CODE (insn) != JUMP_INSN
2808 && GET_CODE (SET_SRC (set)) == IF_THEN_ELSE)
2809 {
2810 cond_rtx = XEXP (SET_SRC (set), 0);
2811 then_rtx = XEXP (SET_SRC (set), 1);
2812 else_rtx = XEXP (SET_SRC (set), 2);
2813 }
2814 else
2815 {
2816 cond_rtx = SET_SRC (set);
2817 then_rtx = const_true_rtx;
2818 else_rtx = const0_rtx;
2819 }
2820
2821 switch (GET_CODE (cond_rtx))
2822 {
2823 case GTU:
2824 case GT:
2825 case LTU:
2826 case LT:
2827 case GEU:
2828 case GE:
2829 case LEU:
2830 case LE:
2831 case EQ:
2832 case NE:
2833 {
2834 register int result;
2835 if (XEXP (cond_rtx, 0) != cc0_rtx)
2836 break;
2837 result = alter_cond (cond_rtx);
2838 if (result == 1)
2839 validate_change (insn, &SET_SRC (set), then_rtx, 0);
2840 else if (result == -1)
2841 validate_change (insn, &SET_SRC (set), else_rtx, 0);
2842 else if (result == 2)
2843 INSN_CODE (insn) = -1;
2844 if (SET_DEST (set) == SET_SRC (set))
2845 {
2846 PUT_CODE (insn, NOTE);
2847 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
2848 NOTE_SOURCE_FILE (insn) = 0;
2849 }
2850 }
2851 break;
2852
2853 default:
2854 break;
2855 }
2856 }
2857
2858 #endif
2859
2860 #ifdef HAVE_peephole
2861 /* Do machine-specific peephole optimizations if desired. */
2862
2863 if (optimize && !flag_no_peephole && !nopeepholes)
2864 {
2865 rtx next = peephole (insn);
2866 /* When peepholing, if there were notes within the peephole,
2867 emit them before the peephole. */
2868 if (next != 0 && next != NEXT_INSN (insn))
2869 {
2870 rtx prev = PREV_INSN (insn);
2871 rtx note;
2872
2873 for (note = NEXT_INSN (insn); note != next;
2874 note = NEXT_INSN (note))
2875 final_scan_insn (note, file, optimize, prescan, nopeepholes);
2876
2877 /* In case this is prescan, put the notes
2878 in proper position for later rescan. */
2879 note = NEXT_INSN (insn);
2880 PREV_INSN (note) = prev;
2881 NEXT_INSN (prev) = note;
2882 NEXT_INSN (PREV_INSN (next)) = insn;
2883 PREV_INSN (insn) = PREV_INSN (next);
2884 NEXT_INSN (insn) = next;
2885 PREV_INSN (next) = insn;
2886 }
2887
2888 /* PEEPHOLE might have changed this. */
2889 body = PATTERN (insn);
2890 }
2891 #endif
2892
2893 /* Try to recognize the instruction.
2894 If successful, verify that the operands satisfy the
2895 constraints for the instruction. Crash if they don't,
2896 since `reload' should have changed them so that they do. */
2897
2898 insn_code_number = recog_memoized (insn);
2899 cleanup_subreg_operands (insn);
2900
2901 /* Dump the insn in the assembly for debugging. */
2902 if (flag_dump_rtl_in_asm)
2903 {
2904 print_rtx_head = ASM_COMMENT_START;
2905 print_rtl_single (asm_out_file, insn);
2906 print_rtx_head = "";
2907 }
2908
2909 if (! constrain_operands_cached (1))
2910 fatal_insn_not_found (insn);
2911
2912 /* Some target machines need to prescan each insn before
2913 it is output. */
2914
2915 #ifdef FINAL_PRESCAN_INSN
2916 FINAL_PRESCAN_INSN (insn, recog_data.operand, recog_data.n_operands);
2917 #endif
2918
2919 #ifdef HAVE_conditional_execution
2920 if (GET_CODE (PATTERN (insn)) == COND_EXEC)
2921 current_insn_predicate = COND_EXEC_TEST (PATTERN (insn));
2922 else
2923 current_insn_predicate = NULL_RTX;
2924 #endif
2925
2926 #ifdef HAVE_cc0
2927 cc_prev_status = cc_status;
2928
2929 /* Update `cc_status' for this instruction.
2930 The instruction's output routine may change it further.
2931 If the output routine for a jump insn needs to depend
2932 on the cc status, it should look at cc_prev_status. */
2933
2934 NOTICE_UPDATE_CC (body, insn);
2935 #endif
2936
2937 current_output_insn = debug_insn = insn;
2938
2939 #if defined (DWARF2_UNWIND_INFO)
2940 /* If we push arguments, we want to know where the calls are. */
2941 if (!ACCUMULATE_OUTGOING_ARGS && GET_CODE (insn) == CALL_INSN
2942 && dwarf2out_do_frame ())
2943 dwarf2out_frame_debug (insn);
2944 #endif
2945
2946 /* Find the proper template for this insn. */
2947 template = get_insn_template (insn_code_number, insn);
2948
2949 /* If the C code returns 0, it means that it is a jump insn
2950 which follows a deleted test insn, and that test insn
2951 needs to be reinserted. */
2952 if (template == 0)
2953 {
2954 rtx prev;
2955
2956 if (prev_nonnote_insn (insn) != last_ignored_compare)
2957 abort ();
2958 new_block = 0;
2959
2960 /* We have already processed the notes between the setter and
2961 the user. Make sure we don't process them again, this is
2962 particularly important if one of the notes is a block
2963 scope note or an EH note. */
2964 for (prev = insn;
2965 prev != last_ignored_compare;
2966 prev = PREV_INSN (prev))
2967 {
2968 if (GET_CODE (prev) == NOTE)
2969 {
2970 NOTE_LINE_NUMBER (prev) = NOTE_INSN_DELETED;
2971 NOTE_SOURCE_FILE (prev) = 0;
2972 }
2973 }
2974
2975 return prev;
2976 }
2977
2978 /* If the template is the string "#", it means that this insn must
2979 be split. */
2980 if (template[0] == '#' && template[1] == '\0')
2981 {
2982 rtx new = try_split (body, insn, 0);
2983
2984 /* If we didn't split the insn, go away. */
2985 if (new == insn && PATTERN (new) == body)
2986 fatal_insn ("Could not split insn", insn);
2987
2988 #ifdef HAVE_ATTR_length
2989 /* This instruction should have been split in shorten_branches,
2990 to ensure that we would have valid length info for the
2991 splitees. */
2992 abort ();
2993 #endif
2994
2995 new_block = 0;
2996 return new;
2997 }
2998
2999 if (prescan > 0)
3000 break;
3001
3002 #ifdef IA64_UNWIND_INFO
3003 IA64_UNWIND_EMIT (asm_out_file, insn);
3004 #endif
3005 /* Output assembler code from the template. */
3006
3007 output_asm_insn (template, recog_data.operand);
3008
3009 #if defined (DWARF2_UNWIND_INFO)
3010 /* If we push arguments, we need to check all insns for stack
3011 adjustments. */
3012 if (!ACCUMULATE_OUTGOING_ARGS)
3013 {
3014 if (GET_CODE (insn) == INSN && dwarf2out_do_frame ())
3015 dwarf2out_frame_debug (insn);
3016 }
3017 else
3018 {
3019 #if defined (HAVE_prologue)
3020 /* If this insn is part of the prologue, emit DWARF v2
3021 call frame info. */
3022 if (RTX_FRAME_RELATED_P (insn) && dwarf2out_do_frame ())
3023 dwarf2out_frame_debug (insn);
3024 #endif
3025 }
3026 #endif
3027
3028 #if 0
3029 /* It's not at all clear why we did this and doing so interferes
3030 with tests we'd like to do to use REG_WAS_0 notes, so let's try
3031 with this out. */
3032
3033 /* Mark this insn as having been output. */
3034 INSN_DELETED_P (insn) = 1;
3035 #endif
3036
3037 current_output_insn = debug_insn = 0;
3038 }
3039 }
3040 return NEXT_INSN (insn);
3041 }
3042 \f
3043 /* Output debugging info to the assembler file FILE
3044 based on the NOTE-insn INSN, assumed to be a line number. */
3045
3046 static void
3047 output_source_line (file, insn)
3048 FILE *file ATTRIBUTE_UNUSED;
3049 rtx insn;
3050 {
3051 register const char *filename = NOTE_SOURCE_FILE (insn);
3052
3053 /* Remember filename for basic block profiling.
3054 Filenames are allocated on the permanent obstack
3055 or are passed in ARGV, so we don't have to save
3056 the string. */
3057
3058 if (profile_block_flag && last_filename != filename)
3059 bb_file_label_num = add_bb_string (filename, TRUE);
3060
3061 last_filename = filename;
3062 last_linenum = NOTE_LINE_NUMBER (insn);
3063 high_block_linenum = MAX (last_linenum, high_block_linenum);
3064 high_function_linenum = MAX (last_linenum, high_function_linenum);
3065
3066 if (write_symbols != NO_DEBUG)
3067 {
3068 #ifdef SDB_DEBUGGING_INFO
3069 if (write_symbols == SDB_DEBUG
3070 #if 0 /* People like having line numbers even in wrong file! */
3071 /* COFF can't handle multiple source files--lose, lose. */
3072 && !strcmp (filename, main_input_filename)
3073 #endif
3074 /* COFF relative line numbers must be positive. */
3075 && last_linenum > sdb_begin_function_line)
3076 {
3077 #ifdef ASM_OUTPUT_SOURCE_LINE
3078 ASM_OUTPUT_SOURCE_LINE (file, last_linenum);
3079 #else
3080 fprintf (file, "\t.ln\t%d\n",
3081 ((sdb_begin_function_line > -1)
3082 ? last_linenum - sdb_begin_function_line : 1));
3083 #endif
3084 }
3085 #endif
3086
3087 #if defined (DBX_DEBUGGING_INFO)
3088 if (write_symbols == DBX_DEBUG)
3089 dbxout_source_line (file, filename, NOTE_LINE_NUMBER (insn));
3090 #endif
3091
3092 #if defined (XCOFF_DEBUGGING_INFO)
3093 if (write_symbols == XCOFF_DEBUG)
3094 xcoffout_source_line (file, filename, insn);
3095 #endif
3096
3097 #ifdef DWARF_DEBUGGING_INFO
3098 if (write_symbols == DWARF_DEBUG)
3099 dwarfout_line (filename, NOTE_LINE_NUMBER (insn));
3100 #endif
3101
3102 #ifdef DWARF2_DEBUGGING_INFO
3103 if (write_symbols == DWARF2_DEBUG)
3104 dwarf2out_line (filename, NOTE_LINE_NUMBER (insn));
3105 #endif
3106 }
3107 }
3108 \f
3109 /* For each operand in INSN, simplify (subreg (reg)) so that it refers
3110 directly to the desired hard register. */
3111
3112 void
3113 cleanup_subreg_operands (insn)
3114 rtx insn;
3115 {
3116 int i;
3117 extract_insn_cached (insn);
3118 for (i = 0; i < recog_data.n_operands; i++)
3119 {
3120 if (GET_CODE (recog_data.operand[i]) == SUBREG)
3121 recog_data.operand[i] = alter_subreg (recog_data.operand[i]);
3122 else if (GET_CODE (recog_data.operand[i]) == PLUS
3123 || GET_CODE (recog_data.operand[i]) == MULT)
3124 recog_data.operand[i] = walk_alter_subreg (recog_data.operand[i]);
3125 }
3126
3127 for (i = 0; i < recog_data.n_dups; i++)
3128 {
3129 if (GET_CODE (*recog_data.dup_loc[i]) == SUBREG)
3130 *recog_data.dup_loc[i] = alter_subreg (*recog_data.dup_loc[i]);
3131 else if (GET_CODE (*recog_data.dup_loc[i]) == PLUS
3132 || GET_CODE (*recog_data.dup_loc[i]) == MULT)
3133 *recog_data.dup_loc[i] = walk_alter_subreg (*recog_data.dup_loc[i]);
3134 }
3135 }
3136
3137 /* If X is a SUBREG, replace it with a REG or a MEM,
3138 based on the thing it is a subreg of. */
3139
3140 rtx
3141 alter_subreg (x)
3142 register rtx x;
3143 {
3144 register rtx y = SUBREG_REG (x);
3145
3146 if (GET_CODE (y) == SUBREG)
3147 y = alter_subreg (y);
3148
3149 /* If reload is operating, we may be replacing inside this SUBREG.
3150 Check for that and make a new one if so. */
3151 if (reload_in_progress && find_replacement (&SUBREG_REG (x)) != 0)
3152 x = copy_rtx (x);
3153
3154 if (GET_CODE (y) == REG)
3155 {
3156 int regno;
3157 /* If the word size is larger than the size of this register,
3158 adjust the register number to compensate. */
3159 /* ??? Note that this just catches stragglers created by/for
3160 integrate. It would be better if we either caught these
3161 earlier, or kept _all_ subregs until now and eliminate
3162 gen_lowpart and friends. */
3163
3164 #ifdef ALTER_HARD_SUBREG
3165 regno = ALTER_HARD_SUBREG (GET_MODE (x), SUBREG_WORD (x),
3166 GET_MODE (y), REGNO (y));
3167 #else
3168 regno = REGNO (y) + SUBREG_WORD (x);
3169 #endif
3170 PUT_CODE (x, REG);
3171 REGNO (x) = regno;
3172 /* This field has a different meaning for REGs and SUBREGs. Make sure
3173 to clear it! */
3174 x->used = 0;
3175 }
3176 else if (GET_CODE (y) == MEM)
3177 {
3178 register int offset = SUBREG_WORD (x) * UNITS_PER_WORD;
3179
3180 if (BYTES_BIG_ENDIAN)
3181 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x)))
3182 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (y))));
3183 PUT_CODE (x, MEM);
3184 MEM_COPY_ATTRIBUTES (x, y);
3185 XEXP (x, 0) = plus_constant (XEXP (y, 0), offset);
3186 }
3187
3188 return x;
3189 }
3190
3191 /* Do alter_subreg on all the SUBREGs contained in X. */
3192
3193 static rtx
3194 walk_alter_subreg (x)
3195 rtx x;
3196 {
3197 switch (GET_CODE (x))
3198 {
3199 case PLUS:
3200 case MULT:
3201 XEXP (x, 0) = walk_alter_subreg (XEXP (x, 0));
3202 XEXP (x, 1) = walk_alter_subreg (XEXP (x, 1));
3203 break;
3204
3205 case MEM:
3206 XEXP (x, 0) = walk_alter_subreg (XEXP (x, 0));
3207 break;
3208
3209 case SUBREG:
3210 return alter_subreg (x);
3211
3212 default:
3213 break;
3214 }
3215
3216 return x;
3217 }
3218 \f
3219 #ifdef HAVE_cc0
3220
3221 /* Given BODY, the body of a jump instruction, alter the jump condition
3222 as required by the bits that are set in cc_status.flags.
3223 Not all of the bits there can be handled at this level in all cases.
3224
3225 The value is normally 0.
3226 1 means that the condition has become always true.
3227 -1 means that the condition has become always false.
3228 2 means that COND has been altered. */
3229
3230 static int
3231 alter_cond (cond)
3232 register rtx cond;
3233 {
3234 int value = 0;
3235
3236 if (cc_status.flags & CC_REVERSED)
3237 {
3238 value = 2;
3239 PUT_CODE (cond, swap_condition (GET_CODE (cond)));
3240 }
3241
3242 if (cc_status.flags & CC_INVERTED)
3243 {
3244 value = 2;
3245 PUT_CODE (cond, reverse_condition (GET_CODE (cond)));
3246 }
3247
3248 if (cc_status.flags & CC_NOT_POSITIVE)
3249 switch (GET_CODE (cond))
3250 {
3251 case LE:
3252 case LEU:
3253 case GEU:
3254 /* Jump becomes unconditional. */
3255 return 1;
3256
3257 case GT:
3258 case GTU:
3259 case LTU:
3260 /* Jump becomes no-op. */
3261 return -1;
3262
3263 case GE:
3264 PUT_CODE (cond, EQ);
3265 value = 2;
3266 break;
3267
3268 case LT:
3269 PUT_CODE (cond, NE);
3270 value = 2;
3271 break;
3272
3273 default:
3274 break;
3275 }
3276
3277 if (cc_status.flags & CC_NOT_NEGATIVE)
3278 switch (GET_CODE (cond))
3279 {
3280 case GE:
3281 case GEU:
3282 /* Jump becomes unconditional. */
3283 return 1;
3284
3285 case LT:
3286 case LTU:
3287 /* Jump becomes no-op. */
3288 return -1;
3289
3290 case LE:
3291 case LEU:
3292 PUT_CODE (cond, EQ);
3293 value = 2;
3294 break;
3295
3296 case GT:
3297 case GTU:
3298 PUT_CODE (cond, NE);
3299 value = 2;
3300 break;
3301
3302 default:
3303 break;
3304 }
3305
3306 if (cc_status.flags & CC_NO_OVERFLOW)
3307 switch (GET_CODE (cond))
3308 {
3309 case GEU:
3310 /* Jump becomes unconditional. */
3311 return 1;
3312
3313 case LEU:
3314 PUT_CODE (cond, EQ);
3315 value = 2;
3316 break;
3317
3318 case GTU:
3319 PUT_CODE (cond, NE);
3320 value = 2;
3321 break;
3322
3323 case LTU:
3324 /* Jump becomes no-op. */
3325 return -1;
3326
3327 default:
3328 break;
3329 }
3330
3331 if (cc_status.flags & (CC_Z_IN_NOT_N | CC_Z_IN_N))
3332 switch (GET_CODE (cond))
3333 {
3334 default:
3335 abort ();
3336
3337 case NE:
3338 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? GE : LT);
3339 value = 2;
3340 break;
3341
3342 case EQ:
3343 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? LT : GE);
3344 value = 2;
3345 break;
3346 }
3347
3348 if (cc_status.flags & CC_NOT_SIGNED)
3349 /* The flags are valid if signed condition operators are converted
3350 to unsigned. */
3351 switch (GET_CODE (cond))
3352 {
3353 case LE:
3354 PUT_CODE (cond, LEU);
3355 value = 2;
3356 break;
3357
3358 case LT:
3359 PUT_CODE (cond, LTU);
3360 value = 2;
3361 break;
3362
3363 case GT:
3364 PUT_CODE (cond, GTU);
3365 value = 2;
3366 break;
3367
3368 case GE:
3369 PUT_CODE (cond, GEU);
3370 value = 2;
3371 break;
3372
3373 default:
3374 break;
3375 }
3376
3377 return value;
3378 }
3379 #endif
3380 \f
3381 /* Report inconsistency between the assembler template and the operands.
3382 In an `asm', it's the user's fault; otherwise, the compiler's fault. */
3383
3384 void
3385 output_operand_lossage (msgid)
3386 const char *msgid;
3387 {
3388 if (this_is_asm_operands)
3389 error_for_asm (this_is_asm_operands, "invalid `asm': %s", _(msgid));
3390 else
3391 {
3392 error ("output_operand: %s", _(msgid));
3393 abort ();
3394 }
3395 }
3396 \f
3397 /* Output of assembler code from a template, and its subroutines. */
3398
3399 /* Output text from TEMPLATE to the assembler output file,
3400 obeying %-directions to substitute operands taken from
3401 the vector OPERANDS.
3402
3403 %N (for N a digit) means print operand N in usual manner.
3404 %lN means require operand N to be a CODE_LABEL or LABEL_REF
3405 and print the label name with no punctuation.
3406 %cN means require operand N to be a constant
3407 and print the constant expression with no punctuation.
3408 %aN means expect operand N to be a memory address
3409 (not a memory reference!) and print a reference
3410 to that address.
3411 %nN means expect operand N to be a constant
3412 and print a constant expression for minus the value
3413 of the operand, with no other punctuation. */
3414
3415 static void
3416 output_asm_name ()
3417 {
3418 if (flag_print_asm_name)
3419 {
3420 /* Annotate the assembly with a comment describing the pattern and
3421 alternative used. */
3422 if (debug_insn)
3423 {
3424 register int num = INSN_CODE (debug_insn);
3425 fprintf (asm_out_file, "\t%s %d\t%s",
3426 ASM_COMMENT_START, INSN_UID (debug_insn),
3427 insn_data[num].name);
3428 if (insn_data[num].n_alternatives > 1)
3429 fprintf (asm_out_file, "/%d", which_alternative + 1);
3430 #ifdef HAVE_ATTR_length
3431 fprintf (asm_out_file, "\t[length = %d]",
3432 get_attr_length (debug_insn));
3433 #endif
3434 /* Clear this so only the first assembler insn
3435 of any rtl insn will get the special comment for -dp. */
3436 debug_insn = 0;
3437 }
3438 }
3439 }
3440
3441 void
3442 output_asm_insn (template, operands)
3443 const char *template;
3444 rtx *operands;
3445 {
3446 register const char *p;
3447 register int c;
3448
3449 /* An insn may return a null string template
3450 in a case where no assembler code is needed. */
3451 if (*template == 0)
3452 return;
3453
3454 p = template;
3455 putc ('\t', asm_out_file);
3456
3457 #ifdef ASM_OUTPUT_OPCODE
3458 ASM_OUTPUT_OPCODE (asm_out_file, p);
3459 #endif
3460
3461 while ((c = *p++))
3462 switch (c)
3463 {
3464 case '\n':
3465 output_asm_name ();
3466 putc (c, asm_out_file);
3467 #ifdef ASM_OUTPUT_OPCODE
3468 while ((c = *p) == '\t')
3469 {
3470 putc (c, asm_out_file);
3471 p++;
3472 }
3473 ASM_OUTPUT_OPCODE (asm_out_file, p);
3474 #endif
3475 break;
3476
3477 #ifdef ASSEMBLER_DIALECT
3478 case '{':
3479 {
3480 register int i;
3481
3482 /* If we want the first dialect, do nothing. Otherwise, skip
3483 DIALECT_NUMBER of strings ending with '|'. */
3484 for (i = 0; i < dialect_number; i++)
3485 {
3486 while (*p && *p != '}' && *p++ != '|')
3487 ;
3488 if (*p == '}')
3489 break;
3490 if (*p == '|')
3491 p++;
3492 }
3493 }
3494 break;
3495
3496 case '|':
3497 /* Skip to close brace. */
3498 while (*p && *p++ != '}')
3499 ;
3500 break;
3501
3502 case '}':
3503 break;
3504 #endif
3505
3506 case '%':
3507 /* %% outputs a single %. */
3508 if (*p == '%')
3509 {
3510 p++;
3511 putc (c, asm_out_file);
3512 }
3513 /* %= outputs a number which is unique to each insn in the entire
3514 compilation. This is useful for making local labels that are
3515 referred to more than once in a given insn. */
3516 else if (*p == '=')
3517 {
3518 p++;
3519 fprintf (asm_out_file, "%d", insn_counter);
3520 }
3521 /* % followed by a letter and some digits
3522 outputs an operand in a special way depending on the letter.
3523 Letters `acln' are implemented directly.
3524 Other letters are passed to `output_operand' so that
3525 the PRINT_OPERAND macro can define them. */
3526 else if (ISLOWER (*p) || ISUPPER (*p))
3527 {
3528 int letter = *p++;
3529 c = atoi (p);
3530
3531 if (! (*p >= '0' && *p <= '9'))
3532 output_operand_lossage ("operand number missing after %-letter");
3533 else if (this_is_asm_operands && (c < 0 || (unsigned int) c >= insn_noperands))
3534 output_operand_lossage ("operand number out of range");
3535 else if (letter == 'l')
3536 output_asm_label (operands[c]);
3537 else if (letter == 'a')
3538 output_address (operands[c]);
3539 else if (letter == 'c')
3540 {
3541 if (CONSTANT_ADDRESS_P (operands[c]))
3542 output_addr_const (asm_out_file, operands[c]);
3543 else
3544 output_operand (operands[c], 'c');
3545 }
3546 else if (letter == 'n')
3547 {
3548 if (GET_CODE (operands[c]) == CONST_INT)
3549 fprintf (asm_out_file, HOST_WIDE_INT_PRINT_DEC,
3550 - INTVAL (operands[c]));
3551 else
3552 {
3553 putc ('-', asm_out_file);
3554 output_addr_const (asm_out_file, operands[c]);
3555 }
3556 }
3557 else
3558 output_operand (operands[c], letter);
3559
3560 while ((c = *p) >= '0' && c <= '9')
3561 p++;
3562 }
3563 /* % followed by a digit outputs an operand the default way. */
3564 else if (*p >= '0' && *p <= '9')
3565 {
3566 c = atoi (p);
3567 if (this_is_asm_operands
3568 && (c < 0 || (unsigned int) c >= insn_noperands))
3569 output_operand_lossage ("operand number out of range");
3570 else
3571 output_operand (operands[c], 0);
3572 while ((c = *p) >= '0' && c <= '9')
3573 p++;
3574 }
3575 /* % followed by punctuation: output something for that
3576 punctuation character alone, with no operand.
3577 The PRINT_OPERAND macro decides what is actually done. */
3578 #ifdef PRINT_OPERAND_PUNCT_VALID_P
3579 else if (PRINT_OPERAND_PUNCT_VALID_P ((unsigned char) *p))
3580 output_operand (NULL_RTX, *p++);
3581 #endif
3582 else
3583 output_operand_lossage ("invalid %%-code");
3584 break;
3585
3586 default:
3587 putc (c, asm_out_file);
3588 }
3589
3590 output_asm_name ();
3591
3592 putc ('\n', asm_out_file);
3593 }
3594 \f
3595 /* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */
3596
3597 void
3598 output_asm_label (x)
3599 rtx x;
3600 {
3601 char buf[256];
3602
3603 if (GET_CODE (x) == LABEL_REF)
3604 x = XEXP (x, 0);
3605 if (GET_CODE (x) == CODE_LABEL
3606 || (GET_CODE (x) == NOTE
3607 && NOTE_LINE_NUMBER (x) == NOTE_INSN_DELETED_LABEL))
3608 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3609 else
3610 output_operand_lossage ("`%l' operand isn't a label");
3611
3612 assemble_name (asm_out_file, buf);
3613 }
3614
3615 /* Print operand X using machine-dependent assembler syntax.
3616 The macro PRINT_OPERAND is defined just to control this function.
3617 CODE is a non-digit that preceded the operand-number in the % spec,
3618 such as 'z' if the spec was `%z3'. CODE is 0 if there was no char
3619 between the % and the digits.
3620 When CODE is a non-letter, X is 0.
3621
3622 The meanings of the letters are machine-dependent and controlled
3623 by PRINT_OPERAND. */
3624
3625 static void
3626 output_operand (x, code)
3627 rtx x;
3628 int code ATTRIBUTE_UNUSED;
3629 {
3630 if (x && GET_CODE (x) == SUBREG)
3631 x = alter_subreg (x);
3632
3633 /* If X is a pseudo-register, abort now rather than writing trash to the
3634 assembler file. */
3635
3636 if (x && GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER)
3637 abort ();
3638
3639 PRINT_OPERAND (asm_out_file, x, code);
3640 }
3641
3642 /* Print a memory reference operand for address X
3643 using machine-dependent assembler syntax.
3644 The macro PRINT_OPERAND_ADDRESS exists just to control this function. */
3645
3646 void
3647 output_address (x)
3648 rtx x;
3649 {
3650 walk_alter_subreg (x);
3651 PRINT_OPERAND_ADDRESS (asm_out_file, x);
3652 }
3653 \f
3654 /* Print an integer constant expression in assembler syntax.
3655 Addition and subtraction are the only arithmetic
3656 that may appear in these expressions. */
3657
3658 void
3659 output_addr_const (file, x)
3660 FILE *file;
3661 rtx x;
3662 {
3663 char buf[256];
3664
3665 restart:
3666 switch (GET_CODE (x))
3667 {
3668 case PC:
3669 if (flag_pic)
3670 putc ('.', file);
3671 else
3672 abort ();
3673 break;
3674
3675 case SYMBOL_REF:
3676 assemble_name (file, XSTR (x, 0));
3677 break;
3678
3679 case LABEL_REF:
3680 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (XEXP (x, 0)));
3681 assemble_name (file, buf);
3682 break;
3683
3684 case CODE_LABEL:
3685 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3686 assemble_name (file, buf);
3687 break;
3688
3689 case CONST_INT:
3690 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x));
3691 break;
3692
3693 case CONST:
3694 /* This used to output parentheses around the expression,
3695 but that does not work on the 386 (either ATT or BSD assembler). */
3696 output_addr_const (file, XEXP (x, 0));
3697 break;
3698
3699 case CONST_DOUBLE:
3700 if (GET_MODE (x) == VOIDmode)
3701 {
3702 /* We can use %d if the number is one word and positive. */
3703 if (CONST_DOUBLE_HIGH (x))
3704 fprintf (file, HOST_WIDE_INT_PRINT_DOUBLE_HEX,
3705 CONST_DOUBLE_HIGH (x), CONST_DOUBLE_LOW (x));
3706 else if (CONST_DOUBLE_LOW (x) < 0)
3707 fprintf (file, HOST_WIDE_INT_PRINT_HEX, CONST_DOUBLE_LOW (x));
3708 else
3709 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x));
3710 }
3711 else
3712 /* We can't handle floating point constants;
3713 PRINT_OPERAND must handle them. */
3714 output_operand_lossage ("floating constant misused");
3715 break;
3716
3717 case PLUS:
3718 /* Some assemblers need integer constants to appear last (eg masm). */
3719 if (GET_CODE (XEXP (x, 0)) == CONST_INT)
3720 {
3721 output_addr_const (file, XEXP (x, 1));
3722 if (INTVAL (XEXP (x, 0)) >= 0)
3723 fprintf (file, "+");
3724 output_addr_const (file, XEXP (x, 0));
3725 }
3726 else
3727 {
3728 output_addr_const (file, XEXP (x, 0));
3729 if (INTVAL (XEXP (x, 1)) >= 0)
3730 fprintf (file, "+");
3731 output_addr_const (file, XEXP (x, 1));
3732 }
3733 break;
3734
3735 case MINUS:
3736 /* Avoid outputting things like x-x or x+5-x,
3737 since some assemblers can't handle that. */
3738 x = simplify_subtraction (x);
3739 if (GET_CODE (x) != MINUS)
3740 goto restart;
3741
3742 output_addr_const (file, XEXP (x, 0));
3743 fprintf (file, "-");
3744 if (GET_CODE (XEXP (x, 1)) == CONST_INT
3745 && INTVAL (XEXP (x, 1)) < 0)
3746 {
3747 fprintf (file, "%s", ASM_OPEN_PAREN);
3748 output_addr_const (file, XEXP (x, 1));
3749 fprintf (file, "%s", ASM_CLOSE_PAREN);
3750 }
3751 else
3752 output_addr_const (file, XEXP (x, 1));
3753 break;
3754
3755 case ZERO_EXTEND:
3756 case SIGN_EXTEND:
3757 output_addr_const (file, XEXP (x, 0));
3758 break;
3759
3760 default:
3761 output_operand_lossage ("invalid expression as operand");
3762 }
3763 }
3764 \f
3765 /* A poor man's fprintf, with the added features of %I, %R, %L, and %U.
3766 %R prints the value of REGISTER_PREFIX.
3767 %L prints the value of LOCAL_LABEL_PREFIX.
3768 %U prints the value of USER_LABEL_PREFIX.
3769 %I prints the value of IMMEDIATE_PREFIX.
3770 %O runs ASM_OUTPUT_OPCODE to transform what follows in the string.
3771 Also supported are %d, %x, %s, %e, %f, %g and %%.
3772
3773 We handle alternate assembler dialects here, just like output_asm_insn. */
3774
3775 void
3776 asm_fprintf VPARAMS ((FILE *file, const char *p, ...))
3777 {
3778 #ifndef ANSI_PROTOTYPES
3779 FILE *file;
3780 const char *p;
3781 #endif
3782 va_list argptr;
3783 char buf[10];
3784 char *q, c;
3785
3786 VA_START (argptr, p);
3787
3788 #ifndef ANSI_PROTOTYPES
3789 file = va_arg (argptr, FILE *);
3790 p = va_arg (argptr, const char *);
3791 #endif
3792
3793 buf[0] = '%';
3794
3795 while ((c = *p++))
3796 switch (c)
3797 {
3798 #ifdef ASSEMBLER_DIALECT
3799 case '{':
3800 {
3801 int i;
3802
3803 /* If we want the first dialect, do nothing. Otherwise, skip
3804 DIALECT_NUMBER of strings ending with '|'. */
3805 for (i = 0; i < dialect_number; i++)
3806 {
3807 while (*p && *p++ != '|')
3808 ;
3809
3810 if (*p == '|')
3811 p++;
3812 }
3813 }
3814 break;
3815
3816 case '|':
3817 /* Skip to close brace. */
3818 while (*p && *p++ != '}')
3819 ;
3820 break;
3821
3822 case '}':
3823 break;
3824 #endif
3825
3826 case '%':
3827 c = *p++;
3828 q = &buf[1];
3829 while ((c >= '0' && c <= '9') || c == '.')
3830 {
3831 *q++ = c;
3832 c = *p++;
3833 }
3834 switch (c)
3835 {
3836 case '%':
3837 fprintf (file, "%%");
3838 break;
3839
3840 case 'd': case 'i': case 'u':
3841 case 'x': case 'p': case 'X':
3842 case 'o':
3843 *q++ = c;
3844 *q = 0;
3845 fprintf (file, buf, va_arg (argptr, int));
3846 break;
3847
3848 case 'w':
3849 /* This is a prefix to the 'd', 'i', 'u', 'x', 'p', and 'X' cases,
3850 but we do not check for those cases. It means that the value
3851 is a HOST_WIDE_INT, which may be either `int' or `long'. */
3852
3853 #if HOST_BITS_PER_WIDE_INT == HOST_BITS_PER_INT
3854 #else
3855 #if HOST_BITS_PER_WIDE_INT == HOST_BITS_PER_LONG
3856 *q++ = 'l';
3857 #else
3858 *q++ = 'l';
3859 *q++ = 'l';
3860 #endif
3861 #endif
3862
3863 *q++ = *p++;
3864 *q = 0;
3865 fprintf (file, buf, va_arg (argptr, HOST_WIDE_INT));
3866 break;
3867
3868 case 'l':
3869 *q++ = c;
3870 *q++ = *p++;
3871 *q = 0;
3872 fprintf (file, buf, va_arg (argptr, long));
3873 break;
3874
3875 case 'e':
3876 case 'f':
3877 case 'g':
3878 *q++ = c;
3879 *q = 0;
3880 fprintf (file, buf, va_arg (argptr, double));
3881 break;
3882
3883 case 's':
3884 *q++ = c;
3885 *q = 0;
3886 fprintf (file, buf, va_arg (argptr, char *));
3887 break;
3888
3889 case 'O':
3890 #ifdef ASM_OUTPUT_OPCODE
3891 ASM_OUTPUT_OPCODE (asm_out_file, p);
3892 #endif
3893 break;
3894
3895 case 'R':
3896 #ifdef REGISTER_PREFIX
3897 fprintf (file, "%s", REGISTER_PREFIX);
3898 #endif
3899 break;
3900
3901 case 'I':
3902 #ifdef IMMEDIATE_PREFIX
3903 fprintf (file, "%s", IMMEDIATE_PREFIX);
3904 #endif
3905 break;
3906
3907 case 'L':
3908 #ifdef LOCAL_LABEL_PREFIX
3909 fprintf (file, "%s", LOCAL_LABEL_PREFIX);
3910 #endif
3911 break;
3912
3913 case 'U':
3914 fputs (user_label_prefix, file);
3915 break;
3916
3917 #ifdef ASM_FPRINTF_EXTENSIONS
3918 /* Upper case letters are reserved for general use by asm_fprintf
3919 and so are not available to target specific code. In order to
3920 prevent the ASM_FPRINTF_EXTENSIONS macro from using them then,
3921 they are defined here. As they get turned into real extensions
3922 to asm_fprintf they should be removed from this list. */
3923 case 'A': case 'B': case 'C': case 'D': case 'E':
3924 case 'F': case 'G': case 'H': case 'J': case 'K':
3925 case 'M': case 'N': case 'P': case 'Q': case 'S':
3926 case 'T': case 'V': case 'W': case 'Y': case 'Z':
3927 break;
3928
3929 ASM_FPRINTF_EXTENSIONS (file, argptr, p)
3930 #endif
3931 default:
3932 abort ();
3933 }
3934 break;
3935
3936 default:
3937 fputc (c, file);
3938 }
3939 va_end (argptr);
3940 }
3941 \f
3942 /* Split up a CONST_DOUBLE or integer constant rtx
3943 into two rtx's for single words,
3944 storing in *FIRST the word that comes first in memory in the target
3945 and in *SECOND the other. */
3946
3947 void
3948 split_double (value, first, second)
3949 rtx value;
3950 rtx *first, *second;
3951 {
3952 if (GET_CODE (value) == CONST_INT)
3953 {
3954 if (HOST_BITS_PER_WIDE_INT >= (2 * BITS_PER_WORD))
3955 {
3956 /* In this case the CONST_INT holds both target words.
3957 Extract the bits from it into two word-sized pieces.
3958 Sign extend each half to HOST_WIDE_INT. */
3959 unsigned HOST_WIDE_INT low, high;
3960 unsigned HOST_WIDE_INT mask, sign_bit, sign_extend;
3961
3962 /* Set sign_bit to the most significant bit of a word. */
3963 sign_bit = 1;
3964 sign_bit <<= BITS_PER_WORD - 1;
3965
3966 /* Set mask so that all bits of the word are set. We could
3967 have used 1 << BITS_PER_WORD instead of basing the
3968 calculation on sign_bit. However, on machines where
3969 HOST_BITS_PER_WIDE_INT == BITS_PER_WORD, it could cause a
3970 compiler warning, even though the code would never be
3971 executed. */
3972 mask = sign_bit << 1;
3973 mask--;
3974
3975 /* Set sign_extend as any remaining bits. */
3976 sign_extend = ~mask;
3977
3978 /* Pick the lower word and sign-extend it. */
3979 low = INTVAL (value);
3980 low &= mask;
3981 if (low & sign_bit)
3982 low |= sign_extend;
3983
3984 /* Pick the higher word, shifted to the least significant
3985 bits, and sign-extend it. */
3986 high = INTVAL (value);
3987 high >>= BITS_PER_WORD - 1;
3988 high >>= 1;
3989 high &= mask;
3990 if (high & sign_bit)
3991 high |= sign_extend;
3992
3993 /* Store the words in the target machine order. */
3994 if (WORDS_BIG_ENDIAN)
3995 {
3996 *first = GEN_INT (high);
3997 *second = GEN_INT (low);
3998 }
3999 else
4000 {
4001 *first = GEN_INT (low);
4002 *second = GEN_INT (high);
4003 }
4004 }
4005 else
4006 {
4007 /* The rule for using CONST_INT for a wider mode
4008 is that we regard the value as signed.
4009 So sign-extend it. */
4010 rtx high = (INTVAL (value) < 0 ? constm1_rtx : const0_rtx);
4011 if (WORDS_BIG_ENDIAN)
4012 {
4013 *first = high;
4014 *second = value;
4015 }
4016 else
4017 {
4018 *first = value;
4019 *second = high;
4020 }
4021 }
4022 }
4023 else if (GET_CODE (value) != CONST_DOUBLE)
4024 {
4025 if (WORDS_BIG_ENDIAN)
4026 {
4027 *first = const0_rtx;
4028 *second = value;
4029 }
4030 else
4031 {
4032 *first = value;
4033 *second = const0_rtx;
4034 }
4035 }
4036 else if (GET_MODE (value) == VOIDmode
4037 /* This is the old way we did CONST_DOUBLE integers. */
4038 || GET_MODE_CLASS (GET_MODE (value)) == MODE_INT)
4039 {
4040 /* In an integer, the words are defined as most and least significant.
4041 So order them by the target's convention. */
4042 if (WORDS_BIG_ENDIAN)
4043 {
4044 *first = GEN_INT (CONST_DOUBLE_HIGH (value));
4045 *second = GEN_INT (CONST_DOUBLE_LOW (value));
4046 }
4047 else
4048 {
4049 *first = GEN_INT (CONST_DOUBLE_LOW (value));
4050 *second = GEN_INT (CONST_DOUBLE_HIGH (value));
4051 }
4052 }
4053 else
4054 {
4055 #ifdef REAL_ARITHMETIC
4056 REAL_VALUE_TYPE r;
4057 long l[2];
4058 REAL_VALUE_FROM_CONST_DOUBLE (r, value);
4059
4060 /* Note, this converts the REAL_VALUE_TYPE to the target's
4061 format, splits up the floating point double and outputs
4062 exactly 32 bits of it into each of l[0] and l[1] --
4063 not necessarily BITS_PER_WORD bits. */
4064 REAL_VALUE_TO_TARGET_DOUBLE (r, l);
4065
4066 /* If 32 bits is an entire word for the target, but not for the host,
4067 then sign-extend on the host so that the number will look the same
4068 way on the host that it would on the target. See for instance
4069 simplify_unary_operation. The #if is needed to avoid compiler
4070 warnings. */
4071
4072 #if HOST_BITS_PER_LONG > 32
4073 if (BITS_PER_WORD < HOST_BITS_PER_LONG && BITS_PER_WORD == 32)
4074 {
4075 if (l[0] & ((long) 1 << 31))
4076 l[0] |= ((long) (-1) << 32);
4077 if (l[1] & ((long) 1 << 31))
4078 l[1] |= ((long) (-1) << 32);
4079 }
4080 #endif
4081
4082 *first = GEN_INT ((HOST_WIDE_INT) l[0]);
4083 *second = GEN_INT ((HOST_WIDE_INT) l[1]);
4084 #else
4085 if ((HOST_FLOAT_FORMAT != TARGET_FLOAT_FORMAT
4086 || HOST_BITS_PER_WIDE_INT != BITS_PER_WORD)
4087 && ! flag_pretend_float)
4088 abort ();
4089
4090 if (
4091 #ifdef HOST_WORDS_BIG_ENDIAN
4092 WORDS_BIG_ENDIAN
4093 #else
4094 ! WORDS_BIG_ENDIAN
4095 #endif
4096 )
4097 {
4098 /* Host and target agree => no need to swap. */
4099 *first = GEN_INT (CONST_DOUBLE_LOW (value));
4100 *second = GEN_INT (CONST_DOUBLE_HIGH (value));
4101 }
4102 else
4103 {
4104 *second = GEN_INT (CONST_DOUBLE_LOW (value));
4105 *first = GEN_INT (CONST_DOUBLE_HIGH (value));
4106 }
4107 #endif /* no REAL_ARITHMETIC */
4108 }
4109 }
4110 \f
4111 /* Return nonzero if this function has no function calls. */
4112
4113 int
4114 leaf_function_p ()
4115 {
4116 rtx insn;
4117
4118 if (profile_flag || profile_block_flag || profile_arc_flag)
4119 return 0;
4120
4121 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4122 {
4123 if (GET_CODE (insn) == CALL_INSN
4124 && ! SIBLING_CALL_P (insn))
4125 return 0;
4126 if (GET_CODE (insn) == INSN
4127 && GET_CODE (PATTERN (insn)) == SEQUENCE
4128 && GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) == CALL_INSN
4129 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0)))
4130 return 0;
4131 }
4132 for (insn = current_function_epilogue_delay_list;
4133 insn;
4134 insn = XEXP (insn, 1))
4135 {
4136 if (GET_CODE (XEXP (insn, 0)) == CALL_INSN
4137 && ! SIBLING_CALL_P (insn))
4138 return 0;
4139 if (GET_CODE (XEXP (insn, 0)) == INSN
4140 && GET_CODE (PATTERN (XEXP (insn, 0))) == SEQUENCE
4141 && GET_CODE (XVECEXP (PATTERN (XEXP (insn, 0)), 0, 0)) == CALL_INSN
4142 && ! SIBLING_CALL_P (XVECEXP (PATTERN (XEXP (insn, 0)), 0, 0)))
4143 return 0;
4144 }
4145
4146 return 1;
4147 }
4148
4149 /* On some machines, a function with no call insns
4150 can run faster if it doesn't create its own register window.
4151 When output, the leaf function should use only the "output"
4152 registers. Ordinarily, the function would be compiled to use
4153 the "input" registers to find its arguments; it is a candidate
4154 for leaf treatment if it uses only the "input" registers.
4155 Leaf function treatment means renumbering so the function
4156 uses the "output" registers instead. */
4157
4158 #ifdef LEAF_REGISTERS
4159
4160 /* Return 1 if this function uses only the registers that can be
4161 safely renumbered. */
4162
4163 int
4164 only_leaf_regs_used ()
4165 {
4166 int i;
4167 char *permitted_reg_in_leaf_functions = LEAF_REGISTERS;
4168
4169 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
4170 if ((regs_ever_live[i] || global_regs[i])
4171 && ! permitted_reg_in_leaf_functions[i])
4172 return 0;
4173
4174 if (current_function_uses_pic_offset_table
4175 && pic_offset_table_rtx != 0
4176 && GET_CODE (pic_offset_table_rtx) == REG
4177 && ! permitted_reg_in_leaf_functions[REGNO (pic_offset_table_rtx)])
4178 return 0;
4179
4180 return 1;
4181 }
4182
4183 /* Scan all instructions and renumber all registers into those
4184 available in leaf functions. */
4185
4186 static void
4187 leaf_renumber_regs (first)
4188 rtx first;
4189 {
4190 rtx insn;
4191
4192 /* Renumber only the actual patterns.
4193 The reg-notes can contain frame pointer refs,
4194 and renumbering them could crash, and should not be needed. */
4195 for (insn = first; insn; insn = NEXT_INSN (insn))
4196 if (INSN_P (insn))
4197 leaf_renumber_regs_insn (PATTERN (insn));
4198 for (insn = current_function_epilogue_delay_list;
4199 insn;
4200 insn = XEXP (insn, 1))
4201 if (INSN_P (XEXP (insn, 0)))
4202 leaf_renumber_regs_insn (PATTERN (XEXP (insn, 0)));
4203 }
4204
4205 /* Scan IN_RTX and its subexpressions, and renumber all regs into those
4206 available in leaf functions. */
4207
4208 void
4209 leaf_renumber_regs_insn (in_rtx)
4210 register rtx in_rtx;
4211 {
4212 register int i, j;
4213 register const char *format_ptr;
4214
4215 if (in_rtx == 0)
4216 return;
4217
4218 /* Renumber all input-registers into output-registers.
4219 renumbered_regs would be 1 for an output-register;
4220 they */
4221
4222 if (GET_CODE (in_rtx) == REG)
4223 {
4224 int newreg;
4225
4226 /* Don't renumber the same reg twice. */
4227 if (in_rtx->used)
4228 return;
4229
4230 newreg = REGNO (in_rtx);
4231 /* Don't try to renumber pseudo regs. It is possible for a pseudo reg
4232 to reach here as part of a REG_NOTE. */
4233 if (newreg >= FIRST_PSEUDO_REGISTER)
4234 {
4235 in_rtx->used = 1;
4236 return;
4237 }
4238 newreg = LEAF_REG_REMAP (newreg);
4239 if (newreg < 0)
4240 abort ();
4241 regs_ever_live[REGNO (in_rtx)] = 0;
4242 regs_ever_live[newreg] = 1;
4243 REGNO (in_rtx) = newreg;
4244 in_rtx->used = 1;
4245 }
4246
4247 if (INSN_P (in_rtx))
4248 {
4249 /* Inside a SEQUENCE, we find insns.
4250 Renumber just the patterns of these insns,
4251 just as we do for the top-level insns. */
4252 leaf_renumber_regs_insn (PATTERN (in_rtx));
4253 return;
4254 }
4255
4256 format_ptr = GET_RTX_FORMAT (GET_CODE (in_rtx));
4257
4258 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (in_rtx)); i++)
4259 switch (*format_ptr++)
4260 {
4261 case 'e':
4262 leaf_renumber_regs_insn (XEXP (in_rtx, i));
4263 break;
4264
4265 case 'E':
4266 if (NULL != XVEC (in_rtx, i))
4267 {
4268 for (j = 0; j < XVECLEN (in_rtx, i); j++)
4269 leaf_renumber_regs_insn (XVECEXP (in_rtx, i, j));
4270 }
4271 break;
4272
4273 case 'S':
4274 case 's':
4275 case '0':
4276 case 'i':
4277 case 'w':
4278 case 'n':
4279 case 'u':
4280 break;
4281
4282 default:
4283 abort ();
4284 }
4285 }
4286 #endif