[RS6000] Don't restore fixed regs
[gcc.git] / gcc / final.c
1 /* Convert RTL to assembler code and output it, for GNU compiler.
2 Copyright (C) 1987-2017 Free Software Foundation, Inc.
3
4 This file is part of GCC.
5
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
9 version.
10
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
19
20 /* This is the final pass of the compiler.
21 It looks at the rtl code for a function and outputs assembler code.
22
23 Call `final_start_function' to output the assembler code for function entry,
24 `final' to output assembler code for some RTL code,
25 `final_end_function' to output assembler code for function exit.
26 If a function is compiled in several pieces, each piece is
27 output separately with `final'.
28
29 Some optimizations are also done at this level.
30 Move instructions that were made unnecessary by good register allocation
31 are detected and omitted from the output. (Though most of these
32 are removed by the last jump pass.)
33
34 Instructions to set the condition codes are omitted when it can be
35 seen that the condition codes already had the desired values.
36
37 In some cases it is sufficient if the inherited condition codes
38 have related values, but this may require the following insn
39 (the one that tests the condition codes) to be modified.
40
41 The code for the function prologue and epilogue are generated
42 directly in assembler by the target functions function_prologue and
43 function_epilogue. Those instructions never exist as rtl. */
44
45 #include "config.h"
46 #define INCLUDE_ALGORITHM /* reverse */
47 #include "system.h"
48 #include "coretypes.h"
49 #include "backend.h"
50 #include "target.h"
51 #include "rtl.h"
52 #include "tree.h"
53 #include "cfghooks.h"
54 #include "df.h"
55 #include "memmodel.h"
56 #include "tm_p.h"
57 #include "insn-config.h"
58 #include "regs.h"
59 #include "emit-rtl.h"
60 #include "recog.h"
61 #include "cgraph.h"
62 #include "tree-pretty-print.h" /* for dump_function_header */
63 #include "varasm.h"
64 #include "insn-attr.h"
65 #include "conditions.h"
66 #include "flags.h"
67 #include "output.h"
68 #include "except.h"
69 #include "rtl-error.h"
70 #include "toplev.h" /* exact_log2, floor_log2 */
71 #include "reload.h"
72 #include "intl.h"
73 #include "cfgrtl.h"
74 #include "debug.h"
75 #include "tree-pass.h"
76 #include "tree-ssa.h"
77 #include "cfgloop.h"
78 #include "params.h"
79 #include "stringpool.h"
80 #include "attribs.h"
81 #include "asan.h"
82 #include "rtl-iter.h"
83 #include "print-rtl.h"
84
85 #ifdef XCOFF_DEBUGGING_INFO
86 #include "xcoffout.h" /* Needed for external data declarations. */
87 #endif
88
89 #include "dwarf2out.h"
90
91 #ifdef DBX_DEBUGGING_INFO
92 #include "dbxout.h"
93 #endif
94
95 #include "sdbout.h"
96
97 /* Most ports that aren't using cc0 don't need to define CC_STATUS_INIT.
98 So define a null default for it to save conditionalization later. */
99 #ifndef CC_STATUS_INIT
100 #define CC_STATUS_INIT
101 #endif
102
103 /* Is the given character a logical line separator for the assembler? */
104 #ifndef IS_ASM_LOGICAL_LINE_SEPARATOR
105 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == ';')
106 #endif
107
108 #ifndef JUMP_TABLES_IN_TEXT_SECTION
109 #define JUMP_TABLES_IN_TEXT_SECTION 0
110 #endif
111
112 /* Bitflags used by final_scan_insn. */
113 #define SEEN_NOTE 1
114 #define SEEN_EMITTED 2
115
116 /* Last insn processed by final_scan_insn. */
117 static rtx_insn *debug_insn;
118 rtx_insn *current_output_insn;
119
120 /* Line number of last NOTE. */
121 static int last_linenum;
122
123 /* Column number of last NOTE. */
124 static int last_columnnum;
125
126 /* Last discriminator written to assembly. */
127 static int last_discriminator;
128
129 /* Discriminator of current block. */
130 static int discriminator;
131
132 /* Highest line number in current block. */
133 static int high_block_linenum;
134
135 /* Likewise for function. */
136 static int high_function_linenum;
137
138 /* Filename of last NOTE. */
139 static const char *last_filename;
140
141 /* Override filename, line and column number. */
142 static const char *override_filename;
143 static int override_linenum;
144 static int override_columnnum;
145
146 /* Whether to force emission of a line note before the next insn. */
147 static bool force_source_line = false;
148
149 extern const int length_unit_log; /* This is defined in insn-attrtab.c. */
150
151 /* Nonzero while outputting an `asm' with operands.
152 This means that inconsistencies are the user's fault, so don't die.
153 The precise value is the insn being output, to pass to error_for_asm. */
154 const rtx_insn *this_is_asm_operands;
155
156 /* Number of operands of this insn, for an `asm' with operands. */
157 static unsigned int insn_noperands;
158
159 /* Compare optimization flag. */
160
161 static rtx last_ignored_compare = 0;
162
163 /* Assign a unique number to each insn that is output.
164 This can be used to generate unique local labels. */
165
166 static int insn_counter = 0;
167
168 /* This variable contains machine-dependent flags (defined in tm.h)
169 set and examined by output routines
170 that describe how to interpret the condition codes properly. */
171
172 CC_STATUS cc_status;
173
174 /* During output of an insn, this contains a copy of cc_status
175 from before the insn. */
176
177 CC_STATUS cc_prev_status;
178
179 /* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */
180
181 static int block_depth;
182
183 /* Nonzero if have enabled APP processing of our assembler output. */
184
185 static int app_on;
186
187 /* If we are outputting an insn sequence, this contains the sequence rtx.
188 Zero otherwise. */
189
190 rtx_sequence *final_sequence;
191
192 #ifdef ASSEMBLER_DIALECT
193
194 /* Number of the assembler dialect to use, starting at 0. */
195 static int dialect_number;
196 #endif
197
198 /* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */
199 rtx current_insn_predicate;
200
201 /* True if printing into -fdump-final-insns= dump. */
202 bool final_insns_dump_p;
203
204 /* True if profile_function should be called, but hasn't been called yet. */
205 static bool need_profile_function;
206
207 static int asm_insn_count (rtx);
208 static void profile_function (FILE *);
209 static void profile_after_prologue (FILE *);
210 static bool notice_source_line (rtx_insn *, bool *);
211 static rtx walk_alter_subreg (rtx *, bool *);
212 static void output_asm_name (void);
213 static void output_alternate_entry_point (FILE *, rtx_insn *);
214 static tree get_mem_expr_from_op (rtx, int *);
215 static void output_asm_operand_names (rtx *, int *, int);
216 #ifdef LEAF_REGISTERS
217 static void leaf_renumber_regs (rtx_insn *);
218 #endif
219 #if HAVE_cc0
220 static int alter_cond (rtx);
221 #endif
222 #ifndef ADDR_VEC_ALIGN
223 static int final_addr_vec_align (rtx_insn *);
224 #endif
225 static int align_fuzz (rtx, rtx, int, unsigned);
226 static void collect_fn_hard_reg_usage (void);
227 static tree get_call_fndecl (rtx_insn *);
228 \f
229 /* Initialize data in final at the beginning of a compilation. */
230
231 void
232 init_final (const char *filename ATTRIBUTE_UNUSED)
233 {
234 app_on = 0;
235 final_sequence = 0;
236
237 #ifdef ASSEMBLER_DIALECT
238 dialect_number = ASSEMBLER_DIALECT;
239 #endif
240 }
241
242 /* Default target function prologue and epilogue assembler output.
243
244 If not overridden for epilogue code, then the function body itself
245 contains return instructions wherever needed. */
246 void
247 default_function_pro_epilogue (FILE *file ATTRIBUTE_UNUSED,
248 HOST_WIDE_INT size ATTRIBUTE_UNUSED)
249 {
250 }
251
252 void
253 default_function_switched_text_sections (FILE *file ATTRIBUTE_UNUSED,
254 tree decl ATTRIBUTE_UNUSED,
255 bool new_is_cold ATTRIBUTE_UNUSED)
256 {
257 }
258
259 /* Default target hook that outputs nothing to a stream. */
260 void
261 no_asm_to_stream (FILE *file ATTRIBUTE_UNUSED)
262 {
263 }
264
265 /* Enable APP processing of subsequent output.
266 Used before the output from an `asm' statement. */
267
268 void
269 app_enable (void)
270 {
271 if (! app_on)
272 {
273 fputs (ASM_APP_ON, asm_out_file);
274 app_on = 1;
275 }
276 }
277
278 /* Disable APP processing of subsequent output.
279 Called from varasm.c before most kinds of output. */
280
281 void
282 app_disable (void)
283 {
284 if (app_on)
285 {
286 fputs (ASM_APP_OFF, asm_out_file);
287 app_on = 0;
288 }
289 }
290 \f
291 /* Return the number of slots filled in the current
292 delayed branch sequence (we don't count the insn needing the
293 delay slot). Zero if not in a delayed branch sequence. */
294
295 int
296 dbr_sequence_length (void)
297 {
298 if (final_sequence != 0)
299 return XVECLEN (final_sequence, 0) - 1;
300 else
301 return 0;
302 }
303 \f
304 /* The next two pages contain routines used to compute the length of an insn
305 and to shorten branches. */
306
307 /* Arrays for insn lengths, and addresses. The latter is referenced by
308 `insn_current_length'. */
309
310 static int *insn_lengths;
311
312 vec<int> insn_addresses_;
313
314 /* Max uid for which the above arrays are valid. */
315 static int insn_lengths_max_uid;
316
317 /* Address of insn being processed. Used by `insn_current_length'. */
318 int insn_current_address;
319
320 /* Address of insn being processed in previous iteration. */
321 int insn_last_address;
322
323 /* known invariant alignment of insn being processed. */
324 int insn_current_align;
325
326 /* After shorten_branches, for any insn, uid_align[INSN_UID (insn)]
327 gives the next following alignment insn that increases the known
328 alignment, or NULL_RTX if there is no such insn.
329 For any alignment obtained this way, we can again index uid_align with
330 its uid to obtain the next following align that in turn increases the
331 alignment, till we reach NULL_RTX; the sequence obtained this way
332 for each insn we'll call the alignment chain of this insn in the following
333 comments. */
334
335 struct label_alignment
336 {
337 short alignment;
338 short max_skip;
339 };
340
341 static rtx *uid_align;
342 static int *uid_shuid;
343 static struct label_alignment *label_align;
344
345 /* Indicate that branch shortening hasn't yet been done. */
346
347 void
348 init_insn_lengths (void)
349 {
350 if (uid_shuid)
351 {
352 free (uid_shuid);
353 uid_shuid = 0;
354 }
355 if (insn_lengths)
356 {
357 free (insn_lengths);
358 insn_lengths = 0;
359 insn_lengths_max_uid = 0;
360 }
361 if (HAVE_ATTR_length)
362 INSN_ADDRESSES_FREE ();
363 if (uid_align)
364 {
365 free (uid_align);
366 uid_align = 0;
367 }
368 }
369
370 /* Obtain the current length of an insn. If branch shortening has been done,
371 get its actual length. Otherwise, use FALLBACK_FN to calculate the
372 length. */
373 static int
374 get_attr_length_1 (rtx_insn *insn, int (*fallback_fn) (rtx_insn *))
375 {
376 rtx body;
377 int i;
378 int length = 0;
379
380 if (!HAVE_ATTR_length)
381 return 0;
382
383 if (insn_lengths_max_uid > INSN_UID (insn))
384 return insn_lengths[INSN_UID (insn)];
385 else
386 switch (GET_CODE (insn))
387 {
388 case NOTE:
389 case BARRIER:
390 case CODE_LABEL:
391 case DEBUG_INSN:
392 return 0;
393
394 case CALL_INSN:
395 case JUMP_INSN:
396 length = fallback_fn (insn);
397 break;
398
399 case INSN:
400 body = PATTERN (insn);
401 if (GET_CODE (body) == USE || GET_CODE (body) == CLOBBER)
402 return 0;
403
404 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
405 length = asm_insn_count (body) * fallback_fn (insn);
406 else if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (body))
407 for (i = 0; i < seq->len (); i++)
408 length += get_attr_length_1 (seq->insn (i), fallback_fn);
409 else
410 length = fallback_fn (insn);
411 break;
412
413 default:
414 break;
415 }
416
417 #ifdef ADJUST_INSN_LENGTH
418 ADJUST_INSN_LENGTH (insn, length);
419 #endif
420 return length;
421 }
422
423 /* Obtain the current length of an insn. If branch shortening has been done,
424 get its actual length. Otherwise, get its maximum length. */
425 int
426 get_attr_length (rtx_insn *insn)
427 {
428 return get_attr_length_1 (insn, insn_default_length);
429 }
430
431 /* Obtain the current length of an insn. If branch shortening has been done,
432 get its actual length. Otherwise, get its minimum length. */
433 int
434 get_attr_min_length (rtx_insn *insn)
435 {
436 return get_attr_length_1 (insn, insn_min_length);
437 }
438 \f
439 /* Code to handle alignment inside shorten_branches. */
440
441 /* Here is an explanation how the algorithm in align_fuzz can give
442 proper results:
443
444 Call a sequence of instructions beginning with alignment point X
445 and continuing until the next alignment point `block X'. When `X'
446 is used in an expression, it means the alignment value of the
447 alignment point.
448
449 Call the distance between the start of the first insn of block X, and
450 the end of the last insn of block X `IX', for the `inner size of X'.
451 This is clearly the sum of the instruction lengths.
452
453 Likewise with the next alignment-delimited block following X, which we
454 shall call block Y.
455
456 Call the distance between the start of the first insn of block X, and
457 the start of the first insn of block Y `OX', for the `outer size of X'.
458
459 The estimated padding is then OX - IX.
460
461 OX can be safely estimated as
462
463 if (X >= Y)
464 OX = round_up(IX, Y)
465 else
466 OX = round_up(IX, X) + Y - X
467
468 Clearly est(IX) >= real(IX), because that only depends on the
469 instruction lengths, and those being overestimated is a given.
470
471 Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so
472 we needn't worry about that when thinking about OX.
473
474 When X >= Y, the alignment provided by Y adds no uncertainty factor
475 for branch ranges starting before X, so we can just round what we have.
476 But when X < Y, we don't know anything about the, so to speak,
477 `middle bits', so we have to assume the worst when aligning up from an
478 address mod X to one mod Y, which is Y - X. */
479
480 #ifndef LABEL_ALIGN
481 #define LABEL_ALIGN(LABEL) align_labels_log
482 #endif
483
484 #ifndef LOOP_ALIGN
485 #define LOOP_ALIGN(LABEL) align_loops_log
486 #endif
487
488 #ifndef LABEL_ALIGN_AFTER_BARRIER
489 #define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0
490 #endif
491
492 #ifndef JUMP_ALIGN
493 #define JUMP_ALIGN(LABEL) align_jumps_log
494 #endif
495
496 int
497 default_label_align_after_barrier_max_skip (rtx_insn *insn ATTRIBUTE_UNUSED)
498 {
499 return 0;
500 }
501
502 int
503 default_loop_align_max_skip (rtx_insn *insn ATTRIBUTE_UNUSED)
504 {
505 return align_loops_max_skip;
506 }
507
508 int
509 default_label_align_max_skip (rtx_insn *insn ATTRIBUTE_UNUSED)
510 {
511 return align_labels_max_skip;
512 }
513
514 int
515 default_jump_align_max_skip (rtx_insn *insn ATTRIBUTE_UNUSED)
516 {
517 return align_jumps_max_skip;
518 }
519
520 #ifndef ADDR_VEC_ALIGN
521 static int
522 final_addr_vec_align (rtx_insn *addr_vec)
523 {
524 int align = GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec)));
525
526 if (align > BIGGEST_ALIGNMENT / BITS_PER_UNIT)
527 align = BIGGEST_ALIGNMENT / BITS_PER_UNIT;
528 return exact_log2 (align);
529
530 }
531
532 #define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC)
533 #endif
534
535 #ifndef INSN_LENGTH_ALIGNMENT
536 #define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log
537 #endif
538
539 #define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)])
540
541 static int min_labelno, max_labelno;
542
543 #define LABEL_TO_ALIGNMENT(LABEL) \
544 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment)
545
546 #define LABEL_TO_MAX_SKIP(LABEL) \
547 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip)
548
549 /* For the benefit of port specific code do this also as a function. */
550
551 int
552 label_to_alignment (rtx label)
553 {
554 if (CODE_LABEL_NUMBER (label) <= max_labelno)
555 return LABEL_TO_ALIGNMENT (label);
556 return 0;
557 }
558
559 int
560 label_to_max_skip (rtx label)
561 {
562 if (CODE_LABEL_NUMBER (label) <= max_labelno)
563 return LABEL_TO_MAX_SKIP (label);
564 return 0;
565 }
566
567 /* The differences in addresses
568 between a branch and its target might grow or shrink depending on
569 the alignment the start insn of the range (the branch for a forward
570 branch or the label for a backward branch) starts out on; if these
571 differences are used naively, they can even oscillate infinitely.
572 We therefore want to compute a 'worst case' address difference that
573 is independent of the alignment the start insn of the range end
574 up on, and that is at least as large as the actual difference.
575 The function align_fuzz calculates the amount we have to add to the
576 naively computed difference, by traversing the part of the alignment
577 chain of the start insn of the range that is in front of the end insn
578 of the range, and considering for each alignment the maximum amount
579 that it might contribute to a size increase.
580
581 For casesi tables, we also want to know worst case minimum amounts of
582 address difference, in case a machine description wants to introduce
583 some common offset that is added to all offsets in a table.
584 For this purpose, align_fuzz with a growth argument of 0 computes the
585 appropriate adjustment. */
586
587 /* Compute the maximum delta by which the difference of the addresses of
588 START and END might grow / shrink due to a different address for start
589 which changes the size of alignment insns between START and END.
590 KNOWN_ALIGN_LOG is the alignment known for START.
591 GROWTH should be ~0 if the objective is to compute potential code size
592 increase, and 0 if the objective is to compute potential shrink.
593 The return value is undefined for any other value of GROWTH. */
594
595 static int
596 align_fuzz (rtx start, rtx end, int known_align_log, unsigned int growth)
597 {
598 int uid = INSN_UID (start);
599 rtx align_label;
600 int known_align = 1 << known_align_log;
601 int end_shuid = INSN_SHUID (end);
602 int fuzz = 0;
603
604 for (align_label = uid_align[uid]; align_label; align_label = uid_align[uid])
605 {
606 int align_addr, new_align;
607
608 uid = INSN_UID (align_label);
609 align_addr = INSN_ADDRESSES (uid) - insn_lengths[uid];
610 if (uid_shuid[uid] > end_shuid)
611 break;
612 known_align_log = LABEL_TO_ALIGNMENT (align_label);
613 new_align = 1 << known_align_log;
614 if (new_align < known_align)
615 continue;
616 fuzz += (-align_addr ^ growth) & (new_align - known_align);
617 known_align = new_align;
618 }
619 return fuzz;
620 }
621
622 /* Compute a worst-case reference address of a branch so that it
623 can be safely used in the presence of aligned labels. Since the
624 size of the branch itself is unknown, the size of the branch is
625 not included in the range. I.e. for a forward branch, the reference
626 address is the end address of the branch as known from the previous
627 branch shortening pass, minus a value to account for possible size
628 increase due to alignment. For a backward branch, it is the start
629 address of the branch as known from the current pass, plus a value
630 to account for possible size increase due to alignment.
631 NB.: Therefore, the maximum offset allowed for backward branches needs
632 to exclude the branch size. */
633
634 int
635 insn_current_reference_address (rtx_insn *branch)
636 {
637 rtx dest;
638 int seq_uid;
639
640 if (! INSN_ADDRESSES_SET_P ())
641 return 0;
642
643 rtx_insn *seq = NEXT_INSN (PREV_INSN (branch));
644 seq_uid = INSN_UID (seq);
645 if (!JUMP_P (branch))
646 /* This can happen for example on the PA; the objective is to know the
647 offset to address something in front of the start of the function.
648 Thus, we can treat it like a backward branch.
649 We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than
650 any alignment we'd encounter, so we skip the call to align_fuzz. */
651 return insn_current_address;
652 dest = JUMP_LABEL (branch);
653
654 /* BRANCH has no proper alignment chain set, so use SEQ.
655 BRANCH also has no INSN_SHUID. */
656 if (INSN_SHUID (seq) < INSN_SHUID (dest))
657 {
658 /* Forward branch. */
659 return (insn_last_address + insn_lengths[seq_uid]
660 - align_fuzz (seq, dest, length_unit_log, ~0));
661 }
662 else
663 {
664 /* Backward branch. */
665 return (insn_current_address
666 + align_fuzz (dest, seq, length_unit_log, ~0));
667 }
668 }
669 \f
670 /* Compute branch alignments based on frequency information in the
671 CFG. */
672
673 unsigned int
674 compute_alignments (void)
675 {
676 int log, max_skip, max_log;
677 basic_block bb;
678 int freq_max = 0;
679 int freq_threshold = 0;
680
681 if (label_align)
682 {
683 free (label_align);
684 label_align = 0;
685 }
686
687 max_labelno = max_label_num ();
688 min_labelno = get_first_label_num ();
689 label_align = XCNEWVEC (struct label_alignment, max_labelno - min_labelno + 1);
690
691 /* If not optimizing or optimizing for size, don't assign any alignments. */
692 if (! optimize || optimize_function_for_size_p (cfun))
693 return 0;
694
695 if (dump_file)
696 {
697 dump_reg_info (dump_file);
698 dump_flow_info (dump_file, TDF_DETAILS);
699 flow_loops_dump (dump_file, NULL, 1);
700 }
701 loop_optimizer_init (AVOID_CFG_MODIFICATIONS);
702 FOR_EACH_BB_FN (bb, cfun)
703 if (bb->frequency > freq_max)
704 freq_max = bb->frequency;
705 freq_threshold = freq_max / PARAM_VALUE (PARAM_ALIGN_THRESHOLD);
706
707 if (dump_file)
708 fprintf (dump_file, "freq_max: %i\n",freq_max);
709 FOR_EACH_BB_FN (bb, cfun)
710 {
711 rtx_insn *label = BB_HEAD (bb);
712 int fallthru_frequency = 0, branch_frequency = 0, has_fallthru = 0;
713 edge e;
714 edge_iterator ei;
715
716 if (!LABEL_P (label)
717 || optimize_bb_for_size_p (bb))
718 {
719 if (dump_file)
720 fprintf (dump_file,
721 "BB %4i freq %4i loop %2i loop_depth %2i skipped.\n",
722 bb->index, bb->frequency, bb->loop_father->num,
723 bb_loop_depth (bb));
724 continue;
725 }
726 max_log = LABEL_ALIGN (label);
727 max_skip = targetm.asm_out.label_align_max_skip (label);
728
729 FOR_EACH_EDGE (e, ei, bb->preds)
730 {
731 if (e->flags & EDGE_FALLTHRU)
732 has_fallthru = 1, fallthru_frequency += EDGE_FREQUENCY (e);
733 else
734 branch_frequency += EDGE_FREQUENCY (e);
735 }
736 if (dump_file)
737 {
738 fprintf (dump_file, "BB %4i freq %4i loop %2i loop_depth"
739 " %2i fall %4i branch %4i",
740 bb->index, bb->frequency, bb->loop_father->num,
741 bb_loop_depth (bb),
742 fallthru_frequency, branch_frequency);
743 if (!bb->loop_father->inner && bb->loop_father->num)
744 fprintf (dump_file, " inner_loop");
745 if (bb->loop_father->header == bb)
746 fprintf (dump_file, " loop_header");
747 fprintf (dump_file, "\n");
748 }
749
750 /* There are two purposes to align block with no fallthru incoming edge:
751 1) to avoid fetch stalls when branch destination is near cache boundary
752 2) to improve cache efficiency in case the previous block is not executed
753 (so it does not need to be in the cache).
754
755 We to catch first case, we align frequently executed blocks.
756 To catch the second, we align blocks that are executed more frequently
757 than the predecessor and the predecessor is likely to not be executed
758 when function is called. */
759
760 if (!has_fallthru
761 && (branch_frequency > freq_threshold
762 || (bb->frequency > bb->prev_bb->frequency * 10
763 && (bb->prev_bb->frequency
764 <= ENTRY_BLOCK_PTR_FOR_FN (cfun)->frequency / 2))))
765 {
766 log = JUMP_ALIGN (label);
767 if (dump_file)
768 fprintf (dump_file, " jump alignment added.\n");
769 if (max_log < log)
770 {
771 max_log = log;
772 max_skip = targetm.asm_out.jump_align_max_skip (label);
773 }
774 }
775 /* In case block is frequent and reached mostly by non-fallthru edge,
776 align it. It is most likely a first block of loop. */
777 if (has_fallthru
778 && !(single_succ_p (bb)
779 && single_succ (bb) == EXIT_BLOCK_PTR_FOR_FN (cfun))
780 && optimize_bb_for_speed_p (bb)
781 && branch_frequency + fallthru_frequency > freq_threshold
782 && (branch_frequency
783 > fallthru_frequency * PARAM_VALUE (PARAM_ALIGN_LOOP_ITERATIONS)))
784 {
785 log = LOOP_ALIGN (label);
786 if (dump_file)
787 fprintf (dump_file, " internal loop alignment added.\n");
788 if (max_log < log)
789 {
790 max_log = log;
791 max_skip = targetm.asm_out.loop_align_max_skip (label);
792 }
793 }
794 LABEL_TO_ALIGNMENT (label) = max_log;
795 LABEL_TO_MAX_SKIP (label) = max_skip;
796 }
797
798 loop_optimizer_finalize ();
799 free_dominance_info (CDI_DOMINATORS);
800 return 0;
801 }
802
803 /* Grow the LABEL_ALIGN array after new labels are created. */
804
805 static void
806 grow_label_align (void)
807 {
808 int old = max_labelno;
809 int n_labels;
810 int n_old_labels;
811
812 max_labelno = max_label_num ();
813
814 n_labels = max_labelno - min_labelno + 1;
815 n_old_labels = old - min_labelno + 1;
816
817 label_align = XRESIZEVEC (struct label_alignment, label_align, n_labels);
818
819 /* Range of labels grows monotonically in the function. Failing here
820 means that the initialization of array got lost. */
821 gcc_assert (n_old_labels <= n_labels);
822
823 memset (label_align + n_old_labels, 0,
824 (n_labels - n_old_labels) * sizeof (struct label_alignment));
825 }
826
827 /* Update the already computed alignment information. LABEL_PAIRS is a vector
828 made up of pairs of labels for which the alignment information of the first
829 element will be copied from that of the second element. */
830
831 void
832 update_alignments (vec<rtx> &label_pairs)
833 {
834 unsigned int i = 0;
835 rtx iter, label = NULL_RTX;
836
837 if (max_labelno != max_label_num ())
838 grow_label_align ();
839
840 FOR_EACH_VEC_ELT (label_pairs, i, iter)
841 if (i & 1)
842 {
843 LABEL_TO_ALIGNMENT (label) = LABEL_TO_ALIGNMENT (iter);
844 LABEL_TO_MAX_SKIP (label) = LABEL_TO_MAX_SKIP (iter);
845 }
846 else
847 label = iter;
848 }
849
850 namespace {
851
852 const pass_data pass_data_compute_alignments =
853 {
854 RTL_PASS, /* type */
855 "alignments", /* name */
856 OPTGROUP_NONE, /* optinfo_flags */
857 TV_NONE, /* tv_id */
858 0, /* properties_required */
859 0, /* properties_provided */
860 0, /* properties_destroyed */
861 0, /* todo_flags_start */
862 0, /* todo_flags_finish */
863 };
864
865 class pass_compute_alignments : public rtl_opt_pass
866 {
867 public:
868 pass_compute_alignments (gcc::context *ctxt)
869 : rtl_opt_pass (pass_data_compute_alignments, ctxt)
870 {}
871
872 /* opt_pass methods: */
873 virtual unsigned int execute (function *) { return compute_alignments (); }
874
875 }; // class pass_compute_alignments
876
877 } // anon namespace
878
879 rtl_opt_pass *
880 make_pass_compute_alignments (gcc::context *ctxt)
881 {
882 return new pass_compute_alignments (ctxt);
883 }
884
885 \f
886 /* Make a pass over all insns and compute their actual lengths by shortening
887 any branches of variable length if possible. */
888
889 /* shorten_branches might be called multiple times: for example, the SH
890 port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG.
891 In order to do this, it needs proper length information, which it obtains
892 by calling shorten_branches. This cannot be collapsed with
893 shorten_branches itself into a single pass unless we also want to integrate
894 reorg.c, since the branch splitting exposes new instructions with delay
895 slots. */
896
897 void
898 shorten_branches (rtx_insn *first)
899 {
900 rtx_insn *insn;
901 int max_uid;
902 int i;
903 int max_log;
904 int max_skip;
905 #define MAX_CODE_ALIGN 16
906 rtx_insn *seq;
907 int something_changed = 1;
908 char *varying_length;
909 rtx body;
910 int uid;
911 rtx align_tab[MAX_CODE_ALIGN];
912
913 /* Compute maximum UID and allocate label_align / uid_shuid. */
914 max_uid = get_max_uid ();
915
916 /* Free uid_shuid before reallocating it. */
917 free (uid_shuid);
918
919 uid_shuid = XNEWVEC (int, max_uid);
920
921 if (max_labelno != max_label_num ())
922 grow_label_align ();
923
924 /* Initialize label_align and set up uid_shuid to be strictly
925 monotonically rising with insn order. */
926 /* We use max_log here to keep track of the maximum alignment we want to
927 impose on the next CODE_LABEL (or the current one if we are processing
928 the CODE_LABEL itself). */
929
930 max_log = 0;
931 max_skip = 0;
932
933 for (insn = get_insns (), i = 1; insn; insn = NEXT_INSN (insn))
934 {
935 int log;
936
937 INSN_SHUID (insn) = i++;
938 if (INSN_P (insn))
939 continue;
940
941 if (LABEL_P (insn))
942 {
943 rtx_insn *next;
944 bool next_is_jumptable;
945
946 /* Merge in alignments computed by compute_alignments. */
947 log = LABEL_TO_ALIGNMENT (insn);
948 if (max_log < log)
949 {
950 max_log = log;
951 max_skip = LABEL_TO_MAX_SKIP (insn);
952 }
953
954 next = next_nonnote_insn (insn);
955 next_is_jumptable = next && JUMP_TABLE_DATA_P (next);
956 if (!next_is_jumptable)
957 {
958 log = LABEL_ALIGN (insn);
959 if (max_log < log)
960 {
961 max_log = log;
962 max_skip = targetm.asm_out.label_align_max_skip (insn);
963 }
964 }
965 /* ADDR_VECs only take room if read-only data goes into the text
966 section. */
967 if ((JUMP_TABLES_IN_TEXT_SECTION
968 || readonly_data_section == text_section)
969 && next_is_jumptable)
970 {
971 log = ADDR_VEC_ALIGN (next);
972 if (max_log < log)
973 {
974 max_log = log;
975 max_skip = targetm.asm_out.label_align_max_skip (insn);
976 }
977 }
978 LABEL_TO_ALIGNMENT (insn) = max_log;
979 LABEL_TO_MAX_SKIP (insn) = max_skip;
980 max_log = 0;
981 max_skip = 0;
982 }
983 else if (BARRIER_P (insn))
984 {
985 rtx_insn *label;
986
987 for (label = insn; label && ! INSN_P (label);
988 label = NEXT_INSN (label))
989 if (LABEL_P (label))
990 {
991 log = LABEL_ALIGN_AFTER_BARRIER (insn);
992 if (max_log < log)
993 {
994 max_log = log;
995 max_skip = targetm.asm_out.label_align_after_barrier_max_skip (label);
996 }
997 break;
998 }
999 }
1000 }
1001 if (!HAVE_ATTR_length)
1002 return;
1003
1004 /* Allocate the rest of the arrays. */
1005 insn_lengths = XNEWVEC (int, max_uid);
1006 insn_lengths_max_uid = max_uid;
1007 /* Syntax errors can lead to labels being outside of the main insn stream.
1008 Initialize insn_addresses, so that we get reproducible results. */
1009 INSN_ADDRESSES_ALLOC (max_uid);
1010
1011 varying_length = XCNEWVEC (char, max_uid);
1012
1013 /* Initialize uid_align. We scan instructions
1014 from end to start, and keep in align_tab[n] the last seen insn
1015 that does an alignment of at least n+1, i.e. the successor
1016 in the alignment chain for an insn that does / has a known
1017 alignment of n. */
1018 uid_align = XCNEWVEC (rtx, max_uid);
1019
1020 for (i = MAX_CODE_ALIGN; --i >= 0;)
1021 align_tab[i] = NULL_RTX;
1022 seq = get_last_insn ();
1023 for (; seq; seq = PREV_INSN (seq))
1024 {
1025 int uid = INSN_UID (seq);
1026 int log;
1027 log = (LABEL_P (seq) ? LABEL_TO_ALIGNMENT (seq) : 0);
1028 uid_align[uid] = align_tab[0];
1029 if (log)
1030 {
1031 /* Found an alignment label. */
1032 uid_align[uid] = align_tab[log];
1033 for (i = log - 1; i >= 0; i--)
1034 align_tab[i] = seq;
1035 }
1036 }
1037
1038 /* When optimizing, we start assuming minimum length, and keep increasing
1039 lengths as we find the need for this, till nothing changes.
1040 When not optimizing, we start assuming maximum lengths, and
1041 do a single pass to update the lengths. */
1042 bool increasing = optimize != 0;
1043
1044 #ifdef CASE_VECTOR_SHORTEN_MODE
1045 if (optimize)
1046 {
1047 /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum
1048 label fields. */
1049
1050 int min_shuid = INSN_SHUID (get_insns ()) - 1;
1051 int max_shuid = INSN_SHUID (get_last_insn ()) + 1;
1052 int rel;
1053
1054 for (insn = first; insn != 0; insn = NEXT_INSN (insn))
1055 {
1056 rtx min_lab = NULL_RTX, max_lab = NULL_RTX, pat;
1057 int len, i, min, max, insn_shuid;
1058 int min_align;
1059 addr_diff_vec_flags flags;
1060
1061 if (! JUMP_TABLE_DATA_P (insn)
1062 || GET_CODE (PATTERN (insn)) != ADDR_DIFF_VEC)
1063 continue;
1064 pat = PATTERN (insn);
1065 len = XVECLEN (pat, 1);
1066 gcc_assert (len > 0);
1067 min_align = MAX_CODE_ALIGN;
1068 for (min = max_shuid, max = min_shuid, i = len - 1; i >= 0; i--)
1069 {
1070 rtx lab = XEXP (XVECEXP (pat, 1, i), 0);
1071 int shuid = INSN_SHUID (lab);
1072 if (shuid < min)
1073 {
1074 min = shuid;
1075 min_lab = lab;
1076 }
1077 if (shuid > max)
1078 {
1079 max = shuid;
1080 max_lab = lab;
1081 }
1082 if (min_align > LABEL_TO_ALIGNMENT (lab))
1083 min_align = LABEL_TO_ALIGNMENT (lab);
1084 }
1085 XEXP (pat, 2) = gen_rtx_LABEL_REF (Pmode, min_lab);
1086 XEXP (pat, 3) = gen_rtx_LABEL_REF (Pmode, max_lab);
1087 insn_shuid = INSN_SHUID (insn);
1088 rel = INSN_SHUID (XEXP (XEXP (pat, 0), 0));
1089 memset (&flags, 0, sizeof (flags));
1090 flags.min_align = min_align;
1091 flags.base_after_vec = rel > insn_shuid;
1092 flags.min_after_vec = min > insn_shuid;
1093 flags.max_after_vec = max > insn_shuid;
1094 flags.min_after_base = min > rel;
1095 flags.max_after_base = max > rel;
1096 ADDR_DIFF_VEC_FLAGS (pat) = flags;
1097
1098 if (increasing)
1099 PUT_MODE (pat, CASE_VECTOR_SHORTEN_MODE (0, 0, pat));
1100 }
1101 }
1102 #endif /* CASE_VECTOR_SHORTEN_MODE */
1103
1104 /* Compute initial lengths, addresses, and varying flags for each insn. */
1105 int (*length_fun) (rtx_insn *) = increasing ? insn_min_length : insn_default_length;
1106
1107 for (insn_current_address = 0, insn = first;
1108 insn != 0;
1109 insn_current_address += insn_lengths[uid], insn = NEXT_INSN (insn))
1110 {
1111 uid = INSN_UID (insn);
1112
1113 insn_lengths[uid] = 0;
1114
1115 if (LABEL_P (insn))
1116 {
1117 int log = LABEL_TO_ALIGNMENT (insn);
1118 if (log)
1119 {
1120 int align = 1 << log;
1121 int new_address = (insn_current_address + align - 1) & -align;
1122 insn_lengths[uid] = new_address - insn_current_address;
1123 }
1124 }
1125
1126 INSN_ADDRESSES (uid) = insn_current_address + insn_lengths[uid];
1127
1128 if (NOTE_P (insn) || BARRIER_P (insn)
1129 || LABEL_P (insn) || DEBUG_INSN_P (insn))
1130 continue;
1131 if (insn->deleted ())
1132 continue;
1133
1134 body = PATTERN (insn);
1135 if (JUMP_TABLE_DATA_P (insn))
1136 {
1137 /* This only takes room if read-only data goes into the text
1138 section. */
1139 if (JUMP_TABLES_IN_TEXT_SECTION
1140 || readonly_data_section == text_section)
1141 insn_lengths[uid] = (XVECLEN (body,
1142 GET_CODE (body) == ADDR_DIFF_VEC)
1143 * GET_MODE_SIZE (GET_MODE (body)));
1144 /* Alignment is handled by ADDR_VEC_ALIGN. */
1145 }
1146 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
1147 insn_lengths[uid] = asm_insn_count (body) * insn_default_length (insn);
1148 else if (rtx_sequence *body_seq = dyn_cast <rtx_sequence *> (body))
1149 {
1150 int i;
1151 int const_delay_slots;
1152 if (DELAY_SLOTS)
1153 const_delay_slots = const_num_delay_slots (body_seq->insn (0));
1154 else
1155 const_delay_slots = 0;
1156
1157 int (*inner_length_fun) (rtx_insn *)
1158 = const_delay_slots ? length_fun : insn_default_length;
1159 /* Inside a delay slot sequence, we do not do any branch shortening
1160 if the shortening could change the number of delay slots
1161 of the branch. */
1162 for (i = 0; i < body_seq->len (); i++)
1163 {
1164 rtx_insn *inner_insn = body_seq->insn (i);
1165 int inner_uid = INSN_UID (inner_insn);
1166 int inner_length;
1167
1168 if (GET_CODE (PATTERN (inner_insn)) == ASM_INPUT
1169 || asm_noperands (PATTERN (inner_insn)) >= 0)
1170 inner_length = (asm_insn_count (PATTERN (inner_insn))
1171 * insn_default_length (inner_insn));
1172 else
1173 inner_length = inner_length_fun (inner_insn);
1174
1175 insn_lengths[inner_uid] = inner_length;
1176 if (const_delay_slots)
1177 {
1178 if ((varying_length[inner_uid]
1179 = insn_variable_length_p (inner_insn)) != 0)
1180 varying_length[uid] = 1;
1181 INSN_ADDRESSES (inner_uid) = (insn_current_address
1182 + insn_lengths[uid]);
1183 }
1184 else
1185 varying_length[inner_uid] = 0;
1186 insn_lengths[uid] += inner_length;
1187 }
1188 }
1189 else if (GET_CODE (body) != USE && GET_CODE (body) != CLOBBER)
1190 {
1191 insn_lengths[uid] = length_fun (insn);
1192 varying_length[uid] = insn_variable_length_p (insn);
1193 }
1194
1195 /* If needed, do any adjustment. */
1196 #ifdef ADJUST_INSN_LENGTH
1197 ADJUST_INSN_LENGTH (insn, insn_lengths[uid]);
1198 if (insn_lengths[uid] < 0)
1199 fatal_insn ("negative insn length", insn);
1200 #endif
1201 }
1202
1203 /* Now loop over all the insns finding varying length insns. For each,
1204 get the current insn length. If it has changed, reflect the change.
1205 When nothing changes for a full pass, we are done. */
1206
1207 while (something_changed)
1208 {
1209 something_changed = 0;
1210 insn_current_align = MAX_CODE_ALIGN - 1;
1211 for (insn_current_address = 0, insn = first;
1212 insn != 0;
1213 insn = NEXT_INSN (insn))
1214 {
1215 int new_length;
1216 #ifdef ADJUST_INSN_LENGTH
1217 int tmp_length;
1218 #endif
1219 int length_align;
1220
1221 uid = INSN_UID (insn);
1222
1223 if (LABEL_P (insn))
1224 {
1225 int log = LABEL_TO_ALIGNMENT (insn);
1226
1227 #ifdef CASE_VECTOR_SHORTEN_MODE
1228 /* If the mode of a following jump table was changed, we
1229 may need to update the alignment of this label. */
1230 rtx_insn *next;
1231 bool next_is_jumptable;
1232
1233 next = next_nonnote_insn (insn);
1234 next_is_jumptable = next && JUMP_TABLE_DATA_P (next);
1235 if ((JUMP_TABLES_IN_TEXT_SECTION
1236 || readonly_data_section == text_section)
1237 && next_is_jumptable)
1238 {
1239 int newlog = ADDR_VEC_ALIGN (next);
1240 if (newlog != log)
1241 {
1242 log = newlog;
1243 LABEL_TO_ALIGNMENT (insn) = log;
1244 something_changed = 1;
1245 }
1246 }
1247 #endif
1248
1249 if (log > insn_current_align)
1250 {
1251 int align = 1 << log;
1252 int new_address= (insn_current_address + align - 1) & -align;
1253 insn_lengths[uid] = new_address - insn_current_address;
1254 insn_current_align = log;
1255 insn_current_address = new_address;
1256 }
1257 else
1258 insn_lengths[uid] = 0;
1259 INSN_ADDRESSES (uid) = insn_current_address;
1260 continue;
1261 }
1262
1263 length_align = INSN_LENGTH_ALIGNMENT (insn);
1264 if (length_align < insn_current_align)
1265 insn_current_align = length_align;
1266
1267 insn_last_address = INSN_ADDRESSES (uid);
1268 INSN_ADDRESSES (uid) = insn_current_address;
1269
1270 #ifdef CASE_VECTOR_SHORTEN_MODE
1271 if (optimize
1272 && JUMP_TABLE_DATA_P (insn)
1273 && GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
1274 {
1275 rtx body = PATTERN (insn);
1276 int old_length = insn_lengths[uid];
1277 rtx_insn *rel_lab =
1278 safe_as_a <rtx_insn *> (XEXP (XEXP (body, 0), 0));
1279 rtx min_lab = XEXP (XEXP (body, 2), 0);
1280 rtx max_lab = XEXP (XEXP (body, 3), 0);
1281 int rel_addr = INSN_ADDRESSES (INSN_UID (rel_lab));
1282 int min_addr = INSN_ADDRESSES (INSN_UID (min_lab));
1283 int max_addr = INSN_ADDRESSES (INSN_UID (max_lab));
1284 rtx_insn *prev;
1285 int rel_align = 0;
1286 addr_diff_vec_flags flags;
1287 machine_mode vec_mode;
1288
1289 /* Avoid automatic aggregate initialization. */
1290 flags = ADDR_DIFF_VEC_FLAGS (body);
1291
1292 /* Try to find a known alignment for rel_lab. */
1293 for (prev = rel_lab;
1294 prev
1295 && ! insn_lengths[INSN_UID (prev)]
1296 && ! (varying_length[INSN_UID (prev)] & 1);
1297 prev = PREV_INSN (prev))
1298 if (varying_length[INSN_UID (prev)] & 2)
1299 {
1300 rel_align = LABEL_TO_ALIGNMENT (prev);
1301 break;
1302 }
1303
1304 /* See the comment on addr_diff_vec_flags in rtl.h for the
1305 meaning of the flags values. base: REL_LAB vec: INSN */
1306 /* Anything after INSN has still addresses from the last
1307 pass; adjust these so that they reflect our current
1308 estimate for this pass. */
1309 if (flags.base_after_vec)
1310 rel_addr += insn_current_address - insn_last_address;
1311 if (flags.min_after_vec)
1312 min_addr += insn_current_address - insn_last_address;
1313 if (flags.max_after_vec)
1314 max_addr += insn_current_address - insn_last_address;
1315 /* We want to know the worst case, i.e. lowest possible value
1316 for the offset of MIN_LAB. If MIN_LAB is after REL_LAB,
1317 its offset is positive, and we have to be wary of code shrink;
1318 otherwise, it is negative, and we have to be vary of code
1319 size increase. */
1320 if (flags.min_after_base)
1321 {
1322 /* If INSN is between REL_LAB and MIN_LAB, the size
1323 changes we are about to make can change the alignment
1324 within the observed offset, therefore we have to break
1325 it up into two parts that are independent. */
1326 if (! flags.base_after_vec && flags.min_after_vec)
1327 {
1328 min_addr -= align_fuzz (rel_lab, insn, rel_align, 0);
1329 min_addr -= align_fuzz (insn, min_lab, 0, 0);
1330 }
1331 else
1332 min_addr -= align_fuzz (rel_lab, min_lab, rel_align, 0);
1333 }
1334 else
1335 {
1336 if (flags.base_after_vec && ! flags.min_after_vec)
1337 {
1338 min_addr -= align_fuzz (min_lab, insn, 0, ~0);
1339 min_addr -= align_fuzz (insn, rel_lab, 0, ~0);
1340 }
1341 else
1342 min_addr -= align_fuzz (min_lab, rel_lab, 0, ~0);
1343 }
1344 /* Likewise, determine the highest lowest possible value
1345 for the offset of MAX_LAB. */
1346 if (flags.max_after_base)
1347 {
1348 if (! flags.base_after_vec && flags.max_after_vec)
1349 {
1350 max_addr += align_fuzz (rel_lab, insn, rel_align, ~0);
1351 max_addr += align_fuzz (insn, max_lab, 0, ~0);
1352 }
1353 else
1354 max_addr += align_fuzz (rel_lab, max_lab, rel_align, ~0);
1355 }
1356 else
1357 {
1358 if (flags.base_after_vec && ! flags.max_after_vec)
1359 {
1360 max_addr += align_fuzz (max_lab, insn, 0, 0);
1361 max_addr += align_fuzz (insn, rel_lab, 0, 0);
1362 }
1363 else
1364 max_addr += align_fuzz (max_lab, rel_lab, 0, 0);
1365 }
1366 vec_mode = CASE_VECTOR_SHORTEN_MODE (min_addr - rel_addr,
1367 max_addr - rel_addr, body);
1368 if (!increasing
1369 || (GET_MODE_SIZE (vec_mode)
1370 >= GET_MODE_SIZE (GET_MODE (body))))
1371 PUT_MODE (body, vec_mode);
1372 if (JUMP_TABLES_IN_TEXT_SECTION
1373 || readonly_data_section == text_section)
1374 {
1375 insn_lengths[uid]
1376 = (XVECLEN (body, 1) * GET_MODE_SIZE (GET_MODE (body)));
1377 insn_current_address += insn_lengths[uid];
1378 if (insn_lengths[uid] != old_length)
1379 something_changed = 1;
1380 }
1381
1382 continue;
1383 }
1384 #endif /* CASE_VECTOR_SHORTEN_MODE */
1385
1386 if (! (varying_length[uid]))
1387 {
1388 if (NONJUMP_INSN_P (insn)
1389 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1390 {
1391 int i;
1392
1393 body = PATTERN (insn);
1394 for (i = 0; i < XVECLEN (body, 0); i++)
1395 {
1396 rtx inner_insn = XVECEXP (body, 0, i);
1397 int inner_uid = INSN_UID (inner_insn);
1398
1399 INSN_ADDRESSES (inner_uid) = insn_current_address;
1400
1401 insn_current_address += insn_lengths[inner_uid];
1402 }
1403 }
1404 else
1405 insn_current_address += insn_lengths[uid];
1406
1407 continue;
1408 }
1409
1410 if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
1411 {
1412 rtx_sequence *seqn = as_a <rtx_sequence *> (PATTERN (insn));
1413 int i;
1414
1415 body = PATTERN (insn);
1416 new_length = 0;
1417 for (i = 0; i < seqn->len (); i++)
1418 {
1419 rtx_insn *inner_insn = seqn->insn (i);
1420 int inner_uid = INSN_UID (inner_insn);
1421 int inner_length;
1422
1423 INSN_ADDRESSES (inner_uid) = insn_current_address;
1424
1425 /* insn_current_length returns 0 for insns with a
1426 non-varying length. */
1427 if (! varying_length[inner_uid])
1428 inner_length = insn_lengths[inner_uid];
1429 else
1430 inner_length = insn_current_length (inner_insn);
1431
1432 if (inner_length != insn_lengths[inner_uid])
1433 {
1434 if (!increasing || inner_length > insn_lengths[inner_uid])
1435 {
1436 insn_lengths[inner_uid] = inner_length;
1437 something_changed = 1;
1438 }
1439 else
1440 inner_length = insn_lengths[inner_uid];
1441 }
1442 insn_current_address += inner_length;
1443 new_length += inner_length;
1444 }
1445 }
1446 else
1447 {
1448 new_length = insn_current_length (insn);
1449 insn_current_address += new_length;
1450 }
1451
1452 #ifdef ADJUST_INSN_LENGTH
1453 /* If needed, do any adjustment. */
1454 tmp_length = new_length;
1455 ADJUST_INSN_LENGTH (insn, new_length);
1456 insn_current_address += (new_length - tmp_length);
1457 #endif
1458
1459 if (new_length != insn_lengths[uid]
1460 && (!increasing || new_length > insn_lengths[uid]))
1461 {
1462 insn_lengths[uid] = new_length;
1463 something_changed = 1;
1464 }
1465 else
1466 insn_current_address += insn_lengths[uid] - new_length;
1467 }
1468 /* For a non-optimizing compile, do only a single pass. */
1469 if (!increasing)
1470 break;
1471 }
1472 crtl->max_insn_address = insn_current_address;
1473 free (varying_length);
1474 }
1475
1476 /* Given the body of an INSN known to be generated by an ASM statement, return
1477 the number of machine instructions likely to be generated for this insn.
1478 This is used to compute its length. */
1479
1480 static int
1481 asm_insn_count (rtx body)
1482 {
1483 const char *templ;
1484
1485 if (GET_CODE (body) == ASM_INPUT)
1486 templ = XSTR (body, 0);
1487 else
1488 templ = decode_asm_operands (body, NULL, NULL, NULL, NULL, NULL);
1489
1490 return asm_str_count (templ);
1491 }
1492
1493 /* Return the number of machine instructions likely to be generated for the
1494 inline-asm template. */
1495 int
1496 asm_str_count (const char *templ)
1497 {
1498 int count = 1;
1499
1500 if (!*templ)
1501 return 0;
1502
1503 for (; *templ; templ++)
1504 if (IS_ASM_LOGICAL_LINE_SEPARATOR (*templ, templ)
1505 || *templ == '\n')
1506 count++;
1507
1508 return count;
1509 }
1510 \f
1511 /* ??? This is probably the wrong place for these. */
1512 /* Structure recording the mapping from source file and directory
1513 names at compile time to those to be embedded in debug
1514 information. */
1515 struct debug_prefix_map
1516 {
1517 const char *old_prefix;
1518 const char *new_prefix;
1519 size_t old_len;
1520 size_t new_len;
1521 struct debug_prefix_map *next;
1522 };
1523
1524 /* Linked list of such structures. */
1525 static debug_prefix_map *debug_prefix_maps;
1526
1527
1528 /* Record a debug file prefix mapping. ARG is the argument to
1529 -fdebug-prefix-map and must be of the form OLD=NEW. */
1530
1531 void
1532 add_debug_prefix_map (const char *arg)
1533 {
1534 debug_prefix_map *map;
1535 const char *p;
1536
1537 p = strchr (arg, '=');
1538 if (!p)
1539 {
1540 error ("invalid argument %qs to -fdebug-prefix-map", arg);
1541 return;
1542 }
1543 map = XNEW (debug_prefix_map);
1544 map->old_prefix = xstrndup (arg, p - arg);
1545 map->old_len = p - arg;
1546 p++;
1547 map->new_prefix = xstrdup (p);
1548 map->new_len = strlen (p);
1549 map->next = debug_prefix_maps;
1550 debug_prefix_maps = map;
1551 }
1552
1553 /* Perform user-specified mapping of debug filename prefixes. Return
1554 the new name corresponding to FILENAME. */
1555
1556 const char *
1557 remap_debug_filename (const char *filename)
1558 {
1559 debug_prefix_map *map;
1560 char *s;
1561 const char *name;
1562 size_t name_len;
1563
1564 for (map = debug_prefix_maps; map; map = map->next)
1565 if (filename_ncmp (filename, map->old_prefix, map->old_len) == 0)
1566 break;
1567 if (!map)
1568 return filename;
1569 name = filename + map->old_len;
1570 name_len = strlen (name) + 1;
1571 s = (char *) alloca (name_len + map->new_len);
1572 memcpy (s, map->new_prefix, map->new_len);
1573 memcpy (s + map->new_len, name, name_len);
1574 return ggc_strdup (s);
1575 }
1576 \f
1577 /* Return true if DWARF2 debug info can be emitted for DECL. */
1578
1579 static bool
1580 dwarf2_debug_info_emitted_p (tree decl)
1581 {
1582 if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG)
1583 return false;
1584
1585 if (DECL_IGNORED_P (decl))
1586 return false;
1587
1588 return true;
1589 }
1590
1591 /* Return scope resulting from combination of S1 and S2. */
1592 static tree
1593 choose_inner_scope (tree s1, tree s2)
1594 {
1595 if (!s1)
1596 return s2;
1597 if (!s2)
1598 return s1;
1599 if (BLOCK_NUMBER (s1) > BLOCK_NUMBER (s2))
1600 return s1;
1601 return s2;
1602 }
1603
1604 /* Emit lexical block notes needed to change scope from S1 to S2. */
1605
1606 static void
1607 change_scope (rtx_insn *orig_insn, tree s1, tree s2)
1608 {
1609 rtx_insn *insn = orig_insn;
1610 tree com = NULL_TREE;
1611 tree ts1 = s1, ts2 = s2;
1612 tree s;
1613
1614 while (ts1 != ts2)
1615 {
1616 gcc_assert (ts1 && ts2);
1617 if (BLOCK_NUMBER (ts1) > BLOCK_NUMBER (ts2))
1618 ts1 = BLOCK_SUPERCONTEXT (ts1);
1619 else if (BLOCK_NUMBER (ts1) < BLOCK_NUMBER (ts2))
1620 ts2 = BLOCK_SUPERCONTEXT (ts2);
1621 else
1622 {
1623 ts1 = BLOCK_SUPERCONTEXT (ts1);
1624 ts2 = BLOCK_SUPERCONTEXT (ts2);
1625 }
1626 }
1627 com = ts1;
1628
1629 /* Close scopes. */
1630 s = s1;
1631 while (s != com)
1632 {
1633 rtx_note *note = emit_note_before (NOTE_INSN_BLOCK_END, insn);
1634 NOTE_BLOCK (note) = s;
1635 s = BLOCK_SUPERCONTEXT (s);
1636 }
1637
1638 /* Open scopes. */
1639 s = s2;
1640 while (s != com)
1641 {
1642 insn = emit_note_before (NOTE_INSN_BLOCK_BEG, insn);
1643 NOTE_BLOCK (insn) = s;
1644 s = BLOCK_SUPERCONTEXT (s);
1645 }
1646 }
1647
1648 /* Rebuild all the NOTE_INSN_BLOCK_BEG and NOTE_INSN_BLOCK_END notes based
1649 on the scope tree and the newly reordered instructions. */
1650
1651 static void
1652 reemit_insn_block_notes (void)
1653 {
1654 tree cur_block = DECL_INITIAL (cfun->decl);
1655 rtx_insn *insn;
1656 rtx_note *note;
1657
1658 insn = get_insns ();
1659 for (; insn; insn = NEXT_INSN (insn))
1660 {
1661 tree this_block;
1662
1663 /* Prevent lexical blocks from straddling section boundaries. */
1664 if (NOTE_P (insn) && NOTE_KIND (insn) == NOTE_INSN_SWITCH_TEXT_SECTIONS)
1665 {
1666 for (tree s = cur_block; s != DECL_INITIAL (cfun->decl);
1667 s = BLOCK_SUPERCONTEXT (s))
1668 {
1669 rtx_note *note = emit_note_before (NOTE_INSN_BLOCK_END, insn);
1670 NOTE_BLOCK (note) = s;
1671 note = emit_note_after (NOTE_INSN_BLOCK_BEG, insn);
1672 NOTE_BLOCK (note) = s;
1673 }
1674 }
1675
1676 if (!active_insn_p (insn))
1677 continue;
1678
1679 /* Avoid putting scope notes between jump table and its label. */
1680 if (JUMP_TABLE_DATA_P (insn))
1681 continue;
1682
1683 this_block = insn_scope (insn);
1684 /* For sequences compute scope resulting from merging all scopes
1685 of instructions nested inside. */
1686 if (rtx_sequence *body = dyn_cast <rtx_sequence *> (PATTERN (insn)))
1687 {
1688 int i;
1689
1690 this_block = NULL;
1691 for (i = 0; i < body->len (); i++)
1692 this_block = choose_inner_scope (this_block,
1693 insn_scope (body->insn (i)));
1694 }
1695 if (! this_block)
1696 {
1697 if (INSN_LOCATION (insn) == UNKNOWN_LOCATION)
1698 continue;
1699 else
1700 this_block = DECL_INITIAL (cfun->decl);
1701 }
1702
1703 if (this_block != cur_block)
1704 {
1705 change_scope (insn, cur_block, this_block);
1706 cur_block = this_block;
1707 }
1708 }
1709
1710 /* change_scope emits before the insn, not after. */
1711 note = emit_note (NOTE_INSN_DELETED);
1712 change_scope (note, cur_block, DECL_INITIAL (cfun->decl));
1713 delete_insn (note);
1714
1715 reorder_blocks ();
1716 }
1717
1718 static const char *some_local_dynamic_name;
1719
1720 /* Locate some local-dynamic symbol still in use by this function
1721 so that we can print its name in local-dynamic base patterns.
1722 Return null if there are no local-dynamic references. */
1723
1724 const char *
1725 get_some_local_dynamic_name ()
1726 {
1727 subrtx_iterator::array_type array;
1728 rtx_insn *insn;
1729
1730 if (some_local_dynamic_name)
1731 return some_local_dynamic_name;
1732
1733 for (insn = get_insns (); insn ; insn = NEXT_INSN (insn))
1734 if (NONDEBUG_INSN_P (insn))
1735 FOR_EACH_SUBRTX (iter, array, PATTERN (insn), ALL)
1736 {
1737 const_rtx x = *iter;
1738 if (GET_CODE (x) == SYMBOL_REF)
1739 {
1740 if (SYMBOL_REF_TLS_MODEL (x) == TLS_MODEL_LOCAL_DYNAMIC)
1741 return some_local_dynamic_name = XSTR (x, 0);
1742 if (CONSTANT_POOL_ADDRESS_P (x))
1743 iter.substitute (get_pool_constant (x));
1744 }
1745 }
1746
1747 return 0;
1748 }
1749
1750 /* Output assembler code for the start of a function,
1751 and initialize some of the variables in this file
1752 for the new function. The label for the function and associated
1753 assembler pseudo-ops have already been output in `assemble_start_function'.
1754
1755 FIRST is the first insn of the rtl for the function being compiled.
1756 FILE is the file to write assembler code to.
1757 OPTIMIZE_P is nonzero if we should eliminate redundant
1758 test and compare insns. */
1759
1760 void
1761 final_start_function (rtx_insn *first, FILE *file,
1762 int optimize_p ATTRIBUTE_UNUSED)
1763 {
1764 block_depth = 0;
1765
1766 this_is_asm_operands = 0;
1767
1768 need_profile_function = false;
1769
1770 last_filename = LOCATION_FILE (prologue_location);
1771 last_linenum = LOCATION_LINE (prologue_location);
1772 last_columnnum = LOCATION_COLUMN (prologue_location);
1773 last_discriminator = discriminator = 0;
1774
1775 high_block_linenum = high_function_linenum = last_linenum;
1776
1777 if (flag_sanitize & SANITIZE_ADDRESS)
1778 asan_function_start ();
1779
1780 if (!DECL_IGNORED_P (current_function_decl))
1781 debug_hooks->begin_prologue (last_linenum, last_columnnum, last_filename);
1782
1783 if (!dwarf2_debug_info_emitted_p (current_function_decl))
1784 dwarf2out_begin_prologue (0, 0, NULL);
1785
1786 #ifdef LEAF_REG_REMAP
1787 if (crtl->uses_only_leaf_regs)
1788 leaf_renumber_regs (first);
1789 #endif
1790
1791 /* The Sun386i and perhaps other machines don't work right
1792 if the profiling code comes after the prologue. */
1793 if (targetm.profile_before_prologue () && crtl->profile)
1794 {
1795 if (targetm.asm_out.function_prologue == default_function_pro_epilogue
1796 && targetm.have_prologue ())
1797 {
1798 rtx_insn *insn;
1799 for (insn = first; insn; insn = NEXT_INSN (insn))
1800 if (!NOTE_P (insn))
1801 {
1802 insn = NULL;
1803 break;
1804 }
1805 else if (NOTE_KIND (insn) == NOTE_INSN_BASIC_BLOCK
1806 || NOTE_KIND (insn) == NOTE_INSN_FUNCTION_BEG)
1807 break;
1808 else if (NOTE_KIND (insn) == NOTE_INSN_DELETED
1809 || NOTE_KIND (insn) == NOTE_INSN_VAR_LOCATION)
1810 continue;
1811 else
1812 {
1813 insn = NULL;
1814 break;
1815 }
1816
1817 if (insn)
1818 need_profile_function = true;
1819 else
1820 profile_function (file);
1821 }
1822 else
1823 profile_function (file);
1824 }
1825
1826 /* If debugging, assign block numbers to all of the blocks in this
1827 function. */
1828 if (write_symbols)
1829 {
1830 reemit_insn_block_notes ();
1831 number_blocks (current_function_decl);
1832 /* We never actually put out begin/end notes for the top-level
1833 block in the function. But, conceptually, that block is
1834 always needed. */
1835 TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl)) = 1;
1836 }
1837
1838 if (warn_frame_larger_than
1839 && get_frame_size () > frame_larger_than_size)
1840 {
1841 /* Issue a warning */
1842 warning (OPT_Wframe_larger_than_,
1843 "the frame size of %wd bytes is larger than %wd bytes",
1844 get_frame_size (), frame_larger_than_size);
1845 }
1846
1847 /* First output the function prologue: code to set up the stack frame. */
1848 targetm.asm_out.function_prologue (file, get_frame_size ());
1849
1850 /* If the machine represents the prologue as RTL, the profiling code must
1851 be emitted when NOTE_INSN_PROLOGUE_END is scanned. */
1852 if (! targetm.have_prologue ())
1853 profile_after_prologue (file);
1854 }
1855
1856 static void
1857 profile_after_prologue (FILE *file ATTRIBUTE_UNUSED)
1858 {
1859 if (!targetm.profile_before_prologue () && crtl->profile)
1860 profile_function (file);
1861 }
1862
1863 static void
1864 profile_function (FILE *file ATTRIBUTE_UNUSED)
1865 {
1866 #ifndef NO_PROFILE_COUNTERS
1867 # define NO_PROFILE_COUNTERS 0
1868 #endif
1869 #ifdef ASM_OUTPUT_REG_PUSH
1870 rtx sval = NULL, chain = NULL;
1871
1872 if (cfun->returns_struct)
1873 sval = targetm.calls.struct_value_rtx (TREE_TYPE (current_function_decl),
1874 true);
1875 if (cfun->static_chain_decl)
1876 chain = targetm.calls.static_chain (current_function_decl, true);
1877 #endif /* ASM_OUTPUT_REG_PUSH */
1878
1879 if (! NO_PROFILE_COUNTERS)
1880 {
1881 int align = MIN (BIGGEST_ALIGNMENT, LONG_TYPE_SIZE);
1882 switch_to_section (data_section);
1883 ASM_OUTPUT_ALIGN (file, floor_log2 (align / BITS_PER_UNIT));
1884 targetm.asm_out.internal_label (file, "LP", current_function_funcdef_no);
1885 assemble_integer (const0_rtx, LONG_TYPE_SIZE / BITS_PER_UNIT, align, 1);
1886 }
1887
1888 switch_to_section (current_function_section ());
1889
1890 #ifdef ASM_OUTPUT_REG_PUSH
1891 if (sval && REG_P (sval))
1892 ASM_OUTPUT_REG_PUSH (file, REGNO (sval));
1893 if (chain && REG_P (chain))
1894 ASM_OUTPUT_REG_PUSH (file, REGNO (chain));
1895 #endif
1896
1897 FUNCTION_PROFILER (file, current_function_funcdef_no);
1898
1899 #ifdef ASM_OUTPUT_REG_PUSH
1900 if (chain && REG_P (chain))
1901 ASM_OUTPUT_REG_POP (file, REGNO (chain));
1902 if (sval && REG_P (sval))
1903 ASM_OUTPUT_REG_POP (file, REGNO (sval));
1904 #endif
1905 }
1906
1907 /* Output assembler code for the end of a function.
1908 For clarity, args are same as those of `final_start_function'
1909 even though not all of them are needed. */
1910
1911 void
1912 final_end_function (void)
1913 {
1914 app_disable ();
1915
1916 if (!DECL_IGNORED_P (current_function_decl))
1917 debug_hooks->end_function (high_function_linenum);
1918
1919 /* Finally, output the function epilogue:
1920 code to restore the stack frame and return to the caller. */
1921 targetm.asm_out.function_epilogue (asm_out_file, get_frame_size ());
1922
1923 /* And debug output. */
1924 if (!DECL_IGNORED_P (current_function_decl))
1925 debug_hooks->end_epilogue (last_linenum, last_filename);
1926
1927 if (!dwarf2_debug_info_emitted_p (current_function_decl)
1928 && dwarf2out_do_frame ())
1929 dwarf2out_end_epilogue (last_linenum, last_filename);
1930
1931 some_local_dynamic_name = 0;
1932 }
1933 \f
1934
1935 /* Dumper helper for basic block information. FILE is the assembly
1936 output file, and INSN is the instruction being emitted. */
1937
1938 static void
1939 dump_basic_block_info (FILE *file, rtx_insn *insn, basic_block *start_to_bb,
1940 basic_block *end_to_bb, int bb_map_size, int *bb_seqn)
1941 {
1942 basic_block bb;
1943
1944 if (!flag_debug_asm)
1945 return;
1946
1947 if (INSN_UID (insn) < bb_map_size
1948 && (bb = start_to_bb[INSN_UID (insn)]) != NULL)
1949 {
1950 edge e;
1951 edge_iterator ei;
1952
1953 fprintf (file, "%s BLOCK %d", ASM_COMMENT_START, bb->index);
1954 if (bb->frequency)
1955 fprintf (file, " freq:%d", bb->frequency);
1956 if (bb->count.initialized_p ())
1957 {
1958 fprintf (file, ", count:");
1959 bb->count.dump (file);
1960 }
1961 fprintf (file, " seq:%d", (*bb_seqn)++);
1962 fprintf (file, "\n%s PRED:", ASM_COMMENT_START);
1963 FOR_EACH_EDGE (e, ei, bb->preds)
1964 {
1965 dump_edge_info (file, e, TDF_DETAILS, 0);
1966 }
1967 fprintf (file, "\n");
1968 }
1969 if (INSN_UID (insn) < bb_map_size
1970 && (bb = end_to_bb[INSN_UID (insn)]) != NULL)
1971 {
1972 edge e;
1973 edge_iterator ei;
1974
1975 fprintf (asm_out_file, "%s SUCC:", ASM_COMMENT_START);
1976 FOR_EACH_EDGE (e, ei, bb->succs)
1977 {
1978 dump_edge_info (asm_out_file, e, TDF_DETAILS, 1);
1979 }
1980 fprintf (file, "\n");
1981 }
1982 }
1983
1984 /* Output assembler code for some insns: all or part of a function.
1985 For description of args, see `final_start_function', above. */
1986
1987 void
1988 final (rtx_insn *first, FILE *file, int optimize_p)
1989 {
1990 rtx_insn *insn, *next;
1991 int seen = 0;
1992
1993 /* Used for -dA dump. */
1994 basic_block *start_to_bb = NULL;
1995 basic_block *end_to_bb = NULL;
1996 int bb_map_size = 0;
1997 int bb_seqn = 0;
1998
1999 last_ignored_compare = 0;
2000
2001 if (HAVE_cc0)
2002 for (insn = first; insn; insn = NEXT_INSN (insn))
2003 {
2004 /* If CC tracking across branches is enabled, record the insn which
2005 jumps to each branch only reached from one place. */
2006 if (optimize_p && JUMP_P (insn))
2007 {
2008 rtx lab = JUMP_LABEL (insn);
2009 if (lab && LABEL_P (lab) && LABEL_NUSES (lab) == 1)
2010 {
2011 LABEL_REFS (lab) = insn;
2012 }
2013 }
2014 }
2015
2016 init_recog ();
2017
2018 CC_STATUS_INIT;
2019
2020 if (flag_debug_asm)
2021 {
2022 basic_block bb;
2023
2024 bb_map_size = get_max_uid () + 1;
2025 start_to_bb = XCNEWVEC (basic_block, bb_map_size);
2026 end_to_bb = XCNEWVEC (basic_block, bb_map_size);
2027
2028 /* There is no cfg for a thunk. */
2029 if (!cfun->is_thunk)
2030 FOR_EACH_BB_REVERSE_FN (bb, cfun)
2031 {
2032 start_to_bb[INSN_UID (BB_HEAD (bb))] = bb;
2033 end_to_bb[INSN_UID (BB_END (bb))] = bb;
2034 }
2035 }
2036
2037 /* Output the insns. */
2038 for (insn = first; insn;)
2039 {
2040 if (HAVE_ATTR_length)
2041 {
2042 if ((unsigned) INSN_UID (insn) >= INSN_ADDRESSES_SIZE ())
2043 {
2044 /* This can be triggered by bugs elsewhere in the compiler if
2045 new insns are created after init_insn_lengths is called. */
2046 gcc_assert (NOTE_P (insn));
2047 insn_current_address = -1;
2048 }
2049 else
2050 insn_current_address = INSN_ADDRESSES (INSN_UID (insn));
2051 }
2052
2053 dump_basic_block_info (file, insn, start_to_bb, end_to_bb,
2054 bb_map_size, &bb_seqn);
2055 insn = final_scan_insn (insn, file, optimize_p, 0, &seen);
2056 }
2057
2058 if (flag_debug_asm)
2059 {
2060 free (start_to_bb);
2061 free (end_to_bb);
2062 }
2063
2064 /* Remove CFI notes, to avoid compare-debug failures. */
2065 for (insn = first; insn; insn = next)
2066 {
2067 next = NEXT_INSN (insn);
2068 if (NOTE_P (insn)
2069 && (NOTE_KIND (insn) == NOTE_INSN_CFI
2070 || NOTE_KIND (insn) == NOTE_INSN_CFI_LABEL))
2071 delete_insn (insn);
2072 }
2073 }
2074 \f
2075 const char *
2076 get_insn_template (int code, rtx insn)
2077 {
2078 switch (insn_data[code].output_format)
2079 {
2080 case INSN_OUTPUT_FORMAT_SINGLE:
2081 return insn_data[code].output.single;
2082 case INSN_OUTPUT_FORMAT_MULTI:
2083 return insn_data[code].output.multi[which_alternative];
2084 case INSN_OUTPUT_FORMAT_FUNCTION:
2085 gcc_assert (insn);
2086 return (*insn_data[code].output.function) (recog_data.operand,
2087 as_a <rtx_insn *> (insn));
2088
2089 default:
2090 gcc_unreachable ();
2091 }
2092 }
2093
2094 /* Emit the appropriate declaration for an alternate-entry-point
2095 symbol represented by INSN, to FILE. INSN is a CODE_LABEL with
2096 LABEL_KIND != LABEL_NORMAL.
2097
2098 The case fall-through in this function is intentional. */
2099 static void
2100 output_alternate_entry_point (FILE *file, rtx_insn *insn)
2101 {
2102 const char *name = LABEL_NAME (insn);
2103
2104 switch (LABEL_KIND (insn))
2105 {
2106 case LABEL_WEAK_ENTRY:
2107 #ifdef ASM_WEAKEN_LABEL
2108 ASM_WEAKEN_LABEL (file, name);
2109 gcc_fallthrough ();
2110 #endif
2111 case LABEL_GLOBAL_ENTRY:
2112 targetm.asm_out.globalize_label (file, name);
2113 gcc_fallthrough ();
2114 case LABEL_STATIC_ENTRY:
2115 #ifdef ASM_OUTPUT_TYPE_DIRECTIVE
2116 ASM_OUTPUT_TYPE_DIRECTIVE (file, name, "function");
2117 #endif
2118 ASM_OUTPUT_LABEL (file, name);
2119 break;
2120
2121 case LABEL_NORMAL:
2122 default:
2123 gcc_unreachable ();
2124 }
2125 }
2126
2127 /* Given a CALL_INSN, find and return the nested CALL. */
2128 static rtx
2129 call_from_call_insn (rtx_call_insn *insn)
2130 {
2131 rtx x;
2132 gcc_assert (CALL_P (insn));
2133 x = PATTERN (insn);
2134
2135 while (GET_CODE (x) != CALL)
2136 {
2137 switch (GET_CODE (x))
2138 {
2139 default:
2140 gcc_unreachable ();
2141 case COND_EXEC:
2142 x = COND_EXEC_CODE (x);
2143 break;
2144 case PARALLEL:
2145 x = XVECEXP (x, 0, 0);
2146 break;
2147 case SET:
2148 x = XEXP (x, 1);
2149 break;
2150 }
2151 }
2152 return x;
2153 }
2154
2155 /* Print a comment into the asm showing FILENAME, LINENUM, and the
2156 corresponding source line, if available. */
2157
2158 static void
2159 asm_show_source (const char *filename, int linenum)
2160 {
2161 if (!filename)
2162 return;
2163
2164 int line_size;
2165 const char *line = location_get_source_line (filename, linenum, &line_size);
2166 if (!line)
2167 return;
2168
2169 fprintf (asm_out_file, "%s %s:%i: ", ASM_COMMENT_START, filename, linenum);
2170 /* "line" is not 0-terminated, so we must use line_size. */
2171 fwrite (line, 1, line_size, asm_out_file);
2172 fputc ('\n', asm_out_file);
2173 }
2174
2175 /* The final scan for one insn, INSN.
2176 Args are same as in `final', except that INSN
2177 is the insn being scanned.
2178 Value returned is the next insn to be scanned.
2179
2180 NOPEEPHOLES is the flag to disallow peephole processing (currently
2181 used for within delayed branch sequence output).
2182
2183 SEEN is used to track the end of the prologue, for emitting
2184 debug information. We force the emission of a line note after
2185 both NOTE_INSN_PROLOGUE_END and NOTE_INSN_FUNCTION_BEG. */
2186
2187 rtx_insn *
2188 final_scan_insn (rtx_insn *insn, FILE *file, int optimize_p ATTRIBUTE_UNUSED,
2189 int nopeepholes ATTRIBUTE_UNUSED, int *seen)
2190 {
2191 #if HAVE_cc0
2192 rtx set;
2193 #endif
2194 rtx_insn *next;
2195
2196 insn_counter++;
2197
2198 /* Ignore deleted insns. These can occur when we split insns (due to a
2199 template of "#") while not optimizing. */
2200 if (insn->deleted ())
2201 return NEXT_INSN (insn);
2202
2203 switch (GET_CODE (insn))
2204 {
2205 case NOTE:
2206 switch (NOTE_KIND (insn))
2207 {
2208 case NOTE_INSN_DELETED:
2209 case NOTE_INSN_UPDATE_SJLJ_CONTEXT:
2210 break;
2211
2212 case NOTE_INSN_SWITCH_TEXT_SECTIONS:
2213 in_cold_section_p = !in_cold_section_p;
2214
2215 if (dwarf2out_do_frame ())
2216 dwarf2out_switch_text_section ();
2217 else if (!DECL_IGNORED_P (current_function_decl))
2218 debug_hooks->switch_text_section ();
2219
2220 switch_to_section (current_function_section ());
2221 targetm.asm_out.function_switched_text_sections (asm_out_file,
2222 current_function_decl,
2223 in_cold_section_p);
2224 /* Emit a label for the split cold section. Form label name by
2225 suffixing "cold" to the original function's name. */
2226 if (in_cold_section_p)
2227 {
2228 cold_function_name
2229 = clone_function_name (current_function_decl, "cold");
2230 #ifdef ASM_DECLARE_COLD_FUNCTION_NAME
2231 ASM_DECLARE_COLD_FUNCTION_NAME (asm_out_file,
2232 IDENTIFIER_POINTER
2233 (cold_function_name),
2234 current_function_decl);
2235 #else
2236 ASM_OUTPUT_LABEL (asm_out_file,
2237 IDENTIFIER_POINTER (cold_function_name));
2238 #endif
2239 }
2240 break;
2241
2242 case NOTE_INSN_BASIC_BLOCK:
2243 if (need_profile_function)
2244 {
2245 profile_function (asm_out_file);
2246 need_profile_function = false;
2247 }
2248
2249 if (targetm.asm_out.unwind_emit)
2250 targetm.asm_out.unwind_emit (asm_out_file, insn);
2251
2252 discriminator = NOTE_BASIC_BLOCK (insn)->discriminator;
2253
2254 break;
2255
2256 case NOTE_INSN_EH_REGION_BEG:
2257 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHB",
2258 NOTE_EH_HANDLER (insn));
2259 break;
2260
2261 case NOTE_INSN_EH_REGION_END:
2262 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHE",
2263 NOTE_EH_HANDLER (insn));
2264 break;
2265
2266 case NOTE_INSN_PROLOGUE_END:
2267 targetm.asm_out.function_end_prologue (file);
2268 profile_after_prologue (file);
2269
2270 if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE)
2271 {
2272 *seen |= SEEN_EMITTED;
2273 force_source_line = true;
2274 }
2275 else
2276 *seen |= SEEN_NOTE;
2277
2278 break;
2279
2280 case NOTE_INSN_EPILOGUE_BEG:
2281 if (!DECL_IGNORED_P (current_function_decl))
2282 (*debug_hooks->begin_epilogue) (last_linenum, last_filename);
2283 targetm.asm_out.function_begin_epilogue (file);
2284 break;
2285
2286 case NOTE_INSN_CFI:
2287 dwarf2out_emit_cfi (NOTE_CFI (insn));
2288 break;
2289
2290 case NOTE_INSN_CFI_LABEL:
2291 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LCFI",
2292 NOTE_LABEL_NUMBER (insn));
2293 break;
2294
2295 case NOTE_INSN_FUNCTION_BEG:
2296 if (need_profile_function)
2297 {
2298 profile_function (asm_out_file);
2299 need_profile_function = false;
2300 }
2301
2302 app_disable ();
2303 if (!DECL_IGNORED_P (current_function_decl))
2304 debug_hooks->end_prologue (last_linenum, last_filename);
2305
2306 if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE)
2307 {
2308 *seen |= SEEN_EMITTED;
2309 force_source_line = true;
2310 }
2311 else
2312 *seen |= SEEN_NOTE;
2313
2314 break;
2315
2316 case NOTE_INSN_BLOCK_BEG:
2317 if (debug_info_level == DINFO_LEVEL_NORMAL
2318 || debug_info_level == DINFO_LEVEL_VERBOSE
2319 || write_symbols == DWARF2_DEBUG
2320 || write_symbols == VMS_AND_DWARF2_DEBUG
2321 || write_symbols == VMS_DEBUG)
2322 {
2323 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
2324
2325 app_disable ();
2326 ++block_depth;
2327 high_block_linenum = last_linenum;
2328
2329 /* Output debugging info about the symbol-block beginning. */
2330 if (!DECL_IGNORED_P (current_function_decl))
2331 debug_hooks->begin_block (last_linenum, n);
2332
2333 /* Mark this block as output. */
2334 TREE_ASM_WRITTEN (NOTE_BLOCK (insn)) = 1;
2335 BLOCK_IN_COLD_SECTION_P (NOTE_BLOCK (insn)) = in_cold_section_p;
2336 }
2337 if (write_symbols == DBX_DEBUG
2338 || write_symbols == SDB_DEBUG)
2339 {
2340 location_t *locus_ptr
2341 = block_nonartificial_location (NOTE_BLOCK (insn));
2342
2343 if (locus_ptr != NULL)
2344 {
2345 override_filename = LOCATION_FILE (*locus_ptr);
2346 override_linenum = LOCATION_LINE (*locus_ptr);
2347 override_columnnum = LOCATION_COLUMN (*locus_ptr);
2348 }
2349 }
2350 break;
2351
2352 case NOTE_INSN_BLOCK_END:
2353 if (debug_info_level == DINFO_LEVEL_NORMAL
2354 || debug_info_level == DINFO_LEVEL_VERBOSE
2355 || write_symbols == DWARF2_DEBUG
2356 || write_symbols == VMS_AND_DWARF2_DEBUG
2357 || write_symbols == VMS_DEBUG)
2358 {
2359 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
2360
2361 app_disable ();
2362
2363 /* End of a symbol-block. */
2364 --block_depth;
2365 gcc_assert (block_depth >= 0);
2366
2367 if (!DECL_IGNORED_P (current_function_decl))
2368 debug_hooks->end_block (high_block_linenum, n);
2369 gcc_assert (BLOCK_IN_COLD_SECTION_P (NOTE_BLOCK (insn))
2370 == in_cold_section_p);
2371 }
2372 if (write_symbols == DBX_DEBUG
2373 || write_symbols == SDB_DEBUG)
2374 {
2375 tree outer_block = BLOCK_SUPERCONTEXT (NOTE_BLOCK (insn));
2376 location_t *locus_ptr
2377 = block_nonartificial_location (outer_block);
2378
2379 if (locus_ptr != NULL)
2380 {
2381 override_filename = LOCATION_FILE (*locus_ptr);
2382 override_linenum = LOCATION_LINE (*locus_ptr);
2383 override_columnnum = LOCATION_COLUMN (*locus_ptr);
2384 }
2385 else
2386 {
2387 override_filename = NULL;
2388 override_linenum = 0;
2389 override_columnnum = 0;
2390 }
2391 }
2392 break;
2393
2394 case NOTE_INSN_DELETED_LABEL:
2395 /* Emit the label. We may have deleted the CODE_LABEL because
2396 the label could be proved to be unreachable, though still
2397 referenced (in the form of having its address taken. */
2398 ASM_OUTPUT_DEBUG_LABEL (file, "L", CODE_LABEL_NUMBER (insn));
2399 break;
2400
2401 case NOTE_INSN_DELETED_DEBUG_LABEL:
2402 /* Similarly, but need to use different namespace for it. */
2403 if (CODE_LABEL_NUMBER (insn) != -1)
2404 ASM_OUTPUT_DEBUG_LABEL (file, "LDL", CODE_LABEL_NUMBER (insn));
2405 break;
2406
2407 case NOTE_INSN_VAR_LOCATION:
2408 case NOTE_INSN_CALL_ARG_LOCATION:
2409 if (!DECL_IGNORED_P (current_function_decl))
2410 debug_hooks->var_location (insn);
2411 break;
2412
2413 default:
2414 gcc_unreachable ();
2415 break;
2416 }
2417 break;
2418
2419 case BARRIER:
2420 break;
2421
2422 case CODE_LABEL:
2423 /* The target port might emit labels in the output function for
2424 some insn, e.g. sh.c output_branchy_insn. */
2425 if (CODE_LABEL_NUMBER (insn) <= max_labelno)
2426 {
2427 int align = LABEL_TO_ALIGNMENT (insn);
2428 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2429 int max_skip = LABEL_TO_MAX_SKIP (insn);
2430 #endif
2431
2432 if (align && NEXT_INSN (insn))
2433 {
2434 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2435 ASM_OUTPUT_MAX_SKIP_ALIGN (file, align, max_skip);
2436 #else
2437 #ifdef ASM_OUTPUT_ALIGN_WITH_NOP
2438 ASM_OUTPUT_ALIGN_WITH_NOP (file, align);
2439 #else
2440 ASM_OUTPUT_ALIGN (file, align);
2441 #endif
2442 #endif
2443 }
2444 }
2445 CC_STATUS_INIT;
2446
2447 if (!DECL_IGNORED_P (current_function_decl) && LABEL_NAME (insn))
2448 debug_hooks->label (as_a <rtx_code_label *> (insn));
2449
2450 app_disable ();
2451
2452 next = next_nonnote_insn (insn);
2453 /* If this label is followed by a jump-table, make sure we put
2454 the label in the read-only section. Also possibly write the
2455 label and jump table together. */
2456 if (next != 0 && JUMP_TABLE_DATA_P (next))
2457 {
2458 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2459 /* In this case, the case vector is being moved by the
2460 target, so don't output the label at all. Leave that
2461 to the back end macros. */
2462 #else
2463 if (! JUMP_TABLES_IN_TEXT_SECTION)
2464 {
2465 int log_align;
2466
2467 switch_to_section (targetm.asm_out.function_rodata_section
2468 (current_function_decl));
2469
2470 #ifdef ADDR_VEC_ALIGN
2471 log_align = ADDR_VEC_ALIGN (next);
2472 #else
2473 log_align = exact_log2 (BIGGEST_ALIGNMENT / BITS_PER_UNIT);
2474 #endif
2475 ASM_OUTPUT_ALIGN (file, log_align);
2476 }
2477 else
2478 switch_to_section (current_function_section ());
2479
2480 #ifdef ASM_OUTPUT_CASE_LABEL
2481 ASM_OUTPUT_CASE_LABEL (file, "L", CODE_LABEL_NUMBER (insn),
2482 next);
2483 #else
2484 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn));
2485 #endif
2486 #endif
2487 break;
2488 }
2489 if (LABEL_ALT_ENTRY_P (insn))
2490 output_alternate_entry_point (file, insn);
2491 else
2492 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn));
2493 break;
2494
2495 default:
2496 {
2497 rtx body = PATTERN (insn);
2498 int insn_code_number;
2499 const char *templ;
2500 bool is_stmt;
2501
2502 /* Reset this early so it is correct for ASM statements. */
2503 current_insn_predicate = NULL_RTX;
2504
2505 /* An INSN, JUMP_INSN or CALL_INSN.
2506 First check for special kinds that recog doesn't recognize. */
2507
2508 if (GET_CODE (body) == USE /* These are just declarations. */
2509 || GET_CODE (body) == CLOBBER)
2510 break;
2511
2512 #if HAVE_cc0
2513 {
2514 /* If there is a REG_CC_SETTER note on this insn, it means that
2515 the setting of the condition code was done in the delay slot
2516 of the insn that branched here. So recover the cc status
2517 from the insn that set it. */
2518
2519 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2520 if (note)
2521 {
2522 rtx_insn *other = as_a <rtx_insn *> (XEXP (note, 0));
2523 NOTICE_UPDATE_CC (PATTERN (other), other);
2524 cc_prev_status = cc_status;
2525 }
2526 }
2527 #endif
2528
2529 /* Detect insns that are really jump-tables
2530 and output them as such. */
2531
2532 if (JUMP_TABLE_DATA_P (insn))
2533 {
2534 #if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC))
2535 int vlen, idx;
2536 #endif
2537
2538 if (! JUMP_TABLES_IN_TEXT_SECTION)
2539 switch_to_section (targetm.asm_out.function_rodata_section
2540 (current_function_decl));
2541 else
2542 switch_to_section (current_function_section ());
2543
2544 app_disable ();
2545
2546 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2547 if (GET_CODE (body) == ADDR_VEC)
2548 {
2549 #ifdef ASM_OUTPUT_ADDR_VEC
2550 ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn), body);
2551 #else
2552 gcc_unreachable ();
2553 #endif
2554 }
2555 else
2556 {
2557 #ifdef ASM_OUTPUT_ADDR_DIFF_VEC
2558 ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn), body);
2559 #else
2560 gcc_unreachable ();
2561 #endif
2562 }
2563 #else
2564 vlen = XVECLEN (body, GET_CODE (body) == ADDR_DIFF_VEC);
2565 for (idx = 0; idx < vlen; idx++)
2566 {
2567 if (GET_CODE (body) == ADDR_VEC)
2568 {
2569 #ifdef ASM_OUTPUT_ADDR_VEC_ELT
2570 ASM_OUTPUT_ADDR_VEC_ELT
2571 (file, CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 0, idx), 0)));
2572 #else
2573 gcc_unreachable ();
2574 #endif
2575 }
2576 else
2577 {
2578 #ifdef ASM_OUTPUT_ADDR_DIFF_ELT
2579 ASM_OUTPUT_ADDR_DIFF_ELT
2580 (file,
2581 body,
2582 CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 1, idx), 0)),
2583 CODE_LABEL_NUMBER (XEXP (XEXP (body, 0), 0)));
2584 #else
2585 gcc_unreachable ();
2586 #endif
2587 }
2588 }
2589 #ifdef ASM_OUTPUT_CASE_END
2590 ASM_OUTPUT_CASE_END (file,
2591 CODE_LABEL_NUMBER (PREV_INSN (insn)),
2592 insn);
2593 #endif
2594 #endif
2595
2596 switch_to_section (current_function_section ());
2597
2598 break;
2599 }
2600 /* Output this line note if it is the first or the last line
2601 note in a row. */
2602 if (!DECL_IGNORED_P (current_function_decl)
2603 && notice_source_line (insn, &is_stmt))
2604 {
2605 if (flag_verbose_asm)
2606 asm_show_source (last_filename, last_linenum);
2607 (*debug_hooks->source_line) (last_linenum, last_columnnum,
2608 last_filename, last_discriminator,
2609 is_stmt);
2610 }
2611
2612 if (GET_CODE (body) == PARALLEL
2613 && GET_CODE (XVECEXP (body, 0, 0)) == ASM_INPUT)
2614 body = XVECEXP (body, 0, 0);
2615
2616 if (GET_CODE (body) == ASM_INPUT)
2617 {
2618 const char *string = XSTR (body, 0);
2619
2620 /* There's no telling what that did to the condition codes. */
2621 CC_STATUS_INIT;
2622
2623 if (string[0])
2624 {
2625 expanded_location loc;
2626
2627 app_enable ();
2628 loc = expand_location (ASM_INPUT_SOURCE_LOCATION (body));
2629 if (*loc.file && loc.line)
2630 fprintf (asm_out_file, "%s %i \"%s\" 1\n",
2631 ASM_COMMENT_START, loc.line, loc.file);
2632 fprintf (asm_out_file, "\t%s\n", string);
2633 #if HAVE_AS_LINE_ZERO
2634 if (*loc.file && loc.line)
2635 fprintf (asm_out_file, "%s 0 \"\" 2\n", ASM_COMMENT_START);
2636 #endif
2637 }
2638 break;
2639 }
2640
2641 /* Detect `asm' construct with operands. */
2642 if (asm_noperands (body) >= 0)
2643 {
2644 unsigned int noperands = asm_noperands (body);
2645 rtx *ops = XALLOCAVEC (rtx, noperands);
2646 const char *string;
2647 location_t loc;
2648 expanded_location expanded;
2649
2650 /* There's no telling what that did to the condition codes. */
2651 CC_STATUS_INIT;
2652
2653 /* Get out the operand values. */
2654 string = decode_asm_operands (body, ops, NULL, NULL, NULL, &loc);
2655 /* Inhibit dying on what would otherwise be compiler bugs. */
2656 insn_noperands = noperands;
2657 this_is_asm_operands = insn;
2658 expanded = expand_location (loc);
2659
2660 #ifdef FINAL_PRESCAN_INSN
2661 FINAL_PRESCAN_INSN (insn, ops, insn_noperands);
2662 #endif
2663
2664 /* Output the insn using them. */
2665 if (string[0])
2666 {
2667 app_enable ();
2668 if (expanded.file && expanded.line)
2669 fprintf (asm_out_file, "%s %i \"%s\" 1\n",
2670 ASM_COMMENT_START, expanded.line, expanded.file);
2671 output_asm_insn (string, ops);
2672 #if HAVE_AS_LINE_ZERO
2673 if (expanded.file && expanded.line)
2674 fprintf (asm_out_file, "%s 0 \"\" 2\n", ASM_COMMENT_START);
2675 #endif
2676 }
2677
2678 if (targetm.asm_out.final_postscan_insn)
2679 targetm.asm_out.final_postscan_insn (file, insn, ops,
2680 insn_noperands);
2681
2682 this_is_asm_operands = 0;
2683 break;
2684 }
2685
2686 app_disable ();
2687
2688 if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (body))
2689 {
2690 /* A delayed-branch sequence */
2691 int i;
2692
2693 final_sequence = seq;
2694
2695 /* The first insn in this SEQUENCE might be a JUMP_INSN that will
2696 force the restoration of a comparison that was previously
2697 thought unnecessary. If that happens, cancel this sequence
2698 and cause that insn to be restored. */
2699
2700 next = final_scan_insn (seq->insn (0), file, 0, 1, seen);
2701 if (next != seq->insn (1))
2702 {
2703 final_sequence = 0;
2704 return next;
2705 }
2706
2707 for (i = 1; i < seq->len (); i++)
2708 {
2709 rtx_insn *insn = seq->insn (i);
2710 rtx_insn *next = NEXT_INSN (insn);
2711 /* We loop in case any instruction in a delay slot gets
2712 split. */
2713 do
2714 insn = final_scan_insn (insn, file, 0, 1, seen);
2715 while (insn != next);
2716 }
2717 #ifdef DBR_OUTPUT_SEQEND
2718 DBR_OUTPUT_SEQEND (file);
2719 #endif
2720 final_sequence = 0;
2721
2722 /* If the insn requiring the delay slot was a CALL_INSN, the
2723 insns in the delay slot are actually executed before the
2724 called function. Hence we don't preserve any CC-setting
2725 actions in these insns and the CC must be marked as being
2726 clobbered by the function. */
2727 if (CALL_P (seq->insn (0)))
2728 {
2729 CC_STATUS_INIT;
2730 }
2731 break;
2732 }
2733
2734 /* We have a real machine instruction as rtl. */
2735
2736 body = PATTERN (insn);
2737
2738 #if HAVE_cc0
2739 set = single_set (insn);
2740
2741 /* Check for redundant test and compare instructions
2742 (when the condition codes are already set up as desired).
2743 This is done only when optimizing; if not optimizing,
2744 it should be possible for the user to alter a variable
2745 with the debugger in between statements
2746 and the next statement should reexamine the variable
2747 to compute the condition codes. */
2748
2749 if (optimize_p)
2750 {
2751 if (set
2752 && GET_CODE (SET_DEST (set)) == CC0
2753 && insn != last_ignored_compare)
2754 {
2755 rtx src1, src2;
2756 if (GET_CODE (SET_SRC (set)) == SUBREG)
2757 SET_SRC (set) = alter_subreg (&SET_SRC (set), true);
2758
2759 src1 = SET_SRC (set);
2760 src2 = NULL_RTX;
2761 if (GET_CODE (SET_SRC (set)) == COMPARE)
2762 {
2763 if (GET_CODE (XEXP (SET_SRC (set), 0)) == SUBREG)
2764 XEXP (SET_SRC (set), 0)
2765 = alter_subreg (&XEXP (SET_SRC (set), 0), true);
2766 if (GET_CODE (XEXP (SET_SRC (set), 1)) == SUBREG)
2767 XEXP (SET_SRC (set), 1)
2768 = alter_subreg (&XEXP (SET_SRC (set), 1), true);
2769 if (XEXP (SET_SRC (set), 1)
2770 == CONST0_RTX (GET_MODE (XEXP (SET_SRC (set), 0))))
2771 src2 = XEXP (SET_SRC (set), 0);
2772 }
2773 if ((cc_status.value1 != 0
2774 && rtx_equal_p (src1, cc_status.value1))
2775 || (cc_status.value2 != 0
2776 && rtx_equal_p (src1, cc_status.value2))
2777 || (src2 != 0 && cc_status.value1 != 0
2778 && rtx_equal_p (src2, cc_status.value1))
2779 || (src2 != 0 && cc_status.value2 != 0
2780 && rtx_equal_p (src2, cc_status.value2)))
2781 {
2782 /* Don't delete insn if it has an addressing side-effect. */
2783 if (! FIND_REG_INC_NOTE (insn, NULL_RTX)
2784 /* or if anything in it is volatile. */
2785 && ! volatile_refs_p (PATTERN (insn)))
2786 {
2787 /* We don't really delete the insn; just ignore it. */
2788 last_ignored_compare = insn;
2789 break;
2790 }
2791 }
2792 }
2793 }
2794
2795 /* If this is a conditional branch, maybe modify it
2796 if the cc's are in a nonstandard state
2797 so that it accomplishes the same thing that it would
2798 do straightforwardly if the cc's were set up normally. */
2799
2800 if (cc_status.flags != 0
2801 && JUMP_P (insn)
2802 && GET_CODE (body) == SET
2803 && SET_DEST (body) == pc_rtx
2804 && GET_CODE (SET_SRC (body)) == IF_THEN_ELSE
2805 && COMPARISON_P (XEXP (SET_SRC (body), 0))
2806 && XEXP (XEXP (SET_SRC (body), 0), 0) == cc0_rtx)
2807 {
2808 /* This function may alter the contents of its argument
2809 and clear some of the cc_status.flags bits.
2810 It may also return 1 meaning condition now always true
2811 or -1 meaning condition now always false
2812 or 2 meaning condition nontrivial but altered. */
2813 int result = alter_cond (XEXP (SET_SRC (body), 0));
2814 /* If condition now has fixed value, replace the IF_THEN_ELSE
2815 with its then-operand or its else-operand. */
2816 if (result == 1)
2817 SET_SRC (body) = XEXP (SET_SRC (body), 1);
2818 if (result == -1)
2819 SET_SRC (body) = XEXP (SET_SRC (body), 2);
2820
2821 /* The jump is now either unconditional or a no-op.
2822 If it has become a no-op, don't try to output it.
2823 (It would not be recognized.) */
2824 if (SET_SRC (body) == pc_rtx)
2825 {
2826 delete_insn (insn);
2827 break;
2828 }
2829 else if (ANY_RETURN_P (SET_SRC (body)))
2830 /* Replace (set (pc) (return)) with (return). */
2831 PATTERN (insn) = body = SET_SRC (body);
2832
2833 /* Rerecognize the instruction if it has changed. */
2834 if (result != 0)
2835 INSN_CODE (insn) = -1;
2836 }
2837
2838 /* If this is a conditional trap, maybe modify it if the cc's
2839 are in a nonstandard state so that it accomplishes the same
2840 thing that it would do straightforwardly if the cc's were
2841 set up normally. */
2842 if (cc_status.flags != 0
2843 && NONJUMP_INSN_P (insn)
2844 && GET_CODE (body) == TRAP_IF
2845 && COMPARISON_P (TRAP_CONDITION (body))
2846 && XEXP (TRAP_CONDITION (body), 0) == cc0_rtx)
2847 {
2848 /* This function may alter the contents of its argument
2849 and clear some of the cc_status.flags bits.
2850 It may also return 1 meaning condition now always true
2851 or -1 meaning condition now always false
2852 or 2 meaning condition nontrivial but altered. */
2853 int result = alter_cond (TRAP_CONDITION (body));
2854
2855 /* If TRAP_CONDITION has become always false, delete the
2856 instruction. */
2857 if (result == -1)
2858 {
2859 delete_insn (insn);
2860 break;
2861 }
2862
2863 /* If TRAP_CONDITION has become always true, replace
2864 TRAP_CONDITION with const_true_rtx. */
2865 if (result == 1)
2866 TRAP_CONDITION (body) = const_true_rtx;
2867
2868 /* Rerecognize the instruction if it has changed. */
2869 if (result != 0)
2870 INSN_CODE (insn) = -1;
2871 }
2872
2873 /* Make same adjustments to instructions that examine the
2874 condition codes without jumping and instructions that
2875 handle conditional moves (if this machine has either one). */
2876
2877 if (cc_status.flags != 0
2878 && set != 0)
2879 {
2880 rtx cond_rtx, then_rtx, else_rtx;
2881
2882 if (!JUMP_P (insn)
2883 && GET_CODE (SET_SRC (set)) == IF_THEN_ELSE)
2884 {
2885 cond_rtx = XEXP (SET_SRC (set), 0);
2886 then_rtx = XEXP (SET_SRC (set), 1);
2887 else_rtx = XEXP (SET_SRC (set), 2);
2888 }
2889 else
2890 {
2891 cond_rtx = SET_SRC (set);
2892 then_rtx = const_true_rtx;
2893 else_rtx = const0_rtx;
2894 }
2895
2896 if (COMPARISON_P (cond_rtx)
2897 && XEXP (cond_rtx, 0) == cc0_rtx)
2898 {
2899 int result;
2900 result = alter_cond (cond_rtx);
2901 if (result == 1)
2902 validate_change (insn, &SET_SRC (set), then_rtx, 0);
2903 else if (result == -1)
2904 validate_change (insn, &SET_SRC (set), else_rtx, 0);
2905 else if (result == 2)
2906 INSN_CODE (insn) = -1;
2907 if (SET_DEST (set) == SET_SRC (set))
2908 delete_insn (insn);
2909 }
2910 }
2911
2912 #endif
2913
2914 /* Do machine-specific peephole optimizations if desired. */
2915
2916 if (HAVE_peephole && optimize_p && !flag_no_peephole && !nopeepholes)
2917 {
2918 rtx_insn *next = peephole (insn);
2919 /* When peepholing, if there were notes within the peephole,
2920 emit them before the peephole. */
2921 if (next != 0 && next != NEXT_INSN (insn))
2922 {
2923 rtx_insn *note, *prev = PREV_INSN (insn);
2924
2925 for (note = NEXT_INSN (insn); note != next;
2926 note = NEXT_INSN (note))
2927 final_scan_insn (note, file, optimize_p, nopeepholes, seen);
2928
2929 /* Put the notes in the proper position for a later
2930 rescan. For example, the SH target can do this
2931 when generating a far jump in a delayed branch
2932 sequence. */
2933 note = NEXT_INSN (insn);
2934 SET_PREV_INSN (note) = prev;
2935 SET_NEXT_INSN (prev) = note;
2936 SET_NEXT_INSN (PREV_INSN (next)) = insn;
2937 SET_PREV_INSN (insn) = PREV_INSN (next);
2938 SET_NEXT_INSN (insn) = next;
2939 SET_PREV_INSN (next) = insn;
2940 }
2941
2942 /* PEEPHOLE might have changed this. */
2943 body = PATTERN (insn);
2944 }
2945
2946 /* Try to recognize the instruction.
2947 If successful, verify that the operands satisfy the
2948 constraints for the instruction. Crash if they don't,
2949 since `reload' should have changed them so that they do. */
2950
2951 insn_code_number = recog_memoized (insn);
2952 cleanup_subreg_operands (insn);
2953
2954 /* Dump the insn in the assembly for debugging (-dAP).
2955 If the final dump is requested as slim RTL, dump slim
2956 RTL to the assembly file also. */
2957 if (flag_dump_rtl_in_asm)
2958 {
2959 print_rtx_head = ASM_COMMENT_START;
2960 if (! (dump_flags & TDF_SLIM))
2961 print_rtl_single (asm_out_file, insn);
2962 else
2963 dump_insn_slim (asm_out_file, insn);
2964 print_rtx_head = "";
2965 }
2966
2967 if (! constrain_operands_cached (insn, 1))
2968 fatal_insn_not_found (insn);
2969
2970 /* Some target machines need to prescan each insn before
2971 it is output. */
2972
2973 #ifdef FINAL_PRESCAN_INSN
2974 FINAL_PRESCAN_INSN (insn, recog_data.operand, recog_data.n_operands);
2975 #endif
2976
2977 if (targetm.have_conditional_execution ()
2978 && GET_CODE (PATTERN (insn)) == COND_EXEC)
2979 current_insn_predicate = COND_EXEC_TEST (PATTERN (insn));
2980
2981 #if HAVE_cc0
2982 cc_prev_status = cc_status;
2983
2984 /* Update `cc_status' for this instruction.
2985 The instruction's output routine may change it further.
2986 If the output routine for a jump insn needs to depend
2987 on the cc status, it should look at cc_prev_status. */
2988
2989 NOTICE_UPDATE_CC (body, insn);
2990 #endif
2991
2992 current_output_insn = debug_insn = insn;
2993
2994 /* Find the proper template for this insn. */
2995 templ = get_insn_template (insn_code_number, insn);
2996
2997 /* If the C code returns 0, it means that it is a jump insn
2998 which follows a deleted test insn, and that test insn
2999 needs to be reinserted. */
3000 if (templ == 0)
3001 {
3002 rtx_insn *prev;
3003
3004 gcc_assert (prev_nonnote_insn (insn) == last_ignored_compare);
3005
3006 /* We have already processed the notes between the setter and
3007 the user. Make sure we don't process them again, this is
3008 particularly important if one of the notes is a block
3009 scope note or an EH note. */
3010 for (prev = insn;
3011 prev != last_ignored_compare;
3012 prev = PREV_INSN (prev))
3013 {
3014 if (NOTE_P (prev))
3015 delete_insn (prev); /* Use delete_note. */
3016 }
3017
3018 return prev;
3019 }
3020
3021 /* If the template is the string "#", it means that this insn must
3022 be split. */
3023 if (templ[0] == '#' && templ[1] == '\0')
3024 {
3025 rtx_insn *new_rtx = try_split (body, insn, 0);
3026
3027 /* If we didn't split the insn, go away. */
3028 if (new_rtx == insn && PATTERN (new_rtx) == body)
3029 fatal_insn ("could not split insn", insn);
3030
3031 /* If we have a length attribute, this instruction should have
3032 been split in shorten_branches, to ensure that we would have
3033 valid length info for the splitees. */
3034 gcc_assert (!HAVE_ATTR_length);
3035
3036 return new_rtx;
3037 }
3038
3039 /* ??? This will put the directives in the wrong place if
3040 get_insn_template outputs assembly directly. However calling it
3041 before get_insn_template breaks if the insns is split. */
3042 if (targetm.asm_out.unwind_emit_before_insn
3043 && targetm.asm_out.unwind_emit)
3044 targetm.asm_out.unwind_emit (asm_out_file, insn);
3045
3046 rtx_call_insn *call_insn = dyn_cast <rtx_call_insn *> (insn);
3047 if (call_insn != NULL)
3048 {
3049 rtx x = call_from_call_insn (call_insn);
3050 x = XEXP (x, 0);
3051 if (x && MEM_P (x) && GET_CODE (XEXP (x, 0)) == SYMBOL_REF)
3052 {
3053 tree t;
3054 x = XEXP (x, 0);
3055 t = SYMBOL_REF_DECL (x);
3056 if (t)
3057 assemble_external (t);
3058 }
3059 }
3060
3061 /* Output assembler code from the template. */
3062 output_asm_insn (templ, recog_data.operand);
3063
3064 /* Some target machines need to postscan each insn after
3065 it is output. */
3066 if (targetm.asm_out.final_postscan_insn)
3067 targetm.asm_out.final_postscan_insn (file, insn, recog_data.operand,
3068 recog_data.n_operands);
3069
3070 if (!targetm.asm_out.unwind_emit_before_insn
3071 && targetm.asm_out.unwind_emit)
3072 targetm.asm_out.unwind_emit (asm_out_file, insn);
3073
3074 /* Let the debug info back-end know about this call. We do this only
3075 after the instruction has been emitted because labels that may be
3076 created to reference the call instruction must appear after it. */
3077 if (call_insn != NULL && !DECL_IGNORED_P (current_function_decl))
3078 debug_hooks->var_location (insn);
3079
3080 current_output_insn = debug_insn = 0;
3081 }
3082 }
3083 return NEXT_INSN (insn);
3084 }
3085 \f
3086 /* Return whether a source line note needs to be emitted before INSN.
3087 Sets IS_STMT to TRUE if the line should be marked as a possible
3088 breakpoint location. */
3089
3090 static bool
3091 notice_source_line (rtx_insn *insn, bool *is_stmt)
3092 {
3093 const char *filename;
3094 int linenum, columnnum;
3095
3096 if (override_filename)
3097 {
3098 filename = override_filename;
3099 linenum = override_linenum;
3100 columnnum = override_columnnum;
3101 }
3102 else if (INSN_HAS_LOCATION (insn))
3103 {
3104 expanded_location xloc = insn_location (insn);
3105 filename = xloc.file;
3106 linenum = xloc.line;
3107 columnnum = xloc.column;
3108 }
3109 else
3110 {
3111 filename = NULL;
3112 linenum = 0;
3113 columnnum = 0;
3114 }
3115
3116 if (filename == NULL)
3117 return false;
3118
3119 if (force_source_line
3120 || filename != last_filename
3121 || last_linenum != linenum
3122 || (debug_column_info && last_columnnum != columnnum))
3123 {
3124 force_source_line = false;
3125 last_filename = filename;
3126 last_linenum = linenum;
3127 last_columnnum = columnnum;
3128 last_discriminator = discriminator;
3129 *is_stmt = true;
3130 high_block_linenum = MAX (last_linenum, high_block_linenum);
3131 high_function_linenum = MAX (last_linenum, high_function_linenum);
3132 return true;
3133 }
3134
3135 if (SUPPORTS_DISCRIMINATOR && last_discriminator != discriminator)
3136 {
3137 /* If the discriminator changed, but the line number did not,
3138 output the line table entry with is_stmt false so the
3139 debugger does not treat this as a breakpoint location. */
3140 last_discriminator = discriminator;
3141 *is_stmt = false;
3142 return true;
3143 }
3144
3145 return false;
3146 }
3147 \f
3148 /* For each operand in INSN, simplify (subreg (reg)) so that it refers
3149 directly to the desired hard register. */
3150
3151 void
3152 cleanup_subreg_operands (rtx_insn *insn)
3153 {
3154 int i;
3155 bool changed = false;
3156 extract_insn_cached (insn);
3157 for (i = 0; i < recog_data.n_operands; i++)
3158 {
3159 /* The following test cannot use recog_data.operand when testing
3160 for a SUBREG: the underlying object might have been changed
3161 already if we are inside a match_operator expression that
3162 matches the else clause. Instead we test the underlying
3163 expression directly. */
3164 if (GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
3165 {
3166 recog_data.operand[i] = alter_subreg (recog_data.operand_loc[i], true);
3167 changed = true;
3168 }
3169 else if (GET_CODE (recog_data.operand[i]) == PLUS
3170 || GET_CODE (recog_data.operand[i]) == MULT
3171 || MEM_P (recog_data.operand[i]))
3172 recog_data.operand[i] = walk_alter_subreg (recog_data.operand_loc[i], &changed);
3173 }
3174
3175 for (i = 0; i < recog_data.n_dups; i++)
3176 {
3177 if (GET_CODE (*recog_data.dup_loc[i]) == SUBREG)
3178 {
3179 *recog_data.dup_loc[i] = alter_subreg (recog_data.dup_loc[i], true);
3180 changed = true;
3181 }
3182 else if (GET_CODE (*recog_data.dup_loc[i]) == PLUS
3183 || GET_CODE (*recog_data.dup_loc[i]) == MULT
3184 || MEM_P (*recog_data.dup_loc[i]))
3185 *recog_data.dup_loc[i] = walk_alter_subreg (recog_data.dup_loc[i], &changed);
3186 }
3187 if (changed)
3188 df_insn_rescan (insn);
3189 }
3190
3191 /* If X is a SUBREG, try to replace it with a REG or a MEM, based on
3192 the thing it is a subreg of. Do it anyway if FINAL_P. */
3193
3194 rtx
3195 alter_subreg (rtx *xp, bool final_p)
3196 {
3197 rtx x = *xp;
3198 rtx y = SUBREG_REG (x);
3199
3200 /* simplify_subreg does not remove subreg from volatile references.
3201 We are required to. */
3202 if (MEM_P (y))
3203 {
3204 int offset = SUBREG_BYTE (x);
3205
3206 /* For paradoxical subregs on big-endian machines, SUBREG_BYTE
3207 contains 0 instead of the proper offset. See simplify_subreg. */
3208 if (offset == 0
3209 && GET_MODE_SIZE (GET_MODE (y)) < GET_MODE_SIZE (GET_MODE (x)))
3210 {
3211 int difference = GET_MODE_SIZE (GET_MODE (y))
3212 - GET_MODE_SIZE (GET_MODE (x));
3213 if (WORDS_BIG_ENDIAN)
3214 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
3215 if (BYTES_BIG_ENDIAN)
3216 offset += difference % UNITS_PER_WORD;
3217 }
3218
3219 if (final_p)
3220 *xp = adjust_address (y, GET_MODE (x), offset);
3221 else
3222 *xp = adjust_address_nv (y, GET_MODE (x), offset);
3223 }
3224 else if (REG_P (y) && HARD_REGISTER_P (y))
3225 {
3226 rtx new_rtx = simplify_subreg (GET_MODE (x), y, GET_MODE (y),
3227 SUBREG_BYTE (x));
3228
3229 if (new_rtx != 0)
3230 *xp = new_rtx;
3231 else if (final_p && REG_P (y))
3232 {
3233 /* Simplify_subreg can't handle some REG cases, but we have to. */
3234 unsigned int regno;
3235 HOST_WIDE_INT offset;
3236
3237 regno = subreg_regno (x);
3238 if (subreg_lowpart_p (x))
3239 offset = byte_lowpart_offset (GET_MODE (x), GET_MODE (y));
3240 else
3241 offset = SUBREG_BYTE (x);
3242 *xp = gen_rtx_REG_offset (y, GET_MODE (x), regno, offset);
3243 }
3244 }
3245
3246 return *xp;
3247 }
3248
3249 /* Do alter_subreg on all the SUBREGs contained in X. */
3250
3251 static rtx
3252 walk_alter_subreg (rtx *xp, bool *changed)
3253 {
3254 rtx x = *xp;
3255 switch (GET_CODE (x))
3256 {
3257 case PLUS:
3258 case MULT:
3259 case AND:
3260 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed);
3261 XEXP (x, 1) = walk_alter_subreg (&XEXP (x, 1), changed);
3262 break;
3263
3264 case MEM:
3265 case ZERO_EXTEND:
3266 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed);
3267 break;
3268
3269 case SUBREG:
3270 *changed = true;
3271 return alter_subreg (xp, true);
3272
3273 default:
3274 break;
3275 }
3276
3277 return *xp;
3278 }
3279 \f
3280 #if HAVE_cc0
3281
3282 /* Given BODY, the body of a jump instruction, alter the jump condition
3283 as required by the bits that are set in cc_status.flags.
3284 Not all of the bits there can be handled at this level in all cases.
3285
3286 The value is normally 0.
3287 1 means that the condition has become always true.
3288 -1 means that the condition has become always false.
3289 2 means that COND has been altered. */
3290
3291 static int
3292 alter_cond (rtx cond)
3293 {
3294 int value = 0;
3295
3296 if (cc_status.flags & CC_REVERSED)
3297 {
3298 value = 2;
3299 PUT_CODE (cond, swap_condition (GET_CODE (cond)));
3300 }
3301
3302 if (cc_status.flags & CC_INVERTED)
3303 {
3304 value = 2;
3305 PUT_CODE (cond, reverse_condition (GET_CODE (cond)));
3306 }
3307
3308 if (cc_status.flags & CC_NOT_POSITIVE)
3309 switch (GET_CODE (cond))
3310 {
3311 case LE:
3312 case LEU:
3313 case GEU:
3314 /* Jump becomes unconditional. */
3315 return 1;
3316
3317 case GT:
3318 case GTU:
3319 case LTU:
3320 /* Jump becomes no-op. */
3321 return -1;
3322
3323 case GE:
3324 PUT_CODE (cond, EQ);
3325 value = 2;
3326 break;
3327
3328 case LT:
3329 PUT_CODE (cond, NE);
3330 value = 2;
3331 break;
3332
3333 default:
3334 break;
3335 }
3336
3337 if (cc_status.flags & CC_NOT_NEGATIVE)
3338 switch (GET_CODE (cond))
3339 {
3340 case GE:
3341 case GEU:
3342 /* Jump becomes unconditional. */
3343 return 1;
3344
3345 case LT:
3346 case LTU:
3347 /* Jump becomes no-op. */
3348 return -1;
3349
3350 case LE:
3351 case LEU:
3352 PUT_CODE (cond, EQ);
3353 value = 2;
3354 break;
3355
3356 case GT:
3357 case GTU:
3358 PUT_CODE (cond, NE);
3359 value = 2;
3360 break;
3361
3362 default:
3363 break;
3364 }
3365
3366 if (cc_status.flags & CC_NO_OVERFLOW)
3367 switch (GET_CODE (cond))
3368 {
3369 case GEU:
3370 /* Jump becomes unconditional. */
3371 return 1;
3372
3373 case LEU:
3374 PUT_CODE (cond, EQ);
3375 value = 2;
3376 break;
3377
3378 case GTU:
3379 PUT_CODE (cond, NE);
3380 value = 2;
3381 break;
3382
3383 case LTU:
3384 /* Jump becomes no-op. */
3385 return -1;
3386
3387 default:
3388 break;
3389 }
3390
3391 if (cc_status.flags & (CC_Z_IN_NOT_N | CC_Z_IN_N))
3392 switch (GET_CODE (cond))
3393 {
3394 default:
3395 gcc_unreachable ();
3396
3397 case NE:
3398 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? GE : LT);
3399 value = 2;
3400 break;
3401
3402 case EQ:
3403 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? LT : GE);
3404 value = 2;
3405 break;
3406 }
3407
3408 if (cc_status.flags & CC_NOT_SIGNED)
3409 /* The flags are valid if signed condition operators are converted
3410 to unsigned. */
3411 switch (GET_CODE (cond))
3412 {
3413 case LE:
3414 PUT_CODE (cond, LEU);
3415 value = 2;
3416 break;
3417
3418 case LT:
3419 PUT_CODE (cond, LTU);
3420 value = 2;
3421 break;
3422
3423 case GT:
3424 PUT_CODE (cond, GTU);
3425 value = 2;
3426 break;
3427
3428 case GE:
3429 PUT_CODE (cond, GEU);
3430 value = 2;
3431 break;
3432
3433 default:
3434 break;
3435 }
3436
3437 return value;
3438 }
3439 #endif
3440 \f
3441 /* Report inconsistency between the assembler template and the operands.
3442 In an `asm', it's the user's fault; otherwise, the compiler's fault. */
3443
3444 void
3445 output_operand_lossage (const char *cmsgid, ...)
3446 {
3447 char *fmt_string;
3448 char *new_message;
3449 const char *pfx_str;
3450 va_list ap;
3451
3452 va_start (ap, cmsgid);
3453
3454 pfx_str = this_is_asm_operands ? _("invalid 'asm': ") : "output_operand: ";
3455 fmt_string = xasprintf ("%s%s", pfx_str, _(cmsgid));
3456 new_message = xvasprintf (fmt_string, ap);
3457
3458 if (this_is_asm_operands)
3459 error_for_asm (this_is_asm_operands, "%s", new_message);
3460 else
3461 internal_error ("%s", new_message);
3462
3463 free (fmt_string);
3464 free (new_message);
3465 va_end (ap);
3466 }
3467 \f
3468 /* Output of assembler code from a template, and its subroutines. */
3469
3470 /* Annotate the assembly with a comment describing the pattern and
3471 alternative used. */
3472
3473 static void
3474 output_asm_name (void)
3475 {
3476 if (debug_insn)
3477 {
3478 int num = INSN_CODE (debug_insn);
3479 fprintf (asm_out_file, "\t%s %d\t%s",
3480 ASM_COMMENT_START, INSN_UID (debug_insn),
3481 insn_data[num].name);
3482 if (insn_data[num].n_alternatives > 1)
3483 fprintf (asm_out_file, "/%d", which_alternative + 1);
3484
3485 if (HAVE_ATTR_length)
3486 fprintf (asm_out_file, "\t[length = %d]",
3487 get_attr_length (debug_insn));
3488
3489 /* Clear this so only the first assembler insn
3490 of any rtl insn will get the special comment for -dp. */
3491 debug_insn = 0;
3492 }
3493 }
3494
3495 /* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it
3496 or its address, return that expr . Set *PADDRESSP to 1 if the expr
3497 corresponds to the address of the object and 0 if to the object. */
3498
3499 static tree
3500 get_mem_expr_from_op (rtx op, int *paddressp)
3501 {
3502 tree expr;
3503 int inner_addressp;
3504
3505 *paddressp = 0;
3506
3507 if (REG_P (op))
3508 return REG_EXPR (op);
3509 else if (!MEM_P (op))
3510 return 0;
3511
3512 if (MEM_EXPR (op) != 0)
3513 return MEM_EXPR (op);
3514
3515 /* Otherwise we have an address, so indicate it and look at the address. */
3516 *paddressp = 1;
3517 op = XEXP (op, 0);
3518
3519 /* First check if we have a decl for the address, then look at the right side
3520 if it is a PLUS. Otherwise, strip off arithmetic and keep looking.
3521 But don't allow the address to itself be indirect. */
3522 if ((expr = get_mem_expr_from_op (op, &inner_addressp)) && ! inner_addressp)
3523 return expr;
3524 else if (GET_CODE (op) == PLUS
3525 && (expr = get_mem_expr_from_op (XEXP (op, 1), &inner_addressp)))
3526 return expr;
3527
3528 while (UNARY_P (op)
3529 || GET_RTX_CLASS (GET_CODE (op)) == RTX_BIN_ARITH)
3530 op = XEXP (op, 0);
3531
3532 expr = get_mem_expr_from_op (op, &inner_addressp);
3533 return inner_addressp ? 0 : expr;
3534 }
3535
3536 /* Output operand names for assembler instructions. OPERANDS is the
3537 operand vector, OPORDER is the order to write the operands, and NOPS
3538 is the number of operands to write. */
3539
3540 static void
3541 output_asm_operand_names (rtx *operands, int *oporder, int nops)
3542 {
3543 int wrote = 0;
3544 int i;
3545
3546 for (i = 0; i < nops; i++)
3547 {
3548 int addressp;
3549 rtx op = operands[oporder[i]];
3550 tree expr = get_mem_expr_from_op (op, &addressp);
3551
3552 fprintf (asm_out_file, "%c%s",
3553 wrote ? ',' : '\t', wrote ? "" : ASM_COMMENT_START);
3554 wrote = 1;
3555 if (expr)
3556 {
3557 fprintf (asm_out_file, "%s",
3558 addressp ? "*" : "");
3559 print_mem_expr (asm_out_file, expr);
3560 wrote = 1;
3561 }
3562 else if (REG_P (op) && ORIGINAL_REGNO (op)
3563 && ORIGINAL_REGNO (op) != REGNO (op))
3564 fprintf (asm_out_file, " tmp%i", ORIGINAL_REGNO (op));
3565 }
3566 }
3567
3568 #ifdef ASSEMBLER_DIALECT
3569 /* Helper function to parse assembler dialects in the asm string.
3570 This is called from output_asm_insn and asm_fprintf. */
3571 static const char *
3572 do_assembler_dialects (const char *p, int *dialect)
3573 {
3574 char c = *(p - 1);
3575
3576 switch (c)
3577 {
3578 case '{':
3579 {
3580 int i;
3581
3582 if (*dialect)
3583 output_operand_lossage ("nested assembly dialect alternatives");
3584 else
3585 *dialect = 1;
3586
3587 /* If we want the first dialect, do nothing. Otherwise, skip
3588 DIALECT_NUMBER of strings ending with '|'. */
3589 for (i = 0; i < dialect_number; i++)
3590 {
3591 while (*p && *p != '}')
3592 {
3593 if (*p == '|')
3594 {
3595 p++;
3596 break;
3597 }
3598
3599 /* Skip over any character after a percent sign. */
3600 if (*p == '%')
3601 p++;
3602 if (*p)
3603 p++;
3604 }
3605
3606 if (*p == '}')
3607 break;
3608 }
3609
3610 if (*p == '\0')
3611 output_operand_lossage ("unterminated assembly dialect alternative");
3612 }
3613 break;
3614
3615 case '|':
3616 if (*dialect)
3617 {
3618 /* Skip to close brace. */
3619 do
3620 {
3621 if (*p == '\0')
3622 {
3623 output_operand_lossage ("unterminated assembly dialect alternative");
3624 break;
3625 }
3626
3627 /* Skip over any character after a percent sign. */
3628 if (*p == '%' && p[1])
3629 {
3630 p += 2;
3631 continue;
3632 }
3633
3634 if (*p++ == '}')
3635 break;
3636 }
3637 while (1);
3638
3639 *dialect = 0;
3640 }
3641 else
3642 putc (c, asm_out_file);
3643 break;
3644
3645 case '}':
3646 if (! *dialect)
3647 putc (c, asm_out_file);
3648 *dialect = 0;
3649 break;
3650 default:
3651 gcc_unreachable ();
3652 }
3653
3654 return p;
3655 }
3656 #endif
3657
3658 /* Output text from TEMPLATE to the assembler output file,
3659 obeying %-directions to substitute operands taken from
3660 the vector OPERANDS.
3661
3662 %N (for N a digit) means print operand N in usual manner.
3663 %lN means require operand N to be a CODE_LABEL or LABEL_REF
3664 and print the label name with no punctuation.
3665 %cN means require operand N to be a constant
3666 and print the constant expression with no punctuation.
3667 %aN means expect operand N to be a memory address
3668 (not a memory reference!) and print a reference
3669 to that address.
3670 %nN means expect operand N to be a constant
3671 and print a constant expression for minus the value
3672 of the operand, with no other punctuation. */
3673
3674 void
3675 output_asm_insn (const char *templ, rtx *operands)
3676 {
3677 const char *p;
3678 int c;
3679 #ifdef ASSEMBLER_DIALECT
3680 int dialect = 0;
3681 #endif
3682 int oporder[MAX_RECOG_OPERANDS];
3683 char opoutput[MAX_RECOG_OPERANDS];
3684 int ops = 0;
3685
3686 /* An insn may return a null string template
3687 in a case where no assembler code is needed. */
3688 if (*templ == 0)
3689 return;
3690
3691 memset (opoutput, 0, sizeof opoutput);
3692 p = templ;
3693 putc ('\t', asm_out_file);
3694
3695 #ifdef ASM_OUTPUT_OPCODE
3696 ASM_OUTPUT_OPCODE (asm_out_file, p);
3697 #endif
3698
3699 while ((c = *p++))
3700 switch (c)
3701 {
3702 case '\n':
3703 if (flag_verbose_asm)
3704 output_asm_operand_names (operands, oporder, ops);
3705 if (flag_print_asm_name)
3706 output_asm_name ();
3707
3708 ops = 0;
3709 memset (opoutput, 0, sizeof opoutput);
3710
3711 putc (c, asm_out_file);
3712 #ifdef ASM_OUTPUT_OPCODE
3713 while ((c = *p) == '\t')
3714 {
3715 putc (c, asm_out_file);
3716 p++;
3717 }
3718 ASM_OUTPUT_OPCODE (asm_out_file, p);
3719 #endif
3720 break;
3721
3722 #ifdef ASSEMBLER_DIALECT
3723 case '{':
3724 case '}':
3725 case '|':
3726 p = do_assembler_dialects (p, &dialect);
3727 break;
3728 #endif
3729
3730 case '%':
3731 /* %% outputs a single %. %{, %} and %| print {, } and | respectively
3732 if ASSEMBLER_DIALECT defined and these characters have a special
3733 meaning as dialect delimiters.*/
3734 if (*p == '%'
3735 #ifdef ASSEMBLER_DIALECT
3736 || *p == '{' || *p == '}' || *p == '|'
3737 #endif
3738 )
3739 {
3740 putc (*p, asm_out_file);
3741 p++;
3742 }
3743 /* %= outputs a number which is unique to each insn in the entire
3744 compilation. This is useful for making local labels that are
3745 referred to more than once in a given insn. */
3746 else if (*p == '=')
3747 {
3748 p++;
3749 fprintf (asm_out_file, "%d", insn_counter);
3750 }
3751 /* % followed by a letter and some digits
3752 outputs an operand in a special way depending on the letter.
3753 Letters `acln' are implemented directly.
3754 Other letters are passed to `output_operand' so that
3755 the TARGET_PRINT_OPERAND hook can define them. */
3756 else if (ISALPHA (*p))
3757 {
3758 int letter = *p++;
3759 unsigned long opnum;
3760 char *endptr;
3761
3762 opnum = strtoul (p, &endptr, 10);
3763
3764 if (endptr == p)
3765 output_operand_lossage ("operand number missing "
3766 "after %%-letter");
3767 else if (this_is_asm_operands && opnum >= insn_noperands)
3768 output_operand_lossage ("operand number out of range");
3769 else if (letter == 'l')
3770 output_asm_label (operands[opnum]);
3771 else if (letter == 'a')
3772 output_address (VOIDmode, operands[opnum]);
3773 else if (letter == 'c')
3774 {
3775 if (CONSTANT_ADDRESS_P (operands[opnum]))
3776 output_addr_const (asm_out_file, operands[opnum]);
3777 else
3778 output_operand (operands[opnum], 'c');
3779 }
3780 else if (letter == 'n')
3781 {
3782 if (CONST_INT_P (operands[opnum]))
3783 fprintf (asm_out_file, HOST_WIDE_INT_PRINT_DEC,
3784 - INTVAL (operands[opnum]));
3785 else
3786 {
3787 putc ('-', asm_out_file);
3788 output_addr_const (asm_out_file, operands[opnum]);
3789 }
3790 }
3791 else
3792 output_operand (operands[opnum], letter);
3793
3794 if (!opoutput[opnum])
3795 oporder[ops++] = opnum;
3796 opoutput[opnum] = 1;
3797
3798 p = endptr;
3799 c = *p;
3800 }
3801 /* % followed by a digit outputs an operand the default way. */
3802 else if (ISDIGIT (*p))
3803 {
3804 unsigned long opnum;
3805 char *endptr;
3806
3807 opnum = strtoul (p, &endptr, 10);
3808 if (this_is_asm_operands && opnum >= insn_noperands)
3809 output_operand_lossage ("operand number out of range");
3810 else
3811 output_operand (operands[opnum], 0);
3812
3813 if (!opoutput[opnum])
3814 oporder[ops++] = opnum;
3815 opoutput[opnum] = 1;
3816
3817 p = endptr;
3818 c = *p;
3819 }
3820 /* % followed by punctuation: output something for that
3821 punctuation character alone, with no operand. The
3822 TARGET_PRINT_OPERAND hook decides what is actually done. */
3823 else if (targetm.asm_out.print_operand_punct_valid_p ((unsigned char) *p))
3824 output_operand (NULL_RTX, *p++);
3825 else
3826 output_operand_lossage ("invalid %%-code");
3827 break;
3828
3829 default:
3830 putc (c, asm_out_file);
3831 }
3832
3833 /* Write out the variable names for operands, if we know them. */
3834 if (flag_verbose_asm)
3835 output_asm_operand_names (operands, oporder, ops);
3836 if (flag_print_asm_name)
3837 output_asm_name ();
3838
3839 putc ('\n', asm_out_file);
3840 }
3841 \f
3842 /* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */
3843
3844 void
3845 output_asm_label (rtx x)
3846 {
3847 char buf[256];
3848
3849 if (GET_CODE (x) == LABEL_REF)
3850 x = label_ref_label (x);
3851 if (LABEL_P (x)
3852 || (NOTE_P (x)
3853 && NOTE_KIND (x) == NOTE_INSN_DELETED_LABEL))
3854 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3855 else
3856 output_operand_lossage ("'%%l' operand isn't a label");
3857
3858 assemble_name (asm_out_file, buf);
3859 }
3860
3861 /* Marks SYMBOL_REFs in x as referenced through use of assemble_external. */
3862
3863 void
3864 mark_symbol_refs_as_used (rtx x)
3865 {
3866 subrtx_iterator::array_type array;
3867 FOR_EACH_SUBRTX (iter, array, x, ALL)
3868 {
3869 const_rtx x = *iter;
3870 if (GET_CODE (x) == SYMBOL_REF)
3871 if (tree t = SYMBOL_REF_DECL (x))
3872 assemble_external (t);
3873 }
3874 }
3875
3876 /* Print operand X using machine-dependent assembler syntax.
3877 CODE is a non-digit that preceded the operand-number in the % spec,
3878 such as 'z' if the spec was `%z3'. CODE is 0 if there was no char
3879 between the % and the digits.
3880 When CODE is a non-letter, X is 0.
3881
3882 The meanings of the letters are machine-dependent and controlled
3883 by TARGET_PRINT_OPERAND. */
3884
3885 void
3886 output_operand (rtx x, int code ATTRIBUTE_UNUSED)
3887 {
3888 if (x && GET_CODE (x) == SUBREG)
3889 x = alter_subreg (&x, true);
3890
3891 /* X must not be a pseudo reg. */
3892 if (!targetm.no_register_allocation)
3893 gcc_assert (!x || !REG_P (x) || REGNO (x) < FIRST_PSEUDO_REGISTER);
3894
3895 targetm.asm_out.print_operand (asm_out_file, x, code);
3896
3897 if (x == NULL_RTX)
3898 return;
3899
3900 mark_symbol_refs_as_used (x);
3901 }
3902
3903 /* Print a memory reference operand for address X using
3904 machine-dependent assembler syntax. */
3905
3906 void
3907 output_address (machine_mode mode, rtx x)
3908 {
3909 bool changed = false;
3910 walk_alter_subreg (&x, &changed);
3911 targetm.asm_out.print_operand_address (asm_out_file, mode, x);
3912 }
3913 \f
3914 /* Print an integer constant expression in assembler syntax.
3915 Addition and subtraction are the only arithmetic
3916 that may appear in these expressions. */
3917
3918 void
3919 output_addr_const (FILE *file, rtx x)
3920 {
3921 char buf[256];
3922
3923 restart:
3924 switch (GET_CODE (x))
3925 {
3926 case PC:
3927 putc ('.', file);
3928 break;
3929
3930 case SYMBOL_REF:
3931 if (SYMBOL_REF_DECL (x))
3932 assemble_external (SYMBOL_REF_DECL (x));
3933 #ifdef ASM_OUTPUT_SYMBOL_REF
3934 ASM_OUTPUT_SYMBOL_REF (file, x);
3935 #else
3936 assemble_name (file, XSTR (x, 0));
3937 #endif
3938 break;
3939
3940 case LABEL_REF:
3941 x = label_ref_label (x);
3942 /* Fall through. */
3943 case CODE_LABEL:
3944 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3945 #ifdef ASM_OUTPUT_LABEL_REF
3946 ASM_OUTPUT_LABEL_REF (file, buf);
3947 #else
3948 assemble_name (file, buf);
3949 #endif
3950 break;
3951
3952 case CONST_INT:
3953 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x));
3954 break;
3955
3956 case CONST:
3957 /* This used to output parentheses around the expression,
3958 but that does not work on the 386 (either ATT or BSD assembler). */
3959 output_addr_const (file, XEXP (x, 0));
3960 break;
3961
3962 case CONST_WIDE_INT:
3963 /* We do not know the mode here so we have to use a round about
3964 way to build a wide-int to get it printed properly. */
3965 {
3966 wide_int w = wide_int::from_array (&CONST_WIDE_INT_ELT (x, 0),
3967 CONST_WIDE_INT_NUNITS (x),
3968 CONST_WIDE_INT_NUNITS (x)
3969 * HOST_BITS_PER_WIDE_INT,
3970 false);
3971 print_decs (w, file);
3972 }
3973 break;
3974
3975 case CONST_DOUBLE:
3976 if (CONST_DOUBLE_AS_INT_P (x))
3977 {
3978 /* We can use %d if the number is one word and positive. */
3979 if (CONST_DOUBLE_HIGH (x))
3980 fprintf (file, HOST_WIDE_INT_PRINT_DOUBLE_HEX,
3981 (unsigned HOST_WIDE_INT) CONST_DOUBLE_HIGH (x),
3982 (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (x));
3983 else if (CONST_DOUBLE_LOW (x) < 0)
3984 fprintf (file, HOST_WIDE_INT_PRINT_HEX,
3985 (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (x));
3986 else
3987 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x));
3988 }
3989 else
3990 /* We can't handle floating point constants;
3991 PRINT_OPERAND must handle them. */
3992 output_operand_lossage ("floating constant misused");
3993 break;
3994
3995 case CONST_FIXED:
3996 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_FIXED_VALUE_LOW (x));
3997 break;
3998
3999 case PLUS:
4000 /* Some assemblers need integer constants to appear last (eg masm). */
4001 if (CONST_INT_P (XEXP (x, 0)))
4002 {
4003 output_addr_const (file, XEXP (x, 1));
4004 if (INTVAL (XEXP (x, 0)) >= 0)
4005 fprintf (file, "+");
4006 output_addr_const (file, XEXP (x, 0));
4007 }
4008 else
4009 {
4010 output_addr_const (file, XEXP (x, 0));
4011 if (!CONST_INT_P (XEXP (x, 1))
4012 || INTVAL (XEXP (x, 1)) >= 0)
4013 fprintf (file, "+");
4014 output_addr_const (file, XEXP (x, 1));
4015 }
4016 break;
4017
4018 case MINUS:
4019 /* Avoid outputting things like x-x or x+5-x,
4020 since some assemblers can't handle that. */
4021 x = simplify_subtraction (x);
4022 if (GET_CODE (x) != MINUS)
4023 goto restart;
4024
4025 output_addr_const (file, XEXP (x, 0));
4026 fprintf (file, "-");
4027 if ((CONST_INT_P (XEXP (x, 1)) && INTVAL (XEXP (x, 1)) >= 0)
4028 || GET_CODE (XEXP (x, 1)) == PC
4029 || GET_CODE (XEXP (x, 1)) == SYMBOL_REF)
4030 output_addr_const (file, XEXP (x, 1));
4031 else
4032 {
4033 fputs (targetm.asm_out.open_paren, file);
4034 output_addr_const (file, XEXP (x, 1));
4035 fputs (targetm.asm_out.close_paren, file);
4036 }
4037 break;
4038
4039 case ZERO_EXTEND:
4040 case SIGN_EXTEND:
4041 case SUBREG:
4042 case TRUNCATE:
4043 output_addr_const (file, XEXP (x, 0));
4044 break;
4045
4046 default:
4047 if (targetm.asm_out.output_addr_const_extra (file, x))
4048 break;
4049
4050 output_operand_lossage ("invalid expression as operand");
4051 }
4052 }
4053 \f
4054 /* Output a quoted string. */
4055
4056 void
4057 output_quoted_string (FILE *asm_file, const char *string)
4058 {
4059 #ifdef OUTPUT_QUOTED_STRING
4060 OUTPUT_QUOTED_STRING (asm_file, string);
4061 #else
4062 char c;
4063
4064 putc ('\"', asm_file);
4065 while ((c = *string++) != 0)
4066 {
4067 if (ISPRINT (c))
4068 {
4069 if (c == '\"' || c == '\\')
4070 putc ('\\', asm_file);
4071 putc (c, asm_file);
4072 }
4073 else
4074 fprintf (asm_file, "\\%03o", (unsigned char) c);
4075 }
4076 putc ('\"', asm_file);
4077 #endif
4078 }
4079 \f
4080 /* Write a HOST_WIDE_INT number in hex form 0x1234, fast. */
4081
4082 void
4083 fprint_whex (FILE *f, unsigned HOST_WIDE_INT value)
4084 {
4085 char buf[2 + CHAR_BIT * sizeof (value) / 4];
4086 if (value == 0)
4087 putc ('0', f);
4088 else
4089 {
4090 char *p = buf + sizeof (buf);
4091 do
4092 *--p = "0123456789abcdef"[value % 16];
4093 while ((value /= 16) != 0);
4094 *--p = 'x';
4095 *--p = '0';
4096 fwrite (p, 1, buf + sizeof (buf) - p, f);
4097 }
4098 }
4099
4100 /* Internal function that prints an unsigned long in decimal in reverse.
4101 The output string IS NOT null-terminated. */
4102
4103 static int
4104 sprint_ul_rev (char *s, unsigned long value)
4105 {
4106 int i = 0;
4107 do
4108 {
4109 s[i] = "0123456789"[value % 10];
4110 value /= 10;
4111 i++;
4112 /* alternate version, without modulo */
4113 /* oldval = value; */
4114 /* value /= 10; */
4115 /* s[i] = "0123456789" [oldval - 10*value]; */
4116 /* i++ */
4117 }
4118 while (value != 0);
4119 return i;
4120 }
4121
4122 /* Write an unsigned long as decimal to a file, fast. */
4123
4124 void
4125 fprint_ul (FILE *f, unsigned long value)
4126 {
4127 /* python says: len(str(2**64)) == 20 */
4128 char s[20];
4129 int i;
4130
4131 i = sprint_ul_rev (s, value);
4132
4133 /* It's probably too small to bother with string reversal and fputs. */
4134 do
4135 {
4136 i--;
4137 putc (s[i], f);
4138 }
4139 while (i != 0);
4140 }
4141
4142 /* Write an unsigned long as decimal to a string, fast.
4143 s must be wide enough to not overflow, at least 21 chars.
4144 Returns the length of the string (without terminating '\0'). */
4145
4146 int
4147 sprint_ul (char *s, unsigned long value)
4148 {
4149 int len = sprint_ul_rev (s, value);
4150 s[len] = '\0';
4151
4152 std::reverse (s, s + len);
4153 return len;
4154 }
4155
4156 /* A poor man's fprintf, with the added features of %I, %R, %L, and %U.
4157 %R prints the value of REGISTER_PREFIX.
4158 %L prints the value of LOCAL_LABEL_PREFIX.
4159 %U prints the value of USER_LABEL_PREFIX.
4160 %I prints the value of IMMEDIATE_PREFIX.
4161 %O runs ASM_OUTPUT_OPCODE to transform what follows in the string.
4162 Also supported are %d, %i, %u, %x, %X, %o, %c, %s and %%.
4163
4164 We handle alternate assembler dialects here, just like output_asm_insn. */
4165
4166 void
4167 asm_fprintf (FILE *file, const char *p, ...)
4168 {
4169 char buf[10];
4170 char *q, c;
4171 #ifdef ASSEMBLER_DIALECT
4172 int dialect = 0;
4173 #endif
4174 va_list argptr;
4175
4176 va_start (argptr, p);
4177
4178 buf[0] = '%';
4179
4180 while ((c = *p++))
4181 switch (c)
4182 {
4183 #ifdef ASSEMBLER_DIALECT
4184 case '{':
4185 case '}':
4186 case '|':
4187 p = do_assembler_dialects (p, &dialect);
4188 break;
4189 #endif
4190
4191 case '%':
4192 c = *p++;
4193 q = &buf[1];
4194 while (strchr ("-+ #0", c))
4195 {
4196 *q++ = c;
4197 c = *p++;
4198 }
4199 while (ISDIGIT (c) || c == '.')
4200 {
4201 *q++ = c;
4202 c = *p++;
4203 }
4204 switch (c)
4205 {
4206 case '%':
4207 putc ('%', file);
4208 break;
4209
4210 case 'd': case 'i': case 'u':
4211 case 'x': case 'X': case 'o':
4212 case 'c':
4213 *q++ = c;
4214 *q = 0;
4215 fprintf (file, buf, va_arg (argptr, int));
4216 break;
4217
4218 case 'w':
4219 /* This is a prefix to the 'd', 'i', 'u', 'x', 'X', and
4220 'o' cases, but we do not check for those cases. It
4221 means that the value is a HOST_WIDE_INT, which may be
4222 either `long' or `long long'. */
4223 memcpy (q, HOST_WIDE_INT_PRINT, strlen (HOST_WIDE_INT_PRINT));
4224 q += strlen (HOST_WIDE_INT_PRINT);
4225 *q++ = *p++;
4226 *q = 0;
4227 fprintf (file, buf, va_arg (argptr, HOST_WIDE_INT));
4228 break;
4229
4230 case 'l':
4231 *q++ = c;
4232 #ifdef HAVE_LONG_LONG
4233 if (*p == 'l')
4234 {
4235 *q++ = *p++;
4236 *q++ = *p++;
4237 *q = 0;
4238 fprintf (file, buf, va_arg (argptr, long long));
4239 }
4240 else
4241 #endif
4242 {
4243 *q++ = *p++;
4244 *q = 0;
4245 fprintf (file, buf, va_arg (argptr, long));
4246 }
4247
4248 break;
4249
4250 case 's':
4251 *q++ = c;
4252 *q = 0;
4253 fprintf (file, buf, va_arg (argptr, char *));
4254 break;
4255
4256 case 'O':
4257 #ifdef ASM_OUTPUT_OPCODE
4258 ASM_OUTPUT_OPCODE (asm_out_file, p);
4259 #endif
4260 break;
4261
4262 case 'R':
4263 #ifdef REGISTER_PREFIX
4264 fprintf (file, "%s", REGISTER_PREFIX);
4265 #endif
4266 break;
4267
4268 case 'I':
4269 #ifdef IMMEDIATE_PREFIX
4270 fprintf (file, "%s", IMMEDIATE_PREFIX);
4271 #endif
4272 break;
4273
4274 case 'L':
4275 #ifdef LOCAL_LABEL_PREFIX
4276 fprintf (file, "%s", LOCAL_LABEL_PREFIX);
4277 #endif
4278 break;
4279
4280 case 'U':
4281 fputs (user_label_prefix, file);
4282 break;
4283
4284 #ifdef ASM_FPRINTF_EXTENSIONS
4285 /* Uppercase letters are reserved for general use by asm_fprintf
4286 and so are not available to target specific code. In order to
4287 prevent the ASM_FPRINTF_EXTENSIONS macro from using them then,
4288 they are defined here. As they get turned into real extensions
4289 to asm_fprintf they should be removed from this list. */
4290 case 'A': case 'B': case 'C': case 'D': case 'E':
4291 case 'F': case 'G': case 'H': case 'J': case 'K':
4292 case 'M': case 'N': case 'P': case 'Q': case 'S':
4293 case 'T': case 'V': case 'W': case 'Y': case 'Z':
4294 break;
4295
4296 ASM_FPRINTF_EXTENSIONS (file, argptr, p)
4297 #endif
4298 default:
4299 gcc_unreachable ();
4300 }
4301 break;
4302
4303 default:
4304 putc (c, file);
4305 }
4306 va_end (argptr);
4307 }
4308 \f
4309 /* Return nonzero if this function has no function calls. */
4310
4311 int
4312 leaf_function_p (void)
4313 {
4314 rtx_insn *insn;
4315
4316 /* Ensure we walk the entire function body. */
4317 gcc_assert (!in_sequence_p ());
4318
4319 /* Some back-ends (e.g. s390) want leaf functions to stay leaf
4320 functions even if they call mcount. */
4321 if (crtl->profile && !targetm.keep_leaf_when_profiled ())
4322 return 0;
4323
4324 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4325 {
4326 if (CALL_P (insn)
4327 && ! SIBLING_CALL_P (insn))
4328 return 0;
4329 if (NONJUMP_INSN_P (insn)
4330 && GET_CODE (PATTERN (insn)) == SEQUENCE
4331 && CALL_P (XVECEXP (PATTERN (insn), 0, 0))
4332 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0)))
4333 return 0;
4334 }
4335
4336 return 1;
4337 }
4338
4339 /* Return 1 if branch is a forward branch.
4340 Uses insn_shuid array, so it works only in the final pass. May be used by
4341 output templates to customary add branch prediction hints.
4342 */
4343 int
4344 final_forward_branch_p (rtx_insn *insn)
4345 {
4346 int insn_id, label_id;
4347
4348 gcc_assert (uid_shuid);
4349 insn_id = INSN_SHUID (insn);
4350 label_id = INSN_SHUID (JUMP_LABEL (insn));
4351 /* We've hit some insns that does not have id information available. */
4352 gcc_assert (insn_id && label_id);
4353 return insn_id < label_id;
4354 }
4355
4356 /* On some machines, a function with no call insns
4357 can run faster if it doesn't create its own register window.
4358 When output, the leaf function should use only the "output"
4359 registers. Ordinarily, the function would be compiled to use
4360 the "input" registers to find its arguments; it is a candidate
4361 for leaf treatment if it uses only the "input" registers.
4362 Leaf function treatment means renumbering so the function
4363 uses the "output" registers instead. */
4364
4365 #ifdef LEAF_REGISTERS
4366
4367 /* Return 1 if this function uses only the registers that can be
4368 safely renumbered. */
4369
4370 int
4371 only_leaf_regs_used (void)
4372 {
4373 int i;
4374 const char *const permitted_reg_in_leaf_functions = LEAF_REGISTERS;
4375
4376 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
4377 if ((df_regs_ever_live_p (i) || global_regs[i])
4378 && ! permitted_reg_in_leaf_functions[i])
4379 return 0;
4380
4381 if (crtl->uses_pic_offset_table
4382 && pic_offset_table_rtx != 0
4383 && REG_P (pic_offset_table_rtx)
4384 && ! permitted_reg_in_leaf_functions[REGNO (pic_offset_table_rtx)])
4385 return 0;
4386
4387 return 1;
4388 }
4389
4390 /* Scan all instructions and renumber all registers into those
4391 available in leaf functions. */
4392
4393 static void
4394 leaf_renumber_regs (rtx_insn *first)
4395 {
4396 rtx_insn *insn;
4397
4398 /* Renumber only the actual patterns.
4399 The reg-notes can contain frame pointer refs,
4400 and renumbering them could crash, and should not be needed. */
4401 for (insn = first; insn; insn = NEXT_INSN (insn))
4402 if (INSN_P (insn))
4403 leaf_renumber_regs_insn (PATTERN (insn));
4404 }
4405
4406 /* Scan IN_RTX and its subexpressions, and renumber all regs into those
4407 available in leaf functions. */
4408
4409 void
4410 leaf_renumber_regs_insn (rtx in_rtx)
4411 {
4412 int i, j;
4413 const char *format_ptr;
4414
4415 if (in_rtx == 0)
4416 return;
4417
4418 /* Renumber all input-registers into output-registers.
4419 renumbered_regs would be 1 for an output-register;
4420 they */
4421
4422 if (REG_P (in_rtx))
4423 {
4424 int newreg;
4425
4426 /* Don't renumber the same reg twice. */
4427 if (in_rtx->used)
4428 return;
4429
4430 newreg = REGNO (in_rtx);
4431 /* Don't try to renumber pseudo regs. It is possible for a pseudo reg
4432 to reach here as part of a REG_NOTE. */
4433 if (newreg >= FIRST_PSEUDO_REGISTER)
4434 {
4435 in_rtx->used = 1;
4436 return;
4437 }
4438 newreg = LEAF_REG_REMAP (newreg);
4439 gcc_assert (newreg >= 0);
4440 df_set_regs_ever_live (REGNO (in_rtx), false);
4441 df_set_regs_ever_live (newreg, true);
4442 SET_REGNO (in_rtx, newreg);
4443 in_rtx->used = 1;
4444 return;
4445 }
4446
4447 if (INSN_P (in_rtx))
4448 {
4449 /* Inside a SEQUENCE, we find insns.
4450 Renumber just the patterns of these insns,
4451 just as we do for the top-level insns. */
4452 leaf_renumber_regs_insn (PATTERN (in_rtx));
4453 return;
4454 }
4455
4456 format_ptr = GET_RTX_FORMAT (GET_CODE (in_rtx));
4457
4458 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (in_rtx)); i++)
4459 switch (*format_ptr++)
4460 {
4461 case 'e':
4462 leaf_renumber_regs_insn (XEXP (in_rtx, i));
4463 break;
4464
4465 case 'E':
4466 if (NULL != XVEC (in_rtx, i))
4467 {
4468 for (j = 0; j < XVECLEN (in_rtx, i); j++)
4469 leaf_renumber_regs_insn (XVECEXP (in_rtx, i, j));
4470 }
4471 break;
4472
4473 case 'S':
4474 case 's':
4475 case '0':
4476 case 'i':
4477 case 'w':
4478 case 'n':
4479 case 'u':
4480 break;
4481
4482 default:
4483 gcc_unreachable ();
4484 }
4485 }
4486 #endif
4487 \f
4488 /* Turn the RTL into assembly. */
4489 static unsigned int
4490 rest_of_handle_final (void)
4491 {
4492 const char *fnname = get_fnname_from_decl (current_function_decl);
4493
4494 assemble_start_function (current_function_decl, fnname);
4495 final_start_function (get_insns (), asm_out_file, optimize);
4496 final (get_insns (), asm_out_file, optimize);
4497 if (flag_ipa_ra
4498 && !lookup_attribute ("noipa", DECL_ATTRIBUTES (current_function_decl)))
4499 collect_fn_hard_reg_usage ();
4500 final_end_function ();
4501
4502 /* The IA-64 ".handlerdata" directive must be issued before the ".endp"
4503 directive that closes the procedure descriptor. Similarly, for x64 SEH.
4504 Otherwise it's not strictly necessary, but it doesn't hurt either. */
4505 output_function_exception_table (fnname);
4506
4507 assemble_end_function (current_function_decl, fnname);
4508
4509 /* Free up reg info memory. */
4510 free_reg_info ();
4511
4512 if (! quiet_flag)
4513 fflush (asm_out_file);
4514
4515 /* Write DBX symbols if requested. */
4516
4517 /* Note that for those inline functions where we don't initially
4518 know for certain that we will be generating an out-of-line copy,
4519 the first invocation of this routine (rest_of_compilation) will
4520 skip over this code by doing a `goto exit_rest_of_compilation;'.
4521 Later on, wrapup_global_declarations will (indirectly) call
4522 rest_of_compilation again for those inline functions that need
4523 to have out-of-line copies generated. During that call, we
4524 *will* be routed past here. */
4525
4526 timevar_push (TV_SYMOUT);
4527 if (!DECL_IGNORED_P (current_function_decl))
4528 debug_hooks->function_decl (current_function_decl);
4529 timevar_pop (TV_SYMOUT);
4530
4531 /* Release the blocks that are linked to DECL_INITIAL() to free the memory. */
4532 DECL_INITIAL (current_function_decl) = error_mark_node;
4533
4534 if (DECL_STATIC_CONSTRUCTOR (current_function_decl)
4535 && targetm.have_ctors_dtors)
4536 targetm.asm_out.constructor (XEXP (DECL_RTL (current_function_decl), 0),
4537 decl_init_priority_lookup
4538 (current_function_decl));
4539 if (DECL_STATIC_DESTRUCTOR (current_function_decl)
4540 && targetm.have_ctors_dtors)
4541 targetm.asm_out.destructor (XEXP (DECL_RTL (current_function_decl), 0),
4542 decl_fini_priority_lookup
4543 (current_function_decl));
4544 return 0;
4545 }
4546
4547 namespace {
4548
4549 const pass_data pass_data_final =
4550 {
4551 RTL_PASS, /* type */
4552 "final", /* name */
4553 OPTGROUP_NONE, /* optinfo_flags */
4554 TV_FINAL, /* tv_id */
4555 0, /* properties_required */
4556 0, /* properties_provided */
4557 0, /* properties_destroyed */
4558 0, /* todo_flags_start */
4559 0, /* todo_flags_finish */
4560 };
4561
4562 class pass_final : public rtl_opt_pass
4563 {
4564 public:
4565 pass_final (gcc::context *ctxt)
4566 : rtl_opt_pass (pass_data_final, ctxt)
4567 {}
4568
4569 /* opt_pass methods: */
4570 virtual unsigned int execute (function *) { return rest_of_handle_final (); }
4571
4572 }; // class pass_final
4573
4574 } // anon namespace
4575
4576 rtl_opt_pass *
4577 make_pass_final (gcc::context *ctxt)
4578 {
4579 return new pass_final (ctxt);
4580 }
4581
4582
4583 static unsigned int
4584 rest_of_handle_shorten_branches (void)
4585 {
4586 /* Shorten branches. */
4587 shorten_branches (get_insns ());
4588 return 0;
4589 }
4590
4591 namespace {
4592
4593 const pass_data pass_data_shorten_branches =
4594 {
4595 RTL_PASS, /* type */
4596 "shorten", /* name */
4597 OPTGROUP_NONE, /* optinfo_flags */
4598 TV_SHORTEN_BRANCH, /* tv_id */
4599 0, /* properties_required */
4600 0, /* properties_provided */
4601 0, /* properties_destroyed */
4602 0, /* todo_flags_start */
4603 0, /* todo_flags_finish */
4604 };
4605
4606 class pass_shorten_branches : public rtl_opt_pass
4607 {
4608 public:
4609 pass_shorten_branches (gcc::context *ctxt)
4610 : rtl_opt_pass (pass_data_shorten_branches, ctxt)
4611 {}
4612
4613 /* opt_pass methods: */
4614 virtual unsigned int execute (function *)
4615 {
4616 return rest_of_handle_shorten_branches ();
4617 }
4618
4619 }; // class pass_shorten_branches
4620
4621 } // anon namespace
4622
4623 rtl_opt_pass *
4624 make_pass_shorten_branches (gcc::context *ctxt)
4625 {
4626 return new pass_shorten_branches (ctxt);
4627 }
4628
4629
4630 static unsigned int
4631 rest_of_clean_state (void)
4632 {
4633 rtx_insn *insn, *next;
4634 FILE *final_output = NULL;
4635 int save_unnumbered = flag_dump_unnumbered;
4636 int save_noaddr = flag_dump_noaddr;
4637
4638 if (flag_dump_final_insns)
4639 {
4640 final_output = fopen (flag_dump_final_insns, "a");
4641 if (!final_output)
4642 {
4643 error ("could not open final insn dump file %qs: %m",
4644 flag_dump_final_insns);
4645 flag_dump_final_insns = NULL;
4646 }
4647 else
4648 {
4649 flag_dump_noaddr = flag_dump_unnumbered = 1;
4650 if (flag_compare_debug_opt || flag_compare_debug)
4651 dump_flags |= TDF_NOUID;
4652 dump_function_header (final_output, current_function_decl,
4653 dump_flags);
4654 final_insns_dump_p = true;
4655
4656 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4657 if (LABEL_P (insn))
4658 INSN_UID (insn) = CODE_LABEL_NUMBER (insn);
4659 else
4660 {
4661 if (NOTE_P (insn))
4662 set_block_for_insn (insn, NULL);
4663 INSN_UID (insn) = 0;
4664 }
4665 }
4666 }
4667
4668 /* It is very important to decompose the RTL instruction chain here:
4669 debug information keeps pointing into CODE_LABEL insns inside the function
4670 body. If these remain pointing to the other insns, we end up preserving
4671 whole RTL chain and attached detailed debug info in memory. */
4672 for (insn = get_insns (); insn; insn = next)
4673 {
4674 next = NEXT_INSN (insn);
4675 SET_NEXT_INSN (insn) = NULL;
4676 SET_PREV_INSN (insn) = NULL;
4677
4678 if (final_output
4679 && (!NOTE_P (insn) ||
4680 (NOTE_KIND (insn) != NOTE_INSN_VAR_LOCATION
4681 && NOTE_KIND (insn) != NOTE_INSN_CALL_ARG_LOCATION
4682 && NOTE_KIND (insn) != NOTE_INSN_BLOCK_BEG
4683 && NOTE_KIND (insn) != NOTE_INSN_BLOCK_END
4684 && NOTE_KIND (insn) != NOTE_INSN_DELETED_DEBUG_LABEL)))
4685 print_rtl_single (final_output, insn);
4686 }
4687
4688 if (final_output)
4689 {
4690 flag_dump_noaddr = save_noaddr;
4691 flag_dump_unnumbered = save_unnumbered;
4692 final_insns_dump_p = false;
4693
4694 if (fclose (final_output))
4695 {
4696 error ("could not close final insn dump file %qs: %m",
4697 flag_dump_final_insns);
4698 flag_dump_final_insns = NULL;
4699 }
4700 }
4701
4702 /* In case the function was not output,
4703 don't leave any temporary anonymous types
4704 queued up for sdb output. */
4705 if (SDB_DEBUGGING_INFO && write_symbols == SDB_DEBUG)
4706 sdbout_types (NULL_TREE);
4707
4708 flag_rerun_cse_after_global_opts = 0;
4709 reload_completed = 0;
4710 epilogue_completed = 0;
4711 #ifdef STACK_REGS
4712 regstack_completed = 0;
4713 #endif
4714
4715 /* Clear out the insn_length contents now that they are no
4716 longer valid. */
4717 init_insn_lengths ();
4718
4719 /* Show no temporary slots allocated. */
4720 init_temp_slots ();
4721
4722 free_bb_for_insn ();
4723
4724 if (cfun->gimple_df)
4725 delete_tree_ssa (cfun);
4726
4727 /* We can reduce stack alignment on call site only when we are sure that
4728 the function body just produced will be actually used in the final
4729 executable. */
4730 if (decl_binds_to_current_def_p (current_function_decl))
4731 {
4732 unsigned int pref = crtl->preferred_stack_boundary;
4733 if (crtl->stack_alignment_needed > crtl->preferred_stack_boundary)
4734 pref = crtl->stack_alignment_needed;
4735 cgraph_node::rtl_info (current_function_decl)
4736 ->preferred_incoming_stack_boundary = pref;
4737 }
4738
4739 /* Make sure volatile mem refs aren't considered valid operands for
4740 arithmetic insns. We must call this here if this is a nested inline
4741 function, since the above code leaves us in the init_recog state,
4742 and the function context push/pop code does not save/restore volatile_ok.
4743
4744 ??? Maybe it isn't necessary for expand_start_function to call this
4745 anymore if we do it here? */
4746
4747 init_recog_no_volatile ();
4748
4749 /* We're done with this function. Free up memory if we can. */
4750 free_after_parsing (cfun);
4751 free_after_compilation (cfun);
4752 return 0;
4753 }
4754
4755 namespace {
4756
4757 const pass_data pass_data_clean_state =
4758 {
4759 RTL_PASS, /* type */
4760 "*clean_state", /* name */
4761 OPTGROUP_NONE, /* optinfo_flags */
4762 TV_FINAL, /* tv_id */
4763 0, /* properties_required */
4764 0, /* properties_provided */
4765 PROP_rtl, /* properties_destroyed */
4766 0, /* todo_flags_start */
4767 0, /* todo_flags_finish */
4768 };
4769
4770 class pass_clean_state : public rtl_opt_pass
4771 {
4772 public:
4773 pass_clean_state (gcc::context *ctxt)
4774 : rtl_opt_pass (pass_data_clean_state, ctxt)
4775 {}
4776
4777 /* opt_pass methods: */
4778 virtual unsigned int execute (function *)
4779 {
4780 return rest_of_clean_state ();
4781 }
4782
4783 }; // class pass_clean_state
4784
4785 } // anon namespace
4786
4787 rtl_opt_pass *
4788 make_pass_clean_state (gcc::context *ctxt)
4789 {
4790 return new pass_clean_state (ctxt);
4791 }
4792
4793 /* Return true if INSN is a call to the current function. */
4794
4795 static bool
4796 self_recursive_call_p (rtx_insn *insn)
4797 {
4798 tree fndecl = get_call_fndecl (insn);
4799 return (fndecl == current_function_decl
4800 && decl_binds_to_current_def_p (fndecl));
4801 }
4802
4803 /* Collect hard register usage for the current function. */
4804
4805 static void
4806 collect_fn_hard_reg_usage (void)
4807 {
4808 rtx_insn *insn;
4809 #ifdef STACK_REGS
4810 int i;
4811 #endif
4812 struct cgraph_rtl_info *node;
4813 HARD_REG_SET function_used_regs;
4814
4815 /* ??? To be removed when all the ports have been fixed. */
4816 if (!targetm.call_fusage_contains_non_callee_clobbers)
4817 return;
4818
4819 CLEAR_HARD_REG_SET (function_used_regs);
4820
4821 for (insn = get_insns (); insn != NULL_RTX; insn = next_insn (insn))
4822 {
4823 HARD_REG_SET insn_used_regs;
4824
4825 if (!NONDEBUG_INSN_P (insn))
4826 continue;
4827
4828 if (CALL_P (insn)
4829 && !self_recursive_call_p (insn))
4830 {
4831 if (!get_call_reg_set_usage (insn, &insn_used_regs,
4832 call_used_reg_set))
4833 return;
4834
4835 IOR_HARD_REG_SET (function_used_regs, insn_used_regs);
4836 }
4837
4838 find_all_hard_reg_sets (insn, &insn_used_regs, false);
4839 IOR_HARD_REG_SET (function_used_regs, insn_used_regs);
4840 }
4841
4842 /* Be conservative - mark fixed and global registers as used. */
4843 IOR_HARD_REG_SET (function_used_regs, fixed_reg_set);
4844
4845 #ifdef STACK_REGS
4846 /* Handle STACK_REGS conservatively, since the df-framework does not
4847 provide accurate information for them. */
4848
4849 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
4850 SET_HARD_REG_BIT (function_used_regs, i);
4851 #endif
4852
4853 /* The information we have gathered is only interesting if it exposes a
4854 register from the call_used_regs that is not used in this function. */
4855 if (hard_reg_set_subset_p (call_used_reg_set, function_used_regs))
4856 return;
4857
4858 node = cgraph_node::rtl_info (current_function_decl);
4859 gcc_assert (node != NULL);
4860
4861 COPY_HARD_REG_SET (node->function_used_regs, function_used_regs);
4862 node->function_used_regs_valid = 1;
4863 }
4864
4865 /* Get the declaration of the function called by INSN. */
4866
4867 static tree
4868 get_call_fndecl (rtx_insn *insn)
4869 {
4870 rtx note, datum;
4871
4872 note = find_reg_note (insn, REG_CALL_DECL, NULL_RTX);
4873 if (note == NULL_RTX)
4874 return NULL_TREE;
4875
4876 datum = XEXP (note, 0);
4877 if (datum != NULL_RTX)
4878 return SYMBOL_REF_DECL (datum);
4879
4880 return NULL_TREE;
4881 }
4882
4883 /* Return the cgraph_rtl_info of the function called by INSN. Returns NULL for
4884 call targets that can be overwritten. */
4885
4886 static struct cgraph_rtl_info *
4887 get_call_cgraph_rtl_info (rtx_insn *insn)
4888 {
4889 tree fndecl;
4890
4891 if (insn == NULL_RTX)
4892 return NULL;
4893
4894 fndecl = get_call_fndecl (insn);
4895 if (fndecl == NULL_TREE
4896 || !decl_binds_to_current_def_p (fndecl))
4897 return NULL;
4898
4899 return cgraph_node::rtl_info (fndecl);
4900 }
4901
4902 /* Find hard registers used by function call instruction INSN, and return them
4903 in REG_SET. Return DEFAULT_SET in REG_SET if not found. */
4904
4905 bool
4906 get_call_reg_set_usage (rtx_insn *insn, HARD_REG_SET *reg_set,
4907 HARD_REG_SET default_set)
4908 {
4909 if (flag_ipa_ra)
4910 {
4911 struct cgraph_rtl_info *node = get_call_cgraph_rtl_info (insn);
4912 if (node != NULL
4913 && node->function_used_regs_valid)
4914 {
4915 COPY_HARD_REG_SET (*reg_set, node->function_used_regs);
4916 AND_HARD_REG_SET (*reg_set, default_set);
4917 return true;
4918 }
4919 }
4920
4921 COPY_HARD_REG_SET (*reg_set, default_set);
4922 return false;
4923 }