avr.c (asm_output_section_name): output section attributes.
[gcc.git] / gcc / final.c
1 /* Convert RTL to assembler code and output it, for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000 Free Software Foundation, Inc.
4
5 This file is part of GNU CC.
6
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
10 any later version.
11
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
21
22
23 /* This is the final pass of the compiler.
24 It looks at the rtl code for a function and outputs assembler code.
25
26 Call `final_start_function' to output the assembler code for function entry,
27 `final' to output assembler code for some RTL code,
28 `final_end_function' to output assembler code for function exit.
29 If a function is compiled in several pieces, each piece is
30 output separately with `final'.
31
32 Some optimizations are also done at this level.
33 Move instructions that were made unnecessary by good register allocation
34 are detected and omitted from the output. (Though most of these
35 are removed by the last jump pass.)
36
37 Instructions to set the condition codes are omitted when it can be
38 seen that the condition codes already had the desired values.
39
40 In some cases it is sufficient if the inherited condition codes
41 have related values, but this may require the following insn
42 (the one that tests the condition codes) to be modified.
43
44 The code for the function prologue and epilogue are generated
45 directly as assembler code by the macros FUNCTION_PROLOGUE and
46 FUNCTION_EPILOGUE. Those instructions never exist as rtl. */
47
48 #include "config.h"
49 #include "system.h"
50
51 #include "tree.h"
52 #include "rtl.h"
53 #include "tm_p.h"
54 #include "regs.h"
55 #include "insn-config.h"
56 #include "insn-flags.h"
57 #include "insn-attr.h"
58 #include "insn-codes.h"
59 #include "recog.h"
60 #include "conditions.h"
61 #include "flags.h"
62 #include "real.h"
63 #include "hard-reg-set.h"
64 #include "defaults.h"
65 #include "output.h"
66 #include "except.h"
67 #include "function.h"
68 #include "toplev.h"
69 #include "reload.h"
70 #include "intl.h"
71 #include "basic-block.h"
72
73 /* Get N_SLINE and N_SOL from stab.h if we can expect the file to exist. */
74 #if defined (DBX_DEBUGGING_INFO) || defined (XCOFF_DEBUGGING_INFO)
75 #include "dbxout.h"
76 #if defined (USG) || !defined (HAVE_STAB_H)
77 #include "gstab.h" /* If doing DBX on sysV, use our own stab.h. */
78 #else
79 #include <stab.h>
80 #endif
81
82 #endif /* DBX_DEBUGGING_INFO || XCOFF_DEBUGGING_INFO */
83
84 #ifndef ACCUMULATE_OUTGOING_ARGS
85 #define ACCUMULATE_OUTGOING_ARGS 0
86 #endif
87
88 #ifdef XCOFF_DEBUGGING_INFO
89 #include "xcoffout.h"
90 #endif
91
92 #ifdef DWARF_DEBUGGING_INFO
93 #include "dwarfout.h"
94 #endif
95
96 #if defined (DWARF2_UNWIND_INFO) || defined (DWARF2_DEBUGGING_INFO)
97 #include "dwarf2out.h"
98 #endif
99
100 #ifdef SDB_DEBUGGING_INFO
101 #include "sdbout.h"
102 #endif
103
104 /* .stabd code for line number. */
105 #ifndef N_SLINE
106 #define N_SLINE 0x44
107 #endif
108
109 /* .stabs code for included file name. */
110 #ifndef N_SOL
111 #define N_SOL 0x84
112 #endif
113
114 #ifndef INT_TYPE_SIZE
115 #define INT_TYPE_SIZE BITS_PER_WORD
116 #endif
117
118 #ifndef LONG_TYPE_SIZE
119 #define LONG_TYPE_SIZE BITS_PER_WORD
120 #endif
121
122 /* If we aren't using cc0, CC_STATUS_INIT shouldn't exist. So define a
123 null default for it to save conditionalization later. */
124 #ifndef CC_STATUS_INIT
125 #define CC_STATUS_INIT
126 #endif
127
128 /* How to start an assembler comment. */
129 #ifndef ASM_COMMENT_START
130 #define ASM_COMMENT_START ";#"
131 #endif
132
133 /* Is the given character a logical line separator for the assembler? */
134 #ifndef IS_ASM_LOGICAL_LINE_SEPARATOR
135 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C) ((C) == ';')
136 #endif
137
138 #ifndef JUMP_TABLES_IN_TEXT_SECTION
139 #define JUMP_TABLES_IN_TEXT_SECTION 0
140 #endif
141
142 /* Last insn processed by final_scan_insn. */
143 static rtx debug_insn;
144 rtx current_output_insn;
145
146 /* Line number of last NOTE. */
147 static int last_linenum;
148
149 /* Highest line number in current block. */
150 static int high_block_linenum;
151
152 /* Likewise for function. */
153 static int high_function_linenum;
154
155 /* Filename of last NOTE. */
156 static const char *last_filename;
157
158 /* Number of basic blocks seen so far;
159 used if profile_block_flag is set. */
160 static int count_basic_blocks;
161
162 /* Number of instrumented arcs when profile_arc_flag is set. */
163 extern int count_instrumented_edges;
164
165 extern int length_unit_log; /* This is defined in insn-attrtab.c. */
166
167 /* Nonzero while outputting an `asm' with operands.
168 This means that inconsistencies are the user's fault, so don't abort.
169 The precise value is the insn being output, to pass to error_for_asm. */
170 static rtx this_is_asm_operands;
171
172 /* Number of operands of this insn, for an `asm' with operands. */
173 static unsigned int insn_noperands;
174
175 /* Compare optimization flag. */
176
177 static rtx last_ignored_compare = 0;
178
179 /* Flag indicating this insn is the start of a new basic block. */
180
181 static int new_block = 1;
182
183 /* Assign a unique number to each insn that is output.
184 This can be used to generate unique local labels. */
185
186 static int insn_counter = 0;
187
188 #ifdef HAVE_cc0
189 /* This variable contains machine-dependent flags (defined in tm.h)
190 set and examined by output routines
191 that describe how to interpret the condition codes properly. */
192
193 CC_STATUS cc_status;
194
195 /* During output of an insn, this contains a copy of cc_status
196 from before the insn. */
197
198 CC_STATUS cc_prev_status;
199 #endif
200
201 /* Indexed by hardware reg number, is 1 if that register is ever
202 used in the current function.
203
204 In life_analysis, or in stupid_life_analysis, this is set
205 up to record the hard regs used explicitly. Reload adds
206 in the hard regs used for holding pseudo regs. Final uses
207 it to generate the code in the function prologue and epilogue
208 to save and restore registers as needed. */
209
210 char regs_ever_live[FIRST_PSEUDO_REGISTER];
211
212 /* Nonzero means current function must be given a frame pointer.
213 Set in stmt.c if anything is allocated on the stack there.
214 Set in reload1.c if anything is allocated on the stack there. */
215
216 int frame_pointer_needed;
217
218 /* Assign unique numbers to labels generated for profiling. */
219
220 int profile_label_no;
221
222 /* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */
223
224 static int block_depth;
225
226 /* Nonzero if have enabled APP processing of our assembler output. */
227
228 static int app_on;
229
230 /* If we are outputting an insn sequence, this contains the sequence rtx.
231 Zero otherwise. */
232
233 rtx final_sequence;
234
235 #ifdef ASSEMBLER_DIALECT
236
237 /* Number of the assembler dialect to use, starting at 0. */
238 static int dialect_number;
239 #endif
240
241 /* Indexed by line number, nonzero if there is a note for that line. */
242
243 static char *line_note_exists;
244
245 #ifdef HAVE_conditional_execution
246 /* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */
247 rtx current_insn_predicate;
248 #endif
249
250 /* Linked list to hold line numbers for each basic block. */
251
252 struct bb_list {
253 struct bb_list *next; /* pointer to next basic block */
254 int line_num; /* line number */
255 int file_label_num; /* LPBC<n> label # for stored filename */
256 int func_label_num; /* LPBC<n> label # for stored function name */
257 };
258
259 static struct bb_list *bb_head = 0; /* Head of basic block list */
260 static struct bb_list **bb_tail = &bb_head; /* Ptr to store next bb ptr */
261 static int bb_file_label_num = -1; /* Current label # for file */
262 static int bb_func_label_num = -1; /* Current label # for func */
263
264 /* Linked list to hold the strings for each file and function name output. */
265
266 struct bb_str {
267 struct bb_str *next; /* pointer to next string */
268 const char *string; /* string */
269 int label_num; /* label number */
270 int length; /* string length */
271 };
272
273 static struct bb_str *sbb_head = 0; /* Head of string list. */
274 static struct bb_str **sbb_tail = &sbb_head; /* Ptr to store next bb str */
275 static int sbb_label_num = 0; /* Last label used */
276
277 #ifdef HAVE_ATTR_length
278 static int asm_insn_count PARAMS ((rtx));
279 #endif
280 static void profile_function PARAMS ((FILE *));
281 static void profile_after_prologue PARAMS ((FILE *));
282 static void add_bb PARAMS ((FILE *));
283 static int add_bb_string PARAMS ((const char *, int));
284 static void output_source_line PARAMS ((FILE *, rtx));
285 static rtx walk_alter_subreg PARAMS ((rtx));
286 static void output_asm_name PARAMS ((void));
287 static void output_operand PARAMS ((rtx, int));
288 #ifdef LEAF_REGISTERS
289 static void leaf_renumber_regs PARAMS ((rtx));
290 #endif
291 #ifdef HAVE_cc0
292 static int alter_cond PARAMS ((rtx));
293 #endif
294 #ifndef ADDR_VEC_ALIGN
295 static int final_addr_vec_align PARAMS ((rtx));
296 #endif
297 #ifdef HAVE_ATTR_length
298 static int align_fuzz PARAMS ((rtx, rtx, int, unsigned));
299 #endif
300 \f
301 /* Initialize data in final at the beginning of a compilation. */
302
303 void
304 init_final (filename)
305 const char *filename ATTRIBUTE_UNUSED;
306 {
307 app_on = 0;
308 final_sequence = 0;
309
310 #ifdef ASSEMBLER_DIALECT
311 dialect_number = ASSEMBLER_DIALECT;
312 #endif
313 }
314
315 /* Called at end of source file,
316 to output the block-profiling table for this entire compilation. */
317
318 void
319 end_final (filename)
320 const char *filename;
321 {
322 int i;
323
324 if (profile_block_flag || profile_arc_flag)
325 {
326 char name[20];
327 int align = exact_log2 (BIGGEST_ALIGNMENT / BITS_PER_UNIT);
328 int size, rounded;
329 struct bb_list *ptr;
330 struct bb_str *sptr;
331 int long_bytes = LONG_TYPE_SIZE / BITS_PER_UNIT;
332 int pointer_bytes = POINTER_SIZE / BITS_PER_UNIT;
333
334 if (profile_block_flag)
335 size = long_bytes * count_basic_blocks;
336 else
337 size = long_bytes * count_instrumented_edges;
338 rounded = size;
339
340 rounded += (BIGGEST_ALIGNMENT / BITS_PER_UNIT) - 1;
341 rounded = (rounded / (BIGGEST_ALIGNMENT / BITS_PER_UNIT)
342 * (BIGGEST_ALIGNMENT / BITS_PER_UNIT));
343
344 data_section ();
345
346 /* Output the main header, of 11 words:
347 0: 1 if this file is initialized, else 0.
348 1: address of file name (LPBX1).
349 2: address of table of counts (LPBX2).
350 3: number of counts in the table.
351 4: always 0, for compatibility with Sun.
352
353 The following are GNU extensions:
354
355 5: address of table of start addrs of basic blocks (LPBX3).
356 6: Number of bytes in this header.
357 7: address of table of function names (LPBX4).
358 8: address of table of line numbers (LPBX5) or 0.
359 9: address of table of file names (LPBX6) or 0.
360 10: space reserved for basic block profiling. */
361
362 ASM_OUTPUT_ALIGN (asm_out_file, align);
363
364 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 0);
365 /* zero word */
366 assemble_integer (const0_rtx, long_bytes, 1);
367
368 /* address of filename */
369 ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 1);
370 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name), pointer_bytes, 1);
371
372 /* address of count table */
373 ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 2);
374 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name), pointer_bytes, 1);
375
376 /* count of the # of basic blocks or # of instrumented arcs */
377 if (profile_block_flag)
378 assemble_integer (GEN_INT (count_basic_blocks), long_bytes, 1);
379 else
380 assemble_integer (GEN_INT (count_instrumented_edges), long_bytes, 1);
381
382 /* zero word (link field) */
383 assemble_integer (const0_rtx, pointer_bytes, 1);
384
385 /* address of basic block start address table */
386 if (profile_block_flag)
387 {
388 ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 3);
389 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name), pointer_bytes,
390 1);
391 }
392 else
393 assemble_integer (const0_rtx, pointer_bytes, 1);
394
395 /* byte count for extended structure. */
396 assemble_integer (GEN_INT (11 * UNITS_PER_WORD), long_bytes, 1);
397
398 /* address of function name table */
399 if (profile_block_flag)
400 {
401 ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 4);
402 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name), pointer_bytes,
403 1);
404 }
405 else
406 assemble_integer (const0_rtx, pointer_bytes, 1);
407
408 /* address of line number and filename tables if debugging. */
409 if (write_symbols != NO_DEBUG && profile_block_flag)
410 {
411 ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 5);
412 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name),
413 pointer_bytes, 1);
414 ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 6);
415 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name),
416 pointer_bytes, 1);
417 }
418 else
419 {
420 assemble_integer (const0_rtx, pointer_bytes, 1);
421 assemble_integer (const0_rtx, pointer_bytes, 1);
422 }
423
424 /* space for extension ptr (link field) */
425 assemble_integer (const0_rtx, UNITS_PER_WORD, 1);
426
427 /* Output the file name changing the suffix to .d for Sun tcov
428 compatibility. */
429 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 1);
430 {
431 char *cwd = getpwd ();
432 int len = strlen (filename) + strlen (cwd) + 1;
433 char *data_file = (char *) alloca (len + 4);
434
435 strcpy (data_file, cwd);
436 strcat (data_file, "/");
437 strcat (data_file, filename);
438 strip_off_ending (data_file, len);
439 if (profile_block_flag)
440 strcat (data_file, ".d");
441 else
442 strcat (data_file, ".da");
443 assemble_string (data_file, strlen (data_file) + 1);
444 }
445
446 /* Make space for the table of counts. */
447 if (size == 0)
448 {
449 /* Realign data section. */
450 ASM_OUTPUT_ALIGN (asm_out_file, align);
451 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 2);
452 if (size != 0)
453 assemble_zeros (size);
454 }
455 else
456 {
457 ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 2);
458 #ifdef ASM_OUTPUT_SHARED_LOCAL
459 if (flag_shared_data)
460 ASM_OUTPUT_SHARED_LOCAL (asm_out_file, name, size, rounded);
461 else
462 #endif
463 #ifdef ASM_OUTPUT_ALIGNED_DECL_LOCAL
464 ASM_OUTPUT_ALIGNED_DECL_LOCAL (asm_out_file, NULL_TREE, name, size,
465 BIGGEST_ALIGNMENT);
466 #else
467 #ifdef ASM_OUTPUT_ALIGNED_LOCAL
468 ASM_OUTPUT_ALIGNED_LOCAL (asm_out_file, name, size,
469 BIGGEST_ALIGNMENT);
470 #else
471 ASM_OUTPUT_LOCAL (asm_out_file, name, size, rounded);
472 #endif
473 #endif
474 }
475
476 /* Output any basic block strings */
477 if (profile_block_flag)
478 {
479 readonly_data_section ();
480 if (sbb_head)
481 {
482 ASM_OUTPUT_ALIGN (asm_out_file, align);
483 for (sptr = sbb_head; sptr != 0; sptr = sptr->next)
484 {
485 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBC",
486 sptr->label_num);
487 assemble_string (sptr->string, sptr->length);
488 }
489 }
490 }
491
492 /* Output the table of addresses. */
493 if (profile_block_flag)
494 {
495 /* Realign in new section */
496 ASM_OUTPUT_ALIGN (asm_out_file, align);
497 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 3);
498 for (i = 0; i < count_basic_blocks; i++)
499 {
500 ASM_GENERATE_INTERNAL_LABEL (name, "LPB", i);
501 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name),
502 pointer_bytes, 1);
503 }
504 }
505
506 /* Output the table of function names. */
507 if (profile_block_flag)
508 {
509 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 4);
510 for ((ptr = bb_head), (i = 0); ptr != 0; (ptr = ptr->next), i++)
511 {
512 if (ptr->func_label_num >= 0)
513 {
514 ASM_GENERATE_INTERNAL_LABEL (name, "LPBC",
515 ptr->func_label_num);
516 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name),
517 pointer_bytes, 1);
518 }
519 else
520 assemble_integer (const0_rtx, pointer_bytes, 1);
521 }
522
523 for ( ; i < count_basic_blocks; i++)
524 assemble_integer (const0_rtx, pointer_bytes, 1);
525 }
526
527 if (write_symbols != NO_DEBUG && profile_block_flag)
528 {
529 /* Output the table of line numbers. */
530 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 5);
531 for ((ptr = bb_head), (i = 0); ptr != 0; (ptr = ptr->next), i++)
532 assemble_integer (GEN_INT (ptr->line_num), long_bytes, 1);
533
534 for ( ; i < count_basic_blocks; i++)
535 assemble_integer (const0_rtx, long_bytes, 1);
536
537 /* Output the table of file names. */
538 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 6);
539 for ((ptr = bb_head), (i = 0); ptr != 0; (ptr = ptr->next), i++)
540 {
541 if (ptr->file_label_num >= 0)
542 {
543 ASM_GENERATE_INTERNAL_LABEL (name, "LPBC",
544 ptr->file_label_num);
545 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name),
546 pointer_bytes, 1);
547 }
548 else
549 assemble_integer (const0_rtx, pointer_bytes, 1);
550 }
551
552 for ( ; i < count_basic_blocks; i++)
553 assemble_integer (const0_rtx, pointer_bytes, 1);
554 }
555
556 /* End with the address of the table of addresses,
557 so we can find it easily, as the last word in the file's text. */
558 if (profile_block_flag)
559 {
560 ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 3);
561 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name), pointer_bytes,
562 1);
563 }
564 }
565 }
566
567 /* Enable APP processing of subsequent output.
568 Used before the output from an `asm' statement. */
569
570 void
571 app_enable ()
572 {
573 if (! app_on)
574 {
575 fputs (ASM_APP_ON, asm_out_file);
576 app_on = 1;
577 }
578 }
579
580 /* Disable APP processing of subsequent output.
581 Called from varasm.c before most kinds of output. */
582
583 void
584 app_disable ()
585 {
586 if (app_on)
587 {
588 fputs (ASM_APP_OFF, asm_out_file);
589 app_on = 0;
590 }
591 }
592 \f
593 /* Return the number of slots filled in the current
594 delayed branch sequence (we don't count the insn needing the
595 delay slot). Zero if not in a delayed branch sequence. */
596
597 #ifdef DELAY_SLOTS
598 int
599 dbr_sequence_length ()
600 {
601 if (final_sequence != 0)
602 return XVECLEN (final_sequence, 0) - 1;
603 else
604 return 0;
605 }
606 #endif
607 \f
608 /* The next two pages contain routines used to compute the length of an insn
609 and to shorten branches. */
610
611 /* Arrays for insn lengths, and addresses. The latter is referenced by
612 `insn_current_length'. */
613
614 static short *insn_lengths;
615 int *insn_addresses;
616
617 /* Max uid for which the above arrays are valid. */
618 static int insn_lengths_max_uid;
619
620 /* Address of insn being processed. Used by `insn_current_length'. */
621 int insn_current_address;
622
623 /* Address of insn being processed in previous iteration. */
624 int insn_last_address;
625
626 /* konwn invariant alignment of insn being processed. */
627 int insn_current_align;
628
629 /* After shorten_branches, for any insn, uid_align[INSN_UID (insn)]
630 gives the next following alignment insn that increases the known
631 alignment, or NULL_RTX if there is no such insn.
632 For any alignment obtained this way, we can again index uid_align with
633 its uid to obtain the next following align that in turn increases the
634 alignment, till we reach NULL_RTX; the sequence obtained this way
635 for each insn we'll call the alignment chain of this insn in the following
636 comments. */
637
638 struct label_alignment {
639 short alignment;
640 short max_skip;
641 };
642
643 static rtx *uid_align;
644 static int *uid_shuid;
645 static struct label_alignment *label_align;
646
647 /* Indicate that branch shortening hasn't yet been done. */
648
649 void
650 init_insn_lengths ()
651 {
652 if (label_align)
653 {
654 free (label_align);
655 label_align = 0;
656 }
657 if (uid_shuid)
658 {
659 free (uid_shuid);
660 uid_shuid = 0;
661 }
662 if (insn_lengths)
663 {
664 free (insn_lengths);
665 insn_lengths = 0;
666 insn_lengths_max_uid = 0;
667 }
668 if (insn_addresses)
669 {
670 free (insn_addresses);
671 insn_addresses = 0;
672 }
673 if (uid_align)
674 {
675 free (uid_align);
676 uid_align = 0;
677 }
678 }
679
680 /* Obtain the current length of an insn. If branch shortening has been done,
681 get its actual length. Otherwise, get its maximum length. */
682
683 int
684 get_attr_length (insn)
685 rtx insn ATTRIBUTE_UNUSED;
686 {
687 #ifdef HAVE_ATTR_length
688 rtx body;
689 int i;
690 int length = 0;
691
692 if (insn_lengths_max_uid > INSN_UID (insn))
693 return insn_lengths[INSN_UID (insn)];
694 else
695 switch (GET_CODE (insn))
696 {
697 case NOTE:
698 case BARRIER:
699 case CODE_LABEL:
700 return 0;
701
702 case CALL_INSN:
703 length = insn_default_length (insn);
704 break;
705
706 case JUMP_INSN:
707 body = PATTERN (insn);
708 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
709 {
710 /* Alignment is machine-dependent and should be handled by
711 ADDR_VEC_ALIGN. */
712 }
713 else
714 length = insn_default_length (insn);
715 break;
716
717 case INSN:
718 body = PATTERN (insn);
719 if (GET_CODE (body) == USE || GET_CODE (body) == CLOBBER)
720 return 0;
721
722 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
723 length = asm_insn_count (body) * insn_default_length (insn);
724 else if (GET_CODE (body) == SEQUENCE)
725 for (i = 0; i < XVECLEN (body, 0); i++)
726 length += get_attr_length (XVECEXP (body, 0, i));
727 else
728 length = insn_default_length (insn);
729 break;
730
731 default:
732 break;
733 }
734
735 #ifdef ADJUST_INSN_LENGTH
736 ADJUST_INSN_LENGTH (insn, length);
737 #endif
738 return length;
739 #else /* not HAVE_ATTR_length */
740 return 0;
741 #endif /* not HAVE_ATTR_length */
742 }
743 \f
744 /* Code to handle alignment inside shorten_branches. */
745
746 /* Here is an explanation how the algorithm in align_fuzz can give
747 proper results:
748
749 Call a sequence of instructions beginning with alignment point X
750 and continuing until the next alignment point `block X'. When `X'
751 is used in an expression, it means the alignment value of the
752 alignment point.
753
754 Call the distance between the start of the first insn of block X, and
755 the end of the last insn of block X `IX', for the `inner size of X'.
756 This is clearly the sum of the instruction lengths.
757
758 Likewise with the next alignment-delimited block following X, which we
759 shall call block Y.
760
761 Call the distance between the start of the first insn of block X, and
762 the start of the first insn of block Y `OX', for the `outer size of X'.
763
764 The estimated padding is then OX - IX.
765
766 OX can be safely estimated as
767
768 if (X >= Y)
769 OX = round_up(IX, Y)
770 else
771 OX = round_up(IX, X) + Y - X
772
773 Clearly est(IX) >= real(IX), because that only depends on the
774 instruction lengths, and those being overestimated is a given.
775
776 Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so
777 we needn't worry about that when thinking about OX.
778
779 When X >= Y, the alignment provided by Y adds no uncertainty factor
780 for branch ranges starting before X, so we can just round what we have.
781 But when X < Y, we don't know anything about the, so to speak,
782 `middle bits', so we have to assume the worst when aligning up from an
783 address mod X to one mod Y, which is Y - X. */
784
785 #ifndef LABEL_ALIGN
786 #define LABEL_ALIGN(LABEL) align_labels_log
787 #endif
788
789 #ifndef LABEL_ALIGN_MAX_SKIP
790 #define LABEL_ALIGN_MAX_SKIP (align_labels-1)
791 #endif
792
793 #ifndef LOOP_ALIGN
794 #define LOOP_ALIGN(LABEL) align_loops_log
795 #endif
796
797 #ifndef LOOP_ALIGN_MAX_SKIP
798 #define LOOP_ALIGN_MAX_SKIP (align_loops-1)
799 #endif
800
801 #ifndef LABEL_ALIGN_AFTER_BARRIER
802 #define LABEL_ALIGN_AFTER_BARRIER(LABEL) align_jumps_log
803 #endif
804
805 #ifndef LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP
806 #define LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP (align_jumps-1)
807 #endif
808
809 #ifndef ADDR_VEC_ALIGN
810 static int
811 final_addr_vec_align (addr_vec)
812 rtx addr_vec;
813 {
814 int align = exact_log2 (GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec))));
815
816 if (align > BIGGEST_ALIGNMENT / BITS_PER_UNIT)
817 align = BIGGEST_ALIGNMENT / BITS_PER_UNIT;
818 return align;
819
820 }
821 #define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC)
822 #endif
823
824 #ifndef INSN_LENGTH_ALIGNMENT
825 #define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log
826 #endif
827
828 #define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)])
829
830 static int min_labelno, max_labelno;
831
832 #define LABEL_TO_ALIGNMENT(LABEL) \
833 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment)
834
835 #define LABEL_TO_MAX_SKIP(LABEL) \
836 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip)
837
838 /* For the benefit of port specific code do this also as a function. */
839 int
840 label_to_alignment (label)
841 rtx label;
842 {
843 return LABEL_TO_ALIGNMENT (label);
844 }
845
846 #ifdef HAVE_ATTR_length
847 /* The differences in addresses
848 between a branch and its target might grow or shrink depending on
849 the alignment the start insn of the range (the branch for a forward
850 branch or the label for a backward branch) starts out on; if these
851 differences are used naively, they can even oscillate infinitely.
852 We therefore want to compute a 'worst case' address difference that
853 is independent of the alignment the start insn of the range end
854 up on, and that is at least as large as the actual difference.
855 The function align_fuzz calculates the amount we have to add to the
856 naively computed difference, by traversing the part of the alignment
857 chain of the start insn of the range that is in front of the end insn
858 of the range, and considering for each alignment the maximum amount
859 that it might contribute to a size increase.
860
861 For casesi tables, we also want to know worst case minimum amounts of
862 address difference, in case a machine description wants to introduce
863 some common offset that is added to all offsets in a table.
864 For this purpose, align_fuzz with a growth argument of 0 comuptes the
865 appropriate adjustment. */
866
867
868 /* Compute the maximum delta by which the difference of the addresses of
869 START and END might grow / shrink due to a different address for start
870 which changes the size of alignment insns between START and END.
871 KNOWN_ALIGN_LOG is the alignment known for START.
872 GROWTH should be ~0 if the objective is to compute potential code size
873 increase, and 0 if the objective is to compute potential shrink.
874 The return value is undefined for any other value of GROWTH. */
875 static int
876 align_fuzz (start, end, known_align_log, growth)
877 rtx start, end;
878 int known_align_log;
879 unsigned growth;
880 {
881 int uid = INSN_UID (start);
882 rtx align_label;
883 int known_align = 1 << known_align_log;
884 int end_shuid = INSN_SHUID (end);
885 int fuzz = 0;
886
887 for (align_label = uid_align[uid]; align_label; align_label = uid_align[uid])
888 {
889 int align_addr, new_align;
890
891 uid = INSN_UID (align_label);
892 align_addr = insn_addresses[uid] - insn_lengths[uid];
893 if (uid_shuid[uid] > end_shuid)
894 break;
895 known_align_log = LABEL_TO_ALIGNMENT (align_label);
896 new_align = 1 << known_align_log;
897 if (new_align < known_align)
898 continue;
899 fuzz += (-align_addr ^ growth) & (new_align - known_align);
900 known_align = new_align;
901 }
902 return fuzz;
903 }
904
905 /* Compute a worst-case reference address of a branch so that it
906 can be safely used in the presence of aligned labels. Since the
907 size of the branch itself is unknown, the size of the branch is
908 not included in the range. I.e. for a forward branch, the reference
909 address is the end address of the branch as known from the previous
910 branch shortening pass, minus a value to account for possible size
911 increase due to alignment. For a backward branch, it is the start
912 address of the branch as known from the current pass, plus a value
913 to account for possible size increase due to alignment.
914 NB.: Therefore, the maximum offset allowed for backward branches needs
915 to exclude the branch size. */
916 int
917 insn_current_reference_address (branch)
918 rtx branch;
919 {
920 rtx dest;
921 rtx seq = NEXT_INSN (PREV_INSN (branch));
922 int seq_uid = INSN_UID (seq);
923 if (GET_CODE (branch) != JUMP_INSN)
924 /* This can happen for example on the PA; the objective is to know the
925 offset to address something in front of the start of the function.
926 Thus, we can treat it like a backward branch.
927 We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than
928 any alignment we'd encounter, so we skip the call to align_fuzz. */
929 return insn_current_address;
930 dest = JUMP_LABEL (branch);
931 /* BRANCH has no proper alignment chain set, so use SEQ. */
932 if (INSN_SHUID (branch) < INSN_SHUID (dest))
933 {
934 /* Forward branch. */
935 return (insn_last_address + insn_lengths[seq_uid]
936 - align_fuzz (seq, dest, length_unit_log, ~0));
937 }
938 else
939 {
940 /* Backward branch. */
941 return (insn_current_address
942 + align_fuzz (dest, seq, length_unit_log, ~0));
943 }
944 }
945 #endif /* HAVE_ATTR_length */
946 \f
947 /* Make a pass over all insns and compute their actual lengths by shortening
948 any branches of variable length if possible. */
949
950 /* Give a default value for the lowest address in a function. */
951
952 #ifndef FIRST_INSN_ADDRESS
953 #define FIRST_INSN_ADDRESS 0
954 #endif
955
956 /* shorten_branches might be called multiple times: for example, the SH
957 port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG.
958 In order to do this, it needs proper length information, which it obtains
959 by calling shorten_branches. This cannot be collapsed with
960 shorten_branches itself into a single pass unless we also want to intergate
961 reorg.c, since the branch splitting exposes new instructions with delay
962 slots. */
963
964 void
965 shorten_branches (first)
966 rtx first ATTRIBUTE_UNUSED;
967 {
968 rtx insn;
969 int max_uid;
970 int i;
971 int max_log;
972 int max_skip;
973 #ifdef HAVE_ATTR_length
974 #define MAX_CODE_ALIGN 16
975 rtx seq;
976 int something_changed = 1;
977 char *varying_length;
978 rtx body;
979 int uid;
980 rtx align_tab[MAX_CODE_ALIGN];
981
982 /* In order to make sure that all instructions have valid length info,
983 we must split them before we compute the address/length info. */
984
985 for (insn = NEXT_INSN (first); insn; insn = NEXT_INSN (insn))
986 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
987 {
988 rtx old = insn;
989 /* Don't split the insn if it has been deleted. */
990 if (! INSN_DELETED_P (old))
991 insn = try_split (PATTERN (old), old, 1);
992 /* When not optimizing, the old insn will be still left around
993 with only the 'deleted' bit set. Transform it into a note
994 to avoid confusion of subsequent processing. */
995 if (INSN_DELETED_P (old))
996 {
997 PUT_CODE (old , NOTE);
998 NOTE_LINE_NUMBER (old) = NOTE_INSN_DELETED;
999 NOTE_SOURCE_FILE (old) = 0;
1000 }
1001 }
1002 #endif
1003
1004 /* We must do some computations even when not actually shortening, in
1005 order to get the alignment information for the labels. */
1006
1007 init_insn_lengths ();
1008
1009 /* Compute maximum UID and allocate label_align / uid_shuid. */
1010 max_uid = get_max_uid ();
1011
1012 max_labelno = max_label_num ();
1013 min_labelno = get_first_label_num ();
1014 label_align = (struct label_alignment *)
1015 xcalloc ((max_labelno - min_labelno + 1), sizeof (struct label_alignment));
1016
1017 uid_shuid = (int *) xmalloc (max_uid * sizeof *uid_shuid);
1018
1019 /* Initialize label_align and set up uid_shuid to be strictly
1020 monotonically rising with insn order. */
1021 /* We use max_log here to keep track of the maximum alignment we want to
1022 impose on the next CODE_LABEL (or the current one if we are processing
1023 the CODE_LABEL itself). */
1024
1025 max_log = 0;
1026 max_skip = 0;
1027
1028 for (insn = get_insns (), i = 1; insn; insn = NEXT_INSN (insn))
1029 {
1030 int log;
1031
1032 INSN_SHUID (insn) = i++;
1033 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
1034 {
1035 /* reorg might make the first insn of a loop being run once only,
1036 and delete the label in front of it. Then we want to apply
1037 the loop alignment to the new label created by reorg, which
1038 is separated by the former loop start insn from the
1039 NOTE_INSN_LOOP_BEG. */
1040 }
1041 else if (GET_CODE (insn) == CODE_LABEL)
1042 {
1043 rtx next;
1044
1045 log = LABEL_ALIGN (insn);
1046 if (max_log < log)
1047 {
1048 max_log = log;
1049 max_skip = LABEL_ALIGN_MAX_SKIP;
1050 }
1051 next = NEXT_INSN (insn);
1052 /* ADDR_VECs only take room if read-only data goes into the text
1053 section. */
1054 if (JUMP_TABLES_IN_TEXT_SECTION
1055 #if !defined(READONLY_DATA_SECTION)
1056 || 1
1057 #endif
1058 )
1059 if (next && GET_CODE (next) == JUMP_INSN)
1060 {
1061 rtx nextbody = PATTERN (next);
1062 if (GET_CODE (nextbody) == ADDR_VEC
1063 || GET_CODE (nextbody) == ADDR_DIFF_VEC)
1064 {
1065 log = ADDR_VEC_ALIGN (next);
1066 if (max_log < log)
1067 {
1068 max_log = log;
1069 max_skip = LABEL_ALIGN_MAX_SKIP;
1070 }
1071 }
1072 }
1073 LABEL_TO_ALIGNMENT (insn) = max_log;
1074 LABEL_TO_MAX_SKIP (insn) = max_skip;
1075 max_log = 0;
1076 max_skip = 0;
1077 }
1078 else if (GET_CODE (insn) == BARRIER)
1079 {
1080 rtx label;
1081
1082 for (label = insn; label && GET_RTX_CLASS (GET_CODE (label)) != 'i';
1083 label = NEXT_INSN (label))
1084 if (GET_CODE (label) == CODE_LABEL)
1085 {
1086 log = LABEL_ALIGN_AFTER_BARRIER (insn);
1087 if (max_log < log)
1088 {
1089 max_log = log;
1090 max_skip = LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP;
1091 }
1092 break;
1093 }
1094 }
1095 /* Again, we allow NOTE_INSN_LOOP_BEG - INSN - CODE_LABEL
1096 sequences in order to handle reorg output efficiently. */
1097 else if (GET_CODE (insn) == NOTE
1098 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
1099 {
1100 rtx label;
1101 int nest = 0;
1102
1103 /* Search for the label that starts the loop.
1104 Don't skip past the end of the loop, since that could
1105 lead to putting an alignment where it does not belong.
1106 However, a label after a nested (non-)loop would be OK. */
1107 for (label = insn; label; label = NEXT_INSN (label))
1108 {
1109 if (GET_CODE (label) == NOTE
1110 && NOTE_LINE_NUMBER (label) == NOTE_INSN_LOOP_BEG)
1111 nest++;
1112 else if (GET_CODE (label) == NOTE
1113 && NOTE_LINE_NUMBER (label) == NOTE_INSN_LOOP_END
1114 && --nest == 0)
1115 break;
1116 else if (GET_CODE (label) == CODE_LABEL)
1117 {
1118 log = LOOP_ALIGN (label);
1119 if (max_log < log)
1120 {
1121 max_log = log;
1122 max_skip = LOOP_ALIGN_MAX_SKIP;
1123 }
1124 break;
1125 }
1126 }
1127 }
1128 else
1129 continue;
1130 }
1131 #ifdef HAVE_ATTR_length
1132
1133 /* Allocate the rest of the arrays. */
1134 insn_lengths = (short *) xmalloc (max_uid * sizeof (short));
1135 insn_lengths_max_uid = max_uid;
1136 /* Syntax errors can lead to labels being outside of the main insn stream.
1137 Initialize insn_addresses, so that we get reproducible results. */
1138 insn_addresses = (int *) xcalloc (max_uid, sizeof (int));
1139
1140 varying_length = (char *) xcalloc (max_uid, sizeof (char));
1141
1142 /* Initialize uid_align. We scan instructions
1143 from end to start, and keep in align_tab[n] the last seen insn
1144 that does an alignment of at least n+1, i.e. the successor
1145 in the alignment chain for an insn that does / has a known
1146 alignment of n. */
1147 uid_align = (rtx *) xcalloc (max_uid, sizeof *uid_align);
1148
1149 for (i = MAX_CODE_ALIGN; --i >= 0; )
1150 align_tab[i] = NULL_RTX;
1151 seq = get_last_insn ();
1152 for (; seq; seq = PREV_INSN (seq))
1153 {
1154 int uid = INSN_UID (seq);
1155 int log;
1156 log = (GET_CODE (seq) == CODE_LABEL ? LABEL_TO_ALIGNMENT (seq) : 0);
1157 uid_align[uid] = align_tab[0];
1158 if (log)
1159 {
1160 /* Found an alignment label. */
1161 uid_align[uid] = align_tab[log];
1162 for (i = log - 1; i >= 0; i--)
1163 align_tab[i] = seq;
1164 }
1165 }
1166 #ifdef CASE_VECTOR_SHORTEN_MODE
1167 if (optimize)
1168 {
1169 /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum
1170 label fields. */
1171
1172 int min_shuid = INSN_SHUID (get_insns ()) - 1;
1173 int max_shuid = INSN_SHUID (get_last_insn ()) + 1;
1174 int rel;
1175
1176 for (insn = first; insn != 0; insn = NEXT_INSN (insn))
1177 {
1178 rtx min_lab = NULL_RTX, max_lab = NULL_RTX, pat;
1179 int len, i, min, max, insn_shuid;
1180 int min_align;
1181 addr_diff_vec_flags flags;
1182
1183 if (GET_CODE (insn) != JUMP_INSN
1184 || GET_CODE (PATTERN (insn)) != ADDR_DIFF_VEC)
1185 continue;
1186 pat = PATTERN (insn);
1187 len = XVECLEN (pat, 1);
1188 if (len <= 0)
1189 abort ();
1190 min_align = MAX_CODE_ALIGN;
1191 for (min = max_shuid, max = min_shuid, i = len - 1; i >= 0; i--)
1192 {
1193 rtx lab = XEXP (XVECEXP (pat, 1, i), 0);
1194 int shuid = INSN_SHUID (lab);
1195 if (shuid < min)
1196 {
1197 min = shuid;
1198 min_lab = lab;
1199 }
1200 if (shuid > max)
1201 {
1202 max = shuid;
1203 max_lab = lab;
1204 }
1205 if (min_align > LABEL_TO_ALIGNMENT (lab))
1206 min_align = LABEL_TO_ALIGNMENT (lab);
1207 }
1208 XEXP (pat, 2) = gen_rtx_LABEL_REF (VOIDmode, min_lab);
1209 XEXP (pat, 3) = gen_rtx_LABEL_REF (VOIDmode, max_lab);
1210 insn_shuid = INSN_SHUID (insn);
1211 rel = INSN_SHUID (XEXP (XEXP (pat, 0), 0));
1212 flags.min_align = min_align;
1213 flags.base_after_vec = rel > insn_shuid;
1214 flags.min_after_vec = min > insn_shuid;
1215 flags.max_after_vec = max > insn_shuid;
1216 flags.min_after_base = min > rel;
1217 flags.max_after_base = max > rel;
1218 ADDR_DIFF_VEC_FLAGS (pat) = flags;
1219 }
1220 }
1221 #endif /* CASE_VECTOR_SHORTEN_MODE */
1222
1223
1224 /* Compute initial lengths, addresses, and varying flags for each insn. */
1225 for (insn_current_address = FIRST_INSN_ADDRESS, insn = first;
1226 insn != 0;
1227 insn_current_address += insn_lengths[uid], insn = NEXT_INSN (insn))
1228 {
1229 uid = INSN_UID (insn);
1230
1231 insn_lengths[uid] = 0;
1232
1233 if (GET_CODE (insn) == CODE_LABEL)
1234 {
1235 int log = LABEL_TO_ALIGNMENT (insn);
1236 if (log)
1237 {
1238 int align = 1 << log;
1239 int new_address = (insn_current_address + align - 1) & -align;
1240 insn_lengths[uid] = new_address - insn_current_address;
1241 insn_current_address = new_address;
1242 }
1243 }
1244
1245 insn_addresses[uid] = insn_current_address;
1246
1247 if (GET_CODE (insn) == NOTE || GET_CODE (insn) == BARRIER
1248 || GET_CODE (insn) == CODE_LABEL)
1249 continue;
1250 if (INSN_DELETED_P (insn))
1251 continue;
1252
1253 body = PATTERN (insn);
1254 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
1255 {
1256 /* This only takes room if read-only data goes into the text
1257 section. */
1258 if (JUMP_TABLES_IN_TEXT_SECTION
1259 #if !defined(READONLY_DATA_SECTION)
1260 || 1
1261 #endif
1262 )
1263 insn_lengths[uid] = (XVECLEN (body,
1264 GET_CODE (body) == ADDR_DIFF_VEC)
1265 * GET_MODE_SIZE (GET_MODE (body)));
1266 /* Alignment is handled by ADDR_VEC_ALIGN. */
1267 }
1268 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
1269 insn_lengths[uid] = asm_insn_count (body) * insn_default_length (insn);
1270 else if (GET_CODE (body) == SEQUENCE)
1271 {
1272 int i;
1273 int const_delay_slots;
1274 #ifdef DELAY_SLOTS
1275 const_delay_slots = const_num_delay_slots (XVECEXP (body, 0, 0));
1276 #else
1277 const_delay_slots = 0;
1278 #endif
1279 /* Inside a delay slot sequence, we do not do any branch shortening
1280 if the shortening could change the number of delay slots
1281 of the branch. */
1282 for (i = 0; i < XVECLEN (body, 0); i++)
1283 {
1284 rtx inner_insn = XVECEXP (body, 0, i);
1285 int inner_uid = INSN_UID (inner_insn);
1286 int inner_length;
1287
1288 if (GET_CODE (body) == ASM_INPUT
1289 || asm_noperands (PATTERN (XVECEXP (body, 0, i))) >= 0)
1290 inner_length = (asm_insn_count (PATTERN (inner_insn))
1291 * insn_default_length (inner_insn));
1292 else
1293 inner_length = insn_default_length (inner_insn);
1294
1295 insn_lengths[inner_uid] = inner_length;
1296 if (const_delay_slots)
1297 {
1298 if ((varying_length[inner_uid]
1299 = insn_variable_length_p (inner_insn)) != 0)
1300 varying_length[uid] = 1;
1301 insn_addresses[inner_uid] = (insn_current_address +
1302 insn_lengths[uid]);
1303 }
1304 else
1305 varying_length[inner_uid] = 0;
1306 insn_lengths[uid] += inner_length;
1307 }
1308 }
1309 else if (GET_CODE (body) != USE && GET_CODE (body) != CLOBBER)
1310 {
1311 insn_lengths[uid] = insn_default_length (insn);
1312 varying_length[uid] = insn_variable_length_p (insn);
1313 }
1314
1315 /* If needed, do any adjustment. */
1316 #ifdef ADJUST_INSN_LENGTH
1317 ADJUST_INSN_LENGTH (insn, insn_lengths[uid]);
1318 if (insn_lengths[uid] < 0)
1319 fatal_insn ("Negative insn length", insn);
1320 #endif
1321 }
1322
1323 /* Now loop over all the insns finding varying length insns. For each,
1324 get the current insn length. If it has changed, reflect the change.
1325 When nothing changes for a full pass, we are done. */
1326
1327 while (something_changed)
1328 {
1329 something_changed = 0;
1330 insn_current_align = MAX_CODE_ALIGN - 1;
1331 for (insn_current_address = FIRST_INSN_ADDRESS, insn = first;
1332 insn != 0;
1333 insn = NEXT_INSN (insn))
1334 {
1335 int new_length;
1336 #ifdef ADJUST_INSN_LENGTH
1337 int tmp_length;
1338 #endif
1339 int length_align;
1340
1341 uid = INSN_UID (insn);
1342
1343 if (GET_CODE (insn) == CODE_LABEL)
1344 {
1345 int log = LABEL_TO_ALIGNMENT (insn);
1346 if (log > insn_current_align)
1347 {
1348 int align = 1 << log;
1349 int new_address= (insn_current_address + align - 1) & -align;
1350 insn_lengths[uid] = new_address - insn_current_address;
1351 insn_current_align = log;
1352 insn_current_address = new_address;
1353 }
1354 else
1355 insn_lengths[uid] = 0;
1356 insn_addresses[uid] = insn_current_address;
1357 continue;
1358 }
1359
1360 length_align = INSN_LENGTH_ALIGNMENT (insn);
1361 if (length_align < insn_current_align)
1362 insn_current_align = length_align;
1363
1364 insn_last_address = insn_addresses[uid];
1365 insn_addresses[uid] = insn_current_address;
1366
1367 #ifdef CASE_VECTOR_SHORTEN_MODE
1368 if (optimize && GET_CODE (insn) == JUMP_INSN
1369 && GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
1370 {
1371 rtx body = PATTERN (insn);
1372 int old_length = insn_lengths[uid];
1373 rtx rel_lab = XEXP (XEXP (body, 0), 0);
1374 rtx min_lab = XEXP (XEXP (body, 2), 0);
1375 rtx max_lab = XEXP (XEXP (body, 3), 0);
1376 addr_diff_vec_flags flags = ADDR_DIFF_VEC_FLAGS (body);
1377 int rel_addr = insn_addresses[INSN_UID (rel_lab)];
1378 int min_addr = insn_addresses[INSN_UID (min_lab)];
1379 int max_addr = insn_addresses[INSN_UID (max_lab)];
1380 rtx prev;
1381 int rel_align = 0;
1382
1383 /* Try to find a known alignment for rel_lab. */
1384 for (prev = rel_lab;
1385 prev
1386 && ! insn_lengths[INSN_UID (prev)]
1387 && ! (varying_length[INSN_UID (prev)] & 1);
1388 prev = PREV_INSN (prev))
1389 if (varying_length[INSN_UID (prev)] & 2)
1390 {
1391 rel_align = LABEL_TO_ALIGNMENT (prev);
1392 break;
1393 }
1394
1395 /* See the comment on addr_diff_vec_flags in rtl.h for the
1396 meaning of the flags values. base: REL_LAB vec: INSN */
1397 /* Anything after INSN has still addresses from the last
1398 pass; adjust these so that they reflect our current
1399 estimate for this pass. */
1400 if (flags.base_after_vec)
1401 rel_addr += insn_current_address - insn_last_address;
1402 if (flags.min_after_vec)
1403 min_addr += insn_current_address - insn_last_address;
1404 if (flags.max_after_vec)
1405 max_addr += insn_current_address - insn_last_address;
1406 /* We want to know the worst case, i.e. lowest possible value
1407 for the offset of MIN_LAB. If MIN_LAB is after REL_LAB,
1408 its offset is positive, and we have to be wary of code shrink;
1409 otherwise, it is negative, and we have to be vary of code
1410 size increase. */
1411 if (flags.min_after_base)
1412 {
1413 /* If INSN is between REL_LAB and MIN_LAB, the size
1414 changes we are about to make can change the alignment
1415 within the observed offset, therefore we have to break
1416 it up into two parts that are independent. */
1417 if (! flags.base_after_vec && flags.min_after_vec)
1418 {
1419 min_addr -= align_fuzz (rel_lab, insn, rel_align, 0);
1420 min_addr -= align_fuzz (insn, min_lab, 0, 0);
1421 }
1422 else
1423 min_addr -= align_fuzz (rel_lab, min_lab, rel_align, 0);
1424 }
1425 else
1426 {
1427 if (flags.base_after_vec && ! flags.min_after_vec)
1428 {
1429 min_addr -= align_fuzz (min_lab, insn, 0, ~0);
1430 min_addr -= align_fuzz (insn, rel_lab, 0, ~0);
1431 }
1432 else
1433 min_addr -= align_fuzz (min_lab, rel_lab, 0, ~0);
1434 }
1435 /* Likewise, determine the highest lowest possible value
1436 for the offset of MAX_LAB. */
1437 if (flags.max_after_base)
1438 {
1439 if (! flags.base_after_vec && flags.max_after_vec)
1440 {
1441 max_addr += align_fuzz (rel_lab, insn, rel_align, ~0);
1442 max_addr += align_fuzz (insn, max_lab, 0, ~0);
1443 }
1444 else
1445 max_addr += align_fuzz (rel_lab, max_lab, rel_align, ~0);
1446 }
1447 else
1448 {
1449 if (flags.base_after_vec && ! flags.max_after_vec)
1450 {
1451 max_addr += align_fuzz (max_lab, insn, 0, 0);
1452 max_addr += align_fuzz (insn, rel_lab, 0, 0);
1453 }
1454 else
1455 max_addr += align_fuzz (max_lab, rel_lab, 0, 0);
1456 }
1457 PUT_MODE (body, CASE_VECTOR_SHORTEN_MODE (min_addr - rel_addr,
1458 max_addr - rel_addr,
1459 body));
1460 if (JUMP_TABLES_IN_TEXT_SECTION
1461 #if !defined(READONLY_DATA_SECTION)
1462 || 1
1463 #endif
1464 )
1465 {
1466 insn_lengths[uid]
1467 = (XVECLEN (body, 1) * GET_MODE_SIZE (GET_MODE (body)));
1468 insn_current_address += insn_lengths[uid];
1469 if (insn_lengths[uid] != old_length)
1470 something_changed = 1;
1471 }
1472
1473 continue;
1474 }
1475 #endif /* CASE_VECTOR_SHORTEN_MODE */
1476
1477 if (! (varying_length[uid]))
1478 {
1479 insn_current_address += insn_lengths[uid];
1480 continue;
1481 }
1482 if (GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
1483 {
1484 int i;
1485
1486 body = PATTERN (insn);
1487 new_length = 0;
1488 for (i = 0; i < XVECLEN (body, 0); i++)
1489 {
1490 rtx inner_insn = XVECEXP (body, 0, i);
1491 int inner_uid = INSN_UID (inner_insn);
1492 int inner_length;
1493
1494 insn_addresses[inner_uid] = insn_current_address;
1495
1496 /* insn_current_length returns 0 for insns with a
1497 non-varying length. */
1498 if (! varying_length[inner_uid])
1499 inner_length = insn_lengths[inner_uid];
1500 else
1501 inner_length = insn_current_length (inner_insn);
1502
1503 if (inner_length != insn_lengths[inner_uid])
1504 {
1505 insn_lengths[inner_uid] = inner_length;
1506 something_changed = 1;
1507 }
1508 insn_current_address += insn_lengths[inner_uid];
1509 new_length += inner_length;
1510 }
1511 }
1512 else
1513 {
1514 new_length = insn_current_length (insn);
1515 insn_current_address += new_length;
1516 }
1517
1518 #ifdef ADJUST_INSN_LENGTH
1519 /* If needed, do any adjustment. */
1520 tmp_length = new_length;
1521 ADJUST_INSN_LENGTH (insn, new_length);
1522 insn_current_address += (new_length - tmp_length);
1523 #endif
1524
1525 if (new_length != insn_lengths[uid])
1526 {
1527 insn_lengths[uid] = new_length;
1528 something_changed = 1;
1529 }
1530 }
1531 /* For a non-optimizing compile, do only a single pass. */
1532 if (!optimize)
1533 break;
1534 }
1535
1536 free (varying_length);
1537
1538 #endif /* HAVE_ATTR_length */
1539 }
1540
1541 #ifdef HAVE_ATTR_length
1542 /* Given the body of an INSN known to be generated by an ASM statement, return
1543 the number of machine instructions likely to be generated for this insn.
1544 This is used to compute its length. */
1545
1546 static int
1547 asm_insn_count (body)
1548 rtx body;
1549 {
1550 const char *template;
1551 int count = 1;
1552
1553 if (GET_CODE (body) == ASM_INPUT)
1554 template = XSTR (body, 0);
1555 else
1556 template = decode_asm_operands (body, NULL_PTR, NULL_PTR,
1557 NULL_PTR, NULL_PTR);
1558
1559 for ( ; *template; template++)
1560 if (IS_ASM_LOGICAL_LINE_SEPARATOR(*template) || *template == '\n')
1561 count++;
1562
1563 return count;
1564 }
1565 #endif
1566 \f
1567 /* Output assembler code for the start of a function,
1568 and initialize some of the variables in this file
1569 for the new function. The label for the function and associated
1570 assembler pseudo-ops have already been output in `assemble_start_function'.
1571
1572 FIRST is the first insn of the rtl for the function being compiled.
1573 FILE is the file to write assembler code to.
1574 OPTIMIZE is nonzero if we should eliminate redundant
1575 test and compare insns. */
1576
1577 void
1578 final_start_function (first, file, optimize)
1579 rtx first;
1580 FILE *file;
1581 int optimize ATTRIBUTE_UNUSED;
1582 {
1583 block_depth = 0;
1584
1585 this_is_asm_operands = 0;
1586
1587 #ifdef NON_SAVING_SETJMP
1588 /* A function that calls setjmp should save and restore all the
1589 call-saved registers on a system where longjmp clobbers them. */
1590 if (NON_SAVING_SETJMP && current_function_calls_setjmp)
1591 {
1592 int i;
1593
1594 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1595 if (!call_used_regs[i])
1596 regs_ever_live[i] = 1;
1597 }
1598 #endif
1599
1600 /* Initial line number is supposed to be output
1601 before the function's prologue and label
1602 so that the function's address will not appear to be
1603 in the last statement of the preceding function. */
1604 if (NOTE_LINE_NUMBER (first) != NOTE_INSN_DELETED)
1605 last_linenum = high_block_linenum = high_function_linenum
1606 = NOTE_LINE_NUMBER (first);
1607
1608 #if defined (DWARF2_UNWIND_INFO) || defined (DWARF2_DEBUGGING_INFO)
1609 /* Output DWARF definition of the function. */
1610 if (dwarf2out_do_frame ())
1611 dwarf2out_begin_prologue ();
1612 else
1613 current_function_func_begin_label = 0;
1614 #endif
1615
1616 /* For SDB and XCOFF, the function beginning must be marked between
1617 the function label and the prologue. We always need this, even when
1618 -g1 was used. Defer on MIPS systems so that parameter descriptions
1619 follow function entry. */
1620 #if defined(SDB_DEBUGGING_INFO) && !defined(MIPS_DEBUGGING_INFO)
1621 if (write_symbols == SDB_DEBUG)
1622 sdbout_begin_function (last_linenum);
1623 else
1624 #endif
1625 #ifdef XCOFF_DEBUGGING_INFO
1626 if (write_symbols == XCOFF_DEBUG)
1627 xcoffout_begin_function (file, last_linenum);
1628 else
1629 #endif
1630 /* But only output line number for other debug info types if -g2
1631 or better. */
1632 if (NOTE_LINE_NUMBER (first) != NOTE_INSN_DELETED)
1633 output_source_line (file, first);
1634
1635 #ifdef LEAF_REG_REMAP
1636 if (current_function_uses_only_leaf_regs)
1637 leaf_renumber_regs (first);
1638 #endif
1639
1640 /* The Sun386i and perhaps other machines don't work right
1641 if the profiling code comes after the prologue. */
1642 #ifdef PROFILE_BEFORE_PROLOGUE
1643 if (profile_flag)
1644 profile_function (file);
1645 #endif /* PROFILE_BEFORE_PROLOGUE */
1646
1647 #if defined (DWARF2_UNWIND_INFO) && defined (HAVE_prologue)
1648 if (dwarf2out_do_frame ())
1649 dwarf2out_frame_debug (NULL_RTX);
1650 #endif
1651
1652 /* If debugging, assign block numbers to all of the blocks in this
1653 function. */
1654 if (write_symbols)
1655 {
1656 number_blocks (current_function_decl);
1657 remove_unnecessary_notes ();
1658 /* We never actually put out begin/end notes for the top-level
1659 block in the function. But, conceptually, that block is
1660 always needed. */
1661 TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl)) = 1;
1662 }
1663
1664 #ifdef FUNCTION_PROLOGUE
1665 /* First output the function prologue: code to set up the stack frame. */
1666 FUNCTION_PROLOGUE (file, get_frame_size ());
1667 #endif
1668
1669 /* If the machine represents the prologue as RTL, the profiling code must
1670 be emitted when NOTE_INSN_PROLOGUE_END is scanned. */
1671 #ifdef HAVE_prologue
1672 if (! HAVE_prologue)
1673 #endif
1674 profile_after_prologue (file);
1675
1676 profile_label_no++;
1677
1678 /* If we are doing basic block profiling, remember a printable version
1679 of the function name. */
1680 if (profile_block_flag)
1681 {
1682 bb_func_label_num
1683 = add_bb_string ((*decl_printable_name) (current_function_decl, 2), FALSE);
1684 }
1685 }
1686
1687 static void
1688 profile_after_prologue (file)
1689 FILE *file ATTRIBUTE_UNUSED;
1690 {
1691 #ifdef FUNCTION_BLOCK_PROFILER
1692 if (profile_block_flag)
1693 {
1694 FUNCTION_BLOCK_PROFILER (file, count_basic_blocks);
1695 }
1696 #endif /* FUNCTION_BLOCK_PROFILER */
1697
1698 #ifndef PROFILE_BEFORE_PROLOGUE
1699 if (profile_flag)
1700 profile_function (file);
1701 #endif /* not PROFILE_BEFORE_PROLOGUE */
1702 }
1703
1704 static void
1705 profile_function (file)
1706 FILE *file;
1707 {
1708 int align = MIN (BIGGEST_ALIGNMENT, LONG_TYPE_SIZE);
1709 #if defined(ASM_OUTPUT_REG_PUSH)
1710 #if defined(STRUCT_VALUE_INCOMING_REGNUM) || defined(STRUCT_VALUE_REGNUM)
1711 int sval = current_function_returns_struct;
1712 #endif
1713 #if defined(STATIC_CHAIN_INCOMING_REGNUM) || defined(STATIC_CHAIN_REGNUM)
1714 int cxt = current_function_needs_context;
1715 #endif
1716 #endif /* ASM_OUTPUT_REG_PUSH */
1717
1718 data_section ();
1719 ASM_OUTPUT_ALIGN (file, floor_log2 (align / BITS_PER_UNIT));
1720 ASM_OUTPUT_INTERNAL_LABEL (file, "LP", profile_label_no);
1721 assemble_integer (const0_rtx, LONG_TYPE_SIZE / BITS_PER_UNIT, 1);
1722
1723 function_section (current_function_decl);
1724
1725 #if defined(STRUCT_VALUE_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1726 if (sval)
1727 ASM_OUTPUT_REG_PUSH (file, STRUCT_VALUE_INCOMING_REGNUM);
1728 #else
1729 #if defined(STRUCT_VALUE_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1730 if (sval)
1731 {
1732 ASM_OUTPUT_REG_PUSH (file, STRUCT_VALUE_REGNUM);
1733 }
1734 #endif
1735 #endif
1736
1737 #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1738 if (cxt)
1739 ASM_OUTPUT_REG_PUSH (file, STATIC_CHAIN_INCOMING_REGNUM);
1740 #else
1741 #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1742 if (cxt)
1743 {
1744 ASM_OUTPUT_REG_PUSH (file, STATIC_CHAIN_REGNUM);
1745 }
1746 #endif
1747 #endif
1748
1749 FUNCTION_PROFILER (file, profile_label_no);
1750
1751 #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1752 if (cxt)
1753 ASM_OUTPUT_REG_POP (file, STATIC_CHAIN_INCOMING_REGNUM);
1754 #else
1755 #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1756 if (cxt)
1757 {
1758 ASM_OUTPUT_REG_POP (file, STATIC_CHAIN_REGNUM);
1759 }
1760 #endif
1761 #endif
1762
1763 #if defined(STRUCT_VALUE_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1764 if (sval)
1765 ASM_OUTPUT_REG_POP (file, STRUCT_VALUE_INCOMING_REGNUM);
1766 #else
1767 #if defined(STRUCT_VALUE_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1768 if (sval)
1769 {
1770 ASM_OUTPUT_REG_POP (file, STRUCT_VALUE_REGNUM);
1771 }
1772 #endif
1773 #endif
1774 }
1775
1776 /* Output assembler code for the end of a function.
1777 For clarity, args are same as those of `final_start_function'
1778 even though not all of them are needed. */
1779
1780 void
1781 final_end_function (first, file, optimize)
1782 rtx first ATTRIBUTE_UNUSED;
1783 FILE *file ATTRIBUTE_UNUSED;
1784 int optimize ATTRIBUTE_UNUSED;
1785 {
1786 app_disable ();
1787
1788 #ifdef SDB_DEBUGGING_INFO
1789 if (write_symbols == SDB_DEBUG)
1790 sdbout_end_function (high_function_linenum);
1791 #endif
1792
1793 #ifdef DWARF_DEBUGGING_INFO
1794 if (write_symbols == DWARF_DEBUG)
1795 dwarfout_end_function ();
1796 #endif
1797
1798 #ifdef XCOFF_DEBUGGING_INFO
1799 if (write_symbols == XCOFF_DEBUG)
1800 xcoffout_end_function (file, high_function_linenum);
1801 #endif
1802
1803 #ifdef FUNCTION_EPILOGUE
1804 /* Finally, output the function epilogue:
1805 code to restore the stack frame and return to the caller. */
1806 FUNCTION_EPILOGUE (file, get_frame_size ());
1807 #endif
1808
1809 #ifdef SDB_DEBUGGING_INFO
1810 if (write_symbols == SDB_DEBUG)
1811 sdbout_end_epilogue ();
1812 #endif
1813
1814 #ifdef DWARF_DEBUGGING_INFO
1815 if (write_symbols == DWARF_DEBUG)
1816 dwarfout_end_epilogue ();
1817 #endif
1818
1819 #if defined (DWARF2_UNWIND_INFO) || defined (DWARF2_DEBUGGING_INFO)
1820 if (dwarf2out_do_frame ())
1821 dwarf2out_end_epilogue ();
1822 #endif
1823
1824 #ifdef XCOFF_DEBUGGING_INFO
1825 if (write_symbols == XCOFF_DEBUG)
1826 xcoffout_end_epilogue (file);
1827 #endif
1828
1829 bb_func_label_num = -1; /* not in function, nuke label # */
1830
1831 #ifdef IA64_UNWIND_INFO
1832 output_function_exception_table ();
1833 #endif
1834
1835 /* If FUNCTION_EPILOGUE is not defined, then the function body
1836 itself contains return instructions wherever needed. */
1837 }
1838 \f
1839 /* Add a block to the linked list that remembers the current line/file/function
1840 for basic block profiling. Emit the label in front of the basic block and
1841 the instructions that increment the count field. */
1842
1843 static void
1844 add_bb (file)
1845 FILE *file;
1846 {
1847 struct bb_list *ptr = (struct bb_list *) permalloc (sizeof (struct bb_list));
1848
1849 /* Add basic block to linked list. */
1850 ptr->next = 0;
1851 ptr->line_num = last_linenum;
1852 ptr->file_label_num = bb_file_label_num;
1853 ptr->func_label_num = bb_func_label_num;
1854 *bb_tail = ptr;
1855 bb_tail = &ptr->next;
1856
1857 /* Enable the table of basic-block use counts
1858 to point at the code it applies to. */
1859 ASM_OUTPUT_INTERNAL_LABEL (file, "LPB", count_basic_blocks);
1860
1861 /* Before first insn of this basic block, increment the
1862 count of times it was entered. */
1863 #ifdef BLOCK_PROFILER
1864 BLOCK_PROFILER (file, count_basic_blocks);
1865 #endif
1866 #ifdef HAVE_cc0
1867 CC_STATUS_INIT;
1868 #endif
1869
1870 new_block = 0;
1871 count_basic_blocks++;
1872 }
1873
1874 /* Add a string to be used for basic block profiling. */
1875
1876 static int
1877 add_bb_string (string, perm_p)
1878 const char *string;
1879 int perm_p;
1880 {
1881 int len;
1882 struct bb_str *ptr = 0;
1883
1884 if (!string)
1885 {
1886 string = "<unknown>";
1887 perm_p = TRUE;
1888 }
1889
1890 /* Allocate a new string if the current string isn't permanent. If
1891 the string is permanent search for the same string in other
1892 allocations. */
1893
1894 len = strlen (string) + 1;
1895 if (!perm_p)
1896 {
1897 char *p = (char *) permalloc (len);
1898 bcopy (string, p, len);
1899 string = p;
1900 }
1901 else
1902 for (ptr = sbb_head; ptr != (struct bb_str *) 0; ptr = ptr->next)
1903 if (ptr->string == string)
1904 break;
1905
1906 /* Allocate a new string block if we need to. */
1907 if (!ptr)
1908 {
1909 ptr = (struct bb_str *) permalloc (sizeof (*ptr));
1910 ptr->next = 0;
1911 ptr->length = len;
1912 ptr->label_num = sbb_label_num++;
1913 ptr->string = string;
1914 *sbb_tail = ptr;
1915 sbb_tail = &ptr->next;
1916 }
1917
1918 return ptr->label_num;
1919 }
1920
1921 \f
1922 /* Output assembler code for some insns: all or part of a function.
1923 For description of args, see `final_start_function', above.
1924
1925 PRESCAN is 1 if we are not really outputting,
1926 just scanning as if we were outputting.
1927 Prescanning deletes and rearranges insns just like ordinary output.
1928 PRESCAN is -2 if we are outputting after having prescanned.
1929 In this case, don't try to delete or rearrange insns
1930 because that has already been done.
1931 Prescanning is done only on certain machines. */
1932
1933 void
1934 final (first, file, optimize, prescan)
1935 rtx first;
1936 FILE *file;
1937 int optimize;
1938 int prescan;
1939 {
1940 register rtx insn;
1941 int max_line = 0;
1942 int max_uid = 0;
1943
1944 last_ignored_compare = 0;
1945 new_block = 1;
1946
1947 check_exception_handler_labels ();
1948
1949 /* Make a map indicating which line numbers appear in this function.
1950 When producing SDB debugging info, delete troublesome line number
1951 notes from inlined functions in other files as well as duplicate
1952 line number notes. */
1953 #ifdef SDB_DEBUGGING_INFO
1954 if (write_symbols == SDB_DEBUG)
1955 {
1956 rtx last = 0;
1957 for (insn = first; insn; insn = NEXT_INSN (insn))
1958 if (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) > 0)
1959 {
1960 if ((RTX_INTEGRATED_P (insn)
1961 && strcmp (NOTE_SOURCE_FILE (insn), main_input_filename) != 0)
1962 || (last != 0
1963 && NOTE_LINE_NUMBER (insn) == NOTE_LINE_NUMBER (last)
1964 && NOTE_SOURCE_FILE (insn) == NOTE_SOURCE_FILE (last)))
1965 {
1966 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
1967 NOTE_SOURCE_FILE (insn) = 0;
1968 continue;
1969 }
1970 last = insn;
1971 if (NOTE_LINE_NUMBER (insn) > max_line)
1972 max_line = NOTE_LINE_NUMBER (insn);
1973 }
1974 }
1975 else
1976 #endif
1977 {
1978 for (insn = first; insn; insn = NEXT_INSN (insn))
1979 if (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) > max_line)
1980 max_line = NOTE_LINE_NUMBER (insn);
1981 }
1982
1983 line_note_exists = (char *) xcalloc (max_line + 1, sizeof (char));
1984
1985 for (insn = first; insn; insn = NEXT_INSN (insn))
1986 {
1987 if (INSN_UID (insn) > max_uid) /* find largest UID */
1988 max_uid = INSN_UID (insn);
1989 if (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) > 0)
1990 line_note_exists[NOTE_LINE_NUMBER (insn)] = 1;
1991 #ifdef HAVE_cc0
1992 /* If CC tracking across branches is enabled, record the insn which
1993 jumps to each branch only reached from one place. */
1994 if (optimize && GET_CODE (insn) == JUMP_INSN)
1995 {
1996 rtx lab = JUMP_LABEL (insn);
1997 if (lab && LABEL_NUSES (lab) == 1)
1998 {
1999 LABEL_REFS (lab) = insn;
2000 }
2001 }
2002 #endif
2003 }
2004
2005 /* Initialize insn_eh_region table if eh is being used. */
2006
2007 init_insn_eh_region (first, max_uid);
2008
2009 init_recog ();
2010
2011 CC_STATUS_INIT;
2012
2013 /* Output the insns. */
2014 for (insn = NEXT_INSN (first); insn;)
2015 {
2016 #ifdef HAVE_ATTR_length
2017 insn_current_address = insn_addresses[INSN_UID (insn)];
2018 #endif
2019 insn = final_scan_insn (insn, file, optimize, prescan, 0);
2020 }
2021
2022 /* Do basic-block profiling here
2023 if the last insn was a conditional branch. */
2024 if (profile_block_flag && new_block)
2025 add_bb (file);
2026
2027 free_insn_eh_region ();
2028 free (line_note_exists);
2029 line_note_exists = NULL;
2030 }
2031 \f
2032 const char *
2033 get_insn_template (code, insn)
2034 int code;
2035 rtx insn;
2036 {
2037 const void *output = insn_data[code].output;
2038 switch (insn_data[code].output_format)
2039 {
2040 case INSN_OUTPUT_FORMAT_SINGLE:
2041 return (const char *) output;
2042 case INSN_OUTPUT_FORMAT_MULTI:
2043 return ((const char * const *) output)[which_alternative];
2044 case INSN_OUTPUT_FORMAT_FUNCTION:
2045 if (insn == NULL)
2046 abort ();
2047 return (* (insn_output_fn) output) (recog_data.operand, insn);
2048
2049 default:
2050 abort ();
2051 }
2052 }
2053 /* The final scan for one insn, INSN.
2054 Args are same as in `final', except that INSN
2055 is the insn being scanned.
2056 Value returned is the next insn to be scanned.
2057
2058 NOPEEPHOLES is the flag to disallow peephole processing (currently
2059 used for within delayed branch sequence output). */
2060
2061 rtx
2062 final_scan_insn (insn, file, optimize, prescan, nopeepholes)
2063 rtx insn;
2064 FILE *file;
2065 int optimize ATTRIBUTE_UNUSED;
2066 int prescan;
2067 int nopeepholes ATTRIBUTE_UNUSED;
2068 {
2069 #ifdef HAVE_cc0
2070 rtx set;
2071 #endif
2072
2073 insn_counter++;
2074
2075 /* Ignore deleted insns. These can occur when we split insns (due to a
2076 template of "#") while not optimizing. */
2077 if (INSN_DELETED_P (insn))
2078 return NEXT_INSN (insn);
2079
2080 switch (GET_CODE (insn))
2081 {
2082 case NOTE:
2083 if (prescan > 0)
2084 break;
2085
2086 switch (NOTE_LINE_NUMBER (insn))
2087 {
2088 case NOTE_INSN_DELETED:
2089 case NOTE_INSN_LOOP_BEG:
2090 case NOTE_INSN_LOOP_END:
2091 case NOTE_INSN_LOOP_CONT:
2092 case NOTE_INSN_LOOP_VTOP:
2093 case NOTE_INSN_FUNCTION_END:
2094 case NOTE_INSN_SETJMP:
2095 case NOTE_INSN_REPEATED_LINE_NUMBER:
2096 case NOTE_INSN_RANGE_BEG:
2097 case NOTE_INSN_RANGE_END:
2098 case NOTE_INSN_LIVE:
2099 case NOTE_INSN_EXPECTED_VALUE:
2100 break;
2101
2102 case NOTE_INSN_BASIC_BLOCK:
2103 if (flag_debug_asm)
2104 fprintf (asm_out_file, "\t%s basic block %d\n",
2105 ASM_COMMENT_START, NOTE_BASIC_BLOCK (insn)->index);
2106 break;
2107
2108 case NOTE_INSN_EH_REGION_BEG:
2109 if (! exceptions_via_longjmp)
2110 {
2111 ASM_OUTPUT_INTERNAL_LABEL (file, "LEHB", NOTE_EH_HANDLER (insn));
2112 if (! flag_new_exceptions)
2113 add_eh_table_entry (NOTE_EH_HANDLER (insn));
2114 #ifdef ASM_OUTPUT_EH_REGION_BEG
2115 ASM_OUTPUT_EH_REGION_BEG (file, NOTE_EH_HANDLER (insn));
2116 #endif
2117 }
2118 break;
2119
2120 case NOTE_INSN_EH_REGION_END:
2121 if (! exceptions_via_longjmp)
2122 {
2123 ASM_OUTPUT_INTERNAL_LABEL (file, "LEHE", NOTE_EH_HANDLER (insn));
2124 if (flag_new_exceptions)
2125 add_eh_table_entry (NOTE_EH_HANDLER (insn));
2126 #ifdef ASM_OUTPUT_EH_REGION_END
2127 ASM_OUTPUT_EH_REGION_END (file, NOTE_EH_HANDLER (insn));
2128 #endif
2129 }
2130 break;
2131
2132 case NOTE_INSN_PROLOGUE_END:
2133 #ifdef FUNCTION_END_PROLOGUE
2134 FUNCTION_END_PROLOGUE (file);
2135 #endif
2136 profile_after_prologue (file);
2137 break;
2138
2139 case NOTE_INSN_EPILOGUE_BEG:
2140 #ifdef FUNCTION_BEGIN_EPILOGUE
2141 FUNCTION_BEGIN_EPILOGUE (file);
2142 #endif
2143 break;
2144
2145 case NOTE_INSN_FUNCTION_BEG:
2146 #if defined(SDB_DEBUGGING_INFO) && defined(MIPS_DEBUGGING_INFO)
2147 /* MIPS stabs require the parameter descriptions to be after the
2148 function entry point rather than before. */
2149 if (write_symbols == SDB_DEBUG)
2150 {
2151 app_disable ();
2152 sdbout_begin_function (last_linenum);
2153 }
2154 #endif
2155 #ifdef DWARF_DEBUGGING_INFO
2156 /* This outputs a marker where the function body starts, so it
2157 must be after the prologue. */
2158 if (write_symbols == DWARF_DEBUG)
2159 {
2160 app_disable ();
2161 dwarfout_begin_function ();
2162 }
2163 #endif
2164 break;
2165
2166 case NOTE_INSN_BLOCK_BEG:
2167 if (debug_info_level == DINFO_LEVEL_NORMAL
2168 || debug_info_level == DINFO_LEVEL_VERBOSE
2169 || write_symbols == DWARF_DEBUG
2170 || write_symbols == DWARF2_DEBUG)
2171 {
2172 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
2173
2174 app_disable ();
2175 ++block_depth;
2176 high_block_linenum = last_linenum;
2177
2178 /* Output debugging info about the symbol-block beginning. */
2179 #ifdef SDB_DEBUGGING_INFO
2180 if (write_symbols == SDB_DEBUG)
2181 sdbout_begin_block (file, last_linenum, n);
2182 #endif
2183 #ifdef XCOFF_DEBUGGING_INFO
2184 if (write_symbols == XCOFF_DEBUG)
2185 xcoffout_begin_block (file, last_linenum, n);
2186 #endif
2187 #ifdef DBX_DEBUGGING_INFO
2188 if (write_symbols == DBX_DEBUG)
2189 ASM_OUTPUT_INTERNAL_LABEL (file, "LBB", n);
2190 #endif
2191 #ifdef DWARF_DEBUGGING_INFO
2192 if (write_symbols == DWARF_DEBUG)
2193 dwarfout_begin_block (n);
2194 #endif
2195 #ifdef DWARF2_DEBUGGING_INFO
2196 if (write_symbols == DWARF2_DEBUG)
2197 dwarf2out_begin_block (n);
2198 #endif
2199
2200 /* Mark this block as output. */
2201 TREE_ASM_WRITTEN (NOTE_BLOCK (insn)) = 1;
2202 }
2203 break;
2204
2205 case NOTE_INSN_BLOCK_END:
2206 if (debug_info_level == DINFO_LEVEL_NORMAL
2207 || debug_info_level == DINFO_LEVEL_VERBOSE
2208 || write_symbols == DWARF_DEBUG
2209 || write_symbols == DWARF2_DEBUG)
2210 {
2211 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
2212
2213 app_disable ();
2214
2215 /* End of a symbol-block. */
2216 --block_depth;
2217 if (block_depth < 0)
2218 abort ();
2219
2220 #ifdef XCOFF_DEBUGGING_INFO
2221 if (write_symbols == XCOFF_DEBUG)
2222 xcoffout_end_block (file, high_block_linenum, n);
2223 #endif
2224 #ifdef DBX_DEBUGGING_INFO
2225 if (write_symbols == DBX_DEBUG)
2226 ASM_OUTPUT_INTERNAL_LABEL (file, "LBE", n);
2227 #endif
2228 #ifdef SDB_DEBUGGING_INFO
2229 if (write_symbols == SDB_DEBUG)
2230 sdbout_end_block (file, high_block_linenum, n);
2231 #endif
2232 #ifdef DWARF_DEBUGGING_INFO
2233 if (write_symbols == DWARF_DEBUG)
2234 dwarfout_end_block (n);
2235 #endif
2236 #ifdef DWARF2_DEBUGGING_INFO
2237 if (write_symbols == DWARF2_DEBUG)
2238 dwarf2out_end_block (n);
2239 #endif
2240 }
2241 break;
2242
2243 case NOTE_INSN_DELETED_LABEL:
2244 /* Emit the label. We may have deleted the CODE_LABEL because
2245 the label could be proved to be unreachable, though still
2246 referenced (in the form of having its address taken. */
2247 /* ??? Figure out how not to do this unconditionally. This
2248 interferes with bundling on LIW targets. */
2249 ASM_OUTPUT_INTERNAL_LABEL (file, "L", CODE_LABEL_NUMBER (insn));
2250
2251 if (debug_info_level == DINFO_LEVEL_NORMAL
2252 || debug_info_level == DINFO_LEVEL_VERBOSE)
2253 {
2254 #ifdef DWARF_DEBUGGING_INFO
2255 if (write_symbols == DWARF_DEBUG)
2256 dwarfout_label (insn);
2257 #endif
2258 #ifdef DWARF2_DEBUGGING_INFO
2259 if (write_symbols == DWARF2_DEBUG)
2260 dwarf2out_label (insn);
2261 #endif
2262 }
2263 break;
2264
2265 case 0:
2266 break;
2267
2268 default:
2269 if (NOTE_LINE_NUMBER (insn) <= 0)
2270 abort ();
2271
2272 /* This note is a line-number. */
2273 {
2274 register rtx note;
2275 int note_after = 0;
2276
2277 /* If there is anything real after this note, output it.
2278 If another line note follows, omit this one. */
2279 for (note = NEXT_INSN (insn); note; note = NEXT_INSN (note))
2280 {
2281 if (GET_CODE (note) != NOTE && GET_CODE (note) != CODE_LABEL)
2282 break;
2283
2284 /* These types of notes can be significant
2285 so make sure the preceding line number stays. */
2286 else if (GET_CODE (note) == NOTE
2287 && (NOTE_LINE_NUMBER (note) == NOTE_INSN_BLOCK_BEG
2288 || NOTE_LINE_NUMBER (note) == NOTE_INSN_BLOCK_END
2289 || NOTE_LINE_NUMBER (note) == NOTE_INSN_FUNCTION_BEG))
2290 break;
2291 else if (GET_CODE (note) == NOTE && NOTE_LINE_NUMBER (note) > 0)
2292 {
2293 /* Another line note follows; we can delete this note
2294 if no intervening line numbers have notes elsewhere. */
2295 int num;
2296 for (num = NOTE_LINE_NUMBER (insn) + 1;
2297 num < NOTE_LINE_NUMBER (note);
2298 num++)
2299 if (line_note_exists[num])
2300 break;
2301
2302 if (num >= NOTE_LINE_NUMBER (note))
2303 note_after = 1;
2304 break;
2305 }
2306 }
2307
2308 /* Output this line note if it is the first or the last line
2309 note in a row. */
2310 if (!note_after)
2311 output_source_line (file, insn);
2312 }
2313 break;
2314 }
2315 break;
2316
2317 case BARRIER:
2318 #if defined (DWARF2_UNWIND_INFO)
2319 /* If we push arguments, we need to check all insns for stack
2320 adjustments. */
2321 if (!ACCUMULATE_OUTGOING_ARGS && dwarf2out_do_frame ())
2322 dwarf2out_frame_debug (insn);
2323 #endif
2324 break;
2325
2326 case CODE_LABEL:
2327 /* The target port might emit labels in the output function for
2328 some insn, e.g. sh.c output_branchy_insn. */
2329 if (CODE_LABEL_NUMBER (insn) <= max_labelno)
2330 {
2331 int align = LABEL_TO_ALIGNMENT (insn);
2332 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2333 int max_skip = LABEL_TO_MAX_SKIP (insn);
2334 #endif
2335
2336 if (align && NEXT_INSN (insn))
2337 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2338 ASM_OUTPUT_MAX_SKIP_ALIGN (file, align, max_skip);
2339 #else
2340 ASM_OUTPUT_ALIGN (file, align);
2341 #endif
2342 }
2343 #ifdef HAVE_cc0
2344 CC_STATUS_INIT;
2345 /* If this label is reached from only one place, set the condition
2346 codes from the instruction just before the branch. */
2347
2348 /* Disabled because some insns set cc_status in the C output code
2349 and NOTICE_UPDATE_CC alone can set incorrect status. */
2350 if (0 /* optimize && LABEL_NUSES (insn) == 1*/)
2351 {
2352 rtx jump = LABEL_REFS (insn);
2353 rtx barrier = prev_nonnote_insn (insn);
2354 rtx prev;
2355 /* If the LABEL_REFS field of this label has been set to point
2356 at a branch, the predecessor of the branch is a regular
2357 insn, and that branch is the only way to reach this label,
2358 set the condition codes based on the branch and its
2359 predecessor. */
2360 if (barrier && GET_CODE (barrier) == BARRIER
2361 && jump && GET_CODE (jump) == JUMP_INSN
2362 && (prev = prev_nonnote_insn (jump))
2363 && GET_CODE (prev) == INSN)
2364 {
2365 NOTICE_UPDATE_CC (PATTERN (prev), prev);
2366 NOTICE_UPDATE_CC (PATTERN (jump), jump);
2367 }
2368 }
2369 #endif
2370 if (prescan > 0)
2371 break;
2372 new_block = 1;
2373
2374 #ifdef FINAL_PRESCAN_LABEL
2375 FINAL_PRESCAN_INSN (insn, NULL_PTR, 0);
2376 #endif
2377
2378 #ifdef SDB_DEBUGGING_INFO
2379 if (write_symbols == SDB_DEBUG && LABEL_NAME (insn))
2380 sdbout_label (insn);
2381 #endif
2382 #ifdef DWARF_DEBUGGING_INFO
2383 if (write_symbols == DWARF_DEBUG && LABEL_NAME (insn))
2384 dwarfout_label (insn);
2385 #endif
2386 #ifdef DWARF2_DEBUGGING_INFO
2387 if (write_symbols == DWARF2_DEBUG && LABEL_NAME (insn))
2388 dwarf2out_label (insn);
2389 #endif
2390 if (app_on)
2391 {
2392 fputs (ASM_APP_OFF, file);
2393 app_on = 0;
2394 }
2395 if (NEXT_INSN (insn) != 0
2396 && GET_CODE (NEXT_INSN (insn)) == JUMP_INSN)
2397 {
2398 rtx nextbody = PATTERN (NEXT_INSN (insn));
2399
2400 /* If this label is followed by a jump-table,
2401 make sure we put the label in the read-only section. Also
2402 possibly write the label and jump table together. */
2403
2404 if (GET_CODE (nextbody) == ADDR_VEC
2405 || GET_CODE (nextbody) == ADDR_DIFF_VEC)
2406 {
2407 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2408 /* In this case, the case vector is being moved by the
2409 target, so don't output the label at all. Leave that
2410 to the back end macros. */
2411 #else
2412 if (! JUMP_TABLES_IN_TEXT_SECTION)
2413 {
2414 readonly_data_section ();
2415 #ifdef READONLY_DATA_SECTION
2416 ASM_OUTPUT_ALIGN (file,
2417 exact_log2 (BIGGEST_ALIGNMENT
2418 / BITS_PER_UNIT));
2419 #endif /* READONLY_DATA_SECTION */
2420 }
2421 else
2422 function_section (current_function_decl);
2423
2424 #ifdef ASM_OUTPUT_CASE_LABEL
2425 ASM_OUTPUT_CASE_LABEL (file, "L", CODE_LABEL_NUMBER (insn),
2426 NEXT_INSN (insn));
2427 #else
2428 if (LABEL_ALTERNATE_NAME (insn))
2429 ASM_OUTPUT_ALTERNATE_LABEL_NAME (file, insn);
2430 else
2431 ASM_OUTPUT_INTERNAL_LABEL (file, "L", CODE_LABEL_NUMBER (insn));
2432 #endif
2433 #endif
2434 break;
2435 }
2436 }
2437 if (LABEL_ALTERNATE_NAME (insn))
2438 ASM_OUTPUT_ALTERNATE_LABEL_NAME (file, insn);
2439 else
2440 ASM_OUTPUT_INTERNAL_LABEL (file, "L", CODE_LABEL_NUMBER (insn));
2441 break;
2442
2443 default:
2444 {
2445 register rtx body = PATTERN (insn);
2446 int insn_code_number;
2447 const char *template;
2448 #ifdef HAVE_cc0
2449 rtx note;
2450 #endif
2451
2452 /* An INSN, JUMP_INSN or CALL_INSN.
2453 First check for special kinds that recog doesn't recognize. */
2454
2455 if (GET_CODE (body) == USE /* These are just declarations */
2456 || GET_CODE (body) == CLOBBER)
2457 break;
2458
2459 #ifdef HAVE_cc0
2460 /* If there is a REG_CC_SETTER note on this insn, it means that
2461 the setting of the condition code was done in the delay slot
2462 of the insn that branched here. So recover the cc status
2463 from the insn that set it. */
2464
2465 note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2466 if (note)
2467 {
2468 NOTICE_UPDATE_CC (PATTERN (XEXP (note, 0)), XEXP (note, 0));
2469 cc_prev_status = cc_status;
2470 }
2471 #endif
2472
2473 /* Detect insns that are really jump-tables
2474 and output them as such. */
2475
2476 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
2477 {
2478 #if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC))
2479 register int vlen, idx;
2480 #endif
2481
2482 if (prescan > 0)
2483 break;
2484
2485 if (app_on)
2486 {
2487 fputs (ASM_APP_OFF, file);
2488 app_on = 0;
2489 }
2490
2491 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2492 if (GET_CODE (body) == ADDR_VEC)
2493 {
2494 #ifdef ASM_OUTPUT_ADDR_VEC
2495 ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn), body);
2496 #else
2497 abort();
2498 #endif
2499 }
2500 else
2501 {
2502 #ifdef ASM_OUTPUT_ADDR_DIFF_VEC
2503 ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn), body);
2504 #else
2505 abort();
2506 #endif
2507 }
2508 #else
2509 vlen = XVECLEN (body, GET_CODE (body) == ADDR_DIFF_VEC);
2510 for (idx = 0; idx < vlen; idx++)
2511 {
2512 if (GET_CODE (body) == ADDR_VEC)
2513 {
2514 #ifdef ASM_OUTPUT_ADDR_VEC_ELT
2515 ASM_OUTPUT_ADDR_VEC_ELT
2516 (file, CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 0, idx), 0)));
2517 #else
2518 abort ();
2519 #endif
2520 }
2521 else
2522 {
2523 #ifdef ASM_OUTPUT_ADDR_DIFF_ELT
2524 ASM_OUTPUT_ADDR_DIFF_ELT
2525 (file,
2526 body,
2527 CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 1, idx), 0)),
2528 CODE_LABEL_NUMBER (XEXP (XEXP (body, 0), 0)));
2529 #else
2530 abort ();
2531 #endif
2532 }
2533 }
2534 #ifdef ASM_OUTPUT_CASE_END
2535 ASM_OUTPUT_CASE_END (file,
2536 CODE_LABEL_NUMBER (PREV_INSN (insn)),
2537 insn);
2538 #endif
2539 #endif
2540
2541 function_section (current_function_decl);
2542
2543 break;
2544 }
2545
2546 /* Do basic-block profiling when we reach a new block.
2547 Done here to avoid jump tables. */
2548 if (profile_block_flag && new_block)
2549 add_bb (file);
2550
2551 if (GET_CODE (body) == ASM_INPUT)
2552 {
2553 /* There's no telling what that did to the condition codes. */
2554 CC_STATUS_INIT;
2555 if (prescan > 0)
2556 break;
2557 if (! app_on)
2558 {
2559 fputs (ASM_APP_ON, file);
2560 app_on = 1;
2561 }
2562 fprintf (asm_out_file, "\t%s\n", XSTR (body, 0));
2563 break;
2564 }
2565
2566 /* Detect `asm' construct with operands. */
2567 if (asm_noperands (body) >= 0)
2568 {
2569 unsigned int noperands = asm_noperands (body);
2570 rtx *ops = (rtx *) alloca (noperands * sizeof (rtx));
2571 const char *string;
2572
2573 /* There's no telling what that did to the condition codes. */
2574 CC_STATUS_INIT;
2575 if (prescan > 0)
2576 break;
2577
2578 if (! app_on)
2579 {
2580 fputs (ASM_APP_ON, file);
2581 app_on = 1;
2582 }
2583
2584 /* Get out the operand values. */
2585 string = decode_asm_operands (body, ops, NULL_PTR,
2586 NULL_PTR, NULL_PTR);
2587 /* Inhibit aborts on what would otherwise be compiler bugs. */
2588 insn_noperands = noperands;
2589 this_is_asm_operands = insn;
2590
2591 /* Output the insn using them. */
2592 output_asm_insn (string, ops);
2593 this_is_asm_operands = 0;
2594 break;
2595 }
2596
2597 if (prescan <= 0 && app_on)
2598 {
2599 fputs (ASM_APP_OFF, file);
2600 app_on = 0;
2601 }
2602
2603 if (GET_CODE (body) == SEQUENCE)
2604 {
2605 /* A delayed-branch sequence */
2606 register int i;
2607 rtx next;
2608
2609 if (prescan > 0)
2610 break;
2611 final_sequence = body;
2612
2613 /* The first insn in this SEQUENCE might be a JUMP_INSN that will
2614 force the restoration of a comparison that was previously
2615 thought unnecessary. If that happens, cancel this sequence
2616 and cause that insn to be restored. */
2617
2618 next = final_scan_insn (XVECEXP (body, 0, 0), file, 0, prescan, 1);
2619 if (next != XVECEXP (body, 0, 1))
2620 {
2621 final_sequence = 0;
2622 return next;
2623 }
2624
2625 for (i = 1; i < XVECLEN (body, 0); i++)
2626 {
2627 rtx insn = XVECEXP (body, 0, i);
2628 rtx next = NEXT_INSN (insn);
2629 /* We loop in case any instruction in a delay slot gets
2630 split. */
2631 do
2632 insn = final_scan_insn (insn, file, 0, prescan, 1);
2633 while (insn != next);
2634 }
2635 #ifdef DBR_OUTPUT_SEQEND
2636 DBR_OUTPUT_SEQEND (file);
2637 #endif
2638 final_sequence = 0;
2639
2640 /* If the insn requiring the delay slot was a CALL_INSN, the
2641 insns in the delay slot are actually executed before the
2642 called function. Hence we don't preserve any CC-setting
2643 actions in these insns and the CC must be marked as being
2644 clobbered by the function. */
2645 if (GET_CODE (XVECEXP (body, 0, 0)) == CALL_INSN)
2646 {
2647 CC_STATUS_INIT;
2648 }
2649
2650 /* Following a conditional branch sequence, we have a new basic
2651 block. */
2652 if (profile_block_flag)
2653 {
2654 rtx insn = XVECEXP (body, 0, 0);
2655 rtx body = PATTERN (insn);
2656
2657 if ((GET_CODE (insn) == JUMP_INSN && GET_CODE (body) == SET
2658 && GET_CODE (SET_SRC (body)) != LABEL_REF)
2659 || (GET_CODE (insn) == JUMP_INSN
2660 && GET_CODE (body) == PARALLEL
2661 && GET_CODE (XVECEXP (body, 0, 0)) == SET
2662 && GET_CODE (SET_SRC (XVECEXP (body, 0, 0))) != LABEL_REF))
2663 new_block = 1;
2664 }
2665 break;
2666 }
2667
2668 /* We have a real machine instruction as rtl. */
2669
2670 body = PATTERN (insn);
2671
2672 #ifdef HAVE_cc0
2673 set = single_set(insn);
2674
2675 /* Check for redundant test and compare instructions
2676 (when the condition codes are already set up as desired).
2677 This is done only when optimizing; if not optimizing,
2678 it should be possible for the user to alter a variable
2679 with the debugger in between statements
2680 and the next statement should reexamine the variable
2681 to compute the condition codes. */
2682
2683 if (optimize)
2684 {
2685 #if 0
2686 rtx set = single_set(insn);
2687 #endif
2688
2689 if (set
2690 && GET_CODE (SET_DEST (set)) == CC0
2691 && insn != last_ignored_compare)
2692 {
2693 if (GET_CODE (SET_SRC (set)) == SUBREG)
2694 SET_SRC (set) = alter_subreg (SET_SRC (set));
2695 else if (GET_CODE (SET_SRC (set)) == COMPARE)
2696 {
2697 if (GET_CODE (XEXP (SET_SRC (set), 0)) == SUBREG)
2698 XEXP (SET_SRC (set), 0)
2699 = alter_subreg (XEXP (SET_SRC (set), 0));
2700 if (GET_CODE (XEXP (SET_SRC (set), 1)) == SUBREG)
2701 XEXP (SET_SRC (set), 1)
2702 = alter_subreg (XEXP (SET_SRC (set), 1));
2703 }
2704 if ((cc_status.value1 != 0
2705 && rtx_equal_p (SET_SRC (set), cc_status.value1))
2706 || (cc_status.value2 != 0
2707 && rtx_equal_p (SET_SRC (set), cc_status.value2)))
2708 {
2709 /* Don't delete insn if it has an addressing side-effect. */
2710 if (! FIND_REG_INC_NOTE (insn, 0)
2711 /* or if anything in it is volatile. */
2712 && ! volatile_refs_p (PATTERN (insn)))
2713 {
2714 /* We don't really delete the insn; just ignore it. */
2715 last_ignored_compare = insn;
2716 break;
2717 }
2718 }
2719 }
2720 }
2721 #endif
2722
2723 /* Following a conditional branch, we have a new basic block.
2724 But if we are inside a sequence, the new block starts after the
2725 last insn of the sequence. */
2726 if (profile_block_flag && final_sequence == 0
2727 && ((GET_CODE (insn) == JUMP_INSN && GET_CODE (body) == SET
2728 && GET_CODE (SET_SRC (body)) != LABEL_REF)
2729 || (GET_CODE (insn) == JUMP_INSN && GET_CODE (body) == PARALLEL
2730 && GET_CODE (XVECEXP (body, 0, 0)) == SET
2731 && GET_CODE (SET_SRC (XVECEXP (body, 0, 0))) != LABEL_REF)))
2732 new_block = 1;
2733
2734 #ifndef STACK_REGS
2735 /* Don't bother outputting obvious no-ops, even without -O.
2736 This optimization is fast and doesn't interfere with debugging.
2737 Don't do this if the insn is in a delay slot, since this
2738 will cause an improper number of delay insns to be written. */
2739 if (final_sequence == 0
2740 && prescan >= 0
2741 && GET_CODE (insn) == INSN && GET_CODE (body) == SET
2742 && GET_CODE (SET_SRC (body)) == REG
2743 && GET_CODE (SET_DEST (body)) == REG
2744 && REGNO (SET_SRC (body)) == REGNO (SET_DEST (body)))
2745 break;
2746 #endif
2747
2748 #ifdef HAVE_cc0
2749 /* If this is a conditional branch, maybe modify it
2750 if the cc's are in a nonstandard state
2751 so that it accomplishes the same thing that it would
2752 do straightforwardly if the cc's were set up normally. */
2753
2754 if (cc_status.flags != 0
2755 && GET_CODE (insn) == JUMP_INSN
2756 && GET_CODE (body) == SET
2757 && SET_DEST (body) == pc_rtx
2758 && GET_CODE (SET_SRC (body)) == IF_THEN_ELSE
2759 && GET_RTX_CLASS (GET_CODE (XEXP (SET_SRC (body), 0))) == '<'
2760 && XEXP (XEXP (SET_SRC (body), 0), 0) == cc0_rtx
2761 /* This is done during prescan; it is not done again
2762 in final scan when prescan has been done. */
2763 && prescan >= 0)
2764 {
2765 /* This function may alter the contents of its argument
2766 and clear some of the cc_status.flags bits.
2767 It may also return 1 meaning condition now always true
2768 or -1 meaning condition now always false
2769 or 2 meaning condition nontrivial but altered. */
2770 register int result = alter_cond (XEXP (SET_SRC (body), 0));
2771 /* If condition now has fixed value, replace the IF_THEN_ELSE
2772 with its then-operand or its else-operand. */
2773 if (result == 1)
2774 SET_SRC (body) = XEXP (SET_SRC (body), 1);
2775 if (result == -1)
2776 SET_SRC (body) = XEXP (SET_SRC (body), 2);
2777
2778 /* The jump is now either unconditional or a no-op.
2779 If it has become a no-op, don't try to output it.
2780 (It would not be recognized.) */
2781 if (SET_SRC (body) == pc_rtx)
2782 {
2783 PUT_CODE (insn, NOTE);
2784 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
2785 NOTE_SOURCE_FILE (insn) = 0;
2786 break;
2787 }
2788 else if (GET_CODE (SET_SRC (body)) == RETURN)
2789 /* Replace (set (pc) (return)) with (return). */
2790 PATTERN (insn) = body = SET_SRC (body);
2791
2792 /* Rerecognize the instruction if it has changed. */
2793 if (result != 0)
2794 INSN_CODE (insn) = -1;
2795 }
2796
2797 /* Make same adjustments to instructions that examine the
2798 condition codes without jumping and instructions that
2799 handle conditional moves (if this machine has either one). */
2800
2801 if (cc_status.flags != 0
2802 && set != 0)
2803 {
2804 rtx cond_rtx, then_rtx, else_rtx;
2805
2806 if (GET_CODE (insn) != JUMP_INSN
2807 && GET_CODE (SET_SRC (set)) == IF_THEN_ELSE)
2808 {
2809 cond_rtx = XEXP (SET_SRC (set), 0);
2810 then_rtx = XEXP (SET_SRC (set), 1);
2811 else_rtx = XEXP (SET_SRC (set), 2);
2812 }
2813 else
2814 {
2815 cond_rtx = SET_SRC (set);
2816 then_rtx = const_true_rtx;
2817 else_rtx = const0_rtx;
2818 }
2819
2820 switch (GET_CODE (cond_rtx))
2821 {
2822 case GTU:
2823 case GT:
2824 case LTU:
2825 case LT:
2826 case GEU:
2827 case GE:
2828 case LEU:
2829 case LE:
2830 case EQ:
2831 case NE:
2832 {
2833 register int result;
2834 if (XEXP (cond_rtx, 0) != cc0_rtx)
2835 break;
2836 result = alter_cond (cond_rtx);
2837 if (result == 1)
2838 validate_change (insn, &SET_SRC (set), then_rtx, 0);
2839 else if (result == -1)
2840 validate_change (insn, &SET_SRC (set), else_rtx, 0);
2841 else if (result == 2)
2842 INSN_CODE (insn) = -1;
2843 if (SET_DEST (set) == SET_SRC (set))
2844 {
2845 PUT_CODE (insn, NOTE);
2846 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
2847 NOTE_SOURCE_FILE (insn) = 0;
2848 }
2849 }
2850 break;
2851
2852 default:
2853 break;
2854 }
2855 }
2856
2857 #endif
2858
2859 #ifdef HAVE_peephole
2860 /* Do machine-specific peephole optimizations if desired. */
2861
2862 if (optimize && !flag_no_peephole && !nopeepholes)
2863 {
2864 rtx next = peephole (insn);
2865 /* When peepholing, if there were notes within the peephole,
2866 emit them before the peephole. */
2867 if (next != 0 && next != NEXT_INSN (insn))
2868 {
2869 rtx prev = PREV_INSN (insn);
2870 rtx note;
2871
2872 for (note = NEXT_INSN (insn); note != next;
2873 note = NEXT_INSN (note))
2874 final_scan_insn (note, file, optimize, prescan, nopeepholes);
2875
2876 /* In case this is prescan, put the notes
2877 in proper position for later rescan. */
2878 note = NEXT_INSN (insn);
2879 PREV_INSN (note) = prev;
2880 NEXT_INSN (prev) = note;
2881 NEXT_INSN (PREV_INSN (next)) = insn;
2882 PREV_INSN (insn) = PREV_INSN (next);
2883 NEXT_INSN (insn) = next;
2884 PREV_INSN (next) = insn;
2885 }
2886
2887 /* PEEPHOLE might have changed this. */
2888 body = PATTERN (insn);
2889 }
2890 #endif
2891
2892 /* Try to recognize the instruction.
2893 If successful, verify that the operands satisfy the
2894 constraints for the instruction. Crash if they don't,
2895 since `reload' should have changed them so that they do. */
2896
2897 insn_code_number = recog_memoized (insn);
2898 extract_insn (insn);
2899 cleanup_subreg_operands (insn);
2900
2901 if (! constrain_operands (1))
2902 fatal_insn_not_found (insn);
2903
2904 /* Some target machines need to prescan each insn before
2905 it is output. */
2906
2907 #ifdef FINAL_PRESCAN_INSN
2908 FINAL_PRESCAN_INSN (insn, recog_data.operand, recog_data.n_operands);
2909 #endif
2910
2911 #ifdef HAVE_conditional_execution
2912 if (GET_CODE (PATTERN (insn)) == COND_EXEC)
2913 current_insn_predicate = COND_EXEC_TEST (PATTERN (insn));
2914 else
2915 current_insn_predicate = NULL_RTX;
2916 #endif
2917
2918 #ifdef HAVE_cc0
2919 cc_prev_status = cc_status;
2920
2921 /* Update `cc_status' for this instruction.
2922 The instruction's output routine may change it further.
2923 If the output routine for a jump insn needs to depend
2924 on the cc status, it should look at cc_prev_status. */
2925
2926 NOTICE_UPDATE_CC (body, insn);
2927 #endif
2928
2929 current_output_insn = debug_insn = insn;
2930
2931 #if defined (DWARF2_UNWIND_INFO)
2932 /* If we push arguments, we want to know where the calls are. */
2933 if (!ACCUMULATE_OUTGOING_ARGS && GET_CODE (insn) == CALL_INSN
2934 && dwarf2out_do_frame ())
2935 dwarf2out_frame_debug (insn);
2936 #endif
2937
2938 /* Find the proper template for this insn. */
2939 template = get_insn_template (insn_code_number, insn);
2940
2941 /* If the C code returns 0, it means that it is a jump insn
2942 which follows a deleted test insn, and that test insn
2943 needs to be reinserted. */
2944 if (template == 0)
2945 {
2946 if (prev_nonnote_insn (insn) != last_ignored_compare)
2947 abort ();
2948 new_block = 0;
2949 return prev_nonnote_insn (insn);
2950 }
2951
2952 /* If the template is the string "#", it means that this insn must
2953 be split. */
2954 if (template[0] == '#' && template[1] == '\0')
2955 {
2956 rtx new = try_split (body, insn, 0);
2957
2958 /* If we didn't split the insn, go away. */
2959 if (new == insn && PATTERN (new) == body)
2960 fatal_insn ("Could not split insn", insn);
2961
2962 #ifdef HAVE_ATTR_length
2963 /* This instruction should have been split in shorten_branches,
2964 to ensure that we would have valid length info for the
2965 splitees. */
2966 abort ();
2967 #endif
2968
2969 new_block = 0;
2970 return new;
2971 }
2972
2973 if (prescan > 0)
2974 break;
2975
2976 #ifdef IA64_UNWIND_INFO
2977 IA64_UNWIND_EMIT (asm_out_file, insn);
2978 #endif
2979 /* Output assembler code from the template. */
2980
2981 output_asm_insn (template, recog_data.operand);
2982
2983 #if defined (DWARF2_UNWIND_INFO)
2984 /* If we push arguments, we need to check all insns for stack
2985 adjustments. */
2986 if (!ACCUMULATE_OUTGOING_ARGS)
2987 {
2988 if (GET_CODE (insn) == INSN && dwarf2out_do_frame ())
2989 dwarf2out_frame_debug (insn);
2990 }
2991 else
2992 {
2993 #if defined (HAVE_prologue)
2994 /* If this insn is part of the prologue, emit DWARF v2
2995 call frame info. */
2996 if (RTX_FRAME_RELATED_P (insn) && dwarf2out_do_frame ())
2997 dwarf2out_frame_debug (insn);
2998 #endif
2999 }
3000 #endif
3001
3002 #if 0
3003 /* It's not at all clear why we did this and doing so interferes
3004 with tests we'd like to do to use REG_WAS_0 notes, so let's try
3005 with this out. */
3006
3007 /* Mark this insn as having been output. */
3008 INSN_DELETED_P (insn) = 1;
3009 #endif
3010
3011 current_output_insn = debug_insn = 0;
3012 }
3013 }
3014 return NEXT_INSN (insn);
3015 }
3016 \f
3017 /* Output debugging info to the assembler file FILE
3018 based on the NOTE-insn INSN, assumed to be a line number. */
3019
3020 static void
3021 output_source_line (file, insn)
3022 FILE *file ATTRIBUTE_UNUSED;
3023 rtx insn;
3024 {
3025 register const char *filename = NOTE_SOURCE_FILE (insn);
3026
3027 /* Remember filename for basic block profiling.
3028 Filenames are allocated on the permanent obstack
3029 or are passed in ARGV, so we don't have to save
3030 the string. */
3031
3032 if (profile_block_flag && last_filename != filename)
3033 bb_file_label_num = add_bb_string (filename, TRUE);
3034
3035 last_filename = filename;
3036 last_linenum = NOTE_LINE_NUMBER (insn);
3037 high_block_linenum = MAX (last_linenum, high_block_linenum);
3038 high_function_linenum = MAX (last_linenum, high_function_linenum);
3039
3040 if (write_symbols != NO_DEBUG)
3041 {
3042 #ifdef SDB_DEBUGGING_INFO
3043 if (write_symbols == SDB_DEBUG
3044 #if 0 /* People like having line numbers even in wrong file! */
3045 /* COFF can't handle multiple source files--lose, lose. */
3046 && !strcmp (filename, main_input_filename)
3047 #endif
3048 /* COFF relative line numbers must be positive. */
3049 && last_linenum > sdb_begin_function_line)
3050 {
3051 #ifdef ASM_OUTPUT_SOURCE_LINE
3052 ASM_OUTPUT_SOURCE_LINE (file, last_linenum);
3053 #else
3054 fprintf (file, "\t.ln\t%d\n",
3055 ((sdb_begin_function_line > -1)
3056 ? last_linenum - sdb_begin_function_line : 1));
3057 #endif
3058 }
3059 #endif
3060
3061 #if defined (DBX_DEBUGGING_INFO)
3062 if (write_symbols == DBX_DEBUG)
3063 dbxout_source_line (file, filename, NOTE_LINE_NUMBER (insn));
3064 #endif
3065
3066 #if defined (XCOFF_DEBUGGING_INFO)
3067 if (write_symbols == XCOFF_DEBUG)
3068 xcoffout_source_line (file, filename, insn);
3069 #endif
3070
3071 #ifdef DWARF_DEBUGGING_INFO
3072 if (write_symbols == DWARF_DEBUG)
3073 dwarfout_line (filename, NOTE_LINE_NUMBER (insn));
3074 #endif
3075
3076 #ifdef DWARF2_DEBUGGING_INFO
3077 if (write_symbols == DWARF2_DEBUG)
3078 dwarf2out_line (filename, NOTE_LINE_NUMBER (insn));
3079 #endif
3080 }
3081 }
3082 \f
3083
3084 /* For each operand in INSN, simplify (subreg (reg)) so that it refers
3085 directly to the desired hard register. */
3086 void
3087 cleanup_subreg_operands (insn)
3088 rtx insn;
3089 {
3090 int i;
3091
3092 extract_insn (insn);
3093 for (i = 0; i < recog_data.n_operands; i++)
3094 {
3095 if (GET_CODE (recog_data.operand[i]) == SUBREG)
3096 recog_data.operand[i] = alter_subreg (recog_data.operand[i]);
3097 else if (GET_CODE (recog_data.operand[i]) == PLUS
3098 || GET_CODE (recog_data.operand[i]) == MULT)
3099 recog_data.operand[i] = walk_alter_subreg (recog_data.operand[i]);
3100 }
3101
3102 for (i = 0; i < recog_data.n_dups; i++)
3103 {
3104 if (GET_CODE (*recog_data.dup_loc[i]) == SUBREG)
3105 *recog_data.dup_loc[i] = alter_subreg (*recog_data.dup_loc[i]);
3106 else if (GET_CODE (*recog_data.dup_loc[i]) == PLUS
3107 || GET_CODE (*recog_data.dup_loc[i]) == MULT)
3108 *recog_data.dup_loc[i] = walk_alter_subreg (*recog_data.dup_loc[i]);
3109 }
3110 }
3111
3112 /* If X is a SUBREG, replace it with a REG or a MEM,
3113 based on the thing it is a subreg of. */
3114
3115 rtx
3116 alter_subreg (x)
3117 register rtx x;
3118 {
3119 register rtx y = SUBREG_REG (x);
3120
3121 if (GET_CODE (y) == SUBREG)
3122 y = alter_subreg (y);
3123
3124 /* If reload is operating, we may be replacing inside this SUBREG.
3125 Check for that and make a new one if so. */
3126 if (reload_in_progress && find_replacement (&SUBREG_REG (x)) != 0)
3127 x = copy_rtx (x);
3128
3129 if (GET_CODE (y) == REG)
3130 {
3131 int regno;
3132 /* If the word size is larger than the size of this register,
3133 adjust the register number to compensate. */
3134 /* ??? Note that this just catches stragglers created by/for
3135 integrate. It would be better if we either caught these
3136 earlier, or kept _all_ subregs until now and eliminate
3137 gen_lowpart and friends. */
3138
3139 #ifdef ALTER_HARD_SUBREG
3140 regno = ALTER_HARD_SUBREG(GET_MODE (x), SUBREG_WORD (x),
3141 GET_MODE (y), REGNO (y));
3142 #else
3143 regno = REGNO (y) + SUBREG_WORD (x);
3144 #endif
3145 PUT_CODE (x, REG);
3146 REGNO (x) = regno;
3147 /* This field has a different meaning for REGs and SUBREGs. Make sure
3148 to clear it! */
3149 x->used = 0;
3150 }
3151 else if (GET_CODE (y) == MEM)
3152 {
3153 register int offset = SUBREG_WORD (x) * UNITS_PER_WORD;
3154
3155 if (BYTES_BIG_ENDIAN)
3156 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x)))
3157 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (y))));
3158 PUT_CODE (x, MEM);
3159 MEM_COPY_ATTRIBUTES (x, y);
3160 XEXP (x, 0) = plus_constant (XEXP (y, 0), offset);
3161 }
3162
3163 return x;
3164 }
3165
3166 /* Do alter_subreg on all the SUBREGs contained in X. */
3167
3168 static rtx
3169 walk_alter_subreg (x)
3170 rtx x;
3171 {
3172 switch (GET_CODE (x))
3173 {
3174 case PLUS:
3175 case MULT:
3176 XEXP (x, 0) = walk_alter_subreg (XEXP (x, 0));
3177 XEXP (x, 1) = walk_alter_subreg (XEXP (x, 1));
3178 break;
3179
3180 case MEM:
3181 XEXP (x, 0) = walk_alter_subreg (XEXP (x, 0));
3182 break;
3183
3184 case SUBREG:
3185 return alter_subreg (x);
3186
3187 default:
3188 break;
3189 }
3190
3191 return x;
3192 }
3193 \f
3194 #ifdef HAVE_cc0
3195
3196 /* Given BODY, the body of a jump instruction, alter the jump condition
3197 as required by the bits that are set in cc_status.flags.
3198 Not all of the bits there can be handled at this level in all cases.
3199
3200 The value is normally 0.
3201 1 means that the condition has become always true.
3202 -1 means that the condition has become always false.
3203 2 means that COND has been altered. */
3204
3205 static int
3206 alter_cond (cond)
3207 register rtx cond;
3208 {
3209 int value = 0;
3210
3211 if (cc_status.flags & CC_REVERSED)
3212 {
3213 value = 2;
3214 PUT_CODE (cond, swap_condition (GET_CODE (cond)));
3215 }
3216
3217 if (cc_status.flags & CC_INVERTED)
3218 {
3219 value = 2;
3220 PUT_CODE (cond, reverse_condition (GET_CODE (cond)));
3221 }
3222
3223 if (cc_status.flags & CC_NOT_POSITIVE)
3224 switch (GET_CODE (cond))
3225 {
3226 case LE:
3227 case LEU:
3228 case GEU:
3229 /* Jump becomes unconditional. */
3230 return 1;
3231
3232 case GT:
3233 case GTU:
3234 case LTU:
3235 /* Jump becomes no-op. */
3236 return -1;
3237
3238 case GE:
3239 PUT_CODE (cond, EQ);
3240 value = 2;
3241 break;
3242
3243 case LT:
3244 PUT_CODE (cond, NE);
3245 value = 2;
3246 break;
3247
3248 default:
3249 break;
3250 }
3251
3252 if (cc_status.flags & CC_NOT_NEGATIVE)
3253 switch (GET_CODE (cond))
3254 {
3255 case GE:
3256 case GEU:
3257 /* Jump becomes unconditional. */
3258 return 1;
3259
3260 case LT:
3261 case LTU:
3262 /* Jump becomes no-op. */
3263 return -1;
3264
3265 case LE:
3266 case LEU:
3267 PUT_CODE (cond, EQ);
3268 value = 2;
3269 break;
3270
3271 case GT:
3272 case GTU:
3273 PUT_CODE (cond, NE);
3274 value = 2;
3275 break;
3276
3277 default:
3278 break;
3279 }
3280
3281 if (cc_status.flags & CC_NO_OVERFLOW)
3282 switch (GET_CODE (cond))
3283 {
3284 case GEU:
3285 /* Jump becomes unconditional. */
3286 return 1;
3287
3288 case LEU:
3289 PUT_CODE (cond, EQ);
3290 value = 2;
3291 break;
3292
3293 case GTU:
3294 PUT_CODE (cond, NE);
3295 value = 2;
3296 break;
3297
3298 case LTU:
3299 /* Jump becomes no-op. */
3300 return -1;
3301
3302 default:
3303 break;
3304 }
3305
3306 if (cc_status.flags & (CC_Z_IN_NOT_N | CC_Z_IN_N))
3307 switch (GET_CODE (cond))
3308 {
3309 default:
3310 abort ();
3311
3312 case NE:
3313 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? GE : LT);
3314 value = 2;
3315 break;
3316
3317 case EQ:
3318 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? LT : GE);
3319 value = 2;
3320 break;
3321 }
3322
3323 if (cc_status.flags & CC_NOT_SIGNED)
3324 /* The flags are valid if signed condition operators are converted
3325 to unsigned. */
3326 switch (GET_CODE (cond))
3327 {
3328 case LE:
3329 PUT_CODE (cond, LEU);
3330 value = 2;
3331 break;
3332
3333 case LT:
3334 PUT_CODE (cond, LTU);
3335 value = 2;
3336 break;
3337
3338 case GT:
3339 PUT_CODE (cond, GTU);
3340 value = 2;
3341 break;
3342
3343 case GE:
3344 PUT_CODE (cond, GEU);
3345 value = 2;
3346 break;
3347
3348 default:
3349 break;
3350 }
3351
3352 return value;
3353 }
3354 #endif
3355 \f
3356 /* Report inconsistency between the assembler template and the operands.
3357 In an `asm', it's the user's fault; otherwise, the compiler's fault. */
3358
3359 void
3360 output_operand_lossage (msgid)
3361 const char *msgid;
3362 {
3363 if (this_is_asm_operands)
3364 error_for_asm (this_is_asm_operands, "invalid `asm': %s", _(msgid));
3365 else
3366 {
3367 error ("output_operand: %s", _(msgid));
3368 abort ();
3369 }
3370 }
3371 \f
3372 /* Output of assembler code from a template, and its subroutines. */
3373
3374 /* Output text from TEMPLATE to the assembler output file,
3375 obeying %-directions to substitute operands taken from
3376 the vector OPERANDS.
3377
3378 %N (for N a digit) means print operand N in usual manner.
3379 %lN means require operand N to be a CODE_LABEL or LABEL_REF
3380 and print the label name with no punctuation.
3381 %cN means require operand N to be a constant
3382 and print the constant expression with no punctuation.
3383 %aN means expect operand N to be a memory address
3384 (not a memory reference!) and print a reference
3385 to that address.
3386 %nN means expect operand N to be a constant
3387 and print a constant expression for minus the value
3388 of the operand, with no other punctuation. */
3389
3390 static void
3391 output_asm_name ()
3392 {
3393 if (flag_print_asm_name)
3394 {
3395 /* Annotate the assembly with a comment describing the pattern and
3396 alternative used. */
3397 if (debug_insn)
3398 {
3399 register int num = INSN_CODE (debug_insn);
3400 fprintf (asm_out_file, "\t%s %d\t%s",
3401 ASM_COMMENT_START, INSN_UID (debug_insn),
3402 insn_data[num].name);
3403 if (insn_data[num].n_alternatives > 1)
3404 fprintf (asm_out_file, "/%d", which_alternative + 1);
3405 #ifdef HAVE_ATTR_length
3406 fprintf (asm_out_file, "\t[length = %d]",
3407 get_attr_length (debug_insn));
3408 #endif
3409 /* Clear this so only the first assembler insn
3410 of any rtl insn will get the special comment for -dp. */
3411 debug_insn = 0;
3412 }
3413 }
3414 }
3415
3416 void
3417 output_asm_insn (template, operands)
3418 const char *template;
3419 rtx *operands;
3420 {
3421 register const char *p;
3422 register int c;
3423
3424 /* An insn may return a null string template
3425 in a case where no assembler code is needed. */
3426 if (*template == 0)
3427 return;
3428
3429 p = template;
3430 putc ('\t', asm_out_file);
3431
3432 #ifdef ASM_OUTPUT_OPCODE
3433 ASM_OUTPUT_OPCODE (asm_out_file, p);
3434 #endif
3435
3436 while ((c = *p++))
3437 switch (c)
3438 {
3439 case '\n':
3440 output_asm_name ();
3441 putc (c, asm_out_file);
3442 #ifdef ASM_OUTPUT_OPCODE
3443 while ((c = *p) == '\t')
3444 {
3445 putc (c, asm_out_file);
3446 p++;
3447 }
3448 ASM_OUTPUT_OPCODE (asm_out_file, p);
3449 #endif
3450 break;
3451
3452 #ifdef ASSEMBLER_DIALECT
3453 case '{':
3454 {
3455 register int i;
3456
3457 /* If we want the first dialect, do nothing. Otherwise, skip
3458 DIALECT_NUMBER of strings ending with '|'. */
3459 for (i = 0; i < dialect_number; i++)
3460 {
3461 while (*p && *p != '}' && *p++ != '|')
3462 ;
3463 if (*p == '}')
3464 break;
3465 if (*p == '|')
3466 p++;
3467 }
3468 }
3469 break;
3470
3471 case '|':
3472 /* Skip to close brace. */
3473 while (*p && *p++ != '}')
3474 ;
3475 break;
3476
3477 case '}':
3478 break;
3479 #endif
3480
3481 case '%':
3482 /* %% outputs a single %. */
3483 if (*p == '%')
3484 {
3485 p++;
3486 putc (c, asm_out_file);
3487 }
3488 /* %= outputs a number which is unique to each insn in the entire
3489 compilation. This is useful for making local labels that are
3490 referred to more than once in a given insn. */
3491 else if (*p == '=')
3492 {
3493 p++;
3494 fprintf (asm_out_file, "%d", insn_counter);
3495 }
3496 /* % followed by a letter and some digits
3497 outputs an operand in a special way depending on the letter.
3498 Letters `acln' are implemented directly.
3499 Other letters are passed to `output_operand' so that
3500 the PRINT_OPERAND macro can define them. */
3501 else if (ISLOWER(*p) || ISUPPER(*p))
3502 {
3503 int letter = *p++;
3504 c = atoi (p);
3505
3506 if (! (*p >= '0' && *p <= '9'))
3507 output_operand_lossage ("operand number missing after %-letter");
3508 else if (this_is_asm_operands && (c < 0 || (unsigned int) c >= insn_noperands))
3509 output_operand_lossage ("operand number out of range");
3510 else if (letter == 'l')
3511 output_asm_label (operands[c]);
3512 else if (letter == 'a')
3513 output_address (operands[c]);
3514 else if (letter == 'c')
3515 {
3516 if (CONSTANT_ADDRESS_P (operands[c]))
3517 output_addr_const (asm_out_file, operands[c]);
3518 else
3519 output_operand (operands[c], 'c');
3520 }
3521 else if (letter == 'n')
3522 {
3523 if (GET_CODE (operands[c]) == CONST_INT)
3524 fprintf (asm_out_file, HOST_WIDE_INT_PRINT_DEC,
3525 - INTVAL (operands[c]));
3526 else
3527 {
3528 putc ('-', asm_out_file);
3529 output_addr_const (asm_out_file, operands[c]);
3530 }
3531 }
3532 else
3533 output_operand (operands[c], letter);
3534
3535 while ((c = *p) >= '0' && c <= '9') p++;
3536 }
3537 /* % followed by a digit outputs an operand the default way. */
3538 else if (*p >= '0' && *p <= '9')
3539 {
3540 c = atoi (p);
3541 if (this_is_asm_operands && (c < 0 || (unsigned int) c >= insn_noperands))
3542 output_operand_lossage ("operand number out of range");
3543 else
3544 output_operand (operands[c], 0);
3545 while ((c = *p) >= '0' && c <= '9') p++;
3546 }
3547 /* % followed by punctuation: output something for that
3548 punctuation character alone, with no operand.
3549 The PRINT_OPERAND macro decides what is actually done. */
3550 #ifdef PRINT_OPERAND_PUNCT_VALID_P
3551 else if (PRINT_OPERAND_PUNCT_VALID_P ((unsigned char)*p))
3552 output_operand (NULL_RTX, *p++);
3553 #endif
3554 else
3555 output_operand_lossage ("invalid %%-code");
3556 break;
3557
3558 default:
3559 putc (c, asm_out_file);
3560 }
3561
3562 output_asm_name ();
3563
3564 putc ('\n', asm_out_file);
3565 }
3566 \f
3567 /* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */
3568
3569 void
3570 output_asm_label (x)
3571 rtx x;
3572 {
3573 char buf[256];
3574
3575 if (GET_CODE (x) == LABEL_REF)
3576 x = XEXP (x, 0);
3577 if (GET_CODE (x) == CODE_LABEL
3578 || (GET_CODE (x) == NOTE
3579 && NOTE_LINE_NUMBER (x) == NOTE_INSN_DELETED_LABEL))
3580 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3581 else
3582 output_operand_lossage ("`%l' operand isn't a label");
3583
3584 assemble_name (asm_out_file, buf);
3585 }
3586
3587 /* Print operand X using machine-dependent assembler syntax.
3588 The macro PRINT_OPERAND is defined just to control this function.
3589 CODE is a non-digit that preceded the operand-number in the % spec,
3590 such as 'z' if the spec was `%z3'. CODE is 0 if there was no char
3591 between the % and the digits.
3592 When CODE is a non-letter, X is 0.
3593
3594 The meanings of the letters are machine-dependent and controlled
3595 by PRINT_OPERAND. */
3596
3597 static void
3598 output_operand (x, code)
3599 rtx x;
3600 int code ATTRIBUTE_UNUSED;
3601 {
3602 if (x && GET_CODE (x) == SUBREG)
3603 x = alter_subreg (x);
3604
3605 /* If X is a pseudo-register, abort now rather than writing trash to the
3606 assembler file. */
3607
3608 if (x && GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER)
3609 abort ();
3610
3611 PRINT_OPERAND (asm_out_file, x, code);
3612 }
3613
3614 /* Print a memory reference operand for address X
3615 using machine-dependent assembler syntax.
3616 The macro PRINT_OPERAND_ADDRESS exists just to control this function. */
3617
3618 void
3619 output_address (x)
3620 rtx x;
3621 {
3622 walk_alter_subreg (x);
3623 PRINT_OPERAND_ADDRESS (asm_out_file, x);
3624 }
3625 \f
3626 /* Print an integer constant expression in assembler syntax.
3627 Addition and subtraction are the only arithmetic
3628 that may appear in these expressions. */
3629
3630 void
3631 output_addr_const (file, x)
3632 FILE *file;
3633 rtx x;
3634 {
3635 char buf[256];
3636
3637 restart:
3638 switch (GET_CODE (x))
3639 {
3640 case PC:
3641 if (flag_pic)
3642 putc ('.', file);
3643 else
3644 abort ();
3645 break;
3646
3647 case SYMBOL_REF:
3648 assemble_name (file, XSTR (x, 0));
3649 break;
3650
3651 case LABEL_REF:
3652 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (XEXP (x, 0)));
3653 assemble_name (file, buf);
3654 break;
3655
3656 case CODE_LABEL:
3657 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3658 assemble_name (file, buf);
3659 break;
3660
3661 case CONST_INT:
3662 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x));
3663 break;
3664
3665 case CONST:
3666 /* This used to output parentheses around the expression,
3667 but that does not work on the 386 (either ATT or BSD assembler). */
3668 output_addr_const (file, XEXP (x, 0));
3669 break;
3670
3671 case CONST_DOUBLE:
3672 if (GET_MODE (x) == VOIDmode)
3673 {
3674 /* We can use %d if the number is one word and positive. */
3675 if (CONST_DOUBLE_HIGH (x))
3676 fprintf (file, HOST_WIDE_INT_PRINT_DOUBLE_HEX,
3677 CONST_DOUBLE_HIGH (x), CONST_DOUBLE_LOW (x));
3678 else if (CONST_DOUBLE_LOW (x) < 0)
3679 fprintf (file, HOST_WIDE_INT_PRINT_HEX, CONST_DOUBLE_LOW (x));
3680 else
3681 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x));
3682 }
3683 else
3684 /* We can't handle floating point constants;
3685 PRINT_OPERAND must handle them. */
3686 output_operand_lossage ("floating constant misused");
3687 break;
3688
3689 case PLUS:
3690 /* Some assemblers need integer constants to appear last (eg masm). */
3691 if (GET_CODE (XEXP (x, 0)) == CONST_INT)
3692 {
3693 output_addr_const (file, XEXP (x, 1));
3694 if (INTVAL (XEXP (x, 0)) >= 0)
3695 fprintf (file, "+");
3696 output_addr_const (file, XEXP (x, 0));
3697 }
3698 else
3699 {
3700 output_addr_const (file, XEXP (x, 0));
3701 if (INTVAL (XEXP (x, 1)) >= 0)
3702 fprintf (file, "+");
3703 output_addr_const (file, XEXP (x, 1));
3704 }
3705 break;
3706
3707 case MINUS:
3708 /* Avoid outputting things like x-x or x+5-x,
3709 since some assemblers can't handle that. */
3710 x = simplify_subtraction (x);
3711 if (GET_CODE (x) != MINUS)
3712 goto restart;
3713
3714 output_addr_const (file, XEXP (x, 0));
3715 fprintf (file, "-");
3716 if (GET_CODE (XEXP (x, 1)) == CONST_INT
3717 && INTVAL (XEXP (x, 1)) < 0)
3718 {
3719 fprintf (file, "%s", ASM_OPEN_PAREN);
3720 output_addr_const (file, XEXP (x, 1));
3721 fprintf (file, "%s", ASM_CLOSE_PAREN);
3722 }
3723 else
3724 output_addr_const (file, XEXP (x, 1));
3725 break;
3726
3727 case ZERO_EXTEND:
3728 case SIGN_EXTEND:
3729 output_addr_const (file, XEXP (x, 0));
3730 break;
3731
3732 default:
3733 output_operand_lossage ("invalid expression as operand");
3734 }
3735 }
3736 \f
3737 /* A poor man's fprintf, with the added features of %I, %R, %L, and %U.
3738 %R prints the value of REGISTER_PREFIX.
3739 %L prints the value of LOCAL_LABEL_PREFIX.
3740 %U prints the value of USER_LABEL_PREFIX.
3741 %I prints the value of IMMEDIATE_PREFIX.
3742 %O runs ASM_OUTPUT_OPCODE to transform what follows in the string.
3743 Also supported are %d, %x, %s, %e, %f, %g and %%.
3744
3745 We handle alternate assembler dialects here, just like output_asm_insn. */
3746
3747 void
3748 asm_fprintf VPARAMS ((FILE *file, const char *p, ...))
3749 {
3750 #ifndef ANSI_PROTOTYPES
3751 FILE *file;
3752 const char *p;
3753 #endif
3754 va_list argptr;
3755 char buf[10];
3756 char *q, c;
3757
3758 VA_START (argptr, p);
3759
3760 #ifndef ANSI_PROTOTYPES
3761 file = va_arg (argptr, FILE *);
3762 p = va_arg (argptr, const char *);
3763 #endif
3764
3765 buf[0] = '%';
3766
3767 while ((c = *p++))
3768 switch (c)
3769 {
3770 #ifdef ASSEMBLER_DIALECT
3771 case '{':
3772 {
3773 int i;
3774
3775 /* If we want the first dialect, do nothing. Otherwise, skip
3776 DIALECT_NUMBER of strings ending with '|'. */
3777 for (i = 0; i < dialect_number; i++)
3778 {
3779 while (*p && *p++ != '|')
3780 ;
3781
3782 if (*p == '|')
3783 p++;
3784 }
3785 }
3786 break;
3787
3788 case '|':
3789 /* Skip to close brace. */
3790 while (*p && *p++ != '}')
3791 ;
3792 break;
3793
3794 case '}':
3795 break;
3796 #endif
3797
3798 case '%':
3799 c = *p++;
3800 q = &buf[1];
3801 while ((c >= '0' && c <= '9') || c == '.')
3802 {
3803 *q++ = c;
3804 c = *p++;
3805 }
3806 switch (c)
3807 {
3808 case '%':
3809 fprintf (file, "%%");
3810 break;
3811
3812 case 'd': case 'i': case 'u':
3813 case 'x': case 'p': case 'X':
3814 case 'o':
3815 *q++ = c;
3816 *q = 0;
3817 fprintf (file, buf, va_arg (argptr, int));
3818 break;
3819
3820 case 'w':
3821 /* This is a prefix to the 'd', 'i', 'u', 'x', 'p', and 'X' cases,
3822 but we do not check for those cases. It means that the value
3823 is a HOST_WIDE_INT, which may be either `int' or `long'. */
3824
3825 #if HOST_BITS_PER_WIDE_INT == HOST_BITS_PER_INT
3826 #else
3827 #if HOST_BITS_PER_WIDE_INT == HOST_BITS_PER_LONG
3828 *q++ = 'l';
3829 #else
3830 *q++ = 'l';
3831 *q++ = 'l';
3832 #endif
3833 #endif
3834
3835 *q++ = *p++;
3836 *q = 0;
3837 fprintf (file, buf, va_arg (argptr, HOST_WIDE_INT));
3838 break;
3839
3840 case 'l':
3841 *q++ = c;
3842 *q++ = *p++;
3843 *q = 0;
3844 fprintf (file, buf, va_arg (argptr, long));
3845 break;
3846
3847 case 'e':
3848 case 'f':
3849 case 'g':
3850 *q++ = c;
3851 *q = 0;
3852 fprintf (file, buf, va_arg (argptr, double));
3853 break;
3854
3855 case 's':
3856 *q++ = c;
3857 *q = 0;
3858 fprintf (file, buf, va_arg (argptr, char *));
3859 break;
3860
3861 case 'O':
3862 #ifdef ASM_OUTPUT_OPCODE
3863 ASM_OUTPUT_OPCODE (asm_out_file, p);
3864 #endif
3865 break;
3866
3867 case 'R':
3868 #ifdef REGISTER_PREFIX
3869 fprintf (file, "%s", REGISTER_PREFIX);
3870 #endif
3871 break;
3872
3873 case 'I':
3874 #ifdef IMMEDIATE_PREFIX
3875 fprintf (file, "%s", IMMEDIATE_PREFIX);
3876 #endif
3877 break;
3878
3879 case 'L':
3880 #ifdef LOCAL_LABEL_PREFIX
3881 fprintf (file, "%s", LOCAL_LABEL_PREFIX);
3882 #endif
3883 break;
3884
3885 case 'U':
3886 fputs (user_label_prefix, file);
3887 break;
3888
3889 #ifdef ASM_FPRINTF_EXTENSIONS
3890 /* Upper case letters are reserved for general use by asm_fprintf
3891 and so are not available to target specific code. In order to
3892 prevent the ASM_FPRINTF_EXTENSIONS macro from using them then,
3893 they are defined here. As they get turned into real extensions
3894 to asm_fprintf they should be removed from this list. */
3895 case 'A': case 'B': case 'C': case 'D': case 'E':
3896 case 'F': case 'G': case 'H': case 'J': case 'K':
3897 case 'M': case 'N': case 'P': case 'Q': case 'S':
3898 case 'T': case 'V': case 'W': case 'Y': case 'Z':
3899 break;
3900
3901 ASM_FPRINTF_EXTENSIONS (file, argptr, p)
3902 #endif
3903 default:
3904 abort ();
3905 }
3906 break;
3907
3908 default:
3909 fputc (c, file);
3910 }
3911 va_end (argptr);
3912 }
3913 \f
3914 /* Split up a CONST_DOUBLE or integer constant rtx
3915 into two rtx's for single words,
3916 storing in *FIRST the word that comes first in memory in the target
3917 and in *SECOND the other. */
3918
3919 void
3920 split_double (value, first, second)
3921 rtx value;
3922 rtx *first, *second;
3923 {
3924 if (GET_CODE (value) == CONST_INT)
3925 {
3926 if (HOST_BITS_PER_WIDE_INT >= (2 * BITS_PER_WORD))
3927 {
3928 /* In this case the CONST_INT holds both target words.
3929 Extract the bits from it into two word-sized pieces.
3930 Sign extend each half to HOST_WIDE_INT. */
3931 unsigned HOST_WIDE_INT low, high;
3932 unsigned HOST_WIDE_INT mask, sign_bit, sign_extend;
3933
3934 /* Set sign_bit to the most significant bit of a word. */
3935 sign_bit = 1;
3936 sign_bit <<= BITS_PER_WORD - 1;
3937
3938 /* Set mask so that all bits of the word are set. We could
3939 have used 1 << BITS_PER_WORD instead of basing the
3940 calculation on sign_bit. However, on machines where
3941 HOST_BITS_PER_WIDE_INT == BITS_PER_WORD, it could cause a
3942 compiler warning, even though the code would never be
3943 executed. */
3944 mask = sign_bit << 1;
3945 mask--;
3946
3947 /* Set sign_extend as any remaining bits. */
3948 sign_extend = ~mask;
3949
3950 /* Pick the lower word and sign-extend it. */
3951 low = INTVAL (value);
3952 low &= mask;
3953 if (low & sign_bit)
3954 low |= sign_extend;
3955
3956 /* Pick the higher word, shifted to the least significant
3957 bits, and sign-extend it. */
3958 high = INTVAL (value);
3959 high >>= BITS_PER_WORD - 1;
3960 high >>= 1;
3961 high &= mask;
3962 if (high & sign_bit)
3963 high |= sign_extend;
3964
3965 /* Store the words in the target machine order. */
3966 if (WORDS_BIG_ENDIAN)
3967 {
3968 *first = GEN_INT (high);
3969 *second = GEN_INT (low);
3970 }
3971 else
3972 {
3973 *first = GEN_INT (low);
3974 *second = GEN_INT (high);
3975 }
3976 }
3977 else
3978 {
3979 /* The rule for using CONST_INT for a wider mode
3980 is that we regard the value as signed.
3981 So sign-extend it. */
3982 rtx high = (INTVAL (value) < 0 ? constm1_rtx : const0_rtx);
3983 if (WORDS_BIG_ENDIAN)
3984 {
3985 *first = high;
3986 *second = value;
3987 }
3988 else
3989 {
3990 *first = value;
3991 *second = high;
3992 }
3993 }
3994 }
3995 else if (GET_CODE (value) != CONST_DOUBLE)
3996 {
3997 if (WORDS_BIG_ENDIAN)
3998 {
3999 *first = const0_rtx;
4000 *second = value;
4001 }
4002 else
4003 {
4004 *first = value;
4005 *second = const0_rtx;
4006 }
4007 }
4008 else if (GET_MODE (value) == VOIDmode
4009 /* This is the old way we did CONST_DOUBLE integers. */
4010 || GET_MODE_CLASS (GET_MODE (value)) == MODE_INT)
4011 {
4012 /* In an integer, the words are defined as most and least significant.
4013 So order them by the target's convention. */
4014 if (WORDS_BIG_ENDIAN)
4015 {
4016 *first = GEN_INT (CONST_DOUBLE_HIGH (value));
4017 *second = GEN_INT (CONST_DOUBLE_LOW (value));
4018 }
4019 else
4020 {
4021 *first = GEN_INT (CONST_DOUBLE_LOW (value));
4022 *second = GEN_INT (CONST_DOUBLE_HIGH (value));
4023 }
4024 }
4025 else
4026 {
4027 #ifdef REAL_ARITHMETIC
4028 REAL_VALUE_TYPE r; long l[2];
4029 REAL_VALUE_FROM_CONST_DOUBLE (r, value);
4030
4031 /* Note, this converts the REAL_VALUE_TYPE to the target's
4032 format, splits up the floating point double and outputs
4033 exactly 32 bits of it into each of l[0] and l[1] --
4034 not necessarily BITS_PER_WORD bits. */
4035 REAL_VALUE_TO_TARGET_DOUBLE (r, l);
4036
4037 /* If 32 bits is an entire word for the target, but not for the host,
4038 then sign-extend on the host so that the number will look the same
4039 way on the host that it would on the target. See for instance
4040 simplify_unary_operation. The #if is needed to avoid compiler
4041 warnings. */
4042
4043 #if HOST_BITS_PER_LONG > 32
4044 if (BITS_PER_WORD < HOST_BITS_PER_LONG && BITS_PER_WORD == 32)
4045 {
4046 if (l[0] & ((long) 1 << 31))
4047 l[0] |= ((long) (-1) << 32);
4048 if (l[1] & ((long) 1 << 31))
4049 l[1] |= ((long) (-1) << 32);
4050 }
4051 #endif
4052
4053 *first = GEN_INT ((HOST_WIDE_INT) l[0]);
4054 *second = GEN_INT ((HOST_WIDE_INT) l[1]);
4055 #else
4056 if ((HOST_FLOAT_FORMAT != TARGET_FLOAT_FORMAT
4057 || HOST_BITS_PER_WIDE_INT != BITS_PER_WORD)
4058 && ! flag_pretend_float)
4059 abort ();
4060
4061 if (
4062 #ifdef HOST_WORDS_BIG_ENDIAN
4063 WORDS_BIG_ENDIAN
4064 #else
4065 ! WORDS_BIG_ENDIAN
4066 #endif
4067 )
4068 {
4069 /* Host and target agree => no need to swap. */
4070 *first = GEN_INT (CONST_DOUBLE_LOW (value));
4071 *second = GEN_INT (CONST_DOUBLE_HIGH (value));
4072 }
4073 else
4074 {
4075 *second = GEN_INT (CONST_DOUBLE_LOW (value));
4076 *first = GEN_INT (CONST_DOUBLE_HIGH (value));
4077 }
4078 #endif /* no REAL_ARITHMETIC */
4079 }
4080 }
4081 \f
4082 /* Return nonzero if this function has no function calls. */
4083
4084 int
4085 leaf_function_p ()
4086 {
4087 rtx insn;
4088
4089 if (profile_flag || profile_block_flag || profile_arc_flag)
4090 return 0;
4091
4092 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4093 {
4094 if (GET_CODE (insn) == CALL_INSN
4095 && ! SIBLING_CALL_P (insn))
4096 return 0;
4097 if (GET_CODE (insn) == INSN
4098 && GET_CODE (PATTERN (insn)) == SEQUENCE
4099 && GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) == CALL_INSN
4100 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0)))
4101 return 0;
4102 }
4103 for (insn = current_function_epilogue_delay_list; insn; insn = XEXP (insn, 1))
4104 {
4105 if (GET_CODE (XEXP (insn, 0)) == CALL_INSN
4106 && ! SIBLING_CALL_P (insn))
4107 return 0;
4108 if (GET_CODE (XEXP (insn, 0)) == INSN
4109 && GET_CODE (PATTERN (XEXP (insn, 0))) == SEQUENCE
4110 && GET_CODE (XVECEXP (PATTERN (XEXP (insn, 0)), 0, 0)) == CALL_INSN
4111 && ! SIBLING_CALL_P (XVECEXP (PATTERN (XEXP (insn, 0)), 0, 0)))
4112 return 0;
4113 }
4114
4115 return 1;
4116 }
4117
4118 /* On some machines, a function with no call insns
4119 can run faster if it doesn't create its own register window.
4120 When output, the leaf function should use only the "output"
4121 registers. Ordinarily, the function would be compiled to use
4122 the "input" registers to find its arguments; it is a candidate
4123 for leaf treatment if it uses only the "input" registers.
4124 Leaf function treatment means renumbering so the function
4125 uses the "output" registers instead. */
4126
4127 #ifdef LEAF_REGISTERS
4128
4129 /* Return 1 if this function uses only the registers that can be
4130 safely renumbered. */
4131
4132 int
4133 only_leaf_regs_used ()
4134 {
4135 int i;
4136 char *permitted_reg_in_leaf_functions = LEAF_REGISTERS;
4137
4138 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
4139 if ((regs_ever_live[i] || global_regs[i])
4140 && ! permitted_reg_in_leaf_functions[i])
4141 return 0;
4142
4143 if (current_function_uses_pic_offset_table
4144 && pic_offset_table_rtx != 0
4145 && GET_CODE (pic_offset_table_rtx) == REG
4146 && ! permitted_reg_in_leaf_functions[REGNO (pic_offset_table_rtx)])
4147 return 0;
4148
4149 return 1;
4150 }
4151
4152 /* Scan all instructions and renumber all registers into those
4153 available in leaf functions. */
4154
4155 static void
4156 leaf_renumber_regs (first)
4157 rtx first;
4158 {
4159 rtx insn;
4160
4161 /* Renumber only the actual patterns.
4162 The reg-notes can contain frame pointer refs,
4163 and renumbering them could crash, and should not be needed. */
4164 for (insn = first; insn; insn = NEXT_INSN (insn))
4165 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
4166 leaf_renumber_regs_insn (PATTERN (insn));
4167 for (insn = current_function_epilogue_delay_list; insn; insn = XEXP (insn, 1))
4168 if (GET_RTX_CLASS (GET_CODE (XEXP (insn, 0))) == 'i')
4169 leaf_renumber_regs_insn (PATTERN (XEXP (insn, 0)));
4170 }
4171
4172 /* Scan IN_RTX and its subexpressions, and renumber all regs into those
4173 available in leaf functions. */
4174
4175 void
4176 leaf_renumber_regs_insn (in_rtx)
4177 register rtx in_rtx;
4178 {
4179 register int i, j;
4180 register const char *format_ptr;
4181
4182 if (in_rtx == 0)
4183 return;
4184
4185 /* Renumber all input-registers into output-registers.
4186 renumbered_regs would be 1 for an output-register;
4187 they */
4188
4189 if (GET_CODE (in_rtx) == REG)
4190 {
4191 int newreg;
4192
4193 /* Don't renumber the same reg twice. */
4194 if (in_rtx->used)
4195 return;
4196
4197 newreg = REGNO (in_rtx);
4198 /* Don't try to renumber pseudo regs. It is possible for a pseudo reg
4199 to reach here as part of a REG_NOTE. */
4200 if (newreg >= FIRST_PSEUDO_REGISTER)
4201 {
4202 in_rtx->used = 1;
4203 return;
4204 }
4205 newreg = LEAF_REG_REMAP (newreg);
4206 if (newreg < 0)
4207 abort ();
4208 regs_ever_live[REGNO (in_rtx)] = 0;
4209 regs_ever_live[newreg] = 1;
4210 REGNO (in_rtx) = newreg;
4211 in_rtx->used = 1;
4212 }
4213
4214 if (GET_RTX_CLASS (GET_CODE (in_rtx)) == 'i')
4215 {
4216 /* Inside a SEQUENCE, we find insns.
4217 Renumber just the patterns of these insns,
4218 just as we do for the top-level insns. */
4219 leaf_renumber_regs_insn (PATTERN (in_rtx));
4220 return;
4221 }
4222
4223 format_ptr = GET_RTX_FORMAT (GET_CODE (in_rtx));
4224
4225 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (in_rtx)); i++)
4226 switch (*format_ptr++)
4227 {
4228 case 'e':
4229 leaf_renumber_regs_insn (XEXP (in_rtx, i));
4230 break;
4231
4232 case 'E':
4233 if (NULL != XVEC (in_rtx, i))
4234 {
4235 for (j = 0; j < XVECLEN (in_rtx, i); j++)
4236 leaf_renumber_regs_insn (XVECEXP (in_rtx, i, j));
4237 }
4238 break;
4239
4240 case 'S':
4241 case 's':
4242 case '0':
4243 case 'i':
4244 case 'w':
4245 case 'n':
4246 case 'u':
4247 break;
4248
4249 default:
4250 abort ();
4251 }
4252 }
4253 #endif