gcc/testsuite/
[gcc.git] / gcc / final.c
1 /* Convert RTL to assembler code and output it, for GNU compiler.
2 Copyright (C) 1987-2014 Free Software Foundation, Inc.
3
4 This file is part of GCC.
5
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
9 version.
10
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
19
20 /* This is the final pass of the compiler.
21 It looks at the rtl code for a function and outputs assembler code.
22
23 Call `final_start_function' to output the assembler code for function entry,
24 `final' to output assembler code for some RTL code,
25 `final_end_function' to output assembler code for function exit.
26 If a function is compiled in several pieces, each piece is
27 output separately with `final'.
28
29 Some optimizations are also done at this level.
30 Move instructions that were made unnecessary by good register allocation
31 are detected and omitted from the output. (Though most of these
32 are removed by the last jump pass.)
33
34 Instructions to set the condition codes are omitted when it can be
35 seen that the condition codes already had the desired values.
36
37 In some cases it is sufficient if the inherited condition codes
38 have related values, but this may require the following insn
39 (the one that tests the condition codes) to be modified.
40
41 The code for the function prologue and epilogue are generated
42 directly in assembler by the target functions function_prologue and
43 function_epilogue. Those instructions never exist as rtl. */
44
45 #include "config.h"
46 #include "system.h"
47 #include "coretypes.h"
48 #include "tm.h"
49
50 #include "tree.h"
51 #include "varasm.h"
52 #include "hard-reg-set.h"
53 #include "rtl.h"
54 #include "tm_p.h"
55 #include "regs.h"
56 #include "insn-config.h"
57 #include "insn-attr.h"
58 #include "recog.h"
59 #include "conditions.h"
60 #include "flags.h"
61 #include "output.h"
62 #include "except.h"
63 #include "function.h"
64 #include "rtl-error.h"
65 #include "toplev.h" /* exact_log2, floor_log2 */
66 #include "reload.h"
67 #include "intl.h"
68 #include "basic-block.h"
69 #include "target.h"
70 #include "targhooks.h"
71 #include "debug.h"
72 #include "expr.h"
73 #include "tree-pass.h"
74 #include "cgraph.h"
75 #include "tree-ssa.h"
76 #include "coverage.h"
77 #include "df.h"
78 #include "ggc.h"
79 #include "cfgloop.h"
80 #include "params.h"
81 #include "tree-pretty-print.h" /* for dump_function_header */
82 #include "asan.h"
83 #include "wide-int-print.h"
84
85 #ifdef XCOFF_DEBUGGING_INFO
86 #include "xcoffout.h" /* Needed for external data
87 declarations for e.g. AIX 4.x. */
88 #endif
89
90 #include "dwarf2out.h"
91
92 #ifdef DBX_DEBUGGING_INFO
93 #include "dbxout.h"
94 #endif
95
96 #ifdef SDB_DEBUGGING_INFO
97 #include "sdbout.h"
98 #endif
99
100 /* Most ports that aren't using cc0 don't need to define CC_STATUS_INIT.
101 So define a null default for it to save conditionalization later. */
102 #ifndef CC_STATUS_INIT
103 #define CC_STATUS_INIT
104 #endif
105
106 /* Is the given character a logical line separator for the assembler? */
107 #ifndef IS_ASM_LOGICAL_LINE_SEPARATOR
108 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == ';')
109 #endif
110
111 #ifndef JUMP_TABLES_IN_TEXT_SECTION
112 #define JUMP_TABLES_IN_TEXT_SECTION 0
113 #endif
114
115 /* Bitflags used by final_scan_insn. */
116 #define SEEN_NOTE 1
117 #define SEEN_EMITTED 2
118
119 /* Last insn processed by final_scan_insn. */
120 static rtx debug_insn;
121 rtx current_output_insn;
122
123 /* Line number of last NOTE. */
124 static int last_linenum;
125
126 /* Last discriminator written to assembly. */
127 static int last_discriminator;
128
129 /* Discriminator of current block. */
130 static int discriminator;
131
132 /* Highest line number in current block. */
133 static int high_block_linenum;
134
135 /* Likewise for function. */
136 static int high_function_linenum;
137
138 /* Filename of last NOTE. */
139 static const char *last_filename;
140
141 /* Override filename and line number. */
142 static const char *override_filename;
143 static int override_linenum;
144
145 /* Whether to force emission of a line note before the next insn. */
146 static bool force_source_line = false;
147
148 extern const int length_unit_log; /* This is defined in insn-attrtab.c. */
149
150 /* Nonzero while outputting an `asm' with operands.
151 This means that inconsistencies are the user's fault, so don't die.
152 The precise value is the insn being output, to pass to error_for_asm. */
153 rtx this_is_asm_operands;
154
155 /* Number of operands of this insn, for an `asm' with operands. */
156 static unsigned int insn_noperands;
157
158 /* Compare optimization flag. */
159
160 static rtx last_ignored_compare = 0;
161
162 /* Assign a unique number to each insn that is output.
163 This can be used to generate unique local labels. */
164
165 static int insn_counter = 0;
166
167 #ifdef HAVE_cc0
168 /* This variable contains machine-dependent flags (defined in tm.h)
169 set and examined by output routines
170 that describe how to interpret the condition codes properly. */
171
172 CC_STATUS cc_status;
173
174 /* During output of an insn, this contains a copy of cc_status
175 from before the insn. */
176
177 CC_STATUS cc_prev_status;
178 #endif
179
180 /* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */
181
182 static int block_depth;
183
184 /* Nonzero if have enabled APP processing of our assembler output. */
185
186 static int app_on;
187
188 /* If we are outputting an insn sequence, this contains the sequence rtx.
189 Zero otherwise. */
190
191 rtx final_sequence;
192
193 #ifdef ASSEMBLER_DIALECT
194
195 /* Number of the assembler dialect to use, starting at 0. */
196 static int dialect_number;
197 #endif
198
199 /* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */
200 rtx current_insn_predicate;
201
202 /* True if printing into -fdump-final-insns= dump. */
203 bool final_insns_dump_p;
204
205 /* True if profile_function should be called, but hasn't been called yet. */
206 static bool need_profile_function;
207
208 static int asm_insn_count (rtx);
209 static void profile_function (FILE *);
210 static void profile_after_prologue (FILE *);
211 static bool notice_source_line (rtx, bool *);
212 static rtx walk_alter_subreg (rtx *, bool *);
213 static void output_asm_name (void);
214 static void output_alternate_entry_point (FILE *, rtx);
215 static tree get_mem_expr_from_op (rtx, int *);
216 static void output_asm_operand_names (rtx *, int *, int);
217 #ifdef LEAF_REGISTERS
218 static void leaf_renumber_regs (rtx);
219 #endif
220 #ifdef HAVE_cc0
221 static int alter_cond (rtx);
222 #endif
223 #ifndef ADDR_VEC_ALIGN
224 static int final_addr_vec_align (rtx);
225 #endif
226 static int align_fuzz (rtx, rtx, int, unsigned);
227 static void collect_fn_hard_reg_usage (void);
228 \f
229 /* Initialize data in final at the beginning of a compilation. */
230
231 void
232 init_final (const char *filename ATTRIBUTE_UNUSED)
233 {
234 app_on = 0;
235 final_sequence = 0;
236
237 #ifdef ASSEMBLER_DIALECT
238 dialect_number = ASSEMBLER_DIALECT;
239 #endif
240 }
241
242 /* Default target function prologue and epilogue assembler output.
243
244 If not overridden for epilogue code, then the function body itself
245 contains return instructions wherever needed. */
246 void
247 default_function_pro_epilogue (FILE *file ATTRIBUTE_UNUSED,
248 HOST_WIDE_INT size ATTRIBUTE_UNUSED)
249 {
250 }
251
252 void
253 default_function_switched_text_sections (FILE *file ATTRIBUTE_UNUSED,
254 tree decl ATTRIBUTE_UNUSED,
255 bool new_is_cold ATTRIBUTE_UNUSED)
256 {
257 }
258
259 /* Default target hook that outputs nothing to a stream. */
260 void
261 no_asm_to_stream (FILE *file ATTRIBUTE_UNUSED)
262 {
263 }
264
265 /* Enable APP processing of subsequent output.
266 Used before the output from an `asm' statement. */
267
268 void
269 app_enable (void)
270 {
271 if (! app_on)
272 {
273 fputs (ASM_APP_ON, asm_out_file);
274 app_on = 1;
275 }
276 }
277
278 /* Disable APP processing of subsequent output.
279 Called from varasm.c before most kinds of output. */
280
281 void
282 app_disable (void)
283 {
284 if (app_on)
285 {
286 fputs (ASM_APP_OFF, asm_out_file);
287 app_on = 0;
288 }
289 }
290 \f
291 /* Return the number of slots filled in the current
292 delayed branch sequence (we don't count the insn needing the
293 delay slot). Zero if not in a delayed branch sequence. */
294
295 #ifdef DELAY_SLOTS
296 int
297 dbr_sequence_length (void)
298 {
299 if (final_sequence != 0)
300 return XVECLEN (final_sequence, 0) - 1;
301 else
302 return 0;
303 }
304 #endif
305 \f
306 /* The next two pages contain routines used to compute the length of an insn
307 and to shorten branches. */
308
309 /* Arrays for insn lengths, and addresses. The latter is referenced by
310 `insn_current_length'. */
311
312 static int *insn_lengths;
313
314 vec<int> insn_addresses_;
315
316 /* Max uid for which the above arrays are valid. */
317 static int insn_lengths_max_uid;
318
319 /* Address of insn being processed. Used by `insn_current_length'. */
320 int insn_current_address;
321
322 /* Address of insn being processed in previous iteration. */
323 int insn_last_address;
324
325 /* known invariant alignment of insn being processed. */
326 int insn_current_align;
327
328 /* After shorten_branches, for any insn, uid_align[INSN_UID (insn)]
329 gives the next following alignment insn that increases the known
330 alignment, or NULL_RTX if there is no such insn.
331 For any alignment obtained this way, we can again index uid_align with
332 its uid to obtain the next following align that in turn increases the
333 alignment, till we reach NULL_RTX; the sequence obtained this way
334 for each insn we'll call the alignment chain of this insn in the following
335 comments. */
336
337 struct label_alignment
338 {
339 short alignment;
340 short max_skip;
341 };
342
343 static rtx *uid_align;
344 static int *uid_shuid;
345 static struct label_alignment *label_align;
346
347 /* Indicate that branch shortening hasn't yet been done. */
348
349 void
350 init_insn_lengths (void)
351 {
352 if (uid_shuid)
353 {
354 free (uid_shuid);
355 uid_shuid = 0;
356 }
357 if (insn_lengths)
358 {
359 free (insn_lengths);
360 insn_lengths = 0;
361 insn_lengths_max_uid = 0;
362 }
363 if (HAVE_ATTR_length)
364 INSN_ADDRESSES_FREE ();
365 if (uid_align)
366 {
367 free (uid_align);
368 uid_align = 0;
369 }
370 }
371
372 /* Obtain the current length of an insn. If branch shortening has been done,
373 get its actual length. Otherwise, use FALLBACK_FN to calculate the
374 length. */
375 static int
376 get_attr_length_1 (rtx insn, int (*fallback_fn) (rtx))
377 {
378 rtx body;
379 int i;
380 int length = 0;
381
382 if (!HAVE_ATTR_length)
383 return 0;
384
385 if (insn_lengths_max_uid > INSN_UID (insn))
386 return insn_lengths[INSN_UID (insn)];
387 else
388 switch (GET_CODE (insn))
389 {
390 case NOTE:
391 case BARRIER:
392 case CODE_LABEL:
393 case DEBUG_INSN:
394 return 0;
395
396 case CALL_INSN:
397 case JUMP_INSN:
398 length = fallback_fn (insn);
399 break;
400
401 case INSN:
402 body = PATTERN (insn);
403 if (GET_CODE (body) == USE || GET_CODE (body) == CLOBBER)
404 return 0;
405
406 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
407 length = asm_insn_count (body) * fallback_fn (insn);
408 else if (GET_CODE (body) == SEQUENCE)
409 for (i = 0; i < XVECLEN (body, 0); i++)
410 length += get_attr_length_1 (XVECEXP (body, 0, i), fallback_fn);
411 else
412 length = fallback_fn (insn);
413 break;
414
415 default:
416 break;
417 }
418
419 #ifdef ADJUST_INSN_LENGTH
420 ADJUST_INSN_LENGTH (insn, length);
421 #endif
422 return length;
423 }
424
425 /* Obtain the current length of an insn. If branch shortening has been done,
426 get its actual length. Otherwise, get its maximum length. */
427 int
428 get_attr_length (rtx insn)
429 {
430 return get_attr_length_1 (insn, insn_default_length);
431 }
432
433 /* Obtain the current length of an insn. If branch shortening has been done,
434 get its actual length. Otherwise, get its minimum length. */
435 int
436 get_attr_min_length (rtx insn)
437 {
438 return get_attr_length_1 (insn, insn_min_length);
439 }
440 \f
441 /* Code to handle alignment inside shorten_branches. */
442
443 /* Here is an explanation how the algorithm in align_fuzz can give
444 proper results:
445
446 Call a sequence of instructions beginning with alignment point X
447 and continuing until the next alignment point `block X'. When `X'
448 is used in an expression, it means the alignment value of the
449 alignment point.
450
451 Call the distance between the start of the first insn of block X, and
452 the end of the last insn of block X `IX', for the `inner size of X'.
453 This is clearly the sum of the instruction lengths.
454
455 Likewise with the next alignment-delimited block following X, which we
456 shall call block Y.
457
458 Call the distance between the start of the first insn of block X, and
459 the start of the first insn of block Y `OX', for the `outer size of X'.
460
461 The estimated padding is then OX - IX.
462
463 OX can be safely estimated as
464
465 if (X >= Y)
466 OX = round_up(IX, Y)
467 else
468 OX = round_up(IX, X) + Y - X
469
470 Clearly est(IX) >= real(IX), because that only depends on the
471 instruction lengths, and those being overestimated is a given.
472
473 Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so
474 we needn't worry about that when thinking about OX.
475
476 When X >= Y, the alignment provided by Y adds no uncertainty factor
477 for branch ranges starting before X, so we can just round what we have.
478 But when X < Y, we don't know anything about the, so to speak,
479 `middle bits', so we have to assume the worst when aligning up from an
480 address mod X to one mod Y, which is Y - X. */
481
482 #ifndef LABEL_ALIGN
483 #define LABEL_ALIGN(LABEL) align_labels_log
484 #endif
485
486 #ifndef LOOP_ALIGN
487 #define LOOP_ALIGN(LABEL) align_loops_log
488 #endif
489
490 #ifndef LABEL_ALIGN_AFTER_BARRIER
491 #define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0
492 #endif
493
494 #ifndef JUMP_ALIGN
495 #define JUMP_ALIGN(LABEL) align_jumps_log
496 #endif
497
498 int
499 default_label_align_after_barrier_max_skip (rtx insn ATTRIBUTE_UNUSED)
500 {
501 return 0;
502 }
503
504 int
505 default_loop_align_max_skip (rtx insn ATTRIBUTE_UNUSED)
506 {
507 return align_loops_max_skip;
508 }
509
510 int
511 default_label_align_max_skip (rtx insn ATTRIBUTE_UNUSED)
512 {
513 return align_labels_max_skip;
514 }
515
516 int
517 default_jump_align_max_skip (rtx insn ATTRIBUTE_UNUSED)
518 {
519 return align_jumps_max_skip;
520 }
521
522 #ifndef ADDR_VEC_ALIGN
523 static int
524 final_addr_vec_align (rtx addr_vec)
525 {
526 int align = GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec)));
527
528 if (align > BIGGEST_ALIGNMENT / BITS_PER_UNIT)
529 align = BIGGEST_ALIGNMENT / BITS_PER_UNIT;
530 return exact_log2 (align);
531
532 }
533
534 #define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC)
535 #endif
536
537 #ifndef INSN_LENGTH_ALIGNMENT
538 #define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log
539 #endif
540
541 #define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)])
542
543 static int min_labelno, max_labelno;
544
545 #define LABEL_TO_ALIGNMENT(LABEL) \
546 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment)
547
548 #define LABEL_TO_MAX_SKIP(LABEL) \
549 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip)
550
551 /* For the benefit of port specific code do this also as a function. */
552
553 int
554 label_to_alignment (rtx label)
555 {
556 if (CODE_LABEL_NUMBER (label) <= max_labelno)
557 return LABEL_TO_ALIGNMENT (label);
558 return 0;
559 }
560
561 int
562 label_to_max_skip (rtx label)
563 {
564 if (CODE_LABEL_NUMBER (label) <= max_labelno)
565 return LABEL_TO_MAX_SKIP (label);
566 return 0;
567 }
568
569 /* The differences in addresses
570 between a branch and its target might grow or shrink depending on
571 the alignment the start insn of the range (the branch for a forward
572 branch or the label for a backward branch) starts out on; if these
573 differences are used naively, they can even oscillate infinitely.
574 We therefore want to compute a 'worst case' address difference that
575 is independent of the alignment the start insn of the range end
576 up on, and that is at least as large as the actual difference.
577 The function align_fuzz calculates the amount we have to add to the
578 naively computed difference, by traversing the part of the alignment
579 chain of the start insn of the range that is in front of the end insn
580 of the range, and considering for each alignment the maximum amount
581 that it might contribute to a size increase.
582
583 For casesi tables, we also want to know worst case minimum amounts of
584 address difference, in case a machine description wants to introduce
585 some common offset that is added to all offsets in a table.
586 For this purpose, align_fuzz with a growth argument of 0 computes the
587 appropriate adjustment. */
588
589 /* Compute the maximum delta by which the difference of the addresses of
590 START and END might grow / shrink due to a different address for start
591 which changes the size of alignment insns between START and END.
592 KNOWN_ALIGN_LOG is the alignment known for START.
593 GROWTH should be ~0 if the objective is to compute potential code size
594 increase, and 0 if the objective is to compute potential shrink.
595 The return value is undefined for any other value of GROWTH. */
596
597 static int
598 align_fuzz (rtx start, rtx end, int known_align_log, unsigned int growth)
599 {
600 int uid = INSN_UID (start);
601 rtx align_label;
602 int known_align = 1 << known_align_log;
603 int end_shuid = INSN_SHUID (end);
604 int fuzz = 0;
605
606 for (align_label = uid_align[uid]; align_label; align_label = uid_align[uid])
607 {
608 int align_addr, new_align;
609
610 uid = INSN_UID (align_label);
611 align_addr = INSN_ADDRESSES (uid) - insn_lengths[uid];
612 if (uid_shuid[uid] > end_shuid)
613 break;
614 known_align_log = LABEL_TO_ALIGNMENT (align_label);
615 new_align = 1 << known_align_log;
616 if (new_align < known_align)
617 continue;
618 fuzz += (-align_addr ^ growth) & (new_align - known_align);
619 known_align = new_align;
620 }
621 return fuzz;
622 }
623
624 /* Compute a worst-case reference address of a branch so that it
625 can be safely used in the presence of aligned labels. Since the
626 size of the branch itself is unknown, the size of the branch is
627 not included in the range. I.e. for a forward branch, the reference
628 address is the end address of the branch as known from the previous
629 branch shortening pass, minus a value to account for possible size
630 increase due to alignment. For a backward branch, it is the start
631 address of the branch as known from the current pass, plus a value
632 to account for possible size increase due to alignment.
633 NB.: Therefore, the maximum offset allowed for backward branches needs
634 to exclude the branch size. */
635
636 int
637 insn_current_reference_address (rtx branch)
638 {
639 rtx dest, seq;
640 int seq_uid;
641
642 if (! INSN_ADDRESSES_SET_P ())
643 return 0;
644
645 seq = NEXT_INSN (PREV_INSN (branch));
646 seq_uid = INSN_UID (seq);
647 if (!JUMP_P (branch))
648 /* This can happen for example on the PA; the objective is to know the
649 offset to address something in front of the start of the function.
650 Thus, we can treat it like a backward branch.
651 We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than
652 any alignment we'd encounter, so we skip the call to align_fuzz. */
653 return insn_current_address;
654 dest = JUMP_LABEL (branch);
655
656 /* BRANCH has no proper alignment chain set, so use SEQ.
657 BRANCH also has no INSN_SHUID. */
658 if (INSN_SHUID (seq) < INSN_SHUID (dest))
659 {
660 /* Forward branch. */
661 return (insn_last_address + insn_lengths[seq_uid]
662 - align_fuzz (seq, dest, length_unit_log, ~0));
663 }
664 else
665 {
666 /* Backward branch. */
667 return (insn_current_address
668 + align_fuzz (dest, seq, length_unit_log, ~0));
669 }
670 }
671 \f
672 /* Compute branch alignments based on frequency information in the
673 CFG. */
674
675 unsigned int
676 compute_alignments (void)
677 {
678 int log, max_skip, max_log;
679 basic_block bb;
680 int freq_max = 0;
681 int freq_threshold = 0;
682
683 if (label_align)
684 {
685 free (label_align);
686 label_align = 0;
687 }
688
689 max_labelno = max_label_num ();
690 min_labelno = get_first_label_num ();
691 label_align = XCNEWVEC (struct label_alignment, max_labelno - min_labelno + 1);
692
693 /* If not optimizing or optimizing for size, don't assign any alignments. */
694 if (! optimize || optimize_function_for_size_p (cfun))
695 return 0;
696
697 if (dump_file)
698 {
699 dump_reg_info (dump_file);
700 dump_flow_info (dump_file, TDF_DETAILS);
701 flow_loops_dump (dump_file, NULL, 1);
702 }
703 loop_optimizer_init (AVOID_CFG_MODIFICATIONS);
704 FOR_EACH_BB_FN (bb, cfun)
705 if (bb->frequency > freq_max)
706 freq_max = bb->frequency;
707 freq_threshold = freq_max / PARAM_VALUE (PARAM_ALIGN_THRESHOLD);
708
709 if (dump_file)
710 fprintf (dump_file, "freq_max: %i\n",freq_max);
711 FOR_EACH_BB_FN (bb, cfun)
712 {
713 rtx label = BB_HEAD (bb);
714 int fallthru_frequency = 0, branch_frequency = 0, has_fallthru = 0;
715 edge e;
716 edge_iterator ei;
717
718 if (!LABEL_P (label)
719 || optimize_bb_for_size_p (bb))
720 {
721 if (dump_file)
722 fprintf (dump_file,
723 "BB %4i freq %4i loop %2i loop_depth %2i skipped.\n",
724 bb->index, bb->frequency, bb->loop_father->num,
725 bb_loop_depth (bb));
726 continue;
727 }
728 max_log = LABEL_ALIGN (label);
729 max_skip = targetm.asm_out.label_align_max_skip (label);
730
731 FOR_EACH_EDGE (e, ei, bb->preds)
732 {
733 if (e->flags & EDGE_FALLTHRU)
734 has_fallthru = 1, fallthru_frequency += EDGE_FREQUENCY (e);
735 else
736 branch_frequency += EDGE_FREQUENCY (e);
737 }
738 if (dump_file)
739 {
740 fprintf (dump_file, "BB %4i freq %4i loop %2i loop_depth"
741 " %2i fall %4i branch %4i",
742 bb->index, bb->frequency, bb->loop_father->num,
743 bb_loop_depth (bb),
744 fallthru_frequency, branch_frequency);
745 if (!bb->loop_father->inner && bb->loop_father->num)
746 fprintf (dump_file, " inner_loop");
747 if (bb->loop_father->header == bb)
748 fprintf (dump_file, " loop_header");
749 fprintf (dump_file, "\n");
750 }
751
752 /* There are two purposes to align block with no fallthru incoming edge:
753 1) to avoid fetch stalls when branch destination is near cache boundary
754 2) to improve cache efficiency in case the previous block is not executed
755 (so it does not need to be in the cache).
756
757 We to catch first case, we align frequently executed blocks.
758 To catch the second, we align blocks that are executed more frequently
759 than the predecessor and the predecessor is likely to not be executed
760 when function is called. */
761
762 if (!has_fallthru
763 && (branch_frequency > freq_threshold
764 || (bb->frequency > bb->prev_bb->frequency * 10
765 && (bb->prev_bb->frequency
766 <= ENTRY_BLOCK_PTR_FOR_FN (cfun)->frequency / 2))))
767 {
768 log = JUMP_ALIGN (label);
769 if (dump_file)
770 fprintf (dump_file, " jump alignment added.\n");
771 if (max_log < log)
772 {
773 max_log = log;
774 max_skip = targetm.asm_out.jump_align_max_skip (label);
775 }
776 }
777 /* In case block is frequent and reached mostly by non-fallthru edge,
778 align it. It is most likely a first block of loop. */
779 if (has_fallthru
780 && !(single_succ_p (bb)
781 && single_succ (bb) == EXIT_BLOCK_PTR_FOR_FN (cfun))
782 && optimize_bb_for_speed_p (bb)
783 && branch_frequency + fallthru_frequency > freq_threshold
784 && (branch_frequency
785 > fallthru_frequency * PARAM_VALUE (PARAM_ALIGN_LOOP_ITERATIONS)))
786 {
787 log = LOOP_ALIGN (label);
788 if (dump_file)
789 fprintf (dump_file, " internal loop alignment added.\n");
790 if (max_log < log)
791 {
792 max_log = log;
793 max_skip = targetm.asm_out.loop_align_max_skip (label);
794 }
795 }
796 LABEL_TO_ALIGNMENT (label) = max_log;
797 LABEL_TO_MAX_SKIP (label) = max_skip;
798 }
799
800 loop_optimizer_finalize ();
801 free_dominance_info (CDI_DOMINATORS);
802 return 0;
803 }
804
805 /* Grow the LABEL_ALIGN array after new labels are created. */
806
807 static void
808 grow_label_align (void)
809 {
810 int old = max_labelno;
811 int n_labels;
812 int n_old_labels;
813
814 max_labelno = max_label_num ();
815
816 n_labels = max_labelno - min_labelno + 1;
817 n_old_labels = old - min_labelno + 1;
818
819 label_align = XRESIZEVEC (struct label_alignment, label_align, n_labels);
820
821 /* Range of labels grows monotonically in the function. Failing here
822 means that the initialization of array got lost. */
823 gcc_assert (n_old_labels <= n_labels);
824
825 memset (label_align + n_old_labels, 0,
826 (n_labels - n_old_labels) * sizeof (struct label_alignment));
827 }
828
829 /* Update the already computed alignment information. LABEL_PAIRS is a vector
830 made up of pairs of labels for which the alignment information of the first
831 element will be copied from that of the second element. */
832
833 void
834 update_alignments (vec<rtx> &label_pairs)
835 {
836 unsigned int i = 0;
837 rtx iter, label = NULL_RTX;
838
839 if (max_labelno != max_label_num ())
840 grow_label_align ();
841
842 FOR_EACH_VEC_ELT (label_pairs, i, iter)
843 if (i & 1)
844 {
845 LABEL_TO_ALIGNMENT (label) = LABEL_TO_ALIGNMENT (iter);
846 LABEL_TO_MAX_SKIP (label) = LABEL_TO_MAX_SKIP (iter);
847 }
848 else
849 label = iter;
850 }
851
852 namespace {
853
854 const pass_data pass_data_compute_alignments =
855 {
856 RTL_PASS, /* type */
857 "alignments", /* name */
858 OPTGROUP_NONE, /* optinfo_flags */
859 true, /* has_execute */
860 TV_NONE, /* tv_id */
861 0, /* properties_required */
862 0, /* properties_provided */
863 0, /* properties_destroyed */
864 0, /* todo_flags_start */
865 0, /* todo_flags_finish */
866 };
867
868 class pass_compute_alignments : public rtl_opt_pass
869 {
870 public:
871 pass_compute_alignments (gcc::context *ctxt)
872 : rtl_opt_pass (pass_data_compute_alignments, ctxt)
873 {}
874
875 /* opt_pass methods: */
876 virtual unsigned int execute (function *) { return compute_alignments (); }
877
878 }; // class pass_compute_alignments
879
880 } // anon namespace
881
882 rtl_opt_pass *
883 make_pass_compute_alignments (gcc::context *ctxt)
884 {
885 return new pass_compute_alignments (ctxt);
886 }
887
888 \f
889 /* Make a pass over all insns and compute their actual lengths by shortening
890 any branches of variable length if possible. */
891
892 /* shorten_branches might be called multiple times: for example, the SH
893 port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG.
894 In order to do this, it needs proper length information, which it obtains
895 by calling shorten_branches. This cannot be collapsed with
896 shorten_branches itself into a single pass unless we also want to integrate
897 reorg.c, since the branch splitting exposes new instructions with delay
898 slots. */
899
900 void
901 shorten_branches (rtx first)
902 {
903 rtx insn;
904 int max_uid;
905 int i;
906 int max_log;
907 int max_skip;
908 #define MAX_CODE_ALIGN 16
909 rtx seq;
910 int something_changed = 1;
911 char *varying_length;
912 rtx body;
913 int uid;
914 rtx align_tab[MAX_CODE_ALIGN];
915
916 /* Compute maximum UID and allocate label_align / uid_shuid. */
917 max_uid = get_max_uid ();
918
919 /* Free uid_shuid before reallocating it. */
920 free (uid_shuid);
921
922 uid_shuid = XNEWVEC (int, max_uid);
923
924 if (max_labelno != max_label_num ())
925 grow_label_align ();
926
927 /* Initialize label_align and set up uid_shuid to be strictly
928 monotonically rising with insn order. */
929 /* We use max_log here to keep track of the maximum alignment we want to
930 impose on the next CODE_LABEL (or the current one if we are processing
931 the CODE_LABEL itself). */
932
933 max_log = 0;
934 max_skip = 0;
935
936 for (insn = get_insns (), i = 1; insn; insn = NEXT_INSN (insn))
937 {
938 int log;
939
940 INSN_SHUID (insn) = i++;
941 if (INSN_P (insn))
942 continue;
943
944 if (LABEL_P (insn))
945 {
946 rtx next;
947 bool next_is_jumptable;
948
949 /* Merge in alignments computed by compute_alignments. */
950 log = LABEL_TO_ALIGNMENT (insn);
951 if (max_log < log)
952 {
953 max_log = log;
954 max_skip = LABEL_TO_MAX_SKIP (insn);
955 }
956
957 next = next_nonnote_insn (insn);
958 next_is_jumptable = next && JUMP_TABLE_DATA_P (next);
959 if (!next_is_jumptable)
960 {
961 log = LABEL_ALIGN (insn);
962 if (max_log < log)
963 {
964 max_log = log;
965 max_skip = targetm.asm_out.label_align_max_skip (insn);
966 }
967 }
968 /* ADDR_VECs only take room if read-only data goes into the text
969 section. */
970 if ((JUMP_TABLES_IN_TEXT_SECTION
971 || readonly_data_section == text_section)
972 && next_is_jumptable)
973 {
974 log = ADDR_VEC_ALIGN (next);
975 if (max_log < log)
976 {
977 max_log = log;
978 max_skip = targetm.asm_out.label_align_max_skip (insn);
979 }
980 }
981 LABEL_TO_ALIGNMENT (insn) = max_log;
982 LABEL_TO_MAX_SKIP (insn) = max_skip;
983 max_log = 0;
984 max_skip = 0;
985 }
986 else if (BARRIER_P (insn))
987 {
988 rtx label;
989
990 for (label = insn; label && ! INSN_P (label);
991 label = NEXT_INSN (label))
992 if (LABEL_P (label))
993 {
994 log = LABEL_ALIGN_AFTER_BARRIER (insn);
995 if (max_log < log)
996 {
997 max_log = log;
998 max_skip = targetm.asm_out.label_align_after_barrier_max_skip (label);
999 }
1000 break;
1001 }
1002 }
1003 }
1004 if (!HAVE_ATTR_length)
1005 return;
1006
1007 /* Allocate the rest of the arrays. */
1008 insn_lengths = XNEWVEC (int, max_uid);
1009 insn_lengths_max_uid = max_uid;
1010 /* Syntax errors can lead to labels being outside of the main insn stream.
1011 Initialize insn_addresses, so that we get reproducible results. */
1012 INSN_ADDRESSES_ALLOC (max_uid);
1013
1014 varying_length = XCNEWVEC (char, max_uid);
1015
1016 /* Initialize uid_align. We scan instructions
1017 from end to start, and keep in align_tab[n] the last seen insn
1018 that does an alignment of at least n+1, i.e. the successor
1019 in the alignment chain for an insn that does / has a known
1020 alignment of n. */
1021 uid_align = XCNEWVEC (rtx, max_uid);
1022
1023 for (i = MAX_CODE_ALIGN; --i >= 0;)
1024 align_tab[i] = NULL_RTX;
1025 seq = get_last_insn ();
1026 for (; seq; seq = PREV_INSN (seq))
1027 {
1028 int uid = INSN_UID (seq);
1029 int log;
1030 log = (LABEL_P (seq) ? LABEL_TO_ALIGNMENT (seq) : 0);
1031 uid_align[uid] = align_tab[0];
1032 if (log)
1033 {
1034 /* Found an alignment label. */
1035 uid_align[uid] = align_tab[log];
1036 for (i = log - 1; i >= 0; i--)
1037 align_tab[i] = seq;
1038 }
1039 }
1040
1041 /* When optimizing, we start assuming minimum length, and keep increasing
1042 lengths as we find the need for this, till nothing changes.
1043 When not optimizing, we start assuming maximum lengths, and
1044 do a single pass to update the lengths. */
1045 bool increasing = optimize != 0;
1046
1047 #ifdef CASE_VECTOR_SHORTEN_MODE
1048 if (optimize)
1049 {
1050 /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum
1051 label fields. */
1052
1053 int min_shuid = INSN_SHUID (get_insns ()) - 1;
1054 int max_shuid = INSN_SHUID (get_last_insn ()) + 1;
1055 int rel;
1056
1057 for (insn = first; insn != 0; insn = NEXT_INSN (insn))
1058 {
1059 rtx min_lab = NULL_RTX, max_lab = NULL_RTX, pat;
1060 int len, i, min, max, insn_shuid;
1061 int min_align;
1062 addr_diff_vec_flags flags;
1063
1064 if (! JUMP_TABLE_DATA_P (insn)
1065 || GET_CODE (PATTERN (insn)) != ADDR_DIFF_VEC)
1066 continue;
1067 pat = PATTERN (insn);
1068 len = XVECLEN (pat, 1);
1069 gcc_assert (len > 0);
1070 min_align = MAX_CODE_ALIGN;
1071 for (min = max_shuid, max = min_shuid, i = len - 1; i >= 0; i--)
1072 {
1073 rtx lab = XEXP (XVECEXP (pat, 1, i), 0);
1074 int shuid = INSN_SHUID (lab);
1075 if (shuid < min)
1076 {
1077 min = shuid;
1078 min_lab = lab;
1079 }
1080 if (shuid > max)
1081 {
1082 max = shuid;
1083 max_lab = lab;
1084 }
1085 if (min_align > LABEL_TO_ALIGNMENT (lab))
1086 min_align = LABEL_TO_ALIGNMENT (lab);
1087 }
1088 XEXP (pat, 2) = gen_rtx_LABEL_REF (Pmode, min_lab);
1089 XEXP (pat, 3) = gen_rtx_LABEL_REF (Pmode, max_lab);
1090 insn_shuid = INSN_SHUID (insn);
1091 rel = INSN_SHUID (XEXP (XEXP (pat, 0), 0));
1092 memset (&flags, 0, sizeof (flags));
1093 flags.min_align = min_align;
1094 flags.base_after_vec = rel > insn_shuid;
1095 flags.min_after_vec = min > insn_shuid;
1096 flags.max_after_vec = max > insn_shuid;
1097 flags.min_after_base = min > rel;
1098 flags.max_after_base = max > rel;
1099 ADDR_DIFF_VEC_FLAGS (pat) = flags;
1100
1101 if (increasing)
1102 PUT_MODE (pat, CASE_VECTOR_SHORTEN_MODE (0, 0, pat));
1103 }
1104 }
1105 #endif /* CASE_VECTOR_SHORTEN_MODE */
1106
1107 /* Compute initial lengths, addresses, and varying flags for each insn. */
1108 int (*length_fun) (rtx) = increasing ? insn_min_length : insn_default_length;
1109
1110 for (insn_current_address = 0, insn = first;
1111 insn != 0;
1112 insn_current_address += insn_lengths[uid], insn = NEXT_INSN (insn))
1113 {
1114 uid = INSN_UID (insn);
1115
1116 insn_lengths[uid] = 0;
1117
1118 if (LABEL_P (insn))
1119 {
1120 int log = LABEL_TO_ALIGNMENT (insn);
1121 if (log)
1122 {
1123 int align = 1 << log;
1124 int new_address = (insn_current_address + align - 1) & -align;
1125 insn_lengths[uid] = new_address - insn_current_address;
1126 }
1127 }
1128
1129 INSN_ADDRESSES (uid) = insn_current_address + insn_lengths[uid];
1130
1131 if (NOTE_P (insn) || BARRIER_P (insn)
1132 || LABEL_P (insn) || DEBUG_INSN_P (insn))
1133 continue;
1134 if (INSN_DELETED_P (insn))
1135 continue;
1136
1137 body = PATTERN (insn);
1138 if (JUMP_TABLE_DATA_P (insn))
1139 {
1140 /* This only takes room if read-only data goes into the text
1141 section. */
1142 if (JUMP_TABLES_IN_TEXT_SECTION
1143 || readonly_data_section == text_section)
1144 insn_lengths[uid] = (XVECLEN (body,
1145 GET_CODE (body) == ADDR_DIFF_VEC)
1146 * GET_MODE_SIZE (GET_MODE (body)));
1147 /* Alignment is handled by ADDR_VEC_ALIGN. */
1148 }
1149 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
1150 insn_lengths[uid] = asm_insn_count (body) * insn_default_length (insn);
1151 else if (GET_CODE (body) == SEQUENCE)
1152 {
1153 int i;
1154 int const_delay_slots;
1155 #ifdef DELAY_SLOTS
1156 const_delay_slots = const_num_delay_slots (XVECEXP (body, 0, 0));
1157 #else
1158 const_delay_slots = 0;
1159 #endif
1160 int (*inner_length_fun) (rtx)
1161 = const_delay_slots ? length_fun : insn_default_length;
1162 /* Inside a delay slot sequence, we do not do any branch shortening
1163 if the shortening could change the number of delay slots
1164 of the branch. */
1165 for (i = 0; i < XVECLEN (body, 0); i++)
1166 {
1167 rtx inner_insn = XVECEXP (body, 0, i);
1168 int inner_uid = INSN_UID (inner_insn);
1169 int inner_length;
1170
1171 if (GET_CODE (body) == ASM_INPUT
1172 || asm_noperands (PATTERN (XVECEXP (body, 0, i))) >= 0)
1173 inner_length = (asm_insn_count (PATTERN (inner_insn))
1174 * insn_default_length (inner_insn));
1175 else
1176 inner_length = inner_length_fun (inner_insn);
1177
1178 insn_lengths[inner_uid] = inner_length;
1179 if (const_delay_slots)
1180 {
1181 if ((varying_length[inner_uid]
1182 = insn_variable_length_p (inner_insn)) != 0)
1183 varying_length[uid] = 1;
1184 INSN_ADDRESSES (inner_uid) = (insn_current_address
1185 + insn_lengths[uid]);
1186 }
1187 else
1188 varying_length[inner_uid] = 0;
1189 insn_lengths[uid] += inner_length;
1190 }
1191 }
1192 else if (GET_CODE (body) != USE && GET_CODE (body) != CLOBBER)
1193 {
1194 insn_lengths[uid] = length_fun (insn);
1195 varying_length[uid] = insn_variable_length_p (insn);
1196 }
1197
1198 /* If needed, do any adjustment. */
1199 #ifdef ADJUST_INSN_LENGTH
1200 ADJUST_INSN_LENGTH (insn, insn_lengths[uid]);
1201 if (insn_lengths[uid] < 0)
1202 fatal_insn ("negative insn length", insn);
1203 #endif
1204 }
1205
1206 /* Now loop over all the insns finding varying length insns. For each,
1207 get the current insn length. If it has changed, reflect the change.
1208 When nothing changes for a full pass, we are done. */
1209
1210 while (something_changed)
1211 {
1212 something_changed = 0;
1213 insn_current_align = MAX_CODE_ALIGN - 1;
1214 for (insn_current_address = 0, insn = first;
1215 insn != 0;
1216 insn = NEXT_INSN (insn))
1217 {
1218 int new_length;
1219 #ifdef ADJUST_INSN_LENGTH
1220 int tmp_length;
1221 #endif
1222 int length_align;
1223
1224 uid = INSN_UID (insn);
1225
1226 if (LABEL_P (insn))
1227 {
1228 int log = LABEL_TO_ALIGNMENT (insn);
1229
1230 #ifdef CASE_VECTOR_SHORTEN_MODE
1231 /* If the mode of a following jump table was changed, we
1232 may need to update the alignment of this label. */
1233 rtx next;
1234 bool next_is_jumptable;
1235
1236 next = next_nonnote_insn (insn);
1237 next_is_jumptable = next && JUMP_TABLE_DATA_P (next);
1238 if ((JUMP_TABLES_IN_TEXT_SECTION
1239 || readonly_data_section == text_section)
1240 && next_is_jumptable)
1241 {
1242 int newlog = ADDR_VEC_ALIGN (next);
1243 if (newlog != log)
1244 {
1245 log = newlog;
1246 LABEL_TO_ALIGNMENT (insn) = log;
1247 something_changed = 1;
1248 }
1249 }
1250 #endif
1251
1252 if (log > insn_current_align)
1253 {
1254 int align = 1 << log;
1255 int new_address= (insn_current_address + align - 1) & -align;
1256 insn_lengths[uid] = new_address - insn_current_address;
1257 insn_current_align = log;
1258 insn_current_address = new_address;
1259 }
1260 else
1261 insn_lengths[uid] = 0;
1262 INSN_ADDRESSES (uid) = insn_current_address;
1263 continue;
1264 }
1265
1266 length_align = INSN_LENGTH_ALIGNMENT (insn);
1267 if (length_align < insn_current_align)
1268 insn_current_align = length_align;
1269
1270 insn_last_address = INSN_ADDRESSES (uid);
1271 INSN_ADDRESSES (uid) = insn_current_address;
1272
1273 #ifdef CASE_VECTOR_SHORTEN_MODE
1274 if (optimize
1275 && JUMP_TABLE_DATA_P (insn)
1276 && GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
1277 {
1278 rtx body = PATTERN (insn);
1279 int old_length = insn_lengths[uid];
1280 rtx rel_lab = XEXP (XEXP (body, 0), 0);
1281 rtx min_lab = XEXP (XEXP (body, 2), 0);
1282 rtx max_lab = XEXP (XEXP (body, 3), 0);
1283 int rel_addr = INSN_ADDRESSES (INSN_UID (rel_lab));
1284 int min_addr = INSN_ADDRESSES (INSN_UID (min_lab));
1285 int max_addr = INSN_ADDRESSES (INSN_UID (max_lab));
1286 rtx prev;
1287 int rel_align = 0;
1288 addr_diff_vec_flags flags;
1289 enum machine_mode vec_mode;
1290
1291 /* Avoid automatic aggregate initialization. */
1292 flags = ADDR_DIFF_VEC_FLAGS (body);
1293
1294 /* Try to find a known alignment for rel_lab. */
1295 for (prev = rel_lab;
1296 prev
1297 && ! insn_lengths[INSN_UID (prev)]
1298 && ! (varying_length[INSN_UID (prev)] & 1);
1299 prev = PREV_INSN (prev))
1300 if (varying_length[INSN_UID (prev)] & 2)
1301 {
1302 rel_align = LABEL_TO_ALIGNMENT (prev);
1303 break;
1304 }
1305
1306 /* See the comment on addr_diff_vec_flags in rtl.h for the
1307 meaning of the flags values. base: REL_LAB vec: INSN */
1308 /* Anything after INSN has still addresses from the last
1309 pass; adjust these so that they reflect our current
1310 estimate for this pass. */
1311 if (flags.base_after_vec)
1312 rel_addr += insn_current_address - insn_last_address;
1313 if (flags.min_after_vec)
1314 min_addr += insn_current_address - insn_last_address;
1315 if (flags.max_after_vec)
1316 max_addr += insn_current_address - insn_last_address;
1317 /* We want to know the worst case, i.e. lowest possible value
1318 for the offset of MIN_LAB. If MIN_LAB is after REL_LAB,
1319 its offset is positive, and we have to be wary of code shrink;
1320 otherwise, it is negative, and we have to be vary of code
1321 size increase. */
1322 if (flags.min_after_base)
1323 {
1324 /* If INSN is between REL_LAB and MIN_LAB, the size
1325 changes we are about to make can change the alignment
1326 within the observed offset, therefore we have to break
1327 it up into two parts that are independent. */
1328 if (! flags.base_after_vec && flags.min_after_vec)
1329 {
1330 min_addr -= align_fuzz (rel_lab, insn, rel_align, 0);
1331 min_addr -= align_fuzz (insn, min_lab, 0, 0);
1332 }
1333 else
1334 min_addr -= align_fuzz (rel_lab, min_lab, rel_align, 0);
1335 }
1336 else
1337 {
1338 if (flags.base_after_vec && ! flags.min_after_vec)
1339 {
1340 min_addr -= align_fuzz (min_lab, insn, 0, ~0);
1341 min_addr -= align_fuzz (insn, rel_lab, 0, ~0);
1342 }
1343 else
1344 min_addr -= align_fuzz (min_lab, rel_lab, 0, ~0);
1345 }
1346 /* Likewise, determine the highest lowest possible value
1347 for the offset of MAX_LAB. */
1348 if (flags.max_after_base)
1349 {
1350 if (! flags.base_after_vec && flags.max_after_vec)
1351 {
1352 max_addr += align_fuzz (rel_lab, insn, rel_align, ~0);
1353 max_addr += align_fuzz (insn, max_lab, 0, ~0);
1354 }
1355 else
1356 max_addr += align_fuzz (rel_lab, max_lab, rel_align, ~0);
1357 }
1358 else
1359 {
1360 if (flags.base_after_vec && ! flags.max_after_vec)
1361 {
1362 max_addr += align_fuzz (max_lab, insn, 0, 0);
1363 max_addr += align_fuzz (insn, rel_lab, 0, 0);
1364 }
1365 else
1366 max_addr += align_fuzz (max_lab, rel_lab, 0, 0);
1367 }
1368 vec_mode = CASE_VECTOR_SHORTEN_MODE (min_addr - rel_addr,
1369 max_addr - rel_addr, body);
1370 if (!increasing
1371 || (GET_MODE_SIZE (vec_mode)
1372 >= GET_MODE_SIZE (GET_MODE (body))))
1373 PUT_MODE (body, vec_mode);
1374 if (JUMP_TABLES_IN_TEXT_SECTION
1375 || readonly_data_section == text_section)
1376 {
1377 insn_lengths[uid]
1378 = (XVECLEN (body, 1) * GET_MODE_SIZE (GET_MODE (body)));
1379 insn_current_address += insn_lengths[uid];
1380 if (insn_lengths[uid] != old_length)
1381 something_changed = 1;
1382 }
1383
1384 continue;
1385 }
1386 #endif /* CASE_VECTOR_SHORTEN_MODE */
1387
1388 if (! (varying_length[uid]))
1389 {
1390 if (NONJUMP_INSN_P (insn)
1391 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1392 {
1393 int i;
1394
1395 body = PATTERN (insn);
1396 for (i = 0; i < XVECLEN (body, 0); i++)
1397 {
1398 rtx inner_insn = XVECEXP (body, 0, i);
1399 int inner_uid = INSN_UID (inner_insn);
1400
1401 INSN_ADDRESSES (inner_uid) = insn_current_address;
1402
1403 insn_current_address += insn_lengths[inner_uid];
1404 }
1405 }
1406 else
1407 insn_current_address += insn_lengths[uid];
1408
1409 continue;
1410 }
1411
1412 if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
1413 {
1414 int i;
1415
1416 body = PATTERN (insn);
1417 new_length = 0;
1418 for (i = 0; i < XVECLEN (body, 0); i++)
1419 {
1420 rtx inner_insn = XVECEXP (body, 0, i);
1421 int inner_uid = INSN_UID (inner_insn);
1422 int inner_length;
1423
1424 INSN_ADDRESSES (inner_uid) = insn_current_address;
1425
1426 /* insn_current_length returns 0 for insns with a
1427 non-varying length. */
1428 if (! varying_length[inner_uid])
1429 inner_length = insn_lengths[inner_uid];
1430 else
1431 inner_length = insn_current_length (inner_insn);
1432
1433 if (inner_length != insn_lengths[inner_uid])
1434 {
1435 if (!increasing || inner_length > insn_lengths[inner_uid])
1436 {
1437 insn_lengths[inner_uid] = inner_length;
1438 something_changed = 1;
1439 }
1440 else
1441 inner_length = insn_lengths[inner_uid];
1442 }
1443 insn_current_address += inner_length;
1444 new_length += inner_length;
1445 }
1446 }
1447 else
1448 {
1449 new_length = insn_current_length (insn);
1450 insn_current_address += new_length;
1451 }
1452
1453 #ifdef ADJUST_INSN_LENGTH
1454 /* If needed, do any adjustment. */
1455 tmp_length = new_length;
1456 ADJUST_INSN_LENGTH (insn, new_length);
1457 insn_current_address += (new_length - tmp_length);
1458 #endif
1459
1460 if (new_length != insn_lengths[uid]
1461 && (!increasing || new_length > insn_lengths[uid]))
1462 {
1463 insn_lengths[uid] = new_length;
1464 something_changed = 1;
1465 }
1466 else
1467 insn_current_address += insn_lengths[uid] - new_length;
1468 }
1469 /* For a non-optimizing compile, do only a single pass. */
1470 if (!increasing)
1471 break;
1472 }
1473
1474 free (varying_length);
1475 }
1476
1477 /* Given the body of an INSN known to be generated by an ASM statement, return
1478 the number of machine instructions likely to be generated for this insn.
1479 This is used to compute its length. */
1480
1481 static int
1482 asm_insn_count (rtx body)
1483 {
1484 const char *templ;
1485
1486 if (GET_CODE (body) == ASM_INPUT)
1487 templ = XSTR (body, 0);
1488 else
1489 templ = decode_asm_operands (body, NULL, NULL, NULL, NULL, NULL);
1490
1491 return asm_str_count (templ);
1492 }
1493
1494 /* Return the number of machine instructions likely to be generated for the
1495 inline-asm template. */
1496 int
1497 asm_str_count (const char *templ)
1498 {
1499 int count = 1;
1500
1501 if (!*templ)
1502 return 0;
1503
1504 for (; *templ; templ++)
1505 if (IS_ASM_LOGICAL_LINE_SEPARATOR (*templ, templ)
1506 || *templ == '\n')
1507 count++;
1508
1509 return count;
1510 }
1511 \f
1512 /* ??? This is probably the wrong place for these. */
1513 /* Structure recording the mapping from source file and directory
1514 names at compile time to those to be embedded in debug
1515 information. */
1516 typedef struct debug_prefix_map
1517 {
1518 const char *old_prefix;
1519 const char *new_prefix;
1520 size_t old_len;
1521 size_t new_len;
1522 struct debug_prefix_map *next;
1523 } debug_prefix_map;
1524
1525 /* Linked list of such structures. */
1526 static debug_prefix_map *debug_prefix_maps;
1527
1528
1529 /* Record a debug file prefix mapping. ARG is the argument to
1530 -fdebug-prefix-map and must be of the form OLD=NEW. */
1531
1532 void
1533 add_debug_prefix_map (const char *arg)
1534 {
1535 debug_prefix_map *map;
1536 const char *p;
1537
1538 p = strchr (arg, '=');
1539 if (!p)
1540 {
1541 error ("invalid argument %qs to -fdebug-prefix-map", arg);
1542 return;
1543 }
1544 map = XNEW (debug_prefix_map);
1545 map->old_prefix = xstrndup (arg, p - arg);
1546 map->old_len = p - arg;
1547 p++;
1548 map->new_prefix = xstrdup (p);
1549 map->new_len = strlen (p);
1550 map->next = debug_prefix_maps;
1551 debug_prefix_maps = map;
1552 }
1553
1554 /* Perform user-specified mapping of debug filename prefixes. Return
1555 the new name corresponding to FILENAME. */
1556
1557 const char *
1558 remap_debug_filename (const char *filename)
1559 {
1560 debug_prefix_map *map;
1561 char *s;
1562 const char *name;
1563 size_t name_len;
1564
1565 for (map = debug_prefix_maps; map; map = map->next)
1566 if (filename_ncmp (filename, map->old_prefix, map->old_len) == 0)
1567 break;
1568 if (!map)
1569 return filename;
1570 name = filename + map->old_len;
1571 name_len = strlen (name) + 1;
1572 s = (char *) alloca (name_len + map->new_len);
1573 memcpy (s, map->new_prefix, map->new_len);
1574 memcpy (s + map->new_len, name, name_len);
1575 return ggc_strdup (s);
1576 }
1577 \f
1578 /* Return true if DWARF2 debug info can be emitted for DECL. */
1579
1580 static bool
1581 dwarf2_debug_info_emitted_p (tree decl)
1582 {
1583 if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG)
1584 return false;
1585
1586 if (DECL_IGNORED_P (decl))
1587 return false;
1588
1589 return true;
1590 }
1591
1592 /* Return scope resulting from combination of S1 and S2. */
1593 static tree
1594 choose_inner_scope (tree s1, tree s2)
1595 {
1596 if (!s1)
1597 return s2;
1598 if (!s2)
1599 return s1;
1600 if (BLOCK_NUMBER (s1) > BLOCK_NUMBER (s2))
1601 return s1;
1602 return s2;
1603 }
1604
1605 /* Emit lexical block notes needed to change scope from S1 to S2. */
1606
1607 static void
1608 change_scope (rtx orig_insn, tree s1, tree s2)
1609 {
1610 rtx insn = orig_insn;
1611 tree com = NULL_TREE;
1612 tree ts1 = s1, ts2 = s2;
1613 tree s;
1614
1615 while (ts1 != ts2)
1616 {
1617 gcc_assert (ts1 && ts2);
1618 if (BLOCK_NUMBER (ts1) > BLOCK_NUMBER (ts2))
1619 ts1 = BLOCK_SUPERCONTEXT (ts1);
1620 else if (BLOCK_NUMBER (ts1) < BLOCK_NUMBER (ts2))
1621 ts2 = BLOCK_SUPERCONTEXT (ts2);
1622 else
1623 {
1624 ts1 = BLOCK_SUPERCONTEXT (ts1);
1625 ts2 = BLOCK_SUPERCONTEXT (ts2);
1626 }
1627 }
1628 com = ts1;
1629
1630 /* Close scopes. */
1631 s = s1;
1632 while (s != com)
1633 {
1634 rtx note = emit_note_before (NOTE_INSN_BLOCK_END, insn);
1635 NOTE_BLOCK (note) = s;
1636 s = BLOCK_SUPERCONTEXT (s);
1637 }
1638
1639 /* Open scopes. */
1640 s = s2;
1641 while (s != com)
1642 {
1643 insn = emit_note_before (NOTE_INSN_BLOCK_BEG, insn);
1644 NOTE_BLOCK (insn) = s;
1645 s = BLOCK_SUPERCONTEXT (s);
1646 }
1647 }
1648
1649 /* Rebuild all the NOTE_INSN_BLOCK_BEG and NOTE_INSN_BLOCK_END notes based
1650 on the scope tree and the newly reordered instructions. */
1651
1652 static void
1653 reemit_insn_block_notes (void)
1654 {
1655 tree cur_block = DECL_INITIAL (cfun->decl);
1656 rtx insn, note;
1657
1658 insn = get_insns ();
1659 for (; insn; insn = NEXT_INSN (insn))
1660 {
1661 tree this_block;
1662
1663 /* Prevent lexical blocks from straddling section boundaries. */
1664 if (NOTE_P (insn) && NOTE_KIND (insn) == NOTE_INSN_SWITCH_TEXT_SECTIONS)
1665 {
1666 for (tree s = cur_block; s != DECL_INITIAL (cfun->decl);
1667 s = BLOCK_SUPERCONTEXT (s))
1668 {
1669 rtx note = emit_note_before (NOTE_INSN_BLOCK_END, insn);
1670 NOTE_BLOCK (note) = s;
1671 note = emit_note_after (NOTE_INSN_BLOCK_BEG, insn);
1672 NOTE_BLOCK (note) = s;
1673 }
1674 }
1675
1676 if (!active_insn_p (insn))
1677 continue;
1678
1679 /* Avoid putting scope notes between jump table and its label. */
1680 if (JUMP_TABLE_DATA_P (insn))
1681 continue;
1682
1683 this_block = insn_scope (insn);
1684 /* For sequences compute scope resulting from merging all scopes
1685 of instructions nested inside. */
1686 if (GET_CODE (PATTERN (insn)) == SEQUENCE)
1687 {
1688 int i;
1689 rtx body = PATTERN (insn);
1690
1691 this_block = NULL;
1692 for (i = 0; i < XVECLEN (body, 0); i++)
1693 this_block = choose_inner_scope (this_block,
1694 insn_scope (XVECEXP (body, 0, i)));
1695 }
1696 if (! this_block)
1697 {
1698 if (INSN_LOCATION (insn) == UNKNOWN_LOCATION)
1699 continue;
1700 else
1701 this_block = DECL_INITIAL (cfun->decl);
1702 }
1703
1704 if (this_block != cur_block)
1705 {
1706 change_scope (insn, cur_block, this_block);
1707 cur_block = this_block;
1708 }
1709 }
1710
1711 /* change_scope emits before the insn, not after. */
1712 note = emit_note (NOTE_INSN_DELETED);
1713 change_scope (note, cur_block, DECL_INITIAL (cfun->decl));
1714 delete_insn (note);
1715
1716 reorder_blocks ();
1717 }
1718
1719 /* Output assembler code for the start of a function,
1720 and initialize some of the variables in this file
1721 for the new function. The label for the function and associated
1722 assembler pseudo-ops have already been output in `assemble_start_function'.
1723
1724 FIRST is the first insn of the rtl for the function being compiled.
1725 FILE is the file to write assembler code to.
1726 OPTIMIZE_P is nonzero if we should eliminate redundant
1727 test and compare insns. */
1728
1729 void
1730 final_start_function (rtx first, FILE *file,
1731 int optimize_p ATTRIBUTE_UNUSED)
1732 {
1733 block_depth = 0;
1734
1735 this_is_asm_operands = 0;
1736
1737 need_profile_function = false;
1738
1739 last_filename = LOCATION_FILE (prologue_location);
1740 last_linenum = LOCATION_LINE (prologue_location);
1741 last_discriminator = discriminator = 0;
1742
1743 high_block_linenum = high_function_linenum = last_linenum;
1744
1745 if (flag_sanitize & SANITIZE_ADDRESS)
1746 asan_function_start ();
1747
1748 if (!DECL_IGNORED_P (current_function_decl))
1749 debug_hooks->begin_prologue (last_linenum, last_filename);
1750
1751 if (!dwarf2_debug_info_emitted_p (current_function_decl))
1752 dwarf2out_begin_prologue (0, NULL);
1753
1754 #ifdef LEAF_REG_REMAP
1755 if (crtl->uses_only_leaf_regs)
1756 leaf_renumber_regs (first);
1757 #endif
1758
1759 /* The Sun386i and perhaps other machines don't work right
1760 if the profiling code comes after the prologue. */
1761 if (targetm.profile_before_prologue () && crtl->profile)
1762 {
1763 if (targetm.asm_out.function_prologue
1764 == default_function_pro_epilogue
1765 #ifdef HAVE_prologue
1766 && HAVE_prologue
1767 #endif
1768 )
1769 {
1770 rtx insn;
1771 for (insn = first; insn; insn = NEXT_INSN (insn))
1772 if (!NOTE_P (insn))
1773 {
1774 insn = NULL_RTX;
1775 break;
1776 }
1777 else if (NOTE_KIND (insn) == NOTE_INSN_BASIC_BLOCK
1778 || NOTE_KIND (insn) == NOTE_INSN_FUNCTION_BEG)
1779 break;
1780 else if (NOTE_KIND (insn) == NOTE_INSN_DELETED
1781 || NOTE_KIND (insn) == NOTE_INSN_VAR_LOCATION)
1782 continue;
1783 else
1784 {
1785 insn = NULL_RTX;
1786 break;
1787 }
1788
1789 if (insn)
1790 need_profile_function = true;
1791 else
1792 profile_function (file);
1793 }
1794 else
1795 profile_function (file);
1796 }
1797
1798 /* If debugging, assign block numbers to all of the blocks in this
1799 function. */
1800 if (write_symbols)
1801 {
1802 reemit_insn_block_notes ();
1803 number_blocks (current_function_decl);
1804 /* We never actually put out begin/end notes for the top-level
1805 block in the function. But, conceptually, that block is
1806 always needed. */
1807 TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl)) = 1;
1808 }
1809
1810 if (warn_frame_larger_than
1811 && get_frame_size () > frame_larger_than_size)
1812 {
1813 /* Issue a warning */
1814 warning (OPT_Wframe_larger_than_,
1815 "the frame size of %wd bytes is larger than %wd bytes",
1816 get_frame_size (), frame_larger_than_size);
1817 }
1818
1819 /* First output the function prologue: code to set up the stack frame. */
1820 targetm.asm_out.function_prologue (file, get_frame_size ());
1821
1822 /* If the machine represents the prologue as RTL, the profiling code must
1823 be emitted when NOTE_INSN_PROLOGUE_END is scanned. */
1824 #ifdef HAVE_prologue
1825 if (! HAVE_prologue)
1826 #endif
1827 profile_after_prologue (file);
1828 }
1829
1830 static void
1831 profile_after_prologue (FILE *file ATTRIBUTE_UNUSED)
1832 {
1833 if (!targetm.profile_before_prologue () && crtl->profile)
1834 profile_function (file);
1835 }
1836
1837 static void
1838 profile_function (FILE *file ATTRIBUTE_UNUSED)
1839 {
1840 #ifndef NO_PROFILE_COUNTERS
1841 # define NO_PROFILE_COUNTERS 0
1842 #endif
1843 #ifdef ASM_OUTPUT_REG_PUSH
1844 rtx sval = NULL, chain = NULL;
1845
1846 if (cfun->returns_struct)
1847 sval = targetm.calls.struct_value_rtx (TREE_TYPE (current_function_decl),
1848 true);
1849 if (cfun->static_chain_decl)
1850 chain = targetm.calls.static_chain (current_function_decl, true);
1851 #endif /* ASM_OUTPUT_REG_PUSH */
1852
1853 if (! NO_PROFILE_COUNTERS)
1854 {
1855 int align = MIN (BIGGEST_ALIGNMENT, LONG_TYPE_SIZE);
1856 switch_to_section (data_section);
1857 ASM_OUTPUT_ALIGN (file, floor_log2 (align / BITS_PER_UNIT));
1858 targetm.asm_out.internal_label (file, "LP", current_function_funcdef_no);
1859 assemble_integer (const0_rtx, LONG_TYPE_SIZE / BITS_PER_UNIT, align, 1);
1860 }
1861
1862 switch_to_section (current_function_section ());
1863
1864 #ifdef ASM_OUTPUT_REG_PUSH
1865 if (sval && REG_P (sval))
1866 ASM_OUTPUT_REG_PUSH (file, REGNO (sval));
1867 if (chain && REG_P (chain))
1868 ASM_OUTPUT_REG_PUSH (file, REGNO (chain));
1869 #endif
1870
1871 FUNCTION_PROFILER (file, current_function_funcdef_no);
1872
1873 #ifdef ASM_OUTPUT_REG_PUSH
1874 if (chain && REG_P (chain))
1875 ASM_OUTPUT_REG_POP (file, REGNO (chain));
1876 if (sval && REG_P (sval))
1877 ASM_OUTPUT_REG_POP (file, REGNO (sval));
1878 #endif
1879 }
1880
1881 /* Output assembler code for the end of a function.
1882 For clarity, args are same as those of `final_start_function'
1883 even though not all of them are needed. */
1884
1885 void
1886 final_end_function (void)
1887 {
1888 app_disable ();
1889
1890 if (!DECL_IGNORED_P (current_function_decl))
1891 debug_hooks->end_function (high_function_linenum);
1892
1893 /* Finally, output the function epilogue:
1894 code to restore the stack frame and return to the caller. */
1895 targetm.asm_out.function_epilogue (asm_out_file, get_frame_size ());
1896
1897 /* And debug output. */
1898 if (!DECL_IGNORED_P (current_function_decl))
1899 debug_hooks->end_epilogue (last_linenum, last_filename);
1900
1901 if (!dwarf2_debug_info_emitted_p (current_function_decl)
1902 && dwarf2out_do_frame ())
1903 dwarf2out_end_epilogue (last_linenum, last_filename);
1904 }
1905 \f
1906
1907 /* Dumper helper for basic block information. FILE is the assembly
1908 output file, and INSN is the instruction being emitted. */
1909
1910 static void
1911 dump_basic_block_info (FILE *file, rtx insn, basic_block *start_to_bb,
1912 basic_block *end_to_bb, int bb_map_size, int *bb_seqn)
1913 {
1914 basic_block bb;
1915
1916 if (!flag_debug_asm)
1917 return;
1918
1919 if (INSN_UID (insn) < bb_map_size
1920 && (bb = start_to_bb[INSN_UID (insn)]) != NULL)
1921 {
1922 edge e;
1923 edge_iterator ei;
1924
1925 fprintf (file, "%s BLOCK %d", ASM_COMMENT_START, bb->index);
1926 if (bb->frequency)
1927 fprintf (file, " freq:%d", bb->frequency);
1928 if (bb->count)
1929 fprintf (file, " count:%"PRId64,
1930 bb->count);
1931 fprintf (file, " seq:%d", (*bb_seqn)++);
1932 fprintf (file, "\n%s PRED:", ASM_COMMENT_START);
1933 FOR_EACH_EDGE (e, ei, bb->preds)
1934 {
1935 dump_edge_info (file, e, TDF_DETAILS, 0);
1936 }
1937 fprintf (file, "\n");
1938 }
1939 if (INSN_UID (insn) < bb_map_size
1940 && (bb = end_to_bb[INSN_UID (insn)]) != NULL)
1941 {
1942 edge e;
1943 edge_iterator ei;
1944
1945 fprintf (asm_out_file, "%s SUCC:", ASM_COMMENT_START);
1946 FOR_EACH_EDGE (e, ei, bb->succs)
1947 {
1948 dump_edge_info (asm_out_file, e, TDF_DETAILS, 1);
1949 }
1950 fprintf (file, "\n");
1951 }
1952 }
1953
1954 /* Output assembler code for some insns: all or part of a function.
1955 For description of args, see `final_start_function', above. */
1956
1957 void
1958 final (rtx first, FILE *file, int optimize_p)
1959 {
1960 rtx insn, next;
1961 int seen = 0;
1962
1963 /* Used for -dA dump. */
1964 basic_block *start_to_bb = NULL;
1965 basic_block *end_to_bb = NULL;
1966 int bb_map_size = 0;
1967 int bb_seqn = 0;
1968
1969 last_ignored_compare = 0;
1970
1971 #ifdef HAVE_cc0
1972 for (insn = first; insn; insn = NEXT_INSN (insn))
1973 {
1974 /* If CC tracking across branches is enabled, record the insn which
1975 jumps to each branch only reached from one place. */
1976 if (optimize_p && JUMP_P (insn))
1977 {
1978 rtx lab = JUMP_LABEL (insn);
1979 if (lab && LABEL_P (lab) && LABEL_NUSES (lab) == 1)
1980 {
1981 LABEL_REFS (lab) = insn;
1982 }
1983 }
1984 }
1985 #endif
1986
1987 init_recog ();
1988
1989 CC_STATUS_INIT;
1990
1991 if (flag_debug_asm)
1992 {
1993 basic_block bb;
1994
1995 bb_map_size = get_max_uid () + 1;
1996 start_to_bb = XCNEWVEC (basic_block, bb_map_size);
1997 end_to_bb = XCNEWVEC (basic_block, bb_map_size);
1998
1999 /* There is no cfg for a thunk. */
2000 if (!cfun->is_thunk)
2001 FOR_EACH_BB_REVERSE_FN (bb, cfun)
2002 {
2003 start_to_bb[INSN_UID (BB_HEAD (bb))] = bb;
2004 end_to_bb[INSN_UID (BB_END (bb))] = bb;
2005 }
2006 }
2007
2008 /* Output the insns. */
2009 for (insn = first; insn;)
2010 {
2011 if (HAVE_ATTR_length)
2012 {
2013 if ((unsigned) INSN_UID (insn) >= INSN_ADDRESSES_SIZE ())
2014 {
2015 /* This can be triggered by bugs elsewhere in the compiler if
2016 new insns are created after init_insn_lengths is called. */
2017 gcc_assert (NOTE_P (insn));
2018 insn_current_address = -1;
2019 }
2020 else
2021 insn_current_address = INSN_ADDRESSES (INSN_UID (insn));
2022 }
2023
2024 dump_basic_block_info (file, insn, start_to_bb, end_to_bb,
2025 bb_map_size, &bb_seqn);
2026 insn = final_scan_insn (insn, file, optimize_p, 0, &seen);
2027 }
2028
2029 if (flag_debug_asm)
2030 {
2031 free (start_to_bb);
2032 free (end_to_bb);
2033 }
2034
2035 /* Remove CFI notes, to avoid compare-debug failures. */
2036 for (insn = first; insn; insn = next)
2037 {
2038 next = NEXT_INSN (insn);
2039 if (NOTE_P (insn)
2040 && (NOTE_KIND (insn) == NOTE_INSN_CFI
2041 || NOTE_KIND (insn) == NOTE_INSN_CFI_LABEL))
2042 delete_insn (insn);
2043 }
2044 }
2045 \f
2046 const char *
2047 get_insn_template (int code, rtx insn)
2048 {
2049 switch (insn_data[code].output_format)
2050 {
2051 case INSN_OUTPUT_FORMAT_SINGLE:
2052 return insn_data[code].output.single;
2053 case INSN_OUTPUT_FORMAT_MULTI:
2054 return insn_data[code].output.multi[which_alternative];
2055 case INSN_OUTPUT_FORMAT_FUNCTION:
2056 gcc_assert (insn);
2057 return (*insn_data[code].output.function) (recog_data.operand, insn);
2058
2059 default:
2060 gcc_unreachable ();
2061 }
2062 }
2063
2064 /* Emit the appropriate declaration for an alternate-entry-point
2065 symbol represented by INSN, to FILE. INSN is a CODE_LABEL with
2066 LABEL_KIND != LABEL_NORMAL.
2067
2068 The case fall-through in this function is intentional. */
2069 static void
2070 output_alternate_entry_point (FILE *file, rtx insn)
2071 {
2072 const char *name = LABEL_NAME (insn);
2073
2074 switch (LABEL_KIND (insn))
2075 {
2076 case LABEL_WEAK_ENTRY:
2077 #ifdef ASM_WEAKEN_LABEL
2078 ASM_WEAKEN_LABEL (file, name);
2079 #endif
2080 case LABEL_GLOBAL_ENTRY:
2081 targetm.asm_out.globalize_label (file, name);
2082 case LABEL_STATIC_ENTRY:
2083 #ifdef ASM_OUTPUT_TYPE_DIRECTIVE
2084 ASM_OUTPUT_TYPE_DIRECTIVE (file, name, "function");
2085 #endif
2086 ASM_OUTPUT_LABEL (file, name);
2087 break;
2088
2089 case LABEL_NORMAL:
2090 default:
2091 gcc_unreachable ();
2092 }
2093 }
2094
2095 /* Given a CALL_INSN, find and return the nested CALL. */
2096 static rtx
2097 call_from_call_insn (rtx insn)
2098 {
2099 rtx x;
2100 gcc_assert (CALL_P (insn));
2101 x = PATTERN (insn);
2102
2103 while (GET_CODE (x) != CALL)
2104 {
2105 switch (GET_CODE (x))
2106 {
2107 default:
2108 gcc_unreachable ();
2109 case COND_EXEC:
2110 x = COND_EXEC_CODE (x);
2111 break;
2112 case PARALLEL:
2113 x = XVECEXP (x, 0, 0);
2114 break;
2115 case SET:
2116 x = XEXP (x, 1);
2117 break;
2118 }
2119 }
2120 return x;
2121 }
2122
2123 /* The final scan for one insn, INSN.
2124 Args are same as in `final', except that INSN
2125 is the insn being scanned.
2126 Value returned is the next insn to be scanned.
2127
2128 NOPEEPHOLES is the flag to disallow peephole processing (currently
2129 used for within delayed branch sequence output).
2130
2131 SEEN is used to track the end of the prologue, for emitting
2132 debug information. We force the emission of a line note after
2133 both NOTE_INSN_PROLOGUE_END and NOTE_INSN_FUNCTION_BEG. */
2134
2135 rtx
2136 final_scan_insn (rtx insn, FILE *file, int optimize_p ATTRIBUTE_UNUSED,
2137 int nopeepholes ATTRIBUTE_UNUSED, int *seen)
2138 {
2139 #ifdef HAVE_cc0
2140 rtx set;
2141 #endif
2142 rtx next;
2143
2144 insn_counter++;
2145
2146 /* Ignore deleted insns. These can occur when we split insns (due to a
2147 template of "#") while not optimizing. */
2148 if (INSN_DELETED_P (insn))
2149 return NEXT_INSN (insn);
2150
2151 switch (GET_CODE (insn))
2152 {
2153 case NOTE:
2154 switch (NOTE_KIND (insn))
2155 {
2156 case NOTE_INSN_DELETED:
2157 break;
2158
2159 case NOTE_INSN_SWITCH_TEXT_SECTIONS:
2160 in_cold_section_p = !in_cold_section_p;
2161
2162 if (dwarf2out_do_frame ())
2163 dwarf2out_switch_text_section ();
2164 else if (!DECL_IGNORED_P (current_function_decl))
2165 debug_hooks->switch_text_section ();
2166
2167 switch_to_section (current_function_section ());
2168 targetm.asm_out.function_switched_text_sections (asm_out_file,
2169 current_function_decl,
2170 in_cold_section_p);
2171 /* Emit a label for the split cold section. Form label name by
2172 suffixing "cold" to the original function's name. */
2173 if (in_cold_section_p)
2174 {
2175 tree cold_function_name
2176 = clone_function_name (current_function_decl, "cold");
2177 ASM_OUTPUT_LABEL (asm_out_file,
2178 IDENTIFIER_POINTER (cold_function_name));
2179 }
2180 break;
2181
2182 case NOTE_INSN_BASIC_BLOCK:
2183 if (need_profile_function)
2184 {
2185 profile_function (asm_out_file);
2186 need_profile_function = false;
2187 }
2188
2189 if (targetm.asm_out.unwind_emit)
2190 targetm.asm_out.unwind_emit (asm_out_file, insn);
2191
2192 discriminator = NOTE_BASIC_BLOCK (insn)->discriminator;
2193
2194 break;
2195
2196 case NOTE_INSN_EH_REGION_BEG:
2197 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHB",
2198 NOTE_EH_HANDLER (insn));
2199 break;
2200
2201 case NOTE_INSN_EH_REGION_END:
2202 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHE",
2203 NOTE_EH_HANDLER (insn));
2204 break;
2205
2206 case NOTE_INSN_PROLOGUE_END:
2207 targetm.asm_out.function_end_prologue (file);
2208 profile_after_prologue (file);
2209
2210 if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE)
2211 {
2212 *seen |= SEEN_EMITTED;
2213 force_source_line = true;
2214 }
2215 else
2216 *seen |= SEEN_NOTE;
2217
2218 break;
2219
2220 case NOTE_INSN_EPILOGUE_BEG:
2221 if (!DECL_IGNORED_P (current_function_decl))
2222 (*debug_hooks->begin_epilogue) (last_linenum, last_filename);
2223 targetm.asm_out.function_begin_epilogue (file);
2224 break;
2225
2226 case NOTE_INSN_CFI:
2227 dwarf2out_emit_cfi (NOTE_CFI (insn));
2228 break;
2229
2230 case NOTE_INSN_CFI_LABEL:
2231 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LCFI",
2232 NOTE_LABEL_NUMBER (insn));
2233 break;
2234
2235 case NOTE_INSN_FUNCTION_BEG:
2236 if (need_profile_function)
2237 {
2238 profile_function (asm_out_file);
2239 need_profile_function = false;
2240 }
2241
2242 app_disable ();
2243 if (!DECL_IGNORED_P (current_function_decl))
2244 debug_hooks->end_prologue (last_linenum, last_filename);
2245
2246 if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE)
2247 {
2248 *seen |= SEEN_EMITTED;
2249 force_source_line = true;
2250 }
2251 else
2252 *seen |= SEEN_NOTE;
2253
2254 break;
2255
2256 case NOTE_INSN_BLOCK_BEG:
2257 if (debug_info_level == DINFO_LEVEL_NORMAL
2258 || debug_info_level == DINFO_LEVEL_VERBOSE
2259 || write_symbols == DWARF2_DEBUG
2260 || write_symbols == VMS_AND_DWARF2_DEBUG
2261 || write_symbols == VMS_DEBUG)
2262 {
2263 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
2264
2265 app_disable ();
2266 ++block_depth;
2267 high_block_linenum = last_linenum;
2268
2269 /* Output debugging info about the symbol-block beginning. */
2270 if (!DECL_IGNORED_P (current_function_decl))
2271 debug_hooks->begin_block (last_linenum, n);
2272
2273 /* Mark this block as output. */
2274 TREE_ASM_WRITTEN (NOTE_BLOCK (insn)) = 1;
2275 }
2276 if (write_symbols == DBX_DEBUG
2277 || write_symbols == SDB_DEBUG)
2278 {
2279 location_t *locus_ptr
2280 = block_nonartificial_location (NOTE_BLOCK (insn));
2281
2282 if (locus_ptr != NULL)
2283 {
2284 override_filename = LOCATION_FILE (*locus_ptr);
2285 override_linenum = LOCATION_LINE (*locus_ptr);
2286 }
2287 }
2288 break;
2289
2290 case NOTE_INSN_BLOCK_END:
2291 if (debug_info_level == DINFO_LEVEL_NORMAL
2292 || debug_info_level == DINFO_LEVEL_VERBOSE
2293 || write_symbols == DWARF2_DEBUG
2294 || write_symbols == VMS_AND_DWARF2_DEBUG
2295 || write_symbols == VMS_DEBUG)
2296 {
2297 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
2298
2299 app_disable ();
2300
2301 /* End of a symbol-block. */
2302 --block_depth;
2303 gcc_assert (block_depth >= 0);
2304
2305 if (!DECL_IGNORED_P (current_function_decl))
2306 debug_hooks->end_block (high_block_linenum, n);
2307 }
2308 if (write_symbols == DBX_DEBUG
2309 || write_symbols == SDB_DEBUG)
2310 {
2311 tree outer_block = BLOCK_SUPERCONTEXT (NOTE_BLOCK (insn));
2312 location_t *locus_ptr
2313 = block_nonartificial_location (outer_block);
2314
2315 if (locus_ptr != NULL)
2316 {
2317 override_filename = LOCATION_FILE (*locus_ptr);
2318 override_linenum = LOCATION_LINE (*locus_ptr);
2319 }
2320 else
2321 {
2322 override_filename = NULL;
2323 override_linenum = 0;
2324 }
2325 }
2326 break;
2327
2328 case NOTE_INSN_DELETED_LABEL:
2329 /* Emit the label. We may have deleted the CODE_LABEL because
2330 the label could be proved to be unreachable, though still
2331 referenced (in the form of having its address taken. */
2332 ASM_OUTPUT_DEBUG_LABEL (file, "L", CODE_LABEL_NUMBER (insn));
2333 break;
2334
2335 case NOTE_INSN_DELETED_DEBUG_LABEL:
2336 /* Similarly, but need to use different namespace for it. */
2337 if (CODE_LABEL_NUMBER (insn) != -1)
2338 ASM_OUTPUT_DEBUG_LABEL (file, "LDL", CODE_LABEL_NUMBER (insn));
2339 break;
2340
2341 case NOTE_INSN_VAR_LOCATION:
2342 case NOTE_INSN_CALL_ARG_LOCATION:
2343 if (!DECL_IGNORED_P (current_function_decl))
2344 debug_hooks->var_location (insn);
2345 break;
2346
2347 default:
2348 gcc_unreachable ();
2349 break;
2350 }
2351 break;
2352
2353 case BARRIER:
2354 break;
2355
2356 case CODE_LABEL:
2357 /* The target port might emit labels in the output function for
2358 some insn, e.g. sh.c output_branchy_insn. */
2359 if (CODE_LABEL_NUMBER (insn) <= max_labelno)
2360 {
2361 int align = LABEL_TO_ALIGNMENT (insn);
2362 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2363 int max_skip = LABEL_TO_MAX_SKIP (insn);
2364 #endif
2365
2366 if (align && NEXT_INSN (insn))
2367 {
2368 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2369 ASM_OUTPUT_MAX_SKIP_ALIGN (file, align, max_skip);
2370 #else
2371 #ifdef ASM_OUTPUT_ALIGN_WITH_NOP
2372 ASM_OUTPUT_ALIGN_WITH_NOP (file, align);
2373 #else
2374 ASM_OUTPUT_ALIGN (file, align);
2375 #endif
2376 #endif
2377 }
2378 }
2379 CC_STATUS_INIT;
2380
2381 if (!DECL_IGNORED_P (current_function_decl) && LABEL_NAME (insn))
2382 debug_hooks->label (insn);
2383
2384 app_disable ();
2385
2386 next = next_nonnote_insn (insn);
2387 /* If this label is followed by a jump-table, make sure we put
2388 the label in the read-only section. Also possibly write the
2389 label and jump table together. */
2390 if (next != 0 && JUMP_TABLE_DATA_P (next))
2391 {
2392 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2393 /* In this case, the case vector is being moved by the
2394 target, so don't output the label at all. Leave that
2395 to the back end macros. */
2396 #else
2397 if (! JUMP_TABLES_IN_TEXT_SECTION)
2398 {
2399 int log_align;
2400
2401 switch_to_section (targetm.asm_out.function_rodata_section
2402 (current_function_decl));
2403
2404 #ifdef ADDR_VEC_ALIGN
2405 log_align = ADDR_VEC_ALIGN (next);
2406 #else
2407 log_align = exact_log2 (BIGGEST_ALIGNMENT / BITS_PER_UNIT);
2408 #endif
2409 ASM_OUTPUT_ALIGN (file, log_align);
2410 }
2411 else
2412 switch_to_section (current_function_section ());
2413
2414 #ifdef ASM_OUTPUT_CASE_LABEL
2415 ASM_OUTPUT_CASE_LABEL (file, "L", CODE_LABEL_NUMBER (insn),
2416 next);
2417 #else
2418 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn));
2419 #endif
2420 #endif
2421 break;
2422 }
2423 if (LABEL_ALT_ENTRY_P (insn))
2424 output_alternate_entry_point (file, insn);
2425 else
2426 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn));
2427 break;
2428
2429 default:
2430 {
2431 rtx body = PATTERN (insn);
2432 int insn_code_number;
2433 const char *templ;
2434 bool is_stmt;
2435
2436 /* Reset this early so it is correct for ASM statements. */
2437 current_insn_predicate = NULL_RTX;
2438
2439 /* An INSN, JUMP_INSN or CALL_INSN.
2440 First check for special kinds that recog doesn't recognize. */
2441
2442 if (GET_CODE (body) == USE /* These are just declarations. */
2443 || GET_CODE (body) == CLOBBER)
2444 break;
2445
2446 #ifdef HAVE_cc0
2447 {
2448 /* If there is a REG_CC_SETTER note on this insn, it means that
2449 the setting of the condition code was done in the delay slot
2450 of the insn that branched here. So recover the cc status
2451 from the insn that set it. */
2452
2453 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2454 if (note)
2455 {
2456 NOTICE_UPDATE_CC (PATTERN (XEXP (note, 0)), XEXP (note, 0));
2457 cc_prev_status = cc_status;
2458 }
2459 }
2460 #endif
2461
2462 /* Detect insns that are really jump-tables
2463 and output them as such. */
2464
2465 if (JUMP_TABLE_DATA_P (insn))
2466 {
2467 #if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC))
2468 int vlen, idx;
2469 #endif
2470
2471 if (! JUMP_TABLES_IN_TEXT_SECTION)
2472 switch_to_section (targetm.asm_out.function_rodata_section
2473 (current_function_decl));
2474 else
2475 switch_to_section (current_function_section ());
2476
2477 app_disable ();
2478
2479 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2480 if (GET_CODE (body) == ADDR_VEC)
2481 {
2482 #ifdef ASM_OUTPUT_ADDR_VEC
2483 ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn), body);
2484 #else
2485 gcc_unreachable ();
2486 #endif
2487 }
2488 else
2489 {
2490 #ifdef ASM_OUTPUT_ADDR_DIFF_VEC
2491 ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn), body);
2492 #else
2493 gcc_unreachable ();
2494 #endif
2495 }
2496 #else
2497 vlen = XVECLEN (body, GET_CODE (body) == ADDR_DIFF_VEC);
2498 for (idx = 0; idx < vlen; idx++)
2499 {
2500 if (GET_CODE (body) == ADDR_VEC)
2501 {
2502 #ifdef ASM_OUTPUT_ADDR_VEC_ELT
2503 ASM_OUTPUT_ADDR_VEC_ELT
2504 (file, CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 0, idx), 0)));
2505 #else
2506 gcc_unreachable ();
2507 #endif
2508 }
2509 else
2510 {
2511 #ifdef ASM_OUTPUT_ADDR_DIFF_ELT
2512 ASM_OUTPUT_ADDR_DIFF_ELT
2513 (file,
2514 body,
2515 CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 1, idx), 0)),
2516 CODE_LABEL_NUMBER (XEXP (XEXP (body, 0), 0)));
2517 #else
2518 gcc_unreachable ();
2519 #endif
2520 }
2521 }
2522 #ifdef ASM_OUTPUT_CASE_END
2523 ASM_OUTPUT_CASE_END (file,
2524 CODE_LABEL_NUMBER (PREV_INSN (insn)),
2525 insn);
2526 #endif
2527 #endif
2528
2529 switch_to_section (current_function_section ());
2530
2531 break;
2532 }
2533 /* Output this line note if it is the first or the last line
2534 note in a row. */
2535 if (!DECL_IGNORED_P (current_function_decl)
2536 && notice_source_line (insn, &is_stmt))
2537 (*debug_hooks->source_line) (last_linenum, last_filename,
2538 last_discriminator, is_stmt);
2539
2540 if (GET_CODE (body) == ASM_INPUT)
2541 {
2542 const char *string = XSTR (body, 0);
2543
2544 /* There's no telling what that did to the condition codes. */
2545 CC_STATUS_INIT;
2546
2547 if (string[0])
2548 {
2549 expanded_location loc;
2550
2551 app_enable ();
2552 loc = expand_location (ASM_INPUT_SOURCE_LOCATION (body));
2553 if (*loc.file && loc.line)
2554 fprintf (asm_out_file, "%s %i \"%s\" 1\n",
2555 ASM_COMMENT_START, loc.line, loc.file);
2556 fprintf (asm_out_file, "\t%s\n", string);
2557 #if HAVE_AS_LINE_ZERO
2558 if (*loc.file && loc.line)
2559 fprintf (asm_out_file, "%s 0 \"\" 2\n", ASM_COMMENT_START);
2560 #endif
2561 }
2562 break;
2563 }
2564
2565 /* Detect `asm' construct with operands. */
2566 if (asm_noperands (body) >= 0)
2567 {
2568 unsigned int noperands = asm_noperands (body);
2569 rtx *ops = XALLOCAVEC (rtx, noperands);
2570 const char *string;
2571 location_t loc;
2572 expanded_location expanded;
2573
2574 /* There's no telling what that did to the condition codes. */
2575 CC_STATUS_INIT;
2576
2577 /* Get out the operand values. */
2578 string = decode_asm_operands (body, ops, NULL, NULL, NULL, &loc);
2579 /* Inhibit dying on what would otherwise be compiler bugs. */
2580 insn_noperands = noperands;
2581 this_is_asm_operands = insn;
2582 expanded = expand_location (loc);
2583
2584 #ifdef FINAL_PRESCAN_INSN
2585 FINAL_PRESCAN_INSN (insn, ops, insn_noperands);
2586 #endif
2587
2588 /* Output the insn using them. */
2589 if (string[0])
2590 {
2591 app_enable ();
2592 if (expanded.file && expanded.line)
2593 fprintf (asm_out_file, "%s %i \"%s\" 1\n",
2594 ASM_COMMENT_START, expanded.line, expanded.file);
2595 output_asm_insn (string, ops);
2596 #if HAVE_AS_LINE_ZERO
2597 if (expanded.file && expanded.line)
2598 fprintf (asm_out_file, "%s 0 \"\" 2\n", ASM_COMMENT_START);
2599 #endif
2600 }
2601
2602 if (targetm.asm_out.final_postscan_insn)
2603 targetm.asm_out.final_postscan_insn (file, insn, ops,
2604 insn_noperands);
2605
2606 this_is_asm_operands = 0;
2607 break;
2608 }
2609
2610 app_disable ();
2611
2612 if (GET_CODE (body) == SEQUENCE)
2613 {
2614 /* A delayed-branch sequence */
2615 int i;
2616
2617 final_sequence = body;
2618
2619 /* The first insn in this SEQUENCE might be a JUMP_INSN that will
2620 force the restoration of a comparison that was previously
2621 thought unnecessary. If that happens, cancel this sequence
2622 and cause that insn to be restored. */
2623
2624 next = final_scan_insn (XVECEXP (body, 0, 0), file, 0, 1, seen);
2625 if (next != XVECEXP (body, 0, 1))
2626 {
2627 final_sequence = 0;
2628 return next;
2629 }
2630
2631 for (i = 1; i < XVECLEN (body, 0); i++)
2632 {
2633 rtx insn = XVECEXP (body, 0, i);
2634 rtx next = NEXT_INSN (insn);
2635 /* We loop in case any instruction in a delay slot gets
2636 split. */
2637 do
2638 insn = final_scan_insn (insn, file, 0, 1, seen);
2639 while (insn != next);
2640 }
2641 #ifdef DBR_OUTPUT_SEQEND
2642 DBR_OUTPUT_SEQEND (file);
2643 #endif
2644 final_sequence = 0;
2645
2646 /* If the insn requiring the delay slot was a CALL_INSN, the
2647 insns in the delay slot are actually executed before the
2648 called function. Hence we don't preserve any CC-setting
2649 actions in these insns and the CC must be marked as being
2650 clobbered by the function. */
2651 if (CALL_P (XVECEXP (body, 0, 0)))
2652 {
2653 CC_STATUS_INIT;
2654 }
2655 break;
2656 }
2657
2658 /* We have a real machine instruction as rtl. */
2659
2660 body = PATTERN (insn);
2661
2662 #ifdef HAVE_cc0
2663 set = single_set (insn);
2664
2665 /* Check for redundant test and compare instructions
2666 (when the condition codes are already set up as desired).
2667 This is done only when optimizing; if not optimizing,
2668 it should be possible for the user to alter a variable
2669 with the debugger in between statements
2670 and the next statement should reexamine the variable
2671 to compute the condition codes. */
2672
2673 if (optimize_p)
2674 {
2675 if (set
2676 && GET_CODE (SET_DEST (set)) == CC0
2677 && insn != last_ignored_compare)
2678 {
2679 rtx src1, src2;
2680 if (GET_CODE (SET_SRC (set)) == SUBREG)
2681 SET_SRC (set) = alter_subreg (&SET_SRC (set), true);
2682
2683 src1 = SET_SRC (set);
2684 src2 = NULL_RTX;
2685 if (GET_CODE (SET_SRC (set)) == COMPARE)
2686 {
2687 if (GET_CODE (XEXP (SET_SRC (set), 0)) == SUBREG)
2688 XEXP (SET_SRC (set), 0)
2689 = alter_subreg (&XEXP (SET_SRC (set), 0), true);
2690 if (GET_CODE (XEXP (SET_SRC (set), 1)) == SUBREG)
2691 XEXP (SET_SRC (set), 1)
2692 = alter_subreg (&XEXP (SET_SRC (set), 1), true);
2693 if (XEXP (SET_SRC (set), 1)
2694 == CONST0_RTX (GET_MODE (XEXP (SET_SRC (set), 0))))
2695 src2 = XEXP (SET_SRC (set), 0);
2696 }
2697 if ((cc_status.value1 != 0
2698 && rtx_equal_p (src1, cc_status.value1))
2699 || (cc_status.value2 != 0
2700 && rtx_equal_p (src1, cc_status.value2))
2701 || (src2 != 0 && cc_status.value1 != 0
2702 && rtx_equal_p (src2, cc_status.value1))
2703 || (src2 != 0 && cc_status.value2 != 0
2704 && rtx_equal_p (src2, cc_status.value2)))
2705 {
2706 /* Don't delete insn if it has an addressing side-effect. */
2707 if (! FIND_REG_INC_NOTE (insn, NULL_RTX)
2708 /* or if anything in it is volatile. */
2709 && ! volatile_refs_p (PATTERN (insn)))
2710 {
2711 /* We don't really delete the insn; just ignore it. */
2712 last_ignored_compare = insn;
2713 break;
2714 }
2715 }
2716 }
2717 }
2718
2719 /* If this is a conditional branch, maybe modify it
2720 if the cc's are in a nonstandard state
2721 so that it accomplishes the same thing that it would
2722 do straightforwardly if the cc's were set up normally. */
2723
2724 if (cc_status.flags != 0
2725 && JUMP_P (insn)
2726 && GET_CODE (body) == SET
2727 && SET_DEST (body) == pc_rtx
2728 && GET_CODE (SET_SRC (body)) == IF_THEN_ELSE
2729 && COMPARISON_P (XEXP (SET_SRC (body), 0))
2730 && XEXP (XEXP (SET_SRC (body), 0), 0) == cc0_rtx)
2731 {
2732 /* This function may alter the contents of its argument
2733 and clear some of the cc_status.flags bits.
2734 It may also return 1 meaning condition now always true
2735 or -1 meaning condition now always false
2736 or 2 meaning condition nontrivial but altered. */
2737 int result = alter_cond (XEXP (SET_SRC (body), 0));
2738 /* If condition now has fixed value, replace the IF_THEN_ELSE
2739 with its then-operand or its else-operand. */
2740 if (result == 1)
2741 SET_SRC (body) = XEXP (SET_SRC (body), 1);
2742 if (result == -1)
2743 SET_SRC (body) = XEXP (SET_SRC (body), 2);
2744
2745 /* The jump is now either unconditional or a no-op.
2746 If it has become a no-op, don't try to output it.
2747 (It would not be recognized.) */
2748 if (SET_SRC (body) == pc_rtx)
2749 {
2750 delete_insn (insn);
2751 break;
2752 }
2753 else if (ANY_RETURN_P (SET_SRC (body)))
2754 /* Replace (set (pc) (return)) with (return). */
2755 PATTERN (insn) = body = SET_SRC (body);
2756
2757 /* Rerecognize the instruction if it has changed. */
2758 if (result != 0)
2759 INSN_CODE (insn) = -1;
2760 }
2761
2762 /* If this is a conditional trap, maybe modify it if the cc's
2763 are in a nonstandard state so that it accomplishes the same
2764 thing that it would do straightforwardly if the cc's were
2765 set up normally. */
2766 if (cc_status.flags != 0
2767 && NONJUMP_INSN_P (insn)
2768 && GET_CODE (body) == TRAP_IF
2769 && COMPARISON_P (TRAP_CONDITION (body))
2770 && XEXP (TRAP_CONDITION (body), 0) == cc0_rtx)
2771 {
2772 /* This function may alter the contents of its argument
2773 and clear some of the cc_status.flags bits.
2774 It may also return 1 meaning condition now always true
2775 or -1 meaning condition now always false
2776 or 2 meaning condition nontrivial but altered. */
2777 int result = alter_cond (TRAP_CONDITION (body));
2778
2779 /* If TRAP_CONDITION has become always false, delete the
2780 instruction. */
2781 if (result == -1)
2782 {
2783 delete_insn (insn);
2784 break;
2785 }
2786
2787 /* If TRAP_CONDITION has become always true, replace
2788 TRAP_CONDITION with const_true_rtx. */
2789 if (result == 1)
2790 TRAP_CONDITION (body) = const_true_rtx;
2791
2792 /* Rerecognize the instruction if it has changed. */
2793 if (result != 0)
2794 INSN_CODE (insn) = -1;
2795 }
2796
2797 /* Make same adjustments to instructions that examine the
2798 condition codes without jumping and instructions that
2799 handle conditional moves (if this machine has either one). */
2800
2801 if (cc_status.flags != 0
2802 && set != 0)
2803 {
2804 rtx cond_rtx, then_rtx, else_rtx;
2805
2806 if (!JUMP_P (insn)
2807 && GET_CODE (SET_SRC (set)) == IF_THEN_ELSE)
2808 {
2809 cond_rtx = XEXP (SET_SRC (set), 0);
2810 then_rtx = XEXP (SET_SRC (set), 1);
2811 else_rtx = XEXP (SET_SRC (set), 2);
2812 }
2813 else
2814 {
2815 cond_rtx = SET_SRC (set);
2816 then_rtx = const_true_rtx;
2817 else_rtx = const0_rtx;
2818 }
2819
2820 if (COMPARISON_P (cond_rtx)
2821 && XEXP (cond_rtx, 0) == cc0_rtx)
2822 {
2823 int result;
2824 result = alter_cond (cond_rtx);
2825 if (result == 1)
2826 validate_change (insn, &SET_SRC (set), then_rtx, 0);
2827 else if (result == -1)
2828 validate_change (insn, &SET_SRC (set), else_rtx, 0);
2829 else if (result == 2)
2830 INSN_CODE (insn) = -1;
2831 if (SET_DEST (set) == SET_SRC (set))
2832 delete_insn (insn);
2833 }
2834 }
2835
2836 #endif
2837
2838 #ifdef HAVE_peephole
2839 /* Do machine-specific peephole optimizations if desired. */
2840
2841 if (optimize_p && !flag_no_peephole && !nopeepholes)
2842 {
2843 rtx next = peephole (insn);
2844 /* When peepholing, if there were notes within the peephole,
2845 emit them before the peephole. */
2846 if (next != 0 && next != NEXT_INSN (insn))
2847 {
2848 rtx note, prev = PREV_INSN (insn);
2849
2850 for (note = NEXT_INSN (insn); note != next;
2851 note = NEXT_INSN (note))
2852 final_scan_insn (note, file, optimize_p, nopeepholes, seen);
2853
2854 /* Put the notes in the proper position for a later
2855 rescan. For example, the SH target can do this
2856 when generating a far jump in a delayed branch
2857 sequence. */
2858 note = NEXT_INSN (insn);
2859 PREV_INSN (note) = prev;
2860 NEXT_INSN (prev) = note;
2861 NEXT_INSN (PREV_INSN (next)) = insn;
2862 PREV_INSN (insn) = PREV_INSN (next);
2863 NEXT_INSN (insn) = next;
2864 PREV_INSN (next) = insn;
2865 }
2866
2867 /* PEEPHOLE might have changed this. */
2868 body = PATTERN (insn);
2869 }
2870 #endif
2871
2872 /* Try to recognize the instruction.
2873 If successful, verify that the operands satisfy the
2874 constraints for the instruction. Crash if they don't,
2875 since `reload' should have changed them so that they do. */
2876
2877 insn_code_number = recog_memoized (insn);
2878 cleanup_subreg_operands (insn);
2879
2880 /* Dump the insn in the assembly for debugging (-dAP).
2881 If the final dump is requested as slim RTL, dump slim
2882 RTL to the assembly file also. */
2883 if (flag_dump_rtl_in_asm)
2884 {
2885 print_rtx_head = ASM_COMMENT_START;
2886 if (! (dump_flags & TDF_SLIM))
2887 print_rtl_single (asm_out_file, insn);
2888 else
2889 dump_insn_slim (asm_out_file, insn);
2890 print_rtx_head = "";
2891 }
2892
2893 if (! constrain_operands_cached (1))
2894 fatal_insn_not_found (insn);
2895
2896 /* Some target machines need to prescan each insn before
2897 it is output. */
2898
2899 #ifdef FINAL_PRESCAN_INSN
2900 FINAL_PRESCAN_INSN (insn, recog_data.operand, recog_data.n_operands);
2901 #endif
2902
2903 if (targetm.have_conditional_execution ()
2904 && GET_CODE (PATTERN (insn)) == COND_EXEC)
2905 current_insn_predicate = COND_EXEC_TEST (PATTERN (insn));
2906
2907 #ifdef HAVE_cc0
2908 cc_prev_status = cc_status;
2909
2910 /* Update `cc_status' for this instruction.
2911 The instruction's output routine may change it further.
2912 If the output routine for a jump insn needs to depend
2913 on the cc status, it should look at cc_prev_status. */
2914
2915 NOTICE_UPDATE_CC (body, insn);
2916 #endif
2917
2918 current_output_insn = debug_insn = insn;
2919
2920 /* Find the proper template for this insn. */
2921 templ = get_insn_template (insn_code_number, insn);
2922
2923 /* If the C code returns 0, it means that it is a jump insn
2924 which follows a deleted test insn, and that test insn
2925 needs to be reinserted. */
2926 if (templ == 0)
2927 {
2928 rtx prev;
2929
2930 gcc_assert (prev_nonnote_insn (insn) == last_ignored_compare);
2931
2932 /* We have already processed the notes between the setter and
2933 the user. Make sure we don't process them again, this is
2934 particularly important if one of the notes is a block
2935 scope note or an EH note. */
2936 for (prev = insn;
2937 prev != last_ignored_compare;
2938 prev = PREV_INSN (prev))
2939 {
2940 if (NOTE_P (prev))
2941 delete_insn (prev); /* Use delete_note. */
2942 }
2943
2944 return prev;
2945 }
2946
2947 /* If the template is the string "#", it means that this insn must
2948 be split. */
2949 if (templ[0] == '#' && templ[1] == '\0')
2950 {
2951 rtx new_rtx = try_split (body, insn, 0);
2952
2953 /* If we didn't split the insn, go away. */
2954 if (new_rtx == insn && PATTERN (new_rtx) == body)
2955 fatal_insn ("could not split insn", insn);
2956
2957 /* If we have a length attribute, this instruction should have
2958 been split in shorten_branches, to ensure that we would have
2959 valid length info for the splitees. */
2960 gcc_assert (!HAVE_ATTR_length);
2961
2962 return new_rtx;
2963 }
2964
2965 /* ??? This will put the directives in the wrong place if
2966 get_insn_template outputs assembly directly. However calling it
2967 before get_insn_template breaks if the insns is split. */
2968 if (targetm.asm_out.unwind_emit_before_insn
2969 && targetm.asm_out.unwind_emit)
2970 targetm.asm_out.unwind_emit (asm_out_file, insn);
2971
2972 if (CALL_P (insn))
2973 {
2974 rtx x = call_from_call_insn (insn);
2975 x = XEXP (x, 0);
2976 if (x && MEM_P (x) && GET_CODE (XEXP (x, 0)) == SYMBOL_REF)
2977 {
2978 tree t;
2979 x = XEXP (x, 0);
2980 t = SYMBOL_REF_DECL (x);
2981 if (t)
2982 assemble_external (t);
2983 }
2984 if (!DECL_IGNORED_P (current_function_decl))
2985 debug_hooks->var_location (insn);
2986 }
2987
2988 /* Output assembler code from the template. */
2989 output_asm_insn (templ, recog_data.operand);
2990
2991 /* Some target machines need to postscan each insn after
2992 it is output. */
2993 if (targetm.asm_out.final_postscan_insn)
2994 targetm.asm_out.final_postscan_insn (file, insn, recog_data.operand,
2995 recog_data.n_operands);
2996
2997 if (!targetm.asm_out.unwind_emit_before_insn
2998 && targetm.asm_out.unwind_emit)
2999 targetm.asm_out.unwind_emit (asm_out_file, insn);
3000
3001 current_output_insn = debug_insn = 0;
3002 }
3003 }
3004 return NEXT_INSN (insn);
3005 }
3006 \f
3007 /* Return whether a source line note needs to be emitted before INSN.
3008 Sets IS_STMT to TRUE if the line should be marked as a possible
3009 breakpoint location. */
3010
3011 static bool
3012 notice_source_line (rtx insn, bool *is_stmt)
3013 {
3014 const char *filename;
3015 int linenum;
3016
3017 if (override_filename)
3018 {
3019 filename = override_filename;
3020 linenum = override_linenum;
3021 }
3022 else if (INSN_HAS_LOCATION (insn))
3023 {
3024 expanded_location xloc = insn_location (insn);
3025 filename = xloc.file;
3026 linenum = xloc.line;
3027 }
3028 else
3029 {
3030 filename = NULL;
3031 linenum = 0;
3032 }
3033
3034 if (filename == NULL)
3035 return false;
3036
3037 if (force_source_line
3038 || filename != last_filename
3039 || last_linenum != linenum)
3040 {
3041 force_source_line = false;
3042 last_filename = filename;
3043 last_linenum = linenum;
3044 last_discriminator = discriminator;
3045 *is_stmt = true;
3046 high_block_linenum = MAX (last_linenum, high_block_linenum);
3047 high_function_linenum = MAX (last_linenum, high_function_linenum);
3048 return true;
3049 }
3050
3051 if (SUPPORTS_DISCRIMINATOR && last_discriminator != discriminator)
3052 {
3053 /* If the discriminator changed, but the line number did not,
3054 output the line table entry with is_stmt false so the
3055 debugger does not treat this as a breakpoint location. */
3056 last_discriminator = discriminator;
3057 *is_stmt = false;
3058 return true;
3059 }
3060
3061 return false;
3062 }
3063 \f
3064 /* For each operand in INSN, simplify (subreg (reg)) so that it refers
3065 directly to the desired hard register. */
3066
3067 void
3068 cleanup_subreg_operands (rtx insn)
3069 {
3070 int i;
3071 bool changed = false;
3072 extract_insn_cached (insn);
3073 for (i = 0; i < recog_data.n_operands; i++)
3074 {
3075 /* The following test cannot use recog_data.operand when testing
3076 for a SUBREG: the underlying object might have been changed
3077 already if we are inside a match_operator expression that
3078 matches the else clause. Instead we test the underlying
3079 expression directly. */
3080 if (GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
3081 {
3082 recog_data.operand[i] = alter_subreg (recog_data.operand_loc[i], true);
3083 changed = true;
3084 }
3085 else if (GET_CODE (recog_data.operand[i]) == PLUS
3086 || GET_CODE (recog_data.operand[i]) == MULT
3087 || MEM_P (recog_data.operand[i]))
3088 recog_data.operand[i] = walk_alter_subreg (recog_data.operand_loc[i], &changed);
3089 }
3090
3091 for (i = 0; i < recog_data.n_dups; i++)
3092 {
3093 if (GET_CODE (*recog_data.dup_loc[i]) == SUBREG)
3094 {
3095 *recog_data.dup_loc[i] = alter_subreg (recog_data.dup_loc[i], true);
3096 changed = true;
3097 }
3098 else if (GET_CODE (*recog_data.dup_loc[i]) == PLUS
3099 || GET_CODE (*recog_data.dup_loc[i]) == MULT
3100 || MEM_P (*recog_data.dup_loc[i]))
3101 *recog_data.dup_loc[i] = walk_alter_subreg (recog_data.dup_loc[i], &changed);
3102 }
3103 if (changed)
3104 df_insn_rescan (insn);
3105 }
3106
3107 /* If X is a SUBREG, try to replace it with a REG or a MEM, based on
3108 the thing it is a subreg of. Do it anyway if FINAL_P. */
3109
3110 rtx
3111 alter_subreg (rtx *xp, bool final_p)
3112 {
3113 rtx x = *xp;
3114 rtx y = SUBREG_REG (x);
3115
3116 /* simplify_subreg does not remove subreg from volatile references.
3117 We are required to. */
3118 if (MEM_P (y))
3119 {
3120 int offset = SUBREG_BYTE (x);
3121
3122 /* For paradoxical subregs on big-endian machines, SUBREG_BYTE
3123 contains 0 instead of the proper offset. See simplify_subreg. */
3124 if (offset == 0
3125 && GET_MODE_SIZE (GET_MODE (y)) < GET_MODE_SIZE (GET_MODE (x)))
3126 {
3127 int difference = GET_MODE_SIZE (GET_MODE (y))
3128 - GET_MODE_SIZE (GET_MODE (x));
3129 if (WORDS_BIG_ENDIAN)
3130 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
3131 if (BYTES_BIG_ENDIAN)
3132 offset += difference % UNITS_PER_WORD;
3133 }
3134
3135 if (final_p)
3136 *xp = adjust_address (y, GET_MODE (x), offset);
3137 else
3138 *xp = adjust_address_nv (y, GET_MODE (x), offset);
3139 }
3140 else
3141 {
3142 rtx new_rtx = simplify_subreg (GET_MODE (x), y, GET_MODE (y),
3143 SUBREG_BYTE (x));
3144
3145 if (new_rtx != 0)
3146 *xp = new_rtx;
3147 else if (final_p && REG_P (y))
3148 {
3149 /* Simplify_subreg can't handle some REG cases, but we have to. */
3150 unsigned int regno;
3151 HOST_WIDE_INT offset;
3152
3153 regno = subreg_regno (x);
3154 if (subreg_lowpart_p (x))
3155 offset = byte_lowpart_offset (GET_MODE (x), GET_MODE (y));
3156 else
3157 offset = SUBREG_BYTE (x);
3158 *xp = gen_rtx_REG_offset (y, GET_MODE (x), regno, offset);
3159 }
3160 }
3161
3162 return *xp;
3163 }
3164
3165 /* Do alter_subreg on all the SUBREGs contained in X. */
3166
3167 static rtx
3168 walk_alter_subreg (rtx *xp, bool *changed)
3169 {
3170 rtx x = *xp;
3171 switch (GET_CODE (x))
3172 {
3173 case PLUS:
3174 case MULT:
3175 case AND:
3176 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed);
3177 XEXP (x, 1) = walk_alter_subreg (&XEXP (x, 1), changed);
3178 break;
3179
3180 case MEM:
3181 case ZERO_EXTEND:
3182 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed);
3183 break;
3184
3185 case SUBREG:
3186 *changed = true;
3187 return alter_subreg (xp, true);
3188
3189 default:
3190 break;
3191 }
3192
3193 return *xp;
3194 }
3195 \f
3196 #ifdef HAVE_cc0
3197
3198 /* Given BODY, the body of a jump instruction, alter the jump condition
3199 as required by the bits that are set in cc_status.flags.
3200 Not all of the bits there can be handled at this level in all cases.
3201
3202 The value is normally 0.
3203 1 means that the condition has become always true.
3204 -1 means that the condition has become always false.
3205 2 means that COND has been altered. */
3206
3207 static int
3208 alter_cond (rtx cond)
3209 {
3210 int value = 0;
3211
3212 if (cc_status.flags & CC_REVERSED)
3213 {
3214 value = 2;
3215 PUT_CODE (cond, swap_condition (GET_CODE (cond)));
3216 }
3217
3218 if (cc_status.flags & CC_INVERTED)
3219 {
3220 value = 2;
3221 PUT_CODE (cond, reverse_condition (GET_CODE (cond)));
3222 }
3223
3224 if (cc_status.flags & CC_NOT_POSITIVE)
3225 switch (GET_CODE (cond))
3226 {
3227 case LE:
3228 case LEU:
3229 case GEU:
3230 /* Jump becomes unconditional. */
3231 return 1;
3232
3233 case GT:
3234 case GTU:
3235 case LTU:
3236 /* Jump becomes no-op. */
3237 return -1;
3238
3239 case GE:
3240 PUT_CODE (cond, EQ);
3241 value = 2;
3242 break;
3243
3244 case LT:
3245 PUT_CODE (cond, NE);
3246 value = 2;
3247 break;
3248
3249 default:
3250 break;
3251 }
3252
3253 if (cc_status.flags & CC_NOT_NEGATIVE)
3254 switch (GET_CODE (cond))
3255 {
3256 case GE:
3257 case GEU:
3258 /* Jump becomes unconditional. */
3259 return 1;
3260
3261 case LT:
3262 case LTU:
3263 /* Jump becomes no-op. */
3264 return -1;
3265
3266 case LE:
3267 case LEU:
3268 PUT_CODE (cond, EQ);
3269 value = 2;
3270 break;
3271
3272 case GT:
3273 case GTU:
3274 PUT_CODE (cond, NE);
3275 value = 2;
3276 break;
3277
3278 default:
3279 break;
3280 }
3281
3282 if (cc_status.flags & CC_NO_OVERFLOW)
3283 switch (GET_CODE (cond))
3284 {
3285 case GEU:
3286 /* Jump becomes unconditional. */
3287 return 1;
3288
3289 case LEU:
3290 PUT_CODE (cond, EQ);
3291 value = 2;
3292 break;
3293
3294 case GTU:
3295 PUT_CODE (cond, NE);
3296 value = 2;
3297 break;
3298
3299 case LTU:
3300 /* Jump becomes no-op. */
3301 return -1;
3302
3303 default:
3304 break;
3305 }
3306
3307 if (cc_status.flags & (CC_Z_IN_NOT_N | CC_Z_IN_N))
3308 switch (GET_CODE (cond))
3309 {
3310 default:
3311 gcc_unreachable ();
3312
3313 case NE:
3314 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? GE : LT);
3315 value = 2;
3316 break;
3317
3318 case EQ:
3319 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? LT : GE);
3320 value = 2;
3321 break;
3322 }
3323
3324 if (cc_status.flags & CC_NOT_SIGNED)
3325 /* The flags are valid if signed condition operators are converted
3326 to unsigned. */
3327 switch (GET_CODE (cond))
3328 {
3329 case LE:
3330 PUT_CODE (cond, LEU);
3331 value = 2;
3332 break;
3333
3334 case LT:
3335 PUT_CODE (cond, LTU);
3336 value = 2;
3337 break;
3338
3339 case GT:
3340 PUT_CODE (cond, GTU);
3341 value = 2;
3342 break;
3343
3344 case GE:
3345 PUT_CODE (cond, GEU);
3346 value = 2;
3347 break;
3348
3349 default:
3350 break;
3351 }
3352
3353 return value;
3354 }
3355 #endif
3356 \f
3357 /* Report inconsistency between the assembler template and the operands.
3358 In an `asm', it's the user's fault; otherwise, the compiler's fault. */
3359
3360 void
3361 output_operand_lossage (const char *cmsgid, ...)
3362 {
3363 char *fmt_string;
3364 char *new_message;
3365 const char *pfx_str;
3366 va_list ap;
3367
3368 va_start (ap, cmsgid);
3369
3370 pfx_str = this_is_asm_operands ? _("invalid 'asm': ") : "output_operand: ";
3371 asprintf (&fmt_string, "%s%s", pfx_str, _(cmsgid));
3372 vasprintf (&new_message, fmt_string, ap);
3373
3374 if (this_is_asm_operands)
3375 error_for_asm (this_is_asm_operands, "%s", new_message);
3376 else
3377 internal_error ("%s", new_message);
3378
3379 free (fmt_string);
3380 free (new_message);
3381 va_end (ap);
3382 }
3383 \f
3384 /* Output of assembler code from a template, and its subroutines. */
3385
3386 /* Annotate the assembly with a comment describing the pattern and
3387 alternative used. */
3388
3389 static void
3390 output_asm_name (void)
3391 {
3392 if (debug_insn)
3393 {
3394 int num = INSN_CODE (debug_insn);
3395 fprintf (asm_out_file, "\t%s %d\t%s",
3396 ASM_COMMENT_START, INSN_UID (debug_insn),
3397 insn_data[num].name);
3398 if (insn_data[num].n_alternatives > 1)
3399 fprintf (asm_out_file, "/%d", which_alternative + 1);
3400
3401 if (HAVE_ATTR_length)
3402 fprintf (asm_out_file, "\t[length = %d]",
3403 get_attr_length (debug_insn));
3404
3405 /* Clear this so only the first assembler insn
3406 of any rtl insn will get the special comment for -dp. */
3407 debug_insn = 0;
3408 }
3409 }
3410
3411 /* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it
3412 or its address, return that expr . Set *PADDRESSP to 1 if the expr
3413 corresponds to the address of the object and 0 if to the object. */
3414
3415 static tree
3416 get_mem_expr_from_op (rtx op, int *paddressp)
3417 {
3418 tree expr;
3419 int inner_addressp;
3420
3421 *paddressp = 0;
3422
3423 if (REG_P (op))
3424 return REG_EXPR (op);
3425 else if (!MEM_P (op))
3426 return 0;
3427
3428 if (MEM_EXPR (op) != 0)
3429 return MEM_EXPR (op);
3430
3431 /* Otherwise we have an address, so indicate it and look at the address. */
3432 *paddressp = 1;
3433 op = XEXP (op, 0);
3434
3435 /* First check if we have a decl for the address, then look at the right side
3436 if it is a PLUS. Otherwise, strip off arithmetic and keep looking.
3437 But don't allow the address to itself be indirect. */
3438 if ((expr = get_mem_expr_from_op (op, &inner_addressp)) && ! inner_addressp)
3439 return expr;
3440 else if (GET_CODE (op) == PLUS
3441 && (expr = get_mem_expr_from_op (XEXP (op, 1), &inner_addressp)))
3442 return expr;
3443
3444 while (UNARY_P (op)
3445 || GET_RTX_CLASS (GET_CODE (op)) == RTX_BIN_ARITH)
3446 op = XEXP (op, 0);
3447
3448 expr = get_mem_expr_from_op (op, &inner_addressp);
3449 return inner_addressp ? 0 : expr;
3450 }
3451
3452 /* Output operand names for assembler instructions. OPERANDS is the
3453 operand vector, OPORDER is the order to write the operands, and NOPS
3454 is the number of operands to write. */
3455
3456 static void
3457 output_asm_operand_names (rtx *operands, int *oporder, int nops)
3458 {
3459 int wrote = 0;
3460 int i;
3461
3462 for (i = 0; i < nops; i++)
3463 {
3464 int addressp;
3465 rtx op = operands[oporder[i]];
3466 tree expr = get_mem_expr_from_op (op, &addressp);
3467
3468 fprintf (asm_out_file, "%c%s",
3469 wrote ? ',' : '\t', wrote ? "" : ASM_COMMENT_START);
3470 wrote = 1;
3471 if (expr)
3472 {
3473 fprintf (asm_out_file, "%s",
3474 addressp ? "*" : "");
3475 print_mem_expr (asm_out_file, expr);
3476 wrote = 1;
3477 }
3478 else if (REG_P (op) && ORIGINAL_REGNO (op)
3479 && ORIGINAL_REGNO (op) != REGNO (op))
3480 fprintf (asm_out_file, " tmp%i", ORIGINAL_REGNO (op));
3481 }
3482 }
3483
3484 #ifdef ASSEMBLER_DIALECT
3485 /* Helper function to parse assembler dialects in the asm string.
3486 This is called from output_asm_insn and asm_fprintf. */
3487 static const char *
3488 do_assembler_dialects (const char *p, int *dialect)
3489 {
3490 char c = *(p - 1);
3491
3492 switch (c)
3493 {
3494 case '{':
3495 {
3496 int i;
3497
3498 if (*dialect)
3499 output_operand_lossage ("nested assembly dialect alternatives");
3500 else
3501 *dialect = 1;
3502
3503 /* If we want the first dialect, do nothing. Otherwise, skip
3504 DIALECT_NUMBER of strings ending with '|'. */
3505 for (i = 0; i < dialect_number; i++)
3506 {
3507 while (*p && *p != '}')
3508 {
3509 if (*p == '|')
3510 {
3511 p++;
3512 break;
3513 }
3514
3515 /* Skip over any character after a percent sign. */
3516 if (*p == '%')
3517 p++;
3518 if (*p)
3519 p++;
3520 }
3521
3522 if (*p == '}')
3523 break;
3524 }
3525
3526 if (*p == '\0')
3527 output_operand_lossage ("unterminated assembly dialect alternative");
3528 }
3529 break;
3530
3531 case '|':
3532 if (*dialect)
3533 {
3534 /* Skip to close brace. */
3535 do
3536 {
3537 if (*p == '\0')
3538 {
3539 output_operand_lossage ("unterminated assembly dialect alternative");
3540 break;
3541 }
3542
3543 /* Skip over any character after a percent sign. */
3544 if (*p == '%' && p[1])
3545 {
3546 p += 2;
3547 continue;
3548 }
3549
3550 if (*p++ == '}')
3551 break;
3552 }
3553 while (1);
3554
3555 *dialect = 0;
3556 }
3557 else
3558 putc (c, asm_out_file);
3559 break;
3560
3561 case '}':
3562 if (! *dialect)
3563 putc (c, asm_out_file);
3564 *dialect = 0;
3565 break;
3566 default:
3567 gcc_unreachable ();
3568 }
3569
3570 return p;
3571 }
3572 #endif
3573
3574 /* Output text from TEMPLATE to the assembler output file,
3575 obeying %-directions to substitute operands taken from
3576 the vector OPERANDS.
3577
3578 %N (for N a digit) means print operand N in usual manner.
3579 %lN means require operand N to be a CODE_LABEL or LABEL_REF
3580 and print the label name with no punctuation.
3581 %cN means require operand N to be a constant
3582 and print the constant expression with no punctuation.
3583 %aN means expect operand N to be a memory address
3584 (not a memory reference!) and print a reference
3585 to that address.
3586 %nN means expect operand N to be a constant
3587 and print a constant expression for minus the value
3588 of the operand, with no other punctuation. */
3589
3590 void
3591 output_asm_insn (const char *templ, rtx *operands)
3592 {
3593 const char *p;
3594 int c;
3595 #ifdef ASSEMBLER_DIALECT
3596 int dialect = 0;
3597 #endif
3598 int oporder[MAX_RECOG_OPERANDS];
3599 char opoutput[MAX_RECOG_OPERANDS];
3600 int ops = 0;
3601
3602 /* An insn may return a null string template
3603 in a case where no assembler code is needed. */
3604 if (*templ == 0)
3605 return;
3606
3607 memset (opoutput, 0, sizeof opoutput);
3608 p = templ;
3609 putc ('\t', asm_out_file);
3610
3611 #ifdef ASM_OUTPUT_OPCODE
3612 ASM_OUTPUT_OPCODE (asm_out_file, p);
3613 #endif
3614
3615 while ((c = *p++))
3616 switch (c)
3617 {
3618 case '\n':
3619 if (flag_verbose_asm)
3620 output_asm_operand_names (operands, oporder, ops);
3621 if (flag_print_asm_name)
3622 output_asm_name ();
3623
3624 ops = 0;
3625 memset (opoutput, 0, sizeof opoutput);
3626
3627 putc (c, asm_out_file);
3628 #ifdef ASM_OUTPUT_OPCODE
3629 while ((c = *p) == '\t')
3630 {
3631 putc (c, asm_out_file);
3632 p++;
3633 }
3634 ASM_OUTPUT_OPCODE (asm_out_file, p);
3635 #endif
3636 break;
3637
3638 #ifdef ASSEMBLER_DIALECT
3639 case '{':
3640 case '}':
3641 case '|':
3642 p = do_assembler_dialects (p, &dialect);
3643 break;
3644 #endif
3645
3646 case '%':
3647 /* %% outputs a single %. %{, %} and %| print {, } and | respectively
3648 if ASSEMBLER_DIALECT defined and these characters have a special
3649 meaning as dialect delimiters.*/
3650 if (*p == '%'
3651 #ifdef ASSEMBLER_DIALECT
3652 || *p == '{' || *p == '}' || *p == '|'
3653 #endif
3654 )
3655 {
3656 putc (*p, asm_out_file);
3657 p++;
3658 }
3659 /* %= outputs a number which is unique to each insn in the entire
3660 compilation. This is useful for making local labels that are
3661 referred to more than once in a given insn. */
3662 else if (*p == '=')
3663 {
3664 p++;
3665 fprintf (asm_out_file, "%d", insn_counter);
3666 }
3667 /* % followed by a letter and some digits
3668 outputs an operand in a special way depending on the letter.
3669 Letters `acln' are implemented directly.
3670 Other letters are passed to `output_operand' so that
3671 the TARGET_PRINT_OPERAND hook can define them. */
3672 else if (ISALPHA (*p))
3673 {
3674 int letter = *p++;
3675 unsigned long opnum;
3676 char *endptr;
3677
3678 opnum = strtoul (p, &endptr, 10);
3679
3680 if (endptr == p)
3681 output_operand_lossage ("operand number missing "
3682 "after %%-letter");
3683 else if (this_is_asm_operands && opnum >= insn_noperands)
3684 output_operand_lossage ("operand number out of range");
3685 else if (letter == 'l')
3686 output_asm_label (operands[opnum]);
3687 else if (letter == 'a')
3688 output_address (operands[opnum]);
3689 else if (letter == 'c')
3690 {
3691 if (CONSTANT_ADDRESS_P (operands[opnum]))
3692 output_addr_const (asm_out_file, operands[opnum]);
3693 else
3694 output_operand (operands[opnum], 'c');
3695 }
3696 else if (letter == 'n')
3697 {
3698 if (CONST_INT_P (operands[opnum]))
3699 fprintf (asm_out_file, HOST_WIDE_INT_PRINT_DEC,
3700 - INTVAL (operands[opnum]));
3701 else
3702 {
3703 putc ('-', asm_out_file);
3704 output_addr_const (asm_out_file, operands[opnum]);
3705 }
3706 }
3707 else
3708 output_operand (operands[opnum], letter);
3709
3710 if (!opoutput[opnum])
3711 oporder[ops++] = opnum;
3712 opoutput[opnum] = 1;
3713
3714 p = endptr;
3715 c = *p;
3716 }
3717 /* % followed by a digit outputs an operand the default way. */
3718 else if (ISDIGIT (*p))
3719 {
3720 unsigned long opnum;
3721 char *endptr;
3722
3723 opnum = strtoul (p, &endptr, 10);
3724 if (this_is_asm_operands && opnum >= insn_noperands)
3725 output_operand_lossage ("operand number out of range");
3726 else
3727 output_operand (operands[opnum], 0);
3728
3729 if (!opoutput[opnum])
3730 oporder[ops++] = opnum;
3731 opoutput[opnum] = 1;
3732
3733 p = endptr;
3734 c = *p;
3735 }
3736 /* % followed by punctuation: output something for that
3737 punctuation character alone, with no operand. The
3738 TARGET_PRINT_OPERAND hook decides what is actually done. */
3739 else if (targetm.asm_out.print_operand_punct_valid_p ((unsigned char) *p))
3740 output_operand (NULL_RTX, *p++);
3741 else
3742 output_operand_lossage ("invalid %%-code");
3743 break;
3744
3745 default:
3746 putc (c, asm_out_file);
3747 }
3748
3749 /* Write out the variable names for operands, if we know them. */
3750 if (flag_verbose_asm)
3751 output_asm_operand_names (operands, oporder, ops);
3752 if (flag_print_asm_name)
3753 output_asm_name ();
3754
3755 putc ('\n', asm_out_file);
3756 }
3757 \f
3758 /* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */
3759
3760 void
3761 output_asm_label (rtx x)
3762 {
3763 char buf[256];
3764
3765 if (GET_CODE (x) == LABEL_REF)
3766 x = XEXP (x, 0);
3767 if (LABEL_P (x)
3768 || (NOTE_P (x)
3769 && NOTE_KIND (x) == NOTE_INSN_DELETED_LABEL))
3770 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3771 else
3772 output_operand_lossage ("'%%l' operand isn't a label");
3773
3774 assemble_name (asm_out_file, buf);
3775 }
3776
3777 /* Helper rtx-iteration-function for mark_symbol_refs_as_used and
3778 output_operand. Marks SYMBOL_REFs as referenced through use of
3779 assemble_external. */
3780
3781 static int
3782 mark_symbol_ref_as_used (rtx *xp, void *dummy ATTRIBUTE_UNUSED)
3783 {
3784 rtx x = *xp;
3785
3786 /* If we have a used symbol, we may have to emit assembly
3787 annotations corresponding to whether the symbol is external, weak
3788 or has non-default visibility. */
3789 if (GET_CODE (x) == SYMBOL_REF)
3790 {
3791 tree t;
3792
3793 t = SYMBOL_REF_DECL (x);
3794 if (t)
3795 assemble_external (t);
3796
3797 return -1;
3798 }
3799
3800 return 0;
3801 }
3802
3803 /* Marks SYMBOL_REFs in x as referenced through use of assemble_external. */
3804
3805 void
3806 mark_symbol_refs_as_used (rtx x)
3807 {
3808 for_each_rtx (&x, mark_symbol_ref_as_used, NULL);
3809 }
3810
3811 /* Print operand X using machine-dependent assembler syntax.
3812 CODE is a non-digit that preceded the operand-number in the % spec,
3813 such as 'z' if the spec was `%z3'. CODE is 0 if there was no char
3814 between the % and the digits.
3815 When CODE is a non-letter, X is 0.
3816
3817 The meanings of the letters are machine-dependent and controlled
3818 by TARGET_PRINT_OPERAND. */
3819
3820 void
3821 output_operand (rtx x, int code ATTRIBUTE_UNUSED)
3822 {
3823 if (x && GET_CODE (x) == SUBREG)
3824 x = alter_subreg (&x, true);
3825
3826 /* X must not be a pseudo reg. */
3827 gcc_assert (!x || !REG_P (x) || REGNO (x) < FIRST_PSEUDO_REGISTER);
3828
3829 targetm.asm_out.print_operand (asm_out_file, x, code);
3830
3831 if (x == NULL_RTX)
3832 return;
3833
3834 for_each_rtx (&x, mark_symbol_ref_as_used, NULL);
3835 }
3836
3837 /* Print a memory reference operand for address X using
3838 machine-dependent assembler syntax. */
3839
3840 void
3841 output_address (rtx x)
3842 {
3843 bool changed = false;
3844 walk_alter_subreg (&x, &changed);
3845 targetm.asm_out.print_operand_address (asm_out_file, x);
3846 }
3847 \f
3848 /* Print an integer constant expression in assembler syntax.
3849 Addition and subtraction are the only arithmetic
3850 that may appear in these expressions. */
3851
3852 void
3853 output_addr_const (FILE *file, rtx x)
3854 {
3855 char buf[256];
3856
3857 restart:
3858 switch (GET_CODE (x))
3859 {
3860 case PC:
3861 putc ('.', file);
3862 break;
3863
3864 case SYMBOL_REF:
3865 if (SYMBOL_REF_DECL (x))
3866 assemble_external (SYMBOL_REF_DECL (x));
3867 #ifdef ASM_OUTPUT_SYMBOL_REF
3868 ASM_OUTPUT_SYMBOL_REF (file, x);
3869 #else
3870 assemble_name (file, XSTR (x, 0));
3871 #endif
3872 break;
3873
3874 case LABEL_REF:
3875 x = XEXP (x, 0);
3876 /* Fall through. */
3877 case CODE_LABEL:
3878 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3879 #ifdef ASM_OUTPUT_LABEL_REF
3880 ASM_OUTPUT_LABEL_REF (file, buf);
3881 #else
3882 assemble_name (file, buf);
3883 #endif
3884 break;
3885
3886 case CONST_INT:
3887 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x));
3888 break;
3889
3890 case CONST:
3891 /* This used to output parentheses around the expression,
3892 but that does not work on the 386 (either ATT or BSD assembler). */
3893 output_addr_const (file, XEXP (x, 0));
3894 break;
3895
3896 case CONST_WIDE_INT:
3897 /* We do not know the mode here so we have to use a round about
3898 way to build a wide-int to get it printed properly. */
3899 {
3900 wide_int w = wide_int::from_array (&CONST_WIDE_INT_ELT (x, 0),
3901 CONST_WIDE_INT_NUNITS (x),
3902 CONST_WIDE_INT_NUNITS (x)
3903 * HOST_BITS_PER_WIDE_INT,
3904 false);
3905 print_decs (w, file);
3906 }
3907 break;
3908
3909 case CONST_DOUBLE:
3910 if (CONST_DOUBLE_AS_INT_P (x))
3911 {
3912 /* We can use %d if the number is one word and positive. */
3913 if (CONST_DOUBLE_HIGH (x))
3914 fprintf (file, HOST_WIDE_INT_PRINT_DOUBLE_HEX,
3915 (unsigned HOST_WIDE_INT) CONST_DOUBLE_HIGH (x),
3916 (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (x));
3917 else if (CONST_DOUBLE_LOW (x) < 0)
3918 fprintf (file, HOST_WIDE_INT_PRINT_HEX,
3919 (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (x));
3920 else
3921 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x));
3922 }
3923 else
3924 /* We can't handle floating point constants;
3925 PRINT_OPERAND must handle them. */
3926 output_operand_lossage ("floating constant misused");
3927 break;
3928
3929 case CONST_FIXED:
3930 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_FIXED_VALUE_LOW (x));
3931 break;
3932
3933 case PLUS:
3934 /* Some assemblers need integer constants to appear last (eg masm). */
3935 if (CONST_INT_P (XEXP (x, 0)))
3936 {
3937 output_addr_const (file, XEXP (x, 1));
3938 if (INTVAL (XEXP (x, 0)) >= 0)
3939 fprintf (file, "+");
3940 output_addr_const (file, XEXP (x, 0));
3941 }
3942 else
3943 {
3944 output_addr_const (file, XEXP (x, 0));
3945 if (!CONST_INT_P (XEXP (x, 1))
3946 || INTVAL (XEXP (x, 1)) >= 0)
3947 fprintf (file, "+");
3948 output_addr_const (file, XEXP (x, 1));
3949 }
3950 break;
3951
3952 case MINUS:
3953 /* Avoid outputting things like x-x or x+5-x,
3954 since some assemblers can't handle that. */
3955 x = simplify_subtraction (x);
3956 if (GET_CODE (x) != MINUS)
3957 goto restart;
3958
3959 output_addr_const (file, XEXP (x, 0));
3960 fprintf (file, "-");
3961 if ((CONST_INT_P (XEXP (x, 1)) && INTVAL (XEXP (x, 1)) >= 0)
3962 || GET_CODE (XEXP (x, 1)) == PC
3963 || GET_CODE (XEXP (x, 1)) == SYMBOL_REF)
3964 output_addr_const (file, XEXP (x, 1));
3965 else
3966 {
3967 fputs (targetm.asm_out.open_paren, file);
3968 output_addr_const (file, XEXP (x, 1));
3969 fputs (targetm.asm_out.close_paren, file);
3970 }
3971 break;
3972
3973 case ZERO_EXTEND:
3974 case SIGN_EXTEND:
3975 case SUBREG:
3976 case TRUNCATE:
3977 output_addr_const (file, XEXP (x, 0));
3978 break;
3979
3980 default:
3981 if (targetm.asm_out.output_addr_const_extra (file, x))
3982 break;
3983
3984 output_operand_lossage ("invalid expression as operand");
3985 }
3986 }
3987 \f
3988 /* Output a quoted string. */
3989
3990 void
3991 output_quoted_string (FILE *asm_file, const char *string)
3992 {
3993 #ifdef OUTPUT_QUOTED_STRING
3994 OUTPUT_QUOTED_STRING (asm_file, string);
3995 #else
3996 char c;
3997
3998 putc ('\"', asm_file);
3999 while ((c = *string++) != 0)
4000 {
4001 if (ISPRINT (c))
4002 {
4003 if (c == '\"' || c == '\\')
4004 putc ('\\', asm_file);
4005 putc (c, asm_file);
4006 }
4007 else
4008 fprintf (asm_file, "\\%03o", (unsigned char) c);
4009 }
4010 putc ('\"', asm_file);
4011 #endif
4012 }
4013 \f
4014 /* Write a HOST_WIDE_INT number in hex form 0x1234, fast. */
4015
4016 void
4017 fprint_whex (FILE *f, unsigned HOST_WIDE_INT value)
4018 {
4019 char buf[2 + CHAR_BIT * sizeof (value) / 4];
4020 if (value == 0)
4021 putc ('0', f);
4022 else
4023 {
4024 char *p = buf + sizeof (buf);
4025 do
4026 *--p = "0123456789abcdef"[value % 16];
4027 while ((value /= 16) != 0);
4028 *--p = 'x';
4029 *--p = '0';
4030 fwrite (p, 1, buf + sizeof (buf) - p, f);
4031 }
4032 }
4033
4034 /* Internal function that prints an unsigned long in decimal in reverse.
4035 The output string IS NOT null-terminated. */
4036
4037 static int
4038 sprint_ul_rev (char *s, unsigned long value)
4039 {
4040 int i = 0;
4041 do
4042 {
4043 s[i] = "0123456789"[value % 10];
4044 value /= 10;
4045 i++;
4046 /* alternate version, without modulo */
4047 /* oldval = value; */
4048 /* value /= 10; */
4049 /* s[i] = "0123456789" [oldval - 10*value]; */
4050 /* i++ */
4051 }
4052 while (value != 0);
4053 return i;
4054 }
4055
4056 /* Write an unsigned long as decimal to a file, fast. */
4057
4058 void
4059 fprint_ul (FILE *f, unsigned long value)
4060 {
4061 /* python says: len(str(2**64)) == 20 */
4062 char s[20];
4063 int i;
4064
4065 i = sprint_ul_rev (s, value);
4066
4067 /* It's probably too small to bother with string reversal and fputs. */
4068 do
4069 {
4070 i--;
4071 putc (s[i], f);
4072 }
4073 while (i != 0);
4074 }
4075
4076 /* Write an unsigned long as decimal to a string, fast.
4077 s must be wide enough to not overflow, at least 21 chars.
4078 Returns the length of the string (without terminating '\0'). */
4079
4080 int
4081 sprint_ul (char *s, unsigned long value)
4082 {
4083 int len;
4084 char tmp_c;
4085 int i;
4086 int j;
4087
4088 len = sprint_ul_rev (s, value);
4089 s[len] = '\0';
4090
4091 /* Reverse the string. */
4092 i = 0;
4093 j = len - 1;
4094 while (i < j)
4095 {
4096 tmp_c = s[i];
4097 s[i] = s[j];
4098 s[j] = tmp_c;
4099 i++; j--;
4100 }
4101
4102 return len;
4103 }
4104
4105 /* A poor man's fprintf, with the added features of %I, %R, %L, and %U.
4106 %R prints the value of REGISTER_PREFIX.
4107 %L prints the value of LOCAL_LABEL_PREFIX.
4108 %U prints the value of USER_LABEL_PREFIX.
4109 %I prints the value of IMMEDIATE_PREFIX.
4110 %O runs ASM_OUTPUT_OPCODE to transform what follows in the string.
4111 Also supported are %d, %i, %u, %x, %X, %o, %c, %s and %%.
4112
4113 We handle alternate assembler dialects here, just like output_asm_insn. */
4114
4115 void
4116 asm_fprintf (FILE *file, const char *p, ...)
4117 {
4118 char buf[10];
4119 char *q, c;
4120 #ifdef ASSEMBLER_DIALECT
4121 int dialect = 0;
4122 #endif
4123 va_list argptr;
4124
4125 va_start (argptr, p);
4126
4127 buf[0] = '%';
4128
4129 while ((c = *p++))
4130 switch (c)
4131 {
4132 #ifdef ASSEMBLER_DIALECT
4133 case '{':
4134 case '}':
4135 case '|':
4136 p = do_assembler_dialects (p, &dialect);
4137 break;
4138 #endif
4139
4140 case '%':
4141 c = *p++;
4142 q = &buf[1];
4143 while (strchr ("-+ #0", c))
4144 {
4145 *q++ = c;
4146 c = *p++;
4147 }
4148 while (ISDIGIT (c) || c == '.')
4149 {
4150 *q++ = c;
4151 c = *p++;
4152 }
4153 switch (c)
4154 {
4155 case '%':
4156 putc ('%', file);
4157 break;
4158
4159 case 'd': case 'i': case 'u':
4160 case 'x': case 'X': case 'o':
4161 case 'c':
4162 *q++ = c;
4163 *q = 0;
4164 fprintf (file, buf, va_arg (argptr, int));
4165 break;
4166
4167 case 'w':
4168 /* This is a prefix to the 'd', 'i', 'u', 'x', 'X', and
4169 'o' cases, but we do not check for those cases. It
4170 means that the value is a HOST_WIDE_INT, which may be
4171 either `long' or `long long'. */
4172 memcpy (q, HOST_WIDE_INT_PRINT, strlen (HOST_WIDE_INT_PRINT));
4173 q += strlen (HOST_WIDE_INT_PRINT);
4174 *q++ = *p++;
4175 *q = 0;
4176 fprintf (file, buf, va_arg (argptr, HOST_WIDE_INT));
4177 break;
4178
4179 case 'l':
4180 *q++ = c;
4181 #ifdef HAVE_LONG_LONG
4182 if (*p == 'l')
4183 {
4184 *q++ = *p++;
4185 *q++ = *p++;
4186 *q = 0;
4187 fprintf (file, buf, va_arg (argptr, long long));
4188 }
4189 else
4190 #endif
4191 {
4192 *q++ = *p++;
4193 *q = 0;
4194 fprintf (file, buf, va_arg (argptr, long));
4195 }
4196
4197 break;
4198
4199 case 's':
4200 *q++ = c;
4201 *q = 0;
4202 fprintf (file, buf, va_arg (argptr, char *));
4203 break;
4204
4205 case 'O':
4206 #ifdef ASM_OUTPUT_OPCODE
4207 ASM_OUTPUT_OPCODE (asm_out_file, p);
4208 #endif
4209 break;
4210
4211 case 'R':
4212 #ifdef REGISTER_PREFIX
4213 fprintf (file, "%s", REGISTER_PREFIX);
4214 #endif
4215 break;
4216
4217 case 'I':
4218 #ifdef IMMEDIATE_PREFIX
4219 fprintf (file, "%s", IMMEDIATE_PREFIX);
4220 #endif
4221 break;
4222
4223 case 'L':
4224 #ifdef LOCAL_LABEL_PREFIX
4225 fprintf (file, "%s", LOCAL_LABEL_PREFIX);
4226 #endif
4227 break;
4228
4229 case 'U':
4230 fputs (user_label_prefix, file);
4231 break;
4232
4233 #ifdef ASM_FPRINTF_EXTENSIONS
4234 /* Uppercase letters are reserved for general use by asm_fprintf
4235 and so are not available to target specific code. In order to
4236 prevent the ASM_FPRINTF_EXTENSIONS macro from using them then,
4237 they are defined here. As they get turned into real extensions
4238 to asm_fprintf they should be removed from this list. */
4239 case 'A': case 'B': case 'C': case 'D': case 'E':
4240 case 'F': case 'G': case 'H': case 'J': case 'K':
4241 case 'M': case 'N': case 'P': case 'Q': case 'S':
4242 case 'T': case 'V': case 'W': case 'Y': case 'Z':
4243 break;
4244
4245 ASM_FPRINTF_EXTENSIONS (file, argptr, p)
4246 #endif
4247 default:
4248 gcc_unreachable ();
4249 }
4250 break;
4251
4252 default:
4253 putc (c, file);
4254 }
4255 va_end (argptr);
4256 }
4257 \f
4258 /* Return nonzero if this function has no function calls. */
4259
4260 int
4261 leaf_function_p (void)
4262 {
4263 rtx insn;
4264
4265 /* Some back-ends (e.g. s390) want leaf functions to stay leaf
4266 functions even if they call mcount. */
4267 if (crtl->profile && !targetm.keep_leaf_when_profiled ())
4268 return 0;
4269
4270 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4271 {
4272 if (CALL_P (insn)
4273 && ! SIBLING_CALL_P (insn))
4274 return 0;
4275 if (NONJUMP_INSN_P (insn)
4276 && GET_CODE (PATTERN (insn)) == SEQUENCE
4277 && CALL_P (XVECEXP (PATTERN (insn), 0, 0))
4278 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0)))
4279 return 0;
4280 }
4281
4282 return 1;
4283 }
4284
4285 /* Return 1 if branch is a forward branch.
4286 Uses insn_shuid array, so it works only in the final pass. May be used by
4287 output templates to customary add branch prediction hints.
4288 */
4289 int
4290 final_forward_branch_p (rtx insn)
4291 {
4292 int insn_id, label_id;
4293
4294 gcc_assert (uid_shuid);
4295 insn_id = INSN_SHUID (insn);
4296 label_id = INSN_SHUID (JUMP_LABEL (insn));
4297 /* We've hit some insns that does not have id information available. */
4298 gcc_assert (insn_id && label_id);
4299 return insn_id < label_id;
4300 }
4301
4302 /* On some machines, a function with no call insns
4303 can run faster if it doesn't create its own register window.
4304 When output, the leaf function should use only the "output"
4305 registers. Ordinarily, the function would be compiled to use
4306 the "input" registers to find its arguments; it is a candidate
4307 for leaf treatment if it uses only the "input" registers.
4308 Leaf function treatment means renumbering so the function
4309 uses the "output" registers instead. */
4310
4311 #ifdef LEAF_REGISTERS
4312
4313 /* Return 1 if this function uses only the registers that can be
4314 safely renumbered. */
4315
4316 int
4317 only_leaf_regs_used (void)
4318 {
4319 int i;
4320 const char *const permitted_reg_in_leaf_functions = LEAF_REGISTERS;
4321
4322 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
4323 if ((df_regs_ever_live_p (i) || global_regs[i])
4324 && ! permitted_reg_in_leaf_functions[i])
4325 return 0;
4326
4327 if (crtl->uses_pic_offset_table
4328 && pic_offset_table_rtx != 0
4329 && REG_P (pic_offset_table_rtx)
4330 && ! permitted_reg_in_leaf_functions[REGNO (pic_offset_table_rtx)])
4331 return 0;
4332
4333 return 1;
4334 }
4335
4336 /* Scan all instructions and renumber all registers into those
4337 available in leaf functions. */
4338
4339 static void
4340 leaf_renumber_regs (rtx first)
4341 {
4342 rtx insn;
4343
4344 /* Renumber only the actual patterns.
4345 The reg-notes can contain frame pointer refs,
4346 and renumbering them could crash, and should not be needed. */
4347 for (insn = first; insn; insn = NEXT_INSN (insn))
4348 if (INSN_P (insn))
4349 leaf_renumber_regs_insn (PATTERN (insn));
4350 }
4351
4352 /* Scan IN_RTX and its subexpressions, and renumber all regs into those
4353 available in leaf functions. */
4354
4355 void
4356 leaf_renumber_regs_insn (rtx in_rtx)
4357 {
4358 int i, j;
4359 const char *format_ptr;
4360
4361 if (in_rtx == 0)
4362 return;
4363
4364 /* Renumber all input-registers into output-registers.
4365 renumbered_regs would be 1 for an output-register;
4366 they */
4367
4368 if (REG_P (in_rtx))
4369 {
4370 int newreg;
4371
4372 /* Don't renumber the same reg twice. */
4373 if (in_rtx->used)
4374 return;
4375
4376 newreg = REGNO (in_rtx);
4377 /* Don't try to renumber pseudo regs. It is possible for a pseudo reg
4378 to reach here as part of a REG_NOTE. */
4379 if (newreg >= FIRST_PSEUDO_REGISTER)
4380 {
4381 in_rtx->used = 1;
4382 return;
4383 }
4384 newreg = LEAF_REG_REMAP (newreg);
4385 gcc_assert (newreg >= 0);
4386 df_set_regs_ever_live (REGNO (in_rtx), false);
4387 df_set_regs_ever_live (newreg, true);
4388 SET_REGNO (in_rtx, newreg);
4389 in_rtx->used = 1;
4390 }
4391
4392 if (INSN_P (in_rtx))
4393 {
4394 /* Inside a SEQUENCE, we find insns.
4395 Renumber just the patterns of these insns,
4396 just as we do for the top-level insns. */
4397 leaf_renumber_regs_insn (PATTERN (in_rtx));
4398 return;
4399 }
4400
4401 format_ptr = GET_RTX_FORMAT (GET_CODE (in_rtx));
4402
4403 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (in_rtx)); i++)
4404 switch (*format_ptr++)
4405 {
4406 case 'e':
4407 leaf_renumber_regs_insn (XEXP (in_rtx, i));
4408 break;
4409
4410 case 'E':
4411 if (NULL != XVEC (in_rtx, i))
4412 {
4413 for (j = 0; j < XVECLEN (in_rtx, i); j++)
4414 leaf_renumber_regs_insn (XVECEXP (in_rtx, i, j));
4415 }
4416 break;
4417
4418 case 'S':
4419 case 's':
4420 case '0':
4421 case 'i':
4422 case 'w':
4423 case 'n':
4424 case 'u':
4425 break;
4426
4427 default:
4428 gcc_unreachable ();
4429 }
4430 }
4431 #endif
4432 \f
4433 /* Turn the RTL into assembly. */
4434 static unsigned int
4435 rest_of_handle_final (void)
4436 {
4437 rtx x;
4438 const char *fnname;
4439
4440 /* Get the function's name, as described by its RTL. This may be
4441 different from the DECL_NAME name used in the source file. */
4442
4443 x = DECL_RTL (current_function_decl);
4444 gcc_assert (MEM_P (x));
4445 x = XEXP (x, 0);
4446 gcc_assert (GET_CODE (x) == SYMBOL_REF);
4447 fnname = XSTR (x, 0);
4448
4449 assemble_start_function (current_function_decl, fnname);
4450 final_start_function (get_insns (), asm_out_file, optimize);
4451 final (get_insns (), asm_out_file, optimize);
4452 if (flag_use_caller_save)
4453 collect_fn_hard_reg_usage ();
4454 final_end_function ();
4455
4456 /* The IA-64 ".handlerdata" directive must be issued before the ".endp"
4457 directive that closes the procedure descriptor. Similarly, for x64 SEH.
4458 Otherwise it's not strictly necessary, but it doesn't hurt either. */
4459 output_function_exception_table (fnname);
4460
4461 assemble_end_function (current_function_decl, fnname);
4462
4463 user_defined_section_attribute = false;
4464
4465 /* Free up reg info memory. */
4466 free_reg_info ();
4467
4468 if (! quiet_flag)
4469 fflush (asm_out_file);
4470
4471 /* Write DBX symbols if requested. */
4472
4473 /* Note that for those inline functions where we don't initially
4474 know for certain that we will be generating an out-of-line copy,
4475 the first invocation of this routine (rest_of_compilation) will
4476 skip over this code by doing a `goto exit_rest_of_compilation;'.
4477 Later on, wrapup_global_declarations will (indirectly) call
4478 rest_of_compilation again for those inline functions that need
4479 to have out-of-line copies generated. During that call, we
4480 *will* be routed past here. */
4481
4482 timevar_push (TV_SYMOUT);
4483 if (!DECL_IGNORED_P (current_function_decl))
4484 debug_hooks->function_decl (current_function_decl);
4485 timevar_pop (TV_SYMOUT);
4486
4487 /* Release the blocks that are linked to DECL_INITIAL() to free the memory. */
4488 DECL_INITIAL (current_function_decl) = error_mark_node;
4489
4490 if (DECL_STATIC_CONSTRUCTOR (current_function_decl)
4491 && targetm.have_ctors_dtors)
4492 targetm.asm_out.constructor (XEXP (DECL_RTL (current_function_decl), 0),
4493 decl_init_priority_lookup
4494 (current_function_decl));
4495 if (DECL_STATIC_DESTRUCTOR (current_function_decl)
4496 && targetm.have_ctors_dtors)
4497 targetm.asm_out.destructor (XEXP (DECL_RTL (current_function_decl), 0),
4498 decl_fini_priority_lookup
4499 (current_function_decl));
4500 return 0;
4501 }
4502
4503 namespace {
4504
4505 const pass_data pass_data_final =
4506 {
4507 RTL_PASS, /* type */
4508 "final", /* name */
4509 OPTGROUP_NONE, /* optinfo_flags */
4510 true, /* has_execute */
4511 TV_FINAL, /* tv_id */
4512 0, /* properties_required */
4513 0, /* properties_provided */
4514 0, /* properties_destroyed */
4515 0, /* todo_flags_start */
4516 0, /* todo_flags_finish */
4517 };
4518
4519 class pass_final : public rtl_opt_pass
4520 {
4521 public:
4522 pass_final (gcc::context *ctxt)
4523 : rtl_opt_pass (pass_data_final, ctxt)
4524 {}
4525
4526 /* opt_pass methods: */
4527 virtual unsigned int execute (function *) { return rest_of_handle_final (); }
4528
4529 }; // class pass_final
4530
4531 } // anon namespace
4532
4533 rtl_opt_pass *
4534 make_pass_final (gcc::context *ctxt)
4535 {
4536 return new pass_final (ctxt);
4537 }
4538
4539
4540 static unsigned int
4541 rest_of_handle_shorten_branches (void)
4542 {
4543 /* Shorten branches. */
4544 shorten_branches (get_insns ());
4545 return 0;
4546 }
4547
4548 namespace {
4549
4550 const pass_data pass_data_shorten_branches =
4551 {
4552 RTL_PASS, /* type */
4553 "shorten", /* name */
4554 OPTGROUP_NONE, /* optinfo_flags */
4555 true, /* has_execute */
4556 TV_SHORTEN_BRANCH, /* tv_id */
4557 0, /* properties_required */
4558 0, /* properties_provided */
4559 0, /* properties_destroyed */
4560 0, /* todo_flags_start */
4561 0, /* todo_flags_finish */
4562 };
4563
4564 class pass_shorten_branches : public rtl_opt_pass
4565 {
4566 public:
4567 pass_shorten_branches (gcc::context *ctxt)
4568 : rtl_opt_pass (pass_data_shorten_branches, ctxt)
4569 {}
4570
4571 /* opt_pass methods: */
4572 virtual unsigned int execute (function *)
4573 {
4574 return rest_of_handle_shorten_branches ();
4575 }
4576
4577 }; // class pass_shorten_branches
4578
4579 } // anon namespace
4580
4581 rtl_opt_pass *
4582 make_pass_shorten_branches (gcc::context *ctxt)
4583 {
4584 return new pass_shorten_branches (ctxt);
4585 }
4586
4587
4588 static unsigned int
4589 rest_of_clean_state (void)
4590 {
4591 rtx insn, next;
4592 FILE *final_output = NULL;
4593 int save_unnumbered = flag_dump_unnumbered;
4594 int save_noaddr = flag_dump_noaddr;
4595
4596 if (flag_dump_final_insns)
4597 {
4598 final_output = fopen (flag_dump_final_insns, "a");
4599 if (!final_output)
4600 {
4601 error ("could not open final insn dump file %qs: %m",
4602 flag_dump_final_insns);
4603 flag_dump_final_insns = NULL;
4604 }
4605 else
4606 {
4607 flag_dump_noaddr = flag_dump_unnumbered = 1;
4608 if (flag_compare_debug_opt || flag_compare_debug)
4609 dump_flags |= TDF_NOUID;
4610 dump_function_header (final_output, current_function_decl,
4611 dump_flags);
4612 final_insns_dump_p = true;
4613
4614 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4615 if (LABEL_P (insn))
4616 INSN_UID (insn) = CODE_LABEL_NUMBER (insn);
4617 else
4618 {
4619 if (NOTE_P (insn))
4620 set_block_for_insn (insn, NULL);
4621 INSN_UID (insn) = 0;
4622 }
4623 }
4624 }
4625
4626 /* It is very important to decompose the RTL instruction chain here:
4627 debug information keeps pointing into CODE_LABEL insns inside the function
4628 body. If these remain pointing to the other insns, we end up preserving
4629 whole RTL chain and attached detailed debug info in memory. */
4630 for (insn = get_insns (); insn; insn = next)
4631 {
4632 next = NEXT_INSN (insn);
4633 NEXT_INSN (insn) = NULL;
4634 PREV_INSN (insn) = NULL;
4635
4636 if (final_output
4637 && (!NOTE_P (insn) ||
4638 (NOTE_KIND (insn) != NOTE_INSN_VAR_LOCATION
4639 && NOTE_KIND (insn) != NOTE_INSN_CALL_ARG_LOCATION
4640 && NOTE_KIND (insn) != NOTE_INSN_BLOCK_BEG
4641 && NOTE_KIND (insn) != NOTE_INSN_BLOCK_END
4642 && NOTE_KIND (insn) != NOTE_INSN_DELETED_DEBUG_LABEL)))
4643 print_rtl_single (final_output, insn);
4644 }
4645
4646 if (final_output)
4647 {
4648 flag_dump_noaddr = save_noaddr;
4649 flag_dump_unnumbered = save_unnumbered;
4650 final_insns_dump_p = false;
4651
4652 if (fclose (final_output))
4653 {
4654 error ("could not close final insn dump file %qs: %m",
4655 flag_dump_final_insns);
4656 flag_dump_final_insns = NULL;
4657 }
4658 }
4659
4660 /* In case the function was not output,
4661 don't leave any temporary anonymous types
4662 queued up for sdb output. */
4663 #ifdef SDB_DEBUGGING_INFO
4664 if (write_symbols == SDB_DEBUG)
4665 sdbout_types (NULL_TREE);
4666 #endif
4667
4668 flag_rerun_cse_after_global_opts = 0;
4669 reload_completed = 0;
4670 epilogue_completed = 0;
4671 #ifdef STACK_REGS
4672 regstack_completed = 0;
4673 #endif
4674
4675 /* Clear out the insn_length contents now that they are no
4676 longer valid. */
4677 init_insn_lengths ();
4678
4679 /* Show no temporary slots allocated. */
4680 init_temp_slots ();
4681
4682 free_bb_for_insn ();
4683
4684 delete_tree_ssa ();
4685
4686 /* We can reduce stack alignment on call site only when we are sure that
4687 the function body just produced will be actually used in the final
4688 executable. */
4689 if (decl_binds_to_current_def_p (current_function_decl))
4690 {
4691 unsigned int pref = crtl->preferred_stack_boundary;
4692 if (crtl->stack_alignment_needed > crtl->preferred_stack_boundary)
4693 pref = crtl->stack_alignment_needed;
4694 cgraph_rtl_info (current_function_decl)->preferred_incoming_stack_boundary
4695 = pref;
4696 }
4697
4698 /* Make sure volatile mem refs aren't considered valid operands for
4699 arithmetic insns. We must call this here if this is a nested inline
4700 function, since the above code leaves us in the init_recog state,
4701 and the function context push/pop code does not save/restore volatile_ok.
4702
4703 ??? Maybe it isn't necessary for expand_start_function to call this
4704 anymore if we do it here? */
4705
4706 init_recog_no_volatile ();
4707
4708 /* We're done with this function. Free up memory if we can. */
4709 free_after_parsing (cfun);
4710 free_after_compilation (cfun);
4711 return 0;
4712 }
4713
4714 namespace {
4715
4716 const pass_data pass_data_clean_state =
4717 {
4718 RTL_PASS, /* type */
4719 "*clean_state", /* name */
4720 OPTGROUP_NONE, /* optinfo_flags */
4721 true, /* has_execute */
4722 TV_FINAL, /* tv_id */
4723 0, /* properties_required */
4724 0, /* properties_provided */
4725 PROP_rtl, /* properties_destroyed */
4726 0, /* todo_flags_start */
4727 0, /* todo_flags_finish */
4728 };
4729
4730 class pass_clean_state : public rtl_opt_pass
4731 {
4732 public:
4733 pass_clean_state (gcc::context *ctxt)
4734 : rtl_opt_pass (pass_data_clean_state, ctxt)
4735 {}
4736
4737 /* opt_pass methods: */
4738 virtual unsigned int execute (function *)
4739 {
4740 return rest_of_clean_state ();
4741 }
4742
4743 }; // class pass_clean_state
4744
4745 } // anon namespace
4746
4747 rtl_opt_pass *
4748 make_pass_clean_state (gcc::context *ctxt)
4749 {
4750 return new pass_clean_state (ctxt);
4751 }
4752
4753 /* Collect hard register usage for the current function. */
4754
4755 static void
4756 collect_fn_hard_reg_usage (void)
4757 {
4758 rtx insn;
4759 #ifdef STACK_REGS
4760 int i;
4761 #endif
4762 struct cgraph_rtl_info *node;
4763 HARD_REG_SET function_used_regs;
4764
4765 /* ??? To be removed when all the ports have been fixed. */
4766 if (!targetm.call_fusage_contains_non_callee_clobbers)
4767 return;
4768
4769 CLEAR_HARD_REG_SET (function_used_regs);
4770
4771 for (insn = get_insns (); insn != NULL_RTX; insn = next_insn (insn))
4772 {
4773 HARD_REG_SET insn_used_regs;
4774
4775 if (!NONDEBUG_INSN_P (insn))
4776 continue;
4777
4778 if (CALL_P (insn))
4779 {
4780 if (!get_call_reg_set_usage (insn, &insn_used_regs,
4781 call_used_reg_set))
4782 return;
4783
4784 IOR_HARD_REG_SET (function_used_regs, insn_used_regs);
4785 }
4786
4787 find_all_hard_reg_sets (insn, &insn_used_regs, false);
4788 IOR_HARD_REG_SET (function_used_regs, insn_used_regs);
4789 }
4790
4791 /* Be conservative - mark fixed and global registers as used. */
4792 IOR_HARD_REG_SET (function_used_regs, fixed_reg_set);
4793
4794 #ifdef STACK_REGS
4795 /* Handle STACK_REGS conservatively, since the df-framework does not
4796 provide accurate information for them. */
4797
4798 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
4799 SET_HARD_REG_BIT (function_used_regs, i);
4800 #endif
4801
4802 /* The information we have gathered is only interesting if it exposes a
4803 register from the call_used_regs that is not used in this function. */
4804 if (hard_reg_set_subset_p (call_used_reg_set, function_used_regs))
4805 return;
4806
4807 node = cgraph_rtl_info (current_function_decl);
4808 gcc_assert (node != NULL);
4809
4810 COPY_HARD_REG_SET (node->function_used_regs, function_used_regs);
4811 node->function_used_regs_valid = 1;
4812 }
4813
4814 /* Get the declaration of the function called by INSN. */
4815
4816 static tree
4817 get_call_fndecl (rtx insn)
4818 {
4819 rtx note, datum;
4820
4821 note = find_reg_note (insn, REG_CALL_DECL, NULL_RTX);
4822 if (note == NULL_RTX)
4823 return NULL_TREE;
4824
4825 datum = XEXP (note, 0);
4826 if (datum != NULL_RTX)
4827 return SYMBOL_REF_DECL (datum);
4828
4829 return NULL_TREE;
4830 }
4831
4832 /* Return the cgraph_rtl_info of the function called by INSN. Returns NULL for
4833 call targets that can be overwritten. */
4834
4835 static struct cgraph_rtl_info *
4836 get_call_cgraph_rtl_info (rtx insn)
4837 {
4838 tree fndecl;
4839
4840 if (insn == NULL_RTX)
4841 return NULL;
4842
4843 fndecl = get_call_fndecl (insn);
4844 if (fndecl == NULL_TREE
4845 || !decl_binds_to_current_def_p (fndecl))
4846 return NULL;
4847
4848 return cgraph_rtl_info (fndecl);
4849 }
4850
4851 /* Find hard registers used by function call instruction INSN, and return them
4852 in REG_SET. Return DEFAULT_SET in REG_SET if not found. */
4853
4854 bool
4855 get_call_reg_set_usage (rtx insn, HARD_REG_SET *reg_set,
4856 HARD_REG_SET default_set)
4857 {
4858 if (flag_use_caller_save)
4859 {
4860 struct cgraph_rtl_info *node = get_call_cgraph_rtl_info (insn);
4861 if (node != NULL
4862 && node->function_used_regs_valid)
4863 {
4864 COPY_HARD_REG_SET (*reg_set, node->function_used_regs);
4865 AND_HARD_REG_SET (*reg_set, default_set);
4866 return true;
4867 }
4868 }
4869
4870 COPY_HARD_REG_SET (*reg_set, default_set);
4871 return false;
4872 }