1 /* Convert RTL to assembler code and output it, for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
22 /* This is the final pass of the compiler.
23 It looks at the rtl code for a function and outputs assembler code.
25 Call `final_start_function' to output the assembler code for function entry,
26 `final' to output assembler code for some RTL code,
27 `final_end_function' to output assembler code for function exit.
28 If a function is compiled in several pieces, each piece is
29 output separately with `final'.
31 Some optimizations are also done at this level.
32 Move instructions that were made unnecessary by good register allocation
33 are detected and omitted from the output. (Though most of these
34 are removed by the last jump pass.)
36 Instructions to set the condition codes are omitted when it can be
37 seen that the condition codes already had the desired values.
39 In some cases it is sufficient if the inherited condition codes
40 have related values, but this may require the following insn
41 (the one that tests the condition codes) to be modified.
43 The code for the function prologue and epilogue are generated
44 directly in assembler by the target functions function_prologue and
45 function_epilogue. Those instructions never exist as rtl. */
49 #include "coretypes.h"
56 #include "insn-config.h"
57 #include "insn-attr.h"
59 #include "conditions.h"
62 #include "hard-reg-set.h"
69 #include "basic-block.h"
73 #include "cfglayout.h"
75 #ifdef XCOFF_DEBUGGING_INFO
76 #include "xcoffout.h" /* Needed for external data
77 declarations for e.g. AIX 4.x. */
80 #if defined (DWARF2_UNWIND_INFO) || defined (DWARF2_DEBUGGING_INFO)
81 #include "dwarf2out.h"
84 /* If we aren't using cc0, CC_STATUS_INIT shouldn't exist. So define a
85 null default for it to save conditionalization later. */
86 #ifndef CC_STATUS_INIT
87 #define CC_STATUS_INIT
90 /* How to start an assembler comment. */
91 #ifndef ASM_COMMENT_START
92 #define ASM_COMMENT_START ";#"
95 /* Is the given character a logical line separator for the assembler? */
96 #ifndef IS_ASM_LOGICAL_LINE_SEPARATOR
97 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C) ((C) == ';')
100 #ifndef JUMP_TABLES_IN_TEXT_SECTION
101 #define JUMP_TABLES_IN_TEXT_SECTION 0
104 #if defined(READONLY_DATA_SECTION) || defined(READONLY_DATA_SECTION_ASM_OP)
105 #define HAVE_READONLY_DATA_SECTION 1
107 #define HAVE_READONLY_DATA_SECTION 0
110 /* Last insn processed by final_scan_insn. */
111 static rtx debug_insn
;
112 rtx current_output_insn
;
114 /* Line number of last NOTE. */
115 static int last_linenum
;
117 /* Highest line number in current block. */
118 static int high_block_linenum
;
120 /* Likewise for function. */
121 static int high_function_linenum
;
123 /* Filename of last NOTE. */
124 static const char *last_filename
;
126 extern int length_unit_log
; /* This is defined in insn-attrtab.c. */
128 /* Nonzero while outputting an `asm' with operands.
129 This means that inconsistencies are the user's fault, so don't abort.
130 The precise value is the insn being output, to pass to error_for_asm. */
131 rtx this_is_asm_operands
;
133 /* Number of operands of this insn, for an `asm' with operands. */
134 static unsigned int insn_noperands
;
136 /* Compare optimization flag. */
138 static rtx last_ignored_compare
= 0;
140 /* Assign a unique number to each insn that is output.
141 This can be used to generate unique local labels. */
143 static int insn_counter
= 0;
146 /* This variable contains machine-dependent flags (defined in tm.h)
147 set and examined by output routines
148 that describe how to interpret the condition codes properly. */
152 /* During output of an insn, this contains a copy of cc_status
153 from before the insn. */
155 CC_STATUS cc_prev_status
;
158 /* Indexed by hardware reg number, is 1 if that register is ever
159 used in the current function.
161 In life_analysis, or in stupid_life_analysis, this is set
162 up to record the hard regs used explicitly. Reload adds
163 in the hard regs used for holding pseudo regs. Final uses
164 it to generate the code in the function prologue and epilogue
165 to save and restore registers as needed. */
167 char regs_ever_live
[FIRST_PSEUDO_REGISTER
];
169 /* Nonzero means current function must be given a frame pointer.
170 Set in stmt.c if anything is allocated on the stack there.
171 Set in reload1.c if anything is allocated on the stack there. */
173 int frame_pointer_needed
;
175 /* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */
177 static int block_depth
;
179 /* Nonzero if have enabled APP processing of our assembler output. */
183 /* If we are outputting an insn sequence, this contains the sequence rtx.
188 #ifdef ASSEMBLER_DIALECT
190 /* Number of the assembler dialect to use, starting at 0. */
191 static int dialect_number
;
194 /* Indexed by line number, nonzero if there is a note for that line. */
196 static char *line_note_exists
;
198 #ifdef HAVE_conditional_execution
199 /* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */
200 rtx current_insn_predicate
;
203 #ifdef HAVE_ATTR_length
204 static int asm_insn_count
PARAMS ((rtx
));
206 static void profile_function
PARAMS ((FILE *));
207 static void profile_after_prologue
PARAMS ((FILE *));
208 static void notice_source_line
PARAMS ((rtx
));
209 static rtx walk_alter_subreg
PARAMS ((rtx
*));
210 static void output_asm_name
PARAMS ((void));
211 static void output_alternate_entry_point
PARAMS ((FILE *, rtx
));
212 static tree get_mem_expr_from_op
PARAMS ((rtx
, int *));
213 static void output_asm_operand_names
PARAMS ((rtx
*, int *, int));
214 static void output_operand
PARAMS ((rtx
, int));
215 #ifdef LEAF_REGISTERS
216 static void leaf_renumber_regs
PARAMS ((rtx
));
219 static int alter_cond
PARAMS ((rtx
));
221 #ifndef ADDR_VEC_ALIGN
222 static int final_addr_vec_align
PARAMS ((rtx
));
224 #ifdef HAVE_ATTR_length
225 static int align_fuzz
PARAMS ((rtx
, rtx
, int, unsigned));
228 /* Initialize data in final at the beginning of a compilation. */
231 init_final (filename
)
232 const char *filename ATTRIBUTE_UNUSED
;
237 #ifdef ASSEMBLER_DIALECT
238 dialect_number
= ASSEMBLER_DIALECT
;
242 /* Default target function prologue and epilogue assembler output.
244 If not overridden for epilogue code, then the function body itself
245 contains return instructions wherever needed. */
247 default_function_pro_epilogue (file
, size
)
248 FILE *file ATTRIBUTE_UNUSED
;
249 HOST_WIDE_INT size ATTRIBUTE_UNUSED
;
253 /* Default target hook that outputs nothing to a stream. */
255 no_asm_to_stream (file
)
256 FILE *file ATTRIBUTE_UNUSED
;
260 /* Enable APP processing of subsequent output.
261 Used before the output from an `asm' statement. */
268 fputs (ASM_APP_ON
, asm_out_file
);
273 /* Disable APP processing of subsequent output.
274 Called from varasm.c before most kinds of output. */
281 fputs (ASM_APP_OFF
, asm_out_file
);
286 /* Return the number of slots filled in the current
287 delayed branch sequence (we don't count the insn needing the
288 delay slot). Zero if not in a delayed branch sequence. */
292 dbr_sequence_length ()
294 if (final_sequence
!= 0)
295 return XVECLEN (final_sequence
, 0) - 1;
301 /* The next two pages contain routines used to compute the length of an insn
302 and to shorten branches. */
304 /* Arrays for insn lengths, and addresses. The latter is referenced by
305 `insn_current_length'. */
307 static int *insn_lengths
;
309 varray_type insn_addresses_
;
311 /* Max uid for which the above arrays are valid. */
312 static int insn_lengths_max_uid
;
314 /* Address of insn being processed. Used by `insn_current_length'. */
315 int insn_current_address
;
317 /* Address of insn being processed in previous iteration. */
318 int insn_last_address
;
320 /* known invariant alignment of insn being processed. */
321 int insn_current_align
;
323 /* After shorten_branches, for any insn, uid_align[INSN_UID (insn)]
324 gives the next following alignment insn that increases the known
325 alignment, or NULL_RTX if there is no such insn.
326 For any alignment obtained this way, we can again index uid_align with
327 its uid to obtain the next following align that in turn increases the
328 alignment, till we reach NULL_RTX; the sequence obtained this way
329 for each insn we'll call the alignment chain of this insn in the following
332 struct label_alignment
338 static rtx
*uid_align
;
339 static int *uid_shuid
;
340 static struct label_alignment
*label_align
;
342 /* Indicate that branch shortening hasn't yet been done. */
356 insn_lengths_max_uid
= 0;
358 #ifdef HAVE_ATTR_length
359 INSN_ADDRESSES_FREE ();
368 /* Obtain the current length of an insn. If branch shortening has been done,
369 get its actual length. Otherwise, get its maximum length. */
372 get_attr_length (insn
)
373 rtx insn ATTRIBUTE_UNUSED
;
375 #ifdef HAVE_ATTR_length
380 if (insn_lengths_max_uid
> INSN_UID (insn
))
381 return insn_lengths
[INSN_UID (insn
)];
383 switch (GET_CODE (insn
))
391 length
= insn_default_length (insn
);
395 body
= PATTERN (insn
);
396 if (GET_CODE (body
) == ADDR_VEC
|| GET_CODE (body
) == ADDR_DIFF_VEC
)
398 /* Alignment is machine-dependent and should be handled by
402 length
= insn_default_length (insn
);
406 body
= PATTERN (insn
);
407 if (GET_CODE (body
) == USE
|| GET_CODE (body
) == CLOBBER
)
410 else if (GET_CODE (body
) == ASM_INPUT
|| asm_noperands (body
) >= 0)
411 length
= asm_insn_count (body
) * insn_default_length (insn
);
412 else if (GET_CODE (body
) == SEQUENCE
)
413 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
414 length
+= get_attr_length (XVECEXP (body
, 0, i
));
416 length
= insn_default_length (insn
);
423 #ifdef ADJUST_INSN_LENGTH
424 ADJUST_INSN_LENGTH (insn
, length
);
427 #else /* not HAVE_ATTR_length */
429 #endif /* not HAVE_ATTR_length */
432 /* Code to handle alignment inside shorten_branches. */
434 /* Here is an explanation how the algorithm in align_fuzz can give
437 Call a sequence of instructions beginning with alignment point X
438 and continuing until the next alignment point `block X'. When `X'
439 is used in an expression, it means the alignment value of the
442 Call the distance between the start of the first insn of block X, and
443 the end of the last insn of block X `IX', for the `inner size of X'.
444 This is clearly the sum of the instruction lengths.
446 Likewise with the next alignment-delimited block following X, which we
449 Call the distance between the start of the first insn of block X, and
450 the start of the first insn of block Y `OX', for the `outer size of X'.
452 The estimated padding is then OX - IX.
454 OX can be safely estimated as
459 OX = round_up(IX, X) + Y - X
461 Clearly est(IX) >= real(IX), because that only depends on the
462 instruction lengths, and those being overestimated is a given.
464 Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so
465 we needn't worry about that when thinking about OX.
467 When X >= Y, the alignment provided by Y adds no uncertainty factor
468 for branch ranges starting before X, so we can just round what we have.
469 But when X < Y, we don't know anything about the, so to speak,
470 `middle bits', so we have to assume the worst when aligning up from an
471 address mod X to one mod Y, which is Y - X. */
474 #define LABEL_ALIGN(LABEL) align_labels_log
477 #ifndef LABEL_ALIGN_MAX_SKIP
478 #define LABEL_ALIGN_MAX_SKIP align_labels_max_skip
482 #define LOOP_ALIGN(LABEL) align_loops_log
485 #ifndef LOOP_ALIGN_MAX_SKIP
486 #define LOOP_ALIGN_MAX_SKIP align_loops_max_skip
489 #ifndef LABEL_ALIGN_AFTER_BARRIER
490 #define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0
493 #ifndef LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP
494 #define LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP 0
498 #define JUMP_ALIGN(LABEL) align_jumps_log
501 #ifndef JUMP_ALIGN_MAX_SKIP
502 #define JUMP_ALIGN_MAX_SKIP align_jumps_max_skip
505 #ifndef ADDR_VEC_ALIGN
507 final_addr_vec_align (addr_vec
)
510 int align
= GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec
)));
512 if (align
> BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
)
513 align
= BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
;
514 return exact_log2 (align
);
518 #define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC)
521 #ifndef INSN_LENGTH_ALIGNMENT
522 #define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log
525 #define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)])
527 static int min_labelno
, max_labelno
;
529 #define LABEL_TO_ALIGNMENT(LABEL) \
530 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment)
532 #define LABEL_TO_MAX_SKIP(LABEL) \
533 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip)
535 /* For the benefit of port specific code do this also as a function. */
538 label_to_alignment (label
)
541 return LABEL_TO_ALIGNMENT (label
);
544 #ifdef HAVE_ATTR_length
545 /* The differences in addresses
546 between a branch and its target might grow or shrink depending on
547 the alignment the start insn of the range (the branch for a forward
548 branch or the label for a backward branch) starts out on; if these
549 differences are used naively, they can even oscillate infinitely.
550 We therefore want to compute a 'worst case' address difference that
551 is independent of the alignment the start insn of the range end
552 up on, and that is at least as large as the actual difference.
553 The function align_fuzz calculates the amount we have to add to the
554 naively computed difference, by traversing the part of the alignment
555 chain of the start insn of the range that is in front of the end insn
556 of the range, and considering for each alignment the maximum amount
557 that it might contribute to a size increase.
559 For casesi tables, we also want to know worst case minimum amounts of
560 address difference, in case a machine description wants to introduce
561 some common offset that is added to all offsets in a table.
562 For this purpose, align_fuzz with a growth argument of 0 computes the
563 appropriate adjustment. */
565 /* Compute the maximum delta by which the difference of the addresses of
566 START and END might grow / shrink due to a different address for start
567 which changes the size of alignment insns between START and END.
568 KNOWN_ALIGN_LOG is the alignment known for START.
569 GROWTH should be ~0 if the objective is to compute potential code size
570 increase, and 0 if the objective is to compute potential shrink.
571 The return value is undefined for any other value of GROWTH. */
574 align_fuzz (start
, end
, known_align_log
, growth
)
579 int uid
= INSN_UID (start
);
581 int known_align
= 1 << known_align_log
;
582 int end_shuid
= INSN_SHUID (end
);
585 for (align_label
= uid_align
[uid
]; align_label
; align_label
= uid_align
[uid
])
587 int align_addr
, new_align
;
589 uid
= INSN_UID (align_label
);
590 align_addr
= INSN_ADDRESSES (uid
) - insn_lengths
[uid
];
591 if (uid_shuid
[uid
] > end_shuid
)
593 known_align_log
= LABEL_TO_ALIGNMENT (align_label
);
594 new_align
= 1 << known_align_log
;
595 if (new_align
< known_align
)
597 fuzz
+= (-align_addr
^ growth
) & (new_align
- known_align
);
598 known_align
= new_align
;
603 /* Compute a worst-case reference address of a branch so that it
604 can be safely used in the presence of aligned labels. Since the
605 size of the branch itself is unknown, the size of the branch is
606 not included in the range. I.e. for a forward branch, the reference
607 address is the end address of the branch as known from the previous
608 branch shortening pass, minus a value to account for possible size
609 increase due to alignment. For a backward branch, it is the start
610 address of the branch as known from the current pass, plus a value
611 to account for possible size increase due to alignment.
612 NB.: Therefore, the maximum offset allowed for backward branches needs
613 to exclude the branch size. */
616 insn_current_reference_address (branch
)
622 if (! INSN_ADDRESSES_SET_P ())
625 seq
= NEXT_INSN (PREV_INSN (branch
));
626 seq_uid
= INSN_UID (seq
);
627 if (GET_CODE (branch
) != JUMP_INSN
)
628 /* This can happen for example on the PA; the objective is to know the
629 offset to address something in front of the start of the function.
630 Thus, we can treat it like a backward branch.
631 We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than
632 any alignment we'd encounter, so we skip the call to align_fuzz. */
633 return insn_current_address
;
634 dest
= JUMP_LABEL (branch
);
636 /* BRANCH has no proper alignment chain set, so use SEQ.
637 BRANCH also has no INSN_SHUID. */
638 if (INSN_SHUID (seq
) < INSN_SHUID (dest
))
640 /* Forward branch. */
641 return (insn_last_address
+ insn_lengths
[seq_uid
]
642 - align_fuzz (seq
, dest
, length_unit_log
, ~0));
646 /* Backward branch. */
647 return (insn_current_address
648 + align_fuzz (dest
, seq
, length_unit_log
, ~0));
651 #endif /* HAVE_ATTR_length */
654 compute_alignments ()
656 int log
, max_skip
, max_log
;
665 max_labelno
= max_label_num ();
666 min_labelno
= get_first_label_num ();
667 label_align
= (struct label_alignment
*)
668 xcalloc (max_labelno
- min_labelno
+ 1, sizeof (struct label_alignment
));
670 /* If not optimizing or optimizing for size, don't assign any alignments. */
671 if (! optimize
|| optimize_size
)
676 rtx label
= bb
->head
;
677 int fallthru_frequency
= 0, branch_frequency
= 0, has_fallthru
= 0;
680 if (GET_CODE (label
) != CODE_LABEL
)
682 max_log
= LABEL_ALIGN (label
);
683 max_skip
= LABEL_ALIGN_MAX_SKIP
;
685 for (e
= bb
->pred
; e
; e
= e
->pred_next
)
687 if (e
->flags
& EDGE_FALLTHRU
)
688 has_fallthru
= 1, fallthru_frequency
+= EDGE_FREQUENCY (e
);
690 branch_frequency
+= EDGE_FREQUENCY (e
);
693 /* There are two purposes to align block with no fallthru incoming edge:
694 1) to avoid fetch stalls when branch destination is near cache boundary
695 2) to improve cache efficiency in case the previous block is not executed
696 (so it does not need to be in the cache).
698 We to catch first case, we align frequently executed blocks.
699 To catch the second, we align blocks that are executed more frequently
700 than the predecessor and the predecessor is likely to not be executed
701 when function is called. */
704 && (branch_frequency
> BB_FREQ_MAX
/ 10
705 || (bb
->frequency
> bb
->prev_bb
->frequency
* 10
706 && (bb
->prev_bb
->frequency
707 <= ENTRY_BLOCK_PTR
->frequency
/ 2))))
709 log
= JUMP_ALIGN (label
);
713 max_skip
= JUMP_ALIGN_MAX_SKIP
;
716 /* In case block is frequent and reached mostly by non-fallthru edge,
717 align it. It is most likely a first block of loop. */
719 && branch_frequency
+ fallthru_frequency
> BB_FREQ_MAX
/ 10
720 && branch_frequency
> fallthru_frequency
* 2)
722 log
= LOOP_ALIGN (label
);
726 max_skip
= LOOP_ALIGN_MAX_SKIP
;
729 LABEL_TO_ALIGNMENT (label
) = max_log
;
730 LABEL_TO_MAX_SKIP (label
) = max_skip
;
734 /* Make a pass over all insns and compute their actual lengths by shortening
735 any branches of variable length if possible. */
737 /* Give a default value for the lowest address in a function. */
739 #ifndef FIRST_INSN_ADDRESS
740 #define FIRST_INSN_ADDRESS 0
743 /* shorten_branches might be called multiple times: for example, the SH
744 port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG.
745 In order to do this, it needs proper length information, which it obtains
746 by calling shorten_branches. This cannot be collapsed with
747 shorten_branches itself into a single pass unless we also want to integrate
748 reorg.c, since the branch splitting exposes new instructions with delay
752 shorten_branches (first
)
753 rtx first ATTRIBUTE_UNUSED
;
760 #ifdef HAVE_ATTR_length
761 #define MAX_CODE_ALIGN 16
763 int something_changed
= 1;
764 char *varying_length
;
767 rtx align_tab
[MAX_CODE_ALIGN
];
771 /* Compute maximum UID and allocate label_align / uid_shuid. */
772 max_uid
= get_max_uid ();
774 uid_shuid
= (int *) xmalloc (max_uid
* sizeof *uid_shuid
);
776 if (max_labelno
!= max_label_num ())
778 int old
= max_labelno
;
782 max_labelno
= max_label_num ();
784 n_labels
= max_labelno
- min_labelno
+ 1;
785 n_old_labels
= old
- min_labelno
+ 1;
787 label_align
= (struct label_alignment
*) xrealloc
788 (label_align
, n_labels
* sizeof (struct label_alignment
));
790 /* Range of labels grows monotonically in the function. Abort here
791 means that the initialization of array got lost. */
792 if (n_old_labels
> n_labels
)
795 memset (label_align
+ n_old_labels
, 0,
796 (n_labels
- n_old_labels
) * sizeof (struct label_alignment
));
799 /* Initialize label_align and set up uid_shuid to be strictly
800 monotonically rising with insn order. */
801 /* We use max_log here to keep track of the maximum alignment we want to
802 impose on the next CODE_LABEL (or the current one if we are processing
803 the CODE_LABEL itself). */
808 for (insn
= get_insns (), i
= 1; insn
; insn
= NEXT_INSN (insn
))
812 INSN_SHUID (insn
) = i
++;
815 /* reorg might make the first insn of a loop being run once only,
816 and delete the label in front of it. Then we want to apply
817 the loop alignment to the new label created by reorg, which
818 is separated by the former loop start insn from the
819 NOTE_INSN_LOOP_BEG. */
821 else if (GET_CODE (insn
) == CODE_LABEL
)
825 /* Merge in alignments computed by compute_alignments. */
826 log
= LABEL_TO_ALIGNMENT (insn
);
830 max_skip
= LABEL_TO_MAX_SKIP (insn
);
833 log
= LABEL_ALIGN (insn
);
837 max_skip
= LABEL_ALIGN_MAX_SKIP
;
839 next
= NEXT_INSN (insn
);
840 /* ADDR_VECs only take room if read-only data goes into the text
842 if (JUMP_TABLES_IN_TEXT_SECTION
|| !HAVE_READONLY_DATA_SECTION
)
843 if (next
&& GET_CODE (next
) == JUMP_INSN
)
845 rtx nextbody
= PATTERN (next
);
846 if (GET_CODE (nextbody
) == ADDR_VEC
847 || GET_CODE (nextbody
) == ADDR_DIFF_VEC
)
849 log
= ADDR_VEC_ALIGN (next
);
853 max_skip
= LABEL_ALIGN_MAX_SKIP
;
857 LABEL_TO_ALIGNMENT (insn
) = max_log
;
858 LABEL_TO_MAX_SKIP (insn
) = max_skip
;
862 else if (GET_CODE (insn
) == BARRIER
)
866 for (label
= insn
; label
&& ! INSN_P (label
);
867 label
= NEXT_INSN (label
))
868 if (GET_CODE (label
) == CODE_LABEL
)
870 log
= LABEL_ALIGN_AFTER_BARRIER (insn
);
874 max_skip
= LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP
;
880 #ifdef HAVE_ATTR_length
882 /* Allocate the rest of the arrays. */
883 insn_lengths
= (int *) xmalloc (max_uid
* sizeof (*insn_lengths
));
884 insn_lengths_max_uid
= max_uid
;
885 /* Syntax errors can lead to labels being outside of the main insn stream.
886 Initialize insn_addresses, so that we get reproducible results. */
887 INSN_ADDRESSES_ALLOC (max_uid
);
889 varying_length
= (char *) xcalloc (max_uid
, sizeof (char));
891 /* Initialize uid_align. We scan instructions
892 from end to start, and keep in align_tab[n] the last seen insn
893 that does an alignment of at least n+1, i.e. the successor
894 in the alignment chain for an insn that does / has a known
896 uid_align
= (rtx
*) xcalloc (max_uid
, sizeof *uid_align
);
898 for (i
= MAX_CODE_ALIGN
; --i
>= 0;)
899 align_tab
[i
] = NULL_RTX
;
900 seq
= get_last_insn ();
901 for (; seq
; seq
= PREV_INSN (seq
))
903 int uid
= INSN_UID (seq
);
905 log
= (GET_CODE (seq
) == CODE_LABEL
? LABEL_TO_ALIGNMENT (seq
) : 0);
906 uid_align
[uid
] = align_tab
[0];
909 /* Found an alignment label. */
910 uid_align
[uid
] = align_tab
[log
];
911 for (i
= log
- 1; i
>= 0; i
--)
915 #ifdef CASE_VECTOR_SHORTEN_MODE
918 /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum
921 int min_shuid
= INSN_SHUID (get_insns ()) - 1;
922 int max_shuid
= INSN_SHUID (get_last_insn ()) + 1;
925 for (insn
= first
; insn
!= 0; insn
= NEXT_INSN (insn
))
927 rtx min_lab
= NULL_RTX
, max_lab
= NULL_RTX
, pat
;
928 int len
, i
, min
, max
, insn_shuid
;
930 addr_diff_vec_flags flags
;
932 if (GET_CODE (insn
) != JUMP_INSN
933 || GET_CODE (PATTERN (insn
)) != ADDR_DIFF_VEC
)
935 pat
= PATTERN (insn
);
936 len
= XVECLEN (pat
, 1);
939 min_align
= MAX_CODE_ALIGN
;
940 for (min
= max_shuid
, max
= min_shuid
, i
= len
- 1; i
>= 0; i
--)
942 rtx lab
= XEXP (XVECEXP (pat
, 1, i
), 0);
943 int shuid
= INSN_SHUID (lab
);
954 if (min_align
> LABEL_TO_ALIGNMENT (lab
))
955 min_align
= LABEL_TO_ALIGNMENT (lab
);
957 XEXP (pat
, 2) = gen_rtx_LABEL_REF (VOIDmode
, min_lab
);
958 XEXP (pat
, 3) = gen_rtx_LABEL_REF (VOIDmode
, max_lab
);
959 insn_shuid
= INSN_SHUID (insn
);
960 rel
= INSN_SHUID (XEXP (XEXP (pat
, 0), 0));
961 flags
.min_align
= min_align
;
962 flags
.base_after_vec
= rel
> insn_shuid
;
963 flags
.min_after_vec
= min
> insn_shuid
;
964 flags
.max_after_vec
= max
> insn_shuid
;
965 flags
.min_after_base
= min
> rel
;
966 flags
.max_after_base
= max
> rel
;
967 ADDR_DIFF_VEC_FLAGS (pat
) = flags
;
970 #endif /* CASE_VECTOR_SHORTEN_MODE */
972 /* Compute initial lengths, addresses, and varying flags for each insn. */
973 for (insn_current_address
= FIRST_INSN_ADDRESS
, insn
= first
;
975 insn_current_address
+= insn_lengths
[uid
], insn
= NEXT_INSN (insn
))
977 uid
= INSN_UID (insn
);
979 insn_lengths
[uid
] = 0;
981 if (GET_CODE (insn
) == CODE_LABEL
)
983 int log
= LABEL_TO_ALIGNMENT (insn
);
986 int align
= 1 << log
;
987 int new_address
= (insn_current_address
+ align
- 1) & -align
;
988 insn_lengths
[uid
] = new_address
- insn_current_address
;
992 INSN_ADDRESSES (uid
) = insn_current_address
;
994 if (GET_CODE (insn
) == NOTE
|| GET_CODE (insn
) == BARRIER
995 || GET_CODE (insn
) == CODE_LABEL
)
997 if (INSN_DELETED_P (insn
))
1000 body
= PATTERN (insn
);
1001 if (GET_CODE (body
) == ADDR_VEC
|| GET_CODE (body
) == ADDR_DIFF_VEC
)
1003 /* This only takes room if read-only data goes into the text
1005 if (JUMP_TABLES_IN_TEXT_SECTION
|| !HAVE_READONLY_DATA_SECTION
)
1006 insn_lengths
[uid
] = (XVECLEN (body
,
1007 GET_CODE (body
) == ADDR_DIFF_VEC
)
1008 * GET_MODE_SIZE (GET_MODE (body
)));
1009 /* Alignment is handled by ADDR_VEC_ALIGN. */
1011 else if (GET_CODE (body
) == ASM_INPUT
|| asm_noperands (body
) >= 0)
1012 insn_lengths
[uid
] = asm_insn_count (body
) * insn_default_length (insn
);
1013 else if (GET_CODE (body
) == SEQUENCE
)
1016 int const_delay_slots
;
1018 const_delay_slots
= const_num_delay_slots (XVECEXP (body
, 0, 0));
1020 const_delay_slots
= 0;
1022 /* Inside a delay slot sequence, we do not do any branch shortening
1023 if the shortening could change the number of delay slots
1025 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
1027 rtx inner_insn
= XVECEXP (body
, 0, i
);
1028 int inner_uid
= INSN_UID (inner_insn
);
1031 if (GET_CODE (body
) == ASM_INPUT
1032 || asm_noperands (PATTERN (XVECEXP (body
, 0, i
))) >= 0)
1033 inner_length
= (asm_insn_count (PATTERN (inner_insn
))
1034 * insn_default_length (inner_insn
));
1036 inner_length
= insn_default_length (inner_insn
);
1038 insn_lengths
[inner_uid
] = inner_length
;
1039 if (const_delay_slots
)
1041 if ((varying_length
[inner_uid
]
1042 = insn_variable_length_p (inner_insn
)) != 0)
1043 varying_length
[uid
] = 1;
1044 INSN_ADDRESSES (inner_uid
) = (insn_current_address
1045 + insn_lengths
[uid
]);
1048 varying_length
[inner_uid
] = 0;
1049 insn_lengths
[uid
] += inner_length
;
1052 else if (GET_CODE (body
) != USE
&& GET_CODE (body
) != CLOBBER
)
1054 insn_lengths
[uid
] = insn_default_length (insn
);
1055 varying_length
[uid
] = insn_variable_length_p (insn
);
1058 /* If needed, do any adjustment. */
1059 #ifdef ADJUST_INSN_LENGTH
1060 ADJUST_INSN_LENGTH (insn
, insn_lengths
[uid
]);
1061 if (insn_lengths
[uid
] < 0)
1062 fatal_insn ("negative insn length", insn
);
1066 /* Now loop over all the insns finding varying length insns. For each,
1067 get the current insn length. If it has changed, reflect the change.
1068 When nothing changes for a full pass, we are done. */
1070 while (something_changed
)
1072 something_changed
= 0;
1073 insn_current_align
= MAX_CODE_ALIGN
- 1;
1074 for (insn_current_address
= FIRST_INSN_ADDRESS
, insn
= first
;
1076 insn
= NEXT_INSN (insn
))
1079 #ifdef ADJUST_INSN_LENGTH
1084 uid
= INSN_UID (insn
);
1086 if (GET_CODE (insn
) == CODE_LABEL
)
1088 int log
= LABEL_TO_ALIGNMENT (insn
);
1089 if (log
> insn_current_align
)
1091 int align
= 1 << log
;
1092 int new_address
= (insn_current_address
+ align
- 1) & -align
;
1093 insn_lengths
[uid
] = new_address
- insn_current_address
;
1094 insn_current_align
= log
;
1095 insn_current_address
= new_address
;
1098 insn_lengths
[uid
] = 0;
1099 INSN_ADDRESSES (uid
) = insn_current_address
;
1103 length_align
= INSN_LENGTH_ALIGNMENT (insn
);
1104 if (length_align
< insn_current_align
)
1105 insn_current_align
= length_align
;
1107 insn_last_address
= INSN_ADDRESSES (uid
);
1108 INSN_ADDRESSES (uid
) = insn_current_address
;
1110 #ifdef CASE_VECTOR_SHORTEN_MODE
1111 if (optimize
&& GET_CODE (insn
) == JUMP_INSN
1112 && GET_CODE (PATTERN (insn
)) == ADDR_DIFF_VEC
)
1114 rtx body
= PATTERN (insn
);
1115 int old_length
= insn_lengths
[uid
];
1116 rtx rel_lab
= XEXP (XEXP (body
, 0), 0);
1117 rtx min_lab
= XEXP (XEXP (body
, 2), 0);
1118 rtx max_lab
= XEXP (XEXP (body
, 3), 0);
1119 int rel_addr
= INSN_ADDRESSES (INSN_UID (rel_lab
));
1120 int min_addr
= INSN_ADDRESSES (INSN_UID (min_lab
));
1121 int max_addr
= INSN_ADDRESSES (INSN_UID (max_lab
));
1124 addr_diff_vec_flags flags
;
1126 /* Avoid automatic aggregate initialization. */
1127 flags
= ADDR_DIFF_VEC_FLAGS (body
);
1129 /* Try to find a known alignment for rel_lab. */
1130 for (prev
= rel_lab
;
1132 && ! insn_lengths
[INSN_UID (prev
)]
1133 && ! (varying_length
[INSN_UID (prev
)] & 1);
1134 prev
= PREV_INSN (prev
))
1135 if (varying_length
[INSN_UID (prev
)] & 2)
1137 rel_align
= LABEL_TO_ALIGNMENT (prev
);
1141 /* See the comment on addr_diff_vec_flags in rtl.h for the
1142 meaning of the flags values. base: REL_LAB vec: INSN */
1143 /* Anything after INSN has still addresses from the last
1144 pass; adjust these so that they reflect our current
1145 estimate for this pass. */
1146 if (flags
.base_after_vec
)
1147 rel_addr
+= insn_current_address
- insn_last_address
;
1148 if (flags
.min_after_vec
)
1149 min_addr
+= insn_current_address
- insn_last_address
;
1150 if (flags
.max_after_vec
)
1151 max_addr
+= insn_current_address
- insn_last_address
;
1152 /* We want to know the worst case, i.e. lowest possible value
1153 for the offset of MIN_LAB. If MIN_LAB is after REL_LAB,
1154 its offset is positive, and we have to be wary of code shrink;
1155 otherwise, it is negative, and we have to be vary of code
1157 if (flags
.min_after_base
)
1159 /* If INSN is between REL_LAB and MIN_LAB, the size
1160 changes we are about to make can change the alignment
1161 within the observed offset, therefore we have to break
1162 it up into two parts that are independent. */
1163 if (! flags
.base_after_vec
&& flags
.min_after_vec
)
1165 min_addr
-= align_fuzz (rel_lab
, insn
, rel_align
, 0);
1166 min_addr
-= align_fuzz (insn
, min_lab
, 0, 0);
1169 min_addr
-= align_fuzz (rel_lab
, min_lab
, rel_align
, 0);
1173 if (flags
.base_after_vec
&& ! flags
.min_after_vec
)
1175 min_addr
-= align_fuzz (min_lab
, insn
, 0, ~0);
1176 min_addr
-= align_fuzz (insn
, rel_lab
, 0, ~0);
1179 min_addr
-= align_fuzz (min_lab
, rel_lab
, 0, ~0);
1181 /* Likewise, determine the highest lowest possible value
1182 for the offset of MAX_LAB. */
1183 if (flags
.max_after_base
)
1185 if (! flags
.base_after_vec
&& flags
.max_after_vec
)
1187 max_addr
+= align_fuzz (rel_lab
, insn
, rel_align
, ~0);
1188 max_addr
+= align_fuzz (insn
, max_lab
, 0, ~0);
1191 max_addr
+= align_fuzz (rel_lab
, max_lab
, rel_align
, ~0);
1195 if (flags
.base_after_vec
&& ! flags
.max_after_vec
)
1197 max_addr
+= align_fuzz (max_lab
, insn
, 0, 0);
1198 max_addr
+= align_fuzz (insn
, rel_lab
, 0, 0);
1201 max_addr
+= align_fuzz (max_lab
, rel_lab
, 0, 0);
1203 PUT_MODE (body
, CASE_VECTOR_SHORTEN_MODE (min_addr
- rel_addr
,
1204 max_addr
- rel_addr
,
1206 if (JUMP_TABLES_IN_TEXT_SECTION
|| !HAVE_READONLY_DATA_SECTION
)
1209 = (XVECLEN (body
, 1) * GET_MODE_SIZE (GET_MODE (body
)));
1210 insn_current_address
+= insn_lengths
[uid
];
1211 if (insn_lengths
[uid
] != old_length
)
1212 something_changed
= 1;
1217 #endif /* CASE_VECTOR_SHORTEN_MODE */
1219 if (! (varying_length
[uid
]))
1221 if (GET_CODE (insn
) == INSN
1222 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
1226 body
= PATTERN (insn
);
1227 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
1229 rtx inner_insn
= XVECEXP (body
, 0, i
);
1230 int inner_uid
= INSN_UID (inner_insn
);
1232 INSN_ADDRESSES (inner_uid
) = insn_current_address
;
1234 insn_current_address
+= insn_lengths
[inner_uid
];
1238 insn_current_address
+= insn_lengths
[uid
];
1243 if (GET_CODE (insn
) == INSN
&& GET_CODE (PATTERN (insn
)) == SEQUENCE
)
1247 body
= PATTERN (insn
);
1249 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
1251 rtx inner_insn
= XVECEXP (body
, 0, i
);
1252 int inner_uid
= INSN_UID (inner_insn
);
1255 INSN_ADDRESSES (inner_uid
) = insn_current_address
;
1257 /* insn_current_length returns 0 for insns with a
1258 non-varying length. */
1259 if (! varying_length
[inner_uid
])
1260 inner_length
= insn_lengths
[inner_uid
];
1262 inner_length
= insn_current_length (inner_insn
);
1264 if (inner_length
!= insn_lengths
[inner_uid
])
1266 insn_lengths
[inner_uid
] = inner_length
;
1267 something_changed
= 1;
1269 insn_current_address
+= insn_lengths
[inner_uid
];
1270 new_length
+= inner_length
;
1275 new_length
= insn_current_length (insn
);
1276 insn_current_address
+= new_length
;
1279 #ifdef ADJUST_INSN_LENGTH
1280 /* If needed, do any adjustment. */
1281 tmp_length
= new_length
;
1282 ADJUST_INSN_LENGTH (insn
, new_length
);
1283 insn_current_address
+= (new_length
- tmp_length
);
1286 if (new_length
!= insn_lengths
[uid
])
1288 insn_lengths
[uid
] = new_length
;
1289 something_changed
= 1;
1292 /* For a non-optimizing compile, do only a single pass. */
1297 free (varying_length
);
1299 #endif /* HAVE_ATTR_length */
1302 #ifdef HAVE_ATTR_length
1303 /* Given the body of an INSN known to be generated by an ASM statement, return
1304 the number of machine instructions likely to be generated for this insn.
1305 This is used to compute its length. */
1308 asm_insn_count (body
)
1311 const char *template;
1314 if (GET_CODE (body
) == ASM_INPUT
)
1315 template = XSTR (body
, 0);
1317 template = decode_asm_operands (body
, NULL
, NULL
, NULL
, NULL
);
1319 for (; *template; template++)
1320 if (IS_ASM_LOGICAL_LINE_SEPARATOR (*template) || *template == '\n')
1327 /* Output assembler code for the start of a function,
1328 and initialize some of the variables in this file
1329 for the new function. The label for the function and associated
1330 assembler pseudo-ops have already been output in `assemble_start_function'.
1332 FIRST is the first insn of the rtl for the function being compiled.
1333 FILE is the file to write assembler code to.
1334 OPTIMIZE is nonzero if we should eliminate redundant
1335 test and compare insns. */
1338 final_start_function (first
, file
, optimize
)
1341 int optimize ATTRIBUTE_UNUSED
;
1345 this_is_asm_operands
= 0;
1347 #ifdef NON_SAVING_SETJMP
1348 /* A function that calls setjmp should save and restore all the
1349 call-saved registers on a system where longjmp clobbers them. */
1350 if (NON_SAVING_SETJMP
&& current_function_calls_setjmp
)
1354 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
1355 if (!call_used_regs
[i
])
1356 regs_ever_live
[i
] = 1;
1360 if (NOTE_LINE_NUMBER (first
) != NOTE_INSN_DELETED
)
1361 notice_source_line (first
);
1362 high_block_linenum
= high_function_linenum
= last_linenum
;
1364 (*debug_hooks
->begin_prologue
) (last_linenum
, last_filename
);
1366 #if defined (DWARF2_UNWIND_INFO) || defined (IA64_UNWIND_INFO)
1367 if (write_symbols
!= DWARF2_DEBUG
&& write_symbols
!= VMS_AND_DWARF2_DEBUG
)
1368 dwarf2out_begin_prologue (0, NULL
);
1371 #ifdef LEAF_REG_REMAP
1372 if (current_function_uses_only_leaf_regs
)
1373 leaf_renumber_regs (first
);
1376 /* The Sun386i and perhaps other machines don't work right
1377 if the profiling code comes after the prologue. */
1378 #ifdef PROFILE_BEFORE_PROLOGUE
1379 if (current_function_profile
)
1380 profile_function (file
);
1381 #endif /* PROFILE_BEFORE_PROLOGUE */
1383 #if defined (DWARF2_UNWIND_INFO) && defined (HAVE_prologue)
1384 if (dwarf2out_do_frame ())
1385 dwarf2out_frame_debug (NULL_RTX
);
1388 /* If debugging, assign block numbers to all of the blocks in this
1392 remove_unnecessary_notes ();
1393 scope_to_insns_finalize ();
1394 number_blocks (current_function_decl
);
1395 /* We never actually put out begin/end notes for the top-level
1396 block in the function. But, conceptually, that block is
1398 TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl
)) = 1;
1401 /* First output the function prologue: code to set up the stack frame. */
1402 (*targetm
.asm_out
.function_prologue
) (file
, get_frame_size ());
1404 /* If the machine represents the prologue as RTL, the profiling code must
1405 be emitted when NOTE_INSN_PROLOGUE_END is scanned. */
1406 #ifdef HAVE_prologue
1407 if (! HAVE_prologue
)
1409 profile_after_prologue (file
);
1413 profile_after_prologue (file
)
1414 FILE *file ATTRIBUTE_UNUSED
;
1416 #ifndef PROFILE_BEFORE_PROLOGUE
1417 if (current_function_profile
)
1418 profile_function (file
);
1419 #endif /* not PROFILE_BEFORE_PROLOGUE */
1423 profile_function (file
)
1424 FILE *file ATTRIBUTE_UNUSED
;
1426 #ifndef NO_PROFILE_COUNTERS
1427 int align
= MIN (BIGGEST_ALIGNMENT
, LONG_TYPE_SIZE
);
1429 #if defined(ASM_OUTPUT_REG_PUSH)
1430 #if defined(STRUCT_VALUE_INCOMING_REGNUM) || defined(STRUCT_VALUE_REGNUM)
1431 int sval
= current_function_returns_struct
;
1433 #if defined(STATIC_CHAIN_INCOMING_REGNUM) || defined(STATIC_CHAIN_REGNUM)
1434 int cxt
= current_function_needs_context
;
1436 #endif /* ASM_OUTPUT_REG_PUSH */
1438 #ifndef NO_PROFILE_COUNTERS
1440 ASM_OUTPUT_ALIGN (file
, floor_log2 (align
/ BITS_PER_UNIT
));
1441 (*targetm
.asm_out
.internal_label
) (file
, "LP", current_function_funcdef_no
);
1442 assemble_integer (const0_rtx
, LONG_TYPE_SIZE
/ BITS_PER_UNIT
, align
, 1);
1445 function_section (current_function_decl
);
1447 #if defined(STRUCT_VALUE_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1449 ASM_OUTPUT_REG_PUSH (file
, STRUCT_VALUE_INCOMING_REGNUM
);
1451 #if defined(STRUCT_VALUE_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1454 ASM_OUTPUT_REG_PUSH (file
, STRUCT_VALUE_REGNUM
);
1459 #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1461 ASM_OUTPUT_REG_PUSH (file
, STATIC_CHAIN_INCOMING_REGNUM
);
1463 #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1466 ASM_OUTPUT_REG_PUSH (file
, STATIC_CHAIN_REGNUM
);
1471 FUNCTION_PROFILER (file
, current_function_funcdef_no
);
1473 #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1475 ASM_OUTPUT_REG_POP (file
, STATIC_CHAIN_INCOMING_REGNUM
);
1477 #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1480 ASM_OUTPUT_REG_POP (file
, STATIC_CHAIN_REGNUM
);
1485 #if defined(STRUCT_VALUE_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1487 ASM_OUTPUT_REG_POP (file
, STRUCT_VALUE_INCOMING_REGNUM
);
1489 #if defined(STRUCT_VALUE_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1492 ASM_OUTPUT_REG_POP (file
, STRUCT_VALUE_REGNUM
);
1498 /* Output assembler code for the end of a function.
1499 For clarity, args are same as those of `final_start_function'
1500 even though not all of them are needed. */
1503 final_end_function ()
1507 (*debug_hooks
->end_function
) (high_function_linenum
);
1509 /* Finally, output the function epilogue:
1510 code to restore the stack frame and return to the caller. */
1511 (*targetm
.asm_out
.function_epilogue
) (asm_out_file
, get_frame_size ());
1513 /* And debug output. */
1514 (*debug_hooks
->end_epilogue
) (last_linenum
, last_filename
);
1516 #if defined (DWARF2_UNWIND_INFO)
1517 if (write_symbols
!= DWARF2_DEBUG
&& write_symbols
!= VMS_AND_DWARF2_DEBUG
1518 && dwarf2out_do_frame ())
1519 dwarf2out_end_epilogue (last_linenum
, last_filename
);
1523 /* Output assembler code for some insns: all or part of a function.
1524 For description of args, see `final_start_function', above.
1526 PRESCAN is 1 if we are not really outputting,
1527 just scanning as if we were outputting.
1528 Prescanning deletes and rearranges insns just like ordinary output.
1529 PRESCAN is -2 if we are outputting after having prescanned.
1530 In this case, don't try to delete or rearrange insns
1531 because that has already been done.
1532 Prescanning is done only on certain machines. */
1535 final (first
, file
, optimize
, prescan
)
1545 last_ignored_compare
= 0;
1547 /* Make a map indicating which line numbers appear in this function.
1548 When producing SDB debugging info, delete troublesome line number
1549 notes from inlined functions in other files as well as duplicate
1550 line number notes. */
1551 #ifdef SDB_DEBUGGING_INFO
1552 if (write_symbols
== SDB_DEBUG
)
1555 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
1556 if (GET_CODE (insn
) == NOTE
&& NOTE_LINE_NUMBER (insn
) > 0)
1558 if ((RTX_INTEGRATED_P (insn
)
1559 && strcmp (NOTE_SOURCE_FILE (insn
), main_input_filename
) != 0)
1561 && NOTE_LINE_NUMBER (insn
) == NOTE_LINE_NUMBER (last
)
1562 && NOTE_SOURCE_FILE (insn
) == NOTE_SOURCE_FILE (last
)))
1564 delete_insn (insn
); /* Use delete_note. */
1568 if (NOTE_LINE_NUMBER (insn
) > max_line
)
1569 max_line
= NOTE_LINE_NUMBER (insn
);
1575 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
1576 if (GET_CODE (insn
) == NOTE
&& NOTE_LINE_NUMBER (insn
) > max_line
)
1577 max_line
= NOTE_LINE_NUMBER (insn
);
1580 line_note_exists
= (char *) xcalloc (max_line
+ 1, sizeof (char));
1582 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
1584 if (INSN_UID (insn
) > max_uid
) /* find largest UID */
1585 max_uid
= INSN_UID (insn
);
1586 if (GET_CODE (insn
) == NOTE
&& NOTE_LINE_NUMBER (insn
) > 0)
1587 line_note_exists
[NOTE_LINE_NUMBER (insn
)] = 1;
1589 /* If CC tracking across branches is enabled, record the insn which
1590 jumps to each branch only reached from one place. */
1591 if (optimize
&& GET_CODE (insn
) == JUMP_INSN
)
1593 rtx lab
= JUMP_LABEL (insn
);
1594 if (lab
&& LABEL_NUSES (lab
) == 1)
1596 LABEL_REFS (lab
) = insn
;
1606 /* Output the insns. */
1607 for (insn
= NEXT_INSN (first
); insn
;)
1609 #ifdef HAVE_ATTR_length
1610 if ((unsigned) INSN_UID (insn
) >= INSN_ADDRESSES_SIZE ())
1612 /* This can be triggered by bugs elsewhere in the compiler if
1613 new insns are created after init_insn_lengths is called. */
1614 if (GET_CODE (insn
) == NOTE
)
1615 insn_current_address
= -1;
1620 insn_current_address
= INSN_ADDRESSES (INSN_UID (insn
));
1621 #endif /* HAVE_ATTR_length */
1623 insn
= final_scan_insn (insn
, file
, optimize
, prescan
, 0);
1626 free (line_note_exists
);
1627 line_note_exists
= NULL
;
1631 get_insn_template (code
, insn
)
1635 const void *output
= insn_data
[code
].output
;
1636 switch (insn_data
[code
].output_format
)
1638 case INSN_OUTPUT_FORMAT_SINGLE
:
1639 return (const char *) output
;
1640 case INSN_OUTPUT_FORMAT_MULTI
:
1641 return ((const char *const *) output
)[which_alternative
];
1642 case INSN_OUTPUT_FORMAT_FUNCTION
:
1645 return (*(insn_output_fn
) output
) (recog_data
.operand
, insn
);
1652 /* Emit the appropriate declaration for an alternate-entry-point
1653 symbol represented by INSN, to FILE. INSN is a CODE_LABEL with
1654 LABEL_KIND != LABEL_NORMAL.
1656 The case fall-through in this function is intentional. */
1658 output_alternate_entry_point (file
, insn
)
1662 const char *name
= LABEL_NAME (insn
);
1664 switch (LABEL_KIND (insn
))
1666 case LABEL_WEAK_ENTRY
:
1667 #ifdef ASM_WEAKEN_LABEL
1668 ASM_WEAKEN_LABEL (file
, name
);
1670 case LABEL_GLOBAL_ENTRY
:
1671 (*targetm
.asm_out
.globalize_label
) (file
, name
);
1672 case LABEL_STATIC_ENTRY
:
1673 #ifdef ASM_OUTPUT_TYPE_DIRECTIVE
1674 ASM_OUTPUT_TYPE_DIRECTIVE (file
, name
, "function");
1676 ASM_OUTPUT_LABEL (file
, name
);
1685 /* The final scan for one insn, INSN.
1686 Args are same as in `final', except that INSN
1687 is the insn being scanned.
1688 Value returned is the next insn to be scanned.
1690 NOPEEPHOLES is the flag to disallow peephole processing (currently
1691 used for within delayed branch sequence output). */
1694 final_scan_insn (insn
, file
, optimize
, prescan
, nopeepholes
)
1697 int optimize ATTRIBUTE_UNUSED
;
1699 int nopeepholes ATTRIBUTE_UNUSED
;
1707 /* Ignore deleted insns. These can occur when we split insns (due to a
1708 template of "#") while not optimizing. */
1709 if (INSN_DELETED_P (insn
))
1710 return NEXT_INSN (insn
);
1712 switch (GET_CODE (insn
))
1718 switch (NOTE_LINE_NUMBER (insn
))
1720 case NOTE_INSN_DELETED
:
1721 case NOTE_INSN_LOOP_BEG
:
1722 case NOTE_INSN_LOOP_END
:
1723 case NOTE_INSN_LOOP_END_TOP_COND
:
1724 case NOTE_INSN_LOOP_CONT
:
1725 case NOTE_INSN_LOOP_VTOP
:
1726 case NOTE_INSN_FUNCTION_END
:
1727 case NOTE_INSN_REPEATED_LINE_NUMBER
:
1728 case NOTE_INSN_EXPECTED_VALUE
:
1731 case NOTE_INSN_BASIC_BLOCK
:
1732 #ifdef IA64_UNWIND_INFO
1733 IA64_UNWIND_EMIT (asm_out_file
, insn
);
1736 fprintf (asm_out_file
, "\t%s basic block %d\n",
1737 ASM_COMMENT_START
, NOTE_BASIC_BLOCK (insn
)->index
);
1740 case NOTE_INSN_EH_REGION_BEG
:
1741 ASM_OUTPUT_DEBUG_LABEL (asm_out_file
, "LEHB",
1742 NOTE_EH_HANDLER (insn
));
1745 case NOTE_INSN_EH_REGION_END
:
1746 ASM_OUTPUT_DEBUG_LABEL (asm_out_file
, "LEHE",
1747 NOTE_EH_HANDLER (insn
));
1750 case NOTE_INSN_PROLOGUE_END
:
1751 (*targetm
.asm_out
.function_end_prologue
) (file
);
1752 profile_after_prologue (file
);
1755 case NOTE_INSN_EPILOGUE_BEG
:
1756 (*targetm
.asm_out
.function_begin_epilogue
) (file
);
1759 case NOTE_INSN_FUNCTION_BEG
:
1761 (*debug_hooks
->end_prologue
) (last_linenum
, last_filename
);
1764 case NOTE_INSN_BLOCK_BEG
:
1765 if (debug_info_level
== DINFO_LEVEL_NORMAL
1766 || debug_info_level
== DINFO_LEVEL_VERBOSE
1767 || write_symbols
== DWARF_DEBUG
1768 || write_symbols
== DWARF2_DEBUG
1769 || write_symbols
== VMS_AND_DWARF2_DEBUG
1770 || write_symbols
== VMS_DEBUG
)
1772 int n
= BLOCK_NUMBER (NOTE_BLOCK (insn
));
1776 high_block_linenum
= last_linenum
;
1778 /* Output debugging info about the symbol-block beginning. */
1779 (*debug_hooks
->begin_block
) (last_linenum
, n
);
1781 /* Mark this block as output. */
1782 TREE_ASM_WRITTEN (NOTE_BLOCK (insn
)) = 1;
1786 case NOTE_INSN_BLOCK_END
:
1787 if (debug_info_level
== DINFO_LEVEL_NORMAL
1788 || debug_info_level
== DINFO_LEVEL_VERBOSE
1789 || write_symbols
== DWARF_DEBUG
1790 || write_symbols
== DWARF2_DEBUG
1791 || write_symbols
== VMS_AND_DWARF2_DEBUG
1792 || write_symbols
== VMS_DEBUG
)
1794 int n
= BLOCK_NUMBER (NOTE_BLOCK (insn
));
1798 /* End of a symbol-block. */
1800 if (block_depth
< 0)
1803 (*debug_hooks
->end_block
) (high_block_linenum
, n
);
1807 case NOTE_INSN_DELETED_LABEL
:
1808 /* Emit the label. We may have deleted the CODE_LABEL because
1809 the label could be proved to be unreachable, though still
1810 referenced (in the form of having its address taken. */
1811 ASM_OUTPUT_DEBUG_LABEL (file
, "L", CODE_LABEL_NUMBER (insn
));
1818 if (NOTE_LINE_NUMBER (insn
) <= 0)
1821 /* This note is a line-number. */
1826 /* If there is anything real after this note, output it.
1827 If another line note follows, omit this one. */
1828 for (note
= NEXT_INSN (insn
); note
; note
= NEXT_INSN (note
))
1830 if (GET_CODE (note
) != NOTE
&& GET_CODE (note
) != CODE_LABEL
)
1833 /* These types of notes can be significant
1834 so make sure the preceding line number stays. */
1835 else if (GET_CODE (note
) == NOTE
1836 && (NOTE_LINE_NUMBER (note
) == NOTE_INSN_BLOCK_BEG
1837 || NOTE_LINE_NUMBER (note
) == NOTE_INSN_BLOCK_END
1838 || NOTE_LINE_NUMBER (note
) == NOTE_INSN_FUNCTION_BEG
))
1840 else if (GET_CODE (note
) == NOTE
&& NOTE_LINE_NUMBER (note
) > 0)
1842 /* Another line note follows; we can delete this note
1843 if no intervening line numbers have notes elsewhere. */
1845 for (num
= NOTE_LINE_NUMBER (insn
) + 1;
1846 num
< NOTE_LINE_NUMBER (note
);
1848 if (line_note_exists
[num
])
1851 if (num
>= NOTE_LINE_NUMBER (note
))
1857 /* Output this line note if it is the first or the last line
1861 notice_source_line (insn
);
1862 (*debug_hooks
->source_line
) (last_linenum
, last_filename
);
1870 #if defined (DWARF2_UNWIND_INFO)
1871 if (dwarf2out_do_frame ())
1872 dwarf2out_frame_debug (insn
);
1877 /* The target port might emit labels in the output function for
1878 some insn, e.g. sh.c output_branchy_insn. */
1879 if (CODE_LABEL_NUMBER (insn
) <= max_labelno
)
1881 int align
= LABEL_TO_ALIGNMENT (insn
);
1882 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
1883 int max_skip
= LABEL_TO_MAX_SKIP (insn
);
1886 if (align
&& NEXT_INSN (insn
))
1888 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
1889 ASM_OUTPUT_MAX_SKIP_ALIGN (file
, align
, max_skip
);
1891 #ifdef ASM_OUTPUT_ALIGN_WITH_NOP
1892 ASM_OUTPUT_ALIGN_WITH_NOP (file
, align
);
1894 ASM_OUTPUT_ALIGN (file
, align
);
1901 /* If this label is reached from only one place, set the condition
1902 codes from the instruction just before the branch. */
1904 /* Disabled because some insns set cc_status in the C output code
1905 and NOTICE_UPDATE_CC alone can set incorrect status. */
1906 if (0 /* optimize && LABEL_NUSES (insn) == 1*/)
1908 rtx jump
= LABEL_REFS (insn
);
1909 rtx barrier
= prev_nonnote_insn (insn
);
1911 /* If the LABEL_REFS field of this label has been set to point
1912 at a branch, the predecessor of the branch is a regular
1913 insn, and that branch is the only way to reach this label,
1914 set the condition codes based on the branch and its
1916 if (barrier
&& GET_CODE (barrier
) == BARRIER
1917 && jump
&& GET_CODE (jump
) == JUMP_INSN
1918 && (prev
= prev_nonnote_insn (jump
))
1919 && GET_CODE (prev
) == INSN
)
1921 NOTICE_UPDATE_CC (PATTERN (prev
), prev
);
1922 NOTICE_UPDATE_CC (PATTERN (jump
), jump
);
1929 #ifdef FINAL_PRESCAN_LABEL
1930 FINAL_PRESCAN_INSN (insn
, NULL
, 0);
1933 if (LABEL_NAME (insn
))
1934 (*debug_hooks
->label
) (insn
);
1938 fputs (ASM_APP_OFF
, file
);
1941 if (NEXT_INSN (insn
) != 0
1942 && GET_CODE (NEXT_INSN (insn
)) == JUMP_INSN
)
1944 rtx nextbody
= PATTERN (NEXT_INSN (insn
));
1946 /* If this label is followed by a jump-table,
1947 make sure we put the label in the read-only section. Also
1948 possibly write the label and jump table together. */
1950 if (GET_CODE (nextbody
) == ADDR_VEC
1951 || GET_CODE (nextbody
) == ADDR_DIFF_VEC
)
1953 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
1954 /* In this case, the case vector is being moved by the
1955 target, so don't output the label at all. Leave that
1956 to the back end macros. */
1958 if (! JUMP_TABLES_IN_TEXT_SECTION
)
1962 readonly_data_section ();
1964 #ifdef ADDR_VEC_ALIGN
1965 log_align
= ADDR_VEC_ALIGN (NEXT_INSN (insn
));
1967 log_align
= exact_log2 (BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
);
1969 ASM_OUTPUT_ALIGN (file
, log_align
);
1972 function_section (current_function_decl
);
1974 #ifdef ASM_OUTPUT_CASE_LABEL
1975 ASM_OUTPUT_CASE_LABEL (file
, "L", CODE_LABEL_NUMBER (insn
),
1978 (*targetm
.asm_out
.internal_label
) (file
, "L", CODE_LABEL_NUMBER (insn
));
1984 if (LABEL_ALT_ENTRY_P (insn
))
1985 output_alternate_entry_point (file
, insn
);
1987 (*targetm
.asm_out
.internal_label
) (file
, "L", CODE_LABEL_NUMBER (insn
));
1992 rtx body
= PATTERN (insn
);
1993 int insn_code_number
;
1994 const char *template;
1997 /* An INSN, JUMP_INSN or CALL_INSN.
1998 First check for special kinds that recog doesn't recognize. */
2000 if (GET_CODE (body
) == USE
/* These are just declarations */
2001 || GET_CODE (body
) == CLOBBER
)
2005 /* If there is a REG_CC_SETTER note on this insn, it means that
2006 the setting of the condition code was done in the delay slot
2007 of the insn that branched here. So recover the cc status
2008 from the insn that set it. */
2010 note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
2013 NOTICE_UPDATE_CC (PATTERN (XEXP (note
, 0)), XEXP (note
, 0));
2014 cc_prev_status
= cc_status
;
2018 /* Detect insns that are really jump-tables
2019 and output them as such. */
2021 if (GET_CODE (body
) == ADDR_VEC
|| GET_CODE (body
) == ADDR_DIFF_VEC
)
2023 #if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC))
2032 fputs (ASM_APP_OFF
, file
);
2036 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2037 if (GET_CODE (body
) == ADDR_VEC
)
2039 #ifdef ASM_OUTPUT_ADDR_VEC
2040 ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn
), body
);
2047 #ifdef ASM_OUTPUT_ADDR_DIFF_VEC
2048 ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn
), body
);
2054 vlen
= XVECLEN (body
, GET_CODE (body
) == ADDR_DIFF_VEC
);
2055 for (idx
= 0; idx
< vlen
; idx
++)
2057 if (GET_CODE (body
) == ADDR_VEC
)
2059 #ifdef ASM_OUTPUT_ADDR_VEC_ELT
2060 ASM_OUTPUT_ADDR_VEC_ELT
2061 (file
, CODE_LABEL_NUMBER (XEXP (XVECEXP (body
, 0, idx
), 0)));
2068 #ifdef ASM_OUTPUT_ADDR_DIFF_ELT
2069 ASM_OUTPUT_ADDR_DIFF_ELT
2072 CODE_LABEL_NUMBER (XEXP (XVECEXP (body
, 1, idx
), 0)),
2073 CODE_LABEL_NUMBER (XEXP (XEXP (body
, 0), 0)));
2079 #ifdef ASM_OUTPUT_CASE_END
2080 ASM_OUTPUT_CASE_END (file
,
2081 CODE_LABEL_NUMBER (PREV_INSN (insn
)),
2086 function_section (current_function_decl
);
2091 if (GET_CODE (body
) == ASM_INPUT
)
2093 const char *string
= XSTR (body
, 0);
2095 /* There's no telling what that did to the condition codes. */
2104 fputs (ASM_APP_ON
, file
);
2107 fprintf (asm_out_file
, "\t%s\n", string
);
2112 /* Detect `asm' construct with operands. */
2113 if (asm_noperands (body
) >= 0)
2115 unsigned int noperands
= asm_noperands (body
);
2116 rtx
*ops
= (rtx
*) alloca (noperands
* sizeof (rtx
));
2119 /* There's no telling what that did to the condition codes. */
2124 /* Get out the operand values. */
2125 string
= decode_asm_operands (body
, ops
, NULL
, NULL
, NULL
);
2126 /* Inhibit aborts on what would otherwise be compiler bugs. */
2127 insn_noperands
= noperands
;
2128 this_is_asm_operands
= insn
;
2130 /* Output the insn using them. */
2135 fputs (ASM_APP_ON
, file
);
2138 output_asm_insn (string
, ops
);
2141 this_is_asm_operands
= 0;
2145 if (prescan
<= 0 && app_on
)
2147 fputs (ASM_APP_OFF
, file
);
2151 if (GET_CODE (body
) == SEQUENCE
)
2153 /* A delayed-branch sequence */
2159 final_sequence
= body
;
2161 /* The first insn in this SEQUENCE might be a JUMP_INSN that will
2162 force the restoration of a comparison that was previously
2163 thought unnecessary. If that happens, cancel this sequence
2164 and cause that insn to be restored. */
2166 next
= final_scan_insn (XVECEXP (body
, 0, 0), file
, 0, prescan
, 1);
2167 if (next
!= XVECEXP (body
, 0, 1))
2173 for (i
= 1; i
< XVECLEN (body
, 0); i
++)
2175 rtx insn
= XVECEXP (body
, 0, i
);
2176 rtx next
= NEXT_INSN (insn
);
2177 /* We loop in case any instruction in a delay slot gets
2180 insn
= final_scan_insn (insn
, file
, 0, prescan
, 1);
2181 while (insn
!= next
);
2183 #ifdef DBR_OUTPUT_SEQEND
2184 DBR_OUTPUT_SEQEND (file
);
2188 /* If the insn requiring the delay slot was a CALL_INSN, the
2189 insns in the delay slot are actually executed before the
2190 called function. Hence we don't preserve any CC-setting
2191 actions in these insns and the CC must be marked as being
2192 clobbered by the function. */
2193 if (GET_CODE (XVECEXP (body
, 0, 0)) == CALL_INSN
)
2200 /* We have a real machine instruction as rtl. */
2202 body
= PATTERN (insn
);
2205 set
= single_set (insn
);
2207 /* Check for redundant test and compare instructions
2208 (when the condition codes are already set up as desired).
2209 This is done only when optimizing; if not optimizing,
2210 it should be possible for the user to alter a variable
2211 with the debugger in between statements
2212 and the next statement should reexamine the variable
2213 to compute the condition codes. */
2218 rtx set
= single_set (insn
);
2222 && GET_CODE (SET_DEST (set
)) == CC0
2223 && insn
!= last_ignored_compare
)
2225 if (GET_CODE (SET_SRC (set
)) == SUBREG
)
2226 SET_SRC (set
) = alter_subreg (&SET_SRC (set
));
2227 else if (GET_CODE (SET_SRC (set
)) == COMPARE
)
2229 if (GET_CODE (XEXP (SET_SRC (set
), 0)) == SUBREG
)
2230 XEXP (SET_SRC (set
), 0)
2231 = alter_subreg (&XEXP (SET_SRC (set
), 0));
2232 if (GET_CODE (XEXP (SET_SRC (set
), 1)) == SUBREG
)
2233 XEXP (SET_SRC (set
), 1)
2234 = alter_subreg (&XEXP (SET_SRC (set
), 1));
2236 if ((cc_status
.value1
!= 0
2237 && rtx_equal_p (SET_SRC (set
), cc_status
.value1
))
2238 || (cc_status
.value2
!= 0
2239 && rtx_equal_p (SET_SRC (set
), cc_status
.value2
)))
2241 /* Don't delete insn if it has an addressing side-effect. */
2242 if (! FIND_REG_INC_NOTE (insn
, NULL_RTX
)
2243 /* or if anything in it is volatile. */
2244 && ! volatile_refs_p (PATTERN (insn
)))
2246 /* We don't really delete the insn; just ignore it. */
2247 last_ignored_compare
= insn
;
2256 /* Don't bother outputting obvious no-ops, even without -O.
2257 This optimization is fast and doesn't interfere with debugging.
2258 Don't do this if the insn is in a delay slot, since this
2259 will cause an improper number of delay insns to be written. */
2260 if (final_sequence
== 0
2262 && GET_CODE (insn
) == INSN
&& GET_CODE (body
) == SET
2263 && GET_CODE (SET_SRC (body
)) == REG
2264 && GET_CODE (SET_DEST (body
)) == REG
2265 && REGNO (SET_SRC (body
)) == REGNO (SET_DEST (body
)))
2270 /* If this is a conditional branch, maybe modify it
2271 if the cc's are in a nonstandard state
2272 so that it accomplishes the same thing that it would
2273 do straightforwardly if the cc's were set up normally. */
2275 if (cc_status
.flags
!= 0
2276 && GET_CODE (insn
) == JUMP_INSN
2277 && GET_CODE (body
) == SET
2278 && SET_DEST (body
) == pc_rtx
2279 && GET_CODE (SET_SRC (body
)) == IF_THEN_ELSE
2280 && GET_RTX_CLASS (GET_CODE (XEXP (SET_SRC (body
), 0))) == '<'
2281 && XEXP (XEXP (SET_SRC (body
), 0), 0) == cc0_rtx
2282 /* This is done during prescan; it is not done again
2283 in final scan when prescan has been done. */
2286 /* This function may alter the contents of its argument
2287 and clear some of the cc_status.flags bits.
2288 It may also return 1 meaning condition now always true
2289 or -1 meaning condition now always false
2290 or 2 meaning condition nontrivial but altered. */
2291 int result
= alter_cond (XEXP (SET_SRC (body
), 0));
2292 /* If condition now has fixed value, replace the IF_THEN_ELSE
2293 with its then-operand or its else-operand. */
2295 SET_SRC (body
) = XEXP (SET_SRC (body
), 1);
2297 SET_SRC (body
) = XEXP (SET_SRC (body
), 2);
2299 /* The jump is now either unconditional or a no-op.
2300 If it has become a no-op, don't try to output it.
2301 (It would not be recognized.) */
2302 if (SET_SRC (body
) == pc_rtx
)
2307 else if (GET_CODE (SET_SRC (body
)) == RETURN
)
2308 /* Replace (set (pc) (return)) with (return). */
2309 PATTERN (insn
) = body
= SET_SRC (body
);
2311 /* Rerecognize the instruction if it has changed. */
2313 INSN_CODE (insn
) = -1;
2316 /* Make same adjustments to instructions that examine the
2317 condition codes without jumping and instructions that
2318 handle conditional moves (if this machine has either one). */
2320 if (cc_status
.flags
!= 0
2323 rtx cond_rtx
, then_rtx
, else_rtx
;
2325 if (GET_CODE (insn
) != JUMP_INSN
2326 && GET_CODE (SET_SRC (set
)) == IF_THEN_ELSE
)
2328 cond_rtx
= XEXP (SET_SRC (set
), 0);
2329 then_rtx
= XEXP (SET_SRC (set
), 1);
2330 else_rtx
= XEXP (SET_SRC (set
), 2);
2334 cond_rtx
= SET_SRC (set
);
2335 then_rtx
= const_true_rtx
;
2336 else_rtx
= const0_rtx
;
2339 switch (GET_CODE (cond_rtx
))
2353 if (XEXP (cond_rtx
, 0) != cc0_rtx
)
2355 result
= alter_cond (cond_rtx
);
2357 validate_change (insn
, &SET_SRC (set
), then_rtx
, 0);
2358 else if (result
== -1)
2359 validate_change (insn
, &SET_SRC (set
), else_rtx
, 0);
2360 else if (result
== 2)
2361 INSN_CODE (insn
) = -1;
2362 if (SET_DEST (set
) == SET_SRC (set
))
2374 #ifdef HAVE_peephole
2375 /* Do machine-specific peephole optimizations if desired. */
2377 if (optimize
&& !flag_no_peephole
&& !nopeepholes
)
2379 rtx next
= peephole (insn
);
2380 /* When peepholing, if there were notes within the peephole,
2381 emit them before the peephole. */
2382 if (next
!= 0 && next
!= NEXT_INSN (insn
))
2384 rtx prev
= PREV_INSN (insn
);
2386 for (note
= NEXT_INSN (insn
); note
!= next
;
2387 note
= NEXT_INSN (note
))
2388 final_scan_insn (note
, file
, optimize
, prescan
, nopeepholes
);
2390 /* In case this is prescan, put the notes
2391 in proper position for later rescan. */
2392 note
= NEXT_INSN (insn
);
2393 PREV_INSN (note
) = prev
;
2394 NEXT_INSN (prev
) = note
;
2395 NEXT_INSN (PREV_INSN (next
)) = insn
;
2396 PREV_INSN (insn
) = PREV_INSN (next
);
2397 NEXT_INSN (insn
) = next
;
2398 PREV_INSN (next
) = insn
;
2401 /* PEEPHOLE might have changed this. */
2402 body
= PATTERN (insn
);
2406 /* Try to recognize the instruction.
2407 If successful, verify that the operands satisfy the
2408 constraints for the instruction. Crash if they don't,
2409 since `reload' should have changed them so that they do. */
2411 insn_code_number
= recog_memoized (insn
);
2412 cleanup_subreg_operands (insn
);
2414 /* Dump the insn in the assembly for debugging. */
2415 if (flag_dump_rtl_in_asm
)
2417 print_rtx_head
= ASM_COMMENT_START
;
2418 print_rtl_single (asm_out_file
, insn
);
2419 print_rtx_head
= "";
2422 if (! constrain_operands_cached (1))
2423 fatal_insn_not_found (insn
);
2425 /* Some target machines need to prescan each insn before
2428 #ifdef FINAL_PRESCAN_INSN
2429 FINAL_PRESCAN_INSN (insn
, recog_data
.operand
, recog_data
.n_operands
);
2432 #ifdef HAVE_conditional_execution
2433 if (GET_CODE (PATTERN (insn
)) == COND_EXEC
)
2434 current_insn_predicate
= COND_EXEC_TEST (PATTERN (insn
));
2436 current_insn_predicate
= NULL_RTX
;
2440 cc_prev_status
= cc_status
;
2442 /* Update `cc_status' for this instruction.
2443 The instruction's output routine may change it further.
2444 If the output routine for a jump insn needs to depend
2445 on the cc status, it should look at cc_prev_status. */
2447 NOTICE_UPDATE_CC (body
, insn
);
2450 current_output_insn
= debug_insn
= insn
;
2452 #if defined (DWARF2_UNWIND_INFO)
2453 if (GET_CODE (insn
) == CALL_INSN
&& dwarf2out_do_frame ())
2454 dwarf2out_frame_debug (insn
);
2457 /* Find the proper template for this insn. */
2458 template = get_insn_template (insn_code_number
, insn
);
2460 /* If the C code returns 0, it means that it is a jump insn
2461 which follows a deleted test insn, and that test insn
2462 needs to be reinserted. */
2467 if (prev_nonnote_insn (insn
) != last_ignored_compare
)
2470 /* We have already processed the notes between the setter and
2471 the user. Make sure we don't process them again, this is
2472 particularly important if one of the notes is a block
2473 scope note or an EH note. */
2475 prev
!= last_ignored_compare
;
2476 prev
= PREV_INSN (prev
))
2478 if (GET_CODE (prev
) == NOTE
)
2479 delete_insn (prev
); /* Use delete_note. */
2485 /* If the template is the string "#", it means that this insn must
2487 if (template[0] == '#' && template[1] == '\0')
2489 rtx
new = try_split (body
, insn
, 0);
2491 /* If we didn't split the insn, go away. */
2492 if (new == insn
&& PATTERN (new) == body
)
2493 fatal_insn ("could not split insn", insn
);
2495 #ifdef HAVE_ATTR_length
2496 /* This instruction should have been split in shorten_branches,
2497 to ensure that we would have valid length info for the
2508 #ifdef IA64_UNWIND_INFO
2509 IA64_UNWIND_EMIT (asm_out_file
, insn
);
2511 /* Output assembler code from the template. */
2513 output_asm_insn (template, recog_data
.operand
);
2515 #if defined (DWARF2_UNWIND_INFO)
2516 #if defined (HAVE_prologue)
2517 if (GET_CODE (insn
) == INSN
&& dwarf2out_do_frame ())
2518 dwarf2out_frame_debug (insn
);
2520 if (!ACCUMULATE_OUTGOING_ARGS
2521 && GET_CODE (insn
) == INSN
2522 && dwarf2out_do_frame ())
2523 dwarf2out_frame_debug (insn
);
2528 /* It's not at all clear why we did this and doing so interferes
2529 with tests we'd like to do to use REG_WAS_0 notes, so let's try
2532 /* Mark this insn as having been output. */
2533 INSN_DELETED_P (insn
) = 1;
2536 /* Emit information for vtable gc. */
2537 note
= find_reg_note (insn
, REG_VTABLE_REF
, NULL_RTX
);
2539 assemble_vtable_entry (XEXP (XEXP (note
, 0), 0),
2540 INTVAL (XEXP (XEXP (note
, 0), 1)));
2542 current_output_insn
= debug_insn
= 0;
2545 return NEXT_INSN (insn
);
2548 /* Output debugging info to the assembler file FILE
2549 based on the NOTE-insn INSN, assumed to be a line number. */
2552 notice_source_line (insn
)
2555 const char *filename
= NOTE_SOURCE_FILE (insn
);
2557 last_filename
= filename
;
2558 last_linenum
= NOTE_LINE_NUMBER (insn
);
2559 high_block_linenum
= MAX (last_linenum
, high_block_linenum
);
2560 high_function_linenum
= MAX (last_linenum
, high_function_linenum
);
2563 /* For each operand in INSN, simplify (subreg (reg)) so that it refers
2564 directly to the desired hard register. */
2567 cleanup_subreg_operands (insn
)
2571 extract_insn_cached (insn
);
2572 for (i
= 0; i
< recog_data
.n_operands
; i
++)
2574 /* The following test cannot use recog_data.operand when tesing
2575 for a SUBREG: the underlying object might have been changed
2576 already if we are inside a match_operator expression that
2577 matches the else clause. Instead we test the underlying
2578 expression directly. */
2579 if (GET_CODE (*recog_data
.operand_loc
[i
]) == SUBREG
)
2580 recog_data
.operand
[i
] = alter_subreg (recog_data
.operand_loc
[i
]);
2581 else if (GET_CODE (recog_data
.operand
[i
]) == PLUS
2582 || GET_CODE (recog_data
.operand
[i
]) == MULT
2583 || GET_CODE (recog_data
.operand
[i
]) == MEM
)
2584 recog_data
.operand
[i
] = walk_alter_subreg (recog_data
.operand_loc
[i
]);
2587 for (i
= 0; i
< recog_data
.n_dups
; i
++)
2589 if (GET_CODE (*recog_data
.dup_loc
[i
]) == SUBREG
)
2590 *recog_data
.dup_loc
[i
] = alter_subreg (recog_data
.dup_loc
[i
]);
2591 else if (GET_CODE (*recog_data
.dup_loc
[i
]) == PLUS
2592 || GET_CODE (*recog_data
.dup_loc
[i
]) == MULT
2593 || GET_CODE (*recog_data
.dup_loc
[i
]) == MEM
)
2594 *recog_data
.dup_loc
[i
] = walk_alter_subreg (recog_data
.dup_loc
[i
]);
2598 /* If X is a SUBREG, replace it with a REG or a MEM,
2599 based on the thing it is a subreg of. */
2606 rtx y
= SUBREG_REG (x
);
2608 /* simplify_subreg does not remove subreg from volatile references.
2609 We are required to. */
2610 if (GET_CODE (y
) == MEM
)
2611 *xp
= adjust_address (y
, GET_MODE (x
), SUBREG_BYTE (x
));
2614 rtx
new = simplify_subreg (GET_MODE (x
), y
, GET_MODE (y
),
2619 /* Simplify_subreg can't handle some REG cases, but we have to. */
2620 else if (GET_CODE (y
) == REG
)
2622 unsigned int regno
= subreg_hard_regno (x
, 1);
2625 ORIGINAL_REGNO (x
) = ORIGINAL_REGNO (y
);
2626 /* This field has a different meaning for REGs and SUBREGs. Make
2627 sure to clear it! */
2628 RTX_FLAG (x
, used
) = 0;
2637 /* Do alter_subreg on all the SUBREGs contained in X. */
2640 walk_alter_subreg (xp
)
2644 switch (GET_CODE (x
))
2648 XEXP (x
, 0) = walk_alter_subreg (&XEXP (x
, 0));
2649 XEXP (x
, 1) = walk_alter_subreg (&XEXP (x
, 1));
2653 XEXP (x
, 0) = walk_alter_subreg (&XEXP (x
, 0));
2657 return alter_subreg (xp
);
2668 /* Given BODY, the body of a jump instruction, alter the jump condition
2669 as required by the bits that are set in cc_status.flags.
2670 Not all of the bits there can be handled at this level in all cases.
2672 The value is normally 0.
2673 1 means that the condition has become always true.
2674 -1 means that the condition has become always false.
2675 2 means that COND has been altered. */
2683 if (cc_status
.flags
& CC_REVERSED
)
2686 PUT_CODE (cond
, swap_condition (GET_CODE (cond
)));
2689 if (cc_status
.flags
& CC_INVERTED
)
2692 PUT_CODE (cond
, reverse_condition (GET_CODE (cond
)));
2695 if (cc_status
.flags
& CC_NOT_POSITIVE
)
2696 switch (GET_CODE (cond
))
2701 /* Jump becomes unconditional. */
2707 /* Jump becomes no-op. */
2711 PUT_CODE (cond
, EQ
);
2716 PUT_CODE (cond
, NE
);
2724 if (cc_status
.flags
& CC_NOT_NEGATIVE
)
2725 switch (GET_CODE (cond
))
2729 /* Jump becomes unconditional. */
2734 /* Jump becomes no-op. */
2739 PUT_CODE (cond
, EQ
);
2745 PUT_CODE (cond
, NE
);
2753 if (cc_status
.flags
& CC_NO_OVERFLOW
)
2754 switch (GET_CODE (cond
))
2757 /* Jump becomes unconditional. */
2761 PUT_CODE (cond
, EQ
);
2766 PUT_CODE (cond
, NE
);
2771 /* Jump becomes no-op. */
2778 if (cc_status
.flags
& (CC_Z_IN_NOT_N
| CC_Z_IN_N
))
2779 switch (GET_CODE (cond
))
2785 PUT_CODE (cond
, cc_status
.flags
& CC_Z_IN_N
? GE
: LT
);
2790 PUT_CODE (cond
, cc_status
.flags
& CC_Z_IN_N
? LT
: GE
);
2795 if (cc_status
.flags
& CC_NOT_SIGNED
)
2796 /* The flags are valid if signed condition operators are converted
2798 switch (GET_CODE (cond
))
2801 PUT_CODE (cond
, LEU
);
2806 PUT_CODE (cond
, LTU
);
2811 PUT_CODE (cond
, GTU
);
2816 PUT_CODE (cond
, GEU
);
2828 /* Report inconsistency between the assembler template and the operands.
2829 In an `asm', it's the user's fault; otherwise, the compiler's fault. */
2832 output_operand_lossage
VPARAMS ((const char *msgid
, ...))
2836 const char *pfx_str
;
2837 VA_OPEN (ap
, msgid
);
2838 VA_FIXEDARG (ap
, const char *, msgid
);
2840 pfx_str
= this_is_asm_operands
? _("invalid `asm': ") : "output_operand: ";
2841 asprintf (&fmt_string
, "%s%s", pfx_str
, _(msgid
));
2842 vasprintf (&new_message
, fmt_string
, ap
);
2844 if (this_is_asm_operands
)
2845 error_for_asm (this_is_asm_operands
, "%s", new_message
);
2847 internal_error ("%s", new_message
);
2854 /* Output of assembler code from a template, and its subroutines. */
2856 /* Annotate the assembly with a comment describing the pattern and
2857 alternative used. */
2864 int num
= INSN_CODE (debug_insn
);
2865 fprintf (asm_out_file
, "\t%s %d\t%s",
2866 ASM_COMMENT_START
, INSN_UID (debug_insn
),
2867 insn_data
[num
].name
);
2868 if (insn_data
[num
].n_alternatives
> 1)
2869 fprintf (asm_out_file
, "/%d", which_alternative
+ 1);
2870 #ifdef HAVE_ATTR_length
2871 fprintf (asm_out_file
, "\t[length = %d]",
2872 get_attr_length (debug_insn
));
2874 /* Clear this so only the first assembler insn
2875 of any rtl insn will get the special comment for -dp. */
2880 /* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it
2881 or its address, return that expr . Set *PADDRESSP to 1 if the expr
2882 corresponds to the address of the object and 0 if to the object. */
2885 get_mem_expr_from_op (op
, paddressp
)
2897 if (GET_CODE (op
) == REG
&& ORIGINAL_REGNO (op
) >= FIRST_PSEUDO_REGISTER
)
2898 return REGNO_DECL (ORIGINAL_REGNO (op
));
2899 else if (GET_CODE (op
) != MEM
)
2902 if (MEM_EXPR (op
) != 0)
2903 return MEM_EXPR (op
);
2905 /* Otherwise we have an address, so indicate it and look at the address. */
2909 /* First check if we have a decl for the address, then look at the right side
2910 if it is a PLUS. Otherwise, strip off arithmetic and keep looking.
2911 But don't allow the address to itself be indirect. */
2912 if ((expr
= get_mem_expr_from_op (op
, &inner_addressp
)) && ! inner_addressp
)
2914 else if (GET_CODE (op
) == PLUS
2915 && (expr
= get_mem_expr_from_op (XEXP (op
, 1), &inner_addressp
)))
2918 while (GET_RTX_CLASS (GET_CODE (op
)) == '1'
2919 || GET_RTX_CLASS (GET_CODE (op
)) == '2')
2922 expr
= get_mem_expr_from_op (op
, &inner_addressp
);
2923 return inner_addressp
? 0 : expr
;
2926 /* Output operand names for assembler instructions. OPERANDS is the
2927 operand vector, OPORDER is the order to write the operands, and NOPS
2928 is the number of operands to write. */
2931 output_asm_operand_names (operands
, oporder
, nops
)
2939 for (i
= 0; i
< nops
; i
++)
2942 tree expr
= get_mem_expr_from_op (operands
[oporder
[i
]], &addressp
);
2946 fprintf (asm_out_file
, "%c%s %s",
2947 wrote
? ',' : '\t', wrote
? "" : ASM_COMMENT_START
,
2948 addressp
? "*" : "");
2949 print_mem_expr (asm_out_file
, expr
);
2955 /* Output text from TEMPLATE to the assembler output file,
2956 obeying %-directions to substitute operands taken from
2957 the vector OPERANDS.
2959 %N (for N a digit) means print operand N in usual manner.
2960 %lN means require operand N to be a CODE_LABEL or LABEL_REF
2961 and print the label name with no punctuation.
2962 %cN means require operand N to be a constant
2963 and print the constant expression with no punctuation.
2964 %aN means expect operand N to be a memory address
2965 (not a memory reference!) and print a reference
2967 %nN means expect operand N to be a constant
2968 and print a constant expression for minus the value
2969 of the operand, with no other punctuation. */
2972 output_asm_insn (template, operands
)
2973 const char *template;
2978 #ifdef ASSEMBLER_DIALECT
2981 int oporder
[MAX_RECOG_OPERANDS
];
2982 char opoutput
[MAX_RECOG_OPERANDS
];
2985 /* An insn may return a null string template
2986 in a case where no assembler code is needed. */
2990 memset (opoutput
, 0, sizeof opoutput
);
2992 putc ('\t', asm_out_file
);
2994 #ifdef ASM_OUTPUT_OPCODE
2995 ASM_OUTPUT_OPCODE (asm_out_file
, p
);
3002 if (flag_verbose_asm
)
3003 output_asm_operand_names (operands
, oporder
, ops
);
3004 if (flag_print_asm_name
)
3008 memset (opoutput
, 0, sizeof opoutput
);
3010 putc (c
, asm_out_file
);
3011 #ifdef ASM_OUTPUT_OPCODE
3012 while ((c
= *p
) == '\t')
3014 putc (c
, asm_out_file
);
3017 ASM_OUTPUT_OPCODE (asm_out_file
, p
);
3021 #ifdef ASSEMBLER_DIALECT
3027 output_operand_lossage ("nested assembly dialect alternatives");
3031 /* If we want the first dialect, do nothing. Otherwise, skip
3032 DIALECT_NUMBER of strings ending with '|'. */
3033 for (i
= 0; i
< dialect_number
; i
++)
3035 while (*p
&& *p
!= '}' && *p
++ != '|')
3044 output_operand_lossage ("unterminated assembly dialect alternative");
3051 /* Skip to close brace. */
3056 output_operand_lossage ("unterminated assembly dialect alternative");
3060 while (*p
++ != '}');
3064 putc (c
, asm_out_file
);
3069 putc (c
, asm_out_file
);
3075 /* %% outputs a single %. */
3079 putc (c
, asm_out_file
);
3081 /* %= outputs a number which is unique to each insn in the entire
3082 compilation. This is useful for making local labels that are
3083 referred to more than once in a given insn. */
3087 fprintf (asm_out_file
, "%d", insn_counter
);
3089 /* % followed by a letter and some digits
3090 outputs an operand in a special way depending on the letter.
3091 Letters `acln' are implemented directly.
3092 Other letters are passed to `output_operand' so that
3093 the PRINT_OPERAND macro can define them. */
3094 else if (ISALPHA (*p
))
3100 output_operand_lossage ("operand number missing after %%-letter");
3101 else if (this_is_asm_operands
3102 && (c
< 0 || (unsigned int) c
>= insn_noperands
))
3103 output_operand_lossage ("operand number out of range");
3104 else if (letter
== 'l')
3105 output_asm_label (operands
[c
]);
3106 else if (letter
== 'a')
3107 output_address (operands
[c
]);
3108 else if (letter
== 'c')
3110 if (CONSTANT_ADDRESS_P (operands
[c
]))
3111 output_addr_const (asm_out_file
, operands
[c
]);
3113 output_operand (operands
[c
], 'c');
3115 else if (letter
== 'n')
3117 if (GET_CODE (operands
[c
]) == CONST_INT
)
3118 fprintf (asm_out_file
, HOST_WIDE_INT_PRINT_DEC
,
3119 - INTVAL (operands
[c
]));
3122 putc ('-', asm_out_file
);
3123 output_addr_const (asm_out_file
, operands
[c
]);
3127 output_operand (operands
[c
], letter
);
3133 while (ISDIGIT (c
= *p
))
3136 /* % followed by a digit outputs an operand the default way. */
3137 else if (ISDIGIT (*p
))
3140 if (this_is_asm_operands
3141 && (c
< 0 || (unsigned int) c
>= insn_noperands
))
3142 output_operand_lossage ("operand number out of range");
3144 output_operand (operands
[c
], 0);
3150 while (ISDIGIT (c
= *p
))
3153 /* % followed by punctuation: output something for that
3154 punctuation character alone, with no operand.
3155 The PRINT_OPERAND macro decides what is actually done. */
3156 #ifdef PRINT_OPERAND_PUNCT_VALID_P
3157 else if (PRINT_OPERAND_PUNCT_VALID_P ((unsigned char) *p
))
3158 output_operand (NULL_RTX
, *p
++);
3161 output_operand_lossage ("invalid %%-code");
3165 putc (c
, asm_out_file
);
3168 /* Write out the variable names for operands, if we know them. */
3169 if (flag_verbose_asm
)
3170 output_asm_operand_names (operands
, oporder
, ops
);
3171 if (flag_print_asm_name
)
3174 putc ('\n', asm_out_file
);
3177 /* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */
3180 output_asm_label (x
)
3185 if (GET_CODE (x
) == LABEL_REF
)
3187 if (GET_CODE (x
) == CODE_LABEL
3188 || (GET_CODE (x
) == NOTE
3189 && NOTE_LINE_NUMBER (x
) == NOTE_INSN_DELETED_LABEL
))
3190 ASM_GENERATE_INTERNAL_LABEL (buf
, "L", CODE_LABEL_NUMBER (x
));
3192 output_operand_lossage ("`%%l' operand isn't a label");
3194 assemble_name (asm_out_file
, buf
);
3197 /* Print operand X using machine-dependent assembler syntax.
3198 The macro PRINT_OPERAND is defined just to control this function.
3199 CODE is a non-digit that preceded the operand-number in the % spec,
3200 such as 'z' if the spec was `%z3'. CODE is 0 if there was no char
3201 between the % and the digits.
3202 When CODE is a non-letter, X is 0.
3204 The meanings of the letters are machine-dependent and controlled
3205 by PRINT_OPERAND. */
3208 output_operand (x
, code
)
3210 int code ATTRIBUTE_UNUSED
;
3212 if (x
&& GET_CODE (x
) == SUBREG
)
3213 x
= alter_subreg (&x
);
3215 /* If X is a pseudo-register, abort now rather than writing trash to the
3218 if (x
&& GET_CODE (x
) == REG
&& REGNO (x
) >= FIRST_PSEUDO_REGISTER
)
3221 PRINT_OPERAND (asm_out_file
, x
, code
);
3224 /* Print a memory reference operand for address X
3225 using machine-dependent assembler syntax.
3226 The macro PRINT_OPERAND_ADDRESS exists just to control this function. */
3232 walk_alter_subreg (&x
);
3233 PRINT_OPERAND_ADDRESS (asm_out_file
, x
);
3236 /* Print an integer constant expression in assembler syntax.
3237 Addition and subtraction are the only arithmetic
3238 that may appear in these expressions. */
3241 output_addr_const (file
, x
)
3248 switch (GET_CODE (x
))
3255 #ifdef ASM_OUTPUT_SYMBOL_REF
3256 ASM_OUTPUT_SYMBOL_REF (file
, x
);
3258 assemble_name (file
, XSTR (x
, 0));
3266 ASM_GENERATE_INTERNAL_LABEL (buf
, "L", CODE_LABEL_NUMBER (x
));
3267 #ifdef ASM_OUTPUT_LABEL_REF
3268 ASM_OUTPUT_LABEL_REF (file
, buf
);
3270 assemble_name (file
, buf
);
3275 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, INTVAL (x
));
3279 /* This used to output parentheses around the expression,
3280 but that does not work on the 386 (either ATT or BSD assembler). */
3281 output_addr_const (file
, XEXP (x
, 0));
3285 if (GET_MODE (x
) == VOIDmode
)
3287 /* We can use %d if the number is one word and positive. */
3288 if (CONST_DOUBLE_HIGH (x
))
3289 fprintf (file
, HOST_WIDE_INT_PRINT_DOUBLE_HEX
,
3290 CONST_DOUBLE_HIGH (x
), CONST_DOUBLE_LOW (x
));
3291 else if (CONST_DOUBLE_LOW (x
) < 0)
3292 fprintf (file
, HOST_WIDE_INT_PRINT_HEX
, CONST_DOUBLE_LOW (x
));
3294 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, CONST_DOUBLE_LOW (x
));
3297 /* We can't handle floating point constants;
3298 PRINT_OPERAND must handle them. */
3299 output_operand_lossage ("floating constant misused");
3303 /* Some assemblers need integer constants to appear last (eg masm). */
3304 if (GET_CODE (XEXP (x
, 0)) == CONST_INT
)
3306 output_addr_const (file
, XEXP (x
, 1));
3307 if (INTVAL (XEXP (x
, 0)) >= 0)
3308 fprintf (file
, "+");
3309 output_addr_const (file
, XEXP (x
, 0));
3313 output_addr_const (file
, XEXP (x
, 0));
3314 if (GET_CODE (XEXP (x
, 1)) != CONST_INT
3315 || INTVAL (XEXP (x
, 1)) >= 0)
3316 fprintf (file
, "+");
3317 output_addr_const (file
, XEXP (x
, 1));
3322 /* Avoid outputting things like x-x or x+5-x,
3323 since some assemblers can't handle that. */
3324 x
= simplify_subtraction (x
);
3325 if (GET_CODE (x
) != MINUS
)
3328 output_addr_const (file
, XEXP (x
, 0));
3329 fprintf (file
, "-");
3330 if ((GET_CODE (XEXP (x
, 1)) == CONST_INT
&& INTVAL (XEXP (x
, 1)) >= 0)
3331 || GET_CODE (XEXP (x
, 1)) == PC
3332 || GET_CODE (XEXP (x
, 1)) == SYMBOL_REF
)
3333 output_addr_const (file
, XEXP (x
, 1));
3336 fputs (targetm
.asm_out
.open_paren
, file
);
3337 output_addr_const (file
, XEXP (x
, 1));
3338 fputs (targetm
.asm_out
.close_paren
, file
);
3345 output_addr_const (file
, XEXP (x
, 0));
3349 #ifdef OUTPUT_ADDR_CONST_EXTRA
3350 OUTPUT_ADDR_CONST_EXTRA (file
, x
, fail
);
3355 output_operand_lossage ("invalid expression as operand");
3359 /* A poor man's fprintf, with the added features of %I, %R, %L, and %U.
3360 %R prints the value of REGISTER_PREFIX.
3361 %L prints the value of LOCAL_LABEL_PREFIX.
3362 %U prints the value of USER_LABEL_PREFIX.
3363 %I prints the value of IMMEDIATE_PREFIX.
3364 %O runs ASM_OUTPUT_OPCODE to transform what follows in the string.
3365 Also supported are %d, %x, %s, %e, %f, %g and %%.
3367 We handle alternate assembler dialects here, just like output_asm_insn. */
3370 asm_fprintf
VPARAMS ((FILE *file
, const char *p
, ...))
3375 VA_OPEN (argptr
, p
);
3376 VA_FIXEDARG (argptr
, FILE *, file
);
3377 VA_FIXEDARG (argptr
, const char *, p
);
3384 #ifdef ASSEMBLER_DIALECT
3389 /* If we want the first dialect, do nothing. Otherwise, skip
3390 DIALECT_NUMBER of strings ending with '|'. */
3391 for (i
= 0; i
< dialect_number
; i
++)
3393 while (*p
&& *p
++ != '|')
3403 /* Skip to close brace. */
3404 while (*p
&& *p
++ != '}')
3415 while (ISDIGIT (c
) || c
== '.')
3423 fprintf (file
, "%%");
3426 case 'd': case 'i': case 'u':
3427 case 'x': case 'p': case 'X':
3431 fprintf (file
, buf
, va_arg (argptr
, int));
3435 /* This is a prefix to the 'd', 'i', 'u', 'x', 'p', and 'X' cases,
3436 but we do not check for those cases. It means that the value
3437 is a HOST_WIDE_INT, which may be either `int' or `long'. */
3439 #if HOST_BITS_PER_WIDE_INT == HOST_BITS_PER_INT
3441 #if HOST_BITS_PER_WIDE_INT == HOST_BITS_PER_LONG
3451 fprintf (file
, buf
, va_arg (argptr
, HOST_WIDE_INT
));
3458 fprintf (file
, buf
, va_arg (argptr
, long));
3466 fprintf (file
, buf
, va_arg (argptr
, double));
3472 fprintf (file
, buf
, va_arg (argptr
, char *));
3476 #ifdef ASM_OUTPUT_OPCODE
3477 ASM_OUTPUT_OPCODE (asm_out_file
, p
);
3482 #ifdef REGISTER_PREFIX
3483 fprintf (file
, "%s", REGISTER_PREFIX
);
3488 #ifdef IMMEDIATE_PREFIX
3489 fprintf (file
, "%s", IMMEDIATE_PREFIX
);
3494 #ifdef LOCAL_LABEL_PREFIX
3495 fprintf (file
, "%s", LOCAL_LABEL_PREFIX
);
3500 fputs (user_label_prefix
, file
);
3503 #ifdef ASM_FPRINTF_EXTENSIONS
3504 /* Upper case letters are reserved for general use by asm_fprintf
3505 and so are not available to target specific code. In order to
3506 prevent the ASM_FPRINTF_EXTENSIONS macro from using them then,
3507 they are defined here. As they get turned into real extensions
3508 to asm_fprintf they should be removed from this list. */
3509 case 'A': case 'B': case 'C': case 'D': case 'E':
3510 case 'F': case 'G': case 'H': case 'J': case 'K':
3511 case 'M': case 'N': case 'P': case 'Q': case 'S':
3512 case 'T': case 'V': case 'W': case 'Y': case 'Z':
3515 ASM_FPRINTF_EXTENSIONS (file
, argptr
, p
)
3528 /* Split up a CONST_DOUBLE or integer constant rtx
3529 into two rtx's for single words,
3530 storing in *FIRST the word that comes first in memory in the target
3531 and in *SECOND the other. */
3534 split_double (value
, first
, second
)
3536 rtx
*first
, *second
;
3538 if (GET_CODE (value
) == CONST_INT
)
3540 if (HOST_BITS_PER_WIDE_INT
>= (2 * BITS_PER_WORD
))
3542 /* In this case the CONST_INT holds both target words.
3543 Extract the bits from it into two word-sized pieces.
3544 Sign extend each half to HOST_WIDE_INT. */
3545 unsigned HOST_WIDE_INT low
, high
;
3546 unsigned HOST_WIDE_INT mask
, sign_bit
, sign_extend
;
3548 /* Set sign_bit to the most significant bit of a word. */
3550 sign_bit
<<= BITS_PER_WORD
- 1;
3552 /* Set mask so that all bits of the word are set. We could
3553 have used 1 << BITS_PER_WORD instead of basing the
3554 calculation on sign_bit. However, on machines where
3555 HOST_BITS_PER_WIDE_INT == BITS_PER_WORD, it could cause a
3556 compiler warning, even though the code would never be
3558 mask
= sign_bit
<< 1;
3561 /* Set sign_extend as any remaining bits. */
3562 sign_extend
= ~mask
;
3564 /* Pick the lower word and sign-extend it. */
3565 low
= INTVAL (value
);
3570 /* Pick the higher word, shifted to the least significant
3571 bits, and sign-extend it. */
3572 high
= INTVAL (value
);
3573 high
>>= BITS_PER_WORD
- 1;
3576 if (high
& sign_bit
)
3577 high
|= sign_extend
;
3579 /* Store the words in the target machine order. */
3580 if (WORDS_BIG_ENDIAN
)
3582 *first
= GEN_INT (high
);
3583 *second
= GEN_INT (low
);
3587 *first
= GEN_INT (low
);
3588 *second
= GEN_INT (high
);
3593 /* The rule for using CONST_INT for a wider mode
3594 is that we regard the value as signed.
3595 So sign-extend it. */
3596 rtx high
= (INTVAL (value
) < 0 ? constm1_rtx
: const0_rtx
);
3597 if (WORDS_BIG_ENDIAN
)
3609 else if (GET_CODE (value
) != CONST_DOUBLE
)
3611 if (WORDS_BIG_ENDIAN
)
3613 *first
= const0_rtx
;
3619 *second
= const0_rtx
;
3622 else if (GET_MODE (value
) == VOIDmode
3623 /* This is the old way we did CONST_DOUBLE integers. */
3624 || GET_MODE_CLASS (GET_MODE (value
)) == MODE_INT
)
3626 /* In an integer, the words are defined as most and least significant.
3627 So order them by the target's convention. */
3628 if (WORDS_BIG_ENDIAN
)
3630 *first
= GEN_INT (CONST_DOUBLE_HIGH (value
));
3631 *second
= GEN_INT (CONST_DOUBLE_LOW (value
));
3635 *first
= GEN_INT (CONST_DOUBLE_LOW (value
));
3636 *second
= GEN_INT (CONST_DOUBLE_HIGH (value
));
3643 REAL_VALUE_FROM_CONST_DOUBLE (r
, value
);
3645 /* Note, this converts the REAL_VALUE_TYPE to the target's
3646 format, splits up the floating point double and outputs
3647 exactly 32 bits of it into each of l[0] and l[1] --
3648 not necessarily BITS_PER_WORD bits. */
3649 REAL_VALUE_TO_TARGET_DOUBLE (r
, l
);
3651 /* If 32 bits is an entire word for the target, but not for the host,
3652 then sign-extend on the host so that the number will look the same
3653 way on the host that it would on the target. See for instance
3654 simplify_unary_operation. The #if is needed to avoid compiler
3657 #if HOST_BITS_PER_LONG > 32
3658 if (BITS_PER_WORD
< HOST_BITS_PER_LONG
&& BITS_PER_WORD
== 32)
3660 if (l
[0] & ((long) 1 << 31))
3661 l
[0] |= ((long) (-1) << 32);
3662 if (l
[1] & ((long) 1 << 31))
3663 l
[1] |= ((long) (-1) << 32);
3667 *first
= GEN_INT ((HOST_WIDE_INT
) l
[0]);
3668 *second
= GEN_INT ((HOST_WIDE_INT
) l
[1]);
3672 /* Return nonzero if this function has no function calls. */
3680 if (current_function_profile
|| profile_arc_flag
)
3683 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
3685 if (GET_CODE (insn
) == CALL_INSN
3686 && ! SIBLING_CALL_P (insn
))
3688 if (GET_CODE (insn
) == INSN
3689 && GET_CODE (PATTERN (insn
)) == SEQUENCE
3690 && GET_CODE (XVECEXP (PATTERN (insn
), 0, 0)) == CALL_INSN
3691 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn
), 0, 0)))
3694 for (link
= current_function_epilogue_delay_list
;
3696 link
= XEXP (link
, 1))
3698 insn
= XEXP (link
, 0);
3700 if (GET_CODE (insn
) == CALL_INSN
3701 && ! SIBLING_CALL_P (insn
))
3703 if (GET_CODE (insn
) == INSN
3704 && GET_CODE (PATTERN (insn
)) == SEQUENCE
3705 && GET_CODE (XVECEXP (PATTERN (insn
), 0, 0)) == CALL_INSN
3706 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn
), 0, 0)))
3713 /* Return 1 if branch is a forward branch.
3714 Uses insn_shuid array, so it works only in the final pass. May be used by
3715 output templates to customary add branch prediction hints.
3718 final_forward_branch_p (insn
)
3721 int insn_id
, label_id
;
3724 insn_id
= INSN_SHUID (insn
);
3725 label_id
= INSN_SHUID (JUMP_LABEL (insn
));
3726 /* We've hit some insns that does not have id information available. */
3727 if (!insn_id
|| !label_id
)
3729 return insn_id
< label_id
;
3732 /* On some machines, a function with no call insns
3733 can run faster if it doesn't create its own register window.
3734 When output, the leaf function should use only the "output"
3735 registers. Ordinarily, the function would be compiled to use
3736 the "input" registers to find its arguments; it is a candidate
3737 for leaf treatment if it uses only the "input" registers.
3738 Leaf function treatment means renumbering so the function
3739 uses the "output" registers instead. */
3741 #ifdef LEAF_REGISTERS
3743 /* Return 1 if this function uses only the registers that can be
3744 safely renumbered. */
3747 only_leaf_regs_used ()
3750 const char *const permitted_reg_in_leaf_functions
= LEAF_REGISTERS
;
3752 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
3753 if ((regs_ever_live
[i
] || global_regs
[i
])
3754 && ! permitted_reg_in_leaf_functions
[i
])
3757 if (current_function_uses_pic_offset_table
3758 && pic_offset_table_rtx
!= 0
3759 && GET_CODE (pic_offset_table_rtx
) == REG
3760 && ! permitted_reg_in_leaf_functions
[REGNO (pic_offset_table_rtx
)])
3766 /* Scan all instructions and renumber all registers into those
3767 available in leaf functions. */
3770 leaf_renumber_regs (first
)
3775 /* Renumber only the actual patterns.
3776 The reg-notes can contain frame pointer refs,
3777 and renumbering them could crash, and should not be needed. */
3778 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
3780 leaf_renumber_regs_insn (PATTERN (insn
));
3781 for (insn
= current_function_epilogue_delay_list
;
3783 insn
= XEXP (insn
, 1))
3784 if (INSN_P (XEXP (insn
, 0)))
3785 leaf_renumber_regs_insn (PATTERN (XEXP (insn
, 0)));
3788 /* Scan IN_RTX and its subexpressions, and renumber all regs into those
3789 available in leaf functions. */
3792 leaf_renumber_regs_insn (in_rtx
)
3796 const char *format_ptr
;
3801 /* Renumber all input-registers into output-registers.
3802 renumbered_regs would be 1 for an output-register;
3805 if (GET_CODE (in_rtx
) == REG
)
3809 /* Don't renumber the same reg twice. */
3813 newreg
= REGNO (in_rtx
);
3814 /* Don't try to renumber pseudo regs. It is possible for a pseudo reg
3815 to reach here as part of a REG_NOTE. */
3816 if (newreg
>= FIRST_PSEUDO_REGISTER
)
3821 newreg
= LEAF_REG_REMAP (newreg
);
3824 regs_ever_live
[REGNO (in_rtx
)] = 0;
3825 regs_ever_live
[newreg
] = 1;
3826 REGNO (in_rtx
) = newreg
;
3830 if (INSN_P (in_rtx
))
3832 /* Inside a SEQUENCE, we find insns.
3833 Renumber just the patterns of these insns,
3834 just as we do for the top-level insns. */
3835 leaf_renumber_regs_insn (PATTERN (in_rtx
));
3839 format_ptr
= GET_RTX_FORMAT (GET_CODE (in_rtx
));
3841 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (in_rtx
)); i
++)
3842 switch (*format_ptr
++)
3845 leaf_renumber_regs_insn (XEXP (in_rtx
, i
));
3849 if (NULL
!= XVEC (in_rtx
, i
))
3851 for (j
= 0; j
< XVECLEN (in_rtx
, i
); j
++)
3852 leaf_renumber_regs_insn (XVECEXP (in_rtx
, i
, j
));