toplev.c (finalize): Add no_backend parameter.
[gcc.git] / gcc / final.c
1 /* Convert RTL to assembler code and output it, for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010
4 Free Software Foundation, Inc.
5
6 This file is part of GCC.
7
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
11 version.
12
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
21
22 /* This is the final pass of the compiler.
23 It looks at the rtl code for a function and outputs assembler code.
24
25 Call `final_start_function' to output the assembler code for function entry,
26 `final' to output assembler code for some RTL code,
27 `final_end_function' to output assembler code for function exit.
28 If a function is compiled in several pieces, each piece is
29 output separately with `final'.
30
31 Some optimizations are also done at this level.
32 Move instructions that were made unnecessary by good register allocation
33 are detected and omitted from the output. (Though most of these
34 are removed by the last jump pass.)
35
36 Instructions to set the condition codes are omitted when it can be
37 seen that the condition codes already had the desired values.
38
39 In some cases it is sufficient if the inherited condition codes
40 have related values, but this may require the following insn
41 (the one that tests the condition codes) to be modified.
42
43 The code for the function prologue and epilogue are generated
44 directly in assembler by the target functions function_prologue and
45 function_epilogue. Those instructions never exist as rtl. */
46
47 #include "config.h"
48 #include "system.h"
49 #include "coretypes.h"
50 #include "tm.h"
51
52 #include "tree.h"
53 #include "rtl.h"
54 #include "tm_p.h"
55 #include "regs.h"
56 #include "insn-config.h"
57 #include "insn-attr.h"
58 #include "recog.h"
59 #include "conditions.h"
60 #include "flags.h"
61 #include "hard-reg-set.h"
62 #include "output.h"
63 #include "except.h"
64 #include "function.h"
65 #include "rtl-error.h"
66 #include "toplev.h" /* exact_log2, floor_log2 */
67 #include "reload.h"
68 #include "intl.h"
69 #include "basic-block.h"
70 #include "target.h"
71 #include "targhooks.h"
72 #include "debug.h"
73 #include "expr.h"
74 #include "cfglayout.h"
75 #include "tree-pass.h"
76 #include "tree-flow.h"
77 #include "timevar.h"
78 #include "cgraph.h"
79 #include "coverage.h"
80 #include "df.h"
81 #include "vecprim.h"
82 #include "ggc.h"
83 #include "cfgloop.h"
84 #include "params.h"
85
86 #ifdef XCOFF_DEBUGGING_INFO
87 #include "xcoffout.h" /* Needed for external data
88 declarations for e.g. AIX 4.x. */
89 #endif
90
91 #include "dwarf2out.h"
92
93 #ifdef DBX_DEBUGGING_INFO
94 #include "dbxout.h"
95 #endif
96
97 #ifdef SDB_DEBUGGING_INFO
98 #include "sdbout.h"
99 #endif
100
101 /* Most ports that aren't using cc0 don't need to define CC_STATUS_INIT.
102 So define a null default for it to save conditionalization later. */
103 #ifndef CC_STATUS_INIT
104 #define CC_STATUS_INIT
105 #endif
106
107 /* How to start an assembler comment. */
108 #ifndef ASM_COMMENT_START
109 #define ASM_COMMENT_START ";#"
110 #endif
111
112 /* Is the given character a logical line separator for the assembler? */
113 #ifndef IS_ASM_LOGICAL_LINE_SEPARATOR
114 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == ';')
115 #endif
116
117 #ifndef JUMP_TABLES_IN_TEXT_SECTION
118 #define JUMP_TABLES_IN_TEXT_SECTION 0
119 #endif
120
121 /* Bitflags used by final_scan_insn. */
122 #define SEEN_BB 1
123 #define SEEN_NOTE 2
124 #define SEEN_EMITTED 4
125
126 /* Last insn processed by final_scan_insn. */
127 static rtx debug_insn;
128 rtx current_output_insn;
129
130 /* Line number of last NOTE. */
131 static int last_linenum;
132
133 /* Last discriminator written to assembly. */
134 static int last_discriminator;
135
136 /* Discriminator of current block. */
137 static int discriminator;
138
139 /* Highest line number in current block. */
140 static int high_block_linenum;
141
142 /* Likewise for function. */
143 static int high_function_linenum;
144
145 /* Filename of last NOTE. */
146 static const char *last_filename;
147
148 /* Override filename and line number. */
149 static const char *override_filename;
150 static int override_linenum;
151
152 /* Whether to force emission of a line note before the next insn. */
153 static bool force_source_line = false;
154
155 extern const int length_unit_log; /* This is defined in insn-attrtab.c. */
156
157 /* Nonzero while outputting an `asm' with operands.
158 This means that inconsistencies are the user's fault, so don't die.
159 The precise value is the insn being output, to pass to error_for_asm. */
160 rtx this_is_asm_operands;
161
162 /* Number of operands of this insn, for an `asm' with operands. */
163 static unsigned int insn_noperands;
164
165 /* Compare optimization flag. */
166
167 static rtx last_ignored_compare = 0;
168
169 /* Assign a unique number to each insn that is output.
170 This can be used to generate unique local labels. */
171
172 static int insn_counter = 0;
173
174 #ifdef HAVE_cc0
175 /* This variable contains machine-dependent flags (defined in tm.h)
176 set and examined by output routines
177 that describe how to interpret the condition codes properly. */
178
179 CC_STATUS cc_status;
180
181 /* During output of an insn, this contains a copy of cc_status
182 from before the insn. */
183
184 CC_STATUS cc_prev_status;
185 #endif
186
187 /* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */
188
189 static int block_depth;
190
191 /* Nonzero if have enabled APP processing of our assembler output. */
192
193 static int app_on;
194
195 /* If we are outputting an insn sequence, this contains the sequence rtx.
196 Zero otherwise. */
197
198 rtx final_sequence;
199
200 #ifdef ASSEMBLER_DIALECT
201
202 /* Number of the assembler dialect to use, starting at 0. */
203 static int dialect_number;
204 #endif
205
206 /* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */
207 rtx current_insn_predicate;
208
209 /* True if printing into -fdump-final-insns= dump. */
210 bool final_insns_dump_p;
211
212 #ifdef HAVE_ATTR_length
213 static int asm_insn_count (rtx);
214 #endif
215 static void profile_function (FILE *);
216 static void profile_after_prologue (FILE *);
217 static bool notice_source_line (rtx, bool *);
218 static rtx walk_alter_subreg (rtx *, bool *);
219 static void output_asm_name (void);
220 static void output_alternate_entry_point (FILE *, rtx);
221 static tree get_mem_expr_from_op (rtx, int *);
222 static void output_asm_operand_names (rtx *, int *, int);
223 #ifdef LEAF_REGISTERS
224 static void leaf_renumber_regs (rtx);
225 #endif
226 #ifdef HAVE_cc0
227 static int alter_cond (rtx);
228 #endif
229 #ifndef ADDR_VEC_ALIGN
230 static int final_addr_vec_align (rtx);
231 #endif
232 #ifdef HAVE_ATTR_length
233 static int align_fuzz (rtx, rtx, int, unsigned);
234 #endif
235 \f
236 /* Initialize data in final at the beginning of a compilation. */
237
238 void
239 init_final (const char *filename ATTRIBUTE_UNUSED)
240 {
241 app_on = 0;
242 final_sequence = 0;
243
244 #ifdef ASSEMBLER_DIALECT
245 dialect_number = ASSEMBLER_DIALECT;
246 #endif
247 }
248
249 /* Default target function prologue and epilogue assembler output.
250
251 If not overridden for epilogue code, then the function body itself
252 contains return instructions wherever needed. */
253 void
254 default_function_pro_epilogue (FILE *file ATTRIBUTE_UNUSED,
255 HOST_WIDE_INT size ATTRIBUTE_UNUSED)
256 {
257 }
258
259 /* Default target hook that outputs nothing to a stream. */
260 void
261 no_asm_to_stream (FILE *file ATTRIBUTE_UNUSED)
262 {
263 }
264
265 /* Enable APP processing of subsequent output.
266 Used before the output from an `asm' statement. */
267
268 void
269 app_enable (void)
270 {
271 if (! app_on)
272 {
273 fputs (ASM_APP_ON, asm_out_file);
274 app_on = 1;
275 }
276 }
277
278 /* Disable APP processing of subsequent output.
279 Called from varasm.c before most kinds of output. */
280
281 void
282 app_disable (void)
283 {
284 if (app_on)
285 {
286 fputs (ASM_APP_OFF, asm_out_file);
287 app_on = 0;
288 }
289 }
290 \f
291 /* Return the number of slots filled in the current
292 delayed branch sequence (we don't count the insn needing the
293 delay slot). Zero if not in a delayed branch sequence. */
294
295 #ifdef DELAY_SLOTS
296 int
297 dbr_sequence_length (void)
298 {
299 if (final_sequence != 0)
300 return XVECLEN (final_sequence, 0) - 1;
301 else
302 return 0;
303 }
304 #endif
305 \f
306 /* The next two pages contain routines used to compute the length of an insn
307 and to shorten branches. */
308
309 /* Arrays for insn lengths, and addresses. The latter is referenced by
310 `insn_current_length'. */
311
312 static int *insn_lengths;
313
314 VEC(int,heap) *insn_addresses_;
315
316 /* Max uid for which the above arrays are valid. */
317 static int insn_lengths_max_uid;
318
319 /* Address of insn being processed. Used by `insn_current_length'. */
320 int insn_current_address;
321
322 /* Address of insn being processed in previous iteration. */
323 int insn_last_address;
324
325 /* known invariant alignment of insn being processed. */
326 int insn_current_align;
327
328 /* After shorten_branches, for any insn, uid_align[INSN_UID (insn)]
329 gives the next following alignment insn that increases the known
330 alignment, or NULL_RTX if there is no such insn.
331 For any alignment obtained this way, we can again index uid_align with
332 its uid to obtain the next following align that in turn increases the
333 alignment, till we reach NULL_RTX; the sequence obtained this way
334 for each insn we'll call the alignment chain of this insn in the following
335 comments. */
336
337 struct label_alignment
338 {
339 short alignment;
340 short max_skip;
341 };
342
343 static rtx *uid_align;
344 static int *uid_shuid;
345 static struct label_alignment *label_align;
346
347 /* Indicate that branch shortening hasn't yet been done. */
348
349 void
350 init_insn_lengths (void)
351 {
352 if (uid_shuid)
353 {
354 free (uid_shuid);
355 uid_shuid = 0;
356 }
357 if (insn_lengths)
358 {
359 free (insn_lengths);
360 insn_lengths = 0;
361 insn_lengths_max_uid = 0;
362 }
363 #ifdef HAVE_ATTR_length
364 INSN_ADDRESSES_FREE ();
365 #endif
366 if (uid_align)
367 {
368 free (uid_align);
369 uid_align = 0;
370 }
371 }
372
373 /* Obtain the current length of an insn. If branch shortening has been done,
374 get its actual length. Otherwise, use FALLBACK_FN to calculate the
375 length. */
376 static inline int
377 get_attr_length_1 (rtx insn ATTRIBUTE_UNUSED,
378 int (*fallback_fn) (rtx) ATTRIBUTE_UNUSED)
379 {
380 #ifdef HAVE_ATTR_length
381 rtx body;
382 int i;
383 int length = 0;
384
385 if (insn_lengths_max_uid > INSN_UID (insn))
386 return insn_lengths[INSN_UID (insn)];
387 else
388 switch (GET_CODE (insn))
389 {
390 case NOTE:
391 case BARRIER:
392 case CODE_LABEL:
393 case DEBUG_INSN:
394 return 0;
395
396 case CALL_INSN:
397 length = fallback_fn (insn);
398 break;
399
400 case JUMP_INSN:
401 body = PATTERN (insn);
402 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
403 {
404 /* Alignment is machine-dependent and should be handled by
405 ADDR_VEC_ALIGN. */
406 }
407 else
408 length = fallback_fn (insn);
409 break;
410
411 case INSN:
412 body = PATTERN (insn);
413 if (GET_CODE (body) == USE || GET_CODE (body) == CLOBBER)
414 return 0;
415
416 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
417 length = asm_insn_count (body) * fallback_fn (insn);
418 else if (GET_CODE (body) == SEQUENCE)
419 for (i = 0; i < XVECLEN (body, 0); i++)
420 length += get_attr_length_1 (XVECEXP (body, 0, i), fallback_fn);
421 else
422 length = fallback_fn (insn);
423 break;
424
425 default:
426 break;
427 }
428
429 #ifdef ADJUST_INSN_LENGTH
430 ADJUST_INSN_LENGTH (insn, length);
431 #endif
432 return length;
433 #else /* not HAVE_ATTR_length */
434 return 0;
435 #define insn_default_length 0
436 #define insn_min_length 0
437 #endif /* not HAVE_ATTR_length */
438 }
439
440 /* Obtain the current length of an insn. If branch shortening has been done,
441 get its actual length. Otherwise, get its maximum length. */
442 int
443 get_attr_length (rtx insn)
444 {
445 return get_attr_length_1 (insn, insn_default_length);
446 }
447
448 /* Obtain the current length of an insn. If branch shortening has been done,
449 get its actual length. Otherwise, get its minimum length. */
450 int
451 get_attr_min_length (rtx insn)
452 {
453 return get_attr_length_1 (insn, insn_min_length);
454 }
455 \f
456 /* Code to handle alignment inside shorten_branches. */
457
458 /* Here is an explanation how the algorithm in align_fuzz can give
459 proper results:
460
461 Call a sequence of instructions beginning with alignment point X
462 and continuing until the next alignment point `block X'. When `X'
463 is used in an expression, it means the alignment value of the
464 alignment point.
465
466 Call the distance between the start of the first insn of block X, and
467 the end of the last insn of block X `IX', for the `inner size of X'.
468 This is clearly the sum of the instruction lengths.
469
470 Likewise with the next alignment-delimited block following X, which we
471 shall call block Y.
472
473 Call the distance between the start of the first insn of block X, and
474 the start of the first insn of block Y `OX', for the `outer size of X'.
475
476 The estimated padding is then OX - IX.
477
478 OX can be safely estimated as
479
480 if (X >= Y)
481 OX = round_up(IX, Y)
482 else
483 OX = round_up(IX, X) + Y - X
484
485 Clearly est(IX) >= real(IX), because that only depends on the
486 instruction lengths, and those being overestimated is a given.
487
488 Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so
489 we needn't worry about that when thinking about OX.
490
491 When X >= Y, the alignment provided by Y adds no uncertainty factor
492 for branch ranges starting before X, so we can just round what we have.
493 But when X < Y, we don't know anything about the, so to speak,
494 `middle bits', so we have to assume the worst when aligning up from an
495 address mod X to one mod Y, which is Y - X. */
496
497 #ifndef LABEL_ALIGN
498 #define LABEL_ALIGN(LABEL) align_labels_log
499 #endif
500
501 #ifndef LOOP_ALIGN
502 #define LOOP_ALIGN(LABEL) align_loops_log
503 #endif
504
505 #ifndef LABEL_ALIGN_AFTER_BARRIER
506 #define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0
507 #endif
508
509 #ifndef JUMP_ALIGN
510 #define JUMP_ALIGN(LABEL) align_jumps_log
511 #endif
512
513 int
514 default_label_align_after_barrier_max_skip (rtx insn ATTRIBUTE_UNUSED)
515 {
516 return 0;
517 }
518
519 int
520 default_loop_align_max_skip (rtx insn ATTRIBUTE_UNUSED)
521 {
522 return align_loops_max_skip;
523 }
524
525 int
526 default_label_align_max_skip (rtx insn ATTRIBUTE_UNUSED)
527 {
528 return align_labels_max_skip;
529 }
530
531 int
532 default_jump_align_max_skip (rtx insn ATTRIBUTE_UNUSED)
533 {
534 return align_jumps_max_skip;
535 }
536
537 #ifndef ADDR_VEC_ALIGN
538 static int
539 final_addr_vec_align (rtx addr_vec)
540 {
541 int align = GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec)));
542
543 if (align > BIGGEST_ALIGNMENT / BITS_PER_UNIT)
544 align = BIGGEST_ALIGNMENT / BITS_PER_UNIT;
545 return exact_log2 (align);
546
547 }
548
549 #define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC)
550 #endif
551
552 #ifndef INSN_LENGTH_ALIGNMENT
553 #define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log
554 #endif
555
556 #define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)])
557
558 static int min_labelno, max_labelno;
559
560 #define LABEL_TO_ALIGNMENT(LABEL) \
561 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment)
562
563 #define LABEL_TO_MAX_SKIP(LABEL) \
564 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip)
565
566 /* For the benefit of port specific code do this also as a function. */
567
568 int
569 label_to_alignment (rtx label)
570 {
571 if (CODE_LABEL_NUMBER (label) <= max_labelno)
572 return LABEL_TO_ALIGNMENT (label);
573 return 0;
574 }
575
576 int
577 label_to_max_skip (rtx label)
578 {
579 if (CODE_LABEL_NUMBER (label) <= max_labelno)
580 return LABEL_TO_MAX_SKIP (label);
581 return 0;
582 }
583
584 #ifdef HAVE_ATTR_length
585 /* The differences in addresses
586 between a branch and its target might grow or shrink depending on
587 the alignment the start insn of the range (the branch for a forward
588 branch or the label for a backward branch) starts out on; if these
589 differences are used naively, they can even oscillate infinitely.
590 We therefore want to compute a 'worst case' address difference that
591 is independent of the alignment the start insn of the range end
592 up on, and that is at least as large as the actual difference.
593 The function align_fuzz calculates the amount we have to add to the
594 naively computed difference, by traversing the part of the alignment
595 chain of the start insn of the range that is in front of the end insn
596 of the range, and considering for each alignment the maximum amount
597 that it might contribute to a size increase.
598
599 For casesi tables, we also want to know worst case minimum amounts of
600 address difference, in case a machine description wants to introduce
601 some common offset that is added to all offsets in a table.
602 For this purpose, align_fuzz with a growth argument of 0 computes the
603 appropriate adjustment. */
604
605 /* Compute the maximum delta by which the difference of the addresses of
606 START and END might grow / shrink due to a different address for start
607 which changes the size of alignment insns between START and END.
608 KNOWN_ALIGN_LOG is the alignment known for START.
609 GROWTH should be ~0 if the objective is to compute potential code size
610 increase, and 0 if the objective is to compute potential shrink.
611 The return value is undefined for any other value of GROWTH. */
612
613 static int
614 align_fuzz (rtx start, rtx end, int known_align_log, unsigned int growth)
615 {
616 int uid = INSN_UID (start);
617 rtx align_label;
618 int known_align = 1 << known_align_log;
619 int end_shuid = INSN_SHUID (end);
620 int fuzz = 0;
621
622 for (align_label = uid_align[uid]; align_label; align_label = uid_align[uid])
623 {
624 int align_addr, new_align;
625
626 uid = INSN_UID (align_label);
627 align_addr = INSN_ADDRESSES (uid) - insn_lengths[uid];
628 if (uid_shuid[uid] > end_shuid)
629 break;
630 known_align_log = LABEL_TO_ALIGNMENT (align_label);
631 new_align = 1 << known_align_log;
632 if (new_align < known_align)
633 continue;
634 fuzz += (-align_addr ^ growth) & (new_align - known_align);
635 known_align = new_align;
636 }
637 return fuzz;
638 }
639
640 /* Compute a worst-case reference address of a branch so that it
641 can be safely used in the presence of aligned labels. Since the
642 size of the branch itself is unknown, the size of the branch is
643 not included in the range. I.e. for a forward branch, the reference
644 address is the end address of the branch as known from the previous
645 branch shortening pass, minus a value to account for possible size
646 increase due to alignment. For a backward branch, it is the start
647 address of the branch as known from the current pass, plus a value
648 to account for possible size increase due to alignment.
649 NB.: Therefore, the maximum offset allowed for backward branches needs
650 to exclude the branch size. */
651
652 int
653 insn_current_reference_address (rtx branch)
654 {
655 rtx dest, seq;
656 int seq_uid;
657
658 if (! INSN_ADDRESSES_SET_P ())
659 return 0;
660
661 seq = NEXT_INSN (PREV_INSN (branch));
662 seq_uid = INSN_UID (seq);
663 if (!JUMP_P (branch))
664 /* This can happen for example on the PA; the objective is to know the
665 offset to address something in front of the start of the function.
666 Thus, we can treat it like a backward branch.
667 We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than
668 any alignment we'd encounter, so we skip the call to align_fuzz. */
669 return insn_current_address;
670 dest = JUMP_LABEL (branch);
671
672 /* BRANCH has no proper alignment chain set, so use SEQ.
673 BRANCH also has no INSN_SHUID. */
674 if (INSN_SHUID (seq) < INSN_SHUID (dest))
675 {
676 /* Forward branch. */
677 return (insn_last_address + insn_lengths[seq_uid]
678 - align_fuzz (seq, dest, length_unit_log, ~0));
679 }
680 else
681 {
682 /* Backward branch. */
683 return (insn_current_address
684 + align_fuzz (dest, seq, length_unit_log, ~0));
685 }
686 }
687 #endif /* HAVE_ATTR_length */
688 \f
689 /* Compute branch alignments based on frequency information in the
690 CFG. */
691
692 unsigned int
693 compute_alignments (void)
694 {
695 int log, max_skip, max_log;
696 basic_block bb;
697 int freq_max = 0;
698 int freq_threshold = 0;
699
700 if (label_align)
701 {
702 free (label_align);
703 label_align = 0;
704 }
705
706 max_labelno = max_label_num ();
707 min_labelno = get_first_label_num ();
708 label_align = XCNEWVEC (struct label_alignment, max_labelno - min_labelno + 1);
709
710 /* If not optimizing or optimizing for size, don't assign any alignments. */
711 if (! optimize || optimize_function_for_size_p (cfun))
712 return 0;
713
714 if (dump_file)
715 {
716 dump_flow_info (dump_file, TDF_DETAILS);
717 flow_loops_dump (dump_file, NULL, 1);
718 }
719 loop_optimizer_init (AVOID_CFG_MODIFICATIONS);
720 FOR_EACH_BB (bb)
721 if (bb->frequency > freq_max)
722 freq_max = bb->frequency;
723 freq_threshold = freq_max / PARAM_VALUE (PARAM_ALIGN_THRESHOLD);
724
725 if (dump_file)
726 fprintf(dump_file, "freq_max: %i\n",freq_max);
727 FOR_EACH_BB (bb)
728 {
729 rtx label = BB_HEAD (bb);
730 int fallthru_frequency = 0, branch_frequency = 0, has_fallthru = 0;
731 edge e;
732 edge_iterator ei;
733
734 if (!LABEL_P (label)
735 || optimize_bb_for_size_p (bb))
736 {
737 if (dump_file)
738 fprintf(dump_file, "BB %4i freq %4i loop %2i loop_depth %2i skipped.\n",
739 bb->index, bb->frequency, bb->loop_father->num, bb->loop_depth);
740 continue;
741 }
742 max_log = LABEL_ALIGN (label);
743 max_skip = targetm.asm_out.label_align_max_skip (label);
744
745 FOR_EACH_EDGE (e, ei, bb->preds)
746 {
747 if (e->flags & EDGE_FALLTHRU)
748 has_fallthru = 1, fallthru_frequency += EDGE_FREQUENCY (e);
749 else
750 branch_frequency += EDGE_FREQUENCY (e);
751 }
752 if (dump_file)
753 {
754 fprintf(dump_file, "BB %4i freq %4i loop %2i loop_depth %2i fall %4i branch %4i",
755 bb->index, bb->frequency, bb->loop_father->num,
756 bb->loop_depth,
757 fallthru_frequency, branch_frequency);
758 if (!bb->loop_father->inner && bb->loop_father->num)
759 fprintf (dump_file, " inner_loop");
760 if (bb->loop_father->header == bb)
761 fprintf (dump_file, " loop_header");
762 fprintf (dump_file, "\n");
763 }
764
765 /* There are two purposes to align block with no fallthru incoming edge:
766 1) to avoid fetch stalls when branch destination is near cache boundary
767 2) to improve cache efficiency in case the previous block is not executed
768 (so it does not need to be in the cache).
769
770 We to catch first case, we align frequently executed blocks.
771 To catch the second, we align blocks that are executed more frequently
772 than the predecessor and the predecessor is likely to not be executed
773 when function is called. */
774
775 if (!has_fallthru
776 && (branch_frequency > freq_threshold
777 || (bb->frequency > bb->prev_bb->frequency * 10
778 && (bb->prev_bb->frequency
779 <= ENTRY_BLOCK_PTR->frequency / 2))))
780 {
781 log = JUMP_ALIGN (label);
782 if (dump_file)
783 fprintf(dump_file, " jump alignment added.\n");
784 if (max_log < log)
785 {
786 max_log = log;
787 max_skip = targetm.asm_out.jump_align_max_skip (label);
788 }
789 }
790 /* In case block is frequent and reached mostly by non-fallthru edge,
791 align it. It is most likely a first block of loop. */
792 if (has_fallthru
793 && optimize_bb_for_speed_p (bb)
794 && branch_frequency + fallthru_frequency > freq_threshold
795 && (branch_frequency
796 > fallthru_frequency * PARAM_VALUE (PARAM_ALIGN_LOOP_ITERATIONS)))
797 {
798 log = LOOP_ALIGN (label);
799 if (dump_file)
800 fprintf(dump_file, " internal loop alignment added.\n");
801 if (max_log < log)
802 {
803 max_log = log;
804 max_skip = targetm.asm_out.loop_align_max_skip (label);
805 }
806 }
807 LABEL_TO_ALIGNMENT (label) = max_log;
808 LABEL_TO_MAX_SKIP (label) = max_skip;
809 }
810
811 loop_optimizer_finalize ();
812 free_dominance_info (CDI_DOMINATORS);
813 return 0;
814 }
815
816 struct rtl_opt_pass pass_compute_alignments =
817 {
818 {
819 RTL_PASS,
820 "alignments", /* name */
821 NULL, /* gate */
822 compute_alignments, /* execute */
823 NULL, /* sub */
824 NULL, /* next */
825 0, /* static_pass_number */
826 TV_NONE, /* tv_id */
827 0, /* properties_required */
828 0, /* properties_provided */
829 0, /* properties_destroyed */
830 0, /* todo_flags_start */
831 TODO_dump_func | TODO_verify_rtl_sharing
832 | TODO_ggc_collect /* todo_flags_finish */
833 }
834 };
835
836 \f
837 /* Make a pass over all insns and compute their actual lengths by shortening
838 any branches of variable length if possible. */
839
840 /* shorten_branches might be called multiple times: for example, the SH
841 port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG.
842 In order to do this, it needs proper length information, which it obtains
843 by calling shorten_branches. This cannot be collapsed with
844 shorten_branches itself into a single pass unless we also want to integrate
845 reorg.c, since the branch splitting exposes new instructions with delay
846 slots. */
847
848 void
849 shorten_branches (rtx first ATTRIBUTE_UNUSED)
850 {
851 rtx insn;
852 int max_uid;
853 int i;
854 int max_log;
855 int max_skip;
856 #ifdef HAVE_ATTR_length
857 #define MAX_CODE_ALIGN 16
858 rtx seq;
859 int something_changed = 1;
860 char *varying_length;
861 rtx body;
862 int uid;
863 rtx align_tab[MAX_CODE_ALIGN];
864
865 #endif
866
867 /* Compute maximum UID and allocate label_align / uid_shuid. */
868 max_uid = get_max_uid ();
869
870 /* Free uid_shuid before reallocating it. */
871 free (uid_shuid);
872
873 uid_shuid = XNEWVEC (int, max_uid);
874
875 if (max_labelno != max_label_num ())
876 {
877 int old = max_labelno;
878 int n_labels;
879 int n_old_labels;
880
881 max_labelno = max_label_num ();
882
883 n_labels = max_labelno - min_labelno + 1;
884 n_old_labels = old - min_labelno + 1;
885
886 label_align = XRESIZEVEC (struct label_alignment, label_align, n_labels);
887
888 /* Range of labels grows monotonically in the function. Failing here
889 means that the initialization of array got lost. */
890 gcc_assert (n_old_labels <= n_labels);
891
892 memset (label_align + n_old_labels, 0,
893 (n_labels - n_old_labels) * sizeof (struct label_alignment));
894 }
895
896 /* Initialize label_align and set up uid_shuid to be strictly
897 monotonically rising with insn order. */
898 /* We use max_log here to keep track of the maximum alignment we want to
899 impose on the next CODE_LABEL (or the current one if we are processing
900 the CODE_LABEL itself). */
901
902 max_log = 0;
903 max_skip = 0;
904
905 for (insn = get_insns (), i = 1; insn; insn = NEXT_INSN (insn))
906 {
907 int log;
908
909 INSN_SHUID (insn) = i++;
910 if (INSN_P (insn))
911 continue;
912
913 if (LABEL_P (insn))
914 {
915 rtx next;
916 bool next_is_jumptable;
917
918 /* Merge in alignments computed by compute_alignments. */
919 log = LABEL_TO_ALIGNMENT (insn);
920 if (max_log < log)
921 {
922 max_log = log;
923 max_skip = LABEL_TO_MAX_SKIP (insn);
924 }
925
926 next = next_nonnote_insn (insn);
927 next_is_jumptable = next && JUMP_TABLE_DATA_P (next);
928 if (!next_is_jumptable)
929 {
930 log = LABEL_ALIGN (insn);
931 if (max_log < log)
932 {
933 max_log = log;
934 max_skip = targetm.asm_out.label_align_max_skip (insn);
935 }
936 }
937 /* ADDR_VECs only take room if read-only data goes into the text
938 section. */
939 if ((JUMP_TABLES_IN_TEXT_SECTION
940 || readonly_data_section == text_section)
941 && next_is_jumptable)
942 {
943 log = ADDR_VEC_ALIGN (next);
944 if (max_log < log)
945 {
946 max_log = log;
947 max_skip = targetm.asm_out.label_align_max_skip (insn);
948 }
949 }
950 LABEL_TO_ALIGNMENT (insn) = max_log;
951 LABEL_TO_MAX_SKIP (insn) = max_skip;
952 max_log = 0;
953 max_skip = 0;
954 }
955 else if (BARRIER_P (insn))
956 {
957 rtx label;
958
959 for (label = insn; label && ! INSN_P (label);
960 label = NEXT_INSN (label))
961 if (LABEL_P (label))
962 {
963 log = LABEL_ALIGN_AFTER_BARRIER (insn);
964 if (max_log < log)
965 {
966 max_log = log;
967 max_skip = targetm.asm_out.label_align_after_barrier_max_skip (label);
968 }
969 break;
970 }
971 }
972 }
973 #ifdef HAVE_ATTR_length
974
975 /* Allocate the rest of the arrays. */
976 insn_lengths = XNEWVEC (int, max_uid);
977 insn_lengths_max_uid = max_uid;
978 /* Syntax errors can lead to labels being outside of the main insn stream.
979 Initialize insn_addresses, so that we get reproducible results. */
980 INSN_ADDRESSES_ALLOC (max_uid);
981
982 varying_length = XCNEWVEC (char, max_uid);
983
984 /* Initialize uid_align. We scan instructions
985 from end to start, and keep in align_tab[n] the last seen insn
986 that does an alignment of at least n+1, i.e. the successor
987 in the alignment chain for an insn that does / has a known
988 alignment of n. */
989 uid_align = XCNEWVEC (rtx, max_uid);
990
991 for (i = MAX_CODE_ALIGN; --i >= 0;)
992 align_tab[i] = NULL_RTX;
993 seq = get_last_insn ();
994 for (; seq; seq = PREV_INSN (seq))
995 {
996 int uid = INSN_UID (seq);
997 int log;
998 log = (LABEL_P (seq) ? LABEL_TO_ALIGNMENT (seq) : 0);
999 uid_align[uid] = align_tab[0];
1000 if (log)
1001 {
1002 /* Found an alignment label. */
1003 uid_align[uid] = align_tab[log];
1004 for (i = log - 1; i >= 0; i--)
1005 align_tab[i] = seq;
1006 }
1007 }
1008 #ifdef CASE_VECTOR_SHORTEN_MODE
1009 if (optimize)
1010 {
1011 /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum
1012 label fields. */
1013
1014 int min_shuid = INSN_SHUID (get_insns ()) - 1;
1015 int max_shuid = INSN_SHUID (get_last_insn ()) + 1;
1016 int rel;
1017
1018 for (insn = first; insn != 0; insn = NEXT_INSN (insn))
1019 {
1020 rtx min_lab = NULL_RTX, max_lab = NULL_RTX, pat;
1021 int len, i, min, max, insn_shuid;
1022 int min_align;
1023 addr_diff_vec_flags flags;
1024
1025 if (!JUMP_P (insn)
1026 || GET_CODE (PATTERN (insn)) != ADDR_DIFF_VEC)
1027 continue;
1028 pat = PATTERN (insn);
1029 len = XVECLEN (pat, 1);
1030 gcc_assert (len > 0);
1031 min_align = MAX_CODE_ALIGN;
1032 for (min = max_shuid, max = min_shuid, i = len - 1; i >= 0; i--)
1033 {
1034 rtx lab = XEXP (XVECEXP (pat, 1, i), 0);
1035 int shuid = INSN_SHUID (lab);
1036 if (shuid < min)
1037 {
1038 min = shuid;
1039 min_lab = lab;
1040 }
1041 if (shuid > max)
1042 {
1043 max = shuid;
1044 max_lab = lab;
1045 }
1046 if (min_align > LABEL_TO_ALIGNMENT (lab))
1047 min_align = LABEL_TO_ALIGNMENT (lab);
1048 }
1049 XEXP (pat, 2) = gen_rtx_LABEL_REF (Pmode, min_lab);
1050 XEXP (pat, 3) = gen_rtx_LABEL_REF (Pmode, max_lab);
1051 insn_shuid = INSN_SHUID (insn);
1052 rel = INSN_SHUID (XEXP (XEXP (pat, 0), 0));
1053 memset (&flags, 0, sizeof (flags));
1054 flags.min_align = min_align;
1055 flags.base_after_vec = rel > insn_shuid;
1056 flags.min_after_vec = min > insn_shuid;
1057 flags.max_after_vec = max > insn_shuid;
1058 flags.min_after_base = min > rel;
1059 flags.max_after_base = max > rel;
1060 ADDR_DIFF_VEC_FLAGS (pat) = flags;
1061 }
1062 }
1063 #endif /* CASE_VECTOR_SHORTEN_MODE */
1064
1065 /* Compute initial lengths, addresses, and varying flags for each insn. */
1066 for (insn_current_address = 0, insn = first;
1067 insn != 0;
1068 insn_current_address += insn_lengths[uid], insn = NEXT_INSN (insn))
1069 {
1070 uid = INSN_UID (insn);
1071
1072 insn_lengths[uid] = 0;
1073
1074 if (LABEL_P (insn))
1075 {
1076 int log = LABEL_TO_ALIGNMENT (insn);
1077 if (log)
1078 {
1079 int align = 1 << log;
1080 int new_address = (insn_current_address + align - 1) & -align;
1081 insn_lengths[uid] = new_address - insn_current_address;
1082 }
1083 }
1084
1085 INSN_ADDRESSES (uid) = insn_current_address + insn_lengths[uid];
1086
1087 if (NOTE_P (insn) || BARRIER_P (insn)
1088 || LABEL_P (insn) || DEBUG_INSN_P(insn))
1089 continue;
1090 if (INSN_DELETED_P (insn))
1091 continue;
1092
1093 body = PATTERN (insn);
1094 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
1095 {
1096 /* This only takes room if read-only data goes into the text
1097 section. */
1098 if (JUMP_TABLES_IN_TEXT_SECTION
1099 || readonly_data_section == text_section)
1100 insn_lengths[uid] = (XVECLEN (body,
1101 GET_CODE (body) == ADDR_DIFF_VEC)
1102 * GET_MODE_SIZE (GET_MODE (body)));
1103 /* Alignment is handled by ADDR_VEC_ALIGN. */
1104 }
1105 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
1106 insn_lengths[uid] = asm_insn_count (body) * insn_default_length (insn);
1107 else if (GET_CODE (body) == SEQUENCE)
1108 {
1109 int i;
1110 int const_delay_slots;
1111 #ifdef DELAY_SLOTS
1112 const_delay_slots = const_num_delay_slots (XVECEXP (body, 0, 0));
1113 #else
1114 const_delay_slots = 0;
1115 #endif
1116 /* Inside a delay slot sequence, we do not do any branch shortening
1117 if the shortening could change the number of delay slots
1118 of the branch. */
1119 for (i = 0; i < XVECLEN (body, 0); i++)
1120 {
1121 rtx inner_insn = XVECEXP (body, 0, i);
1122 int inner_uid = INSN_UID (inner_insn);
1123 int inner_length;
1124
1125 if (GET_CODE (body) == ASM_INPUT
1126 || asm_noperands (PATTERN (XVECEXP (body, 0, i))) >= 0)
1127 inner_length = (asm_insn_count (PATTERN (inner_insn))
1128 * insn_default_length (inner_insn));
1129 else
1130 inner_length = insn_default_length (inner_insn);
1131
1132 insn_lengths[inner_uid] = inner_length;
1133 if (const_delay_slots)
1134 {
1135 if ((varying_length[inner_uid]
1136 = insn_variable_length_p (inner_insn)) != 0)
1137 varying_length[uid] = 1;
1138 INSN_ADDRESSES (inner_uid) = (insn_current_address
1139 + insn_lengths[uid]);
1140 }
1141 else
1142 varying_length[inner_uid] = 0;
1143 insn_lengths[uid] += inner_length;
1144 }
1145 }
1146 else if (GET_CODE (body) != USE && GET_CODE (body) != CLOBBER)
1147 {
1148 insn_lengths[uid] = insn_default_length (insn);
1149 varying_length[uid] = insn_variable_length_p (insn);
1150 }
1151
1152 /* If needed, do any adjustment. */
1153 #ifdef ADJUST_INSN_LENGTH
1154 ADJUST_INSN_LENGTH (insn, insn_lengths[uid]);
1155 if (insn_lengths[uid] < 0)
1156 fatal_insn ("negative insn length", insn);
1157 #endif
1158 }
1159
1160 /* Now loop over all the insns finding varying length insns. For each,
1161 get the current insn length. If it has changed, reflect the change.
1162 When nothing changes for a full pass, we are done. */
1163
1164 while (something_changed)
1165 {
1166 something_changed = 0;
1167 insn_current_align = MAX_CODE_ALIGN - 1;
1168 for (insn_current_address = 0, insn = first;
1169 insn != 0;
1170 insn = NEXT_INSN (insn))
1171 {
1172 int new_length;
1173 #ifdef ADJUST_INSN_LENGTH
1174 int tmp_length;
1175 #endif
1176 int length_align;
1177
1178 uid = INSN_UID (insn);
1179
1180 if (LABEL_P (insn))
1181 {
1182 int log = LABEL_TO_ALIGNMENT (insn);
1183 if (log > insn_current_align)
1184 {
1185 int align = 1 << log;
1186 int new_address= (insn_current_address + align - 1) & -align;
1187 insn_lengths[uid] = new_address - insn_current_address;
1188 insn_current_align = log;
1189 insn_current_address = new_address;
1190 }
1191 else
1192 insn_lengths[uid] = 0;
1193 INSN_ADDRESSES (uid) = insn_current_address;
1194 continue;
1195 }
1196
1197 length_align = INSN_LENGTH_ALIGNMENT (insn);
1198 if (length_align < insn_current_align)
1199 insn_current_align = length_align;
1200
1201 insn_last_address = INSN_ADDRESSES (uid);
1202 INSN_ADDRESSES (uid) = insn_current_address;
1203
1204 #ifdef CASE_VECTOR_SHORTEN_MODE
1205 if (optimize && JUMP_P (insn)
1206 && GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
1207 {
1208 rtx body = PATTERN (insn);
1209 int old_length = insn_lengths[uid];
1210 rtx rel_lab = XEXP (XEXP (body, 0), 0);
1211 rtx min_lab = XEXP (XEXP (body, 2), 0);
1212 rtx max_lab = XEXP (XEXP (body, 3), 0);
1213 int rel_addr = INSN_ADDRESSES (INSN_UID (rel_lab));
1214 int min_addr = INSN_ADDRESSES (INSN_UID (min_lab));
1215 int max_addr = INSN_ADDRESSES (INSN_UID (max_lab));
1216 rtx prev;
1217 int rel_align = 0;
1218 addr_diff_vec_flags flags;
1219
1220 /* Avoid automatic aggregate initialization. */
1221 flags = ADDR_DIFF_VEC_FLAGS (body);
1222
1223 /* Try to find a known alignment for rel_lab. */
1224 for (prev = rel_lab;
1225 prev
1226 && ! insn_lengths[INSN_UID (prev)]
1227 && ! (varying_length[INSN_UID (prev)] & 1);
1228 prev = PREV_INSN (prev))
1229 if (varying_length[INSN_UID (prev)] & 2)
1230 {
1231 rel_align = LABEL_TO_ALIGNMENT (prev);
1232 break;
1233 }
1234
1235 /* See the comment on addr_diff_vec_flags in rtl.h for the
1236 meaning of the flags values. base: REL_LAB vec: INSN */
1237 /* Anything after INSN has still addresses from the last
1238 pass; adjust these so that they reflect our current
1239 estimate for this pass. */
1240 if (flags.base_after_vec)
1241 rel_addr += insn_current_address - insn_last_address;
1242 if (flags.min_after_vec)
1243 min_addr += insn_current_address - insn_last_address;
1244 if (flags.max_after_vec)
1245 max_addr += insn_current_address - insn_last_address;
1246 /* We want to know the worst case, i.e. lowest possible value
1247 for the offset of MIN_LAB. If MIN_LAB is after REL_LAB,
1248 its offset is positive, and we have to be wary of code shrink;
1249 otherwise, it is negative, and we have to be vary of code
1250 size increase. */
1251 if (flags.min_after_base)
1252 {
1253 /* If INSN is between REL_LAB and MIN_LAB, the size
1254 changes we are about to make can change the alignment
1255 within the observed offset, therefore we have to break
1256 it up into two parts that are independent. */
1257 if (! flags.base_after_vec && flags.min_after_vec)
1258 {
1259 min_addr -= align_fuzz (rel_lab, insn, rel_align, 0);
1260 min_addr -= align_fuzz (insn, min_lab, 0, 0);
1261 }
1262 else
1263 min_addr -= align_fuzz (rel_lab, min_lab, rel_align, 0);
1264 }
1265 else
1266 {
1267 if (flags.base_after_vec && ! flags.min_after_vec)
1268 {
1269 min_addr -= align_fuzz (min_lab, insn, 0, ~0);
1270 min_addr -= align_fuzz (insn, rel_lab, 0, ~0);
1271 }
1272 else
1273 min_addr -= align_fuzz (min_lab, rel_lab, 0, ~0);
1274 }
1275 /* Likewise, determine the highest lowest possible value
1276 for the offset of MAX_LAB. */
1277 if (flags.max_after_base)
1278 {
1279 if (! flags.base_after_vec && flags.max_after_vec)
1280 {
1281 max_addr += align_fuzz (rel_lab, insn, rel_align, ~0);
1282 max_addr += align_fuzz (insn, max_lab, 0, ~0);
1283 }
1284 else
1285 max_addr += align_fuzz (rel_lab, max_lab, rel_align, ~0);
1286 }
1287 else
1288 {
1289 if (flags.base_after_vec && ! flags.max_after_vec)
1290 {
1291 max_addr += align_fuzz (max_lab, insn, 0, 0);
1292 max_addr += align_fuzz (insn, rel_lab, 0, 0);
1293 }
1294 else
1295 max_addr += align_fuzz (max_lab, rel_lab, 0, 0);
1296 }
1297 PUT_MODE (body, CASE_VECTOR_SHORTEN_MODE (min_addr - rel_addr,
1298 max_addr - rel_addr,
1299 body));
1300 if (JUMP_TABLES_IN_TEXT_SECTION
1301 || readonly_data_section == text_section)
1302 {
1303 insn_lengths[uid]
1304 = (XVECLEN (body, 1) * GET_MODE_SIZE (GET_MODE (body)));
1305 insn_current_address += insn_lengths[uid];
1306 if (insn_lengths[uid] != old_length)
1307 something_changed = 1;
1308 }
1309
1310 continue;
1311 }
1312 #endif /* CASE_VECTOR_SHORTEN_MODE */
1313
1314 if (! (varying_length[uid]))
1315 {
1316 if (NONJUMP_INSN_P (insn)
1317 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1318 {
1319 int i;
1320
1321 body = PATTERN (insn);
1322 for (i = 0; i < XVECLEN (body, 0); i++)
1323 {
1324 rtx inner_insn = XVECEXP (body, 0, i);
1325 int inner_uid = INSN_UID (inner_insn);
1326
1327 INSN_ADDRESSES (inner_uid) = insn_current_address;
1328
1329 insn_current_address += insn_lengths[inner_uid];
1330 }
1331 }
1332 else
1333 insn_current_address += insn_lengths[uid];
1334
1335 continue;
1336 }
1337
1338 if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
1339 {
1340 int i;
1341
1342 body = PATTERN (insn);
1343 new_length = 0;
1344 for (i = 0; i < XVECLEN (body, 0); i++)
1345 {
1346 rtx inner_insn = XVECEXP (body, 0, i);
1347 int inner_uid = INSN_UID (inner_insn);
1348 int inner_length;
1349
1350 INSN_ADDRESSES (inner_uid) = insn_current_address;
1351
1352 /* insn_current_length returns 0 for insns with a
1353 non-varying length. */
1354 if (! varying_length[inner_uid])
1355 inner_length = insn_lengths[inner_uid];
1356 else
1357 inner_length = insn_current_length (inner_insn);
1358
1359 if (inner_length != insn_lengths[inner_uid])
1360 {
1361 insn_lengths[inner_uid] = inner_length;
1362 something_changed = 1;
1363 }
1364 insn_current_address += insn_lengths[inner_uid];
1365 new_length += inner_length;
1366 }
1367 }
1368 else
1369 {
1370 new_length = insn_current_length (insn);
1371 insn_current_address += new_length;
1372 }
1373
1374 #ifdef ADJUST_INSN_LENGTH
1375 /* If needed, do any adjustment. */
1376 tmp_length = new_length;
1377 ADJUST_INSN_LENGTH (insn, new_length);
1378 insn_current_address += (new_length - tmp_length);
1379 #endif
1380
1381 if (new_length != insn_lengths[uid])
1382 {
1383 insn_lengths[uid] = new_length;
1384 something_changed = 1;
1385 }
1386 }
1387 /* For a non-optimizing compile, do only a single pass. */
1388 if (!optimize)
1389 break;
1390 }
1391
1392 free (varying_length);
1393
1394 #endif /* HAVE_ATTR_length */
1395 }
1396
1397 #ifdef HAVE_ATTR_length
1398 /* Given the body of an INSN known to be generated by an ASM statement, return
1399 the number of machine instructions likely to be generated for this insn.
1400 This is used to compute its length. */
1401
1402 static int
1403 asm_insn_count (rtx body)
1404 {
1405 const char *templ;
1406
1407 if (GET_CODE (body) == ASM_INPUT)
1408 templ = XSTR (body, 0);
1409 else
1410 templ = decode_asm_operands (body, NULL, NULL, NULL, NULL, NULL);
1411
1412 return asm_str_count (templ);
1413 }
1414 #endif
1415
1416 /* Return the number of machine instructions likely to be generated for the
1417 inline-asm template. */
1418 int
1419 asm_str_count (const char *templ)
1420 {
1421 int count = 1;
1422
1423 if (!*templ)
1424 return 0;
1425
1426 for (; *templ; templ++)
1427 if (IS_ASM_LOGICAL_LINE_SEPARATOR (*templ, templ)
1428 || *templ == '\n')
1429 count++;
1430
1431 return count;
1432 }
1433 \f
1434 /* ??? This is probably the wrong place for these. */
1435 /* Structure recording the mapping from source file and directory
1436 names at compile time to those to be embedded in debug
1437 information. */
1438 typedef struct debug_prefix_map
1439 {
1440 const char *old_prefix;
1441 const char *new_prefix;
1442 size_t old_len;
1443 size_t new_len;
1444 struct debug_prefix_map *next;
1445 } debug_prefix_map;
1446
1447 /* Linked list of such structures. */
1448 debug_prefix_map *debug_prefix_maps;
1449
1450
1451 /* Record a debug file prefix mapping. ARG is the argument to
1452 -fdebug-prefix-map and must be of the form OLD=NEW. */
1453
1454 void
1455 add_debug_prefix_map (const char *arg)
1456 {
1457 debug_prefix_map *map;
1458 const char *p;
1459
1460 p = strchr (arg, '=');
1461 if (!p)
1462 {
1463 error ("invalid argument %qs to -fdebug-prefix-map", arg);
1464 return;
1465 }
1466 map = XNEW (debug_prefix_map);
1467 map->old_prefix = xstrndup (arg, p - arg);
1468 map->old_len = p - arg;
1469 p++;
1470 map->new_prefix = xstrdup (p);
1471 map->new_len = strlen (p);
1472 map->next = debug_prefix_maps;
1473 debug_prefix_maps = map;
1474 }
1475
1476 /* Perform user-specified mapping of debug filename prefixes. Return
1477 the new name corresponding to FILENAME. */
1478
1479 const char *
1480 remap_debug_filename (const char *filename)
1481 {
1482 debug_prefix_map *map;
1483 char *s;
1484 const char *name;
1485 size_t name_len;
1486
1487 for (map = debug_prefix_maps; map; map = map->next)
1488 if (strncmp (filename, map->old_prefix, map->old_len) == 0)
1489 break;
1490 if (!map)
1491 return filename;
1492 name = filename + map->old_len;
1493 name_len = strlen (name) + 1;
1494 s = (char *) alloca (name_len + map->new_len);
1495 memcpy (s, map->new_prefix, map->new_len);
1496 memcpy (s + map->new_len, name, name_len);
1497 return ggc_strdup (s);
1498 }
1499 \f
1500 /* Return true if DWARF2 debug info can be emitted for DECL. */
1501
1502 static bool
1503 dwarf2_debug_info_emitted_p (tree decl)
1504 {
1505 if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG)
1506 return false;
1507
1508 if (DECL_IGNORED_P (decl))
1509 return false;
1510
1511 return true;
1512 }
1513
1514 /* Output assembler code for the start of a function,
1515 and initialize some of the variables in this file
1516 for the new function. The label for the function and associated
1517 assembler pseudo-ops have already been output in `assemble_start_function'.
1518
1519 FIRST is the first insn of the rtl for the function being compiled.
1520 FILE is the file to write assembler code to.
1521 OPTIMIZE_P is nonzero if we should eliminate redundant
1522 test and compare insns. */
1523
1524 void
1525 final_start_function (rtx first ATTRIBUTE_UNUSED, FILE *file,
1526 int optimize_p ATTRIBUTE_UNUSED)
1527 {
1528 block_depth = 0;
1529
1530 this_is_asm_operands = 0;
1531
1532 last_filename = locator_file (prologue_locator);
1533 last_linenum = locator_line (prologue_locator);
1534 last_discriminator = discriminator = 0;
1535
1536 high_block_linenum = high_function_linenum = last_linenum;
1537
1538 if (!DECL_IGNORED_P (current_function_decl))
1539 debug_hooks->begin_prologue (last_linenum, last_filename);
1540
1541 if (!dwarf2_debug_info_emitted_p (current_function_decl))
1542 dwarf2out_begin_prologue (0, NULL);
1543
1544 #ifdef LEAF_REG_REMAP
1545 if (current_function_uses_only_leaf_regs)
1546 leaf_renumber_regs (first);
1547 #endif
1548
1549 /* The Sun386i and perhaps other machines don't work right
1550 if the profiling code comes after the prologue. */
1551 if (targetm.profile_before_prologue () && crtl->profile)
1552 profile_function (file);
1553
1554 #if defined (HAVE_prologue)
1555 if (dwarf2out_do_frame ())
1556 dwarf2out_frame_debug (NULL_RTX, false);
1557 #endif
1558
1559 /* If debugging, assign block numbers to all of the blocks in this
1560 function. */
1561 if (write_symbols)
1562 {
1563 reemit_insn_block_notes ();
1564 number_blocks (current_function_decl);
1565 /* We never actually put out begin/end notes for the top-level
1566 block in the function. But, conceptually, that block is
1567 always needed. */
1568 TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl)) = 1;
1569 }
1570
1571 if (warn_frame_larger_than
1572 && get_frame_size () > frame_larger_than_size)
1573 {
1574 /* Issue a warning */
1575 warning (OPT_Wframe_larger_than_,
1576 "the frame size of %wd bytes is larger than %wd bytes",
1577 get_frame_size (), frame_larger_than_size);
1578 }
1579
1580 /* First output the function prologue: code to set up the stack frame. */
1581 targetm.asm_out.function_prologue (file, get_frame_size ());
1582
1583 /* If the machine represents the prologue as RTL, the profiling code must
1584 be emitted when NOTE_INSN_PROLOGUE_END is scanned. */
1585 #ifdef HAVE_prologue
1586 if (! HAVE_prologue)
1587 #endif
1588 profile_after_prologue (file);
1589 }
1590
1591 static void
1592 profile_after_prologue (FILE *file ATTRIBUTE_UNUSED)
1593 {
1594 if (!targetm.profile_before_prologue () && crtl->profile)
1595 profile_function (file);
1596 }
1597
1598 static void
1599 profile_function (FILE *file ATTRIBUTE_UNUSED)
1600 {
1601 #ifndef NO_PROFILE_COUNTERS
1602 # define NO_PROFILE_COUNTERS 0
1603 #endif
1604 #ifdef ASM_OUTPUT_REG_PUSH
1605 rtx sval = NULL, chain = NULL;
1606
1607 if (cfun->returns_struct)
1608 sval = targetm.calls.struct_value_rtx (TREE_TYPE (current_function_decl),
1609 true);
1610 if (cfun->static_chain_decl)
1611 chain = targetm.calls.static_chain (current_function_decl, true);
1612 #endif /* ASM_OUTPUT_REG_PUSH */
1613
1614 if (! NO_PROFILE_COUNTERS)
1615 {
1616 int align = MIN (BIGGEST_ALIGNMENT, LONG_TYPE_SIZE);
1617 switch_to_section (data_section);
1618 ASM_OUTPUT_ALIGN (file, floor_log2 (align / BITS_PER_UNIT));
1619 targetm.asm_out.internal_label (file, "LP", current_function_funcdef_no);
1620 assemble_integer (const0_rtx, LONG_TYPE_SIZE / BITS_PER_UNIT, align, 1);
1621 }
1622
1623 switch_to_section (current_function_section ());
1624
1625 #ifdef ASM_OUTPUT_REG_PUSH
1626 if (sval && REG_P (sval))
1627 ASM_OUTPUT_REG_PUSH (file, REGNO (sval));
1628 if (chain && REG_P (chain))
1629 ASM_OUTPUT_REG_PUSH (file, REGNO (chain));
1630 #endif
1631
1632 FUNCTION_PROFILER (file, current_function_funcdef_no);
1633
1634 #ifdef ASM_OUTPUT_REG_PUSH
1635 if (chain && REG_P (chain))
1636 ASM_OUTPUT_REG_POP (file, REGNO (chain));
1637 if (sval && REG_P (sval))
1638 ASM_OUTPUT_REG_POP (file, REGNO (sval));
1639 #endif
1640 }
1641
1642 /* Output assembler code for the end of a function.
1643 For clarity, args are same as those of `final_start_function'
1644 even though not all of them are needed. */
1645
1646 void
1647 final_end_function (void)
1648 {
1649 app_disable ();
1650
1651 if (!DECL_IGNORED_P (current_function_decl))
1652 debug_hooks->end_function (high_function_linenum);
1653
1654 /* Finally, output the function epilogue:
1655 code to restore the stack frame and return to the caller. */
1656 targetm.asm_out.function_epilogue (asm_out_file, get_frame_size ());
1657
1658 /* And debug output. */
1659 if (!DECL_IGNORED_P (current_function_decl))
1660 debug_hooks->end_epilogue (last_linenum, last_filename);
1661
1662 if (!dwarf2_debug_info_emitted_p (current_function_decl)
1663 && dwarf2out_do_frame ())
1664 dwarf2out_end_epilogue (last_linenum, last_filename);
1665 }
1666 \f
1667 /* Output assembler code for some insns: all or part of a function.
1668 For description of args, see `final_start_function', above. */
1669
1670 void
1671 final (rtx first, FILE *file, int optimize_p)
1672 {
1673 rtx insn;
1674 int max_uid = 0;
1675 int seen = 0;
1676
1677 last_ignored_compare = 0;
1678
1679 for (insn = first; insn; insn = NEXT_INSN (insn))
1680 {
1681 if (INSN_UID (insn) > max_uid) /* Find largest UID. */
1682 max_uid = INSN_UID (insn);
1683 #ifdef HAVE_cc0
1684 /* If CC tracking across branches is enabled, record the insn which
1685 jumps to each branch only reached from one place. */
1686 if (optimize_p && JUMP_P (insn))
1687 {
1688 rtx lab = JUMP_LABEL (insn);
1689 if (lab && LABEL_NUSES (lab) == 1)
1690 {
1691 LABEL_REFS (lab) = insn;
1692 }
1693 }
1694 #endif
1695 }
1696
1697 init_recog ();
1698
1699 CC_STATUS_INIT;
1700
1701 /* Output the insns. */
1702 for (insn = first; insn;)
1703 {
1704 #ifdef HAVE_ATTR_length
1705 if ((unsigned) INSN_UID (insn) >= INSN_ADDRESSES_SIZE ())
1706 {
1707 /* This can be triggered by bugs elsewhere in the compiler if
1708 new insns are created after init_insn_lengths is called. */
1709 gcc_assert (NOTE_P (insn));
1710 insn_current_address = -1;
1711 }
1712 else
1713 insn_current_address = INSN_ADDRESSES (INSN_UID (insn));
1714 #endif /* HAVE_ATTR_length */
1715
1716 insn = final_scan_insn (insn, file, optimize_p, 0, &seen);
1717 }
1718 }
1719 \f
1720 const char *
1721 get_insn_template (int code, rtx insn)
1722 {
1723 switch (insn_data[code].output_format)
1724 {
1725 case INSN_OUTPUT_FORMAT_SINGLE:
1726 return insn_data[code].output.single;
1727 case INSN_OUTPUT_FORMAT_MULTI:
1728 return insn_data[code].output.multi[which_alternative];
1729 case INSN_OUTPUT_FORMAT_FUNCTION:
1730 gcc_assert (insn);
1731 return (*insn_data[code].output.function) (recog_data.operand, insn);
1732
1733 default:
1734 gcc_unreachable ();
1735 }
1736 }
1737
1738 /* Emit the appropriate declaration for an alternate-entry-point
1739 symbol represented by INSN, to FILE. INSN is a CODE_LABEL with
1740 LABEL_KIND != LABEL_NORMAL.
1741
1742 The case fall-through in this function is intentional. */
1743 static void
1744 output_alternate_entry_point (FILE *file, rtx insn)
1745 {
1746 const char *name = LABEL_NAME (insn);
1747
1748 switch (LABEL_KIND (insn))
1749 {
1750 case LABEL_WEAK_ENTRY:
1751 #ifdef ASM_WEAKEN_LABEL
1752 ASM_WEAKEN_LABEL (file, name);
1753 #endif
1754 case LABEL_GLOBAL_ENTRY:
1755 targetm.asm_out.globalize_label (file, name);
1756 case LABEL_STATIC_ENTRY:
1757 #ifdef ASM_OUTPUT_TYPE_DIRECTIVE
1758 ASM_OUTPUT_TYPE_DIRECTIVE (file, name, "function");
1759 #endif
1760 ASM_OUTPUT_LABEL (file, name);
1761 break;
1762
1763 case LABEL_NORMAL:
1764 default:
1765 gcc_unreachable ();
1766 }
1767 }
1768
1769 /* Given a CALL_INSN, find and return the nested CALL. */
1770 static rtx
1771 call_from_call_insn (rtx insn)
1772 {
1773 rtx x;
1774 gcc_assert (CALL_P (insn));
1775 x = PATTERN (insn);
1776
1777 while (GET_CODE (x) != CALL)
1778 {
1779 switch (GET_CODE (x))
1780 {
1781 default:
1782 gcc_unreachable ();
1783 case COND_EXEC:
1784 x = COND_EXEC_CODE (x);
1785 break;
1786 case PARALLEL:
1787 x = XVECEXP (x, 0, 0);
1788 break;
1789 case SET:
1790 x = XEXP (x, 1);
1791 break;
1792 }
1793 }
1794 return x;
1795 }
1796
1797 /* The final scan for one insn, INSN.
1798 Args are same as in `final', except that INSN
1799 is the insn being scanned.
1800 Value returned is the next insn to be scanned.
1801
1802 NOPEEPHOLES is the flag to disallow peephole processing (currently
1803 used for within delayed branch sequence output).
1804
1805 SEEN is used to track the end of the prologue, for emitting
1806 debug information. We force the emission of a line note after
1807 both NOTE_INSN_PROLOGUE_END and NOTE_INSN_FUNCTION_BEG, or
1808 at the beginning of the second basic block, whichever comes
1809 first. */
1810
1811 rtx
1812 final_scan_insn (rtx insn, FILE *file, int optimize_p ATTRIBUTE_UNUSED,
1813 int nopeepholes ATTRIBUTE_UNUSED, int *seen)
1814 {
1815 #ifdef HAVE_cc0
1816 rtx set;
1817 #endif
1818 rtx next;
1819
1820 insn_counter++;
1821
1822 /* Ignore deleted insns. These can occur when we split insns (due to a
1823 template of "#") while not optimizing. */
1824 if (INSN_DELETED_P (insn))
1825 return NEXT_INSN (insn);
1826
1827 switch (GET_CODE (insn))
1828 {
1829 case NOTE:
1830 switch (NOTE_KIND (insn))
1831 {
1832 case NOTE_INSN_DELETED:
1833 break;
1834
1835 case NOTE_INSN_SWITCH_TEXT_SECTIONS:
1836 in_cold_section_p = !in_cold_section_p;
1837
1838 if (dwarf2out_do_frame ())
1839 dwarf2out_switch_text_section ();
1840 else if (!DECL_IGNORED_P (current_function_decl))
1841 debug_hooks->switch_text_section ();
1842
1843 switch_to_section (current_function_section ());
1844 break;
1845
1846 case NOTE_INSN_BASIC_BLOCK:
1847 if (targetm.asm_out.unwind_emit)
1848 targetm.asm_out.unwind_emit (asm_out_file, insn);
1849
1850 if (flag_debug_asm)
1851 fprintf (asm_out_file, "\t%s basic block %d\n",
1852 ASM_COMMENT_START, NOTE_BASIC_BLOCK (insn)->index);
1853
1854 if ((*seen & (SEEN_EMITTED | SEEN_BB)) == SEEN_BB)
1855 {
1856 *seen |= SEEN_EMITTED;
1857 force_source_line = true;
1858 }
1859 else
1860 *seen |= SEEN_BB;
1861
1862 discriminator = NOTE_BASIC_BLOCK (insn)->discriminator;
1863
1864 break;
1865
1866 case NOTE_INSN_EH_REGION_BEG:
1867 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHB",
1868 NOTE_EH_HANDLER (insn));
1869 break;
1870
1871 case NOTE_INSN_EH_REGION_END:
1872 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHE",
1873 NOTE_EH_HANDLER (insn));
1874 break;
1875
1876 case NOTE_INSN_PROLOGUE_END:
1877 targetm.asm_out.function_end_prologue (file);
1878 profile_after_prologue (file);
1879
1880 if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE)
1881 {
1882 *seen |= SEEN_EMITTED;
1883 force_source_line = true;
1884 }
1885 else
1886 *seen |= SEEN_NOTE;
1887
1888 break;
1889
1890 case NOTE_INSN_EPILOGUE_BEG:
1891 #if defined (HAVE_epilogue)
1892 if (dwarf2out_do_frame ())
1893 dwarf2out_cfi_begin_epilogue (insn);
1894 #endif
1895 (*debug_hooks->begin_epilogue) (last_linenum, last_filename);
1896 targetm.asm_out.function_begin_epilogue (file);
1897 break;
1898
1899 case NOTE_INSN_CFA_RESTORE_STATE:
1900 dwarf2out_frame_debug_restore_state ();
1901 break;
1902
1903 case NOTE_INSN_FUNCTION_BEG:
1904 app_disable ();
1905 if (!DECL_IGNORED_P (current_function_decl))
1906 debug_hooks->end_prologue (last_linenum, last_filename);
1907
1908 if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE)
1909 {
1910 *seen |= SEEN_EMITTED;
1911 force_source_line = true;
1912 }
1913 else
1914 *seen |= SEEN_NOTE;
1915
1916 break;
1917
1918 case NOTE_INSN_BLOCK_BEG:
1919 if (debug_info_level == DINFO_LEVEL_NORMAL
1920 || debug_info_level == DINFO_LEVEL_VERBOSE
1921 || write_symbols == DWARF2_DEBUG
1922 || write_symbols == VMS_AND_DWARF2_DEBUG
1923 || write_symbols == VMS_DEBUG)
1924 {
1925 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
1926
1927 app_disable ();
1928 ++block_depth;
1929 high_block_linenum = last_linenum;
1930
1931 /* Output debugging info about the symbol-block beginning. */
1932 if (!DECL_IGNORED_P (current_function_decl))
1933 debug_hooks->begin_block (last_linenum, n);
1934
1935 /* Mark this block as output. */
1936 TREE_ASM_WRITTEN (NOTE_BLOCK (insn)) = 1;
1937 }
1938 if (write_symbols == DBX_DEBUG
1939 || write_symbols == SDB_DEBUG)
1940 {
1941 location_t *locus_ptr
1942 = block_nonartificial_location (NOTE_BLOCK (insn));
1943
1944 if (locus_ptr != NULL)
1945 {
1946 override_filename = LOCATION_FILE (*locus_ptr);
1947 override_linenum = LOCATION_LINE (*locus_ptr);
1948 }
1949 }
1950 break;
1951
1952 case NOTE_INSN_BLOCK_END:
1953 if (debug_info_level == DINFO_LEVEL_NORMAL
1954 || debug_info_level == DINFO_LEVEL_VERBOSE
1955 || write_symbols == DWARF2_DEBUG
1956 || write_symbols == VMS_AND_DWARF2_DEBUG
1957 || write_symbols == VMS_DEBUG)
1958 {
1959 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
1960
1961 app_disable ();
1962
1963 /* End of a symbol-block. */
1964 --block_depth;
1965 gcc_assert (block_depth >= 0);
1966
1967 if (!DECL_IGNORED_P (current_function_decl))
1968 debug_hooks->end_block (high_block_linenum, n);
1969 }
1970 if (write_symbols == DBX_DEBUG
1971 || write_symbols == SDB_DEBUG)
1972 {
1973 tree outer_block = BLOCK_SUPERCONTEXT (NOTE_BLOCK (insn));
1974 location_t *locus_ptr
1975 = block_nonartificial_location (outer_block);
1976
1977 if (locus_ptr != NULL)
1978 {
1979 override_filename = LOCATION_FILE (*locus_ptr);
1980 override_linenum = LOCATION_LINE (*locus_ptr);
1981 }
1982 else
1983 {
1984 override_filename = NULL;
1985 override_linenum = 0;
1986 }
1987 }
1988 break;
1989
1990 case NOTE_INSN_DELETED_LABEL:
1991 /* Emit the label. We may have deleted the CODE_LABEL because
1992 the label could be proved to be unreachable, though still
1993 referenced (in the form of having its address taken. */
1994 ASM_OUTPUT_DEBUG_LABEL (file, "L", CODE_LABEL_NUMBER (insn));
1995 break;
1996
1997 case NOTE_INSN_VAR_LOCATION:
1998 if (!DECL_IGNORED_P (current_function_decl))
1999 debug_hooks->var_location (insn);
2000 break;
2001
2002 default:
2003 gcc_unreachable ();
2004 break;
2005 }
2006 break;
2007
2008 case BARRIER:
2009 if (dwarf2out_do_frame ())
2010 dwarf2out_frame_debug (insn, false);
2011 break;
2012
2013 case CODE_LABEL:
2014 /* The target port might emit labels in the output function for
2015 some insn, e.g. sh.c output_branchy_insn. */
2016 if (CODE_LABEL_NUMBER (insn) <= max_labelno)
2017 {
2018 int align = LABEL_TO_ALIGNMENT (insn);
2019 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2020 int max_skip = LABEL_TO_MAX_SKIP (insn);
2021 #endif
2022
2023 if (align && NEXT_INSN (insn))
2024 {
2025 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2026 ASM_OUTPUT_MAX_SKIP_ALIGN (file, align, max_skip);
2027 #else
2028 #ifdef ASM_OUTPUT_ALIGN_WITH_NOP
2029 ASM_OUTPUT_ALIGN_WITH_NOP (file, align);
2030 #else
2031 ASM_OUTPUT_ALIGN (file, align);
2032 #endif
2033 #endif
2034 }
2035 }
2036 CC_STATUS_INIT;
2037
2038 if (!DECL_IGNORED_P (current_function_decl) && LABEL_NAME (insn))
2039 debug_hooks->label (insn);
2040
2041 app_disable ();
2042
2043 next = next_nonnote_insn (insn);
2044 /* If this label is followed by a jump-table, make sure we put
2045 the label in the read-only section. Also possibly write the
2046 label and jump table together. */
2047 if (next != 0 && JUMP_TABLE_DATA_P (next))
2048 {
2049 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2050 /* In this case, the case vector is being moved by the
2051 target, so don't output the label at all. Leave that
2052 to the back end macros. */
2053 #else
2054 if (! JUMP_TABLES_IN_TEXT_SECTION)
2055 {
2056 int log_align;
2057
2058 switch_to_section (targetm.asm_out.function_rodata_section
2059 (current_function_decl));
2060
2061 #ifdef ADDR_VEC_ALIGN
2062 log_align = ADDR_VEC_ALIGN (next);
2063 #else
2064 log_align = exact_log2 (BIGGEST_ALIGNMENT / BITS_PER_UNIT);
2065 #endif
2066 ASM_OUTPUT_ALIGN (file, log_align);
2067 }
2068 else
2069 switch_to_section (current_function_section ());
2070
2071 #ifdef ASM_OUTPUT_CASE_LABEL
2072 ASM_OUTPUT_CASE_LABEL (file, "L", CODE_LABEL_NUMBER (insn),
2073 next);
2074 #else
2075 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn));
2076 #endif
2077 #endif
2078 break;
2079 }
2080 if (LABEL_ALT_ENTRY_P (insn))
2081 output_alternate_entry_point (file, insn);
2082 else
2083 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn));
2084 break;
2085
2086 default:
2087 {
2088 rtx body = PATTERN (insn);
2089 int insn_code_number;
2090 const char *templ;
2091 bool is_stmt;
2092
2093 /* Reset this early so it is correct for ASM statements. */
2094 current_insn_predicate = NULL_RTX;
2095
2096 /* An INSN, JUMP_INSN or CALL_INSN.
2097 First check for special kinds that recog doesn't recognize. */
2098
2099 if (GET_CODE (body) == USE /* These are just declarations. */
2100 || GET_CODE (body) == CLOBBER)
2101 break;
2102
2103 #ifdef HAVE_cc0
2104 {
2105 /* If there is a REG_CC_SETTER note on this insn, it means that
2106 the setting of the condition code was done in the delay slot
2107 of the insn that branched here. So recover the cc status
2108 from the insn that set it. */
2109
2110 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2111 if (note)
2112 {
2113 NOTICE_UPDATE_CC (PATTERN (XEXP (note, 0)), XEXP (note, 0));
2114 cc_prev_status = cc_status;
2115 }
2116 }
2117 #endif
2118
2119 /* Detect insns that are really jump-tables
2120 and output them as such. */
2121
2122 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
2123 {
2124 #if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC))
2125 int vlen, idx;
2126 #endif
2127
2128 if (! JUMP_TABLES_IN_TEXT_SECTION)
2129 switch_to_section (targetm.asm_out.function_rodata_section
2130 (current_function_decl));
2131 else
2132 switch_to_section (current_function_section ());
2133
2134 app_disable ();
2135
2136 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2137 if (GET_CODE (body) == ADDR_VEC)
2138 {
2139 #ifdef ASM_OUTPUT_ADDR_VEC
2140 ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn), body);
2141 #else
2142 gcc_unreachable ();
2143 #endif
2144 }
2145 else
2146 {
2147 #ifdef ASM_OUTPUT_ADDR_DIFF_VEC
2148 ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn), body);
2149 #else
2150 gcc_unreachable ();
2151 #endif
2152 }
2153 #else
2154 vlen = XVECLEN (body, GET_CODE (body) == ADDR_DIFF_VEC);
2155 for (idx = 0; idx < vlen; idx++)
2156 {
2157 if (GET_CODE (body) == ADDR_VEC)
2158 {
2159 #ifdef ASM_OUTPUT_ADDR_VEC_ELT
2160 ASM_OUTPUT_ADDR_VEC_ELT
2161 (file, CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 0, idx), 0)));
2162 #else
2163 gcc_unreachable ();
2164 #endif
2165 }
2166 else
2167 {
2168 #ifdef ASM_OUTPUT_ADDR_DIFF_ELT
2169 ASM_OUTPUT_ADDR_DIFF_ELT
2170 (file,
2171 body,
2172 CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 1, idx), 0)),
2173 CODE_LABEL_NUMBER (XEXP (XEXP (body, 0), 0)));
2174 #else
2175 gcc_unreachable ();
2176 #endif
2177 }
2178 }
2179 #ifdef ASM_OUTPUT_CASE_END
2180 ASM_OUTPUT_CASE_END (file,
2181 CODE_LABEL_NUMBER (PREV_INSN (insn)),
2182 insn);
2183 #endif
2184 #endif
2185
2186 switch_to_section (current_function_section ());
2187
2188 break;
2189 }
2190 /* Output this line note if it is the first or the last line
2191 note in a row. */
2192 if (!DECL_IGNORED_P (current_function_decl)
2193 && notice_source_line (insn, &is_stmt))
2194 (*debug_hooks->source_line) (last_linenum, last_filename,
2195 last_discriminator, is_stmt);
2196
2197 if (GET_CODE (body) == ASM_INPUT)
2198 {
2199 const char *string = XSTR (body, 0);
2200
2201 /* There's no telling what that did to the condition codes. */
2202 CC_STATUS_INIT;
2203
2204 if (string[0])
2205 {
2206 expanded_location loc;
2207
2208 app_enable ();
2209 loc = expand_location (ASM_INPUT_SOURCE_LOCATION (body));
2210 if (*loc.file && loc.line)
2211 fprintf (asm_out_file, "%s %i \"%s\" 1\n",
2212 ASM_COMMENT_START, loc.line, loc.file);
2213 fprintf (asm_out_file, "\t%s\n", string);
2214 #if HAVE_AS_LINE_ZERO
2215 if (*loc.file && loc.line)
2216 fprintf (asm_out_file, "%s 0 \"\" 2\n", ASM_COMMENT_START);
2217 #endif
2218 }
2219 break;
2220 }
2221
2222 /* Detect `asm' construct with operands. */
2223 if (asm_noperands (body) >= 0)
2224 {
2225 unsigned int noperands = asm_noperands (body);
2226 rtx *ops = XALLOCAVEC (rtx, noperands);
2227 const char *string;
2228 location_t loc;
2229 expanded_location expanded;
2230
2231 /* There's no telling what that did to the condition codes. */
2232 CC_STATUS_INIT;
2233
2234 /* Get out the operand values. */
2235 string = decode_asm_operands (body, ops, NULL, NULL, NULL, &loc);
2236 /* Inhibit dying on what would otherwise be compiler bugs. */
2237 insn_noperands = noperands;
2238 this_is_asm_operands = insn;
2239 expanded = expand_location (loc);
2240
2241 #ifdef FINAL_PRESCAN_INSN
2242 FINAL_PRESCAN_INSN (insn, ops, insn_noperands);
2243 #endif
2244
2245 /* Output the insn using them. */
2246 if (string[0])
2247 {
2248 app_enable ();
2249 if (expanded.file && expanded.line)
2250 fprintf (asm_out_file, "%s %i \"%s\" 1\n",
2251 ASM_COMMENT_START, expanded.line, expanded.file);
2252 output_asm_insn (string, ops);
2253 #if HAVE_AS_LINE_ZERO
2254 if (expanded.file && expanded.line)
2255 fprintf (asm_out_file, "%s 0 \"\" 2\n", ASM_COMMENT_START);
2256 #endif
2257 }
2258
2259 if (targetm.asm_out.final_postscan_insn)
2260 targetm.asm_out.final_postscan_insn (file, insn, ops,
2261 insn_noperands);
2262
2263 this_is_asm_operands = 0;
2264 break;
2265 }
2266
2267 app_disable ();
2268
2269 if (GET_CODE (body) == SEQUENCE)
2270 {
2271 /* A delayed-branch sequence */
2272 int i;
2273
2274 final_sequence = body;
2275
2276 /* Record the delay slots' frame information before the branch.
2277 This is needed for delayed calls: see execute_cfa_program(). */
2278 if (dwarf2out_do_frame ())
2279 for (i = 1; i < XVECLEN (body, 0); i++)
2280 dwarf2out_frame_debug (XVECEXP (body, 0, i), false);
2281
2282 /* The first insn in this SEQUENCE might be a JUMP_INSN that will
2283 force the restoration of a comparison that was previously
2284 thought unnecessary. If that happens, cancel this sequence
2285 and cause that insn to be restored. */
2286
2287 next = final_scan_insn (XVECEXP (body, 0, 0), file, 0, 1, seen);
2288 if (next != XVECEXP (body, 0, 1))
2289 {
2290 final_sequence = 0;
2291 return next;
2292 }
2293
2294 for (i = 1; i < XVECLEN (body, 0); i++)
2295 {
2296 rtx insn = XVECEXP (body, 0, i);
2297 rtx next = NEXT_INSN (insn);
2298 /* We loop in case any instruction in a delay slot gets
2299 split. */
2300 do
2301 insn = final_scan_insn (insn, file, 0, 1, seen);
2302 while (insn != next);
2303 }
2304 #ifdef DBR_OUTPUT_SEQEND
2305 DBR_OUTPUT_SEQEND (file);
2306 #endif
2307 final_sequence = 0;
2308
2309 /* If the insn requiring the delay slot was a CALL_INSN, the
2310 insns in the delay slot are actually executed before the
2311 called function. Hence we don't preserve any CC-setting
2312 actions in these insns and the CC must be marked as being
2313 clobbered by the function. */
2314 if (CALL_P (XVECEXP (body, 0, 0)))
2315 {
2316 CC_STATUS_INIT;
2317 }
2318 break;
2319 }
2320
2321 /* We have a real machine instruction as rtl. */
2322
2323 body = PATTERN (insn);
2324
2325 #ifdef HAVE_cc0
2326 set = single_set (insn);
2327
2328 /* Check for redundant test and compare instructions
2329 (when the condition codes are already set up as desired).
2330 This is done only when optimizing; if not optimizing,
2331 it should be possible for the user to alter a variable
2332 with the debugger in between statements
2333 and the next statement should reexamine the variable
2334 to compute the condition codes. */
2335
2336 if (optimize_p)
2337 {
2338 if (set
2339 && GET_CODE (SET_DEST (set)) == CC0
2340 && insn != last_ignored_compare)
2341 {
2342 rtx src1, src2;
2343 if (GET_CODE (SET_SRC (set)) == SUBREG)
2344 SET_SRC (set) = alter_subreg (&SET_SRC (set));
2345
2346 src1 = SET_SRC (set);
2347 src2 = NULL_RTX;
2348 if (GET_CODE (SET_SRC (set)) == COMPARE)
2349 {
2350 if (GET_CODE (XEXP (SET_SRC (set), 0)) == SUBREG)
2351 XEXP (SET_SRC (set), 0)
2352 = alter_subreg (&XEXP (SET_SRC (set), 0));
2353 if (GET_CODE (XEXP (SET_SRC (set), 1)) == SUBREG)
2354 XEXP (SET_SRC (set), 1)
2355 = alter_subreg (&XEXP (SET_SRC (set), 1));
2356 if (XEXP (SET_SRC (set), 1)
2357 == CONST0_RTX (GET_MODE (XEXP (SET_SRC (set), 0))))
2358 src2 = XEXP (SET_SRC (set), 0);
2359 }
2360 if ((cc_status.value1 != 0
2361 && rtx_equal_p (src1, cc_status.value1))
2362 || (cc_status.value2 != 0
2363 && rtx_equal_p (src1, cc_status.value2))
2364 || (src2 != 0 && cc_status.value1 != 0
2365 && rtx_equal_p (src2, cc_status.value1))
2366 || (src2 != 0 && cc_status.value2 != 0
2367 && rtx_equal_p (src2, cc_status.value2)))
2368 {
2369 /* Don't delete insn if it has an addressing side-effect. */
2370 if (! FIND_REG_INC_NOTE (insn, NULL_RTX)
2371 /* or if anything in it is volatile. */
2372 && ! volatile_refs_p (PATTERN (insn)))
2373 {
2374 /* We don't really delete the insn; just ignore it. */
2375 last_ignored_compare = insn;
2376 break;
2377 }
2378 }
2379 }
2380 }
2381
2382 /* If this is a conditional branch, maybe modify it
2383 if the cc's are in a nonstandard state
2384 so that it accomplishes the same thing that it would
2385 do straightforwardly if the cc's were set up normally. */
2386
2387 if (cc_status.flags != 0
2388 && JUMP_P (insn)
2389 && GET_CODE (body) == SET
2390 && SET_DEST (body) == pc_rtx
2391 && GET_CODE (SET_SRC (body)) == IF_THEN_ELSE
2392 && COMPARISON_P (XEXP (SET_SRC (body), 0))
2393 && XEXP (XEXP (SET_SRC (body), 0), 0) == cc0_rtx)
2394 {
2395 /* This function may alter the contents of its argument
2396 and clear some of the cc_status.flags bits.
2397 It may also return 1 meaning condition now always true
2398 or -1 meaning condition now always false
2399 or 2 meaning condition nontrivial but altered. */
2400 int result = alter_cond (XEXP (SET_SRC (body), 0));
2401 /* If condition now has fixed value, replace the IF_THEN_ELSE
2402 with its then-operand or its else-operand. */
2403 if (result == 1)
2404 SET_SRC (body) = XEXP (SET_SRC (body), 1);
2405 if (result == -1)
2406 SET_SRC (body) = XEXP (SET_SRC (body), 2);
2407
2408 /* The jump is now either unconditional or a no-op.
2409 If it has become a no-op, don't try to output it.
2410 (It would not be recognized.) */
2411 if (SET_SRC (body) == pc_rtx)
2412 {
2413 delete_insn (insn);
2414 break;
2415 }
2416 else if (GET_CODE (SET_SRC (body)) == RETURN)
2417 /* Replace (set (pc) (return)) with (return). */
2418 PATTERN (insn) = body = SET_SRC (body);
2419
2420 /* Rerecognize the instruction if it has changed. */
2421 if (result != 0)
2422 INSN_CODE (insn) = -1;
2423 }
2424
2425 /* If this is a conditional trap, maybe modify it if the cc's
2426 are in a nonstandard state so that it accomplishes the same
2427 thing that it would do straightforwardly if the cc's were
2428 set up normally. */
2429 if (cc_status.flags != 0
2430 && NONJUMP_INSN_P (insn)
2431 && GET_CODE (body) == TRAP_IF
2432 && COMPARISON_P (TRAP_CONDITION (body))
2433 && XEXP (TRAP_CONDITION (body), 0) == cc0_rtx)
2434 {
2435 /* This function may alter the contents of its argument
2436 and clear some of the cc_status.flags bits.
2437 It may also return 1 meaning condition now always true
2438 or -1 meaning condition now always false
2439 or 2 meaning condition nontrivial but altered. */
2440 int result = alter_cond (TRAP_CONDITION (body));
2441
2442 /* If TRAP_CONDITION has become always false, delete the
2443 instruction. */
2444 if (result == -1)
2445 {
2446 delete_insn (insn);
2447 break;
2448 }
2449
2450 /* If TRAP_CONDITION has become always true, replace
2451 TRAP_CONDITION with const_true_rtx. */
2452 if (result == 1)
2453 TRAP_CONDITION (body) = const_true_rtx;
2454
2455 /* Rerecognize the instruction if it has changed. */
2456 if (result != 0)
2457 INSN_CODE (insn) = -1;
2458 }
2459
2460 /* Make same adjustments to instructions that examine the
2461 condition codes without jumping and instructions that
2462 handle conditional moves (if this machine has either one). */
2463
2464 if (cc_status.flags != 0
2465 && set != 0)
2466 {
2467 rtx cond_rtx, then_rtx, else_rtx;
2468
2469 if (!JUMP_P (insn)
2470 && GET_CODE (SET_SRC (set)) == IF_THEN_ELSE)
2471 {
2472 cond_rtx = XEXP (SET_SRC (set), 0);
2473 then_rtx = XEXP (SET_SRC (set), 1);
2474 else_rtx = XEXP (SET_SRC (set), 2);
2475 }
2476 else
2477 {
2478 cond_rtx = SET_SRC (set);
2479 then_rtx = const_true_rtx;
2480 else_rtx = const0_rtx;
2481 }
2482
2483 switch (GET_CODE (cond_rtx))
2484 {
2485 case GTU:
2486 case GT:
2487 case LTU:
2488 case LT:
2489 case GEU:
2490 case GE:
2491 case LEU:
2492 case LE:
2493 case EQ:
2494 case NE:
2495 {
2496 int result;
2497 if (XEXP (cond_rtx, 0) != cc0_rtx)
2498 break;
2499 result = alter_cond (cond_rtx);
2500 if (result == 1)
2501 validate_change (insn, &SET_SRC (set), then_rtx, 0);
2502 else if (result == -1)
2503 validate_change (insn, &SET_SRC (set), else_rtx, 0);
2504 else if (result == 2)
2505 INSN_CODE (insn) = -1;
2506 if (SET_DEST (set) == SET_SRC (set))
2507 delete_insn (insn);
2508 }
2509 break;
2510
2511 default:
2512 break;
2513 }
2514 }
2515
2516 #endif
2517
2518 #ifdef HAVE_peephole
2519 /* Do machine-specific peephole optimizations if desired. */
2520
2521 if (optimize_p && !flag_no_peephole && !nopeepholes)
2522 {
2523 rtx next = peephole (insn);
2524 /* When peepholing, if there were notes within the peephole,
2525 emit them before the peephole. */
2526 if (next != 0 && next != NEXT_INSN (insn))
2527 {
2528 rtx note, prev = PREV_INSN (insn);
2529
2530 for (note = NEXT_INSN (insn); note != next;
2531 note = NEXT_INSN (note))
2532 final_scan_insn (note, file, optimize_p, nopeepholes, seen);
2533
2534 /* Put the notes in the proper position for a later
2535 rescan. For example, the SH target can do this
2536 when generating a far jump in a delayed branch
2537 sequence. */
2538 note = NEXT_INSN (insn);
2539 PREV_INSN (note) = prev;
2540 NEXT_INSN (prev) = note;
2541 NEXT_INSN (PREV_INSN (next)) = insn;
2542 PREV_INSN (insn) = PREV_INSN (next);
2543 NEXT_INSN (insn) = next;
2544 PREV_INSN (next) = insn;
2545 }
2546
2547 /* PEEPHOLE might have changed this. */
2548 body = PATTERN (insn);
2549 }
2550 #endif
2551
2552 /* Try to recognize the instruction.
2553 If successful, verify that the operands satisfy the
2554 constraints for the instruction. Crash if they don't,
2555 since `reload' should have changed them so that they do. */
2556
2557 insn_code_number = recog_memoized (insn);
2558 cleanup_subreg_operands (insn);
2559
2560 /* Dump the insn in the assembly for debugging. */
2561 if (flag_dump_rtl_in_asm)
2562 {
2563 print_rtx_head = ASM_COMMENT_START;
2564 print_rtl_single (asm_out_file, insn);
2565 print_rtx_head = "";
2566 }
2567
2568 if (! constrain_operands_cached (1))
2569 fatal_insn_not_found (insn);
2570
2571 /* Some target machines need to prescan each insn before
2572 it is output. */
2573
2574 #ifdef FINAL_PRESCAN_INSN
2575 FINAL_PRESCAN_INSN (insn, recog_data.operand, recog_data.n_operands);
2576 #endif
2577
2578 if (targetm.have_conditional_execution ()
2579 && GET_CODE (PATTERN (insn)) == COND_EXEC)
2580 current_insn_predicate = COND_EXEC_TEST (PATTERN (insn));
2581
2582 #ifdef HAVE_cc0
2583 cc_prev_status = cc_status;
2584
2585 /* Update `cc_status' for this instruction.
2586 The instruction's output routine may change it further.
2587 If the output routine for a jump insn needs to depend
2588 on the cc status, it should look at cc_prev_status. */
2589
2590 NOTICE_UPDATE_CC (body, insn);
2591 #endif
2592
2593 current_output_insn = debug_insn = insn;
2594
2595 if (CALL_P (insn) && dwarf2out_do_frame ())
2596 dwarf2out_frame_debug (insn, false);
2597
2598 /* Find the proper template for this insn. */
2599 templ = get_insn_template (insn_code_number, insn);
2600
2601 /* If the C code returns 0, it means that it is a jump insn
2602 which follows a deleted test insn, and that test insn
2603 needs to be reinserted. */
2604 if (templ == 0)
2605 {
2606 rtx prev;
2607
2608 gcc_assert (prev_nonnote_insn (insn) == last_ignored_compare);
2609
2610 /* We have already processed the notes between the setter and
2611 the user. Make sure we don't process them again, this is
2612 particularly important if one of the notes is a block
2613 scope note or an EH note. */
2614 for (prev = insn;
2615 prev != last_ignored_compare;
2616 prev = PREV_INSN (prev))
2617 {
2618 if (NOTE_P (prev))
2619 delete_insn (prev); /* Use delete_note. */
2620 }
2621
2622 return prev;
2623 }
2624
2625 /* If the template is the string "#", it means that this insn must
2626 be split. */
2627 if (templ[0] == '#' && templ[1] == '\0')
2628 {
2629 rtx new_rtx = try_split (body, insn, 0);
2630
2631 /* If we didn't split the insn, go away. */
2632 if (new_rtx == insn && PATTERN (new_rtx) == body)
2633 fatal_insn ("could not split insn", insn);
2634
2635 #ifdef HAVE_ATTR_length
2636 /* This instruction should have been split in shorten_branches,
2637 to ensure that we would have valid length info for the
2638 splitees. */
2639 gcc_unreachable ();
2640 #endif
2641
2642 return new_rtx;
2643 }
2644
2645 /* ??? This will put the directives in the wrong place if
2646 get_insn_template outputs assembly directly. However calling it
2647 before get_insn_template breaks if the insns is split. */
2648 if (targetm.asm_out.unwind_emit_before_insn
2649 && targetm.asm_out.unwind_emit)
2650 targetm.asm_out.unwind_emit (asm_out_file, insn);
2651
2652 if (CALL_P (insn))
2653 {
2654 rtx x = call_from_call_insn (insn);
2655 x = XEXP (x, 0);
2656 if (x && MEM_P (x) && GET_CODE (XEXP (x, 0)) == SYMBOL_REF)
2657 {
2658 tree t;
2659 x = XEXP (x, 0);
2660 t = SYMBOL_REF_DECL (x);
2661 if (t)
2662 assemble_external (t);
2663 }
2664 }
2665
2666 /* Output assembler code from the template. */
2667 output_asm_insn (templ, recog_data.operand);
2668
2669 /* Record point-of-call information for ICF debugging. */
2670 if (flag_enable_icf_debug && CALL_P (insn))
2671 {
2672 rtx x = call_from_call_insn (insn);
2673 x = XEXP (x, 0);
2674 if (x && MEM_P (x))
2675 {
2676 if (GET_CODE (XEXP (x, 0)) == SYMBOL_REF)
2677 {
2678 tree t;
2679 x = XEXP (x, 0);
2680 t = SYMBOL_REF_DECL (x);
2681 if (t)
2682 (*debug_hooks->direct_call) (t);
2683 }
2684 else
2685 (*debug_hooks->virtual_call) (INSN_UID (insn));
2686 }
2687 }
2688
2689 /* Some target machines need to postscan each insn after
2690 it is output. */
2691 if (targetm.asm_out.final_postscan_insn)
2692 targetm.asm_out.final_postscan_insn (file, insn, recog_data.operand,
2693 recog_data.n_operands);
2694
2695 /* If necessary, report the effect that the instruction has on
2696 the unwind info. We've already done this for delay slots
2697 and call instructions. */
2698 if (final_sequence == 0
2699 #if !defined (HAVE_prologue)
2700 && !ACCUMULATE_OUTGOING_ARGS
2701 #endif
2702 && dwarf2out_do_frame ())
2703 dwarf2out_frame_debug (insn, true);
2704
2705 if (!targetm.asm_out.unwind_emit_before_insn
2706 && targetm.asm_out.unwind_emit)
2707 targetm.asm_out.unwind_emit (asm_out_file, insn);
2708
2709 current_output_insn = debug_insn = 0;
2710 }
2711 }
2712 return NEXT_INSN (insn);
2713 }
2714 \f
2715 /* Return whether a source line note needs to be emitted before INSN.
2716 Sets IS_STMT to TRUE if the line should be marked as a possible
2717 breakpoint location. */
2718
2719 static bool
2720 notice_source_line (rtx insn, bool *is_stmt)
2721 {
2722 const char *filename;
2723 int linenum;
2724
2725 if (override_filename)
2726 {
2727 filename = override_filename;
2728 linenum = override_linenum;
2729 }
2730 else
2731 {
2732 filename = insn_file (insn);
2733 linenum = insn_line (insn);
2734 }
2735
2736 if (filename == NULL)
2737 return false;
2738
2739 if (force_source_line
2740 || filename != last_filename
2741 || last_linenum != linenum)
2742 {
2743 force_source_line = false;
2744 last_filename = filename;
2745 last_linenum = linenum;
2746 last_discriminator = discriminator;
2747 *is_stmt = true;
2748 high_block_linenum = MAX (last_linenum, high_block_linenum);
2749 high_function_linenum = MAX (last_linenum, high_function_linenum);
2750 return true;
2751 }
2752
2753 if (SUPPORTS_DISCRIMINATOR && last_discriminator != discriminator)
2754 {
2755 /* If the discriminator changed, but the line number did not,
2756 output the line table entry with is_stmt false so the
2757 debugger does not treat this as a breakpoint location. */
2758 last_discriminator = discriminator;
2759 *is_stmt = false;
2760 return true;
2761 }
2762
2763 return false;
2764 }
2765 \f
2766 /* For each operand in INSN, simplify (subreg (reg)) so that it refers
2767 directly to the desired hard register. */
2768
2769 void
2770 cleanup_subreg_operands (rtx insn)
2771 {
2772 int i;
2773 bool changed = false;
2774 extract_insn_cached (insn);
2775 for (i = 0; i < recog_data.n_operands; i++)
2776 {
2777 /* The following test cannot use recog_data.operand when testing
2778 for a SUBREG: the underlying object might have been changed
2779 already if we are inside a match_operator expression that
2780 matches the else clause. Instead we test the underlying
2781 expression directly. */
2782 if (GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
2783 {
2784 recog_data.operand[i] = alter_subreg (recog_data.operand_loc[i]);
2785 changed = true;
2786 }
2787 else if (GET_CODE (recog_data.operand[i]) == PLUS
2788 || GET_CODE (recog_data.operand[i]) == MULT
2789 || MEM_P (recog_data.operand[i]))
2790 recog_data.operand[i] = walk_alter_subreg (recog_data.operand_loc[i], &changed);
2791 }
2792
2793 for (i = 0; i < recog_data.n_dups; i++)
2794 {
2795 if (GET_CODE (*recog_data.dup_loc[i]) == SUBREG)
2796 {
2797 *recog_data.dup_loc[i] = alter_subreg (recog_data.dup_loc[i]);
2798 changed = true;
2799 }
2800 else if (GET_CODE (*recog_data.dup_loc[i]) == PLUS
2801 || GET_CODE (*recog_data.dup_loc[i]) == MULT
2802 || MEM_P (*recog_data.dup_loc[i]))
2803 *recog_data.dup_loc[i] = walk_alter_subreg (recog_data.dup_loc[i], &changed);
2804 }
2805 if (changed)
2806 df_insn_rescan (insn);
2807 }
2808
2809 /* If X is a SUBREG, replace it with a REG or a MEM,
2810 based on the thing it is a subreg of. */
2811
2812 rtx
2813 alter_subreg (rtx *xp)
2814 {
2815 rtx x = *xp;
2816 rtx y = SUBREG_REG (x);
2817
2818 /* simplify_subreg does not remove subreg from volatile references.
2819 We are required to. */
2820 if (MEM_P (y))
2821 {
2822 int offset = SUBREG_BYTE (x);
2823
2824 /* For paradoxical subregs on big-endian machines, SUBREG_BYTE
2825 contains 0 instead of the proper offset. See simplify_subreg. */
2826 if (offset == 0
2827 && GET_MODE_SIZE (GET_MODE (y)) < GET_MODE_SIZE (GET_MODE (x)))
2828 {
2829 int difference = GET_MODE_SIZE (GET_MODE (y))
2830 - GET_MODE_SIZE (GET_MODE (x));
2831 if (WORDS_BIG_ENDIAN)
2832 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
2833 if (BYTES_BIG_ENDIAN)
2834 offset += difference % UNITS_PER_WORD;
2835 }
2836
2837 *xp = adjust_address (y, GET_MODE (x), offset);
2838 }
2839 else
2840 {
2841 rtx new_rtx = simplify_subreg (GET_MODE (x), y, GET_MODE (y),
2842 SUBREG_BYTE (x));
2843
2844 if (new_rtx != 0)
2845 *xp = new_rtx;
2846 else if (REG_P (y))
2847 {
2848 /* Simplify_subreg can't handle some REG cases, but we have to. */
2849 unsigned int regno;
2850 HOST_WIDE_INT offset;
2851
2852 regno = subreg_regno (x);
2853 if (subreg_lowpart_p (x))
2854 offset = byte_lowpart_offset (GET_MODE (x), GET_MODE (y));
2855 else
2856 offset = SUBREG_BYTE (x);
2857 *xp = gen_rtx_REG_offset (y, GET_MODE (x), regno, offset);
2858 }
2859 }
2860
2861 return *xp;
2862 }
2863
2864 /* Do alter_subreg on all the SUBREGs contained in X. */
2865
2866 static rtx
2867 walk_alter_subreg (rtx *xp, bool *changed)
2868 {
2869 rtx x = *xp;
2870 switch (GET_CODE (x))
2871 {
2872 case PLUS:
2873 case MULT:
2874 case AND:
2875 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed);
2876 XEXP (x, 1) = walk_alter_subreg (&XEXP (x, 1), changed);
2877 break;
2878
2879 case MEM:
2880 case ZERO_EXTEND:
2881 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed);
2882 break;
2883
2884 case SUBREG:
2885 *changed = true;
2886 return alter_subreg (xp);
2887
2888 default:
2889 break;
2890 }
2891
2892 return *xp;
2893 }
2894 \f
2895 #ifdef HAVE_cc0
2896
2897 /* Given BODY, the body of a jump instruction, alter the jump condition
2898 as required by the bits that are set in cc_status.flags.
2899 Not all of the bits there can be handled at this level in all cases.
2900
2901 The value is normally 0.
2902 1 means that the condition has become always true.
2903 -1 means that the condition has become always false.
2904 2 means that COND has been altered. */
2905
2906 static int
2907 alter_cond (rtx cond)
2908 {
2909 int value = 0;
2910
2911 if (cc_status.flags & CC_REVERSED)
2912 {
2913 value = 2;
2914 PUT_CODE (cond, swap_condition (GET_CODE (cond)));
2915 }
2916
2917 if (cc_status.flags & CC_INVERTED)
2918 {
2919 value = 2;
2920 PUT_CODE (cond, reverse_condition (GET_CODE (cond)));
2921 }
2922
2923 if (cc_status.flags & CC_NOT_POSITIVE)
2924 switch (GET_CODE (cond))
2925 {
2926 case LE:
2927 case LEU:
2928 case GEU:
2929 /* Jump becomes unconditional. */
2930 return 1;
2931
2932 case GT:
2933 case GTU:
2934 case LTU:
2935 /* Jump becomes no-op. */
2936 return -1;
2937
2938 case GE:
2939 PUT_CODE (cond, EQ);
2940 value = 2;
2941 break;
2942
2943 case LT:
2944 PUT_CODE (cond, NE);
2945 value = 2;
2946 break;
2947
2948 default:
2949 break;
2950 }
2951
2952 if (cc_status.flags & CC_NOT_NEGATIVE)
2953 switch (GET_CODE (cond))
2954 {
2955 case GE:
2956 case GEU:
2957 /* Jump becomes unconditional. */
2958 return 1;
2959
2960 case LT:
2961 case LTU:
2962 /* Jump becomes no-op. */
2963 return -1;
2964
2965 case LE:
2966 case LEU:
2967 PUT_CODE (cond, EQ);
2968 value = 2;
2969 break;
2970
2971 case GT:
2972 case GTU:
2973 PUT_CODE (cond, NE);
2974 value = 2;
2975 break;
2976
2977 default:
2978 break;
2979 }
2980
2981 if (cc_status.flags & CC_NO_OVERFLOW)
2982 switch (GET_CODE (cond))
2983 {
2984 case GEU:
2985 /* Jump becomes unconditional. */
2986 return 1;
2987
2988 case LEU:
2989 PUT_CODE (cond, EQ);
2990 value = 2;
2991 break;
2992
2993 case GTU:
2994 PUT_CODE (cond, NE);
2995 value = 2;
2996 break;
2997
2998 case LTU:
2999 /* Jump becomes no-op. */
3000 return -1;
3001
3002 default:
3003 break;
3004 }
3005
3006 if (cc_status.flags & (CC_Z_IN_NOT_N | CC_Z_IN_N))
3007 switch (GET_CODE (cond))
3008 {
3009 default:
3010 gcc_unreachable ();
3011
3012 case NE:
3013 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? GE : LT);
3014 value = 2;
3015 break;
3016
3017 case EQ:
3018 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? LT : GE);
3019 value = 2;
3020 break;
3021 }
3022
3023 if (cc_status.flags & CC_NOT_SIGNED)
3024 /* The flags are valid if signed condition operators are converted
3025 to unsigned. */
3026 switch (GET_CODE (cond))
3027 {
3028 case LE:
3029 PUT_CODE (cond, LEU);
3030 value = 2;
3031 break;
3032
3033 case LT:
3034 PUT_CODE (cond, LTU);
3035 value = 2;
3036 break;
3037
3038 case GT:
3039 PUT_CODE (cond, GTU);
3040 value = 2;
3041 break;
3042
3043 case GE:
3044 PUT_CODE (cond, GEU);
3045 value = 2;
3046 break;
3047
3048 default:
3049 break;
3050 }
3051
3052 return value;
3053 }
3054 #endif
3055 \f
3056 /* Report inconsistency between the assembler template and the operands.
3057 In an `asm', it's the user's fault; otherwise, the compiler's fault. */
3058
3059 void
3060 output_operand_lossage (const char *cmsgid, ...)
3061 {
3062 char *fmt_string;
3063 char *new_message;
3064 const char *pfx_str;
3065 va_list ap;
3066
3067 va_start (ap, cmsgid);
3068
3069 pfx_str = this_is_asm_operands ? _("invalid 'asm': ") : "output_operand: ";
3070 asprintf (&fmt_string, "%s%s", pfx_str, _(cmsgid));
3071 vasprintf (&new_message, fmt_string, ap);
3072
3073 if (this_is_asm_operands)
3074 error_for_asm (this_is_asm_operands, "%s", new_message);
3075 else
3076 internal_error ("%s", new_message);
3077
3078 free (fmt_string);
3079 free (new_message);
3080 va_end (ap);
3081 }
3082 \f
3083 /* Output of assembler code from a template, and its subroutines. */
3084
3085 /* Annotate the assembly with a comment describing the pattern and
3086 alternative used. */
3087
3088 static void
3089 output_asm_name (void)
3090 {
3091 if (debug_insn)
3092 {
3093 int num = INSN_CODE (debug_insn);
3094 fprintf (asm_out_file, "\t%s %d\t%s",
3095 ASM_COMMENT_START, INSN_UID (debug_insn),
3096 insn_data[num].name);
3097 if (insn_data[num].n_alternatives > 1)
3098 fprintf (asm_out_file, "/%d", which_alternative + 1);
3099 #ifdef HAVE_ATTR_length
3100 fprintf (asm_out_file, "\t[length = %d]",
3101 get_attr_length (debug_insn));
3102 #endif
3103 /* Clear this so only the first assembler insn
3104 of any rtl insn will get the special comment for -dp. */
3105 debug_insn = 0;
3106 }
3107 }
3108
3109 /* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it
3110 or its address, return that expr . Set *PADDRESSP to 1 if the expr
3111 corresponds to the address of the object and 0 if to the object. */
3112
3113 static tree
3114 get_mem_expr_from_op (rtx op, int *paddressp)
3115 {
3116 tree expr;
3117 int inner_addressp;
3118
3119 *paddressp = 0;
3120
3121 if (REG_P (op))
3122 return REG_EXPR (op);
3123 else if (!MEM_P (op))
3124 return 0;
3125
3126 if (MEM_EXPR (op) != 0)
3127 return MEM_EXPR (op);
3128
3129 /* Otherwise we have an address, so indicate it and look at the address. */
3130 *paddressp = 1;
3131 op = XEXP (op, 0);
3132
3133 /* First check if we have a decl for the address, then look at the right side
3134 if it is a PLUS. Otherwise, strip off arithmetic and keep looking.
3135 But don't allow the address to itself be indirect. */
3136 if ((expr = get_mem_expr_from_op (op, &inner_addressp)) && ! inner_addressp)
3137 return expr;
3138 else if (GET_CODE (op) == PLUS
3139 && (expr = get_mem_expr_from_op (XEXP (op, 1), &inner_addressp)))
3140 return expr;
3141
3142 while (UNARY_P (op)
3143 || GET_RTX_CLASS (GET_CODE (op)) == RTX_BIN_ARITH)
3144 op = XEXP (op, 0);
3145
3146 expr = get_mem_expr_from_op (op, &inner_addressp);
3147 return inner_addressp ? 0 : expr;
3148 }
3149
3150 /* Output operand names for assembler instructions. OPERANDS is the
3151 operand vector, OPORDER is the order to write the operands, and NOPS
3152 is the number of operands to write. */
3153
3154 static void
3155 output_asm_operand_names (rtx *operands, int *oporder, int nops)
3156 {
3157 int wrote = 0;
3158 int i;
3159
3160 for (i = 0; i < nops; i++)
3161 {
3162 int addressp;
3163 rtx op = operands[oporder[i]];
3164 tree expr = get_mem_expr_from_op (op, &addressp);
3165
3166 fprintf (asm_out_file, "%c%s",
3167 wrote ? ',' : '\t', wrote ? "" : ASM_COMMENT_START);
3168 wrote = 1;
3169 if (expr)
3170 {
3171 fprintf (asm_out_file, "%s",
3172 addressp ? "*" : "");
3173 print_mem_expr (asm_out_file, expr);
3174 wrote = 1;
3175 }
3176 else if (REG_P (op) && ORIGINAL_REGNO (op)
3177 && ORIGINAL_REGNO (op) != REGNO (op))
3178 fprintf (asm_out_file, " tmp%i", ORIGINAL_REGNO (op));
3179 }
3180 }
3181
3182 /* Output text from TEMPLATE to the assembler output file,
3183 obeying %-directions to substitute operands taken from
3184 the vector OPERANDS.
3185
3186 %N (for N a digit) means print operand N in usual manner.
3187 %lN means require operand N to be a CODE_LABEL or LABEL_REF
3188 and print the label name with no punctuation.
3189 %cN means require operand N to be a constant
3190 and print the constant expression with no punctuation.
3191 %aN means expect operand N to be a memory address
3192 (not a memory reference!) and print a reference
3193 to that address.
3194 %nN means expect operand N to be a constant
3195 and print a constant expression for minus the value
3196 of the operand, with no other punctuation. */
3197
3198 void
3199 output_asm_insn (const char *templ, rtx *operands)
3200 {
3201 const char *p;
3202 int c;
3203 #ifdef ASSEMBLER_DIALECT
3204 int dialect = 0;
3205 #endif
3206 int oporder[MAX_RECOG_OPERANDS];
3207 char opoutput[MAX_RECOG_OPERANDS];
3208 int ops = 0;
3209
3210 /* An insn may return a null string template
3211 in a case where no assembler code is needed. */
3212 if (*templ == 0)
3213 return;
3214
3215 memset (opoutput, 0, sizeof opoutput);
3216 p = templ;
3217 putc ('\t', asm_out_file);
3218
3219 #ifdef ASM_OUTPUT_OPCODE
3220 ASM_OUTPUT_OPCODE (asm_out_file, p);
3221 #endif
3222
3223 while ((c = *p++))
3224 switch (c)
3225 {
3226 case '\n':
3227 if (flag_verbose_asm)
3228 output_asm_operand_names (operands, oporder, ops);
3229 if (flag_print_asm_name)
3230 output_asm_name ();
3231
3232 ops = 0;
3233 memset (opoutput, 0, sizeof opoutput);
3234
3235 putc (c, asm_out_file);
3236 #ifdef ASM_OUTPUT_OPCODE
3237 while ((c = *p) == '\t')
3238 {
3239 putc (c, asm_out_file);
3240 p++;
3241 }
3242 ASM_OUTPUT_OPCODE (asm_out_file, p);
3243 #endif
3244 break;
3245
3246 #ifdef ASSEMBLER_DIALECT
3247 case '{':
3248 {
3249 int i;
3250
3251 if (dialect)
3252 output_operand_lossage ("nested assembly dialect alternatives");
3253 else
3254 dialect = 1;
3255
3256 /* If we want the first dialect, do nothing. Otherwise, skip
3257 DIALECT_NUMBER of strings ending with '|'. */
3258 for (i = 0; i < dialect_number; i++)
3259 {
3260 while (*p && *p != '}' && *p++ != '|')
3261 ;
3262 if (*p == '}')
3263 break;
3264 if (*p == '|')
3265 p++;
3266 }
3267
3268 if (*p == '\0')
3269 output_operand_lossage ("unterminated assembly dialect alternative");
3270 }
3271 break;
3272
3273 case '|':
3274 if (dialect)
3275 {
3276 /* Skip to close brace. */
3277 do
3278 {
3279 if (*p == '\0')
3280 {
3281 output_operand_lossage ("unterminated assembly dialect alternative");
3282 break;
3283 }
3284 }
3285 while (*p++ != '}');
3286 dialect = 0;
3287 }
3288 else
3289 putc (c, asm_out_file);
3290 break;
3291
3292 case '}':
3293 if (! dialect)
3294 putc (c, asm_out_file);
3295 dialect = 0;
3296 break;
3297 #endif
3298
3299 case '%':
3300 /* %% outputs a single %. */
3301 if (*p == '%')
3302 {
3303 p++;
3304 putc (c, asm_out_file);
3305 }
3306 /* %= outputs a number which is unique to each insn in the entire
3307 compilation. This is useful for making local labels that are
3308 referred to more than once in a given insn. */
3309 else if (*p == '=')
3310 {
3311 p++;
3312 fprintf (asm_out_file, "%d", insn_counter);
3313 }
3314 /* % followed by a letter and some digits
3315 outputs an operand in a special way depending on the letter.
3316 Letters `acln' are implemented directly.
3317 Other letters are passed to `output_operand' so that
3318 the TARGET_PRINT_OPERAND hook can define them. */
3319 else if (ISALPHA (*p))
3320 {
3321 int letter = *p++;
3322 unsigned long opnum;
3323 char *endptr;
3324
3325 opnum = strtoul (p, &endptr, 10);
3326
3327 if (endptr == p)
3328 output_operand_lossage ("operand number missing "
3329 "after %%-letter");
3330 else if (this_is_asm_operands && opnum >= insn_noperands)
3331 output_operand_lossage ("operand number out of range");
3332 else if (letter == 'l')
3333 output_asm_label (operands[opnum]);
3334 else if (letter == 'a')
3335 output_address (operands[opnum]);
3336 else if (letter == 'c')
3337 {
3338 if (CONSTANT_ADDRESS_P (operands[opnum]))
3339 output_addr_const (asm_out_file, operands[opnum]);
3340 else
3341 output_operand (operands[opnum], 'c');
3342 }
3343 else if (letter == 'n')
3344 {
3345 if (CONST_INT_P (operands[opnum]))
3346 fprintf (asm_out_file, HOST_WIDE_INT_PRINT_DEC,
3347 - INTVAL (operands[opnum]));
3348 else
3349 {
3350 putc ('-', asm_out_file);
3351 output_addr_const (asm_out_file, operands[opnum]);
3352 }
3353 }
3354 else
3355 output_operand (operands[opnum], letter);
3356
3357 if (!opoutput[opnum])
3358 oporder[ops++] = opnum;
3359 opoutput[opnum] = 1;
3360
3361 p = endptr;
3362 c = *p;
3363 }
3364 /* % followed by a digit outputs an operand the default way. */
3365 else if (ISDIGIT (*p))
3366 {
3367 unsigned long opnum;
3368 char *endptr;
3369
3370 opnum = strtoul (p, &endptr, 10);
3371 if (this_is_asm_operands && opnum >= insn_noperands)
3372 output_operand_lossage ("operand number out of range");
3373 else
3374 output_operand (operands[opnum], 0);
3375
3376 if (!opoutput[opnum])
3377 oporder[ops++] = opnum;
3378 opoutput[opnum] = 1;
3379
3380 p = endptr;
3381 c = *p;
3382 }
3383 /* % followed by punctuation: output something for that
3384 punctuation character alone, with no operand. The
3385 TARGET_PRINT_OPERAND hook decides what is actually done. */
3386 else if (targetm.asm_out.print_operand_punct_valid_p ((unsigned char) *p))
3387 output_operand (NULL_RTX, *p++);
3388 else
3389 output_operand_lossage ("invalid %%-code");
3390 break;
3391
3392 default:
3393 putc (c, asm_out_file);
3394 }
3395
3396 /* Write out the variable names for operands, if we know them. */
3397 if (flag_verbose_asm)
3398 output_asm_operand_names (operands, oporder, ops);
3399 if (flag_print_asm_name)
3400 output_asm_name ();
3401
3402 putc ('\n', asm_out_file);
3403 }
3404 \f
3405 /* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */
3406
3407 void
3408 output_asm_label (rtx x)
3409 {
3410 char buf[256];
3411
3412 if (GET_CODE (x) == LABEL_REF)
3413 x = XEXP (x, 0);
3414 if (LABEL_P (x)
3415 || (NOTE_P (x)
3416 && NOTE_KIND (x) == NOTE_INSN_DELETED_LABEL))
3417 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3418 else
3419 output_operand_lossage ("'%%l' operand isn't a label");
3420
3421 assemble_name (asm_out_file, buf);
3422 }
3423
3424 /* Helper rtx-iteration-function for mark_symbol_refs_as_used and
3425 output_operand. Marks SYMBOL_REFs as referenced through use of
3426 assemble_external. */
3427
3428 static int
3429 mark_symbol_ref_as_used (rtx *xp, void *dummy ATTRIBUTE_UNUSED)
3430 {
3431 rtx x = *xp;
3432
3433 /* If we have a used symbol, we may have to emit assembly
3434 annotations corresponding to whether the symbol is external, weak
3435 or has non-default visibility. */
3436 if (GET_CODE (x) == SYMBOL_REF)
3437 {
3438 tree t;
3439
3440 t = SYMBOL_REF_DECL (x);
3441 if (t)
3442 assemble_external (t);
3443
3444 return -1;
3445 }
3446
3447 return 0;
3448 }
3449
3450 /* Marks SYMBOL_REFs in x as referenced through use of assemble_external. */
3451
3452 void
3453 mark_symbol_refs_as_used (rtx x)
3454 {
3455 for_each_rtx (&x, mark_symbol_ref_as_used, NULL);
3456 }
3457
3458 /* Print operand X using machine-dependent assembler syntax.
3459 CODE is a non-digit that preceded the operand-number in the % spec,
3460 such as 'z' if the spec was `%z3'. CODE is 0 if there was no char
3461 between the % and the digits.
3462 When CODE is a non-letter, X is 0.
3463
3464 The meanings of the letters are machine-dependent and controlled
3465 by TARGET_PRINT_OPERAND. */
3466
3467 void
3468 output_operand (rtx x, int code ATTRIBUTE_UNUSED)
3469 {
3470 if (x && GET_CODE (x) == SUBREG)
3471 x = alter_subreg (&x);
3472
3473 /* X must not be a pseudo reg. */
3474 gcc_assert (!x || !REG_P (x) || REGNO (x) < FIRST_PSEUDO_REGISTER);
3475
3476 targetm.asm_out.print_operand (asm_out_file, x, code);
3477
3478 if (x == NULL_RTX)
3479 return;
3480
3481 for_each_rtx (&x, mark_symbol_ref_as_used, NULL);
3482 }
3483
3484 /* Print a memory reference operand for address X using
3485 machine-dependent assembler syntax. */
3486
3487 void
3488 output_address (rtx x)
3489 {
3490 bool changed = false;
3491 walk_alter_subreg (&x, &changed);
3492 targetm.asm_out.print_operand_address (asm_out_file, x);
3493 }
3494 \f
3495 /* Print an integer constant expression in assembler syntax.
3496 Addition and subtraction are the only arithmetic
3497 that may appear in these expressions. */
3498
3499 void
3500 output_addr_const (FILE *file, rtx x)
3501 {
3502 char buf[256];
3503
3504 restart:
3505 switch (GET_CODE (x))
3506 {
3507 case PC:
3508 putc ('.', file);
3509 break;
3510
3511 case SYMBOL_REF:
3512 if (SYMBOL_REF_DECL (x))
3513 assemble_external (SYMBOL_REF_DECL (x));
3514 #ifdef ASM_OUTPUT_SYMBOL_REF
3515 ASM_OUTPUT_SYMBOL_REF (file, x);
3516 #else
3517 assemble_name (file, XSTR (x, 0));
3518 #endif
3519 break;
3520
3521 case LABEL_REF:
3522 x = XEXP (x, 0);
3523 /* Fall through. */
3524 case CODE_LABEL:
3525 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3526 #ifdef ASM_OUTPUT_LABEL_REF
3527 ASM_OUTPUT_LABEL_REF (file, buf);
3528 #else
3529 assemble_name (file, buf);
3530 #endif
3531 break;
3532
3533 case CONST_INT:
3534 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x));
3535 break;
3536
3537 case CONST:
3538 /* This used to output parentheses around the expression,
3539 but that does not work on the 386 (either ATT or BSD assembler). */
3540 output_addr_const (file, XEXP (x, 0));
3541 break;
3542
3543 case CONST_DOUBLE:
3544 if (GET_MODE (x) == VOIDmode)
3545 {
3546 /* We can use %d if the number is one word and positive. */
3547 if (CONST_DOUBLE_HIGH (x))
3548 fprintf (file, HOST_WIDE_INT_PRINT_DOUBLE_HEX,
3549 (unsigned HOST_WIDE_INT) CONST_DOUBLE_HIGH (x),
3550 (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (x));
3551 else if (CONST_DOUBLE_LOW (x) < 0)
3552 fprintf (file, HOST_WIDE_INT_PRINT_HEX,
3553 (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (x));
3554 else
3555 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x));
3556 }
3557 else
3558 /* We can't handle floating point constants;
3559 PRINT_OPERAND must handle them. */
3560 output_operand_lossage ("floating constant misused");
3561 break;
3562
3563 case CONST_FIXED:
3564 fprintf (file, HOST_WIDE_INT_PRINT_HEX,
3565 (unsigned HOST_WIDE_INT) CONST_FIXED_VALUE_LOW (x));
3566 break;
3567
3568 case PLUS:
3569 /* Some assemblers need integer constants to appear last (eg masm). */
3570 if (CONST_INT_P (XEXP (x, 0)))
3571 {
3572 output_addr_const (file, XEXP (x, 1));
3573 if (INTVAL (XEXP (x, 0)) >= 0)
3574 fprintf (file, "+");
3575 output_addr_const (file, XEXP (x, 0));
3576 }
3577 else
3578 {
3579 output_addr_const (file, XEXP (x, 0));
3580 if (!CONST_INT_P (XEXP (x, 1))
3581 || INTVAL (XEXP (x, 1)) >= 0)
3582 fprintf (file, "+");
3583 output_addr_const (file, XEXP (x, 1));
3584 }
3585 break;
3586
3587 case MINUS:
3588 /* Avoid outputting things like x-x or x+5-x,
3589 since some assemblers can't handle that. */
3590 x = simplify_subtraction (x);
3591 if (GET_CODE (x) != MINUS)
3592 goto restart;
3593
3594 output_addr_const (file, XEXP (x, 0));
3595 fprintf (file, "-");
3596 if ((CONST_INT_P (XEXP (x, 1)) && INTVAL (XEXP (x, 1)) >= 0)
3597 || GET_CODE (XEXP (x, 1)) == PC
3598 || GET_CODE (XEXP (x, 1)) == SYMBOL_REF)
3599 output_addr_const (file, XEXP (x, 1));
3600 else
3601 {
3602 fputs (targetm.asm_out.open_paren, file);
3603 output_addr_const (file, XEXP (x, 1));
3604 fputs (targetm.asm_out.close_paren, file);
3605 }
3606 break;
3607
3608 case ZERO_EXTEND:
3609 case SIGN_EXTEND:
3610 case SUBREG:
3611 case TRUNCATE:
3612 output_addr_const (file, XEXP (x, 0));
3613 break;
3614
3615 default:
3616 if (targetm.asm_out.output_addr_const_extra (file, x))
3617 break;
3618
3619 output_operand_lossage ("invalid expression as operand");
3620 }
3621 }
3622 \f
3623 /* A poor man's fprintf, with the added features of %I, %R, %L, and %U.
3624 %R prints the value of REGISTER_PREFIX.
3625 %L prints the value of LOCAL_LABEL_PREFIX.
3626 %U prints the value of USER_LABEL_PREFIX.
3627 %I prints the value of IMMEDIATE_PREFIX.
3628 %O runs ASM_OUTPUT_OPCODE to transform what follows in the string.
3629 Also supported are %d, %i, %u, %x, %X, %o, %c, %s and %%.
3630
3631 We handle alternate assembler dialects here, just like output_asm_insn. */
3632
3633 void
3634 asm_fprintf (FILE *file, const char *p, ...)
3635 {
3636 char buf[10];
3637 char *q, c;
3638 va_list argptr;
3639
3640 va_start (argptr, p);
3641
3642 buf[0] = '%';
3643
3644 while ((c = *p++))
3645 switch (c)
3646 {
3647 #ifdef ASSEMBLER_DIALECT
3648 case '{':
3649 {
3650 int i;
3651
3652 /* If we want the first dialect, do nothing. Otherwise, skip
3653 DIALECT_NUMBER of strings ending with '|'. */
3654 for (i = 0; i < dialect_number; i++)
3655 {
3656 while (*p && *p++ != '|')
3657 ;
3658
3659 if (*p == '|')
3660 p++;
3661 }
3662 }
3663 break;
3664
3665 case '|':
3666 /* Skip to close brace. */
3667 while (*p && *p++ != '}')
3668 ;
3669 break;
3670
3671 case '}':
3672 break;
3673 #endif
3674
3675 case '%':
3676 c = *p++;
3677 q = &buf[1];
3678 while (strchr ("-+ #0", c))
3679 {
3680 *q++ = c;
3681 c = *p++;
3682 }
3683 while (ISDIGIT (c) || c == '.')
3684 {
3685 *q++ = c;
3686 c = *p++;
3687 }
3688 switch (c)
3689 {
3690 case '%':
3691 putc ('%', file);
3692 break;
3693
3694 case 'd': case 'i': case 'u':
3695 case 'x': case 'X': case 'o':
3696 case 'c':
3697 *q++ = c;
3698 *q = 0;
3699 fprintf (file, buf, va_arg (argptr, int));
3700 break;
3701
3702 case 'w':
3703 /* This is a prefix to the 'd', 'i', 'u', 'x', 'X', and
3704 'o' cases, but we do not check for those cases. It
3705 means that the value is a HOST_WIDE_INT, which may be
3706 either `long' or `long long'. */
3707 memcpy (q, HOST_WIDE_INT_PRINT, strlen (HOST_WIDE_INT_PRINT));
3708 q += strlen (HOST_WIDE_INT_PRINT);
3709 *q++ = *p++;
3710 *q = 0;
3711 fprintf (file, buf, va_arg (argptr, HOST_WIDE_INT));
3712 break;
3713
3714 case 'l':
3715 *q++ = c;
3716 #ifdef HAVE_LONG_LONG
3717 if (*p == 'l')
3718 {
3719 *q++ = *p++;
3720 *q++ = *p++;
3721 *q = 0;
3722 fprintf (file, buf, va_arg (argptr, long long));
3723 }
3724 else
3725 #endif
3726 {
3727 *q++ = *p++;
3728 *q = 0;
3729 fprintf (file, buf, va_arg (argptr, long));
3730 }
3731
3732 break;
3733
3734 case 's':
3735 *q++ = c;
3736 *q = 0;
3737 fprintf (file, buf, va_arg (argptr, char *));
3738 break;
3739
3740 case 'O':
3741 #ifdef ASM_OUTPUT_OPCODE
3742 ASM_OUTPUT_OPCODE (asm_out_file, p);
3743 #endif
3744 break;
3745
3746 case 'R':
3747 #ifdef REGISTER_PREFIX
3748 fprintf (file, "%s", REGISTER_PREFIX);
3749 #endif
3750 break;
3751
3752 case 'I':
3753 #ifdef IMMEDIATE_PREFIX
3754 fprintf (file, "%s", IMMEDIATE_PREFIX);
3755 #endif
3756 break;
3757
3758 case 'L':
3759 #ifdef LOCAL_LABEL_PREFIX
3760 fprintf (file, "%s", LOCAL_LABEL_PREFIX);
3761 #endif
3762 break;
3763
3764 case 'U':
3765 fputs (user_label_prefix, file);
3766 break;
3767
3768 #ifdef ASM_FPRINTF_EXTENSIONS
3769 /* Uppercase letters are reserved for general use by asm_fprintf
3770 and so are not available to target specific code. In order to
3771 prevent the ASM_FPRINTF_EXTENSIONS macro from using them then,
3772 they are defined here. As they get turned into real extensions
3773 to asm_fprintf they should be removed from this list. */
3774 case 'A': case 'B': case 'C': case 'D': case 'E':
3775 case 'F': case 'G': case 'H': case 'J': case 'K':
3776 case 'M': case 'N': case 'P': case 'Q': case 'S':
3777 case 'T': case 'V': case 'W': case 'Y': case 'Z':
3778 break;
3779
3780 ASM_FPRINTF_EXTENSIONS (file, argptr, p)
3781 #endif
3782 default:
3783 gcc_unreachable ();
3784 }
3785 break;
3786
3787 default:
3788 putc (c, file);
3789 }
3790 va_end (argptr);
3791 }
3792 \f
3793 /* Split up a CONST_DOUBLE or integer constant rtx
3794 into two rtx's for single words,
3795 storing in *FIRST the word that comes first in memory in the target
3796 and in *SECOND the other. */
3797
3798 void
3799 split_double (rtx value, rtx *first, rtx *second)
3800 {
3801 if (CONST_INT_P (value))
3802 {
3803 if (HOST_BITS_PER_WIDE_INT >= (2 * BITS_PER_WORD))
3804 {
3805 /* In this case the CONST_INT holds both target words.
3806 Extract the bits from it into two word-sized pieces.
3807 Sign extend each half to HOST_WIDE_INT. */
3808 unsigned HOST_WIDE_INT low, high;
3809 unsigned HOST_WIDE_INT mask, sign_bit, sign_extend;
3810 unsigned bits_per_word = BITS_PER_WORD;
3811
3812 /* Set sign_bit to the most significant bit of a word. */
3813 sign_bit = 1;
3814 sign_bit <<= bits_per_word - 1;
3815
3816 /* Set mask so that all bits of the word are set. We could
3817 have used 1 << BITS_PER_WORD instead of basing the
3818 calculation on sign_bit. However, on machines where
3819 HOST_BITS_PER_WIDE_INT == BITS_PER_WORD, it could cause a
3820 compiler warning, even though the code would never be
3821 executed. */
3822 mask = sign_bit << 1;
3823 mask--;
3824
3825 /* Set sign_extend as any remaining bits. */
3826 sign_extend = ~mask;
3827
3828 /* Pick the lower word and sign-extend it. */
3829 low = INTVAL (value);
3830 low &= mask;
3831 if (low & sign_bit)
3832 low |= sign_extend;
3833
3834 /* Pick the higher word, shifted to the least significant
3835 bits, and sign-extend it. */
3836 high = INTVAL (value);
3837 high >>= bits_per_word - 1;
3838 high >>= 1;
3839 high &= mask;
3840 if (high & sign_bit)
3841 high |= sign_extend;
3842
3843 /* Store the words in the target machine order. */
3844 if (WORDS_BIG_ENDIAN)
3845 {
3846 *first = GEN_INT (high);
3847 *second = GEN_INT (low);
3848 }
3849 else
3850 {
3851 *first = GEN_INT (low);
3852 *second = GEN_INT (high);
3853 }
3854 }
3855 else
3856 {
3857 /* The rule for using CONST_INT for a wider mode
3858 is that we regard the value as signed.
3859 So sign-extend it. */
3860 rtx high = (INTVAL (value) < 0 ? constm1_rtx : const0_rtx);
3861 if (WORDS_BIG_ENDIAN)
3862 {
3863 *first = high;
3864 *second = value;
3865 }
3866 else
3867 {
3868 *first = value;
3869 *second = high;
3870 }
3871 }
3872 }
3873 else if (GET_CODE (value) != CONST_DOUBLE)
3874 {
3875 if (WORDS_BIG_ENDIAN)
3876 {
3877 *first = const0_rtx;
3878 *second = value;
3879 }
3880 else
3881 {
3882 *first = value;
3883 *second = const0_rtx;
3884 }
3885 }
3886 else if (GET_MODE (value) == VOIDmode
3887 /* This is the old way we did CONST_DOUBLE integers. */
3888 || GET_MODE_CLASS (GET_MODE (value)) == MODE_INT)
3889 {
3890 /* In an integer, the words are defined as most and least significant.
3891 So order them by the target's convention. */
3892 if (WORDS_BIG_ENDIAN)
3893 {
3894 *first = GEN_INT (CONST_DOUBLE_HIGH (value));
3895 *second = GEN_INT (CONST_DOUBLE_LOW (value));
3896 }
3897 else
3898 {
3899 *first = GEN_INT (CONST_DOUBLE_LOW (value));
3900 *second = GEN_INT (CONST_DOUBLE_HIGH (value));
3901 }
3902 }
3903 else
3904 {
3905 REAL_VALUE_TYPE r;
3906 long l[2];
3907 REAL_VALUE_FROM_CONST_DOUBLE (r, value);
3908
3909 /* Note, this converts the REAL_VALUE_TYPE to the target's
3910 format, splits up the floating point double and outputs
3911 exactly 32 bits of it into each of l[0] and l[1] --
3912 not necessarily BITS_PER_WORD bits. */
3913 REAL_VALUE_TO_TARGET_DOUBLE (r, l);
3914
3915 /* If 32 bits is an entire word for the target, but not for the host,
3916 then sign-extend on the host so that the number will look the same
3917 way on the host that it would on the target. See for instance
3918 simplify_unary_operation. The #if is needed to avoid compiler
3919 warnings. */
3920
3921 #if HOST_BITS_PER_LONG > 32
3922 if (BITS_PER_WORD < HOST_BITS_PER_LONG && BITS_PER_WORD == 32)
3923 {
3924 if (l[0] & ((long) 1 << 31))
3925 l[0] |= ((long) (-1) << 32);
3926 if (l[1] & ((long) 1 << 31))
3927 l[1] |= ((long) (-1) << 32);
3928 }
3929 #endif
3930
3931 *first = GEN_INT (l[0]);
3932 *second = GEN_INT (l[1]);
3933 }
3934 }
3935 \f
3936 /* Return nonzero if this function has no function calls. */
3937
3938 int
3939 leaf_function_p (void)
3940 {
3941 rtx insn;
3942 rtx link;
3943
3944 if (crtl->profile || profile_arc_flag)
3945 return 0;
3946
3947 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
3948 {
3949 if (CALL_P (insn)
3950 && ! SIBLING_CALL_P (insn))
3951 return 0;
3952 if (NONJUMP_INSN_P (insn)
3953 && GET_CODE (PATTERN (insn)) == SEQUENCE
3954 && CALL_P (XVECEXP (PATTERN (insn), 0, 0))
3955 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0)))
3956 return 0;
3957 }
3958 for (link = crtl->epilogue_delay_list;
3959 link;
3960 link = XEXP (link, 1))
3961 {
3962 insn = XEXP (link, 0);
3963
3964 if (CALL_P (insn)
3965 && ! SIBLING_CALL_P (insn))
3966 return 0;
3967 if (NONJUMP_INSN_P (insn)
3968 && GET_CODE (PATTERN (insn)) == SEQUENCE
3969 && CALL_P (XVECEXP (PATTERN (insn), 0, 0))
3970 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0)))
3971 return 0;
3972 }
3973
3974 return 1;
3975 }
3976
3977 /* Return 1 if branch is a forward branch.
3978 Uses insn_shuid array, so it works only in the final pass. May be used by
3979 output templates to customary add branch prediction hints.
3980 */
3981 int
3982 final_forward_branch_p (rtx insn)
3983 {
3984 int insn_id, label_id;
3985
3986 gcc_assert (uid_shuid);
3987 insn_id = INSN_SHUID (insn);
3988 label_id = INSN_SHUID (JUMP_LABEL (insn));
3989 /* We've hit some insns that does not have id information available. */
3990 gcc_assert (insn_id && label_id);
3991 return insn_id < label_id;
3992 }
3993
3994 /* On some machines, a function with no call insns
3995 can run faster if it doesn't create its own register window.
3996 When output, the leaf function should use only the "output"
3997 registers. Ordinarily, the function would be compiled to use
3998 the "input" registers to find its arguments; it is a candidate
3999 for leaf treatment if it uses only the "input" registers.
4000 Leaf function treatment means renumbering so the function
4001 uses the "output" registers instead. */
4002
4003 #ifdef LEAF_REGISTERS
4004
4005 /* Return 1 if this function uses only the registers that can be
4006 safely renumbered. */
4007
4008 int
4009 only_leaf_regs_used (void)
4010 {
4011 int i;
4012 const char *const permitted_reg_in_leaf_functions = LEAF_REGISTERS;
4013
4014 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
4015 if ((df_regs_ever_live_p (i) || global_regs[i])
4016 && ! permitted_reg_in_leaf_functions[i])
4017 return 0;
4018
4019 if (crtl->uses_pic_offset_table
4020 && pic_offset_table_rtx != 0
4021 && REG_P (pic_offset_table_rtx)
4022 && ! permitted_reg_in_leaf_functions[REGNO (pic_offset_table_rtx)])
4023 return 0;
4024
4025 return 1;
4026 }
4027
4028 /* Scan all instructions and renumber all registers into those
4029 available in leaf functions. */
4030
4031 static void
4032 leaf_renumber_regs (rtx first)
4033 {
4034 rtx insn;
4035
4036 /* Renumber only the actual patterns.
4037 The reg-notes can contain frame pointer refs,
4038 and renumbering them could crash, and should not be needed. */
4039 for (insn = first; insn; insn = NEXT_INSN (insn))
4040 if (INSN_P (insn))
4041 leaf_renumber_regs_insn (PATTERN (insn));
4042 for (insn = crtl->epilogue_delay_list;
4043 insn;
4044 insn = XEXP (insn, 1))
4045 if (INSN_P (XEXP (insn, 0)))
4046 leaf_renumber_regs_insn (PATTERN (XEXP (insn, 0)));
4047 }
4048
4049 /* Scan IN_RTX and its subexpressions, and renumber all regs into those
4050 available in leaf functions. */
4051
4052 void
4053 leaf_renumber_regs_insn (rtx in_rtx)
4054 {
4055 int i, j;
4056 const char *format_ptr;
4057
4058 if (in_rtx == 0)
4059 return;
4060
4061 /* Renumber all input-registers into output-registers.
4062 renumbered_regs would be 1 for an output-register;
4063 they */
4064
4065 if (REG_P (in_rtx))
4066 {
4067 int newreg;
4068
4069 /* Don't renumber the same reg twice. */
4070 if (in_rtx->used)
4071 return;
4072
4073 newreg = REGNO (in_rtx);
4074 /* Don't try to renumber pseudo regs. It is possible for a pseudo reg
4075 to reach here as part of a REG_NOTE. */
4076 if (newreg >= FIRST_PSEUDO_REGISTER)
4077 {
4078 in_rtx->used = 1;
4079 return;
4080 }
4081 newreg = LEAF_REG_REMAP (newreg);
4082 gcc_assert (newreg >= 0);
4083 df_set_regs_ever_live (REGNO (in_rtx), false);
4084 df_set_regs_ever_live (newreg, true);
4085 SET_REGNO (in_rtx, newreg);
4086 in_rtx->used = 1;
4087 }
4088
4089 if (INSN_P (in_rtx))
4090 {
4091 /* Inside a SEQUENCE, we find insns.
4092 Renumber just the patterns of these insns,
4093 just as we do for the top-level insns. */
4094 leaf_renumber_regs_insn (PATTERN (in_rtx));
4095 return;
4096 }
4097
4098 format_ptr = GET_RTX_FORMAT (GET_CODE (in_rtx));
4099
4100 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (in_rtx)); i++)
4101 switch (*format_ptr++)
4102 {
4103 case 'e':
4104 leaf_renumber_regs_insn (XEXP (in_rtx, i));
4105 break;
4106
4107 case 'E':
4108 if (NULL != XVEC (in_rtx, i))
4109 {
4110 for (j = 0; j < XVECLEN (in_rtx, i); j++)
4111 leaf_renumber_regs_insn (XVECEXP (in_rtx, i, j));
4112 }
4113 break;
4114
4115 case 'S':
4116 case 's':
4117 case '0':
4118 case 'i':
4119 case 'w':
4120 case 'n':
4121 case 'u':
4122 break;
4123
4124 default:
4125 gcc_unreachable ();
4126 }
4127 }
4128 #endif
4129
4130
4131 /* When -gused is used, emit debug info for only used symbols. But in
4132 addition to the standard intercepted debug_hooks there are some direct
4133 calls into this file, i.e., dbxout_symbol, dbxout_parms, and dbxout_reg_params.
4134 Those routines may also be called from a higher level intercepted routine. So
4135 to prevent recording data for an inner call to one of these for an intercept,
4136 we maintain an intercept nesting counter (debug_nesting). We only save the
4137 intercepted arguments if the nesting is 1. */
4138 int debug_nesting = 0;
4139
4140 static tree *symbol_queue;
4141 int symbol_queue_index = 0;
4142 static int symbol_queue_size = 0;
4143
4144 /* Generate the symbols for any queued up type symbols we encountered
4145 while generating the type info for some originally used symbol.
4146 This might generate additional entries in the queue. Only when
4147 the nesting depth goes to 0 is this routine called. */
4148
4149 void
4150 debug_flush_symbol_queue (void)
4151 {
4152 int i;
4153
4154 /* Make sure that additionally queued items are not flushed
4155 prematurely. */
4156
4157 ++debug_nesting;
4158
4159 for (i = 0; i < symbol_queue_index; ++i)
4160 {
4161 /* If we pushed queued symbols then such symbols must be
4162 output no matter what anyone else says. Specifically,
4163 we need to make sure dbxout_symbol() thinks the symbol was
4164 used and also we need to override TYPE_DECL_SUPPRESS_DEBUG
4165 which may be set for outside reasons. */
4166 int saved_tree_used = TREE_USED (symbol_queue[i]);
4167 int saved_suppress_debug = TYPE_DECL_SUPPRESS_DEBUG (symbol_queue[i]);
4168 TREE_USED (symbol_queue[i]) = 1;
4169 TYPE_DECL_SUPPRESS_DEBUG (symbol_queue[i]) = 0;
4170
4171 #ifdef DBX_DEBUGGING_INFO
4172 dbxout_symbol (symbol_queue[i], 0);
4173 #endif
4174
4175 TREE_USED (symbol_queue[i]) = saved_tree_used;
4176 TYPE_DECL_SUPPRESS_DEBUG (symbol_queue[i]) = saved_suppress_debug;
4177 }
4178
4179 symbol_queue_index = 0;
4180 --debug_nesting;
4181 }
4182
4183 /* Queue a type symbol needed as part of the definition of a decl
4184 symbol. These symbols are generated when debug_flush_symbol_queue()
4185 is called. */
4186
4187 void
4188 debug_queue_symbol (tree decl)
4189 {
4190 if (symbol_queue_index >= symbol_queue_size)
4191 {
4192 symbol_queue_size += 10;
4193 symbol_queue = XRESIZEVEC (tree, symbol_queue, symbol_queue_size);
4194 }
4195
4196 symbol_queue[symbol_queue_index++] = decl;
4197 }
4198
4199 /* Free symbol queue. */
4200 void
4201 debug_free_queue (void)
4202 {
4203 if (symbol_queue)
4204 {
4205 free (symbol_queue);
4206 symbol_queue = NULL;
4207 symbol_queue_size = 0;
4208 }
4209 }
4210 \f
4211 /* Turn the RTL into assembly. */
4212 static unsigned int
4213 rest_of_handle_final (void)
4214 {
4215 rtx x;
4216 const char *fnname;
4217
4218 /* Get the function's name, as described by its RTL. This may be
4219 different from the DECL_NAME name used in the source file. */
4220
4221 x = DECL_RTL (current_function_decl);
4222 gcc_assert (MEM_P (x));
4223 x = XEXP (x, 0);
4224 gcc_assert (GET_CODE (x) == SYMBOL_REF);
4225 fnname = XSTR (x, 0);
4226
4227 assemble_start_function (current_function_decl, fnname);
4228 final_start_function (get_insns (), asm_out_file, optimize);
4229 final (get_insns (), asm_out_file, optimize);
4230 final_end_function ();
4231
4232 /* The IA-64 ".handlerdata" directive must be issued before the ".endp"
4233 directive that closes the procedure descriptor. Similarly, for x64 SEH.
4234 Otherwise it's not strictly necessary, but it doesn't hurt either. */
4235 output_function_exception_table (fnname);
4236
4237 assemble_end_function (current_function_decl, fnname);
4238
4239 user_defined_section_attribute = false;
4240
4241 /* Free up reg info memory. */
4242 free_reg_info ();
4243
4244 if (! quiet_flag)
4245 fflush (asm_out_file);
4246
4247 /* Write DBX symbols if requested. */
4248
4249 /* Note that for those inline functions where we don't initially
4250 know for certain that we will be generating an out-of-line copy,
4251 the first invocation of this routine (rest_of_compilation) will
4252 skip over this code by doing a `goto exit_rest_of_compilation;'.
4253 Later on, wrapup_global_declarations will (indirectly) call
4254 rest_of_compilation again for those inline functions that need
4255 to have out-of-line copies generated. During that call, we
4256 *will* be routed past here. */
4257
4258 timevar_push (TV_SYMOUT);
4259 if (!DECL_IGNORED_P (current_function_decl))
4260 debug_hooks->function_decl (current_function_decl);
4261 timevar_pop (TV_SYMOUT);
4262
4263 /* Release the blocks that are linked to DECL_INITIAL() to free the memory. */
4264 DECL_INITIAL (current_function_decl) = error_mark_node;
4265
4266 if (DECL_STATIC_CONSTRUCTOR (current_function_decl)
4267 && targetm.have_ctors_dtors)
4268 targetm.asm_out.constructor (XEXP (DECL_RTL (current_function_decl), 0),
4269 decl_init_priority_lookup
4270 (current_function_decl));
4271 if (DECL_STATIC_DESTRUCTOR (current_function_decl)
4272 && targetm.have_ctors_dtors)
4273 targetm.asm_out.destructor (XEXP (DECL_RTL (current_function_decl), 0),
4274 decl_fini_priority_lookup
4275 (current_function_decl));
4276 return 0;
4277 }
4278
4279 struct rtl_opt_pass pass_final =
4280 {
4281 {
4282 RTL_PASS,
4283 "final", /* name */
4284 NULL, /* gate */
4285 rest_of_handle_final, /* execute */
4286 NULL, /* sub */
4287 NULL, /* next */
4288 0, /* static_pass_number */
4289 TV_FINAL, /* tv_id */
4290 0, /* properties_required */
4291 0, /* properties_provided */
4292 0, /* properties_destroyed */
4293 0, /* todo_flags_start */
4294 TODO_ggc_collect /* todo_flags_finish */
4295 }
4296 };
4297
4298
4299 static unsigned int
4300 rest_of_handle_shorten_branches (void)
4301 {
4302 /* Shorten branches. */
4303 shorten_branches (get_insns ());
4304 return 0;
4305 }
4306
4307 struct rtl_opt_pass pass_shorten_branches =
4308 {
4309 {
4310 RTL_PASS,
4311 "shorten", /* name */
4312 NULL, /* gate */
4313 rest_of_handle_shorten_branches, /* execute */
4314 NULL, /* sub */
4315 NULL, /* next */
4316 0, /* static_pass_number */
4317 TV_FINAL, /* tv_id */
4318 0, /* properties_required */
4319 0, /* properties_provided */
4320 0, /* properties_destroyed */
4321 0, /* todo_flags_start */
4322 TODO_dump_func /* todo_flags_finish */
4323 }
4324 };
4325
4326
4327 static unsigned int
4328 rest_of_clean_state (void)
4329 {
4330 rtx insn, next;
4331 FILE *final_output = NULL;
4332 int save_unnumbered = flag_dump_unnumbered;
4333 int save_noaddr = flag_dump_noaddr;
4334
4335 if (flag_dump_final_insns)
4336 {
4337 final_output = fopen (flag_dump_final_insns, "a");
4338 if (!final_output)
4339 {
4340 error ("could not open final insn dump file %qs: %m",
4341 flag_dump_final_insns);
4342 flag_dump_final_insns = NULL;
4343 }
4344 else
4345 {
4346 const char *aname;
4347 struct cgraph_node *node = cgraph_node (current_function_decl);
4348
4349 aname = (IDENTIFIER_POINTER
4350 (DECL_ASSEMBLER_NAME (current_function_decl)));
4351 fprintf (final_output, "\n;; Function (%s) %s\n\n", aname,
4352 node->frequency == NODE_FREQUENCY_HOT
4353 ? " (hot)"
4354 : node->frequency == NODE_FREQUENCY_UNLIKELY_EXECUTED
4355 ? " (unlikely executed)"
4356 : node->frequency == NODE_FREQUENCY_EXECUTED_ONCE
4357 ? " (executed once)"
4358 : "");
4359
4360 flag_dump_noaddr = flag_dump_unnumbered = 1;
4361 if (flag_compare_debug_opt || flag_compare_debug)
4362 dump_flags |= TDF_NOUID;
4363 final_insns_dump_p = true;
4364
4365 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4366 if (LABEL_P (insn))
4367 INSN_UID (insn) = CODE_LABEL_NUMBER (insn);
4368 else
4369 INSN_UID (insn) = 0;
4370 }
4371 }
4372
4373 /* It is very important to decompose the RTL instruction chain here:
4374 debug information keeps pointing into CODE_LABEL insns inside the function
4375 body. If these remain pointing to the other insns, we end up preserving
4376 whole RTL chain and attached detailed debug info in memory. */
4377 for (insn = get_insns (); insn; insn = next)
4378 {
4379 next = NEXT_INSN (insn);
4380 NEXT_INSN (insn) = NULL;
4381 PREV_INSN (insn) = NULL;
4382
4383 if (final_output
4384 && (!NOTE_P (insn) ||
4385 (NOTE_KIND (insn) != NOTE_INSN_VAR_LOCATION
4386 && NOTE_KIND (insn) != NOTE_INSN_BLOCK_BEG
4387 && NOTE_KIND (insn) != NOTE_INSN_BLOCK_END
4388 && NOTE_KIND (insn) != NOTE_INSN_CFA_RESTORE_STATE)))
4389 print_rtl_single (final_output, insn);
4390
4391 }
4392
4393 if (final_output)
4394 {
4395 flag_dump_noaddr = save_noaddr;
4396 flag_dump_unnumbered = save_unnumbered;
4397 final_insns_dump_p = false;
4398
4399 if (fclose (final_output))
4400 {
4401 error ("could not close final insn dump file %qs: %m",
4402 flag_dump_final_insns);
4403 flag_dump_final_insns = NULL;
4404 }
4405 }
4406
4407 /* In case the function was not output,
4408 don't leave any temporary anonymous types
4409 queued up for sdb output. */
4410 #ifdef SDB_DEBUGGING_INFO
4411 if (write_symbols == SDB_DEBUG)
4412 sdbout_types (NULL_TREE);
4413 #endif
4414
4415 flag_rerun_cse_after_global_opts = 0;
4416 reload_completed = 0;
4417 epilogue_completed = 0;
4418 #ifdef STACK_REGS
4419 regstack_completed = 0;
4420 #endif
4421
4422 /* Clear out the insn_length contents now that they are no
4423 longer valid. */
4424 init_insn_lengths ();
4425
4426 /* Show no temporary slots allocated. */
4427 init_temp_slots ();
4428
4429 free_bb_for_insn ();
4430
4431 delete_tree_ssa ();
4432
4433 /* We can reduce stack alignment on call site only when we are sure that
4434 the function body just produced will be actually used in the final
4435 executable. */
4436 if (decl_binds_to_current_def_p (current_function_decl))
4437 {
4438 unsigned int pref = crtl->preferred_stack_boundary;
4439 if (crtl->stack_alignment_needed > crtl->preferred_stack_boundary)
4440 pref = crtl->stack_alignment_needed;
4441 cgraph_rtl_info (current_function_decl)->preferred_incoming_stack_boundary
4442 = pref;
4443 }
4444
4445 /* Make sure volatile mem refs aren't considered valid operands for
4446 arithmetic insns. We must call this here if this is a nested inline
4447 function, since the above code leaves us in the init_recog state,
4448 and the function context push/pop code does not save/restore volatile_ok.
4449
4450 ??? Maybe it isn't necessary for expand_start_function to call this
4451 anymore if we do it here? */
4452
4453 init_recog_no_volatile ();
4454
4455 /* We're done with this function. Free up memory if we can. */
4456 free_after_parsing (cfun);
4457 free_after_compilation (cfun);
4458 return 0;
4459 }
4460
4461 struct rtl_opt_pass pass_clean_state =
4462 {
4463 {
4464 RTL_PASS,
4465 "*clean_state", /* name */
4466 NULL, /* gate */
4467 rest_of_clean_state, /* execute */
4468 NULL, /* sub */
4469 NULL, /* next */
4470 0, /* static_pass_number */
4471 TV_FINAL, /* tv_id */
4472 0, /* properties_required */
4473 0, /* properties_provided */
4474 PROP_rtl, /* properties_destroyed */
4475 0, /* todo_flags_start */
4476 0 /* todo_flags_finish */
4477 }
4478 };