boz_9.f90: Do not generate denormal floating point numbers.
[gcc.git] / gcc / final.c
1 /* Convert RTL to assembler code and output it, for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009
4 Free Software Foundation, Inc.
5
6 This file is part of GCC.
7
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
11 version.
12
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
21
22 /* This is the final pass of the compiler.
23 It looks at the rtl code for a function and outputs assembler code.
24
25 Call `final_start_function' to output the assembler code for function entry,
26 `final' to output assembler code for some RTL code,
27 `final_end_function' to output assembler code for function exit.
28 If a function is compiled in several pieces, each piece is
29 output separately with `final'.
30
31 Some optimizations are also done at this level.
32 Move instructions that were made unnecessary by good register allocation
33 are detected and omitted from the output. (Though most of these
34 are removed by the last jump pass.)
35
36 Instructions to set the condition codes are omitted when it can be
37 seen that the condition codes already had the desired values.
38
39 In some cases it is sufficient if the inherited condition codes
40 have related values, but this may require the following insn
41 (the one that tests the condition codes) to be modified.
42
43 The code for the function prologue and epilogue are generated
44 directly in assembler by the target functions function_prologue and
45 function_epilogue. Those instructions never exist as rtl. */
46
47 #include "config.h"
48 #include "system.h"
49 #include "coretypes.h"
50 #include "tm.h"
51
52 #include "tree.h"
53 #include "rtl.h"
54 #include "tm_p.h"
55 #include "regs.h"
56 #include "insn-config.h"
57 #include "insn-attr.h"
58 #include "recog.h"
59 #include "conditions.h"
60 #include "flags.h"
61 #include "real.h"
62 #include "hard-reg-set.h"
63 #include "output.h"
64 #include "except.h"
65 #include "function.h"
66 #include "toplev.h"
67 #include "reload.h"
68 #include "intl.h"
69 #include "basic-block.h"
70 #include "target.h"
71 #include "debug.h"
72 #include "expr.h"
73 #include "cfglayout.h"
74 #include "tree-pass.h"
75 #include "tree-flow.h"
76 #include "timevar.h"
77 #include "cgraph.h"
78 #include "coverage.h"
79 #include "df.h"
80 #include "vecprim.h"
81 #include "ggc.h"
82 #include "cfgloop.h"
83 #include "params.h"
84
85 #ifdef XCOFF_DEBUGGING_INFO
86 #include "xcoffout.h" /* Needed for external data
87 declarations for e.g. AIX 4.x. */
88 #endif
89
90 #if defined (DWARF2_UNWIND_INFO) || defined (DWARF2_DEBUGGING_INFO)
91 #include "dwarf2out.h"
92 #endif
93
94 #ifdef DBX_DEBUGGING_INFO
95 #include "dbxout.h"
96 #endif
97
98 #ifdef SDB_DEBUGGING_INFO
99 #include "sdbout.h"
100 #endif
101
102 /* If we aren't using cc0, CC_STATUS_INIT shouldn't exist. So define a
103 null default for it to save conditionalization later. */
104 #ifndef CC_STATUS_INIT
105 #define CC_STATUS_INIT
106 #endif
107
108 /* How to start an assembler comment. */
109 #ifndef ASM_COMMENT_START
110 #define ASM_COMMENT_START ";#"
111 #endif
112
113 /* Is the given character a logical line separator for the assembler? */
114 #ifndef IS_ASM_LOGICAL_LINE_SEPARATOR
115 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == ';')
116 #endif
117
118 #ifndef JUMP_TABLES_IN_TEXT_SECTION
119 #define JUMP_TABLES_IN_TEXT_SECTION 0
120 #endif
121
122 /* Bitflags used by final_scan_insn. */
123 #define SEEN_BB 1
124 #define SEEN_NOTE 2
125 #define SEEN_EMITTED 4
126
127 /* Last insn processed by final_scan_insn. */
128 static rtx debug_insn;
129 rtx current_output_insn;
130
131 /* Line number of last NOTE. */
132 static int last_linenum;
133
134 /* Last discriminator written to assembly. */
135 static int last_discriminator;
136
137 /* Discriminator of current block. */
138 static int discriminator;
139
140 /* Highest line number in current block. */
141 static int high_block_linenum;
142
143 /* Likewise for function. */
144 static int high_function_linenum;
145
146 /* Filename of last NOTE. */
147 static const char *last_filename;
148
149 /* Override filename and line number. */
150 static const char *override_filename;
151 static int override_linenum;
152
153 /* Whether to force emission of a line note before the next insn. */
154 static bool force_source_line = false;
155
156 extern const int length_unit_log; /* This is defined in insn-attrtab.c. */
157
158 /* Nonzero while outputting an `asm' with operands.
159 This means that inconsistencies are the user's fault, so don't die.
160 The precise value is the insn being output, to pass to error_for_asm. */
161 rtx this_is_asm_operands;
162
163 /* Number of operands of this insn, for an `asm' with operands. */
164 static unsigned int insn_noperands;
165
166 /* Compare optimization flag. */
167
168 static rtx last_ignored_compare = 0;
169
170 /* Assign a unique number to each insn that is output.
171 This can be used to generate unique local labels. */
172
173 static int insn_counter = 0;
174
175 #ifdef HAVE_cc0
176 /* This variable contains machine-dependent flags (defined in tm.h)
177 set and examined by output routines
178 that describe how to interpret the condition codes properly. */
179
180 CC_STATUS cc_status;
181
182 /* During output of an insn, this contains a copy of cc_status
183 from before the insn. */
184
185 CC_STATUS cc_prev_status;
186 #endif
187
188 /* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */
189
190 static int block_depth;
191
192 /* Nonzero if have enabled APP processing of our assembler output. */
193
194 static int app_on;
195
196 /* If we are outputting an insn sequence, this contains the sequence rtx.
197 Zero otherwise. */
198
199 rtx final_sequence;
200
201 #ifdef ASSEMBLER_DIALECT
202
203 /* Number of the assembler dialect to use, starting at 0. */
204 static int dialect_number;
205 #endif
206
207 #ifdef HAVE_conditional_execution
208 /* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */
209 rtx current_insn_predicate;
210 #endif
211
212 #ifdef HAVE_ATTR_length
213 static int asm_insn_count (rtx);
214 #endif
215 static void profile_function (FILE *);
216 static void profile_after_prologue (FILE *);
217 static bool notice_source_line (rtx, bool *);
218 static rtx walk_alter_subreg (rtx *, bool *);
219 static void output_asm_name (void);
220 static void output_alternate_entry_point (FILE *, rtx);
221 static tree get_mem_expr_from_op (rtx, int *);
222 static void output_asm_operand_names (rtx *, int *, int);
223 static void output_operand (rtx, int);
224 #ifdef LEAF_REGISTERS
225 static void leaf_renumber_regs (rtx);
226 #endif
227 #ifdef HAVE_cc0
228 static int alter_cond (rtx);
229 #endif
230 #ifndef ADDR_VEC_ALIGN
231 static int final_addr_vec_align (rtx);
232 #endif
233 #ifdef HAVE_ATTR_length
234 static int align_fuzz (rtx, rtx, int, unsigned);
235 #endif
236 \f
237 /* Initialize data in final at the beginning of a compilation. */
238
239 void
240 init_final (const char *filename ATTRIBUTE_UNUSED)
241 {
242 app_on = 0;
243 final_sequence = 0;
244
245 #ifdef ASSEMBLER_DIALECT
246 dialect_number = ASSEMBLER_DIALECT;
247 #endif
248 }
249
250 /* Default target function prologue and epilogue assembler output.
251
252 If not overridden for epilogue code, then the function body itself
253 contains return instructions wherever needed. */
254 void
255 default_function_pro_epilogue (FILE *file ATTRIBUTE_UNUSED,
256 HOST_WIDE_INT size ATTRIBUTE_UNUSED)
257 {
258 }
259
260 /* Default target hook that outputs nothing to a stream. */
261 void
262 no_asm_to_stream (FILE *file ATTRIBUTE_UNUSED)
263 {
264 }
265
266 /* Enable APP processing of subsequent output.
267 Used before the output from an `asm' statement. */
268
269 void
270 app_enable (void)
271 {
272 if (! app_on)
273 {
274 fputs (ASM_APP_ON, asm_out_file);
275 app_on = 1;
276 }
277 }
278
279 /* Disable APP processing of subsequent output.
280 Called from varasm.c before most kinds of output. */
281
282 void
283 app_disable (void)
284 {
285 if (app_on)
286 {
287 fputs (ASM_APP_OFF, asm_out_file);
288 app_on = 0;
289 }
290 }
291 \f
292 /* Return the number of slots filled in the current
293 delayed branch sequence (we don't count the insn needing the
294 delay slot). Zero if not in a delayed branch sequence. */
295
296 #ifdef DELAY_SLOTS
297 int
298 dbr_sequence_length (void)
299 {
300 if (final_sequence != 0)
301 return XVECLEN (final_sequence, 0) - 1;
302 else
303 return 0;
304 }
305 #endif
306 \f
307 /* The next two pages contain routines used to compute the length of an insn
308 and to shorten branches. */
309
310 /* Arrays for insn lengths, and addresses. The latter is referenced by
311 `insn_current_length'. */
312
313 static int *insn_lengths;
314
315 VEC(int,heap) *insn_addresses_;
316
317 /* Max uid for which the above arrays are valid. */
318 static int insn_lengths_max_uid;
319
320 /* Address of insn being processed. Used by `insn_current_length'. */
321 int insn_current_address;
322
323 /* Address of insn being processed in previous iteration. */
324 int insn_last_address;
325
326 /* known invariant alignment of insn being processed. */
327 int insn_current_align;
328
329 /* After shorten_branches, for any insn, uid_align[INSN_UID (insn)]
330 gives the next following alignment insn that increases the known
331 alignment, or NULL_RTX if there is no such insn.
332 For any alignment obtained this way, we can again index uid_align with
333 its uid to obtain the next following align that in turn increases the
334 alignment, till we reach NULL_RTX; the sequence obtained this way
335 for each insn we'll call the alignment chain of this insn in the following
336 comments. */
337
338 struct label_alignment
339 {
340 short alignment;
341 short max_skip;
342 };
343
344 static rtx *uid_align;
345 static int *uid_shuid;
346 static struct label_alignment *label_align;
347
348 /* Indicate that branch shortening hasn't yet been done. */
349
350 void
351 init_insn_lengths (void)
352 {
353 if (uid_shuid)
354 {
355 free (uid_shuid);
356 uid_shuid = 0;
357 }
358 if (insn_lengths)
359 {
360 free (insn_lengths);
361 insn_lengths = 0;
362 insn_lengths_max_uid = 0;
363 }
364 #ifdef HAVE_ATTR_length
365 INSN_ADDRESSES_FREE ();
366 #endif
367 if (uid_align)
368 {
369 free (uid_align);
370 uid_align = 0;
371 }
372 }
373
374 /* Obtain the current length of an insn. If branch shortening has been done,
375 get its actual length. Otherwise, use FALLBACK_FN to calculate the
376 length. */
377 static inline int
378 get_attr_length_1 (rtx insn ATTRIBUTE_UNUSED,
379 int (*fallback_fn) (rtx) ATTRIBUTE_UNUSED)
380 {
381 #ifdef HAVE_ATTR_length
382 rtx body;
383 int i;
384 int length = 0;
385
386 if (insn_lengths_max_uid > INSN_UID (insn))
387 return insn_lengths[INSN_UID (insn)];
388 else
389 switch (GET_CODE (insn))
390 {
391 case NOTE:
392 case BARRIER:
393 case CODE_LABEL:
394 return 0;
395
396 case CALL_INSN:
397 length = fallback_fn (insn);
398 break;
399
400 case JUMP_INSN:
401 body = PATTERN (insn);
402 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
403 {
404 /* Alignment is machine-dependent and should be handled by
405 ADDR_VEC_ALIGN. */
406 }
407 else
408 length = fallback_fn (insn);
409 break;
410
411 case INSN:
412 body = PATTERN (insn);
413 if (GET_CODE (body) == USE || GET_CODE (body) == CLOBBER)
414 return 0;
415
416 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
417 length = asm_insn_count (body) * fallback_fn (insn);
418 else if (GET_CODE (body) == SEQUENCE)
419 for (i = 0; i < XVECLEN (body, 0); i++)
420 length += get_attr_length_1 (XVECEXP (body, 0, i), fallback_fn);
421 else
422 length = fallback_fn (insn);
423 break;
424
425 default:
426 break;
427 }
428
429 #ifdef ADJUST_INSN_LENGTH
430 ADJUST_INSN_LENGTH (insn, length);
431 #endif
432 return length;
433 #else /* not HAVE_ATTR_length */
434 return 0;
435 #define insn_default_length 0
436 #define insn_min_length 0
437 #endif /* not HAVE_ATTR_length */
438 }
439
440 /* Obtain the current length of an insn. If branch shortening has been done,
441 get its actual length. Otherwise, get its maximum length. */
442 int
443 get_attr_length (rtx insn)
444 {
445 return get_attr_length_1 (insn, insn_default_length);
446 }
447
448 /* Obtain the current length of an insn. If branch shortening has been done,
449 get its actual length. Otherwise, get its minimum length. */
450 int
451 get_attr_min_length (rtx insn)
452 {
453 return get_attr_length_1 (insn, insn_min_length);
454 }
455 \f
456 /* Code to handle alignment inside shorten_branches. */
457
458 /* Here is an explanation how the algorithm in align_fuzz can give
459 proper results:
460
461 Call a sequence of instructions beginning with alignment point X
462 and continuing until the next alignment point `block X'. When `X'
463 is used in an expression, it means the alignment value of the
464 alignment point.
465
466 Call the distance between the start of the first insn of block X, and
467 the end of the last insn of block X `IX', for the `inner size of X'.
468 This is clearly the sum of the instruction lengths.
469
470 Likewise with the next alignment-delimited block following X, which we
471 shall call block Y.
472
473 Call the distance between the start of the first insn of block X, and
474 the start of the first insn of block Y `OX', for the `outer size of X'.
475
476 The estimated padding is then OX - IX.
477
478 OX can be safely estimated as
479
480 if (X >= Y)
481 OX = round_up(IX, Y)
482 else
483 OX = round_up(IX, X) + Y - X
484
485 Clearly est(IX) >= real(IX), because that only depends on the
486 instruction lengths, and those being overestimated is a given.
487
488 Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so
489 we needn't worry about that when thinking about OX.
490
491 When X >= Y, the alignment provided by Y adds no uncertainty factor
492 for branch ranges starting before X, so we can just round what we have.
493 But when X < Y, we don't know anything about the, so to speak,
494 `middle bits', so we have to assume the worst when aligning up from an
495 address mod X to one mod Y, which is Y - X. */
496
497 #ifndef LABEL_ALIGN
498 #define LABEL_ALIGN(LABEL) align_labels_log
499 #endif
500
501 #ifndef LABEL_ALIGN_MAX_SKIP
502 #define LABEL_ALIGN_MAX_SKIP align_labels_max_skip
503 #endif
504
505 #ifndef LOOP_ALIGN
506 #define LOOP_ALIGN(LABEL) align_loops_log
507 #endif
508
509 #ifndef LOOP_ALIGN_MAX_SKIP
510 #define LOOP_ALIGN_MAX_SKIP align_loops_max_skip
511 #endif
512
513 #ifndef LABEL_ALIGN_AFTER_BARRIER
514 #define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0
515 #endif
516
517 #ifndef LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP
518 #define LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP 0
519 #endif
520
521 #ifndef JUMP_ALIGN
522 #define JUMP_ALIGN(LABEL) align_jumps_log
523 #endif
524
525 #ifndef JUMP_ALIGN_MAX_SKIP
526 #define JUMP_ALIGN_MAX_SKIP align_jumps_max_skip
527 #endif
528
529 #ifndef ADDR_VEC_ALIGN
530 static int
531 final_addr_vec_align (rtx addr_vec)
532 {
533 int align = GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec)));
534
535 if (align > BIGGEST_ALIGNMENT / BITS_PER_UNIT)
536 align = BIGGEST_ALIGNMENT / BITS_PER_UNIT;
537 return exact_log2 (align);
538
539 }
540
541 #define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC)
542 #endif
543
544 #ifndef INSN_LENGTH_ALIGNMENT
545 #define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log
546 #endif
547
548 #define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)])
549
550 static int min_labelno, max_labelno;
551
552 #define LABEL_TO_ALIGNMENT(LABEL) \
553 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment)
554
555 #define LABEL_TO_MAX_SKIP(LABEL) \
556 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip)
557
558 /* For the benefit of port specific code do this also as a function. */
559
560 int
561 label_to_alignment (rtx label)
562 {
563 if (CODE_LABEL_NUMBER (label) <= max_labelno)
564 return LABEL_TO_ALIGNMENT (label);
565 return 0;
566 }
567
568 int
569 label_to_max_skip (rtx label)
570 {
571 if (CODE_LABEL_NUMBER (label) <= max_labelno)
572 return LABEL_TO_MAX_SKIP (label);
573 return 0;
574 }
575
576 #ifdef HAVE_ATTR_length
577 /* The differences in addresses
578 between a branch and its target might grow or shrink depending on
579 the alignment the start insn of the range (the branch for a forward
580 branch or the label for a backward branch) starts out on; if these
581 differences are used naively, they can even oscillate infinitely.
582 We therefore want to compute a 'worst case' address difference that
583 is independent of the alignment the start insn of the range end
584 up on, and that is at least as large as the actual difference.
585 The function align_fuzz calculates the amount we have to add to the
586 naively computed difference, by traversing the part of the alignment
587 chain of the start insn of the range that is in front of the end insn
588 of the range, and considering for each alignment the maximum amount
589 that it might contribute to a size increase.
590
591 For casesi tables, we also want to know worst case minimum amounts of
592 address difference, in case a machine description wants to introduce
593 some common offset that is added to all offsets in a table.
594 For this purpose, align_fuzz with a growth argument of 0 computes the
595 appropriate adjustment. */
596
597 /* Compute the maximum delta by which the difference of the addresses of
598 START and END might grow / shrink due to a different address for start
599 which changes the size of alignment insns between START and END.
600 KNOWN_ALIGN_LOG is the alignment known for START.
601 GROWTH should be ~0 if the objective is to compute potential code size
602 increase, and 0 if the objective is to compute potential shrink.
603 The return value is undefined for any other value of GROWTH. */
604
605 static int
606 align_fuzz (rtx start, rtx end, int known_align_log, unsigned int growth)
607 {
608 int uid = INSN_UID (start);
609 rtx align_label;
610 int known_align = 1 << known_align_log;
611 int end_shuid = INSN_SHUID (end);
612 int fuzz = 0;
613
614 for (align_label = uid_align[uid]; align_label; align_label = uid_align[uid])
615 {
616 int align_addr, new_align;
617
618 uid = INSN_UID (align_label);
619 align_addr = INSN_ADDRESSES (uid) - insn_lengths[uid];
620 if (uid_shuid[uid] > end_shuid)
621 break;
622 known_align_log = LABEL_TO_ALIGNMENT (align_label);
623 new_align = 1 << known_align_log;
624 if (new_align < known_align)
625 continue;
626 fuzz += (-align_addr ^ growth) & (new_align - known_align);
627 known_align = new_align;
628 }
629 return fuzz;
630 }
631
632 /* Compute a worst-case reference address of a branch so that it
633 can be safely used in the presence of aligned labels. Since the
634 size of the branch itself is unknown, the size of the branch is
635 not included in the range. I.e. for a forward branch, the reference
636 address is the end address of the branch as known from the previous
637 branch shortening pass, minus a value to account for possible size
638 increase due to alignment. For a backward branch, it is the start
639 address of the branch as known from the current pass, plus a value
640 to account for possible size increase due to alignment.
641 NB.: Therefore, the maximum offset allowed for backward branches needs
642 to exclude the branch size. */
643
644 int
645 insn_current_reference_address (rtx branch)
646 {
647 rtx dest, seq;
648 int seq_uid;
649
650 if (! INSN_ADDRESSES_SET_P ())
651 return 0;
652
653 seq = NEXT_INSN (PREV_INSN (branch));
654 seq_uid = INSN_UID (seq);
655 if (!JUMP_P (branch))
656 /* This can happen for example on the PA; the objective is to know the
657 offset to address something in front of the start of the function.
658 Thus, we can treat it like a backward branch.
659 We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than
660 any alignment we'd encounter, so we skip the call to align_fuzz. */
661 return insn_current_address;
662 dest = JUMP_LABEL (branch);
663
664 /* BRANCH has no proper alignment chain set, so use SEQ.
665 BRANCH also has no INSN_SHUID. */
666 if (INSN_SHUID (seq) < INSN_SHUID (dest))
667 {
668 /* Forward branch. */
669 return (insn_last_address + insn_lengths[seq_uid]
670 - align_fuzz (seq, dest, length_unit_log, ~0));
671 }
672 else
673 {
674 /* Backward branch. */
675 return (insn_current_address
676 + align_fuzz (dest, seq, length_unit_log, ~0));
677 }
678 }
679 #endif /* HAVE_ATTR_length */
680 \f
681 /* Compute branch alignments based on frequency information in the
682 CFG. */
683
684 unsigned int
685 compute_alignments (void)
686 {
687 int log, max_skip, max_log;
688 basic_block bb;
689 int freq_max = 0;
690 int freq_threshold = 0;
691
692 if (label_align)
693 {
694 free (label_align);
695 label_align = 0;
696 }
697
698 max_labelno = max_label_num ();
699 min_labelno = get_first_label_num ();
700 label_align = XCNEWVEC (struct label_alignment, max_labelno - min_labelno + 1);
701
702 /* If not optimizing or optimizing for size, don't assign any alignments. */
703 if (! optimize || optimize_function_for_size_p (cfun))
704 return 0;
705
706 if (dump_file)
707 {
708 dump_flow_info (dump_file, TDF_DETAILS);
709 flow_loops_dump (dump_file, NULL, 1);
710 loop_optimizer_init (AVOID_CFG_MODIFICATIONS);
711 }
712 FOR_EACH_BB (bb)
713 if (bb->frequency > freq_max)
714 freq_max = bb->frequency;
715 freq_threshold = freq_max / PARAM_VALUE (PARAM_ALIGN_THRESHOLD);
716
717 if (dump_file)
718 fprintf(dump_file, "freq_max: %i\n",freq_max);
719 FOR_EACH_BB (bb)
720 {
721 rtx label = BB_HEAD (bb);
722 int fallthru_frequency = 0, branch_frequency = 0, has_fallthru = 0;
723 edge e;
724 edge_iterator ei;
725
726 if (!LABEL_P (label)
727 || optimize_bb_for_size_p (bb))
728 {
729 if (dump_file)
730 fprintf(dump_file, "BB %4i freq %4i loop %2i loop_depth %2i skipped.\n",
731 bb->index, bb->frequency, bb->loop_father->num, bb->loop_depth);
732 continue;
733 }
734 max_log = LABEL_ALIGN (label);
735 max_skip = LABEL_ALIGN_MAX_SKIP;
736
737 FOR_EACH_EDGE (e, ei, bb->preds)
738 {
739 if (e->flags & EDGE_FALLTHRU)
740 has_fallthru = 1, fallthru_frequency += EDGE_FREQUENCY (e);
741 else
742 branch_frequency += EDGE_FREQUENCY (e);
743 }
744 if (dump_file)
745 {
746 fprintf(dump_file, "BB %4i freq %4i loop %2i loop_depth %2i fall %4i branch %4i",
747 bb->index, bb->frequency, bb->loop_father->num,
748 bb->loop_depth,
749 fallthru_frequency, branch_frequency);
750 if (!bb->loop_father->inner && bb->loop_father->num)
751 fprintf (dump_file, " inner_loop");
752 if (bb->loop_father->header == bb)
753 fprintf (dump_file, " loop_header");
754 fprintf (dump_file, "\n");
755 }
756
757 /* There are two purposes to align block with no fallthru incoming edge:
758 1) to avoid fetch stalls when branch destination is near cache boundary
759 2) to improve cache efficiency in case the previous block is not executed
760 (so it does not need to be in the cache).
761
762 We to catch first case, we align frequently executed blocks.
763 To catch the second, we align blocks that are executed more frequently
764 than the predecessor and the predecessor is likely to not be executed
765 when function is called. */
766
767 if (!has_fallthru
768 && (branch_frequency > freq_threshold
769 || (bb->frequency > bb->prev_bb->frequency * 10
770 && (bb->prev_bb->frequency
771 <= ENTRY_BLOCK_PTR->frequency / 2))))
772 {
773 log = JUMP_ALIGN (label);
774 if (dump_file)
775 fprintf(dump_file, " jump alignment added.\n");
776 if (max_log < log)
777 {
778 max_log = log;
779 max_skip = JUMP_ALIGN_MAX_SKIP;
780 }
781 }
782 /* In case block is frequent and reached mostly by non-fallthru edge,
783 align it. It is most likely a first block of loop. */
784 if (has_fallthru
785 && optimize_bb_for_speed_p (bb)
786 && branch_frequency + fallthru_frequency > freq_threshold
787 && (branch_frequency
788 > fallthru_frequency * PARAM_VALUE (PARAM_ALIGN_LOOP_ITERATIONS)))
789 {
790 log = LOOP_ALIGN (label);
791 if (dump_file)
792 fprintf(dump_file, " internal loop alignment added.\n");
793 if (max_log < log)
794 {
795 max_log = log;
796 max_skip = LOOP_ALIGN_MAX_SKIP;
797 }
798 }
799 LABEL_TO_ALIGNMENT (label) = max_log;
800 LABEL_TO_MAX_SKIP (label) = max_skip;
801 }
802
803 if (dump_file)
804 {
805 loop_optimizer_finalize ();
806 free_dominance_info (CDI_DOMINATORS);
807 }
808 return 0;
809 }
810
811 struct rtl_opt_pass pass_compute_alignments =
812 {
813 {
814 RTL_PASS,
815 "alignments", /* name */
816 NULL, /* gate */
817 compute_alignments, /* execute */
818 NULL, /* sub */
819 NULL, /* next */
820 0, /* static_pass_number */
821 TV_NONE, /* tv_id */
822 0, /* properties_required */
823 0, /* properties_provided */
824 0, /* properties_destroyed */
825 0, /* todo_flags_start */
826 TODO_dump_func | TODO_verify_rtl_sharing
827 | TODO_ggc_collect /* todo_flags_finish */
828 }
829 };
830
831 \f
832 /* Make a pass over all insns and compute their actual lengths by shortening
833 any branches of variable length if possible. */
834
835 /* shorten_branches might be called multiple times: for example, the SH
836 port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG.
837 In order to do this, it needs proper length information, which it obtains
838 by calling shorten_branches. This cannot be collapsed with
839 shorten_branches itself into a single pass unless we also want to integrate
840 reorg.c, since the branch splitting exposes new instructions with delay
841 slots. */
842
843 void
844 shorten_branches (rtx first ATTRIBUTE_UNUSED)
845 {
846 rtx insn;
847 int max_uid;
848 int i;
849 int max_log;
850 int max_skip;
851 #ifdef HAVE_ATTR_length
852 #define MAX_CODE_ALIGN 16
853 rtx seq;
854 int something_changed = 1;
855 char *varying_length;
856 rtx body;
857 int uid;
858 rtx align_tab[MAX_CODE_ALIGN];
859
860 #endif
861
862 /* Compute maximum UID and allocate label_align / uid_shuid. */
863 max_uid = get_max_uid ();
864
865 /* Free uid_shuid before reallocating it. */
866 free (uid_shuid);
867
868 uid_shuid = XNEWVEC (int, max_uid);
869
870 if (max_labelno != max_label_num ())
871 {
872 int old = max_labelno;
873 int n_labels;
874 int n_old_labels;
875
876 max_labelno = max_label_num ();
877
878 n_labels = max_labelno - min_labelno + 1;
879 n_old_labels = old - min_labelno + 1;
880
881 label_align = XRESIZEVEC (struct label_alignment, label_align, n_labels);
882
883 /* Range of labels grows monotonically in the function. Failing here
884 means that the initialization of array got lost. */
885 gcc_assert (n_old_labels <= n_labels);
886
887 memset (label_align + n_old_labels, 0,
888 (n_labels - n_old_labels) * sizeof (struct label_alignment));
889 }
890
891 /* Initialize label_align and set up uid_shuid to be strictly
892 monotonically rising with insn order. */
893 /* We use max_log here to keep track of the maximum alignment we want to
894 impose on the next CODE_LABEL (or the current one if we are processing
895 the CODE_LABEL itself). */
896
897 max_log = 0;
898 max_skip = 0;
899
900 for (insn = get_insns (), i = 1; insn; insn = NEXT_INSN (insn))
901 {
902 int log;
903
904 INSN_SHUID (insn) = i++;
905 if (INSN_P (insn))
906 continue;
907
908 if (LABEL_P (insn))
909 {
910 rtx next;
911 bool next_is_jumptable;
912
913 /* Merge in alignments computed by compute_alignments. */
914 log = LABEL_TO_ALIGNMENT (insn);
915 if (max_log < log)
916 {
917 max_log = log;
918 max_skip = LABEL_TO_MAX_SKIP (insn);
919 }
920
921 next = next_nonnote_insn (insn);
922 next_is_jumptable = next && JUMP_TABLE_DATA_P (next);
923 if (!next_is_jumptable)
924 {
925 log = LABEL_ALIGN (insn);
926 if (max_log < log)
927 {
928 max_log = log;
929 max_skip = LABEL_ALIGN_MAX_SKIP;
930 }
931 }
932 /* ADDR_VECs only take room if read-only data goes into the text
933 section. */
934 if ((JUMP_TABLES_IN_TEXT_SECTION
935 || readonly_data_section == text_section)
936 && next_is_jumptable)
937 {
938 log = ADDR_VEC_ALIGN (next);
939 if (max_log < log)
940 {
941 max_log = log;
942 max_skip = LABEL_ALIGN_MAX_SKIP;
943 }
944 }
945 LABEL_TO_ALIGNMENT (insn) = max_log;
946 LABEL_TO_MAX_SKIP (insn) = max_skip;
947 max_log = 0;
948 max_skip = 0;
949 }
950 else if (BARRIER_P (insn))
951 {
952 rtx label;
953
954 for (label = insn; label && ! INSN_P (label);
955 label = NEXT_INSN (label))
956 if (LABEL_P (label))
957 {
958 log = LABEL_ALIGN_AFTER_BARRIER (insn);
959 if (max_log < log)
960 {
961 max_log = log;
962 max_skip = LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP;
963 }
964 break;
965 }
966 }
967 }
968 #ifdef HAVE_ATTR_length
969
970 /* Allocate the rest of the arrays. */
971 insn_lengths = XNEWVEC (int, max_uid);
972 insn_lengths_max_uid = max_uid;
973 /* Syntax errors can lead to labels being outside of the main insn stream.
974 Initialize insn_addresses, so that we get reproducible results. */
975 INSN_ADDRESSES_ALLOC (max_uid);
976
977 varying_length = XCNEWVEC (char, max_uid);
978
979 /* Initialize uid_align. We scan instructions
980 from end to start, and keep in align_tab[n] the last seen insn
981 that does an alignment of at least n+1, i.e. the successor
982 in the alignment chain for an insn that does / has a known
983 alignment of n. */
984 uid_align = XCNEWVEC (rtx, max_uid);
985
986 for (i = MAX_CODE_ALIGN; --i >= 0;)
987 align_tab[i] = NULL_RTX;
988 seq = get_last_insn ();
989 for (; seq; seq = PREV_INSN (seq))
990 {
991 int uid = INSN_UID (seq);
992 int log;
993 log = (LABEL_P (seq) ? LABEL_TO_ALIGNMENT (seq) : 0);
994 uid_align[uid] = align_tab[0];
995 if (log)
996 {
997 /* Found an alignment label. */
998 uid_align[uid] = align_tab[log];
999 for (i = log - 1; i >= 0; i--)
1000 align_tab[i] = seq;
1001 }
1002 }
1003 #ifdef CASE_VECTOR_SHORTEN_MODE
1004 if (optimize)
1005 {
1006 /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum
1007 label fields. */
1008
1009 int min_shuid = INSN_SHUID (get_insns ()) - 1;
1010 int max_shuid = INSN_SHUID (get_last_insn ()) + 1;
1011 int rel;
1012
1013 for (insn = first; insn != 0; insn = NEXT_INSN (insn))
1014 {
1015 rtx min_lab = NULL_RTX, max_lab = NULL_RTX, pat;
1016 int len, i, min, max, insn_shuid;
1017 int min_align;
1018 addr_diff_vec_flags flags;
1019
1020 if (!JUMP_P (insn)
1021 || GET_CODE (PATTERN (insn)) != ADDR_DIFF_VEC)
1022 continue;
1023 pat = PATTERN (insn);
1024 len = XVECLEN (pat, 1);
1025 gcc_assert (len > 0);
1026 min_align = MAX_CODE_ALIGN;
1027 for (min = max_shuid, max = min_shuid, i = len - 1; i >= 0; i--)
1028 {
1029 rtx lab = XEXP (XVECEXP (pat, 1, i), 0);
1030 int shuid = INSN_SHUID (lab);
1031 if (shuid < min)
1032 {
1033 min = shuid;
1034 min_lab = lab;
1035 }
1036 if (shuid > max)
1037 {
1038 max = shuid;
1039 max_lab = lab;
1040 }
1041 if (min_align > LABEL_TO_ALIGNMENT (lab))
1042 min_align = LABEL_TO_ALIGNMENT (lab);
1043 }
1044 XEXP (pat, 2) = gen_rtx_LABEL_REF (Pmode, min_lab);
1045 XEXP (pat, 3) = gen_rtx_LABEL_REF (Pmode, max_lab);
1046 insn_shuid = INSN_SHUID (insn);
1047 rel = INSN_SHUID (XEXP (XEXP (pat, 0), 0));
1048 memset (&flags, 0, sizeof (flags));
1049 flags.min_align = min_align;
1050 flags.base_after_vec = rel > insn_shuid;
1051 flags.min_after_vec = min > insn_shuid;
1052 flags.max_after_vec = max > insn_shuid;
1053 flags.min_after_base = min > rel;
1054 flags.max_after_base = max > rel;
1055 ADDR_DIFF_VEC_FLAGS (pat) = flags;
1056 }
1057 }
1058 #endif /* CASE_VECTOR_SHORTEN_MODE */
1059
1060 /* Compute initial lengths, addresses, and varying flags for each insn. */
1061 for (insn_current_address = 0, insn = first;
1062 insn != 0;
1063 insn_current_address += insn_lengths[uid], insn = NEXT_INSN (insn))
1064 {
1065 uid = INSN_UID (insn);
1066
1067 insn_lengths[uid] = 0;
1068
1069 if (LABEL_P (insn))
1070 {
1071 int log = LABEL_TO_ALIGNMENT (insn);
1072 if (log)
1073 {
1074 int align = 1 << log;
1075 int new_address = (insn_current_address + align - 1) & -align;
1076 insn_lengths[uid] = new_address - insn_current_address;
1077 }
1078 }
1079
1080 INSN_ADDRESSES (uid) = insn_current_address + insn_lengths[uid];
1081
1082 if (NOTE_P (insn) || BARRIER_P (insn)
1083 || LABEL_P (insn))
1084 continue;
1085 if (INSN_DELETED_P (insn))
1086 continue;
1087
1088 body = PATTERN (insn);
1089 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
1090 {
1091 /* This only takes room if read-only data goes into the text
1092 section. */
1093 if (JUMP_TABLES_IN_TEXT_SECTION
1094 || readonly_data_section == text_section)
1095 insn_lengths[uid] = (XVECLEN (body,
1096 GET_CODE (body) == ADDR_DIFF_VEC)
1097 * GET_MODE_SIZE (GET_MODE (body)));
1098 /* Alignment is handled by ADDR_VEC_ALIGN. */
1099 }
1100 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
1101 insn_lengths[uid] = asm_insn_count (body) * insn_default_length (insn);
1102 else if (GET_CODE (body) == SEQUENCE)
1103 {
1104 int i;
1105 int const_delay_slots;
1106 #ifdef DELAY_SLOTS
1107 const_delay_slots = const_num_delay_slots (XVECEXP (body, 0, 0));
1108 #else
1109 const_delay_slots = 0;
1110 #endif
1111 /* Inside a delay slot sequence, we do not do any branch shortening
1112 if the shortening could change the number of delay slots
1113 of the branch. */
1114 for (i = 0; i < XVECLEN (body, 0); i++)
1115 {
1116 rtx inner_insn = XVECEXP (body, 0, i);
1117 int inner_uid = INSN_UID (inner_insn);
1118 int inner_length;
1119
1120 if (GET_CODE (body) == ASM_INPUT
1121 || asm_noperands (PATTERN (XVECEXP (body, 0, i))) >= 0)
1122 inner_length = (asm_insn_count (PATTERN (inner_insn))
1123 * insn_default_length (inner_insn));
1124 else
1125 inner_length = insn_default_length (inner_insn);
1126
1127 insn_lengths[inner_uid] = inner_length;
1128 if (const_delay_slots)
1129 {
1130 if ((varying_length[inner_uid]
1131 = insn_variable_length_p (inner_insn)) != 0)
1132 varying_length[uid] = 1;
1133 INSN_ADDRESSES (inner_uid) = (insn_current_address
1134 + insn_lengths[uid]);
1135 }
1136 else
1137 varying_length[inner_uid] = 0;
1138 insn_lengths[uid] += inner_length;
1139 }
1140 }
1141 else if (GET_CODE (body) != USE && GET_CODE (body) != CLOBBER)
1142 {
1143 insn_lengths[uid] = insn_default_length (insn);
1144 varying_length[uid] = insn_variable_length_p (insn);
1145 }
1146
1147 /* If needed, do any adjustment. */
1148 #ifdef ADJUST_INSN_LENGTH
1149 ADJUST_INSN_LENGTH (insn, insn_lengths[uid]);
1150 if (insn_lengths[uid] < 0)
1151 fatal_insn ("negative insn length", insn);
1152 #endif
1153 }
1154
1155 /* Now loop over all the insns finding varying length insns. For each,
1156 get the current insn length. If it has changed, reflect the change.
1157 When nothing changes for a full pass, we are done. */
1158
1159 while (something_changed)
1160 {
1161 something_changed = 0;
1162 insn_current_align = MAX_CODE_ALIGN - 1;
1163 for (insn_current_address = 0, insn = first;
1164 insn != 0;
1165 insn = NEXT_INSN (insn))
1166 {
1167 int new_length;
1168 #ifdef ADJUST_INSN_LENGTH
1169 int tmp_length;
1170 #endif
1171 int length_align;
1172
1173 uid = INSN_UID (insn);
1174
1175 if (LABEL_P (insn))
1176 {
1177 int log = LABEL_TO_ALIGNMENT (insn);
1178 if (log > insn_current_align)
1179 {
1180 int align = 1 << log;
1181 int new_address= (insn_current_address + align - 1) & -align;
1182 insn_lengths[uid] = new_address - insn_current_address;
1183 insn_current_align = log;
1184 insn_current_address = new_address;
1185 }
1186 else
1187 insn_lengths[uid] = 0;
1188 INSN_ADDRESSES (uid) = insn_current_address;
1189 continue;
1190 }
1191
1192 length_align = INSN_LENGTH_ALIGNMENT (insn);
1193 if (length_align < insn_current_align)
1194 insn_current_align = length_align;
1195
1196 insn_last_address = INSN_ADDRESSES (uid);
1197 INSN_ADDRESSES (uid) = insn_current_address;
1198
1199 #ifdef CASE_VECTOR_SHORTEN_MODE
1200 if (optimize && JUMP_P (insn)
1201 && GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
1202 {
1203 rtx body = PATTERN (insn);
1204 int old_length = insn_lengths[uid];
1205 rtx rel_lab = XEXP (XEXP (body, 0), 0);
1206 rtx min_lab = XEXP (XEXP (body, 2), 0);
1207 rtx max_lab = XEXP (XEXP (body, 3), 0);
1208 int rel_addr = INSN_ADDRESSES (INSN_UID (rel_lab));
1209 int min_addr = INSN_ADDRESSES (INSN_UID (min_lab));
1210 int max_addr = INSN_ADDRESSES (INSN_UID (max_lab));
1211 rtx prev;
1212 int rel_align = 0;
1213 addr_diff_vec_flags flags;
1214
1215 /* Avoid automatic aggregate initialization. */
1216 flags = ADDR_DIFF_VEC_FLAGS (body);
1217
1218 /* Try to find a known alignment for rel_lab. */
1219 for (prev = rel_lab;
1220 prev
1221 && ! insn_lengths[INSN_UID (prev)]
1222 && ! (varying_length[INSN_UID (prev)] & 1);
1223 prev = PREV_INSN (prev))
1224 if (varying_length[INSN_UID (prev)] & 2)
1225 {
1226 rel_align = LABEL_TO_ALIGNMENT (prev);
1227 break;
1228 }
1229
1230 /* See the comment on addr_diff_vec_flags in rtl.h for the
1231 meaning of the flags values. base: REL_LAB vec: INSN */
1232 /* Anything after INSN has still addresses from the last
1233 pass; adjust these so that they reflect our current
1234 estimate for this pass. */
1235 if (flags.base_after_vec)
1236 rel_addr += insn_current_address - insn_last_address;
1237 if (flags.min_after_vec)
1238 min_addr += insn_current_address - insn_last_address;
1239 if (flags.max_after_vec)
1240 max_addr += insn_current_address - insn_last_address;
1241 /* We want to know the worst case, i.e. lowest possible value
1242 for the offset of MIN_LAB. If MIN_LAB is after REL_LAB,
1243 its offset is positive, and we have to be wary of code shrink;
1244 otherwise, it is negative, and we have to be vary of code
1245 size increase. */
1246 if (flags.min_after_base)
1247 {
1248 /* If INSN is between REL_LAB and MIN_LAB, the size
1249 changes we are about to make can change the alignment
1250 within the observed offset, therefore we have to break
1251 it up into two parts that are independent. */
1252 if (! flags.base_after_vec && flags.min_after_vec)
1253 {
1254 min_addr -= align_fuzz (rel_lab, insn, rel_align, 0);
1255 min_addr -= align_fuzz (insn, min_lab, 0, 0);
1256 }
1257 else
1258 min_addr -= align_fuzz (rel_lab, min_lab, rel_align, 0);
1259 }
1260 else
1261 {
1262 if (flags.base_after_vec && ! flags.min_after_vec)
1263 {
1264 min_addr -= align_fuzz (min_lab, insn, 0, ~0);
1265 min_addr -= align_fuzz (insn, rel_lab, 0, ~0);
1266 }
1267 else
1268 min_addr -= align_fuzz (min_lab, rel_lab, 0, ~0);
1269 }
1270 /* Likewise, determine the highest lowest possible value
1271 for the offset of MAX_LAB. */
1272 if (flags.max_after_base)
1273 {
1274 if (! flags.base_after_vec && flags.max_after_vec)
1275 {
1276 max_addr += align_fuzz (rel_lab, insn, rel_align, ~0);
1277 max_addr += align_fuzz (insn, max_lab, 0, ~0);
1278 }
1279 else
1280 max_addr += align_fuzz (rel_lab, max_lab, rel_align, ~0);
1281 }
1282 else
1283 {
1284 if (flags.base_after_vec && ! flags.max_after_vec)
1285 {
1286 max_addr += align_fuzz (max_lab, insn, 0, 0);
1287 max_addr += align_fuzz (insn, rel_lab, 0, 0);
1288 }
1289 else
1290 max_addr += align_fuzz (max_lab, rel_lab, 0, 0);
1291 }
1292 PUT_MODE (body, CASE_VECTOR_SHORTEN_MODE (min_addr - rel_addr,
1293 max_addr - rel_addr,
1294 body));
1295 if (JUMP_TABLES_IN_TEXT_SECTION
1296 || readonly_data_section == text_section)
1297 {
1298 insn_lengths[uid]
1299 = (XVECLEN (body, 1) * GET_MODE_SIZE (GET_MODE (body)));
1300 insn_current_address += insn_lengths[uid];
1301 if (insn_lengths[uid] != old_length)
1302 something_changed = 1;
1303 }
1304
1305 continue;
1306 }
1307 #endif /* CASE_VECTOR_SHORTEN_MODE */
1308
1309 if (! (varying_length[uid]))
1310 {
1311 if (NONJUMP_INSN_P (insn)
1312 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1313 {
1314 int i;
1315
1316 body = PATTERN (insn);
1317 for (i = 0; i < XVECLEN (body, 0); i++)
1318 {
1319 rtx inner_insn = XVECEXP (body, 0, i);
1320 int inner_uid = INSN_UID (inner_insn);
1321
1322 INSN_ADDRESSES (inner_uid) = insn_current_address;
1323
1324 insn_current_address += insn_lengths[inner_uid];
1325 }
1326 }
1327 else
1328 insn_current_address += insn_lengths[uid];
1329
1330 continue;
1331 }
1332
1333 if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
1334 {
1335 int i;
1336
1337 body = PATTERN (insn);
1338 new_length = 0;
1339 for (i = 0; i < XVECLEN (body, 0); i++)
1340 {
1341 rtx inner_insn = XVECEXP (body, 0, i);
1342 int inner_uid = INSN_UID (inner_insn);
1343 int inner_length;
1344
1345 INSN_ADDRESSES (inner_uid) = insn_current_address;
1346
1347 /* insn_current_length returns 0 for insns with a
1348 non-varying length. */
1349 if (! varying_length[inner_uid])
1350 inner_length = insn_lengths[inner_uid];
1351 else
1352 inner_length = insn_current_length (inner_insn);
1353
1354 if (inner_length != insn_lengths[inner_uid])
1355 {
1356 insn_lengths[inner_uid] = inner_length;
1357 something_changed = 1;
1358 }
1359 insn_current_address += insn_lengths[inner_uid];
1360 new_length += inner_length;
1361 }
1362 }
1363 else
1364 {
1365 new_length = insn_current_length (insn);
1366 insn_current_address += new_length;
1367 }
1368
1369 #ifdef ADJUST_INSN_LENGTH
1370 /* If needed, do any adjustment. */
1371 tmp_length = new_length;
1372 ADJUST_INSN_LENGTH (insn, new_length);
1373 insn_current_address += (new_length - tmp_length);
1374 #endif
1375
1376 if (new_length != insn_lengths[uid])
1377 {
1378 insn_lengths[uid] = new_length;
1379 something_changed = 1;
1380 }
1381 }
1382 /* For a non-optimizing compile, do only a single pass. */
1383 if (!optimize)
1384 break;
1385 }
1386
1387 free (varying_length);
1388
1389 #endif /* HAVE_ATTR_length */
1390 }
1391
1392 #ifdef HAVE_ATTR_length
1393 /* Given the body of an INSN known to be generated by an ASM statement, return
1394 the number of machine instructions likely to be generated for this insn.
1395 This is used to compute its length. */
1396
1397 static int
1398 asm_insn_count (rtx body)
1399 {
1400 const char *templ;
1401 int count = 1;
1402
1403 if (GET_CODE (body) == ASM_INPUT)
1404 templ = XSTR (body, 0);
1405 else
1406 templ = decode_asm_operands (body, NULL, NULL, NULL, NULL, NULL);
1407
1408 if (!*templ)
1409 return 0;
1410
1411 for (; *templ; templ++)
1412 if (IS_ASM_LOGICAL_LINE_SEPARATOR (*templ, templ)
1413 || *templ == '\n')
1414 count++;
1415
1416 return count;
1417 }
1418 #endif
1419 \f
1420 /* ??? This is probably the wrong place for these. */
1421 /* Structure recording the mapping from source file and directory
1422 names at compile time to those to be embedded in debug
1423 information. */
1424 typedef struct debug_prefix_map
1425 {
1426 const char *old_prefix;
1427 const char *new_prefix;
1428 size_t old_len;
1429 size_t new_len;
1430 struct debug_prefix_map *next;
1431 } debug_prefix_map;
1432
1433 /* Linked list of such structures. */
1434 debug_prefix_map *debug_prefix_maps;
1435
1436
1437 /* Record a debug file prefix mapping. ARG is the argument to
1438 -fdebug-prefix-map and must be of the form OLD=NEW. */
1439
1440 void
1441 add_debug_prefix_map (const char *arg)
1442 {
1443 debug_prefix_map *map;
1444 const char *p;
1445
1446 p = strchr (arg, '=');
1447 if (!p)
1448 {
1449 error ("invalid argument %qs to -fdebug-prefix-map", arg);
1450 return;
1451 }
1452 map = XNEW (debug_prefix_map);
1453 map->old_prefix = xstrndup (arg, p - arg);
1454 map->old_len = p - arg;
1455 p++;
1456 map->new_prefix = xstrdup (p);
1457 map->new_len = strlen (p);
1458 map->next = debug_prefix_maps;
1459 debug_prefix_maps = map;
1460 }
1461
1462 /* Perform user-specified mapping of debug filename prefixes. Return
1463 the new name corresponding to FILENAME. */
1464
1465 const char *
1466 remap_debug_filename (const char *filename)
1467 {
1468 debug_prefix_map *map;
1469 char *s;
1470 const char *name;
1471 size_t name_len;
1472
1473 for (map = debug_prefix_maps; map; map = map->next)
1474 if (strncmp (filename, map->old_prefix, map->old_len) == 0)
1475 break;
1476 if (!map)
1477 return filename;
1478 name = filename + map->old_len;
1479 name_len = strlen (name) + 1;
1480 s = (char *) alloca (name_len + map->new_len);
1481 memcpy (s, map->new_prefix, map->new_len);
1482 memcpy (s + map->new_len, name, name_len);
1483 return ggc_strdup (s);
1484 }
1485 \f
1486 /* Output assembler code for the start of a function,
1487 and initialize some of the variables in this file
1488 for the new function. The label for the function and associated
1489 assembler pseudo-ops have already been output in `assemble_start_function'.
1490
1491 FIRST is the first insn of the rtl for the function being compiled.
1492 FILE is the file to write assembler code to.
1493 OPTIMIZE is nonzero if we should eliminate redundant
1494 test and compare insns. */
1495
1496 void
1497 final_start_function (rtx first ATTRIBUTE_UNUSED, FILE *file,
1498 int optimize ATTRIBUTE_UNUSED)
1499 {
1500 block_depth = 0;
1501
1502 this_is_asm_operands = 0;
1503
1504 last_filename = locator_file (prologue_locator);
1505 last_linenum = locator_line (prologue_locator);
1506 last_discriminator = discriminator = 0;
1507
1508 high_block_linenum = high_function_linenum = last_linenum;
1509
1510 (*debug_hooks->begin_prologue) (last_linenum, last_filename);
1511
1512 #if defined (DWARF2_UNWIND_INFO) || defined (TARGET_UNWIND_INFO)
1513 if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG)
1514 dwarf2out_begin_prologue (0, NULL);
1515 #endif
1516
1517 #ifdef LEAF_REG_REMAP
1518 if (current_function_uses_only_leaf_regs)
1519 leaf_renumber_regs (first);
1520 #endif
1521
1522 /* The Sun386i and perhaps other machines don't work right
1523 if the profiling code comes after the prologue. */
1524 #ifdef PROFILE_BEFORE_PROLOGUE
1525 if (crtl->profile)
1526 profile_function (file);
1527 #endif /* PROFILE_BEFORE_PROLOGUE */
1528
1529 #if defined (DWARF2_UNWIND_INFO) && defined (HAVE_prologue)
1530 if (dwarf2out_do_frame ())
1531 dwarf2out_frame_debug (NULL_RTX, false);
1532 #endif
1533
1534 /* If debugging, assign block numbers to all of the blocks in this
1535 function. */
1536 if (write_symbols)
1537 {
1538 reemit_insn_block_notes ();
1539 number_blocks (current_function_decl);
1540 /* We never actually put out begin/end notes for the top-level
1541 block in the function. But, conceptually, that block is
1542 always needed. */
1543 TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl)) = 1;
1544 }
1545
1546 if (warn_frame_larger_than
1547 && get_frame_size () > frame_larger_than_size)
1548 {
1549 /* Issue a warning */
1550 warning (OPT_Wframe_larger_than_,
1551 "the frame size of %wd bytes is larger than %wd bytes",
1552 get_frame_size (), frame_larger_than_size);
1553 }
1554
1555 /* First output the function prologue: code to set up the stack frame. */
1556 targetm.asm_out.function_prologue (file, get_frame_size ());
1557
1558 /* If the machine represents the prologue as RTL, the profiling code must
1559 be emitted when NOTE_INSN_PROLOGUE_END is scanned. */
1560 #ifdef HAVE_prologue
1561 if (! HAVE_prologue)
1562 #endif
1563 profile_after_prologue (file);
1564 }
1565
1566 static void
1567 profile_after_prologue (FILE *file ATTRIBUTE_UNUSED)
1568 {
1569 #ifndef PROFILE_BEFORE_PROLOGUE
1570 if (crtl->profile)
1571 profile_function (file);
1572 #endif /* not PROFILE_BEFORE_PROLOGUE */
1573 }
1574
1575 static void
1576 profile_function (FILE *file ATTRIBUTE_UNUSED)
1577 {
1578 #ifndef NO_PROFILE_COUNTERS
1579 # define NO_PROFILE_COUNTERS 0
1580 #endif
1581 #if defined(ASM_OUTPUT_REG_PUSH)
1582 int sval = cfun->returns_struct;
1583 rtx svrtx = targetm.calls.struct_value_rtx (TREE_TYPE (current_function_decl), 1);
1584 #if defined(STATIC_CHAIN_INCOMING_REGNUM) || defined(STATIC_CHAIN_REGNUM)
1585 int cxt = cfun->static_chain_decl != NULL;
1586 #endif
1587 #endif /* ASM_OUTPUT_REG_PUSH */
1588
1589 if (! NO_PROFILE_COUNTERS)
1590 {
1591 int align = MIN (BIGGEST_ALIGNMENT, LONG_TYPE_SIZE);
1592 switch_to_section (data_section);
1593 ASM_OUTPUT_ALIGN (file, floor_log2 (align / BITS_PER_UNIT));
1594 targetm.asm_out.internal_label (file, "LP", current_function_funcdef_no);
1595 assemble_integer (const0_rtx, LONG_TYPE_SIZE / BITS_PER_UNIT, align, 1);
1596 }
1597
1598 switch_to_section (current_function_section ());
1599
1600 #if defined(ASM_OUTPUT_REG_PUSH)
1601 if (sval && svrtx != NULL_RTX && REG_P (svrtx))
1602 {
1603 ASM_OUTPUT_REG_PUSH (file, REGNO (svrtx));
1604 }
1605 #endif
1606
1607 #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1608 if (cxt)
1609 ASM_OUTPUT_REG_PUSH (file, STATIC_CHAIN_INCOMING_REGNUM);
1610 #else
1611 #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1612 if (cxt)
1613 {
1614 ASM_OUTPUT_REG_PUSH (file, STATIC_CHAIN_REGNUM);
1615 }
1616 #endif
1617 #endif
1618
1619 FUNCTION_PROFILER (file, current_function_funcdef_no);
1620
1621 #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1622 if (cxt)
1623 ASM_OUTPUT_REG_POP (file, STATIC_CHAIN_INCOMING_REGNUM);
1624 #else
1625 #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1626 if (cxt)
1627 {
1628 ASM_OUTPUT_REG_POP (file, STATIC_CHAIN_REGNUM);
1629 }
1630 #endif
1631 #endif
1632
1633 #if defined(ASM_OUTPUT_REG_PUSH)
1634 if (sval && svrtx != NULL_RTX && REG_P (svrtx))
1635 {
1636 ASM_OUTPUT_REG_POP (file, REGNO (svrtx));
1637 }
1638 #endif
1639 }
1640
1641 /* Output assembler code for the end of a function.
1642 For clarity, args are same as those of `final_start_function'
1643 even though not all of them are needed. */
1644
1645 void
1646 final_end_function (void)
1647 {
1648 app_disable ();
1649
1650 (*debug_hooks->end_function) (high_function_linenum);
1651
1652 /* Finally, output the function epilogue:
1653 code to restore the stack frame and return to the caller. */
1654 targetm.asm_out.function_epilogue (asm_out_file, get_frame_size ());
1655
1656 /* And debug output. */
1657 (*debug_hooks->end_epilogue) (last_linenum, last_filename);
1658
1659 #if defined (DWARF2_UNWIND_INFO)
1660 if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG
1661 && dwarf2out_do_frame ())
1662 dwarf2out_end_epilogue (last_linenum, last_filename);
1663 #endif
1664 }
1665 \f
1666 /* Output assembler code for some insns: all or part of a function.
1667 For description of args, see `final_start_function', above. */
1668
1669 void
1670 final (rtx first, FILE *file, int optimize)
1671 {
1672 rtx insn;
1673 int max_uid = 0;
1674 int seen = 0;
1675
1676 last_ignored_compare = 0;
1677
1678 for (insn = first; insn; insn = NEXT_INSN (insn))
1679 {
1680 if (INSN_UID (insn) > max_uid) /* Find largest UID. */
1681 max_uid = INSN_UID (insn);
1682 #ifdef HAVE_cc0
1683 /* If CC tracking across branches is enabled, record the insn which
1684 jumps to each branch only reached from one place. */
1685 if (optimize && JUMP_P (insn))
1686 {
1687 rtx lab = JUMP_LABEL (insn);
1688 if (lab && LABEL_NUSES (lab) == 1)
1689 {
1690 LABEL_REFS (lab) = insn;
1691 }
1692 }
1693 #endif
1694 }
1695
1696 init_recog ();
1697
1698 CC_STATUS_INIT;
1699
1700 /* Output the insns. */
1701 for (insn = first; insn;)
1702 {
1703 #ifdef HAVE_ATTR_length
1704 if ((unsigned) INSN_UID (insn) >= INSN_ADDRESSES_SIZE ())
1705 {
1706 /* This can be triggered by bugs elsewhere in the compiler if
1707 new insns are created after init_insn_lengths is called. */
1708 gcc_assert (NOTE_P (insn));
1709 insn_current_address = -1;
1710 }
1711 else
1712 insn_current_address = INSN_ADDRESSES (INSN_UID (insn));
1713 #endif /* HAVE_ATTR_length */
1714
1715 insn = final_scan_insn (insn, file, optimize, 0, &seen);
1716 }
1717 }
1718 \f
1719 const char *
1720 get_insn_template (int code, rtx insn)
1721 {
1722 switch (insn_data[code].output_format)
1723 {
1724 case INSN_OUTPUT_FORMAT_SINGLE:
1725 return insn_data[code].output.single;
1726 case INSN_OUTPUT_FORMAT_MULTI:
1727 return insn_data[code].output.multi[which_alternative];
1728 case INSN_OUTPUT_FORMAT_FUNCTION:
1729 gcc_assert (insn);
1730 return (*insn_data[code].output.function) (recog_data.operand, insn);
1731
1732 default:
1733 gcc_unreachable ();
1734 }
1735 }
1736
1737 /* Emit the appropriate declaration for an alternate-entry-point
1738 symbol represented by INSN, to FILE. INSN is a CODE_LABEL with
1739 LABEL_KIND != LABEL_NORMAL.
1740
1741 The case fall-through in this function is intentional. */
1742 static void
1743 output_alternate_entry_point (FILE *file, rtx insn)
1744 {
1745 const char *name = LABEL_NAME (insn);
1746
1747 switch (LABEL_KIND (insn))
1748 {
1749 case LABEL_WEAK_ENTRY:
1750 #ifdef ASM_WEAKEN_LABEL
1751 ASM_WEAKEN_LABEL (file, name);
1752 #endif
1753 case LABEL_GLOBAL_ENTRY:
1754 targetm.asm_out.globalize_label (file, name);
1755 case LABEL_STATIC_ENTRY:
1756 #ifdef ASM_OUTPUT_TYPE_DIRECTIVE
1757 ASM_OUTPUT_TYPE_DIRECTIVE (file, name, "function");
1758 #endif
1759 ASM_OUTPUT_LABEL (file, name);
1760 break;
1761
1762 case LABEL_NORMAL:
1763 default:
1764 gcc_unreachable ();
1765 }
1766 }
1767
1768 /* Given a CALL_INSN, find and return the nested CALL. */
1769 static rtx
1770 call_from_call_insn (rtx insn)
1771 {
1772 rtx x;
1773 gcc_assert (CALL_P (insn));
1774 x = PATTERN (insn);
1775
1776 while (GET_CODE (x) != CALL)
1777 {
1778 switch (GET_CODE (x))
1779 {
1780 default:
1781 gcc_unreachable ();
1782 case COND_EXEC:
1783 x = COND_EXEC_CODE (x);
1784 break;
1785 case PARALLEL:
1786 x = XVECEXP (x, 0, 0);
1787 break;
1788 case SET:
1789 x = XEXP (x, 1);
1790 break;
1791 }
1792 }
1793 return x;
1794 }
1795
1796 /* The final scan for one insn, INSN.
1797 Args are same as in `final', except that INSN
1798 is the insn being scanned.
1799 Value returned is the next insn to be scanned.
1800
1801 NOPEEPHOLES is the flag to disallow peephole processing (currently
1802 used for within delayed branch sequence output).
1803
1804 SEEN is used to track the end of the prologue, for emitting
1805 debug information. We force the emission of a line note after
1806 both NOTE_INSN_PROLOGUE_END and NOTE_INSN_FUNCTION_BEG, or
1807 at the beginning of the second basic block, whichever comes
1808 first. */
1809
1810 rtx
1811 final_scan_insn (rtx insn, FILE *file, int optimize ATTRIBUTE_UNUSED,
1812 int nopeepholes ATTRIBUTE_UNUSED, int *seen)
1813 {
1814 #ifdef HAVE_cc0
1815 rtx set;
1816 #endif
1817 rtx next;
1818
1819 insn_counter++;
1820
1821 /* Ignore deleted insns. These can occur when we split insns (due to a
1822 template of "#") while not optimizing. */
1823 if (INSN_DELETED_P (insn))
1824 return NEXT_INSN (insn);
1825
1826 switch (GET_CODE (insn))
1827 {
1828 case NOTE:
1829 switch (NOTE_KIND (insn))
1830 {
1831 case NOTE_INSN_DELETED:
1832 break;
1833
1834 case NOTE_INSN_SWITCH_TEXT_SECTIONS:
1835 in_cold_section_p = !in_cold_section_p;
1836 #ifdef DWARF2_UNWIND_INFO
1837 if (dwarf2out_do_frame ())
1838 dwarf2out_switch_text_section ();
1839 else
1840 #endif
1841 (*debug_hooks->switch_text_section) ();
1842
1843 switch_to_section (current_function_section ());
1844 break;
1845
1846 case NOTE_INSN_BASIC_BLOCK:
1847 #ifdef TARGET_UNWIND_INFO
1848 targetm.asm_out.unwind_emit (asm_out_file, insn);
1849 #endif
1850
1851 if (flag_debug_asm)
1852 fprintf (asm_out_file, "\t%s basic block %d\n",
1853 ASM_COMMENT_START, NOTE_BASIC_BLOCK (insn)->index);
1854
1855 if ((*seen & (SEEN_EMITTED | SEEN_BB)) == SEEN_BB)
1856 {
1857 *seen |= SEEN_EMITTED;
1858 force_source_line = true;
1859 }
1860 else
1861 *seen |= SEEN_BB;
1862
1863 discriminator = NOTE_BASIC_BLOCK (insn)->discriminator;
1864
1865 break;
1866
1867 case NOTE_INSN_EH_REGION_BEG:
1868 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHB",
1869 NOTE_EH_HANDLER (insn));
1870 break;
1871
1872 case NOTE_INSN_EH_REGION_END:
1873 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHE",
1874 NOTE_EH_HANDLER (insn));
1875 break;
1876
1877 case NOTE_INSN_PROLOGUE_END:
1878 targetm.asm_out.function_end_prologue (file);
1879 profile_after_prologue (file);
1880
1881 if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE)
1882 {
1883 *seen |= SEEN_EMITTED;
1884 force_source_line = true;
1885 }
1886 else
1887 *seen |= SEEN_NOTE;
1888
1889 break;
1890
1891 case NOTE_INSN_EPILOGUE_BEG:
1892 #if defined (DWARF2_UNWIND_INFO) && defined (HAVE_epilogue)
1893 if (dwarf2out_do_frame ())
1894 dwarf2out_begin_epilogue (insn);
1895 #endif
1896 targetm.asm_out.function_begin_epilogue (file);
1897 break;
1898
1899 case NOTE_INSN_CFA_RESTORE_STATE:
1900 #if defined (DWARF2_UNWIND_INFO)
1901 dwarf2out_frame_debug_restore_state ();
1902 #endif
1903 break;
1904
1905 case NOTE_INSN_FUNCTION_BEG:
1906 app_disable ();
1907 (*debug_hooks->end_prologue) (last_linenum, last_filename);
1908
1909 if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE)
1910 {
1911 *seen |= SEEN_EMITTED;
1912 force_source_line = true;
1913 }
1914 else
1915 *seen |= SEEN_NOTE;
1916
1917 break;
1918
1919 case NOTE_INSN_BLOCK_BEG:
1920 if (debug_info_level == DINFO_LEVEL_NORMAL
1921 || debug_info_level == DINFO_LEVEL_VERBOSE
1922 || write_symbols == DWARF2_DEBUG
1923 || write_symbols == VMS_AND_DWARF2_DEBUG
1924 || write_symbols == VMS_DEBUG)
1925 {
1926 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
1927
1928 app_disable ();
1929 ++block_depth;
1930 high_block_linenum = last_linenum;
1931
1932 /* Output debugging info about the symbol-block beginning. */
1933 (*debug_hooks->begin_block) (last_linenum, n);
1934
1935 /* Mark this block as output. */
1936 TREE_ASM_WRITTEN (NOTE_BLOCK (insn)) = 1;
1937 }
1938 if (write_symbols == DBX_DEBUG
1939 || write_symbols == SDB_DEBUG)
1940 {
1941 location_t *locus_ptr
1942 = block_nonartificial_location (NOTE_BLOCK (insn));
1943
1944 if (locus_ptr != NULL)
1945 {
1946 override_filename = LOCATION_FILE (*locus_ptr);
1947 override_linenum = LOCATION_LINE (*locus_ptr);
1948 }
1949 }
1950 break;
1951
1952 case NOTE_INSN_BLOCK_END:
1953 if (debug_info_level == DINFO_LEVEL_NORMAL
1954 || debug_info_level == DINFO_LEVEL_VERBOSE
1955 || write_symbols == DWARF2_DEBUG
1956 || write_symbols == VMS_AND_DWARF2_DEBUG
1957 || write_symbols == VMS_DEBUG)
1958 {
1959 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
1960
1961 app_disable ();
1962
1963 /* End of a symbol-block. */
1964 --block_depth;
1965 gcc_assert (block_depth >= 0);
1966
1967 (*debug_hooks->end_block) (high_block_linenum, n);
1968 }
1969 if (write_symbols == DBX_DEBUG
1970 || write_symbols == SDB_DEBUG)
1971 {
1972 tree outer_block = BLOCK_SUPERCONTEXT (NOTE_BLOCK (insn));
1973 location_t *locus_ptr
1974 = block_nonartificial_location (outer_block);
1975
1976 if (locus_ptr != NULL)
1977 {
1978 override_filename = LOCATION_FILE (*locus_ptr);
1979 override_linenum = LOCATION_LINE (*locus_ptr);
1980 }
1981 else
1982 {
1983 override_filename = NULL;
1984 override_linenum = 0;
1985 }
1986 }
1987 break;
1988
1989 case NOTE_INSN_DELETED_LABEL:
1990 /* Emit the label. We may have deleted the CODE_LABEL because
1991 the label could be proved to be unreachable, though still
1992 referenced (in the form of having its address taken. */
1993 ASM_OUTPUT_DEBUG_LABEL (file, "L", CODE_LABEL_NUMBER (insn));
1994 break;
1995
1996 case NOTE_INSN_VAR_LOCATION:
1997 (*debug_hooks->var_location) (insn);
1998 break;
1999
2000 default:
2001 gcc_unreachable ();
2002 break;
2003 }
2004 break;
2005
2006 case BARRIER:
2007 #if defined (DWARF2_UNWIND_INFO)
2008 if (dwarf2out_do_frame ())
2009 dwarf2out_frame_debug (insn, false);
2010 #endif
2011 break;
2012
2013 case CODE_LABEL:
2014 /* The target port might emit labels in the output function for
2015 some insn, e.g. sh.c output_branchy_insn. */
2016 if (CODE_LABEL_NUMBER (insn) <= max_labelno)
2017 {
2018 int align = LABEL_TO_ALIGNMENT (insn);
2019 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2020 int max_skip = LABEL_TO_MAX_SKIP (insn);
2021 #endif
2022
2023 if (align && NEXT_INSN (insn))
2024 {
2025 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2026 ASM_OUTPUT_MAX_SKIP_ALIGN (file, align, max_skip);
2027 #else
2028 #ifdef ASM_OUTPUT_ALIGN_WITH_NOP
2029 ASM_OUTPUT_ALIGN_WITH_NOP (file, align);
2030 #else
2031 ASM_OUTPUT_ALIGN (file, align);
2032 #endif
2033 #endif
2034 }
2035 }
2036 #ifdef HAVE_cc0
2037 CC_STATUS_INIT;
2038 #endif
2039
2040 if (LABEL_NAME (insn))
2041 (*debug_hooks->label) (insn);
2042
2043 app_disable ();
2044
2045 next = next_nonnote_insn (insn);
2046 /* If this label is followed by a jump-table, make sure we put
2047 the label in the read-only section. Also possibly write the
2048 label and jump table together. */
2049 if (next != 0 && JUMP_TABLE_DATA_P (next))
2050 {
2051 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2052 /* In this case, the case vector is being moved by the
2053 target, so don't output the label at all. Leave that
2054 to the back end macros. */
2055 #else
2056 if (! JUMP_TABLES_IN_TEXT_SECTION)
2057 {
2058 int log_align;
2059
2060 switch_to_section (targetm.asm_out.function_rodata_section
2061 (current_function_decl));
2062
2063 #ifdef ADDR_VEC_ALIGN
2064 log_align = ADDR_VEC_ALIGN (next);
2065 #else
2066 log_align = exact_log2 (BIGGEST_ALIGNMENT / BITS_PER_UNIT);
2067 #endif
2068 ASM_OUTPUT_ALIGN (file, log_align);
2069 }
2070 else
2071 switch_to_section (current_function_section ());
2072
2073 #ifdef ASM_OUTPUT_CASE_LABEL
2074 ASM_OUTPUT_CASE_LABEL (file, "L", CODE_LABEL_NUMBER (insn),
2075 next);
2076 #else
2077 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn));
2078 #endif
2079 #endif
2080 break;
2081 }
2082 if (LABEL_ALT_ENTRY_P (insn))
2083 output_alternate_entry_point (file, insn);
2084 else
2085 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn));
2086 break;
2087
2088 default:
2089 {
2090 rtx body = PATTERN (insn);
2091 int insn_code_number;
2092 const char *templ;
2093 bool is_stmt;
2094
2095 #ifdef HAVE_conditional_execution
2096 /* Reset this early so it is correct for ASM statements. */
2097 current_insn_predicate = NULL_RTX;
2098 #endif
2099 /* An INSN, JUMP_INSN or CALL_INSN.
2100 First check for special kinds that recog doesn't recognize. */
2101
2102 if (GET_CODE (body) == USE /* These are just declarations. */
2103 || GET_CODE (body) == CLOBBER)
2104 break;
2105
2106 #ifdef HAVE_cc0
2107 {
2108 /* If there is a REG_CC_SETTER note on this insn, it means that
2109 the setting of the condition code was done in the delay slot
2110 of the insn that branched here. So recover the cc status
2111 from the insn that set it. */
2112
2113 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2114 if (note)
2115 {
2116 NOTICE_UPDATE_CC (PATTERN (XEXP (note, 0)), XEXP (note, 0));
2117 cc_prev_status = cc_status;
2118 }
2119 }
2120 #endif
2121
2122 /* Detect insns that are really jump-tables
2123 and output them as such. */
2124
2125 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
2126 {
2127 #if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC))
2128 int vlen, idx;
2129 #endif
2130
2131 if (! JUMP_TABLES_IN_TEXT_SECTION)
2132 switch_to_section (targetm.asm_out.function_rodata_section
2133 (current_function_decl));
2134 else
2135 switch_to_section (current_function_section ());
2136
2137 app_disable ();
2138
2139 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2140 if (GET_CODE (body) == ADDR_VEC)
2141 {
2142 #ifdef ASM_OUTPUT_ADDR_VEC
2143 ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn), body);
2144 #else
2145 gcc_unreachable ();
2146 #endif
2147 }
2148 else
2149 {
2150 #ifdef ASM_OUTPUT_ADDR_DIFF_VEC
2151 ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn), body);
2152 #else
2153 gcc_unreachable ();
2154 #endif
2155 }
2156 #else
2157 vlen = XVECLEN (body, GET_CODE (body) == ADDR_DIFF_VEC);
2158 for (idx = 0; idx < vlen; idx++)
2159 {
2160 if (GET_CODE (body) == ADDR_VEC)
2161 {
2162 #ifdef ASM_OUTPUT_ADDR_VEC_ELT
2163 ASM_OUTPUT_ADDR_VEC_ELT
2164 (file, CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 0, idx), 0)));
2165 #else
2166 gcc_unreachable ();
2167 #endif
2168 }
2169 else
2170 {
2171 #ifdef ASM_OUTPUT_ADDR_DIFF_ELT
2172 ASM_OUTPUT_ADDR_DIFF_ELT
2173 (file,
2174 body,
2175 CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 1, idx), 0)),
2176 CODE_LABEL_NUMBER (XEXP (XEXP (body, 0), 0)));
2177 #else
2178 gcc_unreachable ();
2179 #endif
2180 }
2181 }
2182 #ifdef ASM_OUTPUT_CASE_END
2183 ASM_OUTPUT_CASE_END (file,
2184 CODE_LABEL_NUMBER (PREV_INSN (insn)),
2185 insn);
2186 #endif
2187 #endif
2188
2189 switch_to_section (current_function_section ());
2190
2191 break;
2192 }
2193 /* Output this line note if it is the first or the last line
2194 note in a row. */
2195 if (notice_source_line (insn, &is_stmt))
2196 {
2197 (*debug_hooks->source_line) (last_linenum,
2198 last_filename,
2199 last_discriminator,
2200 is_stmt);
2201 }
2202
2203 if (GET_CODE (body) == ASM_INPUT)
2204 {
2205 const char *string = XSTR (body, 0);
2206
2207 /* There's no telling what that did to the condition codes. */
2208 CC_STATUS_INIT;
2209
2210 if (string[0])
2211 {
2212 expanded_location loc;
2213
2214 app_enable ();
2215 loc = expand_location (ASM_INPUT_SOURCE_LOCATION (body));
2216 if (*loc.file && loc.line)
2217 fprintf (asm_out_file, "%s %i \"%s\" 1\n",
2218 ASM_COMMENT_START, loc.line, loc.file);
2219 fprintf (asm_out_file, "\t%s\n", string);
2220 #if HAVE_AS_LINE_ZERO
2221 if (*loc.file && loc.line)
2222 fprintf (asm_out_file, "%s 0 \"\" 2\n", ASM_COMMENT_START);
2223 #endif
2224 }
2225 break;
2226 }
2227
2228 /* Detect `asm' construct with operands. */
2229 if (asm_noperands (body) >= 0)
2230 {
2231 unsigned int noperands = asm_noperands (body);
2232 rtx *ops = XALLOCAVEC (rtx, noperands);
2233 const char *string;
2234 location_t loc;
2235 expanded_location expanded;
2236
2237 /* There's no telling what that did to the condition codes. */
2238 CC_STATUS_INIT;
2239
2240 /* Get out the operand values. */
2241 string = decode_asm_operands (body, ops, NULL, NULL, NULL, &loc);
2242 /* Inhibit dying on what would otherwise be compiler bugs. */
2243 insn_noperands = noperands;
2244 this_is_asm_operands = insn;
2245 expanded = expand_location (loc);
2246
2247 #ifdef FINAL_PRESCAN_INSN
2248 FINAL_PRESCAN_INSN (insn, ops, insn_noperands);
2249 #endif
2250
2251 /* Output the insn using them. */
2252 if (string[0])
2253 {
2254 app_enable ();
2255 if (expanded.file && expanded.line)
2256 fprintf (asm_out_file, "%s %i \"%s\" 1\n",
2257 ASM_COMMENT_START, expanded.line, expanded.file);
2258 output_asm_insn (string, ops);
2259 #if HAVE_AS_LINE_ZERO
2260 if (expanded.file && expanded.line)
2261 fprintf (asm_out_file, "%s 0 \"\" 2\n", ASM_COMMENT_START);
2262 #endif
2263 }
2264
2265 if (targetm.asm_out.final_postscan_insn)
2266 targetm.asm_out.final_postscan_insn (file, insn, ops,
2267 insn_noperands);
2268
2269 this_is_asm_operands = 0;
2270 break;
2271 }
2272
2273 app_disable ();
2274
2275 if (GET_CODE (body) == SEQUENCE)
2276 {
2277 /* A delayed-branch sequence */
2278 int i;
2279
2280 final_sequence = body;
2281
2282 /* Record the delay slots' frame information before the branch.
2283 This is needed for delayed calls: see execute_cfa_program(). */
2284 #if defined (DWARF2_UNWIND_INFO)
2285 if (dwarf2out_do_frame ())
2286 for (i = 1; i < XVECLEN (body, 0); i++)
2287 dwarf2out_frame_debug (XVECEXP (body, 0, i), false);
2288 #endif
2289
2290 /* The first insn in this SEQUENCE might be a JUMP_INSN that will
2291 force the restoration of a comparison that was previously
2292 thought unnecessary. If that happens, cancel this sequence
2293 and cause that insn to be restored. */
2294
2295 next = final_scan_insn (XVECEXP (body, 0, 0), file, 0, 1, seen);
2296 if (next != XVECEXP (body, 0, 1))
2297 {
2298 final_sequence = 0;
2299 return next;
2300 }
2301
2302 for (i = 1; i < XVECLEN (body, 0); i++)
2303 {
2304 rtx insn = XVECEXP (body, 0, i);
2305 rtx next = NEXT_INSN (insn);
2306 /* We loop in case any instruction in a delay slot gets
2307 split. */
2308 do
2309 insn = final_scan_insn (insn, file, 0, 1, seen);
2310 while (insn != next);
2311 }
2312 #ifdef DBR_OUTPUT_SEQEND
2313 DBR_OUTPUT_SEQEND (file);
2314 #endif
2315 final_sequence = 0;
2316
2317 /* If the insn requiring the delay slot was a CALL_INSN, the
2318 insns in the delay slot are actually executed before the
2319 called function. Hence we don't preserve any CC-setting
2320 actions in these insns and the CC must be marked as being
2321 clobbered by the function. */
2322 if (CALL_P (XVECEXP (body, 0, 0)))
2323 {
2324 CC_STATUS_INIT;
2325 }
2326 break;
2327 }
2328
2329 /* We have a real machine instruction as rtl. */
2330
2331 body = PATTERN (insn);
2332
2333 #ifdef HAVE_cc0
2334 set = single_set (insn);
2335
2336 /* Check for redundant test and compare instructions
2337 (when the condition codes are already set up as desired).
2338 This is done only when optimizing; if not optimizing,
2339 it should be possible for the user to alter a variable
2340 with the debugger in between statements
2341 and the next statement should reexamine the variable
2342 to compute the condition codes. */
2343
2344 if (optimize)
2345 {
2346 if (set
2347 && GET_CODE (SET_DEST (set)) == CC0
2348 && insn != last_ignored_compare)
2349 {
2350 rtx src1, src2;
2351 if (GET_CODE (SET_SRC (set)) == SUBREG)
2352 SET_SRC (set) = alter_subreg (&SET_SRC (set));
2353
2354 src1 = SET_SRC (set);
2355 src2 = NULL_RTX;
2356 if (GET_CODE (SET_SRC (set)) == COMPARE)
2357 {
2358 if (GET_CODE (XEXP (SET_SRC (set), 0)) == SUBREG)
2359 XEXP (SET_SRC (set), 0)
2360 = alter_subreg (&XEXP (SET_SRC (set), 0));
2361 if (GET_CODE (XEXP (SET_SRC (set), 1)) == SUBREG)
2362 XEXP (SET_SRC (set), 1)
2363 = alter_subreg (&XEXP (SET_SRC (set), 1));
2364 if (XEXP (SET_SRC (set), 1)
2365 == CONST0_RTX (GET_MODE (XEXP (SET_SRC (set), 0))))
2366 src2 = XEXP (SET_SRC (set), 0);
2367 }
2368 if ((cc_status.value1 != 0
2369 && rtx_equal_p (src1, cc_status.value1))
2370 || (cc_status.value2 != 0
2371 && rtx_equal_p (src1, cc_status.value2))
2372 || (src2 != 0 && cc_status.value1 != 0
2373 && rtx_equal_p (src2, cc_status.value1))
2374 || (src2 != 0 && cc_status.value2 != 0
2375 && rtx_equal_p (src2, cc_status.value2)))
2376 {
2377 /* Don't delete insn if it has an addressing side-effect. */
2378 if (! FIND_REG_INC_NOTE (insn, NULL_RTX)
2379 /* or if anything in it is volatile. */
2380 && ! volatile_refs_p (PATTERN (insn)))
2381 {
2382 /* We don't really delete the insn; just ignore it. */
2383 last_ignored_compare = insn;
2384 break;
2385 }
2386 }
2387 }
2388 }
2389
2390 /* If this is a conditional branch, maybe modify it
2391 if the cc's are in a nonstandard state
2392 so that it accomplishes the same thing that it would
2393 do straightforwardly if the cc's were set up normally. */
2394
2395 if (cc_status.flags != 0
2396 && JUMP_P (insn)
2397 && GET_CODE (body) == SET
2398 && SET_DEST (body) == pc_rtx
2399 && GET_CODE (SET_SRC (body)) == IF_THEN_ELSE
2400 && COMPARISON_P (XEXP (SET_SRC (body), 0))
2401 && XEXP (XEXP (SET_SRC (body), 0), 0) == cc0_rtx)
2402 {
2403 /* This function may alter the contents of its argument
2404 and clear some of the cc_status.flags bits.
2405 It may also return 1 meaning condition now always true
2406 or -1 meaning condition now always false
2407 or 2 meaning condition nontrivial but altered. */
2408 int result = alter_cond (XEXP (SET_SRC (body), 0));
2409 /* If condition now has fixed value, replace the IF_THEN_ELSE
2410 with its then-operand or its else-operand. */
2411 if (result == 1)
2412 SET_SRC (body) = XEXP (SET_SRC (body), 1);
2413 if (result == -1)
2414 SET_SRC (body) = XEXP (SET_SRC (body), 2);
2415
2416 /* The jump is now either unconditional or a no-op.
2417 If it has become a no-op, don't try to output it.
2418 (It would not be recognized.) */
2419 if (SET_SRC (body) == pc_rtx)
2420 {
2421 delete_insn (insn);
2422 break;
2423 }
2424 else if (GET_CODE (SET_SRC (body)) == RETURN)
2425 /* Replace (set (pc) (return)) with (return). */
2426 PATTERN (insn) = body = SET_SRC (body);
2427
2428 /* Rerecognize the instruction if it has changed. */
2429 if (result != 0)
2430 INSN_CODE (insn) = -1;
2431 }
2432
2433 /* If this is a conditional trap, maybe modify it if the cc's
2434 are in a nonstandard state so that it accomplishes the same
2435 thing that it would do straightforwardly if the cc's were
2436 set up normally. */
2437 if (cc_status.flags != 0
2438 && NONJUMP_INSN_P (insn)
2439 && GET_CODE (body) == TRAP_IF
2440 && COMPARISON_P (TRAP_CONDITION (body))
2441 && XEXP (TRAP_CONDITION (body), 0) == cc0_rtx)
2442 {
2443 /* This function may alter the contents of its argument
2444 and clear some of the cc_status.flags bits.
2445 It may also return 1 meaning condition now always true
2446 or -1 meaning condition now always false
2447 or 2 meaning condition nontrivial but altered. */
2448 int result = alter_cond (TRAP_CONDITION (body));
2449
2450 /* If TRAP_CONDITION has become always false, delete the
2451 instruction. */
2452 if (result == -1)
2453 {
2454 delete_insn (insn);
2455 break;
2456 }
2457
2458 /* If TRAP_CONDITION has become always true, replace
2459 TRAP_CONDITION with const_true_rtx. */
2460 if (result == 1)
2461 TRAP_CONDITION (body) = const_true_rtx;
2462
2463 /* Rerecognize the instruction if it has changed. */
2464 if (result != 0)
2465 INSN_CODE (insn) = -1;
2466 }
2467
2468 /* Make same adjustments to instructions that examine the
2469 condition codes without jumping and instructions that
2470 handle conditional moves (if this machine has either one). */
2471
2472 if (cc_status.flags != 0
2473 && set != 0)
2474 {
2475 rtx cond_rtx, then_rtx, else_rtx;
2476
2477 if (!JUMP_P (insn)
2478 && GET_CODE (SET_SRC (set)) == IF_THEN_ELSE)
2479 {
2480 cond_rtx = XEXP (SET_SRC (set), 0);
2481 then_rtx = XEXP (SET_SRC (set), 1);
2482 else_rtx = XEXP (SET_SRC (set), 2);
2483 }
2484 else
2485 {
2486 cond_rtx = SET_SRC (set);
2487 then_rtx = const_true_rtx;
2488 else_rtx = const0_rtx;
2489 }
2490
2491 switch (GET_CODE (cond_rtx))
2492 {
2493 case GTU:
2494 case GT:
2495 case LTU:
2496 case LT:
2497 case GEU:
2498 case GE:
2499 case LEU:
2500 case LE:
2501 case EQ:
2502 case NE:
2503 {
2504 int result;
2505 if (XEXP (cond_rtx, 0) != cc0_rtx)
2506 break;
2507 result = alter_cond (cond_rtx);
2508 if (result == 1)
2509 validate_change (insn, &SET_SRC (set), then_rtx, 0);
2510 else if (result == -1)
2511 validate_change (insn, &SET_SRC (set), else_rtx, 0);
2512 else if (result == 2)
2513 INSN_CODE (insn) = -1;
2514 if (SET_DEST (set) == SET_SRC (set))
2515 delete_insn (insn);
2516 }
2517 break;
2518
2519 default:
2520 break;
2521 }
2522 }
2523
2524 #endif
2525
2526 #ifdef HAVE_peephole
2527 /* Do machine-specific peephole optimizations if desired. */
2528
2529 if (optimize && !flag_no_peephole && !nopeepholes)
2530 {
2531 rtx next = peephole (insn);
2532 /* When peepholing, if there were notes within the peephole,
2533 emit them before the peephole. */
2534 if (next != 0 && next != NEXT_INSN (insn))
2535 {
2536 rtx note, prev = PREV_INSN (insn);
2537
2538 for (note = NEXT_INSN (insn); note != next;
2539 note = NEXT_INSN (note))
2540 final_scan_insn (note, file, optimize, nopeepholes, seen);
2541
2542 /* Put the notes in the proper position for a later
2543 rescan. For example, the SH target can do this
2544 when generating a far jump in a delayed branch
2545 sequence. */
2546 note = NEXT_INSN (insn);
2547 PREV_INSN (note) = prev;
2548 NEXT_INSN (prev) = note;
2549 NEXT_INSN (PREV_INSN (next)) = insn;
2550 PREV_INSN (insn) = PREV_INSN (next);
2551 NEXT_INSN (insn) = next;
2552 PREV_INSN (next) = insn;
2553 }
2554
2555 /* PEEPHOLE might have changed this. */
2556 body = PATTERN (insn);
2557 }
2558 #endif
2559
2560 /* Try to recognize the instruction.
2561 If successful, verify that the operands satisfy the
2562 constraints for the instruction. Crash if they don't,
2563 since `reload' should have changed them so that they do. */
2564
2565 insn_code_number = recog_memoized (insn);
2566 cleanup_subreg_operands (insn);
2567
2568 /* Dump the insn in the assembly for debugging. */
2569 if (flag_dump_rtl_in_asm)
2570 {
2571 print_rtx_head = ASM_COMMENT_START;
2572 print_rtl_single (asm_out_file, insn);
2573 print_rtx_head = "";
2574 }
2575
2576 if (! constrain_operands_cached (1))
2577 fatal_insn_not_found (insn);
2578
2579 /* Some target machines need to prescan each insn before
2580 it is output. */
2581
2582 #ifdef FINAL_PRESCAN_INSN
2583 FINAL_PRESCAN_INSN (insn, recog_data.operand, recog_data.n_operands);
2584 #endif
2585
2586 #ifdef HAVE_conditional_execution
2587 if (GET_CODE (PATTERN (insn)) == COND_EXEC)
2588 current_insn_predicate = COND_EXEC_TEST (PATTERN (insn));
2589 #endif
2590
2591 #ifdef HAVE_cc0
2592 cc_prev_status = cc_status;
2593
2594 /* Update `cc_status' for this instruction.
2595 The instruction's output routine may change it further.
2596 If the output routine for a jump insn needs to depend
2597 on the cc status, it should look at cc_prev_status. */
2598
2599 NOTICE_UPDATE_CC (body, insn);
2600 #endif
2601
2602 current_output_insn = debug_insn = insn;
2603
2604 #if defined (DWARF2_UNWIND_INFO)
2605 if (CALL_P (insn) && dwarf2out_do_frame ())
2606 dwarf2out_frame_debug (insn, false);
2607 #endif
2608
2609 /* Find the proper template for this insn. */
2610 templ = get_insn_template (insn_code_number, insn);
2611
2612 /* If the C code returns 0, it means that it is a jump insn
2613 which follows a deleted test insn, and that test insn
2614 needs to be reinserted. */
2615 if (templ == 0)
2616 {
2617 rtx prev;
2618
2619 gcc_assert (prev_nonnote_insn (insn) == last_ignored_compare);
2620
2621 /* We have already processed the notes between the setter and
2622 the user. Make sure we don't process them again, this is
2623 particularly important if one of the notes is a block
2624 scope note or an EH note. */
2625 for (prev = insn;
2626 prev != last_ignored_compare;
2627 prev = PREV_INSN (prev))
2628 {
2629 if (NOTE_P (prev))
2630 delete_insn (prev); /* Use delete_note. */
2631 }
2632
2633 return prev;
2634 }
2635
2636 /* If the template is the string "#", it means that this insn must
2637 be split. */
2638 if (templ[0] == '#' && templ[1] == '\0')
2639 {
2640 rtx new_rtx = try_split (body, insn, 0);
2641
2642 /* If we didn't split the insn, go away. */
2643 if (new_rtx == insn && PATTERN (new_rtx) == body)
2644 fatal_insn ("could not split insn", insn);
2645
2646 #ifdef HAVE_ATTR_length
2647 /* This instruction should have been split in shorten_branches,
2648 to ensure that we would have valid length info for the
2649 splitees. */
2650 gcc_unreachable ();
2651 #endif
2652
2653 return new_rtx;
2654 }
2655
2656 #ifdef TARGET_UNWIND_INFO
2657 /* ??? This will put the directives in the wrong place if
2658 get_insn_template outputs assembly directly. However calling it
2659 before get_insn_template breaks if the insns is split. */
2660 targetm.asm_out.unwind_emit (asm_out_file, insn);
2661 #endif
2662
2663 if (CALL_P (insn))
2664 {
2665 rtx x = call_from_call_insn (insn);
2666 x = XEXP (x, 0);
2667 if (x && MEM_P (x) && GET_CODE (XEXP (x, 0)) == SYMBOL_REF)
2668 {
2669 tree t;
2670 x = XEXP (x, 0);
2671 t = SYMBOL_REF_DECL (x);
2672 if (t)
2673 assemble_external (t);
2674 }
2675 }
2676
2677 /* Output assembler code from the template. */
2678 output_asm_insn (templ, recog_data.operand);
2679
2680 /* Some target machines need to postscan each insn after
2681 it is output. */
2682 if (targetm.asm_out.final_postscan_insn)
2683 targetm.asm_out.final_postscan_insn (file, insn, recog_data.operand,
2684 recog_data.n_operands);
2685
2686 /* If necessary, report the effect that the instruction has on
2687 the unwind info. We've already done this for delay slots
2688 and call instructions. */
2689 #if defined (DWARF2_UNWIND_INFO)
2690 if (final_sequence == 0
2691 #if !defined (HAVE_prologue)
2692 && !ACCUMULATE_OUTGOING_ARGS
2693 #endif
2694 && dwarf2out_do_frame ())
2695 dwarf2out_frame_debug (insn, true);
2696 #endif
2697
2698 current_output_insn = debug_insn = 0;
2699 }
2700 }
2701 return NEXT_INSN (insn);
2702 }
2703 \f
2704 /* Return whether a source line note needs to be emitted before INSN.
2705 Sets IS_STMT to TRUE if the line should be marked as a possible
2706 breakpoint location. */
2707
2708 static bool
2709 notice_source_line (rtx insn, bool *is_stmt)
2710 {
2711 const char *filename;
2712 int linenum;
2713
2714 if (override_filename)
2715 {
2716 filename = override_filename;
2717 linenum = override_linenum;
2718 }
2719 else
2720 {
2721 filename = insn_file (insn);
2722 linenum = insn_line (insn);
2723 }
2724
2725 if (filename == NULL)
2726 return false;
2727
2728 if (force_source_line
2729 || filename != last_filename
2730 || last_linenum != linenum)
2731 {
2732 force_source_line = false;
2733 last_filename = filename;
2734 last_linenum = linenum;
2735 last_discriminator = discriminator;
2736 *is_stmt = true;
2737 high_block_linenum = MAX (last_linenum, high_block_linenum);
2738 high_function_linenum = MAX (last_linenum, high_function_linenum);
2739 return true;
2740 }
2741
2742 if (SUPPORTS_DISCRIMINATOR && last_discriminator != discriminator)
2743 {
2744 /* If the discriminator changed, but the line number did not,
2745 output the line table entry with is_stmt false so the
2746 debugger does not treat this as a breakpoint location. */
2747 last_discriminator = discriminator;
2748 *is_stmt = false;
2749 return true;
2750 }
2751
2752 return false;
2753 }
2754 \f
2755 /* For each operand in INSN, simplify (subreg (reg)) so that it refers
2756 directly to the desired hard register. */
2757
2758 void
2759 cleanup_subreg_operands (rtx insn)
2760 {
2761 int i;
2762 bool changed = false;
2763 extract_insn_cached (insn);
2764 for (i = 0; i < recog_data.n_operands; i++)
2765 {
2766 /* The following test cannot use recog_data.operand when testing
2767 for a SUBREG: the underlying object might have been changed
2768 already if we are inside a match_operator expression that
2769 matches the else clause. Instead we test the underlying
2770 expression directly. */
2771 if (GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
2772 {
2773 recog_data.operand[i] = alter_subreg (recog_data.operand_loc[i]);
2774 changed = true;
2775 }
2776 else if (GET_CODE (recog_data.operand[i]) == PLUS
2777 || GET_CODE (recog_data.operand[i]) == MULT
2778 || MEM_P (recog_data.operand[i]))
2779 recog_data.operand[i] = walk_alter_subreg (recog_data.operand_loc[i], &changed);
2780 }
2781
2782 for (i = 0; i < recog_data.n_dups; i++)
2783 {
2784 if (GET_CODE (*recog_data.dup_loc[i]) == SUBREG)
2785 {
2786 *recog_data.dup_loc[i] = alter_subreg (recog_data.dup_loc[i]);
2787 changed = true;
2788 }
2789 else if (GET_CODE (*recog_data.dup_loc[i]) == PLUS
2790 || GET_CODE (*recog_data.dup_loc[i]) == MULT
2791 || MEM_P (*recog_data.dup_loc[i]))
2792 *recog_data.dup_loc[i] = walk_alter_subreg (recog_data.dup_loc[i], &changed);
2793 }
2794 if (changed)
2795 df_insn_rescan (insn);
2796 }
2797
2798 /* If X is a SUBREG, replace it with a REG or a MEM,
2799 based on the thing it is a subreg of. */
2800
2801 rtx
2802 alter_subreg (rtx *xp)
2803 {
2804 rtx x = *xp;
2805 rtx y = SUBREG_REG (x);
2806
2807 /* simplify_subreg does not remove subreg from volatile references.
2808 We are required to. */
2809 if (MEM_P (y))
2810 {
2811 int offset = SUBREG_BYTE (x);
2812
2813 /* For paradoxical subregs on big-endian machines, SUBREG_BYTE
2814 contains 0 instead of the proper offset. See simplify_subreg. */
2815 if (offset == 0
2816 && GET_MODE_SIZE (GET_MODE (y)) < GET_MODE_SIZE (GET_MODE (x)))
2817 {
2818 int difference = GET_MODE_SIZE (GET_MODE (y))
2819 - GET_MODE_SIZE (GET_MODE (x));
2820 if (WORDS_BIG_ENDIAN)
2821 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
2822 if (BYTES_BIG_ENDIAN)
2823 offset += difference % UNITS_PER_WORD;
2824 }
2825
2826 *xp = adjust_address (y, GET_MODE (x), offset);
2827 }
2828 else
2829 {
2830 rtx new_rtx = simplify_subreg (GET_MODE (x), y, GET_MODE (y),
2831 SUBREG_BYTE (x));
2832
2833 if (new_rtx != 0)
2834 *xp = new_rtx;
2835 else if (REG_P (y))
2836 {
2837 /* Simplify_subreg can't handle some REG cases, but we have to. */
2838 unsigned int regno;
2839 HOST_WIDE_INT offset;
2840
2841 regno = subreg_regno (x);
2842 if (subreg_lowpart_p (x))
2843 offset = byte_lowpart_offset (GET_MODE (x), GET_MODE (y));
2844 else
2845 offset = SUBREG_BYTE (x);
2846 *xp = gen_rtx_REG_offset (y, GET_MODE (x), regno, offset);
2847 }
2848 }
2849
2850 return *xp;
2851 }
2852
2853 /* Do alter_subreg on all the SUBREGs contained in X. */
2854
2855 static rtx
2856 walk_alter_subreg (rtx *xp, bool *changed)
2857 {
2858 rtx x = *xp;
2859 switch (GET_CODE (x))
2860 {
2861 case PLUS:
2862 case MULT:
2863 case AND:
2864 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed);
2865 XEXP (x, 1) = walk_alter_subreg (&XEXP (x, 1), changed);
2866 break;
2867
2868 case MEM:
2869 case ZERO_EXTEND:
2870 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed);
2871 break;
2872
2873 case SUBREG:
2874 *changed = true;
2875 return alter_subreg (xp);
2876
2877 default:
2878 break;
2879 }
2880
2881 return *xp;
2882 }
2883 \f
2884 #ifdef HAVE_cc0
2885
2886 /* Given BODY, the body of a jump instruction, alter the jump condition
2887 as required by the bits that are set in cc_status.flags.
2888 Not all of the bits there can be handled at this level in all cases.
2889
2890 The value is normally 0.
2891 1 means that the condition has become always true.
2892 -1 means that the condition has become always false.
2893 2 means that COND has been altered. */
2894
2895 static int
2896 alter_cond (rtx cond)
2897 {
2898 int value = 0;
2899
2900 if (cc_status.flags & CC_REVERSED)
2901 {
2902 value = 2;
2903 PUT_CODE (cond, swap_condition (GET_CODE (cond)));
2904 }
2905
2906 if (cc_status.flags & CC_INVERTED)
2907 {
2908 value = 2;
2909 PUT_CODE (cond, reverse_condition (GET_CODE (cond)));
2910 }
2911
2912 if (cc_status.flags & CC_NOT_POSITIVE)
2913 switch (GET_CODE (cond))
2914 {
2915 case LE:
2916 case LEU:
2917 case GEU:
2918 /* Jump becomes unconditional. */
2919 return 1;
2920
2921 case GT:
2922 case GTU:
2923 case LTU:
2924 /* Jump becomes no-op. */
2925 return -1;
2926
2927 case GE:
2928 PUT_CODE (cond, EQ);
2929 value = 2;
2930 break;
2931
2932 case LT:
2933 PUT_CODE (cond, NE);
2934 value = 2;
2935 break;
2936
2937 default:
2938 break;
2939 }
2940
2941 if (cc_status.flags & CC_NOT_NEGATIVE)
2942 switch (GET_CODE (cond))
2943 {
2944 case GE:
2945 case GEU:
2946 /* Jump becomes unconditional. */
2947 return 1;
2948
2949 case LT:
2950 case LTU:
2951 /* Jump becomes no-op. */
2952 return -1;
2953
2954 case LE:
2955 case LEU:
2956 PUT_CODE (cond, EQ);
2957 value = 2;
2958 break;
2959
2960 case GT:
2961 case GTU:
2962 PUT_CODE (cond, NE);
2963 value = 2;
2964 break;
2965
2966 default:
2967 break;
2968 }
2969
2970 if (cc_status.flags & CC_NO_OVERFLOW)
2971 switch (GET_CODE (cond))
2972 {
2973 case GEU:
2974 /* Jump becomes unconditional. */
2975 return 1;
2976
2977 case LEU:
2978 PUT_CODE (cond, EQ);
2979 value = 2;
2980 break;
2981
2982 case GTU:
2983 PUT_CODE (cond, NE);
2984 value = 2;
2985 break;
2986
2987 case LTU:
2988 /* Jump becomes no-op. */
2989 return -1;
2990
2991 default:
2992 break;
2993 }
2994
2995 if (cc_status.flags & (CC_Z_IN_NOT_N | CC_Z_IN_N))
2996 switch (GET_CODE (cond))
2997 {
2998 default:
2999 gcc_unreachable ();
3000
3001 case NE:
3002 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? GE : LT);
3003 value = 2;
3004 break;
3005
3006 case EQ:
3007 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? LT : GE);
3008 value = 2;
3009 break;
3010 }
3011
3012 if (cc_status.flags & CC_NOT_SIGNED)
3013 /* The flags are valid if signed condition operators are converted
3014 to unsigned. */
3015 switch (GET_CODE (cond))
3016 {
3017 case LE:
3018 PUT_CODE (cond, LEU);
3019 value = 2;
3020 break;
3021
3022 case LT:
3023 PUT_CODE (cond, LTU);
3024 value = 2;
3025 break;
3026
3027 case GT:
3028 PUT_CODE (cond, GTU);
3029 value = 2;
3030 break;
3031
3032 case GE:
3033 PUT_CODE (cond, GEU);
3034 value = 2;
3035 break;
3036
3037 default:
3038 break;
3039 }
3040
3041 return value;
3042 }
3043 #endif
3044 \f
3045 /* Report inconsistency between the assembler template and the operands.
3046 In an `asm', it's the user's fault; otherwise, the compiler's fault. */
3047
3048 void
3049 output_operand_lossage (const char *cmsgid, ...)
3050 {
3051 char *fmt_string;
3052 char *new_message;
3053 const char *pfx_str;
3054 va_list ap;
3055
3056 va_start (ap, cmsgid);
3057
3058 pfx_str = this_is_asm_operands ? _("invalid 'asm': ") : "output_operand: ";
3059 asprintf (&fmt_string, "%s%s", pfx_str, _(cmsgid));
3060 vasprintf (&new_message, fmt_string, ap);
3061
3062 if (this_is_asm_operands)
3063 error_for_asm (this_is_asm_operands, "%s", new_message);
3064 else
3065 internal_error ("%s", new_message);
3066
3067 free (fmt_string);
3068 free (new_message);
3069 va_end (ap);
3070 }
3071 \f
3072 /* Output of assembler code from a template, and its subroutines. */
3073
3074 /* Annotate the assembly with a comment describing the pattern and
3075 alternative used. */
3076
3077 static void
3078 output_asm_name (void)
3079 {
3080 if (debug_insn)
3081 {
3082 int num = INSN_CODE (debug_insn);
3083 fprintf (asm_out_file, "\t%s %d\t%s",
3084 ASM_COMMENT_START, INSN_UID (debug_insn),
3085 insn_data[num].name);
3086 if (insn_data[num].n_alternatives > 1)
3087 fprintf (asm_out_file, "/%d", which_alternative + 1);
3088 #ifdef HAVE_ATTR_length
3089 fprintf (asm_out_file, "\t[length = %d]",
3090 get_attr_length (debug_insn));
3091 #endif
3092 /* Clear this so only the first assembler insn
3093 of any rtl insn will get the special comment for -dp. */
3094 debug_insn = 0;
3095 }
3096 }
3097
3098 /* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it
3099 or its address, return that expr . Set *PADDRESSP to 1 if the expr
3100 corresponds to the address of the object and 0 if to the object. */
3101
3102 static tree
3103 get_mem_expr_from_op (rtx op, int *paddressp)
3104 {
3105 tree expr;
3106 int inner_addressp;
3107
3108 *paddressp = 0;
3109
3110 if (REG_P (op))
3111 return REG_EXPR (op);
3112 else if (!MEM_P (op))
3113 return 0;
3114
3115 if (MEM_EXPR (op) != 0)
3116 return MEM_EXPR (op);
3117
3118 /* Otherwise we have an address, so indicate it and look at the address. */
3119 *paddressp = 1;
3120 op = XEXP (op, 0);
3121
3122 /* First check if we have a decl for the address, then look at the right side
3123 if it is a PLUS. Otherwise, strip off arithmetic and keep looking.
3124 But don't allow the address to itself be indirect. */
3125 if ((expr = get_mem_expr_from_op (op, &inner_addressp)) && ! inner_addressp)
3126 return expr;
3127 else if (GET_CODE (op) == PLUS
3128 && (expr = get_mem_expr_from_op (XEXP (op, 1), &inner_addressp)))
3129 return expr;
3130
3131 while (UNARY_P (op)
3132 || GET_RTX_CLASS (GET_CODE (op)) == RTX_BIN_ARITH)
3133 op = XEXP (op, 0);
3134
3135 expr = get_mem_expr_from_op (op, &inner_addressp);
3136 return inner_addressp ? 0 : expr;
3137 }
3138
3139 /* Output operand names for assembler instructions. OPERANDS is the
3140 operand vector, OPORDER is the order to write the operands, and NOPS
3141 is the number of operands to write. */
3142
3143 static void
3144 output_asm_operand_names (rtx *operands, int *oporder, int nops)
3145 {
3146 int wrote = 0;
3147 int i;
3148
3149 for (i = 0; i < nops; i++)
3150 {
3151 int addressp;
3152 rtx op = operands[oporder[i]];
3153 tree expr = get_mem_expr_from_op (op, &addressp);
3154
3155 fprintf (asm_out_file, "%c%s",
3156 wrote ? ',' : '\t', wrote ? "" : ASM_COMMENT_START);
3157 wrote = 1;
3158 if (expr)
3159 {
3160 fprintf (asm_out_file, "%s",
3161 addressp ? "*" : "");
3162 print_mem_expr (asm_out_file, expr);
3163 wrote = 1;
3164 }
3165 else if (REG_P (op) && ORIGINAL_REGNO (op)
3166 && ORIGINAL_REGNO (op) != REGNO (op))
3167 fprintf (asm_out_file, " tmp%i", ORIGINAL_REGNO (op));
3168 }
3169 }
3170
3171 /* Output text from TEMPLATE to the assembler output file,
3172 obeying %-directions to substitute operands taken from
3173 the vector OPERANDS.
3174
3175 %N (for N a digit) means print operand N in usual manner.
3176 %lN means require operand N to be a CODE_LABEL or LABEL_REF
3177 and print the label name with no punctuation.
3178 %cN means require operand N to be a constant
3179 and print the constant expression with no punctuation.
3180 %aN means expect operand N to be a memory address
3181 (not a memory reference!) and print a reference
3182 to that address.
3183 %nN means expect operand N to be a constant
3184 and print a constant expression for minus the value
3185 of the operand, with no other punctuation. */
3186
3187 void
3188 output_asm_insn (const char *templ, rtx *operands)
3189 {
3190 const char *p;
3191 int c;
3192 #ifdef ASSEMBLER_DIALECT
3193 int dialect = 0;
3194 #endif
3195 int oporder[MAX_RECOG_OPERANDS];
3196 char opoutput[MAX_RECOG_OPERANDS];
3197 int ops = 0;
3198
3199 /* An insn may return a null string template
3200 in a case where no assembler code is needed. */
3201 if (*templ == 0)
3202 return;
3203
3204 memset (opoutput, 0, sizeof opoutput);
3205 p = templ;
3206 putc ('\t', asm_out_file);
3207
3208 #ifdef ASM_OUTPUT_OPCODE
3209 ASM_OUTPUT_OPCODE (asm_out_file, p);
3210 #endif
3211
3212 while ((c = *p++))
3213 switch (c)
3214 {
3215 case '\n':
3216 if (flag_verbose_asm)
3217 output_asm_operand_names (operands, oporder, ops);
3218 if (flag_print_asm_name)
3219 output_asm_name ();
3220
3221 ops = 0;
3222 memset (opoutput, 0, sizeof opoutput);
3223
3224 putc (c, asm_out_file);
3225 #ifdef ASM_OUTPUT_OPCODE
3226 while ((c = *p) == '\t')
3227 {
3228 putc (c, asm_out_file);
3229 p++;
3230 }
3231 ASM_OUTPUT_OPCODE (asm_out_file, p);
3232 #endif
3233 break;
3234
3235 #ifdef ASSEMBLER_DIALECT
3236 case '{':
3237 {
3238 int i;
3239
3240 if (dialect)
3241 output_operand_lossage ("nested assembly dialect alternatives");
3242 else
3243 dialect = 1;
3244
3245 /* If we want the first dialect, do nothing. Otherwise, skip
3246 DIALECT_NUMBER of strings ending with '|'. */
3247 for (i = 0; i < dialect_number; i++)
3248 {
3249 while (*p && *p != '}' && *p++ != '|')
3250 ;
3251 if (*p == '}')
3252 break;
3253 if (*p == '|')
3254 p++;
3255 }
3256
3257 if (*p == '\0')
3258 output_operand_lossage ("unterminated assembly dialect alternative");
3259 }
3260 break;
3261
3262 case '|':
3263 if (dialect)
3264 {
3265 /* Skip to close brace. */
3266 do
3267 {
3268 if (*p == '\0')
3269 {
3270 output_operand_lossage ("unterminated assembly dialect alternative");
3271 break;
3272 }
3273 }
3274 while (*p++ != '}');
3275 dialect = 0;
3276 }
3277 else
3278 putc (c, asm_out_file);
3279 break;
3280
3281 case '}':
3282 if (! dialect)
3283 putc (c, asm_out_file);
3284 dialect = 0;
3285 break;
3286 #endif
3287
3288 case '%':
3289 /* %% outputs a single %. */
3290 if (*p == '%')
3291 {
3292 p++;
3293 putc (c, asm_out_file);
3294 }
3295 /* %= outputs a number which is unique to each insn in the entire
3296 compilation. This is useful for making local labels that are
3297 referred to more than once in a given insn. */
3298 else if (*p == '=')
3299 {
3300 p++;
3301 fprintf (asm_out_file, "%d", insn_counter);
3302 }
3303 /* % followed by a letter and some digits
3304 outputs an operand in a special way depending on the letter.
3305 Letters `acln' are implemented directly.
3306 Other letters are passed to `output_operand' so that
3307 the PRINT_OPERAND macro can define them. */
3308 else if (ISALPHA (*p))
3309 {
3310 int letter = *p++;
3311 unsigned long opnum;
3312 char *endptr;
3313
3314 opnum = strtoul (p, &endptr, 10);
3315
3316 if (endptr == p)
3317 output_operand_lossage ("operand number missing "
3318 "after %%-letter");
3319 else if (this_is_asm_operands && opnum >= insn_noperands)
3320 output_operand_lossage ("operand number out of range");
3321 else if (letter == 'l')
3322 output_asm_label (operands[opnum]);
3323 else if (letter == 'a')
3324 output_address (operands[opnum]);
3325 else if (letter == 'c')
3326 {
3327 if (CONSTANT_ADDRESS_P (operands[opnum]))
3328 output_addr_const (asm_out_file, operands[opnum]);
3329 else
3330 output_operand (operands[opnum], 'c');
3331 }
3332 else if (letter == 'n')
3333 {
3334 if (CONST_INT_P (operands[opnum]))
3335 fprintf (asm_out_file, HOST_WIDE_INT_PRINT_DEC,
3336 - INTVAL (operands[opnum]));
3337 else
3338 {
3339 putc ('-', asm_out_file);
3340 output_addr_const (asm_out_file, operands[opnum]);
3341 }
3342 }
3343 else
3344 output_operand (operands[opnum], letter);
3345
3346 if (!opoutput[opnum])
3347 oporder[ops++] = opnum;
3348 opoutput[opnum] = 1;
3349
3350 p = endptr;
3351 c = *p;
3352 }
3353 /* % followed by a digit outputs an operand the default way. */
3354 else if (ISDIGIT (*p))
3355 {
3356 unsigned long opnum;
3357 char *endptr;
3358
3359 opnum = strtoul (p, &endptr, 10);
3360 if (this_is_asm_operands && opnum >= insn_noperands)
3361 output_operand_lossage ("operand number out of range");
3362 else
3363 output_operand (operands[opnum], 0);
3364
3365 if (!opoutput[opnum])
3366 oporder[ops++] = opnum;
3367 opoutput[opnum] = 1;
3368
3369 p = endptr;
3370 c = *p;
3371 }
3372 /* % followed by punctuation: output something for that
3373 punctuation character alone, with no operand.
3374 The PRINT_OPERAND macro decides what is actually done. */
3375 #ifdef PRINT_OPERAND_PUNCT_VALID_P
3376 else if (PRINT_OPERAND_PUNCT_VALID_P ((unsigned char) *p))
3377 output_operand (NULL_RTX, *p++);
3378 #endif
3379 else
3380 output_operand_lossage ("invalid %%-code");
3381 break;
3382
3383 default:
3384 putc (c, asm_out_file);
3385 }
3386
3387 /* Write out the variable names for operands, if we know them. */
3388 if (flag_verbose_asm)
3389 output_asm_operand_names (operands, oporder, ops);
3390 if (flag_print_asm_name)
3391 output_asm_name ();
3392
3393 putc ('\n', asm_out_file);
3394 }
3395 \f
3396 /* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */
3397
3398 void
3399 output_asm_label (rtx x)
3400 {
3401 char buf[256];
3402
3403 if (GET_CODE (x) == LABEL_REF)
3404 x = XEXP (x, 0);
3405 if (LABEL_P (x)
3406 || (NOTE_P (x)
3407 && NOTE_KIND (x) == NOTE_INSN_DELETED_LABEL))
3408 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3409 else
3410 output_operand_lossage ("'%%l' operand isn't a label");
3411
3412 assemble_name (asm_out_file, buf);
3413 }
3414
3415 /* Helper rtx-iteration-function for mark_symbol_refs_as_used and
3416 output_operand. Marks SYMBOL_REFs as referenced through use of
3417 assemble_external. */
3418
3419 static int
3420 mark_symbol_ref_as_used (rtx *xp, void *dummy ATTRIBUTE_UNUSED)
3421 {
3422 rtx x = *xp;
3423
3424 /* If we have a used symbol, we may have to emit assembly
3425 annotations corresponding to whether the symbol is external, weak
3426 or has non-default visibility. */
3427 if (GET_CODE (x) == SYMBOL_REF)
3428 {
3429 tree t;
3430
3431 t = SYMBOL_REF_DECL (x);
3432 if (t)
3433 assemble_external (t);
3434
3435 return -1;
3436 }
3437
3438 return 0;
3439 }
3440
3441 /* Marks SYMBOL_REFs in x as referenced through use of assemble_external. */
3442
3443 void
3444 mark_symbol_refs_as_used (rtx x)
3445 {
3446 for_each_rtx (&x, mark_symbol_ref_as_used, NULL);
3447 }
3448
3449 /* Print operand X using machine-dependent assembler syntax.
3450 The macro PRINT_OPERAND is defined just to control this function.
3451 CODE is a non-digit that preceded the operand-number in the % spec,
3452 such as 'z' if the spec was `%z3'. CODE is 0 if there was no char
3453 between the % and the digits.
3454 When CODE is a non-letter, X is 0.
3455
3456 The meanings of the letters are machine-dependent and controlled
3457 by PRINT_OPERAND. */
3458
3459 static void
3460 output_operand (rtx x, int code ATTRIBUTE_UNUSED)
3461 {
3462 if (x && GET_CODE (x) == SUBREG)
3463 x = alter_subreg (&x);
3464
3465 /* X must not be a pseudo reg. */
3466 gcc_assert (!x || !REG_P (x) || REGNO (x) < FIRST_PSEUDO_REGISTER);
3467
3468 PRINT_OPERAND (asm_out_file, x, code);
3469
3470 if (x == NULL_RTX)
3471 return;
3472
3473 for_each_rtx (&x, mark_symbol_ref_as_used, NULL);
3474 }
3475
3476 /* Print a memory reference operand for address X
3477 using machine-dependent assembler syntax.
3478 The macro PRINT_OPERAND_ADDRESS exists just to control this function. */
3479
3480 void
3481 output_address (rtx x)
3482 {
3483 bool changed = false;
3484 walk_alter_subreg (&x, &changed);
3485 PRINT_OPERAND_ADDRESS (asm_out_file, x);
3486 }
3487 \f
3488 /* Print an integer constant expression in assembler syntax.
3489 Addition and subtraction are the only arithmetic
3490 that may appear in these expressions. */
3491
3492 void
3493 output_addr_const (FILE *file, rtx x)
3494 {
3495 char buf[256];
3496
3497 restart:
3498 switch (GET_CODE (x))
3499 {
3500 case PC:
3501 putc ('.', file);
3502 break;
3503
3504 case SYMBOL_REF:
3505 if (SYMBOL_REF_DECL (x))
3506 {
3507 mark_decl_referenced (SYMBOL_REF_DECL (x));
3508 assemble_external (SYMBOL_REF_DECL (x));
3509 }
3510 #ifdef ASM_OUTPUT_SYMBOL_REF
3511 ASM_OUTPUT_SYMBOL_REF (file, x);
3512 #else
3513 assemble_name (file, XSTR (x, 0));
3514 #endif
3515 break;
3516
3517 case LABEL_REF:
3518 x = XEXP (x, 0);
3519 /* Fall through. */
3520 case CODE_LABEL:
3521 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3522 #ifdef ASM_OUTPUT_LABEL_REF
3523 ASM_OUTPUT_LABEL_REF (file, buf);
3524 #else
3525 assemble_name (file, buf);
3526 #endif
3527 break;
3528
3529 case CONST_INT:
3530 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x));
3531 break;
3532
3533 case CONST:
3534 /* This used to output parentheses around the expression,
3535 but that does not work on the 386 (either ATT or BSD assembler). */
3536 output_addr_const (file, XEXP (x, 0));
3537 break;
3538
3539 case CONST_DOUBLE:
3540 if (GET_MODE (x) == VOIDmode)
3541 {
3542 /* We can use %d if the number is one word and positive. */
3543 if (CONST_DOUBLE_HIGH (x))
3544 fprintf (file, HOST_WIDE_INT_PRINT_DOUBLE_HEX,
3545 (unsigned HOST_WIDE_INT) CONST_DOUBLE_HIGH (x),
3546 (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (x));
3547 else if (CONST_DOUBLE_LOW (x) < 0)
3548 fprintf (file, HOST_WIDE_INT_PRINT_HEX,
3549 (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (x));
3550 else
3551 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x));
3552 }
3553 else
3554 /* We can't handle floating point constants;
3555 PRINT_OPERAND must handle them. */
3556 output_operand_lossage ("floating constant misused");
3557 break;
3558
3559 case CONST_FIXED:
3560 fprintf (file, HOST_WIDE_INT_PRINT_HEX,
3561 (unsigned HOST_WIDE_INT) CONST_FIXED_VALUE_LOW (x));
3562 break;
3563
3564 case PLUS:
3565 /* Some assemblers need integer constants to appear last (eg masm). */
3566 if (CONST_INT_P (XEXP (x, 0)))
3567 {
3568 output_addr_const (file, XEXP (x, 1));
3569 if (INTVAL (XEXP (x, 0)) >= 0)
3570 fprintf (file, "+");
3571 output_addr_const (file, XEXP (x, 0));
3572 }
3573 else
3574 {
3575 output_addr_const (file, XEXP (x, 0));
3576 if (!CONST_INT_P (XEXP (x, 1))
3577 || INTVAL (XEXP (x, 1)) >= 0)
3578 fprintf (file, "+");
3579 output_addr_const (file, XEXP (x, 1));
3580 }
3581 break;
3582
3583 case MINUS:
3584 /* Avoid outputting things like x-x or x+5-x,
3585 since some assemblers can't handle that. */
3586 x = simplify_subtraction (x);
3587 if (GET_CODE (x) != MINUS)
3588 goto restart;
3589
3590 output_addr_const (file, XEXP (x, 0));
3591 fprintf (file, "-");
3592 if ((CONST_INT_P (XEXP (x, 1)) && INTVAL (XEXP (x, 1)) >= 0)
3593 || GET_CODE (XEXP (x, 1)) == PC
3594 || GET_CODE (XEXP (x, 1)) == SYMBOL_REF)
3595 output_addr_const (file, XEXP (x, 1));
3596 else
3597 {
3598 fputs (targetm.asm_out.open_paren, file);
3599 output_addr_const (file, XEXP (x, 1));
3600 fputs (targetm.asm_out.close_paren, file);
3601 }
3602 break;
3603
3604 case ZERO_EXTEND:
3605 case SIGN_EXTEND:
3606 case SUBREG:
3607 case TRUNCATE:
3608 output_addr_const (file, XEXP (x, 0));
3609 break;
3610
3611 default:
3612 #ifdef OUTPUT_ADDR_CONST_EXTRA
3613 OUTPUT_ADDR_CONST_EXTRA (file, x, fail);
3614 break;
3615
3616 fail:
3617 #endif
3618 output_operand_lossage ("invalid expression as operand");
3619 }
3620 }
3621 \f
3622 /* A poor man's fprintf, with the added features of %I, %R, %L, and %U.
3623 %R prints the value of REGISTER_PREFIX.
3624 %L prints the value of LOCAL_LABEL_PREFIX.
3625 %U prints the value of USER_LABEL_PREFIX.
3626 %I prints the value of IMMEDIATE_PREFIX.
3627 %O runs ASM_OUTPUT_OPCODE to transform what follows in the string.
3628 Also supported are %d, %i, %u, %x, %X, %o, %c, %s and %%.
3629
3630 We handle alternate assembler dialects here, just like output_asm_insn. */
3631
3632 void
3633 asm_fprintf (FILE *file, const char *p, ...)
3634 {
3635 char buf[10];
3636 char *q, c;
3637 va_list argptr;
3638
3639 va_start (argptr, p);
3640
3641 buf[0] = '%';
3642
3643 while ((c = *p++))
3644 switch (c)
3645 {
3646 #ifdef ASSEMBLER_DIALECT
3647 case '{':
3648 {
3649 int i;
3650
3651 /* If we want the first dialect, do nothing. Otherwise, skip
3652 DIALECT_NUMBER of strings ending with '|'. */
3653 for (i = 0; i < dialect_number; i++)
3654 {
3655 while (*p && *p++ != '|')
3656 ;
3657
3658 if (*p == '|')
3659 p++;
3660 }
3661 }
3662 break;
3663
3664 case '|':
3665 /* Skip to close brace. */
3666 while (*p && *p++ != '}')
3667 ;
3668 break;
3669
3670 case '}':
3671 break;
3672 #endif
3673
3674 case '%':
3675 c = *p++;
3676 q = &buf[1];
3677 while (strchr ("-+ #0", c))
3678 {
3679 *q++ = c;
3680 c = *p++;
3681 }
3682 while (ISDIGIT (c) || c == '.')
3683 {
3684 *q++ = c;
3685 c = *p++;
3686 }
3687 switch (c)
3688 {
3689 case '%':
3690 putc ('%', file);
3691 break;
3692
3693 case 'd': case 'i': case 'u':
3694 case 'x': case 'X': case 'o':
3695 case 'c':
3696 *q++ = c;
3697 *q = 0;
3698 fprintf (file, buf, va_arg (argptr, int));
3699 break;
3700
3701 case 'w':
3702 /* This is a prefix to the 'd', 'i', 'u', 'x', 'X', and
3703 'o' cases, but we do not check for those cases. It
3704 means that the value is a HOST_WIDE_INT, which may be
3705 either `long' or `long long'. */
3706 memcpy (q, HOST_WIDE_INT_PRINT, strlen (HOST_WIDE_INT_PRINT));
3707 q += strlen (HOST_WIDE_INT_PRINT);
3708 *q++ = *p++;
3709 *q = 0;
3710 fprintf (file, buf, va_arg (argptr, HOST_WIDE_INT));
3711 break;
3712
3713 case 'l':
3714 *q++ = c;
3715 #ifdef HAVE_LONG_LONG
3716 if (*p == 'l')
3717 {
3718 *q++ = *p++;
3719 *q++ = *p++;
3720 *q = 0;
3721 fprintf (file, buf, va_arg (argptr, long long));
3722 }
3723 else
3724 #endif
3725 {
3726 *q++ = *p++;
3727 *q = 0;
3728 fprintf (file, buf, va_arg (argptr, long));
3729 }
3730
3731 break;
3732
3733 case 's':
3734 *q++ = c;
3735 *q = 0;
3736 fprintf (file, buf, va_arg (argptr, char *));
3737 break;
3738
3739 case 'O':
3740 #ifdef ASM_OUTPUT_OPCODE
3741 ASM_OUTPUT_OPCODE (asm_out_file, p);
3742 #endif
3743 break;
3744
3745 case 'R':
3746 #ifdef REGISTER_PREFIX
3747 fprintf (file, "%s", REGISTER_PREFIX);
3748 #endif
3749 break;
3750
3751 case 'I':
3752 #ifdef IMMEDIATE_PREFIX
3753 fprintf (file, "%s", IMMEDIATE_PREFIX);
3754 #endif
3755 break;
3756
3757 case 'L':
3758 #ifdef LOCAL_LABEL_PREFIX
3759 fprintf (file, "%s", LOCAL_LABEL_PREFIX);
3760 #endif
3761 break;
3762
3763 case 'U':
3764 fputs (user_label_prefix, file);
3765 break;
3766
3767 #ifdef ASM_FPRINTF_EXTENSIONS
3768 /* Uppercase letters are reserved for general use by asm_fprintf
3769 and so are not available to target specific code. In order to
3770 prevent the ASM_FPRINTF_EXTENSIONS macro from using them then,
3771 they are defined here. As they get turned into real extensions
3772 to asm_fprintf they should be removed from this list. */
3773 case 'A': case 'B': case 'C': case 'D': case 'E':
3774 case 'F': case 'G': case 'H': case 'J': case 'K':
3775 case 'M': case 'N': case 'P': case 'Q': case 'S':
3776 case 'T': case 'V': case 'W': case 'Y': case 'Z':
3777 break;
3778
3779 ASM_FPRINTF_EXTENSIONS (file, argptr, p)
3780 #endif
3781 default:
3782 gcc_unreachable ();
3783 }
3784 break;
3785
3786 default:
3787 putc (c, file);
3788 }
3789 va_end (argptr);
3790 }
3791 \f
3792 /* Split up a CONST_DOUBLE or integer constant rtx
3793 into two rtx's for single words,
3794 storing in *FIRST the word that comes first in memory in the target
3795 and in *SECOND the other. */
3796
3797 void
3798 split_double (rtx value, rtx *first, rtx *second)
3799 {
3800 if (CONST_INT_P (value))
3801 {
3802 if (HOST_BITS_PER_WIDE_INT >= (2 * BITS_PER_WORD))
3803 {
3804 /* In this case the CONST_INT holds both target words.
3805 Extract the bits from it into two word-sized pieces.
3806 Sign extend each half to HOST_WIDE_INT. */
3807 unsigned HOST_WIDE_INT low, high;
3808 unsigned HOST_WIDE_INT mask, sign_bit, sign_extend;
3809
3810 /* Set sign_bit to the most significant bit of a word. */
3811 sign_bit = 1;
3812 sign_bit <<= BITS_PER_WORD - 1;
3813
3814 /* Set mask so that all bits of the word are set. We could
3815 have used 1 << BITS_PER_WORD instead of basing the
3816 calculation on sign_bit. However, on machines where
3817 HOST_BITS_PER_WIDE_INT == BITS_PER_WORD, it could cause a
3818 compiler warning, even though the code would never be
3819 executed. */
3820 mask = sign_bit << 1;
3821 mask--;
3822
3823 /* Set sign_extend as any remaining bits. */
3824 sign_extend = ~mask;
3825
3826 /* Pick the lower word and sign-extend it. */
3827 low = INTVAL (value);
3828 low &= mask;
3829 if (low & sign_bit)
3830 low |= sign_extend;
3831
3832 /* Pick the higher word, shifted to the least significant
3833 bits, and sign-extend it. */
3834 high = INTVAL (value);
3835 high >>= BITS_PER_WORD - 1;
3836 high >>= 1;
3837 high &= mask;
3838 if (high & sign_bit)
3839 high |= sign_extend;
3840
3841 /* Store the words in the target machine order. */
3842 if (WORDS_BIG_ENDIAN)
3843 {
3844 *first = GEN_INT (high);
3845 *second = GEN_INT (low);
3846 }
3847 else
3848 {
3849 *first = GEN_INT (low);
3850 *second = GEN_INT (high);
3851 }
3852 }
3853 else
3854 {
3855 /* The rule for using CONST_INT for a wider mode
3856 is that we regard the value as signed.
3857 So sign-extend it. */
3858 rtx high = (INTVAL (value) < 0 ? constm1_rtx : const0_rtx);
3859 if (WORDS_BIG_ENDIAN)
3860 {
3861 *first = high;
3862 *second = value;
3863 }
3864 else
3865 {
3866 *first = value;
3867 *second = high;
3868 }
3869 }
3870 }
3871 else if (GET_CODE (value) != CONST_DOUBLE)
3872 {
3873 if (WORDS_BIG_ENDIAN)
3874 {
3875 *first = const0_rtx;
3876 *second = value;
3877 }
3878 else
3879 {
3880 *first = value;
3881 *second = const0_rtx;
3882 }
3883 }
3884 else if (GET_MODE (value) == VOIDmode
3885 /* This is the old way we did CONST_DOUBLE integers. */
3886 || GET_MODE_CLASS (GET_MODE (value)) == MODE_INT)
3887 {
3888 /* In an integer, the words are defined as most and least significant.
3889 So order them by the target's convention. */
3890 if (WORDS_BIG_ENDIAN)
3891 {
3892 *first = GEN_INT (CONST_DOUBLE_HIGH (value));
3893 *second = GEN_INT (CONST_DOUBLE_LOW (value));
3894 }
3895 else
3896 {
3897 *first = GEN_INT (CONST_DOUBLE_LOW (value));
3898 *second = GEN_INT (CONST_DOUBLE_HIGH (value));
3899 }
3900 }
3901 else
3902 {
3903 REAL_VALUE_TYPE r;
3904 long l[2];
3905 REAL_VALUE_FROM_CONST_DOUBLE (r, value);
3906
3907 /* Note, this converts the REAL_VALUE_TYPE to the target's
3908 format, splits up the floating point double and outputs
3909 exactly 32 bits of it into each of l[0] and l[1] --
3910 not necessarily BITS_PER_WORD bits. */
3911 REAL_VALUE_TO_TARGET_DOUBLE (r, l);
3912
3913 /* If 32 bits is an entire word for the target, but not for the host,
3914 then sign-extend on the host so that the number will look the same
3915 way on the host that it would on the target. See for instance
3916 simplify_unary_operation. The #if is needed to avoid compiler
3917 warnings. */
3918
3919 #if HOST_BITS_PER_LONG > 32
3920 if (BITS_PER_WORD < HOST_BITS_PER_LONG && BITS_PER_WORD == 32)
3921 {
3922 if (l[0] & ((long) 1 << 31))
3923 l[0] |= ((long) (-1) << 32);
3924 if (l[1] & ((long) 1 << 31))
3925 l[1] |= ((long) (-1) << 32);
3926 }
3927 #endif
3928
3929 *first = GEN_INT (l[0]);
3930 *second = GEN_INT (l[1]);
3931 }
3932 }
3933 \f
3934 /* Return nonzero if this function has no function calls. */
3935
3936 int
3937 leaf_function_p (void)
3938 {
3939 rtx insn;
3940 rtx link;
3941
3942 if (crtl->profile || profile_arc_flag)
3943 return 0;
3944
3945 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
3946 {
3947 if (CALL_P (insn)
3948 && ! SIBLING_CALL_P (insn))
3949 return 0;
3950 if (NONJUMP_INSN_P (insn)
3951 && GET_CODE (PATTERN (insn)) == SEQUENCE
3952 && CALL_P (XVECEXP (PATTERN (insn), 0, 0))
3953 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0)))
3954 return 0;
3955 }
3956 for (link = crtl->epilogue_delay_list;
3957 link;
3958 link = XEXP (link, 1))
3959 {
3960 insn = XEXP (link, 0);
3961
3962 if (CALL_P (insn)
3963 && ! SIBLING_CALL_P (insn))
3964 return 0;
3965 if (NONJUMP_INSN_P (insn)
3966 && GET_CODE (PATTERN (insn)) == SEQUENCE
3967 && CALL_P (XVECEXP (PATTERN (insn), 0, 0))
3968 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0)))
3969 return 0;
3970 }
3971
3972 return 1;
3973 }
3974
3975 /* Return 1 if branch is a forward branch.
3976 Uses insn_shuid array, so it works only in the final pass. May be used by
3977 output templates to customary add branch prediction hints.
3978 */
3979 int
3980 final_forward_branch_p (rtx insn)
3981 {
3982 int insn_id, label_id;
3983
3984 gcc_assert (uid_shuid);
3985 insn_id = INSN_SHUID (insn);
3986 label_id = INSN_SHUID (JUMP_LABEL (insn));
3987 /* We've hit some insns that does not have id information available. */
3988 gcc_assert (insn_id && label_id);
3989 return insn_id < label_id;
3990 }
3991
3992 /* On some machines, a function with no call insns
3993 can run faster if it doesn't create its own register window.
3994 When output, the leaf function should use only the "output"
3995 registers. Ordinarily, the function would be compiled to use
3996 the "input" registers to find its arguments; it is a candidate
3997 for leaf treatment if it uses only the "input" registers.
3998 Leaf function treatment means renumbering so the function
3999 uses the "output" registers instead. */
4000
4001 #ifdef LEAF_REGISTERS
4002
4003 /* Return 1 if this function uses only the registers that can be
4004 safely renumbered. */
4005
4006 int
4007 only_leaf_regs_used (void)
4008 {
4009 int i;
4010 const char *const permitted_reg_in_leaf_functions = LEAF_REGISTERS;
4011
4012 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
4013 if ((df_regs_ever_live_p (i) || global_regs[i])
4014 && ! permitted_reg_in_leaf_functions[i])
4015 return 0;
4016
4017 if (crtl->uses_pic_offset_table
4018 && pic_offset_table_rtx != 0
4019 && REG_P (pic_offset_table_rtx)
4020 && ! permitted_reg_in_leaf_functions[REGNO (pic_offset_table_rtx)])
4021 return 0;
4022
4023 return 1;
4024 }
4025
4026 /* Scan all instructions and renumber all registers into those
4027 available in leaf functions. */
4028
4029 static void
4030 leaf_renumber_regs (rtx first)
4031 {
4032 rtx insn;
4033
4034 /* Renumber only the actual patterns.
4035 The reg-notes can contain frame pointer refs,
4036 and renumbering them could crash, and should not be needed. */
4037 for (insn = first; insn; insn = NEXT_INSN (insn))
4038 if (INSN_P (insn))
4039 leaf_renumber_regs_insn (PATTERN (insn));
4040 for (insn = crtl->epilogue_delay_list;
4041 insn;
4042 insn = XEXP (insn, 1))
4043 if (INSN_P (XEXP (insn, 0)))
4044 leaf_renumber_regs_insn (PATTERN (XEXP (insn, 0)));
4045 }
4046
4047 /* Scan IN_RTX and its subexpressions, and renumber all regs into those
4048 available in leaf functions. */
4049
4050 void
4051 leaf_renumber_regs_insn (rtx in_rtx)
4052 {
4053 int i, j;
4054 const char *format_ptr;
4055
4056 if (in_rtx == 0)
4057 return;
4058
4059 /* Renumber all input-registers into output-registers.
4060 renumbered_regs would be 1 for an output-register;
4061 they */
4062
4063 if (REG_P (in_rtx))
4064 {
4065 int newreg;
4066
4067 /* Don't renumber the same reg twice. */
4068 if (in_rtx->used)
4069 return;
4070
4071 newreg = REGNO (in_rtx);
4072 /* Don't try to renumber pseudo regs. It is possible for a pseudo reg
4073 to reach here as part of a REG_NOTE. */
4074 if (newreg >= FIRST_PSEUDO_REGISTER)
4075 {
4076 in_rtx->used = 1;
4077 return;
4078 }
4079 newreg = LEAF_REG_REMAP (newreg);
4080 gcc_assert (newreg >= 0);
4081 df_set_regs_ever_live (REGNO (in_rtx), false);
4082 df_set_regs_ever_live (newreg, true);
4083 SET_REGNO (in_rtx, newreg);
4084 in_rtx->used = 1;
4085 }
4086
4087 if (INSN_P (in_rtx))
4088 {
4089 /* Inside a SEQUENCE, we find insns.
4090 Renumber just the patterns of these insns,
4091 just as we do for the top-level insns. */
4092 leaf_renumber_regs_insn (PATTERN (in_rtx));
4093 return;
4094 }
4095
4096 format_ptr = GET_RTX_FORMAT (GET_CODE (in_rtx));
4097
4098 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (in_rtx)); i++)
4099 switch (*format_ptr++)
4100 {
4101 case 'e':
4102 leaf_renumber_regs_insn (XEXP (in_rtx, i));
4103 break;
4104
4105 case 'E':
4106 if (NULL != XVEC (in_rtx, i))
4107 {
4108 for (j = 0; j < XVECLEN (in_rtx, i); j++)
4109 leaf_renumber_regs_insn (XVECEXP (in_rtx, i, j));
4110 }
4111 break;
4112
4113 case 'S':
4114 case 's':
4115 case '0':
4116 case 'i':
4117 case 'w':
4118 case 'n':
4119 case 'u':
4120 break;
4121
4122 default:
4123 gcc_unreachable ();
4124 }
4125 }
4126 #endif
4127
4128
4129 /* When -gused is used, emit debug info for only used symbols. But in
4130 addition to the standard intercepted debug_hooks there are some direct
4131 calls into this file, i.e., dbxout_symbol, dbxout_parms, and dbxout_reg_params.
4132 Those routines may also be called from a higher level intercepted routine. So
4133 to prevent recording data for an inner call to one of these for an intercept,
4134 we maintain an intercept nesting counter (debug_nesting). We only save the
4135 intercepted arguments if the nesting is 1. */
4136 int debug_nesting = 0;
4137
4138 static tree *symbol_queue;
4139 int symbol_queue_index = 0;
4140 static int symbol_queue_size = 0;
4141
4142 /* Generate the symbols for any queued up type symbols we encountered
4143 while generating the type info for some originally used symbol.
4144 This might generate additional entries in the queue. Only when
4145 the nesting depth goes to 0 is this routine called. */
4146
4147 void
4148 debug_flush_symbol_queue (void)
4149 {
4150 int i;
4151
4152 /* Make sure that additionally queued items are not flushed
4153 prematurely. */
4154
4155 ++debug_nesting;
4156
4157 for (i = 0; i < symbol_queue_index; ++i)
4158 {
4159 /* If we pushed queued symbols then such symbols must be
4160 output no matter what anyone else says. Specifically,
4161 we need to make sure dbxout_symbol() thinks the symbol was
4162 used and also we need to override TYPE_DECL_SUPPRESS_DEBUG
4163 which may be set for outside reasons. */
4164 int saved_tree_used = TREE_USED (symbol_queue[i]);
4165 int saved_suppress_debug = TYPE_DECL_SUPPRESS_DEBUG (symbol_queue[i]);
4166 TREE_USED (symbol_queue[i]) = 1;
4167 TYPE_DECL_SUPPRESS_DEBUG (symbol_queue[i]) = 0;
4168
4169 #ifdef DBX_DEBUGGING_INFO
4170 dbxout_symbol (symbol_queue[i], 0);
4171 #endif
4172
4173 TREE_USED (symbol_queue[i]) = saved_tree_used;
4174 TYPE_DECL_SUPPRESS_DEBUG (symbol_queue[i]) = saved_suppress_debug;
4175 }
4176
4177 symbol_queue_index = 0;
4178 --debug_nesting;
4179 }
4180
4181 /* Queue a type symbol needed as part of the definition of a decl
4182 symbol. These symbols are generated when debug_flush_symbol_queue()
4183 is called. */
4184
4185 void
4186 debug_queue_symbol (tree decl)
4187 {
4188 if (symbol_queue_index >= symbol_queue_size)
4189 {
4190 symbol_queue_size += 10;
4191 symbol_queue = XRESIZEVEC (tree, symbol_queue, symbol_queue_size);
4192 }
4193
4194 symbol_queue[symbol_queue_index++] = decl;
4195 }
4196
4197 /* Free symbol queue. */
4198 void
4199 debug_free_queue (void)
4200 {
4201 if (symbol_queue)
4202 {
4203 free (symbol_queue);
4204 symbol_queue = NULL;
4205 symbol_queue_size = 0;
4206 }
4207 }
4208 \f
4209 /* Turn the RTL into assembly. */
4210 static unsigned int
4211 rest_of_handle_final (void)
4212 {
4213 rtx x;
4214 const char *fnname;
4215
4216 /* Get the function's name, as described by its RTL. This may be
4217 different from the DECL_NAME name used in the source file. */
4218
4219 x = DECL_RTL (current_function_decl);
4220 gcc_assert (MEM_P (x));
4221 x = XEXP (x, 0);
4222 gcc_assert (GET_CODE (x) == SYMBOL_REF);
4223 fnname = XSTR (x, 0);
4224
4225 assemble_start_function (current_function_decl, fnname);
4226 final_start_function (get_insns (), asm_out_file, optimize);
4227 final (get_insns (), asm_out_file, optimize);
4228 final_end_function ();
4229
4230 #ifdef TARGET_UNWIND_INFO
4231 /* ??? The IA-64 ".handlerdata" directive must be issued before
4232 the ".endp" directive that closes the procedure descriptor. */
4233 output_function_exception_table (fnname);
4234 #endif
4235
4236 assemble_end_function (current_function_decl, fnname);
4237
4238 #ifndef TARGET_UNWIND_INFO
4239 /* Otherwise, it feels unclean to switch sections in the middle. */
4240 output_function_exception_table (fnname);
4241 #endif
4242
4243 user_defined_section_attribute = false;
4244
4245 /* Free up reg info memory. */
4246 free_reg_info ();
4247
4248 if (! quiet_flag)
4249 fflush (asm_out_file);
4250
4251 /* Write DBX symbols if requested. */
4252
4253 /* Note that for those inline functions where we don't initially
4254 know for certain that we will be generating an out-of-line copy,
4255 the first invocation of this routine (rest_of_compilation) will
4256 skip over this code by doing a `goto exit_rest_of_compilation;'.
4257 Later on, wrapup_global_declarations will (indirectly) call
4258 rest_of_compilation again for those inline functions that need
4259 to have out-of-line copies generated. During that call, we
4260 *will* be routed past here. */
4261
4262 timevar_push (TV_SYMOUT);
4263 (*debug_hooks->function_decl) (current_function_decl);
4264 timevar_pop (TV_SYMOUT);
4265
4266 /* Release the blocks that are linked to DECL_INITIAL() to free the memory. */
4267 DECL_INITIAL (current_function_decl) = error_mark_node;
4268
4269 if (DECL_STATIC_CONSTRUCTOR (current_function_decl)
4270 && targetm.have_ctors_dtors)
4271 targetm.asm_out.constructor (XEXP (DECL_RTL (current_function_decl), 0),
4272 decl_init_priority_lookup
4273 (current_function_decl));
4274 if (DECL_STATIC_DESTRUCTOR (current_function_decl)
4275 && targetm.have_ctors_dtors)
4276 targetm.asm_out.destructor (XEXP (DECL_RTL (current_function_decl), 0),
4277 decl_fini_priority_lookup
4278 (current_function_decl));
4279 return 0;
4280 }
4281
4282 struct rtl_opt_pass pass_final =
4283 {
4284 {
4285 RTL_PASS,
4286 NULL, /* name */
4287 NULL, /* gate */
4288 rest_of_handle_final, /* execute */
4289 NULL, /* sub */
4290 NULL, /* next */
4291 0, /* static_pass_number */
4292 TV_FINAL, /* tv_id */
4293 0, /* properties_required */
4294 0, /* properties_provided */
4295 0, /* properties_destroyed */
4296 0, /* todo_flags_start */
4297 TODO_ggc_collect /* todo_flags_finish */
4298 }
4299 };
4300
4301
4302 static unsigned int
4303 rest_of_handle_shorten_branches (void)
4304 {
4305 /* Shorten branches. */
4306 shorten_branches (get_insns ());
4307 return 0;
4308 }
4309
4310 struct rtl_opt_pass pass_shorten_branches =
4311 {
4312 {
4313 RTL_PASS,
4314 "shorten", /* name */
4315 NULL, /* gate */
4316 rest_of_handle_shorten_branches, /* execute */
4317 NULL, /* sub */
4318 NULL, /* next */
4319 0, /* static_pass_number */
4320 TV_FINAL, /* tv_id */
4321 0, /* properties_required */
4322 0, /* properties_provided */
4323 0, /* properties_destroyed */
4324 0, /* todo_flags_start */
4325 TODO_dump_func /* todo_flags_finish */
4326 }
4327 };
4328
4329
4330 static unsigned int
4331 rest_of_clean_state (void)
4332 {
4333 rtx insn, next;
4334 FILE *final_output = NULL;
4335 int save_unnumbered = flag_dump_unnumbered;
4336 int save_noaddr = flag_dump_noaddr;
4337
4338 if (flag_dump_final_insns)
4339 {
4340 final_output = fopen (flag_dump_final_insns, "a");
4341 if (!final_output)
4342 {
4343 error ("could not open final insn dump file %qs: %s",
4344 flag_dump_final_insns, strerror (errno));
4345 flag_dump_final_insns = NULL;
4346 }
4347 else
4348 {
4349 const char *aname;
4350
4351 aname = (IDENTIFIER_POINTER
4352 (DECL_ASSEMBLER_NAME (current_function_decl)));
4353 fprintf (final_output, "\n;; Function (%s) %s\n\n", aname,
4354 cfun->function_frequency == FUNCTION_FREQUENCY_HOT
4355 ? " (hot)"
4356 : cfun->function_frequency == FUNCTION_FREQUENCY_UNLIKELY_EXECUTED
4357 ? " (unlikely executed)"
4358 : "");
4359
4360 flag_dump_noaddr = flag_dump_unnumbered = 1;
4361
4362 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4363 if (LABEL_P (insn))
4364 INSN_UID (insn) = CODE_LABEL_NUMBER (insn);
4365 else
4366 INSN_UID (insn) = 0;
4367 }
4368 }
4369
4370 /* It is very important to decompose the RTL instruction chain here:
4371 debug information keeps pointing into CODE_LABEL insns inside the function
4372 body. If these remain pointing to the other insns, we end up preserving
4373 whole RTL chain and attached detailed debug info in memory. */
4374 for (insn = get_insns (); insn; insn = next)
4375 {
4376 next = NEXT_INSN (insn);
4377 NEXT_INSN (insn) = NULL;
4378 PREV_INSN (insn) = NULL;
4379
4380 if (final_output
4381 && (!NOTE_P (insn) ||
4382 (NOTE_KIND (insn) != NOTE_INSN_VAR_LOCATION
4383 && NOTE_KIND (insn) != NOTE_INSN_BLOCK_BEG
4384 && NOTE_KIND (insn) != NOTE_INSN_BLOCK_END)))
4385 print_rtl_single (final_output, insn);
4386
4387 }
4388
4389 if (final_output)
4390 {
4391 flag_dump_noaddr = save_noaddr;
4392 flag_dump_unnumbered = save_unnumbered;
4393
4394 if (fclose (final_output))
4395 {
4396 error ("could not close final insn dump file %qs: %s",
4397 flag_dump_final_insns, strerror (errno));
4398 flag_dump_final_insns = NULL;
4399 }
4400 }
4401
4402 /* In case the function was not output,
4403 don't leave any temporary anonymous types
4404 queued up for sdb output. */
4405 #ifdef SDB_DEBUGGING_INFO
4406 if (write_symbols == SDB_DEBUG)
4407 sdbout_types (NULL_TREE);
4408 #endif
4409
4410 flag_rerun_cse_after_global_opts = 0;
4411 reload_completed = 0;
4412 epilogue_completed = 0;
4413 #ifdef STACK_REGS
4414 regstack_completed = 0;
4415 #endif
4416
4417 /* Clear out the insn_length contents now that they are no
4418 longer valid. */
4419 init_insn_lengths ();
4420
4421 /* Show no temporary slots allocated. */
4422 init_temp_slots ();
4423
4424 free_bb_for_insn ();
4425
4426 delete_tree_ssa ();
4427
4428 if (targetm.binds_local_p (current_function_decl))
4429 {
4430 unsigned int pref = crtl->preferred_stack_boundary;
4431 if (crtl->stack_alignment_needed > crtl->preferred_stack_boundary)
4432 pref = crtl->stack_alignment_needed;
4433 cgraph_rtl_info (current_function_decl)->preferred_incoming_stack_boundary
4434 = pref;
4435 }
4436
4437 /* Make sure volatile mem refs aren't considered valid operands for
4438 arithmetic insns. We must call this here if this is a nested inline
4439 function, since the above code leaves us in the init_recog state,
4440 and the function context push/pop code does not save/restore volatile_ok.
4441
4442 ??? Maybe it isn't necessary for expand_start_function to call this
4443 anymore if we do it here? */
4444
4445 init_recog_no_volatile ();
4446
4447 /* We're done with this function. Free up memory if we can. */
4448 free_after_parsing (cfun);
4449 free_after_compilation (cfun);
4450 return 0;
4451 }
4452
4453 struct rtl_opt_pass pass_clean_state =
4454 {
4455 {
4456 RTL_PASS,
4457 "*clean_state", /* name */
4458 NULL, /* gate */
4459 rest_of_clean_state, /* execute */
4460 NULL, /* sub */
4461 NULL, /* next */
4462 0, /* static_pass_number */
4463 TV_FINAL, /* tv_id */
4464 0, /* properties_required */
4465 0, /* properties_provided */
4466 PROP_rtl, /* properties_destroyed */
4467 0, /* todo_flags_start */
4468 0 /* todo_flags_finish */
4469 }
4470 };