Fix final.c.
[gcc.git] / gcc / final.c
1 /* Convert RTL to assembler code and output it, for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008
4 Free Software Foundation, Inc.
5
6 This file is part of GCC.
7
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
11 version.
12
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
21
22 /* This is the final pass of the compiler.
23 It looks at the rtl code for a function and outputs assembler code.
24
25 Call `final_start_function' to output the assembler code for function entry,
26 `final' to output assembler code for some RTL code,
27 `final_end_function' to output assembler code for function exit.
28 If a function is compiled in several pieces, each piece is
29 output separately with `final'.
30
31 Some optimizations are also done at this level.
32 Move instructions that were made unnecessary by good register allocation
33 are detected and omitted from the output. (Though most of these
34 are removed by the last jump pass.)
35
36 Instructions to set the condition codes are omitted when it can be
37 seen that the condition codes already had the desired values.
38
39 In some cases it is sufficient if the inherited condition codes
40 have related values, but this may require the following insn
41 (the one that tests the condition codes) to be modified.
42
43 The code for the function prologue and epilogue are generated
44 directly in assembler by the target functions function_prologue and
45 function_epilogue. Those instructions never exist as rtl. */
46
47 #include "config.h"
48 #include "system.h"
49 #include "coretypes.h"
50 #include "tm.h"
51
52 #include "tree.h"
53 #include "rtl.h"
54 #include "tm_p.h"
55 #include "regs.h"
56 #include "insn-config.h"
57 #include "insn-attr.h"
58 #include "recog.h"
59 #include "conditions.h"
60 #include "flags.h"
61 #include "real.h"
62 #include "hard-reg-set.h"
63 #include "output.h"
64 #include "except.h"
65 #include "function.h"
66 #include "toplev.h"
67 #include "reload.h"
68 #include "intl.h"
69 #include "basic-block.h"
70 #include "target.h"
71 #include "debug.h"
72 #include "expr.h"
73 #include "cfglayout.h"
74 #include "tree-pass.h"
75 #include "timevar.h"
76 #include "cgraph.h"
77 #include "coverage.h"
78 #include "df.h"
79 #include "vecprim.h"
80 #include "ggc.h"
81 #include "cfgloop.h"
82 #include "params.h"
83
84 #ifdef XCOFF_DEBUGGING_INFO
85 #include "xcoffout.h" /* Needed for external data
86 declarations for e.g. AIX 4.x. */
87 #endif
88
89 #if defined (DWARF2_UNWIND_INFO) || defined (DWARF2_DEBUGGING_INFO)
90 #include "dwarf2out.h"
91 #endif
92
93 #ifdef DBX_DEBUGGING_INFO
94 #include "dbxout.h"
95 #endif
96
97 #ifdef SDB_DEBUGGING_INFO
98 #include "sdbout.h"
99 #endif
100
101 /* If we aren't using cc0, CC_STATUS_INIT shouldn't exist. So define a
102 null default for it to save conditionalization later. */
103 #ifndef CC_STATUS_INIT
104 #define CC_STATUS_INIT
105 #endif
106
107 /* How to start an assembler comment. */
108 #ifndef ASM_COMMENT_START
109 #define ASM_COMMENT_START ";#"
110 #endif
111
112 /* Is the given character a logical line separator for the assembler? */
113 #ifndef IS_ASM_LOGICAL_LINE_SEPARATOR
114 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == ';')
115 #endif
116
117 #ifndef JUMP_TABLES_IN_TEXT_SECTION
118 #define JUMP_TABLES_IN_TEXT_SECTION 0
119 #endif
120
121 /* Bitflags used by final_scan_insn. */
122 #define SEEN_BB 1
123 #define SEEN_NOTE 2
124 #define SEEN_EMITTED 4
125
126 /* Last insn processed by final_scan_insn. */
127 static rtx debug_insn;
128 rtx current_output_insn;
129
130 /* Line number of last NOTE. */
131 static int last_linenum;
132
133 /* Highest line number in current block. */
134 static int high_block_linenum;
135
136 /* Likewise for function. */
137 static int high_function_linenum;
138
139 /* Filename of last NOTE. */
140 static const char *last_filename;
141
142 /* Override filename and line number. */
143 static const char *override_filename;
144 static int override_linenum;
145
146 /* Whether to force emission of a line note before the next insn. */
147 static bool force_source_line = false;
148
149 extern const int length_unit_log; /* This is defined in insn-attrtab.c. */
150
151 /* Nonzero while outputting an `asm' with operands.
152 This means that inconsistencies are the user's fault, so don't die.
153 The precise value is the insn being output, to pass to error_for_asm. */
154 rtx this_is_asm_operands;
155
156 /* Number of operands of this insn, for an `asm' with operands. */
157 static unsigned int insn_noperands;
158
159 /* Compare optimization flag. */
160
161 static rtx last_ignored_compare = 0;
162
163 /* Assign a unique number to each insn that is output.
164 This can be used to generate unique local labels. */
165
166 static int insn_counter = 0;
167
168 #ifdef HAVE_cc0
169 /* This variable contains machine-dependent flags (defined in tm.h)
170 set and examined by output routines
171 that describe how to interpret the condition codes properly. */
172
173 CC_STATUS cc_status;
174
175 /* During output of an insn, this contains a copy of cc_status
176 from before the insn. */
177
178 CC_STATUS cc_prev_status;
179 #endif
180
181 /* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */
182
183 static int block_depth;
184
185 /* Nonzero if have enabled APP processing of our assembler output. */
186
187 static int app_on;
188
189 /* If we are outputting an insn sequence, this contains the sequence rtx.
190 Zero otherwise. */
191
192 rtx final_sequence;
193
194 #ifdef ASSEMBLER_DIALECT
195
196 /* Number of the assembler dialect to use, starting at 0. */
197 static int dialect_number;
198 #endif
199
200 #ifdef HAVE_conditional_execution
201 /* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */
202 rtx current_insn_predicate;
203 #endif
204
205 #ifdef HAVE_ATTR_length
206 static int asm_insn_count (rtx);
207 #endif
208 static void profile_function (FILE *);
209 static void profile_after_prologue (FILE *);
210 static bool notice_source_line (rtx);
211 static rtx walk_alter_subreg (rtx *, bool *);
212 static void output_asm_name (void);
213 static void output_alternate_entry_point (FILE *, rtx);
214 static tree get_mem_expr_from_op (rtx, int *);
215 static void output_asm_operand_names (rtx *, int *, int);
216 static void output_operand (rtx, int);
217 #ifdef LEAF_REGISTERS
218 static void leaf_renumber_regs (rtx);
219 #endif
220 #ifdef HAVE_cc0
221 static int alter_cond (rtx);
222 #endif
223 #ifndef ADDR_VEC_ALIGN
224 static int final_addr_vec_align (rtx);
225 #endif
226 #ifdef HAVE_ATTR_length
227 static int align_fuzz (rtx, rtx, int, unsigned);
228 #endif
229 \f
230 /* Initialize data in final at the beginning of a compilation. */
231
232 void
233 init_final (const char *filename ATTRIBUTE_UNUSED)
234 {
235 app_on = 0;
236 final_sequence = 0;
237
238 #ifdef ASSEMBLER_DIALECT
239 dialect_number = ASSEMBLER_DIALECT;
240 #endif
241 }
242
243 /* Default target function prologue and epilogue assembler output.
244
245 If not overridden for epilogue code, then the function body itself
246 contains return instructions wherever needed. */
247 void
248 default_function_pro_epilogue (FILE *file ATTRIBUTE_UNUSED,
249 HOST_WIDE_INT size ATTRIBUTE_UNUSED)
250 {
251 }
252
253 /* Default target hook that outputs nothing to a stream. */
254 void
255 no_asm_to_stream (FILE *file ATTRIBUTE_UNUSED)
256 {
257 }
258
259 /* Enable APP processing of subsequent output.
260 Used before the output from an `asm' statement. */
261
262 void
263 app_enable (void)
264 {
265 if (! app_on)
266 {
267 fputs (ASM_APP_ON, asm_out_file);
268 app_on = 1;
269 }
270 }
271
272 /* Disable APP processing of subsequent output.
273 Called from varasm.c before most kinds of output. */
274
275 void
276 app_disable (void)
277 {
278 if (app_on)
279 {
280 fputs (ASM_APP_OFF, asm_out_file);
281 app_on = 0;
282 }
283 }
284 \f
285 /* Return the number of slots filled in the current
286 delayed branch sequence (we don't count the insn needing the
287 delay slot). Zero if not in a delayed branch sequence. */
288
289 #ifdef DELAY_SLOTS
290 int
291 dbr_sequence_length (void)
292 {
293 if (final_sequence != 0)
294 return XVECLEN (final_sequence, 0) - 1;
295 else
296 return 0;
297 }
298 #endif
299 \f
300 /* The next two pages contain routines used to compute the length of an insn
301 and to shorten branches. */
302
303 /* Arrays for insn lengths, and addresses. The latter is referenced by
304 `insn_current_length'. */
305
306 static int *insn_lengths;
307
308 VEC(int,heap) *insn_addresses_;
309
310 /* Max uid for which the above arrays are valid. */
311 static int insn_lengths_max_uid;
312
313 /* Address of insn being processed. Used by `insn_current_length'. */
314 int insn_current_address;
315
316 /* Address of insn being processed in previous iteration. */
317 int insn_last_address;
318
319 /* known invariant alignment of insn being processed. */
320 int insn_current_align;
321
322 /* After shorten_branches, for any insn, uid_align[INSN_UID (insn)]
323 gives the next following alignment insn that increases the known
324 alignment, or NULL_RTX if there is no such insn.
325 For any alignment obtained this way, we can again index uid_align with
326 its uid to obtain the next following align that in turn increases the
327 alignment, till we reach NULL_RTX; the sequence obtained this way
328 for each insn we'll call the alignment chain of this insn in the following
329 comments. */
330
331 struct label_alignment
332 {
333 short alignment;
334 short max_skip;
335 };
336
337 static rtx *uid_align;
338 static int *uid_shuid;
339 static struct label_alignment *label_align;
340
341 /* Indicate that branch shortening hasn't yet been done. */
342
343 void
344 init_insn_lengths (void)
345 {
346 if (uid_shuid)
347 {
348 free (uid_shuid);
349 uid_shuid = 0;
350 }
351 if (insn_lengths)
352 {
353 free (insn_lengths);
354 insn_lengths = 0;
355 insn_lengths_max_uid = 0;
356 }
357 #ifdef HAVE_ATTR_length
358 INSN_ADDRESSES_FREE ();
359 #endif
360 if (uid_align)
361 {
362 free (uid_align);
363 uid_align = 0;
364 }
365 }
366
367 /* Obtain the current length of an insn. If branch shortening has been done,
368 get its actual length. Otherwise, use FALLBACK_FN to calculate the
369 length. */
370 static inline int
371 get_attr_length_1 (rtx insn ATTRIBUTE_UNUSED,
372 int (*fallback_fn) (rtx) ATTRIBUTE_UNUSED)
373 {
374 #ifdef HAVE_ATTR_length
375 rtx body;
376 int i;
377 int length = 0;
378
379 if (insn_lengths_max_uid > INSN_UID (insn))
380 return insn_lengths[INSN_UID (insn)];
381 else
382 switch (GET_CODE (insn))
383 {
384 case NOTE:
385 case BARRIER:
386 case CODE_LABEL:
387 return 0;
388
389 case CALL_INSN:
390 length = fallback_fn (insn);
391 break;
392
393 case JUMP_INSN:
394 body = PATTERN (insn);
395 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
396 {
397 /* Alignment is machine-dependent and should be handled by
398 ADDR_VEC_ALIGN. */
399 }
400 else
401 length = fallback_fn (insn);
402 break;
403
404 case INSN:
405 body = PATTERN (insn);
406 if (GET_CODE (body) == USE || GET_CODE (body) == CLOBBER)
407 return 0;
408
409 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
410 length = asm_insn_count (body) * fallback_fn (insn);
411 else if (GET_CODE (body) == SEQUENCE)
412 for (i = 0; i < XVECLEN (body, 0); i++)
413 length += get_attr_length_1 (XVECEXP (body, 0, i), fallback_fn);
414 else
415 length = fallback_fn (insn);
416 break;
417
418 default:
419 break;
420 }
421
422 #ifdef ADJUST_INSN_LENGTH
423 ADJUST_INSN_LENGTH (insn, length);
424 #endif
425 return length;
426 #else /* not HAVE_ATTR_length */
427 return 0;
428 #define insn_default_length 0
429 #define insn_min_length 0
430 #endif /* not HAVE_ATTR_length */
431 }
432
433 /* Obtain the current length of an insn. If branch shortening has been done,
434 get its actual length. Otherwise, get its maximum length. */
435 int
436 get_attr_length (rtx insn)
437 {
438 return get_attr_length_1 (insn, insn_default_length);
439 }
440
441 /* Obtain the current length of an insn. If branch shortening has been done,
442 get its actual length. Otherwise, get its minimum length. */
443 int
444 get_attr_min_length (rtx insn)
445 {
446 return get_attr_length_1 (insn, insn_min_length);
447 }
448 \f
449 /* Code to handle alignment inside shorten_branches. */
450
451 /* Here is an explanation how the algorithm in align_fuzz can give
452 proper results:
453
454 Call a sequence of instructions beginning with alignment point X
455 and continuing until the next alignment point `block X'. When `X'
456 is used in an expression, it means the alignment value of the
457 alignment point.
458
459 Call the distance between the start of the first insn of block X, and
460 the end of the last insn of block X `IX', for the `inner size of X'.
461 This is clearly the sum of the instruction lengths.
462
463 Likewise with the next alignment-delimited block following X, which we
464 shall call block Y.
465
466 Call the distance between the start of the first insn of block X, and
467 the start of the first insn of block Y `OX', for the `outer size of X'.
468
469 The estimated padding is then OX - IX.
470
471 OX can be safely estimated as
472
473 if (X >= Y)
474 OX = round_up(IX, Y)
475 else
476 OX = round_up(IX, X) + Y - X
477
478 Clearly est(IX) >= real(IX), because that only depends on the
479 instruction lengths, and those being overestimated is a given.
480
481 Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so
482 we needn't worry about that when thinking about OX.
483
484 When X >= Y, the alignment provided by Y adds no uncertainty factor
485 for branch ranges starting before X, so we can just round what we have.
486 But when X < Y, we don't know anything about the, so to speak,
487 `middle bits', so we have to assume the worst when aligning up from an
488 address mod X to one mod Y, which is Y - X. */
489
490 #ifndef LABEL_ALIGN
491 #define LABEL_ALIGN(LABEL) align_labels_log
492 #endif
493
494 #ifndef LABEL_ALIGN_MAX_SKIP
495 #define LABEL_ALIGN_MAX_SKIP align_labels_max_skip
496 #endif
497
498 #ifndef LOOP_ALIGN
499 #define LOOP_ALIGN(LABEL) align_loops_log
500 #endif
501
502 #ifndef LOOP_ALIGN_MAX_SKIP
503 #define LOOP_ALIGN_MAX_SKIP align_loops_max_skip
504 #endif
505
506 #ifndef LABEL_ALIGN_AFTER_BARRIER
507 #define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0
508 #endif
509
510 #ifndef LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP
511 #define LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP 0
512 #endif
513
514 #ifndef JUMP_ALIGN
515 #define JUMP_ALIGN(LABEL) align_jumps_log
516 #endif
517
518 #ifndef JUMP_ALIGN_MAX_SKIP
519 #define JUMP_ALIGN_MAX_SKIP align_jumps_max_skip
520 #endif
521
522 #ifndef ADDR_VEC_ALIGN
523 static int
524 final_addr_vec_align (rtx addr_vec)
525 {
526 int align = GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec)));
527
528 if (align > BIGGEST_ALIGNMENT / BITS_PER_UNIT)
529 align = BIGGEST_ALIGNMENT / BITS_PER_UNIT;
530 return exact_log2 (align);
531
532 }
533
534 #define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC)
535 #endif
536
537 #ifndef INSN_LENGTH_ALIGNMENT
538 #define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log
539 #endif
540
541 #define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)])
542
543 static int min_labelno, max_labelno;
544
545 #define LABEL_TO_ALIGNMENT(LABEL) \
546 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment)
547
548 #define LABEL_TO_MAX_SKIP(LABEL) \
549 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip)
550
551 /* For the benefit of port specific code do this also as a function. */
552
553 int
554 label_to_alignment (rtx label)
555 {
556 return LABEL_TO_ALIGNMENT (label);
557 }
558
559 #ifdef HAVE_ATTR_length
560 /* The differences in addresses
561 between a branch and its target might grow or shrink depending on
562 the alignment the start insn of the range (the branch for a forward
563 branch or the label for a backward branch) starts out on; if these
564 differences are used naively, they can even oscillate infinitely.
565 We therefore want to compute a 'worst case' address difference that
566 is independent of the alignment the start insn of the range end
567 up on, and that is at least as large as the actual difference.
568 The function align_fuzz calculates the amount we have to add to the
569 naively computed difference, by traversing the part of the alignment
570 chain of the start insn of the range that is in front of the end insn
571 of the range, and considering for each alignment the maximum amount
572 that it might contribute to a size increase.
573
574 For casesi tables, we also want to know worst case minimum amounts of
575 address difference, in case a machine description wants to introduce
576 some common offset that is added to all offsets in a table.
577 For this purpose, align_fuzz with a growth argument of 0 computes the
578 appropriate adjustment. */
579
580 /* Compute the maximum delta by which the difference of the addresses of
581 START and END might grow / shrink due to a different address for start
582 which changes the size of alignment insns between START and END.
583 KNOWN_ALIGN_LOG is the alignment known for START.
584 GROWTH should be ~0 if the objective is to compute potential code size
585 increase, and 0 if the objective is to compute potential shrink.
586 The return value is undefined for any other value of GROWTH. */
587
588 static int
589 align_fuzz (rtx start, rtx end, int known_align_log, unsigned int growth)
590 {
591 int uid = INSN_UID (start);
592 rtx align_label;
593 int known_align = 1 << known_align_log;
594 int end_shuid = INSN_SHUID (end);
595 int fuzz = 0;
596
597 for (align_label = uid_align[uid]; align_label; align_label = uid_align[uid])
598 {
599 int align_addr, new_align;
600
601 uid = INSN_UID (align_label);
602 align_addr = INSN_ADDRESSES (uid) - insn_lengths[uid];
603 if (uid_shuid[uid] > end_shuid)
604 break;
605 known_align_log = LABEL_TO_ALIGNMENT (align_label);
606 new_align = 1 << known_align_log;
607 if (new_align < known_align)
608 continue;
609 fuzz += (-align_addr ^ growth) & (new_align - known_align);
610 known_align = new_align;
611 }
612 return fuzz;
613 }
614
615 /* Compute a worst-case reference address of a branch so that it
616 can be safely used in the presence of aligned labels. Since the
617 size of the branch itself is unknown, the size of the branch is
618 not included in the range. I.e. for a forward branch, the reference
619 address is the end address of the branch as known from the previous
620 branch shortening pass, minus a value to account for possible size
621 increase due to alignment. For a backward branch, it is the start
622 address of the branch as known from the current pass, plus a value
623 to account for possible size increase due to alignment.
624 NB.: Therefore, the maximum offset allowed for backward branches needs
625 to exclude the branch size. */
626
627 int
628 insn_current_reference_address (rtx branch)
629 {
630 rtx dest, seq;
631 int seq_uid;
632
633 if (! INSN_ADDRESSES_SET_P ())
634 return 0;
635
636 seq = NEXT_INSN (PREV_INSN (branch));
637 seq_uid = INSN_UID (seq);
638 if (!JUMP_P (branch))
639 /* This can happen for example on the PA; the objective is to know the
640 offset to address something in front of the start of the function.
641 Thus, we can treat it like a backward branch.
642 We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than
643 any alignment we'd encounter, so we skip the call to align_fuzz. */
644 return insn_current_address;
645 dest = JUMP_LABEL (branch);
646
647 /* BRANCH has no proper alignment chain set, so use SEQ.
648 BRANCH also has no INSN_SHUID. */
649 if (INSN_SHUID (seq) < INSN_SHUID (dest))
650 {
651 /* Forward branch. */
652 return (insn_last_address + insn_lengths[seq_uid]
653 - align_fuzz (seq, dest, length_unit_log, ~0));
654 }
655 else
656 {
657 /* Backward branch. */
658 return (insn_current_address
659 + align_fuzz (dest, seq, length_unit_log, ~0));
660 }
661 }
662 #endif /* HAVE_ATTR_length */
663 \f
664 /* Compute branch alignments based on frequency information in the
665 CFG. */
666
667 static unsigned int
668 compute_alignments (void)
669 {
670 int log, max_skip, max_log;
671 basic_block bb;
672 int freq_max = 0;
673 int freq_threshold = 0;
674
675 if (label_align)
676 {
677 free (label_align);
678 label_align = 0;
679 }
680
681 max_labelno = max_label_num ();
682 min_labelno = get_first_label_num ();
683 label_align = XCNEWVEC (struct label_alignment, max_labelno - min_labelno + 1);
684
685 /* If not optimizing or optimizing for size, don't assign any alignments. */
686 if (! optimize || optimize_size)
687 return 0;
688
689 if (dump_file)
690 {
691 dump_flow_info (dump_file, TDF_DETAILS);
692 flow_loops_dump (dump_file, NULL, 1);
693 loop_optimizer_init (AVOID_CFG_MODIFICATIONS);
694 }
695 FOR_EACH_BB (bb)
696 if (bb->frequency > freq_max)
697 freq_max = bb->frequency;
698 freq_threshold = freq_max / PARAM_VALUE (PARAM_ALIGN_THRESHOLD);
699
700 if (dump_file)
701 fprintf(dump_file, "freq_max: %i\n",freq_max);
702 FOR_EACH_BB (bb)
703 {
704 rtx label = BB_HEAD (bb);
705 int fallthru_frequency = 0, branch_frequency = 0, has_fallthru = 0;
706 edge e;
707 edge_iterator ei;
708
709 if (!LABEL_P (label)
710 || probably_never_executed_bb_p (bb))
711 {
712 if (dump_file)
713 fprintf(dump_file, "BB %4i freq %4i loop %2i loop_depth %2i skipped.\n",
714 bb->index, bb->frequency, bb->loop_father->num, bb->loop_depth);
715 continue;
716 }
717 max_log = LABEL_ALIGN (label);
718 max_skip = LABEL_ALIGN_MAX_SKIP;
719
720 FOR_EACH_EDGE (e, ei, bb->preds)
721 {
722 if (e->flags & EDGE_FALLTHRU)
723 has_fallthru = 1, fallthru_frequency += EDGE_FREQUENCY (e);
724 else
725 branch_frequency += EDGE_FREQUENCY (e);
726 }
727 if (dump_file)
728 {
729 fprintf(dump_file, "BB %4i freq %4i loop %2i loop_depth %2i fall %4i branch %4i",
730 bb->index, bb->frequency, bb->loop_father->num,
731 bb->loop_depth,
732 fallthru_frequency, branch_frequency);
733 if (!bb->loop_father->inner && bb->loop_father->num)
734 fprintf (dump_file, " inner_loop");
735 if (bb->loop_father->header == bb)
736 fprintf (dump_file, " loop_header");
737 fprintf (dump_file, "\n");
738 }
739
740 /* There are two purposes to align block with no fallthru incoming edge:
741 1) to avoid fetch stalls when branch destination is near cache boundary
742 2) to improve cache efficiency in case the previous block is not executed
743 (so it does not need to be in the cache).
744
745 We to catch first case, we align frequently executed blocks.
746 To catch the second, we align blocks that are executed more frequently
747 than the predecessor and the predecessor is likely to not be executed
748 when function is called. */
749
750 if (!has_fallthru
751 && (branch_frequency > freq_threshold
752 || (bb->frequency > bb->prev_bb->frequency * 10
753 && (bb->prev_bb->frequency
754 <= ENTRY_BLOCK_PTR->frequency / 2))))
755 {
756 log = JUMP_ALIGN (label);
757 if (dump_file)
758 fprintf(dump_file, " jump alignment added.\n");
759 if (max_log < log)
760 {
761 max_log = log;
762 max_skip = JUMP_ALIGN_MAX_SKIP;
763 }
764 }
765 /* In case block is frequent and reached mostly by non-fallthru edge,
766 align it. It is most likely a first block of loop. */
767 if (has_fallthru
768 && maybe_hot_bb_p (bb)
769 && branch_frequency + fallthru_frequency > freq_threshold
770 && (branch_frequency
771 > fallthru_frequency * PARAM_VALUE (PARAM_ALIGN_LOOP_ITERATIONS)))
772 {
773 log = LOOP_ALIGN (label);
774 if (dump_file)
775 fprintf(dump_file, " internal loop alignment added.\n");
776 if (max_log < log)
777 {
778 max_log = log;
779 max_skip = LOOP_ALIGN_MAX_SKIP;
780 }
781 }
782 LABEL_TO_ALIGNMENT (label) = max_log;
783 LABEL_TO_MAX_SKIP (label) = max_skip;
784 }
785
786 if (dump_file)
787 loop_optimizer_finalize ();
788 return 0;
789 }
790
791 struct rtl_opt_pass pass_compute_alignments =
792 {
793 {
794 RTL_PASS,
795 "alignments", /* name */
796 NULL, /* gate */
797 compute_alignments, /* execute */
798 NULL, /* sub */
799 NULL, /* next */
800 0, /* static_pass_number */
801 0, /* tv_id */
802 0, /* properties_required */
803 0, /* properties_provided */
804 0, /* properties_destroyed */
805 0, /* todo_flags_start */
806 TODO_dump_func | TODO_verify_rtl_sharing
807 | TODO_ggc_collect /* todo_flags_finish */
808 }
809 };
810
811 \f
812 /* Make a pass over all insns and compute their actual lengths by shortening
813 any branches of variable length if possible. */
814
815 /* shorten_branches might be called multiple times: for example, the SH
816 port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG.
817 In order to do this, it needs proper length information, which it obtains
818 by calling shorten_branches. This cannot be collapsed with
819 shorten_branches itself into a single pass unless we also want to integrate
820 reorg.c, since the branch splitting exposes new instructions with delay
821 slots. */
822
823 void
824 shorten_branches (rtx first ATTRIBUTE_UNUSED)
825 {
826 rtx insn;
827 int max_uid;
828 int i;
829 int max_log;
830 int max_skip;
831 #ifdef HAVE_ATTR_length
832 #define MAX_CODE_ALIGN 16
833 rtx seq;
834 int something_changed = 1;
835 char *varying_length;
836 rtx body;
837 int uid;
838 rtx align_tab[MAX_CODE_ALIGN];
839
840 #endif
841
842 /* Compute maximum UID and allocate label_align / uid_shuid. */
843 max_uid = get_max_uid ();
844
845 /* Free uid_shuid before reallocating it. */
846 free (uid_shuid);
847
848 uid_shuid = XNEWVEC (int, max_uid);
849
850 if (max_labelno != max_label_num ())
851 {
852 int old = max_labelno;
853 int n_labels;
854 int n_old_labels;
855
856 max_labelno = max_label_num ();
857
858 n_labels = max_labelno - min_labelno + 1;
859 n_old_labels = old - min_labelno + 1;
860
861 label_align = XRESIZEVEC (struct label_alignment, label_align, n_labels);
862
863 /* Range of labels grows monotonically in the function. Failing here
864 means that the initialization of array got lost. */
865 gcc_assert (n_old_labels <= n_labels);
866
867 memset (label_align + n_old_labels, 0,
868 (n_labels - n_old_labels) * sizeof (struct label_alignment));
869 }
870
871 /* Initialize label_align and set up uid_shuid to be strictly
872 monotonically rising with insn order. */
873 /* We use max_log here to keep track of the maximum alignment we want to
874 impose on the next CODE_LABEL (or the current one if we are processing
875 the CODE_LABEL itself). */
876
877 max_log = 0;
878 max_skip = 0;
879
880 for (insn = get_insns (), i = 1; insn; insn = NEXT_INSN (insn))
881 {
882 int log;
883
884 INSN_SHUID (insn) = i++;
885 if (INSN_P (insn))
886 continue;
887
888 if (LABEL_P (insn))
889 {
890 rtx next;
891
892 /* Merge in alignments computed by compute_alignments. */
893 log = LABEL_TO_ALIGNMENT (insn);
894 if (max_log < log)
895 {
896 max_log = log;
897 max_skip = LABEL_TO_MAX_SKIP (insn);
898 }
899
900 log = LABEL_ALIGN (insn);
901 if (max_log < log)
902 {
903 max_log = log;
904 max_skip = LABEL_ALIGN_MAX_SKIP;
905 }
906 next = next_nonnote_insn (insn);
907 /* ADDR_VECs only take room if read-only data goes into the text
908 section. */
909 if (JUMP_TABLES_IN_TEXT_SECTION
910 || readonly_data_section == text_section)
911 if (next && JUMP_P (next))
912 {
913 rtx nextbody = PATTERN (next);
914 if (GET_CODE (nextbody) == ADDR_VEC
915 || GET_CODE (nextbody) == ADDR_DIFF_VEC)
916 {
917 log = ADDR_VEC_ALIGN (next);
918 if (max_log < log)
919 {
920 max_log = log;
921 max_skip = LABEL_ALIGN_MAX_SKIP;
922 }
923 }
924 }
925 LABEL_TO_ALIGNMENT (insn) = max_log;
926 LABEL_TO_MAX_SKIP (insn) = max_skip;
927 max_log = 0;
928 max_skip = 0;
929 }
930 else if (BARRIER_P (insn))
931 {
932 rtx label;
933
934 for (label = insn; label && ! INSN_P (label);
935 label = NEXT_INSN (label))
936 if (LABEL_P (label))
937 {
938 log = LABEL_ALIGN_AFTER_BARRIER (insn);
939 if (max_log < log)
940 {
941 max_log = log;
942 max_skip = LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP;
943 }
944 break;
945 }
946 }
947 }
948 #ifdef HAVE_ATTR_length
949
950 /* Allocate the rest of the arrays. */
951 insn_lengths = XNEWVEC (int, max_uid);
952 insn_lengths_max_uid = max_uid;
953 /* Syntax errors can lead to labels being outside of the main insn stream.
954 Initialize insn_addresses, so that we get reproducible results. */
955 INSN_ADDRESSES_ALLOC (max_uid);
956
957 varying_length = XCNEWVEC (char, max_uid);
958
959 /* Initialize uid_align. We scan instructions
960 from end to start, and keep in align_tab[n] the last seen insn
961 that does an alignment of at least n+1, i.e. the successor
962 in the alignment chain for an insn that does / has a known
963 alignment of n. */
964 uid_align = XCNEWVEC (rtx, max_uid);
965
966 for (i = MAX_CODE_ALIGN; --i >= 0;)
967 align_tab[i] = NULL_RTX;
968 seq = get_last_insn ();
969 for (; seq; seq = PREV_INSN (seq))
970 {
971 int uid = INSN_UID (seq);
972 int log;
973 log = (LABEL_P (seq) ? LABEL_TO_ALIGNMENT (seq) : 0);
974 uid_align[uid] = align_tab[0];
975 if (log)
976 {
977 /* Found an alignment label. */
978 uid_align[uid] = align_tab[log];
979 for (i = log - 1; i >= 0; i--)
980 align_tab[i] = seq;
981 }
982 }
983 #ifdef CASE_VECTOR_SHORTEN_MODE
984 if (optimize)
985 {
986 /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum
987 label fields. */
988
989 int min_shuid = INSN_SHUID (get_insns ()) - 1;
990 int max_shuid = INSN_SHUID (get_last_insn ()) + 1;
991 int rel;
992
993 for (insn = first; insn != 0; insn = NEXT_INSN (insn))
994 {
995 rtx min_lab = NULL_RTX, max_lab = NULL_RTX, pat;
996 int len, i, min, max, insn_shuid;
997 int min_align;
998 addr_diff_vec_flags flags;
999
1000 if (!JUMP_P (insn)
1001 || GET_CODE (PATTERN (insn)) != ADDR_DIFF_VEC)
1002 continue;
1003 pat = PATTERN (insn);
1004 len = XVECLEN (pat, 1);
1005 gcc_assert (len > 0);
1006 min_align = MAX_CODE_ALIGN;
1007 for (min = max_shuid, max = min_shuid, i = len - 1; i >= 0; i--)
1008 {
1009 rtx lab = XEXP (XVECEXP (pat, 1, i), 0);
1010 int shuid = INSN_SHUID (lab);
1011 if (shuid < min)
1012 {
1013 min = shuid;
1014 min_lab = lab;
1015 }
1016 if (shuid > max)
1017 {
1018 max = shuid;
1019 max_lab = lab;
1020 }
1021 if (min_align > LABEL_TO_ALIGNMENT (lab))
1022 min_align = LABEL_TO_ALIGNMENT (lab);
1023 }
1024 XEXP (pat, 2) = gen_rtx_LABEL_REF (Pmode, min_lab);
1025 XEXP (pat, 3) = gen_rtx_LABEL_REF (Pmode, max_lab);
1026 insn_shuid = INSN_SHUID (insn);
1027 rel = INSN_SHUID (XEXP (XEXP (pat, 0), 0));
1028 memset (&flags, 0, sizeof (flags));
1029 flags.min_align = min_align;
1030 flags.base_after_vec = rel > insn_shuid;
1031 flags.min_after_vec = min > insn_shuid;
1032 flags.max_after_vec = max > insn_shuid;
1033 flags.min_after_base = min > rel;
1034 flags.max_after_base = max > rel;
1035 ADDR_DIFF_VEC_FLAGS (pat) = flags;
1036 }
1037 }
1038 #endif /* CASE_VECTOR_SHORTEN_MODE */
1039
1040 /* Compute initial lengths, addresses, and varying flags for each insn. */
1041 for (insn_current_address = 0, insn = first;
1042 insn != 0;
1043 insn_current_address += insn_lengths[uid], insn = NEXT_INSN (insn))
1044 {
1045 uid = INSN_UID (insn);
1046
1047 insn_lengths[uid] = 0;
1048
1049 if (LABEL_P (insn))
1050 {
1051 int log = LABEL_TO_ALIGNMENT (insn);
1052 if (log)
1053 {
1054 int align = 1 << log;
1055 int new_address = (insn_current_address + align - 1) & -align;
1056 insn_lengths[uid] = new_address - insn_current_address;
1057 }
1058 }
1059
1060 INSN_ADDRESSES (uid) = insn_current_address + insn_lengths[uid];
1061
1062 if (NOTE_P (insn) || BARRIER_P (insn)
1063 || LABEL_P (insn))
1064 continue;
1065 if (INSN_DELETED_P (insn))
1066 continue;
1067
1068 body = PATTERN (insn);
1069 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
1070 {
1071 /* This only takes room if read-only data goes into the text
1072 section. */
1073 if (JUMP_TABLES_IN_TEXT_SECTION
1074 || readonly_data_section == text_section)
1075 insn_lengths[uid] = (XVECLEN (body,
1076 GET_CODE (body) == ADDR_DIFF_VEC)
1077 * GET_MODE_SIZE (GET_MODE (body)));
1078 /* Alignment is handled by ADDR_VEC_ALIGN. */
1079 }
1080 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
1081 insn_lengths[uid] = asm_insn_count (body) * insn_default_length (insn);
1082 else if (GET_CODE (body) == SEQUENCE)
1083 {
1084 int i;
1085 int const_delay_slots;
1086 #ifdef DELAY_SLOTS
1087 const_delay_slots = const_num_delay_slots (XVECEXP (body, 0, 0));
1088 #else
1089 const_delay_slots = 0;
1090 #endif
1091 /* Inside a delay slot sequence, we do not do any branch shortening
1092 if the shortening could change the number of delay slots
1093 of the branch. */
1094 for (i = 0; i < XVECLEN (body, 0); i++)
1095 {
1096 rtx inner_insn = XVECEXP (body, 0, i);
1097 int inner_uid = INSN_UID (inner_insn);
1098 int inner_length;
1099
1100 if (GET_CODE (body) == ASM_INPUT
1101 || asm_noperands (PATTERN (XVECEXP (body, 0, i))) >= 0)
1102 inner_length = (asm_insn_count (PATTERN (inner_insn))
1103 * insn_default_length (inner_insn));
1104 else
1105 inner_length = insn_default_length (inner_insn);
1106
1107 insn_lengths[inner_uid] = inner_length;
1108 if (const_delay_slots)
1109 {
1110 if ((varying_length[inner_uid]
1111 = insn_variable_length_p (inner_insn)) != 0)
1112 varying_length[uid] = 1;
1113 INSN_ADDRESSES (inner_uid) = (insn_current_address
1114 + insn_lengths[uid]);
1115 }
1116 else
1117 varying_length[inner_uid] = 0;
1118 insn_lengths[uid] += inner_length;
1119 }
1120 }
1121 else if (GET_CODE (body) != USE && GET_CODE (body) != CLOBBER)
1122 {
1123 insn_lengths[uid] = insn_default_length (insn);
1124 varying_length[uid] = insn_variable_length_p (insn);
1125 }
1126
1127 /* If needed, do any adjustment. */
1128 #ifdef ADJUST_INSN_LENGTH
1129 ADJUST_INSN_LENGTH (insn, insn_lengths[uid]);
1130 if (insn_lengths[uid] < 0)
1131 fatal_insn ("negative insn length", insn);
1132 #endif
1133 }
1134
1135 /* Now loop over all the insns finding varying length insns. For each,
1136 get the current insn length. If it has changed, reflect the change.
1137 When nothing changes for a full pass, we are done. */
1138
1139 while (something_changed)
1140 {
1141 something_changed = 0;
1142 insn_current_align = MAX_CODE_ALIGN - 1;
1143 for (insn_current_address = 0, insn = first;
1144 insn != 0;
1145 insn = NEXT_INSN (insn))
1146 {
1147 int new_length;
1148 #ifdef ADJUST_INSN_LENGTH
1149 int tmp_length;
1150 #endif
1151 int length_align;
1152
1153 uid = INSN_UID (insn);
1154
1155 if (LABEL_P (insn))
1156 {
1157 int log = LABEL_TO_ALIGNMENT (insn);
1158 if (log > insn_current_align)
1159 {
1160 int align = 1 << log;
1161 int new_address= (insn_current_address + align - 1) & -align;
1162 insn_lengths[uid] = new_address - insn_current_address;
1163 insn_current_align = log;
1164 insn_current_address = new_address;
1165 }
1166 else
1167 insn_lengths[uid] = 0;
1168 INSN_ADDRESSES (uid) = insn_current_address;
1169 continue;
1170 }
1171
1172 length_align = INSN_LENGTH_ALIGNMENT (insn);
1173 if (length_align < insn_current_align)
1174 insn_current_align = length_align;
1175
1176 insn_last_address = INSN_ADDRESSES (uid);
1177 INSN_ADDRESSES (uid) = insn_current_address;
1178
1179 #ifdef CASE_VECTOR_SHORTEN_MODE
1180 if (optimize && JUMP_P (insn)
1181 && GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
1182 {
1183 rtx body = PATTERN (insn);
1184 int old_length = insn_lengths[uid];
1185 rtx rel_lab = XEXP (XEXP (body, 0), 0);
1186 rtx min_lab = XEXP (XEXP (body, 2), 0);
1187 rtx max_lab = XEXP (XEXP (body, 3), 0);
1188 int rel_addr = INSN_ADDRESSES (INSN_UID (rel_lab));
1189 int min_addr = INSN_ADDRESSES (INSN_UID (min_lab));
1190 int max_addr = INSN_ADDRESSES (INSN_UID (max_lab));
1191 rtx prev;
1192 int rel_align = 0;
1193 addr_diff_vec_flags flags;
1194
1195 /* Avoid automatic aggregate initialization. */
1196 flags = ADDR_DIFF_VEC_FLAGS (body);
1197
1198 /* Try to find a known alignment for rel_lab. */
1199 for (prev = rel_lab;
1200 prev
1201 && ! insn_lengths[INSN_UID (prev)]
1202 && ! (varying_length[INSN_UID (prev)] & 1);
1203 prev = PREV_INSN (prev))
1204 if (varying_length[INSN_UID (prev)] & 2)
1205 {
1206 rel_align = LABEL_TO_ALIGNMENT (prev);
1207 break;
1208 }
1209
1210 /* See the comment on addr_diff_vec_flags in rtl.h for the
1211 meaning of the flags values. base: REL_LAB vec: INSN */
1212 /* Anything after INSN has still addresses from the last
1213 pass; adjust these so that they reflect our current
1214 estimate for this pass. */
1215 if (flags.base_after_vec)
1216 rel_addr += insn_current_address - insn_last_address;
1217 if (flags.min_after_vec)
1218 min_addr += insn_current_address - insn_last_address;
1219 if (flags.max_after_vec)
1220 max_addr += insn_current_address - insn_last_address;
1221 /* We want to know the worst case, i.e. lowest possible value
1222 for the offset of MIN_LAB. If MIN_LAB is after REL_LAB,
1223 its offset is positive, and we have to be wary of code shrink;
1224 otherwise, it is negative, and we have to be vary of code
1225 size increase. */
1226 if (flags.min_after_base)
1227 {
1228 /* If INSN is between REL_LAB and MIN_LAB, the size
1229 changes we are about to make can change the alignment
1230 within the observed offset, therefore we have to break
1231 it up into two parts that are independent. */
1232 if (! flags.base_after_vec && flags.min_after_vec)
1233 {
1234 min_addr -= align_fuzz (rel_lab, insn, rel_align, 0);
1235 min_addr -= align_fuzz (insn, min_lab, 0, 0);
1236 }
1237 else
1238 min_addr -= align_fuzz (rel_lab, min_lab, rel_align, 0);
1239 }
1240 else
1241 {
1242 if (flags.base_after_vec && ! flags.min_after_vec)
1243 {
1244 min_addr -= align_fuzz (min_lab, insn, 0, ~0);
1245 min_addr -= align_fuzz (insn, rel_lab, 0, ~0);
1246 }
1247 else
1248 min_addr -= align_fuzz (min_lab, rel_lab, 0, ~0);
1249 }
1250 /* Likewise, determine the highest lowest possible value
1251 for the offset of MAX_LAB. */
1252 if (flags.max_after_base)
1253 {
1254 if (! flags.base_after_vec && flags.max_after_vec)
1255 {
1256 max_addr += align_fuzz (rel_lab, insn, rel_align, ~0);
1257 max_addr += align_fuzz (insn, max_lab, 0, ~0);
1258 }
1259 else
1260 max_addr += align_fuzz (rel_lab, max_lab, rel_align, ~0);
1261 }
1262 else
1263 {
1264 if (flags.base_after_vec && ! flags.max_after_vec)
1265 {
1266 max_addr += align_fuzz (max_lab, insn, 0, 0);
1267 max_addr += align_fuzz (insn, rel_lab, 0, 0);
1268 }
1269 else
1270 max_addr += align_fuzz (max_lab, rel_lab, 0, 0);
1271 }
1272 PUT_MODE (body, CASE_VECTOR_SHORTEN_MODE (min_addr - rel_addr,
1273 max_addr - rel_addr,
1274 body));
1275 if (JUMP_TABLES_IN_TEXT_SECTION
1276 || readonly_data_section == text_section)
1277 {
1278 insn_lengths[uid]
1279 = (XVECLEN (body, 1) * GET_MODE_SIZE (GET_MODE (body)));
1280 insn_current_address += insn_lengths[uid];
1281 if (insn_lengths[uid] != old_length)
1282 something_changed = 1;
1283 }
1284
1285 continue;
1286 }
1287 #endif /* CASE_VECTOR_SHORTEN_MODE */
1288
1289 if (! (varying_length[uid]))
1290 {
1291 if (NONJUMP_INSN_P (insn)
1292 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1293 {
1294 int i;
1295
1296 body = PATTERN (insn);
1297 for (i = 0; i < XVECLEN (body, 0); i++)
1298 {
1299 rtx inner_insn = XVECEXP (body, 0, i);
1300 int inner_uid = INSN_UID (inner_insn);
1301
1302 INSN_ADDRESSES (inner_uid) = insn_current_address;
1303
1304 insn_current_address += insn_lengths[inner_uid];
1305 }
1306 }
1307 else
1308 insn_current_address += insn_lengths[uid];
1309
1310 continue;
1311 }
1312
1313 if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
1314 {
1315 int i;
1316
1317 body = PATTERN (insn);
1318 new_length = 0;
1319 for (i = 0; i < XVECLEN (body, 0); i++)
1320 {
1321 rtx inner_insn = XVECEXP (body, 0, i);
1322 int inner_uid = INSN_UID (inner_insn);
1323 int inner_length;
1324
1325 INSN_ADDRESSES (inner_uid) = insn_current_address;
1326
1327 /* insn_current_length returns 0 for insns with a
1328 non-varying length. */
1329 if (! varying_length[inner_uid])
1330 inner_length = insn_lengths[inner_uid];
1331 else
1332 inner_length = insn_current_length (inner_insn);
1333
1334 if (inner_length != insn_lengths[inner_uid])
1335 {
1336 insn_lengths[inner_uid] = inner_length;
1337 something_changed = 1;
1338 }
1339 insn_current_address += insn_lengths[inner_uid];
1340 new_length += inner_length;
1341 }
1342 }
1343 else
1344 {
1345 new_length = insn_current_length (insn);
1346 insn_current_address += new_length;
1347 }
1348
1349 #ifdef ADJUST_INSN_LENGTH
1350 /* If needed, do any adjustment. */
1351 tmp_length = new_length;
1352 ADJUST_INSN_LENGTH (insn, new_length);
1353 insn_current_address += (new_length - tmp_length);
1354 #endif
1355
1356 if (new_length != insn_lengths[uid])
1357 {
1358 insn_lengths[uid] = new_length;
1359 something_changed = 1;
1360 }
1361 }
1362 /* For a non-optimizing compile, do only a single pass. */
1363 if (!optimize)
1364 break;
1365 }
1366
1367 free (varying_length);
1368
1369 #endif /* HAVE_ATTR_length */
1370 }
1371
1372 #ifdef HAVE_ATTR_length
1373 /* Given the body of an INSN known to be generated by an ASM statement, return
1374 the number of machine instructions likely to be generated for this insn.
1375 This is used to compute its length. */
1376
1377 static int
1378 asm_insn_count (rtx body)
1379 {
1380 const char *templ;
1381 int count = 1;
1382
1383 if (GET_CODE (body) == ASM_INPUT)
1384 templ = XSTR (body, 0);
1385 else
1386 templ = decode_asm_operands (body, NULL, NULL, NULL, NULL, NULL);
1387
1388 if (!*templ)
1389 return 0;
1390
1391 for (; *templ; templ++)
1392 if (IS_ASM_LOGICAL_LINE_SEPARATOR (*templ, templ)
1393 || *templ == '\n')
1394 count++;
1395
1396 return count;
1397 }
1398 #endif
1399 \f
1400 /* ??? This is probably the wrong place for these. */
1401 /* Structure recording the mapping from source file and directory
1402 names at compile time to those to be embedded in debug
1403 information. */
1404 typedef struct debug_prefix_map
1405 {
1406 const char *old_prefix;
1407 const char *new_prefix;
1408 size_t old_len;
1409 size_t new_len;
1410 struct debug_prefix_map *next;
1411 } debug_prefix_map;
1412
1413 /* Linked list of such structures. */
1414 debug_prefix_map *debug_prefix_maps;
1415
1416
1417 /* Record a debug file prefix mapping. ARG is the argument to
1418 -fdebug-prefix-map and must be of the form OLD=NEW. */
1419
1420 void
1421 add_debug_prefix_map (const char *arg)
1422 {
1423 debug_prefix_map *map;
1424 const char *p;
1425
1426 p = strchr (arg, '=');
1427 if (!p)
1428 {
1429 error ("invalid argument %qs to -fdebug-prefix-map", arg);
1430 return;
1431 }
1432 map = XNEW (debug_prefix_map);
1433 map->old_prefix = ggc_alloc_string (arg, p - arg);
1434 map->old_len = p - arg;
1435 p++;
1436 map->new_prefix = ggc_strdup (p);
1437 map->new_len = strlen (p);
1438 map->next = debug_prefix_maps;
1439 debug_prefix_maps = map;
1440 }
1441
1442 /* Perform user-specified mapping of debug filename prefixes. Return
1443 the new name corresponding to FILENAME. */
1444
1445 const char *
1446 remap_debug_filename (const char *filename)
1447 {
1448 debug_prefix_map *map;
1449 char *s;
1450 const char *name;
1451 size_t name_len;
1452
1453 for (map = debug_prefix_maps; map; map = map->next)
1454 if (strncmp (filename, map->old_prefix, map->old_len) == 0)
1455 break;
1456 if (!map)
1457 return filename;
1458 name = filename + map->old_len;
1459 name_len = strlen (name) + 1;
1460 s = (char *) alloca (name_len + map->new_len);
1461 memcpy (s, map->new_prefix, map->new_len);
1462 memcpy (s + map->new_len, name, name_len);
1463 return ggc_strdup (s);
1464 }
1465 \f
1466 /* Output assembler code for the start of a function,
1467 and initialize some of the variables in this file
1468 for the new function. The label for the function and associated
1469 assembler pseudo-ops have already been output in `assemble_start_function'.
1470
1471 FIRST is the first insn of the rtl for the function being compiled.
1472 FILE is the file to write assembler code to.
1473 OPTIMIZE is nonzero if we should eliminate redundant
1474 test and compare insns. */
1475
1476 void
1477 final_start_function (rtx first ATTRIBUTE_UNUSED, FILE *file,
1478 int optimize ATTRIBUTE_UNUSED)
1479 {
1480 block_depth = 0;
1481
1482 this_is_asm_operands = 0;
1483
1484 last_filename = locator_file (prologue_locator);
1485 last_linenum = locator_line (prologue_locator);
1486
1487 high_block_linenum = high_function_linenum = last_linenum;
1488
1489 (*debug_hooks->begin_prologue) (last_linenum, last_filename);
1490
1491 #if defined (DWARF2_UNWIND_INFO) || defined (TARGET_UNWIND_INFO)
1492 if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG)
1493 dwarf2out_begin_prologue (0, NULL);
1494 #endif
1495
1496 #ifdef LEAF_REG_REMAP
1497 if (current_function_uses_only_leaf_regs)
1498 leaf_renumber_regs (first);
1499 #endif
1500
1501 /* The Sun386i and perhaps other machines don't work right
1502 if the profiling code comes after the prologue. */
1503 #ifdef PROFILE_BEFORE_PROLOGUE
1504 if (crtl->profile)
1505 profile_function (file);
1506 #endif /* PROFILE_BEFORE_PROLOGUE */
1507
1508 #if defined (DWARF2_UNWIND_INFO) && defined (HAVE_prologue)
1509 if (dwarf2out_do_frame ())
1510 dwarf2out_frame_debug (NULL_RTX, false);
1511 #endif
1512
1513 /* If debugging, assign block numbers to all of the blocks in this
1514 function. */
1515 if (write_symbols)
1516 {
1517 reemit_insn_block_notes ();
1518 number_blocks (current_function_decl);
1519 /* We never actually put out begin/end notes for the top-level
1520 block in the function. But, conceptually, that block is
1521 always needed. */
1522 TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl)) = 1;
1523 }
1524
1525 if (warn_frame_larger_than
1526 && get_frame_size () > frame_larger_than_size)
1527 {
1528 /* Issue a warning */
1529 warning (OPT_Wframe_larger_than_,
1530 "the frame size of %wd bytes is larger than %wd bytes",
1531 get_frame_size (), frame_larger_than_size);
1532 }
1533
1534 /* First output the function prologue: code to set up the stack frame. */
1535 targetm.asm_out.function_prologue (file, get_frame_size ());
1536
1537 /* If the machine represents the prologue as RTL, the profiling code must
1538 be emitted when NOTE_INSN_PROLOGUE_END is scanned. */
1539 #ifdef HAVE_prologue
1540 if (! HAVE_prologue)
1541 #endif
1542 profile_after_prologue (file);
1543 }
1544
1545 static void
1546 profile_after_prologue (FILE *file ATTRIBUTE_UNUSED)
1547 {
1548 #ifndef PROFILE_BEFORE_PROLOGUE
1549 if (crtl->profile)
1550 profile_function (file);
1551 #endif /* not PROFILE_BEFORE_PROLOGUE */
1552 }
1553
1554 static void
1555 profile_function (FILE *file ATTRIBUTE_UNUSED)
1556 {
1557 #ifndef NO_PROFILE_COUNTERS
1558 # define NO_PROFILE_COUNTERS 0
1559 #endif
1560 #if defined(ASM_OUTPUT_REG_PUSH)
1561 int sval = cfun->returns_struct;
1562 rtx svrtx = targetm.calls.struct_value_rtx (TREE_TYPE (current_function_decl), 1);
1563 #if defined(STATIC_CHAIN_INCOMING_REGNUM) || defined(STATIC_CHAIN_REGNUM)
1564 int cxt = cfun->static_chain_decl != NULL;
1565 #endif
1566 #endif /* ASM_OUTPUT_REG_PUSH */
1567
1568 if (! NO_PROFILE_COUNTERS)
1569 {
1570 int align = MIN (BIGGEST_ALIGNMENT, LONG_TYPE_SIZE);
1571 switch_to_section (data_section);
1572 ASM_OUTPUT_ALIGN (file, floor_log2 (align / BITS_PER_UNIT));
1573 targetm.asm_out.internal_label (file, "LP", current_function_funcdef_no);
1574 assemble_integer (const0_rtx, LONG_TYPE_SIZE / BITS_PER_UNIT, align, 1);
1575 }
1576
1577 switch_to_section (current_function_section ());
1578
1579 #if defined(ASM_OUTPUT_REG_PUSH)
1580 if (sval && svrtx != NULL_RTX && REG_P (svrtx))
1581 {
1582 ASM_OUTPUT_REG_PUSH (file, REGNO (svrtx));
1583 }
1584 #endif
1585
1586 #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1587 if (cxt)
1588 ASM_OUTPUT_REG_PUSH (file, STATIC_CHAIN_INCOMING_REGNUM);
1589 #else
1590 #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1591 if (cxt)
1592 {
1593 ASM_OUTPUT_REG_PUSH (file, STATIC_CHAIN_REGNUM);
1594 }
1595 #endif
1596 #endif
1597
1598 FUNCTION_PROFILER (file, current_function_funcdef_no);
1599
1600 #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1601 if (cxt)
1602 ASM_OUTPUT_REG_POP (file, STATIC_CHAIN_INCOMING_REGNUM);
1603 #else
1604 #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1605 if (cxt)
1606 {
1607 ASM_OUTPUT_REG_POP (file, STATIC_CHAIN_REGNUM);
1608 }
1609 #endif
1610 #endif
1611
1612 #if defined(ASM_OUTPUT_REG_PUSH)
1613 if (sval && svrtx != NULL_RTX && REG_P (svrtx))
1614 {
1615 ASM_OUTPUT_REG_POP (file, REGNO (svrtx));
1616 }
1617 #endif
1618 }
1619
1620 /* Output assembler code for the end of a function.
1621 For clarity, args are same as those of `final_start_function'
1622 even though not all of them are needed. */
1623
1624 void
1625 final_end_function (void)
1626 {
1627 app_disable ();
1628
1629 (*debug_hooks->end_function) (high_function_linenum);
1630
1631 /* Finally, output the function epilogue:
1632 code to restore the stack frame and return to the caller. */
1633 targetm.asm_out.function_epilogue (asm_out_file, get_frame_size ());
1634
1635 /* And debug output. */
1636 (*debug_hooks->end_epilogue) (last_linenum, last_filename);
1637
1638 #if defined (DWARF2_UNWIND_INFO)
1639 if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG
1640 && dwarf2out_do_frame ())
1641 dwarf2out_end_epilogue (last_linenum, last_filename);
1642 #endif
1643 }
1644 \f
1645 /* Output assembler code for some insns: all or part of a function.
1646 For description of args, see `final_start_function', above. */
1647
1648 void
1649 final (rtx first, FILE *file, int optimize)
1650 {
1651 rtx insn;
1652 int max_uid = 0;
1653 int seen = 0;
1654
1655 last_ignored_compare = 0;
1656
1657 for (insn = first; insn; insn = NEXT_INSN (insn))
1658 {
1659 if (INSN_UID (insn) > max_uid) /* Find largest UID. */
1660 max_uid = INSN_UID (insn);
1661 #ifdef HAVE_cc0
1662 /* If CC tracking across branches is enabled, record the insn which
1663 jumps to each branch only reached from one place. */
1664 if (optimize && JUMP_P (insn))
1665 {
1666 rtx lab = JUMP_LABEL (insn);
1667 if (lab && LABEL_NUSES (lab) == 1)
1668 {
1669 LABEL_REFS (lab) = insn;
1670 }
1671 }
1672 #endif
1673 }
1674
1675 init_recog ();
1676
1677 CC_STATUS_INIT;
1678
1679 /* Output the insns. */
1680 for (insn = first; insn;)
1681 {
1682 #ifdef HAVE_ATTR_length
1683 if ((unsigned) INSN_UID (insn) >= INSN_ADDRESSES_SIZE ())
1684 {
1685 /* This can be triggered by bugs elsewhere in the compiler if
1686 new insns are created after init_insn_lengths is called. */
1687 gcc_assert (NOTE_P (insn));
1688 insn_current_address = -1;
1689 }
1690 else
1691 insn_current_address = INSN_ADDRESSES (INSN_UID (insn));
1692 #endif /* HAVE_ATTR_length */
1693
1694 insn = final_scan_insn (insn, file, optimize, 0, &seen);
1695 }
1696 }
1697 \f
1698 const char *
1699 get_insn_template (int code, rtx insn)
1700 {
1701 switch (insn_data[code].output_format)
1702 {
1703 case INSN_OUTPUT_FORMAT_SINGLE:
1704 return insn_data[code].output.single;
1705 case INSN_OUTPUT_FORMAT_MULTI:
1706 return insn_data[code].output.multi[which_alternative];
1707 case INSN_OUTPUT_FORMAT_FUNCTION:
1708 gcc_assert (insn);
1709 return (*insn_data[code].output.function) (recog_data.operand, insn);
1710
1711 default:
1712 gcc_unreachable ();
1713 }
1714 }
1715
1716 /* Emit the appropriate declaration for an alternate-entry-point
1717 symbol represented by INSN, to FILE. INSN is a CODE_LABEL with
1718 LABEL_KIND != LABEL_NORMAL.
1719
1720 The case fall-through in this function is intentional. */
1721 static void
1722 output_alternate_entry_point (FILE *file, rtx insn)
1723 {
1724 const char *name = LABEL_NAME (insn);
1725
1726 switch (LABEL_KIND (insn))
1727 {
1728 case LABEL_WEAK_ENTRY:
1729 #ifdef ASM_WEAKEN_LABEL
1730 ASM_WEAKEN_LABEL (file, name);
1731 #endif
1732 case LABEL_GLOBAL_ENTRY:
1733 targetm.asm_out.globalize_label (file, name);
1734 case LABEL_STATIC_ENTRY:
1735 #ifdef ASM_OUTPUT_TYPE_DIRECTIVE
1736 ASM_OUTPUT_TYPE_DIRECTIVE (file, name, "function");
1737 #endif
1738 ASM_OUTPUT_LABEL (file, name);
1739 break;
1740
1741 case LABEL_NORMAL:
1742 default:
1743 gcc_unreachable ();
1744 }
1745 }
1746
1747 /* Given a CALL_INSN, find and return the nested CALL. */
1748 static rtx
1749 call_from_call_insn (rtx insn)
1750 {
1751 rtx x;
1752 gcc_assert (CALL_P (insn));
1753 x = PATTERN (insn);
1754
1755 while (GET_CODE (x) != CALL)
1756 {
1757 switch (GET_CODE (x))
1758 {
1759 default:
1760 gcc_unreachable ();
1761 case COND_EXEC:
1762 x = COND_EXEC_CODE (x);
1763 break;
1764 case PARALLEL:
1765 x = XVECEXP (x, 0, 0);
1766 break;
1767 case SET:
1768 x = XEXP (x, 1);
1769 break;
1770 }
1771 }
1772 return x;
1773 }
1774
1775 /* The final scan for one insn, INSN.
1776 Args are same as in `final', except that INSN
1777 is the insn being scanned.
1778 Value returned is the next insn to be scanned.
1779
1780 NOPEEPHOLES is the flag to disallow peephole processing (currently
1781 used for within delayed branch sequence output).
1782
1783 SEEN is used to track the end of the prologue, for emitting
1784 debug information. We force the emission of a line note after
1785 both NOTE_INSN_PROLOGUE_END and NOTE_INSN_FUNCTION_BEG, or
1786 at the beginning of the second basic block, whichever comes
1787 first. */
1788
1789 rtx
1790 final_scan_insn (rtx insn, FILE *file, int optimize ATTRIBUTE_UNUSED,
1791 int nopeepholes ATTRIBUTE_UNUSED, int *seen)
1792 {
1793 #ifdef HAVE_cc0
1794 rtx set;
1795 #endif
1796 rtx next;
1797
1798 insn_counter++;
1799
1800 /* Ignore deleted insns. These can occur when we split insns (due to a
1801 template of "#") while not optimizing. */
1802 if (INSN_DELETED_P (insn))
1803 return NEXT_INSN (insn);
1804
1805 switch (GET_CODE (insn))
1806 {
1807 case NOTE:
1808 switch (NOTE_KIND (insn))
1809 {
1810 case NOTE_INSN_DELETED:
1811 break;
1812
1813 case NOTE_INSN_SWITCH_TEXT_SECTIONS:
1814 in_cold_section_p = !in_cold_section_p;
1815 #ifdef DWARF2_UNWIND_INFO
1816 if (dwarf2out_do_frame ())
1817 dwarf2out_switch_text_section ();
1818 else
1819 #endif
1820 (*debug_hooks->switch_text_section) ();
1821
1822 switch_to_section (current_function_section ());
1823 break;
1824
1825 case NOTE_INSN_BASIC_BLOCK:
1826 #ifdef TARGET_UNWIND_INFO
1827 targetm.asm_out.unwind_emit (asm_out_file, insn);
1828 #endif
1829
1830 if (flag_debug_asm)
1831 fprintf (asm_out_file, "\t%s basic block %d\n",
1832 ASM_COMMENT_START, NOTE_BASIC_BLOCK (insn)->index);
1833
1834 if ((*seen & (SEEN_EMITTED | SEEN_BB)) == SEEN_BB)
1835 {
1836 *seen |= SEEN_EMITTED;
1837 force_source_line = true;
1838 }
1839 else
1840 *seen |= SEEN_BB;
1841
1842 break;
1843
1844 case NOTE_INSN_EH_REGION_BEG:
1845 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHB",
1846 NOTE_EH_HANDLER (insn));
1847 break;
1848
1849 case NOTE_INSN_EH_REGION_END:
1850 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHE",
1851 NOTE_EH_HANDLER (insn));
1852 break;
1853
1854 case NOTE_INSN_PROLOGUE_END:
1855 targetm.asm_out.function_end_prologue (file);
1856 profile_after_prologue (file);
1857
1858 if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE)
1859 {
1860 *seen |= SEEN_EMITTED;
1861 force_source_line = true;
1862 }
1863 else
1864 *seen |= SEEN_NOTE;
1865
1866 break;
1867
1868 case NOTE_INSN_EPILOGUE_BEG:
1869 targetm.asm_out.function_begin_epilogue (file);
1870 break;
1871
1872 case NOTE_INSN_FUNCTION_BEG:
1873 app_disable ();
1874 (*debug_hooks->end_prologue) (last_linenum, last_filename);
1875
1876 if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE)
1877 {
1878 *seen |= SEEN_EMITTED;
1879 force_source_line = true;
1880 }
1881 else
1882 *seen |= SEEN_NOTE;
1883
1884 break;
1885
1886 case NOTE_INSN_BLOCK_BEG:
1887 if (debug_info_level == DINFO_LEVEL_NORMAL
1888 || debug_info_level == DINFO_LEVEL_VERBOSE
1889 || write_symbols == DWARF2_DEBUG
1890 || write_symbols == VMS_AND_DWARF2_DEBUG
1891 || write_symbols == VMS_DEBUG)
1892 {
1893 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
1894
1895 app_disable ();
1896 ++block_depth;
1897 high_block_linenum = last_linenum;
1898
1899 /* Output debugging info about the symbol-block beginning. */
1900 (*debug_hooks->begin_block) (last_linenum, n);
1901
1902 /* Mark this block as output. */
1903 TREE_ASM_WRITTEN (NOTE_BLOCK (insn)) = 1;
1904 }
1905 if (write_symbols == DBX_DEBUG
1906 || write_symbols == SDB_DEBUG)
1907 {
1908 location_t *locus_ptr
1909 = block_nonartificial_location (NOTE_BLOCK (insn));
1910
1911 if (locus_ptr != NULL)
1912 {
1913 override_filename = LOCATION_FILE (*locus_ptr);
1914 override_linenum = LOCATION_LINE (*locus_ptr);
1915 }
1916 }
1917 break;
1918
1919 case NOTE_INSN_BLOCK_END:
1920 if (debug_info_level == DINFO_LEVEL_NORMAL
1921 || debug_info_level == DINFO_LEVEL_VERBOSE
1922 || write_symbols == DWARF2_DEBUG
1923 || write_symbols == VMS_AND_DWARF2_DEBUG
1924 || write_symbols == VMS_DEBUG)
1925 {
1926 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
1927
1928 app_disable ();
1929
1930 /* End of a symbol-block. */
1931 --block_depth;
1932 gcc_assert (block_depth >= 0);
1933
1934 (*debug_hooks->end_block) (high_block_linenum, n);
1935 }
1936 if (write_symbols == DBX_DEBUG
1937 || write_symbols == SDB_DEBUG)
1938 {
1939 tree outer_block = BLOCK_SUPERCONTEXT (NOTE_BLOCK (insn));
1940 location_t *locus_ptr
1941 = block_nonartificial_location (outer_block);
1942
1943 if (locus_ptr != NULL)
1944 {
1945 override_filename = LOCATION_FILE (*locus_ptr);
1946 override_linenum = LOCATION_LINE (*locus_ptr);
1947 }
1948 else
1949 {
1950 override_filename = NULL;
1951 override_linenum = 0;
1952 }
1953 }
1954 break;
1955
1956 case NOTE_INSN_DELETED_LABEL:
1957 /* Emit the label. We may have deleted the CODE_LABEL because
1958 the label could be proved to be unreachable, though still
1959 referenced (in the form of having its address taken. */
1960 ASM_OUTPUT_DEBUG_LABEL (file, "L", CODE_LABEL_NUMBER (insn));
1961 break;
1962
1963 case NOTE_INSN_VAR_LOCATION:
1964 (*debug_hooks->var_location) (insn);
1965 break;
1966
1967 default:
1968 gcc_unreachable ();
1969 break;
1970 }
1971 break;
1972
1973 case BARRIER:
1974 #if defined (DWARF2_UNWIND_INFO)
1975 if (dwarf2out_do_frame ())
1976 dwarf2out_frame_debug (insn, false);
1977 #endif
1978 break;
1979
1980 case CODE_LABEL:
1981 /* The target port might emit labels in the output function for
1982 some insn, e.g. sh.c output_branchy_insn. */
1983 if (CODE_LABEL_NUMBER (insn) <= max_labelno)
1984 {
1985 int align = LABEL_TO_ALIGNMENT (insn);
1986 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
1987 int max_skip = LABEL_TO_MAX_SKIP (insn);
1988 #endif
1989
1990 if (align && NEXT_INSN (insn))
1991 {
1992 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
1993 ASM_OUTPUT_MAX_SKIP_ALIGN (file, align, max_skip);
1994 #else
1995 #ifdef ASM_OUTPUT_ALIGN_WITH_NOP
1996 ASM_OUTPUT_ALIGN_WITH_NOP (file, align);
1997 #else
1998 ASM_OUTPUT_ALIGN (file, align);
1999 #endif
2000 #endif
2001 }
2002 }
2003 #ifdef HAVE_cc0
2004 CC_STATUS_INIT;
2005 #endif
2006
2007 if (LABEL_NAME (insn))
2008 (*debug_hooks->label) (insn);
2009
2010 app_disable ();
2011
2012 next = next_nonnote_insn (insn);
2013 if (next != 0 && JUMP_P (next))
2014 {
2015 rtx nextbody = PATTERN (next);
2016
2017 /* If this label is followed by a jump-table,
2018 make sure we put the label in the read-only section. Also
2019 possibly write the label and jump table together. */
2020
2021 if (GET_CODE (nextbody) == ADDR_VEC
2022 || GET_CODE (nextbody) == ADDR_DIFF_VEC)
2023 {
2024 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2025 /* In this case, the case vector is being moved by the
2026 target, so don't output the label at all. Leave that
2027 to the back end macros. */
2028 #else
2029 if (! JUMP_TABLES_IN_TEXT_SECTION)
2030 {
2031 int log_align;
2032
2033 switch_to_section (targetm.asm_out.function_rodata_section
2034 (current_function_decl));
2035
2036 #ifdef ADDR_VEC_ALIGN
2037 log_align = ADDR_VEC_ALIGN (next);
2038 #else
2039 log_align = exact_log2 (BIGGEST_ALIGNMENT / BITS_PER_UNIT);
2040 #endif
2041 ASM_OUTPUT_ALIGN (file, log_align);
2042 }
2043 else
2044 switch_to_section (current_function_section ());
2045
2046 #ifdef ASM_OUTPUT_CASE_LABEL
2047 ASM_OUTPUT_CASE_LABEL (file, "L", CODE_LABEL_NUMBER (insn),
2048 next);
2049 #else
2050 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn));
2051 #endif
2052 #endif
2053 break;
2054 }
2055 }
2056 if (LABEL_ALT_ENTRY_P (insn))
2057 output_alternate_entry_point (file, insn);
2058 else
2059 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn));
2060 break;
2061
2062 default:
2063 {
2064 rtx body = PATTERN (insn);
2065 int insn_code_number;
2066 const char *templ;
2067
2068 #ifdef HAVE_conditional_execution
2069 /* Reset this early so it is correct for ASM statements. */
2070 current_insn_predicate = NULL_RTX;
2071 #endif
2072 /* An INSN, JUMP_INSN or CALL_INSN.
2073 First check for special kinds that recog doesn't recognize. */
2074
2075 if (GET_CODE (body) == USE /* These are just declarations. */
2076 || GET_CODE (body) == CLOBBER)
2077 break;
2078
2079 #ifdef HAVE_cc0
2080 {
2081 /* If there is a REG_CC_SETTER note on this insn, it means that
2082 the setting of the condition code was done in the delay slot
2083 of the insn that branched here. So recover the cc status
2084 from the insn that set it. */
2085
2086 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2087 if (note)
2088 {
2089 NOTICE_UPDATE_CC (PATTERN (XEXP (note, 0)), XEXP (note, 0));
2090 cc_prev_status = cc_status;
2091 }
2092 }
2093 #endif
2094
2095 /* Detect insns that are really jump-tables
2096 and output them as such. */
2097
2098 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
2099 {
2100 #if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC))
2101 int vlen, idx;
2102 #endif
2103
2104 if (! JUMP_TABLES_IN_TEXT_SECTION)
2105 switch_to_section (targetm.asm_out.function_rodata_section
2106 (current_function_decl));
2107 else
2108 switch_to_section (current_function_section ());
2109
2110 app_disable ();
2111
2112 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2113 if (GET_CODE (body) == ADDR_VEC)
2114 {
2115 #ifdef ASM_OUTPUT_ADDR_VEC
2116 ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn), body);
2117 #else
2118 gcc_unreachable ();
2119 #endif
2120 }
2121 else
2122 {
2123 #ifdef ASM_OUTPUT_ADDR_DIFF_VEC
2124 ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn), body);
2125 #else
2126 gcc_unreachable ();
2127 #endif
2128 }
2129 #else
2130 vlen = XVECLEN (body, GET_CODE (body) == ADDR_DIFF_VEC);
2131 for (idx = 0; idx < vlen; idx++)
2132 {
2133 if (GET_CODE (body) == ADDR_VEC)
2134 {
2135 #ifdef ASM_OUTPUT_ADDR_VEC_ELT
2136 ASM_OUTPUT_ADDR_VEC_ELT
2137 (file, CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 0, idx), 0)));
2138 #else
2139 gcc_unreachable ();
2140 #endif
2141 }
2142 else
2143 {
2144 #ifdef ASM_OUTPUT_ADDR_DIFF_ELT
2145 ASM_OUTPUT_ADDR_DIFF_ELT
2146 (file,
2147 body,
2148 CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 1, idx), 0)),
2149 CODE_LABEL_NUMBER (XEXP (XEXP (body, 0), 0)));
2150 #else
2151 gcc_unreachable ();
2152 #endif
2153 }
2154 }
2155 #ifdef ASM_OUTPUT_CASE_END
2156 ASM_OUTPUT_CASE_END (file,
2157 CODE_LABEL_NUMBER (PREV_INSN (insn)),
2158 insn);
2159 #endif
2160 #endif
2161
2162 switch_to_section (current_function_section ());
2163
2164 break;
2165 }
2166 /* Output this line note if it is the first or the last line
2167 note in a row. */
2168 if (notice_source_line (insn))
2169 {
2170 (*debug_hooks->source_line) (last_linenum, last_filename);
2171 }
2172
2173 if (GET_CODE (body) == ASM_INPUT)
2174 {
2175 const char *string = XSTR (body, 0);
2176
2177 /* There's no telling what that did to the condition codes. */
2178 CC_STATUS_INIT;
2179
2180 if (string[0])
2181 {
2182 expanded_location loc;
2183
2184 app_enable ();
2185 loc = expand_location (ASM_INPUT_SOURCE_LOCATION (body));
2186 if (*loc.file && loc.line)
2187 fprintf (asm_out_file, "%s %i \"%s\" 1\n",
2188 ASM_COMMENT_START, loc.line, loc.file);
2189 fprintf (asm_out_file, "\t%s\n", string);
2190 #if HAVE_AS_LINE_ZERO
2191 if (*loc.file && loc.line)
2192 fprintf (asm_out_file, "%s 0 \"\" 2\n", ASM_COMMENT_START);
2193 #endif
2194 }
2195 break;
2196 }
2197
2198 /* Detect `asm' construct with operands. */
2199 if (asm_noperands (body) >= 0)
2200 {
2201 unsigned int noperands = asm_noperands (body);
2202 rtx *ops = XALLOCAVEC (rtx, noperands);
2203 const char *string;
2204 location_t loc;
2205 expanded_location expanded;
2206
2207 /* There's no telling what that did to the condition codes. */
2208 CC_STATUS_INIT;
2209
2210 /* Get out the operand values. */
2211 string = decode_asm_operands (body, ops, NULL, NULL, NULL, &loc);
2212 /* Inhibit dying on what would otherwise be compiler bugs. */
2213 insn_noperands = noperands;
2214 this_is_asm_operands = insn;
2215 expanded = expand_location (loc);
2216
2217 #ifdef FINAL_PRESCAN_INSN
2218 FINAL_PRESCAN_INSN (insn, ops, insn_noperands);
2219 #endif
2220
2221 /* Output the insn using them. */
2222 if (string[0])
2223 {
2224 app_enable ();
2225 if (expanded.file && expanded.line)
2226 fprintf (asm_out_file, "%s %i \"%s\" 1\n",
2227 ASM_COMMENT_START, expanded.line, expanded.file);
2228 output_asm_insn (string, ops);
2229 #if HAVE_AS_LINE_ZERO
2230 if (expanded.file && expanded.line)
2231 fprintf (asm_out_file, "%s 0 \"\" 2\n", ASM_COMMENT_START);
2232 #endif
2233 }
2234
2235 this_is_asm_operands = 0;
2236 break;
2237 }
2238
2239 app_disable ();
2240
2241 if (GET_CODE (body) == SEQUENCE)
2242 {
2243 /* A delayed-branch sequence */
2244 int i;
2245
2246 final_sequence = body;
2247
2248 /* Record the delay slots' frame information before the branch.
2249 This is needed for delayed calls: see execute_cfa_program(). */
2250 #if defined (DWARF2_UNWIND_INFO)
2251 if (dwarf2out_do_frame ())
2252 for (i = 1; i < XVECLEN (body, 0); i++)
2253 dwarf2out_frame_debug (XVECEXP (body, 0, i), false);
2254 #endif
2255
2256 /* The first insn in this SEQUENCE might be a JUMP_INSN that will
2257 force the restoration of a comparison that was previously
2258 thought unnecessary. If that happens, cancel this sequence
2259 and cause that insn to be restored. */
2260
2261 next = final_scan_insn (XVECEXP (body, 0, 0), file, 0, 1, seen);
2262 if (next != XVECEXP (body, 0, 1))
2263 {
2264 final_sequence = 0;
2265 return next;
2266 }
2267
2268 for (i = 1; i < XVECLEN (body, 0); i++)
2269 {
2270 rtx insn = XVECEXP (body, 0, i);
2271 rtx next = NEXT_INSN (insn);
2272 /* We loop in case any instruction in a delay slot gets
2273 split. */
2274 do
2275 insn = final_scan_insn (insn, file, 0, 1, seen);
2276 while (insn != next);
2277 }
2278 #ifdef DBR_OUTPUT_SEQEND
2279 DBR_OUTPUT_SEQEND (file);
2280 #endif
2281 final_sequence = 0;
2282
2283 /* If the insn requiring the delay slot was a CALL_INSN, the
2284 insns in the delay slot are actually executed before the
2285 called function. Hence we don't preserve any CC-setting
2286 actions in these insns and the CC must be marked as being
2287 clobbered by the function. */
2288 if (CALL_P (XVECEXP (body, 0, 0)))
2289 {
2290 CC_STATUS_INIT;
2291 }
2292 break;
2293 }
2294
2295 /* We have a real machine instruction as rtl. */
2296
2297 body = PATTERN (insn);
2298
2299 #ifdef HAVE_cc0
2300 set = single_set (insn);
2301
2302 /* Check for redundant test and compare instructions
2303 (when the condition codes are already set up as desired).
2304 This is done only when optimizing; if not optimizing,
2305 it should be possible for the user to alter a variable
2306 with the debugger in between statements
2307 and the next statement should reexamine the variable
2308 to compute the condition codes. */
2309
2310 if (optimize)
2311 {
2312 if (set
2313 && GET_CODE (SET_DEST (set)) == CC0
2314 && insn != last_ignored_compare)
2315 {
2316 if (GET_CODE (SET_SRC (set)) == SUBREG)
2317 SET_SRC (set) = alter_subreg (&SET_SRC (set));
2318 else if (GET_CODE (SET_SRC (set)) == COMPARE)
2319 {
2320 if (GET_CODE (XEXP (SET_SRC (set), 0)) == SUBREG)
2321 XEXP (SET_SRC (set), 0)
2322 = alter_subreg (&XEXP (SET_SRC (set), 0));
2323 if (GET_CODE (XEXP (SET_SRC (set), 1)) == SUBREG)
2324 XEXP (SET_SRC (set), 1)
2325 = alter_subreg (&XEXP (SET_SRC (set), 1));
2326 }
2327 if ((cc_status.value1 != 0
2328 && rtx_equal_p (SET_SRC (set), cc_status.value1))
2329 || (cc_status.value2 != 0
2330 && rtx_equal_p (SET_SRC (set), cc_status.value2)))
2331 {
2332 /* Don't delete insn if it has an addressing side-effect. */
2333 if (! FIND_REG_INC_NOTE (insn, NULL_RTX)
2334 /* or if anything in it is volatile. */
2335 && ! volatile_refs_p (PATTERN (insn)))
2336 {
2337 /* We don't really delete the insn; just ignore it. */
2338 last_ignored_compare = insn;
2339 break;
2340 }
2341 }
2342 }
2343 }
2344 #endif
2345
2346 #ifdef HAVE_cc0
2347 /* If this is a conditional branch, maybe modify it
2348 if the cc's are in a nonstandard state
2349 so that it accomplishes the same thing that it would
2350 do straightforwardly if the cc's were set up normally. */
2351
2352 if (cc_status.flags != 0
2353 && JUMP_P (insn)
2354 && GET_CODE (body) == SET
2355 && SET_DEST (body) == pc_rtx
2356 && GET_CODE (SET_SRC (body)) == IF_THEN_ELSE
2357 && COMPARISON_P (XEXP (SET_SRC (body), 0))
2358 && XEXP (XEXP (SET_SRC (body), 0), 0) == cc0_rtx)
2359 {
2360 /* This function may alter the contents of its argument
2361 and clear some of the cc_status.flags bits.
2362 It may also return 1 meaning condition now always true
2363 or -1 meaning condition now always false
2364 or 2 meaning condition nontrivial but altered. */
2365 int result = alter_cond (XEXP (SET_SRC (body), 0));
2366 /* If condition now has fixed value, replace the IF_THEN_ELSE
2367 with its then-operand or its else-operand. */
2368 if (result == 1)
2369 SET_SRC (body) = XEXP (SET_SRC (body), 1);
2370 if (result == -1)
2371 SET_SRC (body) = XEXP (SET_SRC (body), 2);
2372
2373 /* The jump is now either unconditional or a no-op.
2374 If it has become a no-op, don't try to output it.
2375 (It would not be recognized.) */
2376 if (SET_SRC (body) == pc_rtx)
2377 {
2378 delete_insn (insn);
2379 break;
2380 }
2381 else if (GET_CODE (SET_SRC (body)) == RETURN)
2382 /* Replace (set (pc) (return)) with (return). */
2383 PATTERN (insn) = body = SET_SRC (body);
2384
2385 /* Rerecognize the instruction if it has changed. */
2386 if (result != 0)
2387 INSN_CODE (insn) = -1;
2388 }
2389
2390 /* If this is a conditional trap, maybe modify it if the cc's
2391 are in a nonstandard state so that it accomplishes the same
2392 thing that it would do straightforwardly if the cc's were
2393 set up normally. */
2394 if (cc_status.flags != 0
2395 && NONJUMP_INSN_P (insn)
2396 && GET_CODE (body) == TRAP_IF
2397 && COMPARISON_P (TRAP_CONDITION (body))
2398 && XEXP (TRAP_CONDITION (body), 0) == cc0_rtx)
2399 {
2400 /* This function may alter the contents of its argument
2401 and clear some of the cc_status.flags bits.
2402 It may also return 1 meaning condition now always true
2403 or -1 meaning condition now always false
2404 or 2 meaning condition nontrivial but altered. */
2405 int result = alter_cond (TRAP_CONDITION (body));
2406
2407 /* If TRAP_CONDITION has become always false, delete the
2408 instruction. */
2409 if (result == -1)
2410 {
2411 delete_insn (insn);
2412 break;
2413 }
2414
2415 /* If TRAP_CONDITION has become always true, replace
2416 TRAP_CONDITION with const_true_rtx. */
2417 if (result == 1)
2418 TRAP_CONDITION (body) = const_true_rtx;
2419
2420 /* Rerecognize the instruction if it has changed. */
2421 if (result != 0)
2422 INSN_CODE (insn) = -1;
2423 }
2424
2425 /* Make same adjustments to instructions that examine the
2426 condition codes without jumping and instructions that
2427 handle conditional moves (if this machine has either one). */
2428
2429 if (cc_status.flags != 0
2430 && set != 0)
2431 {
2432 rtx cond_rtx, then_rtx, else_rtx;
2433
2434 if (!JUMP_P (insn)
2435 && GET_CODE (SET_SRC (set)) == IF_THEN_ELSE)
2436 {
2437 cond_rtx = XEXP (SET_SRC (set), 0);
2438 then_rtx = XEXP (SET_SRC (set), 1);
2439 else_rtx = XEXP (SET_SRC (set), 2);
2440 }
2441 else
2442 {
2443 cond_rtx = SET_SRC (set);
2444 then_rtx = const_true_rtx;
2445 else_rtx = const0_rtx;
2446 }
2447
2448 switch (GET_CODE (cond_rtx))
2449 {
2450 case GTU:
2451 case GT:
2452 case LTU:
2453 case LT:
2454 case GEU:
2455 case GE:
2456 case LEU:
2457 case LE:
2458 case EQ:
2459 case NE:
2460 {
2461 int result;
2462 if (XEXP (cond_rtx, 0) != cc0_rtx)
2463 break;
2464 result = alter_cond (cond_rtx);
2465 if (result == 1)
2466 validate_change (insn, &SET_SRC (set), then_rtx, 0);
2467 else if (result == -1)
2468 validate_change (insn, &SET_SRC (set), else_rtx, 0);
2469 else if (result == 2)
2470 INSN_CODE (insn) = -1;
2471 if (SET_DEST (set) == SET_SRC (set))
2472 delete_insn (insn);
2473 }
2474 break;
2475
2476 default:
2477 break;
2478 }
2479 }
2480
2481 #endif
2482
2483 #ifdef HAVE_peephole
2484 /* Do machine-specific peephole optimizations if desired. */
2485
2486 if (optimize && !flag_no_peephole && !nopeepholes)
2487 {
2488 rtx next = peephole (insn);
2489 /* When peepholing, if there were notes within the peephole,
2490 emit them before the peephole. */
2491 if (next != 0 && next != NEXT_INSN (insn))
2492 {
2493 rtx note, prev = PREV_INSN (insn);
2494
2495 for (note = NEXT_INSN (insn); note != next;
2496 note = NEXT_INSN (note))
2497 final_scan_insn (note, file, optimize, nopeepholes, seen);
2498
2499 /* Put the notes in the proper position for a later
2500 rescan. For example, the SH target can do this
2501 when generating a far jump in a delayed branch
2502 sequence. */
2503 note = NEXT_INSN (insn);
2504 PREV_INSN (note) = prev;
2505 NEXT_INSN (prev) = note;
2506 NEXT_INSN (PREV_INSN (next)) = insn;
2507 PREV_INSN (insn) = PREV_INSN (next);
2508 NEXT_INSN (insn) = next;
2509 PREV_INSN (next) = insn;
2510 }
2511
2512 /* PEEPHOLE might have changed this. */
2513 body = PATTERN (insn);
2514 }
2515 #endif
2516
2517 /* Try to recognize the instruction.
2518 If successful, verify that the operands satisfy the
2519 constraints for the instruction. Crash if they don't,
2520 since `reload' should have changed them so that they do. */
2521
2522 insn_code_number = recog_memoized (insn);
2523 cleanup_subreg_operands (insn);
2524
2525 /* Dump the insn in the assembly for debugging. */
2526 if (flag_dump_rtl_in_asm)
2527 {
2528 print_rtx_head = ASM_COMMENT_START;
2529 print_rtl_single (asm_out_file, insn);
2530 print_rtx_head = "";
2531 }
2532
2533 if (! constrain_operands_cached (1))
2534 fatal_insn_not_found (insn);
2535
2536 /* Some target machines need to prescan each insn before
2537 it is output. */
2538
2539 #ifdef FINAL_PRESCAN_INSN
2540 FINAL_PRESCAN_INSN (insn, recog_data.operand, recog_data.n_operands);
2541 #endif
2542
2543 #ifdef HAVE_conditional_execution
2544 if (GET_CODE (PATTERN (insn)) == COND_EXEC)
2545 current_insn_predicate = COND_EXEC_TEST (PATTERN (insn));
2546 #endif
2547
2548 #ifdef HAVE_cc0
2549 cc_prev_status = cc_status;
2550
2551 /* Update `cc_status' for this instruction.
2552 The instruction's output routine may change it further.
2553 If the output routine for a jump insn needs to depend
2554 on the cc status, it should look at cc_prev_status. */
2555
2556 NOTICE_UPDATE_CC (body, insn);
2557 #endif
2558
2559 current_output_insn = debug_insn = insn;
2560
2561 #if defined (DWARF2_UNWIND_INFO)
2562 if (CALL_P (insn) && dwarf2out_do_frame ())
2563 dwarf2out_frame_debug (insn, false);
2564 #endif
2565
2566 /* Find the proper template for this insn. */
2567 templ = get_insn_template (insn_code_number, insn);
2568
2569 /* If the C code returns 0, it means that it is a jump insn
2570 which follows a deleted test insn, and that test insn
2571 needs to be reinserted. */
2572 if (templ == 0)
2573 {
2574 rtx prev;
2575
2576 gcc_assert (prev_nonnote_insn (insn) == last_ignored_compare);
2577
2578 /* We have already processed the notes between the setter and
2579 the user. Make sure we don't process them again, this is
2580 particularly important if one of the notes is a block
2581 scope note or an EH note. */
2582 for (prev = insn;
2583 prev != last_ignored_compare;
2584 prev = PREV_INSN (prev))
2585 {
2586 if (NOTE_P (prev))
2587 delete_insn (prev); /* Use delete_note. */
2588 }
2589
2590 return prev;
2591 }
2592
2593 /* If the template is the string "#", it means that this insn must
2594 be split. */
2595 if (templ[0] == '#' && templ[1] == '\0')
2596 {
2597 rtx new_rtx = try_split (body, insn, 0);
2598
2599 /* If we didn't split the insn, go away. */
2600 if (new_rtx == insn && PATTERN (new_rtx) == body)
2601 fatal_insn ("could not split insn", insn);
2602
2603 #ifdef HAVE_ATTR_length
2604 /* This instruction should have been split in shorten_branches,
2605 to ensure that we would have valid length info for the
2606 splitees. */
2607 gcc_unreachable ();
2608 #endif
2609
2610 return new_rtx;
2611 }
2612
2613 #ifdef TARGET_UNWIND_INFO
2614 /* ??? This will put the directives in the wrong place if
2615 get_insn_template outputs assembly directly. However calling it
2616 before get_insn_template breaks if the insns is split. */
2617 targetm.asm_out.unwind_emit (asm_out_file, insn);
2618 #endif
2619
2620 if (CALL_P (insn))
2621 {
2622 rtx x = call_from_call_insn (insn);
2623 x = XEXP (x, 0);
2624 if (x && MEM_P (x) && GET_CODE (XEXP (x, 0)) == SYMBOL_REF)
2625 {
2626 tree t;
2627 x = XEXP (x, 0);
2628 t = SYMBOL_REF_DECL (x);
2629 if (t)
2630 assemble_external (t);
2631 }
2632 }
2633
2634 /* Output assembler code from the template. */
2635 output_asm_insn (templ, recog_data.operand);
2636
2637 /* If necessary, report the effect that the instruction has on
2638 the unwind info. We've already done this for delay slots
2639 and call instructions. */
2640 #if defined (DWARF2_UNWIND_INFO)
2641 if (final_sequence == 0
2642 #if !defined (HAVE_prologue)
2643 && !ACCUMULATE_OUTGOING_ARGS
2644 #endif
2645 && dwarf2out_do_frame ())
2646 dwarf2out_frame_debug (insn, true);
2647 #endif
2648
2649 current_output_insn = debug_insn = 0;
2650 }
2651 }
2652 return NEXT_INSN (insn);
2653 }
2654 \f
2655 /* Return whether a source line note needs to be emitted before INSN. */
2656
2657 static bool
2658 notice_source_line (rtx insn)
2659 {
2660 const char *filename;
2661 int linenum;
2662
2663 if (override_filename)
2664 {
2665 filename = override_filename;
2666 linenum = override_linenum;
2667 }
2668 else
2669 {
2670 filename = insn_file (insn);
2671 linenum = insn_line (insn);
2672 }
2673
2674 if (filename
2675 && (force_source_line
2676 || filename != last_filename
2677 || last_linenum != linenum))
2678 {
2679 force_source_line = false;
2680 last_filename = filename;
2681 last_linenum = linenum;
2682 high_block_linenum = MAX (last_linenum, high_block_linenum);
2683 high_function_linenum = MAX (last_linenum, high_function_linenum);
2684 return true;
2685 }
2686 return false;
2687 }
2688 \f
2689 /* For each operand in INSN, simplify (subreg (reg)) so that it refers
2690 directly to the desired hard register. */
2691
2692 void
2693 cleanup_subreg_operands (rtx insn)
2694 {
2695 int i;
2696 bool changed = false;
2697 extract_insn_cached (insn);
2698 for (i = 0; i < recog_data.n_operands; i++)
2699 {
2700 /* The following test cannot use recog_data.operand when testing
2701 for a SUBREG: the underlying object might have been changed
2702 already if we are inside a match_operator expression that
2703 matches the else clause. Instead we test the underlying
2704 expression directly. */
2705 if (GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
2706 {
2707 recog_data.operand[i] = alter_subreg (recog_data.operand_loc[i]);
2708 changed = true;
2709 }
2710 else if (GET_CODE (recog_data.operand[i]) == PLUS
2711 || GET_CODE (recog_data.operand[i]) == MULT
2712 || MEM_P (recog_data.operand[i]))
2713 recog_data.operand[i] = walk_alter_subreg (recog_data.operand_loc[i], &changed);
2714 }
2715
2716 for (i = 0; i < recog_data.n_dups; i++)
2717 {
2718 if (GET_CODE (*recog_data.dup_loc[i]) == SUBREG)
2719 {
2720 *recog_data.dup_loc[i] = alter_subreg (recog_data.dup_loc[i]);
2721 changed = true;
2722 }
2723 else if (GET_CODE (*recog_data.dup_loc[i]) == PLUS
2724 || GET_CODE (*recog_data.dup_loc[i]) == MULT
2725 || MEM_P (*recog_data.dup_loc[i]))
2726 *recog_data.dup_loc[i] = walk_alter_subreg (recog_data.dup_loc[i], &changed);
2727 }
2728 if (changed)
2729 df_insn_rescan (insn);
2730 }
2731
2732 /* If X is a SUBREG, replace it with a REG or a MEM,
2733 based on the thing it is a subreg of. */
2734
2735 rtx
2736 alter_subreg (rtx *xp)
2737 {
2738 rtx x = *xp;
2739 rtx y = SUBREG_REG (x);
2740
2741 /* simplify_subreg does not remove subreg from volatile references.
2742 We are required to. */
2743 if (MEM_P (y))
2744 {
2745 int offset = SUBREG_BYTE (x);
2746
2747 /* For paradoxical subregs on big-endian machines, SUBREG_BYTE
2748 contains 0 instead of the proper offset. See simplify_subreg. */
2749 if (offset == 0
2750 && GET_MODE_SIZE (GET_MODE (y)) < GET_MODE_SIZE (GET_MODE (x)))
2751 {
2752 int difference = GET_MODE_SIZE (GET_MODE (y))
2753 - GET_MODE_SIZE (GET_MODE (x));
2754 if (WORDS_BIG_ENDIAN)
2755 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
2756 if (BYTES_BIG_ENDIAN)
2757 offset += difference % UNITS_PER_WORD;
2758 }
2759
2760 *xp = adjust_address (y, GET_MODE (x), offset);
2761 }
2762 else
2763 {
2764 rtx new_rtx = simplify_subreg (GET_MODE (x), y, GET_MODE (y),
2765 SUBREG_BYTE (x));
2766
2767 if (new_rtx != 0)
2768 *xp = new_rtx;
2769 else if (REG_P (y))
2770 {
2771 /* Simplify_subreg can't handle some REG cases, but we have to. */
2772 unsigned int regno;
2773 HOST_WIDE_INT offset;
2774
2775 regno = subreg_regno (x);
2776 if (subreg_lowpart_p (x))
2777 offset = byte_lowpart_offset (GET_MODE (x), GET_MODE (y));
2778 else
2779 offset = SUBREG_BYTE (x);
2780 *xp = gen_rtx_REG_offset (y, GET_MODE (x), regno, offset);
2781 }
2782 }
2783
2784 return *xp;
2785 }
2786
2787 /* Do alter_subreg on all the SUBREGs contained in X. */
2788
2789 static rtx
2790 walk_alter_subreg (rtx *xp, bool *changed)
2791 {
2792 rtx x = *xp;
2793 switch (GET_CODE (x))
2794 {
2795 case PLUS:
2796 case MULT:
2797 case AND:
2798 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed);
2799 XEXP (x, 1) = walk_alter_subreg (&XEXP (x, 1), changed);
2800 break;
2801
2802 case MEM:
2803 case ZERO_EXTEND:
2804 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed);
2805 break;
2806
2807 case SUBREG:
2808 *changed = true;
2809 return alter_subreg (xp);
2810
2811 default:
2812 break;
2813 }
2814
2815 return *xp;
2816 }
2817 \f
2818 #ifdef HAVE_cc0
2819
2820 /* Given BODY, the body of a jump instruction, alter the jump condition
2821 as required by the bits that are set in cc_status.flags.
2822 Not all of the bits there can be handled at this level in all cases.
2823
2824 The value is normally 0.
2825 1 means that the condition has become always true.
2826 -1 means that the condition has become always false.
2827 2 means that COND has been altered. */
2828
2829 static int
2830 alter_cond (rtx cond)
2831 {
2832 int value = 0;
2833
2834 if (cc_status.flags & CC_REVERSED)
2835 {
2836 value = 2;
2837 PUT_CODE (cond, swap_condition (GET_CODE (cond)));
2838 }
2839
2840 if (cc_status.flags & CC_INVERTED)
2841 {
2842 value = 2;
2843 PUT_CODE (cond, reverse_condition (GET_CODE (cond)));
2844 }
2845
2846 if (cc_status.flags & CC_NOT_POSITIVE)
2847 switch (GET_CODE (cond))
2848 {
2849 case LE:
2850 case LEU:
2851 case GEU:
2852 /* Jump becomes unconditional. */
2853 return 1;
2854
2855 case GT:
2856 case GTU:
2857 case LTU:
2858 /* Jump becomes no-op. */
2859 return -1;
2860
2861 case GE:
2862 PUT_CODE (cond, EQ);
2863 value = 2;
2864 break;
2865
2866 case LT:
2867 PUT_CODE (cond, NE);
2868 value = 2;
2869 break;
2870
2871 default:
2872 break;
2873 }
2874
2875 if (cc_status.flags & CC_NOT_NEGATIVE)
2876 switch (GET_CODE (cond))
2877 {
2878 case GE:
2879 case GEU:
2880 /* Jump becomes unconditional. */
2881 return 1;
2882
2883 case LT:
2884 case LTU:
2885 /* Jump becomes no-op. */
2886 return -1;
2887
2888 case LE:
2889 case LEU:
2890 PUT_CODE (cond, EQ);
2891 value = 2;
2892 break;
2893
2894 case GT:
2895 case GTU:
2896 PUT_CODE (cond, NE);
2897 value = 2;
2898 break;
2899
2900 default:
2901 break;
2902 }
2903
2904 if (cc_status.flags & CC_NO_OVERFLOW)
2905 switch (GET_CODE (cond))
2906 {
2907 case GEU:
2908 /* Jump becomes unconditional. */
2909 return 1;
2910
2911 case LEU:
2912 PUT_CODE (cond, EQ);
2913 value = 2;
2914 break;
2915
2916 case GTU:
2917 PUT_CODE (cond, NE);
2918 value = 2;
2919 break;
2920
2921 case LTU:
2922 /* Jump becomes no-op. */
2923 return -1;
2924
2925 default:
2926 break;
2927 }
2928
2929 if (cc_status.flags & (CC_Z_IN_NOT_N | CC_Z_IN_N))
2930 switch (GET_CODE (cond))
2931 {
2932 default:
2933 gcc_unreachable ();
2934
2935 case NE:
2936 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? GE : LT);
2937 value = 2;
2938 break;
2939
2940 case EQ:
2941 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? LT : GE);
2942 value = 2;
2943 break;
2944 }
2945
2946 if (cc_status.flags & CC_NOT_SIGNED)
2947 /* The flags are valid if signed condition operators are converted
2948 to unsigned. */
2949 switch (GET_CODE (cond))
2950 {
2951 case LE:
2952 PUT_CODE (cond, LEU);
2953 value = 2;
2954 break;
2955
2956 case LT:
2957 PUT_CODE (cond, LTU);
2958 value = 2;
2959 break;
2960
2961 case GT:
2962 PUT_CODE (cond, GTU);
2963 value = 2;
2964 break;
2965
2966 case GE:
2967 PUT_CODE (cond, GEU);
2968 value = 2;
2969 break;
2970
2971 default:
2972 break;
2973 }
2974
2975 return value;
2976 }
2977 #endif
2978 \f
2979 /* Report inconsistency between the assembler template and the operands.
2980 In an `asm', it's the user's fault; otherwise, the compiler's fault. */
2981
2982 void
2983 output_operand_lossage (const char *cmsgid, ...)
2984 {
2985 char *fmt_string;
2986 char *new_message;
2987 const char *pfx_str;
2988 va_list ap;
2989
2990 va_start (ap, cmsgid);
2991
2992 pfx_str = this_is_asm_operands ? _("invalid 'asm': ") : "output_operand: ";
2993 asprintf (&fmt_string, "%s%s", pfx_str, _(cmsgid));
2994 vasprintf (&new_message, fmt_string, ap);
2995
2996 if (this_is_asm_operands)
2997 error_for_asm (this_is_asm_operands, "%s", new_message);
2998 else
2999 internal_error ("%s", new_message);
3000
3001 free (fmt_string);
3002 free (new_message);
3003 va_end (ap);
3004 }
3005 \f
3006 /* Output of assembler code from a template, and its subroutines. */
3007
3008 /* Annotate the assembly with a comment describing the pattern and
3009 alternative used. */
3010
3011 static void
3012 output_asm_name (void)
3013 {
3014 if (debug_insn)
3015 {
3016 int num = INSN_CODE (debug_insn);
3017 fprintf (asm_out_file, "\t%s %d\t%s",
3018 ASM_COMMENT_START, INSN_UID (debug_insn),
3019 insn_data[num].name);
3020 if (insn_data[num].n_alternatives > 1)
3021 fprintf (asm_out_file, "/%d", which_alternative + 1);
3022 #ifdef HAVE_ATTR_length
3023 fprintf (asm_out_file, "\t[length = %d]",
3024 get_attr_length (debug_insn));
3025 #endif
3026 /* Clear this so only the first assembler insn
3027 of any rtl insn will get the special comment for -dp. */
3028 debug_insn = 0;
3029 }
3030 }
3031
3032 /* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it
3033 or its address, return that expr . Set *PADDRESSP to 1 if the expr
3034 corresponds to the address of the object and 0 if to the object. */
3035
3036 static tree
3037 get_mem_expr_from_op (rtx op, int *paddressp)
3038 {
3039 tree expr;
3040 int inner_addressp;
3041
3042 *paddressp = 0;
3043
3044 if (REG_P (op))
3045 return REG_EXPR (op);
3046 else if (!MEM_P (op))
3047 return 0;
3048
3049 if (MEM_EXPR (op) != 0)
3050 return MEM_EXPR (op);
3051
3052 /* Otherwise we have an address, so indicate it and look at the address. */
3053 *paddressp = 1;
3054 op = XEXP (op, 0);
3055
3056 /* First check if we have a decl for the address, then look at the right side
3057 if it is a PLUS. Otherwise, strip off arithmetic and keep looking.
3058 But don't allow the address to itself be indirect. */
3059 if ((expr = get_mem_expr_from_op (op, &inner_addressp)) && ! inner_addressp)
3060 return expr;
3061 else if (GET_CODE (op) == PLUS
3062 && (expr = get_mem_expr_from_op (XEXP (op, 1), &inner_addressp)))
3063 return expr;
3064
3065 while (GET_RTX_CLASS (GET_CODE (op)) == RTX_UNARY
3066 || GET_RTX_CLASS (GET_CODE (op)) == RTX_BIN_ARITH)
3067 op = XEXP (op, 0);
3068
3069 expr = get_mem_expr_from_op (op, &inner_addressp);
3070 return inner_addressp ? 0 : expr;
3071 }
3072
3073 /* Output operand names for assembler instructions. OPERANDS is the
3074 operand vector, OPORDER is the order to write the operands, and NOPS
3075 is the number of operands to write. */
3076
3077 static void
3078 output_asm_operand_names (rtx *operands, int *oporder, int nops)
3079 {
3080 int wrote = 0;
3081 int i;
3082
3083 for (i = 0; i < nops; i++)
3084 {
3085 int addressp;
3086 rtx op = operands[oporder[i]];
3087 tree expr = get_mem_expr_from_op (op, &addressp);
3088
3089 fprintf (asm_out_file, "%c%s",
3090 wrote ? ',' : '\t', wrote ? "" : ASM_COMMENT_START);
3091 wrote = 1;
3092 if (expr)
3093 {
3094 fprintf (asm_out_file, "%s",
3095 addressp ? "*" : "");
3096 print_mem_expr (asm_out_file, expr);
3097 wrote = 1;
3098 }
3099 else if (REG_P (op) && ORIGINAL_REGNO (op)
3100 && ORIGINAL_REGNO (op) != REGNO (op))
3101 fprintf (asm_out_file, " tmp%i", ORIGINAL_REGNO (op));
3102 }
3103 }
3104
3105 /* Output text from TEMPLATE to the assembler output file,
3106 obeying %-directions to substitute operands taken from
3107 the vector OPERANDS.
3108
3109 %N (for N a digit) means print operand N in usual manner.
3110 %lN means require operand N to be a CODE_LABEL or LABEL_REF
3111 and print the label name with no punctuation.
3112 %cN means require operand N to be a constant
3113 and print the constant expression with no punctuation.
3114 %aN means expect operand N to be a memory address
3115 (not a memory reference!) and print a reference
3116 to that address.
3117 %nN means expect operand N to be a constant
3118 and print a constant expression for minus the value
3119 of the operand, with no other punctuation. */
3120
3121 void
3122 output_asm_insn (const char *templ, rtx *operands)
3123 {
3124 const char *p;
3125 int c;
3126 #ifdef ASSEMBLER_DIALECT
3127 int dialect = 0;
3128 #endif
3129 int oporder[MAX_RECOG_OPERANDS];
3130 char opoutput[MAX_RECOG_OPERANDS];
3131 int ops = 0;
3132
3133 /* An insn may return a null string template
3134 in a case where no assembler code is needed. */
3135 if (*templ == 0)
3136 return;
3137
3138 memset (opoutput, 0, sizeof opoutput);
3139 p = templ;
3140 putc ('\t', asm_out_file);
3141
3142 #ifdef ASM_OUTPUT_OPCODE
3143 ASM_OUTPUT_OPCODE (asm_out_file, p);
3144 #endif
3145
3146 while ((c = *p++))
3147 switch (c)
3148 {
3149 case '\n':
3150 if (flag_verbose_asm)
3151 output_asm_operand_names (operands, oporder, ops);
3152 if (flag_print_asm_name)
3153 output_asm_name ();
3154
3155 ops = 0;
3156 memset (opoutput, 0, sizeof opoutput);
3157
3158 putc (c, asm_out_file);
3159 #ifdef ASM_OUTPUT_OPCODE
3160 while ((c = *p) == '\t')
3161 {
3162 putc (c, asm_out_file);
3163 p++;
3164 }
3165 ASM_OUTPUT_OPCODE (asm_out_file, p);
3166 #endif
3167 break;
3168
3169 #ifdef ASSEMBLER_DIALECT
3170 case '{':
3171 {
3172 int i;
3173
3174 if (dialect)
3175 output_operand_lossage ("nested assembly dialect alternatives");
3176 else
3177 dialect = 1;
3178
3179 /* If we want the first dialect, do nothing. Otherwise, skip
3180 DIALECT_NUMBER of strings ending with '|'. */
3181 for (i = 0; i < dialect_number; i++)
3182 {
3183 while (*p && *p != '}' && *p++ != '|')
3184 ;
3185 if (*p == '}')
3186 break;
3187 if (*p == '|')
3188 p++;
3189 }
3190
3191 if (*p == '\0')
3192 output_operand_lossage ("unterminated assembly dialect alternative");
3193 }
3194 break;
3195
3196 case '|':
3197 if (dialect)
3198 {
3199 /* Skip to close brace. */
3200 do
3201 {
3202 if (*p == '\0')
3203 {
3204 output_operand_lossage ("unterminated assembly dialect alternative");
3205 break;
3206 }
3207 }
3208 while (*p++ != '}');
3209 dialect = 0;
3210 }
3211 else
3212 putc (c, asm_out_file);
3213 break;
3214
3215 case '}':
3216 if (! dialect)
3217 putc (c, asm_out_file);
3218 dialect = 0;
3219 break;
3220 #endif
3221
3222 case '%':
3223 /* %% outputs a single %. */
3224 if (*p == '%')
3225 {
3226 p++;
3227 putc (c, asm_out_file);
3228 }
3229 /* %= outputs a number which is unique to each insn in the entire
3230 compilation. This is useful for making local labels that are
3231 referred to more than once in a given insn. */
3232 else if (*p == '=')
3233 {
3234 p++;
3235 fprintf (asm_out_file, "%d", insn_counter);
3236 }
3237 /* % followed by a letter and some digits
3238 outputs an operand in a special way depending on the letter.
3239 Letters `acln' are implemented directly.
3240 Other letters are passed to `output_operand' so that
3241 the PRINT_OPERAND macro can define them. */
3242 else if (ISALPHA (*p))
3243 {
3244 int letter = *p++;
3245 unsigned long opnum;
3246 char *endptr;
3247
3248 opnum = strtoul (p, &endptr, 10);
3249
3250 if (endptr == p)
3251 output_operand_lossage ("operand number missing "
3252 "after %%-letter");
3253 else if (this_is_asm_operands && opnum >= insn_noperands)
3254 output_operand_lossage ("operand number out of range");
3255 else if (letter == 'l')
3256 output_asm_label (operands[opnum]);
3257 else if (letter == 'a')
3258 output_address (operands[opnum]);
3259 else if (letter == 'c')
3260 {
3261 if (CONSTANT_ADDRESS_P (operands[opnum]))
3262 output_addr_const (asm_out_file, operands[opnum]);
3263 else
3264 output_operand (operands[opnum], 'c');
3265 }
3266 else if (letter == 'n')
3267 {
3268 if (GET_CODE (operands[opnum]) == CONST_INT)
3269 fprintf (asm_out_file, HOST_WIDE_INT_PRINT_DEC,
3270 - INTVAL (operands[opnum]));
3271 else
3272 {
3273 putc ('-', asm_out_file);
3274 output_addr_const (asm_out_file, operands[opnum]);
3275 }
3276 }
3277 else
3278 output_operand (operands[opnum], letter);
3279
3280 if (!opoutput[opnum])
3281 oporder[ops++] = opnum;
3282 opoutput[opnum] = 1;
3283
3284 p = endptr;
3285 c = *p;
3286 }
3287 /* % followed by a digit outputs an operand the default way. */
3288 else if (ISDIGIT (*p))
3289 {
3290 unsigned long opnum;
3291 char *endptr;
3292
3293 opnum = strtoul (p, &endptr, 10);
3294 if (this_is_asm_operands && opnum >= insn_noperands)
3295 output_operand_lossage ("operand number out of range");
3296 else
3297 output_operand (operands[opnum], 0);
3298
3299 if (!opoutput[opnum])
3300 oporder[ops++] = opnum;
3301 opoutput[opnum] = 1;
3302
3303 p = endptr;
3304 c = *p;
3305 }
3306 /* % followed by punctuation: output something for that
3307 punctuation character alone, with no operand.
3308 The PRINT_OPERAND macro decides what is actually done. */
3309 #ifdef PRINT_OPERAND_PUNCT_VALID_P
3310 else if (PRINT_OPERAND_PUNCT_VALID_P ((unsigned char) *p))
3311 output_operand (NULL_RTX, *p++);
3312 #endif
3313 else
3314 output_operand_lossage ("invalid %%-code");
3315 break;
3316
3317 default:
3318 putc (c, asm_out_file);
3319 }
3320
3321 /* Write out the variable names for operands, if we know them. */
3322 if (flag_verbose_asm)
3323 output_asm_operand_names (operands, oporder, ops);
3324 if (flag_print_asm_name)
3325 output_asm_name ();
3326
3327 putc ('\n', asm_out_file);
3328 }
3329 \f
3330 /* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */
3331
3332 void
3333 output_asm_label (rtx x)
3334 {
3335 char buf[256];
3336
3337 if (GET_CODE (x) == LABEL_REF)
3338 x = XEXP (x, 0);
3339 if (LABEL_P (x)
3340 || (NOTE_P (x)
3341 && NOTE_KIND (x) == NOTE_INSN_DELETED_LABEL))
3342 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3343 else
3344 output_operand_lossage ("'%%l' operand isn't a label");
3345
3346 assemble_name (asm_out_file, buf);
3347 }
3348
3349 /* Print operand X using machine-dependent assembler syntax.
3350 The macro PRINT_OPERAND is defined just to control this function.
3351 CODE is a non-digit that preceded the operand-number in the % spec,
3352 such as 'z' if the spec was `%z3'. CODE is 0 if there was no char
3353 between the % and the digits.
3354 When CODE is a non-letter, X is 0.
3355
3356 The meanings of the letters are machine-dependent and controlled
3357 by PRINT_OPERAND. */
3358
3359 static void
3360 output_operand (rtx x, int code ATTRIBUTE_UNUSED)
3361 {
3362 if (x && GET_CODE (x) == SUBREG)
3363 x = alter_subreg (&x);
3364
3365 /* X must not be a pseudo reg. */
3366 gcc_assert (!x || !REG_P (x) || REGNO (x) < FIRST_PSEUDO_REGISTER);
3367
3368 PRINT_OPERAND (asm_out_file, x, code);
3369 if (x && MEM_P (x) && GET_CODE (XEXP (x, 0)) == SYMBOL_REF)
3370 {
3371 tree t;
3372 x = XEXP (x, 0);
3373 t = SYMBOL_REF_DECL (x);
3374 if (t)
3375 assemble_external (t);
3376 }
3377 }
3378
3379 /* Print a memory reference operand for address X
3380 using machine-dependent assembler syntax.
3381 The macro PRINT_OPERAND_ADDRESS exists just to control this function. */
3382
3383 void
3384 output_address (rtx x)
3385 {
3386 bool changed = false;
3387 walk_alter_subreg (&x, &changed);
3388 PRINT_OPERAND_ADDRESS (asm_out_file, x);
3389 }
3390 \f
3391 /* Print an integer constant expression in assembler syntax.
3392 Addition and subtraction are the only arithmetic
3393 that may appear in these expressions. */
3394
3395 void
3396 output_addr_const (FILE *file, rtx x)
3397 {
3398 char buf[256];
3399
3400 restart:
3401 switch (GET_CODE (x))
3402 {
3403 case PC:
3404 putc ('.', file);
3405 break;
3406
3407 case SYMBOL_REF:
3408 if (SYMBOL_REF_DECL (x))
3409 mark_decl_referenced (SYMBOL_REF_DECL (x));
3410 #ifdef ASM_OUTPUT_SYMBOL_REF
3411 ASM_OUTPUT_SYMBOL_REF (file, x);
3412 #else
3413 assemble_name (file, XSTR (x, 0));
3414 #endif
3415 break;
3416
3417 case LABEL_REF:
3418 x = XEXP (x, 0);
3419 /* Fall through. */
3420 case CODE_LABEL:
3421 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3422 #ifdef ASM_OUTPUT_LABEL_REF
3423 ASM_OUTPUT_LABEL_REF (file, buf);
3424 #else
3425 assemble_name (file, buf);
3426 #endif
3427 break;
3428
3429 case CONST_INT:
3430 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x));
3431 break;
3432
3433 case CONST:
3434 /* This used to output parentheses around the expression,
3435 but that does not work on the 386 (either ATT or BSD assembler). */
3436 output_addr_const (file, XEXP (x, 0));
3437 break;
3438
3439 case CONST_DOUBLE:
3440 if (GET_MODE (x) == VOIDmode)
3441 {
3442 /* We can use %d if the number is one word and positive. */
3443 if (CONST_DOUBLE_HIGH (x))
3444 fprintf (file, HOST_WIDE_INT_PRINT_DOUBLE_HEX,
3445 (unsigned HOST_WIDE_INT) CONST_DOUBLE_HIGH (x),
3446 (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (x));
3447 else if (CONST_DOUBLE_LOW (x) < 0)
3448 fprintf (file, HOST_WIDE_INT_PRINT_HEX,
3449 (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (x));
3450 else
3451 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x));
3452 }
3453 else
3454 /* We can't handle floating point constants;
3455 PRINT_OPERAND must handle them. */
3456 output_operand_lossage ("floating constant misused");
3457 break;
3458
3459 case CONST_FIXED:
3460 fprintf (file, HOST_WIDE_INT_PRINT_HEX,
3461 (unsigned HOST_WIDE_INT) CONST_FIXED_VALUE_LOW (x));
3462 break;
3463
3464 case PLUS:
3465 /* Some assemblers need integer constants to appear last (eg masm). */
3466 if (GET_CODE (XEXP (x, 0)) == CONST_INT)
3467 {
3468 output_addr_const (file, XEXP (x, 1));
3469 if (INTVAL (XEXP (x, 0)) >= 0)
3470 fprintf (file, "+");
3471 output_addr_const (file, XEXP (x, 0));
3472 }
3473 else
3474 {
3475 output_addr_const (file, XEXP (x, 0));
3476 if (GET_CODE (XEXP (x, 1)) != CONST_INT
3477 || INTVAL (XEXP (x, 1)) >= 0)
3478 fprintf (file, "+");
3479 output_addr_const (file, XEXP (x, 1));
3480 }
3481 break;
3482
3483 case MINUS:
3484 /* Avoid outputting things like x-x or x+5-x,
3485 since some assemblers can't handle that. */
3486 x = simplify_subtraction (x);
3487 if (GET_CODE (x) != MINUS)
3488 goto restart;
3489
3490 output_addr_const (file, XEXP (x, 0));
3491 fprintf (file, "-");
3492 if ((GET_CODE (XEXP (x, 1)) == CONST_INT && INTVAL (XEXP (x, 1)) >= 0)
3493 || GET_CODE (XEXP (x, 1)) == PC
3494 || GET_CODE (XEXP (x, 1)) == SYMBOL_REF)
3495 output_addr_const (file, XEXP (x, 1));
3496 else
3497 {
3498 fputs (targetm.asm_out.open_paren, file);
3499 output_addr_const (file, XEXP (x, 1));
3500 fputs (targetm.asm_out.close_paren, file);
3501 }
3502 break;
3503
3504 case ZERO_EXTEND:
3505 case SIGN_EXTEND:
3506 case SUBREG:
3507 case TRUNCATE:
3508 output_addr_const (file, XEXP (x, 0));
3509 break;
3510
3511 default:
3512 #ifdef OUTPUT_ADDR_CONST_EXTRA
3513 OUTPUT_ADDR_CONST_EXTRA (file, x, fail);
3514 break;
3515
3516 fail:
3517 #endif
3518 output_operand_lossage ("invalid expression as operand");
3519 }
3520 }
3521 \f
3522 /* A poor man's fprintf, with the added features of %I, %R, %L, and %U.
3523 %R prints the value of REGISTER_PREFIX.
3524 %L prints the value of LOCAL_LABEL_PREFIX.
3525 %U prints the value of USER_LABEL_PREFIX.
3526 %I prints the value of IMMEDIATE_PREFIX.
3527 %O runs ASM_OUTPUT_OPCODE to transform what follows in the string.
3528 Also supported are %d, %i, %u, %x, %X, %o, %c, %s and %%.
3529
3530 We handle alternate assembler dialects here, just like output_asm_insn. */
3531
3532 void
3533 asm_fprintf (FILE *file, const char *p, ...)
3534 {
3535 char buf[10];
3536 char *q, c;
3537 va_list argptr;
3538
3539 va_start (argptr, p);
3540
3541 buf[0] = '%';
3542
3543 while ((c = *p++))
3544 switch (c)
3545 {
3546 #ifdef ASSEMBLER_DIALECT
3547 case '{':
3548 {
3549 int i;
3550
3551 /* If we want the first dialect, do nothing. Otherwise, skip
3552 DIALECT_NUMBER of strings ending with '|'. */
3553 for (i = 0; i < dialect_number; i++)
3554 {
3555 while (*p && *p++ != '|')
3556 ;
3557
3558 if (*p == '|')
3559 p++;
3560 }
3561 }
3562 break;
3563
3564 case '|':
3565 /* Skip to close brace. */
3566 while (*p && *p++ != '}')
3567 ;
3568 break;
3569
3570 case '}':
3571 break;
3572 #endif
3573
3574 case '%':
3575 c = *p++;
3576 q = &buf[1];
3577 while (strchr ("-+ #0", c))
3578 {
3579 *q++ = c;
3580 c = *p++;
3581 }
3582 while (ISDIGIT (c) || c == '.')
3583 {
3584 *q++ = c;
3585 c = *p++;
3586 }
3587 switch (c)
3588 {
3589 case '%':
3590 putc ('%', file);
3591 break;
3592
3593 case 'd': case 'i': case 'u':
3594 case 'x': case 'X': case 'o':
3595 case 'c':
3596 *q++ = c;
3597 *q = 0;
3598 fprintf (file, buf, va_arg (argptr, int));
3599 break;
3600
3601 case 'w':
3602 /* This is a prefix to the 'd', 'i', 'u', 'x', 'X', and
3603 'o' cases, but we do not check for those cases. It
3604 means that the value is a HOST_WIDE_INT, which may be
3605 either `long' or `long long'. */
3606 memcpy (q, HOST_WIDE_INT_PRINT, strlen (HOST_WIDE_INT_PRINT));
3607 q += strlen (HOST_WIDE_INT_PRINT);
3608 *q++ = *p++;
3609 *q = 0;
3610 fprintf (file, buf, va_arg (argptr, HOST_WIDE_INT));
3611 break;
3612
3613 case 'l':
3614 *q++ = c;
3615 #ifdef HAVE_LONG_LONG
3616 if (*p == 'l')
3617 {
3618 *q++ = *p++;
3619 *q++ = *p++;
3620 *q = 0;
3621 fprintf (file, buf, va_arg (argptr, long long));
3622 }
3623 else
3624 #endif
3625 {
3626 *q++ = *p++;
3627 *q = 0;
3628 fprintf (file, buf, va_arg (argptr, long));
3629 }
3630
3631 break;
3632
3633 case 's':
3634 *q++ = c;
3635 *q = 0;
3636 fprintf (file, buf, va_arg (argptr, char *));
3637 break;
3638
3639 case 'O':
3640 #ifdef ASM_OUTPUT_OPCODE
3641 ASM_OUTPUT_OPCODE (asm_out_file, p);
3642 #endif
3643 break;
3644
3645 case 'R':
3646 #ifdef REGISTER_PREFIX
3647 fprintf (file, "%s", REGISTER_PREFIX);
3648 #endif
3649 break;
3650
3651 case 'I':
3652 #ifdef IMMEDIATE_PREFIX
3653 fprintf (file, "%s", IMMEDIATE_PREFIX);
3654 #endif
3655 break;
3656
3657 case 'L':
3658 #ifdef LOCAL_LABEL_PREFIX
3659 fprintf (file, "%s", LOCAL_LABEL_PREFIX);
3660 #endif
3661 break;
3662
3663 case 'U':
3664 fputs (user_label_prefix, file);
3665 break;
3666
3667 #ifdef ASM_FPRINTF_EXTENSIONS
3668 /* Uppercase letters are reserved for general use by asm_fprintf
3669 and so are not available to target specific code. In order to
3670 prevent the ASM_FPRINTF_EXTENSIONS macro from using them then,
3671 they are defined here. As they get turned into real extensions
3672 to asm_fprintf they should be removed from this list. */
3673 case 'A': case 'B': case 'C': case 'D': case 'E':
3674 case 'F': case 'G': case 'H': case 'J': case 'K':
3675 case 'M': case 'N': case 'P': case 'Q': case 'S':
3676 case 'T': case 'V': case 'W': case 'Y': case 'Z':
3677 break;
3678
3679 ASM_FPRINTF_EXTENSIONS (file, argptr, p)
3680 #endif
3681 default:
3682 gcc_unreachable ();
3683 }
3684 break;
3685
3686 default:
3687 putc (c, file);
3688 }
3689 va_end (argptr);
3690 }
3691 \f
3692 /* Split up a CONST_DOUBLE or integer constant rtx
3693 into two rtx's for single words,
3694 storing in *FIRST the word that comes first in memory in the target
3695 and in *SECOND the other. */
3696
3697 void
3698 split_double (rtx value, rtx *first, rtx *second)
3699 {
3700 if (GET_CODE (value) == CONST_INT)
3701 {
3702 if (HOST_BITS_PER_WIDE_INT >= (2 * BITS_PER_WORD))
3703 {
3704 /* In this case the CONST_INT holds both target words.
3705 Extract the bits from it into two word-sized pieces.
3706 Sign extend each half to HOST_WIDE_INT. */
3707 unsigned HOST_WIDE_INT low, high;
3708 unsigned HOST_WIDE_INT mask, sign_bit, sign_extend;
3709
3710 /* Set sign_bit to the most significant bit of a word. */
3711 sign_bit = 1;
3712 sign_bit <<= BITS_PER_WORD - 1;
3713
3714 /* Set mask so that all bits of the word are set. We could
3715 have used 1 << BITS_PER_WORD instead of basing the
3716 calculation on sign_bit. However, on machines where
3717 HOST_BITS_PER_WIDE_INT == BITS_PER_WORD, it could cause a
3718 compiler warning, even though the code would never be
3719 executed. */
3720 mask = sign_bit << 1;
3721 mask--;
3722
3723 /* Set sign_extend as any remaining bits. */
3724 sign_extend = ~mask;
3725
3726 /* Pick the lower word and sign-extend it. */
3727 low = INTVAL (value);
3728 low &= mask;
3729 if (low & sign_bit)
3730 low |= sign_extend;
3731
3732 /* Pick the higher word, shifted to the least significant
3733 bits, and sign-extend it. */
3734 high = INTVAL (value);
3735 high >>= BITS_PER_WORD - 1;
3736 high >>= 1;
3737 high &= mask;
3738 if (high & sign_bit)
3739 high |= sign_extend;
3740
3741 /* Store the words in the target machine order. */
3742 if (WORDS_BIG_ENDIAN)
3743 {
3744 *first = GEN_INT (high);
3745 *second = GEN_INT (low);
3746 }
3747 else
3748 {
3749 *first = GEN_INT (low);
3750 *second = GEN_INT (high);
3751 }
3752 }
3753 else
3754 {
3755 /* The rule for using CONST_INT for a wider mode
3756 is that we regard the value as signed.
3757 So sign-extend it. */
3758 rtx high = (INTVAL (value) < 0 ? constm1_rtx : const0_rtx);
3759 if (WORDS_BIG_ENDIAN)
3760 {
3761 *first = high;
3762 *second = value;
3763 }
3764 else
3765 {
3766 *first = value;
3767 *second = high;
3768 }
3769 }
3770 }
3771 else if (GET_CODE (value) != CONST_DOUBLE)
3772 {
3773 if (WORDS_BIG_ENDIAN)
3774 {
3775 *first = const0_rtx;
3776 *second = value;
3777 }
3778 else
3779 {
3780 *first = value;
3781 *second = const0_rtx;
3782 }
3783 }
3784 else if (GET_MODE (value) == VOIDmode
3785 /* This is the old way we did CONST_DOUBLE integers. */
3786 || GET_MODE_CLASS (GET_MODE (value)) == MODE_INT)
3787 {
3788 /* In an integer, the words are defined as most and least significant.
3789 So order them by the target's convention. */
3790 if (WORDS_BIG_ENDIAN)
3791 {
3792 *first = GEN_INT (CONST_DOUBLE_HIGH (value));
3793 *second = GEN_INT (CONST_DOUBLE_LOW (value));
3794 }
3795 else
3796 {
3797 *first = GEN_INT (CONST_DOUBLE_LOW (value));
3798 *second = GEN_INT (CONST_DOUBLE_HIGH (value));
3799 }
3800 }
3801 else
3802 {
3803 REAL_VALUE_TYPE r;
3804 long l[2];
3805 REAL_VALUE_FROM_CONST_DOUBLE (r, value);
3806
3807 /* Note, this converts the REAL_VALUE_TYPE to the target's
3808 format, splits up the floating point double and outputs
3809 exactly 32 bits of it into each of l[0] and l[1] --
3810 not necessarily BITS_PER_WORD bits. */
3811 REAL_VALUE_TO_TARGET_DOUBLE (r, l);
3812
3813 /* If 32 bits is an entire word for the target, but not for the host,
3814 then sign-extend on the host so that the number will look the same
3815 way on the host that it would on the target. See for instance
3816 simplify_unary_operation. The #if is needed to avoid compiler
3817 warnings. */
3818
3819 #if HOST_BITS_PER_LONG > 32
3820 if (BITS_PER_WORD < HOST_BITS_PER_LONG && BITS_PER_WORD == 32)
3821 {
3822 if (l[0] & ((long) 1 << 31))
3823 l[0] |= ((long) (-1) << 32);
3824 if (l[1] & ((long) 1 << 31))
3825 l[1] |= ((long) (-1) << 32);
3826 }
3827 #endif
3828
3829 *first = GEN_INT (l[0]);
3830 *second = GEN_INT (l[1]);
3831 }
3832 }
3833 \f
3834 /* Return nonzero if this function has no function calls. */
3835
3836 int
3837 leaf_function_p (void)
3838 {
3839 rtx insn;
3840 rtx link;
3841
3842 if (crtl->profile || profile_arc_flag)
3843 return 0;
3844
3845 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
3846 {
3847 if (CALL_P (insn)
3848 && ! SIBLING_CALL_P (insn))
3849 return 0;
3850 if (NONJUMP_INSN_P (insn)
3851 && GET_CODE (PATTERN (insn)) == SEQUENCE
3852 && CALL_P (XVECEXP (PATTERN (insn), 0, 0))
3853 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0)))
3854 return 0;
3855 }
3856 for (link = crtl->epilogue_delay_list;
3857 link;
3858 link = XEXP (link, 1))
3859 {
3860 insn = XEXP (link, 0);
3861
3862 if (CALL_P (insn)
3863 && ! SIBLING_CALL_P (insn))
3864 return 0;
3865 if (NONJUMP_INSN_P (insn)
3866 && GET_CODE (PATTERN (insn)) == SEQUENCE
3867 && CALL_P (XVECEXP (PATTERN (insn), 0, 0))
3868 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0)))
3869 return 0;
3870 }
3871
3872 return 1;
3873 }
3874
3875 /* Return 1 if branch is a forward branch.
3876 Uses insn_shuid array, so it works only in the final pass. May be used by
3877 output templates to customary add branch prediction hints.
3878 */
3879 int
3880 final_forward_branch_p (rtx insn)
3881 {
3882 int insn_id, label_id;
3883
3884 gcc_assert (uid_shuid);
3885 insn_id = INSN_SHUID (insn);
3886 label_id = INSN_SHUID (JUMP_LABEL (insn));
3887 /* We've hit some insns that does not have id information available. */
3888 gcc_assert (insn_id && label_id);
3889 return insn_id < label_id;
3890 }
3891
3892 /* On some machines, a function with no call insns
3893 can run faster if it doesn't create its own register window.
3894 When output, the leaf function should use only the "output"
3895 registers. Ordinarily, the function would be compiled to use
3896 the "input" registers to find its arguments; it is a candidate
3897 for leaf treatment if it uses only the "input" registers.
3898 Leaf function treatment means renumbering so the function
3899 uses the "output" registers instead. */
3900
3901 #ifdef LEAF_REGISTERS
3902
3903 /* Return 1 if this function uses only the registers that can be
3904 safely renumbered. */
3905
3906 int
3907 only_leaf_regs_used (void)
3908 {
3909 int i;
3910 const char *const permitted_reg_in_leaf_functions = LEAF_REGISTERS;
3911
3912 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
3913 if ((df_regs_ever_live_p (i) || global_regs[i])
3914 && ! permitted_reg_in_leaf_functions[i])
3915 return 0;
3916
3917 if (crtl->uses_pic_offset_table
3918 && pic_offset_table_rtx != 0
3919 && REG_P (pic_offset_table_rtx)
3920 && ! permitted_reg_in_leaf_functions[REGNO (pic_offset_table_rtx)])
3921 return 0;
3922
3923 return 1;
3924 }
3925
3926 /* Scan all instructions and renumber all registers into those
3927 available in leaf functions. */
3928
3929 static void
3930 leaf_renumber_regs (rtx first)
3931 {
3932 rtx insn;
3933
3934 /* Renumber only the actual patterns.
3935 The reg-notes can contain frame pointer refs,
3936 and renumbering them could crash, and should not be needed. */
3937 for (insn = first; insn; insn = NEXT_INSN (insn))
3938 if (INSN_P (insn))
3939 leaf_renumber_regs_insn (PATTERN (insn));
3940 for (insn = crtl->epilogue_delay_list;
3941 insn;
3942 insn = XEXP (insn, 1))
3943 if (INSN_P (XEXP (insn, 0)))
3944 leaf_renumber_regs_insn (PATTERN (XEXP (insn, 0)));
3945 }
3946
3947 /* Scan IN_RTX and its subexpressions, and renumber all regs into those
3948 available in leaf functions. */
3949
3950 void
3951 leaf_renumber_regs_insn (rtx in_rtx)
3952 {
3953 int i, j;
3954 const char *format_ptr;
3955
3956 if (in_rtx == 0)
3957 return;
3958
3959 /* Renumber all input-registers into output-registers.
3960 renumbered_regs would be 1 for an output-register;
3961 they */
3962
3963 if (REG_P (in_rtx))
3964 {
3965 int newreg;
3966
3967 /* Don't renumber the same reg twice. */
3968 if (in_rtx->used)
3969 return;
3970
3971 newreg = REGNO (in_rtx);
3972 /* Don't try to renumber pseudo regs. It is possible for a pseudo reg
3973 to reach here as part of a REG_NOTE. */
3974 if (newreg >= FIRST_PSEUDO_REGISTER)
3975 {
3976 in_rtx->used = 1;
3977 return;
3978 }
3979 newreg = LEAF_REG_REMAP (newreg);
3980 gcc_assert (newreg >= 0);
3981 df_set_regs_ever_live (REGNO (in_rtx), false);
3982 df_set_regs_ever_live (newreg, true);
3983 SET_REGNO (in_rtx, newreg);
3984 in_rtx->used = 1;
3985 }
3986
3987 if (INSN_P (in_rtx))
3988 {
3989 /* Inside a SEQUENCE, we find insns.
3990 Renumber just the patterns of these insns,
3991 just as we do for the top-level insns. */
3992 leaf_renumber_regs_insn (PATTERN (in_rtx));
3993 return;
3994 }
3995
3996 format_ptr = GET_RTX_FORMAT (GET_CODE (in_rtx));
3997
3998 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (in_rtx)); i++)
3999 switch (*format_ptr++)
4000 {
4001 case 'e':
4002 leaf_renumber_regs_insn (XEXP (in_rtx, i));
4003 break;
4004
4005 case 'E':
4006 if (NULL != XVEC (in_rtx, i))
4007 {
4008 for (j = 0; j < XVECLEN (in_rtx, i); j++)
4009 leaf_renumber_regs_insn (XVECEXP (in_rtx, i, j));
4010 }
4011 break;
4012
4013 case 'S':
4014 case 's':
4015 case '0':
4016 case 'i':
4017 case 'w':
4018 case 'n':
4019 case 'u':
4020 break;
4021
4022 default:
4023 gcc_unreachable ();
4024 }
4025 }
4026 #endif
4027
4028
4029 /* When -gused is used, emit debug info for only used symbols. But in
4030 addition to the standard intercepted debug_hooks there are some direct
4031 calls into this file, i.e., dbxout_symbol, dbxout_parms, and dbxout_reg_params.
4032 Those routines may also be called from a higher level intercepted routine. So
4033 to prevent recording data for an inner call to one of these for an intercept,
4034 we maintain an intercept nesting counter (debug_nesting). We only save the
4035 intercepted arguments if the nesting is 1. */
4036 int debug_nesting = 0;
4037
4038 static tree *symbol_queue;
4039 int symbol_queue_index = 0;
4040 static int symbol_queue_size = 0;
4041
4042 /* Generate the symbols for any queued up type symbols we encountered
4043 while generating the type info for some originally used symbol.
4044 This might generate additional entries in the queue. Only when
4045 the nesting depth goes to 0 is this routine called. */
4046
4047 void
4048 debug_flush_symbol_queue (void)
4049 {
4050 int i;
4051
4052 /* Make sure that additionally queued items are not flushed
4053 prematurely. */
4054
4055 ++debug_nesting;
4056
4057 for (i = 0; i < symbol_queue_index; ++i)
4058 {
4059 /* If we pushed queued symbols then such symbols must be
4060 output no matter what anyone else says. Specifically,
4061 we need to make sure dbxout_symbol() thinks the symbol was
4062 used and also we need to override TYPE_DECL_SUPPRESS_DEBUG
4063 which may be set for outside reasons. */
4064 int saved_tree_used = TREE_USED (symbol_queue[i]);
4065 int saved_suppress_debug = TYPE_DECL_SUPPRESS_DEBUG (symbol_queue[i]);
4066 TREE_USED (symbol_queue[i]) = 1;
4067 TYPE_DECL_SUPPRESS_DEBUG (symbol_queue[i]) = 0;
4068
4069 #ifdef DBX_DEBUGGING_INFO
4070 dbxout_symbol (symbol_queue[i], 0);
4071 #endif
4072
4073 TREE_USED (symbol_queue[i]) = saved_tree_used;
4074 TYPE_DECL_SUPPRESS_DEBUG (symbol_queue[i]) = saved_suppress_debug;
4075 }
4076
4077 symbol_queue_index = 0;
4078 --debug_nesting;
4079 }
4080
4081 /* Queue a type symbol needed as part of the definition of a decl
4082 symbol. These symbols are generated when debug_flush_symbol_queue()
4083 is called. */
4084
4085 void
4086 debug_queue_symbol (tree decl)
4087 {
4088 if (symbol_queue_index >= symbol_queue_size)
4089 {
4090 symbol_queue_size += 10;
4091 symbol_queue = XRESIZEVEC (tree, symbol_queue, symbol_queue_size);
4092 }
4093
4094 symbol_queue[symbol_queue_index++] = decl;
4095 }
4096
4097 /* Free symbol queue. */
4098 void
4099 debug_free_queue (void)
4100 {
4101 if (symbol_queue)
4102 {
4103 free (symbol_queue);
4104 symbol_queue = NULL;
4105 symbol_queue_size = 0;
4106 }
4107 }
4108 \f
4109 /* Turn the RTL into assembly. */
4110 static unsigned int
4111 rest_of_handle_final (void)
4112 {
4113 rtx x;
4114 const char *fnname;
4115
4116 /* Get the function's name, as described by its RTL. This may be
4117 different from the DECL_NAME name used in the source file. */
4118
4119 x = DECL_RTL (current_function_decl);
4120 gcc_assert (MEM_P (x));
4121 x = XEXP (x, 0);
4122 gcc_assert (GET_CODE (x) == SYMBOL_REF);
4123 fnname = XSTR (x, 0);
4124
4125 assemble_start_function (current_function_decl, fnname);
4126 final_start_function (get_insns (), asm_out_file, optimize);
4127 final (get_insns (), asm_out_file, optimize);
4128 final_end_function ();
4129
4130 #ifdef TARGET_UNWIND_INFO
4131 /* ??? The IA-64 ".handlerdata" directive must be issued before
4132 the ".endp" directive that closes the procedure descriptor. */
4133 output_function_exception_table (fnname);
4134 #endif
4135
4136 assemble_end_function (current_function_decl, fnname);
4137
4138 #ifndef TARGET_UNWIND_INFO
4139 /* Otherwise, it feels unclean to switch sections in the middle. */
4140 output_function_exception_table (fnname);
4141 #endif
4142
4143 user_defined_section_attribute = false;
4144
4145 /* Free up reg info memory. */
4146 free_reg_info ();
4147
4148 if (! quiet_flag)
4149 fflush (asm_out_file);
4150
4151 /* Write DBX symbols if requested. */
4152
4153 /* Note that for those inline functions where we don't initially
4154 know for certain that we will be generating an out-of-line copy,
4155 the first invocation of this routine (rest_of_compilation) will
4156 skip over this code by doing a `goto exit_rest_of_compilation;'.
4157 Later on, wrapup_global_declarations will (indirectly) call
4158 rest_of_compilation again for those inline functions that need
4159 to have out-of-line copies generated. During that call, we
4160 *will* be routed past here. */
4161
4162 timevar_push (TV_SYMOUT);
4163 (*debug_hooks->function_decl) (current_function_decl);
4164 timevar_pop (TV_SYMOUT);
4165 if (DECL_STATIC_CONSTRUCTOR (current_function_decl)
4166 && targetm.have_ctors_dtors)
4167 targetm.asm_out.constructor (XEXP (DECL_RTL (current_function_decl), 0),
4168 decl_init_priority_lookup
4169 (current_function_decl));
4170 if (DECL_STATIC_DESTRUCTOR (current_function_decl)
4171 && targetm.have_ctors_dtors)
4172 targetm.asm_out.destructor (XEXP (DECL_RTL (current_function_decl), 0),
4173 decl_fini_priority_lookup
4174 (current_function_decl));
4175 return 0;
4176 }
4177
4178 struct rtl_opt_pass pass_final =
4179 {
4180 {
4181 RTL_PASS,
4182 NULL, /* name */
4183 NULL, /* gate */
4184 rest_of_handle_final, /* execute */
4185 NULL, /* sub */
4186 NULL, /* next */
4187 0, /* static_pass_number */
4188 TV_FINAL, /* tv_id */
4189 0, /* properties_required */
4190 0, /* properties_provided */
4191 0, /* properties_destroyed */
4192 0, /* todo_flags_start */
4193 TODO_ggc_collect /* todo_flags_finish */
4194 }
4195 };
4196
4197
4198 static unsigned int
4199 rest_of_handle_shorten_branches (void)
4200 {
4201 /* Shorten branches. */
4202 shorten_branches (get_insns ());
4203 return 0;
4204 }
4205
4206 struct rtl_opt_pass pass_shorten_branches =
4207 {
4208 {
4209 RTL_PASS,
4210 "shorten", /* name */
4211 NULL, /* gate */
4212 rest_of_handle_shorten_branches, /* execute */
4213 NULL, /* sub */
4214 NULL, /* next */
4215 0, /* static_pass_number */
4216 TV_FINAL, /* tv_id */
4217 0, /* properties_required */
4218 0, /* properties_provided */
4219 0, /* properties_destroyed */
4220 0, /* todo_flags_start */
4221 TODO_dump_func /* todo_flags_finish */
4222 }
4223 };
4224
4225
4226 static unsigned int
4227 rest_of_clean_state (void)
4228 {
4229 rtx insn, next;
4230
4231 /* It is very important to decompose the RTL instruction chain here:
4232 debug information keeps pointing into CODE_LABEL insns inside the function
4233 body. If these remain pointing to the other insns, we end up preserving
4234 whole RTL chain and attached detailed debug info in memory. */
4235 for (insn = get_insns (); insn; insn = next)
4236 {
4237 next = NEXT_INSN (insn);
4238 NEXT_INSN (insn) = NULL;
4239 PREV_INSN (insn) = NULL;
4240 }
4241
4242 /* In case the function was not output,
4243 don't leave any temporary anonymous types
4244 queued up for sdb output. */
4245 #ifdef SDB_DEBUGGING_INFO
4246 if (write_symbols == SDB_DEBUG)
4247 sdbout_types (NULL_TREE);
4248 #endif
4249
4250 reload_completed = 0;
4251 epilogue_completed = 0;
4252 #ifdef STACK_REGS
4253 regstack_completed = 0;
4254 #endif
4255
4256 /* Clear out the insn_length contents now that they are no
4257 longer valid. */
4258 init_insn_lengths ();
4259
4260 /* Show no temporary slots allocated. */
4261 init_temp_slots ();
4262
4263 free_bb_for_insn ();
4264
4265 if (targetm.binds_local_p (current_function_decl))
4266 {
4267 unsigned int pref = crtl->preferred_stack_boundary;
4268 if (crtl->stack_alignment_needed > crtl->preferred_stack_boundary)
4269 pref = crtl->stack_alignment_needed;
4270 cgraph_rtl_info (current_function_decl)->preferred_incoming_stack_boundary
4271 = pref;
4272 }
4273
4274 /* Make sure volatile mem refs aren't considered valid operands for
4275 arithmetic insns. We must call this here if this is a nested inline
4276 function, since the above code leaves us in the init_recog state,
4277 and the function context push/pop code does not save/restore volatile_ok.
4278
4279 ??? Maybe it isn't necessary for expand_start_function to call this
4280 anymore if we do it here? */
4281
4282 init_recog_no_volatile ();
4283
4284 /* We're done with this function. Free up memory if we can. */
4285 free_after_parsing (cfun);
4286 free_after_compilation (cfun);
4287 return 0;
4288 }
4289
4290 struct rtl_opt_pass pass_clean_state =
4291 {
4292 {
4293 RTL_PASS,
4294 NULL, /* name */
4295 NULL, /* gate */
4296 rest_of_clean_state, /* execute */
4297 NULL, /* sub */
4298 NULL, /* next */
4299 0, /* static_pass_number */
4300 TV_FINAL, /* tv_id */
4301 0, /* properties_required */
4302 0, /* properties_provided */
4303 PROP_rtl, /* properties_destroyed */
4304 0, /* todo_flags_start */
4305 0 /* todo_flags_finish */
4306 }
4307 };
4308