re PR c/79153 (-Wimplicit-fallthrough missed warning)
[gcc.git] / gcc / final.c
1 /* Convert RTL to assembler code and output it, for GNU compiler.
2 Copyright (C) 1987-2017 Free Software Foundation, Inc.
3
4 This file is part of GCC.
5
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
9 version.
10
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
19
20 /* This is the final pass of the compiler.
21 It looks at the rtl code for a function and outputs assembler code.
22
23 Call `final_start_function' to output the assembler code for function entry,
24 `final' to output assembler code for some RTL code,
25 `final_end_function' to output assembler code for function exit.
26 If a function is compiled in several pieces, each piece is
27 output separately with `final'.
28
29 Some optimizations are also done at this level.
30 Move instructions that were made unnecessary by good register allocation
31 are detected and omitted from the output. (Though most of these
32 are removed by the last jump pass.)
33
34 Instructions to set the condition codes are omitted when it can be
35 seen that the condition codes already had the desired values.
36
37 In some cases it is sufficient if the inherited condition codes
38 have related values, but this may require the following insn
39 (the one that tests the condition codes) to be modified.
40
41 The code for the function prologue and epilogue are generated
42 directly in assembler by the target functions function_prologue and
43 function_epilogue. Those instructions never exist as rtl. */
44
45 #include "config.h"
46 #define INCLUDE_ALGORITHM /* reverse */
47 #include "system.h"
48 #include "coretypes.h"
49 #include "backend.h"
50 #include "target.h"
51 #include "rtl.h"
52 #include "tree.h"
53 #include "cfghooks.h"
54 #include "df.h"
55 #include "memmodel.h"
56 #include "tm_p.h"
57 #include "insn-config.h"
58 #include "regs.h"
59 #include "emit-rtl.h"
60 #include "recog.h"
61 #include "cgraph.h"
62 #include "tree-pretty-print.h" /* for dump_function_header */
63 #include "varasm.h"
64 #include "insn-attr.h"
65 #include "conditions.h"
66 #include "flags.h"
67 #include "output.h"
68 #include "except.h"
69 #include "rtl-error.h"
70 #include "toplev.h" /* exact_log2, floor_log2 */
71 #include "reload.h"
72 #include "intl.h"
73 #include "cfgrtl.h"
74 #include "debug.h"
75 #include "tree-pass.h"
76 #include "tree-ssa.h"
77 #include "cfgloop.h"
78 #include "params.h"
79 #include "stringpool.h"
80 #include "attribs.h"
81 #include "asan.h"
82 #include "rtl-iter.h"
83 #include "print-rtl.h"
84
85 #ifdef XCOFF_DEBUGGING_INFO
86 #include "xcoffout.h" /* Needed for external data declarations. */
87 #endif
88
89 #include "dwarf2out.h"
90
91 #ifdef DBX_DEBUGGING_INFO
92 #include "dbxout.h"
93 #endif
94
95 /* Most ports that aren't using cc0 don't need to define CC_STATUS_INIT.
96 So define a null default for it to save conditionalization later. */
97 #ifndef CC_STATUS_INIT
98 #define CC_STATUS_INIT
99 #endif
100
101 /* Is the given character a logical line separator for the assembler? */
102 #ifndef IS_ASM_LOGICAL_LINE_SEPARATOR
103 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == ';')
104 #endif
105
106 #ifndef JUMP_TABLES_IN_TEXT_SECTION
107 #define JUMP_TABLES_IN_TEXT_SECTION 0
108 #endif
109
110 /* Bitflags used by final_scan_insn. */
111 #define SEEN_NOTE 1
112 #define SEEN_EMITTED 2
113
114 /* Last insn processed by final_scan_insn. */
115 static rtx_insn *debug_insn;
116 rtx_insn *current_output_insn;
117
118 /* Line number of last NOTE. */
119 static int last_linenum;
120
121 /* Column number of last NOTE. */
122 static int last_columnnum;
123
124 /* Last discriminator written to assembly. */
125 static int last_discriminator;
126
127 /* Discriminator of current block. */
128 static int discriminator;
129
130 /* Highest line number in current block. */
131 static int high_block_linenum;
132
133 /* Likewise for function. */
134 static int high_function_linenum;
135
136 /* Filename of last NOTE. */
137 static const char *last_filename;
138
139 /* Override filename, line and column number. */
140 static const char *override_filename;
141 static int override_linenum;
142 static int override_columnnum;
143
144 /* Whether to force emission of a line note before the next insn. */
145 static bool force_source_line = false;
146
147 extern const int length_unit_log; /* This is defined in insn-attrtab.c. */
148
149 /* Nonzero while outputting an `asm' with operands.
150 This means that inconsistencies are the user's fault, so don't die.
151 The precise value is the insn being output, to pass to error_for_asm. */
152 const rtx_insn *this_is_asm_operands;
153
154 /* Number of operands of this insn, for an `asm' with operands. */
155 static unsigned int insn_noperands;
156
157 /* Compare optimization flag. */
158
159 static rtx last_ignored_compare = 0;
160
161 /* Assign a unique number to each insn that is output.
162 This can be used to generate unique local labels. */
163
164 static int insn_counter = 0;
165
166 /* This variable contains machine-dependent flags (defined in tm.h)
167 set and examined by output routines
168 that describe how to interpret the condition codes properly. */
169
170 CC_STATUS cc_status;
171
172 /* During output of an insn, this contains a copy of cc_status
173 from before the insn. */
174
175 CC_STATUS cc_prev_status;
176
177 /* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */
178
179 static int block_depth;
180
181 /* Nonzero if have enabled APP processing of our assembler output. */
182
183 static int app_on;
184
185 /* If we are outputting an insn sequence, this contains the sequence rtx.
186 Zero otherwise. */
187
188 rtx_sequence *final_sequence;
189
190 #ifdef ASSEMBLER_DIALECT
191
192 /* Number of the assembler dialect to use, starting at 0. */
193 static int dialect_number;
194 #endif
195
196 /* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */
197 rtx current_insn_predicate;
198
199 /* True if printing into -fdump-final-insns= dump. */
200 bool final_insns_dump_p;
201
202 /* True if profile_function should be called, but hasn't been called yet. */
203 static bool need_profile_function;
204
205 static int asm_insn_count (rtx);
206 static void profile_function (FILE *);
207 static void profile_after_prologue (FILE *);
208 static bool notice_source_line (rtx_insn *, bool *);
209 static rtx walk_alter_subreg (rtx *, bool *);
210 static void output_asm_name (void);
211 static void output_alternate_entry_point (FILE *, rtx_insn *);
212 static tree get_mem_expr_from_op (rtx, int *);
213 static void output_asm_operand_names (rtx *, int *, int);
214 #ifdef LEAF_REGISTERS
215 static void leaf_renumber_regs (rtx_insn *);
216 #endif
217 #if HAVE_cc0
218 static int alter_cond (rtx);
219 #endif
220 static int align_fuzz (rtx, rtx, int, unsigned);
221 static void collect_fn_hard_reg_usage (void);
222 static tree get_call_fndecl (rtx_insn *);
223 \f
224 /* Initialize data in final at the beginning of a compilation. */
225
226 void
227 init_final (const char *filename ATTRIBUTE_UNUSED)
228 {
229 app_on = 0;
230 final_sequence = 0;
231
232 #ifdef ASSEMBLER_DIALECT
233 dialect_number = ASSEMBLER_DIALECT;
234 #endif
235 }
236
237 /* Default target function prologue and epilogue assembler output.
238
239 If not overridden for epilogue code, then the function body itself
240 contains return instructions wherever needed. */
241 void
242 default_function_pro_epilogue (FILE *)
243 {
244 }
245
246 void
247 default_function_switched_text_sections (FILE *file ATTRIBUTE_UNUSED,
248 tree decl ATTRIBUTE_UNUSED,
249 bool new_is_cold ATTRIBUTE_UNUSED)
250 {
251 }
252
253 /* Default target hook that outputs nothing to a stream. */
254 void
255 no_asm_to_stream (FILE *file ATTRIBUTE_UNUSED)
256 {
257 }
258
259 /* Enable APP processing of subsequent output.
260 Used before the output from an `asm' statement. */
261
262 void
263 app_enable (void)
264 {
265 if (! app_on)
266 {
267 fputs (ASM_APP_ON, asm_out_file);
268 app_on = 1;
269 }
270 }
271
272 /* Disable APP processing of subsequent output.
273 Called from varasm.c before most kinds of output. */
274
275 void
276 app_disable (void)
277 {
278 if (app_on)
279 {
280 fputs (ASM_APP_OFF, asm_out_file);
281 app_on = 0;
282 }
283 }
284 \f
285 /* Return the number of slots filled in the current
286 delayed branch sequence (we don't count the insn needing the
287 delay slot). Zero if not in a delayed branch sequence. */
288
289 int
290 dbr_sequence_length (void)
291 {
292 if (final_sequence != 0)
293 return XVECLEN (final_sequence, 0) - 1;
294 else
295 return 0;
296 }
297 \f
298 /* The next two pages contain routines used to compute the length of an insn
299 and to shorten branches. */
300
301 /* Arrays for insn lengths, and addresses. The latter is referenced by
302 `insn_current_length'. */
303
304 static int *insn_lengths;
305
306 vec<int> insn_addresses_;
307
308 /* Max uid for which the above arrays are valid. */
309 static int insn_lengths_max_uid;
310
311 /* Address of insn being processed. Used by `insn_current_length'. */
312 int insn_current_address;
313
314 /* Address of insn being processed in previous iteration. */
315 int insn_last_address;
316
317 /* known invariant alignment of insn being processed. */
318 int insn_current_align;
319
320 /* After shorten_branches, for any insn, uid_align[INSN_UID (insn)]
321 gives the next following alignment insn that increases the known
322 alignment, or NULL_RTX if there is no such insn.
323 For any alignment obtained this way, we can again index uid_align with
324 its uid to obtain the next following align that in turn increases the
325 alignment, till we reach NULL_RTX; the sequence obtained this way
326 for each insn we'll call the alignment chain of this insn in the following
327 comments. */
328
329 struct label_alignment
330 {
331 short alignment;
332 short max_skip;
333 };
334
335 static rtx *uid_align;
336 static int *uid_shuid;
337 static struct label_alignment *label_align;
338
339 /* Indicate that branch shortening hasn't yet been done. */
340
341 void
342 init_insn_lengths (void)
343 {
344 if (uid_shuid)
345 {
346 free (uid_shuid);
347 uid_shuid = 0;
348 }
349 if (insn_lengths)
350 {
351 free (insn_lengths);
352 insn_lengths = 0;
353 insn_lengths_max_uid = 0;
354 }
355 if (HAVE_ATTR_length)
356 INSN_ADDRESSES_FREE ();
357 if (uid_align)
358 {
359 free (uid_align);
360 uid_align = 0;
361 }
362 }
363
364 /* Obtain the current length of an insn. If branch shortening has been done,
365 get its actual length. Otherwise, use FALLBACK_FN to calculate the
366 length. */
367 static int
368 get_attr_length_1 (rtx_insn *insn, int (*fallback_fn) (rtx_insn *))
369 {
370 rtx body;
371 int i;
372 int length = 0;
373
374 if (!HAVE_ATTR_length)
375 return 0;
376
377 if (insn_lengths_max_uid > INSN_UID (insn))
378 return insn_lengths[INSN_UID (insn)];
379 else
380 switch (GET_CODE (insn))
381 {
382 case NOTE:
383 case BARRIER:
384 case CODE_LABEL:
385 case DEBUG_INSN:
386 return 0;
387
388 case CALL_INSN:
389 case JUMP_INSN:
390 length = fallback_fn (insn);
391 break;
392
393 case INSN:
394 body = PATTERN (insn);
395 if (GET_CODE (body) == USE || GET_CODE (body) == CLOBBER)
396 return 0;
397
398 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
399 length = asm_insn_count (body) * fallback_fn (insn);
400 else if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (body))
401 for (i = 0; i < seq->len (); i++)
402 length += get_attr_length_1 (seq->insn (i), fallback_fn);
403 else
404 length = fallback_fn (insn);
405 break;
406
407 default:
408 break;
409 }
410
411 #ifdef ADJUST_INSN_LENGTH
412 ADJUST_INSN_LENGTH (insn, length);
413 #endif
414 return length;
415 }
416
417 /* Obtain the current length of an insn. If branch shortening has been done,
418 get its actual length. Otherwise, get its maximum length. */
419 int
420 get_attr_length (rtx_insn *insn)
421 {
422 return get_attr_length_1 (insn, insn_default_length);
423 }
424
425 /* Obtain the current length of an insn. If branch shortening has been done,
426 get its actual length. Otherwise, get its minimum length. */
427 int
428 get_attr_min_length (rtx_insn *insn)
429 {
430 return get_attr_length_1 (insn, insn_min_length);
431 }
432 \f
433 /* Code to handle alignment inside shorten_branches. */
434
435 /* Here is an explanation how the algorithm in align_fuzz can give
436 proper results:
437
438 Call a sequence of instructions beginning with alignment point X
439 and continuing until the next alignment point `block X'. When `X'
440 is used in an expression, it means the alignment value of the
441 alignment point.
442
443 Call the distance between the start of the first insn of block X, and
444 the end of the last insn of block X `IX', for the `inner size of X'.
445 This is clearly the sum of the instruction lengths.
446
447 Likewise with the next alignment-delimited block following X, which we
448 shall call block Y.
449
450 Call the distance between the start of the first insn of block X, and
451 the start of the first insn of block Y `OX', for the `outer size of X'.
452
453 The estimated padding is then OX - IX.
454
455 OX can be safely estimated as
456
457 if (X >= Y)
458 OX = round_up(IX, Y)
459 else
460 OX = round_up(IX, X) + Y - X
461
462 Clearly est(IX) >= real(IX), because that only depends on the
463 instruction lengths, and those being overestimated is a given.
464
465 Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so
466 we needn't worry about that when thinking about OX.
467
468 When X >= Y, the alignment provided by Y adds no uncertainty factor
469 for branch ranges starting before X, so we can just round what we have.
470 But when X < Y, we don't know anything about the, so to speak,
471 `middle bits', so we have to assume the worst when aligning up from an
472 address mod X to one mod Y, which is Y - X. */
473
474 #ifndef LABEL_ALIGN
475 #define LABEL_ALIGN(LABEL) align_labels_log
476 #endif
477
478 #ifndef LOOP_ALIGN
479 #define LOOP_ALIGN(LABEL) align_loops_log
480 #endif
481
482 #ifndef LABEL_ALIGN_AFTER_BARRIER
483 #define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0
484 #endif
485
486 #ifndef JUMP_ALIGN
487 #define JUMP_ALIGN(LABEL) align_jumps_log
488 #endif
489
490 int
491 default_label_align_after_barrier_max_skip (rtx_insn *insn ATTRIBUTE_UNUSED)
492 {
493 return 0;
494 }
495
496 int
497 default_loop_align_max_skip (rtx_insn *insn ATTRIBUTE_UNUSED)
498 {
499 return align_loops_max_skip;
500 }
501
502 int
503 default_label_align_max_skip (rtx_insn *insn ATTRIBUTE_UNUSED)
504 {
505 return align_labels_max_skip;
506 }
507
508 int
509 default_jump_align_max_skip (rtx_insn *insn ATTRIBUTE_UNUSED)
510 {
511 return align_jumps_max_skip;
512 }
513
514 #ifndef ADDR_VEC_ALIGN
515 static int
516 final_addr_vec_align (rtx_jump_table_data *addr_vec)
517 {
518 int align = GET_MODE_SIZE (addr_vec->get_data_mode ());
519
520 if (align > BIGGEST_ALIGNMENT / BITS_PER_UNIT)
521 align = BIGGEST_ALIGNMENT / BITS_PER_UNIT;
522 return exact_log2 (align);
523
524 }
525
526 #define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC)
527 #endif
528
529 #ifndef INSN_LENGTH_ALIGNMENT
530 #define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log
531 #endif
532
533 #define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)])
534
535 static int min_labelno, max_labelno;
536
537 #define LABEL_TO_ALIGNMENT(LABEL) \
538 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment)
539
540 #define LABEL_TO_MAX_SKIP(LABEL) \
541 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip)
542
543 /* For the benefit of port specific code do this also as a function. */
544
545 int
546 label_to_alignment (rtx label)
547 {
548 if (CODE_LABEL_NUMBER (label) <= max_labelno)
549 return LABEL_TO_ALIGNMENT (label);
550 return 0;
551 }
552
553 int
554 label_to_max_skip (rtx label)
555 {
556 if (CODE_LABEL_NUMBER (label) <= max_labelno)
557 return LABEL_TO_MAX_SKIP (label);
558 return 0;
559 }
560
561 /* The differences in addresses
562 between a branch and its target might grow or shrink depending on
563 the alignment the start insn of the range (the branch for a forward
564 branch or the label for a backward branch) starts out on; if these
565 differences are used naively, they can even oscillate infinitely.
566 We therefore want to compute a 'worst case' address difference that
567 is independent of the alignment the start insn of the range end
568 up on, and that is at least as large as the actual difference.
569 The function align_fuzz calculates the amount we have to add to the
570 naively computed difference, by traversing the part of the alignment
571 chain of the start insn of the range that is in front of the end insn
572 of the range, and considering for each alignment the maximum amount
573 that it might contribute to a size increase.
574
575 For casesi tables, we also want to know worst case minimum amounts of
576 address difference, in case a machine description wants to introduce
577 some common offset that is added to all offsets in a table.
578 For this purpose, align_fuzz with a growth argument of 0 computes the
579 appropriate adjustment. */
580
581 /* Compute the maximum delta by which the difference of the addresses of
582 START and END might grow / shrink due to a different address for start
583 which changes the size of alignment insns between START and END.
584 KNOWN_ALIGN_LOG is the alignment known for START.
585 GROWTH should be ~0 if the objective is to compute potential code size
586 increase, and 0 if the objective is to compute potential shrink.
587 The return value is undefined for any other value of GROWTH. */
588
589 static int
590 align_fuzz (rtx start, rtx end, int known_align_log, unsigned int growth)
591 {
592 int uid = INSN_UID (start);
593 rtx align_label;
594 int known_align = 1 << known_align_log;
595 int end_shuid = INSN_SHUID (end);
596 int fuzz = 0;
597
598 for (align_label = uid_align[uid]; align_label; align_label = uid_align[uid])
599 {
600 int align_addr, new_align;
601
602 uid = INSN_UID (align_label);
603 align_addr = INSN_ADDRESSES (uid) - insn_lengths[uid];
604 if (uid_shuid[uid] > end_shuid)
605 break;
606 known_align_log = LABEL_TO_ALIGNMENT (align_label);
607 new_align = 1 << known_align_log;
608 if (new_align < known_align)
609 continue;
610 fuzz += (-align_addr ^ growth) & (new_align - known_align);
611 known_align = new_align;
612 }
613 return fuzz;
614 }
615
616 /* Compute a worst-case reference address of a branch so that it
617 can be safely used in the presence of aligned labels. Since the
618 size of the branch itself is unknown, the size of the branch is
619 not included in the range. I.e. for a forward branch, the reference
620 address is the end address of the branch as known from the previous
621 branch shortening pass, minus a value to account for possible size
622 increase due to alignment. For a backward branch, it is the start
623 address of the branch as known from the current pass, plus a value
624 to account for possible size increase due to alignment.
625 NB.: Therefore, the maximum offset allowed for backward branches needs
626 to exclude the branch size. */
627
628 int
629 insn_current_reference_address (rtx_insn *branch)
630 {
631 rtx dest;
632 int seq_uid;
633
634 if (! INSN_ADDRESSES_SET_P ())
635 return 0;
636
637 rtx_insn *seq = NEXT_INSN (PREV_INSN (branch));
638 seq_uid = INSN_UID (seq);
639 if (!JUMP_P (branch))
640 /* This can happen for example on the PA; the objective is to know the
641 offset to address something in front of the start of the function.
642 Thus, we can treat it like a backward branch.
643 We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than
644 any alignment we'd encounter, so we skip the call to align_fuzz. */
645 return insn_current_address;
646 dest = JUMP_LABEL (branch);
647
648 /* BRANCH has no proper alignment chain set, so use SEQ.
649 BRANCH also has no INSN_SHUID. */
650 if (INSN_SHUID (seq) < INSN_SHUID (dest))
651 {
652 /* Forward branch. */
653 return (insn_last_address + insn_lengths[seq_uid]
654 - align_fuzz (seq, dest, length_unit_log, ~0));
655 }
656 else
657 {
658 /* Backward branch. */
659 return (insn_current_address
660 + align_fuzz (dest, seq, length_unit_log, ~0));
661 }
662 }
663 \f
664 /* Compute branch alignments based on CFG profile. */
665
666 unsigned int
667 compute_alignments (void)
668 {
669 int log, max_skip, max_log;
670 basic_block bb;
671
672 if (label_align)
673 {
674 free (label_align);
675 label_align = 0;
676 }
677
678 max_labelno = max_label_num ();
679 min_labelno = get_first_label_num ();
680 label_align = XCNEWVEC (struct label_alignment, max_labelno - min_labelno + 1);
681
682 /* If not optimizing or optimizing for size, don't assign any alignments. */
683 if (! optimize || optimize_function_for_size_p (cfun))
684 return 0;
685
686 if (dump_file)
687 {
688 dump_reg_info (dump_file);
689 dump_flow_info (dump_file, TDF_DETAILS);
690 flow_loops_dump (dump_file, NULL, 1);
691 }
692 loop_optimizer_init (AVOID_CFG_MODIFICATIONS);
693 profile_count count_threshold = cfun->cfg->count_max.apply_scale
694 (1, PARAM_VALUE (PARAM_ALIGN_THRESHOLD));
695
696 if (dump_file)
697 {
698 fprintf (dump_file, "count_max: ");
699 cfun->cfg->count_max.dump (dump_file);
700 fprintf (dump_file, "\n");
701 }
702 FOR_EACH_BB_FN (bb, cfun)
703 {
704 rtx_insn *label = BB_HEAD (bb);
705 bool has_fallthru = 0;
706 edge e;
707 edge_iterator ei;
708
709 if (!LABEL_P (label)
710 || optimize_bb_for_size_p (bb))
711 {
712 if (dump_file)
713 fprintf (dump_file,
714 "BB %4i loop %2i loop_depth %2i skipped.\n",
715 bb->index,
716 bb->loop_father->num,
717 bb_loop_depth (bb));
718 continue;
719 }
720 max_log = LABEL_ALIGN (label);
721 max_skip = targetm.asm_out.label_align_max_skip (label);
722 profile_count fallthru_count = profile_count::zero ();
723 profile_count branch_count = profile_count::zero ();
724
725 FOR_EACH_EDGE (e, ei, bb->preds)
726 {
727 if (e->flags & EDGE_FALLTHRU)
728 has_fallthru = 1, fallthru_count += e->count ();
729 else
730 branch_count += e->count ();
731 }
732 if (dump_file)
733 {
734 fprintf (dump_file, "BB %4i loop %2i loop_depth"
735 " %2i fall ",
736 bb->index, bb->loop_father->num,
737 bb_loop_depth (bb));
738 fallthru_count.dump (dump_file);
739 fprintf (dump_file, " branch ");
740 branch_count.dump (dump_file);
741 if (!bb->loop_father->inner && bb->loop_father->num)
742 fprintf (dump_file, " inner_loop");
743 if (bb->loop_father->header == bb)
744 fprintf (dump_file, " loop_header");
745 fprintf (dump_file, "\n");
746 }
747 if (!fallthru_count.initialized_p () || !branch_count.initialized_p ())
748 continue;
749
750 /* There are two purposes to align block with no fallthru incoming edge:
751 1) to avoid fetch stalls when branch destination is near cache boundary
752 2) to improve cache efficiency in case the previous block is not executed
753 (so it does not need to be in the cache).
754
755 We to catch first case, we align frequently executed blocks.
756 To catch the second, we align blocks that are executed more frequently
757 than the predecessor and the predecessor is likely to not be executed
758 when function is called. */
759
760 if (!has_fallthru
761 && (branch_count > count_threshold
762 || (bb->count > bb->prev_bb->count.apply_scale (10, 1)
763 && (bb->prev_bb->count
764 <= ENTRY_BLOCK_PTR_FOR_FN (cfun)
765 ->count.apply_scale (1, 2)))))
766 {
767 log = JUMP_ALIGN (label);
768 if (dump_file)
769 fprintf (dump_file, " jump alignment added.\n");
770 if (max_log < log)
771 {
772 max_log = log;
773 max_skip = targetm.asm_out.jump_align_max_skip (label);
774 }
775 }
776 /* In case block is frequent and reached mostly by non-fallthru edge,
777 align it. It is most likely a first block of loop. */
778 if (has_fallthru
779 && !(single_succ_p (bb)
780 && single_succ (bb) == EXIT_BLOCK_PTR_FOR_FN (cfun))
781 && optimize_bb_for_speed_p (bb)
782 && branch_count + fallthru_count > count_threshold
783 && (branch_count
784 > fallthru_count.apply_scale
785 (PARAM_VALUE (PARAM_ALIGN_LOOP_ITERATIONS), 1)))
786 {
787 log = LOOP_ALIGN (label);
788 if (dump_file)
789 fprintf (dump_file, " internal loop alignment added.\n");
790 if (max_log < log)
791 {
792 max_log = log;
793 max_skip = targetm.asm_out.loop_align_max_skip (label);
794 }
795 }
796 LABEL_TO_ALIGNMENT (label) = max_log;
797 LABEL_TO_MAX_SKIP (label) = max_skip;
798 }
799
800 loop_optimizer_finalize ();
801 free_dominance_info (CDI_DOMINATORS);
802 return 0;
803 }
804
805 /* Grow the LABEL_ALIGN array after new labels are created. */
806
807 static void
808 grow_label_align (void)
809 {
810 int old = max_labelno;
811 int n_labels;
812 int n_old_labels;
813
814 max_labelno = max_label_num ();
815
816 n_labels = max_labelno - min_labelno + 1;
817 n_old_labels = old - min_labelno + 1;
818
819 label_align = XRESIZEVEC (struct label_alignment, label_align, n_labels);
820
821 /* Range of labels grows monotonically in the function. Failing here
822 means that the initialization of array got lost. */
823 gcc_assert (n_old_labels <= n_labels);
824
825 memset (label_align + n_old_labels, 0,
826 (n_labels - n_old_labels) * sizeof (struct label_alignment));
827 }
828
829 /* Update the already computed alignment information. LABEL_PAIRS is a vector
830 made up of pairs of labels for which the alignment information of the first
831 element will be copied from that of the second element. */
832
833 void
834 update_alignments (vec<rtx> &label_pairs)
835 {
836 unsigned int i = 0;
837 rtx iter, label = NULL_RTX;
838
839 if (max_labelno != max_label_num ())
840 grow_label_align ();
841
842 FOR_EACH_VEC_ELT (label_pairs, i, iter)
843 if (i & 1)
844 {
845 LABEL_TO_ALIGNMENT (label) = LABEL_TO_ALIGNMENT (iter);
846 LABEL_TO_MAX_SKIP (label) = LABEL_TO_MAX_SKIP (iter);
847 }
848 else
849 label = iter;
850 }
851
852 namespace {
853
854 const pass_data pass_data_compute_alignments =
855 {
856 RTL_PASS, /* type */
857 "alignments", /* name */
858 OPTGROUP_NONE, /* optinfo_flags */
859 TV_NONE, /* tv_id */
860 0, /* properties_required */
861 0, /* properties_provided */
862 0, /* properties_destroyed */
863 0, /* todo_flags_start */
864 0, /* todo_flags_finish */
865 };
866
867 class pass_compute_alignments : public rtl_opt_pass
868 {
869 public:
870 pass_compute_alignments (gcc::context *ctxt)
871 : rtl_opt_pass (pass_data_compute_alignments, ctxt)
872 {}
873
874 /* opt_pass methods: */
875 virtual unsigned int execute (function *) { return compute_alignments (); }
876
877 }; // class pass_compute_alignments
878
879 } // anon namespace
880
881 rtl_opt_pass *
882 make_pass_compute_alignments (gcc::context *ctxt)
883 {
884 return new pass_compute_alignments (ctxt);
885 }
886
887 \f
888 /* Make a pass over all insns and compute their actual lengths by shortening
889 any branches of variable length if possible. */
890
891 /* shorten_branches might be called multiple times: for example, the SH
892 port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG.
893 In order to do this, it needs proper length information, which it obtains
894 by calling shorten_branches. This cannot be collapsed with
895 shorten_branches itself into a single pass unless we also want to integrate
896 reorg.c, since the branch splitting exposes new instructions with delay
897 slots. */
898
899 void
900 shorten_branches (rtx_insn *first)
901 {
902 rtx_insn *insn;
903 int max_uid;
904 int i;
905 int max_log;
906 int max_skip;
907 #define MAX_CODE_ALIGN 16
908 rtx_insn *seq;
909 int something_changed = 1;
910 char *varying_length;
911 rtx body;
912 int uid;
913 rtx align_tab[MAX_CODE_ALIGN];
914
915 /* Compute maximum UID and allocate label_align / uid_shuid. */
916 max_uid = get_max_uid ();
917
918 /* Free uid_shuid before reallocating it. */
919 free (uid_shuid);
920
921 uid_shuid = XNEWVEC (int, max_uid);
922
923 if (max_labelno != max_label_num ())
924 grow_label_align ();
925
926 /* Initialize label_align and set up uid_shuid to be strictly
927 monotonically rising with insn order. */
928 /* We use max_log here to keep track of the maximum alignment we want to
929 impose on the next CODE_LABEL (or the current one if we are processing
930 the CODE_LABEL itself). */
931
932 max_log = 0;
933 max_skip = 0;
934
935 for (insn = get_insns (), i = 1; insn; insn = NEXT_INSN (insn))
936 {
937 int log;
938
939 INSN_SHUID (insn) = i++;
940 if (INSN_P (insn))
941 continue;
942
943 if (rtx_code_label *label = dyn_cast <rtx_code_label *> (insn))
944 {
945 /* Merge in alignments computed by compute_alignments. */
946 log = LABEL_TO_ALIGNMENT (label);
947 if (max_log < log)
948 {
949 max_log = log;
950 max_skip = LABEL_TO_MAX_SKIP (label);
951 }
952
953 rtx_jump_table_data *table = jump_table_for_label (label);
954 if (!table)
955 {
956 log = LABEL_ALIGN (label);
957 if (max_log < log)
958 {
959 max_log = log;
960 max_skip = targetm.asm_out.label_align_max_skip (label);
961 }
962 }
963 /* ADDR_VECs only take room if read-only data goes into the text
964 section. */
965 if ((JUMP_TABLES_IN_TEXT_SECTION
966 || readonly_data_section == text_section)
967 && table)
968 {
969 log = ADDR_VEC_ALIGN (table);
970 if (max_log < log)
971 {
972 max_log = log;
973 max_skip = targetm.asm_out.label_align_max_skip (label);
974 }
975 }
976 LABEL_TO_ALIGNMENT (label) = max_log;
977 LABEL_TO_MAX_SKIP (label) = max_skip;
978 max_log = 0;
979 max_skip = 0;
980 }
981 else if (BARRIER_P (insn))
982 {
983 rtx_insn *label;
984
985 for (label = insn; label && ! INSN_P (label);
986 label = NEXT_INSN (label))
987 if (LABEL_P (label))
988 {
989 log = LABEL_ALIGN_AFTER_BARRIER (insn);
990 if (max_log < log)
991 {
992 max_log = log;
993 max_skip = targetm.asm_out.label_align_after_barrier_max_skip (label);
994 }
995 break;
996 }
997 }
998 }
999 if (!HAVE_ATTR_length)
1000 return;
1001
1002 /* Allocate the rest of the arrays. */
1003 insn_lengths = XNEWVEC (int, max_uid);
1004 insn_lengths_max_uid = max_uid;
1005 /* Syntax errors can lead to labels being outside of the main insn stream.
1006 Initialize insn_addresses, so that we get reproducible results. */
1007 INSN_ADDRESSES_ALLOC (max_uid);
1008
1009 varying_length = XCNEWVEC (char, max_uid);
1010
1011 /* Initialize uid_align. We scan instructions
1012 from end to start, and keep in align_tab[n] the last seen insn
1013 that does an alignment of at least n+1, i.e. the successor
1014 in the alignment chain for an insn that does / has a known
1015 alignment of n. */
1016 uid_align = XCNEWVEC (rtx, max_uid);
1017
1018 for (i = MAX_CODE_ALIGN; --i >= 0;)
1019 align_tab[i] = NULL_RTX;
1020 seq = get_last_insn ();
1021 for (; seq; seq = PREV_INSN (seq))
1022 {
1023 int uid = INSN_UID (seq);
1024 int log;
1025 log = (LABEL_P (seq) ? LABEL_TO_ALIGNMENT (seq) : 0);
1026 uid_align[uid] = align_tab[0];
1027 if (log)
1028 {
1029 /* Found an alignment label. */
1030 uid_align[uid] = align_tab[log];
1031 for (i = log - 1; i >= 0; i--)
1032 align_tab[i] = seq;
1033 }
1034 }
1035
1036 /* When optimizing, we start assuming minimum length, and keep increasing
1037 lengths as we find the need for this, till nothing changes.
1038 When not optimizing, we start assuming maximum lengths, and
1039 do a single pass to update the lengths. */
1040 bool increasing = optimize != 0;
1041
1042 #ifdef CASE_VECTOR_SHORTEN_MODE
1043 if (optimize)
1044 {
1045 /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum
1046 label fields. */
1047
1048 int min_shuid = INSN_SHUID (get_insns ()) - 1;
1049 int max_shuid = INSN_SHUID (get_last_insn ()) + 1;
1050 int rel;
1051
1052 for (insn = first; insn != 0; insn = NEXT_INSN (insn))
1053 {
1054 rtx min_lab = NULL_RTX, max_lab = NULL_RTX, pat;
1055 int len, i, min, max, insn_shuid;
1056 int min_align;
1057 addr_diff_vec_flags flags;
1058
1059 if (! JUMP_TABLE_DATA_P (insn)
1060 || GET_CODE (PATTERN (insn)) != ADDR_DIFF_VEC)
1061 continue;
1062 pat = PATTERN (insn);
1063 len = XVECLEN (pat, 1);
1064 gcc_assert (len > 0);
1065 min_align = MAX_CODE_ALIGN;
1066 for (min = max_shuid, max = min_shuid, i = len - 1; i >= 0; i--)
1067 {
1068 rtx lab = XEXP (XVECEXP (pat, 1, i), 0);
1069 int shuid = INSN_SHUID (lab);
1070 if (shuid < min)
1071 {
1072 min = shuid;
1073 min_lab = lab;
1074 }
1075 if (shuid > max)
1076 {
1077 max = shuid;
1078 max_lab = lab;
1079 }
1080 if (min_align > LABEL_TO_ALIGNMENT (lab))
1081 min_align = LABEL_TO_ALIGNMENT (lab);
1082 }
1083 XEXP (pat, 2) = gen_rtx_LABEL_REF (Pmode, min_lab);
1084 XEXP (pat, 3) = gen_rtx_LABEL_REF (Pmode, max_lab);
1085 insn_shuid = INSN_SHUID (insn);
1086 rel = INSN_SHUID (XEXP (XEXP (pat, 0), 0));
1087 memset (&flags, 0, sizeof (flags));
1088 flags.min_align = min_align;
1089 flags.base_after_vec = rel > insn_shuid;
1090 flags.min_after_vec = min > insn_shuid;
1091 flags.max_after_vec = max > insn_shuid;
1092 flags.min_after_base = min > rel;
1093 flags.max_after_base = max > rel;
1094 ADDR_DIFF_VEC_FLAGS (pat) = flags;
1095
1096 if (increasing)
1097 PUT_MODE (pat, CASE_VECTOR_SHORTEN_MODE (0, 0, pat));
1098 }
1099 }
1100 #endif /* CASE_VECTOR_SHORTEN_MODE */
1101
1102 /* Compute initial lengths, addresses, and varying flags for each insn. */
1103 int (*length_fun) (rtx_insn *) = increasing ? insn_min_length : insn_default_length;
1104
1105 for (insn_current_address = 0, insn = first;
1106 insn != 0;
1107 insn_current_address += insn_lengths[uid], insn = NEXT_INSN (insn))
1108 {
1109 uid = INSN_UID (insn);
1110
1111 insn_lengths[uid] = 0;
1112
1113 if (LABEL_P (insn))
1114 {
1115 int log = LABEL_TO_ALIGNMENT (insn);
1116 if (log)
1117 {
1118 int align = 1 << log;
1119 int new_address = (insn_current_address + align - 1) & -align;
1120 insn_lengths[uid] = new_address - insn_current_address;
1121 }
1122 }
1123
1124 INSN_ADDRESSES (uid) = insn_current_address + insn_lengths[uid];
1125
1126 if (NOTE_P (insn) || BARRIER_P (insn)
1127 || LABEL_P (insn) || DEBUG_INSN_P (insn))
1128 continue;
1129 if (insn->deleted ())
1130 continue;
1131
1132 body = PATTERN (insn);
1133 if (rtx_jump_table_data *table = dyn_cast <rtx_jump_table_data *> (insn))
1134 {
1135 /* This only takes room if read-only data goes into the text
1136 section. */
1137 if (JUMP_TABLES_IN_TEXT_SECTION
1138 || readonly_data_section == text_section)
1139 insn_lengths[uid] = (XVECLEN (body,
1140 GET_CODE (body) == ADDR_DIFF_VEC)
1141 * GET_MODE_SIZE (table->get_data_mode ()));
1142 /* Alignment is handled by ADDR_VEC_ALIGN. */
1143 }
1144 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
1145 insn_lengths[uid] = asm_insn_count (body) * insn_default_length (insn);
1146 else if (rtx_sequence *body_seq = dyn_cast <rtx_sequence *> (body))
1147 {
1148 int i;
1149 int const_delay_slots;
1150 if (DELAY_SLOTS)
1151 const_delay_slots = const_num_delay_slots (body_seq->insn (0));
1152 else
1153 const_delay_slots = 0;
1154
1155 int (*inner_length_fun) (rtx_insn *)
1156 = const_delay_slots ? length_fun : insn_default_length;
1157 /* Inside a delay slot sequence, we do not do any branch shortening
1158 if the shortening could change the number of delay slots
1159 of the branch. */
1160 for (i = 0; i < body_seq->len (); i++)
1161 {
1162 rtx_insn *inner_insn = body_seq->insn (i);
1163 int inner_uid = INSN_UID (inner_insn);
1164 int inner_length;
1165
1166 if (GET_CODE (PATTERN (inner_insn)) == ASM_INPUT
1167 || asm_noperands (PATTERN (inner_insn)) >= 0)
1168 inner_length = (asm_insn_count (PATTERN (inner_insn))
1169 * insn_default_length (inner_insn));
1170 else
1171 inner_length = inner_length_fun (inner_insn);
1172
1173 insn_lengths[inner_uid] = inner_length;
1174 if (const_delay_slots)
1175 {
1176 if ((varying_length[inner_uid]
1177 = insn_variable_length_p (inner_insn)) != 0)
1178 varying_length[uid] = 1;
1179 INSN_ADDRESSES (inner_uid) = (insn_current_address
1180 + insn_lengths[uid]);
1181 }
1182 else
1183 varying_length[inner_uid] = 0;
1184 insn_lengths[uid] += inner_length;
1185 }
1186 }
1187 else if (GET_CODE (body) != USE && GET_CODE (body) != CLOBBER)
1188 {
1189 insn_lengths[uid] = length_fun (insn);
1190 varying_length[uid] = insn_variable_length_p (insn);
1191 }
1192
1193 /* If needed, do any adjustment. */
1194 #ifdef ADJUST_INSN_LENGTH
1195 ADJUST_INSN_LENGTH (insn, insn_lengths[uid]);
1196 if (insn_lengths[uid] < 0)
1197 fatal_insn ("negative insn length", insn);
1198 #endif
1199 }
1200
1201 /* Now loop over all the insns finding varying length insns. For each,
1202 get the current insn length. If it has changed, reflect the change.
1203 When nothing changes for a full pass, we are done. */
1204
1205 while (something_changed)
1206 {
1207 something_changed = 0;
1208 insn_current_align = MAX_CODE_ALIGN - 1;
1209 for (insn_current_address = 0, insn = first;
1210 insn != 0;
1211 insn = NEXT_INSN (insn))
1212 {
1213 int new_length;
1214 #ifdef ADJUST_INSN_LENGTH
1215 int tmp_length;
1216 #endif
1217 int length_align;
1218
1219 uid = INSN_UID (insn);
1220
1221 if (rtx_code_label *label = dyn_cast <rtx_code_label *> (insn))
1222 {
1223 int log = LABEL_TO_ALIGNMENT (label);
1224
1225 #ifdef CASE_VECTOR_SHORTEN_MODE
1226 /* If the mode of a following jump table was changed, we
1227 may need to update the alignment of this label. */
1228
1229 if (JUMP_TABLES_IN_TEXT_SECTION
1230 || readonly_data_section == text_section)
1231 {
1232 rtx_jump_table_data *table = jump_table_for_label (label);
1233 if (table)
1234 {
1235 int newlog = ADDR_VEC_ALIGN (table);
1236 if (newlog != log)
1237 {
1238 log = newlog;
1239 LABEL_TO_ALIGNMENT (insn) = log;
1240 something_changed = 1;
1241 }
1242 }
1243 }
1244 #endif
1245
1246 if (log > insn_current_align)
1247 {
1248 int align = 1 << log;
1249 int new_address= (insn_current_address + align - 1) & -align;
1250 insn_lengths[uid] = new_address - insn_current_address;
1251 insn_current_align = log;
1252 insn_current_address = new_address;
1253 }
1254 else
1255 insn_lengths[uid] = 0;
1256 INSN_ADDRESSES (uid) = insn_current_address;
1257 continue;
1258 }
1259
1260 length_align = INSN_LENGTH_ALIGNMENT (insn);
1261 if (length_align < insn_current_align)
1262 insn_current_align = length_align;
1263
1264 insn_last_address = INSN_ADDRESSES (uid);
1265 INSN_ADDRESSES (uid) = insn_current_address;
1266
1267 #ifdef CASE_VECTOR_SHORTEN_MODE
1268 if (optimize
1269 && JUMP_TABLE_DATA_P (insn)
1270 && GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
1271 {
1272 rtx_jump_table_data *table = as_a <rtx_jump_table_data *> (insn);
1273 rtx body = PATTERN (insn);
1274 int old_length = insn_lengths[uid];
1275 rtx_insn *rel_lab =
1276 safe_as_a <rtx_insn *> (XEXP (XEXP (body, 0), 0));
1277 rtx min_lab = XEXP (XEXP (body, 2), 0);
1278 rtx max_lab = XEXP (XEXP (body, 3), 0);
1279 int rel_addr = INSN_ADDRESSES (INSN_UID (rel_lab));
1280 int min_addr = INSN_ADDRESSES (INSN_UID (min_lab));
1281 int max_addr = INSN_ADDRESSES (INSN_UID (max_lab));
1282 rtx_insn *prev;
1283 int rel_align = 0;
1284 addr_diff_vec_flags flags;
1285 scalar_int_mode vec_mode;
1286
1287 /* Avoid automatic aggregate initialization. */
1288 flags = ADDR_DIFF_VEC_FLAGS (body);
1289
1290 /* Try to find a known alignment for rel_lab. */
1291 for (prev = rel_lab;
1292 prev
1293 && ! insn_lengths[INSN_UID (prev)]
1294 && ! (varying_length[INSN_UID (prev)] & 1);
1295 prev = PREV_INSN (prev))
1296 if (varying_length[INSN_UID (prev)] & 2)
1297 {
1298 rel_align = LABEL_TO_ALIGNMENT (prev);
1299 break;
1300 }
1301
1302 /* See the comment on addr_diff_vec_flags in rtl.h for the
1303 meaning of the flags values. base: REL_LAB vec: INSN */
1304 /* Anything after INSN has still addresses from the last
1305 pass; adjust these so that they reflect our current
1306 estimate for this pass. */
1307 if (flags.base_after_vec)
1308 rel_addr += insn_current_address - insn_last_address;
1309 if (flags.min_after_vec)
1310 min_addr += insn_current_address - insn_last_address;
1311 if (flags.max_after_vec)
1312 max_addr += insn_current_address - insn_last_address;
1313 /* We want to know the worst case, i.e. lowest possible value
1314 for the offset of MIN_LAB. If MIN_LAB is after REL_LAB,
1315 its offset is positive, and we have to be wary of code shrink;
1316 otherwise, it is negative, and we have to be vary of code
1317 size increase. */
1318 if (flags.min_after_base)
1319 {
1320 /* If INSN is between REL_LAB and MIN_LAB, the size
1321 changes we are about to make can change the alignment
1322 within the observed offset, therefore we have to break
1323 it up into two parts that are independent. */
1324 if (! flags.base_after_vec && flags.min_after_vec)
1325 {
1326 min_addr -= align_fuzz (rel_lab, insn, rel_align, 0);
1327 min_addr -= align_fuzz (insn, min_lab, 0, 0);
1328 }
1329 else
1330 min_addr -= align_fuzz (rel_lab, min_lab, rel_align, 0);
1331 }
1332 else
1333 {
1334 if (flags.base_after_vec && ! flags.min_after_vec)
1335 {
1336 min_addr -= align_fuzz (min_lab, insn, 0, ~0);
1337 min_addr -= align_fuzz (insn, rel_lab, 0, ~0);
1338 }
1339 else
1340 min_addr -= align_fuzz (min_lab, rel_lab, 0, ~0);
1341 }
1342 /* Likewise, determine the highest lowest possible value
1343 for the offset of MAX_LAB. */
1344 if (flags.max_after_base)
1345 {
1346 if (! flags.base_after_vec && flags.max_after_vec)
1347 {
1348 max_addr += align_fuzz (rel_lab, insn, rel_align, ~0);
1349 max_addr += align_fuzz (insn, max_lab, 0, ~0);
1350 }
1351 else
1352 max_addr += align_fuzz (rel_lab, max_lab, rel_align, ~0);
1353 }
1354 else
1355 {
1356 if (flags.base_after_vec && ! flags.max_after_vec)
1357 {
1358 max_addr += align_fuzz (max_lab, insn, 0, 0);
1359 max_addr += align_fuzz (insn, rel_lab, 0, 0);
1360 }
1361 else
1362 max_addr += align_fuzz (max_lab, rel_lab, 0, 0);
1363 }
1364 vec_mode = CASE_VECTOR_SHORTEN_MODE (min_addr - rel_addr,
1365 max_addr - rel_addr, body);
1366 if (!increasing
1367 || (GET_MODE_SIZE (vec_mode)
1368 >= GET_MODE_SIZE (table->get_data_mode ())))
1369 PUT_MODE (body, vec_mode);
1370 if (JUMP_TABLES_IN_TEXT_SECTION
1371 || readonly_data_section == text_section)
1372 {
1373 insn_lengths[uid]
1374 = (XVECLEN (body, 1)
1375 * GET_MODE_SIZE (table->get_data_mode ()));
1376 insn_current_address += insn_lengths[uid];
1377 if (insn_lengths[uid] != old_length)
1378 something_changed = 1;
1379 }
1380
1381 continue;
1382 }
1383 #endif /* CASE_VECTOR_SHORTEN_MODE */
1384
1385 if (! (varying_length[uid]))
1386 {
1387 if (NONJUMP_INSN_P (insn)
1388 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1389 {
1390 int i;
1391
1392 body = PATTERN (insn);
1393 for (i = 0; i < XVECLEN (body, 0); i++)
1394 {
1395 rtx inner_insn = XVECEXP (body, 0, i);
1396 int inner_uid = INSN_UID (inner_insn);
1397
1398 INSN_ADDRESSES (inner_uid) = insn_current_address;
1399
1400 insn_current_address += insn_lengths[inner_uid];
1401 }
1402 }
1403 else
1404 insn_current_address += insn_lengths[uid];
1405
1406 continue;
1407 }
1408
1409 if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
1410 {
1411 rtx_sequence *seqn = as_a <rtx_sequence *> (PATTERN (insn));
1412 int i;
1413
1414 body = PATTERN (insn);
1415 new_length = 0;
1416 for (i = 0; i < seqn->len (); i++)
1417 {
1418 rtx_insn *inner_insn = seqn->insn (i);
1419 int inner_uid = INSN_UID (inner_insn);
1420 int inner_length;
1421
1422 INSN_ADDRESSES (inner_uid) = insn_current_address;
1423
1424 /* insn_current_length returns 0 for insns with a
1425 non-varying length. */
1426 if (! varying_length[inner_uid])
1427 inner_length = insn_lengths[inner_uid];
1428 else
1429 inner_length = insn_current_length (inner_insn);
1430
1431 if (inner_length != insn_lengths[inner_uid])
1432 {
1433 if (!increasing || inner_length > insn_lengths[inner_uid])
1434 {
1435 insn_lengths[inner_uid] = inner_length;
1436 something_changed = 1;
1437 }
1438 else
1439 inner_length = insn_lengths[inner_uid];
1440 }
1441 insn_current_address += inner_length;
1442 new_length += inner_length;
1443 }
1444 }
1445 else
1446 {
1447 new_length = insn_current_length (insn);
1448 insn_current_address += new_length;
1449 }
1450
1451 #ifdef ADJUST_INSN_LENGTH
1452 /* If needed, do any adjustment. */
1453 tmp_length = new_length;
1454 ADJUST_INSN_LENGTH (insn, new_length);
1455 insn_current_address += (new_length - tmp_length);
1456 #endif
1457
1458 if (new_length != insn_lengths[uid]
1459 && (!increasing || new_length > insn_lengths[uid]))
1460 {
1461 insn_lengths[uid] = new_length;
1462 something_changed = 1;
1463 }
1464 else
1465 insn_current_address += insn_lengths[uid] - new_length;
1466 }
1467 /* For a non-optimizing compile, do only a single pass. */
1468 if (!increasing)
1469 break;
1470 }
1471 crtl->max_insn_address = insn_current_address;
1472 free (varying_length);
1473 }
1474
1475 /* Given the body of an INSN known to be generated by an ASM statement, return
1476 the number of machine instructions likely to be generated for this insn.
1477 This is used to compute its length. */
1478
1479 static int
1480 asm_insn_count (rtx body)
1481 {
1482 const char *templ;
1483
1484 if (GET_CODE (body) == ASM_INPUT)
1485 templ = XSTR (body, 0);
1486 else
1487 templ = decode_asm_operands (body, NULL, NULL, NULL, NULL, NULL);
1488
1489 return asm_str_count (templ);
1490 }
1491
1492 /* Return the number of machine instructions likely to be generated for the
1493 inline-asm template. */
1494 int
1495 asm_str_count (const char *templ)
1496 {
1497 int count = 1;
1498
1499 if (!*templ)
1500 return 0;
1501
1502 for (; *templ; templ++)
1503 if (IS_ASM_LOGICAL_LINE_SEPARATOR (*templ, templ)
1504 || *templ == '\n')
1505 count++;
1506
1507 return count;
1508 }
1509 \f
1510 /* ??? This is probably the wrong place for these. */
1511 /* Structure recording the mapping from source file and directory
1512 names at compile time to those to be embedded in debug
1513 information. */
1514 struct debug_prefix_map
1515 {
1516 const char *old_prefix;
1517 const char *new_prefix;
1518 size_t old_len;
1519 size_t new_len;
1520 struct debug_prefix_map *next;
1521 };
1522
1523 /* Linked list of such structures. */
1524 static debug_prefix_map *debug_prefix_maps;
1525
1526
1527 /* Record a debug file prefix mapping. ARG is the argument to
1528 -fdebug-prefix-map and must be of the form OLD=NEW. */
1529
1530 void
1531 add_debug_prefix_map (const char *arg)
1532 {
1533 debug_prefix_map *map;
1534 const char *p;
1535
1536 p = strchr (arg, '=');
1537 if (!p)
1538 {
1539 error ("invalid argument %qs to -fdebug-prefix-map", arg);
1540 return;
1541 }
1542 map = XNEW (debug_prefix_map);
1543 map->old_prefix = xstrndup (arg, p - arg);
1544 map->old_len = p - arg;
1545 p++;
1546 map->new_prefix = xstrdup (p);
1547 map->new_len = strlen (p);
1548 map->next = debug_prefix_maps;
1549 debug_prefix_maps = map;
1550 }
1551
1552 /* Perform user-specified mapping of debug filename prefixes. Return
1553 the new name corresponding to FILENAME. */
1554
1555 const char *
1556 remap_debug_filename (const char *filename)
1557 {
1558 debug_prefix_map *map;
1559 char *s;
1560 const char *name;
1561 size_t name_len;
1562
1563 for (map = debug_prefix_maps; map; map = map->next)
1564 if (filename_ncmp (filename, map->old_prefix, map->old_len) == 0)
1565 break;
1566 if (!map)
1567 return filename;
1568 name = filename + map->old_len;
1569 name_len = strlen (name) + 1;
1570 s = (char *) alloca (name_len + map->new_len);
1571 memcpy (s, map->new_prefix, map->new_len);
1572 memcpy (s + map->new_len, name, name_len);
1573 return ggc_strdup (s);
1574 }
1575 \f
1576 /* Return true if DWARF2 debug info can be emitted for DECL. */
1577
1578 static bool
1579 dwarf2_debug_info_emitted_p (tree decl)
1580 {
1581 if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG)
1582 return false;
1583
1584 if (DECL_IGNORED_P (decl))
1585 return false;
1586
1587 return true;
1588 }
1589
1590 /* Return scope resulting from combination of S1 and S2. */
1591 static tree
1592 choose_inner_scope (tree s1, tree s2)
1593 {
1594 if (!s1)
1595 return s2;
1596 if (!s2)
1597 return s1;
1598 if (BLOCK_NUMBER (s1) > BLOCK_NUMBER (s2))
1599 return s1;
1600 return s2;
1601 }
1602
1603 /* Emit lexical block notes needed to change scope from S1 to S2. */
1604
1605 static void
1606 change_scope (rtx_insn *orig_insn, tree s1, tree s2)
1607 {
1608 rtx_insn *insn = orig_insn;
1609 tree com = NULL_TREE;
1610 tree ts1 = s1, ts2 = s2;
1611 tree s;
1612
1613 while (ts1 != ts2)
1614 {
1615 gcc_assert (ts1 && ts2);
1616 if (BLOCK_NUMBER (ts1) > BLOCK_NUMBER (ts2))
1617 ts1 = BLOCK_SUPERCONTEXT (ts1);
1618 else if (BLOCK_NUMBER (ts1) < BLOCK_NUMBER (ts2))
1619 ts2 = BLOCK_SUPERCONTEXT (ts2);
1620 else
1621 {
1622 ts1 = BLOCK_SUPERCONTEXT (ts1);
1623 ts2 = BLOCK_SUPERCONTEXT (ts2);
1624 }
1625 }
1626 com = ts1;
1627
1628 /* Close scopes. */
1629 s = s1;
1630 while (s != com)
1631 {
1632 rtx_note *note = emit_note_before (NOTE_INSN_BLOCK_END, insn);
1633 NOTE_BLOCK (note) = s;
1634 s = BLOCK_SUPERCONTEXT (s);
1635 }
1636
1637 /* Open scopes. */
1638 s = s2;
1639 while (s != com)
1640 {
1641 insn = emit_note_before (NOTE_INSN_BLOCK_BEG, insn);
1642 NOTE_BLOCK (insn) = s;
1643 s = BLOCK_SUPERCONTEXT (s);
1644 }
1645 }
1646
1647 /* Rebuild all the NOTE_INSN_BLOCK_BEG and NOTE_INSN_BLOCK_END notes based
1648 on the scope tree and the newly reordered instructions. */
1649
1650 static void
1651 reemit_insn_block_notes (void)
1652 {
1653 tree cur_block = DECL_INITIAL (cfun->decl);
1654 rtx_insn *insn;
1655 rtx_note *note;
1656
1657 insn = get_insns ();
1658 for (; insn; insn = NEXT_INSN (insn))
1659 {
1660 tree this_block;
1661
1662 /* Prevent lexical blocks from straddling section boundaries. */
1663 if (NOTE_P (insn) && NOTE_KIND (insn) == NOTE_INSN_SWITCH_TEXT_SECTIONS)
1664 {
1665 for (tree s = cur_block; s != DECL_INITIAL (cfun->decl);
1666 s = BLOCK_SUPERCONTEXT (s))
1667 {
1668 rtx_note *note = emit_note_before (NOTE_INSN_BLOCK_END, insn);
1669 NOTE_BLOCK (note) = s;
1670 note = emit_note_after (NOTE_INSN_BLOCK_BEG, insn);
1671 NOTE_BLOCK (note) = s;
1672 }
1673 }
1674
1675 if (!active_insn_p (insn))
1676 continue;
1677
1678 /* Avoid putting scope notes between jump table and its label. */
1679 if (JUMP_TABLE_DATA_P (insn))
1680 continue;
1681
1682 this_block = insn_scope (insn);
1683 /* For sequences compute scope resulting from merging all scopes
1684 of instructions nested inside. */
1685 if (rtx_sequence *body = dyn_cast <rtx_sequence *> (PATTERN (insn)))
1686 {
1687 int i;
1688
1689 this_block = NULL;
1690 for (i = 0; i < body->len (); i++)
1691 this_block = choose_inner_scope (this_block,
1692 insn_scope (body->insn (i)));
1693 }
1694 if (! this_block)
1695 {
1696 if (INSN_LOCATION (insn) == UNKNOWN_LOCATION)
1697 continue;
1698 else
1699 this_block = DECL_INITIAL (cfun->decl);
1700 }
1701
1702 if (this_block != cur_block)
1703 {
1704 change_scope (insn, cur_block, this_block);
1705 cur_block = this_block;
1706 }
1707 }
1708
1709 /* change_scope emits before the insn, not after. */
1710 note = emit_note (NOTE_INSN_DELETED);
1711 change_scope (note, cur_block, DECL_INITIAL (cfun->decl));
1712 delete_insn (note);
1713
1714 reorder_blocks ();
1715 }
1716
1717 static const char *some_local_dynamic_name;
1718
1719 /* Locate some local-dynamic symbol still in use by this function
1720 so that we can print its name in local-dynamic base patterns.
1721 Return null if there are no local-dynamic references. */
1722
1723 const char *
1724 get_some_local_dynamic_name ()
1725 {
1726 subrtx_iterator::array_type array;
1727 rtx_insn *insn;
1728
1729 if (some_local_dynamic_name)
1730 return some_local_dynamic_name;
1731
1732 for (insn = get_insns (); insn ; insn = NEXT_INSN (insn))
1733 if (NONDEBUG_INSN_P (insn))
1734 FOR_EACH_SUBRTX (iter, array, PATTERN (insn), ALL)
1735 {
1736 const_rtx x = *iter;
1737 if (GET_CODE (x) == SYMBOL_REF)
1738 {
1739 if (SYMBOL_REF_TLS_MODEL (x) == TLS_MODEL_LOCAL_DYNAMIC)
1740 return some_local_dynamic_name = XSTR (x, 0);
1741 if (CONSTANT_POOL_ADDRESS_P (x))
1742 iter.substitute (get_pool_constant (x));
1743 }
1744 }
1745
1746 return 0;
1747 }
1748
1749 /* Output assembler code for the start of a function,
1750 and initialize some of the variables in this file
1751 for the new function. The label for the function and associated
1752 assembler pseudo-ops have already been output in `assemble_start_function'.
1753
1754 FIRST is the first insn of the rtl for the function being compiled.
1755 FILE is the file to write assembler code to.
1756 OPTIMIZE_P is nonzero if we should eliminate redundant
1757 test and compare insns. */
1758
1759 void
1760 final_start_function (rtx_insn *first, FILE *file,
1761 int optimize_p ATTRIBUTE_UNUSED)
1762 {
1763 block_depth = 0;
1764
1765 this_is_asm_operands = 0;
1766
1767 need_profile_function = false;
1768
1769 last_filename = LOCATION_FILE (prologue_location);
1770 last_linenum = LOCATION_LINE (prologue_location);
1771 last_columnnum = LOCATION_COLUMN (prologue_location);
1772 last_discriminator = discriminator = 0;
1773
1774 high_block_linenum = high_function_linenum = last_linenum;
1775
1776 if (flag_sanitize & SANITIZE_ADDRESS)
1777 asan_function_start ();
1778
1779 if (!DECL_IGNORED_P (current_function_decl))
1780 debug_hooks->begin_prologue (last_linenum, last_columnnum, last_filename);
1781
1782 if (!dwarf2_debug_info_emitted_p (current_function_decl))
1783 dwarf2out_begin_prologue (0, 0, NULL);
1784
1785 #ifdef LEAF_REG_REMAP
1786 if (crtl->uses_only_leaf_regs)
1787 leaf_renumber_regs (first);
1788 #endif
1789
1790 /* The Sun386i and perhaps other machines don't work right
1791 if the profiling code comes after the prologue. */
1792 if (targetm.profile_before_prologue () && crtl->profile)
1793 {
1794 if (targetm.asm_out.function_prologue == default_function_pro_epilogue
1795 && targetm.have_prologue ())
1796 {
1797 rtx_insn *insn;
1798 for (insn = first; insn; insn = NEXT_INSN (insn))
1799 if (!NOTE_P (insn))
1800 {
1801 insn = NULL;
1802 break;
1803 }
1804 else if (NOTE_KIND (insn) == NOTE_INSN_BASIC_BLOCK
1805 || NOTE_KIND (insn) == NOTE_INSN_FUNCTION_BEG)
1806 break;
1807 else if (NOTE_KIND (insn) == NOTE_INSN_DELETED
1808 || NOTE_KIND (insn) == NOTE_INSN_VAR_LOCATION)
1809 continue;
1810 else
1811 {
1812 insn = NULL;
1813 break;
1814 }
1815
1816 if (insn)
1817 need_profile_function = true;
1818 else
1819 profile_function (file);
1820 }
1821 else
1822 profile_function (file);
1823 }
1824
1825 /* If debugging, assign block numbers to all of the blocks in this
1826 function. */
1827 if (write_symbols)
1828 {
1829 reemit_insn_block_notes ();
1830 number_blocks (current_function_decl);
1831 /* We never actually put out begin/end notes for the top-level
1832 block in the function. But, conceptually, that block is
1833 always needed. */
1834 TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl)) = 1;
1835 }
1836
1837 if (warn_frame_larger_than
1838 && get_frame_size () > frame_larger_than_size)
1839 {
1840 /* Issue a warning */
1841 warning (OPT_Wframe_larger_than_,
1842 "the frame size of %wd bytes is larger than %wd bytes",
1843 get_frame_size (), frame_larger_than_size);
1844 }
1845
1846 /* First output the function prologue: code to set up the stack frame. */
1847 targetm.asm_out.function_prologue (file);
1848
1849 /* If the machine represents the prologue as RTL, the profiling code must
1850 be emitted when NOTE_INSN_PROLOGUE_END is scanned. */
1851 if (! targetm.have_prologue ())
1852 profile_after_prologue (file);
1853 }
1854
1855 static void
1856 profile_after_prologue (FILE *file ATTRIBUTE_UNUSED)
1857 {
1858 if (!targetm.profile_before_prologue () && crtl->profile)
1859 profile_function (file);
1860 }
1861
1862 static void
1863 profile_function (FILE *file ATTRIBUTE_UNUSED)
1864 {
1865 #ifndef NO_PROFILE_COUNTERS
1866 # define NO_PROFILE_COUNTERS 0
1867 #endif
1868 #ifdef ASM_OUTPUT_REG_PUSH
1869 rtx sval = NULL, chain = NULL;
1870
1871 if (cfun->returns_struct)
1872 sval = targetm.calls.struct_value_rtx (TREE_TYPE (current_function_decl),
1873 true);
1874 if (cfun->static_chain_decl)
1875 chain = targetm.calls.static_chain (current_function_decl, true);
1876 #endif /* ASM_OUTPUT_REG_PUSH */
1877
1878 if (! NO_PROFILE_COUNTERS)
1879 {
1880 int align = MIN (BIGGEST_ALIGNMENT, LONG_TYPE_SIZE);
1881 switch_to_section (data_section);
1882 ASM_OUTPUT_ALIGN (file, floor_log2 (align / BITS_PER_UNIT));
1883 targetm.asm_out.internal_label (file, "LP", current_function_funcdef_no);
1884 assemble_integer (const0_rtx, LONG_TYPE_SIZE / BITS_PER_UNIT, align, 1);
1885 }
1886
1887 switch_to_section (current_function_section ());
1888
1889 #ifdef ASM_OUTPUT_REG_PUSH
1890 if (sval && REG_P (sval))
1891 ASM_OUTPUT_REG_PUSH (file, REGNO (sval));
1892 if (chain && REG_P (chain))
1893 ASM_OUTPUT_REG_PUSH (file, REGNO (chain));
1894 #endif
1895
1896 FUNCTION_PROFILER (file, current_function_funcdef_no);
1897
1898 #ifdef ASM_OUTPUT_REG_PUSH
1899 if (chain && REG_P (chain))
1900 ASM_OUTPUT_REG_POP (file, REGNO (chain));
1901 if (sval && REG_P (sval))
1902 ASM_OUTPUT_REG_POP (file, REGNO (sval));
1903 #endif
1904 }
1905
1906 /* Output assembler code for the end of a function.
1907 For clarity, args are same as those of `final_start_function'
1908 even though not all of them are needed. */
1909
1910 void
1911 final_end_function (void)
1912 {
1913 app_disable ();
1914
1915 if (!DECL_IGNORED_P (current_function_decl))
1916 debug_hooks->end_function (high_function_linenum);
1917
1918 /* Finally, output the function epilogue:
1919 code to restore the stack frame and return to the caller. */
1920 targetm.asm_out.function_epilogue (asm_out_file);
1921
1922 /* And debug output. */
1923 if (!DECL_IGNORED_P (current_function_decl))
1924 debug_hooks->end_epilogue (last_linenum, last_filename);
1925
1926 if (!dwarf2_debug_info_emitted_p (current_function_decl)
1927 && dwarf2out_do_frame ())
1928 dwarf2out_end_epilogue (last_linenum, last_filename);
1929
1930 some_local_dynamic_name = 0;
1931 }
1932 \f
1933
1934 /* Dumper helper for basic block information. FILE is the assembly
1935 output file, and INSN is the instruction being emitted. */
1936
1937 static void
1938 dump_basic_block_info (FILE *file, rtx_insn *insn, basic_block *start_to_bb,
1939 basic_block *end_to_bb, int bb_map_size, int *bb_seqn)
1940 {
1941 basic_block bb;
1942
1943 if (!flag_debug_asm)
1944 return;
1945
1946 if (INSN_UID (insn) < bb_map_size
1947 && (bb = start_to_bb[INSN_UID (insn)]) != NULL)
1948 {
1949 edge e;
1950 edge_iterator ei;
1951
1952 fprintf (file, "%s BLOCK %d", ASM_COMMENT_START, bb->index);
1953 if (bb->count.initialized_p ())
1954 {
1955 fprintf (file, ", count:");
1956 bb->count.dump (file);
1957 }
1958 fprintf (file, " seq:%d", (*bb_seqn)++);
1959 fprintf (file, "\n%s PRED:", ASM_COMMENT_START);
1960 FOR_EACH_EDGE (e, ei, bb->preds)
1961 {
1962 dump_edge_info (file, e, TDF_DETAILS, 0);
1963 }
1964 fprintf (file, "\n");
1965 }
1966 if (INSN_UID (insn) < bb_map_size
1967 && (bb = end_to_bb[INSN_UID (insn)]) != NULL)
1968 {
1969 edge e;
1970 edge_iterator ei;
1971
1972 fprintf (asm_out_file, "%s SUCC:", ASM_COMMENT_START);
1973 FOR_EACH_EDGE (e, ei, bb->succs)
1974 {
1975 dump_edge_info (asm_out_file, e, TDF_DETAILS, 1);
1976 }
1977 fprintf (file, "\n");
1978 }
1979 }
1980
1981 /* Output assembler code for some insns: all or part of a function.
1982 For description of args, see `final_start_function', above. */
1983
1984 void
1985 final (rtx_insn *first, FILE *file, int optimize_p)
1986 {
1987 rtx_insn *insn, *next;
1988 int seen = 0;
1989
1990 /* Used for -dA dump. */
1991 basic_block *start_to_bb = NULL;
1992 basic_block *end_to_bb = NULL;
1993 int bb_map_size = 0;
1994 int bb_seqn = 0;
1995
1996 last_ignored_compare = 0;
1997
1998 if (HAVE_cc0)
1999 for (insn = first; insn; insn = NEXT_INSN (insn))
2000 {
2001 /* If CC tracking across branches is enabled, record the insn which
2002 jumps to each branch only reached from one place. */
2003 if (optimize_p && JUMP_P (insn))
2004 {
2005 rtx lab = JUMP_LABEL (insn);
2006 if (lab && LABEL_P (lab) && LABEL_NUSES (lab) == 1)
2007 {
2008 LABEL_REFS (lab) = insn;
2009 }
2010 }
2011 }
2012
2013 init_recog ();
2014
2015 CC_STATUS_INIT;
2016
2017 if (flag_debug_asm)
2018 {
2019 basic_block bb;
2020
2021 bb_map_size = get_max_uid () + 1;
2022 start_to_bb = XCNEWVEC (basic_block, bb_map_size);
2023 end_to_bb = XCNEWVEC (basic_block, bb_map_size);
2024
2025 /* There is no cfg for a thunk. */
2026 if (!cfun->is_thunk)
2027 FOR_EACH_BB_REVERSE_FN (bb, cfun)
2028 {
2029 start_to_bb[INSN_UID (BB_HEAD (bb))] = bb;
2030 end_to_bb[INSN_UID (BB_END (bb))] = bb;
2031 }
2032 }
2033
2034 /* Output the insns. */
2035 for (insn = first; insn;)
2036 {
2037 if (HAVE_ATTR_length)
2038 {
2039 if ((unsigned) INSN_UID (insn) >= INSN_ADDRESSES_SIZE ())
2040 {
2041 /* This can be triggered by bugs elsewhere in the compiler if
2042 new insns are created after init_insn_lengths is called. */
2043 gcc_assert (NOTE_P (insn));
2044 insn_current_address = -1;
2045 }
2046 else
2047 insn_current_address = INSN_ADDRESSES (INSN_UID (insn));
2048 }
2049
2050 dump_basic_block_info (file, insn, start_to_bb, end_to_bb,
2051 bb_map_size, &bb_seqn);
2052 insn = final_scan_insn (insn, file, optimize_p, 0, &seen);
2053 }
2054
2055 if (flag_debug_asm)
2056 {
2057 free (start_to_bb);
2058 free (end_to_bb);
2059 }
2060
2061 /* Remove CFI notes, to avoid compare-debug failures. */
2062 for (insn = first; insn; insn = next)
2063 {
2064 next = NEXT_INSN (insn);
2065 if (NOTE_P (insn)
2066 && (NOTE_KIND (insn) == NOTE_INSN_CFI
2067 || NOTE_KIND (insn) == NOTE_INSN_CFI_LABEL))
2068 delete_insn (insn);
2069 }
2070 }
2071 \f
2072 const char *
2073 get_insn_template (int code, rtx insn)
2074 {
2075 switch (insn_data[code].output_format)
2076 {
2077 case INSN_OUTPUT_FORMAT_SINGLE:
2078 return insn_data[code].output.single;
2079 case INSN_OUTPUT_FORMAT_MULTI:
2080 return insn_data[code].output.multi[which_alternative];
2081 case INSN_OUTPUT_FORMAT_FUNCTION:
2082 gcc_assert (insn);
2083 return (*insn_data[code].output.function) (recog_data.operand,
2084 as_a <rtx_insn *> (insn));
2085
2086 default:
2087 gcc_unreachable ();
2088 }
2089 }
2090
2091 /* Emit the appropriate declaration for an alternate-entry-point
2092 symbol represented by INSN, to FILE. INSN is a CODE_LABEL with
2093 LABEL_KIND != LABEL_NORMAL.
2094
2095 The case fall-through in this function is intentional. */
2096 static void
2097 output_alternate_entry_point (FILE *file, rtx_insn *insn)
2098 {
2099 const char *name = LABEL_NAME (insn);
2100
2101 switch (LABEL_KIND (insn))
2102 {
2103 case LABEL_WEAK_ENTRY:
2104 #ifdef ASM_WEAKEN_LABEL
2105 ASM_WEAKEN_LABEL (file, name);
2106 gcc_fallthrough ();
2107 #endif
2108 case LABEL_GLOBAL_ENTRY:
2109 targetm.asm_out.globalize_label (file, name);
2110 gcc_fallthrough ();
2111 case LABEL_STATIC_ENTRY:
2112 #ifdef ASM_OUTPUT_TYPE_DIRECTIVE
2113 ASM_OUTPUT_TYPE_DIRECTIVE (file, name, "function");
2114 #endif
2115 ASM_OUTPUT_LABEL (file, name);
2116 break;
2117
2118 case LABEL_NORMAL:
2119 default:
2120 gcc_unreachable ();
2121 }
2122 }
2123
2124 /* Given a CALL_INSN, find and return the nested CALL. */
2125 static rtx
2126 call_from_call_insn (rtx_call_insn *insn)
2127 {
2128 rtx x;
2129 gcc_assert (CALL_P (insn));
2130 x = PATTERN (insn);
2131
2132 while (GET_CODE (x) != CALL)
2133 {
2134 switch (GET_CODE (x))
2135 {
2136 default:
2137 gcc_unreachable ();
2138 case COND_EXEC:
2139 x = COND_EXEC_CODE (x);
2140 break;
2141 case PARALLEL:
2142 x = XVECEXP (x, 0, 0);
2143 break;
2144 case SET:
2145 x = XEXP (x, 1);
2146 break;
2147 }
2148 }
2149 return x;
2150 }
2151
2152 /* Print a comment into the asm showing FILENAME, LINENUM, and the
2153 corresponding source line, if available. */
2154
2155 static void
2156 asm_show_source (const char *filename, int linenum)
2157 {
2158 if (!filename)
2159 return;
2160
2161 int line_size;
2162 const char *line = location_get_source_line (filename, linenum, &line_size);
2163 if (!line)
2164 return;
2165
2166 fprintf (asm_out_file, "%s %s:%i: ", ASM_COMMENT_START, filename, linenum);
2167 /* "line" is not 0-terminated, so we must use line_size. */
2168 fwrite (line, 1, line_size, asm_out_file);
2169 fputc ('\n', asm_out_file);
2170 }
2171
2172 /* The final scan for one insn, INSN.
2173 Args are same as in `final', except that INSN
2174 is the insn being scanned.
2175 Value returned is the next insn to be scanned.
2176
2177 NOPEEPHOLES is the flag to disallow peephole processing (currently
2178 used for within delayed branch sequence output).
2179
2180 SEEN is used to track the end of the prologue, for emitting
2181 debug information. We force the emission of a line note after
2182 both NOTE_INSN_PROLOGUE_END and NOTE_INSN_FUNCTION_BEG. */
2183
2184 rtx_insn *
2185 final_scan_insn (rtx_insn *insn, FILE *file, int optimize_p ATTRIBUTE_UNUSED,
2186 int nopeepholes ATTRIBUTE_UNUSED, int *seen)
2187 {
2188 #if HAVE_cc0
2189 rtx set;
2190 #endif
2191 rtx_insn *next;
2192 rtx_jump_table_data *table;
2193
2194 insn_counter++;
2195
2196 /* Ignore deleted insns. These can occur when we split insns (due to a
2197 template of "#") while not optimizing. */
2198 if (insn->deleted ())
2199 return NEXT_INSN (insn);
2200
2201 switch (GET_CODE (insn))
2202 {
2203 case NOTE:
2204 switch (NOTE_KIND (insn))
2205 {
2206 case NOTE_INSN_DELETED:
2207 case NOTE_INSN_UPDATE_SJLJ_CONTEXT:
2208 break;
2209
2210 case NOTE_INSN_SWITCH_TEXT_SECTIONS:
2211 in_cold_section_p = !in_cold_section_p;
2212
2213 if (in_cold_section_p)
2214 cold_function_name
2215 = clone_function_name (current_function_decl, "cold");
2216
2217 if (dwarf2out_do_frame ())
2218 {
2219 dwarf2out_switch_text_section ();
2220 if (!dwarf2_debug_info_emitted_p (current_function_decl)
2221 && !DECL_IGNORED_P (current_function_decl))
2222 debug_hooks->switch_text_section ();
2223 }
2224 else if (!DECL_IGNORED_P (current_function_decl))
2225 debug_hooks->switch_text_section ();
2226
2227 switch_to_section (current_function_section ());
2228 targetm.asm_out.function_switched_text_sections (asm_out_file,
2229 current_function_decl,
2230 in_cold_section_p);
2231 /* Emit a label for the split cold section. Form label name by
2232 suffixing "cold" to the original function's name. */
2233 if (in_cold_section_p)
2234 {
2235 #ifdef ASM_DECLARE_COLD_FUNCTION_NAME
2236 ASM_DECLARE_COLD_FUNCTION_NAME (asm_out_file,
2237 IDENTIFIER_POINTER
2238 (cold_function_name),
2239 current_function_decl);
2240 #else
2241 ASM_OUTPUT_LABEL (asm_out_file,
2242 IDENTIFIER_POINTER (cold_function_name));
2243 #endif
2244 }
2245 break;
2246
2247 case NOTE_INSN_BASIC_BLOCK:
2248 if (need_profile_function)
2249 {
2250 profile_function (asm_out_file);
2251 need_profile_function = false;
2252 }
2253
2254 if (targetm.asm_out.unwind_emit)
2255 targetm.asm_out.unwind_emit (asm_out_file, insn);
2256
2257 discriminator = NOTE_BASIC_BLOCK (insn)->discriminator;
2258
2259 break;
2260
2261 case NOTE_INSN_EH_REGION_BEG:
2262 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHB",
2263 NOTE_EH_HANDLER (insn));
2264 break;
2265
2266 case NOTE_INSN_EH_REGION_END:
2267 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHE",
2268 NOTE_EH_HANDLER (insn));
2269 break;
2270
2271 case NOTE_INSN_PROLOGUE_END:
2272 targetm.asm_out.function_end_prologue (file);
2273 profile_after_prologue (file);
2274
2275 if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE)
2276 {
2277 *seen |= SEEN_EMITTED;
2278 force_source_line = true;
2279 }
2280 else
2281 *seen |= SEEN_NOTE;
2282
2283 break;
2284
2285 case NOTE_INSN_EPILOGUE_BEG:
2286 if (!DECL_IGNORED_P (current_function_decl))
2287 (*debug_hooks->begin_epilogue) (last_linenum, last_filename);
2288 targetm.asm_out.function_begin_epilogue (file);
2289 break;
2290
2291 case NOTE_INSN_CFI:
2292 dwarf2out_emit_cfi (NOTE_CFI (insn));
2293 break;
2294
2295 case NOTE_INSN_CFI_LABEL:
2296 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LCFI",
2297 NOTE_LABEL_NUMBER (insn));
2298 break;
2299
2300 case NOTE_INSN_FUNCTION_BEG:
2301 if (need_profile_function)
2302 {
2303 profile_function (asm_out_file);
2304 need_profile_function = false;
2305 }
2306
2307 app_disable ();
2308 if (!DECL_IGNORED_P (current_function_decl))
2309 debug_hooks->end_prologue (last_linenum, last_filename);
2310
2311 if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE)
2312 {
2313 *seen |= SEEN_EMITTED;
2314 force_source_line = true;
2315 }
2316 else
2317 *seen |= SEEN_NOTE;
2318
2319 break;
2320
2321 case NOTE_INSN_BLOCK_BEG:
2322 if (debug_info_level == DINFO_LEVEL_NORMAL
2323 || debug_info_level == DINFO_LEVEL_VERBOSE
2324 || write_symbols == DWARF2_DEBUG
2325 || write_symbols == VMS_AND_DWARF2_DEBUG
2326 || write_symbols == VMS_DEBUG)
2327 {
2328 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
2329
2330 app_disable ();
2331 ++block_depth;
2332 high_block_linenum = last_linenum;
2333
2334 /* Output debugging info about the symbol-block beginning. */
2335 if (!DECL_IGNORED_P (current_function_decl))
2336 debug_hooks->begin_block (last_linenum, n);
2337
2338 /* Mark this block as output. */
2339 TREE_ASM_WRITTEN (NOTE_BLOCK (insn)) = 1;
2340 BLOCK_IN_COLD_SECTION_P (NOTE_BLOCK (insn)) = in_cold_section_p;
2341 }
2342 if (write_symbols == DBX_DEBUG)
2343 {
2344 location_t *locus_ptr
2345 = block_nonartificial_location (NOTE_BLOCK (insn));
2346
2347 if (locus_ptr != NULL)
2348 {
2349 override_filename = LOCATION_FILE (*locus_ptr);
2350 override_linenum = LOCATION_LINE (*locus_ptr);
2351 override_columnnum = LOCATION_COLUMN (*locus_ptr);
2352 }
2353 }
2354 break;
2355
2356 case NOTE_INSN_BLOCK_END:
2357 if (debug_info_level == DINFO_LEVEL_NORMAL
2358 || debug_info_level == DINFO_LEVEL_VERBOSE
2359 || write_symbols == DWARF2_DEBUG
2360 || write_symbols == VMS_AND_DWARF2_DEBUG
2361 || write_symbols == VMS_DEBUG)
2362 {
2363 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
2364
2365 app_disable ();
2366
2367 /* End of a symbol-block. */
2368 --block_depth;
2369 gcc_assert (block_depth >= 0);
2370
2371 if (!DECL_IGNORED_P (current_function_decl))
2372 debug_hooks->end_block (high_block_linenum, n);
2373 gcc_assert (BLOCK_IN_COLD_SECTION_P (NOTE_BLOCK (insn))
2374 == in_cold_section_p);
2375 }
2376 if (write_symbols == DBX_DEBUG)
2377 {
2378 tree outer_block = BLOCK_SUPERCONTEXT (NOTE_BLOCK (insn));
2379 location_t *locus_ptr
2380 = block_nonartificial_location (outer_block);
2381
2382 if (locus_ptr != NULL)
2383 {
2384 override_filename = LOCATION_FILE (*locus_ptr);
2385 override_linenum = LOCATION_LINE (*locus_ptr);
2386 override_columnnum = LOCATION_COLUMN (*locus_ptr);
2387 }
2388 else
2389 {
2390 override_filename = NULL;
2391 override_linenum = 0;
2392 override_columnnum = 0;
2393 }
2394 }
2395 break;
2396
2397 case NOTE_INSN_DELETED_LABEL:
2398 /* Emit the label. We may have deleted the CODE_LABEL because
2399 the label could be proved to be unreachable, though still
2400 referenced (in the form of having its address taken. */
2401 ASM_OUTPUT_DEBUG_LABEL (file, "L", CODE_LABEL_NUMBER (insn));
2402 break;
2403
2404 case NOTE_INSN_DELETED_DEBUG_LABEL:
2405 /* Similarly, but need to use different namespace for it. */
2406 if (CODE_LABEL_NUMBER (insn) != -1)
2407 ASM_OUTPUT_DEBUG_LABEL (file, "LDL", CODE_LABEL_NUMBER (insn));
2408 break;
2409
2410 case NOTE_INSN_VAR_LOCATION:
2411 case NOTE_INSN_CALL_ARG_LOCATION:
2412 if (!DECL_IGNORED_P (current_function_decl))
2413 debug_hooks->var_location (insn);
2414 break;
2415
2416 default:
2417 gcc_unreachable ();
2418 break;
2419 }
2420 break;
2421
2422 case BARRIER:
2423 break;
2424
2425 case CODE_LABEL:
2426 /* The target port might emit labels in the output function for
2427 some insn, e.g. sh.c output_branchy_insn. */
2428 if (CODE_LABEL_NUMBER (insn) <= max_labelno)
2429 {
2430 int align = LABEL_TO_ALIGNMENT (insn);
2431 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2432 int max_skip = LABEL_TO_MAX_SKIP (insn);
2433 #endif
2434
2435 if (align && NEXT_INSN (insn))
2436 {
2437 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2438 ASM_OUTPUT_MAX_SKIP_ALIGN (file, align, max_skip);
2439 #else
2440 #ifdef ASM_OUTPUT_ALIGN_WITH_NOP
2441 ASM_OUTPUT_ALIGN_WITH_NOP (file, align);
2442 #else
2443 ASM_OUTPUT_ALIGN (file, align);
2444 #endif
2445 #endif
2446 }
2447 }
2448 CC_STATUS_INIT;
2449
2450 if (!DECL_IGNORED_P (current_function_decl) && LABEL_NAME (insn))
2451 debug_hooks->label (as_a <rtx_code_label *> (insn));
2452
2453 app_disable ();
2454
2455 /* If this label is followed by a jump-table, make sure we put
2456 the label in the read-only section. Also possibly write the
2457 label and jump table together. */
2458 table = jump_table_for_label (as_a <rtx_code_label *> (insn));
2459 if (table)
2460 {
2461 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2462 /* In this case, the case vector is being moved by the
2463 target, so don't output the label at all. Leave that
2464 to the back end macros. */
2465 #else
2466 if (! JUMP_TABLES_IN_TEXT_SECTION)
2467 {
2468 int log_align;
2469
2470 switch_to_section (targetm.asm_out.function_rodata_section
2471 (current_function_decl));
2472
2473 #ifdef ADDR_VEC_ALIGN
2474 log_align = ADDR_VEC_ALIGN (table);
2475 #else
2476 log_align = exact_log2 (BIGGEST_ALIGNMENT / BITS_PER_UNIT);
2477 #endif
2478 ASM_OUTPUT_ALIGN (file, log_align);
2479 }
2480 else
2481 switch_to_section (current_function_section ());
2482
2483 #ifdef ASM_OUTPUT_CASE_LABEL
2484 ASM_OUTPUT_CASE_LABEL (file, "L", CODE_LABEL_NUMBER (insn), table);
2485 #else
2486 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn));
2487 #endif
2488 #endif
2489 break;
2490 }
2491 if (LABEL_ALT_ENTRY_P (insn))
2492 output_alternate_entry_point (file, insn);
2493 else
2494 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn));
2495 break;
2496
2497 default:
2498 {
2499 rtx body = PATTERN (insn);
2500 int insn_code_number;
2501 const char *templ;
2502 bool is_stmt;
2503
2504 /* Reset this early so it is correct for ASM statements. */
2505 current_insn_predicate = NULL_RTX;
2506
2507 /* An INSN, JUMP_INSN or CALL_INSN.
2508 First check for special kinds that recog doesn't recognize. */
2509
2510 if (GET_CODE (body) == USE /* These are just declarations. */
2511 || GET_CODE (body) == CLOBBER)
2512 break;
2513
2514 #if HAVE_cc0
2515 {
2516 /* If there is a REG_CC_SETTER note on this insn, it means that
2517 the setting of the condition code was done in the delay slot
2518 of the insn that branched here. So recover the cc status
2519 from the insn that set it. */
2520
2521 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2522 if (note)
2523 {
2524 rtx_insn *other = as_a <rtx_insn *> (XEXP (note, 0));
2525 NOTICE_UPDATE_CC (PATTERN (other), other);
2526 cc_prev_status = cc_status;
2527 }
2528 }
2529 #endif
2530
2531 /* Detect insns that are really jump-tables
2532 and output them as such. */
2533
2534 if (JUMP_TABLE_DATA_P (insn))
2535 {
2536 #if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC))
2537 int vlen, idx;
2538 #endif
2539
2540 if (! JUMP_TABLES_IN_TEXT_SECTION)
2541 switch_to_section (targetm.asm_out.function_rodata_section
2542 (current_function_decl));
2543 else
2544 switch_to_section (current_function_section ());
2545
2546 app_disable ();
2547
2548 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2549 if (GET_CODE (body) == ADDR_VEC)
2550 {
2551 #ifdef ASM_OUTPUT_ADDR_VEC
2552 ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn), body);
2553 #else
2554 gcc_unreachable ();
2555 #endif
2556 }
2557 else
2558 {
2559 #ifdef ASM_OUTPUT_ADDR_DIFF_VEC
2560 ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn), body);
2561 #else
2562 gcc_unreachable ();
2563 #endif
2564 }
2565 #else
2566 vlen = XVECLEN (body, GET_CODE (body) == ADDR_DIFF_VEC);
2567 for (idx = 0; idx < vlen; idx++)
2568 {
2569 if (GET_CODE (body) == ADDR_VEC)
2570 {
2571 #ifdef ASM_OUTPUT_ADDR_VEC_ELT
2572 ASM_OUTPUT_ADDR_VEC_ELT
2573 (file, CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 0, idx), 0)));
2574 #else
2575 gcc_unreachable ();
2576 #endif
2577 }
2578 else
2579 {
2580 #ifdef ASM_OUTPUT_ADDR_DIFF_ELT
2581 ASM_OUTPUT_ADDR_DIFF_ELT
2582 (file,
2583 body,
2584 CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 1, idx), 0)),
2585 CODE_LABEL_NUMBER (XEXP (XEXP (body, 0), 0)));
2586 #else
2587 gcc_unreachable ();
2588 #endif
2589 }
2590 }
2591 #ifdef ASM_OUTPUT_CASE_END
2592 ASM_OUTPUT_CASE_END (file,
2593 CODE_LABEL_NUMBER (PREV_INSN (insn)),
2594 insn);
2595 #endif
2596 #endif
2597
2598 switch_to_section (current_function_section ());
2599
2600 break;
2601 }
2602 /* Output this line note if it is the first or the last line
2603 note in a row. */
2604 if (!DECL_IGNORED_P (current_function_decl)
2605 && notice_source_line (insn, &is_stmt))
2606 {
2607 if (flag_verbose_asm)
2608 asm_show_source (last_filename, last_linenum);
2609 (*debug_hooks->source_line) (last_linenum, last_columnnum,
2610 last_filename, last_discriminator,
2611 is_stmt);
2612 }
2613
2614 if (GET_CODE (body) == PARALLEL
2615 && GET_CODE (XVECEXP (body, 0, 0)) == ASM_INPUT)
2616 body = XVECEXP (body, 0, 0);
2617
2618 if (GET_CODE (body) == ASM_INPUT)
2619 {
2620 const char *string = XSTR (body, 0);
2621
2622 /* There's no telling what that did to the condition codes. */
2623 CC_STATUS_INIT;
2624
2625 if (string[0])
2626 {
2627 expanded_location loc;
2628
2629 app_enable ();
2630 loc = expand_location (ASM_INPUT_SOURCE_LOCATION (body));
2631 if (*loc.file && loc.line)
2632 fprintf (asm_out_file, "%s %i \"%s\" 1\n",
2633 ASM_COMMENT_START, loc.line, loc.file);
2634 fprintf (asm_out_file, "\t%s\n", string);
2635 #if HAVE_AS_LINE_ZERO
2636 if (*loc.file && loc.line)
2637 fprintf (asm_out_file, "%s 0 \"\" 2\n", ASM_COMMENT_START);
2638 #endif
2639 }
2640 break;
2641 }
2642
2643 /* Detect `asm' construct with operands. */
2644 if (asm_noperands (body) >= 0)
2645 {
2646 unsigned int noperands = asm_noperands (body);
2647 rtx *ops = XALLOCAVEC (rtx, noperands);
2648 const char *string;
2649 location_t loc;
2650 expanded_location expanded;
2651
2652 /* There's no telling what that did to the condition codes. */
2653 CC_STATUS_INIT;
2654
2655 /* Get out the operand values. */
2656 string = decode_asm_operands (body, ops, NULL, NULL, NULL, &loc);
2657 /* Inhibit dying on what would otherwise be compiler bugs. */
2658 insn_noperands = noperands;
2659 this_is_asm_operands = insn;
2660 expanded = expand_location (loc);
2661
2662 #ifdef FINAL_PRESCAN_INSN
2663 FINAL_PRESCAN_INSN (insn, ops, insn_noperands);
2664 #endif
2665
2666 /* Output the insn using them. */
2667 if (string[0])
2668 {
2669 app_enable ();
2670 if (expanded.file && expanded.line)
2671 fprintf (asm_out_file, "%s %i \"%s\" 1\n",
2672 ASM_COMMENT_START, expanded.line, expanded.file);
2673 output_asm_insn (string, ops);
2674 #if HAVE_AS_LINE_ZERO
2675 if (expanded.file && expanded.line)
2676 fprintf (asm_out_file, "%s 0 \"\" 2\n", ASM_COMMENT_START);
2677 #endif
2678 }
2679
2680 if (targetm.asm_out.final_postscan_insn)
2681 targetm.asm_out.final_postscan_insn (file, insn, ops,
2682 insn_noperands);
2683
2684 this_is_asm_operands = 0;
2685 break;
2686 }
2687
2688 app_disable ();
2689
2690 if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (body))
2691 {
2692 /* A delayed-branch sequence */
2693 int i;
2694
2695 final_sequence = seq;
2696
2697 /* The first insn in this SEQUENCE might be a JUMP_INSN that will
2698 force the restoration of a comparison that was previously
2699 thought unnecessary. If that happens, cancel this sequence
2700 and cause that insn to be restored. */
2701
2702 next = final_scan_insn (seq->insn (0), file, 0, 1, seen);
2703 if (next != seq->insn (1))
2704 {
2705 final_sequence = 0;
2706 return next;
2707 }
2708
2709 for (i = 1; i < seq->len (); i++)
2710 {
2711 rtx_insn *insn = seq->insn (i);
2712 rtx_insn *next = NEXT_INSN (insn);
2713 /* We loop in case any instruction in a delay slot gets
2714 split. */
2715 do
2716 insn = final_scan_insn (insn, file, 0, 1, seen);
2717 while (insn != next);
2718 }
2719 #ifdef DBR_OUTPUT_SEQEND
2720 DBR_OUTPUT_SEQEND (file);
2721 #endif
2722 final_sequence = 0;
2723
2724 /* If the insn requiring the delay slot was a CALL_INSN, the
2725 insns in the delay slot are actually executed before the
2726 called function. Hence we don't preserve any CC-setting
2727 actions in these insns and the CC must be marked as being
2728 clobbered by the function. */
2729 if (CALL_P (seq->insn (0)))
2730 {
2731 CC_STATUS_INIT;
2732 }
2733 break;
2734 }
2735
2736 /* We have a real machine instruction as rtl. */
2737
2738 body = PATTERN (insn);
2739
2740 #if HAVE_cc0
2741 set = single_set (insn);
2742
2743 /* Check for redundant test and compare instructions
2744 (when the condition codes are already set up as desired).
2745 This is done only when optimizing; if not optimizing,
2746 it should be possible for the user to alter a variable
2747 with the debugger in between statements
2748 and the next statement should reexamine the variable
2749 to compute the condition codes. */
2750
2751 if (optimize_p)
2752 {
2753 if (set
2754 && GET_CODE (SET_DEST (set)) == CC0
2755 && insn != last_ignored_compare)
2756 {
2757 rtx src1, src2;
2758 if (GET_CODE (SET_SRC (set)) == SUBREG)
2759 SET_SRC (set) = alter_subreg (&SET_SRC (set), true);
2760
2761 src1 = SET_SRC (set);
2762 src2 = NULL_RTX;
2763 if (GET_CODE (SET_SRC (set)) == COMPARE)
2764 {
2765 if (GET_CODE (XEXP (SET_SRC (set), 0)) == SUBREG)
2766 XEXP (SET_SRC (set), 0)
2767 = alter_subreg (&XEXP (SET_SRC (set), 0), true);
2768 if (GET_CODE (XEXP (SET_SRC (set), 1)) == SUBREG)
2769 XEXP (SET_SRC (set), 1)
2770 = alter_subreg (&XEXP (SET_SRC (set), 1), true);
2771 if (XEXP (SET_SRC (set), 1)
2772 == CONST0_RTX (GET_MODE (XEXP (SET_SRC (set), 0))))
2773 src2 = XEXP (SET_SRC (set), 0);
2774 }
2775 if ((cc_status.value1 != 0
2776 && rtx_equal_p (src1, cc_status.value1))
2777 || (cc_status.value2 != 0
2778 && rtx_equal_p (src1, cc_status.value2))
2779 || (src2 != 0 && cc_status.value1 != 0
2780 && rtx_equal_p (src2, cc_status.value1))
2781 || (src2 != 0 && cc_status.value2 != 0
2782 && rtx_equal_p (src2, cc_status.value2)))
2783 {
2784 /* Don't delete insn if it has an addressing side-effect. */
2785 if (! FIND_REG_INC_NOTE (insn, NULL_RTX)
2786 /* or if anything in it is volatile. */
2787 && ! volatile_refs_p (PATTERN (insn)))
2788 {
2789 /* We don't really delete the insn; just ignore it. */
2790 last_ignored_compare = insn;
2791 break;
2792 }
2793 }
2794 }
2795 }
2796
2797 /* If this is a conditional branch, maybe modify it
2798 if the cc's are in a nonstandard state
2799 so that it accomplishes the same thing that it would
2800 do straightforwardly if the cc's were set up normally. */
2801
2802 if (cc_status.flags != 0
2803 && JUMP_P (insn)
2804 && GET_CODE (body) == SET
2805 && SET_DEST (body) == pc_rtx
2806 && GET_CODE (SET_SRC (body)) == IF_THEN_ELSE
2807 && COMPARISON_P (XEXP (SET_SRC (body), 0))
2808 && XEXP (XEXP (SET_SRC (body), 0), 0) == cc0_rtx)
2809 {
2810 /* This function may alter the contents of its argument
2811 and clear some of the cc_status.flags bits.
2812 It may also return 1 meaning condition now always true
2813 or -1 meaning condition now always false
2814 or 2 meaning condition nontrivial but altered. */
2815 int result = alter_cond (XEXP (SET_SRC (body), 0));
2816 /* If condition now has fixed value, replace the IF_THEN_ELSE
2817 with its then-operand or its else-operand. */
2818 if (result == 1)
2819 SET_SRC (body) = XEXP (SET_SRC (body), 1);
2820 if (result == -1)
2821 SET_SRC (body) = XEXP (SET_SRC (body), 2);
2822
2823 /* The jump is now either unconditional or a no-op.
2824 If it has become a no-op, don't try to output it.
2825 (It would not be recognized.) */
2826 if (SET_SRC (body) == pc_rtx)
2827 {
2828 delete_insn (insn);
2829 break;
2830 }
2831 else if (ANY_RETURN_P (SET_SRC (body)))
2832 /* Replace (set (pc) (return)) with (return). */
2833 PATTERN (insn) = body = SET_SRC (body);
2834
2835 /* Rerecognize the instruction if it has changed. */
2836 if (result != 0)
2837 INSN_CODE (insn) = -1;
2838 }
2839
2840 /* If this is a conditional trap, maybe modify it if the cc's
2841 are in a nonstandard state so that it accomplishes the same
2842 thing that it would do straightforwardly if the cc's were
2843 set up normally. */
2844 if (cc_status.flags != 0
2845 && NONJUMP_INSN_P (insn)
2846 && GET_CODE (body) == TRAP_IF
2847 && COMPARISON_P (TRAP_CONDITION (body))
2848 && XEXP (TRAP_CONDITION (body), 0) == cc0_rtx)
2849 {
2850 /* This function may alter the contents of its argument
2851 and clear some of the cc_status.flags bits.
2852 It may also return 1 meaning condition now always true
2853 or -1 meaning condition now always false
2854 or 2 meaning condition nontrivial but altered. */
2855 int result = alter_cond (TRAP_CONDITION (body));
2856
2857 /* If TRAP_CONDITION has become always false, delete the
2858 instruction. */
2859 if (result == -1)
2860 {
2861 delete_insn (insn);
2862 break;
2863 }
2864
2865 /* If TRAP_CONDITION has become always true, replace
2866 TRAP_CONDITION with const_true_rtx. */
2867 if (result == 1)
2868 TRAP_CONDITION (body) = const_true_rtx;
2869
2870 /* Rerecognize the instruction if it has changed. */
2871 if (result != 0)
2872 INSN_CODE (insn) = -1;
2873 }
2874
2875 /* Make same adjustments to instructions that examine the
2876 condition codes without jumping and instructions that
2877 handle conditional moves (if this machine has either one). */
2878
2879 if (cc_status.flags != 0
2880 && set != 0)
2881 {
2882 rtx cond_rtx, then_rtx, else_rtx;
2883
2884 if (!JUMP_P (insn)
2885 && GET_CODE (SET_SRC (set)) == IF_THEN_ELSE)
2886 {
2887 cond_rtx = XEXP (SET_SRC (set), 0);
2888 then_rtx = XEXP (SET_SRC (set), 1);
2889 else_rtx = XEXP (SET_SRC (set), 2);
2890 }
2891 else
2892 {
2893 cond_rtx = SET_SRC (set);
2894 then_rtx = const_true_rtx;
2895 else_rtx = const0_rtx;
2896 }
2897
2898 if (COMPARISON_P (cond_rtx)
2899 && XEXP (cond_rtx, 0) == cc0_rtx)
2900 {
2901 int result;
2902 result = alter_cond (cond_rtx);
2903 if (result == 1)
2904 validate_change (insn, &SET_SRC (set), then_rtx, 0);
2905 else if (result == -1)
2906 validate_change (insn, &SET_SRC (set), else_rtx, 0);
2907 else if (result == 2)
2908 INSN_CODE (insn) = -1;
2909 if (SET_DEST (set) == SET_SRC (set))
2910 delete_insn (insn);
2911 }
2912 }
2913
2914 #endif
2915
2916 /* Do machine-specific peephole optimizations if desired. */
2917
2918 if (HAVE_peephole && optimize_p && !flag_no_peephole && !nopeepholes)
2919 {
2920 rtx_insn *next = peephole (insn);
2921 /* When peepholing, if there were notes within the peephole,
2922 emit them before the peephole. */
2923 if (next != 0 && next != NEXT_INSN (insn))
2924 {
2925 rtx_insn *note, *prev = PREV_INSN (insn);
2926
2927 for (note = NEXT_INSN (insn); note != next;
2928 note = NEXT_INSN (note))
2929 final_scan_insn (note, file, optimize_p, nopeepholes, seen);
2930
2931 /* Put the notes in the proper position for a later
2932 rescan. For example, the SH target can do this
2933 when generating a far jump in a delayed branch
2934 sequence. */
2935 note = NEXT_INSN (insn);
2936 SET_PREV_INSN (note) = prev;
2937 SET_NEXT_INSN (prev) = note;
2938 SET_NEXT_INSN (PREV_INSN (next)) = insn;
2939 SET_PREV_INSN (insn) = PREV_INSN (next);
2940 SET_NEXT_INSN (insn) = next;
2941 SET_PREV_INSN (next) = insn;
2942 }
2943
2944 /* PEEPHOLE might have changed this. */
2945 body = PATTERN (insn);
2946 }
2947
2948 /* Try to recognize the instruction.
2949 If successful, verify that the operands satisfy the
2950 constraints for the instruction. Crash if they don't,
2951 since `reload' should have changed them so that they do. */
2952
2953 insn_code_number = recog_memoized (insn);
2954 cleanup_subreg_operands (insn);
2955
2956 /* Dump the insn in the assembly for debugging (-dAP).
2957 If the final dump is requested as slim RTL, dump slim
2958 RTL to the assembly file also. */
2959 if (flag_dump_rtl_in_asm)
2960 {
2961 print_rtx_head = ASM_COMMENT_START;
2962 if (! (dump_flags & TDF_SLIM))
2963 print_rtl_single (asm_out_file, insn);
2964 else
2965 dump_insn_slim (asm_out_file, insn);
2966 print_rtx_head = "";
2967 }
2968
2969 if (! constrain_operands_cached (insn, 1))
2970 fatal_insn_not_found (insn);
2971
2972 /* Some target machines need to prescan each insn before
2973 it is output. */
2974
2975 #ifdef FINAL_PRESCAN_INSN
2976 FINAL_PRESCAN_INSN (insn, recog_data.operand, recog_data.n_operands);
2977 #endif
2978
2979 if (targetm.have_conditional_execution ()
2980 && GET_CODE (PATTERN (insn)) == COND_EXEC)
2981 current_insn_predicate = COND_EXEC_TEST (PATTERN (insn));
2982
2983 #if HAVE_cc0
2984 cc_prev_status = cc_status;
2985
2986 /* Update `cc_status' for this instruction.
2987 The instruction's output routine may change it further.
2988 If the output routine for a jump insn needs to depend
2989 on the cc status, it should look at cc_prev_status. */
2990
2991 NOTICE_UPDATE_CC (body, insn);
2992 #endif
2993
2994 current_output_insn = debug_insn = insn;
2995
2996 /* Find the proper template for this insn. */
2997 templ = get_insn_template (insn_code_number, insn);
2998
2999 /* If the C code returns 0, it means that it is a jump insn
3000 which follows a deleted test insn, and that test insn
3001 needs to be reinserted. */
3002 if (templ == 0)
3003 {
3004 rtx_insn *prev;
3005
3006 gcc_assert (prev_nonnote_insn (insn) == last_ignored_compare);
3007
3008 /* We have already processed the notes between the setter and
3009 the user. Make sure we don't process them again, this is
3010 particularly important if one of the notes is a block
3011 scope note or an EH note. */
3012 for (prev = insn;
3013 prev != last_ignored_compare;
3014 prev = PREV_INSN (prev))
3015 {
3016 if (NOTE_P (prev))
3017 delete_insn (prev); /* Use delete_note. */
3018 }
3019
3020 return prev;
3021 }
3022
3023 /* If the template is the string "#", it means that this insn must
3024 be split. */
3025 if (templ[0] == '#' && templ[1] == '\0')
3026 {
3027 rtx_insn *new_rtx = try_split (body, insn, 0);
3028
3029 /* If we didn't split the insn, go away. */
3030 if (new_rtx == insn && PATTERN (new_rtx) == body)
3031 fatal_insn ("could not split insn", insn);
3032
3033 /* If we have a length attribute, this instruction should have
3034 been split in shorten_branches, to ensure that we would have
3035 valid length info for the splitees. */
3036 gcc_assert (!HAVE_ATTR_length);
3037
3038 return new_rtx;
3039 }
3040
3041 /* ??? This will put the directives in the wrong place if
3042 get_insn_template outputs assembly directly. However calling it
3043 before get_insn_template breaks if the insns is split. */
3044 if (targetm.asm_out.unwind_emit_before_insn
3045 && targetm.asm_out.unwind_emit)
3046 targetm.asm_out.unwind_emit (asm_out_file, insn);
3047
3048 rtx_call_insn *call_insn = dyn_cast <rtx_call_insn *> (insn);
3049 if (call_insn != NULL)
3050 {
3051 rtx x = call_from_call_insn (call_insn);
3052 x = XEXP (x, 0);
3053 if (x && MEM_P (x) && GET_CODE (XEXP (x, 0)) == SYMBOL_REF)
3054 {
3055 tree t;
3056 x = XEXP (x, 0);
3057 t = SYMBOL_REF_DECL (x);
3058 if (t)
3059 assemble_external (t);
3060 }
3061 }
3062
3063 /* Output assembler code from the template. */
3064 output_asm_insn (templ, recog_data.operand);
3065
3066 /* Some target machines need to postscan each insn after
3067 it is output. */
3068 if (targetm.asm_out.final_postscan_insn)
3069 targetm.asm_out.final_postscan_insn (file, insn, recog_data.operand,
3070 recog_data.n_operands);
3071
3072 if (!targetm.asm_out.unwind_emit_before_insn
3073 && targetm.asm_out.unwind_emit)
3074 targetm.asm_out.unwind_emit (asm_out_file, insn);
3075
3076 /* Let the debug info back-end know about this call. We do this only
3077 after the instruction has been emitted because labels that may be
3078 created to reference the call instruction must appear after it. */
3079 if (call_insn != NULL && !DECL_IGNORED_P (current_function_decl))
3080 debug_hooks->var_location (insn);
3081
3082 current_output_insn = debug_insn = 0;
3083 }
3084 }
3085 return NEXT_INSN (insn);
3086 }
3087 \f
3088 /* Return whether a source line note needs to be emitted before INSN.
3089 Sets IS_STMT to TRUE if the line should be marked as a possible
3090 breakpoint location. */
3091
3092 static bool
3093 notice_source_line (rtx_insn *insn, bool *is_stmt)
3094 {
3095 const char *filename;
3096 int linenum, columnnum;
3097
3098 if (override_filename)
3099 {
3100 filename = override_filename;
3101 linenum = override_linenum;
3102 columnnum = override_columnnum;
3103 }
3104 else if (INSN_HAS_LOCATION (insn))
3105 {
3106 expanded_location xloc = insn_location (insn);
3107 filename = xloc.file;
3108 linenum = xloc.line;
3109 columnnum = xloc.column;
3110 }
3111 else
3112 {
3113 filename = NULL;
3114 linenum = 0;
3115 columnnum = 0;
3116 }
3117
3118 if (filename == NULL)
3119 return false;
3120
3121 if (force_source_line
3122 || filename != last_filename
3123 || last_linenum != linenum
3124 || (debug_column_info && last_columnnum != columnnum))
3125 {
3126 force_source_line = false;
3127 last_filename = filename;
3128 last_linenum = linenum;
3129 last_columnnum = columnnum;
3130 last_discriminator = discriminator;
3131 *is_stmt = true;
3132 high_block_linenum = MAX (last_linenum, high_block_linenum);
3133 high_function_linenum = MAX (last_linenum, high_function_linenum);
3134 return true;
3135 }
3136
3137 if (SUPPORTS_DISCRIMINATOR && last_discriminator != discriminator)
3138 {
3139 /* If the discriminator changed, but the line number did not,
3140 output the line table entry with is_stmt false so the
3141 debugger does not treat this as a breakpoint location. */
3142 last_discriminator = discriminator;
3143 *is_stmt = false;
3144 return true;
3145 }
3146
3147 return false;
3148 }
3149 \f
3150 /* For each operand in INSN, simplify (subreg (reg)) so that it refers
3151 directly to the desired hard register. */
3152
3153 void
3154 cleanup_subreg_operands (rtx_insn *insn)
3155 {
3156 int i;
3157 bool changed = false;
3158 extract_insn_cached (insn);
3159 for (i = 0; i < recog_data.n_operands; i++)
3160 {
3161 /* The following test cannot use recog_data.operand when testing
3162 for a SUBREG: the underlying object might have been changed
3163 already if we are inside a match_operator expression that
3164 matches the else clause. Instead we test the underlying
3165 expression directly. */
3166 if (GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
3167 {
3168 recog_data.operand[i] = alter_subreg (recog_data.operand_loc[i], true);
3169 changed = true;
3170 }
3171 else if (GET_CODE (recog_data.operand[i]) == PLUS
3172 || GET_CODE (recog_data.operand[i]) == MULT
3173 || MEM_P (recog_data.operand[i]))
3174 recog_data.operand[i] = walk_alter_subreg (recog_data.operand_loc[i], &changed);
3175 }
3176
3177 for (i = 0; i < recog_data.n_dups; i++)
3178 {
3179 if (GET_CODE (*recog_data.dup_loc[i]) == SUBREG)
3180 {
3181 *recog_data.dup_loc[i] = alter_subreg (recog_data.dup_loc[i], true);
3182 changed = true;
3183 }
3184 else if (GET_CODE (*recog_data.dup_loc[i]) == PLUS
3185 || GET_CODE (*recog_data.dup_loc[i]) == MULT
3186 || MEM_P (*recog_data.dup_loc[i]))
3187 *recog_data.dup_loc[i] = walk_alter_subreg (recog_data.dup_loc[i], &changed);
3188 }
3189 if (changed)
3190 df_insn_rescan (insn);
3191 }
3192
3193 /* If X is a SUBREG, try to replace it with a REG or a MEM, based on
3194 the thing it is a subreg of. Do it anyway if FINAL_P. */
3195
3196 rtx
3197 alter_subreg (rtx *xp, bool final_p)
3198 {
3199 rtx x = *xp;
3200 rtx y = SUBREG_REG (x);
3201
3202 /* simplify_subreg does not remove subreg from volatile references.
3203 We are required to. */
3204 if (MEM_P (y))
3205 {
3206 int offset = SUBREG_BYTE (x);
3207
3208 /* For paradoxical subregs on big-endian machines, SUBREG_BYTE
3209 contains 0 instead of the proper offset. See simplify_subreg. */
3210 if (paradoxical_subreg_p (x))
3211 offset = byte_lowpart_offset (GET_MODE (x), GET_MODE (y));
3212
3213 if (final_p)
3214 *xp = adjust_address (y, GET_MODE (x), offset);
3215 else
3216 *xp = adjust_address_nv (y, GET_MODE (x), offset);
3217 }
3218 else if (REG_P (y) && HARD_REGISTER_P (y))
3219 {
3220 rtx new_rtx = simplify_subreg (GET_MODE (x), y, GET_MODE (y),
3221 SUBREG_BYTE (x));
3222
3223 if (new_rtx != 0)
3224 *xp = new_rtx;
3225 else if (final_p && REG_P (y))
3226 {
3227 /* Simplify_subreg can't handle some REG cases, but we have to. */
3228 unsigned int regno;
3229 HOST_WIDE_INT offset;
3230
3231 regno = subreg_regno (x);
3232 if (subreg_lowpart_p (x))
3233 offset = byte_lowpart_offset (GET_MODE (x), GET_MODE (y));
3234 else
3235 offset = SUBREG_BYTE (x);
3236 *xp = gen_rtx_REG_offset (y, GET_MODE (x), regno, offset);
3237 }
3238 }
3239
3240 return *xp;
3241 }
3242
3243 /* Do alter_subreg on all the SUBREGs contained in X. */
3244
3245 static rtx
3246 walk_alter_subreg (rtx *xp, bool *changed)
3247 {
3248 rtx x = *xp;
3249 switch (GET_CODE (x))
3250 {
3251 case PLUS:
3252 case MULT:
3253 case AND:
3254 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed);
3255 XEXP (x, 1) = walk_alter_subreg (&XEXP (x, 1), changed);
3256 break;
3257
3258 case MEM:
3259 case ZERO_EXTEND:
3260 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed);
3261 break;
3262
3263 case SUBREG:
3264 *changed = true;
3265 return alter_subreg (xp, true);
3266
3267 default:
3268 break;
3269 }
3270
3271 return *xp;
3272 }
3273 \f
3274 #if HAVE_cc0
3275
3276 /* Given BODY, the body of a jump instruction, alter the jump condition
3277 as required by the bits that are set in cc_status.flags.
3278 Not all of the bits there can be handled at this level in all cases.
3279
3280 The value is normally 0.
3281 1 means that the condition has become always true.
3282 -1 means that the condition has become always false.
3283 2 means that COND has been altered. */
3284
3285 static int
3286 alter_cond (rtx cond)
3287 {
3288 int value = 0;
3289
3290 if (cc_status.flags & CC_REVERSED)
3291 {
3292 value = 2;
3293 PUT_CODE (cond, swap_condition (GET_CODE (cond)));
3294 }
3295
3296 if (cc_status.flags & CC_INVERTED)
3297 {
3298 value = 2;
3299 PUT_CODE (cond, reverse_condition (GET_CODE (cond)));
3300 }
3301
3302 if (cc_status.flags & CC_NOT_POSITIVE)
3303 switch (GET_CODE (cond))
3304 {
3305 case LE:
3306 case LEU:
3307 case GEU:
3308 /* Jump becomes unconditional. */
3309 return 1;
3310
3311 case GT:
3312 case GTU:
3313 case LTU:
3314 /* Jump becomes no-op. */
3315 return -1;
3316
3317 case GE:
3318 PUT_CODE (cond, EQ);
3319 value = 2;
3320 break;
3321
3322 case LT:
3323 PUT_CODE (cond, NE);
3324 value = 2;
3325 break;
3326
3327 default:
3328 break;
3329 }
3330
3331 if (cc_status.flags & CC_NOT_NEGATIVE)
3332 switch (GET_CODE (cond))
3333 {
3334 case GE:
3335 case GEU:
3336 /* Jump becomes unconditional. */
3337 return 1;
3338
3339 case LT:
3340 case LTU:
3341 /* Jump becomes no-op. */
3342 return -1;
3343
3344 case LE:
3345 case LEU:
3346 PUT_CODE (cond, EQ);
3347 value = 2;
3348 break;
3349
3350 case GT:
3351 case GTU:
3352 PUT_CODE (cond, NE);
3353 value = 2;
3354 break;
3355
3356 default:
3357 break;
3358 }
3359
3360 if (cc_status.flags & CC_NO_OVERFLOW)
3361 switch (GET_CODE (cond))
3362 {
3363 case GEU:
3364 /* Jump becomes unconditional. */
3365 return 1;
3366
3367 case LEU:
3368 PUT_CODE (cond, EQ);
3369 value = 2;
3370 break;
3371
3372 case GTU:
3373 PUT_CODE (cond, NE);
3374 value = 2;
3375 break;
3376
3377 case LTU:
3378 /* Jump becomes no-op. */
3379 return -1;
3380
3381 default:
3382 break;
3383 }
3384
3385 if (cc_status.flags & (CC_Z_IN_NOT_N | CC_Z_IN_N))
3386 switch (GET_CODE (cond))
3387 {
3388 default:
3389 gcc_unreachable ();
3390
3391 case NE:
3392 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? GE : LT);
3393 value = 2;
3394 break;
3395
3396 case EQ:
3397 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? LT : GE);
3398 value = 2;
3399 break;
3400 }
3401
3402 if (cc_status.flags & CC_NOT_SIGNED)
3403 /* The flags are valid if signed condition operators are converted
3404 to unsigned. */
3405 switch (GET_CODE (cond))
3406 {
3407 case LE:
3408 PUT_CODE (cond, LEU);
3409 value = 2;
3410 break;
3411
3412 case LT:
3413 PUT_CODE (cond, LTU);
3414 value = 2;
3415 break;
3416
3417 case GT:
3418 PUT_CODE (cond, GTU);
3419 value = 2;
3420 break;
3421
3422 case GE:
3423 PUT_CODE (cond, GEU);
3424 value = 2;
3425 break;
3426
3427 default:
3428 break;
3429 }
3430
3431 return value;
3432 }
3433 #endif
3434 \f
3435 /* Report inconsistency between the assembler template and the operands.
3436 In an `asm', it's the user's fault; otherwise, the compiler's fault. */
3437
3438 void
3439 output_operand_lossage (const char *cmsgid, ...)
3440 {
3441 char *fmt_string;
3442 char *new_message;
3443 const char *pfx_str;
3444 va_list ap;
3445
3446 va_start (ap, cmsgid);
3447
3448 pfx_str = this_is_asm_operands ? _("invalid 'asm': ") : "output_operand: ";
3449 fmt_string = xasprintf ("%s%s", pfx_str, _(cmsgid));
3450 new_message = xvasprintf (fmt_string, ap);
3451
3452 if (this_is_asm_operands)
3453 error_for_asm (this_is_asm_operands, "%s", new_message);
3454 else
3455 internal_error ("%s", new_message);
3456
3457 free (fmt_string);
3458 free (new_message);
3459 va_end (ap);
3460 }
3461 \f
3462 /* Output of assembler code from a template, and its subroutines. */
3463
3464 /* Annotate the assembly with a comment describing the pattern and
3465 alternative used. */
3466
3467 static void
3468 output_asm_name (void)
3469 {
3470 if (debug_insn)
3471 {
3472 int num = INSN_CODE (debug_insn);
3473 fprintf (asm_out_file, "\t%s %d\t%s",
3474 ASM_COMMENT_START, INSN_UID (debug_insn),
3475 insn_data[num].name);
3476 if (insn_data[num].n_alternatives > 1)
3477 fprintf (asm_out_file, "/%d", which_alternative + 1);
3478
3479 if (HAVE_ATTR_length)
3480 fprintf (asm_out_file, "\t[length = %d]",
3481 get_attr_length (debug_insn));
3482
3483 /* Clear this so only the first assembler insn
3484 of any rtl insn will get the special comment for -dp. */
3485 debug_insn = 0;
3486 }
3487 }
3488
3489 /* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it
3490 or its address, return that expr . Set *PADDRESSP to 1 if the expr
3491 corresponds to the address of the object and 0 if to the object. */
3492
3493 static tree
3494 get_mem_expr_from_op (rtx op, int *paddressp)
3495 {
3496 tree expr;
3497 int inner_addressp;
3498
3499 *paddressp = 0;
3500
3501 if (REG_P (op))
3502 return REG_EXPR (op);
3503 else if (!MEM_P (op))
3504 return 0;
3505
3506 if (MEM_EXPR (op) != 0)
3507 return MEM_EXPR (op);
3508
3509 /* Otherwise we have an address, so indicate it and look at the address. */
3510 *paddressp = 1;
3511 op = XEXP (op, 0);
3512
3513 /* First check if we have a decl for the address, then look at the right side
3514 if it is a PLUS. Otherwise, strip off arithmetic and keep looking.
3515 But don't allow the address to itself be indirect. */
3516 if ((expr = get_mem_expr_from_op (op, &inner_addressp)) && ! inner_addressp)
3517 return expr;
3518 else if (GET_CODE (op) == PLUS
3519 && (expr = get_mem_expr_from_op (XEXP (op, 1), &inner_addressp)))
3520 return expr;
3521
3522 while (UNARY_P (op)
3523 || GET_RTX_CLASS (GET_CODE (op)) == RTX_BIN_ARITH)
3524 op = XEXP (op, 0);
3525
3526 expr = get_mem_expr_from_op (op, &inner_addressp);
3527 return inner_addressp ? 0 : expr;
3528 }
3529
3530 /* Output operand names for assembler instructions. OPERANDS is the
3531 operand vector, OPORDER is the order to write the operands, and NOPS
3532 is the number of operands to write. */
3533
3534 static void
3535 output_asm_operand_names (rtx *operands, int *oporder, int nops)
3536 {
3537 int wrote = 0;
3538 int i;
3539
3540 for (i = 0; i < nops; i++)
3541 {
3542 int addressp;
3543 rtx op = operands[oporder[i]];
3544 tree expr = get_mem_expr_from_op (op, &addressp);
3545
3546 fprintf (asm_out_file, "%c%s",
3547 wrote ? ',' : '\t', wrote ? "" : ASM_COMMENT_START);
3548 wrote = 1;
3549 if (expr)
3550 {
3551 fprintf (asm_out_file, "%s",
3552 addressp ? "*" : "");
3553 print_mem_expr (asm_out_file, expr);
3554 wrote = 1;
3555 }
3556 else if (REG_P (op) && ORIGINAL_REGNO (op)
3557 && ORIGINAL_REGNO (op) != REGNO (op))
3558 fprintf (asm_out_file, " tmp%i", ORIGINAL_REGNO (op));
3559 }
3560 }
3561
3562 #ifdef ASSEMBLER_DIALECT
3563 /* Helper function to parse assembler dialects in the asm string.
3564 This is called from output_asm_insn and asm_fprintf. */
3565 static const char *
3566 do_assembler_dialects (const char *p, int *dialect)
3567 {
3568 char c = *(p - 1);
3569
3570 switch (c)
3571 {
3572 case '{':
3573 {
3574 int i;
3575
3576 if (*dialect)
3577 output_operand_lossage ("nested assembly dialect alternatives");
3578 else
3579 *dialect = 1;
3580
3581 /* If we want the first dialect, do nothing. Otherwise, skip
3582 DIALECT_NUMBER of strings ending with '|'. */
3583 for (i = 0; i < dialect_number; i++)
3584 {
3585 while (*p && *p != '}')
3586 {
3587 if (*p == '|')
3588 {
3589 p++;
3590 break;
3591 }
3592
3593 /* Skip over any character after a percent sign. */
3594 if (*p == '%')
3595 p++;
3596 if (*p)
3597 p++;
3598 }
3599
3600 if (*p == '}')
3601 break;
3602 }
3603
3604 if (*p == '\0')
3605 output_operand_lossage ("unterminated assembly dialect alternative");
3606 }
3607 break;
3608
3609 case '|':
3610 if (*dialect)
3611 {
3612 /* Skip to close brace. */
3613 do
3614 {
3615 if (*p == '\0')
3616 {
3617 output_operand_lossage ("unterminated assembly dialect alternative");
3618 break;
3619 }
3620
3621 /* Skip over any character after a percent sign. */
3622 if (*p == '%' && p[1])
3623 {
3624 p += 2;
3625 continue;
3626 }
3627
3628 if (*p++ == '}')
3629 break;
3630 }
3631 while (1);
3632
3633 *dialect = 0;
3634 }
3635 else
3636 putc (c, asm_out_file);
3637 break;
3638
3639 case '}':
3640 if (! *dialect)
3641 putc (c, asm_out_file);
3642 *dialect = 0;
3643 break;
3644 default:
3645 gcc_unreachable ();
3646 }
3647
3648 return p;
3649 }
3650 #endif
3651
3652 /* Output text from TEMPLATE to the assembler output file,
3653 obeying %-directions to substitute operands taken from
3654 the vector OPERANDS.
3655
3656 %N (for N a digit) means print operand N in usual manner.
3657 %lN means require operand N to be a CODE_LABEL or LABEL_REF
3658 and print the label name with no punctuation.
3659 %cN means require operand N to be a constant
3660 and print the constant expression with no punctuation.
3661 %aN means expect operand N to be a memory address
3662 (not a memory reference!) and print a reference
3663 to that address.
3664 %nN means expect operand N to be a constant
3665 and print a constant expression for minus the value
3666 of the operand, with no other punctuation. */
3667
3668 void
3669 output_asm_insn (const char *templ, rtx *operands)
3670 {
3671 const char *p;
3672 int c;
3673 #ifdef ASSEMBLER_DIALECT
3674 int dialect = 0;
3675 #endif
3676 int oporder[MAX_RECOG_OPERANDS];
3677 char opoutput[MAX_RECOG_OPERANDS];
3678 int ops = 0;
3679
3680 /* An insn may return a null string template
3681 in a case where no assembler code is needed. */
3682 if (*templ == 0)
3683 return;
3684
3685 memset (opoutput, 0, sizeof opoutput);
3686 p = templ;
3687 putc ('\t', asm_out_file);
3688
3689 #ifdef ASM_OUTPUT_OPCODE
3690 ASM_OUTPUT_OPCODE (asm_out_file, p);
3691 #endif
3692
3693 while ((c = *p++))
3694 switch (c)
3695 {
3696 case '\n':
3697 if (flag_verbose_asm)
3698 output_asm_operand_names (operands, oporder, ops);
3699 if (flag_print_asm_name)
3700 output_asm_name ();
3701
3702 ops = 0;
3703 memset (opoutput, 0, sizeof opoutput);
3704
3705 putc (c, asm_out_file);
3706 #ifdef ASM_OUTPUT_OPCODE
3707 while ((c = *p) == '\t')
3708 {
3709 putc (c, asm_out_file);
3710 p++;
3711 }
3712 ASM_OUTPUT_OPCODE (asm_out_file, p);
3713 #endif
3714 break;
3715
3716 #ifdef ASSEMBLER_DIALECT
3717 case '{':
3718 case '}':
3719 case '|':
3720 p = do_assembler_dialects (p, &dialect);
3721 break;
3722 #endif
3723
3724 case '%':
3725 /* %% outputs a single %. %{, %} and %| print {, } and | respectively
3726 if ASSEMBLER_DIALECT defined and these characters have a special
3727 meaning as dialect delimiters.*/
3728 if (*p == '%'
3729 #ifdef ASSEMBLER_DIALECT
3730 || *p == '{' || *p == '}' || *p == '|'
3731 #endif
3732 )
3733 {
3734 putc (*p, asm_out_file);
3735 p++;
3736 }
3737 /* %= outputs a number which is unique to each insn in the entire
3738 compilation. This is useful for making local labels that are
3739 referred to more than once in a given insn. */
3740 else if (*p == '=')
3741 {
3742 p++;
3743 fprintf (asm_out_file, "%d", insn_counter);
3744 }
3745 /* % followed by a letter and some digits
3746 outputs an operand in a special way depending on the letter.
3747 Letters `acln' are implemented directly.
3748 Other letters are passed to `output_operand' so that
3749 the TARGET_PRINT_OPERAND hook can define them. */
3750 else if (ISALPHA (*p))
3751 {
3752 int letter = *p++;
3753 unsigned long opnum;
3754 char *endptr;
3755
3756 opnum = strtoul (p, &endptr, 10);
3757
3758 if (endptr == p)
3759 output_operand_lossage ("operand number missing "
3760 "after %%-letter");
3761 else if (this_is_asm_operands && opnum >= insn_noperands)
3762 output_operand_lossage ("operand number out of range");
3763 else if (letter == 'l')
3764 output_asm_label (operands[opnum]);
3765 else if (letter == 'a')
3766 output_address (VOIDmode, operands[opnum]);
3767 else if (letter == 'c')
3768 {
3769 if (CONSTANT_ADDRESS_P (operands[opnum]))
3770 output_addr_const (asm_out_file, operands[opnum]);
3771 else
3772 output_operand (operands[opnum], 'c');
3773 }
3774 else if (letter == 'n')
3775 {
3776 if (CONST_INT_P (operands[opnum]))
3777 fprintf (asm_out_file, HOST_WIDE_INT_PRINT_DEC,
3778 - INTVAL (operands[opnum]));
3779 else
3780 {
3781 putc ('-', asm_out_file);
3782 output_addr_const (asm_out_file, operands[opnum]);
3783 }
3784 }
3785 else
3786 output_operand (operands[opnum], letter);
3787
3788 if (!opoutput[opnum])
3789 oporder[ops++] = opnum;
3790 opoutput[opnum] = 1;
3791
3792 p = endptr;
3793 c = *p;
3794 }
3795 /* % followed by a digit outputs an operand the default way. */
3796 else if (ISDIGIT (*p))
3797 {
3798 unsigned long opnum;
3799 char *endptr;
3800
3801 opnum = strtoul (p, &endptr, 10);
3802 if (this_is_asm_operands && opnum >= insn_noperands)
3803 output_operand_lossage ("operand number out of range");
3804 else
3805 output_operand (operands[opnum], 0);
3806
3807 if (!opoutput[opnum])
3808 oporder[ops++] = opnum;
3809 opoutput[opnum] = 1;
3810
3811 p = endptr;
3812 c = *p;
3813 }
3814 /* % followed by punctuation: output something for that
3815 punctuation character alone, with no operand. The
3816 TARGET_PRINT_OPERAND hook decides what is actually done. */
3817 else if (targetm.asm_out.print_operand_punct_valid_p ((unsigned char) *p))
3818 output_operand (NULL_RTX, *p++);
3819 else
3820 output_operand_lossage ("invalid %%-code");
3821 break;
3822
3823 default:
3824 putc (c, asm_out_file);
3825 }
3826
3827 /* Write out the variable names for operands, if we know them. */
3828 if (flag_verbose_asm)
3829 output_asm_operand_names (operands, oporder, ops);
3830 if (flag_print_asm_name)
3831 output_asm_name ();
3832
3833 putc ('\n', asm_out_file);
3834 }
3835 \f
3836 /* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */
3837
3838 void
3839 output_asm_label (rtx x)
3840 {
3841 char buf[256];
3842
3843 if (GET_CODE (x) == LABEL_REF)
3844 x = label_ref_label (x);
3845 if (LABEL_P (x)
3846 || (NOTE_P (x)
3847 && NOTE_KIND (x) == NOTE_INSN_DELETED_LABEL))
3848 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3849 else
3850 output_operand_lossage ("'%%l' operand isn't a label");
3851
3852 assemble_name (asm_out_file, buf);
3853 }
3854
3855 /* Marks SYMBOL_REFs in x as referenced through use of assemble_external. */
3856
3857 void
3858 mark_symbol_refs_as_used (rtx x)
3859 {
3860 subrtx_iterator::array_type array;
3861 FOR_EACH_SUBRTX (iter, array, x, ALL)
3862 {
3863 const_rtx x = *iter;
3864 if (GET_CODE (x) == SYMBOL_REF)
3865 if (tree t = SYMBOL_REF_DECL (x))
3866 assemble_external (t);
3867 }
3868 }
3869
3870 /* Print operand X using machine-dependent assembler syntax.
3871 CODE is a non-digit that preceded the operand-number in the % spec,
3872 such as 'z' if the spec was `%z3'. CODE is 0 if there was no char
3873 between the % and the digits.
3874 When CODE is a non-letter, X is 0.
3875
3876 The meanings of the letters are machine-dependent and controlled
3877 by TARGET_PRINT_OPERAND. */
3878
3879 void
3880 output_operand (rtx x, int code ATTRIBUTE_UNUSED)
3881 {
3882 if (x && GET_CODE (x) == SUBREG)
3883 x = alter_subreg (&x, true);
3884
3885 /* X must not be a pseudo reg. */
3886 if (!targetm.no_register_allocation)
3887 gcc_assert (!x || !REG_P (x) || REGNO (x) < FIRST_PSEUDO_REGISTER);
3888
3889 targetm.asm_out.print_operand (asm_out_file, x, code);
3890
3891 if (x == NULL_RTX)
3892 return;
3893
3894 mark_symbol_refs_as_used (x);
3895 }
3896
3897 /* Print a memory reference operand for address X using
3898 machine-dependent assembler syntax. */
3899
3900 void
3901 output_address (machine_mode mode, rtx x)
3902 {
3903 bool changed = false;
3904 walk_alter_subreg (&x, &changed);
3905 targetm.asm_out.print_operand_address (asm_out_file, mode, x);
3906 }
3907 \f
3908 /* Print an integer constant expression in assembler syntax.
3909 Addition and subtraction are the only arithmetic
3910 that may appear in these expressions. */
3911
3912 void
3913 output_addr_const (FILE *file, rtx x)
3914 {
3915 char buf[256];
3916
3917 restart:
3918 switch (GET_CODE (x))
3919 {
3920 case PC:
3921 putc ('.', file);
3922 break;
3923
3924 case SYMBOL_REF:
3925 if (SYMBOL_REF_DECL (x))
3926 assemble_external (SYMBOL_REF_DECL (x));
3927 #ifdef ASM_OUTPUT_SYMBOL_REF
3928 ASM_OUTPUT_SYMBOL_REF (file, x);
3929 #else
3930 assemble_name (file, XSTR (x, 0));
3931 #endif
3932 break;
3933
3934 case LABEL_REF:
3935 x = label_ref_label (x);
3936 /* Fall through. */
3937 case CODE_LABEL:
3938 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3939 #ifdef ASM_OUTPUT_LABEL_REF
3940 ASM_OUTPUT_LABEL_REF (file, buf);
3941 #else
3942 assemble_name (file, buf);
3943 #endif
3944 break;
3945
3946 case CONST_INT:
3947 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x));
3948 break;
3949
3950 case CONST:
3951 /* This used to output parentheses around the expression,
3952 but that does not work on the 386 (either ATT or BSD assembler). */
3953 output_addr_const (file, XEXP (x, 0));
3954 break;
3955
3956 case CONST_WIDE_INT:
3957 /* We do not know the mode here so we have to use a round about
3958 way to build a wide-int to get it printed properly. */
3959 {
3960 wide_int w = wide_int::from_array (&CONST_WIDE_INT_ELT (x, 0),
3961 CONST_WIDE_INT_NUNITS (x),
3962 CONST_WIDE_INT_NUNITS (x)
3963 * HOST_BITS_PER_WIDE_INT,
3964 false);
3965 print_decs (w, file);
3966 }
3967 break;
3968
3969 case CONST_DOUBLE:
3970 if (CONST_DOUBLE_AS_INT_P (x))
3971 {
3972 /* We can use %d if the number is one word and positive. */
3973 if (CONST_DOUBLE_HIGH (x))
3974 fprintf (file, HOST_WIDE_INT_PRINT_DOUBLE_HEX,
3975 (unsigned HOST_WIDE_INT) CONST_DOUBLE_HIGH (x),
3976 (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (x));
3977 else if (CONST_DOUBLE_LOW (x) < 0)
3978 fprintf (file, HOST_WIDE_INT_PRINT_HEX,
3979 (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (x));
3980 else
3981 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x));
3982 }
3983 else
3984 /* We can't handle floating point constants;
3985 PRINT_OPERAND must handle them. */
3986 output_operand_lossage ("floating constant misused");
3987 break;
3988
3989 case CONST_FIXED:
3990 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_FIXED_VALUE_LOW (x));
3991 break;
3992
3993 case PLUS:
3994 /* Some assemblers need integer constants to appear last (eg masm). */
3995 if (CONST_INT_P (XEXP (x, 0)))
3996 {
3997 output_addr_const (file, XEXP (x, 1));
3998 if (INTVAL (XEXP (x, 0)) >= 0)
3999 fprintf (file, "+");
4000 output_addr_const (file, XEXP (x, 0));
4001 }
4002 else
4003 {
4004 output_addr_const (file, XEXP (x, 0));
4005 if (!CONST_INT_P (XEXP (x, 1))
4006 || INTVAL (XEXP (x, 1)) >= 0)
4007 fprintf (file, "+");
4008 output_addr_const (file, XEXP (x, 1));
4009 }
4010 break;
4011
4012 case MINUS:
4013 /* Avoid outputting things like x-x or x+5-x,
4014 since some assemblers can't handle that. */
4015 x = simplify_subtraction (x);
4016 if (GET_CODE (x) != MINUS)
4017 goto restart;
4018
4019 output_addr_const (file, XEXP (x, 0));
4020 fprintf (file, "-");
4021 if ((CONST_INT_P (XEXP (x, 1)) && INTVAL (XEXP (x, 1)) >= 0)
4022 || GET_CODE (XEXP (x, 1)) == PC
4023 || GET_CODE (XEXP (x, 1)) == SYMBOL_REF)
4024 output_addr_const (file, XEXP (x, 1));
4025 else
4026 {
4027 fputs (targetm.asm_out.open_paren, file);
4028 output_addr_const (file, XEXP (x, 1));
4029 fputs (targetm.asm_out.close_paren, file);
4030 }
4031 break;
4032
4033 case ZERO_EXTEND:
4034 case SIGN_EXTEND:
4035 case SUBREG:
4036 case TRUNCATE:
4037 output_addr_const (file, XEXP (x, 0));
4038 break;
4039
4040 default:
4041 if (targetm.asm_out.output_addr_const_extra (file, x))
4042 break;
4043
4044 output_operand_lossage ("invalid expression as operand");
4045 }
4046 }
4047 \f
4048 /* Output a quoted string. */
4049
4050 void
4051 output_quoted_string (FILE *asm_file, const char *string)
4052 {
4053 #ifdef OUTPUT_QUOTED_STRING
4054 OUTPUT_QUOTED_STRING (asm_file, string);
4055 #else
4056 char c;
4057
4058 putc ('\"', asm_file);
4059 while ((c = *string++) != 0)
4060 {
4061 if (ISPRINT (c))
4062 {
4063 if (c == '\"' || c == '\\')
4064 putc ('\\', asm_file);
4065 putc (c, asm_file);
4066 }
4067 else
4068 fprintf (asm_file, "\\%03o", (unsigned char) c);
4069 }
4070 putc ('\"', asm_file);
4071 #endif
4072 }
4073 \f
4074 /* Write a HOST_WIDE_INT number in hex form 0x1234, fast. */
4075
4076 void
4077 fprint_whex (FILE *f, unsigned HOST_WIDE_INT value)
4078 {
4079 char buf[2 + CHAR_BIT * sizeof (value) / 4];
4080 if (value == 0)
4081 putc ('0', f);
4082 else
4083 {
4084 char *p = buf + sizeof (buf);
4085 do
4086 *--p = "0123456789abcdef"[value % 16];
4087 while ((value /= 16) != 0);
4088 *--p = 'x';
4089 *--p = '0';
4090 fwrite (p, 1, buf + sizeof (buf) - p, f);
4091 }
4092 }
4093
4094 /* Internal function that prints an unsigned long in decimal in reverse.
4095 The output string IS NOT null-terminated. */
4096
4097 static int
4098 sprint_ul_rev (char *s, unsigned long value)
4099 {
4100 int i = 0;
4101 do
4102 {
4103 s[i] = "0123456789"[value % 10];
4104 value /= 10;
4105 i++;
4106 /* alternate version, without modulo */
4107 /* oldval = value; */
4108 /* value /= 10; */
4109 /* s[i] = "0123456789" [oldval - 10*value]; */
4110 /* i++ */
4111 }
4112 while (value != 0);
4113 return i;
4114 }
4115
4116 /* Write an unsigned long as decimal to a file, fast. */
4117
4118 void
4119 fprint_ul (FILE *f, unsigned long value)
4120 {
4121 /* python says: len(str(2**64)) == 20 */
4122 char s[20];
4123 int i;
4124
4125 i = sprint_ul_rev (s, value);
4126
4127 /* It's probably too small to bother with string reversal and fputs. */
4128 do
4129 {
4130 i--;
4131 putc (s[i], f);
4132 }
4133 while (i != 0);
4134 }
4135
4136 /* Write an unsigned long as decimal to a string, fast.
4137 s must be wide enough to not overflow, at least 21 chars.
4138 Returns the length of the string (without terminating '\0'). */
4139
4140 int
4141 sprint_ul (char *s, unsigned long value)
4142 {
4143 int len = sprint_ul_rev (s, value);
4144 s[len] = '\0';
4145
4146 std::reverse (s, s + len);
4147 return len;
4148 }
4149
4150 /* A poor man's fprintf, with the added features of %I, %R, %L, and %U.
4151 %R prints the value of REGISTER_PREFIX.
4152 %L prints the value of LOCAL_LABEL_PREFIX.
4153 %U prints the value of USER_LABEL_PREFIX.
4154 %I prints the value of IMMEDIATE_PREFIX.
4155 %O runs ASM_OUTPUT_OPCODE to transform what follows in the string.
4156 Also supported are %d, %i, %u, %x, %X, %o, %c, %s and %%.
4157
4158 We handle alternate assembler dialects here, just like output_asm_insn. */
4159
4160 void
4161 asm_fprintf (FILE *file, const char *p, ...)
4162 {
4163 char buf[10];
4164 char *q, c;
4165 #ifdef ASSEMBLER_DIALECT
4166 int dialect = 0;
4167 #endif
4168 va_list argptr;
4169
4170 va_start (argptr, p);
4171
4172 buf[0] = '%';
4173
4174 while ((c = *p++))
4175 switch (c)
4176 {
4177 #ifdef ASSEMBLER_DIALECT
4178 case '{':
4179 case '}':
4180 case '|':
4181 p = do_assembler_dialects (p, &dialect);
4182 break;
4183 #endif
4184
4185 case '%':
4186 c = *p++;
4187 q = &buf[1];
4188 while (strchr ("-+ #0", c))
4189 {
4190 *q++ = c;
4191 c = *p++;
4192 }
4193 while (ISDIGIT (c) || c == '.')
4194 {
4195 *q++ = c;
4196 c = *p++;
4197 }
4198 switch (c)
4199 {
4200 case '%':
4201 putc ('%', file);
4202 break;
4203
4204 case 'd': case 'i': case 'u':
4205 case 'x': case 'X': case 'o':
4206 case 'c':
4207 *q++ = c;
4208 *q = 0;
4209 fprintf (file, buf, va_arg (argptr, int));
4210 break;
4211
4212 case 'w':
4213 /* This is a prefix to the 'd', 'i', 'u', 'x', 'X', and
4214 'o' cases, but we do not check for those cases. It
4215 means that the value is a HOST_WIDE_INT, which may be
4216 either `long' or `long long'. */
4217 memcpy (q, HOST_WIDE_INT_PRINT, strlen (HOST_WIDE_INT_PRINT));
4218 q += strlen (HOST_WIDE_INT_PRINT);
4219 *q++ = *p++;
4220 *q = 0;
4221 fprintf (file, buf, va_arg (argptr, HOST_WIDE_INT));
4222 break;
4223
4224 case 'l':
4225 *q++ = c;
4226 #ifdef HAVE_LONG_LONG
4227 if (*p == 'l')
4228 {
4229 *q++ = *p++;
4230 *q++ = *p++;
4231 *q = 0;
4232 fprintf (file, buf, va_arg (argptr, long long));
4233 }
4234 else
4235 #endif
4236 {
4237 *q++ = *p++;
4238 *q = 0;
4239 fprintf (file, buf, va_arg (argptr, long));
4240 }
4241
4242 break;
4243
4244 case 's':
4245 *q++ = c;
4246 *q = 0;
4247 fprintf (file, buf, va_arg (argptr, char *));
4248 break;
4249
4250 case 'O':
4251 #ifdef ASM_OUTPUT_OPCODE
4252 ASM_OUTPUT_OPCODE (asm_out_file, p);
4253 #endif
4254 break;
4255
4256 case 'R':
4257 #ifdef REGISTER_PREFIX
4258 fprintf (file, "%s", REGISTER_PREFIX);
4259 #endif
4260 break;
4261
4262 case 'I':
4263 #ifdef IMMEDIATE_PREFIX
4264 fprintf (file, "%s", IMMEDIATE_PREFIX);
4265 #endif
4266 break;
4267
4268 case 'L':
4269 #ifdef LOCAL_LABEL_PREFIX
4270 fprintf (file, "%s", LOCAL_LABEL_PREFIX);
4271 #endif
4272 break;
4273
4274 case 'U':
4275 fputs (user_label_prefix, file);
4276 break;
4277
4278 #ifdef ASM_FPRINTF_EXTENSIONS
4279 /* Uppercase letters are reserved for general use by asm_fprintf
4280 and so are not available to target specific code. In order to
4281 prevent the ASM_FPRINTF_EXTENSIONS macro from using them then,
4282 they are defined here. As they get turned into real extensions
4283 to asm_fprintf they should be removed from this list. */
4284 case 'A': case 'B': case 'C': case 'D': case 'E':
4285 case 'F': case 'G': case 'H': case 'J': case 'K':
4286 case 'M': case 'N': case 'P': case 'Q': case 'S':
4287 case 'T': case 'V': case 'W': case 'Y': case 'Z':
4288 break;
4289
4290 ASM_FPRINTF_EXTENSIONS (file, argptr, p)
4291 #endif
4292 default:
4293 gcc_unreachable ();
4294 }
4295 break;
4296
4297 default:
4298 putc (c, file);
4299 }
4300 va_end (argptr);
4301 }
4302 \f
4303 /* Return nonzero if this function has no function calls. */
4304
4305 int
4306 leaf_function_p (void)
4307 {
4308 rtx_insn *insn;
4309
4310 /* Ensure we walk the entire function body. */
4311 gcc_assert (!in_sequence_p ());
4312
4313 /* Some back-ends (e.g. s390) want leaf functions to stay leaf
4314 functions even if they call mcount. */
4315 if (crtl->profile && !targetm.keep_leaf_when_profiled ())
4316 return 0;
4317
4318 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4319 {
4320 if (CALL_P (insn)
4321 && ! SIBLING_CALL_P (insn))
4322 return 0;
4323 if (NONJUMP_INSN_P (insn)
4324 && GET_CODE (PATTERN (insn)) == SEQUENCE
4325 && CALL_P (XVECEXP (PATTERN (insn), 0, 0))
4326 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0)))
4327 return 0;
4328 }
4329
4330 return 1;
4331 }
4332
4333 /* Return 1 if branch is a forward branch.
4334 Uses insn_shuid array, so it works only in the final pass. May be used by
4335 output templates to customary add branch prediction hints.
4336 */
4337 int
4338 final_forward_branch_p (rtx_insn *insn)
4339 {
4340 int insn_id, label_id;
4341
4342 gcc_assert (uid_shuid);
4343 insn_id = INSN_SHUID (insn);
4344 label_id = INSN_SHUID (JUMP_LABEL (insn));
4345 /* We've hit some insns that does not have id information available. */
4346 gcc_assert (insn_id && label_id);
4347 return insn_id < label_id;
4348 }
4349
4350 /* On some machines, a function with no call insns
4351 can run faster if it doesn't create its own register window.
4352 When output, the leaf function should use only the "output"
4353 registers. Ordinarily, the function would be compiled to use
4354 the "input" registers to find its arguments; it is a candidate
4355 for leaf treatment if it uses only the "input" registers.
4356 Leaf function treatment means renumbering so the function
4357 uses the "output" registers instead. */
4358
4359 #ifdef LEAF_REGISTERS
4360
4361 /* Return 1 if this function uses only the registers that can be
4362 safely renumbered. */
4363
4364 int
4365 only_leaf_regs_used (void)
4366 {
4367 int i;
4368 const char *const permitted_reg_in_leaf_functions = LEAF_REGISTERS;
4369
4370 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
4371 if ((df_regs_ever_live_p (i) || global_regs[i])
4372 && ! permitted_reg_in_leaf_functions[i])
4373 return 0;
4374
4375 if (crtl->uses_pic_offset_table
4376 && pic_offset_table_rtx != 0
4377 && REG_P (pic_offset_table_rtx)
4378 && ! permitted_reg_in_leaf_functions[REGNO (pic_offset_table_rtx)])
4379 return 0;
4380
4381 return 1;
4382 }
4383
4384 /* Scan all instructions and renumber all registers into those
4385 available in leaf functions. */
4386
4387 static void
4388 leaf_renumber_regs (rtx_insn *first)
4389 {
4390 rtx_insn *insn;
4391
4392 /* Renumber only the actual patterns.
4393 The reg-notes can contain frame pointer refs,
4394 and renumbering them could crash, and should not be needed. */
4395 for (insn = first; insn; insn = NEXT_INSN (insn))
4396 if (INSN_P (insn))
4397 leaf_renumber_regs_insn (PATTERN (insn));
4398 }
4399
4400 /* Scan IN_RTX and its subexpressions, and renumber all regs into those
4401 available in leaf functions. */
4402
4403 void
4404 leaf_renumber_regs_insn (rtx in_rtx)
4405 {
4406 int i, j;
4407 const char *format_ptr;
4408
4409 if (in_rtx == 0)
4410 return;
4411
4412 /* Renumber all input-registers into output-registers.
4413 renumbered_regs would be 1 for an output-register;
4414 they */
4415
4416 if (REG_P (in_rtx))
4417 {
4418 int newreg;
4419
4420 /* Don't renumber the same reg twice. */
4421 if (in_rtx->used)
4422 return;
4423
4424 newreg = REGNO (in_rtx);
4425 /* Don't try to renumber pseudo regs. It is possible for a pseudo reg
4426 to reach here as part of a REG_NOTE. */
4427 if (newreg >= FIRST_PSEUDO_REGISTER)
4428 {
4429 in_rtx->used = 1;
4430 return;
4431 }
4432 newreg = LEAF_REG_REMAP (newreg);
4433 gcc_assert (newreg >= 0);
4434 df_set_regs_ever_live (REGNO (in_rtx), false);
4435 df_set_regs_ever_live (newreg, true);
4436 SET_REGNO (in_rtx, newreg);
4437 in_rtx->used = 1;
4438 return;
4439 }
4440
4441 if (INSN_P (in_rtx))
4442 {
4443 /* Inside a SEQUENCE, we find insns.
4444 Renumber just the patterns of these insns,
4445 just as we do for the top-level insns. */
4446 leaf_renumber_regs_insn (PATTERN (in_rtx));
4447 return;
4448 }
4449
4450 format_ptr = GET_RTX_FORMAT (GET_CODE (in_rtx));
4451
4452 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (in_rtx)); i++)
4453 switch (*format_ptr++)
4454 {
4455 case 'e':
4456 leaf_renumber_regs_insn (XEXP (in_rtx, i));
4457 break;
4458
4459 case 'E':
4460 if (NULL != XVEC (in_rtx, i))
4461 {
4462 for (j = 0; j < XVECLEN (in_rtx, i); j++)
4463 leaf_renumber_regs_insn (XVECEXP (in_rtx, i, j));
4464 }
4465 break;
4466
4467 case 'S':
4468 case 's':
4469 case '0':
4470 case 'i':
4471 case 'w':
4472 case 'n':
4473 case 'u':
4474 break;
4475
4476 default:
4477 gcc_unreachable ();
4478 }
4479 }
4480 #endif
4481 \f
4482 /* Turn the RTL into assembly. */
4483 static unsigned int
4484 rest_of_handle_final (void)
4485 {
4486 const char *fnname = get_fnname_from_decl (current_function_decl);
4487
4488 assemble_start_function (current_function_decl, fnname);
4489 final_start_function (get_insns (), asm_out_file, optimize);
4490 final (get_insns (), asm_out_file, optimize);
4491 if (flag_ipa_ra
4492 && !lookup_attribute ("noipa", DECL_ATTRIBUTES (current_function_decl)))
4493 collect_fn_hard_reg_usage ();
4494 final_end_function ();
4495
4496 /* The IA-64 ".handlerdata" directive must be issued before the ".endp"
4497 directive that closes the procedure descriptor. Similarly, for x64 SEH.
4498 Otherwise it's not strictly necessary, but it doesn't hurt either. */
4499 output_function_exception_table (fnname);
4500
4501 assemble_end_function (current_function_decl, fnname);
4502
4503 /* Free up reg info memory. */
4504 free_reg_info ();
4505
4506 if (! quiet_flag)
4507 fflush (asm_out_file);
4508
4509 /* Write DBX symbols if requested. */
4510
4511 /* Note that for those inline functions where we don't initially
4512 know for certain that we will be generating an out-of-line copy,
4513 the first invocation of this routine (rest_of_compilation) will
4514 skip over this code by doing a `goto exit_rest_of_compilation;'.
4515 Later on, wrapup_global_declarations will (indirectly) call
4516 rest_of_compilation again for those inline functions that need
4517 to have out-of-line copies generated. During that call, we
4518 *will* be routed past here. */
4519
4520 timevar_push (TV_SYMOUT);
4521 if (!DECL_IGNORED_P (current_function_decl))
4522 debug_hooks->function_decl (current_function_decl);
4523 timevar_pop (TV_SYMOUT);
4524
4525 /* Release the blocks that are linked to DECL_INITIAL() to free the memory. */
4526 DECL_INITIAL (current_function_decl) = error_mark_node;
4527
4528 if (DECL_STATIC_CONSTRUCTOR (current_function_decl)
4529 && targetm.have_ctors_dtors)
4530 targetm.asm_out.constructor (XEXP (DECL_RTL (current_function_decl), 0),
4531 decl_init_priority_lookup
4532 (current_function_decl));
4533 if (DECL_STATIC_DESTRUCTOR (current_function_decl)
4534 && targetm.have_ctors_dtors)
4535 targetm.asm_out.destructor (XEXP (DECL_RTL (current_function_decl), 0),
4536 decl_fini_priority_lookup
4537 (current_function_decl));
4538 return 0;
4539 }
4540
4541 namespace {
4542
4543 const pass_data pass_data_final =
4544 {
4545 RTL_PASS, /* type */
4546 "final", /* name */
4547 OPTGROUP_NONE, /* optinfo_flags */
4548 TV_FINAL, /* tv_id */
4549 0, /* properties_required */
4550 0, /* properties_provided */
4551 0, /* properties_destroyed */
4552 0, /* todo_flags_start */
4553 0, /* todo_flags_finish */
4554 };
4555
4556 class pass_final : public rtl_opt_pass
4557 {
4558 public:
4559 pass_final (gcc::context *ctxt)
4560 : rtl_opt_pass (pass_data_final, ctxt)
4561 {}
4562
4563 /* opt_pass methods: */
4564 virtual unsigned int execute (function *) { return rest_of_handle_final (); }
4565
4566 }; // class pass_final
4567
4568 } // anon namespace
4569
4570 rtl_opt_pass *
4571 make_pass_final (gcc::context *ctxt)
4572 {
4573 return new pass_final (ctxt);
4574 }
4575
4576
4577 static unsigned int
4578 rest_of_handle_shorten_branches (void)
4579 {
4580 /* Shorten branches. */
4581 shorten_branches (get_insns ());
4582 return 0;
4583 }
4584
4585 namespace {
4586
4587 const pass_data pass_data_shorten_branches =
4588 {
4589 RTL_PASS, /* type */
4590 "shorten", /* name */
4591 OPTGROUP_NONE, /* optinfo_flags */
4592 TV_SHORTEN_BRANCH, /* tv_id */
4593 0, /* properties_required */
4594 0, /* properties_provided */
4595 0, /* properties_destroyed */
4596 0, /* todo_flags_start */
4597 0, /* todo_flags_finish */
4598 };
4599
4600 class pass_shorten_branches : public rtl_opt_pass
4601 {
4602 public:
4603 pass_shorten_branches (gcc::context *ctxt)
4604 : rtl_opt_pass (pass_data_shorten_branches, ctxt)
4605 {}
4606
4607 /* opt_pass methods: */
4608 virtual unsigned int execute (function *)
4609 {
4610 return rest_of_handle_shorten_branches ();
4611 }
4612
4613 }; // class pass_shorten_branches
4614
4615 } // anon namespace
4616
4617 rtl_opt_pass *
4618 make_pass_shorten_branches (gcc::context *ctxt)
4619 {
4620 return new pass_shorten_branches (ctxt);
4621 }
4622
4623
4624 static unsigned int
4625 rest_of_clean_state (void)
4626 {
4627 rtx_insn *insn, *next;
4628 FILE *final_output = NULL;
4629 int save_unnumbered = flag_dump_unnumbered;
4630 int save_noaddr = flag_dump_noaddr;
4631
4632 if (flag_dump_final_insns)
4633 {
4634 final_output = fopen (flag_dump_final_insns, "a");
4635 if (!final_output)
4636 {
4637 error ("could not open final insn dump file %qs: %m",
4638 flag_dump_final_insns);
4639 flag_dump_final_insns = NULL;
4640 }
4641 else
4642 {
4643 flag_dump_noaddr = flag_dump_unnumbered = 1;
4644 if (flag_compare_debug_opt || flag_compare_debug)
4645 dump_flags |= TDF_NOUID | TDF_COMPARE_DEBUG;
4646 dump_function_header (final_output, current_function_decl,
4647 dump_flags);
4648 final_insns_dump_p = true;
4649
4650 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4651 if (LABEL_P (insn))
4652 INSN_UID (insn) = CODE_LABEL_NUMBER (insn);
4653 else
4654 {
4655 if (NOTE_P (insn))
4656 set_block_for_insn (insn, NULL);
4657 INSN_UID (insn) = 0;
4658 }
4659 }
4660 }
4661
4662 /* It is very important to decompose the RTL instruction chain here:
4663 debug information keeps pointing into CODE_LABEL insns inside the function
4664 body. If these remain pointing to the other insns, we end up preserving
4665 whole RTL chain and attached detailed debug info in memory. */
4666 for (insn = get_insns (); insn; insn = next)
4667 {
4668 next = NEXT_INSN (insn);
4669 SET_NEXT_INSN (insn) = NULL;
4670 SET_PREV_INSN (insn) = NULL;
4671
4672 if (final_output
4673 && (!NOTE_P (insn) ||
4674 (NOTE_KIND (insn) != NOTE_INSN_VAR_LOCATION
4675 && NOTE_KIND (insn) != NOTE_INSN_CALL_ARG_LOCATION
4676 && NOTE_KIND (insn) != NOTE_INSN_BLOCK_BEG
4677 && NOTE_KIND (insn) != NOTE_INSN_BLOCK_END
4678 && NOTE_KIND (insn) != NOTE_INSN_DELETED_DEBUG_LABEL)))
4679 print_rtl_single (final_output, insn);
4680 }
4681
4682 if (final_output)
4683 {
4684 flag_dump_noaddr = save_noaddr;
4685 flag_dump_unnumbered = save_unnumbered;
4686 final_insns_dump_p = false;
4687
4688 if (fclose (final_output))
4689 {
4690 error ("could not close final insn dump file %qs: %m",
4691 flag_dump_final_insns);
4692 flag_dump_final_insns = NULL;
4693 }
4694 }
4695
4696 flag_rerun_cse_after_global_opts = 0;
4697 reload_completed = 0;
4698 epilogue_completed = 0;
4699 #ifdef STACK_REGS
4700 regstack_completed = 0;
4701 #endif
4702
4703 /* Clear out the insn_length contents now that they are no
4704 longer valid. */
4705 init_insn_lengths ();
4706
4707 /* Show no temporary slots allocated. */
4708 init_temp_slots ();
4709
4710 free_bb_for_insn ();
4711
4712 if (cfun->gimple_df)
4713 delete_tree_ssa (cfun);
4714
4715 /* We can reduce stack alignment on call site only when we are sure that
4716 the function body just produced will be actually used in the final
4717 executable. */
4718 if (decl_binds_to_current_def_p (current_function_decl))
4719 {
4720 unsigned int pref = crtl->preferred_stack_boundary;
4721 if (crtl->stack_alignment_needed > crtl->preferred_stack_boundary)
4722 pref = crtl->stack_alignment_needed;
4723 cgraph_node::rtl_info (current_function_decl)
4724 ->preferred_incoming_stack_boundary = pref;
4725 }
4726
4727 /* Make sure volatile mem refs aren't considered valid operands for
4728 arithmetic insns. We must call this here if this is a nested inline
4729 function, since the above code leaves us in the init_recog state,
4730 and the function context push/pop code does not save/restore volatile_ok.
4731
4732 ??? Maybe it isn't necessary for expand_start_function to call this
4733 anymore if we do it here? */
4734
4735 init_recog_no_volatile ();
4736
4737 /* We're done with this function. Free up memory if we can. */
4738 free_after_parsing (cfun);
4739 free_after_compilation (cfun);
4740 return 0;
4741 }
4742
4743 namespace {
4744
4745 const pass_data pass_data_clean_state =
4746 {
4747 RTL_PASS, /* type */
4748 "*clean_state", /* name */
4749 OPTGROUP_NONE, /* optinfo_flags */
4750 TV_FINAL, /* tv_id */
4751 0, /* properties_required */
4752 0, /* properties_provided */
4753 PROP_rtl, /* properties_destroyed */
4754 0, /* todo_flags_start */
4755 0, /* todo_flags_finish */
4756 };
4757
4758 class pass_clean_state : public rtl_opt_pass
4759 {
4760 public:
4761 pass_clean_state (gcc::context *ctxt)
4762 : rtl_opt_pass (pass_data_clean_state, ctxt)
4763 {}
4764
4765 /* opt_pass methods: */
4766 virtual unsigned int execute (function *)
4767 {
4768 return rest_of_clean_state ();
4769 }
4770
4771 }; // class pass_clean_state
4772
4773 } // anon namespace
4774
4775 rtl_opt_pass *
4776 make_pass_clean_state (gcc::context *ctxt)
4777 {
4778 return new pass_clean_state (ctxt);
4779 }
4780
4781 /* Return true if INSN is a call to the current function. */
4782
4783 static bool
4784 self_recursive_call_p (rtx_insn *insn)
4785 {
4786 tree fndecl = get_call_fndecl (insn);
4787 return (fndecl == current_function_decl
4788 && decl_binds_to_current_def_p (fndecl));
4789 }
4790
4791 /* Collect hard register usage for the current function. */
4792
4793 static void
4794 collect_fn_hard_reg_usage (void)
4795 {
4796 rtx_insn *insn;
4797 #ifdef STACK_REGS
4798 int i;
4799 #endif
4800 struct cgraph_rtl_info *node;
4801 HARD_REG_SET function_used_regs;
4802
4803 /* ??? To be removed when all the ports have been fixed. */
4804 if (!targetm.call_fusage_contains_non_callee_clobbers)
4805 return;
4806
4807 CLEAR_HARD_REG_SET (function_used_regs);
4808
4809 for (insn = get_insns (); insn != NULL_RTX; insn = next_insn (insn))
4810 {
4811 HARD_REG_SET insn_used_regs;
4812
4813 if (!NONDEBUG_INSN_P (insn))
4814 continue;
4815
4816 if (CALL_P (insn)
4817 && !self_recursive_call_p (insn))
4818 {
4819 if (!get_call_reg_set_usage (insn, &insn_used_regs,
4820 call_used_reg_set))
4821 return;
4822
4823 IOR_HARD_REG_SET (function_used_regs, insn_used_regs);
4824 }
4825
4826 find_all_hard_reg_sets (insn, &insn_used_regs, false);
4827 IOR_HARD_REG_SET (function_used_regs, insn_used_regs);
4828 }
4829
4830 /* Be conservative - mark fixed and global registers as used. */
4831 IOR_HARD_REG_SET (function_used_regs, fixed_reg_set);
4832
4833 #ifdef STACK_REGS
4834 /* Handle STACK_REGS conservatively, since the df-framework does not
4835 provide accurate information for them. */
4836
4837 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
4838 SET_HARD_REG_BIT (function_used_regs, i);
4839 #endif
4840
4841 /* The information we have gathered is only interesting if it exposes a
4842 register from the call_used_regs that is not used in this function. */
4843 if (hard_reg_set_subset_p (call_used_reg_set, function_used_regs))
4844 return;
4845
4846 node = cgraph_node::rtl_info (current_function_decl);
4847 gcc_assert (node != NULL);
4848
4849 COPY_HARD_REG_SET (node->function_used_regs, function_used_regs);
4850 node->function_used_regs_valid = 1;
4851 }
4852
4853 /* Get the declaration of the function called by INSN. */
4854
4855 static tree
4856 get_call_fndecl (rtx_insn *insn)
4857 {
4858 rtx note, datum;
4859
4860 note = find_reg_note (insn, REG_CALL_DECL, NULL_RTX);
4861 if (note == NULL_RTX)
4862 return NULL_TREE;
4863
4864 datum = XEXP (note, 0);
4865 if (datum != NULL_RTX)
4866 return SYMBOL_REF_DECL (datum);
4867
4868 return NULL_TREE;
4869 }
4870
4871 /* Return the cgraph_rtl_info of the function called by INSN. Returns NULL for
4872 call targets that can be overwritten. */
4873
4874 static struct cgraph_rtl_info *
4875 get_call_cgraph_rtl_info (rtx_insn *insn)
4876 {
4877 tree fndecl;
4878
4879 if (insn == NULL_RTX)
4880 return NULL;
4881
4882 fndecl = get_call_fndecl (insn);
4883 if (fndecl == NULL_TREE
4884 || !decl_binds_to_current_def_p (fndecl))
4885 return NULL;
4886
4887 return cgraph_node::rtl_info (fndecl);
4888 }
4889
4890 /* Find hard registers used by function call instruction INSN, and return them
4891 in REG_SET. Return DEFAULT_SET in REG_SET if not found. */
4892
4893 bool
4894 get_call_reg_set_usage (rtx_insn *insn, HARD_REG_SET *reg_set,
4895 HARD_REG_SET default_set)
4896 {
4897 if (flag_ipa_ra)
4898 {
4899 struct cgraph_rtl_info *node = get_call_cgraph_rtl_info (insn);
4900 if (node != NULL
4901 && node->function_used_regs_valid)
4902 {
4903 COPY_HARD_REG_SET (*reg_set, node->function_used_regs);
4904 AND_HARD_REG_SET (*reg_set, default_set);
4905 return true;
4906 }
4907 }
4908
4909 COPY_HARD_REG_SET (*reg_set, default_set);
4910 return false;
4911 }