1 /* Convert RTL to assembler code and output it, for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
22 /* This is the final pass of the compiler.
23 It looks at the rtl code for a function and outputs assembler code.
25 Call `final_start_function' to output the assembler code for function entry,
26 `final' to output assembler code for some RTL code,
27 `final_end_function' to output assembler code for function exit.
28 If a function is compiled in several pieces, each piece is
29 output separately with `final'.
31 Some optimizations are also done at this level.
32 Move instructions that were made unnecessary by good register allocation
33 are detected and omitted from the output. (Though most of these
34 are removed by the last jump pass.)
36 Instructions to set the condition codes are omitted when it can be
37 seen that the condition codes already had the desired values.
39 In some cases it is sufficient if the inherited condition codes
40 have related values, but this may require the following insn
41 (the one that tests the condition codes) to be modified.
43 The code for the function prologue and epilogue are generated
44 directly in assembler by the target functions function_prologue and
45 function_epilogue. Those instructions never exist as rtl. */
54 #include "insn-config.h"
55 #include "insn-attr.h"
57 #include "conditions.h"
60 #include "hard-reg-set.h"
67 #include "basic-block.h"
72 #include "cfglayout.h"
74 #ifdef XCOFF_DEBUGGING_INFO
75 #include "xcoffout.h" /* Needed for external data
76 declarations for e.g. AIX 4.x. */
79 #if defined (DWARF2_UNWIND_INFO) || defined (DWARF2_DEBUGGING_INFO)
80 #include "dwarf2out.h"
83 /* If we aren't using cc0, CC_STATUS_INIT shouldn't exist. So define a
84 null default for it to save conditionalization later. */
85 #ifndef CC_STATUS_INIT
86 #define CC_STATUS_INIT
89 /* How to start an assembler comment. */
90 #ifndef ASM_COMMENT_START
91 #define ASM_COMMENT_START ";#"
94 /* Is the given character a logical line separator for the assembler? */
95 #ifndef IS_ASM_LOGICAL_LINE_SEPARATOR
96 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C) ((C) == ';')
99 #ifndef JUMP_TABLES_IN_TEXT_SECTION
100 #define JUMP_TABLES_IN_TEXT_SECTION 0
103 #if defined(READONLY_DATA_SECTION) || defined(READONLY_DATA_SECTION_ASM_OP)
104 #define HAVE_READONLY_DATA_SECTION 1
106 #define HAVE_READONLY_DATA_SECTION 0
109 /* Last insn processed by final_scan_insn. */
110 static rtx debug_insn
;
111 rtx current_output_insn
;
113 /* Line number of last NOTE. */
114 static int last_linenum
;
116 /* Highest line number in current block. */
117 static int high_block_linenum
;
119 /* Likewise for function. */
120 static int high_function_linenum
;
122 /* Filename of last NOTE. */
123 static const char *last_filename
;
125 extern int length_unit_log
; /* This is defined in insn-attrtab.c. */
127 /* Nonzero while outputting an `asm' with operands.
128 This means that inconsistencies are the user's fault, so don't abort.
129 The precise value is the insn being output, to pass to error_for_asm. */
130 rtx this_is_asm_operands
;
132 /* Number of operands of this insn, for an `asm' with operands. */
133 static unsigned int insn_noperands
;
135 /* Compare optimization flag. */
137 static rtx last_ignored_compare
= 0;
139 /* Flag indicating this insn is the start of a new basic block. */
141 static int new_block
= 1;
143 /* Assign a unique number to each insn that is output.
144 This can be used to generate unique local labels. */
146 static int insn_counter
= 0;
149 /* This variable contains machine-dependent flags (defined in tm.h)
150 set and examined by output routines
151 that describe how to interpret the condition codes properly. */
155 /* During output of an insn, this contains a copy of cc_status
156 from before the insn. */
158 CC_STATUS cc_prev_status
;
161 /* Indexed by hardware reg number, is 1 if that register is ever
162 used in the current function.
164 In life_analysis, or in stupid_life_analysis, this is set
165 up to record the hard regs used explicitly. Reload adds
166 in the hard regs used for holding pseudo regs. Final uses
167 it to generate the code in the function prologue and epilogue
168 to save and restore registers as needed. */
170 char regs_ever_live
[FIRST_PSEUDO_REGISTER
];
172 /* Nonzero means current function must be given a frame pointer.
173 Set in stmt.c if anything is allocated on the stack there.
174 Set in reload1.c if anything is allocated on the stack there. */
176 int frame_pointer_needed
;
178 /* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */
180 static int block_depth
;
182 /* Nonzero if have enabled APP processing of our assembler output. */
186 /* If we are outputting an insn sequence, this contains the sequence rtx.
191 #ifdef ASSEMBLER_DIALECT
193 /* Number of the assembler dialect to use, starting at 0. */
194 static int dialect_number
;
197 /* Indexed by line number, nonzero if there is a note for that line. */
199 static char *line_note_exists
;
201 #ifdef HAVE_conditional_execution
202 /* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */
203 rtx current_insn_predicate
;
208 struct function_list
*next
; /* next function */
209 const char *name
; /* function name */
210 long cfg_checksum
; /* function checksum */
211 long count_edges
; /* number of intrumented edges in this function */
214 static struct function_list
*functions_head
= 0;
215 static struct function_list
**functions_tail
= &functions_head
;
217 #ifdef HAVE_ATTR_length
218 static int asm_insn_count
PARAMS ((rtx
));
220 static void profile_function
PARAMS ((FILE *));
221 static void profile_after_prologue
PARAMS ((FILE *));
222 static void notice_source_line
PARAMS ((rtx
));
223 static rtx walk_alter_subreg
PARAMS ((rtx
*));
224 static void output_asm_name
PARAMS ((void));
225 static tree get_mem_expr_from_op
PARAMS ((rtx
, int *));
226 static void output_asm_operand_names
PARAMS ((rtx
*, int *, int));
227 static void output_operand
PARAMS ((rtx
, int));
228 #ifdef LEAF_REGISTERS
229 static void leaf_renumber_regs
PARAMS ((rtx
));
232 static int alter_cond
PARAMS ((rtx
));
234 #ifndef ADDR_VEC_ALIGN
235 static int final_addr_vec_align
PARAMS ((rtx
));
237 #ifdef HAVE_ATTR_length
238 static int align_fuzz
PARAMS ((rtx
, rtx
, int, unsigned));
241 /* Initialize data in final at the beginning of a compilation. */
244 init_final (filename
)
245 const char *filename ATTRIBUTE_UNUSED
;
250 #ifdef ASSEMBLER_DIALECT
251 dialect_number
= ASSEMBLER_DIALECT
;
255 /* Called at end of source file,
256 to output the arc-profiling table for this entire compilation. */
260 const char *filename
;
262 if (profile_arc_flag
&& profile_info
.count_instrumented_edges
)
265 tree string_type
, string_cst
;
266 tree structure_decl
, structure_value
, structure_pointer_type
;
267 tree field_decl
, decl_chain
, value_chain
;
268 tree sizeof_field_value
, domain_type
;
271 string_type
= build_pointer_type (char_type_node
);
273 /* Libgcc2 bb structure. */
274 structure_decl
= make_node (RECORD_TYPE
);
275 structure_pointer_type
= build_pointer_type (structure_decl
);
277 /* Output the main header, of 7 words:
278 0: 1 if this file is initialized, else 0.
279 1: address of file name (LPBX1).
280 2: address of table of counts (LPBX2).
281 3: number of counts in the table.
282 4: always 0, libgcc2 uses this as a pointer to next ``struct bb''
284 The following are GNU extensions:
286 5: Number of bytes in this header.
287 6: address of table of function checksums (LPBX7). */
291 build_decl (FIELD_DECL
, get_identifier ("zero_word"),
292 long_integer_type_node
);
293 value_chain
= build_tree_list (decl_chain
,
294 convert (long_integer_type_node
,
297 /* Address of filename. */
299 char *cwd
, *da_filename
;
303 build_decl (FIELD_DECL
, get_identifier ("filename"), string_type
);
304 TREE_CHAIN (field_decl
) = decl_chain
;
305 decl_chain
= field_decl
;
308 da_filename_len
= strlen (filename
) + strlen (cwd
) + 4 + 1;
309 da_filename
= (char *) alloca (da_filename_len
);
310 strcpy (da_filename
, cwd
);
311 strcat (da_filename
, "/");
312 strcat (da_filename
, filename
);
313 strip_off_ending (da_filename
, da_filename_len
- 3);
314 strcat (da_filename
, ".da");
315 da_filename_len
= strlen (da_filename
);
316 string_cst
= build_string (da_filename_len
+ 1, da_filename
);
317 domain_type
= build_index_type (build_int_2 (da_filename_len
, 0));
318 TREE_TYPE (string_cst
)
319 = build_array_type (char_type_node
, domain_type
);
320 value_chain
= tree_cons (field_decl
,
321 build1 (ADDR_EXPR
, string_type
, string_cst
),
325 /* Table of counts. */
327 tree gcov_type_type
= make_unsigned_type (GCOV_TYPE_SIZE
);
328 tree gcov_type_pointer_type
= build_pointer_type (gcov_type_type
);
330 = build_index_type (build_int_2 (profile_info
.
331 count_instrumented_edges
- 1, 0));
332 tree gcov_type_array_type
333 = build_array_type (gcov_type_type
, domain_tree
);
334 tree gcov_type_array_pointer_type
335 = build_pointer_type (gcov_type_array_type
);
339 build_decl (FIELD_DECL
, get_identifier ("counts"),
340 gcov_type_pointer_type
);
341 TREE_CHAIN (field_decl
) = decl_chain
;
342 decl_chain
= field_decl
;
346 = build (VAR_DECL
, gcov_type_array_type
, NULL_TREE
, NULL_TREE
);
347 TREE_STATIC (counts_table
) = 1;
348 ASM_GENERATE_INTERNAL_LABEL (name
, "LPBX", 2);
349 DECL_NAME (counts_table
) = get_identifier (name
);
350 assemble_variable (counts_table
, 0, 0, 0);
352 value_chain
= tree_cons (field_decl
,
354 gcov_type_array_pointer_type
,
355 counts_table
), value_chain
);
358 /* Count of the # of instrumented arcs. */
360 = build_decl (FIELD_DECL
, get_identifier ("ncounts"),
361 long_integer_type_node
);
362 TREE_CHAIN (field_decl
) = decl_chain
;
363 decl_chain
= field_decl
;
365 value_chain
= tree_cons (field_decl
,
366 convert (long_integer_type_node
,
367 build_int_2 (profile_info
.
368 count_instrumented_edges
,
370 /* Pointer to the next bb. */
372 = build_decl (FIELD_DECL
, get_identifier ("next"),
373 structure_pointer_type
);
374 TREE_CHAIN (field_decl
) = decl_chain
;
375 decl_chain
= field_decl
;
377 value_chain
= tree_cons (field_decl
, null_pointer_node
, value_chain
);
379 /* sizeof(struct bb). We'll set this after entire structure
382 = build_decl (FIELD_DECL
, get_identifier ("sizeof_bb"),
383 long_integer_type_node
);
384 TREE_CHAIN (field_decl
) = decl_chain
;
385 decl_chain
= field_decl
;
387 sizeof_field_value
= tree_cons (field_decl
, NULL
, value_chain
);
388 value_chain
= sizeof_field_value
;
390 /* struct bb_function []. */
392 struct function_list
*item
;
394 tree checksum_field
, arc_count_field
, name_field
;
396 tree array_value_chain
= NULL_TREE
;
397 tree bb_fn_struct_type
;
398 tree bb_fn_struct_array_type
;
399 tree bb_fn_struct_array_pointer_type
;
400 tree bb_fn_struct_pointer_type
;
401 tree field_value
, field_value_chain
;
403 bb_fn_struct_type
= make_node (RECORD_TYPE
);
405 checksum_field
= build_decl (FIELD_DECL
, get_identifier ("checksum"),
406 long_integer_type_node
);
409 = build_decl (FIELD_DECL
, get_identifier ("arc_count"),
411 TREE_CHAIN (checksum_field
) = arc_count_field
;
414 = build_decl (FIELD_DECL
, get_identifier ("name"), string_type
);
415 TREE_CHAIN (arc_count_field
) = name_field
;
417 TYPE_FIELDS (bb_fn_struct_type
) = checksum_field
;
421 for (item
= functions_head
; item
!= 0; item
= item
->next
)
424 /* Note that the array contains a terminator, hence no - 1. */
425 domain
= build_index_type (build_int_2 (num_nodes
, 0));
427 bb_fn_struct_pointer_type
= build_pointer_type (bb_fn_struct_type
);
428 bb_fn_struct_array_type
429 = build_array_type (bb_fn_struct_type
, domain
);
430 bb_fn_struct_array_pointer_type
431 = build_pointer_type (bb_fn_struct_array_type
);
433 layout_type (bb_fn_struct_type
);
434 layout_type (bb_fn_struct_pointer_type
);
435 layout_type (bb_fn_struct_array_type
);
436 layout_type (bb_fn_struct_array_pointer_type
);
438 for (item
= functions_head
; item
!= 0; item
= item
->next
)
442 /* create constructor for structure. */
444 = build_tree_list (checksum_field
,
445 convert (long_integer_type_node
,
446 build_int_2 (item
->cfg_checksum
, 0)));
448 = tree_cons (arc_count_field
,
449 convert (integer_type_node
,
450 build_int_2 (item
->count_edges
, 0)),
453 name_len
= strlen (item
->name
);
454 string_cst
= build_string (name_len
+ 1, item
->name
);
455 domain_type
= build_index_type (build_int_2 (name_len
, 0));
456 TREE_TYPE (string_cst
)
457 = build_array_type (char_type_node
, domain_type
);
458 field_value_chain
= tree_cons (name_field
,
459 build1 (ADDR_EXPR
, string_type
,
465 = tree_cons (NULL_TREE
, build (CONSTRUCTOR
,
466 bb_fn_struct_type
, NULL_TREE
,
467 nreverse (field_value_chain
)),
471 /* Add terminator. */
472 field_value
= build_tree_list (arc_count_field
,
473 convert (integer_type_node
,
474 build_int_2 (-1, 0)));
476 array_value_chain
= tree_cons (NULL_TREE
,
477 build (CONSTRUCTOR
, bb_fn_struct_type
,
478 NULL_TREE
, field_value
),
482 /* Create constructor for array. */
484 = build_decl (FIELD_DECL
, get_identifier ("function_infos"),
485 bb_fn_struct_pointer_type
);
486 value_chain
= tree_cons (field_decl
,
488 bb_fn_struct_array_pointer_type
,
490 bb_fn_struct_array_type
,
493 (array_value_chain
))),
495 TREE_CHAIN (field_decl
) = decl_chain
;
496 decl_chain
= field_decl
;
499 /* Finish structure. */
500 TYPE_FIELDS (structure_decl
) = nreverse (decl_chain
);
501 layout_type (structure_decl
);
504 = build (VAR_DECL
, structure_decl
, NULL_TREE
, NULL_TREE
);
505 DECL_INITIAL (structure_value
)
506 = build (CONSTRUCTOR
, structure_decl
, NULL_TREE
,
507 nreverse (value_chain
));
508 TREE_STATIC (structure_value
) = 1;
509 ASM_GENERATE_INTERNAL_LABEL (name
, "LPBX", 0);
510 DECL_NAME (structure_value
) = get_identifier (name
);
512 /* Size of this structure. */
513 TREE_VALUE (sizeof_field_value
)
514 = convert (long_integer_type_node
,
515 build_int_2 (int_size_in_bytes (structure_decl
), 0));
517 /* Build structure. */
518 assemble_variable (structure_value
, 0, 0, 0);
522 /* Default target function prologue and epilogue assembler output.
524 If not overridden for epilogue code, then the function body itself
525 contains return instructions wherever needed. */
527 default_function_pro_epilogue (file
, size
)
528 FILE *file ATTRIBUTE_UNUSED
;
529 HOST_WIDE_INT size ATTRIBUTE_UNUSED
;
533 /* Default target hook that outputs nothing to a stream. */
535 no_asm_to_stream (file
)
536 FILE *file ATTRIBUTE_UNUSED
;
540 /* Enable APP processing of subsequent output.
541 Used before the output from an `asm' statement. */
548 fputs (ASM_APP_ON
, asm_out_file
);
553 /* Disable APP processing of subsequent output.
554 Called from varasm.c before most kinds of output. */
561 fputs (ASM_APP_OFF
, asm_out_file
);
566 /* Return the number of slots filled in the current
567 delayed branch sequence (we don't count the insn needing the
568 delay slot). Zero if not in a delayed branch sequence. */
572 dbr_sequence_length ()
574 if (final_sequence
!= 0)
575 return XVECLEN (final_sequence
, 0) - 1;
581 /* The next two pages contain routines used to compute the length of an insn
582 and to shorten branches. */
584 /* Arrays for insn lengths, and addresses. The latter is referenced by
585 `insn_current_length'. */
587 static int *insn_lengths
;
589 #ifdef HAVE_ATTR_length
590 varray_type insn_addresses_
;
593 /* Max uid for which the above arrays are valid. */
594 static int insn_lengths_max_uid
;
596 /* Address of insn being processed. Used by `insn_current_length'. */
597 int insn_current_address
;
599 /* Address of insn being processed in previous iteration. */
600 int insn_last_address
;
602 /* known invariant alignment of insn being processed. */
603 int insn_current_align
;
605 /* After shorten_branches, for any insn, uid_align[INSN_UID (insn)]
606 gives the next following alignment insn that increases the known
607 alignment, or NULL_RTX if there is no such insn.
608 For any alignment obtained this way, we can again index uid_align with
609 its uid to obtain the next following align that in turn increases the
610 alignment, till we reach NULL_RTX; the sequence obtained this way
611 for each insn we'll call the alignment chain of this insn in the following
614 struct label_alignment
620 static rtx
*uid_align
;
621 static int *uid_shuid
;
622 static struct label_alignment
*label_align
;
624 /* Indicate that branch shortening hasn't yet been done. */
638 insn_lengths_max_uid
= 0;
640 #ifdef HAVE_ATTR_length
641 INSN_ADDRESSES_FREE ();
650 /* Obtain the current length of an insn. If branch shortening has been done,
651 get its actual length. Otherwise, get its maximum length. */
654 get_attr_length (insn
)
655 rtx insn ATTRIBUTE_UNUSED
;
657 #ifdef HAVE_ATTR_length
662 if (insn_lengths_max_uid
> INSN_UID (insn
))
663 return insn_lengths
[INSN_UID (insn
)];
665 switch (GET_CODE (insn
))
673 length
= insn_default_length (insn
);
677 body
= PATTERN (insn
);
678 if (GET_CODE (body
) == ADDR_VEC
|| GET_CODE (body
) == ADDR_DIFF_VEC
)
680 /* Alignment is machine-dependent and should be handled by
684 length
= insn_default_length (insn
);
688 body
= PATTERN (insn
);
689 if (GET_CODE (body
) == USE
|| GET_CODE (body
) == CLOBBER
)
692 else if (GET_CODE (body
) == ASM_INPUT
|| asm_noperands (body
) >= 0)
693 length
= asm_insn_count (body
) * insn_default_length (insn
);
694 else if (GET_CODE (body
) == SEQUENCE
)
695 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
696 length
+= get_attr_length (XVECEXP (body
, 0, i
));
698 length
= insn_default_length (insn
);
705 #ifdef ADJUST_INSN_LENGTH
706 ADJUST_INSN_LENGTH (insn
, length
);
709 #else /* not HAVE_ATTR_length */
711 #endif /* not HAVE_ATTR_length */
714 /* Code to handle alignment inside shorten_branches. */
716 /* Here is an explanation how the algorithm in align_fuzz can give
719 Call a sequence of instructions beginning with alignment point X
720 and continuing until the next alignment point `block X'. When `X'
721 is used in an expression, it means the alignment value of the
724 Call the distance between the start of the first insn of block X, and
725 the end of the last insn of block X `IX', for the `inner size of X'.
726 This is clearly the sum of the instruction lengths.
728 Likewise with the next alignment-delimited block following X, which we
731 Call the distance between the start of the first insn of block X, and
732 the start of the first insn of block Y `OX', for the `outer size of X'.
734 The estimated padding is then OX - IX.
736 OX can be safely estimated as
741 OX = round_up(IX, X) + Y - X
743 Clearly est(IX) >= real(IX), because that only depends on the
744 instruction lengths, and those being overestimated is a given.
746 Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so
747 we needn't worry about that when thinking about OX.
749 When X >= Y, the alignment provided by Y adds no uncertainty factor
750 for branch ranges starting before X, so we can just round what we have.
751 But when X < Y, we don't know anything about the, so to speak,
752 `middle bits', so we have to assume the worst when aligning up from an
753 address mod X to one mod Y, which is Y - X. */
756 #define LABEL_ALIGN(LABEL) align_labels_log
759 #ifndef LABEL_ALIGN_MAX_SKIP
760 #define LABEL_ALIGN_MAX_SKIP align_labels_max_skip
764 #define LOOP_ALIGN(LABEL) align_loops_log
767 #ifndef LOOP_ALIGN_MAX_SKIP
768 #define LOOP_ALIGN_MAX_SKIP align_loops_max_skip
771 #ifndef LABEL_ALIGN_AFTER_BARRIER
772 #define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0
775 #ifndef LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP
776 #define LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP 0
780 #define JUMP_ALIGN(LABEL) align_jumps_log
783 #ifndef JUMP_ALIGN_MAX_SKIP
784 #define JUMP_ALIGN_MAX_SKIP align_jumps_max_skip
787 #ifndef ADDR_VEC_ALIGN
789 final_addr_vec_align (addr_vec
)
792 int align
= GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec
)));
794 if (align
> BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
)
795 align
= BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
;
796 return exact_log2 (align
);
800 #define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC)
803 #ifndef INSN_LENGTH_ALIGNMENT
804 #define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log
807 #define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)])
809 static int min_labelno
, max_labelno
;
811 #define LABEL_TO_ALIGNMENT(LABEL) \
812 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment)
814 #define LABEL_TO_MAX_SKIP(LABEL) \
815 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip)
817 /* For the benefit of port specific code do this also as a function. */
820 label_to_alignment (label
)
823 return LABEL_TO_ALIGNMENT (label
);
826 #ifdef HAVE_ATTR_length
827 /* The differences in addresses
828 between a branch and its target might grow or shrink depending on
829 the alignment the start insn of the range (the branch for a forward
830 branch or the label for a backward branch) starts out on; if these
831 differences are used naively, they can even oscillate infinitely.
832 We therefore want to compute a 'worst case' address difference that
833 is independent of the alignment the start insn of the range end
834 up on, and that is at least as large as the actual difference.
835 The function align_fuzz calculates the amount we have to add to the
836 naively computed difference, by traversing the part of the alignment
837 chain of the start insn of the range that is in front of the end insn
838 of the range, and considering for each alignment the maximum amount
839 that it might contribute to a size increase.
841 For casesi tables, we also want to know worst case minimum amounts of
842 address difference, in case a machine description wants to introduce
843 some common offset that is added to all offsets in a table.
844 For this purpose, align_fuzz with a growth argument of 0 computes the
845 appropriate adjustment. */
847 /* Compute the maximum delta by which the difference of the addresses of
848 START and END might grow / shrink due to a different address for start
849 which changes the size of alignment insns between START and END.
850 KNOWN_ALIGN_LOG is the alignment known for START.
851 GROWTH should be ~0 if the objective is to compute potential code size
852 increase, and 0 if the objective is to compute potential shrink.
853 The return value is undefined for any other value of GROWTH. */
856 align_fuzz (start
, end
, known_align_log
, growth
)
861 int uid
= INSN_UID (start
);
863 int known_align
= 1 << known_align_log
;
864 int end_shuid
= INSN_SHUID (end
);
867 for (align_label
= uid_align
[uid
]; align_label
; align_label
= uid_align
[uid
])
869 int align_addr
, new_align
;
871 uid
= INSN_UID (align_label
);
872 align_addr
= INSN_ADDRESSES (uid
) - insn_lengths
[uid
];
873 if (uid_shuid
[uid
] > end_shuid
)
875 known_align_log
= LABEL_TO_ALIGNMENT (align_label
);
876 new_align
= 1 << known_align_log
;
877 if (new_align
< known_align
)
879 fuzz
+= (-align_addr
^ growth
) & (new_align
- known_align
);
880 known_align
= new_align
;
885 /* Compute a worst-case reference address of a branch so that it
886 can be safely used in the presence of aligned labels. Since the
887 size of the branch itself is unknown, the size of the branch is
888 not included in the range. I.e. for a forward branch, the reference
889 address is the end address of the branch as known from the previous
890 branch shortening pass, minus a value to account for possible size
891 increase due to alignment. For a backward branch, it is the start
892 address of the branch as known from the current pass, plus a value
893 to account for possible size increase due to alignment.
894 NB.: Therefore, the maximum offset allowed for backward branches needs
895 to exclude the branch size. */
898 insn_current_reference_address (branch
)
904 if (! INSN_ADDRESSES_SET_P ())
907 seq
= NEXT_INSN (PREV_INSN (branch
));
908 seq_uid
= INSN_UID (seq
);
909 if (GET_CODE (branch
) != JUMP_INSN
)
910 /* This can happen for example on the PA; the objective is to know the
911 offset to address something in front of the start of the function.
912 Thus, we can treat it like a backward branch.
913 We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than
914 any alignment we'd encounter, so we skip the call to align_fuzz. */
915 return insn_current_address
;
916 dest
= JUMP_LABEL (branch
);
918 /* BRANCH has no proper alignment chain set, so use SEQ.
919 BRANCH also has no INSN_SHUID. */
920 if (INSN_SHUID (seq
) < INSN_SHUID (dest
))
922 /* Forward branch. */
923 return (insn_last_address
+ insn_lengths
[seq_uid
]
924 - align_fuzz (seq
, dest
, length_unit_log
, ~0));
928 /* Backward branch. */
929 return (insn_current_address
930 + align_fuzz (dest
, seq
, length_unit_log
, ~0));
933 #endif /* HAVE_ATTR_length */
936 compute_alignments ()
938 int log
, max_skip
, max_log
;
947 max_labelno
= max_label_num ();
948 min_labelno
= get_first_label_num ();
949 label_align
= (struct label_alignment
*)
950 xcalloc (max_labelno
- min_labelno
+ 1, sizeof (struct label_alignment
));
952 /* If not optimizing or optimizing for size, don't assign any alignments. */
953 if (! optimize
|| optimize_size
)
958 rtx label
= bb
->head
;
959 int fallthru_frequency
= 0, branch_frequency
= 0, has_fallthru
= 0;
962 if (GET_CODE (label
) != CODE_LABEL
)
964 max_log
= LABEL_ALIGN (label
);
965 max_skip
= LABEL_ALIGN_MAX_SKIP
;
967 for (e
= bb
->pred
; e
; e
= e
->pred_next
)
969 if (e
->flags
& EDGE_FALLTHRU
)
970 has_fallthru
= 1, fallthru_frequency
+= EDGE_FREQUENCY (e
);
972 branch_frequency
+= EDGE_FREQUENCY (e
);
975 /* There are two purposes to align block with no fallthru incoming edge:
976 1) to avoid fetch stalls when branch destination is near cache boundary
977 2) to improve cache efficiency in case the previous block is not executed
978 (so it does not need to be in the cache).
980 We to catch first case, we align frequently executed blocks.
981 To catch the second, we align blocks that are executed more frequently
982 than the predecessor and the predecessor is likely to not be executed
983 when function is called. */
986 && (branch_frequency
> BB_FREQ_MAX
/ 10
987 || (bb
->frequency
> bb
->prev_bb
->frequency
* 10
988 && (bb
->prev_bb
->frequency
989 <= ENTRY_BLOCK_PTR
->frequency
/ 2))))
991 log
= JUMP_ALIGN (label
);
995 max_skip
= JUMP_ALIGN_MAX_SKIP
;
998 /* In case block is frequent and reached mostly by non-fallthru edge,
999 align it. It is most likely an first block of loop. */
1001 && branch_frequency
+ fallthru_frequency
> BB_FREQ_MAX
/ 10
1002 && branch_frequency
> fallthru_frequency
* 5)
1004 log
= LOOP_ALIGN (label
);
1008 max_skip
= LOOP_ALIGN_MAX_SKIP
;
1011 LABEL_TO_ALIGNMENT (label
) = max_log
;
1012 LABEL_TO_MAX_SKIP (label
) = max_skip
;
1016 /* Make a pass over all insns and compute their actual lengths by shortening
1017 any branches of variable length if possible. */
1019 /* Give a default value for the lowest address in a function. */
1021 #ifndef FIRST_INSN_ADDRESS
1022 #define FIRST_INSN_ADDRESS 0
1025 /* shorten_branches might be called multiple times: for example, the SH
1026 port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG.
1027 In order to do this, it needs proper length information, which it obtains
1028 by calling shorten_branches. This cannot be collapsed with
1029 shorten_branches itself into a single pass unless we also want to integrate
1030 reorg.c, since the branch splitting exposes new instructions with delay
1034 shorten_branches (first
)
1035 rtx first ATTRIBUTE_UNUSED
;
1042 #ifdef HAVE_ATTR_length
1043 #define MAX_CODE_ALIGN 16
1045 int something_changed
= 1;
1046 char *varying_length
;
1049 rtx align_tab
[MAX_CODE_ALIGN
];
1053 /* Compute maximum UID and allocate label_align / uid_shuid. */
1054 max_uid
= get_max_uid ();
1056 uid_shuid
= (int *) xmalloc (max_uid
* sizeof *uid_shuid
);
1058 if (max_labelno
!= max_label_num ())
1060 int old
= max_labelno
;
1064 max_labelno
= max_label_num ();
1066 n_labels
= max_labelno
- min_labelno
+ 1;
1067 n_old_labels
= old
- min_labelno
+ 1;
1069 label_align
= (struct label_alignment
*) xrealloc
1070 (label_align
, n_labels
* sizeof (struct label_alignment
));
1072 /* Range of labels grows monotonically in the function. Abort here
1073 means that the initialization of array got lost. */
1074 if (n_old_labels
> n_labels
)
1077 memset (label_align
+ n_old_labels
, 0,
1078 (n_labels
- n_old_labels
) * sizeof (struct label_alignment
));
1081 /* Initialize label_align and set up uid_shuid to be strictly
1082 monotonically rising with insn order. */
1083 /* We use max_log here to keep track of the maximum alignment we want to
1084 impose on the next CODE_LABEL (or the current one if we are processing
1085 the CODE_LABEL itself). */
1090 for (insn
= get_insns (), i
= 1; insn
; insn
= NEXT_INSN (insn
))
1094 INSN_SHUID (insn
) = i
++;
1097 /* reorg might make the first insn of a loop being run once only,
1098 and delete the label in front of it. Then we want to apply
1099 the loop alignment to the new label created by reorg, which
1100 is separated by the former loop start insn from the
1101 NOTE_INSN_LOOP_BEG. */
1103 else if (GET_CODE (insn
) == CODE_LABEL
)
1107 /* Merge in alignments computed by compute_alignments. */
1108 log
= LABEL_TO_ALIGNMENT (insn
);
1112 max_skip
= LABEL_TO_MAX_SKIP (insn
);
1115 log
= LABEL_ALIGN (insn
);
1119 max_skip
= LABEL_ALIGN_MAX_SKIP
;
1121 next
= NEXT_INSN (insn
);
1122 /* ADDR_VECs only take room if read-only data goes into the text
1124 if (JUMP_TABLES_IN_TEXT_SECTION
|| !HAVE_READONLY_DATA_SECTION
)
1125 if (next
&& GET_CODE (next
) == JUMP_INSN
)
1127 rtx nextbody
= PATTERN (next
);
1128 if (GET_CODE (nextbody
) == ADDR_VEC
1129 || GET_CODE (nextbody
) == ADDR_DIFF_VEC
)
1131 log
= ADDR_VEC_ALIGN (next
);
1135 max_skip
= LABEL_ALIGN_MAX_SKIP
;
1139 LABEL_TO_ALIGNMENT (insn
) = max_log
;
1140 LABEL_TO_MAX_SKIP (insn
) = max_skip
;
1144 else if (GET_CODE (insn
) == BARRIER
)
1148 for (label
= insn
; label
&& ! INSN_P (label
);
1149 label
= NEXT_INSN (label
))
1150 if (GET_CODE (label
) == CODE_LABEL
)
1152 log
= LABEL_ALIGN_AFTER_BARRIER (insn
);
1156 max_skip
= LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP
;
1162 #ifdef HAVE_ATTR_length
1164 /* Allocate the rest of the arrays. */
1165 insn_lengths
= (int *) xmalloc (max_uid
* sizeof (*insn_lengths
));
1166 insn_lengths_max_uid
= max_uid
;
1167 /* Syntax errors can lead to labels being outside of the main insn stream.
1168 Initialize insn_addresses, so that we get reproducible results. */
1169 INSN_ADDRESSES_ALLOC (max_uid
);
1171 varying_length
= (char *) xcalloc (max_uid
, sizeof (char));
1173 /* Initialize uid_align. We scan instructions
1174 from end to start, and keep in align_tab[n] the last seen insn
1175 that does an alignment of at least n+1, i.e. the successor
1176 in the alignment chain for an insn that does / has a known
1178 uid_align
= (rtx
*) xcalloc (max_uid
, sizeof *uid_align
);
1180 for (i
= MAX_CODE_ALIGN
; --i
>= 0;)
1181 align_tab
[i
] = NULL_RTX
;
1182 seq
= get_last_insn ();
1183 for (; seq
; seq
= PREV_INSN (seq
))
1185 int uid
= INSN_UID (seq
);
1187 log
= (GET_CODE (seq
) == CODE_LABEL
? LABEL_TO_ALIGNMENT (seq
) : 0);
1188 uid_align
[uid
] = align_tab
[0];
1191 /* Found an alignment label. */
1192 uid_align
[uid
] = align_tab
[log
];
1193 for (i
= log
- 1; i
>= 0; i
--)
1197 #ifdef CASE_VECTOR_SHORTEN_MODE
1200 /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum
1203 int min_shuid
= INSN_SHUID (get_insns ()) - 1;
1204 int max_shuid
= INSN_SHUID (get_last_insn ()) + 1;
1207 for (insn
= first
; insn
!= 0; insn
= NEXT_INSN (insn
))
1209 rtx min_lab
= NULL_RTX
, max_lab
= NULL_RTX
, pat
;
1210 int len
, i
, min
, max
, insn_shuid
;
1212 addr_diff_vec_flags flags
;
1214 if (GET_CODE (insn
) != JUMP_INSN
1215 || GET_CODE (PATTERN (insn
)) != ADDR_DIFF_VEC
)
1217 pat
= PATTERN (insn
);
1218 len
= XVECLEN (pat
, 1);
1221 min_align
= MAX_CODE_ALIGN
;
1222 for (min
= max_shuid
, max
= min_shuid
, i
= len
- 1; i
>= 0; i
--)
1224 rtx lab
= XEXP (XVECEXP (pat
, 1, i
), 0);
1225 int shuid
= INSN_SHUID (lab
);
1236 if (min_align
> LABEL_TO_ALIGNMENT (lab
))
1237 min_align
= LABEL_TO_ALIGNMENT (lab
);
1239 XEXP (pat
, 2) = gen_rtx_LABEL_REF (VOIDmode
, min_lab
);
1240 XEXP (pat
, 3) = gen_rtx_LABEL_REF (VOIDmode
, max_lab
);
1241 insn_shuid
= INSN_SHUID (insn
);
1242 rel
= INSN_SHUID (XEXP (XEXP (pat
, 0), 0));
1243 flags
.min_align
= min_align
;
1244 flags
.base_after_vec
= rel
> insn_shuid
;
1245 flags
.min_after_vec
= min
> insn_shuid
;
1246 flags
.max_after_vec
= max
> insn_shuid
;
1247 flags
.min_after_base
= min
> rel
;
1248 flags
.max_after_base
= max
> rel
;
1249 ADDR_DIFF_VEC_FLAGS (pat
) = flags
;
1252 #endif /* CASE_VECTOR_SHORTEN_MODE */
1254 /* Compute initial lengths, addresses, and varying flags for each insn. */
1255 for (insn_current_address
= FIRST_INSN_ADDRESS
, insn
= first
;
1257 insn_current_address
+= insn_lengths
[uid
], insn
= NEXT_INSN (insn
))
1259 uid
= INSN_UID (insn
);
1261 insn_lengths
[uid
] = 0;
1263 if (GET_CODE (insn
) == CODE_LABEL
)
1265 int log
= LABEL_TO_ALIGNMENT (insn
);
1268 int align
= 1 << log
;
1269 int new_address
= (insn_current_address
+ align
- 1) & -align
;
1270 insn_lengths
[uid
] = new_address
- insn_current_address
;
1274 INSN_ADDRESSES (uid
) = insn_current_address
;
1276 if (GET_CODE (insn
) == NOTE
|| GET_CODE (insn
) == BARRIER
1277 || GET_CODE (insn
) == CODE_LABEL
)
1279 if (INSN_DELETED_P (insn
))
1282 body
= PATTERN (insn
);
1283 if (GET_CODE (body
) == ADDR_VEC
|| GET_CODE (body
) == ADDR_DIFF_VEC
)
1285 /* This only takes room if read-only data goes into the text
1287 if (JUMP_TABLES_IN_TEXT_SECTION
|| !HAVE_READONLY_DATA_SECTION
)
1288 insn_lengths
[uid
] = (XVECLEN (body
,
1289 GET_CODE (body
) == ADDR_DIFF_VEC
)
1290 * GET_MODE_SIZE (GET_MODE (body
)));
1291 /* Alignment is handled by ADDR_VEC_ALIGN. */
1293 else if (GET_CODE (body
) == ASM_INPUT
|| asm_noperands (body
) >= 0)
1294 insn_lengths
[uid
] = asm_insn_count (body
) * insn_default_length (insn
);
1295 else if (GET_CODE (body
) == SEQUENCE
)
1298 int const_delay_slots
;
1300 const_delay_slots
= const_num_delay_slots (XVECEXP (body
, 0, 0));
1302 const_delay_slots
= 0;
1304 /* Inside a delay slot sequence, we do not do any branch shortening
1305 if the shortening could change the number of delay slots
1307 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
1309 rtx inner_insn
= XVECEXP (body
, 0, i
);
1310 int inner_uid
= INSN_UID (inner_insn
);
1313 if (GET_CODE (body
) == ASM_INPUT
1314 || asm_noperands (PATTERN (XVECEXP (body
, 0, i
))) >= 0)
1315 inner_length
= (asm_insn_count (PATTERN (inner_insn
))
1316 * insn_default_length (inner_insn
));
1318 inner_length
= insn_default_length (inner_insn
);
1320 insn_lengths
[inner_uid
] = inner_length
;
1321 if (const_delay_slots
)
1323 if ((varying_length
[inner_uid
]
1324 = insn_variable_length_p (inner_insn
)) != 0)
1325 varying_length
[uid
] = 1;
1326 INSN_ADDRESSES (inner_uid
) = (insn_current_address
1327 + insn_lengths
[uid
]);
1330 varying_length
[inner_uid
] = 0;
1331 insn_lengths
[uid
] += inner_length
;
1334 else if (GET_CODE (body
) != USE
&& GET_CODE (body
) != CLOBBER
)
1336 insn_lengths
[uid
] = insn_default_length (insn
);
1337 varying_length
[uid
] = insn_variable_length_p (insn
);
1340 /* If needed, do any adjustment. */
1341 #ifdef ADJUST_INSN_LENGTH
1342 ADJUST_INSN_LENGTH (insn
, insn_lengths
[uid
]);
1343 if (insn_lengths
[uid
] < 0)
1344 fatal_insn ("negative insn length", insn
);
1348 /* Now loop over all the insns finding varying length insns. For each,
1349 get the current insn length. If it has changed, reflect the change.
1350 When nothing changes for a full pass, we are done. */
1352 while (something_changed
)
1354 something_changed
= 0;
1355 insn_current_align
= MAX_CODE_ALIGN
- 1;
1356 for (insn_current_address
= FIRST_INSN_ADDRESS
, insn
= first
;
1358 insn
= NEXT_INSN (insn
))
1361 #ifdef ADJUST_INSN_LENGTH
1366 uid
= INSN_UID (insn
);
1368 if (GET_CODE (insn
) == CODE_LABEL
)
1370 int log
= LABEL_TO_ALIGNMENT (insn
);
1371 if (log
> insn_current_align
)
1373 int align
= 1 << log
;
1374 int new_address
= (insn_current_address
+ align
- 1) & -align
;
1375 insn_lengths
[uid
] = new_address
- insn_current_address
;
1376 insn_current_align
= log
;
1377 insn_current_address
= new_address
;
1380 insn_lengths
[uid
] = 0;
1381 INSN_ADDRESSES (uid
) = insn_current_address
;
1385 length_align
= INSN_LENGTH_ALIGNMENT (insn
);
1386 if (length_align
< insn_current_align
)
1387 insn_current_align
= length_align
;
1389 insn_last_address
= INSN_ADDRESSES (uid
);
1390 INSN_ADDRESSES (uid
) = insn_current_address
;
1392 #ifdef CASE_VECTOR_SHORTEN_MODE
1393 if (optimize
&& GET_CODE (insn
) == JUMP_INSN
1394 && GET_CODE (PATTERN (insn
)) == ADDR_DIFF_VEC
)
1396 rtx body
= PATTERN (insn
);
1397 int old_length
= insn_lengths
[uid
];
1398 rtx rel_lab
= XEXP (XEXP (body
, 0), 0);
1399 rtx min_lab
= XEXP (XEXP (body
, 2), 0);
1400 rtx max_lab
= XEXP (XEXP (body
, 3), 0);
1401 int rel_addr
= INSN_ADDRESSES (INSN_UID (rel_lab
));
1402 int min_addr
= INSN_ADDRESSES (INSN_UID (min_lab
));
1403 int max_addr
= INSN_ADDRESSES (INSN_UID (max_lab
));
1406 addr_diff_vec_flags flags
;
1408 /* Avoid automatic aggregate initialization. */
1409 flags
= ADDR_DIFF_VEC_FLAGS (body
);
1411 /* Try to find a known alignment for rel_lab. */
1412 for (prev
= rel_lab
;
1414 && ! insn_lengths
[INSN_UID (prev
)]
1415 && ! (varying_length
[INSN_UID (prev
)] & 1);
1416 prev
= PREV_INSN (prev
))
1417 if (varying_length
[INSN_UID (prev
)] & 2)
1419 rel_align
= LABEL_TO_ALIGNMENT (prev
);
1423 /* See the comment on addr_diff_vec_flags in rtl.h for the
1424 meaning of the flags values. base: REL_LAB vec: INSN */
1425 /* Anything after INSN has still addresses from the last
1426 pass; adjust these so that they reflect our current
1427 estimate for this pass. */
1428 if (flags
.base_after_vec
)
1429 rel_addr
+= insn_current_address
- insn_last_address
;
1430 if (flags
.min_after_vec
)
1431 min_addr
+= insn_current_address
- insn_last_address
;
1432 if (flags
.max_after_vec
)
1433 max_addr
+= insn_current_address
- insn_last_address
;
1434 /* We want to know the worst case, i.e. lowest possible value
1435 for the offset of MIN_LAB. If MIN_LAB is after REL_LAB,
1436 its offset is positive, and we have to be wary of code shrink;
1437 otherwise, it is negative, and we have to be vary of code
1439 if (flags
.min_after_base
)
1441 /* If INSN is between REL_LAB and MIN_LAB, the size
1442 changes we are about to make can change the alignment
1443 within the observed offset, therefore we have to break
1444 it up into two parts that are independent. */
1445 if (! flags
.base_after_vec
&& flags
.min_after_vec
)
1447 min_addr
-= align_fuzz (rel_lab
, insn
, rel_align
, 0);
1448 min_addr
-= align_fuzz (insn
, min_lab
, 0, 0);
1451 min_addr
-= align_fuzz (rel_lab
, min_lab
, rel_align
, 0);
1455 if (flags
.base_after_vec
&& ! flags
.min_after_vec
)
1457 min_addr
-= align_fuzz (min_lab
, insn
, 0, ~0);
1458 min_addr
-= align_fuzz (insn
, rel_lab
, 0, ~0);
1461 min_addr
-= align_fuzz (min_lab
, rel_lab
, 0, ~0);
1463 /* Likewise, determine the highest lowest possible value
1464 for the offset of MAX_LAB. */
1465 if (flags
.max_after_base
)
1467 if (! flags
.base_after_vec
&& flags
.max_after_vec
)
1469 max_addr
+= align_fuzz (rel_lab
, insn
, rel_align
, ~0);
1470 max_addr
+= align_fuzz (insn
, max_lab
, 0, ~0);
1473 max_addr
+= align_fuzz (rel_lab
, max_lab
, rel_align
, ~0);
1477 if (flags
.base_after_vec
&& ! flags
.max_after_vec
)
1479 max_addr
+= align_fuzz (max_lab
, insn
, 0, 0);
1480 max_addr
+= align_fuzz (insn
, rel_lab
, 0, 0);
1483 max_addr
+= align_fuzz (max_lab
, rel_lab
, 0, 0);
1485 PUT_MODE (body
, CASE_VECTOR_SHORTEN_MODE (min_addr
- rel_addr
,
1486 max_addr
- rel_addr
,
1488 if (JUMP_TABLES_IN_TEXT_SECTION
|| !HAVE_READONLY_DATA_SECTION
)
1491 = (XVECLEN (body
, 1) * GET_MODE_SIZE (GET_MODE (body
)));
1492 insn_current_address
+= insn_lengths
[uid
];
1493 if (insn_lengths
[uid
] != old_length
)
1494 something_changed
= 1;
1499 #endif /* CASE_VECTOR_SHORTEN_MODE */
1501 if (! (varying_length
[uid
]))
1503 if (GET_CODE (insn
) == INSN
1504 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
1508 body
= PATTERN (insn
);
1509 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
1511 rtx inner_insn
= XVECEXP (body
, 0, i
);
1512 int inner_uid
= INSN_UID (inner_insn
);
1514 INSN_ADDRESSES (inner_uid
) = insn_current_address
;
1516 insn_current_address
+= insn_lengths
[inner_uid
];
1520 insn_current_address
+= insn_lengths
[uid
];
1525 if (GET_CODE (insn
) == INSN
&& GET_CODE (PATTERN (insn
)) == SEQUENCE
)
1529 body
= PATTERN (insn
);
1531 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
1533 rtx inner_insn
= XVECEXP (body
, 0, i
);
1534 int inner_uid
= INSN_UID (inner_insn
);
1537 INSN_ADDRESSES (inner_uid
) = insn_current_address
;
1539 /* insn_current_length returns 0 for insns with a
1540 non-varying length. */
1541 if (! varying_length
[inner_uid
])
1542 inner_length
= insn_lengths
[inner_uid
];
1544 inner_length
= insn_current_length (inner_insn
);
1546 if (inner_length
!= insn_lengths
[inner_uid
])
1548 insn_lengths
[inner_uid
] = inner_length
;
1549 something_changed
= 1;
1551 insn_current_address
+= insn_lengths
[inner_uid
];
1552 new_length
+= inner_length
;
1557 new_length
= insn_current_length (insn
);
1558 insn_current_address
+= new_length
;
1561 #ifdef ADJUST_INSN_LENGTH
1562 /* If needed, do any adjustment. */
1563 tmp_length
= new_length
;
1564 ADJUST_INSN_LENGTH (insn
, new_length
);
1565 insn_current_address
+= (new_length
- tmp_length
);
1568 if (new_length
!= insn_lengths
[uid
])
1570 insn_lengths
[uid
] = new_length
;
1571 something_changed
= 1;
1574 /* For a non-optimizing compile, do only a single pass. */
1579 free (varying_length
);
1581 #endif /* HAVE_ATTR_length */
1584 #ifdef HAVE_ATTR_length
1585 /* Given the body of an INSN known to be generated by an ASM statement, return
1586 the number of machine instructions likely to be generated for this insn.
1587 This is used to compute its length. */
1590 asm_insn_count (body
)
1593 const char *template;
1596 if (GET_CODE (body
) == ASM_INPUT
)
1597 template = XSTR (body
, 0);
1599 template = decode_asm_operands (body
, NULL
, NULL
, NULL
, NULL
);
1601 for (; *template; template++)
1602 if (IS_ASM_LOGICAL_LINE_SEPARATOR (*template) || *template == '\n')
1609 /* Output assembler code for the start of a function,
1610 and initialize some of the variables in this file
1611 for the new function. The label for the function and associated
1612 assembler pseudo-ops have already been output in `assemble_start_function'.
1614 FIRST is the first insn of the rtl for the function being compiled.
1615 FILE is the file to write assembler code to.
1616 OPTIMIZE is nonzero if we should eliminate redundant
1617 test and compare insns. */
1620 final_start_function (first
, file
, optimize
)
1623 int optimize ATTRIBUTE_UNUSED
;
1627 this_is_asm_operands
= 0;
1629 #ifdef NON_SAVING_SETJMP
1630 /* A function that calls setjmp should save and restore all the
1631 call-saved registers on a system where longjmp clobbers them. */
1632 if (NON_SAVING_SETJMP
&& current_function_calls_setjmp
)
1636 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
1637 if (!call_used_regs
[i
])
1638 regs_ever_live
[i
] = 1;
1642 if (NOTE_LINE_NUMBER (first
) != NOTE_INSN_DELETED
)
1643 notice_source_line (first
);
1644 high_block_linenum
= high_function_linenum
= last_linenum
;
1646 (*debug_hooks
->begin_prologue
) (last_linenum
, last_filename
);
1648 #if defined (DWARF2_UNWIND_INFO) || defined (IA64_UNWIND_INFO)
1649 if (write_symbols
!= DWARF2_DEBUG
&& write_symbols
!= VMS_AND_DWARF2_DEBUG
)
1650 dwarf2out_begin_prologue (0, NULL
);
1653 #ifdef LEAF_REG_REMAP
1654 if (current_function_uses_only_leaf_regs
)
1655 leaf_renumber_regs (first
);
1658 /* The Sun386i and perhaps other machines don't work right
1659 if the profiling code comes after the prologue. */
1660 #ifdef PROFILE_BEFORE_PROLOGUE
1661 if (current_function_profile
)
1662 profile_function (file
);
1663 #endif /* PROFILE_BEFORE_PROLOGUE */
1665 #if defined (DWARF2_UNWIND_INFO) && defined (HAVE_prologue)
1666 if (dwarf2out_do_frame ())
1667 dwarf2out_frame_debug (NULL_RTX
);
1670 /* If debugging, assign block numbers to all of the blocks in this
1674 remove_unnecessary_notes ();
1675 scope_to_insns_finalize ();
1676 number_blocks (current_function_decl
);
1677 /* We never actually put out begin/end notes for the top-level
1678 block in the function. But, conceptually, that block is
1680 TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl
)) = 1;
1683 /* First output the function prologue: code to set up the stack frame. */
1684 (*targetm
.asm_out
.function_prologue
) (file
, get_frame_size ());
1686 #ifdef VMS_DEBUGGING_INFO
1687 /* Output label after the prologue of the function. */
1688 if (write_symbols
== VMS_DEBUG
|| write_symbols
== VMS_AND_DWARF2_DEBUG
)
1689 vmsdbgout_after_prologue ();
1692 /* If the machine represents the prologue as RTL, the profiling code must
1693 be emitted when NOTE_INSN_PROLOGUE_END is scanned. */
1694 #ifdef HAVE_prologue
1695 if (! HAVE_prologue
)
1697 profile_after_prologue (file
);
1701 profile_after_prologue (file
)
1702 FILE *file ATTRIBUTE_UNUSED
;
1704 #ifndef PROFILE_BEFORE_PROLOGUE
1705 if (current_function_profile
)
1706 profile_function (file
);
1707 #endif /* not PROFILE_BEFORE_PROLOGUE */
1711 profile_function (file
)
1712 FILE *file ATTRIBUTE_UNUSED
;
1714 #ifndef NO_PROFILE_COUNTERS
1715 int align
= MIN (BIGGEST_ALIGNMENT
, LONG_TYPE_SIZE
);
1717 #if defined(ASM_OUTPUT_REG_PUSH)
1718 #if defined(STRUCT_VALUE_INCOMING_REGNUM) || defined(STRUCT_VALUE_REGNUM)
1719 int sval
= current_function_returns_struct
;
1721 #if defined(STATIC_CHAIN_INCOMING_REGNUM) || defined(STATIC_CHAIN_REGNUM)
1722 int cxt
= current_function_needs_context
;
1724 #endif /* ASM_OUTPUT_REG_PUSH */
1726 #ifndef NO_PROFILE_COUNTERS
1728 ASM_OUTPUT_ALIGN (file
, floor_log2 (align
/ BITS_PER_UNIT
));
1729 ASM_OUTPUT_INTERNAL_LABEL (file
, "LP", current_function_profile_label_no
);
1730 assemble_integer (const0_rtx
, LONG_TYPE_SIZE
/ BITS_PER_UNIT
, align
, 1);
1733 function_section (current_function_decl
);
1735 #if defined(STRUCT_VALUE_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1737 ASM_OUTPUT_REG_PUSH (file
, STRUCT_VALUE_INCOMING_REGNUM
);
1739 #if defined(STRUCT_VALUE_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1742 ASM_OUTPUT_REG_PUSH (file
, STRUCT_VALUE_REGNUM
);
1747 #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1749 ASM_OUTPUT_REG_PUSH (file
, STATIC_CHAIN_INCOMING_REGNUM
);
1751 #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1754 ASM_OUTPUT_REG_PUSH (file
, STATIC_CHAIN_REGNUM
);
1759 FUNCTION_PROFILER (file
, current_function_profile_label_no
);
1761 #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1763 ASM_OUTPUT_REG_POP (file
, STATIC_CHAIN_INCOMING_REGNUM
);
1765 #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1768 ASM_OUTPUT_REG_POP (file
, STATIC_CHAIN_REGNUM
);
1773 #if defined(STRUCT_VALUE_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1775 ASM_OUTPUT_REG_POP (file
, STRUCT_VALUE_INCOMING_REGNUM
);
1777 #if defined(STRUCT_VALUE_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1780 ASM_OUTPUT_REG_POP (file
, STRUCT_VALUE_REGNUM
);
1786 /* Output assembler code for the end of a function.
1787 For clarity, args are same as those of `final_start_function'
1788 even though not all of them are needed. */
1791 final_end_function ()
1795 (*debug_hooks
->end_function
) (high_function_linenum
);
1797 /* Finally, output the function epilogue:
1798 code to restore the stack frame and return to the caller. */
1799 (*targetm
.asm_out
.function_epilogue
) (asm_out_file
, get_frame_size ());
1801 /* And debug output. */
1802 (*debug_hooks
->end_epilogue
) ();
1804 #if defined (DWARF2_UNWIND_INFO)
1805 if (write_symbols
!= DWARF2_DEBUG
&& write_symbols
!= VMS_AND_DWARF2_DEBUG
1806 && dwarf2out_do_frame ())
1807 dwarf2out_end_epilogue ();
1811 /* Output assembler code for some insns: all or part of a function.
1812 For description of args, see `final_start_function', above.
1814 PRESCAN is 1 if we are not really outputting,
1815 just scanning as if we were outputting.
1816 Prescanning deletes and rearranges insns just like ordinary output.
1817 PRESCAN is -2 if we are outputting after having prescanned.
1818 In this case, don't try to delete or rearrange insns
1819 because that has already been done.
1820 Prescanning is done only on certain machines. */
1823 final (first
, file
, optimize
, prescan
)
1833 last_ignored_compare
= 0;
1836 /* Make a map indicating which line numbers appear in this function.
1837 When producing SDB debugging info, delete troublesome line number
1838 notes from inlined functions in other files as well as duplicate
1839 line number notes. */
1840 #ifdef SDB_DEBUGGING_INFO
1841 if (write_symbols
== SDB_DEBUG
)
1844 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
1845 if (GET_CODE (insn
) == NOTE
&& NOTE_LINE_NUMBER (insn
) > 0)
1847 if ((RTX_INTEGRATED_P (insn
)
1848 && strcmp (NOTE_SOURCE_FILE (insn
), main_input_filename
) != 0)
1850 && NOTE_LINE_NUMBER (insn
) == NOTE_LINE_NUMBER (last
)
1851 && NOTE_SOURCE_FILE (insn
) == NOTE_SOURCE_FILE (last
)))
1853 delete_insn (insn
); /* Use delete_note. */
1857 if (NOTE_LINE_NUMBER (insn
) > max_line
)
1858 max_line
= NOTE_LINE_NUMBER (insn
);
1864 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
1865 if (GET_CODE (insn
) == NOTE
&& NOTE_LINE_NUMBER (insn
) > max_line
)
1866 max_line
= NOTE_LINE_NUMBER (insn
);
1869 line_note_exists
= (char *) xcalloc (max_line
+ 1, sizeof (char));
1871 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
1873 if (INSN_UID (insn
) > max_uid
) /* find largest UID */
1874 max_uid
= INSN_UID (insn
);
1875 if (GET_CODE (insn
) == NOTE
&& NOTE_LINE_NUMBER (insn
) > 0)
1876 line_note_exists
[NOTE_LINE_NUMBER (insn
)] = 1;
1878 /* If CC tracking across branches is enabled, record the insn which
1879 jumps to each branch only reached from one place. */
1880 if (optimize
&& GET_CODE (insn
) == JUMP_INSN
)
1882 rtx lab
= JUMP_LABEL (insn
);
1883 if (lab
&& LABEL_NUSES (lab
) == 1)
1885 LABEL_REFS (lab
) = insn
;
1895 /* Output the insns. */
1896 for (insn
= NEXT_INSN (first
); insn
;)
1898 #ifdef HAVE_ATTR_length
1899 if ((unsigned) INSN_UID (insn
) >= INSN_ADDRESSES_SIZE ())
1901 /* This can be triggered by bugs elsewhere in the compiler if
1902 new insns are created after init_insn_lengths is called. */
1903 if (GET_CODE (insn
) == NOTE
)
1904 insn_current_address
= -1;
1909 insn_current_address
= INSN_ADDRESSES (INSN_UID (insn
));
1910 #endif /* HAVE_ATTR_length */
1912 insn
= final_scan_insn (insn
, file
, optimize
, prescan
, 0);
1915 /* Store function names for edge-profiling. */
1916 /* ??? Probably should re-use the existing struct function. */
1918 if (cfun
->arc_profile
)
1920 struct function_list
*new_item
= xmalloc (sizeof (struct function_list
));
1922 *functions_tail
= new_item
;
1923 functions_tail
= &new_item
->next
;
1926 new_item
->name
= xstrdup (current_function_name
);
1927 new_item
->cfg_checksum
= profile_info
.current_function_cfg_checksum
;
1928 new_item
->count_edges
= profile_info
.count_edges_instrumented_now
;
1931 free (line_note_exists
);
1932 line_note_exists
= NULL
;
1936 get_insn_template (code
, insn
)
1940 const void *output
= insn_data
[code
].output
;
1941 switch (insn_data
[code
].output_format
)
1943 case INSN_OUTPUT_FORMAT_SINGLE
:
1944 return (const char *) output
;
1945 case INSN_OUTPUT_FORMAT_MULTI
:
1946 return ((const char *const *) output
)[which_alternative
];
1947 case INSN_OUTPUT_FORMAT_FUNCTION
:
1950 return (*(insn_output_fn
) output
) (recog_data
.operand
, insn
);
1957 /* The final scan for one insn, INSN.
1958 Args are same as in `final', except that INSN
1959 is the insn being scanned.
1960 Value returned is the next insn to be scanned.
1962 NOPEEPHOLES is the flag to disallow peephole processing (currently
1963 used for within delayed branch sequence output). */
1966 final_scan_insn (insn
, file
, optimize
, prescan
, nopeepholes
)
1969 int optimize ATTRIBUTE_UNUSED
;
1971 int nopeepholes ATTRIBUTE_UNUSED
;
1979 /* Ignore deleted insns. These can occur when we split insns (due to a
1980 template of "#") while not optimizing. */
1981 if (INSN_DELETED_P (insn
))
1982 return NEXT_INSN (insn
);
1984 switch (GET_CODE (insn
))
1990 switch (NOTE_LINE_NUMBER (insn
))
1992 case NOTE_INSN_DELETED
:
1993 case NOTE_INSN_LOOP_BEG
:
1994 case NOTE_INSN_LOOP_END
:
1995 case NOTE_INSN_LOOP_END_TOP_COND
:
1996 case NOTE_INSN_LOOP_CONT
:
1997 case NOTE_INSN_LOOP_VTOP
:
1998 case NOTE_INSN_FUNCTION_END
:
1999 case NOTE_INSN_REPEATED_LINE_NUMBER
:
2000 case NOTE_INSN_RANGE_BEG
:
2001 case NOTE_INSN_RANGE_END
:
2002 case NOTE_INSN_LIVE
:
2003 case NOTE_INSN_EXPECTED_VALUE
:
2006 case NOTE_INSN_BASIC_BLOCK
:
2007 #ifdef IA64_UNWIND_INFO
2008 IA64_UNWIND_EMIT (asm_out_file
, insn
);
2011 fprintf (asm_out_file
, "\t%s basic block %d\n",
2012 ASM_COMMENT_START
, NOTE_BASIC_BLOCK (insn
)->index
);
2015 case NOTE_INSN_EH_REGION_BEG
:
2016 ASM_OUTPUT_DEBUG_LABEL (asm_out_file
, "LEHB",
2017 NOTE_EH_HANDLER (insn
));
2020 case NOTE_INSN_EH_REGION_END
:
2021 ASM_OUTPUT_DEBUG_LABEL (asm_out_file
, "LEHE",
2022 NOTE_EH_HANDLER (insn
));
2025 case NOTE_INSN_PROLOGUE_END
:
2026 (*targetm
.asm_out
.function_end_prologue
) (file
);
2027 profile_after_prologue (file
);
2030 case NOTE_INSN_EPILOGUE_BEG
:
2031 (*targetm
.asm_out
.function_begin_epilogue
) (file
);
2034 case NOTE_INSN_FUNCTION_BEG
:
2036 (*debug_hooks
->end_prologue
) (last_linenum
);
2039 case NOTE_INSN_BLOCK_BEG
:
2040 if (debug_info_level
== DINFO_LEVEL_NORMAL
2041 || debug_info_level
== DINFO_LEVEL_VERBOSE
2042 || write_symbols
== DWARF_DEBUG
2043 || write_symbols
== DWARF2_DEBUG
2044 || write_symbols
== VMS_AND_DWARF2_DEBUG
2045 || write_symbols
== VMS_DEBUG
)
2047 int n
= BLOCK_NUMBER (NOTE_BLOCK (insn
));
2051 high_block_linenum
= last_linenum
;
2053 /* Output debugging info about the symbol-block beginning. */
2054 (*debug_hooks
->begin_block
) (last_linenum
, n
);
2056 /* Mark this block as output. */
2057 TREE_ASM_WRITTEN (NOTE_BLOCK (insn
)) = 1;
2061 case NOTE_INSN_BLOCK_END
:
2062 if (debug_info_level
== DINFO_LEVEL_NORMAL
2063 || debug_info_level
== DINFO_LEVEL_VERBOSE
2064 || write_symbols
== DWARF_DEBUG
2065 || write_symbols
== DWARF2_DEBUG
2066 || write_symbols
== VMS_AND_DWARF2_DEBUG
2067 || write_symbols
== VMS_DEBUG
)
2069 int n
= BLOCK_NUMBER (NOTE_BLOCK (insn
));
2073 /* End of a symbol-block. */
2075 if (block_depth
< 0)
2078 (*debug_hooks
->end_block
) (high_block_linenum
, n
);
2082 case NOTE_INSN_DELETED_LABEL
:
2083 /* Emit the label. We may have deleted the CODE_LABEL because
2084 the label could be proved to be unreachable, though still
2085 referenced (in the form of having its address taken. */
2086 ASM_OUTPUT_DEBUG_LABEL (file
, "L", CODE_LABEL_NUMBER (insn
));
2093 if (NOTE_LINE_NUMBER (insn
) <= 0)
2096 /* This note is a line-number. */
2101 /* If there is anything real after this note, output it.
2102 If another line note follows, omit this one. */
2103 for (note
= NEXT_INSN (insn
); note
; note
= NEXT_INSN (note
))
2105 if (GET_CODE (note
) != NOTE
&& GET_CODE (note
) != CODE_LABEL
)
2108 /* These types of notes can be significant
2109 so make sure the preceding line number stays. */
2110 else if (GET_CODE (note
) == NOTE
2111 && (NOTE_LINE_NUMBER (note
) == NOTE_INSN_BLOCK_BEG
2112 || NOTE_LINE_NUMBER (note
) == NOTE_INSN_BLOCK_END
2113 || NOTE_LINE_NUMBER (note
) == NOTE_INSN_FUNCTION_BEG
))
2115 else if (GET_CODE (note
) == NOTE
&& NOTE_LINE_NUMBER (note
) > 0)
2117 /* Another line note follows; we can delete this note
2118 if no intervening line numbers have notes elsewhere. */
2120 for (num
= NOTE_LINE_NUMBER (insn
) + 1;
2121 num
< NOTE_LINE_NUMBER (note
);
2123 if (line_note_exists
[num
])
2126 if (num
>= NOTE_LINE_NUMBER (note
))
2132 /* Output this line note if it is the first or the last line
2136 notice_source_line (insn
);
2137 (*debug_hooks
->source_line
) (last_linenum
, last_filename
);
2145 #if defined (DWARF2_UNWIND_INFO)
2146 if (dwarf2out_do_frame ())
2147 dwarf2out_frame_debug (insn
);
2152 /* The target port might emit labels in the output function for
2153 some insn, e.g. sh.c output_branchy_insn. */
2154 if (CODE_LABEL_NUMBER (insn
) <= max_labelno
)
2156 int align
= LABEL_TO_ALIGNMENT (insn
);
2157 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2158 int max_skip
= LABEL_TO_MAX_SKIP (insn
);
2161 if (align
&& NEXT_INSN (insn
))
2163 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2164 ASM_OUTPUT_MAX_SKIP_ALIGN (file
, align
, max_skip
);
2166 ASM_OUTPUT_ALIGN (file
, align
);
2172 /* If this label is reached from only one place, set the condition
2173 codes from the instruction just before the branch. */
2175 /* Disabled because some insns set cc_status in the C output code
2176 and NOTICE_UPDATE_CC alone can set incorrect status. */
2177 if (0 /* optimize && LABEL_NUSES (insn) == 1*/)
2179 rtx jump
= LABEL_REFS (insn
);
2180 rtx barrier
= prev_nonnote_insn (insn
);
2182 /* If the LABEL_REFS field of this label has been set to point
2183 at a branch, the predecessor of the branch is a regular
2184 insn, and that branch is the only way to reach this label,
2185 set the condition codes based on the branch and its
2187 if (barrier
&& GET_CODE (barrier
) == BARRIER
2188 && jump
&& GET_CODE (jump
) == JUMP_INSN
2189 && (prev
= prev_nonnote_insn (jump
))
2190 && GET_CODE (prev
) == INSN
)
2192 NOTICE_UPDATE_CC (PATTERN (prev
), prev
);
2193 NOTICE_UPDATE_CC (PATTERN (jump
), jump
);
2201 #ifdef FINAL_PRESCAN_LABEL
2202 FINAL_PRESCAN_INSN (insn
, NULL
, 0);
2205 if (LABEL_NAME (insn
))
2206 (*debug_hooks
->label
) (insn
);
2210 fputs (ASM_APP_OFF
, file
);
2213 if (NEXT_INSN (insn
) != 0
2214 && GET_CODE (NEXT_INSN (insn
)) == JUMP_INSN
)
2216 rtx nextbody
= PATTERN (NEXT_INSN (insn
));
2218 /* If this label is followed by a jump-table,
2219 make sure we put the label in the read-only section. Also
2220 possibly write the label and jump table together. */
2222 if (GET_CODE (nextbody
) == ADDR_VEC
2223 || GET_CODE (nextbody
) == ADDR_DIFF_VEC
)
2225 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2226 /* In this case, the case vector is being moved by the
2227 target, so don't output the label at all. Leave that
2228 to the back end macros. */
2230 if (! JUMP_TABLES_IN_TEXT_SECTION
)
2234 readonly_data_section ();
2236 #ifdef ADDR_VEC_ALIGN
2237 log_align
= ADDR_VEC_ALIGN (NEXT_INSN (insn
));
2239 log_align
= exact_log2 (BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
);
2241 ASM_OUTPUT_ALIGN (file
, log_align
);
2244 function_section (current_function_decl
);
2246 #ifdef ASM_OUTPUT_CASE_LABEL
2247 ASM_OUTPUT_CASE_LABEL (file
, "L", CODE_LABEL_NUMBER (insn
),
2250 if (LABEL_ALTERNATE_NAME (insn
))
2251 ASM_OUTPUT_ALTERNATE_LABEL_NAME (file
, insn
);
2253 ASM_OUTPUT_INTERNAL_LABEL (file
, "L", CODE_LABEL_NUMBER (insn
));
2259 if (LABEL_ALTERNATE_NAME (insn
))
2260 ASM_OUTPUT_ALTERNATE_LABEL_NAME (file
, insn
);
2262 ASM_OUTPUT_INTERNAL_LABEL (file
, "L", CODE_LABEL_NUMBER (insn
));
2267 rtx body
= PATTERN (insn
);
2268 int insn_code_number
;
2269 const char *template;
2272 /* An INSN, JUMP_INSN or CALL_INSN.
2273 First check for special kinds that recog doesn't recognize. */
2275 if (GET_CODE (body
) == USE
/* These are just declarations */
2276 || GET_CODE (body
) == CLOBBER
)
2280 /* If there is a REG_CC_SETTER note on this insn, it means that
2281 the setting of the condition code was done in the delay slot
2282 of the insn that branched here. So recover the cc status
2283 from the insn that set it. */
2285 note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
2288 NOTICE_UPDATE_CC (PATTERN (XEXP (note
, 0)), XEXP (note
, 0));
2289 cc_prev_status
= cc_status
;
2293 /* Detect insns that are really jump-tables
2294 and output them as such. */
2296 if (GET_CODE (body
) == ADDR_VEC
|| GET_CODE (body
) == ADDR_DIFF_VEC
)
2298 #if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC))
2307 fputs (ASM_APP_OFF
, file
);
2311 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2312 if (GET_CODE (body
) == ADDR_VEC
)
2314 #ifdef ASM_OUTPUT_ADDR_VEC
2315 ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn
), body
);
2322 #ifdef ASM_OUTPUT_ADDR_DIFF_VEC
2323 ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn
), body
);
2329 vlen
= XVECLEN (body
, GET_CODE (body
) == ADDR_DIFF_VEC
);
2330 for (idx
= 0; idx
< vlen
; idx
++)
2332 if (GET_CODE (body
) == ADDR_VEC
)
2334 #ifdef ASM_OUTPUT_ADDR_VEC_ELT
2335 ASM_OUTPUT_ADDR_VEC_ELT
2336 (file
, CODE_LABEL_NUMBER (XEXP (XVECEXP (body
, 0, idx
), 0)));
2343 #ifdef ASM_OUTPUT_ADDR_DIFF_ELT
2344 ASM_OUTPUT_ADDR_DIFF_ELT
2347 CODE_LABEL_NUMBER (XEXP (XVECEXP (body
, 1, idx
), 0)),
2348 CODE_LABEL_NUMBER (XEXP (XEXP (body
, 0), 0)));
2354 #ifdef ASM_OUTPUT_CASE_END
2355 ASM_OUTPUT_CASE_END (file
,
2356 CODE_LABEL_NUMBER (PREV_INSN (insn
)),
2361 function_section (current_function_decl
);
2366 if (GET_CODE (body
) == ASM_INPUT
)
2368 const char *string
= XSTR (body
, 0);
2370 /* There's no telling what that did to the condition codes. */
2379 fputs (ASM_APP_ON
, file
);
2382 fprintf (asm_out_file
, "\t%s\n", string
);
2387 /* Detect `asm' construct with operands. */
2388 if (asm_noperands (body
) >= 0)
2390 unsigned int noperands
= asm_noperands (body
);
2391 rtx
*ops
= (rtx
*) alloca (noperands
* sizeof (rtx
));
2394 /* There's no telling what that did to the condition codes. */
2399 /* Get out the operand values. */
2400 string
= decode_asm_operands (body
, ops
, NULL
, NULL
, NULL
);
2401 /* Inhibit aborts on what would otherwise be compiler bugs. */
2402 insn_noperands
= noperands
;
2403 this_is_asm_operands
= insn
;
2405 /* Output the insn using them. */
2410 fputs (ASM_APP_ON
, file
);
2413 output_asm_insn (string
, ops
);
2416 this_is_asm_operands
= 0;
2420 if (prescan
<= 0 && app_on
)
2422 fputs (ASM_APP_OFF
, file
);
2426 if (GET_CODE (body
) == SEQUENCE
)
2428 /* A delayed-branch sequence */
2434 final_sequence
= body
;
2436 /* The first insn in this SEQUENCE might be a JUMP_INSN that will
2437 force the restoration of a comparison that was previously
2438 thought unnecessary. If that happens, cancel this sequence
2439 and cause that insn to be restored. */
2441 next
= final_scan_insn (XVECEXP (body
, 0, 0), file
, 0, prescan
, 1);
2442 if (next
!= XVECEXP (body
, 0, 1))
2448 for (i
= 1; i
< XVECLEN (body
, 0); i
++)
2450 rtx insn
= XVECEXP (body
, 0, i
);
2451 rtx next
= NEXT_INSN (insn
);
2452 /* We loop in case any instruction in a delay slot gets
2455 insn
= final_scan_insn (insn
, file
, 0, prescan
, 1);
2456 while (insn
!= next
);
2458 #ifdef DBR_OUTPUT_SEQEND
2459 DBR_OUTPUT_SEQEND (file
);
2463 /* If the insn requiring the delay slot was a CALL_INSN, the
2464 insns in the delay slot are actually executed before the
2465 called function. Hence we don't preserve any CC-setting
2466 actions in these insns and the CC must be marked as being
2467 clobbered by the function. */
2468 if (GET_CODE (XVECEXP (body
, 0, 0)) == CALL_INSN
)
2475 /* We have a real machine instruction as rtl. */
2477 body
= PATTERN (insn
);
2480 set
= single_set (insn
);
2482 /* Check for redundant test and compare instructions
2483 (when the condition codes are already set up as desired).
2484 This is done only when optimizing; if not optimizing,
2485 it should be possible for the user to alter a variable
2486 with the debugger in between statements
2487 and the next statement should reexamine the variable
2488 to compute the condition codes. */
2493 rtx set
= single_set (insn
);
2497 && GET_CODE (SET_DEST (set
)) == CC0
2498 && insn
!= last_ignored_compare
)
2500 if (GET_CODE (SET_SRC (set
)) == SUBREG
)
2501 SET_SRC (set
) = alter_subreg (&SET_SRC (set
));
2502 else if (GET_CODE (SET_SRC (set
)) == COMPARE
)
2504 if (GET_CODE (XEXP (SET_SRC (set
), 0)) == SUBREG
)
2505 XEXP (SET_SRC (set
), 0)
2506 = alter_subreg (&XEXP (SET_SRC (set
), 0));
2507 if (GET_CODE (XEXP (SET_SRC (set
), 1)) == SUBREG
)
2508 XEXP (SET_SRC (set
), 1)
2509 = alter_subreg (&XEXP (SET_SRC (set
), 1));
2511 if ((cc_status
.value1
!= 0
2512 && rtx_equal_p (SET_SRC (set
), cc_status
.value1
))
2513 || (cc_status
.value2
!= 0
2514 && rtx_equal_p (SET_SRC (set
), cc_status
.value2
)))
2516 /* Don't delete insn if it has an addressing side-effect. */
2517 if (! FIND_REG_INC_NOTE (insn
, NULL_RTX
)
2518 /* or if anything in it is volatile. */
2519 && ! volatile_refs_p (PATTERN (insn
)))
2521 /* We don't really delete the insn; just ignore it. */
2522 last_ignored_compare
= insn
;
2531 /* Don't bother outputting obvious no-ops, even without -O.
2532 This optimization is fast and doesn't interfere with debugging.
2533 Don't do this if the insn is in a delay slot, since this
2534 will cause an improper number of delay insns to be written. */
2535 if (final_sequence
== 0
2537 && GET_CODE (insn
) == INSN
&& GET_CODE (body
) == SET
2538 && GET_CODE (SET_SRC (body
)) == REG
2539 && GET_CODE (SET_DEST (body
)) == REG
2540 && REGNO (SET_SRC (body
)) == REGNO (SET_DEST (body
)))
2545 /* If this is a conditional branch, maybe modify it
2546 if the cc's are in a nonstandard state
2547 so that it accomplishes the same thing that it would
2548 do straightforwardly if the cc's were set up normally. */
2550 if (cc_status
.flags
!= 0
2551 && GET_CODE (insn
) == JUMP_INSN
2552 && GET_CODE (body
) == SET
2553 && SET_DEST (body
) == pc_rtx
2554 && GET_CODE (SET_SRC (body
)) == IF_THEN_ELSE
2555 && GET_RTX_CLASS (GET_CODE (XEXP (SET_SRC (body
), 0))) == '<'
2556 && XEXP (XEXP (SET_SRC (body
), 0), 0) == cc0_rtx
2557 /* This is done during prescan; it is not done again
2558 in final scan when prescan has been done. */
2561 /* This function may alter the contents of its argument
2562 and clear some of the cc_status.flags bits.
2563 It may also return 1 meaning condition now always true
2564 or -1 meaning condition now always false
2565 or 2 meaning condition nontrivial but altered. */
2566 int result
= alter_cond (XEXP (SET_SRC (body
), 0));
2567 /* If condition now has fixed value, replace the IF_THEN_ELSE
2568 with its then-operand or its else-operand. */
2570 SET_SRC (body
) = XEXP (SET_SRC (body
), 1);
2572 SET_SRC (body
) = XEXP (SET_SRC (body
), 2);
2574 /* The jump is now either unconditional or a no-op.
2575 If it has become a no-op, don't try to output it.
2576 (It would not be recognized.) */
2577 if (SET_SRC (body
) == pc_rtx
)
2582 else if (GET_CODE (SET_SRC (body
)) == RETURN
)
2583 /* Replace (set (pc) (return)) with (return). */
2584 PATTERN (insn
) = body
= SET_SRC (body
);
2586 /* Rerecognize the instruction if it has changed. */
2588 INSN_CODE (insn
) = -1;
2591 /* Make same adjustments to instructions that examine the
2592 condition codes without jumping and instructions that
2593 handle conditional moves (if this machine has either one). */
2595 if (cc_status
.flags
!= 0
2598 rtx cond_rtx
, then_rtx
, else_rtx
;
2600 if (GET_CODE (insn
) != JUMP_INSN
2601 && GET_CODE (SET_SRC (set
)) == IF_THEN_ELSE
)
2603 cond_rtx
= XEXP (SET_SRC (set
), 0);
2604 then_rtx
= XEXP (SET_SRC (set
), 1);
2605 else_rtx
= XEXP (SET_SRC (set
), 2);
2609 cond_rtx
= SET_SRC (set
);
2610 then_rtx
= const_true_rtx
;
2611 else_rtx
= const0_rtx
;
2614 switch (GET_CODE (cond_rtx
))
2628 if (XEXP (cond_rtx
, 0) != cc0_rtx
)
2630 result
= alter_cond (cond_rtx
);
2632 validate_change (insn
, &SET_SRC (set
), then_rtx
, 0);
2633 else if (result
== -1)
2634 validate_change (insn
, &SET_SRC (set
), else_rtx
, 0);
2635 else if (result
== 2)
2636 INSN_CODE (insn
) = -1;
2637 if (SET_DEST (set
) == SET_SRC (set
))
2649 #ifdef HAVE_peephole
2650 /* Do machine-specific peephole optimizations if desired. */
2652 if (optimize
&& !flag_no_peephole
&& !nopeepholes
)
2654 rtx next
= peephole (insn
);
2655 /* When peepholing, if there were notes within the peephole,
2656 emit them before the peephole. */
2657 if (next
!= 0 && next
!= NEXT_INSN (insn
))
2659 rtx prev
= PREV_INSN (insn
);
2661 for (note
= NEXT_INSN (insn
); note
!= next
;
2662 note
= NEXT_INSN (note
))
2663 final_scan_insn (note
, file
, optimize
, prescan
, nopeepholes
);
2665 /* In case this is prescan, put the notes
2666 in proper position for later rescan. */
2667 note
= NEXT_INSN (insn
);
2668 PREV_INSN (note
) = prev
;
2669 NEXT_INSN (prev
) = note
;
2670 NEXT_INSN (PREV_INSN (next
)) = insn
;
2671 PREV_INSN (insn
) = PREV_INSN (next
);
2672 NEXT_INSN (insn
) = next
;
2673 PREV_INSN (next
) = insn
;
2676 /* PEEPHOLE might have changed this. */
2677 body
= PATTERN (insn
);
2681 /* Try to recognize the instruction.
2682 If successful, verify that the operands satisfy the
2683 constraints for the instruction. Crash if they don't,
2684 since `reload' should have changed them so that they do. */
2686 insn_code_number
= recog_memoized (insn
);
2687 cleanup_subreg_operands (insn
);
2689 /* Dump the insn in the assembly for debugging. */
2690 if (flag_dump_rtl_in_asm
)
2692 print_rtx_head
= ASM_COMMENT_START
;
2693 print_rtl_single (asm_out_file
, insn
);
2694 print_rtx_head
= "";
2697 if (! constrain_operands_cached (1))
2698 fatal_insn_not_found (insn
);
2700 /* Some target machines need to prescan each insn before
2703 #ifdef FINAL_PRESCAN_INSN
2704 FINAL_PRESCAN_INSN (insn
, recog_data
.operand
, recog_data
.n_operands
);
2707 #ifdef HAVE_conditional_execution
2708 if (GET_CODE (PATTERN (insn
)) == COND_EXEC
)
2709 current_insn_predicate
= COND_EXEC_TEST (PATTERN (insn
));
2711 current_insn_predicate
= NULL_RTX
;
2715 cc_prev_status
= cc_status
;
2717 /* Update `cc_status' for this instruction.
2718 The instruction's output routine may change it further.
2719 If the output routine for a jump insn needs to depend
2720 on the cc status, it should look at cc_prev_status. */
2722 NOTICE_UPDATE_CC (body
, insn
);
2725 current_output_insn
= debug_insn
= insn
;
2727 #if defined (DWARF2_UNWIND_INFO)
2728 if (GET_CODE (insn
) == CALL_INSN
&& dwarf2out_do_frame ())
2729 dwarf2out_frame_debug (insn
);
2732 /* Find the proper template for this insn. */
2733 template = get_insn_template (insn_code_number
, insn
);
2735 /* If the C code returns 0, it means that it is a jump insn
2736 which follows a deleted test insn, and that test insn
2737 needs to be reinserted. */
2742 if (prev_nonnote_insn (insn
) != last_ignored_compare
)
2746 /* We have already processed the notes between the setter and
2747 the user. Make sure we don't process them again, this is
2748 particularly important if one of the notes is a block
2749 scope note or an EH note. */
2751 prev
!= last_ignored_compare
;
2752 prev
= PREV_INSN (prev
))
2754 if (GET_CODE (prev
) == NOTE
)
2755 delete_insn (prev
); /* Use delete_note. */
2761 /* If the template is the string "#", it means that this insn must
2763 if (template[0] == '#' && template[1] == '\0')
2765 rtx
new = try_split (body
, insn
, 0);
2767 /* If we didn't split the insn, go away. */
2768 if (new == insn
&& PATTERN (new) == body
)
2769 fatal_insn ("could not split insn", insn
);
2771 #ifdef HAVE_ATTR_length
2772 /* This instruction should have been split in shorten_branches,
2773 to ensure that we would have valid length info for the
2785 #ifdef IA64_UNWIND_INFO
2786 IA64_UNWIND_EMIT (asm_out_file
, insn
);
2788 /* Output assembler code from the template. */
2790 output_asm_insn (template, recog_data
.operand
);
2792 #if defined (DWARF2_UNWIND_INFO)
2793 #if defined (HAVE_prologue)
2794 if (GET_CODE (insn
) == INSN
&& dwarf2out_do_frame ())
2795 dwarf2out_frame_debug (insn
);
2797 if (!ACCUMULATE_OUTGOING_ARGS
2798 && GET_CODE (insn
) == INSN
2799 && dwarf2out_do_frame ())
2800 dwarf2out_frame_debug (insn
);
2805 /* It's not at all clear why we did this and doing so interferes
2806 with tests we'd like to do to use REG_WAS_0 notes, so let's try
2809 /* Mark this insn as having been output. */
2810 INSN_DELETED_P (insn
) = 1;
2813 /* Emit information for vtable gc. */
2814 note
= find_reg_note (insn
, REG_VTABLE_REF
, NULL_RTX
);
2816 assemble_vtable_entry (XEXP (XEXP (note
, 0), 0),
2817 INTVAL (XEXP (XEXP (note
, 0), 1)));
2819 current_output_insn
= debug_insn
= 0;
2822 return NEXT_INSN (insn
);
2825 /* Output debugging info to the assembler file FILE
2826 based on the NOTE-insn INSN, assumed to be a line number. */
2829 notice_source_line (insn
)
2832 const char *filename
= NOTE_SOURCE_FILE (insn
);
2834 last_filename
= filename
;
2835 last_linenum
= NOTE_LINE_NUMBER (insn
);
2836 high_block_linenum
= MAX (last_linenum
, high_block_linenum
);
2837 high_function_linenum
= MAX (last_linenum
, high_function_linenum
);
2840 /* For each operand in INSN, simplify (subreg (reg)) so that it refers
2841 directly to the desired hard register. */
2844 cleanup_subreg_operands (insn
)
2848 extract_insn_cached (insn
);
2849 for (i
= 0; i
< recog_data
.n_operands
; i
++)
2851 /* The following test cannot use recog_data.operand when tesing
2852 for a SUBREG: the underlying object might have been changed
2853 already if we are inside a match_operator expression that
2854 matches the else clause. Instead we test the underlying
2855 expression directly. */
2856 if (GET_CODE (*recog_data
.operand_loc
[i
]) == SUBREG
)
2857 recog_data
.operand
[i
] = alter_subreg (recog_data
.operand_loc
[i
]);
2858 else if (GET_CODE (recog_data
.operand
[i
]) == PLUS
2859 || GET_CODE (recog_data
.operand
[i
]) == MULT
2860 || GET_CODE (recog_data
.operand
[i
]) == MEM
)
2861 recog_data
.operand
[i
] = walk_alter_subreg (recog_data
.operand_loc
[i
]);
2864 for (i
= 0; i
< recog_data
.n_dups
; i
++)
2866 if (GET_CODE (*recog_data
.dup_loc
[i
]) == SUBREG
)
2867 *recog_data
.dup_loc
[i
] = alter_subreg (recog_data
.dup_loc
[i
]);
2868 else if (GET_CODE (*recog_data
.dup_loc
[i
]) == PLUS
2869 || GET_CODE (*recog_data
.dup_loc
[i
]) == MULT
2870 || GET_CODE (*recog_data
.dup_loc
[i
]) == MEM
)
2871 *recog_data
.dup_loc
[i
] = walk_alter_subreg (recog_data
.dup_loc
[i
]);
2875 /* If X is a SUBREG, replace it with a REG or a MEM,
2876 based on the thing it is a subreg of. */
2883 rtx y
= SUBREG_REG (x
);
2885 /* simplify_subreg does not remove subreg from volatile references.
2886 We are required to. */
2887 if (GET_CODE (y
) == MEM
)
2888 *xp
= adjust_address (y
, GET_MODE (x
), SUBREG_BYTE (x
));
2891 rtx
new = simplify_subreg (GET_MODE (x
), y
, GET_MODE (y
),
2896 /* Simplify_subreg can't handle some REG cases, but we have to. */
2897 else if (GET_CODE (y
) == REG
)
2899 unsigned int regno
= subreg_hard_regno (x
, 1);
2902 ORIGINAL_REGNO (x
) = ORIGINAL_REGNO (y
);
2903 /* This field has a different meaning for REGs and SUBREGs. Make
2904 sure to clear it! */
2905 RTX_FLAG (x
, used
) = 0;
2914 /* Do alter_subreg on all the SUBREGs contained in X. */
2917 walk_alter_subreg (xp
)
2921 switch (GET_CODE (x
))
2925 XEXP (x
, 0) = walk_alter_subreg (&XEXP (x
, 0));
2926 XEXP (x
, 1) = walk_alter_subreg (&XEXP (x
, 1));
2930 XEXP (x
, 0) = walk_alter_subreg (&XEXP (x
, 0));
2934 return alter_subreg (xp
);
2945 /* Given BODY, the body of a jump instruction, alter the jump condition
2946 as required by the bits that are set in cc_status.flags.
2947 Not all of the bits there can be handled at this level in all cases.
2949 The value is normally 0.
2950 1 means that the condition has become always true.
2951 -1 means that the condition has become always false.
2952 2 means that COND has been altered. */
2960 if (cc_status
.flags
& CC_REVERSED
)
2963 PUT_CODE (cond
, swap_condition (GET_CODE (cond
)));
2966 if (cc_status
.flags
& CC_INVERTED
)
2969 PUT_CODE (cond
, reverse_condition (GET_CODE (cond
)));
2972 if (cc_status
.flags
& CC_NOT_POSITIVE
)
2973 switch (GET_CODE (cond
))
2978 /* Jump becomes unconditional. */
2984 /* Jump becomes no-op. */
2988 PUT_CODE (cond
, EQ
);
2993 PUT_CODE (cond
, NE
);
3001 if (cc_status
.flags
& CC_NOT_NEGATIVE
)
3002 switch (GET_CODE (cond
))
3006 /* Jump becomes unconditional. */
3011 /* Jump becomes no-op. */
3016 PUT_CODE (cond
, EQ
);
3022 PUT_CODE (cond
, NE
);
3030 if (cc_status
.flags
& CC_NO_OVERFLOW
)
3031 switch (GET_CODE (cond
))
3034 /* Jump becomes unconditional. */
3038 PUT_CODE (cond
, EQ
);
3043 PUT_CODE (cond
, NE
);
3048 /* Jump becomes no-op. */
3055 if (cc_status
.flags
& (CC_Z_IN_NOT_N
| CC_Z_IN_N
))
3056 switch (GET_CODE (cond
))
3062 PUT_CODE (cond
, cc_status
.flags
& CC_Z_IN_N
? GE
: LT
);
3067 PUT_CODE (cond
, cc_status
.flags
& CC_Z_IN_N
? LT
: GE
);
3072 if (cc_status
.flags
& CC_NOT_SIGNED
)
3073 /* The flags are valid if signed condition operators are converted
3075 switch (GET_CODE (cond
))
3078 PUT_CODE (cond
, LEU
);
3083 PUT_CODE (cond
, LTU
);
3088 PUT_CODE (cond
, GTU
);
3093 PUT_CODE (cond
, GEU
);
3105 /* Report inconsistency between the assembler template and the operands.
3106 In an `asm', it's the user's fault; otherwise, the compiler's fault. */
3109 output_operand_lossage
VPARAMS ((const char *msgid
, ...))
3113 const char *pfx_str
;
3114 VA_OPEN (ap
, msgid
);
3115 VA_FIXEDARG (ap
, const char *, msgid
);
3117 pfx_str
= this_is_asm_operands
? _("invalid `asm': ") : "output_operand: ";
3118 asprintf (&fmt_string
, "%s%s", pfx_str
, _(msgid
));
3119 vasprintf (&new_message
, fmt_string
, ap
);
3121 if (this_is_asm_operands
)
3122 error_for_asm (this_is_asm_operands
, "%s", new_message
);
3124 internal_error ("%s", new_message
);
3131 /* Output of assembler code from a template, and its subroutines. */
3133 /* Annotate the assembly with a comment describing the pattern and
3134 alternative used. */
3141 int num
= INSN_CODE (debug_insn
);
3142 fprintf (asm_out_file
, "\t%s %d\t%s",
3143 ASM_COMMENT_START
, INSN_UID (debug_insn
),
3144 insn_data
[num
].name
);
3145 if (insn_data
[num
].n_alternatives
> 1)
3146 fprintf (asm_out_file
, "/%d", which_alternative
+ 1);
3147 #ifdef HAVE_ATTR_length
3148 fprintf (asm_out_file
, "\t[length = %d]",
3149 get_attr_length (debug_insn
));
3151 /* Clear this so only the first assembler insn
3152 of any rtl insn will get the special comment for -dp. */
3157 /* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it
3158 or its address, return that expr . Set *PADDRESSP to 1 if the expr
3159 corresponds to the address of the object and 0 if to the object. */
3162 get_mem_expr_from_op (op
, paddressp
)
3174 if (GET_CODE (op
) == REG
&& ORIGINAL_REGNO (op
) >= FIRST_PSEUDO_REGISTER
)
3175 return REGNO_DECL (ORIGINAL_REGNO (op
));
3176 else if (GET_CODE (op
) != MEM
)
3179 if (MEM_EXPR (op
) != 0)
3180 return MEM_EXPR (op
);
3182 /* Otherwise we have an address, so indicate it and look at the address. */
3186 /* First check if we have a decl for the address, then look at the right side
3187 if it is a PLUS. Otherwise, strip off arithmetic and keep looking.
3188 But don't allow the address to itself be indirect. */
3189 if ((expr
= get_mem_expr_from_op (op
, &inner_addressp
)) && ! inner_addressp
)
3191 else if (GET_CODE (op
) == PLUS
3192 && (expr
= get_mem_expr_from_op (XEXP (op
, 1), &inner_addressp
)))
3195 while (GET_RTX_CLASS (GET_CODE (op
)) == '1'
3196 || GET_RTX_CLASS (GET_CODE (op
)) == '2')
3199 expr
= get_mem_expr_from_op (op
, &inner_addressp
);
3200 return inner_addressp
? 0 : expr
;
3203 /* Output operand names for assembler instructions. OPERANDS is the
3204 operand vector, OPORDER is the order to write the operands, and NOPS
3205 is the number of operands to write. */
3208 output_asm_operand_names (operands
, oporder
, nops
)
3216 for (i
= 0; i
< nops
; i
++)
3219 tree expr
= get_mem_expr_from_op (operands
[oporder
[i
]], &addressp
);
3223 fprintf (asm_out_file
, "%c%s %s",
3224 wrote
? ',' : '\t', wrote
? "" : ASM_COMMENT_START
,
3225 addressp
? "*" : "");
3226 print_mem_expr (asm_out_file
, expr
);
3232 /* Output text from TEMPLATE to the assembler output file,
3233 obeying %-directions to substitute operands taken from
3234 the vector OPERANDS.
3236 %N (for N a digit) means print operand N in usual manner.
3237 %lN means require operand N to be a CODE_LABEL or LABEL_REF
3238 and print the label name with no punctuation.
3239 %cN means require operand N to be a constant
3240 and print the constant expression with no punctuation.
3241 %aN means expect operand N to be a memory address
3242 (not a memory reference!) and print a reference
3244 %nN means expect operand N to be a constant
3245 and print a constant expression for minus the value
3246 of the operand, with no other punctuation. */
3249 output_asm_insn (template, operands
)
3250 const char *template;
3255 #ifdef ASSEMBLER_DIALECT
3258 int oporder
[MAX_RECOG_OPERANDS
];
3259 char opoutput
[MAX_RECOG_OPERANDS
];
3262 /* An insn may return a null string template
3263 in a case where no assembler code is needed. */
3267 memset (opoutput
, 0, sizeof opoutput
);
3269 putc ('\t', asm_out_file
);
3271 #ifdef ASM_OUTPUT_OPCODE
3272 ASM_OUTPUT_OPCODE (asm_out_file
, p
);
3279 if (flag_verbose_asm
)
3280 output_asm_operand_names (operands
, oporder
, ops
);
3281 if (flag_print_asm_name
)
3285 memset (opoutput
, 0, sizeof opoutput
);
3287 putc (c
, asm_out_file
);
3288 #ifdef ASM_OUTPUT_OPCODE
3289 while ((c
= *p
) == '\t')
3291 putc (c
, asm_out_file
);
3294 ASM_OUTPUT_OPCODE (asm_out_file
, p
);
3298 #ifdef ASSEMBLER_DIALECT
3304 output_operand_lossage ("nested assembly dialect alternatives");
3308 /* If we want the first dialect, do nothing. Otherwise, skip
3309 DIALECT_NUMBER of strings ending with '|'. */
3310 for (i
= 0; i
< dialect_number
; i
++)
3312 while (*p
&& *p
!= '}' && *p
++ != '|')
3321 output_operand_lossage ("unterminated assembly dialect alternative");
3328 /* Skip to close brace. */
3333 output_operand_lossage ("unterminated assembly dialect alternative");
3337 while (*p
++ != '}');
3341 putc (c
, asm_out_file
);
3346 putc (c
, asm_out_file
);
3352 /* %% outputs a single %. */
3356 putc (c
, asm_out_file
);
3358 /* %= outputs a number which is unique to each insn in the entire
3359 compilation. This is useful for making local labels that are
3360 referred to more than once in a given insn. */
3364 fprintf (asm_out_file
, "%d", insn_counter
);
3366 /* % followed by a letter and some digits
3367 outputs an operand in a special way depending on the letter.
3368 Letters `acln' are implemented directly.
3369 Other letters are passed to `output_operand' so that
3370 the PRINT_OPERAND macro can define them. */
3371 else if (ISALPHA (*p
))
3377 output_operand_lossage ("operand number missing after %%-letter");
3378 else if (this_is_asm_operands
3379 && (c
< 0 || (unsigned int) c
>= insn_noperands
))
3380 output_operand_lossage ("operand number out of range");
3381 else if (letter
== 'l')
3382 output_asm_label (operands
[c
]);
3383 else if (letter
== 'a')
3384 output_address (operands
[c
]);
3385 else if (letter
== 'c')
3387 if (CONSTANT_ADDRESS_P (operands
[c
]))
3388 output_addr_const (asm_out_file
, operands
[c
]);
3390 output_operand (operands
[c
], 'c');
3392 else if (letter
== 'n')
3394 if (GET_CODE (operands
[c
]) == CONST_INT
)
3395 fprintf (asm_out_file
, HOST_WIDE_INT_PRINT_DEC
,
3396 - INTVAL (operands
[c
]));
3399 putc ('-', asm_out_file
);
3400 output_addr_const (asm_out_file
, operands
[c
]);
3404 output_operand (operands
[c
], letter
);
3410 while (ISDIGIT (c
= *p
))
3413 /* % followed by a digit outputs an operand the default way. */
3414 else if (ISDIGIT (*p
))
3417 if (this_is_asm_operands
3418 && (c
< 0 || (unsigned int) c
>= insn_noperands
))
3419 output_operand_lossage ("operand number out of range");
3421 output_operand (operands
[c
], 0);
3427 while (ISDIGIT (c
= *p
))
3430 /* % followed by punctuation: output something for that
3431 punctuation character alone, with no operand.
3432 The PRINT_OPERAND macro decides what is actually done. */
3433 #ifdef PRINT_OPERAND_PUNCT_VALID_P
3434 else if (PRINT_OPERAND_PUNCT_VALID_P ((unsigned char) *p
))
3435 output_operand (NULL_RTX
, *p
++);
3438 output_operand_lossage ("invalid %%-code");
3442 putc (c
, asm_out_file
);
3445 /* Write out the variable names for operands, if we know them. */
3446 if (flag_verbose_asm
)
3447 output_asm_operand_names (operands
, oporder
, ops
);
3448 if (flag_print_asm_name
)
3451 putc ('\n', asm_out_file
);
3454 /* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */
3457 output_asm_label (x
)
3462 if (GET_CODE (x
) == LABEL_REF
)
3464 if (GET_CODE (x
) == CODE_LABEL
3465 || (GET_CODE (x
) == NOTE
3466 && NOTE_LINE_NUMBER (x
) == NOTE_INSN_DELETED_LABEL
))
3467 ASM_GENERATE_INTERNAL_LABEL (buf
, "L", CODE_LABEL_NUMBER (x
));
3469 output_operand_lossage ("`%%l' operand isn't a label");
3471 assemble_name (asm_out_file
, buf
);
3474 /* Print operand X using machine-dependent assembler syntax.
3475 The macro PRINT_OPERAND is defined just to control this function.
3476 CODE is a non-digit that preceded the operand-number in the % spec,
3477 such as 'z' if the spec was `%z3'. CODE is 0 if there was no char
3478 between the % and the digits.
3479 When CODE is a non-letter, X is 0.
3481 The meanings of the letters are machine-dependent and controlled
3482 by PRINT_OPERAND. */
3485 output_operand (x
, code
)
3487 int code ATTRIBUTE_UNUSED
;
3489 if (x
&& GET_CODE (x
) == SUBREG
)
3490 x
= alter_subreg (&x
);
3492 /* If X is a pseudo-register, abort now rather than writing trash to the
3495 if (x
&& GET_CODE (x
) == REG
&& REGNO (x
) >= FIRST_PSEUDO_REGISTER
)
3498 PRINT_OPERAND (asm_out_file
, x
, code
);
3501 /* Print a memory reference operand for address X
3502 using machine-dependent assembler syntax.
3503 The macro PRINT_OPERAND_ADDRESS exists just to control this function. */
3509 walk_alter_subreg (&x
);
3510 PRINT_OPERAND_ADDRESS (asm_out_file
, x
);
3513 /* Print an integer constant expression in assembler syntax.
3514 Addition and subtraction are the only arithmetic
3515 that may appear in these expressions. */
3518 output_addr_const (file
, x
)
3525 switch (GET_CODE (x
))
3532 #ifdef ASM_OUTPUT_SYMBOL_REF
3533 ASM_OUTPUT_SYMBOL_REF (file
, x
);
3535 assemble_name (file
, XSTR (x
, 0));
3543 ASM_GENERATE_INTERNAL_LABEL (buf
, "L", CODE_LABEL_NUMBER (x
));
3544 #ifdef ASM_OUTPUT_LABEL_REF
3545 ASM_OUTPUT_LABEL_REF (file
, buf
);
3547 assemble_name (file
, buf
);
3552 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, INTVAL (x
));
3556 /* This used to output parentheses around the expression,
3557 but that does not work on the 386 (either ATT or BSD assembler). */
3558 output_addr_const (file
, XEXP (x
, 0));
3562 if (GET_MODE (x
) == VOIDmode
)
3564 /* We can use %d if the number is one word and positive. */
3565 if (CONST_DOUBLE_HIGH (x
))
3566 fprintf (file
, HOST_WIDE_INT_PRINT_DOUBLE_HEX
,
3567 CONST_DOUBLE_HIGH (x
), CONST_DOUBLE_LOW (x
));
3568 else if (CONST_DOUBLE_LOW (x
) < 0)
3569 fprintf (file
, HOST_WIDE_INT_PRINT_HEX
, CONST_DOUBLE_LOW (x
));
3571 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, CONST_DOUBLE_LOW (x
));
3574 /* We can't handle floating point constants;
3575 PRINT_OPERAND must handle them. */
3576 output_operand_lossage ("floating constant misused");
3580 /* Some assemblers need integer constants to appear last (eg masm). */
3581 if (GET_CODE (XEXP (x
, 0)) == CONST_INT
)
3583 output_addr_const (file
, XEXP (x
, 1));
3584 if (INTVAL (XEXP (x
, 0)) >= 0)
3585 fprintf (file
, "+");
3586 output_addr_const (file
, XEXP (x
, 0));
3590 output_addr_const (file
, XEXP (x
, 0));
3591 if (GET_CODE (XEXP (x
, 1)) != CONST_INT
3592 || INTVAL (XEXP (x
, 1)) >= 0)
3593 fprintf (file
, "+");
3594 output_addr_const (file
, XEXP (x
, 1));
3599 /* Avoid outputting things like x-x or x+5-x,
3600 since some assemblers can't handle that. */
3601 x
= simplify_subtraction (x
);
3602 if (GET_CODE (x
) != MINUS
)
3605 output_addr_const (file
, XEXP (x
, 0));
3606 fprintf (file
, "-");
3607 if ((GET_CODE (XEXP (x
, 1)) == CONST_INT
&& INTVAL (XEXP (x
, 1)) >= 0)
3608 || GET_CODE (XEXP (x
, 1)) == PC
3609 || GET_CODE (XEXP (x
, 1)) == SYMBOL_REF
)
3610 output_addr_const (file
, XEXP (x
, 1));
3613 fputs (targetm
.asm_out
.open_paren
, file
);
3614 output_addr_const (file
, XEXP (x
, 1));
3615 fputs (targetm
.asm_out
.close_paren
, file
);
3622 output_addr_const (file
, XEXP (x
, 0));
3626 #ifdef OUTPUT_ADDR_CONST_EXTRA
3627 OUTPUT_ADDR_CONST_EXTRA (file
, x
, fail
);
3632 output_operand_lossage ("invalid expression as operand");
3636 /* A poor man's fprintf, with the added features of %I, %R, %L, and %U.
3637 %R prints the value of REGISTER_PREFIX.
3638 %L prints the value of LOCAL_LABEL_PREFIX.
3639 %U prints the value of USER_LABEL_PREFIX.
3640 %I prints the value of IMMEDIATE_PREFIX.
3641 %O runs ASM_OUTPUT_OPCODE to transform what follows in the string.
3642 Also supported are %d, %x, %s, %e, %f, %g and %%.
3644 We handle alternate assembler dialects here, just like output_asm_insn. */
3647 asm_fprintf
VPARAMS ((FILE *file
, const char *p
, ...))
3652 VA_OPEN (argptr
, p
);
3653 VA_FIXEDARG (argptr
, FILE *, file
);
3654 VA_FIXEDARG (argptr
, const char *, p
);
3661 #ifdef ASSEMBLER_DIALECT
3666 /* If we want the first dialect, do nothing. Otherwise, skip
3667 DIALECT_NUMBER of strings ending with '|'. */
3668 for (i
= 0; i
< dialect_number
; i
++)
3670 while (*p
&& *p
++ != '|')
3680 /* Skip to close brace. */
3681 while (*p
&& *p
++ != '}')
3692 while (ISDIGIT (c
) || c
== '.')
3700 fprintf (file
, "%%");
3703 case 'd': case 'i': case 'u':
3704 case 'x': case 'p': case 'X':
3708 fprintf (file
, buf
, va_arg (argptr
, int));
3712 /* This is a prefix to the 'd', 'i', 'u', 'x', 'p', and 'X' cases,
3713 but we do not check for those cases. It means that the value
3714 is a HOST_WIDE_INT, which may be either `int' or `long'. */
3716 #if HOST_BITS_PER_WIDE_INT == HOST_BITS_PER_INT
3718 #if HOST_BITS_PER_WIDE_INT == HOST_BITS_PER_LONG
3728 fprintf (file
, buf
, va_arg (argptr
, HOST_WIDE_INT
));
3735 fprintf (file
, buf
, va_arg (argptr
, long));
3743 fprintf (file
, buf
, va_arg (argptr
, double));
3749 fprintf (file
, buf
, va_arg (argptr
, char *));
3753 #ifdef ASM_OUTPUT_OPCODE
3754 ASM_OUTPUT_OPCODE (asm_out_file
, p
);
3759 #ifdef REGISTER_PREFIX
3760 fprintf (file
, "%s", REGISTER_PREFIX
);
3765 #ifdef IMMEDIATE_PREFIX
3766 fprintf (file
, "%s", IMMEDIATE_PREFIX
);
3771 #ifdef LOCAL_LABEL_PREFIX
3772 fprintf (file
, "%s", LOCAL_LABEL_PREFIX
);
3777 fputs (user_label_prefix
, file
);
3780 #ifdef ASM_FPRINTF_EXTENSIONS
3781 /* Upper case letters are reserved for general use by asm_fprintf
3782 and so are not available to target specific code. In order to
3783 prevent the ASM_FPRINTF_EXTENSIONS macro from using them then,
3784 they are defined here. As they get turned into real extensions
3785 to asm_fprintf they should be removed from this list. */
3786 case 'A': case 'B': case 'C': case 'D': case 'E':
3787 case 'F': case 'G': case 'H': case 'J': case 'K':
3788 case 'M': case 'N': case 'P': case 'Q': case 'S':
3789 case 'T': case 'V': case 'W': case 'Y': case 'Z':
3792 ASM_FPRINTF_EXTENSIONS (file
, argptr
, p
)
3805 /* Split up a CONST_DOUBLE or integer constant rtx
3806 into two rtx's for single words,
3807 storing in *FIRST the word that comes first in memory in the target
3808 and in *SECOND the other. */
3811 split_double (value
, first
, second
)
3813 rtx
*first
, *second
;
3815 if (GET_CODE (value
) == CONST_INT
)
3817 if (HOST_BITS_PER_WIDE_INT
>= (2 * BITS_PER_WORD
))
3819 /* In this case the CONST_INT holds both target words.
3820 Extract the bits from it into two word-sized pieces.
3821 Sign extend each half to HOST_WIDE_INT. */
3822 unsigned HOST_WIDE_INT low
, high
;
3823 unsigned HOST_WIDE_INT mask
, sign_bit
, sign_extend
;
3825 /* Set sign_bit to the most significant bit of a word. */
3827 sign_bit
<<= BITS_PER_WORD
- 1;
3829 /* Set mask so that all bits of the word are set. We could
3830 have used 1 << BITS_PER_WORD instead of basing the
3831 calculation on sign_bit. However, on machines where
3832 HOST_BITS_PER_WIDE_INT == BITS_PER_WORD, it could cause a
3833 compiler warning, even though the code would never be
3835 mask
= sign_bit
<< 1;
3838 /* Set sign_extend as any remaining bits. */
3839 sign_extend
= ~mask
;
3841 /* Pick the lower word and sign-extend it. */
3842 low
= INTVAL (value
);
3847 /* Pick the higher word, shifted to the least significant
3848 bits, and sign-extend it. */
3849 high
= INTVAL (value
);
3850 high
>>= BITS_PER_WORD
- 1;
3853 if (high
& sign_bit
)
3854 high
|= sign_extend
;
3856 /* Store the words in the target machine order. */
3857 if (WORDS_BIG_ENDIAN
)
3859 *first
= GEN_INT (high
);
3860 *second
= GEN_INT (low
);
3864 *first
= GEN_INT (low
);
3865 *second
= GEN_INT (high
);
3870 /* The rule for using CONST_INT for a wider mode
3871 is that we regard the value as signed.
3872 So sign-extend it. */
3873 rtx high
= (INTVAL (value
) < 0 ? constm1_rtx
: const0_rtx
);
3874 if (WORDS_BIG_ENDIAN
)
3886 else if (GET_CODE (value
) != CONST_DOUBLE
)
3888 if (WORDS_BIG_ENDIAN
)
3890 *first
= const0_rtx
;
3896 *second
= const0_rtx
;
3899 else if (GET_MODE (value
) == VOIDmode
3900 /* This is the old way we did CONST_DOUBLE integers. */
3901 || GET_MODE_CLASS (GET_MODE (value
)) == MODE_INT
)
3903 /* In an integer, the words are defined as most and least significant.
3904 So order them by the target's convention. */
3905 if (WORDS_BIG_ENDIAN
)
3907 *first
= GEN_INT (CONST_DOUBLE_HIGH (value
));
3908 *second
= GEN_INT (CONST_DOUBLE_LOW (value
));
3912 *first
= GEN_INT (CONST_DOUBLE_LOW (value
));
3913 *second
= GEN_INT (CONST_DOUBLE_HIGH (value
));
3920 REAL_VALUE_FROM_CONST_DOUBLE (r
, value
);
3922 /* Note, this converts the REAL_VALUE_TYPE to the target's
3923 format, splits up the floating point double and outputs
3924 exactly 32 bits of it into each of l[0] and l[1] --
3925 not necessarily BITS_PER_WORD bits. */
3926 REAL_VALUE_TO_TARGET_DOUBLE (r
, l
);
3928 /* If 32 bits is an entire word for the target, but not for the host,
3929 then sign-extend on the host so that the number will look the same
3930 way on the host that it would on the target. See for instance
3931 simplify_unary_operation. The #if is needed to avoid compiler
3934 #if HOST_BITS_PER_LONG > 32
3935 if (BITS_PER_WORD
< HOST_BITS_PER_LONG
&& BITS_PER_WORD
== 32)
3937 if (l
[0] & ((long) 1 << 31))
3938 l
[0] |= ((long) (-1) << 32);
3939 if (l
[1] & ((long) 1 << 31))
3940 l
[1] |= ((long) (-1) << 32);
3944 *first
= GEN_INT ((HOST_WIDE_INT
) l
[0]);
3945 *second
= GEN_INT ((HOST_WIDE_INT
) l
[1]);
3949 /* Return nonzero if this function has no function calls. */
3957 if (current_function_profile
|| profile_arc_flag
)
3960 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
3962 if (GET_CODE (insn
) == CALL_INSN
3963 && ! SIBLING_CALL_P (insn
))
3965 if (GET_CODE (insn
) == INSN
3966 && GET_CODE (PATTERN (insn
)) == SEQUENCE
3967 && GET_CODE (XVECEXP (PATTERN (insn
), 0, 0)) == CALL_INSN
3968 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn
), 0, 0)))
3971 for (link
= current_function_epilogue_delay_list
;
3973 link
= XEXP (link
, 1))
3975 insn
= XEXP (link
, 0);
3977 if (GET_CODE (insn
) == CALL_INSN
3978 && ! SIBLING_CALL_P (insn
))
3980 if (GET_CODE (insn
) == INSN
3981 && GET_CODE (PATTERN (insn
)) == SEQUENCE
3982 && GET_CODE (XVECEXP (PATTERN (insn
), 0, 0)) == CALL_INSN
3983 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn
), 0, 0)))
3990 /* Return 1 if branch is an forward branch.
3991 Uses insn_shuid array, so it works only in the final pass. May be used by
3992 output templates to customary add branch prediction hints.
3995 final_forward_branch_p (insn
)
3998 int insn_id
, label_id
;
4001 insn_id
= INSN_SHUID (insn
);
4002 label_id
= INSN_SHUID (JUMP_LABEL (insn
));
4003 /* We've hit some insns that does not have id information available. */
4004 if (!insn_id
|| !label_id
)
4006 return insn_id
< label_id
;
4009 /* On some machines, a function with no call insns
4010 can run faster if it doesn't create its own register window.
4011 When output, the leaf function should use only the "output"
4012 registers. Ordinarily, the function would be compiled to use
4013 the "input" registers to find its arguments; it is a candidate
4014 for leaf treatment if it uses only the "input" registers.
4015 Leaf function treatment means renumbering so the function
4016 uses the "output" registers instead. */
4018 #ifdef LEAF_REGISTERS
4020 /* Return 1 if this function uses only the registers that can be
4021 safely renumbered. */
4024 only_leaf_regs_used ()
4027 char *permitted_reg_in_leaf_functions
= LEAF_REGISTERS
;
4029 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
4030 if ((regs_ever_live
[i
] || global_regs
[i
])
4031 && ! permitted_reg_in_leaf_functions
[i
])
4034 if (current_function_uses_pic_offset_table
4035 && pic_offset_table_rtx
!= 0
4036 && GET_CODE (pic_offset_table_rtx
) == REG
4037 && ! permitted_reg_in_leaf_functions
[REGNO (pic_offset_table_rtx
)])
4043 /* Scan all instructions and renumber all registers into those
4044 available in leaf functions. */
4047 leaf_renumber_regs (first
)
4052 /* Renumber only the actual patterns.
4053 The reg-notes can contain frame pointer refs,
4054 and renumbering them could crash, and should not be needed. */
4055 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
4057 leaf_renumber_regs_insn (PATTERN (insn
));
4058 for (insn
= current_function_epilogue_delay_list
;
4060 insn
= XEXP (insn
, 1))
4061 if (INSN_P (XEXP (insn
, 0)))
4062 leaf_renumber_regs_insn (PATTERN (XEXP (insn
, 0)));
4065 /* Scan IN_RTX and its subexpressions, and renumber all regs into those
4066 available in leaf functions. */
4069 leaf_renumber_regs_insn (in_rtx
)
4073 const char *format_ptr
;
4078 /* Renumber all input-registers into output-registers.
4079 renumbered_regs would be 1 for an output-register;
4082 if (GET_CODE (in_rtx
) == REG
)
4086 /* Don't renumber the same reg twice. */
4090 newreg
= REGNO (in_rtx
);
4091 /* Don't try to renumber pseudo regs. It is possible for a pseudo reg
4092 to reach here as part of a REG_NOTE. */
4093 if (newreg
>= FIRST_PSEUDO_REGISTER
)
4098 newreg
= LEAF_REG_REMAP (newreg
);
4101 regs_ever_live
[REGNO (in_rtx
)] = 0;
4102 regs_ever_live
[newreg
] = 1;
4103 REGNO (in_rtx
) = newreg
;
4107 if (INSN_P (in_rtx
))
4109 /* Inside a SEQUENCE, we find insns.
4110 Renumber just the patterns of these insns,
4111 just as we do for the top-level insns. */
4112 leaf_renumber_regs_insn (PATTERN (in_rtx
));
4116 format_ptr
= GET_RTX_FORMAT (GET_CODE (in_rtx
));
4118 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (in_rtx
)); i
++)
4119 switch (*format_ptr
++)
4122 leaf_renumber_regs_insn (XEXP (in_rtx
, i
));
4126 if (NULL
!= XVEC (in_rtx
, i
))
4128 for (j
= 0; j
< XVECLEN (in_rtx
, i
); j
++)
4129 leaf_renumber_regs_insn (XVECEXP (in_rtx
, i
, j
));