1 /* Convert RTL to assembler code and output it, for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
22 /* This is the final pass of the compiler.
23 It looks at the rtl code for a function and outputs assembler code.
25 Call `final_start_function' to output the assembler code for function entry,
26 `final' to output assembler code for some RTL code,
27 `final_end_function' to output assembler code for function exit.
28 If a function is compiled in several pieces, each piece is
29 output separately with `final'.
31 Some optimizations are also done at this level.
32 Move instructions that were made unnecessary by good register allocation
33 are detected and omitted from the output. (Though most of these
34 are removed by the last jump pass.)
36 Instructions to set the condition codes are omitted when it can be
37 seen that the condition codes already had the desired values.
39 In some cases it is sufficient if the inherited condition codes
40 have related values, but this may require the following insn
41 (the one that tests the condition codes) to be modified.
43 The code for the function prologue and epilogue are generated
44 directly in assembler by the target functions function_prologue and
45 function_epilogue. Those instructions never exist as rtl. */
54 #include "insn-config.h"
55 #include "insn-attr.h"
57 #include "conditions.h"
60 #include "hard-reg-set.h"
67 #include "basic-block.h"
73 #ifdef XCOFF_DEBUGGING_INFO
74 #include "xcoffout.h" /* Needed for external data
75 declarations for e.g. AIX 4.x. */
78 #if defined (DWARF2_UNWIND_INFO) || defined (DWARF2_DEBUGGING_INFO)
79 #include "dwarf2out.h"
82 /* If we aren't using cc0, CC_STATUS_INIT shouldn't exist. So define a
83 null default for it to save conditionalization later. */
84 #ifndef CC_STATUS_INIT
85 #define CC_STATUS_INIT
88 /* How to start an assembler comment. */
89 #ifndef ASM_COMMENT_START
90 #define ASM_COMMENT_START ";#"
93 /* Is the given character a logical line separator for the assembler? */
94 #ifndef IS_ASM_LOGICAL_LINE_SEPARATOR
95 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C) ((C) == ';')
98 #ifndef JUMP_TABLES_IN_TEXT_SECTION
99 #define JUMP_TABLES_IN_TEXT_SECTION 0
102 /* Last insn processed by final_scan_insn. */
103 static rtx debug_insn
;
104 rtx current_output_insn
;
106 /* Line number of last NOTE. */
107 static int last_linenum
;
109 /* Highest line number in current block. */
110 static int high_block_linenum
;
112 /* Likewise for function. */
113 static int high_function_linenum
;
115 /* Filename of last NOTE. */
116 static const char *last_filename
;
118 extern int length_unit_log
; /* This is defined in insn-attrtab.c. */
120 /* Nonzero while outputting an `asm' with operands.
121 This means that inconsistencies are the user's fault, so don't abort.
122 The precise value is the insn being output, to pass to error_for_asm. */
123 rtx this_is_asm_operands
;
125 /* Number of operands of this insn, for an `asm' with operands. */
126 static unsigned int insn_noperands
;
128 /* Compare optimization flag. */
130 static rtx last_ignored_compare
= 0;
132 /* Flag indicating this insn is the start of a new basic block. */
134 static int new_block
= 1;
136 /* Assign a unique number to each insn that is output.
137 This can be used to generate unique local labels. */
139 static int insn_counter
= 0;
142 /* This variable contains machine-dependent flags (defined in tm.h)
143 set and examined by output routines
144 that describe how to interpret the condition codes properly. */
148 /* During output of an insn, this contains a copy of cc_status
149 from before the insn. */
151 CC_STATUS cc_prev_status
;
154 /* Indexed by hardware reg number, is 1 if that register is ever
155 used in the current function.
157 In life_analysis, or in stupid_life_analysis, this is set
158 up to record the hard regs used explicitly. Reload adds
159 in the hard regs used for holding pseudo regs. Final uses
160 it to generate the code in the function prologue and epilogue
161 to save and restore registers as needed. */
163 char regs_ever_live
[FIRST_PSEUDO_REGISTER
];
165 /* Nonzero means current function must be given a frame pointer.
166 Set in stmt.c if anything is allocated on the stack there.
167 Set in reload1.c if anything is allocated on the stack there. */
169 int frame_pointer_needed
;
171 /* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */
173 static int block_depth
;
175 /* Nonzero if have enabled APP processing of our assembler output. */
179 /* If we are outputting an insn sequence, this contains the sequence rtx.
184 #ifdef ASSEMBLER_DIALECT
186 /* Number of the assembler dialect to use, starting at 0. */
187 static int dialect_number
;
190 /* Indexed by line number, nonzero if there is a note for that line. */
192 static char *line_note_exists
;
194 #ifdef HAVE_conditional_execution
195 /* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */
196 rtx current_insn_predicate
;
201 struct function_list
*next
; /* next function */
202 const char *name
; /* function name */
203 long cfg_checksum
; /* function checksum */
204 long count_edges
; /* number of intrumented edges in this function */
207 static struct function_list
*functions_head
= 0;
208 static struct function_list
**functions_tail
= &functions_head
;
210 #ifdef HAVE_ATTR_length
211 static int asm_insn_count
PARAMS ((rtx
));
213 static void profile_function
PARAMS ((FILE *));
214 static void profile_after_prologue
PARAMS ((FILE *));
215 static void notice_source_line
PARAMS ((rtx
));
216 static rtx walk_alter_subreg
PARAMS ((rtx
*));
217 static void output_asm_name
PARAMS ((void));
218 static tree get_mem_expr_from_op
PARAMS ((rtx
, int *));
219 static void output_asm_operand_names
PARAMS ((rtx
*, int *, int));
220 static void output_operand
PARAMS ((rtx
, int));
221 #ifdef LEAF_REGISTERS
222 static void leaf_renumber_regs
PARAMS ((rtx
));
225 static int alter_cond
PARAMS ((rtx
));
227 #ifndef ADDR_VEC_ALIGN
228 static int final_addr_vec_align
PARAMS ((rtx
));
230 #ifdef HAVE_ATTR_length
231 static int align_fuzz
PARAMS ((rtx
, rtx
, int, unsigned));
234 /* Initialize data in final at the beginning of a compilation. */
237 init_final (filename
)
238 const char *filename ATTRIBUTE_UNUSED
;
243 #ifdef ASSEMBLER_DIALECT
244 dialect_number
= ASSEMBLER_DIALECT
;
248 /* Called at end of source file,
249 to output the arc-profiling table for this entire compilation. */
253 const char *filename
;
255 if (profile_arc_flag
)
258 tree string_type
, string_cst
;
259 tree structure_decl
, structure_value
, structure_pointer_type
;
260 tree field_decl
, decl_chain
, value_chain
;
261 tree sizeof_field_value
, domain_type
;
264 string_type
= build_pointer_type (char_type_node
);
266 /* Libgcc2 bb structure. */
267 structure_decl
= make_node (RECORD_TYPE
);
268 structure_pointer_type
= build_pointer_type (structure_decl
);
270 /* Output the main header, of 7 words:
271 0: 1 if this file is initialized, else 0.
272 1: address of file name (LPBX1).
273 2: address of table of counts (LPBX2).
274 3: number of counts in the table.
275 4: always 0, libgcc2 uses this as a pointer to next ``struct bb''
277 The following are GNU extensions:
279 5: Number of bytes in this header.
280 6: address of table of function checksums (LPBX7). */
284 build_decl (FIELD_DECL
, get_identifier ("zero_word"),
285 long_integer_type_node
);
286 value_chain
= build_tree_list (decl_chain
,
287 convert (long_integer_type_node
,
290 /* Address of filename. */
292 char *cwd
, *da_filename
;
296 build_decl (FIELD_DECL
, get_identifier ("filename"), string_type
);
297 TREE_CHAIN (field_decl
) = decl_chain
;
298 decl_chain
= field_decl
;
301 da_filename_len
= strlen (filename
) + strlen (cwd
) + 4 + 1;
302 da_filename
= (char *) alloca (da_filename_len
);
303 strcpy (da_filename
, cwd
);
304 strcat (da_filename
, "/");
305 strcat (da_filename
, filename
);
306 strip_off_ending (da_filename
, da_filename_len
- 3);
307 strcat (da_filename
, ".da");
308 da_filename_len
= strlen (da_filename
);
309 string_cst
= build_string (da_filename_len
+ 1, da_filename
);
310 domain_type
= build_index_type (build_int_2 (da_filename_len
, 0));
311 TREE_TYPE (string_cst
)
312 = build_array_type (char_type_node
, domain_type
);
313 value_chain
= tree_cons (field_decl
,
314 build1 (ADDR_EXPR
, string_type
, string_cst
),
318 /* Table of counts. */
320 tree gcov_type_type
= make_unsigned_type (GCOV_TYPE_SIZE
);
321 tree gcov_type_pointer_type
= build_pointer_type (gcov_type_type
);
323 = build_index_type (build_int_2 (profile_info
.
324 count_instrumented_edges
- 1, 0));
325 tree gcov_type_array_type
326 = build_array_type (gcov_type_type
, domain_tree
);
327 tree gcov_type_array_pointer_type
328 = build_pointer_type (gcov_type_array_type
);
332 build_decl (FIELD_DECL
, get_identifier ("counts"),
333 gcov_type_pointer_type
);
334 TREE_CHAIN (field_decl
) = decl_chain
;
335 decl_chain
= field_decl
;
339 = build (VAR_DECL
, gcov_type_array_type
, NULL_TREE
, NULL_TREE
);
340 TREE_STATIC (counts_table
) = 1;
341 ASM_GENERATE_INTERNAL_LABEL (name
, "LPBX", 2);
342 DECL_NAME (counts_table
) = get_identifier (name
);
343 assemble_variable (counts_table
, 0, 0, 0);
345 value_chain
= tree_cons (field_decl
,
347 gcov_type_array_pointer_type
,
348 counts_table
), value_chain
);
351 /* Count of the # of instrumented arcs. */
353 = build_decl (FIELD_DECL
, get_identifier ("ncounts"),
354 long_integer_type_node
);
355 TREE_CHAIN (field_decl
) = decl_chain
;
356 decl_chain
= field_decl
;
358 value_chain
= tree_cons (field_decl
,
359 convert (long_integer_type_node
,
360 build_int_2 (profile_info
.
361 count_instrumented_edges
,
363 /* Pointer to the next bb. */
365 = build_decl (FIELD_DECL
, get_identifier ("next"),
366 structure_pointer_type
);
367 TREE_CHAIN (field_decl
) = decl_chain
;
368 decl_chain
= field_decl
;
370 value_chain
= tree_cons (field_decl
, null_pointer_node
, value_chain
);
372 /* sizeof(struct bb). We'll set this after entire structure
375 = build_decl (FIELD_DECL
, get_identifier ("sizeof_bb"),
376 long_integer_type_node
);
377 TREE_CHAIN (field_decl
) = decl_chain
;
378 decl_chain
= field_decl
;
380 sizeof_field_value
= tree_cons (field_decl
, NULL
, value_chain
);
381 value_chain
= sizeof_field_value
;
383 /* struct bb_function []. */
385 struct function_list
*item
;
387 tree checksum_field
, arc_count_field
, name_field
;
389 tree array_value_chain
= NULL_TREE
;
390 tree bb_fn_struct_type
;
391 tree bb_fn_struct_array_type
;
392 tree bb_fn_struct_array_pointer_type
;
393 tree bb_fn_struct_pointer_type
;
394 tree field_value
, field_value_chain
;
396 bb_fn_struct_type
= make_node (RECORD_TYPE
);
398 checksum_field
= build_decl (FIELD_DECL
, get_identifier ("checksum"),
399 long_integer_type_node
);
402 = build_decl (FIELD_DECL
, get_identifier ("arc_count"),
404 TREE_CHAIN (checksum_field
) = arc_count_field
;
407 = build_decl (FIELD_DECL
, get_identifier ("name"), string_type
);
408 TREE_CHAIN (arc_count_field
) = name_field
;
410 TYPE_FIELDS (bb_fn_struct_type
) = checksum_field
;
414 for (item
= functions_head
; item
!= 0; item
= item
->next
)
417 /* Note that the array contains a terminator, hence no - 1. */
418 domain
= build_index_type (build_int_2 (num_nodes
, 0));
420 bb_fn_struct_pointer_type
= build_pointer_type (bb_fn_struct_type
);
421 bb_fn_struct_array_type
422 = build_array_type (bb_fn_struct_type
, domain
);
423 bb_fn_struct_array_pointer_type
424 = build_pointer_type (bb_fn_struct_array_type
);
426 layout_type (bb_fn_struct_type
);
427 layout_type (bb_fn_struct_pointer_type
);
428 layout_type (bb_fn_struct_array_type
);
429 layout_type (bb_fn_struct_array_pointer_type
);
431 for (item
= functions_head
; item
!= 0; item
= item
->next
)
435 /* create constructor for structure. */
437 = build_tree_list (checksum_field
,
438 convert (long_integer_type_node
,
439 build_int_2 (item
->cfg_checksum
, 0)));
441 = tree_cons (arc_count_field
,
442 convert (integer_type_node
,
443 build_int_2 (item
->count_edges
, 0)),
446 name_len
= strlen (item
->name
);
447 string_cst
= build_string (name_len
+ 1, item
->name
);
448 domain_type
= build_index_type (build_int_2 (name_len
, 0));
449 TREE_TYPE (string_cst
)
450 = build_array_type (char_type_node
, domain_type
);
451 field_value_chain
= tree_cons (name_field
,
452 build1 (ADDR_EXPR
, string_type
,
458 = tree_cons (NULL_TREE
, build (CONSTRUCTOR
,
459 bb_fn_struct_type
, NULL_TREE
,
460 nreverse (field_value_chain
)),
464 /* Add terminator. */
465 field_value
= build_tree_list (arc_count_field
,
466 convert (integer_type_node
,
467 build_int_2 (-1, 0)));
469 array_value_chain
= tree_cons (NULL_TREE
,
470 build (CONSTRUCTOR
, bb_fn_struct_type
,
471 NULL_TREE
, field_value
),
475 /* Create constructor for array. */
477 = build_decl (FIELD_DECL
, get_identifier ("function_infos"),
478 bb_fn_struct_pointer_type
);
479 value_chain
= tree_cons (field_decl
,
481 bb_fn_struct_array_pointer_type
,
483 bb_fn_struct_array_type
,
486 (array_value_chain
))),
488 TREE_CHAIN (field_decl
) = decl_chain
;
489 decl_chain
= field_decl
;
492 /* Finish structure. */
493 TYPE_FIELDS (structure_decl
) = nreverse (decl_chain
);
494 layout_type (structure_decl
);
497 = build (VAR_DECL
, structure_decl
, NULL_TREE
, NULL_TREE
);
498 DECL_INITIAL (structure_value
)
499 = build (CONSTRUCTOR
, structure_decl
, NULL_TREE
,
500 nreverse (value_chain
));
501 TREE_STATIC (structure_value
) = 1;
502 ASM_GENERATE_INTERNAL_LABEL (name
, "LPBX", 0);
503 DECL_NAME (structure_value
) = get_identifier (name
);
505 /* Size of this structure. */
506 TREE_VALUE (sizeof_field_value
)
507 = convert (long_integer_type_node
,
508 build_int_2 (int_size_in_bytes (structure_decl
), 0));
510 /* Build structure. */
511 assemble_variable (structure_value
, 0, 0, 0);
515 /* Default target function prologue and epilogue assembler output.
517 If not overridden for epilogue code, then the function body itself
518 contains return instructions wherever needed. */
520 default_function_pro_epilogue (file
, size
)
521 FILE *file ATTRIBUTE_UNUSED
;
522 HOST_WIDE_INT size ATTRIBUTE_UNUSED
;
526 /* Default target hook that outputs nothing to a stream. */
528 no_asm_to_stream (file
)
529 FILE *file ATTRIBUTE_UNUSED
;
533 /* Enable APP processing of subsequent output.
534 Used before the output from an `asm' statement. */
541 fputs (ASM_APP_ON
, asm_out_file
);
546 /* Disable APP processing of subsequent output.
547 Called from varasm.c before most kinds of output. */
554 fputs (ASM_APP_OFF
, asm_out_file
);
559 /* Return the number of slots filled in the current
560 delayed branch sequence (we don't count the insn needing the
561 delay slot). Zero if not in a delayed branch sequence. */
565 dbr_sequence_length ()
567 if (final_sequence
!= 0)
568 return XVECLEN (final_sequence
, 0) - 1;
574 /* The next two pages contain routines used to compute the length of an insn
575 and to shorten branches. */
577 /* Arrays for insn lengths, and addresses. The latter is referenced by
578 `insn_current_length'. */
580 static int *insn_lengths
;
582 #ifdef HAVE_ATTR_length
583 varray_type insn_addresses_
;
586 /* Max uid for which the above arrays are valid. */
587 static int insn_lengths_max_uid
;
589 /* Address of insn being processed. Used by `insn_current_length'. */
590 int insn_current_address
;
592 /* Address of insn being processed in previous iteration. */
593 int insn_last_address
;
595 /* known invariant alignment of insn being processed. */
596 int insn_current_align
;
598 /* After shorten_branches, for any insn, uid_align[INSN_UID (insn)]
599 gives the next following alignment insn that increases the known
600 alignment, or NULL_RTX if there is no such insn.
601 For any alignment obtained this way, we can again index uid_align with
602 its uid to obtain the next following align that in turn increases the
603 alignment, till we reach NULL_RTX; the sequence obtained this way
604 for each insn we'll call the alignment chain of this insn in the following
607 struct label_alignment
613 static rtx
*uid_align
;
614 static int *uid_shuid
;
615 static struct label_alignment
*label_align
;
617 /* Indicate that branch shortening hasn't yet been done. */
631 insn_lengths_max_uid
= 0;
633 #ifdef HAVE_ATTR_length
634 INSN_ADDRESSES_FREE ();
643 /* Obtain the current length of an insn. If branch shortening has been done,
644 get its actual length. Otherwise, get its maximum length. */
647 get_attr_length (insn
)
648 rtx insn ATTRIBUTE_UNUSED
;
650 #ifdef HAVE_ATTR_length
655 if (insn_lengths_max_uid
> INSN_UID (insn
))
656 return insn_lengths
[INSN_UID (insn
)];
658 switch (GET_CODE (insn
))
666 length
= insn_default_length (insn
);
670 body
= PATTERN (insn
);
671 if (GET_CODE (body
) == ADDR_VEC
|| GET_CODE (body
) == ADDR_DIFF_VEC
)
673 /* Alignment is machine-dependent and should be handled by
677 length
= insn_default_length (insn
);
681 body
= PATTERN (insn
);
682 if (GET_CODE (body
) == USE
|| GET_CODE (body
) == CLOBBER
)
685 else if (GET_CODE (body
) == ASM_INPUT
|| asm_noperands (body
) >= 0)
686 length
= asm_insn_count (body
) * insn_default_length (insn
);
687 else if (GET_CODE (body
) == SEQUENCE
)
688 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
689 length
+= get_attr_length (XVECEXP (body
, 0, i
));
691 length
= insn_default_length (insn
);
698 #ifdef ADJUST_INSN_LENGTH
699 ADJUST_INSN_LENGTH (insn
, length
);
702 #else /* not HAVE_ATTR_length */
704 #endif /* not HAVE_ATTR_length */
707 /* Code to handle alignment inside shorten_branches. */
709 /* Here is an explanation how the algorithm in align_fuzz can give
712 Call a sequence of instructions beginning with alignment point X
713 and continuing until the next alignment point `block X'. When `X'
714 is used in an expression, it means the alignment value of the
717 Call the distance between the start of the first insn of block X, and
718 the end of the last insn of block X `IX', for the `inner size of X'.
719 This is clearly the sum of the instruction lengths.
721 Likewise with the next alignment-delimited block following X, which we
724 Call the distance between the start of the first insn of block X, and
725 the start of the first insn of block Y `OX', for the `outer size of X'.
727 The estimated padding is then OX - IX.
729 OX can be safely estimated as
734 OX = round_up(IX, X) + Y - X
736 Clearly est(IX) >= real(IX), because that only depends on the
737 instruction lengths, and those being overestimated is a given.
739 Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so
740 we needn't worry about that when thinking about OX.
742 When X >= Y, the alignment provided by Y adds no uncertainty factor
743 for branch ranges starting before X, so we can just round what we have.
744 But when X < Y, we don't know anything about the, so to speak,
745 `middle bits', so we have to assume the worst when aligning up from an
746 address mod X to one mod Y, which is Y - X. */
749 #define LABEL_ALIGN(LABEL) align_labels_log
752 #ifndef LABEL_ALIGN_MAX_SKIP
753 #define LABEL_ALIGN_MAX_SKIP align_labels_max_skip
757 #define LOOP_ALIGN(LABEL) align_loops_log
760 #ifndef LOOP_ALIGN_MAX_SKIP
761 #define LOOP_ALIGN_MAX_SKIP align_loops_max_skip
764 #ifndef LABEL_ALIGN_AFTER_BARRIER
765 #define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0
768 #ifndef LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP
769 #define LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP 0
773 #define JUMP_ALIGN(LABEL) align_jumps_log
776 #ifndef JUMP_ALIGN_MAX_SKIP
777 #define JUMP_ALIGN_MAX_SKIP align_jumps_max_skip
780 #ifndef ADDR_VEC_ALIGN
782 final_addr_vec_align (addr_vec
)
785 int align
= GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec
)));
787 if (align
> BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
)
788 align
= BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
;
789 return exact_log2 (align
);
793 #define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC)
796 #ifndef INSN_LENGTH_ALIGNMENT
797 #define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log
800 #define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)])
802 static int min_labelno
, max_labelno
;
804 #define LABEL_TO_ALIGNMENT(LABEL) \
805 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment)
807 #define LABEL_TO_MAX_SKIP(LABEL) \
808 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip)
810 /* For the benefit of port specific code do this also as a function. */
813 label_to_alignment (label
)
816 return LABEL_TO_ALIGNMENT (label
);
819 #ifdef HAVE_ATTR_length
820 /* The differences in addresses
821 between a branch and its target might grow or shrink depending on
822 the alignment the start insn of the range (the branch for a forward
823 branch or the label for a backward branch) starts out on; if these
824 differences are used naively, they can even oscillate infinitely.
825 We therefore want to compute a 'worst case' address difference that
826 is independent of the alignment the start insn of the range end
827 up on, and that is at least as large as the actual difference.
828 The function align_fuzz calculates the amount we have to add to the
829 naively computed difference, by traversing the part of the alignment
830 chain of the start insn of the range that is in front of the end insn
831 of the range, and considering for each alignment the maximum amount
832 that it might contribute to a size increase.
834 For casesi tables, we also want to know worst case minimum amounts of
835 address difference, in case a machine description wants to introduce
836 some common offset that is added to all offsets in a table.
837 For this purpose, align_fuzz with a growth argument of 0 computes the
838 appropriate adjustment. */
840 /* Compute the maximum delta by which the difference of the addresses of
841 START and END might grow / shrink due to a different address for start
842 which changes the size of alignment insns between START and END.
843 KNOWN_ALIGN_LOG is the alignment known for START.
844 GROWTH should be ~0 if the objective is to compute potential code size
845 increase, and 0 if the objective is to compute potential shrink.
846 The return value is undefined for any other value of GROWTH. */
849 align_fuzz (start
, end
, known_align_log
, growth
)
854 int uid
= INSN_UID (start
);
856 int known_align
= 1 << known_align_log
;
857 int end_shuid
= INSN_SHUID (end
);
860 for (align_label
= uid_align
[uid
]; align_label
; align_label
= uid_align
[uid
])
862 int align_addr
, new_align
;
864 uid
= INSN_UID (align_label
);
865 align_addr
= INSN_ADDRESSES (uid
) - insn_lengths
[uid
];
866 if (uid_shuid
[uid
] > end_shuid
)
868 known_align_log
= LABEL_TO_ALIGNMENT (align_label
);
869 new_align
= 1 << known_align_log
;
870 if (new_align
< known_align
)
872 fuzz
+= (-align_addr
^ growth
) & (new_align
- known_align
);
873 known_align
= new_align
;
878 /* Compute a worst-case reference address of a branch so that it
879 can be safely used in the presence of aligned labels. Since the
880 size of the branch itself is unknown, the size of the branch is
881 not included in the range. I.e. for a forward branch, the reference
882 address is the end address of the branch as known from the previous
883 branch shortening pass, minus a value to account for possible size
884 increase due to alignment. For a backward branch, it is the start
885 address of the branch as known from the current pass, plus a value
886 to account for possible size increase due to alignment.
887 NB.: Therefore, the maximum offset allowed for backward branches needs
888 to exclude the branch size. */
891 insn_current_reference_address (branch
)
897 if (! INSN_ADDRESSES_SET_P ())
900 seq
= NEXT_INSN (PREV_INSN (branch
));
901 seq_uid
= INSN_UID (seq
);
902 if (GET_CODE (branch
) != JUMP_INSN
)
903 /* This can happen for example on the PA; the objective is to know the
904 offset to address something in front of the start of the function.
905 Thus, we can treat it like a backward branch.
906 We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than
907 any alignment we'd encounter, so we skip the call to align_fuzz. */
908 return insn_current_address
;
909 dest
= JUMP_LABEL (branch
);
911 /* BRANCH has no proper alignment chain set, so use SEQ.
912 BRANCH also has no INSN_SHUID. */
913 if (INSN_SHUID (seq
) < INSN_SHUID (dest
))
915 /* Forward branch. */
916 return (insn_last_address
+ insn_lengths
[seq_uid
]
917 - align_fuzz (seq
, dest
, length_unit_log
, ~0));
921 /* Backward branch. */
922 return (insn_current_address
923 + align_fuzz (dest
, seq
, length_unit_log
, ~0));
926 #endif /* HAVE_ATTR_length */
929 compute_alignments ()
932 int log
, max_skip
, max_log
;
940 max_labelno
= max_label_num ();
941 min_labelno
= get_first_label_num ();
942 label_align
= (struct label_alignment
*)
943 xcalloc (max_labelno
- min_labelno
+ 1, sizeof (struct label_alignment
));
945 /* If not optimizing or optimizing for size, don't assign any alignments. */
946 if (! optimize
|| optimize_size
)
949 for (i
= 0; i
< n_basic_blocks
; i
++)
951 basic_block bb
= BASIC_BLOCK (i
);
952 rtx label
= bb
->head
;
953 int fallthru_frequency
= 0, branch_frequency
= 0, has_fallthru
= 0;
956 if (GET_CODE (label
) != CODE_LABEL
)
958 max_log
= LABEL_ALIGN (label
);
959 max_skip
= LABEL_ALIGN_MAX_SKIP
;
961 for (e
= bb
->pred
; e
; e
= e
->pred_next
)
963 if (e
->flags
& EDGE_FALLTHRU
)
964 has_fallthru
= 1, fallthru_frequency
+= EDGE_FREQUENCY (e
);
966 branch_frequency
+= EDGE_FREQUENCY (e
);
969 /* There are two purposes to align block with no fallthru incoming edge:
970 1) to avoid fetch stalls when branch destination is near cache boundary
971 2) to improve cache efficiency in case the previous block is not executed
972 (so it does not need to be in the cache).
974 We to catch first case, we align frequently executed blocks.
975 To catch the second, we align blocks that are executed more frequently
976 than the predecessor and the predecessor is likely to not be executed
977 when function is called. */
980 && (branch_frequency
> BB_FREQ_MAX
/ 10
981 || (bb
->frequency
> BASIC_BLOCK (i
- 1)->frequency
* 10
982 && (BASIC_BLOCK (i
- 1)->frequency
983 <= ENTRY_BLOCK_PTR
->frequency
/ 2))))
985 log
= JUMP_ALIGN (label
);
989 max_skip
= JUMP_ALIGN_MAX_SKIP
;
992 /* In case block is frequent and reached mostly by non-fallthru edge,
993 align it. It is most likely an first block of loop. */
995 && branch_frequency
+ fallthru_frequency
> BB_FREQ_MAX
/ 10
996 && branch_frequency
> fallthru_frequency
* 5)
998 log
= LOOP_ALIGN (label
);
1002 max_skip
= LOOP_ALIGN_MAX_SKIP
;
1005 LABEL_TO_ALIGNMENT (label
) = max_log
;
1006 LABEL_TO_MAX_SKIP (label
) = max_skip
;
1010 /* Make a pass over all insns and compute their actual lengths by shortening
1011 any branches of variable length if possible. */
1013 /* Give a default value for the lowest address in a function. */
1015 #ifndef FIRST_INSN_ADDRESS
1016 #define FIRST_INSN_ADDRESS 0
1019 /* shorten_branches might be called multiple times: for example, the SH
1020 port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG.
1021 In order to do this, it needs proper length information, which it obtains
1022 by calling shorten_branches. This cannot be collapsed with
1023 shorten_branches itself into a single pass unless we also want to integrate
1024 reorg.c, since the branch splitting exposes new instructions with delay
1028 shorten_branches (first
)
1029 rtx first ATTRIBUTE_UNUSED
;
1036 #ifdef HAVE_ATTR_length
1037 #define MAX_CODE_ALIGN 16
1039 int something_changed
= 1;
1040 char *varying_length
;
1043 rtx align_tab
[MAX_CODE_ALIGN
];
1047 /* Compute maximum UID and allocate label_align / uid_shuid. */
1048 max_uid
= get_max_uid ();
1050 uid_shuid
= (int *) xmalloc (max_uid
* sizeof *uid_shuid
);
1052 if (max_labelno
!= max_label_num ())
1054 int old
= max_labelno
;
1058 max_labelno
= max_label_num ();
1060 n_labels
= max_labelno
- min_labelno
+ 1;
1061 n_old_labels
= old
- min_labelno
+ 1;
1063 label_align
= (struct label_alignment
*) xrealloc
1064 (label_align
, n_labels
* sizeof (struct label_alignment
));
1066 /* Range of labels grows monotonically in the function. Abort here
1067 means that the initialization of array got lost. */
1068 if (n_old_labels
> n_labels
)
1071 memset (label_align
+ n_old_labels
, 0,
1072 (n_labels
- n_old_labels
) * sizeof (struct label_alignment
));
1075 /* Initialize label_align and set up uid_shuid to be strictly
1076 monotonically rising with insn order. */
1077 /* We use max_log here to keep track of the maximum alignment we want to
1078 impose on the next CODE_LABEL (or the current one if we are processing
1079 the CODE_LABEL itself). */
1084 for (insn
= get_insns (), i
= 1; insn
; insn
= NEXT_INSN (insn
))
1088 INSN_SHUID (insn
) = i
++;
1091 /* reorg might make the first insn of a loop being run once only,
1092 and delete the label in front of it. Then we want to apply
1093 the loop alignment to the new label created by reorg, which
1094 is separated by the former loop start insn from the
1095 NOTE_INSN_LOOP_BEG. */
1097 else if (GET_CODE (insn
) == CODE_LABEL
)
1101 /* Merge in alignments computed by compute_alignments. */
1102 log
= LABEL_TO_ALIGNMENT (insn
);
1106 max_skip
= LABEL_TO_MAX_SKIP (insn
);
1109 log
= LABEL_ALIGN (insn
);
1113 max_skip
= LABEL_ALIGN_MAX_SKIP
;
1115 next
= NEXT_INSN (insn
);
1116 /* ADDR_VECs only take room if read-only data goes into the text
1118 if (JUMP_TABLES_IN_TEXT_SECTION
1119 #if !defined(READONLY_DATA_SECTION)
1123 if (next
&& GET_CODE (next
) == JUMP_INSN
)
1125 rtx nextbody
= PATTERN (next
);
1126 if (GET_CODE (nextbody
) == ADDR_VEC
1127 || GET_CODE (nextbody
) == ADDR_DIFF_VEC
)
1129 log
= ADDR_VEC_ALIGN (next
);
1133 max_skip
= LABEL_ALIGN_MAX_SKIP
;
1137 LABEL_TO_ALIGNMENT (insn
) = max_log
;
1138 LABEL_TO_MAX_SKIP (insn
) = max_skip
;
1142 else if (GET_CODE (insn
) == BARRIER
)
1146 for (label
= insn
; label
&& ! INSN_P (label
);
1147 label
= NEXT_INSN (label
))
1148 if (GET_CODE (label
) == CODE_LABEL
)
1150 log
= LABEL_ALIGN_AFTER_BARRIER (insn
);
1154 max_skip
= LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP
;
1160 #ifdef HAVE_ATTR_length
1162 /* Allocate the rest of the arrays. */
1163 insn_lengths
= (int *) xmalloc (max_uid
* sizeof (*insn_lengths
));
1164 insn_lengths_max_uid
= max_uid
;
1165 /* Syntax errors can lead to labels being outside of the main insn stream.
1166 Initialize insn_addresses, so that we get reproducible results. */
1167 INSN_ADDRESSES_ALLOC (max_uid
);
1169 varying_length
= (char *) xcalloc (max_uid
, sizeof (char));
1171 /* Initialize uid_align. We scan instructions
1172 from end to start, and keep in align_tab[n] the last seen insn
1173 that does an alignment of at least n+1, i.e. the successor
1174 in the alignment chain for an insn that does / has a known
1176 uid_align
= (rtx
*) xcalloc (max_uid
, sizeof *uid_align
);
1178 for (i
= MAX_CODE_ALIGN
; --i
>= 0;)
1179 align_tab
[i
] = NULL_RTX
;
1180 seq
= get_last_insn ();
1181 for (; seq
; seq
= PREV_INSN (seq
))
1183 int uid
= INSN_UID (seq
);
1185 log
= (GET_CODE (seq
) == CODE_LABEL
? LABEL_TO_ALIGNMENT (seq
) : 0);
1186 uid_align
[uid
] = align_tab
[0];
1189 /* Found an alignment label. */
1190 uid_align
[uid
] = align_tab
[log
];
1191 for (i
= log
- 1; i
>= 0; i
--)
1195 #ifdef CASE_VECTOR_SHORTEN_MODE
1198 /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum
1201 int min_shuid
= INSN_SHUID (get_insns ()) - 1;
1202 int max_shuid
= INSN_SHUID (get_last_insn ()) + 1;
1205 for (insn
= first
; insn
!= 0; insn
= NEXT_INSN (insn
))
1207 rtx min_lab
= NULL_RTX
, max_lab
= NULL_RTX
, pat
;
1208 int len
, i
, min
, max
, insn_shuid
;
1210 addr_diff_vec_flags flags
;
1212 if (GET_CODE (insn
) != JUMP_INSN
1213 || GET_CODE (PATTERN (insn
)) != ADDR_DIFF_VEC
)
1215 pat
= PATTERN (insn
);
1216 len
= XVECLEN (pat
, 1);
1219 min_align
= MAX_CODE_ALIGN
;
1220 for (min
= max_shuid
, max
= min_shuid
, i
= len
- 1; i
>= 0; i
--)
1222 rtx lab
= XEXP (XVECEXP (pat
, 1, i
), 0);
1223 int shuid
= INSN_SHUID (lab
);
1234 if (min_align
> LABEL_TO_ALIGNMENT (lab
))
1235 min_align
= LABEL_TO_ALIGNMENT (lab
);
1237 XEXP (pat
, 2) = gen_rtx_LABEL_REF (VOIDmode
, min_lab
);
1238 XEXP (pat
, 3) = gen_rtx_LABEL_REF (VOIDmode
, max_lab
);
1239 insn_shuid
= INSN_SHUID (insn
);
1240 rel
= INSN_SHUID (XEXP (XEXP (pat
, 0), 0));
1241 flags
.min_align
= min_align
;
1242 flags
.base_after_vec
= rel
> insn_shuid
;
1243 flags
.min_after_vec
= min
> insn_shuid
;
1244 flags
.max_after_vec
= max
> insn_shuid
;
1245 flags
.min_after_base
= min
> rel
;
1246 flags
.max_after_base
= max
> rel
;
1247 ADDR_DIFF_VEC_FLAGS (pat
) = flags
;
1250 #endif /* CASE_VECTOR_SHORTEN_MODE */
1252 /* Compute initial lengths, addresses, and varying flags for each insn. */
1253 for (insn_current_address
= FIRST_INSN_ADDRESS
, insn
= first
;
1255 insn_current_address
+= insn_lengths
[uid
], insn
= NEXT_INSN (insn
))
1257 uid
= INSN_UID (insn
);
1259 insn_lengths
[uid
] = 0;
1261 if (GET_CODE (insn
) == CODE_LABEL
)
1263 int log
= LABEL_TO_ALIGNMENT (insn
);
1266 int align
= 1 << log
;
1267 int new_address
= (insn_current_address
+ align
- 1) & -align
;
1268 insn_lengths
[uid
] = new_address
- insn_current_address
;
1272 INSN_ADDRESSES (uid
) = insn_current_address
;
1274 if (GET_CODE (insn
) == NOTE
|| GET_CODE (insn
) == BARRIER
1275 || GET_CODE (insn
) == CODE_LABEL
)
1277 if (INSN_DELETED_P (insn
))
1280 body
= PATTERN (insn
);
1281 if (GET_CODE (body
) == ADDR_VEC
|| GET_CODE (body
) == ADDR_DIFF_VEC
)
1283 /* This only takes room if read-only data goes into the text
1285 if (JUMP_TABLES_IN_TEXT_SECTION
1286 #if !defined(READONLY_DATA_SECTION)
1290 insn_lengths
[uid
] = (XVECLEN (body
,
1291 GET_CODE (body
) == ADDR_DIFF_VEC
)
1292 * GET_MODE_SIZE (GET_MODE (body
)));
1293 /* Alignment is handled by ADDR_VEC_ALIGN. */
1295 else if (GET_CODE (body
) == ASM_INPUT
|| asm_noperands (body
) >= 0)
1296 insn_lengths
[uid
] = asm_insn_count (body
) * insn_default_length (insn
);
1297 else if (GET_CODE (body
) == SEQUENCE
)
1300 int const_delay_slots
;
1302 const_delay_slots
= const_num_delay_slots (XVECEXP (body
, 0, 0));
1304 const_delay_slots
= 0;
1306 /* Inside a delay slot sequence, we do not do any branch shortening
1307 if the shortening could change the number of delay slots
1309 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
1311 rtx inner_insn
= XVECEXP (body
, 0, i
);
1312 int inner_uid
= INSN_UID (inner_insn
);
1315 if (GET_CODE (body
) == ASM_INPUT
1316 || asm_noperands (PATTERN (XVECEXP (body
, 0, i
))) >= 0)
1317 inner_length
= (asm_insn_count (PATTERN (inner_insn
))
1318 * insn_default_length (inner_insn
));
1320 inner_length
= insn_default_length (inner_insn
);
1322 insn_lengths
[inner_uid
] = inner_length
;
1323 if (const_delay_slots
)
1325 if ((varying_length
[inner_uid
]
1326 = insn_variable_length_p (inner_insn
)) != 0)
1327 varying_length
[uid
] = 1;
1328 INSN_ADDRESSES (inner_uid
) = (insn_current_address
1329 + insn_lengths
[uid
]);
1332 varying_length
[inner_uid
] = 0;
1333 insn_lengths
[uid
] += inner_length
;
1336 else if (GET_CODE (body
) != USE
&& GET_CODE (body
) != CLOBBER
)
1338 insn_lengths
[uid
] = insn_default_length (insn
);
1339 varying_length
[uid
] = insn_variable_length_p (insn
);
1342 /* If needed, do any adjustment. */
1343 #ifdef ADJUST_INSN_LENGTH
1344 ADJUST_INSN_LENGTH (insn
, insn_lengths
[uid
]);
1345 if (insn_lengths
[uid
] < 0)
1346 fatal_insn ("negative insn length", insn
);
1350 /* Now loop over all the insns finding varying length insns. For each,
1351 get the current insn length. If it has changed, reflect the change.
1352 When nothing changes for a full pass, we are done. */
1354 while (something_changed
)
1356 something_changed
= 0;
1357 insn_current_align
= MAX_CODE_ALIGN
- 1;
1358 for (insn_current_address
= FIRST_INSN_ADDRESS
, insn
= first
;
1360 insn
= NEXT_INSN (insn
))
1363 #ifdef ADJUST_INSN_LENGTH
1368 uid
= INSN_UID (insn
);
1370 if (GET_CODE (insn
) == CODE_LABEL
)
1372 int log
= LABEL_TO_ALIGNMENT (insn
);
1373 if (log
> insn_current_align
)
1375 int align
= 1 << log
;
1376 int new_address
= (insn_current_address
+ align
- 1) & -align
;
1377 insn_lengths
[uid
] = new_address
- insn_current_address
;
1378 insn_current_align
= log
;
1379 insn_current_address
= new_address
;
1382 insn_lengths
[uid
] = 0;
1383 INSN_ADDRESSES (uid
) = insn_current_address
;
1387 length_align
= INSN_LENGTH_ALIGNMENT (insn
);
1388 if (length_align
< insn_current_align
)
1389 insn_current_align
= length_align
;
1391 insn_last_address
= INSN_ADDRESSES (uid
);
1392 INSN_ADDRESSES (uid
) = insn_current_address
;
1394 #ifdef CASE_VECTOR_SHORTEN_MODE
1395 if (optimize
&& GET_CODE (insn
) == JUMP_INSN
1396 && GET_CODE (PATTERN (insn
)) == ADDR_DIFF_VEC
)
1398 rtx body
= PATTERN (insn
);
1399 int old_length
= insn_lengths
[uid
];
1400 rtx rel_lab
= XEXP (XEXP (body
, 0), 0);
1401 rtx min_lab
= XEXP (XEXP (body
, 2), 0);
1402 rtx max_lab
= XEXP (XEXP (body
, 3), 0);
1403 int rel_addr
= INSN_ADDRESSES (INSN_UID (rel_lab
));
1404 int min_addr
= INSN_ADDRESSES (INSN_UID (min_lab
));
1405 int max_addr
= INSN_ADDRESSES (INSN_UID (max_lab
));
1408 addr_diff_vec_flags flags
;
1410 /* Avoid automatic aggregate initialization. */
1411 flags
= ADDR_DIFF_VEC_FLAGS (body
);
1413 /* Try to find a known alignment for rel_lab. */
1414 for (prev
= rel_lab
;
1416 && ! insn_lengths
[INSN_UID (prev
)]
1417 && ! (varying_length
[INSN_UID (prev
)] & 1);
1418 prev
= PREV_INSN (prev
))
1419 if (varying_length
[INSN_UID (prev
)] & 2)
1421 rel_align
= LABEL_TO_ALIGNMENT (prev
);
1425 /* See the comment on addr_diff_vec_flags in rtl.h for the
1426 meaning of the flags values. base: REL_LAB vec: INSN */
1427 /* Anything after INSN has still addresses from the last
1428 pass; adjust these so that they reflect our current
1429 estimate for this pass. */
1430 if (flags
.base_after_vec
)
1431 rel_addr
+= insn_current_address
- insn_last_address
;
1432 if (flags
.min_after_vec
)
1433 min_addr
+= insn_current_address
- insn_last_address
;
1434 if (flags
.max_after_vec
)
1435 max_addr
+= insn_current_address
- insn_last_address
;
1436 /* We want to know the worst case, i.e. lowest possible value
1437 for the offset of MIN_LAB. If MIN_LAB is after REL_LAB,
1438 its offset is positive, and we have to be wary of code shrink;
1439 otherwise, it is negative, and we have to be vary of code
1441 if (flags
.min_after_base
)
1443 /* If INSN is between REL_LAB and MIN_LAB, the size
1444 changes we are about to make can change the alignment
1445 within the observed offset, therefore we have to break
1446 it up into two parts that are independent. */
1447 if (! flags
.base_after_vec
&& flags
.min_after_vec
)
1449 min_addr
-= align_fuzz (rel_lab
, insn
, rel_align
, 0);
1450 min_addr
-= align_fuzz (insn
, min_lab
, 0, 0);
1453 min_addr
-= align_fuzz (rel_lab
, min_lab
, rel_align
, 0);
1457 if (flags
.base_after_vec
&& ! flags
.min_after_vec
)
1459 min_addr
-= align_fuzz (min_lab
, insn
, 0, ~0);
1460 min_addr
-= align_fuzz (insn
, rel_lab
, 0, ~0);
1463 min_addr
-= align_fuzz (min_lab
, rel_lab
, 0, ~0);
1465 /* Likewise, determine the highest lowest possible value
1466 for the offset of MAX_LAB. */
1467 if (flags
.max_after_base
)
1469 if (! flags
.base_after_vec
&& flags
.max_after_vec
)
1471 max_addr
+= align_fuzz (rel_lab
, insn
, rel_align
, ~0);
1472 max_addr
+= align_fuzz (insn
, max_lab
, 0, ~0);
1475 max_addr
+= align_fuzz (rel_lab
, max_lab
, rel_align
, ~0);
1479 if (flags
.base_after_vec
&& ! flags
.max_after_vec
)
1481 max_addr
+= align_fuzz (max_lab
, insn
, 0, 0);
1482 max_addr
+= align_fuzz (insn
, rel_lab
, 0, 0);
1485 max_addr
+= align_fuzz (max_lab
, rel_lab
, 0, 0);
1487 PUT_MODE (body
, CASE_VECTOR_SHORTEN_MODE (min_addr
- rel_addr
,
1488 max_addr
- rel_addr
,
1490 if (JUMP_TABLES_IN_TEXT_SECTION
1491 #if !defined(READONLY_DATA_SECTION)
1497 = (XVECLEN (body
, 1) * GET_MODE_SIZE (GET_MODE (body
)));
1498 insn_current_address
+= insn_lengths
[uid
];
1499 if (insn_lengths
[uid
] != old_length
)
1500 something_changed
= 1;
1505 #endif /* CASE_VECTOR_SHORTEN_MODE */
1507 if (! (varying_length
[uid
]))
1509 if (GET_CODE (insn
) == INSN
1510 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
1514 body
= PATTERN (insn
);
1515 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
1517 rtx inner_insn
= XVECEXP (body
, 0, i
);
1518 int inner_uid
= INSN_UID (inner_insn
);
1520 INSN_ADDRESSES (inner_uid
) = insn_current_address
;
1522 insn_current_address
+= insn_lengths
[inner_uid
];
1526 insn_current_address
+= insn_lengths
[uid
];
1531 if (GET_CODE (insn
) == INSN
&& GET_CODE (PATTERN (insn
)) == SEQUENCE
)
1535 body
= PATTERN (insn
);
1537 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
1539 rtx inner_insn
= XVECEXP (body
, 0, i
);
1540 int inner_uid
= INSN_UID (inner_insn
);
1543 INSN_ADDRESSES (inner_uid
) = insn_current_address
;
1545 /* insn_current_length returns 0 for insns with a
1546 non-varying length. */
1547 if (! varying_length
[inner_uid
])
1548 inner_length
= insn_lengths
[inner_uid
];
1550 inner_length
= insn_current_length (inner_insn
);
1552 if (inner_length
!= insn_lengths
[inner_uid
])
1554 insn_lengths
[inner_uid
] = inner_length
;
1555 something_changed
= 1;
1557 insn_current_address
+= insn_lengths
[inner_uid
];
1558 new_length
+= inner_length
;
1563 new_length
= insn_current_length (insn
);
1564 insn_current_address
+= new_length
;
1567 #ifdef ADJUST_INSN_LENGTH
1568 /* If needed, do any adjustment. */
1569 tmp_length
= new_length
;
1570 ADJUST_INSN_LENGTH (insn
, new_length
);
1571 insn_current_address
+= (new_length
- tmp_length
);
1574 if (new_length
!= insn_lengths
[uid
])
1576 insn_lengths
[uid
] = new_length
;
1577 something_changed
= 1;
1580 /* For a non-optimizing compile, do only a single pass. */
1585 free (varying_length
);
1587 #endif /* HAVE_ATTR_length */
1590 #ifdef HAVE_ATTR_length
1591 /* Given the body of an INSN known to be generated by an ASM statement, return
1592 the number of machine instructions likely to be generated for this insn.
1593 This is used to compute its length. */
1596 asm_insn_count (body
)
1599 const char *template;
1602 if (GET_CODE (body
) == ASM_INPUT
)
1603 template = XSTR (body
, 0);
1605 template = decode_asm_operands (body
, NULL
, NULL
, NULL
, NULL
);
1607 for (; *template; template++)
1608 if (IS_ASM_LOGICAL_LINE_SEPARATOR (*template) || *template == '\n')
1615 /* Output assembler code for the start of a function,
1616 and initialize some of the variables in this file
1617 for the new function. The label for the function and associated
1618 assembler pseudo-ops have already been output in `assemble_start_function'.
1620 FIRST is the first insn of the rtl for the function being compiled.
1621 FILE is the file to write assembler code to.
1622 OPTIMIZE is nonzero if we should eliminate redundant
1623 test and compare insns. */
1626 final_start_function (first
, file
, optimize
)
1629 int optimize ATTRIBUTE_UNUSED
;
1633 this_is_asm_operands
= 0;
1635 #ifdef NON_SAVING_SETJMP
1636 /* A function that calls setjmp should save and restore all the
1637 call-saved registers on a system where longjmp clobbers them. */
1638 if (NON_SAVING_SETJMP
&& current_function_calls_setjmp
)
1642 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
1643 if (!call_used_regs
[i
])
1644 regs_ever_live
[i
] = 1;
1648 if (NOTE_LINE_NUMBER (first
) != NOTE_INSN_DELETED
)
1649 notice_source_line (first
);
1650 high_block_linenum
= high_function_linenum
= last_linenum
;
1652 (*debug_hooks
->begin_prologue
) (last_linenum
, last_filename
);
1654 #if defined (DWARF2_UNWIND_INFO) || defined (IA64_UNWIND_INFO)
1655 if (write_symbols
!= DWARF2_DEBUG
&& write_symbols
!= VMS_AND_DWARF2_DEBUG
)
1656 dwarf2out_begin_prologue (0, NULL
);
1659 #ifdef LEAF_REG_REMAP
1660 if (current_function_uses_only_leaf_regs
)
1661 leaf_renumber_regs (first
);
1664 /* The Sun386i and perhaps other machines don't work right
1665 if the profiling code comes after the prologue. */
1666 #ifdef PROFILE_BEFORE_PROLOGUE
1667 if (current_function_profile
)
1668 profile_function (file
);
1669 #endif /* PROFILE_BEFORE_PROLOGUE */
1671 #if defined (DWARF2_UNWIND_INFO) && defined (HAVE_prologue)
1672 if (dwarf2out_do_frame ())
1673 dwarf2out_frame_debug (NULL_RTX
);
1676 /* If debugging, assign block numbers to all of the blocks in this
1680 remove_unnecessary_notes ();
1682 number_blocks (current_function_decl
);
1683 /* We never actually put out begin/end notes for the top-level
1684 block in the function. But, conceptually, that block is
1686 TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl
)) = 1;
1689 /* First output the function prologue: code to set up the stack frame. */
1690 (*targetm
.asm_out
.function_prologue
) (file
, get_frame_size ());
1692 #ifdef VMS_DEBUGGING_INFO
1693 /* Output label after the prologue of the function. */
1694 if (write_symbols
== VMS_DEBUG
|| write_symbols
== VMS_AND_DWARF2_DEBUG
)
1695 vmsdbgout_after_prologue ();
1698 /* If the machine represents the prologue as RTL, the profiling code must
1699 be emitted when NOTE_INSN_PROLOGUE_END is scanned. */
1700 #ifdef HAVE_prologue
1701 if (! HAVE_prologue
)
1703 profile_after_prologue (file
);
1707 profile_after_prologue (file
)
1708 FILE *file ATTRIBUTE_UNUSED
;
1710 #ifndef PROFILE_BEFORE_PROLOGUE
1711 if (current_function_profile
)
1712 profile_function (file
);
1713 #endif /* not PROFILE_BEFORE_PROLOGUE */
1717 profile_function (file
)
1718 FILE *file ATTRIBUTE_UNUSED
;
1720 #ifndef NO_PROFILE_COUNTERS
1721 int align
= MIN (BIGGEST_ALIGNMENT
, LONG_TYPE_SIZE
);
1723 #if defined(ASM_OUTPUT_REG_PUSH)
1724 #if defined(STRUCT_VALUE_INCOMING_REGNUM) || defined(STRUCT_VALUE_REGNUM)
1725 int sval
= current_function_returns_struct
;
1727 #if defined(STATIC_CHAIN_INCOMING_REGNUM) || defined(STATIC_CHAIN_REGNUM)
1728 int cxt
= current_function_needs_context
;
1730 #endif /* ASM_OUTPUT_REG_PUSH */
1732 #ifndef NO_PROFILE_COUNTERS
1734 ASM_OUTPUT_ALIGN (file
, floor_log2 (align
/ BITS_PER_UNIT
));
1735 ASM_OUTPUT_INTERNAL_LABEL (file
, "LP", current_function_profile_label_no
);
1736 assemble_integer (const0_rtx
, LONG_TYPE_SIZE
/ BITS_PER_UNIT
, align
, 1);
1739 function_section (current_function_decl
);
1741 #if defined(STRUCT_VALUE_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1743 ASM_OUTPUT_REG_PUSH (file
, STRUCT_VALUE_INCOMING_REGNUM
);
1745 #if defined(STRUCT_VALUE_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1748 ASM_OUTPUT_REG_PUSH (file
, STRUCT_VALUE_REGNUM
);
1753 #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1755 ASM_OUTPUT_REG_PUSH (file
, STATIC_CHAIN_INCOMING_REGNUM
);
1757 #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1760 ASM_OUTPUT_REG_PUSH (file
, STATIC_CHAIN_REGNUM
);
1765 FUNCTION_PROFILER (file
, current_function_profile_label_no
);
1767 #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1769 ASM_OUTPUT_REG_POP (file
, STATIC_CHAIN_INCOMING_REGNUM
);
1771 #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1774 ASM_OUTPUT_REG_POP (file
, STATIC_CHAIN_REGNUM
);
1779 #if defined(STRUCT_VALUE_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1781 ASM_OUTPUT_REG_POP (file
, STRUCT_VALUE_INCOMING_REGNUM
);
1783 #if defined(STRUCT_VALUE_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1786 ASM_OUTPUT_REG_POP (file
, STRUCT_VALUE_REGNUM
);
1792 /* Output assembler code for the end of a function.
1793 For clarity, args are same as those of `final_start_function'
1794 even though not all of them are needed. */
1797 final_end_function ()
1801 (*debug_hooks
->end_function
) (high_function_linenum
);
1803 /* Finally, output the function epilogue:
1804 code to restore the stack frame and return to the caller. */
1805 (*targetm
.asm_out
.function_epilogue
) (asm_out_file
, get_frame_size ());
1807 /* And debug output. */
1808 (*debug_hooks
->end_epilogue
) ();
1810 #if defined (DWARF2_UNWIND_INFO)
1811 if (write_symbols
!= DWARF2_DEBUG
&& write_symbols
!= VMS_AND_DWARF2_DEBUG
1812 && dwarf2out_do_frame ())
1813 dwarf2out_end_epilogue ();
1817 /* Output assembler code for some insns: all or part of a function.
1818 For description of args, see `final_start_function', above.
1820 PRESCAN is 1 if we are not really outputting,
1821 just scanning as if we were outputting.
1822 Prescanning deletes and rearranges insns just like ordinary output.
1823 PRESCAN is -2 if we are outputting after having prescanned.
1824 In this case, don't try to delete or rearrange insns
1825 because that has already been done.
1826 Prescanning is done only on certain machines. */
1829 final (first
, file
, optimize
, prescan
)
1839 last_ignored_compare
= 0;
1842 /* Make a map indicating which line numbers appear in this function.
1843 When producing SDB debugging info, delete troublesome line number
1844 notes from inlined functions in other files as well as duplicate
1845 line number notes. */
1846 #ifdef SDB_DEBUGGING_INFO
1847 if (write_symbols
== SDB_DEBUG
)
1850 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
1851 if (GET_CODE (insn
) == NOTE
&& NOTE_LINE_NUMBER (insn
) > 0)
1853 if ((RTX_INTEGRATED_P (insn
)
1854 && strcmp (NOTE_SOURCE_FILE (insn
), main_input_filename
) != 0)
1856 && NOTE_LINE_NUMBER (insn
) == NOTE_LINE_NUMBER (last
)
1857 && NOTE_SOURCE_FILE (insn
) == NOTE_SOURCE_FILE (last
)))
1859 delete_insn (insn
); /* Use delete_note. */
1863 if (NOTE_LINE_NUMBER (insn
) > max_line
)
1864 max_line
= NOTE_LINE_NUMBER (insn
);
1870 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
1871 if (GET_CODE (insn
) == NOTE
&& NOTE_LINE_NUMBER (insn
) > max_line
)
1872 max_line
= NOTE_LINE_NUMBER (insn
);
1875 line_note_exists
= (char *) xcalloc (max_line
+ 1, sizeof (char));
1877 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
1879 if (INSN_UID (insn
) > max_uid
) /* find largest UID */
1880 max_uid
= INSN_UID (insn
);
1881 if (GET_CODE (insn
) == NOTE
&& NOTE_LINE_NUMBER (insn
) > 0)
1882 line_note_exists
[NOTE_LINE_NUMBER (insn
)] = 1;
1884 /* If CC tracking across branches is enabled, record the insn which
1885 jumps to each branch only reached from one place. */
1886 if (optimize
&& GET_CODE (insn
) == JUMP_INSN
)
1888 rtx lab
= JUMP_LABEL (insn
);
1889 if (lab
&& LABEL_NUSES (lab
) == 1)
1891 LABEL_REFS (lab
) = insn
;
1901 /* Output the insns. */
1902 for (insn
= NEXT_INSN (first
); insn
;)
1904 #ifdef HAVE_ATTR_length
1905 if ((unsigned) INSN_UID (insn
) >= INSN_ADDRESSES_SIZE ())
1908 /* Irritatingly, the reg-stack pass is creating new instructions
1909 and because of REG_DEAD note abuse it has to run after
1910 shorten_branches. Fake address of -1 then. */
1911 insn_current_address
= -1;
1913 /* This can be triggered by bugs elsewhere in the compiler if
1914 new insns are created after init_insn_lengths is called. */
1919 insn_current_address
= INSN_ADDRESSES (INSN_UID (insn
));
1920 #endif /* HAVE_ATTR_length */
1922 insn
= final_scan_insn (insn
, file
, optimize
, prescan
, 0);
1925 /* Store function names for edge-profiling. */
1926 /* ??? Probably should re-use the existing struct function. */
1928 if (cfun
->arc_profile
)
1930 struct function_list
*new_item
= xmalloc (sizeof (struct function_list
));
1932 *functions_tail
= new_item
;
1933 functions_tail
= &new_item
->next
;
1936 new_item
->name
= xstrdup (current_function_name
);
1937 new_item
->cfg_checksum
= profile_info
.current_function_cfg_checksum
;
1938 new_item
->count_edges
= profile_info
.count_edges_instrumented_now
;
1941 free (line_note_exists
);
1942 line_note_exists
= NULL
;
1946 get_insn_template (code
, insn
)
1950 const void *output
= insn_data
[code
].output
;
1951 switch (insn_data
[code
].output_format
)
1953 case INSN_OUTPUT_FORMAT_SINGLE
:
1954 return (const char *) output
;
1955 case INSN_OUTPUT_FORMAT_MULTI
:
1956 return ((const char *const *) output
)[which_alternative
];
1957 case INSN_OUTPUT_FORMAT_FUNCTION
:
1960 return (*(insn_output_fn
) output
) (recog_data
.operand
, insn
);
1967 /* The final scan for one insn, INSN.
1968 Args are same as in `final', except that INSN
1969 is the insn being scanned.
1970 Value returned is the next insn to be scanned.
1972 NOPEEPHOLES is the flag to disallow peephole processing (currently
1973 used for within delayed branch sequence output). */
1976 final_scan_insn (insn
, file
, optimize
, prescan
, nopeepholes
)
1979 int optimize ATTRIBUTE_UNUSED
;
1981 int nopeepholes ATTRIBUTE_UNUSED
;
1989 /* Ignore deleted insns. These can occur when we split insns (due to a
1990 template of "#") while not optimizing. */
1991 if (INSN_DELETED_P (insn
))
1992 return NEXT_INSN (insn
);
1994 switch (GET_CODE (insn
))
2000 switch (NOTE_LINE_NUMBER (insn
))
2002 case NOTE_INSN_DELETED
:
2003 case NOTE_INSN_LOOP_BEG
:
2004 case NOTE_INSN_LOOP_END
:
2005 case NOTE_INSN_LOOP_END_TOP_COND
:
2006 case NOTE_INSN_LOOP_CONT
:
2007 case NOTE_INSN_LOOP_VTOP
:
2008 case NOTE_INSN_FUNCTION_END
:
2009 case NOTE_INSN_REPEATED_LINE_NUMBER
:
2010 case NOTE_INSN_RANGE_BEG
:
2011 case NOTE_INSN_RANGE_END
:
2012 case NOTE_INSN_LIVE
:
2013 case NOTE_INSN_EXPECTED_VALUE
:
2016 case NOTE_INSN_BASIC_BLOCK
:
2017 #ifdef IA64_UNWIND_INFO
2018 IA64_UNWIND_EMIT (asm_out_file
, insn
);
2021 fprintf (asm_out_file
, "\t%s basic block %d\n",
2022 ASM_COMMENT_START
, NOTE_BASIC_BLOCK (insn
)->index
);
2025 case NOTE_INSN_EH_REGION_BEG
:
2026 ASM_OUTPUT_DEBUG_LABEL (asm_out_file
, "LEHB",
2027 NOTE_EH_HANDLER (insn
));
2030 case NOTE_INSN_EH_REGION_END
:
2031 ASM_OUTPUT_DEBUG_LABEL (asm_out_file
, "LEHE",
2032 NOTE_EH_HANDLER (insn
));
2035 case NOTE_INSN_PROLOGUE_END
:
2036 (*targetm
.asm_out
.function_end_prologue
) (file
);
2037 profile_after_prologue (file
);
2040 case NOTE_INSN_EPILOGUE_BEG
:
2041 (*targetm
.asm_out
.function_begin_epilogue
) (file
);
2044 case NOTE_INSN_FUNCTION_BEG
:
2046 (*debug_hooks
->end_prologue
) (last_linenum
);
2049 case NOTE_INSN_BLOCK_BEG
:
2050 if (debug_info_level
== DINFO_LEVEL_NORMAL
2051 || debug_info_level
== DINFO_LEVEL_VERBOSE
2052 || write_symbols
== DWARF_DEBUG
2053 || write_symbols
== DWARF2_DEBUG
2054 || write_symbols
== VMS_AND_DWARF2_DEBUG
2055 || write_symbols
== VMS_DEBUG
)
2057 int n
= BLOCK_NUMBER (NOTE_BLOCK (insn
));
2061 high_block_linenum
= last_linenum
;
2063 /* Output debugging info about the symbol-block beginning. */
2064 (*debug_hooks
->begin_block
) (last_linenum
, n
);
2066 /* Mark this block as output. */
2067 TREE_ASM_WRITTEN (NOTE_BLOCK (insn
)) = 1;
2071 case NOTE_INSN_BLOCK_END
:
2072 if (debug_info_level
== DINFO_LEVEL_NORMAL
2073 || debug_info_level
== DINFO_LEVEL_VERBOSE
2074 || write_symbols
== DWARF_DEBUG
2075 || write_symbols
== DWARF2_DEBUG
2076 || write_symbols
== VMS_AND_DWARF2_DEBUG
2077 || write_symbols
== VMS_DEBUG
)
2079 int n
= BLOCK_NUMBER (NOTE_BLOCK (insn
));
2083 /* End of a symbol-block. */
2085 if (block_depth
< 0)
2088 (*debug_hooks
->end_block
) (high_block_linenum
, n
);
2092 case NOTE_INSN_DELETED_LABEL
:
2093 /* Emit the label. We may have deleted the CODE_LABEL because
2094 the label could be proved to be unreachable, though still
2095 referenced (in the form of having its address taken. */
2096 ASM_OUTPUT_DEBUG_LABEL (file
, "L", CODE_LABEL_NUMBER (insn
));
2103 if (NOTE_LINE_NUMBER (insn
) <= 0)
2106 /* This note is a line-number. */
2111 /* If there is anything real after this note, output it.
2112 If another line note follows, omit this one. */
2113 for (note
= NEXT_INSN (insn
); note
; note
= NEXT_INSN (note
))
2115 if (GET_CODE (note
) != NOTE
&& GET_CODE (note
) != CODE_LABEL
)
2118 /* These types of notes can be significant
2119 so make sure the preceding line number stays. */
2120 else if (GET_CODE (note
) == NOTE
2121 && (NOTE_LINE_NUMBER (note
) == NOTE_INSN_BLOCK_BEG
2122 || NOTE_LINE_NUMBER (note
) == NOTE_INSN_BLOCK_END
2123 || NOTE_LINE_NUMBER (note
) == NOTE_INSN_FUNCTION_BEG
))
2125 else if (GET_CODE (note
) == NOTE
&& NOTE_LINE_NUMBER (note
) > 0)
2127 /* Another line note follows; we can delete this note
2128 if no intervening line numbers have notes elsewhere. */
2130 for (num
= NOTE_LINE_NUMBER (insn
) + 1;
2131 num
< NOTE_LINE_NUMBER (note
);
2133 if (line_note_exists
[num
])
2136 if (num
>= NOTE_LINE_NUMBER (note
))
2142 /* Output this line note if it is the first or the last line
2146 notice_source_line (insn
);
2147 (*debug_hooks
->source_line
) (last_linenum
, last_filename
);
2155 #if defined (DWARF2_UNWIND_INFO)
2156 if (dwarf2out_do_frame ())
2157 dwarf2out_frame_debug (insn
);
2162 /* The target port might emit labels in the output function for
2163 some insn, e.g. sh.c output_branchy_insn. */
2164 if (CODE_LABEL_NUMBER (insn
) <= max_labelno
)
2166 int align
= LABEL_TO_ALIGNMENT (insn
);
2167 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2168 int max_skip
= LABEL_TO_MAX_SKIP (insn
);
2171 if (align
&& NEXT_INSN (insn
))
2173 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2174 ASM_OUTPUT_MAX_SKIP_ALIGN (file
, align
, max_skip
);
2176 ASM_OUTPUT_ALIGN (file
, align
);
2182 /* If this label is reached from only one place, set the condition
2183 codes from the instruction just before the branch. */
2185 /* Disabled because some insns set cc_status in the C output code
2186 and NOTICE_UPDATE_CC alone can set incorrect status. */
2187 if (0 /* optimize && LABEL_NUSES (insn) == 1*/)
2189 rtx jump
= LABEL_REFS (insn
);
2190 rtx barrier
= prev_nonnote_insn (insn
);
2192 /* If the LABEL_REFS field of this label has been set to point
2193 at a branch, the predecessor of the branch is a regular
2194 insn, and that branch is the only way to reach this label,
2195 set the condition codes based on the branch and its
2197 if (barrier
&& GET_CODE (barrier
) == BARRIER
2198 && jump
&& GET_CODE (jump
) == JUMP_INSN
2199 && (prev
= prev_nonnote_insn (jump
))
2200 && GET_CODE (prev
) == INSN
)
2202 NOTICE_UPDATE_CC (PATTERN (prev
), prev
);
2203 NOTICE_UPDATE_CC (PATTERN (jump
), jump
);
2211 #ifdef FINAL_PRESCAN_LABEL
2212 FINAL_PRESCAN_INSN (insn
, NULL
, 0);
2215 if (LABEL_NAME (insn
))
2216 (*debug_hooks
->label
) (insn
);
2220 fputs (ASM_APP_OFF
, file
);
2223 if (NEXT_INSN (insn
) != 0
2224 && GET_CODE (NEXT_INSN (insn
)) == JUMP_INSN
)
2226 rtx nextbody
= PATTERN (NEXT_INSN (insn
));
2228 /* If this label is followed by a jump-table,
2229 make sure we put the label in the read-only section. Also
2230 possibly write the label and jump table together. */
2232 if (GET_CODE (nextbody
) == ADDR_VEC
2233 || GET_CODE (nextbody
) == ADDR_DIFF_VEC
)
2235 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2236 /* In this case, the case vector is being moved by the
2237 target, so don't output the label at all. Leave that
2238 to the back end macros. */
2240 if (! JUMP_TABLES_IN_TEXT_SECTION
)
2244 readonly_data_section ();
2246 #ifdef ADDR_VEC_ALIGN
2247 log_align
= ADDR_VEC_ALIGN (NEXT_INSN (insn
));
2249 log_align
= exact_log2 (BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
);
2251 ASM_OUTPUT_ALIGN (file
, log_align
);
2254 function_section (current_function_decl
);
2256 #ifdef ASM_OUTPUT_CASE_LABEL
2257 ASM_OUTPUT_CASE_LABEL (file
, "L", CODE_LABEL_NUMBER (insn
),
2260 if (LABEL_ALTERNATE_NAME (insn
))
2261 ASM_OUTPUT_ALTERNATE_LABEL_NAME (file
, insn
);
2263 ASM_OUTPUT_INTERNAL_LABEL (file
, "L", CODE_LABEL_NUMBER (insn
));
2269 if (LABEL_ALTERNATE_NAME (insn
))
2270 ASM_OUTPUT_ALTERNATE_LABEL_NAME (file
, insn
);
2272 ASM_OUTPUT_INTERNAL_LABEL (file
, "L", CODE_LABEL_NUMBER (insn
));
2277 rtx body
= PATTERN (insn
);
2278 int insn_code_number
;
2279 const char *template;
2282 /* An INSN, JUMP_INSN or CALL_INSN.
2283 First check for special kinds that recog doesn't recognize. */
2285 if (GET_CODE (body
) == USE
/* These are just declarations */
2286 || GET_CODE (body
) == CLOBBER
)
2290 /* If there is a REG_CC_SETTER note on this insn, it means that
2291 the setting of the condition code was done in the delay slot
2292 of the insn that branched here. So recover the cc status
2293 from the insn that set it. */
2295 note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
2298 NOTICE_UPDATE_CC (PATTERN (XEXP (note
, 0)), XEXP (note
, 0));
2299 cc_prev_status
= cc_status
;
2303 /* Detect insns that are really jump-tables
2304 and output them as such. */
2306 if (GET_CODE (body
) == ADDR_VEC
|| GET_CODE (body
) == ADDR_DIFF_VEC
)
2308 #if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC))
2317 fputs (ASM_APP_OFF
, file
);
2321 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2322 if (GET_CODE (body
) == ADDR_VEC
)
2324 #ifdef ASM_OUTPUT_ADDR_VEC
2325 ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn
), body
);
2332 #ifdef ASM_OUTPUT_ADDR_DIFF_VEC
2333 ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn
), body
);
2339 vlen
= XVECLEN (body
, GET_CODE (body
) == ADDR_DIFF_VEC
);
2340 for (idx
= 0; idx
< vlen
; idx
++)
2342 if (GET_CODE (body
) == ADDR_VEC
)
2344 #ifdef ASM_OUTPUT_ADDR_VEC_ELT
2345 ASM_OUTPUT_ADDR_VEC_ELT
2346 (file
, CODE_LABEL_NUMBER (XEXP (XVECEXP (body
, 0, idx
), 0)));
2353 #ifdef ASM_OUTPUT_ADDR_DIFF_ELT
2354 ASM_OUTPUT_ADDR_DIFF_ELT
2357 CODE_LABEL_NUMBER (XEXP (XVECEXP (body
, 1, idx
), 0)),
2358 CODE_LABEL_NUMBER (XEXP (XEXP (body
, 0), 0)));
2364 #ifdef ASM_OUTPUT_CASE_END
2365 ASM_OUTPUT_CASE_END (file
,
2366 CODE_LABEL_NUMBER (PREV_INSN (insn
)),
2371 function_section (current_function_decl
);
2376 if (GET_CODE (body
) == ASM_INPUT
)
2378 const char *string
= XSTR (body
, 0);
2380 /* There's no telling what that did to the condition codes. */
2389 fputs (ASM_APP_ON
, file
);
2392 fprintf (asm_out_file
, "\t%s\n", string
);
2397 /* Detect `asm' construct with operands. */
2398 if (asm_noperands (body
) >= 0)
2400 unsigned int noperands
= asm_noperands (body
);
2401 rtx
*ops
= (rtx
*) alloca (noperands
* sizeof (rtx
));
2404 /* There's no telling what that did to the condition codes. */
2409 /* Get out the operand values. */
2410 string
= decode_asm_operands (body
, ops
, NULL
, NULL
, NULL
);
2411 /* Inhibit aborts on what would otherwise be compiler bugs. */
2412 insn_noperands
= noperands
;
2413 this_is_asm_operands
= insn
;
2415 /* Output the insn using them. */
2420 fputs (ASM_APP_ON
, file
);
2423 output_asm_insn (string
, ops
);
2426 this_is_asm_operands
= 0;
2430 if (prescan
<= 0 && app_on
)
2432 fputs (ASM_APP_OFF
, file
);
2436 if (GET_CODE (body
) == SEQUENCE
)
2438 /* A delayed-branch sequence */
2444 final_sequence
= body
;
2446 /* The first insn in this SEQUENCE might be a JUMP_INSN that will
2447 force the restoration of a comparison that was previously
2448 thought unnecessary. If that happens, cancel this sequence
2449 and cause that insn to be restored. */
2451 next
= final_scan_insn (XVECEXP (body
, 0, 0), file
, 0, prescan
, 1);
2452 if (next
!= XVECEXP (body
, 0, 1))
2458 for (i
= 1; i
< XVECLEN (body
, 0); i
++)
2460 rtx insn
= XVECEXP (body
, 0, i
);
2461 rtx next
= NEXT_INSN (insn
);
2462 /* We loop in case any instruction in a delay slot gets
2465 insn
= final_scan_insn (insn
, file
, 0, prescan
, 1);
2466 while (insn
!= next
);
2468 #ifdef DBR_OUTPUT_SEQEND
2469 DBR_OUTPUT_SEQEND (file
);
2473 /* If the insn requiring the delay slot was a CALL_INSN, the
2474 insns in the delay slot are actually executed before the
2475 called function. Hence we don't preserve any CC-setting
2476 actions in these insns and the CC must be marked as being
2477 clobbered by the function. */
2478 if (GET_CODE (XVECEXP (body
, 0, 0)) == CALL_INSN
)
2485 /* We have a real machine instruction as rtl. */
2487 body
= PATTERN (insn
);
2490 set
= single_set (insn
);
2492 /* Check for redundant test and compare instructions
2493 (when the condition codes are already set up as desired).
2494 This is done only when optimizing; if not optimizing,
2495 it should be possible for the user to alter a variable
2496 with the debugger in between statements
2497 and the next statement should reexamine the variable
2498 to compute the condition codes. */
2503 rtx set
= single_set (insn
);
2507 && GET_CODE (SET_DEST (set
)) == CC0
2508 && insn
!= last_ignored_compare
)
2510 if (GET_CODE (SET_SRC (set
)) == SUBREG
)
2511 SET_SRC (set
) = alter_subreg (&SET_SRC (set
));
2512 else if (GET_CODE (SET_SRC (set
)) == COMPARE
)
2514 if (GET_CODE (XEXP (SET_SRC (set
), 0)) == SUBREG
)
2515 XEXP (SET_SRC (set
), 0)
2516 = alter_subreg (&XEXP (SET_SRC (set
), 0));
2517 if (GET_CODE (XEXP (SET_SRC (set
), 1)) == SUBREG
)
2518 XEXP (SET_SRC (set
), 1)
2519 = alter_subreg (&XEXP (SET_SRC (set
), 1));
2521 if ((cc_status
.value1
!= 0
2522 && rtx_equal_p (SET_SRC (set
), cc_status
.value1
))
2523 || (cc_status
.value2
!= 0
2524 && rtx_equal_p (SET_SRC (set
), cc_status
.value2
)))
2526 /* Don't delete insn if it has an addressing side-effect. */
2527 if (! FIND_REG_INC_NOTE (insn
, NULL_RTX
)
2528 /* or if anything in it is volatile. */
2529 && ! volatile_refs_p (PATTERN (insn
)))
2531 /* We don't really delete the insn; just ignore it. */
2532 last_ignored_compare
= insn
;
2541 /* Don't bother outputting obvious no-ops, even without -O.
2542 This optimization is fast and doesn't interfere with debugging.
2543 Don't do this if the insn is in a delay slot, since this
2544 will cause an improper number of delay insns to be written. */
2545 if (final_sequence
== 0
2547 && GET_CODE (insn
) == INSN
&& GET_CODE (body
) == SET
2548 && GET_CODE (SET_SRC (body
)) == REG
2549 && GET_CODE (SET_DEST (body
)) == REG
2550 && REGNO (SET_SRC (body
)) == REGNO (SET_DEST (body
)))
2555 /* If this is a conditional branch, maybe modify it
2556 if the cc's are in a nonstandard state
2557 so that it accomplishes the same thing that it would
2558 do straightforwardly if the cc's were set up normally. */
2560 if (cc_status
.flags
!= 0
2561 && GET_CODE (insn
) == JUMP_INSN
2562 && GET_CODE (body
) == SET
2563 && SET_DEST (body
) == pc_rtx
2564 && GET_CODE (SET_SRC (body
)) == IF_THEN_ELSE
2565 && GET_RTX_CLASS (GET_CODE (XEXP (SET_SRC (body
), 0))) == '<'
2566 && XEXP (XEXP (SET_SRC (body
), 0), 0) == cc0_rtx
2567 /* This is done during prescan; it is not done again
2568 in final scan when prescan has been done. */
2571 /* This function may alter the contents of its argument
2572 and clear some of the cc_status.flags bits.
2573 It may also return 1 meaning condition now always true
2574 or -1 meaning condition now always false
2575 or 2 meaning condition nontrivial but altered. */
2576 int result
= alter_cond (XEXP (SET_SRC (body
), 0));
2577 /* If condition now has fixed value, replace the IF_THEN_ELSE
2578 with its then-operand or its else-operand. */
2580 SET_SRC (body
) = XEXP (SET_SRC (body
), 1);
2582 SET_SRC (body
) = XEXP (SET_SRC (body
), 2);
2584 /* The jump is now either unconditional or a no-op.
2585 If it has become a no-op, don't try to output it.
2586 (It would not be recognized.) */
2587 if (SET_SRC (body
) == pc_rtx
)
2592 else if (GET_CODE (SET_SRC (body
)) == RETURN
)
2593 /* Replace (set (pc) (return)) with (return). */
2594 PATTERN (insn
) = body
= SET_SRC (body
);
2596 /* Rerecognize the instruction if it has changed. */
2598 INSN_CODE (insn
) = -1;
2601 /* Make same adjustments to instructions that examine the
2602 condition codes without jumping and instructions that
2603 handle conditional moves (if this machine has either one). */
2605 if (cc_status
.flags
!= 0
2608 rtx cond_rtx
, then_rtx
, else_rtx
;
2610 if (GET_CODE (insn
) != JUMP_INSN
2611 && GET_CODE (SET_SRC (set
)) == IF_THEN_ELSE
)
2613 cond_rtx
= XEXP (SET_SRC (set
), 0);
2614 then_rtx
= XEXP (SET_SRC (set
), 1);
2615 else_rtx
= XEXP (SET_SRC (set
), 2);
2619 cond_rtx
= SET_SRC (set
);
2620 then_rtx
= const_true_rtx
;
2621 else_rtx
= const0_rtx
;
2624 switch (GET_CODE (cond_rtx
))
2638 if (XEXP (cond_rtx
, 0) != cc0_rtx
)
2640 result
= alter_cond (cond_rtx
);
2642 validate_change (insn
, &SET_SRC (set
), then_rtx
, 0);
2643 else if (result
== -1)
2644 validate_change (insn
, &SET_SRC (set
), else_rtx
, 0);
2645 else if (result
== 2)
2646 INSN_CODE (insn
) = -1;
2647 if (SET_DEST (set
) == SET_SRC (set
))
2659 #ifdef HAVE_peephole
2660 /* Do machine-specific peephole optimizations if desired. */
2662 if (optimize
&& !flag_no_peephole
&& !nopeepholes
)
2664 rtx next
= peephole (insn
);
2665 /* When peepholing, if there were notes within the peephole,
2666 emit them before the peephole. */
2667 if (next
!= 0 && next
!= NEXT_INSN (insn
))
2669 rtx prev
= PREV_INSN (insn
);
2671 for (note
= NEXT_INSN (insn
); note
!= next
;
2672 note
= NEXT_INSN (note
))
2673 final_scan_insn (note
, file
, optimize
, prescan
, nopeepholes
);
2675 /* In case this is prescan, put the notes
2676 in proper position for later rescan. */
2677 note
= NEXT_INSN (insn
);
2678 PREV_INSN (note
) = prev
;
2679 NEXT_INSN (prev
) = note
;
2680 NEXT_INSN (PREV_INSN (next
)) = insn
;
2681 PREV_INSN (insn
) = PREV_INSN (next
);
2682 NEXT_INSN (insn
) = next
;
2683 PREV_INSN (next
) = insn
;
2686 /* PEEPHOLE might have changed this. */
2687 body
= PATTERN (insn
);
2691 /* Try to recognize the instruction.
2692 If successful, verify that the operands satisfy the
2693 constraints for the instruction. Crash if they don't,
2694 since `reload' should have changed them so that they do. */
2696 insn_code_number
= recog_memoized (insn
);
2697 cleanup_subreg_operands (insn
);
2699 /* Dump the insn in the assembly for debugging. */
2700 if (flag_dump_rtl_in_asm
)
2702 print_rtx_head
= ASM_COMMENT_START
;
2703 print_rtl_single (asm_out_file
, insn
);
2704 print_rtx_head
= "";
2707 if (! constrain_operands_cached (1))
2708 fatal_insn_not_found (insn
);
2710 /* Some target machines need to prescan each insn before
2713 #ifdef FINAL_PRESCAN_INSN
2714 FINAL_PRESCAN_INSN (insn
, recog_data
.operand
, recog_data
.n_operands
);
2717 #ifdef HAVE_conditional_execution
2718 if (GET_CODE (PATTERN (insn
)) == COND_EXEC
)
2719 current_insn_predicate
= COND_EXEC_TEST (PATTERN (insn
));
2721 current_insn_predicate
= NULL_RTX
;
2725 cc_prev_status
= cc_status
;
2727 /* Update `cc_status' for this instruction.
2728 The instruction's output routine may change it further.
2729 If the output routine for a jump insn needs to depend
2730 on the cc status, it should look at cc_prev_status. */
2732 NOTICE_UPDATE_CC (body
, insn
);
2735 current_output_insn
= debug_insn
= insn
;
2737 #if defined (DWARF2_UNWIND_INFO)
2738 if (GET_CODE (insn
) == CALL_INSN
&& dwarf2out_do_frame ())
2739 dwarf2out_frame_debug (insn
);
2742 /* Find the proper template for this insn. */
2743 template = get_insn_template (insn_code_number
, insn
);
2745 /* If the C code returns 0, it means that it is a jump insn
2746 which follows a deleted test insn, and that test insn
2747 needs to be reinserted. */
2752 if (prev_nonnote_insn (insn
) != last_ignored_compare
)
2756 /* We have already processed the notes between the setter and
2757 the user. Make sure we don't process them again, this is
2758 particularly important if one of the notes is a block
2759 scope note or an EH note. */
2761 prev
!= last_ignored_compare
;
2762 prev
= PREV_INSN (prev
))
2764 if (GET_CODE (prev
) == NOTE
)
2765 delete_insn (prev
); /* Use delete_note. */
2771 /* If the template is the string "#", it means that this insn must
2773 if (template[0] == '#' && template[1] == '\0')
2775 rtx
new = try_split (body
, insn
, 0);
2777 /* If we didn't split the insn, go away. */
2778 if (new == insn
&& PATTERN (new) == body
)
2779 fatal_insn ("could not split insn", insn
);
2781 #ifdef HAVE_ATTR_length
2782 /* This instruction should have been split in shorten_branches,
2783 to ensure that we would have valid length info for the
2795 #ifdef IA64_UNWIND_INFO
2796 IA64_UNWIND_EMIT (asm_out_file
, insn
);
2798 /* Output assembler code from the template. */
2800 output_asm_insn (template, recog_data
.operand
);
2802 #if defined (DWARF2_UNWIND_INFO)
2803 #if defined (HAVE_prologue)
2804 if (GET_CODE (insn
) == INSN
&& dwarf2out_do_frame ())
2805 dwarf2out_frame_debug (insn
);
2807 if (!ACCUMULATE_OUTGOING_ARGS
2808 && GET_CODE (insn
) == INSN
2809 && dwarf2out_do_frame ())
2810 dwarf2out_frame_debug (insn
);
2815 /* It's not at all clear why we did this and doing so interferes
2816 with tests we'd like to do to use REG_WAS_0 notes, so let's try
2819 /* Mark this insn as having been output. */
2820 INSN_DELETED_P (insn
) = 1;
2823 /* Emit information for vtable gc. */
2824 note
= find_reg_note (insn
, REG_VTABLE_REF
, NULL_RTX
);
2826 assemble_vtable_entry (XEXP (XEXP (note
, 0), 0),
2827 INTVAL (XEXP (XEXP (note
, 0), 1)));
2829 current_output_insn
= debug_insn
= 0;
2832 return NEXT_INSN (insn
);
2835 /* Output debugging info to the assembler file FILE
2836 based on the NOTE-insn INSN, assumed to be a line number. */
2839 notice_source_line (insn
)
2842 const char *filename
= NOTE_SOURCE_FILE (insn
);
2844 last_filename
= filename
;
2845 last_linenum
= NOTE_LINE_NUMBER (insn
);
2846 high_block_linenum
= MAX (last_linenum
, high_block_linenum
);
2847 high_function_linenum
= MAX (last_linenum
, high_function_linenum
);
2850 /* For each operand in INSN, simplify (subreg (reg)) so that it refers
2851 directly to the desired hard register. */
2854 cleanup_subreg_operands (insn
)
2858 extract_insn_cached (insn
);
2859 for (i
= 0; i
< recog_data
.n_operands
; i
++)
2861 /* The following test cannot use recog_data.operand when tesing
2862 for a SUBREG: the underlying object might have been changed
2863 already if we are inside a match_operator expression that
2864 matches the else clause. Instead we test the underlying
2865 expression directly. */
2866 if (GET_CODE (*recog_data
.operand_loc
[i
]) == SUBREG
)
2867 recog_data
.operand
[i
] = alter_subreg (recog_data
.operand_loc
[i
]);
2868 else if (GET_CODE (recog_data
.operand
[i
]) == PLUS
2869 || GET_CODE (recog_data
.operand
[i
]) == MULT
2870 || GET_CODE (recog_data
.operand
[i
]) == MEM
)
2871 recog_data
.operand
[i
] = walk_alter_subreg (recog_data
.operand_loc
[i
]);
2874 for (i
= 0; i
< recog_data
.n_dups
; i
++)
2876 if (GET_CODE (*recog_data
.dup_loc
[i
]) == SUBREG
)
2877 *recog_data
.dup_loc
[i
] = alter_subreg (recog_data
.dup_loc
[i
]);
2878 else if (GET_CODE (*recog_data
.dup_loc
[i
]) == PLUS
2879 || GET_CODE (*recog_data
.dup_loc
[i
]) == MULT
2880 || GET_CODE (*recog_data
.dup_loc
[i
]) == MEM
)
2881 *recog_data
.dup_loc
[i
] = walk_alter_subreg (recog_data
.dup_loc
[i
]);
2885 /* If X is a SUBREG, replace it with a REG or a MEM,
2886 based on the thing it is a subreg of. */
2893 rtx y
= SUBREG_REG (x
);
2895 /* simplify_subreg does not remove subreg from volatile references.
2896 We are required to. */
2897 if (GET_CODE (y
) == MEM
)
2898 *xp
= adjust_address (y
, GET_MODE (x
), SUBREG_BYTE (x
));
2901 rtx
new = simplify_subreg (GET_MODE (x
), y
, GET_MODE (y
),
2906 /* Simplify_subreg can't handle some REG cases, but we have to. */
2907 else if (GET_CODE (y
) == REG
)
2909 unsigned int regno
= subreg_hard_regno (x
, 1);
2912 ORIGINAL_REGNO (x
) = ORIGINAL_REGNO (y
);
2913 /* This field has a different meaning for REGs and SUBREGs. Make
2914 sure to clear it! */
2915 RTX_FLAG (x
, used
) = 0;
2924 /* Do alter_subreg on all the SUBREGs contained in X. */
2927 walk_alter_subreg (xp
)
2931 switch (GET_CODE (x
))
2935 XEXP (x
, 0) = walk_alter_subreg (&XEXP (x
, 0));
2936 XEXP (x
, 1) = walk_alter_subreg (&XEXP (x
, 1));
2940 XEXP (x
, 0) = walk_alter_subreg (&XEXP (x
, 0));
2944 return alter_subreg (xp
);
2955 /* Given BODY, the body of a jump instruction, alter the jump condition
2956 as required by the bits that are set in cc_status.flags.
2957 Not all of the bits there can be handled at this level in all cases.
2959 The value is normally 0.
2960 1 means that the condition has become always true.
2961 -1 means that the condition has become always false.
2962 2 means that COND has been altered. */
2970 if (cc_status
.flags
& CC_REVERSED
)
2973 PUT_CODE (cond
, swap_condition (GET_CODE (cond
)));
2976 if (cc_status
.flags
& CC_INVERTED
)
2979 PUT_CODE (cond
, reverse_condition (GET_CODE (cond
)));
2982 if (cc_status
.flags
& CC_NOT_POSITIVE
)
2983 switch (GET_CODE (cond
))
2988 /* Jump becomes unconditional. */
2994 /* Jump becomes no-op. */
2998 PUT_CODE (cond
, EQ
);
3003 PUT_CODE (cond
, NE
);
3011 if (cc_status
.flags
& CC_NOT_NEGATIVE
)
3012 switch (GET_CODE (cond
))
3016 /* Jump becomes unconditional. */
3021 /* Jump becomes no-op. */
3026 PUT_CODE (cond
, EQ
);
3032 PUT_CODE (cond
, NE
);
3040 if (cc_status
.flags
& CC_NO_OVERFLOW
)
3041 switch (GET_CODE (cond
))
3044 /* Jump becomes unconditional. */
3048 PUT_CODE (cond
, EQ
);
3053 PUT_CODE (cond
, NE
);
3058 /* Jump becomes no-op. */
3065 if (cc_status
.flags
& (CC_Z_IN_NOT_N
| CC_Z_IN_N
))
3066 switch (GET_CODE (cond
))
3072 PUT_CODE (cond
, cc_status
.flags
& CC_Z_IN_N
? GE
: LT
);
3077 PUT_CODE (cond
, cc_status
.flags
& CC_Z_IN_N
? LT
: GE
);
3082 if (cc_status
.flags
& CC_NOT_SIGNED
)
3083 /* The flags are valid if signed condition operators are converted
3085 switch (GET_CODE (cond
))
3088 PUT_CODE (cond
, LEU
);
3093 PUT_CODE (cond
, LTU
);
3098 PUT_CODE (cond
, GTU
);
3103 PUT_CODE (cond
, GEU
);
3115 /* Report inconsistency between the assembler template and the operands.
3116 In an `asm', it's the user's fault; otherwise, the compiler's fault. */
3119 output_operand_lossage
VPARAMS ((const char *msgid
, ...))
3123 const char *pfx_str
;
3124 VA_OPEN (ap
, msgid
);
3125 VA_FIXEDARG (ap
, const char *, msgid
);
3127 pfx_str
= this_is_asm_operands
? _("invalid `asm': ") : "output_operand: ";
3128 asprintf (&fmt_string
, "%s%s", pfx_str
, _(msgid
));
3129 vasprintf (&new_message
, fmt_string
, ap
);
3131 if (this_is_asm_operands
)
3132 error_for_asm (this_is_asm_operands
, "%s", new_message
);
3134 internal_error ("%s", new_message
);
3141 /* Output of assembler code from a template, and its subroutines. */
3143 /* Annotate the assembly with a comment describing the pattern and
3144 alternative used. */
3151 int num
= INSN_CODE (debug_insn
);
3152 fprintf (asm_out_file
, "\t%s %d\t%s",
3153 ASM_COMMENT_START
, INSN_UID (debug_insn
),
3154 insn_data
[num
].name
);
3155 if (insn_data
[num
].n_alternatives
> 1)
3156 fprintf (asm_out_file
, "/%d", which_alternative
+ 1);
3157 #ifdef HAVE_ATTR_length
3158 fprintf (asm_out_file
, "\t[length = %d]",
3159 get_attr_length (debug_insn
));
3161 /* Clear this so only the first assembler insn
3162 of any rtl insn will get the special comment for -dp. */
3167 /* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it
3168 or its address, return that expr . Set *PADDRESSP to 1 if the expr
3169 corresponds to the address of the object and 0 if to the object. */
3172 get_mem_expr_from_op (op
, paddressp
)
3181 if (GET_CODE (op
) == REG
&& ORIGINAL_REGNO (op
) >= FIRST_PSEUDO_REGISTER
)
3182 return REGNO_DECL (ORIGINAL_REGNO (op
));
3183 else if (GET_CODE (op
) != MEM
)
3186 if (MEM_EXPR (op
) != 0)
3187 return MEM_EXPR (op
);
3189 /* Otherwise we have an address, so indicate it and look at the address. */
3193 /* First check if we have a decl for the address, then look at the right side
3194 if it is a PLUS. Otherwise, strip off arithmetic and keep looking.
3195 But don't allow the address to itself be indirect. */
3196 if ((expr
= get_mem_expr_from_op (op
, &inner_addressp
)) && ! inner_addressp
)
3198 else if (GET_CODE (op
) == PLUS
3199 && (expr
= get_mem_expr_from_op (XEXP (op
, 1), &inner_addressp
)))
3202 while (GET_RTX_CLASS (GET_CODE (op
)) == '1'
3203 || GET_RTX_CLASS (GET_CODE (op
)) == '2')
3206 expr
= get_mem_expr_from_op (op
, &inner_addressp
);
3207 return inner_addressp
? 0 : expr
;
3210 /* Output operand names for assembler instructions. OPERANDS is the
3211 operand vector, OPORDER is the order to write the operands, and NOPS
3212 is the number of operands to write. */
3215 output_asm_operand_names (operands
, oporder
, nops
)
3223 for (i
= 0; i
< nops
; i
++)
3226 tree expr
= get_mem_expr_from_op (operands
[oporder
[i
]], &addressp
);
3230 fprintf (asm_out_file
, "%c%s %s",
3231 wrote
? ',' : '\t', wrote
? "" : ASM_COMMENT_START
,
3232 addressp
? "*" : "");
3233 print_mem_expr (asm_out_file
, expr
);
3239 /* Output text from TEMPLATE to the assembler output file,
3240 obeying %-directions to substitute operands taken from
3241 the vector OPERANDS.
3243 %N (for N a digit) means print operand N in usual manner.
3244 %lN means require operand N to be a CODE_LABEL or LABEL_REF
3245 and print the label name with no punctuation.
3246 %cN means require operand N to be a constant
3247 and print the constant expression with no punctuation.
3248 %aN means expect operand N to be a memory address
3249 (not a memory reference!) and print a reference
3251 %nN means expect operand N to be a constant
3252 and print a constant expression for minus the value
3253 of the operand, with no other punctuation. */
3256 output_asm_insn (template, operands
)
3257 const char *template;
3262 #ifdef ASSEMBLER_DIALECT
3265 int oporder
[MAX_RECOG_OPERANDS
];
3266 char opoutput
[MAX_RECOG_OPERANDS
];
3269 /* An insn may return a null string template
3270 in a case where no assembler code is needed. */
3274 memset (opoutput
, 0, sizeof opoutput
);
3276 putc ('\t', asm_out_file
);
3278 #ifdef ASM_OUTPUT_OPCODE
3279 ASM_OUTPUT_OPCODE (asm_out_file
, p
);
3286 if (flag_verbose_asm
)
3287 output_asm_operand_names (operands
, oporder
, ops
);
3288 if (flag_print_asm_name
)
3292 memset (opoutput
, 0, sizeof opoutput
);
3294 putc (c
, asm_out_file
);
3295 #ifdef ASM_OUTPUT_OPCODE
3296 while ((c
= *p
) == '\t')
3298 putc (c
, asm_out_file
);
3301 ASM_OUTPUT_OPCODE (asm_out_file
, p
);
3305 #ifdef ASSEMBLER_DIALECT
3311 output_operand_lossage ("nested assembly dialect alternatives");
3315 /* If we want the first dialect, do nothing. Otherwise, skip
3316 DIALECT_NUMBER of strings ending with '|'. */
3317 for (i
= 0; i
< dialect_number
; i
++)
3319 while (*p
&& *p
!= '}' && *p
++ != '|')
3328 output_operand_lossage ("unterminated assembly dialect alternative");
3335 /* Skip to close brace. */
3340 output_operand_lossage ("unterminated assembly dialect alternative");
3344 while (*p
++ != '}');
3348 putc (c
, asm_out_file
);
3353 putc (c
, asm_out_file
);
3359 /* %% outputs a single %. */
3363 putc (c
, asm_out_file
);
3365 /* %= outputs a number which is unique to each insn in the entire
3366 compilation. This is useful for making local labels that are
3367 referred to more than once in a given insn. */
3371 fprintf (asm_out_file
, "%d", insn_counter
);
3373 /* % followed by a letter and some digits
3374 outputs an operand in a special way depending on the letter.
3375 Letters `acln' are implemented directly.
3376 Other letters are passed to `output_operand' so that
3377 the PRINT_OPERAND macro can define them. */
3378 else if (ISALPHA (*p
))
3384 output_operand_lossage ("operand number missing after %%-letter");
3385 else if (this_is_asm_operands
3386 && (c
< 0 || (unsigned int) c
>= insn_noperands
))
3387 output_operand_lossage ("operand number out of range");
3388 else if (letter
== 'l')
3389 output_asm_label (operands
[c
]);
3390 else if (letter
== 'a')
3391 output_address (operands
[c
]);
3392 else if (letter
== 'c')
3394 if (CONSTANT_ADDRESS_P (operands
[c
]))
3395 output_addr_const (asm_out_file
, operands
[c
]);
3397 output_operand (operands
[c
], 'c');
3399 else if (letter
== 'n')
3401 if (GET_CODE (operands
[c
]) == CONST_INT
)
3402 fprintf (asm_out_file
, HOST_WIDE_INT_PRINT_DEC
,
3403 - INTVAL (operands
[c
]));
3406 putc ('-', asm_out_file
);
3407 output_addr_const (asm_out_file
, operands
[c
]);
3411 output_operand (operands
[c
], letter
);
3417 while (ISDIGIT (c
= *p
))
3420 /* % followed by a digit outputs an operand the default way. */
3421 else if (ISDIGIT (*p
))
3424 if (this_is_asm_operands
3425 && (c
< 0 || (unsigned int) c
>= insn_noperands
))
3426 output_operand_lossage ("operand number out of range");
3428 output_operand (operands
[c
], 0);
3434 while (ISDIGIT (c
= *p
))
3437 /* % followed by punctuation: output something for that
3438 punctuation character alone, with no operand.
3439 The PRINT_OPERAND macro decides what is actually done. */
3440 #ifdef PRINT_OPERAND_PUNCT_VALID_P
3441 else if (PRINT_OPERAND_PUNCT_VALID_P ((unsigned char) *p
))
3442 output_operand (NULL_RTX
, *p
++);
3445 output_operand_lossage ("invalid %%-code");
3449 putc (c
, asm_out_file
);
3452 /* Write out the variable names for operands, if we know them. */
3453 if (flag_verbose_asm
)
3454 output_asm_operand_names (operands
, oporder
, ops
);
3455 if (flag_print_asm_name
)
3458 putc ('\n', asm_out_file
);
3461 /* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */
3464 output_asm_label (x
)
3469 if (GET_CODE (x
) == LABEL_REF
)
3471 if (GET_CODE (x
) == CODE_LABEL
3472 || (GET_CODE (x
) == NOTE
3473 && NOTE_LINE_NUMBER (x
) == NOTE_INSN_DELETED_LABEL
))
3474 ASM_GENERATE_INTERNAL_LABEL (buf
, "L", CODE_LABEL_NUMBER (x
));
3476 output_operand_lossage ("`%%l' operand isn't a label");
3478 assemble_name (asm_out_file
, buf
);
3481 /* Print operand X using machine-dependent assembler syntax.
3482 The macro PRINT_OPERAND is defined just to control this function.
3483 CODE is a non-digit that preceded the operand-number in the % spec,
3484 such as 'z' if the spec was `%z3'. CODE is 0 if there was no char
3485 between the % and the digits.
3486 When CODE is a non-letter, X is 0.
3488 The meanings of the letters are machine-dependent and controlled
3489 by PRINT_OPERAND. */
3492 output_operand (x
, code
)
3494 int code ATTRIBUTE_UNUSED
;
3496 if (x
&& GET_CODE (x
) == SUBREG
)
3497 x
= alter_subreg (&x
);
3499 /* If X is a pseudo-register, abort now rather than writing trash to the
3502 if (x
&& GET_CODE (x
) == REG
&& REGNO (x
) >= FIRST_PSEUDO_REGISTER
)
3505 PRINT_OPERAND (asm_out_file
, x
, code
);
3508 /* Print a memory reference operand for address X
3509 using machine-dependent assembler syntax.
3510 The macro PRINT_OPERAND_ADDRESS exists just to control this function. */
3516 walk_alter_subreg (&x
);
3517 PRINT_OPERAND_ADDRESS (asm_out_file
, x
);
3520 /* Print an integer constant expression in assembler syntax.
3521 Addition and subtraction are the only arithmetic
3522 that may appear in these expressions. */
3525 output_addr_const (file
, x
)
3532 switch (GET_CODE (x
))
3539 #ifdef ASM_OUTPUT_SYMBOL_REF
3540 ASM_OUTPUT_SYMBOL_REF (file
, x
);
3542 assemble_name (file
, XSTR (x
, 0));
3550 ASM_GENERATE_INTERNAL_LABEL (buf
, "L", CODE_LABEL_NUMBER (x
));
3551 #ifdef ASM_OUTPUT_LABEL_REF
3552 ASM_OUTPUT_LABEL_REF (file
, buf
);
3554 assemble_name (file
, buf
);
3559 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, INTVAL (x
));
3563 /* This used to output parentheses around the expression,
3564 but that does not work on the 386 (either ATT or BSD assembler). */
3565 output_addr_const (file
, XEXP (x
, 0));
3569 if (GET_MODE (x
) == VOIDmode
)
3571 /* We can use %d if the number is one word and positive. */
3572 if (CONST_DOUBLE_HIGH (x
))
3573 fprintf (file
, HOST_WIDE_INT_PRINT_DOUBLE_HEX
,
3574 CONST_DOUBLE_HIGH (x
), CONST_DOUBLE_LOW (x
));
3575 else if (CONST_DOUBLE_LOW (x
) < 0)
3576 fprintf (file
, HOST_WIDE_INT_PRINT_HEX
, CONST_DOUBLE_LOW (x
));
3578 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, CONST_DOUBLE_LOW (x
));
3581 /* We can't handle floating point constants;
3582 PRINT_OPERAND must handle them. */
3583 output_operand_lossage ("floating constant misused");
3587 /* Some assemblers need integer constants to appear last (eg masm). */
3588 if (GET_CODE (XEXP (x
, 0)) == CONST_INT
)
3590 output_addr_const (file
, XEXP (x
, 1));
3591 if (INTVAL (XEXP (x
, 0)) >= 0)
3592 fprintf (file
, "+");
3593 output_addr_const (file
, XEXP (x
, 0));
3597 output_addr_const (file
, XEXP (x
, 0));
3598 if (GET_CODE (XEXP (x
, 1)) != CONST_INT
3599 || INTVAL (XEXP (x
, 1)) >= 0)
3600 fprintf (file
, "+");
3601 output_addr_const (file
, XEXP (x
, 1));
3606 /* Avoid outputting things like x-x or x+5-x,
3607 since some assemblers can't handle that. */
3608 x
= simplify_subtraction (x
);
3609 if (GET_CODE (x
) != MINUS
)
3612 output_addr_const (file
, XEXP (x
, 0));
3613 fprintf (file
, "-");
3614 if ((GET_CODE (XEXP (x
, 1)) == CONST_INT
&& INTVAL (XEXP (x
, 1)) >= 0)
3615 || GET_CODE (XEXP (x
, 1)) == PC
3616 || GET_CODE (XEXP (x
, 1)) == SYMBOL_REF
)
3617 output_addr_const (file
, XEXP (x
, 1));
3620 fputs (targetm
.asm_out
.open_paren
, file
);
3621 output_addr_const (file
, XEXP (x
, 1));
3622 fputs (targetm
.asm_out
.close_paren
, file
);
3629 output_addr_const (file
, XEXP (x
, 0));
3633 #ifdef OUTPUT_ADDR_CONST_EXTRA
3634 OUTPUT_ADDR_CONST_EXTRA (file
, x
, fail
);
3639 output_operand_lossage ("invalid expression as operand");
3643 /* A poor man's fprintf, with the added features of %I, %R, %L, and %U.
3644 %R prints the value of REGISTER_PREFIX.
3645 %L prints the value of LOCAL_LABEL_PREFIX.
3646 %U prints the value of USER_LABEL_PREFIX.
3647 %I prints the value of IMMEDIATE_PREFIX.
3648 %O runs ASM_OUTPUT_OPCODE to transform what follows in the string.
3649 Also supported are %d, %x, %s, %e, %f, %g and %%.
3651 We handle alternate assembler dialects here, just like output_asm_insn. */
3654 asm_fprintf
VPARAMS ((FILE *file
, const char *p
, ...))
3659 VA_OPEN (argptr
, p
);
3660 VA_FIXEDARG (argptr
, FILE *, file
);
3661 VA_FIXEDARG (argptr
, const char *, p
);
3668 #ifdef ASSEMBLER_DIALECT
3673 /* If we want the first dialect, do nothing. Otherwise, skip
3674 DIALECT_NUMBER of strings ending with '|'. */
3675 for (i
= 0; i
< dialect_number
; i
++)
3677 while (*p
&& *p
++ != '|')
3687 /* Skip to close brace. */
3688 while (*p
&& *p
++ != '}')
3699 while (ISDIGIT (c
) || c
== '.')
3707 fprintf (file
, "%%");
3710 case 'd': case 'i': case 'u':
3711 case 'x': case 'p': case 'X':
3715 fprintf (file
, buf
, va_arg (argptr
, int));
3719 /* This is a prefix to the 'd', 'i', 'u', 'x', 'p', and 'X' cases,
3720 but we do not check for those cases. It means that the value
3721 is a HOST_WIDE_INT, which may be either `int' or `long'. */
3723 #if HOST_BITS_PER_WIDE_INT == HOST_BITS_PER_INT
3725 #if HOST_BITS_PER_WIDE_INT == HOST_BITS_PER_LONG
3735 fprintf (file
, buf
, va_arg (argptr
, HOST_WIDE_INT
));
3742 fprintf (file
, buf
, va_arg (argptr
, long));
3750 fprintf (file
, buf
, va_arg (argptr
, double));
3756 fprintf (file
, buf
, va_arg (argptr
, char *));
3760 #ifdef ASM_OUTPUT_OPCODE
3761 ASM_OUTPUT_OPCODE (asm_out_file
, p
);
3766 #ifdef REGISTER_PREFIX
3767 fprintf (file
, "%s", REGISTER_PREFIX
);
3772 #ifdef IMMEDIATE_PREFIX
3773 fprintf (file
, "%s", IMMEDIATE_PREFIX
);
3778 #ifdef LOCAL_LABEL_PREFIX
3779 fprintf (file
, "%s", LOCAL_LABEL_PREFIX
);
3784 fputs (user_label_prefix
, file
);
3787 #ifdef ASM_FPRINTF_EXTENSIONS
3788 /* Upper case letters are reserved for general use by asm_fprintf
3789 and so are not available to target specific code. In order to
3790 prevent the ASM_FPRINTF_EXTENSIONS macro from using them then,
3791 they are defined here. As they get turned into real extensions
3792 to asm_fprintf they should be removed from this list. */
3793 case 'A': case 'B': case 'C': case 'D': case 'E':
3794 case 'F': case 'G': case 'H': case 'J': case 'K':
3795 case 'M': case 'N': case 'P': case 'Q': case 'S':
3796 case 'T': case 'V': case 'W': case 'Y': case 'Z':
3799 ASM_FPRINTF_EXTENSIONS (file
, argptr
, p
)
3812 /* Split up a CONST_DOUBLE or integer constant rtx
3813 into two rtx's for single words,
3814 storing in *FIRST the word that comes first in memory in the target
3815 and in *SECOND the other. */
3818 split_double (value
, first
, second
)
3820 rtx
*first
, *second
;
3822 if (GET_CODE (value
) == CONST_INT
)
3824 if (HOST_BITS_PER_WIDE_INT
>= (2 * BITS_PER_WORD
))
3826 /* In this case the CONST_INT holds both target words.
3827 Extract the bits from it into two word-sized pieces.
3828 Sign extend each half to HOST_WIDE_INT. */
3829 unsigned HOST_WIDE_INT low
, high
;
3830 unsigned HOST_WIDE_INT mask
, sign_bit
, sign_extend
;
3832 /* Set sign_bit to the most significant bit of a word. */
3834 sign_bit
<<= BITS_PER_WORD
- 1;
3836 /* Set mask so that all bits of the word are set. We could
3837 have used 1 << BITS_PER_WORD instead of basing the
3838 calculation on sign_bit. However, on machines where
3839 HOST_BITS_PER_WIDE_INT == BITS_PER_WORD, it could cause a
3840 compiler warning, even though the code would never be
3842 mask
= sign_bit
<< 1;
3845 /* Set sign_extend as any remaining bits. */
3846 sign_extend
= ~mask
;
3848 /* Pick the lower word and sign-extend it. */
3849 low
= INTVAL (value
);
3854 /* Pick the higher word, shifted to the least significant
3855 bits, and sign-extend it. */
3856 high
= INTVAL (value
);
3857 high
>>= BITS_PER_WORD
- 1;
3860 if (high
& sign_bit
)
3861 high
|= sign_extend
;
3863 /* Store the words in the target machine order. */
3864 if (WORDS_BIG_ENDIAN
)
3866 *first
= GEN_INT (high
);
3867 *second
= GEN_INT (low
);
3871 *first
= GEN_INT (low
);
3872 *second
= GEN_INT (high
);
3877 /* The rule for using CONST_INT for a wider mode
3878 is that we regard the value as signed.
3879 So sign-extend it. */
3880 rtx high
= (INTVAL (value
) < 0 ? constm1_rtx
: const0_rtx
);
3881 if (WORDS_BIG_ENDIAN
)
3893 else if (GET_CODE (value
) != CONST_DOUBLE
)
3895 if (WORDS_BIG_ENDIAN
)
3897 *first
= const0_rtx
;
3903 *second
= const0_rtx
;
3906 else if (GET_MODE (value
) == VOIDmode
3907 /* This is the old way we did CONST_DOUBLE integers. */
3908 || GET_MODE_CLASS (GET_MODE (value
)) == MODE_INT
)
3910 /* In an integer, the words are defined as most and least significant.
3911 So order them by the target's convention. */
3912 if (WORDS_BIG_ENDIAN
)
3914 *first
= GEN_INT (CONST_DOUBLE_HIGH (value
));
3915 *second
= GEN_INT (CONST_DOUBLE_LOW (value
));
3919 *first
= GEN_INT (CONST_DOUBLE_LOW (value
));
3920 *second
= GEN_INT (CONST_DOUBLE_HIGH (value
));
3927 REAL_VALUE_FROM_CONST_DOUBLE (r
, value
);
3929 /* Note, this converts the REAL_VALUE_TYPE to the target's
3930 format, splits up the floating point double and outputs
3931 exactly 32 bits of it into each of l[0] and l[1] --
3932 not necessarily BITS_PER_WORD bits. */
3933 REAL_VALUE_TO_TARGET_DOUBLE (r
, l
);
3935 /* If 32 bits is an entire word for the target, but not for the host,
3936 then sign-extend on the host so that the number will look the same
3937 way on the host that it would on the target. See for instance
3938 simplify_unary_operation. The #if is needed to avoid compiler
3941 #if HOST_BITS_PER_LONG > 32
3942 if (BITS_PER_WORD
< HOST_BITS_PER_LONG
&& BITS_PER_WORD
== 32)
3944 if (l
[0] & ((long) 1 << 31))
3945 l
[0] |= ((long) (-1) << 32);
3946 if (l
[1] & ((long) 1 << 31))
3947 l
[1] |= ((long) (-1) << 32);
3951 *first
= GEN_INT ((HOST_WIDE_INT
) l
[0]);
3952 *second
= GEN_INT ((HOST_WIDE_INT
) l
[1]);
3956 /* Return nonzero if this function has no function calls. */
3964 if (current_function_profile
|| profile_arc_flag
)
3967 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
3969 if (GET_CODE (insn
) == CALL_INSN
3970 && ! SIBLING_CALL_P (insn
))
3972 if (GET_CODE (insn
) == INSN
3973 && GET_CODE (PATTERN (insn
)) == SEQUENCE
3974 && GET_CODE (XVECEXP (PATTERN (insn
), 0, 0)) == CALL_INSN
3975 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn
), 0, 0)))
3978 for (link
= current_function_epilogue_delay_list
;
3980 link
= XEXP (link
, 1))
3982 insn
= XEXP (link
, 0);
3984 if (GET_CODE (insn
) == CALL_INSN
3985 && ! SIBLING_CALL_P (insn
))
3987 if (GET_CODE (insn
) == INSN
3988 && GET_CODE (PATTERN (insn
)) == SEQUENCE
3989 && GET_CODE (XVECEXP (PATTERN (insn
), 0, 0)) == CALL_INSN
3990 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn
), 0, 0)))
3997 /* Return 1 if branch is an forward branch.
3998 Uses insn_shuid array, so it works only in the final pass. May be used by
3999 output templates to customary add branch prediction hints.
4002 final_forward_branch_p (insn
)
4005 int insn_id
, label_id
;
4008 insn_id
= INSN_SHUID (insn
);
4009 label_id
= INSN_SHUID (JUMP_LABEL (insn
));
4010 /* We've hit some insns that does not have id information available. */
4011 if (!insn_id
|| !label_id
)
4013 return insn_id
< label_id
;
4016 /* On some machines, a function with no call insns
4017 can run faster if it doesn't create its own register window.
4018 When output, the leaf function should use only the "output"
4019 registers. Ordinarily, the function would be compiled to use
4020 the "input" registers to find its arguments; it is a candidate
4021 for leaf treatment if it uses only the "input" registers.
4022 Leaf function treatment means renumbering so the function
4023 uses the "output" registers instead. */
4025 #ifdef LEAF_REGISTERS
4027 /* Return 1 if this function uses only the registers that can be
4028 safely renumbered. */
4031 only_leaf_regs_used ()
4034 char *permitted_reg_in_leaf_functions
= LEAF_REGISTERS
;
4036 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
4037 if ((regs_ever_live
[i
] || global_regs
[i
])
4038 && ! permitted_reg_in_leaf_functions
[i
])
4041 if (current_function_uses_pic_offset_table
4042 && pic_offset_table_rtx
!= 0
4043 && GET_CODE (pic_offset_table_rtx
) == REG
4044 && ! permitted_reg_in_leaf_functions
[REGNO (pic_offset_table_rtx
)])
4050 /* Scan all instructions and renumber all registers into those
4051 available in leaf functions. */
4054 leaf_renumber_regs (first
)
4059 /* Renumber only the actual patterns.
4060 The reg-notes can contain frame pointer refs,
4061 and renumbering them could crash, and should not be needed. */
4062 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
4064 leaf_renumber_regs_insn (PATTERN (insn
));
4065 for (insn
= current_function_epilogue_delay_list
;
4067 insn
= XEXP (insn
, 1))
4068 if (INSN_P (XEXP (insn
, 0)))
4069 leaf_renumber_regs_insn (PATTERN (XEXP (insn
, 0)));
4072 /* Scan IN_RTX and its subexpressions, and renumber all regs into those
4073 available in leaf functions. */
4076 leaf_renumber_regs_insn (in_rtx
)
4080 const char *format_ptr
;
4085 /* Renumber all input-registers into output-registers.
4086 renumbered_regs would be 1 for an output-register;
4089 if (GET_CODE (in_rtx
) == REG
)
4093 /* Don't renumber the same reg twice. */
4097 newreg
= REGNO (in_rtx
);
4098 /* Don't try to renumber pseudo regs. It is possible for a pseudo reg
4099 to reach here as part of a REG_NOTE. */
4100 if (newreg
>= FIRST_PSEUDO_REGISTER
)
4105 newreg
= LEAF_REG_REMAP (newreg
);
4108 regs_ever_live
[REGNO (in_rtx
)] = 0;
4109 regs_ever_live
[newreg
] = 1;
4110 REGNO (in_rtx
) = newreg
;
4114 if (INSN_P (in_rtx
))
4116 /* Inside a SEQUENCE, we find insns.
4117 Renumber just the patterns of these insns,
4118 just as we do for the top-level insns. */
4119 leaf_renumber_regs_insn (PATTERN (in_rtx
));
4123 format_ptr
= GET_RTX_FORMAT (GET_CODE (in_rtx
));
4125 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (in_rtx
)); i
++)
4126 switch (*format_ptr
++)
4129 leaf_renumber_regs_insn (XEXP (in_rtx
, i
));
4133 if (NULL
!= XVEC (in_rtx
, i
))
4135 for (j
= 0; j
< XVECLEN (in_rtx
, i
); j
++)
4136 leaf_renumber_regs_insn (XVECEXP (in_rtx
, i
, j
));