invoke.texi: Update -fopt-info documentation.
[gcc.git] / gcc / final.c
1 /* Convert RTL to assembler code and output it, for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009,
4 2010, 2011
5 Free Software Foundation, Inc.
6
7 This file is part of GCC.
8
9 GCC is free software; you can redistribute it and/or modify it under
10 the terms of the GNU General Public License as published by the Free
11 Software Foundation; either version 3, or (at your option) any later
12 version.
13
14 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
15 WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with GCC; see the file COPYING3. If not see
21 <http://www.gnu.org/licenses/>. */
22
23 /* This is the final pass of the compiler.
24 It looks at the rtl code for a function and outputs assembler code.
25
26 Call `final_start_function' to output the assembler code for function entry,
27 `final' to output assembler code for some RTL code,
28 `final_end_function' to output assembler code for function exit.
29 If a function is compiled in several pieces, each piece is
30 output separately with `final'.
31
32 Some optimizations are also done at this level.
33 Move instructions that were made unnecessary by good register allocation
34 are detected and omitted from the output. (Though most of these
35 are removed by the last jump pass.)
36
37 Instructions to set the condition codes are omitted when it can be
38 seen that the condition codes already had the desired values.
39
40 In some cases it is sufficient if the inherited condition codes
41 have related values, but this may require the following insn
42 (the one that tests the condition codes) to be modified.
43
44 The code for the function prologue and epilogue are generated
45 directly in assembler by the target functions function_prologue and
46 function_epilogue. Those instructions never exist as rtl. */
47
48 #include "config.h"
49 #include "system.h"
50 #include "coretypes.h"
51 #include "tm.h"
52
53 #include "tree.h"
54 #include "rtl.h"
55 #include "tm_p.h"
56 #include "regs.h"
57 #include "insn-config.h"
58 #include "insn-attr.h"
59 #include "recog.h"
60 #include "conditions.h"
61 #include "flags.h"
62 #include "hard-reg-set.h"
63 #include "output.h"
64 #include "except.h"
65 #include "function.h"
66 #include "rtl-error.h"
67 #include "toplev.h" /* exact_log2, floor_log2 */
68 #include "reload.h"
69 #include "intl.h"
70 #include "basic-block.h"
71 #include "target.h"
72 #include "targhooks.h"
73 #include "debug.h"
74 #include "expr.h"
75 #include "tree-pass.h"
76 #include "tree-flow.h"
77 #include "cgraph.h"
78 #include "coverage.h"
79 #include "df.h"
80 #include "vecprim.h"
81 #include "ggc.h"
82 #include "cfgloop.h"
83 #include "params.h"
84 #include "tree-pretty-print.h" /* for dump_function_header */
85
86 #ifdef XCOFF_DEBUGGING_INFO
87 #include "xcoffout.h" /* Needed for external data
88 declarations for e.g. AIX 4.x. */
89 #endif
90
91 #include "dwarf2out.h"
92
93 #ifdef DBX_DEBUGGING_INFO
94 #include "dbxout.h"
95 #endif
96
97 #ifdef SDB_DEBUGGING_INFO
98 #include "sdbout.h"
99 #endif
100
101 /* Most ports that aren't using cc0 don't need to define CC_STATUS_INIT.
102 So define a null default for it to save conditionalization later. */
103 #ifndef CC_STATUS_INIT
104 #define CC_STATUS_INIT
105 #endif
106
107 /* Is the given character a logical line separator for the assembler? */
108 #ifndef IS_ASM_LOGICAL_LINE_SEPARATOR
109 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == ';')
110 #endif
111
112 #ifndef JUMP_TABLES_IN_TEXT_SECTION
113 #define JUMP_TABLES_IN_TEXT_SECTION 0
114 #endif
115
116 /* Bitflags used by final_scan_insn. */
117 #define SEEN_BB 1
118 #define SEEN_NOTE 2
119 #define SEEN_EMITTED 4
120
121 /* Last insn processed by final_scan_insn. */
122 static rtx debug_insn;
123 rtx current_output_insn;
124
125 /* Line number of last NOTE. */
126 static int last_linenum;
127
128 /* Last discriminator written to assembly. */
129 static int last_discriminator;
130
131 /* Discriminator of current block. */
132 static int discriminator;
133
134 /* Highest line number in current block. */
135 static int high_block_linenum;
136
137 /* Likewise for function. */
138 static int high_function_linenum;
139
140 /* Filename of last NOTE. */
141 static const char *last_filename;
142
143 /* Override filename and line number. */
144 static const char *override_filename;
145 static int override_linenum;
146
147 /* Whether to force emission of a line note before the next insn. */
148 static bool force_source_line = false;
149
150 extern const int length_unit_log; /* This is defined in insn-attrtab.c. */
151
152 /* Nonzero while outputting an `asm' with operands.
153 This means that inconsistencies are the user's fault, so don't die.
154 The precise value is the insn being output, to pass to error_for_asm. */
155 rtx this_is_asm_operands;
156
157 /* Number of operands of this insn, for an `asm' with operands. */
158 static unsigned int insn_noperands;
159
160 /* Compare optimization flag. */
161
162 static rtx last_ignored_compare = 0;
163
164 /* Assign a unique number to each insn that is output.
165 This can be used to generate unique local labels. */
166
167 static int insn_counter = 0;
168
169 #ifdef HAVE_cc0
170 /* This variable contains machine-dependent flags (defined in tm.h)
171 set and examined by output routines
172 that describe how to interpret the condition codes properly. */
173
174 CC_STATUS cc_status;
175
176 /* During output of an insn, this contains a copy of cc_status
177 from before the insn. */
178
179 CC_STATUS cc_prev_status;
180 #endif
181
182 /* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */
183
184 static int block_depth;
185
186 /* Nonzero if have enabled APP processing of our assembler output. */
187
188 static int app_on;
189
190 /* If we are outputting an insn sequence, this contains the sequence rtx.
191 Zero otherwise. */
192
193 rtx final_sequence;
194
195 #ifdef ASSEMBLER_DIALECT
196
197 /* Number of the assembler dialect to use, starting at 0. */
198 static int dialect_number;
199 #endif
200
201 /* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */
202 rtx current_insn_predicate;
203
204 /* True if printing into -fdump-final-insns= dump. */
205 bool final_insns_dump_p;
206
207 #ifdef HAVE_ATTR_length
208 static int asm_insn_count (rtx);
209 #endif
210 static void profile_function (FILE *);
211 static void profile_after_prologue (FILE *);
212 static bool notice_source_line (rtx, bool *);
213 static rtx walk_alter_subreg (rtx *, bool *);
214 static void output_asm_name (void);
215 static void output_alternate_entry_point (FILE *, rtx);
216 static tree get_mem_expr_from_op (rtx, int *);
217 static void output_asm_operand_names (rtx *, int *, int);
218 #ifdef LEAF_REGISTERS
219 static void leaf_renumber_regs (rtx);
220 #endif
221 #ifdef HAVE_cc0
222 static int alter_cond (rtx);
223 #endif
224 #ifndef ADDR_VEC_ALIGN
225 static int final_addr_vec_align (rtx);
226 #endif
227 #ifdef HAVE_ATTR_length
228 static int align_fuzz (rtx, rtx, int, unsigned);
229 #endif
230 \f
231 /* Initialize data in final at the beginning of a compilation. */
232
233 void
234 init_final (const char *filename ATTRIBUTE_UNUSED)
235 {
236 app_on = 0;
237 final_sequence = 0;
238
239 #ifdef ASSEMBLER_DIALECT
240 dialect_number = ASSEMBLER_DIALECT;
241 #endif
242 }
243
244 /* Default target function prologue and epilogue assembler output.
245
246 If not overridden for epilogue code, then the function body itself
247 contains return instructions wherever needed. */
248 void
249 default_function_pro_epilogue (FILE *file ATTRIBUTE_UNUSED,
250 HOST_WIDE_INT size ATTRIBUTE_UNUSED)
251 {
252 }
253
254 void
255 default_function_switched_text_sections (FILE *file ATTRIBUTE_UNUSED,
256 tree decl ATTRIBUTE_UNUSED,
257 bool new_is_cold ATTRIBUTE_UNUSED)
258 {
259 }
260
261 /* Default target hook that outputs nothing to a stream. */
262 void
263 no_asm_to_stream (FILE *file ATTRIBUTE_UNUSED)
264 {
265 }
266
267 /* Enable APP processing of subsequent output.
268 Used before the output from an `asm' statement. */
269
270 void
271 app_enable (void)
272 {
273 if (! app_on)
274 {
275 fputs (ASM_APP_ON, asm_out_file);
276 app_on = 1;
277 }
278 }
279
280 /* Disable APP processing of subsequent output.
281 Called from varasm.c before most kinds of output. */
282
283 void
284 app_disable (void)
285 {
286 if (app_on)
287 {
288 fputs (ASM_APP_OFF, asm_out_file);
289 app_on = 0;
290 }
291 }
292 \f
293 /* Return the number of slots filled in the current
294 delayed branch sequence (we don't count the insn needing the
295 delay slot). Zero if not in a delayed branch sequence. */
296
297 #ifdef DELAY_SLOTS
298 int
299 dbr_sequence_length (void)
300 {
301 if (final_sequence != 0)
302 return XVECLEN (final_sequence, 0) - 1;
303 else
304 return 0;
305 }
306 #endif
307 \f
308 /* The next two pages contain routines used to compute the length of an insn
309 and to shorten branches. */
310
311 /* Arrays for insn lengths, and addresses. The latter is referenced by
312 `insn_current_length'. */
313
314 static int *insn_lengths;
315
316 VEC(int,heap) *insn_addresses_;
317
318 /* Max uid for which the above arrays are valid. */
319 static int insn_lengths_max_uid;
320
321 /* Address of insn being processed. Used by `insn_current_length'. */
322 int insn_current_address;
323
324 /* Address of insn being processed in previous iteration. */
325 int insn_last_address;
326
327 /* known invariant alignment of insn being processed. */
328 int insn_current_align;
329
330 /* After shorten_branches, for any insn, uid_align[INSN_UID (insn)]
331 gives the next following alignment insn that increases the known
332 alignment, or NULL_RTX if there is no such insn.
333 For any alignment obtained this way, we can again index uid_align with
334 its uid to obtain the next following align that in turn increases the
335 alignment, till we reach NULL_RTX; the sequence obtained this way
336 for each insn we'll call the alignment chain of this insn in the following
337 comments. */
338
339 struct label_alignment
340 {
341 short alignment;
342 short max_skip;
343 };
344
345 static rtx *uid_align;
346 static int *uid_shuid;
347 static struct label_alignment *label_align;
348
349 /* Indicate that branch shortening hasn't yet been done. */
350
351 void
352 init_insn_lengths (void)
353 {
354 if (uid_shuid)
355 {
356 free (uid_shuid);
357 uid_shuid = 0;
358 }
359 if (insn_lengths)
360 {
361 free (insn_lengths);
362 insn_lengths = 0;
363 insn_lengths_max_uid = 0;
364 }
365 #ifdef HAVE_ATTR_length
366 INSN_ADDRESSES_FREE ();
367 #endif
368 if (uid_align)
369 {
370 free (uid_align);
371 uid_align = 0;
372 }
373 }
374
375 /* Obtain the current length of an insn. If branch shortening has been done,
376 get its actual length. Otherwise, use FALLBACK_FN to calculate the
377 length. */
378 static inline int
379 get_attr_length_1 (rtx insn ATTRIBUTE_UNUSED,
380 int (*fallback_fn) (rtx) ATTRIBUTE_UNUSED)
381 {
382 #ifdef HAVE_ATTR_length
383 rtx body;
384 int i;
385 int length = 0;
386
387 if (insn_lengths_max_uid > INSN_UID (insn))
388 return insn_lengths[INSN_UID (insn)];
389 else
390 switch (GET_CODE (insn))
391 {
392 case NOTE:
393 case BARRIER:
394 case CODE_LABEL:
395 case DEBUG_INSN:
396 return 0;
397
398 case CALL_INSN:
399 length = fallback_fn (insn);
400 break;
401
402 case JUMP_INSN:
403 body = PATTERN (insn);
404 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
405 {
406 /* Alignment is machine-dependent and should be handled by
407 ADDR_VEC_ALIGN. */
408 }
409 else
410 length = fallback_fn (insn);
411 break;
412
413 case INSN:
414 body = PATTERN (insn);
415 if (GET_CODE (body) == USE || GET_CODE (body) == CLOBBER)
416 return 0;
417
418 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
419 length = asm_insn_count (body) * fallback_fn (insn);
420 else if (GET_CODE (body) == SEQUENCE)
421 for (i = 0; i < XVECLEN (body, 0); i++)
422 length += get_attr_length_1 (XVECEXP (body, 0, i), fallback_fn);
423 else
424 length = fallback_fn (insn);
425 break;
426
427 default:
428 break;
429 }
430
431 #ifdef ADJUST_INSN_LENGTH
432 ADJUST_INSN_LENGTH (insn, length);
433 #endif
434 return length;
435 #else /* not HAVE_ATTR_length */
436 return 0;
437 #define insn_default_length 0
438 #define insn_min_length 0
439 #endif /* not HAVE_ATTR_length */
440 }
441
442 /* Obtain the current length of an insn. If branch shortening has been done,
443 get its actual length. Otherwise, get its maximum length. */
444 int
445 get_attr_length (rtx insn)
446 {
447 return get_attr_length_1 (insn, insn_default_length);
448 }
449
450 /* Obtain the current length of an insn. If branch shortening has been done,
451 get its actual length. Otherwise, get its minimum length. */
452 int
453 get_attr_min_length (rtx insn)
454 {
455 return get_attr_length_1 (insn, insn_min_length);
456 }
457 \f
458 /* Code to handle alignment inside shorten_branches. */
459
460 /* Here is an explanation how the algorithm in align_fuzz can give
461 proper results:
462
463 Call a sequence of instructions beginning with alignment point X
464 and continuing until the next alignment point `block X'. When `X'
465 is used in an expression, it means the alignment value of the
466 alignment point.
467
468 Call the distance between the start of the first insn of block X, and
469 the end of the last insn of block X `IX', for the `inner size of X'.
470 This is clearly the sum of the instruction lengths.
471
472 Likewise with the next alignment-delimited block following X, which we
473 shall call block Y.
474
475 Call the distance between the start of the first insn of block X, and
476 the start of the first insn of block Y `OX', for the `outer size of X'.
477
478 The estimated padding is then OX - IX.
479
480 OX can be safely estimated as
481
482 if (X >= Y)
483 OX = round_up(IX, Y)
484 else
485 OX = round_up(IX, X) + Y - X
486
487 Clearly est(IX) >= real(IX), because that only depends on the
488 instruction lengths, and those being overestimated is a given.
489
490 Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so
491 we needn't worry about that when thinking about OX.
492
493 When X >= Y, the alignment provided by Y adds no uncertainty factor
494 for branch ranges starting before X, so we can just round what we have.
495 But when X < Y, we don't know anything about the, so to speak,
496 `middle bits', so we have to assume the worst when aligning up from an
497 address mod X to one mod Y, which is Y - X. */
498
499 #ifndef LABEL_ALIGN
500 #define LABEL_ALIGN(LABEL) align_labels_log
501 #endif
502
503 #ifndef LOOP_ALIGN
504 #define LOOP_ALIGN(LABEL) align_loops_log
505 #endif
506
507 #ifndef LABEL_ALIGN_AFTER_BARRIER
508 #define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0
509 #endif
510
511 #ifndef JUMP_ALIGN
512 #define JUMP_ALIGN(LABEL) align_jumps_log
513 #endif
514
515 int
516 default_label_align_after_barrier_max_skip (rtx insn ATTRIBUTE_UNUSED)
517 {
518 return 0;
519 }
520
521 int
522 default_loop_align_max_skip (rtx insn ATTRIBUTE_UNUSED)
523 {
524 return align_loops_max_skip;
525 }
526
527 int
528 default_label_align_max_skip (rtx insn ATTRIBUTE_UNUSED)
529 {
530 return align_labels_max_skip;
531 }
532
533 int
534 default_jump_align_max_skip (rtx insn ATTRIBUTE_UNUSED)
535 {
536 return align_jumps_max_skip;
537 }
538
539 #ifndef ADDR_VEC_ALIGN
540 static int
541 final_addr_vec_align (rtx addr_vec)
542 {
543 int align = GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec)));
544
545 if (align > BIGGEST_ALIGNMENT / BITS_PER_UNIT)
546 align = BIGGEST_ALIGNMENT / BITS_PER_UNIT;
547 return exact_log2 (align);
548
549 }
550
551 #define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC)
552 #endif
553
554 #ifndef INSN_LENGTH_ALIGNMENT
555 #define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log
556 #endif
557
558 #define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)])
559
560 static int min_labelno, max_labelno;
561
562 #define LABEL_TO_ALIGNMENT(LABEL) \
563 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment)
564
565 #define LABEL_TO_MAX_SKIP(LABEL) \
566 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip)
567
568 /* For the benefit of port specific code do this also as a function. */
569
570 int
571 label_to_alignment (rtx label)
572 {
573 if (CODE_LABEL_NUMBER (label) <= max_labelno)
574 return LABEL_TO_ALIGNMENT (label);
575 return 0;
576 }
577
578 int
579 label_to_max_skip (rtx label)
580 {
581 if (CODE_LABEL_NUMBER (label) <= max_labelno)
582 return LABEL_TO_MAX_SKIP (label);
583 return 0;
584 }
585
586 #ifdef HAVE_ATTR_length
587 /* The differences in addresses
588 between a branch and its target might grow or shrink depending on
589 the alignment the start insn of the range (the branch for a forward
590 branch or the label for a backward branch) starts out on; if these
591 differences are used naively, they can even oscillate infinitely.
592 We therefore want to compute a 'worst case' address difference that
593 is independent of the alignment the start insn of the range end
594 up on, and that is at least as large as the actual difference.
595 The function align_fuzz calculates the amount we have to add to the
596 naively computed difference, by traversing the part of the alignment
597 chain of the start insn of the range that is in front of the end insn
598 of the range, and considering for each alignment the maximum amount
599 that it might contribute to a size increase.
600
601 For casesi tables, we also want to know worst case minimum amounts of
602 address difference, in case a machine description wants to introduce
603 some common offset that is added to all offsets in a table.
604 For this purpose, align_fuzz with a growth argument of 0 computes the
605 appropriate adjustment. */
606
607 /* Compute the maximum delta by which the difference of the addresses of
608 START and END might grow / shrink due to a different address for start
609 which changes the size of alignment insns between START and END.
610 KNOWN_ALIGN_LOG is the alignment known for START.
611 GROWTH should be ~0 if the objective is to compute potential code size
612 increase, and 0 if the objective is to compute potential shrink.
613 The return value is undefined for any other value of GROWTH. */
614
615 static int
616 align_fuzz (rtx start, rtx end, int known_align_log, unsigned int growth)
617 {
618 int uid = INSN_UID (start);
619 rtx align_label;
620 int known_align = 1 << known_align_log;
621 int end_shuid = INSN_SHUID (end);
622 int fuzz = 0;
623
624 for (align_label = uid_align[uid]; align_label; align_label = uid_align[uid])
625 {
626 int align_addr, new_align;
627
628 uid = INSN_UID (align_label);
629 align_addr = INSN_ADDRESSES (uid) - insn_lengths[uid];
630 if (uid_shuid[uid] > end_shuid)
631 break;
632 known_align_log = LABEL_TO_ALIGNMENT (align_label);
633 new_align = 1 << known_align_log;
634 if (new_align < known_align)
635 continue;
636 fuzz += (-align_addr ^ growth) & (new_align - known_align);
637 known_align = new_align;
638 }
639 return fuzz;
640 }
641
642 /* Compute a worst-case reference address of a branch so that it
643 can be safely used in the presence of aligned labels. Since the
644 size of the branch itself is unknown, the size of the branch is
645 not included in the range. I.e. for a forward branch, the reference
646 address is the end address of the branch as known from the previous
647 branch shortening pass, minus a value to account for possible size
648 increase due to alignment. For a backward branch, it is the start
649 address of the branch as known from the current pass, plus a value
650 to account for possible size increase due to alignment.
651 NB.: Therefore, the maximum offset allowed for backward branches needs
652 to exclude the branch size. */
653
654 int
655 insn_current_reference_address (rtx branch)
656 {
657 rtx dest, seq;
658 int seq_uid;
659
660 if (! INSN_ADDRESSES_SET_P ())
661 return 0;
662
663 seq = NEXT_INSN (PREV_INSN (branch));
664 seq_uid = INSN_UID (seq);
665 if (!JUMP_P (branch))
666 /* This can happen for example on the PA; the objective is to know the
667 offset to address something in front of the start of the function.
668 Thus, we can treat it like a backward branch.
669 We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than
670 any alignment we'd encounter, so we skip the call to align_fuzz. */
671 return insn_current_address;
672 dest = JUMP_LABEL (branch);
673
674 /* BRANCH has no proper alignment chain set, so use SEQ.
675 BRANCH also has no INSN_SHUID. */
676 if (INSN_SHUID (seq) < INSN_SHUID (dest))
677 {
678 /* Forward branch. */
679 return (insn_last_address + insn_lengths[seq_uid]
680 - align_fuzz (seq, dest, length_unit_log, ~0));
681 }
682 else
683 {
684 /* Backward branch. */
685 return (insn_current_address
686 + align_fuzz (dest, seq, length_unit_log, ~0));
687 }
688 }
689 #endif /* HAVE_ATTR_length */
690 \f
691 /* Compute branch alignments based on frequency information in the
692 CFG. */
693
694 unsigned int
695 compute_alignments (void)
696 {
697 int log, max_skip, max_log;
698 basic_block bb;
699 int freq_max = 0;
700 int freq_threshold = 0;
701
702 if (label_align)
703 {
704 free (label_align);
705 label_align = 0;
706 }
707
708 max_labelno = max_label_num ();
709 min_labelno = get_first_label_num ();
710 label_align = XCNEWVEC (struct label_alignment, max_labelno - min_labelno + 1);
711
712 /* If not optimizing or optimizing for size, don't assign any alignments. */
713 if (! optimize || optimize_function_for_size_p (cfun))
714 return 0;
715
716 if (dump_file)
717 {
718 dump_reg_info (dump_file);
719 dump_flow_info (dump_file, TDF_DETAILS);
720 flow_loops_dump (dump_file, NULL, 1);
721 }
722 loop_optimizer_init (AVOID_CFG_MODIFICATIONS);
723 FOR_EACH_BB (bb)
724 if (bb->frequency > freq_max)
725 freq_max = bb->frequency;
726 freq_threshold = freq_max / PARAM_VALUE (PARAM_ALIGN_THRESHOLD);
727
728 if (dump_file)
729 fprintf(dump_file, "freq_max: %i\n",freq_max);
730 FOR_EACH_BB (bb)
731 {
732 rtx label = BB_HEAD (bb);
733 int fallthru_frequency = 0, branch_frequency = 0, has_fallthru = 0;
734 edge e;
735 edge_iterator ei;
736
737 if (!LABEL_P (label)
738 || optimize_bb_for_size_p (bb))
739 {
740 if (dump_file)
741 fprintf(dump_file, "BB %4i freq %4i loop %2i loop_depth %2i skipped.\n",
742 bb->index, bb->frequency, bb->loop_father->num,
743 bb_loop_depth (bb));
744 continue;
745 }
746 max_log = LABEL_ALIGN (label);
747 max_skip = targetm.asm_out.label_align_max_skip (label);
748
749 FOR_EACH_EDGE (e, ei, bb->preds)
750 {
751 if (e->flags & EDGE_FALLTHRU)
752 has_fallthru = 1, fallthru_frequency += EDGE_FREQUENCY (e);
753 else
754 branch_frequency += EDGE_FREQUENCY (e);
755 }
756 if (dump_file)
757 {
758 fprintf(dump_file, "BB %4i freq %4i loop %2i loop_depth %2i fall %4i branch %4i",
759 bb->index, bb->frequency, bb->loop_father->num,
760 bb_loop_depth (bb),
761 fallthru_frequency, branch_frequency);
762 if (!bb->loop_father->inner && bb->loop_father->num)
763 fprintf (dump_file, " inner_loop");
764 if (bb->loop_father->header == bb)
765 fprintf (dump_file, " loop_header");
766 fprintf (dump_file, "\n");
767 }
768
769 /* There are two purposes to align block with no fallthru incoming edge:
770 1) to avoid fetch stalls when branch destination is near cache boundary
771 2) to improve cache efficiency in case the previous block is not executed
772 (so it does not need to be in the cache).
773
774 We to catch first case, we align frequently executed blocks.
775 To catch the second, we align blocks that are executed more frequently
776 than the predecessor and the predecessor is likely to not be executed
777 when function is called. */
778
779 if (!has_fallthru
780 && (branch_frequency > freq_threshold
781 || (bb->frequency > bb->prev_bb->frequency * 10
782 && (bb->prev_bb->frequency
783 <= ENTRY_BLOCK_PTR->frequency / 2))))
784 {
785 log = JUMP_ALIGN (label);
786 if (dump_file)
787 fprintf(dump_file, " jump alignment added.\n");
788 if (max_log < log)
789 {
790 max_log = log;
791 max_skip = targetm.asm_out.jump_align_max_skip (label);
792 }
793 }
794 /* In case block is frequent and reached mostly by non-fallthru edge,
795 align it. It is most likely a first block of loop. */
796 if (has_fallthru
797 && optimize_bb_for_speed_p (bb)
798 && branch_frequency + fallthru_frequency > freq_threshold
799 && (branch_frequency
800 > fallthru_frequency * PARAM_VALUE (PARAM_ALIGN_LOOP_ITERATIONS)))
801 {
802 log = LOOP_ALIGN (label);
803 if (dump_file)
804 fprintf(dump_file, " internal loop alignment added.\n");
805 if (max_log < log)
806 {
807 max_log = log;
808 max_skip = targetm.asm_out.loop_align_max_skip (label);
809 }
810 }
811 LABEL_TO_ALIGNMENT (label) = max_log;
812 LABEL_TO_MAX_SKIP (label) = max_skip;
813 }
814
815 loop_optimizer_finalize ();
816 free_dominance_info (CDI_DOMINATORS);
817 return 0;
818 }
819
820 struct rtl_opt_pass pass_compute_alignments =
821 {
822 {
823 RTL_PASS,
824 "alignments", /* name */
825 OPTGROUP_NONE, /* optinfo_flags */
826 NULL, /* gate */
827 compute_alignments, /* execute */
828 NULL, /* sub */
829 NULL, /* next */
830 0, /* static_pass_number */
831 TV_NONE, /* tv_id */
832 0, /* properties_required */
833 0, /* properties_provided */
834 0, /* properties_destroyed */
835 0, /* todo_flags_start */
836 TODO_verify_rtl_sharing
837 | TODO_ggc_collect /* todo_flags_finish */
838 }
839 };
840
841 \f
842 /* Make a pass over all insns and compute their actual lengths by shortening
843 any branches of variable length if possible. */
844
845 /* shorten_branches might be called multiple times: for example, the SH
846 port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG.
847 In order to do this, it needs proper length information, which it obtains
848 by calling shorten_branches. This cannot be collapsed with
849 shorten_branches itself into a single pass unless we also want to integrate
850 reorg.c, since the branch splitting exposes new instructions with delay
851 slots. */
852
853 void
854 shorten_branches (rtx first ATTRIBUTE_UNUSED)
855 {
856 rtx insn;
857 int max_uid;
858 int i;
859 int max_log;
860 int max_skip;
861 #ifdef HAVE_ATTR_length
862 #define MAX_CODE_ALIGN 16
863 rtx seq;
864 int something_changed = 1;
865 char *varying_length;
866 rtx body;
867 int uid;
868 rtx align_tab[MAX_CODE_ALIGN];
869
870 #endif
871
872 /* Compute maximum UID and allocate label_align / uid_shuid. */
873 max_uid = get_max_uid ();
874
875 /* Free uid_shuid before reallocating it. */
876 free (uid_shuid);
877
878 uid_shuid = XNEWVEC (int, max_uid);
879
880 if (max_labelno != max_label_num ())
881 {
882 int old = max_labelno;
883 int n_labels;
884 int n_old_labels;
885
886 max_labelno = max_label_num ();
887
888 n_labels = max_labelno - min_labelno + 1;
889 n_old_labels = old - min_labelno + 1;
890
891 label_align = XRESIZEVEC (struct label_alignment, label_align, n_labels);
892
893 /* Range of labels grows monotonically in the function. Failing here
894 means that the initialization of array got lost. */
895 gcc_assert (n_old_labels <= n_labels);
896
897 memset (label_align + n_old_labels, 0,
898 (n_labels - n_old_labels) * sizeof (struct label_alignment));
899 }
900
901 /* Initialize label_align and set up uid_shuid to be strictly
902 monotonically rising with insn order. */
903 /* We use max_log here to keep track of the maximum alignment we want to
904 impose on the next CODE_LABEL (or the current one if we are processing
905 the CODE_LABEL itself). */
906
907 max_log = 0;
908 max_skip = 0;
909
910 for (insn = get_insns (), i = 1; insn; insn = NEXT_INSN (insn))
911 {
912 int log;
913
914 INSN_SHUID (insn) = i++;
915 if (INSN_P (insn))
916 continue;
917
918 if (LABEL_P (insn))
919 {
920 rtx next;
921 bool next_is_jumptable;
922
923 /* Merge in alignments computed by compute_alignments. */
924 log = LABEL_TO_ALIGNMENT (insn);
925 if (max_log < log)
926 {
927 max_log = log;
928 max_skip = LABEL_TO_MAX_SKIP (insn);
929 }
930
931 next = next_nonnote_insn (insn);
932 next_is_jumptable = next && JUMP_TABLE_DATA_P (next);
933 if (!next_is_jumptable)
934 {
935 log = LABEL_ALIGN (insn);
936 if (max_log < log)
937 {
938 max_log = log;
939 max_skip = targetm.asm_out.label_align_max_skip (insn);
940 }
941 }
942 /* ADDR_VECs only take room if read-only data goes into the text
943 section. */
944 if ((JUMP_TABLES_IN_TEXT_SECTION
945 || readonly_data_section == text_section)
946 && next_is_jumptable)
947 {
948 log = ADDR_VEC_ALIGN (next);
949 if (max_log < log)
950 {
951 max_log = log;
952 max_skip = targetm.asm_out.label_align_max_skip (insn);
953 }
954 }
955 LABEL_TO_ALIGNMENT (insn) = max_log;
956 LABEL_TO_MAX_SKIP (insn) = max_skip;
957 max_log = 0;
958 max_skip = 0;
959 }
960 else if (BARRIER_P (insn))
961 {
962 rtx label;
963
964 for (label = insn; label && ! INSN_P (label);
965 label = NEXT_INSN (label))
966 if (LABEL_P (label))
967 {
968 log = LABEL_ALIGN_AFTER_BARRIER (insn);
969 if (max_log < log)
970 {
971 max_log = log;
972 max_skip = targetm.asm_out.label_align_after_barrier_max_skip (label);
973 }
974 break;
975 }
976 }
977 }
978 #ifdef HAVE_ATTR_length
979
980 /* Allocate the rest of the arrays. */
981 insn_lengths = XNEWVEC (int, max_uid);
982 insn_lengths_max_uid = max_uid;
983 /* Syntax errors can lead to labels being outside of the main insn stream.
984 Initialize insn_addresses, so that we get reproducible results. */
985 INSN_ADDRESSES_ALLOC (max_uid);
986
987 varying_length = XCNEWVEC (char, max_uid);
988
989 /* Initialize uid_align. We scan instructions
990 from end to start, and keep in align_tab[n] the last seen insn
991 that does an alignment of at least n+1, i.e. the successor
992 in the alignment chain for an insn that does / has a known
993 alignment of n. */
994 uid_align = XCNEWVEC (rtx, max_uid);
995
996 for (i = MAX_CODE_ALIGN; --i >= 0;)
997 align_tab[i] = NULL_RTX;
998 seq = get_last_insn ();
999 for (; seq; seq = PREV_INSN (seq))
1000 {
1001 int uid = INSN_UID (seq);
1002 int log;
1003 log = (LABEL_P (seq) ? LABEL_TO_ALIGNMENT (seq) : 0);
1004 uid_align[uid] = align_tab[0];
1005 if (log)
1006 {
1007 /* Found an alignment label. */
1008 uid_align[uid] = align_tab[log];
1009 for (i = log - 1; i >= 0; i--)
1010 align_tab[i] = seq;
1011 }
1012 }
1013
1014 /* When optimizing, we start assuming minimum length, and keep increasing
1015 lengths as we find the need for this, till nothing changes.
1016 When not optimizing, we start assuming maximum lengths, and
1017 do a single pass to update the lengths. */
1018 bool increasing = optimize != 0;
1019
1020 #ifdef CASE_VECTOR_SHORTEN_MODE
1021 if (optimize)
1022 {
1023 /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum
1024 label fields. */
1025
1026 int min_shuid = INSN_SHUID (get_insns ()) - 1;
1027 int max_shuid = INSN_SHUID (get_last_insn ()) + 1;
1028 int rel;
1029
1030 for (insn = first; insn != 0; insn = NEXT_INSN (insn))
1031 {
1032 rtx min_lab = NULL_RTX, max_lab = NULL_RTX, pat;
1033 int len, i, min, max, insn_shuid;
1034 int min_align;
1035 addr_diff_vec_flags flags;
1036
1037 if (!JUMP_P (insn)
1038 || GET_CODE (PATTERN (insn)) != ADDR_DIFF_VEC)
1039 continue;
1040 pat = PATTERN (insn);
1041 len = XVECLEN (pat, 1);
1042 gcc_assert (len > 0);
1043 min_align = MAX_CODE_ALIGN;
1044 for (min = max_shuid, max = min_shuid, i = len - 1; i >= 0; i--)
1045 {
1046 rtx lab = XEXP (XVECEXP (pat, 1, i), 0);
1047 int shuid = INSN_SHUID (lab);
1048 if (shuid < min)
1049 {
1050 min = shuid;
1051 min_lab = lab;
1052 }
1053 if (shuid > max)
1054 {
1055 max = shuid;
1056 max_lab = lab;
1057 }
1058 if (min_align > LABEL_TO_ALIGNMENT (lab))
1059 min_align = LABEL_TO_ALIGNMENT (lab);
1060 }
1061 XEXP (pat, 2) = gen_rtx_LABEL_REF (Pmode, min_lab);
1062 XEXP (pat, 3) = gen_rtx_LABEL_REF (Pmode, max_lab);
1063 insn_shuid = INSN_SHUID (insn);
1064 rel = INSN_SHUID (XEXP (XEXP (pat, 0), 0));
1065 memset (&flags, 0, sizeof (flags));
1066 flags.min_align = min_align;
1067 flags.base_after_vec = rel > insn_shuid;
1068 flags.min_after_vec = min > insn_shuid;
1069 flags.max_after_vec = max > insn_shuid;
1070 flags.min_after_base = min > rel;
1071 flags.max_after_base = max > rel;
1072 ADDR_DIFF_VEC_FLAGS (pat) = flags;
1073
1074 if (increasing)
1075 PUT_MODE (pat, CASE_VECTOR_SHORTEN_MODE (0, 0, pat));
1076 }
1077 }
1078 #endif /* CASE_VECTOR_SHORTEN_MODE */
1079
1080 /* Compute initial lengths, addresses, and varying flags for each insn. */
1081 int (*length_fun) (rtx) = increasing ? insn_min_length : insn_default_length;
1082
1083 for (insn_current_address = 0, insn = first;
1084 insn != 0;
1085 insn_current_address += insn_lengths[uid], insn = NEXT_INSN (insn))
1086 {
1087 uid = INSN_UID (insn);
1088
1089 insn_lengths[uid] = 0;
1090
1091 if (LABEL_P (insn))
1092 {
1093 int log = LABEL_TO_ALIGNMENT (insn);
1094 if (log)
1095 {
1096 int align = 1 << log;
1097 int new_address = (insn_current_address + align - 1) & -align;
1098 insn_lengths[uid] = new_address - insn_current_address;
1099 }
1100 }
1101
1102 INSN_ADDRESSES (uid) = insn_current_address + insn_lengths[uid];
1103
1104 if (NOTE_P (insn) || BARRIER_P (insn)
1105 || LABEL_P (insn) || DEBUG_INSN_P(insn))
1106 continue;
1107 if (INSN_DELETED_P (insn))
1108 continue;
1109
1110 body = PATTERN (insn);
1111 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
1112 {
1113 /* This only takes room if read-only data goes into the text
1114 section. */
1115 if (JUMP_TABLES_IN_TEXT_SECTION
1116 || readonly_data_section == text_section)
1117 insn_lengths[uid] = (XVECLEN (body,
1118 GET_CODE (body) == ADDR_DIFF_VEC)
1119 * GET_MODE_SIZE (GET_MODE (body)));
1120 /* Alignment is handled by ADDR_VEC_ALIGN. */
1121 }
1122 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
1123 insn_lengths[uid] = asm_insn_count (body) * insn_default_length (insn);
1124 else if (GET_CODE (body) == SEQUENCE)
1125 {
1126 int i;
1127 int const_delay_slots;
1128 #ifdef DELAY_SLOTS
1129 const_delay_slots = const_num_delay_slots (XVECEXP (body, 0, 0));
1130 #else
1131 const_delay_slots = 0;
1132 #endif
1133 int (*inner_length_fun) (rtx)
1134 = const_delay_slots ? length_fun : insn_default_length;
1135 /* Inside a delay slot sequence, we do not do any branch shortening
1136 if the shortening could change the number of delay slots
1137 of the branch. */
1138 for (i = 0; i < XVECLEN (body, 0); i++)
1139 {
1140 rtx inner_insn = XVECEXP (body, 0, i);
1141 int inner_uid = INSN_UID (inner_insn);
1142 int inner_length;
1143
1144 if (GET_CODE (body) == ASM_INPUT
1145 || asm_noperands (PATTERN (XVECEXP (body, 0, i))) >= 0)
1146 inner_length = (asm_insn_count (PATTERN (inner_insn))
1147 * insn_default_length (inner_insn));
1148 else
1149 inner_length = inner_length_fun (inner_insn);
1150
1151 insn_lengths[inner_uid] = inner_length;
1152 if (const_delay_slots)
1153 {
1154 if ((varying_length[inner_uid]
1155 = insn_variable_length_p (inner_insn)) != 0)
1156 varying_length[uid] = 1;
1157 INSN_ADDRESSES (inner_uid) = (insn_current_address
1158 + insn_lengths[uid]);
1159 }
1160 else
1161 varying_length[inner_uid] = 0;
1162 insn_lengths[uid] += inner_length;
1163 }
1164 }
1165 else if (GET_CODE (body) != USE && GET_CODE (body) != CLOBBER)
1166 {
1167 insn_lengths[uid] = length_fun (insn);
1168 varying_length[uid] = insn_variable_length_p (insn);
1169 }
1170
1171 /* If needed, do any adjustment. */
1172 #ifdef ADJUST_INSN_LENGTH
1173 ADJUST_INSN_LENGTH (insn, insn_lengths[uid]);
1174 if (insn_lengths[uid] < 0)
1175 fatal_insn ("negative insn length", insn);
1176 #endif
1177 }
1178
1179 /* Now loop over all the insns finding varying length insns. For each,
1180 get the current insn length. If it has changed, reflect the change.
1181 When nothing changes for a full pass, we are done. */
1182
1183 while (something_changed)
1184 {
1185 something_changed = 0;
1186 insn_current_align = MAX_CODE_ALIGN - 1;
1187 for (insn_current_address = 0, insn = first;
1188 insn != 0;
1189 insn = NEXT_INSN (insn))
1190 {
1191 int new_length;
1192 #ifdef ADJUST_INSN_LENGTH
1193 int tmp_length;
1194 #endif
1195 int length_align;
1196
1197 uid = INSN_UID (insn);
1198
1199 if (LABEL_P (insn))
1200 {
1201 int log = LABEL_TO_ALIGNMENT (insn);
1202 if (log > insn_current_align)
1203 {
1204 int align = 1 << log;
1205 int new_address= (insn_current_address + align - 1) & -align;
1206 insn_lengths[uid] = new_address - insn_current_address;
1207 insn_current_align = log;
1208 insn_current_address = new_address;
1209 }
1210 else
1211 insn_lengths[uid] = 0;
1212 INSN_ADDRESSES (uid) = insn_current_address;
1213 continue;
1214 }
1215
1216 length_align = INSN_LENGTH_ALIGNMENT (insn);
1217 if (length_align < insn_current_align)
1218 insn_current_align = length_align;
1219
1220 insn_last_address = INSN_ADDRESSES (uid);
1221 INSN_ADDRESSES (uid) = insn_current_address;
1222
1223 #ifdef CASE_VECTOR_SHORTEN_MODE
1224 if (optimize && JUMP_P (insn)
1225 && GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
1226 {
1227 rtx body = PATTERN (insn);
1228 int old_length = insn_lengths[uid];
1229 rtx rel_lab = XEXP (XEXP (body, 0), 0);
1230 rtx min_lab = XEXP (XEXP (body, 2), 0);
1231 rtx max_lab = XEXP (XEXP (body, 3), 0);
1232 int rel_addr = INSN_ADDRESSES (INSN_UID (rel_lab));
1233 int min_addr = INSN_ADDRESSES (INSN_UID (min_lab));
1234 int max_addr = INSN_ADDRESSES (INSN_UID (max_lab));
1235 rtx prev;
1236 int rel_align = 0;
1237 addr_diff_vec_flags flags;
1238 enum machine_mode vec_mode;
1239
1240 /* Avoid automatic aggregate initialization. */
1241 flags = ADDR_DIFF_VEC_FLAGS (body);
1242
1243 /* Try to find a known alignment for rel_lab. */
1244 for (prev = rel_lab;
1245 prev
1246 && ! insn_lengths[INSN_UID (prev)]
1247 && ! (varying_length[INSN_UID (prev)] & 1);
1248 prev = PREV_INSN (prev))
1249 if (varying_length[INSN_UID (prev)] & 2)
1250 {
1251 rel_align = LABEL_TO_ALIGNMENT (prev);
1252 break;
1253 }
1254
1255 /* See the comment on addr_diff_vec_flags in rtl.h for the
1256 meaning of the flags values. base: REL_LAB vec: INSN */
1257 /* Anything after INSN has still addresses from the last
1258 pass; adjust these so that they reflect our current
1259 estimate for this pass. */
1260 if (flags.base_after_vec)
1261 rel_addr += insn_current_address - insn_last_address;
1262 if (flags.min_after_vec)
1263 min_addr += insn_current_address - insn_last_address;
1264 if (flags.max_after_vec)
1265 max_addr += insn_current_address - insn_last_address;
1266 /* We want to know the worst case, i.e. lowest possible value
1267 for the offset of MIN_LAB. If MIN_LAB is after REL_LAB,
1268 its offset is positive, and we have to be wary of code shrink;
1269 otherwise, it is negative, and we have to be vary of code
1270 size increase. */
1271 if (flags.min_after_base)
1272 {
1273 /* If INSN is between REL_LAB and MIN_LAB, the size
1274 changes we are about to make can change the alignment
1275 within the observed offset, therefore we have to break
1276 it up into two parts that are independent. */
1277 if (! flags.base_after_vec && flags.min_after_vec)
1278 {
1279 min_addr -= align_fuzz (rel_lab, insn, rel_align, 0);
1280 min_addr -= align_fuzz (insn, min_lab, 0, 0);
1281 }
1282 else
1283 min_addr -= align_fuzz (rel_lab, min_lab, rel_align, 0);
1284 }
1285 else
1286 {
1287 if (flags.base_after_vec && ! flags.min_after_vec)
1288 {
1289 min_addr -= align_fuzz (min_lab, insn, 0, ~0);
1290 min_addr -= align_fuzz (insn, rel_lab, 0, ~0);
1291 }
1292 else
1293 min_addr -= align_fuzz (min_lab, rel_lab, 0, ~0);
1294 }
1295 /* Likewise, determine the highest lowest possible value
1296 for the offset of MAX_LAB. */
1297 if (flags.max_after_base)
1298 {
1299 if (! flags.base_after_vec && flags.max_after_vec)
1300 {
1301 max_addr += align_fuzz (rel_lab, insn, rel_align, ~0);
1302 max_addr += align_fuzz (insn, max_lab, 0, ~0);
1303 }
1304 else
1305 max_addr += align_fuzz (rel_lab, max_lab, rel_align, ~0);
1306 }
1307 else
1308 {
1309 if (flags.base_after_vec && ! flags.max_after_vec)
1310 {
1311 max_addr += align_fuzz (max_lab, insn, 0, 0);
1312 max_addr += align_fuzz (insn, rel_lab, 0, 0);
1313 }
1314 else
1315 max_addr += align_fuzz (max_lab, rel_lab, 0, 0);
1316 }
1317 vec_mode = CASE_VECTOR_SHORTEN_MODE (min_addr - rel_addr,
1318 max_addr - rel_addr, body);
1319 if (!increasing
1320 || (GET_MODE_SIZE (vec_mode)
1321 >= GET_MODE_SIZE (GET_MODE (body))))
1322 PUT_MODE (body, vec_mode);
1323 if (JUMP_TABLES_IN_TEXT_SECTION
1324 || readonly_data_section == text_section)
1325 {
1326 insn_lengths[uid]
1327 = (XVECLEN (body, 1) * GET_MODE_SIZE (GET_MODE (body)));
1328 insn_current_address += insn_lengths[uid];
1329 if (insn_lengths[uid] != old_length)
1330 something_changed = 1;
1331 }
1332
1333 continue;
1334 }
1335 #endif /* CASE_VECTOR_SHORTEN_MODE */
1336
1337 if (! (varying_length[uid]))
1338 {
1339 if (NONJUMP_INSN_P (insn)
1340 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1341 {
1342 int i;
1343
1344 body = PATTERN (insn);
1345 for (i = 0; i < XVECLEN (body, 0); i++)
1346 {
1347 rtx inner_insn = XVECEXP (body, 0, i);
1348 int inner_uid = INSN_UID (inner_insn);
1349
1350 INSN_ADDRESSES (inner_uid) = insn_current_address;
1351
1352 insn_current_address += insn_lengths[inner_uid];
1353 }
1354 }
1355 else
1356 insn_current_address += insn_lengths[uid];
1357
1358 continue;
1359 }
1360
1361 if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
1362 {
1363 int i;
1364
1365 body = PATTERN (insn);
1366 new_length = 0;
1367 for (i = 0; i < XVECLEN (body, 0); i++)
1368 {
1369 rtx inner_insn = XVECEXP (body, 0, i);
1370 int inner_uid = INSN_UID (inner_insn);
1371 int inner_length;
1372
1373 INSN_ADDRESSES (inner_uid) = insn_current_address;
1374
1375 /* insn_current_length returns 0 for insns with a
1376 non-varying length. */
1377 if (! varying_length[inner_uid])
1378 inner_length = insn_lengths[inner_uid];
1379 else
1380 inner_length = insn_current_length (inner_insn);
1381
1382 if (inner_length != insn_lengths[inner_uid])
1383 {
1384 if (!increasing || inner_length > insn_lengths[inner_uid])
1385 {
1386 insn_lengths[inner_uid] = inner_length;
1387 something_changed = 1;
1388 }
1389 else
1390 inner_length = insn_lengths[inner_uid];
1391 }
1392 insn_current_address += inner_length;
1393 new_length += inner_length;
1394 }
1395 }
1396 else
1397 {
1398 new_length = insn_current_length (insn);
1399 insn_current_address += new_length;
1400 }
1401
1402 #ifdef ADJUST_INSN_LENGTH
1403 /* If needed, do any adjustment. */
1404 tmp_length = new_length;
1405 ADJUST_INSN_LENGTH (insn, new_length);
1406 insn_current_address += (new_length - tmp_length);
1407 #endif
1408
1409 if (new_length != insn_lengths[uid]
1410 && (!increasing || new_length > insn_lengths[uid]))
1411 {
1412 insn_lengths[uid] = new_length;
1413 something_changed = 1;
1414 }
1415 else
1416 insn_current_address += insn_lengths[uid] - new_length;
1417 }
1418 /* For a non-optimizing compile, do only a single pass. */
1419 if (!increasing)
1420 break;
1421 }
1422
1423 free (varying_length);
1424
1425 #endif /* HAVE_ATTR_length */
1426 }
1427
1428 #ifdef HAVE_ATTR_length
1429 /* Given the body of an INSN known to be generated by an ASM statement, return
1430 the number of machine instructions likely to be generated for this insn.
1431 This is used to compute its length. */
1432
1433 static int
1434 asm_insn_count (rtx body)
1435 {
1436 const char *templ;
1437
1438 if (GET_CODE (body) == ASM_INPUT)
1439 templ = XSTR (body, 0);
1440 else
1441 templ = decode_asm_operands (body, NULL, NULL, NULL, NULL, NULL);
1442
1443 return asm_str_count (templ);
1444 }
1445 #endif
1446
1447 /* Return the number of machine instructions likely to be generated for the
1448 inline-asm template. */
1449 int
1450 asm_str_count (const char *templ)
1451 {
1452 int count = 1;
1453
1454 if (!*templ)
1455 return 0;
1456
1457 for (; *templ; templ++)
1458 if (IS_ASM_LOGICAL_LINE_SEPARATOR (*templ, templ)
1459 || *templ == '\n')
1460 count++;
1461
1462 return count;
1463 }
1464 \f
1465 /* ??? This is probably the wrong place for these. */
1466 /* Structure recording the mapping from source file and directory
1467 names at compile time to those to be embedded in debug
1468 information. */
1469 typedef struct debug_prefix_map
1470 {
1471 const char *old_prefix;
1472 const char *new_prefix;
1473 size_t old_len;
1474 size_t new_len;
1475 struct debug_prefix_map *next;
1476 } debug_prefix_map;
1477
1478 /* Linked list of such structures. */
1479 debug_prefix_map *debug_prefix_maps;
1480
1481
1482 /* Record a debug file prefix mapping. ARG is the argument to
1483 -fdebug-prefix-map and must be of the form OLD=NEW. */
1484
1485 void
1486 add_debug_prefix_map (const char *arg)
1487 {
1488 debug_prefix_map *map;
1489 const char *p;
1490
1491 p = strchr (arg, '=');
1492 if (!p)
1493 {
1494 error ("invalid argument %qs to -fdebug-prefix-map", arg);
1495 return;
1496 }
1497 map = XNEW (debug_prefix_map);
1498 map->old_prefix = xstrndup (arg, p - arg);
1499 map->old_len = p - arg;
1500 p++;
1501 map->new_prefix = xstrdup (p);
1502 map->new_len = strlen (p);
1503 map->next = debug_prefix_maps;
1504 debug_prefix_maps = map;
1505 }
1506
1507 /* Perform user-specified mapping of debug filename prefixes. Return
1508 the new name corresponding to FILENAME. */
1509
1510 const char *
1511 remap_debug_filename (const char *filename)
1512 {
1513 debug_prefix_map *map;
1514 char *s;
1515 const char *name;
1516 size_t name_len;
1517
1518 for (map = debug_prefix_maps; map; map = map->next)
1519 if (filename_ncmp (filename, map->old_prefix, map->old_len) == 0)
1520 break;
1521 if (!map)
1522 return filename;
1523 name = filename + map->old_len;
1524 name_len = strlen (name) + 1;
1525 s = (char *) alloca (name_len + map->new_len);
1526 memcpy (s, map->new_prefix, map->new_len);
1527 memcpy (s + map->new_len, name, name_len);
1528 return ggc_strdup (s);
1529 }
1530 \f
1531 /* Return true if DWARF2 debug info can be emitted for DECL. */
1532
1533 static bool
1534 dwarf2_debug_info_emitted_p (tree decl)
1535 {
1536 if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG)
1537 return false;
1538
1539 if (DECL_IGNORED_P (decl))
1540 return false;
1541
1542 return true;
1543 }
1544
1545 /* Return scope resulting from combination of S1 and S2. */
1546 static tree
1547 choose_inner_scope (tree s1, tree s2)
1548 {
1549 if (!s1)
1550 return s2;
1551 if (!s2)
1552 return s1;
1553 if (BLOCK_NUMBER (s1) > BLOCK_NUMBER (s2))
1554 return s1;
1555 return s2;
1556 }
1557
1558 /* Emit lexical block notes needed to change scope from S1 to S2. */
1559
1560 static void
1561 change_scope (rtx orig_insn, tree s1, tree s2)
1562 {
1563 rtx insn = orig_insn;
1564 tree com = NULL_TREE;
1565 tree ts1 = s1, ts2 = s2;
1566 tree s;
1567
1568 while (ts1 != ts2)
1569 {
1570 gcc_assert (ts1 && ts2);
1571 if (BLOCK_NUMBER (ts1) > BLOCK_NUMBER (ts2))
1572 ts1 = BLOCK_SUPERCONTEXT (ts1);
1573 else if (BLOCK_NUMBER (ts1) < BLOCK_NUMBER (ts2))
1574 ts2 = BLOCK_SUPERCONTEXT (ts2);
1575 else
1576 {
1577 ts1 = BLOCK_SUPERCONTEXT (ts1);
1578 ts2 = BLOCK_SUPERCONTEXT (ts2);
1579 }
1580 }
1581 com = ts1;
1582
1583 /* Close scopes. */
1584 s = s1;
1585 while (s != com)
1586 {
1587 rtx note = emit_note_before (NOTE_INSN_BLOCK_END, insn);
1588 NOTE_BLOCK (note) = s;
1589 s = BLOCK_SUPERCONTEXT (s);
1590 }
1591
1592 /* Open scopes. */
1593 s = s2;
1594 while (s != com)
1595 {
1596 insn = emit_note_before (NOTE_INSN_BLOCK_BEG, insn);
1597 NOTE_BLOCK (insn) = s;
1598 s = BLOCK_SUPERCONTEXT (s);
1599 }
1600 }
1601
1602 /* Rebuild all the NOTE_INSN_BLOCK_BEG and NOTE_INSN_BLOCK_END notes based
1603 on the scope tree and the newly reordered instructions. */
1604
1605 static void
1606 reemit_insn_block_notes (void)
1607 {
1608 tree cur_block = DECL_INITIAL (cfun->decl);
1609 rtx insn, note;
1610
1611 insn = get_insns ();
1612 if (!active_insn_p (insn))
1613 insn = next_active_insn (insn);
1614 for (; insn; insn = next_active_insn (insn))
1615 {
1616 tree this_block;
1617
1618 /* Avoid putting scope notes between jump table and its label. */
1619 if (JUMP_TABLE_DATA_P (insn))
1620 continue;
1621
1622 this_block = insn_scope (insn);
1623 /* For sequences compute scope resulting from merging all scopes
1624 of instructions nested inside. */
1625 if (GET_CODE (PATTERN (insn)) == SEQUENCE)
1626 {
1627 int i;
1628 rtx body = PATTERN (insn);
1629
1630 this_block = NULL;
1631 for (i = 0; i < XVECLEN (body, 0); i++)
1632 this_block = choose_inner_scope (this_block,
1633 insn_scope (XVECEXP (body, 0, i)));
1634 }
1635 if (! this_block)
1636 this_block = DECL_INITIAL (cfun->decl);
1637
1638 if (this_block != cur_block)
1639 {
1640 change_scope (insn, cur_block, this_block);
1641 cur_block = this_block;
1642 }
1643 }
1644
1645 /* change_scope emits before the insn, not after. */
1646 note = emit_note (NOTE_INSN_DELETED);
1647 change_scope (note, cur_block, DECL_INITIAL (cfun->decl));
1648 delete_insn (note);
1649
1650 reorder_blocks ();
1651 }
1652
1653 /* Output assembler code for the start of a function,
1654 and initialize some of the variables in this file
1655 for the new function. The label for the function and associated
1656 assembler pseudo-ops have already been output in `assemble_start_function'.
1657
1658 FIRST is the first insn of the rtl for the function being compiled.
1659 FILE is the file to write assembler code to.
1660 OPTIMIZE_P is nonzero if we should eliminate redundant
1661 test and compare insns. */
1662
1663 void
1664 final_start_function (rtx first ATTRIBUTE_UNUSED, FILE *file,
1665 int optimize_p ATTRIBUTE_UNUSED)
1666 {
1667 block_depth = 0;
1668
1669 this_is_asm_operands = 0;
1670
1671 last_filename = LOCATION_FILE (prologue_location);
1672 last_linenum = LOCATION_LINE (prologue_location);
1673 last_discriminator = discriminator = 0;
1674
1675 high_block_linenum = high_function_linenum = last_linenum;
1676
1677 if (!DECL_IGNORED_P (current_function_decl))
1678 debug_hooks->begin_prologue (last_linenum, last_filename);
1679
1680 if (!dwarf2_debug_info_emitted_p (current_function_decl))
1681 dwarf2out_begin_prologue (0, NULL);
1682
1683 #ifdef LEAF_REG_REMAP
1684 if (crtl->uses_only_leaf_regs)
1685 leaf_renumber_regs (first);
1686 #endif
1687
1688 /* The Sun386i and perhaps other machines don't work right
1689 if the profiling code comes after the prologue. */
1690 if (targetm.profile_before_prologue () && crtl->profile)
1691 profile_function (file);
1692
1693 /* If debugging, assign block numbers to all of the blocks in this
1694 function. */
1695 if (write_symbols)
1696 {
1697 reemit_insn_block_notes ();
1698 number_blocks (current_function_decl);
1699 /* We never actually put out begin/end notes for the top-level
1700 block in the function. But, conceptually, that block is
1701 always needed. */
1702 TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl)) = 1;
1703 }
1704
1705 if (warn_frame_larger_than
1706 && get_frame_size () > frame_larger_than_size)
1707 {
1708 /* Issue a warning */
1709 warning (OPT_Wframe_larger_than_,
1710 "the frame size of %wd bytes is larger than %wd bytes",
1711 get_frame_size (), frame_larger_than_size);
1712 }
1713
1714 /* First output the function prologue: code to set up the stack frame. */
1715 targetm.asm_out.function_prologue (file, get_frame_size ());
1716
1717 /* If the machine represents the prologue as RTL, the profiling code must
1718 be emitted when NOTE_INSN_PROLOGUE_END is scanned. */
1719 #ifdef HAVE_prologue
1720 if (! HAVE_prologue)
1721 #endif
1722 profile_after_prologue (file);
1723 }
1724
1725 static void
1726 profile_after_prologue (FILE *file ATTRIBUTE_UNUSED)
1727 {
1728 if (!targetm.profile_before_prologue () && crtl->profile)
1729 profile_function (file);
1730 }
1731
1732 static void
1733 profile_function (FILE *file ATTRIBUTE_UNUSED)
1734 {
1735 #ifndef NO_PROFILE_COUNTERS
1736 # define NO_PROFILE_COUNTERS 0
1737 #endif
1738 #ifdef ASM_OUTPUT_REG_PUSH
1739 rtx sval = NULL, chain = NULL;
1740
1741 if (cfun->returns_struct)
1742 sval = targetm.calls.struct_value_rtx (TREE_TYPE (current_function_decl),
1743 true);
1744 if (cfun->static_chain_decl)
1745 chain = targetm.calls.static_chain (current_function_decl, true);
1746 #endif /* ASM_OUTPUT_REG_PUSH */
1747
1748 if (! NO_PROFILE_COUNTERS)
1749 {
1750 int align = MIN (BIGGEST_ALIGNMENT, LONG_TYPE_SIZE);
1751 switch_to_section (data_section);
1752 ASM_OUTPUT_ALIGN (file, floor_log2 (align / BITS_PER_UNIT));
1753 targetm.asm_out.internal_label (file, "LP", current_function_funcdef_no);
1754 assemble_integer (const0_rtx, LONG_TYPE_SIZE / BITS_PER_UNIT, align, 1);
1755 }
1756
1757 switch_to_section (current_function_section ());
1758
1759 #ifdef ASM_OUTPUT_REG_PUSH
1760 if (sval && REG_P (sval))
1761 ASM_OUTPUT_REG_PUSH (file, REGNO (sval));
1762 if (chain && REG_P (chain))
1763 ASM_OUTPUT_REG_PUSH (file, REGNO (chain));
1764 #endif
1765
1766 FUNCTION_PROFILER (file, current_function_funcdef_no);
1767
1768 #ifdef ASM_OUTPUT_REG_PUSH
1769 if (chain && REG_P (chain))
1770 ASM_OUTPUT_REG_POP (file, REGNO (chain));
1771 if (sval && REG_P (sval))
1772 ASM_OUTPUT_REG_POP (file, REGNO (sval));
1773 #endif
1774 }
1775
1776 /* Output assembler code for the end of a function.
1777 For clarity, args are same as those of `final_start_function'
1778 even though not all of them are needed. */
1779
1780 void
1781 final_end_function (void)
1782 {
1783 app_disable ();
1784
1785 if (!DECL_IGNORED_P (current_function_decl))
1786 debug_hooks->end_function (high_function_linenum);
1787
1788 /* Finally, output the function epilogue:
1789 code to restore the stack frame and return to the caller. */
1790 targetm.asm_out.function_epilogue (asm_out_file, get_frame_size ());
1791
1792 /* And debug output. */
1793 if (!DECL_IGNORED_P (current_function_decl))
1794 debug_hooks->end_epilogue (last_linenum, last_filename);
1795
1796 if (!dwarf2_debug_info_emitted_p (current_function_decl)
1797 && dwarf2out_do_frame ())
1798 dwarf2out_end_epilogue (last_linenum, last_filename);
1799 }
1800 \f
1801
1802 /* Dumper helper for basic block information. FILE is the assembly
1803 output file, and INSN is the instruction being emitted. */
1804
1805 static void
1806 dump_basic_block_info (FILE *file, rtx insn, basic_block *start_to_bb,
1807 basic_block *end_to_bb, int bb_map_size, int *bb_seqn)
1808 {
1809 basic_block bb;
1810
1811 if (!flag_debug_asm)
1812 return;
1813
1814 if (INSN_UID (insn) < bb_map_size
1815 && (bb = start_to_bb[INSN_UID (insn)]) != NULL)
1816 {
1817 edge e;
1818 edge_iterator ei;
1819
1820 fprintf (file, "%s BLOCK %d", ASM_COMMENT_START, bb->index);
1821 if (bb->frequency)
1822 fprintf (file, " freq:%d", bb->frequency);
1823 if (bb->count)
1824 fprintf (file, " count:" HOST_WIDEST_INT_PRINT_DEC,
1825 bb->count);
1826 fprintf (file, " seq:%d", (*bb_seqn)++);
1827 fprintf (file, "\n%s PRED:", ASM_COMMENT_START);
1828 FOR_EACH_EDGE (e, ei, bb->preds)
1829 {
1830 dump_edge_info (file, e, TDF_DETAILS, 0);
1831 }
1832 fprintf (file, "\n");
1833 }
1834 if (INSN_UID (insn) < bb_map_size
1835 && (bb = end_to_bb[INSN_UID (insn)]) != NULL)
1836 {
1837 edge e;
1838 edge_iterator ei;
1839
1840 fprintf (asm_out_file, "%s SUCC:", ASM_COMMENT_START);
1841 FOR_EACH_EDGE (e, ei, bb->succs)
1842 {
1843 dump_edge_info (asm_out_file, e, TDF_DETAILS, 1);
1844 }
1845 fprintf (file, "\n");
1846 }
1847 }
1848
1849 /* Output assembler code for some insns: all or part of a function.
1850 For description of args, see `final_start_function', above. */
1851
1852 void
1853 final (rtx first, FILE *file, int optimize_p)
1854 {
1855 rtx insn, next;
1856 int seen = 0;
1857
1858 /* Used for -dA dump. */
1859 basic_block *start_to_bb = NULL;
1860 basic_block *end_to_bb = NULL;
1861 int bb_map_size = 0;
1862 int bb_seqn = 0;
1863
1864 last_ignored_compare = 0;
1865
1866 #ifdef HAVE_cc0
1867 for (insn = first; insn; insn = NEXT_INSN (insn))
1868 {
1869 /* If CC tracking across branches is enabled, record the insn which
1870 jumps to each branch only reached from one place. */
1871 if (optimize_p && JUMP_P (insn))
1872 {
1873 rtx lab = JUMP_LABEL (insn);
1874 if (lab && LABEL_P (lab) && LABEL_NUSES (lab) == 1)
1875 {
1876 LABEL_REFS (lab) = insn;
1877 }
1878 }
1879 }
1880 #endif
1881
1882 init_recog ();
1883
1884 CC_STATUS_INIT;
1885
1886 if (flag_debug_asm)
1887 {
1888 basic_block bb;
1889
1890 bb_map_size = get_max_uid () + 1;
1891 start_to_bb = XCNEWVEC (basic_block, bb_map_size);
1892 end_to_bb = XCNEWVEC (basic_block, bb_map_size);
1893
1894 /* There is no cfg for a thunk. */
1895 if (!cfun->is_thunk)
1896 FOR_EACH_BB_REVERSE (bb)
1897 {
1898 start_to_bb[INSN_UID (BB_HEAD (bb))] = bb;
1899 end_to_bb[INSN_UID (BB_END (bb))] = bb;
1900 }
1901 }
1902
1903 /* Output the insns. */
1904 for (insn = first; insn;)
1905 {
1906 #ifdef HAVE_ATTR_length
1907 if ((unsigned) INSN_UID (insn) >= INSN_ADDRESSES_SIZE ())
1908 {
1909 /* This can be triggered by bugs elsewhere in the compiler if
1910 new insns are created after init_insn_lengths is called. */
1911 gcc_assert (NOTE_P (insn));
1912 insn_current_address = -1;
1913 }
1914 else
1915 insn_current_address = INSN_ADDRESSES (INSN_UID (insn));
1916 #endif /* HAVE_ATTR_length */
1917
1918 dump_basic_block_info (file, insn, start_to_bb, end_to_bb,
1919 bb_map_size, &bb_seqn);
1920 insn = final_scan_insn (insn, file, optimize_p, 0, &seen);
1921 }
1922
1923 if (flag_debug_asm)
1924 {
1925 free (start_to_bb);
1926 free (end_to_bb);
1927 }
1928
1929 /* Remove CFI notes, to avoid compare-debug failures. */
1930 for (insn = first; insn; insn = next)
1931 {
1932 next = NEXT_INSN (insn);
1933 if (NOTE_P (insn)
1934 && (NOTE_KIND (insn) == NOTE_INSN_CFI
1935 || NOTE_KIND (insn) == NOTE_INSN_CFI_LABEL))
1936 delete_insn (insn);
1937 }
1938 }
1939 \f
1940 const char *
1941 get_insn_template (int code, rtx insn)
1942 {
1943 switch (insn_data[code].output_format)
1944 {
1945 case INSN_OUTPUT_FORMAT_SINGLE:
1946 return insn_data[code].output.single;
1947 case INSN_OUTPUT_FORMAT_MULTI:
1948 return insn_data[code].output.multi[which_alternative];
1949 case INSN_OUTPUT_FORMAT_FUNCTION:
1950 gcc_assert (insn);
1951 return (*insn_data[code].output.function) (recog_data.operand, insn);
1952
1953 default:
1954 gcc_unreachable ();
1955 }
1956 }
1957
1958 /* Emit the appropriate declaration for an alternate-entry-point
1959 symbol represented by INSN, to FILE. INSN is a CODE_LABEL with
1960 LABEL_KIND != LABEL_NORMAL.
1961
1962 The case fall-through in this function is intentional. */
1963 static void
1964 output_alternate_entry_point (FILE *file, rtx insn)
1965 {
1966 const char *name = LABEL_NAME (insn);
1967
1968 switch (LABEL_KIND (insn))
1969 {
1970 case LABEL_WEAK_ENTRY:
1971 #ifdef ASM_WEAKEN_LABEL
1972 ASM_WEAKEN_LABEL (file, name);
1973 #endif
1974 case LABEL_GLOBAL_ENTRY:
1975 targetm.asm_out.globalize_label (file, name);
1976 case LABEL_STATIC_ENTRY:
1977 #ifdef ASM_OUTPUT_TYPE_DIRECTIVE
1978 ASM_OUTPUT_TYPE_DIRECTIVE (file, name, "function");
1979 #endif
1980 ASM_OUTPUT_LABEL (file, name);
1981 break;
1982
1983 case LABEL_NORMAL:
1984 default:
1985 gcc_unreachable ();
1986 }
1987 }
1988
1989 /* Given a CALL_INSN, find and return the nested CALL. */
1990 static rtx
1991 call_from_call_insn (rtx insn)
1992 {
1993 rtx x;
1994 gcc_assert (CALL_P (insn));
1995 x = PATTERN (insn);
1996
1997 while (GET_CODE (x) != CALL)
1998 {
1999 switch (GET_CODE (x))
2000 {
2001 default:
2002 gcc_unreachable ();
2003 case COND_EXEC:
2004 x = COND_EXEC_CODE (x);
2005 break;
2006 case PARALLEL:
2007 x = XVECEXP (x, 0, 0);
2008 break;
2009 case SET:
2010 x = XEXP (x, 1);
2011 break;
2012 }
2013 }
2014 return x;
2015 }
2016
2017 /* The final scan for one insn, INSN.
2018 Args are same as in `final', except that INSN
2019 is the insn being scanned.
2020 Value returned is the next insn to be scanned.
2021
2022 NOPEEPHOLES is the flag to disallow peephole processing (currently
2023 used for within delayed branch sequence output).
2024
2025 SEEN is used to track the end of the prologue, for emitting
2026 debug information. We force the emission of a line note after
2027 both NOTE_INSN_PROLOGUE_END and NOTE_INSN_FUNCTION_BEG, or
2028 at the beginning of the second basic block, whichever comes
2029 first. */
2030
2031 rtx
2032 final_scan_insn (rtx insn, FILE *file, int optimize_p ATTRIBUTE_UNUSED,
2033 int nopeepholes ATTRIBUTE_UNUSED, int *seen)
2034 {
2035 #ifdef HAVE_cc0
2036 rtx set;
2037 #endif
2038 rtx next;
2039
2040 insn_counter++;
2041
2042 /* Ignore deleted insns. These can occur when we split insns (due to a
2043 template of "#") while not optimizing. */
2044 if (INSN_DELETED_P (insn))
2045 return NEXT_INSN (insn);
2046
2047 switch (GET_CODE (insn))
2048 {
2049 case NOTE:
2050 switch (NOTE_KIND (insn))
2051 {
2052 case NOTE_INSN_DELETED:
2053 break;
2054
2055 case NOTE_INSN_SWITCH_TEXT_SECTIONS:
2056 in_cold_section_p = !in_cold_section_p;
2057
2058 if (dwarf2out_do_frame ())
2059 dwarf2out_switch_text_section ();
2060 else if (!DECL_IGNORED_P (current_function_decl))
2061 debug_hooks->switch_text_section ();
2062
2063 switch_to_section (current_function_section ());
2064 targetm.asm_out.function_switched_text_sections (asm_out_file,
2065 current_function_decl,
2066 in_cold_section_p);
2067 break;
2068
2069 case NOTE_INSN_BASIC_BLOCK:
2070 if (targetm.asm_out.unwind_emit)
2071 targetm.asm_out.unwind_emit (asm_out_file, insn);
2072
2073 if ((*seen & (SEEN_EMITTED | SEEN_BB)) == SEEN_BB)
2074 {
2075 *seen |= SEEN_EMITTED;
2076 force_source_line = true;
2077 }
2078 else
2079 *seen |= SEEN_BB;
2080
2081 discriminator = NOTE_BASIC_BLOCK (insn)->discriminator;
2082
2083 break;
2084
2085 case NOTE_INSN_EH_REGION_BEG:
2086 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHB",
2087 NOTE_EH_HANDLER (insn));
2088 break;
2089
2090 case NOTE_INSN_EH_REGION_END:
2091 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHE",
2092 NOTE_EH_HANDLER (insn));
2093 break;
2094
2095 case NOTE_INSN_PROLOGUE_END:
2096 targetm.asm_out.function_end_prologue (file);
2097 profile_after_prologue (file);
2098
2099 if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE)
2100 {
2101 *seen |= SEEN_EMITTED;
2102 force_source_line = true;
2103 }
2104 else
2105 *seen |= SEEN_NOTE;
2106
2107 break;
2108
2109 case NOTE_INSN_EPILOGUE_BEG:
2110 if (!DECL_IGNORED_P (current_function_decl))
2111 (*debug_hooks->begin_epilogue) (last_linenum, last_filename);
2112 targetm.asm_out.function_begin_epilogue (file);
2113 break;
2114
2115 case NOTE_INSN_CFI:
2116 dwarf2out_emit_cfi (NOTE_CFI (insn));
2117 break;
2118
2119 case NOTE_INSN_CFI_LABEL:
2120 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LCFI",
2121 NOTE_LABEL_NUMBER (insn));
2122 break;
2123
2124 case NOTE_INSN_FUNCTION_BEG:
2125 app_disable ();
2126 if (!DECL_IGNORED_P (current_function_decl))
2127 debug_hooks->end_prologue (last_linenum, last_filename);
2128
2129 if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE)
2130 {
2131 *seen |= SEEN_EMITTED;
2132 force_source_line = true;
2133 }
2134 else
2135 *seen |= SEEN_NOTE;
2136
2137 break;
2138
2139 case NOTE_INSN_BLOCK_BEG:
2140 if (debug_info_level == DINFO_LEVEL_NORMAL
2141 || debug_info_level == DINFO_LEVEL_VERBOSE
2142 || write_symbols == DWARF2_DEBUG
2143 || write_symbols == VMS_AND_DWARF2_DEBUG
2144 || write_symbols == VMS_DEBUG)
2145 {
2146 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
2147
2148 app_disable ();
2149 ++block_depth;
2150 high_block_linenum = last_linenum;
2151
2152 /* Output debugging info about the symbol-block beginning. */
2153 if (!DECL_IGNORED_P (current_function_decl))
2154 debug_hooks->begin_block (last_linenum, n);
2155
2156 /* Mark this block as output. */
2157 TREE_ASM_WRITTEN (NOTE_BLOCK (insn)) = 1;
2158 }
2159 if (write_symbols == DBX_DEBUG
2160 || write_symbols == SDB_DEBUG)
2161 {
2162 location_t *locus_ptr
2163 = block_nonartificial_location (NOTE_BLOCK (insn));
2164
2165 if (locus_ptr != NULL)
2166 {
2167 override_filename = LOCATION_FILE (*locus_ptr);
2168 override_linenum = LOCATION_LINE (*locus_ptr);
2169 }
2170 }
2171 break;
2172
2173 case NOTE_INSN_BLOCK_END:
2174 if (debug_info_level == DINFO_LEVEL_NORMAL
2175 || debug_info_level == DINFO_LEVEL_VERBOSE
2176 || write_symbols == DWARF2_DEBUG
2177 || write_symbols == VMS_AND_DWARF2_DEBUG
2178 || write_symbols == VMS_DEBUG)
2179 {
2180 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
2181
2182 app_disable ();
2183
2184 /* End of a symbol-block. */
2185 --block_depth;
2186 gcc_assert (block_depth >= 0);
2187
2188 if (!DECL_IGNORED_P (current_function_decl))
2189 debug_hooks->end_block (high_block_linenum, n);
2190 }
2191 if (write_symbols == DBX_DEBUG
2192 || write_symbols == SDB_DEBUG)
2193 {
2194 tree outer_block = BLOCK_SUPERCONTEXT (NOTE_BLOCK (insn));
2195 location_t *locus_ptr
2196 = block_nonartificial_location (outer_block);
2197
2198 if (locus_ptr != NULL)
2199 {
2200 override_filename = LOCATION_FILE (*locus_ptr);
2201 override_linenum = LOCATION_LINE (*locus_ptr);
2202 }
2203 else
2204 {
2205 override_filename = NULL;
2206 override_linenum = 0;
2207 }
2208 }
2209 break;
2210
2211 case NOTE_INSN_DELETED_LABEL:
2212 /* Emit the label. We may have deleted the CODE_LABEL because
2213 the label could be proved to be unreachable, though still
2214 referenced (in the form of having its address taken. */
2215 ASM_OUTPUT_DEBUG_LABEL (file, "L", CODE_LABEL_NUMBER (insn));
2216 break;
2217
2218 case NOTE_INSN_DELETED_DEBUG_LABEL:
2219 /* Similarly, but need to use different namespace for it. */
2220 if (CODE_LABEL_NUMBER (insn) != -1)
2221 ASM_OUTPUT_DEBUG_LABEL (file, "LDL", CODE_LABEL_NUMBER (insn));
2222 break;
2223
2224 case NOTE_INSN_VAR_LOCATION:
2225 case NOTE_INSN_CALL_ARG_LOCATION:
2226 if (!DECL_IGNORED_P (current_function_decl))
2227 debug_hooks->var_location (insn);
2228 break;
2229
2230 default:
2231 gcc_unreachable ();
2232 break;
2233 }
2234 break;
2235
2236 case BARRIER:
2237 break;
2238
2239 case CODE_LABEL:
2240 /* The target port might emit labels in the output function for
2241 some insn, e.g. sh.c output_branchy_insn. */
2242 if (CODE_LABEL_NUMBER (insn) <= max_labelno)
2243 {
2244 int align = LABEL_TO_ALIGNMENT (insn);
2245 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2246 int max_skip = LABEL_TO_MAX_SKIP (insn);
2247 #endif
2248
2249 if (align && NEXT_INSN (insn))
2250 {
2251 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2252 ASM_OUTPUT_MAX_SKIP_ALIGN (file, align, max_skip);
2253 #else
2254 #ifdef ASM_OUTPUT_ALIGN_WITH_NOP
2255 ASM_OUTPUT_ALIGN_WITH_NOP (file, align);
2256 #else
2257 ASM_OUTPUT_ALIGN (file, align);
2258 #endif
2259 #endif
2260 }
2261 }
2262 CC_STATUS_INIT;
2263
2264 if (!DECL_IGNORED_P (current_function_decl) && LABEL_NAME (insn))
2265 debug_hooks->label (insn);
2266
2267 app_disable ();
2268
2269 next = next_nonnote_insn (insn);
2270 /* If this label is followed by a jump-table, make sure we put
2271 the label in the read-only section. Also possibly write the
2272 label and jump table together. */
2273 if (next != 0 && JUMP_TABLE_DATA_P (next))
2274 {
2275 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2276 /* In this case, the case vector is being moved by the
2277 target, so don't output the label at all. Leave that
2278 to the back end macros. */
2279 #else
2280 if (! JUMP_TABLES_IN_TEXT_SECTION)
2281 {
2282 int log_align;
2283
2284 switch_to_section (targetm.asm_out.function_rodata_section
2285 (current_function_decl));
2286
2287 #ifdef ADDR_VEC_ALIGN
2288 log_align = ADDR_VEC_ALIGN (next);
2289 #else
2290 log_align = exact_log2 (BIGGEST_ALIGNMENT / BITS_PER_UNIT);
2291 #endif
2292 ASM_OUTPUT_ALIGN (file, log_align);
2293 }
2294 else
2295 switch_to_section (current_function_section ());
2296
2297 #ifdef ASM_OUTPUT_CASE_LABEL
2298 ASM_OUTPUT_CASE_LABEL (file, "L", CODE_LABEL_NUMBER (insn),
2299 next);
2300 #else
2301 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn));
2302 #endif
2303 #endif
2304 break;
2305 }
2306 if (LABEL_ALT_ENTRY_P (insn))
2307 output_alternate_entry_point (file, insn);
2308 else
2309 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn));
2310 break;
2311
2312 default:
2313 {
2314 rtx body = PATTERN (insn);
2315 int insn_code_number;
2316 const char *templ;
2317 bool is_stmt;
2318
2319 /* Reset this early so it is correct for ASM statements. */
2320 current_insn_predicate = NULL_RTX;
2321
2322 /* An INSN, JUMP_INSN or CALL_INSN.
2323 First check for special kinds that recog doesn't recognize. */
2324
2325 if (GET_CODE (body) == USE /* These are just declarations. */
2326 || GET_CODE (body) == CLOBBER)
2327 break;
2328
2329 #ifdef HAVE_cc0
2330 {
2331 /* If there is a REG_CC_SETTER note on this insn, it means that
2332 the setting of the condition code was done in the delay slot
2333 of the insn that branched here. So recover the cc status
2334 from the insn that set it. */
2335
2336 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2337 if (note)
2338 {
2339 NOTICE_UPDATE_CC (PATTERN (XEXP (note, 0)), XEXP (note, 0));
2340 cc_prev_status = cc_status;
2341 }
2342 }
2343 #endif
2344
2345 /* Detect insns that are really jump-tables
2346 and output them as such. */
2347
2348 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
2349 {
2350 #if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC))
2351 int vlen, idx;
2352 #endif
2353
2354 if (! JUMP_TABLES_IN_TEXT_SECTION)
2355 switch_to_section (targetm.asm_out.function_rodata_section
2356 (current_function_decl));
2357 else
2358 switch_to_section (current_function_section ());
2359
2360 app_disable ();
2361
2362 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2363 if (GET_CODE (body) == ADDR_VEC)
2364 {
2365 #ifdef ASM_OUTPUT_ADDR_VEC
2366 ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn), body);
2367 #else
2368 gcc_unreachable ();
2369 #endif
2370 }
2371 else
2372 {
2373 #ifdef ASM_OUTPUT_ADDR_DIFF_VEC
2374 ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn), body);
2375 #else
2376 gcc_unreachable ();
2377 #endif
2378 }
2379 #else
2380 vlen = XVECLEN (body, GET_CODE (body) == ADDR_DIFF_VEC);
2381 for (idx = 0; idx < vlen; idx++)
2382 {
2383 if (GET_CODE (body) == ADDR_VEC)
2384 {
2385 #ifdef ASM_OUTPUT_ADDR_VEC_ELT
2386 ASM_OUTPUT_ADDR_VEC_ELT
2387 (file, CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 0, idx), 0)));
2388 #else
2389 gcc_unreachable ();
2390 #endif
2391 }
2392 else
2393 {
2394 #ifdef ASM_OUTPUT_ADDR_DIFF_ELT
2395 ASM_OUTPUT_ADDR_DIFF_ELT
2396 (file,
2397 body,
2398 CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 1, idx), 0)),
2399 CODE_LABEL_NUMBER (XEXP (XEXP (body, 0), 0)));
2400 #else
2401 gcc_unreachable ();
2402 #endif
2403 }
2404 }
2405 #ifdef ASM_OUTPUT_CASE_END
2406 ASM_OUTPUT_CASE_END (file,
2407 CODE_LABEL_NUMBER (PREV_INSN (insn)),
2408 insn);
2409 #endif
2410 #endif
2411
2412 switch_to_section (current_function_section ());
2413
2414 break;
2415 }
2416 /* Output this line note if it is the first or the last line
2417 note in a row. */
2418 if (!DECL_IGNORED_P (current_function_decl)
2419 && notice_source_line (insn, &is_stmt))
2420 (*debug_hooks->source_line) (last_linenum, last_filename,
2421 last_discriminator, is_stmt);
2422
2423 if (GET_CODE (body) == ASM_INPUT)
2424 {
2425 const char *string = XSTR (body, 0);
2426
2427 /* There's no telling what that did to the condition codes. */
2428 CC_STATUS_INIT;
2429
2430 if (string[0])
2431 {
2432 expanded_location loc;
2433
2434 app_enable ();
2435 loc = expand_location (ASM_INPUT_SOURCE_LOCATION (body));
2436 if (*loc.file && loc.line)
2437 fprintf (asm_out_file, "%s %i \"%s\" 1\n",
2438 ASM_COMMENT_START, loc.line, loc.file);
2439 fprintf (asm_out_file, "\t%s\n", string);
2440 #if HAVE_AS_LINE_ZERO
2441 if (*loc.file && loc.line)
2442 fprintf (asm_out_file, "%s 0 \"\" 2\n", ASM_COMMENT_START);
2443 #endif
2444 }
2445 break;
2446 }
2447
2448 /* Detect `asm' construct with operands. */
2449 if (asm_noperands (body) >= 0)
2450 {
2451 unsigned int noperands = asm_noperands (body);
2452 rtx *ops = XALLOCAVEC (rtx, noperands);
2453 const char *string;
2454 location_t loc;
2455 expanded_location expanded;
2456
2457 /* There's no telling what that did to the condition codes. */
2458 CC_STATUS_INIT;
2459
2460 /* Get out the operand values. */
2461 string = decode_asm_operands (body, ops, NULL, NULL, NULL, &loc);
2462 /* Inhibit dying on what would otherwise be compiler bugs. */
2463 insn_noperands = noperands;
2464 this_is_asm_operands = insn;
2465 expanded = expand_location (loc);
2466
2467 #ifdef FINAL_PRESCAN_INSN
2468 FINAL_PRESCAN_INSN (insn, ops, insn_noperands);
2469 #endif
2470
2471 /* Output the insn using them. */
2472 if (string[0])
2473 {
2474 app_enable ();
2475 if (expanded.file && expanded.line)
2476 fprintf (asm_out_file, "%s %i \"%s\" 1\n",
2477 ASM_COMMENT_START, expanded.line, expanded.file);
2478 output_asm_insn (string, ops);
2479 #if HAVE_AS_LINE_ZERO
2480 if (expanded.file && expanded.line)
2481 fprintf (asm_out_file, "%s 0 \"\" 2\n", ASM_COMMENT_START);
2482 #endif
2483 }
2484
2485 if (targetm.asm_out.final_postscan_insn)
2486 targetm.asm_out.final_postscan_insn (file, insn, ops,
2487 insn_noperands);
2488
2489 this_is_asm_operands = 0;
2490 break;
2491 }
2492
2493 app_disable ();
2494
2495 if (GET_CODE (body) == SEQUENCE)
2496 {
2497 /* A delayed-branch sequence */
2498 int i;
2499
2500 final_sequence = body;
2501
2502 /* The first insn in this SEQUENCE might be a JUMP_INSN that will
2503 force the restoration of a comparison that was previously
2504 thought unnecessary. If that happens, cancel this sequence
2505 and cause that insn to be restored. */
2506
2507 next = final_scan_insn (XVECEXP (body, 0, 0), file, 0, 1, seen);
2508 if (next != XVECEXP (body, 0, 1))
2509 {
2510 final_sequence = 0;
2511 return next;
2512 }
2513
2514 for (i = 1; i < XVECLEN (body, 0); i++)
2515 {
2516 rtx insn = XVECEXP (body, 0, i);
2517 rtx next = NEXT_INSN (insn);
2518 /* We loop in case any instruction in a delay slot gets
2519 split. */
2520 do
2521 insn = final_scan_insn (insn, file, 0, 1, seen);
2522 while (insn != next);
2523 }
2524 #ifdef DBR_OUTPUT_SEQEND
2525 DBR_OUTPUT_SEQEND (file);
2526 #endif
2527 final_sequence = 0;
2528
2529 /* If the insn requiring the delay slot was a CALL_INSN, the
2530 insns in the delay slot are actually executed before the
2531 called function. Hence we don't preserve any CC-setting
2532 actions in these insns and the CC must be marked as being
2533 clobbered by the function. */
2534 if (CALL_P (XVECEXP (body, 0, 0)))
2535 {
2536 CC_STATUS_INIT;
2537 }
2538 break;
2539 }
2540
2541 /* We have a real machine instruction as rtl. */
2542
2543 body = PATTERN (insn);
2544
2545 #ifdef HAVE_cc0
2546 set = single_set (insn);
2547
2548 /* Check for redundant test and compare instructions
2549 (when the condition codes are already set up as desired).
2550 This is done only when optimizing; if not optimizing,
2551 it should be possible for the user to alter a variable
2552 with the debugger in between statements
2553 and the next statement should reexamine the variable
2554 to compute the condition codes. */
2555
2556 if (optimize_p)
2557 {
2558 if (set
2559 && GET_CODE (SET_DEST (set)) == CC0
2560 && insn != last_ignored_compare)
2561 {
2562 rtx src1, src2;
2563 if (GET_CODE (SET_SRC (set)) == SUBREG)
2564 SET_SRC (set) = alter_subreg (&SET_SRC (set), true);
2565
2566 src1 = SET_SRC (set);
2567 src2 = NULL_RTX;
2568 if (GET_CODE (SET_SRC (set)) == COMPARE)
2569 {
2570 if (GET_CODE (XEXP (SET_SRC (set), 0)) == SUBREG)
2571 XEXP (SET_SRC (set), 0)
2572 = alter_subreg (&XEXP (SET_SRC (set), 0), true);
2573 if (GET_CODE (XEXP (SET_SRC (set), 1)) == SUBREG)
2574 XEXP (SET_SRC (set), 1)
2575 = alter_subreg (&XEXP (SET_SRC (set), 1), true);
2576 if (XEXP (SET_SRC (set), 1)
2577 == CONST0_RTX (GET_MODE (XEXP (SET_SRC (set), 0))))
2578 src2 = XEXP (SET_SRC (set), 0);
2579 }
2580 if ((cc_status.value1 != 0
2581 && rtx_equal_p (src1, cc_status.value1))
2582 || (cc_status.value2 != 0
2583 && rtx_equal_p (src1, cc_status.value2))
2584 || (src2 != 0 && cc_status.value1 != 0
2585 && rtx_equal_p (src2, cc_status.value1))
2586 || (src2 != 0 && cc_status.value2 != 0
2587 && rtx_equal_p (src2, cc_status.value2)))
2588 {
2589 /* Don't delete insn if it has an addressing side-effect. */
2590 if (! FIND_REG_INC_NOTE (insn, NULL_RTX)
2591 /* or if anything in it is volatile. */
2592 && ! volatile_refs_p (PATTERN (insn)))
2593 {
2594 /* We don't really delete the insn; just ignore it. */
2595 last_ignored_compare = insn;
2596 break;
2597 }
2598 }
2599 }
2600 }
2601
2602 /* If this is a conditional branch, maybe modify it
2603 if the cc's are in a nonstandard state
2604 so that it accomplishes the same thing that it would
2605 do straightforwardly if the cc's were set up normally. */
2606
2607 if (cc_status.flags != 0
2608 && JUMP_P (insn)
2609 && GET_CODE (body) == SET
2610 && SET_DEST (body) == pc_rtx
2611 && GET_CODE (SET_SRC (body)) == IF_THEN_ELSE
2612 && COMPARISON_P (XEXP (SET_SRC (body), 0))
2613 && XEXP (XEXP (SET_SRC (body), 0), 0) == cc0_rtx)
2614 {
2615 /* This function may alter the contents of its argument
2616 and clear some of the cc_status.flags bits.
2617 It may also return 1 meaning condition now always true
2618 or -1 meaning condition now always false
2619 or 2 meaning condition nontrivial but altered. */
2620 int result = alter_cond (XEXP (SET_SRC (body), 0));
2621 /* If condition now has fixed value, replace the IF_THEN_ELSE
2622 with its then-operand or its else-operand. */
2623 if (result == 1)
2624 SET_SRC (body) = XEXP (SET_SRC (body), 1);
2625 if (result == -1)
2626 SET_SRC (body) = XEXP (SET_SRC (body), 2);
2627
2628 /* The jump is now either unconditional or a no-op.
2629 If it has become a no-op, don't try to output it.
2630 (It would not be recognized.) */
2631 if (SET_SRC (body) == pc_rtx)
2632 {
2633 delete_insn (insn);
2634 break;
2635 }
2636 else if (ANY_RETURN_P (SET_SRC (body)))
2637 /* Replace (set (pc) (return)) with (return). */
2638 PATTERN (insn) = body = SET_SRC (body);
2639
2640 /* Rerecognize the instruction if it has changed. */
2641 if (result != 0)
2642 INSN_CODE (insn) = -1;
2643 }
2644
2645 /* If this is a conditional trap, maybe modify it if the cc's
2646 are in a nonstandard state so that it accomplishes the same
2647 thing that it would do straightforwardly if the cc's were
2648 set up normally. */
2649 if (cc_status.flags != 0
2650 && NONJUMP_INSN_P (insn)
2651 && GET_CODE (body) == TRAP_IF
2652 && COMPARISON_P (TRAP_CONDITION (body))
2653 && XEXP (TRAP_CONDITION (body), 0) == cc0_rtx)
2654 {
2655 /* This function may alter the contents of its argument
2656 and clear some of the cc_status.flags bits.
2657 It may also return 1 meaning condition now always true
2658 or -1 meaning condition now always false
2659 or 2 meaning condition nontrivial but altered. */
2660 int result = alter_cond (TRAP_CONDITION (body));
2661
2662 /* If TRAP_CONDITION has become always false, delete the
2663 instruction. */
2664 if (result == -1)
2665 {
2666 delete_insn (insn);
2667 break;
2668 }
2669
2670 /* If TRAP_CONDITION has become always true, replace
2671 TRAP_CONDITION with const_true_rtx. */
2672 if (result == 1)
2673 TRAP_CONDITION (body) = const_true_rtx;
2674
2675 /* Rerecognize the instruction if it has changed. */
2676 if (result != 0)
2677 INSN_CODE (insn) = -1;
2678 }
2679
2680 /* Make same adjustments to instructions that examine the
2681 condition codes without jumping and instructions that
2682 handle conditional moves (if this machine has either one). */
2683
2684 if (cc_status.flags != 0
2685 && set != 0)
2686 {
2687 rtx cond_rtx, then_rtx, else_rtx;
2688
2689 if (!JUMP_P (insn)
2690 && GET_CODE (SET_SRC (set)) == IF_THEN_ELSE)
2691 {
2692 cond_rtx = XEXP (SET_SRC (set), 0);
2693 then_rtx = XEXP (SET_SRC (set), 1);
2694 else_rtx = XEXP (SET_SRC (set), 2);
2695 }
2696 else
2697 {
2698 cond_rtx = SET_SRC (set);
2699 then_rtx = const_true_rtx;
2700 else_rtx = const0_rtx;
2701 }
2702
2703 switch (GET_CODE (cond_rtx))
2704 {
2705 case GTU:
2706 case GT:
2707 case LTU:
2708 case LT:
2709 case GEU:
2710 case GE:
2711 case LEU:
2712 case LE:
2713 case EQ:
2714 case NE:
2715 {
2716 int result;
2717 if (XEXP (cond_rtx, 0) != cc0_rtx)
2718 break;
2719 result = alter_cond (cond_rtx);
2720 if (result == 1)
2721 validate_change (insn, &SET_SRC (set), then_rtx, 0);
2722 else if (result == -1)
2723 validate_change (insn, &SET_SRC (set), else_rtx, 0);
2724 else if (result == 2)
2725 INSN_CODE (insn) = -1;
2726 if (SET_DEST (set) == SET_SRC (set))
2727 delete_insn (insn);
2728 }
2729 break;
2730
2731 default:
2732 break;
2733 }
2734 }
2735
2736 #endif
2737
2738 #ifdef HAVE_peephole
2739 /* Do machine-specific peephole optimizations if desired. */
2740
2741 if (optimize_p && !flag_no_peephole && !nopeepholes)
2742 {
2743 rtx next = peephole (insn);
2744 /* When peepholing, if there were notes within the peephole,
2745 emit them before the peephole. */
2746 if (next != 0 && next != NEXT_INSN (insn))
2747 {
2748 rtx note, prev = PREV_INSN (insn);
2749
2750 for (note = NEXT_INSN (insn); note != next;
2751 note = NEXT_INSN (note))
2752 final_scan_insn (note, file, optimize_p, nopeepholes, seen);
2753
2754 /* Put the notes in the proper position for a later
2755 rescan. For example, the SH target can do this
2756 when generating a far jump in a delayed branch
2757 sequence. */
2758 note = NEXT_INSN (insn);
2759 PREV_INSN (note) = prev;
2760 NEXT_INSN (prev) = note;
2761 NEXT_INSN (PREV_INSN (next)) = insn;
2762 PREV_INSN (insn) = PREV_INSN (next);
2763 NEXT_INSN (insn) = next;
2764 PREV_INSN (next) = insn;
2765 }
2766
2767 /* PEEPHOLE might have changed this. */
2768 body = PATTERN (insn);
2769 }
2770 #endif
2771
2772 /* Try to recognize the instruction.
2773 If successful, verify that the operands satisfy the
2774 constraints for the instruction. Crash if they don't,
2775 since `reload' should have changed them so that they do. */
2776
2777 insn_code_number = recog_memoized (insn);
2778 cleanup_subreg_operands (insn);
2779
2780 /* Dump the insn in the assembly for debugging (-dAP).
2781 If the final dump is requested as slim RTL, dump slim
2782 RTL to the assembly file also. */
2783 if (flag_dump_rtl_in_asm)
2784 {
2785 print_rtx_head = ASM_COMMENT_START;
2786 if (! (dump_flags & TDF_SLIM))
2787 print_rtl_single (asm_out_file, insn);
2788 else
2789 dump_insn_slim (asm_out_file, insn);
2790 print_rtx_head = "";
2791 }
2792
2793 if (! constrain_operands_cached (1))
2794 fatal_insn_not_found (insn);
2795
2796 /* Some target machines need to prescan each insn before
2797 it is output. */
2798
2799 #ifdef FINAL_PRESCAN_INSN
2800 FINAL_PRESCAN_INSN (insn, recog_data.operand, recog_data.n_operands);
2801 #endif
2802
2803 if (targetm.have_conditional_execution ()
2804 && GET_CODE (PATTERN (insn)) == COND_EXEC)
2805 current_insn_predicate = COND_EXEC_TEST (PATTERN (insn));
2806
2807 #ifdef HAVE_cc0
2808 cc_prev_status = cc_status;
2809
2810 /* Update `cc_status' for this instruction.
2811 The instruction's output routine may change it further.
2812 If the output routine for a jump insn needs to depend
2813 on the cc status, it should look at cc_prev_status. */
2814
2815 NOTICE_UPDATE_CC (body, insn);
2816 #endif
2817
2818 current_output_insn = debug_insn = insn;
2819
2820 /* Find the proper template for this insn. */
2821 templ = get_insn_template (insn_code_number, insn);
2822
2823 /* If the C code returns 0, it means that it is a jump insn
2824 which follows a deleted test insn, and that test insn
2825 needs to be reinserted. */
2826 if (templ == 0)
2827 {
2828 rtx prev;
2829
2830 gcc_assert (prev_nonnote_insn (insn) == last_ignored_compare);
2831
2832 /* We have already processed the notes between the setter and
2833 the user. Make sure we don't process them again, this is
2834 particularly important if one of the notes is a block
2835 scope note or an EH note. */
2836 for (prev = insn;
2837 prev != last_ignored_compare;
2838 prev = PREV_INSN (prev))
2839 {
2840 if (NOTE_P (prev))
2841 delete_insn (prev); /* Use delete_note. */
2842 }
2843
2844 return prev;
2845 }
2846
2847 /* If the template is the string "#", it means that this insn must
2848 be split. */
2849 if (templ[0] == '#' && templ[1] == '\0')
2850 {
2851 rtx new_rtx = try_split (body, insn, 0);
2852
2853 /* If we didn't split the insn, go away. */
2854 if (new_rtx == insn && PATTERN (new_rtx) == body)
2855 fatal_insn ("could not split insn", insn);
2856
2857 #ifdef HAVE_ATTR_length
2858 /* This instruction should have been split in shorten_branches,
2859 to ensure that we would have valid length info for the
2860 splitees. */
2861 gcc_unreachable ();
2862 #endif
2863
2864 return new_rtx;
2865 }
2866
2867 /* ??? This will put the directives in the wrong place if
2868 get_insn_template outputs assembly directly. However calling it
2869 before get_insn_template breaks if the insns is split. */
2870 if (targetm.asm_out.unwind_emit_before_insn
2871 && targetm.asm_out.unwind_emit)
2872 targetm.asm_out.unwind_emit (asm_out_file, insn);
2873
2874 if (CALL_P (insn))
2875 {
2876 rtx x = call_from_call_insn (insn);
2877 x = XEXP (x, 0);
2878 if (x && MEM_P (x) && GET_CODE (XEXP (x, 0)) == SYMBOL_REF)
2879 {
2880 tree t;
2881 x = XEXP (x, 0);
2882 t = SYMBOL_REF_DECL (x);
2883 if (t)
2884 assemble_external (t);
2885 }
2886 if (!DECL_IGNORED_P (current_function_decl))
2887 debug_hooks->var_location (insn);
2888 }
2889
2890 /* Output assembler code from the template. */
2891 output_asm_insn (templ, recog_data.operand);
2892
2893 /* Some target machines need to postscan each insn after
2894 it is output. */
2895 if (targetm.asm_out.final_postscan_insn)
2896 targetm.asm_out.final_postscan_insn (file, insn, recog_data.operand,
2897 recog_data.n_operands);
2898
2899 if (!targetm.asm_out.unwind_emit_before_insn
2900 && targetm.asm_out.unwind_emit)
2901 targetm.asm_out.unwind_emit (asm_out_file, insn);
2902
2903 current_output_insn = debug_insn = 0;
2904 }
2905 }
2906 return NEXT_INSN (insn);
2907 }
2908 \f
2909 /* Return whether a source line note needs to be emitted before INSN.
2910 Sets IS_STMT to TRUE if the line should be marked as a possible
2911 breakpoint location. */
2912
2913 static bool
2914 notice_source_line (rtx insn, bool *is_stmt)
2915 {
2916 const char *filename;
2917 int linenum;
2918
2919 if (override_filename)
2920 {
2921 filename = override_filename;
2922 linenum = override_linenum;
2923 }
2924 else
2925 {
2926 filename = insn_file (insn);
2927 linenum = insn_line (insn);
2928 }
2929
2930 if (filename == NULL)
2931 return false;
2932
2933 if (force_source_line
2934 || filename != last_filename
2935 || last_linenum != linenum)
2936 {
2937 force_source_line = false;
2938 last_filename = filename;
2939 last_linenum = linenum;
2940 last_discriminator = discriminator;
2941 *is_stmt = true;
2942 high_block_linenum = MAX (last_linenum, high_block_linenum);
2943 high_function_linenum = MAX (last_linenum, high_function_linenum);
2944 return true;
2945 }
2946
2947 if (SUPPORTS_DISCRIMINATOR && last_discriminator != discriminator)
2948 {
2949 /* If the discriminator changed, but the line number did not,
2950 output the line table entry with is_stmt false so the
2951 debugger does not treat this as a breakpoint location. */
2952 last_discriminator = discriminator;
2953 *is_stmt = false;
2954 return true;
2955 }
2956
2957 return false;
2958 }
2959 \f
2960 /* For each operand in INSN, simplify (subreg (reg)) so that it refers
2961 directly to the desired hard register. */
2962
2963 void
2964 cleanup_subreg_operands (rtx insn)
2965 {
2966 int i;
2967 bool changed = false;
2968 extract_insn_cached (insn);
2969 for (i = 0; i < recog_data.n_operands; i++)
2970 {
2971 /* The following test cannot use recog_data.operand when testing
2972 for a SUBREG: the underlying object might have been changed
2973 already if we are inside a match_operator expression that
2974 matches the else clause. Instead we test the underlying
2975 expression directly. */
2976 if (GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
2977 {
2978 recog_data.operand[i] = alter_subreg (recog_data.operand_loc[i], true);
2979 changed = true;
2980 }
2981 else if (GET_CODE (recog_data.operand[i]) == PLUS
2982 || GET_CODE (recog_data.operand[i]) == MULT
2983 || MEM_P (recog_data.operand[i]))
2984 recog_data.operand[i] = walk_alter_subreg (recog_data.operand_loc[i], &changed);
2985 }
2986
2987 for (i = 0; i < recog_data.n_dups; i++)
2988 {
2989 if (GET_CODE (*recog_data.dup_loc[i]) == SUBREG)
2990 {
2991 *recog_data.dup_loc[i] = alter_subreg (recog_data.dup_loc[i], true);
2992 changed = true;
2993 }
2994 else if (GET_CODE (*recog_data.dup_loc[i]) == PLUS
2995 || GET_CODE (*recog_data.dup_loc[i]) == MULT
2996 || MEM_P (*recog_data.dup_loc[i]))
2997 *recog_data.dup_loc[i] = walk_alter_subreg (recog_data.dup_loc[i], &changed);
2998 }
2999 if (changed)
3000 df_insn_rescan (insn);
3001 }
3002
3003 /* If X is a SUBREG, try to replace it with a REG or a MEM, based on
3004 the thing it is a subreg of. Do it anyway if FINAL_P. */
3005
3006 rtx
3007 alter_subreg (rtx *xp, bool final_p)
3008 {
3009 rtx x = *xp;
3010 rtx y = SUBREG_REG (x);
3011
3012 /* simplify_subreg does not remove subreg from volatile references.
3013 We are required to. */
3014 if (MEM_P (y))
3015 {
3016 int offset = SUBREG_BYTE (x);
3017
3018 /* For paradoxical subregs on big-endian machines, SUBREG_BYTE
3019 contains 0 instead of the proper offset. See simplify_subreg. */
3020 if (offset == 0
3021 && GET_MODE_SIZE (GET_MODE (y)) < GET_MODE_SIZE (GET_MODE (x)))
3022 {
3023 int difference = GET_MODE_SIZE (GET_MODE (y))
3024 - GET_MODE_SIZE (GET_MODE (x));
3025 if (WORDS_BIG_ENDIAN)
3026 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
3027 if (BYTES_BIG_ENDIAN)
3028 offset += difference % UNITS_PER_WORD;
3029 }
3030
3031 if (final_p)
3032 *xp = adjust_address (y, GET_MODE (x), offset);
3033 else
3034 *xp = adjust_address_nv (y, GET_MODE (x), offset);
3035 }
3036 else
3037 {
3038 rtx new_rtx = simplify_subreg (GET_MODE (x), y, GET_MODE (y),
3039 SUBREG_BYTE (x));
3040
3041 if (new_rtx != 0)
3042 *xp = new_rtx;
3043 else if (final_p && REG_P (y))
3044 {
3045 /* Simplify_subreg can't handle some REG cases, but we have to. */
3046 unsigned int regno;
3047 HOST_WIDE_INT offset;
3048
3049 regno = subreg_regno (x);
3050 if (subreg_lowpart_p (x))
3051 offset = byte_lowpart_offset (GET_MODE (x), GET_MODE (y));
3052 else
3053 offset = SUBREG_BYTE (x);
3054 *xp = gen_rtx_REG_offset (y, GET_MODE (x), regno, offset);
3055 }
3056 }
3057
3058 return *xp;
3059 }
3060
3061 /* Do alter_subreg on all the SUBREGs contained in X. */
3062
3063 static rtx
3064 walk_alter_subreg (rtx *xp, bool *changed)
3065 {
3066 rtx x = *xp;
3067 switch (GET_CODE (x))
3068 {
3069 case PLUS:
3070 case MULT:
3071 case AND:
3072 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed);
3073 XEXP (x, 1) = walk_alter_subreg (&XEXP (x, 1), changed);
3074 break;
3075
3076 case MEM:
3077 case ZERO_EXTEND:
3078 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed);
3079 break;
3080
3081 case SUBREG:
3082 *changed = true;
3083 return alter_subreg (xp, true);
3084
3085 default:
3086 break;
3087 }
3088
3089 return *xp;
3090 }
3091 \f
3092 #ifdef HAVE_cc0
3093
3094 /* Given BODY, the body of a jump instruction, alter the jump condition
3095 as required by the bits that are set in cc_status.flags.
3096 Not all of the bits there can be handled at this level in all cases.
3097
3098 The value is normally 0.
3099 1 means that the condition has become always true.
3100 -1 means that the condition has become always false.
3101 2 means that COND has been altered. */
3102
3103 static int
3104 alter_cond (rtx cond)
3105 {
3106 int value = 0;
3107
3108 if (cc_status.flags & CC_REVERSED)
3109 {
3110 value = 2;
3111 PUT_CODE (cond, swap_condition (GET_CODE (cond)));
3112 }
3113
3114 if (cc_status.flags & CC_INVERTED)
3115 {
3116 value = 2;
3117 PUT_CODE (cond, reverse_condition (GET_CODE (cond)));
3118 }
3119
3120 if (cc_status.flags & CC_NOT_POSITIVE)
3121 switch (GET_CODE (cond))
3122 {
3123 case LE:
3124 case LEU:
3125 case GEU:
3126 /* Jump becomes unconditional. */
3127 return 1;
3128
3129 case GT:
3130 case GTU:
3131 case LTU:
3132 /* Jump becomes no-op. */
3133 return -1;
3134
3135 case GE:
3136 PUT_CODE (cond, EQ);
3137 value = 2;
3138 break;
3139
3140 case LT:
3141 PUT_CODE (cond, NE);
3142 value = 2;
3143 break;
3144
3145 default:
3146 break;
3147 }
3148
3149 if (cc_status.flags & CC_NOT_NEGATIVE)
3150 switch (GET_CODE (cond))
3151 {
3152 case GE:
3153 case GEU:
3154 /* Jump becomes unconditional. */
3155 return 1;
3156
3157 case LT:
3158 case LTU:
3159 /* Jump becomes no-op. */
3160 return -1;
3161
3162 case LE:
3163 case LEU:
3164 PUT_CODE (cond, EQ);
3165 value = 2;
3166 break;
3167
3168 case GT:
3169 case GTU:
3170 PUT_CODE (cond, NE);
3171 value = 2;
3172 break;
3173
3174 default:
3175 break;
3176 }
3177
3178 if (cc_status.flags & CC_NO_OVERFLOW)
3179 switch (GET_CODE (cond))
3180 {
3181 case GEU:
3182 /* Jump becomes unconditional. */
3183 return 1;
3184
3185 case LEU:
3186 PUT_CODE (cond, EQ);
3187 value = 2;
3188 break;
3189
3190 case GTU:
3191 PUT_CODE (cond, NE);
3192 value = 2;
3193 break;
3194
3195 case LTU:
3196 /* Jump becomes no-op. */
3197 return -1;
3198
3199 default:
3200 break;
3201 }
3202
3203 if (cc_status.flags & (CC_Z_IN_NOT_N | CC_Z_IN_N))
3204 switch (GET_CODE (cond))
3205 {
3206 default:
3207 gcc_unreachable ();
3208
3209 case NE:
3210 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? GE : LT);
3211 value = 2;
3212 break;
3213
3214 case EQ:
3215 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? LT : GE);
3216 value = 2;
3217 break;
3218 }
3219
3220 if (cc_status.flags & CC_NOT_SIGNED)
3221 /* The flags are valid if signed condition operators are converted
3222 to unsigned. */
3223 switch (GET_CODE (cond))
3224 {
3225 case LE:
3226 PUT_CODE (cond, LEU);
3227 value = 2;
3228 break;
3229
3230 case LT:
3231 PUT_CODE (cond, LTU);
3232 value = 2;
3233 break;
3234
3235 case GT:
3236 PUT_CODE (cond, GTU);
3237 value = 2;
3238 break;
3239
3240 case GE:
3241 PUT_CODE (cond, GEU);
3242 value = 2;
3243 break;
3244
3245 default:
3246 break;
3247 }
3248
3249 return value;
3250 }
3251 #endif
3252 \f
3253 /* Report inconsistency between the assembler template and the operands.
3254 In an `asm', it's the user's fault; otherwise, the compiler's fault. */
3255
3256 void
3257 output_operand_lossage (const char *cmsgid, ...)
3258 {
3259 char *fmt_string;
3260 char *new_message;
3261 const char *pfx_str;
3262 va_list ap;
3263
3264 va_start (ap, cmsgid);
3265
3266 pfx_str = this_is_asm_operands ? _("invalid 'asm': ") : "output_operand: ";
3267 asprintf (&fmt_string, "%s%s", pfx_str, _(cmsgid));
3268 vasprintf (&new_message, fmt_string, ap);
3269
3270 if (this_is_asm_operands)
3271 error_for_asm (this_is_asm_operands, "%s", new_message);
3272 else
3273 internal_error ("%s", new_message);
3274
3275 free (fmt_string);
3276 free (new_message);
3277 va_end (ap);
3278 }
3279 \f
3280 /* Output of assembler code from a template, and its subroutines. */
3281
3282 /* Annotate the assembly with a comment describing the pattern and
3283 alternative used. */
3284
3285 static void
3286 output_asm_name (void)
3287 {
3288 if (debug_insn)
3289 {
3290 int num = INSN_CODE (debug_insn);
3291 fprintf (asm_out_file, "\t%s %d\t%s",
3292 ASM_COMMENT_START, INSN_UID (debug_insn),
3293 insn_data[num].name);
3294 if (insn_data[num].n_alternatives > 1)
3295 fprintf (asm_out_file, "/%d", which_alternative + 1);
3296 #ifdef HAVE_ATTR_length
3297 fprintf (asm_out_file, "\t[length = %d]",
3298 get_attr_length (debug_insn));
3299 #endif
3300 /* Clear this so only the first assembler insn
3301 of any rtl insn will get the special comment for -dp. */
3302 debug_insn = 0;
3303 }
3304 }
3305
3306 /* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it
3307 or its address, return that expr . Set *PADDRESSP to 1 if the expr
3308 corresponds to the address of the object and 0 if to the object. */
3309
3310 static tree
3311 get_mem_expr_from_op (rtx op, int *paddressp)
3312 {
3313 tree expr;
3314 int inner_addressp;
3315
3316 *paddressp = 0;
3317
3318 if (REG_P (op))
3319 return REG_EXPR (op);
3320 else if (!MEM_P (op))
3321 return 0;
3322
3323 if (MEM_EXPR (op) != 0)
3324 return MEM_EXPR (op);
3325
3326 /* Otherwise we have an address, so indicate it and look at the address. */
3327 *paddressp = 1;
3328 op = XEXP (op, 0);
3329
3330 /* First check if we have a decl for the address, then look at the right side
3331 if it is a PLUS. Otherwise, strip off arithmetic and keep looking.
3332 But don't allow the address to itself be indirect. */
3333 if ((expr = get_mem_expr_from_op (op, &inner_addressp)) && ! inner_addressp)
3334 return expr;
3335 else if (GET_CODE (op) == PLUS
3336 && (expr = get_mem_expr_from_op (XEXP (op, 1), &inner_addressp)))
3337 return expr;
3338
3339 while (UNARY_P (op)
3340 || GET_RTX_CLASS (GET_CODE (op)) == RTX_BIN_ARITH)
3341 op = XEXP (op, 0);
3342
3343 expr = get_mem_expr_from_op (op, &inner_addressp);
3344 return inner_addressp ? 0 : expr;
3345 }
3346
3347 /* Output operand names for assembler instructions. OPERANDS is the
3348 operand vector, OPORDER is the order to write the operands, and NOPS
3349 is the number of operands to write. */
3350
3351 static void
3352 output_asm_operand_names (rtx *operands, int *oporder, int nops)
3353 {
3354 int wrote = 0;
3355 int i;
3356
3357 for (i = 0; i < nops; i++)
3358 {
3359 int addressp;
3360 rtx op = operands[oporder[i]];
3361 tree expr = get_mem_expr_from_op (op, &addressp);
3362
3363 fprintf (asm_out_file, "%c%s",
3364 wrote ? ',' : '\t', wrote ? "" : ASM_COMMENT_START);
3365 wrote = 1;
3366 if (expr)
3367 {
3368 fprintf (asm_out_file, "%s",
3369 addressp ? "*" : "");
3370 print_mem_expr (asm_out_file, expr);
3371 wrote = 1;
3372 }
3373 else if (REG_P (op) && ORIGINAL_REGNO (op)
3374 && ORIGINAL_REGNO (op) != REGNO (op))
3375 fprintf (asm_out_file, " tmp%i", ORIGINAL_REGNO (op));
3376 }
3377 }
3378
3379 #ifdef ASSEMBLER_DIALECT
3380 /* Helper function to parse assembler dialects in the asm string.
3381 This is called from output_asm_insn and asm_fprintf. */
3382 static const char *
3383 do_assembler_dialects (const char *p, int *dialect)
3384 {
3385 char c = *(p - 1);
3386
3387 switch (c)
3388 {
3389 case '{':
3390 {
3391 int i;
3392
3393 if (*dialect)
3394 output_operand_lossage ("nested assembly dialect alternatives");
3395 else
3396 *dialect = 1;
3397
3398 /* If we want the first dialect, do nothing. Otherwise, skip
3399 DIALECT_NUMBER of strings ending with '|'. */
3400 for (i = 0; i < dialect_number; i++)
3401 {
3402 while (*p && *p != '}' && *p++ != '|')
3403 ;
3404 if (*p == '}')
3405 break;
3406 }
3407
3408 if (*p == '\0')
3409 output_operand_lossage ("unterminated assembly dialect alternative");
3410 }
3411 break;
3412
3413 case '|':
3414 if (*dialect)
3415 {
3416 /* Skip to close brace. */
3417 do
3418 {
3419 if (*p == '\0')
3420 {
3421 output_operand_lossage ("unterminated assembly dialect alternative");
3422 break;
3423 }
3424 }
3425 while (*p++ != '}');
3426 *dialect = 0;
3427 }
3428 else
3429 putc (c, asm_out_file);
3430 break;
3431
3432 case '}':
3433 if (! *dialect)
3434 putc (c, asm_out_file);
3435 *dialect = 0;
3436 break;
3437 default:
3438 gcc_unreachable ();
3439 }
3440
3441 return p;
3442 }
3443 #endif
3444
3445 /* Output text from TEMPLATE to the assembler output file,
3446 obeying %-directions to substitute operands taken from
3447 the vector OPERANDS.
3448
3449 %N (for N a digit) means print operand N in usual manner.
3450 %lN means require operand N to be a CODE_LABEL or LABEL_REF
3451 and print the label name with no punctuation.
3452 %cN means require operand N to be a constant
3453 and print the constant expression with no punctuation.
3454 %aN means expect operand N to be a memory address
3455 (not a memory reference!) and print a reference
3456 to that address.
3457 %nN means expect operand N to be a constant
3458 and print a constant expression for minus the value
3459 of the operand, with no other punctuation. */
3460
3461 void
3462 output_asm_insn (const char *templ, rtx *operands)
3463 {
3464 const char *p;
3465 int c;
3466 #ifdef ASSEMBLER_DIALECT
3467 int dialect = 0;
3468 #endif
3469 int oporder[MAX_RECOG_OPERANDS];
3470 char opoutput[MAX_RECOG_OPERANDS];
3471 int ops = 0;
3472
3473 /* An insn may return a null string template
3474 in a case where no assembler code is needed. */
3475 if (*templ == 0)
3476 return;
3477
3478 memset (opoutput, 0, sizeof opoutput);
3479 p = templ;
3480 putc ('\t', asm_out_file);
3481
3482 #ifdef ASM_OUTPUT_OPCODE
3483 ASM_OUTPUT_OPCODE (asm_out_file, p);
3484 #endif
3485
3486 while ((c = *p++))
3487 switch (c)
3488 {
3489 case '\n':
3490 if (flag_verbose_asm)
3491 output_asm_operand_names (operands, oporder, ops);
3492 if (flag_print_asm_name)
3493 output_asm_name ();
3494
3495 ops = 0;
3496 memset (opoutput, 0, sizeof opoutput);
3497
3498 putc (c, asm_out_file);
3499 #ifdef ASM_OUTPUT_OPCODE
3500 while ((c = *p) == '\t')
3501 {
3502 putc (c, asm_out_file);
3503 p++;
3504 }
3505 ASM_OUTPUT_OPCODE (asm_out_file, p);
3506 #endif
3507 break;
3508
3509 #ifdef ASSEMBLER_DIALECT
3510 case '{':
3511 case '}':
3512 case '|':
3513 p = do_assembler_dialects (p, &dialect);
3514 break;
3515 #endif
3516
3517 case '%':
3518 /* %% outputs a single %. */
3519 if (*p == '%')
3520 {
3521 p++;
3522 putc (c, asm_out_file);
3523 }
3524 /* %= outputs a number which is unique to each insn in the entire
3525 compilation. This is useful for making local labels that are
3526 referred to more than once in a given insn. */
3527 else if (*p == '=')
3528 {
3529 p++;
3530 fprintf (asm_out_file, "%d", insn_counter);
3531 }
3532 /* % followed by a letter and some digits
3533 outputs an operand in a special way depending on the letter.
3534 Letters `acln' are implemented directly.
3535 Other letters are passed to `output_operand' so that
3536 the TARGET_PRINT_OPERAND hook can define them. */
3537 else if (ISALPHA (*p))
3538 {
3539 int letter = *p++;
3540 unsigned long opnum;
3541 char *endptr;
3542
3543 opnum = strtoul (p, &endptr, 10);
3544
3545 if (endptr == p)
3546 output_operand_lossage ("operand number missing "
3547 "after %%-letter");
3548 else if (this_is_asm_operands && opnum >= insn_noperands)
3549 output_operand_lossage ("operand number out of range");
3550 else if (letter == 'l')
3551 output_asm_label (operands[opnum]);
3552 else if (letter == 'a')
3553 output_address (operands[opnum]);
3554 else if (letter == 'c')
3555 {
3556 if (CONSTANT_ADDRESS_P (operands[opnum]))
3557 output_addr_const (asm_out_file, operands[opnum]);
3558 else
3559 output_operand (operands[opnum], 'c');
3560 }
3561 else if (letter == 'n')
3562 {
3563 if (CONST_INT_P (operands[opnum]))
3564 fprintf (asm_out_file, HOST_WIDE_INT_PRINT_DEC,
3565 - INTVAL (operands[opnum]));
3566 else
3567 {
3568 putc ('-', asm_out_file);
3569 output_addr_const (asm_out_file, operands[opnum]);
3570 }
3571 }
3572 else
3573 output_operand (operands[opnum], letter);
3574
3575 if (!opoutput[opnum])
3576 oporder[ops++] = opnum;
3577 opoutput[opnum] = 1;
3578
3579 p = endptr;
3580 c = *p;
3581 }
3582 /* % followed by a digit outputs an operand the default way. */
3583 else if (ISDIGIT (*p))
3584 {
3585 unsigned long opnum;
3586 char *endptr;
3587
3588 opnum = strtoul (p, &endptr, 10);
3589 if (this_is_asm_operands && opnum >= insn_noperands)
3590 output_operand_lossage ("operand number out of range");
3591 else
3592 output_operand (operands[opnum], 0);
3593
3594 if (!opoutput[opnum])
3595 oporder[ops++] = opnum;
3596 opoutput[opnum] = 1;
3597
3598 p = endptr;
3599 c = *p;
3600 }
3601 /* % followed by punctuation: output something for that
3602 punctuation character alone, with no operand. The
3603 TARGET_PRINT_OPERAND hook decides what is actually done. */
3604 else if (targetm.asm_out.print_operand_punct_valid_p ((unsigned char) *p))
3605 output_operand (NULL_RTX, *p++);
3606 else
3607 output_operand_lossage ("invalid %%-code");
3608 break;
3609
3610 default:
3611 putc (c, asm_out_file);
3612 }
3613
3614 /* Write out the variable names for operands, if we know them. */
3615 if (flag_verbose_asm)
3616 output_asm_operand_names (operands, oporder, ops);
3617 if (flag_print_asm_name)
3618 output_asm_name ();
3619
3620 putc ('\n', asm_out_file);
3621 }
3622 \f
3623 /* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */
3624
3625 void
3626 output_asm_label (rtx x)
3627 {
3628 char buf[256];
3629
3630 if (GET_CODE (x) == LABEL_REF)
3631 x = XEXP (x, 0);
3632 if (LABEL_P (x)
3633 || (NOTE_P (x)
3634 && NOTE_KIND (x) == NOTE_INSN_DELETED_LABEL))
3635 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3636 else
3637 output_operand_lossage ("'%%l' operand isn't a label");
3638
3639 assemble_name (asm_out_file, buf);
3640 }
3641
3642 /* Helper rtx-iteration-function for mark_symbol_refs_as_used and
3643 output_operand. Marks SYMBOL_REFs as referenced through use of
3644 assemble_external. */
3645
3646 static int
3647 mark_symbol_ref_as_used (rtx *xp, void *dummy ATTRIBUTE_UNUSED)
3648 {
3649 rtx x = *xp;
3650
3651 /* If we have a used symbol, we may have to emit assembly
3652 annotations corresponding to whether the symbol is external, weak
3653 or has non-default visibility. */
3654 if (GET_CODE (x) == SYMBOL_REF)
3655 {
3656 tree t;
3657
3658 t = SYMBOL_REF_DECL (x);
3659 if (t)
3660 assemble_external (t);
3661
3662 return -1;
3663 }
3664
3665 return 0;
3666 }
3667
3668 /* Marks SYMBOL_REFs in x as referenced through use of assemble_external. */
3669
3670 void
3671 mark_symbol_refs_as_used (rtx x)
3672 {
3673 for_each_rtx (&x, mark_symbol_ref_as_used, NULL);
3674 }
3675
3676 /* Print operand X using machine-dependent assembler syntax.
3677 CODE is a non-digit that preceded the operand-number in the % spec,
3678 such as 'z' if the spec was `%z3'. CODE is 0 if there was no char
3679 between the % and the digits.
3680 When CODE is a non-letter, X is 0.
3681
3682 The meanings of the letters are machine-dependent and controlled
3683 by TARGET_PRINT_OPERAND. */
3684
3685 void
3686 output_operand (rtx x, int code ATTRIBUTE_UNUSED)
3687 {
3688 if (x && GET_CODE (x) == SUBREG)
3689 x = alter_subreg (&x, true);
3690
3691 /* X must not be a pseudo reg. */
3692 gcc_assert (!x || !REG_P (x) || REGNO (x) < FIRST_PSEUDO_REGISTER);
3693
3694 targetm.asm_out.print_operand (asm_out_file, x, code);
3695
3696 if (x == NULL_RTX)
3697 return;
3698
3699 for_each_rtx (&x, mark_symbol_ref_as_used, NULL);
3700 }
3701
3702 /* Print a memory reference operand for address X using
3703 machine-dependent assembler syntax. */
3704
3705 void
3706 output_address (rtx x)
3707 {
3708 bool changed = false;
3709 walk_alter_subreg (&x, &changed);
3710 targetm.asm_out.print_operand_address (asm_out_file, x);
3711 }
3712 \f
3713 /* Print an integer constant expression in assembler syntax.
3714 Addition and subtraction are the only arithmetic
3715 that may appear in these expressions. */
3716
3717 void
3718 output_addr_const (FILE *file, rtx x)
3719 {
3720 char buf[256];
3721
3722 restart:
3723 switch (GET_CODE (x))
3724 {
3725 case PC:
3726 putc ('.', file);
3727 break;
3728
3729 case SYMBOL_REF:
3730 if (SYMBOL_REF_DECL (x))
3731 assemble_external (SYMBOL_REF_DECL (x));
3732 #ifdef ASM_OUTPUT_SYMBOL_REF
3733 ASM_OUTPUT_SYMBOL_REF (file, x);
3734 #else
3735 assemble_name (file, XSTR (x, 0));
3736 #endif
3737 break;
3738
3739 case LABEL_REF:
3740 x = XEXP (x, 0);
3741 /* Fall through. */
3742 case CODE_LABEL:
3743 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3744 #ifdef ASM_OUTPUT_LABEL_REF
3745 ASM_OUTPUT_LABEL_REF (file, buf);
3746 #else
3747 assemble_name (file, buf);
3748 #endif
3749 break;
3750
3751 case CONST_INT:
3752 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x));
3753 break;
3754
3755 case CONST:
3756 /* This used to output parentheses around the expression,
3757 but that does not work on the 386 (either ATT or BSD assembler). */
3758 output_addr_const (file, XEXP (x, 0));
3759 break;
3760
3761 case CONST_DOUBLE:
3762 if (GET_MODE (x) == VOIDmode)
3763 {
3764 /* We can use %d if the number is one word and positive. */
3765 if (CONST_DOUBLE_HIGH (x))
3766 fprintf (file, HOST_WIDE_INT_PRINT_DOUBLE_HEX,
3767 (unsigned HOST_WIDE_INT) CONST_DOUBLE_HIGH (x),
3768 (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (x));
3769 else if (CONST_DOUBLE_LOW (x) < 0)
3770 fprintf (file, HOST_WIDE_INT_PRINT_HEX,
3771 (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (x));
3772 else
3773 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x));
3774 }
3775 else
3776 /* We can't handle floating point constants;
3777 PRINT_OPERAND must handle them. */
3778 output_operand_lossage ("floating constant misused");
3779 break;
3780
3781 case CONST_FIXED:
3782 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_FIXED_VALUE_LOW (x));
3783 break;
3784
3785 case PLUS:
3786 /* Some assemblers need integer constants to appear last (eg masm). */
3787 if (CONST_INT_P (XEXP (x, 0)))
3788 {
3789 output_addr_const (file, XEXP (x, 1));
3790 if (INTVAL (XEXP (x, 0)) >= 0)
3791 fprintf (file, "+");
3792 output_addr_const (file, XEXP (x, 0));
3793 }
3794 else
3795 {
3796 output_addr_const (file, XEXP (x, 0));
3797 if (!CONST_INT_P (XEXP (x, 1))
3798 || INTVAL (XEXP (x, 1)) >= 0)
3799 fprintf (file, "+");
3800 output_addr_const (file, XEXP (x, 1));
3801 }
3802 break;
3803
3804 case MINUS:
3805 /* Avoid outputting things like x-x or x+5-x,
3806 since some assemblers can't handle that. */
3807 x = simplify_subtraction (x);
3808 if (GET_CODE (x) != MINUS)
3809 goto restart;
3810
3811 output_addr_const (file, XEXP (x, 0));
3812 fprintf (file, "-");
3813 if ((CONST_INT_P (XEXP (x, 1)) && INTVAL (XEXP (x, 1)) >= 0)
3814 || GET_CODE (XEXP (x, 1)) == PC
3815 || GET_CODE (XEXP (x, 1)) == SYMBOL_REF)
3816 output_addr_const (file, XEXP (x, 1));
3817 else
3818 {
3819 fputs (targetm.asm_out.open_paren, file);
3820 output_addr_const (file, XEXP (x, 1));
3821 fputs (targetm.asm_out.close_paren, file);
3822 }
3823 break;
3824
3825 case ZERO_EXTEND:
3826 case SIGN_EXTEND:
3827 case SUBREG:
3828 case TRUNCATE:
3829 output_addr_const (file, XEXP (x, 0));
3830 break;
3831
3832 default:
3833 if (targetm.asm_out.output_addr_const_extra (file, x))
3834 break;
3835
3836 output_operand_lossage ("invalid expression as operand");
3837 }
3838 }
3839 \f
3840 /* Output a quoted string. */
3841
3842 void
3843 output_quoted_string (FILE *asm_file, const char *string)
3844 {
3845 #ifdef OUTPUT_QUOTED_STRING
3846 OUTPUT_QUOTED_STRING (asm_file, string);
3847 #else
3848 char c;
3849
3850 putc ('\"', asm_file);
3851 while ((c = *string++) != 0)
3852 {
3853 if (ISPRINT (c))
3854 {
3855 if (c == '\"' || c == '\\')
3856 putc ('\\', asm_file);
3857 putc (c, asm_file);
3858 }
3859 else
3860 fprintf (asm_file, "\\%03o", (unsigned char) c);
3861 }
3862 putc ('\"', asm_file);
3863 #endif
3864 }
3865 \f
3866 /* Write a HOST_WIDE_INT number in hex form 0x1234, fast. */
3867
3868 void
3869 fprint_whex (FILE *f, unsigned HOST_WIDE_INT value)
3870 {
3871 char buf[2 + CHAR_BIT * sizeof (value) / 4];
3872 if (value == 0)
3873 putc ('0', f);
3874 else
3875 {
3876 char *p = buf + sizeof (buf);
3877 do
3878 *--p = "0123456789abcdef"[value % 16];
3879 while ((value /= 16) != 0);
3880 *--p = 'x';
3881 *--p = '0';
3882 fwrite (p, 1, buf + sizeof (buf) - p, f);
3883 }
3884 }
3885
3886 /* Internal function that prints an unsigned long in decimal in reverse.
3887 The output string IS NOT null-terminated. */
3888
3889 static int
3890 sprint_ul_rev (char *s, unsigned long value)
3891 {
3892 int i = 0;
3893 do
3894 {
3895 s[i] = "0123456789"[value % 10];
3896 value /= 10;
3897 i++;
3898 /* alternate version, without modulo */
3899 /* oldval = value; */
3900 /* value /= 10; */
3901 /* s[i] = "0123456789" [oldval - 10*value]; */
3902 /* i++ */
3903 }
3904 while (value != 0);
3905 return i;
3906 }
3907
3908 /* Write an unsigned long as decimal to a file, fast. */
3909
3910 void
3911 fprint_ul (FILE *f, unsigned long value)
3912 {
3913 /* python says: len(str(2**64)) == 20 */
3914 char s[20];
3915 int i;
3916
3917 i = sprint_ul_rev (s, value);
3918
3919 /* It's probably too small to bother with string reversal and fputs. */
3920 do
3921 {
3922 i--;
3923 putc (s[i], f);
3924 }
3925 while (i != 0);
3926 }
3927
3928 /* Write an unsigned long as decimal to a string, fast.
3929 s must be wide enough to not overflow, at least 21 chars.
3930 Returns the length of the string (without terminating '\0'). */
3931
3932 int
3933 sprint_ul (char *s, unsigned long value)
3934 {
3935 int len;
3936 char tmp_c;
3937 int i;
3938 int j;
3939
3940 len = sprint_ul_rev (s, value);
3941 s[len] = '\0';
3942
3943 /* Reverse the string. */
3944 i = 0;
3945 j = len - 1;
3946 while (i < j)
3947 {
3948 tmp_c = s[i];
3949 s[i] = s[j];
3950 s[j] = tmp_c;
3951 i++; j--;
3952 }
3953
3954 return len;
3955 }
3956
3957 /* A poor man's fprintf, with the added features of %I, %R, %L, and %U.
3958 %R prints the value of REGISTER_PREFIX.
3959 %L prints the value of LOCAL_LABEL_PREFIX.
3960 %U prints the value of USER_LABEL_PREFIX.
3961 %I prints the value of IMMEDIATE_PREFIX.
3962 %O runs ASM_OUTPUT_OPCODE to transform what follows in the string.
3963 Also supported are %d, %i, %u, %x, %X, %o, %c, %s and %%.
3964
3965 We handle alternate assembler dialects here, just like output_asm_insn. */
3966
3967 void
3968 asm_fprintf (FILE *file, const char *p, ...)
3969 {
3970 char buf[10];
3971 char *q, c;
3972 #ifdef ASSEMBLER_DIALECT
3973 int dialect = 0;
3974 #endif
3975 va_list argptr;
3976
3977 va_start (argptr, p);
3978
3979 buf[0] = '%';
3980
3981 while ((c = *p++))
3982 switch (c)
3983 {
3984 #ifdef ASSEMBLER_DIALECT
3985 case '{':
3986 case '}':
3987 case '|':
3988 p = do_assembler_dialects (p, &dialect);
3989 break;
3990 #endif
3991
3992 case '%':
3993 c = *p++;
3994 q = &buf[1];
3995 while (strchr ("-+ #0", c))
3996 {
3997 *q++ = c;
3998 c = *p++;
3999 }
4000 while (ISDIGIT (c) || c == '.')
4001 {
4002 *q++ = c;
4003 c = *p++;
4004 }
4005 switch (c)
4006 {
4007 case '%':
4008 putc ('%', file);
4009 break;
4010
4011 case 'd': case 'i': case 'u':
4012 case 'x': case 'X': case 'o':
4013 case 'c':
4014 *q++ = c;
4015 *q = 0;
4016 fprintf (file, buf, va_arg (argptr, int));
4017 break;
4018
4019 case 'w':
4020 /* This is a prefix to the 'd', 'i', 'u', 'x', 'X', and
4021 'o' cases, but we do not check for those cases. It
4022 means that the value is a HOST_WIDE_INT, which may be
4023 either `long' or `long long'. */
4024 memcpy (q, HOST_WIDE_INT_PRINT, strlen (HOST_WIDE_INT_PRINT));
4025 q += strlen (HOST_WIDE_INT_PRINT);
4026 *q++ = *p++;
4027 *q = 0;
4028 fprintf (file, buf, va_arg (argptr, HOST_WIDE_INT));
4029 break;
4030
4031 case 'l':
4032 *q++ = c;
4033 #ifdef HAVE_LONG_LONG
4034 if (*p == 'l')
4035 {
4036 *q++ = *p++;
4037 *q++ = *p++;
4038 *q = 0;
4039 fprintf (file, buf, va_arg (argptr, long long));
4040 }
4041 else
4042 #endif
4043 {
4044 *q++ = *p++;
4045 *q = 0;
4046 fprintf (file, buf, va_arg (argptr, long));
4047 }
4048
4049 break;
4050
4051 case 's':
4052 *q++ = c;
4053 *q = 0;
4054 fprintf (file, buf, va_arg (argptr, char *));
4055 break;
4056
4057 case 'O':
4058 #ifdef ASM_OUTPUT_OPCODE
4059 ASM_OUTPUT_OPCODE (asm_out_file, p);
4060 #endif
4061 break;
4062
4063 case 'R':
4064 #ifdef REGISTER_PREFIX
4065 fprintf (file, "%s", REGISTER_PREFIX);
4066 #endif
4067 break;
4068
4069 case 'I':
4070 #ifdef IMMEDIATE_PREFIX
4071 fprintf (file, "%s", IMMEDIATE_PREFIX);
4072 #endif
4073 break;
4074
4075 case 'L':
4076 #ifdef LOCAL_LABEL_PREFIX
4077 fprintf (file, "%s", LOCAL_LABEL_PREFIX);
4078 #endif
4079 break;
4080
4081 case 'U':
4082 fputs (user_label_prefix, file);
4083 break;
4084
4085 #ifdef ASM_FPRINTF_EXTENSIONS
4086 /* Uppercase letters are reserved for general use by asm_fprintf
4087 and so are not available to target specific code. In order to
4088 prevent the ASM_FPRINTF_EXTENSIONS macro from using them then,
4089 they are defined here. As they get turned into real extensions
4090 to asm_fprintf they should be removed from this list. */
4091 case 'A': case 'B': case 'C': case 'D': case 'E':
4092 case 'F': case 'G': case 'H': case 'J': case 'K':
4093 case 'M': case 'N': case 'P': case 'Q': case 'S':
4094 case 'T': case 'V': case 'W': case 'Y': case 'Z':
4095 break;
4096
4097 ASM_FPRINTF_EXTENSIONS (file, argptr, p)
4098 #endif
4099 default:
4100 gcc_unreachable ();
4101 }
4102 break;
4103
4104 default:
4105 putc (c, file);
4106 }
4107 va_end (argptr);
4108 }
4109 \f
4110 /* Return nonzero if this function has no function calls. */
4111
4112 int
4113 leaf_function_p (void)
4114 {
4115 rtx insn;
4116 rtx link;
4117
4118 if (crtl->profile || profile_arc_flag)
4119 return 0;
4120
4121 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4122 {
4123 if (CALL_P (insn)
4124 && ! SIBLING_CALL_P (insn))
4125 return 0;
4126 if (NONJUMP_INSN_P (insn)
4127 && GET_CODE (PATTERN (insn)) == SEQUENCE
4128 && CALL_P (XVECEXP (PATTERN (insn), 0, 0))
4129 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0)))
4130 return 0;
4131 }
4132 for (link = crtl->epilogue_delay_list;
4133 link;
4134 link = XEXP (link, 1))
4135 {
4136 insn = XEXP (link, 0);
4137
4138 if (CALL_P (insn)
4139 && ! SIBLING_CALL_P (insn))
4140 return 0;
4141 if (NONJUMP_INSN_P (insn)
4142 && GET_CODE (PATTERN (insn)) == SEQUENCE
4143 && CALL_P (XVECEXP (PATTERN (insn), 0, 0))
4144 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0)))
4145 return 0;
4146 }
4147
4148 return 1;
4149 }
4150
4151 /* Return 1 if branch is a forward branch.
4152 Uses insn_shuid array, so it works only in the final pass. May be used by
4153 output templates to customary add branch prediction hints.
4154 */
4155 int
4156 final_forward_branch_p (rtx insn)
4157 {
4158 int insn_id, label_id;
4159
4160 gcc_assert (uid_shuid);
4161 insn_id = INSN_SHUID (insn);
4162 label_id = INSN_SHUID (JUMP_LABEL (insn));
4163 /* We've hit some insns that does not have id information available. */
4164 gcc_assert (insn_id && label_id);
4165 return insn_id < label_id;
4166 }
4167
4168 /* On some machines, a function with no call insns
4169 can run faster if it doesn't create its own register window.
4170 When output, the leaf function should use only the "output"
4171 registers. Ordinarily, the function would be compiled to use
4172 the "input" registers to find its arguments; it is a candidate
4173 for leaf treatment if it uses only the "input" registers.
4174 Leaf function treatment means renumbering so the function
4175 uses the "output" registers instead. */
4176
4177 #ifdef LEAF_REGISTERS
4178
4179 /* Return 1 if this function uses only the registers that can be
4180 safely renumbered. */
4181
4182 int
4183 only_leaf_regs_used (void)
4184 {
4185 int i;
4186 const char *const permitted_reg_in_leaf_functions = LEAF_REGISTERS;
4187
4188 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
4189 if ((df_regs_ever_live_p (i) || global_regs[i])
4190 && ! permitted_reg_in_leaf_functions[i])
4191 return 0;
4192
4193 if (crtl->uses_pic_offset_table
4194 && pic_offset_table_rtx != 0
4195 && REG_P (pic_offset_table_rtx)
4196 && ! permitted_reg_in_leaf_functions[REGNO (pic_offset_table_rtx)])
4197 return 0;
4198
4199 return 1;
4200 }
4201
4202 /* Scan all instructions and renumber all registers into those
4203 available in leaf functions. */
4204
4205 static void
4206 leaf_renumber_regs (rtx first)
4207 {
4208 rtx insn;
4209
4210 /* Renumber only the actual patterns.
4211 The reg-notes can contain frame pointer refs,
4212 and renumbering them could crash, and should not be needed. */
4213 for (insn = first; insn; insn = NEXT_INSN (insn))
4214 if (INSN_P (insn))
4215 leaf_renumber_regs_insn (PATTERN (insn));
4216 for (insn = crtl->epilogue_delay_list;
4217 insn;
4218 insn = XEXP (insn, 1))
4219 if (INSN_P (XEXP (insn, 0)))
4220 leaf_renumber_regs_insn (PATTERN (XEXP (insn, 0)));
4221 }
4222
4223 /* Scan IN_RTX and its subexpressions, and renumber all regs into those
4224 available in leaf functions. */
4225
4226 void
4227 leaf_renumber_regs_insn (rtx in_rtx)
4228 {
4229 int i, j;
4230 const char *format_ptr;
4231
4232 if (in_rtx == 0)
4233 return;
4234
4235 /* Renumber all input-registers into output-registers.
4236 renumbered_regs would be 1 for an output-register;
4237 they */
4238
4239 if (REG_P (in_rtx))
4240 {
4241 int newreg;
4242
4243 /* Don't renumber the same reg twice. */
4244 if (in_rtx->used)
4245 return;
4246
4247 newreg = REGNO (in_rtx);
4248 /* Don't try to renumber pseudo regs. It is possible for a pseudo reg
4249 to reach here as part of a REG_NOTE. */
4250 if (newreg >= FIRST_PSEUDO_REGISTER)
4251 {
4252 in_rtx->used = 1;
4253 return;
4254 }
4255 newreg = LEAF_REG_REMAP (newreg);
4256 gcc_assert (newreg >= 0);
4257 df_set_regs_ever_live (REGNO (in_rtx), false);
4258 df_set_regs_ever_live (newreg, true);
4259 SET_REGNO (in_rtx, newreg);
4260 in_rtx->used = 1;
4261 }
4262
4263 if (INSN_P (in_rtx))
4264 {
4265 /* Inside a SEQUENCE, we find insns.
4266 Renumber just the patterns of these insns,
4267 just as we do for the top-level insns. */
4268 leaf_renumber_regs_insn (PATTERN (in_rtx));
4269 return;
4270 }
4271
4272 format_ptr = GET_RTX_FORMAT (GET_CODE (in_rtx));
4273
4274 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (in_rtx)); i++)
4275 switch (*format_ptr++)
4276 {
4277 case 'e':
4278 leaf_renumber_regs_insn (XEXP (in_rtx, i));
4279 break;
4280
4281 case 'E':
4282 if (NULL != XVEC (in_rtx, i))
4283 {
4284 for (j = 0; j < XVECLEN (in_rtx, i); j++)
4285 leaf_renumber_regs_insn (XVECEXP (in_rtx, i, j));
4286 }
4287 break;
4288
4289 case 'S':
4290 case 's':
4291 case '0':
4292 case 'i':
4293 case 'w':
4294 case 'n':
4295 case 'u':
4296 break;
4297
4298 default:
4299 gcc_unreachable ();
4300 }
4301 }
4302 #endif
4303 \f
4304 /* Turn the RTL into assembly. */
4305 static unsigned int
4306 rest_of_handle_final (void)
4307 {
4308 rtx x;
4309 const char *fnname;
4310
4311 /* Get the function's name, as described by its RTL. This may be
4312 different from the DECL_NAME name used in the source file. */
4313
4314 x = DECL_RTL (current_function_decl);
4315 gcc_assert (MEM_P (x));
4316 x = XEXP (x, 0);
4317 gcc_assert (GET_CODE (x) == SYMBOL_REF);
4318 fnname = XSTR (x, 0);
4319
4320 assemble_start_function (current_function_decl, fnname);
4321 final_start_function (get_insns (), asm_out_file, optimize);
4322 final (get_insns (), asm_out_file, optimize);
4323 final_end_function ();
4324
4325 /* The IA-64 ".handlerdata" directive must be issued before the ".endp"
4326 directive that closes the procedure descriptor. Similarly, for x64 SEH.
4327 Otherwise it's not strictly necessary, but it doesn't hurt either. */
4328 output_function_exception_table (fnname);
4329
4330 assemble_end_function (current_function_decl, fnname);
4331
4332 user_defined_section_attribute = false;
4333
4334 /* Free up reg info memory. */
4335 free_reg_info ();
4336
4337 if (! quiet_flag)
4338 fflush (asm_out_file);
4339
4340 /* Write DBX symbols if requested. */
4341
4342 /* Note that for those inline functions where we don't initially
4343 know for certain that we will be generating an out-of-line copy,
4344 the first invocation of this routine (rest_of_compilation) will
4345 skip over this code by doing a `goto exit_rest_of_compilation;'.
4346 Later on, wrapup_global_declarations will (indirectly) call
4347 rest_of_compilation again for those inline functions that need
4348 to have out-of-line copies generated. During that call, we
4349 *will* be routed past here. */
4350
4351 timevar_push (TV_SYMOUT);
4352 if (!DECL_IGNORED_P (current_function_decl))
4353 debug_hooks->function_decl (current_function_decl);
4354 timevar_pop (TV_SYMOUT);
4355
4356 /* Release the blocks that are linked to DECL_INITIAL() to free the memory. */
4357 DECL_INITIAL (current_function_decl) = error_mark_node;
4358
4359 if (DECL_STATIC_CONSTRUCTOR (current_function_decl)
4360 && targetm.have_ctors_dtors)
4361 targetm.asm_out.constructor (XEXP (DECL_RTL (current_function_decl), 0),
4362 decl_init_priority_lookup
4363 (current_function_decl));
4364 if (DECL_STATIC_DESTRUCTOR (current_function_decl)
4365 && targetm.have_ctors_dtors)
4366 targetm.asm_out.destructor (XEXP (DECL_RTL (current_function_decl), 0),
4367 decl_fini_priority_lookup
4368 (current_function_decl));
4369 return 0;
4370 }
4371
4372 struct rtl_opt_pass pass_final =
4373 {
4374 {
4375 RTL_PASS,
4376 "final", /* name */
4377 OPTGROUP_NONE, /* optinfo_flags */
4378 NULL, /* gate */
4379 rest_of_handle_final, /* execute */
4380 NULL, /* sub */
4381 NULL, /* next */
4382 0, /* static_pass_number */
4383 TV_FINAL, /* tv_id */
4384 0, /* properties_required */
4385 0, /* properties_provided */
4386 0, /* properties_destroyed */
4387 0, /* todo_flags_start */
4388 TODO_ggc_collect /* todo_flags_finish */
4389 }
4390 };
4391
4392
4393 static unsigned int
4394 rest_of_handle_shorten_branches (void)
4395 {
4396 /* Shorten branches. */
4397 shorten_branches (get_insns ());
4398 return 0;
4399 }
4400
4401 struct rtl_opt_pass pass_shorten_branches =
4402 {
4403 {
4404 RTL_PASS,
4405 "shorten", /* name */
4406 OPTGROUP_NONE, /* optinfo_flags */
4407 NULL, /* gate */
4408 rest_of_handle_shorten_branches, /* execute */
4409 NULL, /* sub */
4410 NULL, /* next */
4411 0, /* static_pass_number */
4412 TV_SHORTEN_BRANCH, /* tv_id */
4413 0, /* properties_required */
4414 0, /* properties_provided */
4415 0, /* properties_destroyed */
4416 0, /* todo_flags_start */
4417 0 /* todo_flags_finish */
4418 }
4419 };
4420
4421
4422 static unsigned int
4423 rest_of_clean_state (void)
4424 {
4425 rtx insn, next;
4426 FILE *final_output = NULL;
4427 int save_unnumbered = flag_dump_unnumbered;
4428 int save_noaddr = flag_dump_noaddr;
4429
4430 if (flag_dump_final_insns)
4431 {
4432 final_output = fopen (flag_dump_final_insns, "a");
4433 if (!final_output)
4434 {
4435 error ("could not open final insn dump file %qs: %m",
4436 flag_dump_final_insns);
4437 flag_dump_final_insns = NULL;
4438 }
4439 else
4440 {
4441 flag_dump_noaddr = flag_dump_unnumbered = 1;
4442 if (flag_compare_debug_opt || flag_compare_debug)
4443 dump_flags |= TDF_NOUID;
4444 dump_function_header (final_output, current_function_decl,
4445 dump_flags);
4446 final_insns_dump_p = true;
4447
4448 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4449 if (LABEL_P (insn))
4450 INSN_UID (insn) = CODE_LABEL_NUMBER (insn);
4451 else
4452 {
4453 if (NOTE_P (insn))
4454 set_block_for_insn (insn, NULL);
4455 INSN_UID (insn) = 0;
4456 }
4457 }
4458 }
4459
4460 /* It is very important to decompose the RTL instruction chain here:
4461 debug information keeps pointing into CODE_LABEL insns inside the function
4462 body. If these remain pointing to the other insns, we end up preserving
4463 whole RTL chain and attached detailed debug info in memory. */
4464 for (insn = get_insns (); insn; insn = next)
4465 {
4466 next = NEXT_INSN (insn);
4467 NEXT_INSN (insn) = NULL;
4468 PREV_INSN (insn) = NULL;
4469
4470 if (final_output
4471 && (!NOTE_P (insn) ||
4472 (NOTE_KIND (insn) != NOTE_INSN_VAR_LOCATION
4473 && NOTE_KIND (insn) != NOTE_INSN_CALL_ARG_LOCATION
4474 && NOTE_KIND (insn) != NOTE_INSN_BLOCK_BEG
4475 && NOTE_KIND (insn) != NOTE_INSN_BLOCK_END
4476 && NOTE_KIND (insn) != NOTE_INSN_DELETED_DEBUG_LABEL)))
4477 print_rtl_single (final_output, insn);
4478 }
4479
4480 if (final_output)
4481 {
4482 flag_dump_noaddr = save_noaddr;
4483 flag_dump_unnumbered = save_unnumbered;
4484 final_insns_dump_p = false;
4485
4486 if (fclose (final_output))
4487 {
4488 error ("could not close final insn dump file %qs: %m",
4489 flag_dump_final_insns);
4490 flag_dump_final_insns = NULL;
4491 }
4492 }
4493
4494 /* In case the function was not output,
4495 don't leave any temporary anonymous types
4496 queued up for sdb output. */
4497 #ifdef SDB_DEBUGGING_INFO
4498 if (write_symbols == SDB_DEBUG)
4499 sdbout_types (NULL_TREE);
4500 #endif
4501
4502 flag_rerun_cse_after_global_opts = 0;
4503 reload_completed = 0;
4504 epilogue_completed = 0;
4505 #ifdef STACK_REGS
4506 regstack_completed = 0;
4507 #endif
4508
4509 /* Clear out the insn_length contents now that they are no
4510 longer valid. */
4511 init_insn_lengths ();
4512
4513 /* Show no temporary slots allocated. */
4514 init_temp_slots ();
4515
4516 free_bb_for_insn ();
4517
4518 delete_tree_ssa ();
4519
4520 /* We can reduce stack alignment on call site only when we are sure that
4521 the function body just produced will be actually used in the final
4522 executable. */
4523 if (decl_binds_to_current_def_p (current_function_decl))
4524 {
4525 unsigned int pref = crtl->preferred_stack_boundary;
4526 if (crtl->stack_alignment_needed > crtl->preferred_stack_boundary)
4527 pref = crtl->stack_alignment_needed;
4528 cgraph_rtl_info (current_function_decl)->preferred_incoming_stack_boundary
4529 = pref;
4530 }
4531
4532 /* Make sure volatile mem refs aren't considered valid operands for
4533 arithmetic insns. We must call this here if this is a nested inline
4534 function, since the above code leaves us in the init_recog state,
4535 and the function context push/pop code does not save/restore volatile_ok.
4536
4537 ??? Maybe it isn't necessary for expand_start_function to call this
4538 anymore if we do it here? */
4539
4540 init_recog_no_volatile ();
4541
4542 /* We're done with this function. Free up memory if we can. */
4543 free_after_parsing (cfun);
4544 free_after_compilation (cfun);
4545 return 0;
4546 }
4547
4548 struct rtl_opt_pass pass_clean_state =
4549 {
4550 {
4551 RTL_PASS,
4552 "*clean_state", /* name */
4553 OPTGROUP_NONE, /* optinfo_flags */
4554 NULL, /* gate */
4555 rest_of_clean_state, /* execute */
4556 NULL, /* sub */
4557 NULL, /* next */
4558 0, /* static_pass_number */
4559 TV_FINAL, /* tv_id */
4560 0, /* properties_required */
4561 0, /* properties_provided */
4562 PROP_rtl, /* properties_destroyed */
4563 0, /* todo_flags_start */
4564 0 /* todo_flags_finish */
4565 }
4566 };