1 /* Convert RTL to assembler code and output it, for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
22 /* This is the final pass of the compiler.
23 It looks at the rtl code for a function and outputs assembler code.
25 Call `final_start_function' to output the assembler code for function entry,
26 `final' to output assembler code for some RTL code,
27 `final_end_function' to output assembler code for function exit.
28 If a function is compiled in several pieces, each piece is
29 output separately with `final'.
31 Some optimizations are also done at this level.
32 Move instructions that were made unnecessary by good register allocation
33 are detected and omitted from the output. (Though most of these
34 are removed by the last jump pass.)
36 Instructions to set the condition codes are omitted when it can be
37 seen that the condition codes already had the desired values.
39 In some cases it is sufficient if the inherited condition codes
40 have related values, but this may require the following insn
41 (the one that tests the condition codes) to be modified.
43 The code for the function prologue and epilogue are generated
44 directly in assembler by the target functions function_prologue and
45 function_epilogue. Those instructions never exist as rtl. */
49 #include "coretypes.h"
56 #include "insn-config.h"
57 #include "insn-attr.h"
59 #include "conditions.h"
62 #include "hard-reg-set.h"
69 #include "basic-block.h"
73 #include "cfglayout.h"
75 #ifdef XCOFF_DEBUGGING_INFO
76 #include "xcoffout.h" /* Needed for external data
77 declarations for e.g. AIX 4.x. */
80 #if defined (DWARF2_UNWIND_INFO) || defined (DWARF2_DEBUGGING_INFO)
81 #include "dwarf2out.h"
84 #ifdef DBX_DEBUGGING_INFO
88 /* If we aren't using cc0, CC_STATUS_INIT shouldn't exist. So define a
89 null default for it to save conditionalization later. */
90 #ifndef CC_STATUS_INIT
91 #define CC_STATUS_INIT
94 /* How to start an assembler comment. */
95 #ifndef ASM_COMMENT_START
96 #define ASM_COMMENT_START ";#"
99 /* Is the given character a logical line separator for the assembler? */
100 #ifndef IS_ASM_LOGICAL_LINE_SEPARATOR
101 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C) ((C) == ';')
104 #ifndef JUMP_TABLES_IN_TEXT_SECTION
105 #define JUMP_TABLES_IN_TEXT_SECTION 0
108 #if defined(READONLY_DATA_SECTION) || defined(READONLY_DATA_SECTION_ASM_OP)
109 #define HAVE_READONLY_DATA_SECTION 1
111 #define HAVE_READONLY_DATA_SECTION 0
114 /* Bitflags used by final_scan_insn. */
117 #define SEEN_EMITTED 4
119 /* Last insn processed by final_scan_insn. */
120 static rtx debug_insn
;
121 rtx current_output_insn
;
123 /* Line number of last NOTE. */
124 static int last_linenum
;
126 /* Highest line number in current block. */
127 static int high_block_linenum
;
129 /* Likewise for function. */
130 static int high_function_linenum
;
132 /* Filename of last NOTE. */
133 static const char *last_filename
;
135 extern int length_unit_log
; /* This is defined in insn-attrtab.c. */
137 /* Nonzero while outputting an `asm' with operands.
138 This means that inconsistencies are the user's fault, so don't abort.
139 The precise value is the insn being output, to pass to error_for_asm. */
140 rtx this_is_asm_operands
;
142 /* Number of operands of this insn, for an `asm' with operands. */
143 static unsigned int insn_noperands
;
145 /* Compare optimization flag. */
147 static rtx last_ignored_compare
= 0;
149 /* Assign a unique number to each insn that is output.
150 This can be used to generate unique local labels. */
152 static int insn_counter
= 0;
155 /* This variable contains machine-dependent flags (defined in tm.h)
156 set and examined by output routines
157 that describe how to interpret the condition codes properly. */
161 /* During output of an insn, this contains a copy of cc_status
162 from before the insn. */
164 CC_STATUS cc_prev_status
;
167 /* Indexed by hardware reg number, is 1 if that register is ever
168 used in the current function.
170 In life_analysis, or in stupid_life_analysis, this is set
171 up to record the hard regs used explicitly. Reload adds
172 in the hard regs used for holding pseudo regs. Final uses
173 it to generate the code in the function prologue and epilogue
174 to save and restore registers as needed. */
176 char regs_ever_live
[FIRST_PSEUDO_REGISTER
];
178 /* Like regs_ever_live, but 1 if a reg is set or clobbered from an asm.
179 Unlike regs_ever_live, elements of this array corresponding to
180 eliminable regs like the frame pointer are set if an asm sets them. */
182 char regs_asm_clobbered
[FIRST_PSEUDO_REGISTER
];
184 /* Nonzero means current function must be given a frame pointer.
185 Initialized in function.c to 0. Set only in reload1.c as per
186 the needs of the function. */
188 int frame_pointer_needed
;
190 /* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */
192 static int block_depth
;
194 /* Nonzero if have enabled APP processing of our assembler output. */
198 /* If we are outputting an insn sequence, this contains the sequence rtx.
203 #ifdef ASSEMBLER_DIALECT
205 /* Number of the assembler dialect to use, starting at 0. */
206 static int dialect_number
;
209 #ifdef HAVE_conditional_execution
210 /* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */
211 rtx current_insn_predicate
;
214 #ifdef HAVE_ATTR_length
215 static int asm_insn_count (rtx
);
217 static void profile_function (FILE *);
218 static void profile_after_prologue (FILE *);
219 static bool notice_source_line (rtx
);
220 static rtx
walk_alter_subreg (rtx
*);
221 static void output_asm_name (void);
222 static void output_alternate_entry_point (FILE *, rtx
);
223 static tree
get_mem_expr_from_op (rtx
, int *);
224 static void output_asm_operand_names (rtx
*, int *, int);
225 static void output_operand (rtx
, int);
226 #ifdef LEAF_REGISTERS
227 static void leaf_renumber_regs (rtx
);
230 static int alter_cond (rtx
);
232 #ifndef ADDR_VEC_ALIGN
233 static int final_addr_vec_align (rtx
);
235 #ifdef HAVE_ATTR_length
236 static int align_fuzz (rtx
, rtx
, int, unsigned);
238 static rtx
final_scan_insn (rtx
, FILE *, int, int, int, int *);
240 /* Initialize data in final at the beginning of a compilation. */
243 init_final (const char *filename ATTRIBUTE_UNUSED
)
248 #ifdef ASSEMBLER_DIALECT
249 dialect_number
= ASSEMBLER_DIALECT
;
253 /* Default target function prologue and epilogue assembler output.
255 If not overridden for epilogue code, then the function body itself
256 contains return instructions wherever needed. */
258 default_function_pro_epilogue (FILE *file ATTRIBUTE_UNUSED
,
259 HOST_WIDE_INT size ATTRIBUTE_UNUSED
)
263 /* Default target hook that outputs nothing to a stream. */
265 no_asm_to_stream (FILE *file ATTRIBUTE_UNUSED
)
269 /* Enable APP processing of subsequent output.
270 Used before the output from an `asm' statement. */
277 fputs (ASM_APP_ON
, asm_out_file
);
282 /* Disable APP processing of subsequent output.
283 Called from varasm.c before most kinds of output. */
290 fputs (ASM_APP_OFF
, asm_out_file
);
295 /* Return the number of slots filled in the current
296 delayed branch sequence (we don't count the insn needing the
297 delay slot). Zero if not in a delayed branch sequence. */
301 dbr_sequence_length (void)
303 if (final_sequence
!= 0)
304 return XVECLEN (final_sequence
, 0) - 1;
310 /* The next two pages contain routines used to compute the length of an insn
311 and to shorten branches. */
313 /* Arrays for insn lengths, and addresses. The latter is referenced by
314 `insn_current_length'. */
316 static int *insn_lengths
;
318 varray_type insn_addresses_
;
320 /* Max uid for which the above arrays are valid. */
321 static int insn_lengths_max_uid
;
323 /* Address of insn being processed. Used by `insn_current_length'. */
324 int insn_current_address
;
326 /* Address of insn being processed in previous iteration. */
327 int insn_last_address
;
329 /* known invariant alignment of insn being processed. */
330 int insn_current_align
;
332 /* After shorten_branches, for any insn, uid_align[INSN_UID (insn)]
333 gives the next following alignment insn that increases the known
334 alignment, or NULL_RTX if there is no such insn.
335 For any alignment obtained this way, we can again index uid_align with
336 its uid to obtain the next following align that in turn increases the
337 alignment, till we reach NULL_RTX; the sequence obtained this way
338 for each insn we'll call the alignment chain of this insn in the following
341 struct label_alignment
347 static rtx
*uid_align
;
348 static int *uid_shuid
;
349 static struct label_alignment
*label_align
;
351 /* Indicate that branch shortening hasn't yet been done. */
354 init_insn_lengths (void)
365 insn_lengths_max_uid
= 0;
367 #ifdef HAVE_ATTR_length
368 INSN_ADDRESSES_FREE ();
377 /* Obtain the current length of an insn. If branch shortening has been done,
378 get its actual length. Otherwise, get its maximum length. */
381 get_attr_length (rtx insn ATTRIBUTE_UNUSED
)
383 #ifdef HAVE_ATTR_length
388 if (insn_lengths_max_uid
> INSN_UID (insn
))
389 return insn_lengths
[INSN_UID (insn
)];
391 switch (GET_CODE (insn
))
399 length
= insn_default_length (insn
);
403 body
= PATTERN (insn
);
404 if (GET_CODE (body
) == ADDR_VEC
|| GET_CODE (body
) == ADDR_DIFF_VEC
)
406 /* Alignment is machine-dependent and should be handled by
410 length
= insn_default_length (insn
);
414 body
= PATTERN (insn
);
415 if (GET_CODE (body
) == USE
|| GET_CODE (body
) == CLOBBER
)
418 else if (GET_CODE (body
) == ASM_INPUT
|| asm_noperands (body
) >= 0)
419 length
= asm_insn_count (body
) * insn_default_length (insn
);
420 else if (GET_CODE (body
) == SEQUENCE
)
421 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
422 length
+= get_attr_length (XVECEXP (body
, 0, i
));
424 length
= insn_default_length (insn
);
431 #ifdef ADJUST_INSN_LENGTH
432 ADJUST_INSN_LENGTH (insn
, length
);
435 #else /* not HAVE_ATTR_length */
437 #endif /* not HAVE_ATTR_length */
440 /* Code to handle alignment inside shorten_branches. */
442 /* Here is an explanation how the algorithm in align_fuzz can give
445 Call a sequence of instructions beginning with alignment point X
446 and continuing until the next alignment point `block X'. When `X'
447 is used in an expression, it means the alignment value of the
450 Call the distance between the start of the first insn of block X, and
451 the end of the last insn of block X `IX', for the `inner size of X'.
452 This is clearly the sum of the instruction lengths.
454 Likewise with the next alignment-delimited block following X, which we
457 Call the distance between the start of the first insn of block X, and
458 the start of the first insn of block Y `OX', for the `outer size of X'.
460 The estimated padding is then OX - IX.
462 OX can be safely estimated as
467 OX = round_up(IX, X) + Y - X
469 Clearly est(IX) >= real(IX), because that only depends on the
470 instruction lengths, and those being overestimated is a given.
472 Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so
473 we needn't worry about that when thinking about OX.
475 When X >= Y, the alignment provided by Y adds no uncertainty factor
476 for branch ranges starting before X, so we can just round what we have.
477 But when X < Y, we don't know anything about the, so to speak,
478 `middle bits', so we have to assume the worst when aligning up from an
479 address mod X to one mod Y, which is Y - X. */
482 #define LABEL_ALIGN(LABEL) align_labels_log
485 #ifndef LABEL_ALIGN_MAX_SKIP
486 #define LABEL_ALIGN_MAX_SKIP align_labels_max_skip
490 #define LOOP_ALIGN(LABEL) align_loops_log
493 #ifndef LOOP_ALIGN_MAX_SKIP
494 #define LOOP_ALIGN_MAX_SKIP align_loops_max_skip
497 #ifndef LABEL_ALIGN_AFTER_BARRIER
498 #define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0
501 #ifndef LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP
502 #define LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP 0
506 #define JUMP_ALIGN(LABEL) align_jumps_log
509 #ifndef JUMP_ALIGN_MAX_SKIP
510 #define JUMP_ALIGN_MAX_SKIP align_jumps_max_skip
513 #ifndef ADDR_VEC_ALIGN
515 final_addr_vec_align (rtx addr_vec
)
517 int align
= GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec
)));
519 if (align
> BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
)
520 align
= BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
;
521 return exact_log2 (align
);
525 #define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC)
528 #ifndef INSN_LENGTH_ALIGNMENT
529 #define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log
532 #define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)])
534 static int min_labelno
, max_labelno
;
536 #define LABEL_TO_ALIGNMENT(LABEL) \
537 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment)
539 #define LABEL_TO_MAX_SKIP(LABEL) \
540 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip)
542 /* For the benefit of port specific code do this also as a function. */
545 label_to_alignment (rtx label
)
547 return LABEL_TO_ALIGNMENT (label
);
550 #ifdef HAVE_ATTR_length
551 /* The differences in addresses
552 between a branch and its target might grow or shrink depending on
553 the alignment the start insn of the range (the branch for a forward
554 branch or the label for a backward branch) starts out on; if these
555 differences are used naively, they can even oscillate infinitely.
556 We therefore want to compute a 'worst case' address difference that
557 is independent of the alignment the start insn of the range end
558 up on, and that is at least as large as the actual difference.
559 The function align_fuzz calculates the amount we have to add to the
560 naively computed difference, by traversing the part of the alignment
561 chain of the start insn of the range that is in front of the end insn
562 of the range, and considering for each alignment the maximum amount
563 that it might contribute to a size increase.
565 For casesi tables, we also want to know worst case minimum amounts of
566 address difference, in case a machine description wants to introduce
567 some common offset that is added to all offsets in a table.
568 For this purpose, align_fuzz with a growth argument of 0 computes the
569 appropriate adjustment. */
571 /* Compute the maximum delta by which the difference of the addresses of
572 START and END might grow / shrink due to a different address for start
573 which changes the size of alignment insns between START and END.
574 KNOWN_ALIGN_LOG is the alignment known for START.
575 GROWTH should be ~0 if the objective is to compute potential code size
576 increase, and 0 if the objective is to compute potential shrink.
577 The return value is undefined for any other value of GROWTH. */
580 align_fuzz (rtx start
, rtx end
, int known_align_log
, unsigned int growth
)
582 int uid
= INSN_UID (start
);
584 int known_align
= 1 << known_align_log
;
585 int end_shuid
= INSN_SHUID (end
);
588 for (align_label
= uid_align
[uid
]; align_label
; align_label
= uid_align
[uid
])
590 int align_addr
, new_align
;
592 uid
= INSN_UID (align_label
);
593 align_addr
= INSN_ADDRESSES (uid
) - insn_lengths
[uid
];
594 if (uid_shuid
[uid
] > end_shuid
)
596 known_align_log
= LABEL_TO_ALIGNMENT (align_label
);
597 new_align
= 1 << known_align_log
;
598 if (new_align
< known_align
)
600 fuzz
+= (-align_addr
^ growth
) & (new_align
- known_align
);
601 known_align
= new_align
;
606 /* Compute a worst-case reference address of a branch so that it
607 can be safely used in the presence of aligned labels. Since the
608 size of the branch itself is unknown, the size of the branch is
609 not included in the range. I.e. for a forward branch, the reference
610 address is the end address of the branch as known from the previous
611 branch shortening pass, minus a value to account for possible size
612 increase due to alignment. For a backward branch, it is the start
613 address of the branch as known from the current pass, plus a value
614 to account for possible size increase due to alignment.
615 NB.: Therefore, the maximum offset allowed for backward branches needs
616 to exclude the branch size. */
619 insn_current_reference_address (rtx branch
)
624 if (! INSN_ADDRESSES_SET_P ())
627 seq
= NEXT_INSN (PREV_INSN (branch
));
628 seq_uid
= INSN_UID (seq
);
629 if (GET_CODE (branch
) != JUMP_INSN
)
630 /* This can happen for example on the PA; the objective is to know the
631 offset to address something in front of the start of the function.
632 Thus, we can treat it like a backward branch.
633 We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than
634 any alignment we'd encounter, so we skip the call to align_fuzz. */
635 return insn_current_address
;
636 dest
= JUMP_LABEL (branch
);
638 /* BRANCH has no proper alignment chain set, so use SEQ.
639 BRANCH also has no INSN_SHUID. */
640 if (INSN_SHUID (seq
) < INSN_SHUID (dest
))
642 /* Forward branch. */
643 return (insn_last_address
+ insn_lengths
[seq_uid
]
644 - align_fuzz (seq
, dest
, length_unit_log
, ~0));
648 /* Backward branch. */
649 return (insn_current_address
650 + align_fuzz (dest
, seq
, length_unit_log
, ~0));
653 #endif /* HAVE_ATTR_length */
656 compute_alignments (void)
658 int log
, max_skip
, max_log
;
667 max_labelno
= max_label_num ();
668 min_labelno
= get_first_label_num ();
669 label_align
= xcalloc (max_labelno
- min_labelno
+ 1,
670 sizeof (struct label_alignment
));
672 /* If not optimizing or optimizing for size, don't assign any alignments. */
673 if (! optimize
|| optimize_size
)
678 rtx label
= BB_HEAD (bb
);
679 int fallthru_frequency
= 0, branch_frequency
= 0, has_fallthru
= 0;
682 if (GET_CODE (label
) != CODE_LABEL
683 || probably_never_executed_bb_p (bb
))
685 max_log
= LABEL_ALIGN (label
);
686 max_skip
= LABEL_ALIGN_MAX_SKIP
;
688 for (e
= bb
->pred
; e
; e
= e
->pred_next
)
690 if (e
->flags
& EDGE_FALLTHRU
)
691 has_fallthru
= 1, fallthru_frequency
+= EDGE_FREQUENCY (e
);
693 branch_frequency
+= EDGE_FREQUENCY (e
);
696 /* There are two purposes to align block with no fallthru incoming edge:
697 1) to avoid fetch stalls when branch destination is near cache boundary
698 2) to improve cache efficiency in case the previous block is not executed
699 (so it does not need to be in the cache).
701 We to catch first case, we align frequently executed blocks.
702 To catch the second, we align blocks that are executed more frequently
703 than the predecessor and the predecessor is likely to not be executed
704 when function is called. */
707 && (branch_frequency
> BB_FREQ_MAX
/ 10
708 || (bb
->frequency
> bb
->prev_bb
->frequency
* 10
709 && (bb
->prev_bb
->frequency
710 <= ENTRY_BLOCK_PTR
->frequency
/ 2))))
712 log
= JUMP_ALIGN (label
);
716 max_skip
= JUMP_ALIGN_MAX_SKIP
;
719 /* In case block is frequent and reached mostly by non-fallthru edge,
720 align it. It is most likely a first block of loop. */
722 && maybe_hot_bb_p (bb
)
723 && branch_frequency
+ fallthru_frequency
> BB_FREQ_MAX
/ 10
724 && branch_frequency
> fallthru_frequency
* 2)
726 log
= LOOP_ALIGN (label
);
730 max_skip
= LOOP_ALIGN_MAX_SKIP
;
733 LABEL_TO_ALIGNMENT (label
) = max_log
;
734 LABEL_TO_MAX_SKIP (label
) = max_skip
;
738 /* Make a pass over all insns and compute their actual lengths by shortening
739 any branches of variable length if possible. */
741 /* shorten_branches might be called multiple times: for example, the SH
742 port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG.
743 In order to do this, it needs proper length information, which it obtains
744 by calling shorten_branches. This cannot be collapsed with
745 shorten_branches itself into a single pass unless we also want to integrate
746 reorg.c, since the branch splitting exposes new instructions with delay
750 shorten_branches (rtx first ATTRIBUTE_UNUSED
)
757 #ifdef HAVE_ATTR_length
758 #define MAX_CODE_ALIGN 16
760 int something_changed
= 1;
761 char *varying_length
;
764 rtx align_tab
[MAX_CODE_ALIGN
];
768 /* Compute maximum UID and allocate label_align / uid_shuid. */
769 max_uid
= get_max_uid ();
771 uid_shuid
= xmalloc (max_uid
* sizeof *uid_shuid
);
773 if (max_labelno
!= max_label_num ())
775 int old
= max_labelno
;
779 max_labelno
= max_label_num ();
781 n_labels
= max_labelno
- min_labelno
+ 1;
782 n_old_labels
= old
- min_labelno
+ 1;
784 label_align
= xrealloc (label_align
,
785 n_labels
* sizeof (struct label_alignment
));
787 /* Range of labels grows monotonically in the function. Abort here
788 means that the initialization of array got lost. */
789 if (n_old_labels
> n_labels
)
792 memset (label_align
+ n_old_labels
, 0,
793 (n_labels
- n_old_labels
) * sizeof (struct label_alignment
));
796 /* Initialize label_align and set up uid_shuid to be strictly
797 monotonically rising with insn order. */
798 /* We use max_log here to keep track of the maximum alignment we want to
799 impose on the next CODE_LABEL (or the current one if we are processing
800 the CODE_LABEL itself). */
805 for (insn
= get_insns (), i
= 1; insn
; insn
= NEXT_INSN (insn
))
809 INSN_SHUID (insn
) = i
++;
812 /* reorg might make the first insn of a loop being run once only,
813 and delete the label in front of it. Then we want to apply
814 the loop alignment to the new label created by reorg, which
815 is separated by the former loop start insn from the
816 NOTE_INSN_LOOP_BEG. */
818 else if (GET_CODE (insn
) == CODE_LABEL
)
822 /* Merge in alignments computed by compute_alignments. */
823 log
= LABEL_TO_ALIGNMENT (insn
);
827 max_skip
= LABEL_TO_MAX_SKIP (insn
);
830 log
= LABEL_ALIGN (insn
);
834 max_skip
= LABEL_ALIGN_MAX_SKIP
;
836 next
= NEXT_INSN (insn
);
837 /* ADDR_VECs only take room if read-only data goes into the text
839 if (JUMP_TABLES_IN_TEXT_SECTION
|| !HAVE_READONLY_DATA_SECTION
)
840 if (next
&& GET_CODE (next
) == JUMP_INSN
)
842 rtx nextbody
= PATTERN (next
);
843 if (GET_CODE (nextbody
) == ADDR_VEC
844 || GET_CODE (nextbody
) == ADDR_DIFF_VEC
)
846 log
= ADDR_VEC_ALIGN (next
);
850 max_skip
= LABEL_ALIGN_MAX_SKIP
;
854 LABEL_TO_ALIGNMENT (insn
) = max_log
;
855 LABEL_TO_MAX_SKIP (insn
) = max_skip
;
859 else if (GET_CODE (insn
) == BARRIER
)
863 for (label
= insn
; label
&& ! INSN_P (label
);
864 label
= NEXT_INSN (label
))
865 if (GET_CODE (label
) == CODE_LABEL
)
867 log
= LABEL_ALIGN_AFTER_BARRIER (insn
);
871 max_skip
= LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP
;
877 #ifdef HAVE_ATTR_length
879 /* Allocate the rest of the arrays. */
880 insn_lengths
= xmalloc (max_uid
* sizeof (*insn_lengths
));
881 insn_lengths_max_uid
= max_uid
;
882 /* Syntax errors can lead to labels being outside of the main insn stream.
883 Initialize insn_addresses, so that we get reproducible results. */
884 INSN_ADDRESSES_ALLOC (max_uid
);
886 varying_length
= xcalloc (max_uid
, sizeof (char));
888 /* Initialize uid_align. We scan instructions
889 from end to start, and keep in align_tab[n] the last seen insn
890 that does an alignment of at least n+1, i.e. the successor
891 in the alignment chain for an insn that does / has a known
893 uid_align
= xcalloc (max_uid
, sizeof *uid_align
);
895 for (i
= MAX_CODE_ALIGN
; --i
>= 0;)
896 align_tab
[i
] = NULL_RTX
;
897 seq
= get_last_insn ();
898 for (; seq
; seq
= PREV_INSN (seq
))
900 int uid
= INSN_UID (seq
);
902 log
= (GET_CODE (seq
) == CODE_LABEL
? LABEL_TO_ALIGNMENT (seq
) : 0);
903 uid_align
[uid
] = align_tab
[0];
906 /* Found an alignment label. */
907 uid_align
[uid
] = align_tab
[log
];
908 for (i
= log
- 1; i
>= 0; i
--)
912 #ifdef CASE_VECTOR_SHORTEN_MODE
915 /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum
918 int min_shuid
= INSN_SHUID (get_insns ()) - 1;
919 int max_shuid
= INSN_SHUID (get_last_insn ()) + 1;
922 for (insn
= first
; insn
!= 0; insn
= NEXT_INSN (insn
))
924 rtx min_lab
= NULL_RTX
, max_lab
= NULL_RTX
, pat
;
925 int len
, i
, min
, max
, insn_shuid
;
927 addr_diff_vec_flags flags
;
929 if (GET_CODE (insn
) != JUMP_INSN
930 || GET_CODE (PATTERN (insn
)) != ADDR_DIFF_VEC
)
932 pat
= PATTERN (insn
);
933 len
= XVECLEN (pat
, 1);
936 min_align
= MAX_CODE_ALIGN
;
937 for (min
= max_shuid
, max
= min_shuid
, i
= len
- 1; i
>= 0; i
--)
939 rtx lab
= XEXP (XVECEXP (pat
, 1, i
), 0);
940 int shuid
= INSN_SHUID (lab
);
951 if (min_align
> LABEL_TO_ALIGNMENT (lab
))
952 min_align
= LABEL_TO_ALIGNMENT (lab
);
954 XEXP (pat
, 2) = gen_rtx_LABEL_REF (VOIDmode
, min_lab
);
955 XEXP (pat
, 3) = gen_rtx_LABEL_REF (VOIDmode
, max_lab
);
956 insn_shuid
= INSN_SHUID (insn
);
957 rel
= INSN_SHUID (XEXP (XEXP (pat
, 0), 0));
958 flags
.min_align
= min_align
;
959 flags
.base_after_vec
= rel
> insn_shuid
;
960 flags
.min_after_vec
= min
> insn_shuid
;
961 flags
.max_after_vec
= max
> insn_shuid
;
962 flags
.min_after_base
= min
> rel
;
963 flags
.max_after_base
= max
> rel
;
964 ADDR_DIFF_VEC_FLAGS (pat
) = flags
;
967 #endif /* CASE_VECTOR_SHORTEN_MODE */
969 /* Compute initial lengths, addresses, and varying flags for each insn. */
970 for (insn_current_address
= 0, insn
= first
;
972 insn_current_address
+= insn_lengths
[uid
], insn
= NEXT_INSN (insn
))
974 uid
= INSN_UID (insn
);
976 insn_lengths
[uid
] = 0;
978 if (GET_CODE (insn
) == CODE_LABEL
)
980 int log
= LABEL_TO_ALIGNMENT (insn
);
983 int align
= 1 << log
;
984 int new_address
= (insn_current_address
+ align
- 1) & -align
;
985 insn_lengths
[uid
] = new_address
- insn_current_address
;
989 INSN_ADDRESSES (uid
) = insn_current_address
+ insn_lengths
[uid
];
991 if (GET_CODE (insn
) == NOTE
|| GET_CODE (insn
) == BARRIER
992 || GET_CODE (insn
) == CODE_LABEL
)
994 if (INSN_DELETED_P (insn
))
997 body
= PATTERN (insn
);
998 if (GET_CODE (body
) == ADDR_VEC
|| GET_CODE (body
) == ADDR_DIFF_VEC
)
1000 /* This only takes room if read-only data goes into the text
1002 if (JUMP_TABLES_IN_TEXT_SECTION
|| !HAVE_READONLY_DATA_SECTION
)
1003 insn_lengths
[uid
] = (XVECLEN (body
,
1004 GET_CODE (body
) == ADDR_DIFF_VEC
)
1005 * GET_MODE_SIZE (GET_MODE (body
)));
1006 /* Alignment is handled by ADDR_VEC_ALIGN. */
1008 else if (GET_CODE (body
) == ASM_INPUT
|| asm_noperands (body
) >= 0)
1009 insn_lengths
[uid
] = asm_insn_count (body
) * insn_default_length (insn
);
1010 else if (GET_CODE (body
) == SEQUENCE
)
1013 int const_delay_slots
;
1015 const_delay_slots
= const_num_delay_slots (XVECEXP (body
, 0, 0));
1017 const_delay_slots
= 0;
1019 /* Inside a delay slot sequence, we do not do any branch shortening
1020 if the shortening could change the number of delay slots
1022 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
1024 rtx inner_insn
= XVECEXP (body
, 0, i
);
1025 int inner_uid
= INSN_UID (inner_insn
);
1028 if (GET_CODE (body
) == ASM_INPUT
1029 || asm_noperands (PATTERN (XVECEXP (body
, 0, i
))) >= 0)
1030 inner_length
= (asm_insn_count (PATTERN (inner_insn
))
1031 * insn_default_length (inner_insn
));
1033 inner_length
= insn_default_length (inner_insn
);
1035 insn_lengths
[inner_uid
] = inner_length
;
1036 if (const_delay_slots
)
1038 if ((varying_length
[inner_uid
]
1039 = insn_variable_length_p (inner_insn
)) != 0)
1040 varying_length
[uid
] = 1;
1041 INSN_ADDRESSES (inner_uid
) = (insn_current_address
1042 + insn_lengths
[uid
]);
1045 varying_length
[inner_uid
] = 0;
1046 insn_lengths
[uid
] += inner_length
;
1049 else if (GET_CODE (body
) != USE
&& GET_CODE (body
) != CLOBBER
)
1051 insn_lengths
[uid
] = insn_default_length (insn
);
1052 varying_length
[uid
] = insn_variable_length_p (insn
);
1055 /* If needed, do any adjustment. */
1056 #ifdef ADJUST_INSN_LENGTH
1057 ADJUST_INSN_LENGTH (insn
, insn_lengths
[uid
]);
1058 if (insn_lengths
[uid
] < 0)
1059 fatal_insn ("negative insn length", insn
);
1063 /* Now loop over all the insns finding varying length insns. For each,
1064 get the current insn length. If it has changed, reflect the change.
1065 When nothing changes for a full pass, we are done. */
1067 while (something_changed
)
1069 something_changed
= 0;
1070 insn_current_align
= MAX_CODE_ALIGN
- 1;
1071 for (insn_current_address
= 0, insn
= first
;
1073 insn
= NEXT_INSN (insn
))
1076 #ifdef ADJUST_INSN_LENGTH
1081 uid
= INSN_UID (insn
);
1083 if (GET_CODE (insn
) == CODE_LABEL
)
1085 int log
= LABEL_TO_ALIGNMENT (insn
);
1086 if (log
> insn_current_align
)
1088 int align
= 1 << log
;
1089 int new_address
= (insn_current_address
+ align
- 1) & -align
;
1090 insn_lengths
[uid
] = new_address
- insn_current_address
;
1091 insn_current_align
= log
;
1092 insn_current_address
= new_address
;
1095 insn_lengths
[uid
] = 0;
1096 INSN_ADDRESSES (uid
) = insn_current_address
;
1100 length_align
= INSN_LENGTH_ALIGNMENT (insn
);
1101 if (length_align
< insn_current_align
)
1102 insn_current_align
= length_align
;
1104 insn_last_address
= INSN_ADDRESSES (uid
);
1105 INSN_ADDRESSES (uid
) = insn_current_address
;
1107 #ifdef CASE_VECTOR_SHORTEN_MODE
1108 if (optimize
&& GET_CODE (insn
) == JUMP_INSN
1109 && GET_CODE (PATTERN (insn
)) == ADDR_DIFF_VEC
)
1111 rtx body
= PATTERN (insn
);
1112 int old_length
= insn_lengths
[uid
];
1113 rtx rel_lab
= XEXP (XEXP (body
, 0), 0);
1114 rtx min_lab
= XEXP (XEXP (body
, 2), 0);
1115 rtx max_lab
= XEXP (XEXP (body
, 3), 0);
1116 int rel_addr
= INSN_ADDRESSES (INSN_UID (rel_lab
));
1117 int min_addr
= INSN_ADDRESSES (INSN_UID (min_lab
));
1118 int max_addr
= INSN_ADDRESSES (INSN_UID (max_lab
));
1121 addr_diff_vec_flags flags
;
1123 /* Avoid automatic aggregate initialization. */
1124 flags
= ADDR_DIFF_VEC_FLAGS (body
);
1126 /* Try to find a known alignment for rel_lab. */
1127 for (prev
= rel_lab
;
1129 && ! insn_lengths
[INSN_UID (prev
)]
1130 && ! (varying_length
[INSN_UID (prev
)] & 1);
1131 prev
= PREV_INSN (prev
))
1132 if (varying_length
[INSN_UID (prev
)] & 2)
1134 rel_align
= LABEL_TO_ALIGNMENT (prev
);
1138 /* See the comment on addr_diff_vec_flags in rtl.h for the
1139 meaning of the flags values. base: REL_LAB vec: INSN */
1140 /* Anything after INSN has still addresses from the last
1141 pass; adjust these so that they reflect our current
1142 estimate for this pass. */
1143 if (flags
.base_after_vec
)
1144 rel_addr
+= insn_current_address
- insn_last_address
;
1145 if (flags
.min_after_vec
)
1146 min_addr
+= insn_current_address
- insn_last_address
;
1147 if (flags
.max_after_vec
)
1148 max_addr
+= insn_current_address
- insn_last_address
;
1149 /* We want to know the worst case, i.e. lowest possible value
1150 for the offset of MIN_LAB. If MIN_LAB is after REL_LAB,
1151 its offset is positive, and we have to be wary of code shrink;
1152 otherwise, it is negative, and we have to be vary of code
1154 if (flags
.min_after_base
)
1156 /* If INSN is between REL_LAB and MIN_LAB, the size
1157 changes we are about to make can change the alignment
1158 within the observed offset, therefore we have to break
1159 it up into two parts that are independent. */
1160 if (! flags
.base_after_vec
&& flags
.min_after_vec
)
1162 min_addr
-= align_fuzz (rel_lab
, insn
, rel_align
, 0);
1163 min_addr
-= align_fuzz (insn
, min_lab
, 0, 0);
1166 min_addr
-= align_fuzz (rel_lab
, min_lab
, rel_align
, 0);
1170 if (flags
.base_after_vec
&& ! flags
.min_after_vec
)
1172 min_addr
-= align_fuzz (min_lab
, insn
, 0, ~0);
1173 min_addr
-= align_fuzz (insn
, rel_lab
, 0, ~0);
1176 min_addr
-= align_fuzz (min_lab
, rel_lab
, 0, ~0);
1178 /* Likewise, determine the highest lowest possible value
1179 for the offset of MAX_LAB. */
1180 if (flags
.max_after_base
)
1182 if (! flags
.base_after_vec
&& flags
.max_after_vec
)
1184 max_addr
+= align_fuzz (rel_lab
, insn
, rel_align
, ~0);
1185 max_addr
+= align_fuzz (insn
, max_lab
, 0, ~0);
1188 max_addr
+= align_fuzz (rel_lab
, max_lab
, rel_align
, ~0);
1192 if (flags
.base_after_vec
&& ! flags
.max_after_vec
)
1194 max_addr
+= align_fuzz (max_lab
, insn
, 0, 0);
1195 max_addr
+= align_fuzz (insn
, rel_lab
, 0, 0);
1198 max_addr
+= align_fuzz (max_lab
, rel_lab
, 0, 0);
1200 PUT_MODE (body
, CASE_VECTOR_SHORTEN_MODE (min_addr
- rel_addr
,
1201 max_addr
- rel_addr
,
1203 if (JUMP_TABLES_IN_TEXT_SECTION
|| !HAVE_READONLY_DATA_SECTION
)
1206 = (XVECLEN (body
, 1) * GET_MODE_SIZE (GET_MODE (body
)));
1207 insn_current_address
+= insn_lengths
[uid
];
1208 if (insn_lengths
[uid
] != old_length
)
1209 something_changed
= 1;
1214 #endif /* CASE_VECTOR_SHORTEN_MODE */
1216 if (! (varying_length
[uid
]))
1218 if (GET_CODE (insn
) == INSN
1219 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
1223 body
= PATTERN (insn
);
1224 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
1226 rtx inner_insn
= XVECEXP (body
, 0, i
);
1227 int inner_uid
= INSN_UID (inner_insn
);
1229 INSN_ADDRESSES (inner_uid
) = insn_current_address
;
1231 insn_current_address
+= insn_lengths
[inner_uid
];
1235 insn_current_address
+= insn_lengths
[uid
];
1240 if (GET_CODE (insn
) == INSN
&& GET_CODE (PATTERN (insn
)) == SEQUENCE
)
1244 body
= PATTERN (insn
);
1246 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
1248 rtx inner_insn
= XVECEXP (body
, 0, i
);
1249 int inner_uid
= INSN_UID (inner_insn
);
1252 INSN_ADDRESSES (inner_uid
) = insn_current_address
;
1254 /* insn_current_length returns 0 for insns with a
1255 non-varying length. */
1256 if (! varying_length
[inner_uid
])
1257 inner_length
= insn_lengths
[inner_uid
];
1259 inner_length
= insn_current_length (inner_insn
);
1261 if (inner_length
!= insn_lengths
[inner_uid
])
1263 insn_lengths
[inner_uid
] = inner_length
;
1264 something_changed
= 1;
1266 insn_current_address
+= insn_lengths
[inner_uid
];
1267 new_length
+= inner_length
;
1272 new_length
= insn_current_length (insn
);
1273 insn_current_address
+= new_length
;
1276 #ifdef ADJUST_INSN_LENGTH
1277 /* If needed, do any adjustment. */
1278 tmp_length
= new_length
;
1279 ADJUST_INSN_LENGTH (insn
, new_length
);
1280 insn_current_address
+= (new_length
- tmp_length
);
1283 if (new_length
!= insn_lengths
[uid
])
1285 insn_lengths
[uid
] = new_length
;
1286 something_changed
= 1;
1289 /* For a non-optimizing compile, do only a single pass. */
1294 free (varying_length
);
1296 #endif /* HAVE_ATTR_length */
1299 #ifdef HAVE_ATTR_length
1300 /* Given the body of an INSN known to be generated by an ASM statement, return
1301 the number of machine instructions likely to be generated for this insn.
1302 This is used to compute its length. */
1305 asm_insn_count (rtx body
)
1307 const char *template;
1310 if (GET_CODE (body
) == ASM_INPUT
)
1311 template = XSTR (body
, 0);
1313 template = decode_asm_operands (body
, NULL
, NULL
, NULL
, NULL
);
1315 for (; *template; template++)
1316 if (IS_ASM_LOGICAL_LINE_SEPARATOR (*template) || *template == '\n')
1323 /* Output assembler code for the start of a function,
1324 and initialize some of the variables in this file
1325 for the new function. The label for the function and associated
1326 assembler pseudo-ops have already been output in `assemble_start_function'.
1328 FIRST is the first insn of the rtl for the function being compiled.
1329 FILE is the file to write assembler code to.
1330 OPTIMIZE is nonzero if we should eliminate redundant
1331 test and compare insns. */
1334 final_start_function (rtx first ATTRIBUTE_UNUSED
, FILE *file
,
1335 int optimize ATTRIBUTE_UNUSED
)
1339 this_is_asm_operands
= 0;
1341 last_filename
= locator_file (prologue_locator
);
1342 last_linenum
= locator_line (prologue_locator
);
1344 high_block_linenum
= high_function_linenum
= last_linenum
;
1346 (*debug_hooks
->begin_prologue
) (last_linenum
, last_filename
);
1348 #if defined (DWARF2_UNWIND_INFO) || defined (IA64_UNWIND_INFO)
1349 if (write_symbols
!= DWARF2_DEBUG
&& write_symbols
!= VMS_AND_DWARF2_DEBUG
)
1350 dwarf2out_begin_prologue (0, NULL
);
1353 #ifdef LEAF_REG_REMAP
1354 if (current_function_uses_only_leaf_regs
)
1355 leaf_renumber_regs (first
);
1358 /* The Sun386i and perhaps other machines don't work right
1359 if the profiling code comes after the prologue. */
1360 #ifdef PROFILE_BEFORE_PROLOGUE
1361 if (current_function_profile
)
1362 profile_function (file
);
1363 #endif /* PROFILE_BEFORE_PROLOGUE */
1365 #if defined (DWARF2_UNWIND_INFO) && defined (HAVE_prologue)
1366 if (dwarf2out_do_frame ())
1367 dwarf2out_frame_debug (NULL_RTX
);
1370 /* If debugging, assign block numbers to all of the blocks in this
1374 remove_unnecessary_notes ();
1375 reemit_insn_block_notes ();
1376 number_blocks (current_function_decl
);
1377 /* We never actually put out begin/end notes for the top-level
1378 block in the function. But, conceptually, that block is
1380 TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl
)) = 1;
1383 /* First output the function prologue: code to set up the stack frame. */
1384 (*targetm
.asm_out
.function_prologue
) (file
, get_frame_size ());
1386 /* If the machine represents the prologue as RTL, the profiling code must
1387 be emitted when NOTE_INSN_PROLOGUE_END is scanned. */
1388 #ifdef HAVE_prologue
1389 if (! HAVE_prologue
)
1391 profile_after_prologue (file
);
1395 profile_after_prologue (FILE *file ATTRIBUTE_UNUSED
)
1397 #ifndef PROFILE_BEFORE_PROLOGUE
1398 if (current_function_profile
)
1399 profile_function (file
);
1400 #endif /* not PROFILE_BEFORE_PROLOGUE */
1404 profile_function (FILE *file ATTRIBUTE_UNUSED
)
1406 #ifndef NO_PROFILE_COUNTERS
1407 # define NO_PROFILE_COUNTERS 0
1409 #if defined(ASM_OUTPUT_REG_PUSH)
1410 int sval
= current_function_returns_struct
;
1411 rtx svrtx
= targetm
.calls
.struct_value_rtx (TREE_TYPE (current_function_decl
), 1);
1412 #if defined(STATIC_CHAIN_INCOMING_REGNUM) || defined(STATIC_CHAIN_REGNUM)
1413 int cxt
= current_function_needs_context
;
1415 #endif /* ASM_OUTPUT_REG_PUSH */
1417 if (! NO_PROFILE_COUNTERS
)
1419 int align
= MIN (BIGGEST_ALIGNMENT
, LONG_TYPE_SIZE
);
1421 ASM_OUTPUT_ALIGN (file
, floor_log2 (align
/ BITS_PER_UNIT
));
1422 (*targetm
.asm_out
.internal_label
) (file
, "LP", current_function_funcdef_no
);
1423 assemble_integer (const0_rtx
, LONG_TYPE_SIZE
/ BITS_PER_UNIT
, align
, 1);
1426 function_section (current_function_decl
);
1428 #if defined(ASM_OUTPUT_REG_PUSH)
1429 if (sval
&& svrtx
!= NULL_RTX
&& GET_CODE (svrtx
) == REG
)
1430 ASM_OUTPUT_REG_PUSH (file
, REGNO (svrtx
));
1433 #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1435 ASM_OUTPUT_REG_PUSH (file
, STATIC_CHAIN_INCOMING_REGNUM
);
1437 #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1440 ASM_OUTPUT_REG_PUSH (file
, STATIC_CHAIN_REGNUM
);
1445 FUNCTION_PROFILER (file
, current_function_funcdef_no
);
1447 #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1449 ASM_OUTPUT_REG_POP (file
, STATIC_CHAIN_INCOMING_REGNUM
);
1451 #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1454 ASM_OUTPUT_REG_POP (file
, STATIC_CHAIN_REGNUM
);
1459 #if defined(ASM_OUTPUT_REG_PUSH)
1460 if (sval
&& svrtx
!= NULL_RTX
&& GET_CODE (svrtx
) == REG
)
1461 ASM_OUTPUT_REG_POP (file
, REGNO (svrtx
));
1465 /* Output assembler code for the end of a function.
1466 For clarity, args are same as those of `final_start_function'
1467 even though not all of them are needed. */
1470 final_end_function (void)
1474 (*debug_hooks
->end_function
) (high_function_linenum
);
1476 /* Finally, output the function epilogue:
1477 code to restore the stack frame and return to the caller. */
1478 (*targetm
.asm_out
.function_epilogue
) (asm_out_file
, get_frame_size ());
1480 /* And debug output. */
1481 (*debug_hooks
->end_epilogue
) (last_linenum
, last_filename
);
1483 #if defined (DWARF2_UNWIND_INFO)
1484 if (write_symbols
!= DWARF2_DEBUG
&& write_symbols
!= VMS_AND_DWARF2_DEBUG
1485 && dwarf2out_do_frame ())
1486 dwarf2out_end_epilogue (last_linenum
, last_filename
);
1490 /* Output assembler code for some insns: all or part of a function.
1491 For description of args, see `final_start_function', above.
1493 PRESCAN is 1 if we are not really outputting,
1494 just scanning as if we were outputting.
1495 Prescanning deletes and rearranges insns just like ordinary output.
1496 PRESCAN is -2 if we are outputting after having prescanned.
1497 In this case, don't try to delete or rearrange insns
1498 because that has already been done.
1499 Prescanning is done only on certain machines. */
1502 final (rtx first
, FILE *file
, int optimize
, int prescan
)
1508 last_ignored_compare
= 0;
1510 #ifdef SDB_DEBUGGING_INFO
1511 /* When producing SDB debugging info, delete troublesome line number
1512 notes from inlined functions in other files as well as duplicate
1513 line number notes. */
1514 if (write_symbols
== SDB_DEBUG
)
1517 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
1518 if (GET_CODE (insn
) == NOTE
&& NOTE_LINE_NUMBER (insn
) > 0)
1520 if ((RTX_INTEGRATED_P (insn
)
1521 && strcmp (NOTE_SOURCE_FILE (insn
), main_input_filename
) != 0)
1523 && NOTE_LINE_NUMBER (insn
) == NOTE_LINE_NUMBER (last
)
1524 && NOTE_SOURCE_FILE (insn
) == NOTE_SOURCE_FILE (last
)))
1526 delete_insn (insn
); /* Use delete_note. */
1534 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
1536 if (INSN_UID (insn
) > max_uid
) /* Find largest UID. */
1537 max_uid
= INSN_UID (insn
);
1539 /* If CC tracking across branches is enabled, record the insn which
1540 jumps to each branch only reached from one place. */
1541 if (optimize
&& GET_CODE (insn
) == JUMP_INSN
)
1543 rtx lab
= JUMP_LABEL (insn
);
1544 if (lab
&& LABEL_NUSES (lab
) == 1)
1546 LABEL_REFS (lab
) = insn
;
1556 /* Output the insns. */
1557 for (insn
= NEXT_INSN (first
); insn
;)
1559 #ifdef HAVE_ATTR_length
1560 if ((unsigned) INSN_UID (insn
) >= INSN_ADDRESSES_SIZE ())
1562 /* This can be triggered by bugs elsewhere in the compiler if
1563 new insns are created after init_insn_lengths is called. */
1564 if (GET_CODE (insn
) == NOTE
)
1565 insn_current_address
= -1;
1570 insn_current_address
= INSN_ADDRESSES (INSN_UID (insn
));
1571 #endif /* HAVE_ATTR_length */
1573 insn
= final_scan_insn (insn
, file
, optimize
, prescan
, 0, &seen
);
1578 get_insn_template (int code
, rtx insn
)
1580 switch (insn_data
[code
].output_format
)
1582 case INSN_OUTPUT_FORMAT_SINGLE
:
1583 return insn_data
[code
].output
.single
;
1584 case INSN_OUTPUT_FORMAT_MULTI
:
1585 return insn_data
[code
].output
.multi
[which_alternative
];
1586 case INSN_OUTPUT_FORMAT_FUNCTION
:
1589 return (*insn_data
[code
].output
.function
) (recog_data
.operand
, insn
);
1596 /* Emit the appropriate declaration for an alternate-entry-point
1597 symbol represented by INSN, to FILE. INSN is a CODE_LABEL with
1598 LABEL_KIND != LABEL_NORMAL.
1600 The case fall-through in this function is intentional. */
1602 output_alternate_entry_point (FILE *file
, rtx insn
)
1604 const char *name
= LABEL_NAME (insn
);
1606 switch (LABEL_KIND (insn
))
1608 case LABEL_WEAK_ENTRY
:
1609 #ifdef ASM_WEAKEN_LABEL
1610 ASM_WEAKEN_LABEL (file
, name
);
1612 case LABEL_GLOBAL_ENTRY
:
1613 (*targetm
.asm_out
.globalize_label
) (file
, name
);
1614 case LABEL_STATIC_ENTRY
:
1615 #ifdef ASM_OUTPUT_TYPE_DIRECTIVE
1616 ASM_OUTPUT_TYPE_DIRECTIVE (file
, name
, "function");
1618 ASM_OUTPUT_LABEL (file
, name
);
1627 /* The final scan for one insn, INSN.
1628 Args are same as in `final', except that INSN
1629 is the insn being scanned.
1630 Value returned is the next insn to be scanned.
1632 NOPEEPHOLES is the flag to disallow peephole processing (currently
1633 used for within delayed branch sequence output).
1635 SEEN is used to track the end of the prologue, for emitting
1636 debug information. We force the emission of a line note after
1637 both NOTE_INSN_PROLOGUE_END and NOTE_INSN_FUNCTION_BEG, or
1638 at the beginning of the second basic block, whichever comes
1642 final_scan_insn (rtx insn
, FILE *file
, int optimize ATTRIBUTE_UNUSED
,
1643 int prescan
, int nopeepholes ATTRIBUTE_UNUSED
,
1652 /* Ignore deleted insns. These can occur when we split insns (due to a
1653 template of "#") while not optimizing. */
1654 if (INSN_DELETED_P (insn
))
1655 return NEXT_INSN (insn
);
1657 switch (GET_CODE (insn
))
1663 switch (NOTE_LINE_NUMBER (insn
))
1665 case NOTE_INSN_DELETED
:
1666 case NOTE_INSN_LOOP_BEG
:
1667 case NOTE_INSN_LOOP_END
:
1668 case NOTE_INSN_LOOP_END_TOP_COND
:
1669 case NOTE_INSN_LOOP_CONT
:
1670 case NOTE_INSN_LOOP_VTOP
:
1671 case NOTE_INSN_FUNCTION_END
:
1672 case NOTE_INSN_REPEATED_LINE_NUMBER
:
1673 case NOTE_INSN_EXPECTED_VALUE
:
1676 case NOTE_INSN_BASIC_BLOCK
:
1677 #ifdef IA64_UNWIND_INFO
1678 IA64_UNWIND_EMIT (asm_out_file
, insn
);
1681 fprintf (asm_out_file
, "\t%s basic block %d\n",
1682 ASM_COMMENT_START
, NOTE_BASIC_BLOCK (insn
)->index
);
1684 if ((*seen
& (SEEN_EMITTED
| SEEN_BB
)) == SEEN_BB
)
1686 *seen
|= SEEN_EMITTED
;
1687 last_filename
= NULL
;
1694 case NOTE_INSN_EH_REGION_BEG
:
1695 ASM_OUTPUT_DEBUG_LABEL (asm_out_file
, "LEHB",
1696 NOTE_EH_HANDLER (insn
));
1699 case NOTE_INSN_EH_REGION_END
:
1700 ASM_OUTPUT_DEBUG_LABEL (asm_out_file
, "LEHE",
1701 NOTE_EH_HANDLER (insn
));
1704 case NOTE_INSN_PROLOGUE_END
:
1705 (*targetm
.asm_out
.function_end_prologue
) (file
);
1706 profile_after_prologue (file
);
1708 if ((*seen
& (SEEN_EMITTED
| SEEN_NOTE
)) == SEEN_NOTE
)
1710 *seen
|= SEEN_EMITTED
;
1711 last_filename
= NULL
;
1718 case NOTE_INSN_EPILOGUE_BEG
:
1719 (*targetm
.asm_out
.function_begin_epilogue
) (file
);
1722 case NOTE_INSN_FUNCTION_BEG
:
1724 (*debug_hooks
->end_prologue
) (last_linenum
, last_filename
);
1726 if ((*seen
& (SEEN_EMITTED
| SEEN_NOTE
)) == SEEN_NOTE
)
1728 *seen
|= SEEN_EMITTED
;
1729 last_filename
= NULL
;
1736 case NOTE_INSN_BLOCK_BEG
:
1737 if (debug_info_level
== DINFO_LEVEL_NORMAL
1738 || debug_info_level
== DINFO_LEVEL_VERBOSE
1739 || write_symbols
== DWARF_DEBUG
1740 || write_symbols
== DWARF2_DEBUG
1741 || write_symbols
== VMS_AND_DWARF2_DEBUG
1742 || write_symbols
== VMS_DEBUG
)
1744 int n
= BLOCK_NUMBER (NOTE_BLOCK (insn
));
1748 high_block_linenum
= last_linenum
;
1750 /* Output debugging info about the symbol-block beginning. */
1751 (*debug_hooks
->begin_block
) (last_linenum
, n
);
1753 /* Mark this block as output. */
1754 TREE_ASM_WRITTEN (NOTE_BLOCK (insn
)) = 1;
1758 case NOTE_INSN_BLOCK_END
:
1759 if (debug_info_level
== DINFO_LEVEL_NORMAL
1760 || debug_info_level
== DINFO_LEVEL_VERBOSE
1761 || write_symbols
== DWARF_DEBUG
1762 || write_symbols
== DWARF2_DEBUG
1763 || write_symbols
== VMS_AND_DWARF2_DEBUG
1764 || write_symbols
== VMS_DEBUG
)
1766 int n
= BLOCK_NUMBER (NOTE_BLOCK (insn
));
1770 /* End of a symbol-block. */
1772 if (block_depth
< 0)
1775 (*debug_hooks
->end_block
) (high_block_linenum
, n
);
1779 case NOTE_INSN_DELETED_LABEL
:
1780 /* Emit the label. We may have deleted the CODE_LABEL because
1781 the label could be proved to be unreachable, though still
1782 referenced (in the form of having its address taken. */
1783 ASM_OUTPUT_DEBUG_LABEL (file
, "L", CODE_LABEL_NUMBER (insn
));
1790 if (NOTE_LINE_NUMBER (insn
) <= 0)
1797 #if defined (DWARF2_UNWIND_INFO)
1798 if (dwarf2out_do_frame ())
1799 dwarf2out_frame_debug (insn
);
1804 /* The target port might emit labels in the output function for
1805 some insn, e.g. sh.c output_branchy_insn. */
1806 if (CODE_LABEL_NUMBER (insn
) <= max_labelno
)
1808 int align
= LABEL_TO_ALIGNMENT (insn
);
1809 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
1810 int max_skip
= LABEL_TO_MAX_SKIP (insn
);
1813 if (align
&& NEXT_INSN (insn
))
1815 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
1816 ASM_OUTPUT_MAX_SKIP_ALIGN (file
, align
, max_skip
);
1818 #ifdef ASM_OUTPUT_ALIGN_WITH_NOP
1819 ASM_OUTPUT_ALIGN_WITH_NOP (file
, align
);
1821 ASM_OUTPUT_ALIGN (file
, align
);
1828 /* If this label is reached from only one place, set the condition
1829 codes from the instruction just before the branch. */
1831 /* Disabled because some insns set cc_status in the C output code
1832 and NOTICE_UPDATE_CC alone can set incorrect status. */
1833 if (0 /* optimize && LABEL_NUSES (insn) == 1*/)
1835 rtx jump
= LABEL_REFS (insn
);
1836 rtx barrier
= prev_nonnote_insn (insn
);
1838 /* If the LABEL_REFS field of this label has been set to point
1839 at a branch, the predecessor of the branch is a regular
1840 insn, and that branch is the only way to reach this label,
1841 set the condition codes based on the branch and its
1843 if (barrier
&& GET_CODE (barrier
) == BARRIER
1844 && jump
&& GET_CODE (jump
) == JUMP_INSN
1845 && (prev
= prev_nonnote_insn (jump
))
1846 && GET_CODE (prev
) == INSN
)
1848 NOTICE_UPDATE_CC (PATTERN (prev
), prev
);
1849 NOTICE_UPDATE_CC (PATTERN (jump
), jump
);
1856 if (LABEL_NAME (insn
))
1857 (*debug_hooks
->label
) (insn
);
1861 fputs (ASM_APP_OFF
, file
);
1864 if (NEXT_INSN (insn
) != 0
1865 && GET_CODE (NEXT_INSN (insn
)) == JUMP_INSN
)
1867 rtx nextbody
= PATTERN (NEXT_INSN (insn
));
1869 /* If this label is followed by a jump-table,
1870 make sure we put the label in the read-only section. Also
1871 possibly write the label and jump table together. */
1873 if (GET_CODE (nextbody
) == ADDR_VEC
1874 || GET_CODE (nextbody
) == ADDR_DIFF_VEC
)
1876 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
1877 /* In this case, the case vector is being moved by the
1878 target, so don't output the label at all. Leave that
1879 to the back end macros. */
1881 if (! JUMP_TABLES_IN_TEXT_SECTION
)
1885 readonly_data_section ();
1887 #ifdef ADDR_VEC_ALIGN
1888 log_align
= ADDR_VEC_ALIGN (NEXT_INSN (insn
));
1890 log_align
= exact_log2 (BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
);
1892 ASM_OUTPUT_ALIGN (file
, log_align
);
1895 function_section (current_function_decl
);
1897 #ifdef ASM_OUTPUT_CASE_LABEL
1898 ASM_OUTPUT_CASE_LABEL (file
, "L", CODE_LABEL_NUMBER (insn
),
1901 (*targetm
.asm_out
.internal_label
) (file
, "L", CODE_LABEL_NUMBER (insn
));
1907 if (LABEL_ALT_ENTRY_P (insn
))
1908 output_alternate_entry_point (file
, insn
);
1910 (*targetm
.asm_out
.internal_label
) (file
, "L", CODE_LABEL_NUMBER (insn
));
1915 rtx body
= PATTERN (insn
);
1916 int insn_code_number
;
1917 const char *template;
1920 /* An INSN, JUMP_INSN or CALL_INSN.
1921 First check for special kinds that recog doesn't recognize. */
1923 if (GET_CODE (body
) == USE
/* These are just declarations. */
1924 || GET_CODE (body
) == CLOBBER
)
1928 /* If there is a REG_CC_SETTER note on this insn, it means that
1929 the setting of the condition code was done in the delay slot
1930 of the insn that branched here. So recover the cc status
1931 from the insn that set it. */
1933 note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
1936 NOTICE_UPDATE_CC (PATTERN (XEXP (note
, 0)), XEXP (note
, 0));
1937 cc_prev_status
= cc_status
;
1941 /* Detect insns that are really jump-tables
1942 and output them as such. */
1944 if (GET_CODE (body
) == ADDR_VEC
|| GET_CODE (body
) == ADDR_DIFF_VEC
)
1946 #if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC))
1955 fputs (ASM_APP_OFF
, file
);
1959 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
1960 if (GET_CODE (body
) == ADDR_VEC
)
1962 #ifdef ASM_OUTPUT_ADDR_VEC
1963 ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn
), body
);
1970 #ifdef ASM_OUTPUT_ADDR_DIFF_VEC
1971 ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn
), body
);
1977 vlen
= XVECLEN (body
, GET_CODE (body
) == ADDR_DIFF_VEC
);
1978 for (idx
= 0; idx
< vlen
; idx
++)
1980 if (GET_CODE (body
) == ADDR_VEC
)
1982 #ifdef ASM_OUTPUT_ADDR_VEC_ELT
1983 ASM_OUTPUT_ADDR_VEC_ELT
1984 (file
, CODE_LABEL_NUMBER (XEXP (XVECEXP (body
, 0, idx
), 0)));
1991 #ifdef ASM_OUTPUT_ADDR_DIFF_ELT
1992 ASM_OUTPUT_ADDR_DIFF_ELT
1995 CODE_LABEL_NUMBER (XEXP (XVECEXP (body
, 1, idx
), 0)),
1996 CODE_LABEL_NUMBER (XEXP (XEXP (body
, 0), 0)));
2002 #ifdef ASM_OUTPUT_CASE_END
2003 ASM_OUTPUT_CASE_END (file
,
2004 CODE_LABEL_NUMBER (PREV_INSN (insn
)),
2009 function_section (current_function_decl
);
2013 /* Output this line note if it is the first or the last line
2015 if (notice_source_line (insn
))
2017 (*debug_hooks
->source_line
) (last_linenum
, last_filename
);
2020 if (GET_CODE (body
) == ASM_INPUT
)
2022 const char *string
= XSTR (body
, 0);
2024 /* There's no telling what that did to the condition codes. */
2033 fputs (ASM_APP_ON
, file
);
2036 fprintf (asm_out_file
, "\t%s\n", string
);
2041 /* Detect `asm' construct with operands. */
2042 if (asm_noperands (body
) >= 0)
2044 unsigned int noperands
= asm_noperands (body
);
2045 rtx
*ops
= alloca (noperands
* sizeof (rtx
));
2048 /* There's no telling what that did to the condition codes. */
2053 /* Get out the operand values. */
2054 string
= decode_asm_operands (body
, ops
, NULL
, NULL
, NULL
);
2055 /* Inhibit aborts on what would otherwise be compiler bugs. */
2056 insn_noperands
= noperands
;
2057 this_is_asm_operands
= insn
;
2059 #ifdef FINAL_PRESCAN_INSN
2060 FINAL_PRESCAN_INSN (insn
, ops
, insn_noperands
);
2063 /* Output the insn using them. */
2068 fputs (ASM_APP_ON
, file
);
2071 output_asm_insn (string
, ops
);
2074 this_is_asm_operands
= 0;
2078 if (prescan
<= 0 && app_on
)
2080 fputs (ASM_APP_OFF
, file
);
2084 if (GET_CODE (body
) == SEQUENCE
)
2086 /* A delayed-branch sequence */
2092 final_sequence
= body
;
2094 /* Record the delay slots' frame information before the branch.
2095 This is needed for delayed calls: see execute_cfa_program(). */
2096 #if defined (DWARF2_UNWIND_INFO)
2097 if (dwarf2out_do_frame ())
2098 for (i
= 1; i
< XVECLEN (body
, 0); i
++)
2099 dwarf2out_frame_debug (XVECEXP (body
, 0, i
));
2102 /* The first insn in this SEQUENCE might be a JUMP_INSN that will
2103 force the restoration of a comparison that was previously
2104 thought unnecessary. If that happens, cancel this sequence
2105 and cause that insn to be restored. */
2107 next
= final_scan_insn (XVECEXP (body
, 0, 0), file
, 0, prescan
, 1, seen
);
2108 if (next
!= XVECEXP (body
, 0, 1))
2114 for (i
= 1; i
< XVECLEN (body
, 0); i
++)
2116 rtx insn
= XVECEXP (body
, 0, i
);
2117 rtx next
= NEXT_INSN (insn
);
2118 /* We loop in case any instruction in a delay slot gets
2121 insn
= final_scan_insn (insn
, file
, 0, prescan
, 1, seen
);
2122 while (insn
!= next
);
2124 #ifdef DBR_OUTPUT_SEQEND
2125 DBR_OUTPUT_SEQEND (file
);
2129 /* If the insn requiring the delay slot was a CALL_INSN, the
2130 insns in the delay slot are actually executed before the
2131 called function. Hence we don't preserve any CC-setting
2132 actions in these insns and the CC must be marked as being
2133 clobbered by the function. */
2134 if (GET_CODE (XVECEXP (body
, 0, 0)) == CALL_INSN
)
2141 /* We have a real machine instruction as rtl. */
2143 body
= PATTERN (insn
);
2146 set
= single_set (insn
);
2148 /* Check for redundant test and compare instructions
2149 (when the condition codes are already set up as desired).
2150 This is done only when optimizing; if not optimizing,
2151 it should be possible for the user to alter a variable
2152 with the debugger in between statements
2153 and the next statement should reexamine the variable
2154 to compute the condition codes. */
2159 && GET_CODE (SET_DEST (set
)) == CC0
2160 && insn
!= last_ignored_compare
)
2162 if (GET_CODE (SET_SRC (set
)) == SUBREG
)
2163 SET_SRC (set
) = alter_subreg (&SET_SRC (set
));
2164 else if (GET_CODE (SET_SRC (set
)) == COMPARE
)
2166 if (GET_CODE (XEXP (SET_SRC (set
), 0)) == SUBREG
)
2167 XEXP (SET_SRC (set
), 0)
2168 = alter_subreg (&XEXP (SET_SRC (set
), 0));
2169 if (GET_CODE (XEXP (SET_SRC (set
), 1)) == SUBREG
)
2170 XEXP (SET_SRC (set
), 1)
2171 = alter_subreg (&XEXP (SET_SRC (set
), 1));
2173 if ((cc_status
.value1
!= 0
2174 && rtx_equal_p (SET_SRC (set
), cc_status
.value1
))
2175 || (cc_status
.value2
!= 0
2176 && rtx_equal_p (SET_SRC (set
), cc_status
.value2
)))
2178 /* Don't delete insn if it has an addressing side-effect. */
2179 if (! FIND_REG_INC_NOTE (insn
, NULL_RTX
)
2180 /* or if anything in it is volatile. */
2181 && ! volatile_refs_p (PATTERN (insn
)))
2183 /* We don't really delete the insn; just ignore it. */
2184 last_ignored_compare
= insn
;
2193 /* Don't bother outputting obvious no-ops, even without -O.
2194 This optimization is fast and doesn't interfere with debugging.
2195 Don't do this if the insn is in a delay slot, since this
2196 will cause an improper number of delay insns to be written. */
2197 if (final_sequence
== 0
2199 && GET_CODE (insn
) == INSN
&& GET_CODE (body
) == SET
2200 && GET_CODE (SET_SRC (body
)) == REG
2201 && GET_CODE (SET_DEST (body
)) == REG
2202 && REGNO (SET_SRC (body
)) == REGNO (SET_DEST (body
)))
2207 /* If this is a conditional branch, maybe modify it
2208 if the cc's are in a nonstandard state
2209 so that it accomplishes the same thing that it would
2210 do straightforwardly if the cc's were set up normally. */
2212 if (cc_status
.flags
!= 0
2213 && GET_CODE (insn
) == JUMP_INSN
2214 && GET_CODE (body
) == SET
2215 && SET_DEST (body
) == pc_rtx
2216 && GET_CODE (SET_SRC (body
)) == IF_THEN_ELSE
2217 && GET_RTX_CLASS (GET_CODE (XEXP (SET_SRC (body
), 0))) == '<'
2218 && XEXP (XEXP (SET_SRC (body
), 0), 0) == cc0_rtx
2219 /* This is done during prescan; it is not done again
2220 in final scan when prescan has been done. */
2223 /* This function may alter the contents of its argument
2224 and clear some of the cc_status.flags bits.
2225 It may also return 1 meaning condition now always true
2226 or -1 meaning condition now always false
2227 or 2 meaning condition nontrivial but altered. */
2228 int result
= alter_cond (XEXP (SET_SRC (body
), 0));
2229 /* If condition now has fixed value, replace the IF_THEN_ELSE
2230 with its then-operand or its else-operand. */
2232 SET_SRC (body
) = XEXP (SET_SRC (body
), 1);
2234 SET_SRC (body
) = XEXP (SET_SRC (body
), 2);
2236 /* The jump is now either unconditional or a no-op.
2237 If it has become a no-op, don't try to output it.
2238 (It would not be recognized.) */
2239 if (SET_SRC (body
) == pc_rtx
)
2244 else if (GET_CODE (SET_SRC (body
)) == RETURN
)
2245 /* Replace (set (pc) (return)) with (return). */
2246 PATTERN (insn
) = body
= SET_SRC (body
);
2248 /* Rerecognize the instruction if it has changed. */
2250 INSN_CODE (insn
) = -1;
2253 /* Make same adjustments to instructions that examine the
2254 condition codes without jumping and instructions that
2255 handle conditional moves (if this machine has either one). */
2257 if (cc_status
.flags
!= 0
2260 rtx cond_rtx
, then_rtx
, else_rtx
;
2262 if (GET_CODE (insn
) != JUMP_INSN
2263 && GET_CODE (SET_SRC (set
)) == IF_THEN_ELSE
)
2265 cond_rtx
= XEXP (SET_SRC (set
), 0);
2266 then_rtx
= XEXP (SET_SRC (set
), 1);
2267 else_rtx
= XEXP (SET_SRC (set
), 2);
2271 cond_rtx
= SET_SRC (set
);
2272 then_rtx
= const_true_rtx
;
2273 else_rtx
= const0_rtx
;
2276 switch (GET_CODE (cond_rtx
))
2290 if (XEXP (cond_rtx
, 0) != cc0_rtx
)
2292 result
= alter_cond (cond_rtx
);
2294 validate_change (insn
, &SET_SRC (set
), then_rtx
, 0);
2295 else if (result
== -1)
2296 validate_change (insn
, &SET_SRC (set
), else_rtx
, 0);
2297 else if (result
== 2)
2298 INSN_CODE (insn
) = -1;
2299 if (SET_DEST (set
) == SET_SRC (set
))
2311 #ifdef HAVE_peephole
2312 /* Do machine-specific peephole optimizations if desired. */
2314 if (optimize
&& !flag_no_peephole
&& !nopeepholes
)
2316 rtx next
= peephole (insn
);
2317 /* When peepholing, if there were notes within the peephole,
2318 emit them before the peephole. */
2319 if (next
!= 0 && next
!= NEXT_INSN (insn
))
2321 rtx prev
= PREV_INSN (insn
);
2323 for (note
= NEXT_INSN (insn
); note
!= next
;
2324 note
= NEXT_INSN (note
))
2325 final_scan_insn (note
, file
, optimize
, prescan
, nopeepholes
, seen
);
2327 /* In case this is prescan, put the notes
2328 in proper position for later rescan. */
2329 note
= NEXT_INSN (insn
);
2330 PREV_INSN (note
) = prev
;
2331 NEXT_INSN (prev
) = note
;
2332 NEXT_INSN (PREV_INSN (next
)) = insn
;
2333 PREV_INSN (insn
) = PREV_INSN (next
);
2334 NEXT_INSN (insn
) = next
;
2335 PREV_INSN (next
) = insn
;
2338 /* PEEPHOLE might have changed this. */
2339 body
= PATTERN (insn
);
2343 /* Try to recognize the instruction.
2344 If successful, verify that the operands satisfy the
2345 constraints for the instruction. Crash if they don't,
2346 since `reload' should have changed them so that they do. */
2348 insn_code_number
= recog_memoized (insn
);
2349 cleanup_subreg_operands (insn
);
2351 /* Dump the insn in the assembly for debugging. */
2352 if (flag_dump_rtl_in_asm
)
2354 print_rtx_head
= ASM_COMMENT_START
;
2355 print_rtl_single (asm_out_file
, insn
);
2356 print_rtx_head
= "";
2359 if (! constrain_operands_cached (1))
2360 fatal_insn_not_found (insn
);
2362 /* Some target machines need to prescan each insn before
2365 #ifdef FINAL_PRESCAN_INSN
2366 FINAL_PRESCAN_INSN (insn
, recog_data
.operand
, recog_data
.n_operands
);
2369 #ifdef HAVE_conditional_execution
2370 if (GET_CODE (PATTERN (insn
)) == COND_EXEC
)
2371 current_insn_predicate
= COND_EXEC_TEST (PATTERN (insn
));
2373 current_insn_predicate
= NULL_RTX
;
2377 cc_prev_status
= cc_status
;
2379 /* Update `cc_status' for this instruction.
2380 The instruction's output routine may change it further.
2381 If the output routine for a jump insn needs to depend
2382 on the cc status, it should look at cc_prev_status. */
2384 NOTICE_UPDATE_CC (body
, insn
);
2387 current_output_insn
= debug_insn
= insn
;
2389 #if defined (DWARF2_UNWIND_INFO)
2390 if (GET_CODE (insn
) == CALL_INSN
&& dwarf2out_do_frame ())
2391 dwarf2out_frame_debug (insn
);
2394 /* Find the proper template for this insn. */
2395 template = get_insn_template (insn_code_number
, insn
);
2397 /* If the C code returns 0, it means that it is a jump insn
2398 which follows a deleted test insn, and that test insn
2399 needs to be reinserted. */
2404 if (prev_nonnote_insn (insn
) != last_ignored_compare
)
2407 /* We have already processed the notes between the setter and
2408 the user. Make sure we don't process them again, this is
2409 particularly important if one of the notes is a block
2410 scope note or an EH note. */
2412 prev
!= last_ignored_compare
;
2413 prev
= PREV_INSN (prev
))
2415 if (GET_CODE (prev
) == NOTE
)
2416 delete_insn (prev
); /* Use delete_note. */
2422 /* If the template is the string "#", it means that this insn must
2424 if (template[0] == '#' && template[1] == '\0')
2426 rtx
new = try_split (body
, insn
, 0);
2428 /* If we didn't split the insn, go away. */
2429 if (new == insn
&& PATTERN (new) == body
)
2430 fatal_insn ("could not split insn", insn
);
2432 #ifdef HAVE_ATTR_length
2433 /* This instruction should have been split in shorten_branches,
2434 to ensure that we would have valid length info for the
2445 #ifdef IA64_UNWIND_INFO
2446 IA64_UNWIND_EMIT (asm_out_file
, insn
);
2448 /* Output assembler code from the template. */
2450 output_asm_insn (template, recog_data
.operand
);
2452 /* If necessary, report the effect that the instruction has on
2453 the unwind info. We've already done this for delay slots
2454 and call instructions. */
2455 #if defined (DWARF2_UNWIND_INFO)
2456 if (GET_CODE (insn
) == INSN
2457 #if !defined (HAVE_prologue)
2458 && !ACCUMULATE_OUTGOING_ARGS
2460 && final_sequence
== 0
2461 && dwarf2out_do_frame ())
2462 dwarf2out_frame_debug (insn
);
2466 /* It's not at all clear why we did this and doing so used to
2467 interfere with tests that used REG_WAS_0 notes, which are
2468 now gone, so let's try with this out. */
2470 /* Mark this insn as having been output. */
2471 INSN_DELETED_P (insn
) = 1;
2474 /* Emit information for vtable gc. */
2475 note
= find_reg_note (insn
, REG_VTABLE_REF
, NULL_RTX
);
2477 current_output_insn
= debug_insn
= 0;
2480 return NEXT_INSN (insn
);
2483 /* Output debugging info to the assembler file FILE
2484 based on the NOTE-insn INSN, assumed to be a line number. */
2487 notice_source_line (rtx insn
)
2489 const char *filename
= insn_file (insn
);
2490 int linenum
= insn_line (insn
);
2492 if (filename
&& (filename
!= last_filename
|| last_linenum
!= linenum
))
2494 last_filename
= filename
;
2495 last_linenum
= linenum
;
2496 high_block_linenum
= MAX (last_linenum
, high_block_linenum
);
2497 high_function_linenum
= MAX (last_linenum
, high_function_linenum
);
2503 /* For each operand in INSN, simplify (subreg (reg)) so that it refers
2504 directly to the desired hard register. */
2507 cleanup_subreg_operands (rtx insn
)
2510 extract_insn_cached (insn
);
2511 for (i
= 0; i
< recog_data
.n_operands
; i
++)
2513 /* The following test cannot use recog_data.operand when testing
2514 for a SUBREG: the underlying object might have been changed
2515 already if we are inside a match_operator expression that
2516 matches the else clause. Instead we test the underlying
2517 expression directly. */
2518 if (GET_CODE (*recog_data
.operand_loc
[i
]) == SUBREG
)
2519 recog_data
.operand
[i
] = alter_subreg (recog_data
.operand_loc
[i
]);
2520 else if (GET_CODE (recog_data
.operand
[i
]) == PLUS
2521 || GET_CODE (recog_data
.operand
[i
]) == MULT
2522 || GET_CODE (recog_data
.operand
[i
]) == MEM
)
2523 recog_data
.operand
[i
] = walk_alter_subreg (recog_data
.operand_loc
[i
]);
2526 for (i
= 0; i
< recog_data
.n_dups
; i
++)
2528 if (GET_CODE (*recog_data
.dup_loc
[i
]) == SUBREG
)
2529 *recog_data
.dup_loc
[i
] = alter_subreg (recog_data
.dup_loc
[i
]);
2530 else if (GET_CODE (*recog_data
.dup_loc
[i
]) == PLUS
2531 || GET_CODE (*recog_data
.dup_loc
[i
]) == MULT
2532 || GET_CODE (*recog_data
.dup_loc
[i
]) == MEM
)
2533 *recog_data
.dup_loc
[i
] = walk_alter_subreg (recog_data
.dup_loc
[i
]);
2537 /* If X is a SUBREG, replace it with a REG or a MEM,
2538 based on the thing it is a subreg of. */
2541 alter_subreg (rtx
*xp
)
2544 rtx y
= SUBREG_REG (x
);
2546 /* simplify_subreg does not remove subreg from volatile references.
2547 We are required to. */
2548 if (GET_CODE (y
) == MEM
)
2549 *xp
= adjust_address (y
, GET_MODE (x
), SUBREG_BYTE (x
));
2552 rtx
new = simplify_subreg (GET_MODE (x
), y
, GET_MODE (y
),
2557 /* Simplify_subreg can't handle some REG cases, but we have to. */
2558 else if (GET_CODE (y
) == REG
)
2560 unsigned int regno
= subreg_hard_regno (x
, 1);
2561 *xp
= gen_rtx_REG_offset (y
, GET_MODE (x
), regno
, SUBREG_BYTE (x
));
2570 /* Do alter_subreg on all the SUBREGs contained in X. */
2573 walk_alter_subreg (rtx
*xp
)
2576 switch (GET_CODE (x
))
2580 XEXP (x
, 0) = walk_alter_subreg (&XEXP (x
, 0));
2581 XEXP (x
, 1) = walk_alter_subreg (&XEXP (x
, 1));
2585 XEXP (x
, 0) = walk_alter_subreg (&XEXP (x
, 0));
2589 return alter_subreg (xp
);
2600 /* Given BODY, the body of a jump instruction, alter the jump condition
2601 as required by the bits that are set in cc_status.flags.
2602 Not all of the bits there can be handled at this level in all cases.
2604 The value is normally 0.
2605 1 means that the condition has become always true.
2606 -1 means that the condition has become always false.
2607 2 means that COND has been altered. */
2610 alter_cond (rtx cond
)
2614 if (cc_status
.flags
& CC_REVERSED
)
2617 PUT_CODE (cond
, swap_condition (GET_CODE (cond
)));
2620 if (cc_status
.flags
& CC_INVERTED
)
2623 PUT_CODE (cond
, reverse_condition (GET_CODE (cond
)));
2626 if (cc_status
.flags
& CC_NOT_POSITIVE
)
2627 switch (GET_CODE (cond
))
2632 /* Jump becomes unconditional. */
2638 /* Jump becomes no-op. */
2642 PUT_CODE (cond
, EQ
);
2647 PUT_CODE (cond
, NE
);
2655 if (cc_status
.flags
& CC_NOT_NEGATIVE
)
2656 switch (GET_CODE (cond
))
2660 /* Jump becomes unconditional. */
2665 /* Jump becomes no-op. */
2670 PUT_CODE (cond
, EQ
);
2676 PUT_CODE (cond
, NE
);
2684 if (cc_status
.flags
& CC_NO_OVERFLOW
)
2685 switch (GET_CODE (cond
))
2688 /* Jump becomes unconditional. */
2692 PUT_CODE (cond
, EQ
);
2697 PUT_CODE (cond
, NE
);
2702 /* Jump becomes no-op. */
2709 if (cc_status
.flags
& (CC_Z_IN_NOT_N
| CC_Z_IN_N
))
2710 switch (GET_CODE (cond
))
2716 PUT_CODE (cond
, cc_status
.flags
& CC_Z_IN_N
? GE
: LT
);
2721 PUT_CODE (cond
, cc_status
.flags
& CC_Z_IN_N
? LT
: GE
);
2726 if (cc_status
.flags
& CC_NOT_SIGNED
)
2727 /* The flags are valid if signed condition operators are converted
2729 switch (GET_CODE (cond
))
2732 PUT_CODE (cond
, LEU
);
2737 PUT_CODE (cond
, LTU
);
2742 PUT_CODE (cond
, GTU
);
2747 PUT_CODE (cond
, GEU
);
2759 /* Report inconsistency between the assembler template and the operands.
2760 In an `asm', it's the user's fault; otherwise, the compiler's fault. */
2763 output_operand_lossage (const char *msgid
, ...)
2767 const char *pfx_str
;
2770 va_start (ap
, msgid
);
2772 pfx_str
= this_is_asm_operands
? _("invalid `asm': ") : "output_operand: ";
2773 asprintf (&fmt_string
, "%s%s", pfx_str
, _(msgid
));
2774 vasprintf (&new_message
, fmt_string
, ap
);
2776 if (this_is_asm_operands
)
2777 error_for_asm (this_is_asm_operands
, "%s", new_message
);
2779 internal_error ("%s", new_message
);
2786 /* Output of assembler code from a template, and its subroutines. */
2788 /* Annotate the assembly with a comment describing the pattern and
2789 alternative used. */
2792 output_asm_name (void)
2796 int num
= INSN_CODE (debug_insn
);
2797 fprintf (asm_out_file
, "\t%s %d\t%s",
2798 ASM_COMMENT_START
, INSN_UID (debug_insn
),
2799 insn_data
[num
].name
);
2800 if (insn_data
[num
].n_alternatives
> 1)
2801 fprintf (asm_out_file
, "/%d", which_alternative
+ 1);
2802 #ifdef HAVE_ATTR_length
2803 fprintf (asm_out_file
, "\t[length = %d]",
2804 get_attr_length (debug_insn
));
2806 /* Clear this so only the first assembler insn
2807 of any rtl insn will get the special comment for -dp. */
2812 /* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it
2813 or its address, return that expr . Set *PADDRESSP to 1 if the expr
2814 corresponds to the address of the object and 0 if to the object. */
2817 get_mem_expr_from_op (rtx op
, int *paddressp
)
2824 if (GET_CODE (op
) == REG
)
2825 return REG_EXPR (op
);
2826 else if (GET_CODE (op
) != MEM
)
2829 if (MEM_EXPR (op
) != 0)
2830 return MEM_EXPR (op
);
2832 /* Otherwise we have an address, so indicate it and look at the address. */
2836 /* First check if we have a decl for the address, then look at the right side
2837 if it is a PLUS. Otherwise, strip off arithmetic and keep looking.
2838 But don't allow the address to itself be indirect. */
2839 if ((expr
= get_mem_expr_from_op (op
, &inner_addressp
)) && ! inner_addressp
)
2841 else if (GET_CODE (op
) == PLUS
2842 && (expr
= get_mem_expr_from_op (XEXP (op
, 1), &inner_addressp
)))
2845 while (GET_RTX_CLASS (GET_CODE (op
)) == '1'
2846 || GET_RTX_CLASS (GET_CODE (op
)) == '2')
2849 expr
= get_mem_expr_from_op (op
, &inner_addressp
);
2850 return inner_addressp
? 0 : expr
;
2853 /* Output operand names for assembler instructions. OPERANDS is the
2854 operand vector, OPORDER is the order to write the operands, and NOPS
2855 is the number of operands to write. */
2858 output_asm_operand_names (rtx
*operands
, int *oporder
, int nops
)
2863 for (i
= 0; i
< nops
; i
++)
2866 rtx op
= operands
[oporder
[i
]];
2867 tree expr
= get_mem_expr_from_op (op
, &addressp
);
2869 fprintf (asm_out_file
, "%c%s",
2870 wrote
? ',' : '\t', wrote
? "" : ASM_COMMENT_START
);
2874 fprintf (asm_out_file
, "%s",
2875 addressp
? "*" : "");
2876 print_mem_expr (asm_out_file
, expr
);
2879 else if (REG_P (op
) && ORIGINAL_REGNO (op
)
2880 && ORIGINAL_REGNO (op
) != REGNO (op
))
2881 fprintf (asm_out_file
, " tmp%i", ORIGINAL_REGNO (op
));
2885 /* Output text from TEMPLATE to the assembler output file,
2886 obeying %-directions to substitute operands taken from
2887 the vector OPERANDS.
2889 %N (for N a digit) means print operand N in usual manner.
2890 %lN means require operand N to be a CODE_LABEL or LABEL_REF
2891 and print the label name with no punctuation.
2892 %cN means require operand N to be a constant
2893 and print the constant expression with no punctuation.
2894 %aN means expect operand N to be a memory address
2895 (not a memory reference!) and print a reference
2897 %nN means expect operand N to be a constant
2898 and print a constant expression for minus the value
2899 of the operand, with no other punctuation. */
2902 output_asm_insn (const char *template, rtx
*operands
)
2906 #ifdef ASSEMBLER_DIALECT
2909 int oporder
[MAX_RECOG_OPERANDS
];
2910 char opoutput
[MAX_RECOG_OPERANDS
];
2913 /* An insn may return a null string template
2914 in a case where no assembler code is needed. */
2918 memset (opoutput
, 0, sizeof opoutput
);
2920 putc ('\t', asm_out_file
);
2922 #ifdef ASM_OUTPUT_OPCODE
2923 ASM_OUTPUT_OPCODE (asm_out_file
, p
);
2930 if (flag_verbose_asm
)
2931 output_asm_operand_names (operands
, oporder
, ops
);
2932 if (flag_print_asm_name
)
2936 memset (opoutput
, 0, sizeof opoutput
);
2938 putc (c
, asm_out_file
);
2939 #ifdef ASM_OUTPUT_OPCODE
2940 while ((c
= *p
) == '\t')
2942 putc (c
, asm_out_file
);
2945 ASM_OUTPUT_OPCODE (asm_out_file
, p
);
2949 #ifdef ASSEMBLER_DIALECT
2955 output_operand_lossage ("nested assembly dialect alternatives");
2959 /* If we want the first dialect, do nothing. Otherwise, skip
2960 DIALECT_NUMBER of strings ending with '|'. */
2961 for (i
= 0; i
< dialect_number
; i
++)
2963 while (*p
&& *p
!= '}' && *p
++ != '|')
2972 output_operand_lossage ("unterminated assembly dialect alternative");
2979 /* Skip to close brace. */
2984 output_operand_lossage ("unterminated assembly dialect alternative");
2988 while (*p
++ != '}');
2992 putc (c
, asm_out_file
);
2997 putc (c
, asm_out_file
);
3003 /* %% outputs a single %. */
3007 putc (c
, asm_out_file
);
3009 /* %= outputs a number which is unique to each insn in the entire
3010 compilation. This is useful for making local labels that are
3011 referred to more than once in a given insn. */
3015 fprintf (asm_out_file
, "%d", insn_counter
);
3017 /* % followed by a letter and some digits
3018 outputs an operand in a special way depending on the letter.
3019 Letters `acln' are implemented directly.
3020 Other letters are passed to `output_operand' so that
3021 the PRINT_OPERAND macro can define them. */
3022 else if (ISALPHA (*p
))
3028 output_operand_lossage ("operand number missing after %%-letter");
3029 else if (this_is_asm_operands
3030 && (c
< 0 || (unsigned int) c
>= insn_noperands
))
3031 output_operand_lossage ("operand number out of range");
3032 else if (letter
== 'l')
3033 output_asm_label (operands
[c
]);
3034 else if (letter
== 'a')
3035 output_address (operands
[c
]);
3036 else if (letter
== 'c')
3038 if (CONSTANT_ADDRESS_P (operands
[c
]))
3039 output_addr_const (asm_out_file
, operands
[c
]);
3041 output_operand (operands
[c
], 'c');
3043 else if (letter
== 'n')
3045 if (GET_CODE (operands
[c
]) == CONST_INT
)
3046 fprintf (asm_out_file
, HOST_WIDE_INT_PRINT_DEC
,
3047 - INTVAL (operands
[c
]));
3050 putc ('-', asm_out_file
);
3051 output_addr_const (asm_out_file
, operands
[c
]);
3055 output_operand (operands
[c
], letter
);
3061 while (ISDIGIT (c
= *p
))
3064 /* % followed by a digit outputs an operand the default way. */
3065 else if (ISDIGIT (*p
))
3068 if (this_is_asm_operands
3069 && (c
< 0 || (unsigned int) c
>= insn_noperands
))
3070 output_operand_lossage ("operand number out of range");
3072 output_operand (operands
[c
], 0);
3078 while (ISDIGIT (c
= *p
))
3081 /* % followed by punctuation: output something for that
3082 punctuation character alone, with no operand.
3083 The PRINT_OPERAND macro decides what is actually done. */
3084 #ifdef PRINT_OPERAND_PUNCT_VALID_P
3085 else if (PRINT_OPERAND_PUNCT_VALID_P ((unsigned char) *p
))
3086 output_operand (NULL_RTX
, *p
++);
3089 output_operand_lossage ("invalid %%-code");
3093 putc (c
, asm_out_file
);
3096 /* Write out the variable names for operands, if we know them. */
3097 if (flag_verbose_asm
)
3098 output_asm_operand_names (operands
, oporder
, ops
);
3099 if (flag_print_asm_name
)
3102 putc ('\n', asm_out_file
);
3105 /* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */
3108 output_asm_label (rtx x
)
3112 if (GET_CODE (x
) == LABEL_REF
)
3114 if (GET_CODE (x
) == CODE_LABEL
3115 || (GET_CODE (x
) == NOTE
3116 && NOTE_LINE_NUMBER (x
) == NOTE_INSN_DELETED_LABEL
))
3117 ASM_GENERATE_INTERNAL_LABEL (buf
, "L", CODE_LABEL_NUMBER (x
));
3119 output_operand_lossage ("`%%l' operand isn't a label");
3121 assemble_name (asm_out_file
, buf
);
3124 /* Print operand X using machine-dependent assembler syntax.
3125 The macro PRINT_OPERAND is defined just to control this function.
3126 CODE is a non-digit that preceded the operand-number in the % spec,
3127 such as 'z' if the spec was `%z3'. CODE is 0 if there was no char
3128 between the % and the digits.
3129 When CODE is a non-letter, X is 0.
3131 The meanings of the letters are machine-dependent and controlled
3132 by PRINT_OPERAND. */
3135 output_operand (rtx x
, int code ATTRIBUTE_UNUSED
)
3137 if (x
&& GET_CODE (x
) == SUBREG
)
3138 x
= alter_subreg (&x
);
3140 /* If X is a pseudo-register, abort now rather than writing trash to the
3143 if (x
&& GET_CODE (x
) == REG
&& REGNO (x
) >= FIRST_PSEUDO_REGISTER
)
3146 PRINT_OPERAND (asm_out_file
, x
, code
);
3149 /* Print a memory reference operand for address X
3150 using machine-dependent assembler syntax.
3151 The macro PRINT_OPERAND_ADDRESS exists just to control this function. */
3154 output_address (rtx x
)
3156 walk_alter_subreg (&x
);
3157 PRINT_OPERAND_ADDRESS (asm_out_file
, x
);
3160 /* Print an integer constant expression in assembler syntax.
3161 Addition and subtraction are the only arithmetic
3162 that may appear in these expressions. */
3165 output_addr_const (FILE *file
, rtx x
)
3170 switch (GET_CODE (x
))
3177 #ifdef ASM_OUTPUT_SYMBOL_REF
3178 ASM_OUTPUT_SYMBOL_REF (file
, x
);
3180 assemble_name (file
, XSTR (x
, 0));
3188 ASM_GENERATE_INTERNAL_LABEL (buf
, "L", CODE_LABEL_NUMBER (x
));
3189 #ifdef ASM_OUTPUT_LABEL_REF
3190 ASM_OUTPUT_LABEL_REF (file
, buf
);
3192 assemble_name (file
, buf
);
3197 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, INTVAL (x
));
3201 /* This used to output parentheses around the expression,
3202 but that does not work on the 386 (either ATT or BSD assembler). */
3203 output_addr_const (file
, XEXP (x
, 0));
3207 if (GET_MODE (x
) == VOIDmode
)
3209 /* We can use %d if the number is one word and positive. */
3210 if (CONST_DOUBLE_HIGH (x
))
3211 fprintf (file
, HOST_WIDE_INT_PRINT_DOUBLE_HEX
,
3212 CONST_DOUBLE_HIGH (x
), CONST_DOUBLE_LOW (x
));
3213 else if (CONST_DOUBLE_LOW (x
) < 0)
3214 fprintf (file
, HOST_WIDE_INT_PRINT_HEX
, CONST_DOUBLE_LOW (x
));
3216 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, CONST_DOUBLE_LOW (x
));
3219 /* We can't handle floating point constants;
3220 PRINT_OPERAND must handle them. */
3221 output_operand_lossage ("floating constant misused");
3225 /* Some assemblers need integer constants to appear last (eg masm). */
3226 if (GET_CODE (XEXP (x
, 0)) == CONST_INT
)
3228 output_addr_const (file
, XEXP (x
, 1));
3229 if (INTVAL (XEXP (x
, 0)) >= 0)
3230 fprintf (file
, "+");
3231 output_addr_const (file
, XEXP (x
, 0));
3235 output_addr_const (file
, XEXP (x
, 0));
3236 if (GET_CODE (XEXP (x
, 1)) != CONST_INT
3237 || INTVAL (XEXP (x
, 1)) >= 0)
3238 fprintf (file
, "+");
3239 output_addr_const (file
, XEXP (x
, 1));
3244 /* Avoid outputting things like x-x or x+5-x,
3245 since some assemblers can't handle that. */
3246 x
= simplify_subtraction (x
);
3247 if (GET_CODE (x
) != MINUS
)
3250 output_addr_const (file
, XEXP (x
, 0));
3251 fprintf (file
, "-");
3252 if ((GET_CODE (XEXP (x
, 1)) == CONST_INT
&& INTVAL (XEXP (x
, 1)) >= 0)
3253 || GET_CODE (XEXP (x
, 1)) == PC
3254 || GET_CODE (XEXP (x
, 1)) == SYMBOL_REF
)
3255 output_addr_const (file
, XEXP (x
, 1));
3258 fputs (targetm
.asm_out
.open_paren
, file
);
3259 output_addr_const (file
, XEXP (x
, 1));
3260 fputs (targetm
.asm_out
.close_paren
, file
);
3267 output_addr_const (file
, XEXP (x
, 0));
3271 #ifdef OUTPUT_ADDR_CONST_EXTRA
3272 OUTPUT_ADDR_CONST_EXTRA (file
, x
, fail
);
3277 output_operand_lossage ("invalid expression as operand");
3281 /* A poor man's fprintf, with the added features of %I, %R, %L, and %U.
3282 %R prints the value of REGISTER_PREFIX.
3283 %L prints the value of LOCAL_LABEL_PREFIX.
3284 %U prints the value of USER_LABEL_PREFIX.
3285 %I prints the value of IMMEDIATE_PREFIX.
3286 %O runs ASM_OUTPUT_OPCODE to transform what follows in the string.
3287 Also supported are %d, %i, %u, %x, %X, %o, %c, %s and %%.
3289 We handle alternate assembler dialects here, just like output_asm_insn. */
3292 asm_fprintf (FILE *file
, const char *p
, ...)
3298 va_start (argptr
, p
);
3305 #ifdef ASSEMBLER_DIALECT
3310 /* If we want the first dialect, do nothing. Otherwise, skip
3311 DIALECT_NUMBER of strings ending with '|'. */
3312 for (i
= 0; i
< dialect_number
; i
++)
3314 while (*p
&& *p
++ != '|')
3324 /* Skip to close brace. */
3325 while (*p
&& *p
++ != '}')
3336 while (strchr ("-+ #0", c
))
3341 while (ISDIGIT (c
) || c
== '.')
3352 case 'd': case 'i': case 'u':
3353 case 'x': case 'X': case 'o':
3357 fprintf (file
, buf
, va_arg (argptr
, int));
3361 /* This is a prefix to the 'd', 'i', 'u', 'x', 'X', and
3362 'o' cases, but we do not check for those cases. It
3363 means that the value is a HOST_WIDE_INT, which may be
3364 either `long' or `long long'. */
3365 memcpy (q
, HOST_WIDE_INT_PRINT
, strlen (HOST_WIDE_INT_PRINT
));
3366 q
+= strlen (HOST_WIDE_INT_PRINT
);
3369 fprintf (file
, buf
, va_arg (argptr
, HOST_WIDE_INT
));
3374 #ifdef HAVE_LONG_LONG
3380 fprintf (file
, buf
, va_arg (argptr
, long long));
3387 fprintf (file
, buf
, va_arg (argptr
, long));
3395 fprintf (file
, buf
, va_arg (argptr
, char *));
3399 #ifdef ASM_OUTPUT_OPCODE
3400 ASM_OUTPUT_OPCODE (asm_out_file
, p
);
3405 #ifdef REGISTER_PREFIX
3406 fprintf (file
, "%s", REGISTER_PREFIX
);
3411 #ifdef IMMEDIATE_PREFIX
3412 fprintf (file
, "%s", IMMEDIATE_PREFIX
);
3417 #ifdef LOCAL_LABEL_PREFIX
3418 fprintf (file
, "%s", LOCAL_LABEL_PREFIX
);
3423 fputs (user_label_prefix
, file
);
3426 #ifdef ASM_FPRINTF_EXTENSIONS
3427 /* Uppercase letters are reserved for general use by asm_fprintf
3428 and so are not available to target specific code. In order to
3429 prevent the ASM_FPRINTF_EXTENSIONS macro from using them then,
3430 they are defined here. As they get turned into real extensions
3431 to asm_fprintf they should be removed from this list. */
3432 case 'A': case 'B': case 'C': case 'D': case 'E':
3433 case 'F': case 'G': case 'H': case 'J': case 'K':
3434 case 'M': case 'N': case 'P': case 'Q': case 'S':
3435 case 'T': case 'V': case 'W': case 'Y': case 'Z':
3438 ASM_FPRINTF_EXTENSIONS (file
, argptr
, p
)
3451 /* Split up a CONST_DOUBLE or integer constant rtx
3452 into two rtx's for single words,
3453 storing in *FIRST the word that comes first in memory in the target
3454 and in *SECOND the other. */
3457 split_double (rtx value
, rtx
*first
, rtx
*second
)
3459 if (GET_CODE (value
) == CONST_INT
)
3461 if (HOST_BITS_PER_WIDE_INT
>= (2 * BITS_PER_WORD
))
3463 /* In this case the CONST_INT holds both target words.
3464 Extract the bits from it into two word-sized pieces.
3465 Sign extend each half to HOST_WIDE_INT. */
3466 unsigned HOST_WIDE_INT low
, high
;
3467 unsigned HOST_WIDE_INT mask
, sign_bit
, sign_extend
;
3469 /* Set sign_bit to the most significant bit of a word. */
3471 sign_bit
<<= BITS_PER_WORD
- 1;
3473 /* Set mask so that all bits of the word are set. We could
3474 have used 1 << BITS_PER_WORD instead of basing the
3475 calculation on sign_bit. However, on machines where
3476 HOST_BITS_PER_WIDE_INT == BITS_PER_WORD, it could cause a
3477 compiler warning, even though the code would never be
3479 mask
= sign_bit
<< 1;
3482 /* Set sign_extend as any remaining bits. */
3483 sign_extend
= ~mask
;
3485 /* Pick the lower word and sign-extend it. */
3486 low
= INTVAL (value
);
3491 /* Pick the higher word, shifted to the least significant
3492 bits, and sign-extend it. */
3493 high
= INTVAL (value
);
3494 high
>>= BITS_PER_WORD
- 1;
3497 if (high
& sign_bit
)
3498 high
|= sign_extend
;
3500 /* Store the words in the target machine order. */
3501 if (WORDS_BIG_ENDIAN
)
3503 *first
= GEN_INT (high
);
3504 *second
= GEN_INT (low
);
3508 *first
= GEN_INT (low
);
3509 *second
= GEN_INT (high
);
3514 /* The rule for using CONST_INT for a wider mode
3515 is that we regard the value as signed.
3516 So sign-extend it. */
3517 rtx high
= (INTVAL (value
) < 0 ? constm1_rtx
: const0_rtx
);
3518 if (WORDS_BIG_ENDIAN
)
3530 else if (GET_CODE (value
) != CONST_DOUBLE
)
3532 if (WORDS_BIG_ENDIAN
)
3534 *first
= const0_rtx
;
3540 *second
= const0_rtx
;
3543 else if (GET_MODE (value
) == VOIDmode
3544 /* This is the old way we did CONST_DOUBLE integers. */
3545 || GET_MODE_CLASS (GET_MODE (value
)) == MODE_INT
)
3547 /* In an integer, the words are defined as most and least significant.
3548 So order them by the target's convention. */
3549 if (WORDS_BIG_ENDIAN
)
3551 *first
= GEN_INT (CONST_DOUBLE_HIGH (value
));
3552 *second
= GEN_INT (CONST_DOUBLE_LOW (value
));
3556 *first
= GEN_INT (CONST_DOUBLE_LOW (value
));
3557 *second
= GEN_INT (CONST_DOUBLE_HIGH (value
));
3564 REAL_VALUE_FROM_CONST_DOUBLE (r
, value
);
3566 /* Note, this converts the REAL_VALUE_TYPE to the target's
3567 format, splits up the floating point double and outputs
3568 exactly 32 bits of it into each of l[0] and l[1] --
3569 not necessarily BITS_PER_WORD bits. */
3570 REAL_VALUE_TO_TARGET_DOUBLE (r
, l
);
3572 /* If 32 bits is an entire word for the target, but not for the host,
3573 then sign-extend on the host so that the number will look the same
3574 way on the host that it would on the target. See for instance
3575 simplify_unary_operation. The #if is needed to avoid compiler
3578 #if HOST_BITS_PER_LONG > 32
3579 if (BITS_PER_WORD
< HOST_BITS_PER_LONG
&& BITS_PER_WORD
== 32)
3581 if (l
[0] & ((long) 1 << 31))
3582 l
[0] |= ((long) (-1) << 32);
3583 if (l
[1] & ((long) 1 << 31))
3584 l
[1] |= ((long) (-1) << 32);
3588 *first
= GEN_INT ((HOST_WIDE_INT
) l
[0]);
3589 *second
= GEN_INT ((HOST_WIDE_INT
) l
[1]);
3593 /* Return nonzero if this function has no function calls. */
3596 leaf_function_p (void)
3601 if (current_function_profile
|| profile_arc_flag
)
3604 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
3606 if (GET_CODE (insn
) == CALL_INSN
3607 && ! SIBLING_CALL_P (insn
))
3609 if (GET_CODE (insn
) == INSN
3610 && GET_CODE (PATTERN (insn
)) == SEQUENCE
3611 && GET_CODE (XVECEXP (PATTERN (insn
), 0, 0)) == CALL_INSN
3612 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn
), 0, 0)))
3615 for (link
= current_function_epilogue_delay_list
;
3617 link
= XEXP (link
, 1))
3619 insn
= XEXP (link
, 0);
3621 if (GET_CODE (insn
) == CALL_INSN
3622 && ! SIBLING_CALL_P (insn
))
3624 if (GET_CODE (insn
) == INSN
3625 && GET_CODE (PATTERN (insn
)) == SEQUENCE
3626 && GET_CODE (XVECEXP (PATTERN (insn
), 0, 0)) == CALL_INSN
3627 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn
), 0, 0)))
3634 /* Return 1 if branch is a forward branch.
3635 Uses insn_shuid array, so it works only in the final pass. May be used by
3636 output templates to customary add branch prediction hints.
3639 final_forward_branch_p (rtx insn
)
3641 int insn_id
, label_id
;
3644 insn_id
= INSN_SHUID (insn
);
3645 label_id
= INSN_SHUID (JUMP_LABEL (insn
));
3646 /* We've hit some insns that does not have id information available. */
3647 if (!insn_id
|| !label_id
)
3649 return insn_id
< label_id
;
3652 /* On some machines, a function with no call insns
3653 can run faster if it doesn't create its own register window.
3654 When output, the leaf function should use only the "output"
3655 registers. Ordinarily, the function would be compiled to use
3656 the "input" registers to find its arguments; it is a candidate
3657 for leaf treatment if it uses only the "input" registers.
3658 Leaf function treatment means renumbering so the function
3659 uses the "output" registers instead. */
3661 #ifdef LEAF_REGISTERS
3663 /* Return 1 if this function uses only the registers that can be
3664 safely renumbered. */
3667 only_leaf_regs_used (void)
3670 const char *const permitted_reg_in_leaf_functions
= LEAF_REGISTERS
;
3672 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
3673 if ((regs_ever_live
[i
] || global_regs
[i
])
3674 && ! permitted_reg_in_leaf_functions
[i
])
3677 if (current_function_uses_pic_offset_table
3678 && pic_offset_table_rtx
!= 0
3679 && GET_CODE (pic_offset_table_rtx
) == REG
3680 && ! permitted_reg_in_leaf_functions
[REGNO (pic_offset_table_rtx
)])
3686 /* Scan all instructions and renumber all registers into those
3687 available in leaf functions. */
3690 leaf_renumber_regs (rtx first
)
3694 /* Renumber only the actual patterns.
3695 The reg-notes can contain frame pointer refs,
3696 and renumbering them could crash, and should not be needed. */
3697 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
3699 leaf_renumber_regs_insn (PATTERN (insn
));
3700 for (insn
= current_function_epilogue_delay_list
;
3702 insn
= XEXP (insn
, 1))
3703 if (INSN_P (XEXP (insn
, 0)))
3704 leaf_renumber_regs_insn (PATTERN (XEXP (insn
, 0)));
3707 /* Scan IN_RTX and its subexpressions, and renumber all regs into those
3708 available in leaf functions. */
3711 leaf_renumber_regs_insn (rtx in_rtx
)
3714 const char *format_ptr
;
3719 /* Renumber all input-registers into output-registers.
3720 renumbered_regs would be 1 for an output-register;
3723 if (GET_CODE (in_rtx
) == REG
)
3727 /* Don't renumber the same reg twice. */
3731 newreg
= REGNO (in_rtx
);
3732 /* Don't try to renumber pseudo regs. It is possible for a pseudo reg
3733 to reach here as part of a REG_NOTE. */
3734 if (newreg
>= FIRST_PSEUDO_REGISTER
)
3739 newreg
= LEAF_REG_REMAP (newreg
);
3742 regs_ever_live
[REGNO (in_rtx
)] = 0;
3743 regs_ever_live
[newreg
] = 1;
3744 REGNO (in_rtx
) = newreg
;
3748 if (INSN_P (in_rtx
))
3750 /* Inside a SEQUENCE, we find insns.
3751 Renumber just the patterns of these insns,
3752 just as we do for the top-level insns. */
3753 leaf_renumber_regs_insn (PATTERN (in_rtx
));
3757 format_ptr
= GET_RTX_FORMAT (GET_CODE (in_rtx
));
3759 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (in_rtx
)); i
++)
3760 switch (*format_ptr
++)
3763 leaf_renumber_regs_insn (XEXP (in_rtx
, i
));
3767 if (NULL
!= XVEC (in_rtx
, i
))
3769 for (j
= 0; j
< XVECLEN (in_rtx
, i
); j
++)
3770 leaf_renumber_regs_insn (XVECEXP (in_rtx
, i
, j
));
3790 /* When -gused is used, emit debug info for only used symbols. But in
3791 addition to the standard intercepted debug_hooks there are some direct
3792 calls into this file, i.e., dbxout_symbol, dbxout_parms, and dbxout_reg_params.
3793 Those routines may also be called from a higher level intercepted routine. So
3794 to prevent recording data for an inner call to one of these for an intercept,
3795 we maintain an intercept nesting counter (debug_nesting). We only save the
3796 intercepted arguments if the nesting is 1. */
3797 int debug_nesting
= 0;
3799 static tree
*symbol_queue
;
3800 int symbol_queue_index
= 0;
3801 static int symbol_queue_size
= 0;
3803 /* Generate the symbols for any queued up type symbols we encountered
3804 while generating the type info for some originally used symbol.
3805 This might generate additional entries in the queue. Only when
3806 the nesting depth goes to 0 is this routine called. */
3809 debug_flush_symbol_queue (void)
3813 /* Make sure that additionally queued items are not flushed
3818 for (i
= 0; i
< symbol_queue_index
; ++i
)
3820 /* If we pushed queued symbols then such symbols are must be
3821 output no matter what anyone else says. Specifically,
3822 we need to make sure dbxout_symbol() thinks the symbol was
3823 used and also we need to override TYPE_DECL_SUPPRESS_DEBUG
3824 which may be set for outside reasons. */
3825 int saved_tree_used
= TREE_USED (symbol_queue
[i
]);
3826 int saved_suppress_debug
= TYPE_DECL_SUPPRESS_DEBUG (symbol_queue
[i
]);
3827 TREE_USED (symbol_queue
[i
]) = 1;
3828 TYPE_DECL_SUPPRESS_DEBUG (symbol_queue
[i
]) = 0;
3830 #ifdef DBX_DEBUGGING_INFO
3831 dbxout_symbol (symbol_queue
[i
], 0);
3834 TREE_USED (symbol_queue
[i
]) = saved_tree_used
;
3835 TYPE_DECL_SUPPRESS_DEBUG (symbol_queue
[i
]) = saved_suppress_debug
;
3838 symbol_queue_index
= 0;
3842 /* Queue a type symbol needed as part of the definition of a decl
3843 symbol. These symbols are generated when debug_flush_symbol_queue()
3847 debug_queue_symbol (tree decl
)
3849 if (symbol_queue_index
>= symbol_queue_size
)
3851 symbol_queue_size
+= 10;
3852 symbol_queue
= xrealloc (symbol_queue
,
3853 symbol_queue_size
* sizeof (tree
));
3856 symbol_queue
[symbol_queue_index
++] = decl
;
3859 /* Free symbol queue. */
3861 debug_free_queue (void)
3865 free (symbol_queue
);
3866 symbol_queue
= NULL
;
3867 symbol_queue_size
= 0;