1 /* Convert RTL to assembler code and output it, for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
22 /* This is the final pass of the compiler.
23 It looks at the rtl code for a function and outputs assembler code.
25 Call `final_start_function' to output the assembler code for function entry,
26 `final' to output assembler code for some RTL code,
27 `final_end_function' to output assembler code for function exit.
28 If a function is compiled in several pieces, each piece is
29 output separately with `final'.
31 Some optimizations are also done at this level.
32 Move instructions that were made unnecessary by good register allocation
33 are detected and omitted from the output. (Though most of these
34 are removed by the last jump pass.)
36 Instructions to set the condition codes are omitted when it can be
37 seen that the condition codes already had the desired values.
39 In some cases it is sufficient if the inherited condition codes
40 have related values, but this may require the following insn
41 (the one that tests the condition codes) to be modified.
43 The code for the function prologue and epilogue are generated
44 directly in assembler by the target functions function_prologue and
45 function_epilogue. Those instructions never exist as rtl. */
49 #include "coretypes.h"
56 #include "insn-config.h"
57 #include "insn-attr.h"
59 #include "conditions.h"
62 #include "hard-reg-set.h"
69 #include "basic-block.h"
73 #include "cfglayout.h"
75 #ifdef XCOFF_DEBUGGING_INFO
76 #include "xcoffout.h" /* Needed for external data
77 declarations for e.g. AIX 4.x. */
80 #if defined (DWARF2_UNWIND_INFO) || defined (DWARF2_DEBUGGING_INFO)
81 #include "dwarf2out.h"
84 #ifdef DBX_DEBUGGING_INFO
88 /* If we aren't using cc0, CC_STATUS_INIT shouldn't exist. So define a
89 null default for it to save conditionalization later. */
90 #ifndef CC_STATUS_INIT
91 #define CC_STATUS_INIT
94 /* How to start an assembler comment. */
95 #ifndef ASM_COMMENT_START
96 #define ASM_COMMENT_START ";#"
99 /* Is the given character a logical line separator for the assembler? */
100 #ifndef IS_ASM_LOGICAL_LINE_SEPARATOR
101 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C) ((C) == ';')
104 #ifndef JUMP_TABLES_IN_TEXT_SECTION
105 #define JUMP_TABLES_IN_TEXT_SECTION 0
108 #if defined(READONLY_DATA_SECTION) || defined(READONLY_DATA_SECTION_ASM_OP)
109 #define HAVE_READONLY_DATA_SECTION 1
111 #define HAVE_READONLY_DATA_SECTION 0
114 /* Bitflags used by final_scan_insn. */
117 #define SEEN_EMITTED 4
119 /* Last insn processed by final_scan_insn. */
120 static rtx debug_insn
;
121 rtx current_output_insn
;
123 /* Line number of last NOTE. */
124 static int last_linenum
;
126 /* Highest line number in current block. */
127 static int high_block_linenum
;
129 /* Likewise for function. */
130 static int high_function_linenum
;
132 /* Filename of last NOTE. */
133 static const char *last_filename
;
135 extern int length_unit_log
; /* This is defined in insn-attrtab.c. */
137 /* Nonzero while outputting an `asm' with operands.
138 This means that inconsistencies are the user's fault, so don't abort.
139 The precise value is the insn being output, to pass to error_for_asm. */
140 rtx this_is_asm_operands
;
142 /* Number of operands of this insn, for an `asm' with operands. */
143 static unsigned int insn_noperands
;
145 /* Compare optimization flag. */
147 static rtx last_ignored_compare
= 0;
149 /* Assign a unique number to each insn that is output.
150 This can be used to generate unique local labels. */
152 static int insn_counter
= 0;
155 /* This variable contains machine-dependent flags (defined in tm.h)
156 set and examined by output routines
157 that describe how to interpret the condition codes properly. */
161 /* During output of an insn, this contains a copy of cc_status
162 from before the insn. */
164 CC_STATUS cc_prev_status
;
167 /* Indexed by hardware reg number, is 1 if that register is ever
168 used in the current function.
170 In life_analysis, or in stupid_life_analysis, this is set
171 up to record the hard regs used explicitly. Reload adds
172 in the hard regs used for holding pseudo regs. Final uses
173 it to generate the code in the function prologue and epilogue
174 to save and restore registers as needed. */
176 char regs_ever_live
[FIRST_PSEUDO_REGISTER
];
178 /* Like regs_ever_live, but 1 if a reg is set or clobbered from an asm.
179 Unlike regs_ever_live, elements of this array corresponding to
180 eliminable regs like the frame pointer are set if an asm sets them. */
182 char regs_asm_clobbered
[FIRST_PSEUDO_REGISTER
];
184 /* Nonzero means current function must be given a frame pointer.
185 Initialized in function.c to 0. Set only in reload1.c as per
186 the needs of the function. */
188 int frame_pointer_needed
;
190 /* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */
192 static int block_depth
;
194 /* Nonzero if have enabled APP processing of our assembler output. */
198 /* If we are outputting an insn sequence, this contains the sequence rtx.
203 #ifdef ASSEMBLER_DIALECT
205 /* Number of the assembler dialect to use, starting at 0. */
206 static int dialect_number
;
209 #ifdef HAVE_conditional_execution
210 /* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */
211 rtx current_insn_predicate
;
214 #ifdef HAVE_ATTR_length
215 static int asm_insn_count (rtx
);
217 static void profile_function (FILE *);
218 static void profile_after_prologue (FILE *);
219 static bool notice_source_line (rtx
);
220 static rtx
walk_alter_subreg (rtx
*);
221 static void output_asm_name (void);
222 static void output_alternate_entry_point (FILE *, rtx
);
223 static tree
get_mem_expr_from_op (rtx
, int *);
224 static void output_asm_operand_names (rtx
*, int *, int);
225 static void output_operand (rtx
, int);
226 #ifdef LEAF_REGISTERS
227 static void leaf_renumber_regs (rtx
);
230 static int alter_cond (rtx
);
232 #ifndef ADDR_VEC_ALIGN
233 static int final_addr_vec_align (rtx
);
235 #ifdef HAVE_ATTR_length
236 static int align_fuzz (rtx
, rtx
, int, unsigned);
239 /* Initialize data in final at the beginning of a compilation. */
242 init_final (const char *filename ATTRIBUTE_UNUSED
)
247 #ifdef ASSEMBLER_DIALECT
248 dialect_number
= ASSEMBLER_DIALECT
;
252 /* Default target function prologue and epilogue assembler output.
254 If not overridden for epilogue code, then the function body itself
255 contains return instructions wherever needed. */
257 default_function_pro_epilogue (FILE *file ATTRIBUTE_UNUSED
,
258 HOST_WIDE_INT size ATTRIBUTE_UNUSED
)
262 /* Default target hook that outputs nothing to a stream. */
264 no_asm_to_stream (FILE *file ATTRIBUTE_UNUSED
)
268 /* Enable APP processing of subsequent output.
269 Used before the output from an `asm' statement. */
276 fputs (ASM_APP_ON
, asm_out_file
);
281 /* Disable APP processing of subsequent output.
282 Called from varasm.c before most kinds of output. */
289 fputs (ASM_APP_OFF
, asm_out_file
);
294 /* Return the number of slots filled in the current
295 delayed branch sequence (we don't count the insn needing the
296 delay slot). Zero if not in a delayed branch sequence. */
300 dbr_sequence_length (void)
302 if (final_sequence
!= 0)
303 return XVECLEN (final_sequence
, 0) - 1;
309 /* The next two pages contain routines used to compute the length of an insn
310 and to shorten branches. */
312 /* Arrays for insn lengths, and addresses. The latter is referenced by
313 `insn_current_length'. */
315 static int *insn_lengths
;
317 varray_type insn_addresses_
;
319 /* Max uid for which the above arrays are valid. */
320 static int insn_lengths_max_uid
;
322 /* Address of insn being processed. Used by `insn_current_length'. */
323 int insn_current_address
;
325 /* Address of insn being processed in previous iteration. */
326 int insn_last_address
;
328 /* known invariant alignment of insn being processed. */
329 int insn_current_align
;
331 /* After shorten_branches, for any insn, uid_align[INSN_UID (insn)]
332 gives the next following alignment insn that increases the known
333 alignment, or NULL_RTX if there is no such insn.
334 For any alignment obtained this way, we can again index uid_align with
335 its uid to obtain the next following align that in turn increases the
336 alignment, till we reach NULL_RTX; the sequence obtained this way
337 for each insn we'll call the alignment chain of this insn in the following
340 struct label_alignment
346 static rtx
*uid_align
;
347 static int *uid_shuid
;
348 static struct label_alignment
*label_align
;
350 /* Indicate that branch shortening hasn't yet been done. */
353 init_insn_lengths (void)
364 insn_lengths_max_uid
= 0;
366 #ifdef HAVE_ATTR_length
367 INSN_ADDRESSES_FREE ();
376 /* Obtain the current length of an insn. If branch shortening has been done,
377 get its actual length. Otherwise, get its maximum length. */
380 get_attr_length (rtx insn ATTRIBUTE_UNUSED
)
382 #ifdef HAVE_ATTR_length
387 if (insn_lengths_max_uid
> INSN_UID (insn
))
388 return insn_lengths
[INSN_UID (insn
)];
390 switch (GET_CODE (insn
))
398 length
= insn_default_length (insn
);
402 body
= PATTERN (insn
);
403 if (GET_CODE (body
) == ADDR_VEC
|| GET_CODE (body
) == ADDR_DIFF_VEC
)
405 /* Alignment is machine-dependent and should be handled by
409 length
= insn_default_length (insn
);
413 body
= PATTERN (insn
);
414 if (GET_CODE (body
) == USE
|| GET_CODE (body
) == CLOBBER
)
417 else if (GET_CODE (body
) == ASM_INPUT
|| asm_noperands (body
) >= 0)
418 length
= asm_insn_count (body
) * insn_default_length (insn
);
419 else if (GET_CODE (body
) == SEQUENCE
)
420 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
421 length
+= get_attr_length (XVECEXP (body
, 0, i
));
423 length
= insn_default_length (insn
);
430 #ifdef ADJUST_INSN_LENGTH
431 ADJUST_INSN_LENGTH (insn
, length
);
434 #else /* not HAVE_ATTR_length */
436 #endif /* not HAVE_ATTR_length */
439 /* Code to handle alignment inside shorten_branches. */
441 /* Here is an explanation how the algorithm in align_fuzz can give
444 Call a sequence of instructions beginning with alignment point X
445 and continuing until the next alignment point `block X'. When `X'
446 is used in an expression, it means the alignment value of the
449 Call the distance between the start of the first insn of block X, and
450 the end of the last insn of block X `IX', for the `inner size of X'.
451 This is clearly the sum of the instruction lengths.
453 Likewise with the next alignment-delimited block following X, which we
456 Call the distance between the start of the first insn of block X, and
457 the start of the first insn of block Y `OX', for the `outer size of X'.
459 The estimated padding is then OX - IX.
461 OX can be safely estimated as
466 OX = round_up(IX, X) + Y - X
468 Clearly est(IX) >= real(IX), because that only depends on the
469 instruction lengths, and those being overestimated is a given.
471 Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so
472 we needn't worry about that when thinking about OX.
474 When X >= Y, the alignment provided by Y adds no uncertainty factor
475 for branch ranges starting before X, so we can just round what we have.
476 But when X < Y, we don't know anything about the, so to speak,
477 `middle bits', so we have to assume the worst when aligning up from an
478 address mod X to one mod Y, which is Y - X. */
481 #define LABEL_ALIGN(LABEL) align_labels_log
484 #ifndef LABEL_ALIGN_MAX_SKIP
485 #define LABEL_ALIGN_MAX_SKIP align_labels_max_skip
489 #define LOOP_ALIGN(LABEL) align_loops_log
492 #ifndef LOOP_ALIGN_MAX_SKIP
493 #define LOOP_ALIGN_MAX_SKIP align_loops_max_skip
496 #ifndef LABEL_ALIGN_AFTER_BARRIER
497 #define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0
500 #ifndef LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP
501 #define LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP 0
505 #define JUMP_ALIGN(LABEL) align_jumps_log
508 #ifndef JUMP_ALIGN_MAX_SKIP
509 #define JUMP_ALIGN_MAX_SKIP align_jumps_max_skip
512 #ifndef ADDR_VEC_ALIGN
514 final_addr_vec_align (rtx addr_vec
)
516 int align
= GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec
)));
518 if (align
> BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
)
519 align
= BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
;
520 return exact_log2 (align
);
524 #define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC)
527 #ifndef INSN_LENGTH_ALIGNMENT
528 #define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log
531 #define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)])
533 static int min_labelno
, max_labelno
;
535 #define LABEL_TO_ALIGNMENT(LABEL) \
536 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment)
538 #define LABEL_TO_MAX_SKIP(LABEL) \
539 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip)
541 /* For the benefit of port specific code do this also as a function. */
544 label_to_alignment (rtx label
)
546 return LABEL_TO_ALIGNMENT (label
);
549 #ifdef HAVE_ATTR_length
550 /* The differences in addresses
551 between a branch and its target might grow or shrink depending on
552 the alignment the start insn of the range (the branch for a forward
553 branch or the label for a backward branch) starts out on; if these
554 differences are used naively, they can even oscillate infinitely.
555 We therefore want to compute a 'worst case' address difference that
556 is independent of the alignment the start insn of the range end
557 up on, and that is at least as large as the actual difference.
558 The function align_fuzz calculates the amount we have to add to the
559 naively computed difference, by traversing the part of the alignment
560 chain of the start insn of the range that is in front of the end insn
561 of the range, and considering for each alignment the maximum amount
562 that it might contribute to a size increase.
564 For casesi tables, we also want to know worst case minimum amounts of
565 address difference, in case a machine description wants to introduce
566 some common offset that is added to all offsets in a table.
567 For this purpose, align_fuzz with a growth argument of 0 computes the
568 appropriate adjustment. */
570 /* Compute the maximum delta by which the difference of the addresses of
571 START and END might grow / shrink due to a different address for start
572 which changes the size of alignment insns between START and END.
573 KNOWN_ALIGN_LOG is the alignment known for START.
574 GROWTH should be ~0 if the objective is to compute potential code size
575 increase, and 0 if the objective is to compute potential shrink.
576 The return value is undefined for any other value of GROWTH. */
579 align_fuzz (rtx start
, rtx end
, int known_align_log
, unsigned int growth
)
581 int uid
= INSN_UID (start
);
583 int known_align
= 1 << known_align_log
;
584 int end_shuid
= INSN_SHUID (end
);
587 for (align_label
= uid_align
[uid
]; align_label
; align_label
= uid_align
[uid
])
589 int align_addr
, new_align
;
591 uid
= INSN_UID (align_label
);
592 align_addr
= INSN_ADDRESSES (uid
) - insn_lengths
[uid
];
593 if (uid_shuid
[uid
] > end_shuid
)
595 known_align_log
= LABEL_TO_ALIGNMENT (align_label
);
596 new_align
= 1 << known_align_log
;
597 if (new_align
< known_align
)
599 fuzz
+= (-align_addr
^ growth
) & (new_align
- known_align
);
600 known_align
= new_align
;
605 /* Compute a worst-case reference address of a branch so that it
606 can be safely used in the presence of aligned labels. Since the
607 size of the branch itself is unknown, the size of the branch is
608 not included in the range. I.e. for a forward branch, the reference
609 address is the end address of the branch as known from the previous
610 branch shortening pass, minus a value to account for possible size
611 increase due to alignment. For a backward branch, it is the start
612 address of the branch as known from the current pass, plus a value
613 to account for possible size increase due to alignment.
614 NB.: Therefore, the maximum offset allowed for backward branches needs
615 to exclude the branch size. */
618 insn_current_reference_address (rtx branch
)
623 if (! INSN_ADDRESSES_SET_P ())
626 seq
= NEXT_INSN (PREV_INSN (branch
));
627 seq_uid
= INSN_UID (seq
);
628 if (GET_CODE (branch
) != JUMP_INSN
)
629 /* This can happen for example on the PA; the objective is to know the
630 offset to address something in front of the start of the function.
631 Thus, we can treat it like a backward branch.
632 We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than
633 any alignment we'd encounter, so we skip the call to align_fuzz. */
634 return insn_current_address
;
635 dest
= JUMP_LABEL (branch
);
637 /* BRANCH has no proper alignment chain set, so use SEQ.
638 BRANCH also has no INSN_SHUID. */
639 if (INSN_SHUID (seq
) < INSN_SHUID (dest
))
641 /* Forward branch. */
642 return (insn_last_address
+ insn_lengths
[seq_uid
]
643 - align_fuzz (seq
, dest
, length_unit_log
, ~0));
647 /* Backward branch. */
648 return (insn_current_address
649 + align_fuzz (dest
, seq
, length_unit_log
, ~0));
652 #endif /* HAVE_ATTR_length */
655 compute_alignments (void)
657 int log
, max_skip
, max_log
;
666 max_labelno
= max_label_num ();
667 min_labelno
= get_first_label_num ();
668 label_align
= xcalloc (max_labelno
- min_labelno
+ 1,
669 sizeof (struct label_alignment
));
671 /* If not optimizing or optimizing for size, don't assign any alignments. */
672 if (! optimize
|| optimize_size
)
677 rtx label
= BB_HEAD (bb
);
678 int fallthru_frequency
= 0, branch_frequency
= 0, has_fallthru
= 0;
681 if (GET_CODE (label
) != CODE_LABEL
682 || probably_never_executed_bb_p (bb
))
684 max_log
= LABEL_ALIGN (label
);
685 max_skip
= LABEL_ALIGN_MAX_SKIP
;
687 for (e
= bb
->pred
; e
; e
= e
->pred_next
)
689 if (e
->flags
& EDGE_FALLTHRU
)
690 has_fallthru
= 1, fallthru_frequency
+= EDGE_FREQUENCY (e
);
692 branch_frequency
+= EDGE_FREQUENCY (e
);
695 /* There are two purposes to align block with no fallthru incoming edge:
696 1) to avoid fetch stalls when branch destination is near cache boundary
697 2) to improve cache efficiency in case the previous block is not executed
698 (so it does not need to be in the cache).
700 We to catch first case, we align frequently executed blocks.
701 To catch the second, we align blocks that are executed more frequently
702 than the predecessor and the predecessor is likely to not be executed
703 when function is called. */
706 && (branch_frequency
> BB_FREQ_MAX
/ 10
707 || (bb
->frequency
> bb
->prev_bb
->frequency
* 10
708 && (bb
->prev_bb
->frequency
709 <= ENTRY_BLOCK_PTR
->frequency
/ 2))))
711 log
= JUMP_ALIGN (label
);
715 max_skip
= JUMP_ALIGN_MAX_SKIP
;
718 /* In case block is frequent and reached mostly by non-fallthru edge,
719 align it. It is most likely a first block of loop. */
721 && maybe_hot_bb_p (bb
)
722 && branch_frequency
+ fallthru_frequency
> BB_FREQ_MAX
/ 10
723 && branch_frequency
> fallthru_frequency
* 2)
725 log
= LOOP_ALIGN (label
);
729 max_skip
= LOOP_ALIGN_MAX_SKIP
;
732 LABEL_TO_ALIGNMENT (label
) = max_log
;
733 LABEL_TO_MAX_SKIP (label
) = max_skip
;
737 /* Make a pass over all insns and compute their actual lengths by shortening
738 any branches of variable length if possible. */
740 /* shorten_branches might be called multiple times: for example, the SH
741 port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG.
742 In order to do this, it needs proper length information, which it obtains
743 by calling shorten_branches. This cannot be collapsed with
744 shorten_branches itself into a single pass unless we also want to integrate
745 reorg.c, since the branch splitting exposes new instructions with delay
749 shorten_branches (rtx first ATTRIBUTE_UNUSED
)
756 #ifdef HAVE_ATTR_length
757 #define MAX_CODE_ALIGN 16
759 int something_changed
= 1;
760 char *varying_length
;
763 rtx align_tab
[MAX_CODE_ALIGN
];
767 /* Compute maximum UID and allocate label_align / uid_shuid. */
768 max_uid
= get_max_uid ();
770 uid_shuid
= xmalloc (max_uid
* sizeof *uid_shuid
);
772 if (max_labelno
!= max_label_num ())
774 int old
= max_labelno
;
778 max_labelno
= max_label_num ();
780 n_labels
= max_labelno
- min_labelno
+ 1;
781 n_old_labels
= old
- min_labelno
+ 1;
783 label_align
= xrealloc (label_align
,
784 n_labels
* sizeof (struct label_alignment
));
786 /* Range of labels grows monotonically in the function. Abort here
787 means that the initialization of array got lost. */
788 if (n_old_labels
> n_labels
)
791 memset (label_align
+ n_old_labels
, 0,
792 (n_labels
- n_old_labels
) * sizeof (struct label_alignment
));
795 /* Initialize label_align and set up uid_shuid to be strictly
796 monotonically rising with insn order. */
797 /* We use max_log here to keep track of the maximum alignment we want to
798 impose on the next CODE_LABEL (or the current one if we are processing
799 the CODE_LABEL itself). */
804 for (insn
= get_insns (), i
= 1; insn
; insn
= NEXT_INSN (insn
))
808 INSN_SHUID (insn
) = i
++;
811 /* reorg might make the first insn of a loop being run once only,
812 and delete the label in front of it. Then we want to apply
813 the loop alignment to the new label created by reorg, which
814 is separated by the former loop start insn from the
815 NOTE_INSN_LOOP_BEG. */
817 else if (GET_CODE (insn
) == CODE_LABEL
)
821 /* Merge in alignments computed by compute_alignments. */
822 log
= LABEL_TO_ALIGNMENT (insn
);
826 max_skip
= LABEL_TO_MAX_SKIP (insn
);
829 log
= LABEL_ALIGN (insn
);
833 max_skip
= LABEL_ALIGN_MAX_SKIP
;
835 next
= NEXT_INSN (insn
);
836 /* ADDR_VECs only take room if read-only data goes into the text
838 if (JUMP_TABLES_IN_TEXT_SECTION
|| !HAVE_READONLY_DATA_SECTION
)
839 if (next
&& GET_CODE (next
) == JUMP_INSN
)
841 rtx nextbody
= PATTERN (next
);
842 if (GET_CODE (nextbody
) == ADDR_VEC
843 || GET_CODE (nextbody
) == ADDR_DIFF_VEC
)
845 log
= ADDR_VEC_ALIGN (next
);
849 max_skip
= LABEL_ALIGN_MAX_SKIP
;
853 LABEL_TO_ALIGNMENT (insn
) = max_log
;
854 LABEL_TO_MAX_SKIP (insn
) = max_skip
;
858 else if (GET_CODE (insn
) == BARRIER
)
862 for (label
= insn
; label
&& ! INSN_P (label
);
863 label
= NEXT_INSN (label
))
864 if (GET_CODE (label
) == CODE_LABEL
)
866 log
= LABEL_ALIGN_AFTER_BARRIER (insn
);
870 max_skip
= LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP
;
876 #ifdef HAVE_ATTR_length
878 /* Allocate the rest of the arrays. */
879 insn_lengths
= xmalloc (max_uid
* sizeof (*insn_lengths
));
880 insn_lengths_max_uid
= max_uid
;
881 /* Syntax errors can lead to labels being outside of the main insn stream.
882 Initialize insn_addresses, so that we get reproducible results. */
883 INSN_ADDRESSES_ALLOC (max_uid
);
885 varying_length
= xcalloc (max_uid
, sizeof (char));
887 /* Initialize uid_align. We scan instructions
888 from end to start, and keep in align_tab[n] the last seen insn
889 that does an alignment of at least n+1, i.e. the successor
890 in the alignment chain for an insn that does / has a known
892 uid_align
= xcalloc (max_uid
, sizeof *uid_align
);
894 for (i
= MAX_CODE_ALIGN
; --i
>= 0;)
895 align_tab
[i
] = NULL_RTX
;
896 seq
= get_last_insn ();
897 for (; seq
; seq
= PREV_INSN (seq
))
899 int uid
= INSN_UID (seq
);
901 log
= (GET_CODE (seq
) == CODE_LABEL
? LABEL_TO_ALIGNMENT (seq
) : 0);
902 uid_align
[uid
] = align_tab
[0];
905 /* Found an alignment label. */
906 uid_align
[uid
] = align_tab
[log
];
907 for (i
= log
- 1; i
>= 0; i
--)
911 #ifdef CASE_VECTOR_SHORTEN_MODE
914 /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum
917 int min_shuid
= INSN_SHUID (get_insns ()) - 1;
918 int max_shuid
= INSN_SHUID (get_last_insn ()) + 1;
921 for (insn
= first
; insn
!= 0; insn
= NEXT_INSN (insn
))
923 rtx min_lab
= NULL_RTX
, max_lab
= NULL_RTX
, pat
;
924 int len
, i
, min
, max
, insn_shuid
;
926 addr_diff_vec_flags flags
;
928 if (GET_CODE (insn
) != JUMP_INSN
929 || GET_CODE (PATTERN (insn
)) != ADDR_DIFF_VEC
)
931 pat
= PATTERN (insn
);
932 len
= XVECLEN (pat
, 1);
935 min_align
= MAX_CODE_ALIGN
;
936 for (min
= max_shuid
, max
= min_shuid
, i
= len
- 1; i
>= 0; i
--)
938 rtx lab
= XEXP (XVECEXP (pat
, 1, i
), 0);
939 int shuid
= INSN_SHUID (lab
);
950 if (min_align
> LABEL_TO_ALIGNMENT (lab
))
951 min_align
= LABEL_TO_ALIGNMENT (lab
);
953 XEXP (pat
, 2) = gen_rtx_LABEL_REF (VOIDmode
, min_lab
);
954 XEXP (pat
, 3) = gen_rtx_LABEL_REF (VOIDmode
, max_lab
);
955 insn_shuid
= INSN_SHUID (insn
);
956 rel
= INSN_SHUID (XEXP (XEXP (pat
, 0), 0));
957 flags
.min_align
= min_align
;
958 flags
.base_after_vec
= rel
> insn_shuid
;
959 flags
.min_after_vec
= min
> insn_shuid
;
960 flags
.max_after_vec
= max
> insn_shuid
;
961 flags
.min_after_base
= min
> rel
;
962 flags
.max_after_base
= max
> rel
;
963 ADDR_DIFF_VEC_FLAGS (pat
) = flags
;
966 #endif /* CASE_VECTOR_SHORTEN_MODE */
968 /* Compute initial lengths, addresses, and varying flags for each insn. */
969 for (insn_current_address
= 0, insn
= first
;
971 insn_current_address
+= insn_lengths
[uid
], insn
= NEXT_INSN (insn
))
973 uid
= INSN_UID (insn
);
975 insn_lengths
[uid
] = 0;
977 if (GET_CODE (insn
) == CODE_LABEL
)
979 int log
= LABEL_TO_ALIGNMENT (insn
);
982 int align
= 1 << log
;
983 int new_address
= (insn_current_address
+ align
- 1) & -align
;
984 insn_lengths
[uid
] = new_address
- insn_current_address
;
988 INSN_ADDRESSES (uid
) = insn_current_address
+ insn_lengths
[uid
];
990 if (GET_CODE (insn
) == NOTE
|| GET_CODE (insn
) == BARRIER
991 || GET_CODE (insn
) == CODE_LABEL
)
993 if (INSN_DELETED_P (insn
))
996 body
= PATTERN (insn
);
997 if (GET_CODE (body
) == ADDR_VEC
|| GET_CODE (body
) == ADDR_DIFF_VEC
)
999 /* This only takes room if read-only data goes into the text
1001 if (JUMP_TABLES_IN_TEXT_SECTION
|| !HAVE_READONLY_DATA_SECTION
)
1002 insn_lengths
[uid
] = (XVECLEN (body
,
1003 GET_CODE (body
) == ADDR_DIFF_VEC
)
1004 * GET_MODE_SIZE (GET_MODE (body
)));
1005 /* Alignment is handled by ADDR_VEC_ALIGN. */
1007 else if (GET_CODE (body
) == ASM_INPUT
|| asm_noperands (body
) >= 0)
1008 insn_lengths
[uid
] = asm_insn_count (body
) * insn_default_length (insn
);
1009 else if (GET_CODE (body
) == SEQUENCE
)
1012 int const_delay_slots
;
1014 const_delay_slots
= const_num_delay_slots (XVECEXP (body
, 0, 0));
1016 const_delay_slots
= 0;
1018 /* Inside a delay slot sequence, we do not do any branch shortening
1019 if the shortening could change the number of delay slots
1021 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
1023 rtx inner_insn
= XVECEXP (body
, 0, i
);
1024 int inner_uid
= INSN_UID (inner_insn
);
1027 if (GET_CODE (body
) == ASM_INPUT
1028 || asm_noperands (PATTERN (XVECEXP (body
, 0, i
))) >= 0)
1029 inner_length
= (asm_insn_count (PATTERN (inner_insn
))
1030 * insn_default_length (inner_insn
));
1032 inner_length
= insn_default_length (inner_insn
);
1034 insn_lengths
[inner_uid
] = inner_length
;
1035 if (const_delay_slots
)
1037 if ((varying_length
[inner_uid
]
1038 = insn_variable_length_p (inner_insn
)) != 0)
1039 varying_length
[uid
] = 1;
1040 INSN_ADDRESSES (inner_uid
) = (insn_current_address
1041 + insn_lengths
[uid
]);
1044 varying_length
[inner_uid
] = 0;
1045 insn_lengths
[uid
] += inner_length
;
1048 else if (GET_CODE (body
) != USE
&& GET_CODE (body
) != CLOBBER
)
1050 insn_lengths
[uid
] = insn_default_length (insn
);
1051 varying_length
[uid
] = insn_variable_length_p (insn
);
1054 /* If needed, do any adjustment. */
1055 #ifdef ADJUST_INSN_LENGTH
1056 ADJUST_INSN_LENGTH (insn
, insn_lengths
[uid
]);
1057 if (insn_lengths
[uid
] < 0)
1058 fatal_insn ("negative insn length", insn
);
1062 /* Now loop over all the insns finding varying length insns. For each,
1063 get the current insn length. If it has changed, reflect the change.
1064 When nothing changes for a full pass, we are done. */
1066 while (something_changed
)
1068 something_changed
= 0;
1069 insn_current_align
= MAX_CODE_ALIGN
- 1;
1070 for (insn_current_address
= 0, insn
= first
;
1072 insn
= NEXT_INSN (insn
))
1075 #ifdef ADJUST_INSN_LENGTH
1080 uid
= INSN_UID (insn
);
1082 if (GET_CODE (insn
) == CODE_LABEL
)
1084 int log
= LABEL_TO_ALIGNMENT (insn
);
1085 if (log
> insn_current_align
)
1087 int align
= 1 << log
;
1088 int new_address
= (insn_current_address
+ align
- 1) & -align
;
1089 insn_lengths
[uid
] = new_address
- insn_current_address
;
1090 insn_current_align
= log
;
1091 insn_current_address
= new_address
;
1094 insn_lengths
[uid
] = 0;
1095 INSN_ADDRESSES (uid
) = insn_current_address
;
1099 length_align
= INSN_LENGTH_ALIGNMENT (insn
);
1100 if (length_align
< insn_current_align
)
1101 insn_current_align
= length_align
;
1103 insn_last_address
= INSN_ADDRESSES (uid
);
1104 INSN_ADDRESSES (uid
) = insn_current_address
;
1106 #ifdef CASE_VECTOR_SHORTEN_MODE
1107 if (optimize
&& GET_CODE (insn
) == JUMP_INSN
1108 && GET_CODE (PATTERN (insn
)) == ADDR_DIFF_VEC
)
1110 rtx body
= PATTERN (insn
);
1111 int old_length
= insn_lengths
[uid
];
1112 rtx rel_lab
= XEXP (XEXP (body
, 0), 0);
1113 rtx min_lab
= XEXP (XEXP (body
, 2), 0);
1114 rtx max_lab
= XEXP (XEXP (body
, 3), 0);
1115 int rel_addr
= INSN_ADDRESSES (INSN_UID (rel_lab
));
1116 int min_addr
= INSN_ADDRESSES (INSN_UID (min_lab
));
1117 int max_addr
= INSN_ADDRESSES (INSN_UID (max_lab
));
1120 addr_diff_vec_flags flags
;
1122 /* Avoid automatic aggregate initialization. */
1123 flags
= ADDR_DIFF_VEC_FLAGS (body
);
1125 /* Try to find a known alignment for rel_lab. */
1126 for (prev
= rel_lab
;
1128 && ! insn_lengths
[INSN_UID (prev
)]
1129 && ! (varying_length
[INSN_UID (prev
)] & 1);
1130 prev
= PREV_INSN (prev
))
1131 if (varying_length
[INSN_UID (prev
)] & 2)
1133 rel_align
= LABEL_TO_ALIGNMENT (prev
);
1137 /* See the comment on addr_diff_vec_flags in rtl.h for the
1138 meaning of the flags values. base: REL_LAB vec: INSN */
1139 /* Anything after INSN has still addresses from the last
1140 pass; adjust these so that they reflect our current
1141 estimate for this pass. */
1142 if (flags
.base_after_vec
)
1143 rel_addr
+= insn_current_address
- insn_last_address
;
1144 if (flags
.min_after_vec
)
1145 min_addr
+= insn_current_address
- insn_last_address
;
1146 if (flags
.max_after_vec
)
1147 max_addr
+= insn_current_address
- insn_last_address
;
1148 /* We want to know the worst case, i.e. lowest possible value
1149 for the offset of MIN_LAB. If MIN_LAB is after REL_LAB,
1150 its offset is positive, and we have to be wary of code shrink;
1151 otherwise, it is negative, and we have to be vary of code
1153 if (flags
.min_after_base
)
1155 /* If INSN is between REL_LAB and MIN_LAB, the size
1156 changes we are about to make can change the alignment
1157 within the observed offset, therefore we have to break
1158 it up into two parts that are independent. */
1159 if (! flags
.base_after_vec
&& flags
.min_after_vec
)
1161 min_addr
-= align_fuzz (rel_lab
, insn
, rel_align
, 0);
1162 min_addr
-= align_fuzz (insn
, min_lab
, 0, 0);
1165 min_addr
-= align_fuzz (rel_lab
, min_lab
, rel_align
, 0);
1169 if (flags
.base_after_vec
&& ! flags
.min_after_vec
)
1171 min_addr
-= align_fuzz (min_lab
, insn
, 0, ~0);
1172 min_addr
-= align_fuzz (insn
, rel_lab
, 0, ~0);
1175 min_addr
-= align_fuzz (min_lab
, rel_lab
, 0, ~0);
1177 /* Likewise, determine the highest lowest possible value
1178 for the offset of MAX_LAB. */
1179 if (flags
.max_after_base
)
1181 if (! flags
.base_after_vec
&& flags
.max_after_vec
)
1183 max_addr
+= align_fuzz (rel_lab
, insn
, rel_align
, ~0);
1184 max_addr
+= align_fuzz (insn
, max_lab
, 0, ~0);
1187 max_addr
+= align_fuzz (rel_lab
, max_lab
, rel_align
, ~0);
1191 if (flags
.base_after_vec
&& ! flags
.max_after_vec
)
1193 max_addr
+= align_fuzz (max_lab
, insn
, 0, 0);
1194 max_addr
+= align_fuzz (insn
, rel_lab
, 0, 0);
1197 max_addr
+= align_fuzz (max_lab
, rel_lab
, 0, 0);
1199 PUT_MODE (body
, CASE_VECTOR_SHORTEN_MODE (min_addr
- rel_addr
,
1200 max_addr
- rel_addr
,
1202 if (JUMP_TABLES_IN_TEXT_SECTION
|| !HAVE_READONLY_DATA_SECTION
)
1205 = (XVECLEN (body
, 1) * GET_MODE_SIZE (GET_MODE (body
)));
1206 insn_current_address
+= insn_lengths
[uid
];
1207 if (insn_lengths
[uid
] != old_length
)
1208 something_changed
= 1;
1213 #endif /* CASE_VECTOR_SHORTEN_MODE */
1215 if (! (varying_length
[uid
]))
1217 if (GET_CODE (insn
) == INSN
1218 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
1222 body
= PATTERN (insn
);
1223 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
1225 rtx inner_insn
= XVECEXP (body
, 0, i
);
1226 int inner_uid
= INSN_UID (inner_insn
);
1228 INSN_ADDRESSES (inner_uid
) = insn_current_address
;
1230 insn_current_address
+= insn_lengths
[inner_uid
];
1234 insn_current_address
+= insn_lengths
[uid
];
1239 if (GET_CODE (insn
) == INSN
&& GET_CODE (PATTERN (insn
)) == SEQUENCE
)
1243 body
= PATTERN (insn
);
1245 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
1247 rtx inner_insn
= XVECEXP (body
, 0, i
);
1248 int inner_uid
= INSN_UID (inner_insn
);
1251 INSN_ADDRESSES (inner_uid
) = insn_current_address
;
1253 /* insn_current_length returns 0 for insns with a
1254 non-varying length. */
1255 if (! varying_length
[inner_uid
])
1256 inner_length
= insn_lengths
[inner_uid
];
1258 inner_length
= insn_current_length (inner_insn
);
1260 if (inner_length
!= insn_lengths
[inner_uid
])
1262 insn_lengths
[inner_uid
] = inner_length
;
1263 something_changed
= 1;
1265 insn_current_address
+= insn_lengths
[inner_uid
];
1266 new_length
+= inner_length
;
1271 new_length
= insn_current_length (insn
);
1272 insn_current_address
+= new_length
;
1275 #ifdef ADJUST_INSN_LENGTH
1276 /* If needed, do any adjustment. */
1277 tmp_length
= new_length
;
1278 ADJUST_INSN_LENGTH (insn
, new_length
);
1279 insn_current_address
+= (new_length
- tmp_length
);
1282 if (new_length
!= insn_lengths
[uid
])
1284 insn_lengths
[uid
] = new_length
;
1285 something_changed
= 1;
1288 /* For a non-optimizing compile, do only a single pass. */
1293 free (varying_length
);
1295 #endif /* HAVE_ATTR_length */
1298 #ifdef HAVE_ATTR_length
1299 /* Given the body of an INSN known to be generated by an ASM statement, return
1300 the number of machine instructions likely to be generated for this insn.
1301 This is used to compute its length. */
1304 asm_insn_count (rtx body
)
1306 const char *template;
1309 if (GET_CODE (body
) == ASM_INPUT
)
1310 template = XSTR (body
, 0);
1312 template = decode_asm_operands (body
, NULL
, NULL
, NULL
, NULL
);
1314 for (; *template; template++)
1315 if (IS_ASM_LOGICAL_LINE_SEPARATOR (*template) || *template == '\n')
1322 /* Output assembler code for the start of a function,
1323 and initialize some of the variables in this file
1324 for the new function. The label for the function and associated
1325 assembler pseudo-ops have already been output in `assemble_start_function'.
1327 FIRST is the first insn of the rtl for the function being compiled.
1328 FILE is the file to write assembler code to.
1329 OPTIMIZE is nonzero if we should eliminate redundant
1330 test and compare insns. */
1333 final_start_function (rtx first ATTRIBUTE_UNUSED
, FILE *file
,
1334 int optimize ATTRIBUTE_UNUSED
)
1338 this_is_asm_operands
= 0;
1340 last_filename
= locator_file (prologue_locator
);
1341 last_linenum
= locator_line (prologue_locator
);
1343 high_block_linenum
= high_function_linenum
= last_linenum
;
1345 (*debug_hooks
->begin_prologue
) (last_linenum
, last_filename
);
1347 #if defined (DWARF2_UNWIND_INFO) || defined (IA64_UNWIND_INFO)
1348 if (write_symbols
!= DWARF2_DEBUG
&& write_symbols
!= VMS_AND_DWARF2_DEBUG
)
1349 dwarf2out_begin_prologue (0, NULL
);
1352 #ifdef LEAF_REG_REMAP
1353 if (current_function_uses_only_leaf_regs
)
1354 leaf_renumber_regs (first
);
1357 /* The Sun386i and perhaps other machines don't work right
1358 if the profiling code comes after the prologue. */
1359 #ifdef PROFILE_BEFORE_PROLOGUE
1360 if (current_function_profile
)
1361 profile_function (file
);
1362 #endif /* PROFILE_BEFORE_PROLOGUE */
1364 #if defined (DWARF2_UNWIND_INFO) && defined (HAVE_prologue)
1365 if (dwarf2out_do_frame ())
1366 dwarf2out_frame_debug (NULL_RTX
);
1369 /* If debugging, assign block numbers to all of the blocks in this
1373 remove_unnecessary_notes ();
1374 reemit_insn_block_notes ();
1375 number_blocks (current_function_decl
);
1376 /* We never actually put out begin/end notes for the top-level
1377 block in the function. But, conceptually, that block is
1379 TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl
)) = 1;
1382 /* First output the function prologue: code to set up the stack frame. */
1383 targetm
.asm_out
.function_prologue (file
, get_frame_size ());
1385 /* If the machine represents the prologue as RTL, the profiling code must
1386 be emitted when NOTE_INSN_PROLOGUE_END is scanned. */
1387 #ifdef HAVE_prologue
1388 if (! HAVE_prologue
)
1390 profile_after_prologue (file
);
1394 profile_after_prologue (FILE *file ATTRIBUTE_UNUSED
)
1396 #ifndef PROFILE_BEFORE_PROLOGUE
1397 if (current_function_profile
)
1398 profile_function (file
);
1399 #endif /* not PROFILE_BEFORE_PROLOGUE */
1403 profile_function (FILE *file ATTRIBUTE_UNUSED
)
1405 #ifndef NO_PROFILE_COUNTERS
1406 # define NO_PROFILE_COUNTERS 0
1408 #if defined(ASM_OUTPUT_REG_PUSH)
1409 int sval
= current_function_returns_struct
;
1410 rtx svrtx
= targetm
.calls
.struct_value_rtx (TREE_TYPE (current_function_decl
), 1);
1411 #if defined(STATIC_CHAIN_INCOMING_REGNUM) || defined(STATIC_CHAIN_REGNUM)
1412 int cxt
= cfun
->static_chain_decl
!= NULL
;
1414 #endif /* ASM_OUTPUT_REG_PUSH */
1416 if (! NO_PROFILE_COUNTERS
)
1418 int align
= MIN (BIGGEST_ALIGNMENT
, LONG_TYPE_SIZE
);
1420 ASM_OUTPUT_ALIGN (file
, floor_log2 (align
/ BITS_PER_UNIT
));
1421 targetm
.asm_out
.internal_label (file
, "LP", current_function_funcdef_no
);
1422 assemble_integer (const0_rtx
, LONG_TYPE_SIZE
/ BITS_PER_UNIT
, align
, 1);
1425 function_section (current_function_decl
);
1427 #if defined(ASM_OUTPUT_REG_PUSH)
1428 if (sval
&& svrtx
!= NULL_RTX
&& GET_CODE (svrtx
) == REG
)
1429 ASM_OUTPUT_REG_PUSH (file
, REGNO (svrtx
));
1432 #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1434 ASM_OUTPUT_REG_PUSH (file
, STATIC_CHAIN_INCOMING_REGNUM
);
1436 #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1439 ASM_OUTPUT_REG_PUSH (file
, STATIC_CHAIN_REGNUM
);
1444 FUNCTION_PROFILER (file
, current_function_funcdef_no
);
1446 #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1448 ASM_OUTPUT_REG_POP (file
, STATIC_CHAIN_INCOMING_REGNUM
);
1450 #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1453 ASM_OUTPUT_REG_POP (file
, STATIC_CHAIN_REGNUM
);
1458 #if defined(ASM_OUTPUT_REG_PUSH)
1459 if (sval
&& svrtx
!= NULL_RTX
&& GET_CODE (svrtx
) == REG
)
1460 ASM_OUTPUT_REG_POP (file
, REGNO (svrtx
));
1464 /* Output assembler code for the end of a function.
1465 For clarity, args are same as those of `final_start_function'
1466 even though not all of them are needed. */
1469 final_end_function (void)
1473 (*debug_hooks
->end_function
) (high_function_linenum
);
1475 /* Finally, output the function epilogue:
1476 code to restore the stack frame and return to the caller. */
1477 targetm
.asm_out
.function_epilogue (asm_out_file
, get_frame_size ());
1479 /* And debug output. */
1480 (*debug_hooks
->end_epilogue
) (last_linenum
, last_filename
);
1482 #if defined (DWARF2_UNWIND_INFO)
1483 if (write_symbols
!= DWARF2_DEBUG
&& write_symbols
!= VMS_AND_DWARF2_DEBUG
1484 && dwarf2out_do_frame ())
1485 dwarf2out_end_epilogue (last_linenum
, last_filename
);
1489 /* Output assembler code for some insns: all or part of a function.
1490 For description of args, see `final_start_function', above.
1492 PRESCAN is 1 if we are not really outputting,
1493 just scanning as if we were outputting.
1494 Prescanning deletes and rearranges insns just like ordinary output.
1495 PRESCAN is -2 if we are outputting after having prescanned.
1496 In this case, don't try to delete or rearrange insns
1497 because that has already been done.
1498 Prescanning is done only on certain machines. */
1501 final (rtx first
, FILE *file
, int optimize
, int prescan
)
1507 last_ignored_compare
= 0;
1509 #ifdef SDB_DEBUGGING_INFO
1510 /* When producing SDB debugging info, delete troublesome line number
1511 notes from inlined functions in other files as well as duplicate
1512 line number notes. */
1513 if (write_symbols
== SDB_DEBUG
)
1516 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
1517 if (GET_CODE (insn
) == NOTE
&& NOTE_LINE_NUMBER (insn
) > 0)
1520 && NOTE_LINE_NUMBER (insn
) == NOTE_LINE_NUMBER (last
)
1521 && NOTE_SOURCE_FILE (insn
) == NOTE_SOURCE_FILE (last
))
1523 delete_insn (insn
); /* Use delete_note. */
1531 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
1533 if (INSN_UID (insn
) > max_uid
) /* Find largest UID. */
1534 max_uid
= INSN_UID (insn
);
1536 /* If CC tracking across branches is enabled, record the insn which
1537 jumps to each branch only reached from one place. */
1538 if (optimize
&& GET_CODE (insn
) == JUMP_INSN
)
1540 rtx lab
= JUMP_LABEL (insn
);
1541 if (lab
&& LABEL_NUSES (lab
) == 1)
1543 LABEL_REFS (lab
) = insn
;
1553 /* Output the insns. */
1554 for (insn
= NEXT_INSN (first
); insn
;)
1556 #ifdef HAVE_ATTR_length
1557 if ((unsigned) INSN_UID (insn
) >= INSN_ADDRESSES_SIZE ())
1559 /* This can be triggered by bugs elsewhere in the compiler if
1560 new insns are created after init_insn_lengths is called. */
1561 if (GET_CODE (insn
) == NOTE
)
1562 insn_current_address
= -1;
1567 insn_current_address
= INSN_ADDRESSES (INSN_UID (insn
));
1568 #endif /* HAVE_ATTR_length */
1570 insn
= final_scan_insn (insn
, file
, optimize
, prescan
, 0, &seen
);
1575 get_insn_template (int code
, rtx insn
)
1577 switch (insn_data
[code
].output_format
)
1579 case INSN_OUTPUT_FORMAT_SINGLE
:
1580 return insn_data
[code
].output
.single
;
1581 case INSN_OUTPUT_FORMAT_MULTI
:
1582 return insn_data
[code
].output
.multi
[which_alternative
];
1583 case INSN_OUTPUT_FORMAT_FUNCTION
:
1586 return (*insn_data
[code
].output
.function
) (recog_data
.operand
, insn
);
1593 /* Emit the appropriate declaration for an alternate-entry-point
1594 symbol represented by INSN, to FILE. INSN is a CODE_LABEL with
1595 LABEL_KIND != LABEL_NORMAL.
1597 The case fall-through in this function is intentional. */
1599 output_alternate_entry_point (FILE *file
, rtx insn
)
1601 const char *name
= LABEL_NAME (insn
);
1603 switch (LABEL_KIND (insn
))
1605 case LABEL_WEAK_ENTRY
:
1606 #ifdef ASM_WEAKEN_LABEL
1607 ASM_WEAKEN_LABEL (file
, name
);
1609 case LABEL_GLOBAL_ENTRY
:
1610 targetm
.asm_out
.globalize_label (file
, name
);
1611 case LABEL_STATIC_ENTRY
:
1612 #ifdef ASM_OUTPUT_TYPE_DIRECTIVE
1613 ASM_OUTPUT_TYPE_DIRECTIVE (file
, name
, "function");
1615 ASM_OUTPUT_LABEL (file
, name
);
1624 /* Return boolean indicating if there is a NOTE_INSN_UNLIKELY_EXECUTED_CODE
1625 note in the instruction chain (going forward) between the current
1626 instruction, and the next 'executable' instruction. */
1629 scan_ahead_for_unlikely_executed_note (rtx insn
)
1632 int bb_note_count
= 0;
1634 for (temp
= insn
; temp
; temp
= NEXT_INSN (temp
))
1636 if (GET_CODE (temp
) == NOTE
1637 && NOTE_LINE_NUMBER (temp
) == NOTE_INSN_UNLIKELY_EXECUTED_CODE
)
1639 if (GET_CODE (temp
) == NOTE
1640 && NOTE_LINE_NUMBER (temp
) == NOTE_INSN_BASIC_BLOCK
)
1643 if (bb_note_count
> 1)
1653 /* The final scan for one insn, INSN.
1654 Args are same as in `final', except that INSN
1655 is the insn being scanned.
1656 Value returned is the next insn to be scanned.
1658 NOPEEPHOLES is the flag to disallow peephole processing (currently
1659 used for within delayed branch sequence output).
1661 SEEN is used to track the end of the prologue, for emitting
1662 debug information. We force the emission of a line note after
1663 both NOTE_INSN_PROLOGUE_END and NOTE_INSN_FUNCTION_BEG, or
1664 at the beginning of the second basic block, whichever comes
1668 final_scan_insn (rtx insn
, FILE *file
, int optimize ATTRIBUTE_UNUSED
,
1669 int prescan
, int nopeepholes ATTRIBUTE_UNUSED
,
1678 /* Ignore deleted insns. These can occur when we split insns (due to a
1679 template of "#") while not optimizing. */
1680 if (INSN_DELETED_P (insn
))
1681 return NEXT_INSN (insn
);
1683 switch (GET_CODE (insn
))
1689 switch (NOTE_LINE_NUMBER (insn
))
1691 case NOTE_INSN_DELETED
:
1692 case NOTE_INSN_LOOP_BEG
:
1693 case NOTE_INSN_LOOP_END
:
1694 case NOTE_INSN_LOOP_END_TOP_COND
:
1695 case NOTE_INSN_LOOP_CONT
:
1696 case NOTE_INSN_LOOP_VTOP
:
1697 case NOTE_INSN_FUNCTION_END
:
1698 case NOTE_INSN_REPEATED_LINE_NUMBER
:
1699 case NOTE_INSN_EXPECTED_VALUE
:
1702 case NOTE_INSN_UNLIKELY_EXECUTED_CODE
:
1704 /* The presence of this note indicates that this basic block
1705 belongs in the "cold" section of the .o file. If we are
1706 not already writing to the cold section we need to change
1709 unlikely_text_section ();
1712 case NOTE_INSN_BASIC_BLOCK
:
1714 /* If we are performing the optimization that partitions
1715 basic blocks into hot & cold sections of the .o file,
1716 then at the start of each new basic block, before
1717 beginning to write code for the basic block, we need to
1718 check to see whether the basic block belongs in the hot
1719 or cold section of the .o file, and change the section we
1720 are writing to appropriately. */
1722 if (flag_reorder_blocks_and_partition
1723 && in_unlikely_text_section()
1724 && !scan_ahead_for_unlikely_executed_note (insn
))
1727 #ifdef IA64_UNWIND_INFO
1728 IA64_UNWIND_EMIT (asm_out_file
, insn
);
1731 fprintf (asm_out_file
, "\t%s basic block %d\n",
1732 ASM_COMMENT_START
, NOTE_BASIC_BLOCK (insn
)->index
);
1734 if ((*seen
& (SEEN_EMITTED
| SEEN_BB
)) == SEEN_BB
)
1736 *seen
|= SEEN_EMITTED
;
1737 last_filename
= NULL
;
1744 case NOTE_INSN_EH_REGION_BEG
:
1745 ASM_OUTPUT_DEBUG_LABEL (asm_out_file
, "LEHB",
1746 NOTE_EH_HANDLER (insn
));
1749 case NOTE_INSN_EH_REGION_END
:
1750 ASM_OUTPUT_DEBUG_LABEL (asm_out_file
, "LEHE",
1751 NOTE_EH_HANDLER (insn
));
1754 case NOTE_INSN_PROLOGUE_END
:
1755 targetm
.asm_out
.function_end_prologue (file
);
1756 profile_after_prologue (file
);
1758 if ((*seen
& (SEEN_EMITTED
| SEEN_NOTE
)) == SEEN_NOTE
)
1760 *seen
|= SEEN_EMITTED
;
1761 last_filename
= NULL
;
1768 case NOTE_INSN_EPILOGUE_BEG
:
1769 targetm
.asm_out
.function_begin_epilogue (file
);
1772 case NOTE_INSN_FUNCTION_BEG
:
1774 (*debug_hooks
->end_prologue
) (last_linenum
, last_filename
);
1776 if ((*seen
& (SEEN_EMITTED
| SEEN_NOTE
)) == SEEN_NOTE
)
1778 *seen
|= SEEN_EMITTED
;
1779 last_filename
= NULL
;
1786 case NOTE_INSN_BLOCK_BEG
:
1787 if (debug_info_level
== DINFO_LEVEL_NORMAL
1788 || debug_info_level
== DINFO_LEVEL_VERBOSE
1789 || write_symbols
== DWARF_DEBUG
1790 || write_symbols
== DWARF2_DEBUG
1791 || write_symbols
== VMS_AND_DWARF2_DEBUG
1792 || write_symbols
== VMS_DEBUG
)
1794 int n
= BLOCK_NUMBER (NOTE_BLOCK (insn
));
1798 high_block_linenum
= last_linenum
;
1800 /* Output debugging info about the symbol-block beginning. */
1801 (*debug_hooks
->begin_block
) (last_linenum
, n
);
1803 /* Mark this block as output. */
1804 TREE_ASM_WRITTEN (NOTE_BLOCK (insn
)) = 1;
1808 case NOTE_INSN_BLOCK_END
:
1809 if (debug_info_level
== DINFO_LEVEL_NORMAL
1810 || debug_info_level
== DINFO_LEVEL_VERBOSE
1811 || write_symbols
== DWARF_DEBUG
1812 || write_symbols
== DWARF2_DEBUG
1813 || write_symbols
== VMS_AND_DWARF2_DEBUG
1814 || write_symbols
== VMS_DEBUG
)
1816 int n
= BLOCK_NUMBER (NOTE_BLOCK (insn
));
1820 /* End of a symbol-block. */
1822 if (block_depth
< 0)
1825 (*debug_hooks
->end_block
) (high_block_linenum
, n
);
1829 case NOTE_INSN_DELETED_LABEL
:
1830 /* Emit the label. We may have deleted the CODE_LABEL because
1831 the label could be proved to be unreachable, though still
1832 referenced (in the form of having its address taken. */
1833 ASM_OUTPUT_DEBUG_LABEL (file
, "L", CODE_LABEL_NUMBER (insn
));
1836 case NOTE_INSN_VAR_LOCATION
:
1837 (*debug_hooks
->var_location
) (insn
);
1844 if (NOTE_LINE_NUMBER (insn
) <= 0)
1851 #if defined (DWARF2_UNWIND_INFO)
1852 if (dwarf2out_do_frame ())
1853 dwarf2out_frame_debug (insn
);
1858 /* The target port might emit labels in the output function for
1859 some insn, e.g. sh.c output_branchy_insn. */
1860 if (CODE_LABEL_NUMBER (insn
) <= max_labelno
)
1862 int align
= LABEL_TO_ALIGNMENT (insn
);
1863 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
1864 int max_skip
= LABEL_TO_MAX_SKIP (insn
);
1867 if (align
&& NEXT_INSN (insn
))
1869 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
1870 ASM_OUTPUT_MAX_SKIP_ALIGN (file
, align
, max_skip
);
1872 #ifdef ASM_OUTPUT_ALIGN_WITH_NOP
1873 ASM_OUTPUT_ALIGN_WITH_NOP (file
, align
);
1875 ASM_OUTPUT_ALIGN (file
, align
);
1882 /* If this label is reached from only one place, set the condition
1883 codes from the instruction just before the branch. */
1885 /* Disabled because some insns set cc_status in the C output code
1886 and NOTICE_UPDATE_CC alone can set incorrect status. */
1887 if (0 /* optimize && LABEL_NUSES (insn) == 1*/)
1889 rtx jump
= LABEL_REFS (insn
);
1890 rtx barrier
= prev_nonnote_insn (insn
);
1892 /* If the LABEL_REFS field of this label has been set to point
1893 at a branch, the predecessor of the branch is a regular
1894 insn, and that branch is the only way to reach this label,
1895 set the condition codes based on the branch and its
1897 if (barrier
&& GET_CODE (barrier
) == BARRIER
1898 && jump
&& GET_CODE (jump
) == JUMP_INSN
1899 && (prev
= prev_nonnote_insn (jump
))
1900 && GET_CODE (prev
) == INSN
)
1902 NOTICE_UPDATE_CC (PATTERN (prev
), prev
);
1903 NOTICE_UPDATE_CC (PATTERN (jump
), jump
);
1910 if (LABEL_NAME (insn
))
1911 (*debug_hooks
->label
) (insn
);
1913 /* If we are doing the optimization that partitions hot & cold
1914 basic blocks into separate sections of the .o file, we need
1915 to ensure the jump table ends up in the correct section... */
1917 if (flag_reorder_blocks_and_partition
)
1919 rtx tmp_table
, tmp_label
;
1920 if (GET_CODE (insn
) == CODE_LABEL
1921 && tablejump_p (NEXT_INSN (insn
), &tmp_label
, &tmp_table
))
1923 /* Do nothing; Do NOT change the current section. */
1925 else if (scan_ahead_for_unlikely_executed_note (insn
))
1926 unlikely_text_section ();
1929 if (in_unlikely_text_section ())
1936 fputs (ASM_APP_OFF
, file
);
1939 if (NEXT_INSN (insn
) != 0
1940 && GET_CODE (NEXT_INSN (insn
)) == JUMP_INSN
)
1942 rtx nextbody
= PATTERN (NEXT_INSN (insn
));
1944 /* If this label is followed by a jump-table,
1945 make sure we put the label in the read-only section. Also
1946 possibly write the label and jump table together. */
1948 if (GET_CODE (nextbody
) == ADDR_VEC
1949 || GET_CODE (nextbody
) == ADDR_DIFF_VEC
)
1951 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
1952 /* In this case, the case vector is being moved by the
1953 target, so don't output the label at all. Leave that
1954 to the back end macros. */
1956 if (! JUMP_TABLES_IN_TEXT_SECTION
)
1960 readonly_data_section ();
1962 #ifdef ADDR_VEC_ALIGN
1963 log_align
= ADDR_VEC_ALIGN (NEXT_INSN (insn
));
1965 log_align
= exact_log2 (BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
);
1967 ASM_OUTPUT_ALIGN (file
, log_align
);
1970 function_section (current_function_decl
);
1972 #ifdef ASM_OUTPUT_CASE_LABEL
1973 ASM_OUTPUT_CASE_LABEL (file
, "L", CODE_LABEL_NUMBER (insn
),
1976 targetm
.asm_out
.internal_label (file
, "L", CODE_LABEL_NUMBER (insn
));
1982 if (LABEL_ALT_ENTRY_P (insn
))
1983 output_alternate_entry_point (file
, insn
);
1985 targetm
.asm_out
.internal_label (file
, "L", CODE_LABEL_NUMBER (insn
));
1990 rtx body
= PATTERN (insn
);
1991 int insn_code_number
;
1992 const char *template;
1995 /* An INSN, JUMP_INSN or CALL_INSN.
1996 First check for special kinds that recog doesn't recognize. */
1998 if (GET_CODE (body
) == USE
/* These are just declarations. */
1999 || GET_CODE (body
) == CLOBBER
)
2003 /* If there is a REG_CC_SETTER note on this insn, it means that
2004 the setting of the condition code was done in the delay slot
2005 of the insn that branched here. So recover the cc status
2006 from the insn that set it. */
2008 note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
2011 NOTICE_UPDATE_CC (PATTERN (XEXP (note
, 0)), XEXP (note
, 0));
2012 cc_prev_status
= cc_status
;
2016 /* Detect insns that are really jump-tables
2017 and output them as such. */
2019 if (GET_CODE (body
) == ADDR_VEC
|| GET_CODE (body
) == ADDR_DIFF_VEC
)
2021 #if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC))
2030 fputs (ASM_APP_OFF
, file
);
2034 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2035 if (GET_CODE (body
) == ADDR_VEC
)
2037 #ifdef ASM_OUTPUT_ADDR_VEC
2038 ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn
), body
);
2045 #ifdef ASM_OUTPUT_ADDR_DIFF_VEC
2046 ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn
), body
);
2052 vlen
= XVECLEN (body
, GET_CODE (body
) == ADDR_DIFF_VEC
);
2053 for (idx
= 0; idx
< vlen
; idx
++)
2055 if (GET_CODE (body
) == ADDR_VEC
)
2057 #ifdef ASM_OUTPUT_ADDR_VEC_ELT
2058 ASM_OUTPUT_ADDR_VEC_ELT
2059 (file
, CODE_LABEL_NUMBER (XEXP (XVECEXP (body
, 0, idx
), 0)));
2066 #ifdef ASM_OUTPUT_ADDR_DIFF_ELT
2067 ASM_OUTPUT_ADDR_DIFF_ELT
2070 CODE_LABEL_NUMBER (XEXP (XVECEXP (body
, 1, idx
), 0)),
2071 CODE_LABEL_NUMBER (XEXP (XEXP (body
, 0), 0)));
2077 #ifdef ASM_OUTPUT_CASE_END
2078 ASM_OUTPUT_CASE_END (file
,
2079 CODE_LABEL_NUMBER (PREV_INSN (insn
)),
2084 function_section (current_function_decl
);
2088 /* Output this line note if it is the first or the last line
2090 if (notice_source_line (insn
))
2092 (*debug_hooks
->source_line
) (last_linenum
, last_filename
);
2095 if (GET_CODE (body
) == ASM_INPUT
)
2097 const char *string
= XSTR (body
, 0);
2099 /* There's no telling what that did to the condition codes. */
2108 fputs (ASM_APP_ON
, file
);
2111 fprintf (asm_out_file
, "\t%s\n", string
);
2116 /* Detect `asm' construct with operands. */
2117 if (asm_noperands (body
) >= 0)
2119 unsigned int noperands
= asm_noperands (body
);
2120 rtx
*ops
= alloca (noperands
* sizeof (rtx
));
2123 /* There's no telling what that did to the condition codes. */
2128 /* Get out the operand values. */
2129 string
= decode_asm_operands (body
, ops
, NULL
, NULL
, NULL
);
2130 /* Inhibit aborts on what would otherwise be compiler bugs. */
2131 insn_noperands
= noperands
;
2132 this_is_asm_operands
= insn
;
2134 #ifdef FINAL_PRESCAN_INSN
2135 FINAL_PRESCAN_INSN (insn
, ops
, insn_noperands
);
2138 /* Output the insn using them. */
2143 fputs (ASM_APP_ON
, file
);
2146 output_asm_insn (string
, ops
);
2149 this_is_asm_operands
= 0;
2153 if (prescan
<= 0 && app_on
)
2155 fputs (ASM_APP_OFF
, file
);
2159 if (GET_CODE (body
) == SEQUENCE
)
2161 /* A delayed-branch sequence */
2167 final_sequence
= body
;
2169 /* Record the delay slots' frame information before the branch.
2170 This is needed for delayed calls: see execute_cfa_program(). */
2171 #if defined (DWARF2_UNWIND_INFO)
2172 if (dwarf2out_do_frame ())
2173 for (i
= 1; i
< XVECLEN (body
, 0); i
++)
2174 dwarf2out_frame_debug (XVECEXP (body
, 0, i
));
2177 /* The first insn in this SEQUENCE might be a JUMP_INSN that will
2178 force the restoration of a comparison that was previously
2179 thought unnecessary. If that happens, cancel this sequence
2180 and cause that insn to be restored. */
2182 next
= final_scan_insn (XVECEXP (body
, 0, 0), file
, 0, prescan
, 1, seen
);
2183 if (next
!= XVECEXP (body
, 0, 1))
2189 for (i
= 1; i
< XVECLEN (body
, 0); i
++)
2191 rtx insn
= XVECEXP (body
, 0, i
);
2192 rtx next
= NEXT_INSN (insn
);
2193 /* We loop in case any instruction in a delay slot gets
2196 insn
= final_scan_insn (insn
, file
, 0, prescan
, 1, seen
);
2197 while (insn
!= next
);
2199 #ifdef DBR_OUTPUT_SEQEND
2200 DBR_OUTPUT_SEQEND (file
);
2204 /* If the insn requiring the delay slot was a CALL_INSN, the
2205 insns in the delay slot are actually executed before the
2206 called function. Hence we don't preserve any CC-setting
2207 actions in these insns and the CC must be marked as being
2208 clobbered by the function. */
2209 if (GET_CODE (XVECEXP (body
, 0, 0)) == CALL_INSN
)
2216 /* We have a real machine instruction as rtl. */
2218 body
= PATTERN (insn
);
2221 set
= single_set (insn
);
2223 /* Check for redundant test and compare instructions
2224 (when the condition codes are already set up as desired).
2225 This is done only when optimizing; if not optimizing,
2226 it should be possible for the user to alter a variable
2227 with the debugger in between statements
2228 and the next statement should reexamine the variable
2229 to compute the condition codes. */
2234 && GET_CODE (SET_DEST (set
)) == CC0
2235 && insn
!= last_ignored_compare
)
2237 if (GET_CODE (SET_SRC (set
)) == SUBREG
)
2238 SET_SRC (set
) = alter_subreg (&SET_SRC (set
));
2239 else if (GET_CODE (SET_SRC (set
)) == COMPARE
)
2241 if (GET_CODE (XEXP (SET_SRC (set
), 0)) == SUBREG
)
2242 XEXP (SET_SRC (set
), 0)
2243 = alter_subreg (&XEXP (SET_SRC (set
), 0));
2244 if (GET_CODE (XEXP (SET_SRC (set
), 1)) == SUBREG
)
2245 XEXP (SET_SRC (set
), 1)
2246 = alter_subreg (&XEXP (SET_SRC (set
), 1));
2248 if ((cc_status
.value1
!= 0
2249 && rtx_equal_p (SET_SRC (set
), cc_status
.value1
))
2250 || (cc_status
.value2
!= 0
2251 && rtx_equal_p (SET_SRC (set
), cc_status
.value2
)))
2253 /* Don't delete insn if it has an addressing side-effect. */
2254 if (! FIND_REG_INC_NOTE (insn
, NULL_RTX
)
2255 /* or if anything in it is volatile. */
2256 && ! volatile_refs_p (PATTERN (insn
)))
2258 /* We don't really delete the insn; just ignore it. */
2259 last_ignored_compare
= insn
;
2268 /* Don't bother outputting obvious no-ops, even without -O.
2269 This optimization is fast and doesn't interfere with debugging.
2270 Don't do this if the insn is in a delay slot, since this
2271 will cause an improper number of delay insns to be written. */
2272 if (final_sequence
== 0
2274 && GET_CODE (insn
) == INSN
&& GET_CODE (body
) == SET
2275 && GET_CODE (SET_SRC (body
)) == REG
2276 && GET_CODE (SET_DEST (body
)) == REG
2277 && REGNO (SET_SRC (body
)) == REGNO (SET_DEST (body
)))
2282 /* If this is a conditional branch, maybe modify it
2283 if the cc's are in a nonstandard state
2284 so that it accomplishes the same thing that it would
2285 do straightforwardly if the cc's were set up normally. */
2287 if (cc_status
.flags
!= 0
2288 && GET_CODE (insn
) == JUMP_INSN
2289 && GET_CODE (body
) == SET
2290 && SET_DEST (body
) == pc_rtx
2291 && GET_CODE (SET_SRC (body
)) == IF_THEN_ELSE
2292 && COMPARISON_P (XEXP (SET_SRC (body
), 0))
2293 && XEXP (XEXP (SET_SRC (body
), 0), 0) == cc0_rtx
2294 /* This is done during prescan; it is not done again
2295 in final scan when prescan has been done. */
2298 /* This function may alter the contents of its argument
2299 and clear some of the cc_status.flags bits.
2300 It may also return 1 meaning condition now always true
2301 or -1 meaning condition now always false
2302 or 2 meaning condition nontrivial but altered. */
2303 int result
= alter_cond (XEXP (SET_SRC (body
), 0));
2304 /* If condition now has fixed value, replace the IF_THEN_ELSE
2305 with its then-operand or its else-operand. */
2307 SET_SRC (body
) = XEXP (SET_SRC (body
), 1);
2309 SET_SRC (body
) = XEXP (SET_SRC (body
), 2);
2311 /* The jump is now either unconditional or a no-op.
2312 If it has become a no-op, don't try to output it.
2313 (It would not be recognized.) */
2314 if (SET_SRC (body
) == pc_rtx
)
2319 else if (GET_CODE (SET_SRC (body
)) == RETURN
)
2320 /* Replace (set (pc) (return)) with (return). */
2321 PATTERN (insn
) = body
= SET_SRC (body
);
2323 /* Rerecognize the instruction if it has changed. */
2325 INSN_CODE (insn
) = -1;
2328 /* Make same adjustments to instructions that examine the
2329 condition codes without jumping and instructions that
2330 handle conditional moves (if this machine has either one). */
2332 if (cc_status
.flags
!= 0
2335 rtx cond_rtx
, then_rtx
, else_rtx
;
2337 if (GET_CODE (insn
) != JUMP_INSN
2338 && GET_CODE (SET_SRC (set
)) == IF_THEN_ELSE
)
2340 cond_rtx
= XEXP (SET_SRC (set
), 0);
2341 then_rtx
= XEXP (SET_SRC (set
), 1);
2342 else_rtx
= XEXP (SET_SRC (set
), 2);
2346 cond_rtx
= SET_SRC (set
);
2347 then_rtx
= const_true_rtx
;
2348 else_rtx
= const0_rtx
;
2351 switch (GET_CODE (cond_rtx
))
2365 if (XEXP (cond_rtx
, 0) != cc0_rtx
)
2367 result
= alter_cond (cond_rtx
);
2369 validate_change (insn
, &SET_SRC (set
), then_rtx
, 0);
2370 else if (result
== -1)
2371 validate_change (insn
, &SET_SRC (set
), else_rtx
, 0);
2372 else if (result
== 2)
2373 INSN_CODE (insn
) = -1;
2374 if (SET_DEST (set
) == SET_SRC (set
))
2386 #ifdef HAVE_peephole
2387 /* Do machine-specific peephole optimizations if desired. */
2389 if (optimize
&& !flag_no_peephole
&& !nopeepholes
)
2391 rtx next
= peephole (insn
);
2392 /* When peepholing, if there were notes within the peephole,
2393 emit them before the peephole. */
2394 if (next
!= 0 && next
!= NEXT_INSN (insn
))
2396 rtx prev
= PREV_INSN (insn
);
2398 for (note
= NEXT_INSN (insn
); note
!= next
;
2399 note
= NEXT_INSN (note
))
2400 final_scan_insn (note
, file
, optimize
, prescan
, nopeepholes
, seen
);
2402 /* In case this is prescan, put the notes
2403 in proper position for later rescan. */
2404 note
= NEXT_INSN (insn
);
2405 PREV_INSN (note
) = prev
;
2406 NEXT_INSN (prev
) = note
;
2407 NEXT_INSN (PREV_INSN (next
)) = insn
;
2408 PREV_INSN (insn
) = PREV_INSN (next
);
2409 NEXT_INSN (insn
) = next
;
2410 PREV_INSN (next
) = insn
;
2413 /* PEEPHOLE might have changed this. */
2414 body
= PATTERN (insn
);
2418 /* Try to recognize the instruction.
2419 If successful, verify that the operands satisfy the
2420 constraints for the instruction. Crash if they don't,
2421 since `reload' should have changed them so that they do. */
2423 insn_code_number
= recog_memoized (insn
);
2424 cleanup_subreg_operands (insn
);
2426 /* Dump the insn in the assembly for debugging. */
2427 if (flag_dump_rtl_in_asm
)
2429 print_rtx_head
= ASM_COMMENT_START
;
2430 print_rtl_single (asm_out_file
, insn
);
2431 print_rtx_head
= "";
2434 if (! constrain_operands_cached (1))
2435 fatal_insn_not_found (insn
);
2437 /* Some target machines need to prescan each insn before
2440 #ifdef FINAL_PRESCAN_INSN
2441 FINAL_PRESCAN_INSN (insn
, recog_data
.operand
, recog_data
.n_operands
);
2444 #ifdef HAVE_conditional_execution
2445 if (GET_CODE (PATTERN (insn
)) == COND_EXEC
)
2446 current_insn_predicate
= COND_EXEC_TEST (PATTERN (insn
));
2448 current_insn_predicate
= NULL_RTX
;
2452 cc_prev_status
= cc_status
;
2454 /* Update `cc_status' for this instruction.
2455 The instruction's output routine may change it further.
2456 If the output routine for a jump insn needs to depend
2457 on the cc status, it should look at cc_prev_status. */
2459 NOTICE_UPDATE_CC (body
, insn
);
2462 current_output_insn
= debug_insn
= insn
;
2464 #if defined (DWARF2_UNWIND_INFO)
2465 if (GET_CODE (insn
) == CALL_INSN
&& dwarf2out_do_frame ())
2466 dwarf2out_frame_debug (insn
);
2469 /* Find the proper template for this insn. */
2470 template = get_insn_template (insn_code_number
, insn
);
2472 /* If the C code returns 0, it means that it is a jump insn
2473 which follows a deleted test insn, and that test insn
2474 needs to be reinserted. */
2479 if (prev_nonnote_insn (insn
) != last_ignored_compare
)
2482 /* We have already processed the notes between the setter and
2483 the user. Make sure we don't process them again, this is
2484 particularly important if one of the notes is a block
2485 scope note or an EH note. */
2487 prev
!= last_ignored_compare
;
2488 prev
= PREV_INSN (prev
))
2490 if (GET_CODE (prev
) == NOTE
)
2491 delete_insn (prev
); /* Use delete_note. */
2497 /* If the template is the string "#", it means that this insn must
2499 if (template[0] == '#' && template[1] == '\0')
2501 rtx
new = try_split (body
, insn
, 0);
2503 /* If we didn't split the insn, go away. */
2504 if (new == insn
&& PATTERN (new) == body
)
2505 fatal_insn ("could not split insn", insn
);
2507 #ifdef HAVE_ATTR_length
2508 /* This instruction should have been split in shorten_branches,
2509 to ensure that we would have valid length info for the
2520 #ifdef IA64_UNWIND_INFO
2521 IA64_UNWIND_EMIT (asm_out_file
, insn
);
2523 /* Output assembler code from the template. */
2525 output_asm_insn (template, recog_data
.operand
);
2527 /* If necessary, report the effect that the instruction has on
2528 the unwind info. We've already done this for delay slots
2529 and call instructions. */
2530 #if defined (DWARF2_UNWIND_INFO)
2531 if (GET_CODE (insn
) == INSN
2532 #if !defined (HAVE_prologue)
2533 && !ACCUMULATE_OUTGOING_ARGS
2535 && final_sequence
== 0
2536 && dwarf2out_do_frame ())
2537 dwarf2out_frame_debug (insn
);
2541 /* It's not at all clear why we did this and doing so used to
2542 interfere with tests that used REG_WAS_0 notes, which are
2543 now gone, so let's try with this out. */
2545 /* Mark this insn as having been output. */
2546 INSN_DELETED_P (insn
) = 1;
2549 /* Emit information for vtable gc. */
2550 note
= find_reg_note (insn
, REG_VTABLE_REF
, NULL_RTX
);
2552 current_output_insn
= debug_insn
= 0;
2555 return NEXT_INSN (insn
);
2558 /* Output debugging info to the assembler file FILE
2559 based on the NOTE-insn INSN, assumed to be a line number. */
2562 notice_source_line (rtx insn
)
2564 const char *filename
= insn_file (insn
);
2565 int linenum
= insn_line (insn
);
2567 if (filename
&& (filename
!= last_filename
|| last_linenum
!= linenum
))
2569 last_filename
= filename
;
2570 last_linenum
= linenum
;
2571 high_block_linenum
= MAX (last_linenum
, high_block_linenum
);
2572 high_function_linenum
= MAX (last_linenum
, high_function_linenum
);
2578 /* For each operand in INSN, simplify (subreg (reg)) so that it refers
2579 directly to the desired hard register. */
2582 cleanup_subreg_operands (rtx insn
)
2585 extract_insn_cached (insn
);
2586 for (i
= 0; i
< recog_data
.n_operands
; i
++)
2588 /* The following test cannot use recog_data.operand when testing
2589 for a SUBREG: the underlying object might have been changed
2590 already if we are inside a match_operator expression that
2591 matches the else clause. Instead we test the underlying
2592 expression directly. */
2593 if (GET_CODE (*recog_data
.operand_loc
[i
]) == SUBREG
)
2594 recog_data
.operand
[i
] = alter_subreg (recog_data
.operand_loc
[i
]);
2595 else if (GET_CODE (recog_data
.operand
[i
]) == PLUS
2596 || GET_CODE (recog_data
.operand
[i
]) == MULT
2597 || GET_CODE (recog_data
.operand
[i
]) == MEM
)
2598 recog_data
.operand
[i
] = walk_alter_subreg (recog_data
.operand_loc
[i
]);
2601 for (i
= 0; i
< recog_data
.n_dups
; i
++)
2603 if (GET_CODE (*recog_data
.dup_loc
[i
]) == SUBREG
)
2604 *recog_data
.dup_loc
[i
] = alter_subreg (recog_data
.dup_loc
[i
]);
2605 else if (GET_CODE (*recog_data
.dup_loc
[i
]) == PLUS
2606 || GET_CODE (*recog_data
.dup_loc
[i
]) == MULT
2607 || GET_CODE (*recog_data
.dup_loc
[i
]) == MEM
)
2608 *recog_data
.dup_loc
[i
] = walk_alter_subreg (recog_data
.dup_loc
[i
]);
2612 /* If X is a SUBREG, replace it with a REG or a MEM,
2613 based on the thing it is a subreg of. */
2616 alter_subreg (rtx
*xp
)
2619 rtx y
= SUBREG_REG (x
);
2621 /* simplify_subreg does not remove subreg from volatile references.
2622 We are required to. */
2623 if (GET_CODE (y
) == MEM
)
2624 *xp
= adjust_address (y
, GET_MODE (x
), SUBREG_BYTE (x
));
2627 rtx
new = simplify_subreg (GET_MODE (x
), y
, GET_MODE (y
),
2632 /* Simplify_subreg can't handle some REG cases, but we have to. */
2633 else if (GET_CODE (y
) == REG
)
2635 unsigned int regno
= subreg_hard_regno (x
, 1);
2636 *xp
= gen_rtx_REG_offset (y
, GET_MODE (x
), regno
, SUBREG_BYTE (x
));
2645 /* Do alter_subreg on all the SUBREGs contained in X. */
2648 walk_alter_subreg (rtx
*xp
)
2651 switch (GET_CODE (x
))
2655 XEXP (x
, 0) = walk_alter_subreg (&XEXP (x
, 0));
2656 XEXP (x
, 1) = walk_alter_subreg (&XEXP (x
, 1));
2660 XEXP (x
, 0) = walk_alter_subreg (&XEXP (x
, 0));
2664 return alter_subreg (xp
);
2675 /* Given BODY, the body of a jump instruction, alter the jump condition
2676 as required by the bits that are set in cc_status.flags.
2677 Not all of the bits there can be handled at this level in all cases.
2679 The value is normally 0.
2680 1 means that the condition has become always true.
2681 -1 means that the condition has become always false.
2682 2 means that COND has been altered. */
2685 alter_cond (rtx cond
)
2689 if (cc_status
.flags
& CC_REVERSED
)
2692 PUT_CODE (cond
, swap_condition (GET_CODE (cond
)));
2695 if (cc_status
.flags
& CC_INVERTED
)
2698 PUT_CODE (cond
, reverse_condition (GET_CODE (cond
)));
2701 if (cc_status
.flags
& CC_NOT_POSITIVE
)
2702 switch (GET_CODE (cond
))
2707 /* Jump becomes unconditional. */
2713 /* Jump becomes no-op. */
2717 PUT_CODE (cond
, EQ
);
2722 PUT_CODE (cond
, NE
);
2730 if (cc_status
.flags
& CC_NOT_NEGATIVE
)
2731 switch (GET_CODE (cond
))
2735 /* Jump becomes unconditional. */
2740 /* Jump becomes no-op. */
2745 PUT_CODE (cond
, EQ
);
2751 PUT_CODE (cond
, NE
);
2759 if (cc_status
.flags
& CC_NO_OVERFLOW
)
2760 switch (GET_CODE (cond
))
2763 /* Jump becomes unconditional. */
2767 PUT_CODE (cond
, EQ
);
2772 PUT_CODE (cond
, NE
);
2777 /* Jump becomes no-op. */
2784 if (cc_status
.flags
& (CC_Z_IN_NOT_N
| CC_Z_IN_N
))
2785 switch (GET_CODE (cond
))
2791 PUT_CODE (cond
, cc_status
.flags
& CC_Z_IN_N
? GE
: LT
);
2796 PUT_CODE (cond
, cc_status
.flags
& CC_Z_IN_N
? LT
: GE
);
2801 if (cc_status
.flags
& CC_NOT_SIGNED
)
2802 /* The flags are valid if signed condition operators are converted
2804 switch (GET_CODE (cond
))
2807 PUT_CODE (cond
, LEU
);
2812 PUT_CODE (cond
, LTU
);
2817 PUT_CODE (cond
, GTU
);
2822 PUT_CODE (cond
, GEU
);
2834 /* Report inconsistency between the assembler template and the operands.
2835 In an `asm', it's the user's fault; otherwise, the compiler's fault. */
2838 output_operand_lossage (const char *msgid
, ...)
2842 const char *pfx_str
;
2845 va_start (ap
, msgid
);
2847 pfx_str
= this_is_asm_operands
? _("invalid `asm': ") : "output_operand: ";
2848 asprintf (&fmt_string
, "%s%s", pfx_str
, _(msgid
));
2849 vasprintf (&new_message
, fmt_string
, ap
);
2851 if (this_is_asm_operands
)
2852 error_for_asm (this_is_asm_operands
, "%s", new_message
);
2854 internal_error ("%s", new_message
);
2861 /* Output of assembler code from a template, and its subroutines. */
2863 /* Annotate the assembly with a comment describing the pattern and
2864 alternative used. */
2867 output_asm_name (void)
2871 int num
= INSN_CODE (debug_insn
);
2872 fprintf (asm_out_file
, "\t%s %d\t%s",
2873 ASM_COMMENT_START
, INSN_UID (debug_insn
),
2874 insn_data
[num
].name
);
2875 if (insn_data
[num
].n_alternatives
> 1)
2876 fprintf (asm_out_file
, "/%d", which_alternative
+ 1);
2877 #ifdef HAVE_ATTR_length
2878 fprintf (asm_out_file
, "\t[length = %d]",
2879 get_attr_length (debug_insn
));
2881 /* Clear this so only the first assembler insn
2882 of any rtl insn will get the special comment for -dp. */
2887 /* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it
2888 or its address, return that expr . Set *PADDRESSP to 1 if the expr
2889 corresponds to the address of the object and 0 if to the object. */
2892 get_mem_expr_from_op (rtx op
, int *paddressp
)
2899 if (GET_CODE (op
) == REG
)
2900 return REG_EXPR (op
);
2901 else if (GET_CODE (op
) != MEM
)
2904 if (MEM_EXPR (op
) != 0)
2905 return MEM_EXPR (op
);
2907 /* Otherwise we have an address, so indicate it and look at the address. */
2911 /* First check if we have a decl for the address, then look at the right side
2912 if it is a PLUS. Otherwise, strip off arithmetic and keep looking.
2913 But don't allow the address to itself be indirect. */
2914 if ((expr
= get_mem_expr_from_op (op
, &inner_addressp
)) && ! inner_addressp
)
2916 else if (GET_CODE (op
) == PLUS
2917 && (expr
= get_mem_expr_from_op (XEXP (op
, 1), &inner_addressp
)))
2920 while (GET_RTX_CLASS (GET_CODE (op
)) == RTX_UNARY
2921 || GET_RTX_CLASS (GET_CODE (op
)) == RTX_BIN_ARITH
)
2924 expr
= get_mem_expr_from_op (op
, &inner_addressp
);
2925 return inner_addressp
? 0 : expr
;
2928 /* Output operand names for assembler instructions. OPERANDS is the
2929 operand vector, OPORDER is the order to write the operands, and NOPS
2930 is the number of operands to write. */
2933 output_asm_operand_names (rtx
*operands
, int *oporder
, int nops
)
2938 for (i
= 0; i
< nops
; i
++)
2941 rtx op
= operands
[oporder
[i
]];
2942 tree expr
= get_mem_expr_from_op (op
, &addressp
);
2944 fprintf (asm_out_file
, "%c%s",
2945 wrote
? ',' : '\t', wrote
? "" : ASM_COMMENT_START
);
2949 fprintf (asm_out_file
, "%s",
2950 addressp
? "*" : "");
2951 print_mem_expr (asm_out_file
, expr
);
2954 else if (REG_P (op
) && ORIGINAL_REGNO (op
)
2955 && ORIGINAL_REGNO (op
) != REGNO (op
))
2956 fprintf (asm_out_file
, " tmp%i", ORIGINAL_REGNO (op
));
2960 /* Output text from TEMPLATE to the assembler output file,
2961 obeying %-directions to substitute operands taken from
2962 the vector OPERANDS.
2964 %N (for N a digit) means print operand N in usual manner.
2965 %lN means require operand N to be a CODE_LABEL or LABEL_REF
2966 and print the label name with no punctuation.
2967 %cN means require operand N to be a constant
2968 and print the constant expression with no punctuation.
2969 %aN means expect operand N to be a memory address
2970 (not a memory reference!) and print a reference
2972 %nN means expect operand N to be a constant
2973 and print a constant expression for minus the value
2974 of the operand, with no other punctuation. */
2977 output_asm_insn (const char *template, rtx
*operands
)
2981 #ifdef ASSEMBLER_DIALECT
2984 int oporder
[MAX_RECOG_OPERANDS
];
2985 char opoutput
[MAX_RECOG_OPERANDS
];
2988 /* An insn may return a null string template
2989 in a case where no assembler code is needed. */
2993 memset (opoutput
, 0, sizeof opoutput
);
2995 putc ('\t', asm_out_file
);
2997 #ifdef ASM_OUTPUT_OPCODE
2998 ASM_OUTPUT_OPCODE (asm_out_file
, p
);
3005 if (flag_verbose_asm
)
3006 output_asm_operand_names (operands
, oporder
, ops
);
3007 if (flag_print_asm_name
)
3011 memset (opoutput
, 0, sizeof opoutput
);
3013 putc (c
, asm_out_file
);
3014 #ifdef ASM_OUTPUT_OPCODE
3015 while ((c
= *p
) == '\t')
3017 putc (c
, asm_out_file
);
3020 ASM_OUTPUT_OPCODE (asm_out_file
, p
);
3024 #ifdef ASSEMBLER_DIALECT
3030 output_operand_lossage ("nested assembly dialect alternatives");
3034 /* If we want the first dialect, do nothing. Otherwise, skip
3035 DIALECT_NUMBER of strings ending with '|'. */
3036 for (i
= 0; i
< dialect_number
; i
++)
3038 while (*p
&& *p
!= '}' && *p
++ != '|')
3047 output_operand_lossage ("unterminated assembly dialect alternative");
3054 /* Skip to close brace. */
3059 output_operand_lossage ("unterminated assembly dialect alternative");
3063 while (*p
++ != '}');
3067 putc (c
, asm_out_file
);
3072 putc (c
, asm_out_file
);
3078 /* %% outputs a single %. */
3082 putc (c
, asm_out_file
);
3084 /* %= outputs a number which is unique to each insn in the entire
3085 compilation. This is useful for making local labels that are
3086 referred to more than once in a given insn. */
3090 fprintf (asm_out_file
, "%d", insn_counter
);
3092 /* % followed by a letter and some digits
3093 outputs an operand in a special way depending on the letter.
3094 Letters `acln' are implemented directly.
3095 Other letters are passed to `output_operand' so that
3096 the PRINT_OPERAND macro can define them. */
3097 else if (ISALPHA (*p
))
3103 output_operand_lossage ("operand number missing after %%-letter");
3104 else if (this_is_asm_operands
3105 && (c
< 0 || (unsigned int) c
>= insn_noperands
))
3106 output_operand_lossage ("operand number out of range");
3107 else if (letter
== 'l')
3108 output_asm_label (operands
[c
]);
3109 else if (letter
== 'a')
3110 output_address (operands
[c
]);
3111 else if (letter
== 'c')
3113 if (CONSTANT_ADDRESS_P (operands
[c
]))
3114 output_addr_const (asm_out_file
, operands
[c
]);
3116 output_operand (operands
[c
], 'c');
3118 else if (letter
== 'n')
3120 if (GET_CODE (operands
[c
]) == CONST_INT
)
3121 fprintf (asm_out_file
, HOST_WIDE_INT_PRINT_DEC
,
3122 - INTVAL (operands
[c
]));
3125 putc ('-', asm_out_file
);
3126 output_addr_const (asm_out_file
, operands
[c
]);
3130 output_operand (operands
[c
], letter
);
3136 while (ISDIGIT (c
= *p
))
3139 /* % followed by a digit outputs an operand the default way. */
3140 else if (ISDIGIT (*p
))
3143 if (this_is_asm_operands
3144 && (c
< 0 || (unsigned int) c
>= insn_noperands
))
3145 output_operand_lossage ("operand number out of range");
3147 output_operand (operands
[c
], 0);
3153 while (ISDIGIT (c
= *p
))
3156 /* % followed by punctuation: output something for that
3157 punctuation character alone, with no operand.
3158 The PRINT_OPERAND macro decides what is actually done. */
3159 #ifdef PRINT_OPERAND_PUNCT_VALID_P
3160 else if (PRINT_OPERAND_PUNCT_VALID_P ((unsigned char) *p
))
3161 output_operand (NULL_RTX
, *p
++);
3164 output_operand_lossage ("invalid %%-code");
3168 putc (c
, asm_out_file
);
3171 /* Write out the variable names for operands, if we know them. */
3172 if (flag_verbose_asm
)
3173 output_asm_operand_names (operands
, oporder
, ops
);
3174 if (flag_print_asm_name
)
3177 putc ('\n', asm_out_file
);
3180 /* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */
3183 output_asm_label (rtx x
)
3187 if (GET_CODE (x
) == LABEL_REF
)
3189 if (GET_CODE (x
) == CODE_LABEL
3190 || (GET_CODE (x
) == NOTE
3191 && NOTE_LINE_NUMBER (x
) == NOTE_INSN_DELETED_LABEL
))
3192 ASM_GENERATE_INTERNAL_LABEL (buf
, "L", CODE_LABEL_NUMBER (x
));
3194 output_operand_lossage ("`%%l' operand isn't a label");
3196 assemble_name (asm_out_file
, buf
);
3199 /* Print operand X using machine-dependent assembler syntax.
3200 The macro PRINT_OPERAND is defined just to control this function.
3201 CODE is a non-digit that preceded the operand-number in the % spec,
3202 such as 'z' if the spec was `%z3'. CODE is 0 if there was no char
3203 between the % and the digits.
3204 When CODE is a non-letter, X is 0.
3206 The meanings of the letters are machine-dependent and controlled
3207 by PRINT_OPERAND. */
3210 output_operand (rtx x
, int code ATTRIBUTE_UNUSED
)
3212 if (x
&& GET_CODE (x
) == SUBREG
)
3213 x
= alter_subreg (&x
);
3215 /* If X is a pseudo-register, abort now rather than writing trash to the
3218 if (x
&& GET_CODE (x
) == REG
&& REGNO (x
) >= FIRST_PSEUDO_REGISTER
)
3221 PRINT_OPERAND (asm_out_file
, x
, code
);
3224 /* Print a memory reference operand for address X
3225 using machine-dependent assembler syntax.
3226 The macro PRINT_OPERAND_ADDRESS exists just to control this function. */
3229 output_address (rtx x
)
3231 walk_alter_subreg (&x
);
3232 PRINT_OPERAND_ADDRESS (asm_out_file
, x
);
3235 /* Print an integer constant expression in assembler syntax.
3236 Addition and subtraction are the only arithmetic
3237 that may appear in these expressions. */
3240 output_addr_const (FILE *file
, rtx x
)
3245 switch (GET_CODE (x
))
3252 #ifdef ASM_OUTPUT_SYMBOL_REF
3253 ASM_OUTPUT_SYMBOL_REF (file
, x
);
3255 assemble_name (file
, XSTR (x
, 0));
3263 ASM_GENERATE_INTERNAL_LABEL (buf
, "L", CODE_LABEL_NUMBER (x
));
3264 #ifdef ASM_OUTPUT_LABEL_REF
3265 ASM_OUTPUT_LABEL_REF (file
, buf
);
3267 assemble_name (file
, buf
);
3272 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, INTVAL (x
));
3276 /* This used to output parentheses around the expression,
3277 but that does not work on the 386 (either ATT or BSD assembler). */
3278 output_addr_const (file
, XEXP (x
, 0));
3282 if (GET_MODE (x
) == VOIDmode
)
3284 /* We can use %d if the number is one word and positive. */
3285 if (CONST_DOUBLE_HIGH (x
))
3286 fprintf (file
, HOST_WIDE_INT_PRINT_DOUBLE_HEX
,
3287 CONST_DOUBLE_HIGH (x
), CONST_DOUBLE_LOW (x
));
3288 else if (CONST_DOUBLE_LOW (x
) < 0)
3289 fprintf (file
, HOST_WIDE_INT_PRINT_HEX
, CONST_DOUBLE_LOW (x
));
3291 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, CONST_DOUBLE_LOW (x
));
3294 /* We can't handle floating point constants;
3295 PRINT_OPERAND must handle them. */
3296 output_operand_lossage ("floating constant misused");
3300 /* Some assemblers need integer constants to appear last (eg masm). */
3301 if (GET_CODE (XEXP (x
, 0)) == CONST_INT
)
3303 output_addr_const (file
, XEXP (x
, 1));
3304 if (INTVAL (XEXP (x
, 0)) >= 0)
3305 fprintf (file
, "+");
3306 output_addr_const (file
, XEXP (x
, 0));
3310 output_addr_const (file
, XEXP (x
, 0));
3311 if (GET_CODE (XEXP (x
, 1)) != CONST_INT
3312 || INTVAL (XEXP (x
, 1)) >= 0)
3313 fprintf (file
, "+");
3314 output_addr_const (file
, XEXP (x
, 1));
3319 /* Avoid outputting things like x-x or x+5-x,
3320 since some assemblers can't handle that. */
3321 x
= simplify_subtraction (x
);
3322 if (GET_CODE (x
) != MINUS
)
3325 output_addr_const (file
, XEXP (x
, 0));
3326 fprintf (file
, "-");
3327 if ((GET_CODE (XEXP (x
, 1)) == CONST_INT
&& INTVAL (XEXP (x
, 1)) >= 0)
3328 || GET_CODE (XEXP (x
, 1)) == PC
3329 || GET_CODE (XEXP (x
, 1)) == SYMBOL_REF
)
3330 output_addr_const (file
, XEXP (x
, 1));
3333 fputs (targetm
.asm_out
.open_paren
, file
);
3334 output_addr_const (file
, XEXP (x
, 1));
3335 fputs (targetm
.asm_out
.close_paren
, file
);
3342 output_addr_const (file
, XEXP (x
, 0));
3346 #ifdef OUTPUT_ADDR_CONST_EXTRA
3347 OUTPUT_ADDR_CONST_EXTRA (file
, x
, fail
);
3352 output_operand_lossage ("invalid expression as operand");
3356 /* A poor man's fprintf, with the added features of %I, %R, %L, and %U.
3357 %R prints the value of REGISTER_PREFIX.
3358 %L prints the value of LOCAL_LABEL_PREFIX.
3359 %U prints the value of USER_LABEL_PREFIX.
3360 %I prints the value of IMMEDIATE_PREFIX.
3361 %O runs ASM_OUTPUT_OPCODE to transform what follows in the string.
3362 Also supported are %d, %i, %u, %x, %X, %o, %c, %s and %%.
3364 We handle alternate assembler dialects here, just like output_asm_insn. */
3367 asm_fprintf (FILE *file
, const char *p
, ...)
3373 va_start (argptr
, p
);
3380 #ifdef ASSEMBLER_DIALECT
3385 /* If we want the first dialect, do nothing. Otherwise, skip
3386 DIALECT_NUMBER of strings ending with '|'. */
3387 for (i
= 0; i
< dialect_number
; i
++)
3389 while (*p
&& *p
++ != '|')
3399 /* Skip to close brace. */
3400 while (*p
&& *p
++ != '}')
3411 while (strchr ("-+ #0", c
))
3416 while (ISDIGIT (c
) || c
== '.')
3427 case 'd': case 'i': case 'u':
3428 case 'x': case 'X': case 'o':
3432 fprintf (file
, buf
, va_arg (argptr
, int));
3436 /* This is a prefix to the 'd', 'i', 'u', 'x', 'X', and
3437 'o' cases, but we do not check for those cases. It
3438 means that the value is a HOST_WIDE_INT, which may be
3439 either `long' or `long long'. */
3440 memcpy (q
, HOST_WIDE_INT_PRINT
, strlen (HOST_WIDE_INT_PRINT
));
3441 q
+= strlen (HOST_WIDE_INT_PRINT
);
3444 fprintf (file
, buf
, va_arg (argptr
, HOST_WIDE_INT
));
3449 #ifdef HAVE_LONG_LONG
3455 fprintf (file
, buf
, va_arg (argptr
, long long));
3462 fprintf (file
, buf
, va_arg (argptr
, long));
3470 fprintf (file
, buf
, va_arg (argptr
, char *));
3474 #ifdef ASM_OUTPUT_OPCODE
3475 ASM_OUTPUT_OPCODE (asm_out_file
, p
);
3480 #ifdef REGISTER_PREFIX
3481 fprintf (file
, "%s", REGISTER_PREFIX
);
3486 #ifdef IMMEDIATE_PREFIX
3487 fprintf (file
, "%s", IMMEDIATE_PREFIX
);
3492 #ifdef LOCAL_LABEL_PREFIX
3493 fprintf (file
, "%s", LOCAL_LABEL_PREFIX
);
3498 fputs (user_label_prefix
, file
);
3501 #ifdef ASM_FPRINTF_EXTENSIONS
3502 /* Uppercase letters are reserved for general use by asm_fprintf
3503 and so are not available to target specific code. In order to
3504 prevent the ASM_FPRINTF_EXTENSIONS macro from using them then,
3505 they are defined here. As they get turned into real extensions
3506 to asm_fprintf they should be removed from this list. */
3507 case 'A': case 'B': case 'C': case 'D': case 'E':
3508 case 'F': case 'G': case 'H': case 'J': case 'K':
3509 case 'M': case 'N': case 'P': case 'Q': case 'S':
3510 case 'T': case 'V': case 'W': case 'Y': case 'Z':
3513 ASM_FPRINTF_EXTENSIONS (file
, argptr
, p
)
3526 /* Split up a CONST_DOUBLE or integer constant rtx
3527 into two rtx's for single words,
3528 storing in *FIRST the word that comes first in memory in the target
3529 and in *SECOND the other. */
3532 split_double (rtx value
, rtx
*first
, rtx
*second
)
3534 if (GET_CODE (value
) == CONST_INT
)
3536 if (HOST_BITS_PER_WIDE_INT
>= (2 * BITS_PER_WORD
))
3538 /* In this case the CONST_INT holds both target words.
3539 Extract the bits from it into two word-sized pieces.
3540 Sign extend each half to HOST_WIDE_INT. */
3541 unsigned HOST_WIDE_INT low
, high
;
3542 unsigned HOST_WIDE_INT mask
, sign_bit
, sign_extend
;
3544 /* Set sign_bit to the most significant bit of a word. */
3546 sign_bit
<<= BITS_PER_WORD
- 1;
3548 /* Set mask so that all bits of the word are set. We could
3549 have used 1 << BITS_PER_WORD instead of basing the
3550 calculation on sign_bit. However, on machines where
3551 HOST_BITS_PER_WIDE_INT == BITS_PER_WORD, it could cause a
3552 compiler warning, even though the code would never be
3554 mask
= sign_bit
<< 1;
3557 /* Set sign_extend as any remaining bits. */
3558 sign_extend
= ~mask
;
3560 /* Pick the lower word and sign-extend it. */
3561 low
= INTVAL (value
);
3566 /* Pick the higher word, shifted to the least significant
3567 bits, and sign-extend it. */
3568 high
= INTVAL (value
);
3569 high
>>= BITS_PER_WORD
- 1;
3572 if (high
& sign_bit
)
3573 high
|= sign_extend
;
3575 /* Store the words in the target machine order. */
3576 if (WORDS_BIG_ENDIAN
)
3578 *first
= GEN_INT (high
);
3579 *second
= GEN_INT (low
);
3583 *first
= GEN_INT (low
);
3584 *second
= GEN_INT (high
);
3589 /* The rule for using CONST_INT for a wider mode
3590 is that we regard the value as signed.
3591 So sign-extend it. */
3592 rtx high
= (INTVAL (value
) < 0 ? constm1_rtx
: const0_rtx
);
3593 if (WORDS_BIG_ENDIAN
)
3605 else if (GET_CODE (value
) != CONST_DOUBLE
)
3607 if (WORDS_BIG_ENDIAN
)
3609 *first
= const0_rtx
;
3615 *second
= const0_rtx
;
3618 else if (GET_MODE (value
) == VOIDmode
3619 /* This is the old way we did CONST_DOUBLE integers. */
3620 || GET_MODE_CLASS (GET_MODE (value
)) == MODE_INT
)
3622 /* In an integer, the words are defined as most and least significant.
3623 So order them by the target's convention. */
3624 if (WORDS_BIG_ENDIAN
)
3626 *first
= GEN_INT (CONST_DOUBLE_HIGH (value
));
3627 *second
= GEN_INT (CONST_DOUBLE_LOW (value
));
3631 *first
= GEN_INT (CONST_DOUBLE_LOW (value
));
3632 *second
= GEN_INT (CONST_DOUBLE_HIGH (value
));
3639 REAL_VALUE_FROM_CONST_DOUBLE (r
, value
);
3641 /* Note, this converts the REAL_VALUE_TYPE to the target's
3642 format, splits up the floating point double and outputs
3643 exactly 32 bits of it into each of l[0] and l[1] --
3644 not necessarily BITS_PER_WORD bits. */
3645 REAL_VALUE_TO_TARGET_DOUBLE (r
, l
);
3647 /* If 32 bits is an entire word for the target, but not for the host,
3648 then sign-extend on the host so that the number will look the same
3649 way on the host that it would on the target. See for instance
3650 simplify_unary_operation. The #if is needed to avoid compiler
3653 #if HOST_BITS_PER_LONG > 32
3654 if (BITS_PER_WORD
< HOST_BITS_PER_LONG
&& BITS_PER_WORD
== 32)
3656 if (l
[0] & ((long) 1 << 31))
3657 l
[0] |= ((long) (-1) << 32);
3658 if (l
[1] & ((long) 1 << 31))
3659 l
[1] |= ((long) (-1) << 32);
3663 *first
= GEN_INT ((HOST_WIDE_INT
) l
[0]);
3664 *second
= GEN_INT ((HOST_WIDE_INT
) l
[1]);
3668 /* Return nonzero if this function has no function calls. */
3671 leaf_function_p (void)
3676 if (current_function_profile
|| profile_arc_flag
)
3679 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
3681 if (GET_CODE (insn
) == CALL_INSN
3682 && ! SIBLING_CALL_P (insn
))
3684 if (GET_CODE (insn
) == INSN
3685 && GET_CODE (PATTERN (insn
)) == SEQUENCE
3686 && GET_CODE (XVECEXP (PATTERN (insn
), 0, 0)) == CALL_INSN
3687 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn
), 0, 0)))
3690 for (link
= current_function_epilogue_delay_list
;
3692 link
= XEXP (link
, 1))
3694 insn
= XEXP (link
, 0);
3696 if (GET_CODE (insn
) == CALL_INSN
3697 && ! SIBLING_CALL_P (insn
))
3699 if (GET_CODE (insn
) == INSN
3700 && GET_CODE (PATTERN (insn
)) == SEQUENCE
3701 && GET_CODE (XVECEXP (PATTERN (insn
), 0, 0)) == CALL_INSN
3702 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn
), 0, 0)))
3709 /* Return 1 if branch is a forward branch.
3710 Uses insn_shuid array, so it works only in the final pass. May be used by
3711 output templates to customary add branch prediction hints.
3714 final_forward_branch_p (rtx insn
)
3716 int insn_id
, label_id
;
3719 insn_id
= INSN_SHUID (insn
);
3720 label_id
= INSN_SHUID (JUMP_LABEL (insn
));
3721 /* We've hit some insns that does not have id information available. */
3722 if (!insn_id
|| !label_id
)
3724 return insn_id
< label_id
;
3727 /* On some machines, a function with no call insns
3728 can run faster if it doesn't create its own register window.
3729 When output, the leaf function should use only the "output"
3730 registers. Ordinarily, the function would be compiled to use
3731 the "input" registers to find its arguments; it is a candidate
3732 for leaf treatment if it uses only the "input" registers.
3733 Leaf function treatment means renumbering so the function
3734 uses the "output" registers instead. */
3736 #ifdef LEAF_REGISTERS
3738 /* Return 1 if this function uses only the registers that can be
3739 safely renumbered. */
3742 only_leaf_regs_used (void)
3745 const char *const permitted_reg_in_leaf_functions
= LEAF_REGISTERS
;
3747 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
3748 if ((regs_ever_live
[i
] || global_regs
[i
])
3749 && ! permitted_reg_in_leaf_functions
[i
])
3752 if (current_function_uses_pic_offset_table
3753 && pic_offset_table_rtx
!= 0
3754 && GET_CODE (pic_offset_table_rtx
) == REG
3755 && ! permitted_reg_in_leaf_functions
[REGNO (pic_offset_table_rtx
)])
3761 /* Scan all instructions and renumber all registers into those
3762 available in leaf functions. */
3765 leaf_renumber_regs (rtx first
)
3769 /* Renumber only the actual patterns.
3770 The reg-notes can contain frame pointer refs,
3771 and renumbering them could crash, and should not be needed. */
3772 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
3774 leaf_renumber_regs_insn (PATTERN (insn
));
3775 for (insn
= current_function_epilogue_delay_list
;
3777 insn
= XEXP (insn
, 1))
3778 if (INSN_P (XEXP (insn
, 0)))
3779 leaf_renumber_regs_insn (PATTERN (XEXP (insn
, 0)));
3782 /* Scan IN_RTX and its subexpressions, and renumber all regs into those
3783 available in leaf functions. */
3786 leaf_renumber_regs_insn (rtx in_rtx
)
3789 const char *format_ptr
;
3794 /* Renumber all input-registers into output-registers.
3795 renumbered_regs would be 1 for an output-register;
3798 if (GET_CODE (in_rtx
) == REG
)
3802 /* Don't renumber the same reg twice. */
3806 newreg
= REGNO (in_rtx
);
3807 /* Don't try to renumber pseudo regs. It is possible for a pseudo reg
3808 to reach here as part of a REG_NOTE. */
3809 if (newreg
>= FIRST_PSEUDO_REGISTER
)
3814 newreg
= LEAF_REG_REMAP (newreg
);
3817 regs_ever_live
[REGNO (in_rtx
)] = 0;
3818 regs_ever_live
[newreg
] = 1;
3819 REGNO (in_rtx
) = newreg
;
3823 if (INSN_P (in_rtx
))
3825 /* Inside a SEQUENCE, we find insns.
3826 Renumber just the patterns of these insns,
3827 just as we do for the top-level insns. */
3828 leaf_renumber_regs_insn (PATTERN (in_rtx
));
3832 format_ptr
= GET_RTX_FORMAT (GET_CODE (in_rtx
));
3834 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (in_rtx
)); i
++)
3835 switch (*format_ptr
++)
3838 leaf_renumber_regs_insn (XEXP (in_rtx
, i
));
3842 if (NULL
!= XVEC (in_rtx
, i
))
3844 for (j
= 0; j
< XVECLEN (in_rtx
, i
); j
++)
3845 leaf_renumber_regs_insn (XVECEXP (in_rtx
, i
, j
));
3865 /* When -gused is used, emit debug info for only used symbols. But in
3866 addition to the standard intercepted debug_hooks there are some direct
3867 calls into this file, i.e., dbxout_symbol, dbxout_parms, and dbxout_reg_params.
3868 Those routines may also be called from a higher level intercepted routine. So
3869 to prevent recording data for an inner call to one of these for an intercept,
3870 we maintain an intercept nesting counter (debug_nesting). We only save the
3871 intercepted arguments if the nesting is 1. */
3872 int debug_nesting
= 0;
3874 static tree
*symbol_queue
;
3875 int symbol_queue_index
= 0;
3876 static int symbol_queue_size
= 0;
3878 /* Generate the symbols for any queued up type symbols we encountered
3879 while generating the type info for some originally used symbol.
3880 This might generate additional entries in the queue. Only when
3881 the nesting depth goes to 0 is this routine called. */
3884 debug_flush_symbol_queue (void)
3888 /* Make sure that additionally queued items are not flushed
3893 for (i
= 0; i
< symbol_queue_index
; ++i
)
3895 /* If we pushed queued symbols then such symbols are must be
3896 output no matter what anyone else says. Specifically,
3897 we need to make sure dbxout_symbol() thinks the symbol was
3898 used and also we need to override TYPE_DECL_SUPPRESS_DEBUG
3899 which may be set for outside reasons. */
3900 int saved_tree_used
= TREE_USED (symbol_queue
[i
]);
3901 int saved_suppress_debug
= TYPE_DECL_SUPPRESS_DEBUG (symbol_queue
[i
]);
3902 TREE_USED (symbol_queue
[i
]) = 1;
3903 TYPE_DECL_SUPPRESS_DEBUG (symbol_queue
[i
]) = 0;
3905 #ifdef DBX_DEBUGGING_INFO
3906 dbxout_symbol (symbol_queue
[i
], 0);
3909 TREE_USED (symbol_queue
[i
]) = saved_tree_used
;
3910 TYPE_DECL_SUPPRESS_DEBUG (symbol_queue
[i
]) = saved_suppress_debug
;
3913 symbol_queue_index
= 0;
3917 /* Queue a type symbol needed as part of the definition of a decl
3918 symbol. These symbols are generated when debug_flush_symbol_queue()
3922 debug_queue_symbol (tree decl
)
3924 if (symbol_queue_index
>= symbol_queue_size
)
3926 symbol_queue_size
+= 10;
3927 symbol_queue
= xrealloc (symbol_queue
,
3928 symbol_queue_size
* sizeof (tree
));
3931 symbol_queue
[symbol_queue_index
++] = decl
;
3934 /* Free symbol queue. */
3936 debug_free_queue (void)
3940 free (symbol_queue
);
3941 symbol_queue
= NULL
;
3942 symbol_queue_size
= 0;