dwarf2: Extract cfi creation to a new pass.
[gcc.git] / gcc / final.c
1 /* Convert RTL to assembler code and output it, for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009,
4 2010, 2011
5 Free Software Foundation, Inc.
6
7 This file is part of GCC.
8
9 GCC is free software; you can redistribute it and/or modify it under
10 the terms of the GNU General Public License as published by the Free
11 Software Foundation; either version 3, or (at your option) any later
12 version.
13
14 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
15 WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with GCC; see the file COPYING3. If not see
21 <http://www.gnu.org/licenses/>. */
22
23 /* This is the final pass of the compiler.
24 It looks at the rtl code for a function and outputs assembler code.
25
26 Call `final_start_function' to output the assembler code for function entry,
27 `final' to output assembler code for some RTL code,
28 `final_end_function' to output assembler code for function exit.
29 If a function is compiled in several pieces, each piece is
30 output separately with `final'.
31
32 Some optimizations are also done at this level.
33 Move instructions that were made unnecessary by good register allocation
34 are detected and omitted from the output. (Though most of these
35 are removed by the last jump pass.)
36
37 Instructions to set the condition codes are omitted when it can be
38 seen that the condition codes already had the desired values.
39
40 In some cases it is sufficient if the inherited condition codes
41 have related values, but this may require the following insn
42 (the one that tests the condition codes) to be modified.
43
44 The code for the function prologue and epilogue are generated
45 directly in assembler by the target functions function_prologue and
46 function_epilogue. Those instructions never exist as rtl. */
47
48 #include "config.h"
49 #include "system.h"
50 #include "coretypes.h"
51 #include "tm.h"
52
53 #include "tree.h"
54 #include "rtl.h"
55 #include "tm_p.h"
56 #include "regs.h"
57 #include "insn-config.h"
58 #include "insn-attr.h"
59 #include "recog.h"
60 #include "conditions.h"
61 #include "flags.h"
62 #include "hard-reg-set.h"
63 #include "output.h"
64 #include "except.h"
65 #include "function.h"
66 #include "rtl-error.h"
67 #include "toplev.h" /* exact_log2, floor_log2 */
68 #include "reload.h"
69 #include "intl.h"
70 #include "basic-block.h"
71 #include "target.h"
72 #include "targhooks.h"
73 #include "debug.h"
74 #include "expr.h"
75 #include "cfglayout.h"
76 #include "tree-pass.h"
77 #include "tree-flow.h"
78 #include "timevar.h"
79 #include "cgraph.h"
80 #include "coverage.h"
81 #include "df.h"
82 #include "vecprim.h"
83 #include "ggc.h"
84 #include "cfgloop.h"
85 #include "params.h"
86 #include "tree-pretty-print.h"
87
88 #ifdef XCOFF_DEBUGGING_INFO
89 #include "xcoffout.h" /* Needed for external data
90 declarations for e.g. AIX 4.x. */
91 #endif
92
93 #include "dwarf2out.h"
94
95 #ifdef DBX_DEBUGGING_INFO
96 #include "dbxout.h"
97 #endif
98
99 #ifdef SDB_DEBUGGING_INFO
100 #include "sdbout.h"
101 #endif
102
103 /* Most ports that aren't using cc0 don't need to define CC_STATUS_INIT.
104 So define a null default for it to save conditionalization later. */
105 #ifndef CC_STATUS_INIT
106 #define CC_STATUS_INIT
107 #endif
108
109 /* How to start an assembler comment. */
110 #ifndef ASM_COMMENT_START
111 #define ASM_COMMENT_START ";#"
112 #endif
113
114 /* Is the given character a logical line separator for the assembler? */
115 #ifndef IS_ASM_LOGICAL_LINE_SEPARATOR
116 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == ';')
117 #endif
118
119 #ifndef JUMP_TABLES_IN_TEXT_SECTION
120 #define JUMP_TABLES_IN_TEXT_SECTION 0
121 #endif
122
123 /* Bitflags used by final_scan_insn. */
124 #define SEEN_BB 1
125 #define SEEN_NOTE 2
126 #define SEEN_EMITTED 4
127
128 /* Last insn processed by final_scan_insn. */
129 static rtx debug_insn;
130 rtx current_output_insn;
131
132 /* Line number of last NOTE. */
133 static int last_linenum;
134
135 /* Last discriminator written to assembly. */
136 static int last_discriminator;
137
138 /* Discriminator of current block. */
139 static int discriminator;
140
141 /* Highest line number in current block. */
142 static int high_block_linenum;
143
144 /* Likewise for function. */
145 static int high_function_linenum;
146
147 /* Filename of last NOTE. */
148 static const char *last_filename;
149
150 /* Override filename and line number. */
151 static const char *override_filename;
152 static int override_linenum;
153
154 /* Whether to force emission of a line note before the next insn. */
155 static bool force_source_line = false;
156
157 extern const int length_unit_log; /* This is defined in insn-attrtab.c. */
158
159 /* Nonzero while outputting an `asm' with operands.
160 This means that inconsistencies are the user's fault, so don't die.
161 The precise value is the insn being output, to pass to error_for_asm. */
162 rtx this_is_asm_operands;
163
164 /* Number of operands of this insn, for an `asm' with operands. */
165 static unsigned int insn_noperands;
166
167 /* Compare optimization flag. */
168
169 static rtx last_ignored_compare = 0;
170
171 /* Assign a unique number to each insn that is output.
172 This can be used to generate unique local labels. */
173
174 static int insn_counter = 0;
175
176 #ifdef HAVE_cc0
177 /* This variable contains machine-dependent flags (defined in tm.h)
178 set and examined by output routines
179 that describe how to interpret the condition codes properly. */
180
181 CC_STATUS cc_status;
182
183 /* During output of an insn, this contains a copy of cc_status
184 from before the insn. */
185
186 CC_STATUS cc_prev_status;
187 #endif
188
189 /* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */
190
191 static int block_depth;
192
193 /* Nonzero if have enabled APP processing of our assembler output. */
194
195 static int app_on;
196
197 /* If we are outputting an insn sequence, this contains the sequence rtx.
198 Zero otherwise. */
199
200 rtx final_sequence;
201
202 #ifdef ASSEMBLER_DIALECT
203
204 /* Number of the assembler dialect to use, starting at 0. */
205 static int dialect_number;
206 #endif
207
208 /* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */
209 rtx current_insn_predicate;
210
211 /* True if printing into -fdump-final-insns= dump. */
212 bool final_insns_dump_p;
213
214 #ifdef HAVE_ATTR_length
215 static int asm_insn_count (rtx);
216 #endif
217 static void profile_function (FILE *);
218 static void profile_after_prologue (FILE *);
219 static bool notice_source_line (rtx, bool *);
220 static rtx walk_alter_subreg (rtx *, bool *);
221 static void output_asm_name (void);
222 static void output_alternate_entry_point (FILE *, rtx);
223 static tree get_mem_expr_from_op (rtx, int *);
224 static void output_asm_operand_names (rtx *, int *, int);
225 #ifdef LEAF_REGISTERS
226 static void leaf_renumber_regs (rtx);
227 #endif
228 #ifdef HAVE_cc0
229 static int alter_cond (rtx);
230 #endif
231 #ifndef ADDR_VEC_ALIGN
232 static int final_addr_vec_align (rtx);
233 #endif
234 #ifdef HAVE_ATTR_length
235 static int align_fuzz (rtx, rtx, int, unsigned);
236 #endif
237 \f
238 /* Initialize data in final at the beginning of a compilation. */
239
240 void
241 init_final (const char *filename ATTRIBUTE_UNUSED)
242 {
243 app_on = 0;
244 final_sequence = 0;
245
246 #ifdef ASSEMBLER_DIALECT
247 dialect_number = ASSEMBLER_DIALECT;
248 #endif
249 }
250
251 /* Default target function prologue and epilogue assembler output.
252
253 If not overridden for epilogue code, then the function body itself
254 contains return instructions wherever needed. */
255 void
256 default_function_pro_epilogue (FILE *file ATTRIBUTE_UNUSED,
257 HOST_WIDE_INT size ATTRIBUTE_UNUSED)
258 {
259 }
260
261 void
262 default_function_switched_text_sections (FILE *file ATTRIBUTE_UNUSED,
263 tree decl ATTRIBUTE_UNUSED,
264 bool new_is_cold ATTRIBUTE_UNUSED)
265 {
266 }
267
268 /* Default target hook that outputs nothing to a stream. */
269 void
270 no_asm_to_stream (FILE *file ATTRIBUTE_UNUSED)
271 {
272 }
273
274 /* Enable APP processing of subsequent output.
275 Used before the output from an `asm' statement. */
276
277 void
278 app_enable (void)
279 {
280 if (! app_on)
281 {
282 fputs (ASM_APP_ON, asm_out_file);
283 app_on = 1;
284 }
285 }
286
287 /* Disable APP processing of subsequent output.
288 Called from varasm.c before most kinds of output. */
289
290 void
291 app_disable (void)
292 {
293 if (app_on)
294 {
295 fputs (ASM_APP_OFF, asm_out_file);
296 app_on = 0;
297 }
298 }
299 \f
300 /* Return the number of slots filled in the current
301 delayed branch sequence (we don't count the insn needing the
302 delay slot). Zero if not in a delayed branch sequence. */
303
304 #ifdef DELAY_SLOTS
305 int
306 dbr_sequence_length (void)
307 {
308 if (final_sequence != 0)
309 return XVECLEN (final_sequence, 0) - 1;
310 else
311 return 0;
312 }
313 #endif
314 \f
315 /* The next two pages contain routines used to compute the length of an insn
316 and to shorten branches. */
317
318 /* Arrays for insn lengths, and addresses. The latter is referenced by
319 `insn_current_length'. */
320
321 static int *insn_lengths;
322
323 VEC(int,heap) *insn_addresses_;
324
325 /* Max uid for which the above arrays are valid. */
326 static int insn_lengths_max_uid;
327
328 /* Address of insn being processed. Used by `insn_current_length'. */
329 int insn_current_address;
330
331 /* Address of insn being processed in previous iteration. */
332 int insn_last_address;
333
334 /* known invariant alignment of insn being processed. */
335 int insn_current_align;
336
337 /* After shorten_branches, for any insn, uid_align[INSN_UID (insn)]
338 gives the next following alignment insn that increases the known
339 alignment, or NULL_RTX if there is no such insn.
340 For any alignment obtained this way, we can again index uid_align with
341 its uid to obtain the next following align that in turn increases the
342 alignment, till we reach NULL_RTX; the sequence obtained this way
343 for each insn we'll call the alignment chain of this insn in the following
344 comments. */
345
346 struct label_alignment
347 {
348 short alignment;
349 short max_skip;
350 };
351
352 static rtx *uid_align;
353 static int *uid_shuid;
354 static struct label_alignment *label_align;
355
356 /* Indicate that branch shortening hasn't yet been done. */
357
358 void
359 init_insn_lengths (void)
360 {
361 if (uid_shuid)
362 {
363 free (uid_shuid);
364 uid_shuid = 0;
365 }
366 if (insn_lengths)
367 {
368 free (insn_lengths);
369 insn_lengths = 0;
370 insn_lengths_max_uid = 0;
371 }
372 #ifdef HAVE_ATTR_length
373 INSN_ADDRESSES_FREE ();
374 #endif
375 if (uid_align)
376 {
377 free (uid_align);
378 uid_align = 0;
379 }
380 }
381
382 /* Obtain the current length of an insn. If branch shortening has been done,
383 get its actual length. Otherwise, use FALLBACK_FN to calculate the
384 length. */
385 static inline int
386 get_attr_length_1 (rtx insn ATTRIBUTE_UNUSED,
387 int (*fallback_fn) (rtx) ATTRIBUTE_UNUSED)
388 {
389 #ifdef HAVE_ATTR_length
390 rtx body;
391 int i;
392 int length = 0;
393
394 if (insn_lengths_max_uid > INSN_UID (insn))
395 return insn_lengths[INSN_UID (insn)];
396 else
397 switch (GET_CODE (insn))
398 {
399 case NOTE:
400 case BARRIER:
401 case CODE_LABEL:
402 case DEBUG_INSN:
403 return 0;
404
405 case CALL_INSN:
406 length = fallback_fn (insn);
407 break;
408
409 case JUMP_INSN:
410 body = PATTERN (insn);
411 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
412 {
413 /* Alignment is machine-dependent and should be handled by
414 ADDR_VEC_ALIGN. */
415 }
416 else
417 length = fallback_fn (insn);
418 break;
419
420 case INSN:
421 body = PATTERN (insn);
422 if (GET_CODE (body) == USE || GET_CODE (body) == CLOBBER)
423 return 0;
424
425 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
426 length = asm_insn_count (body) * fallback_fn (insn);
427 else if (GET_CODE (body) == SEQUENCE)
428 for (i = 0; i < XVECLEN (body, 0); i++)
429 length += get_attr_length_1 (XVECEXP (body, 0, i), fallback_fn);
430 else
431 length = fallback_fn (insn);
432 break;
433
434 default:
435 break;
436 }
437
438 #ifdef ADJUST_INSN_LENGTH
439 ADJUST_INSN_LENGTH (insn, length);
440 #endif
441 return length;
442 #else /* not HAVE_ATTR_length */
443 return 0;
444 #define insn_default_length 0
445 #define insn_min_length 0
446 #endif /* not HAVE_ATTR_length */
447 }
448
449 /* Obtain the current length of an insn. If branch shortening has been done,
450 get its actual length. Otherwise, get its maximum length. */
451 int
452 get_attr_length (rtx insn)
453 {
454 return get_attr_length_1 (insn, insn_default_length);
455 }
456
457 /* Obtain the current length of an insn. If branch shortening has been done,
458 get its actual length. Otherwise, get its minimum length. */
459 int
460 get_attr_min_length (rtx insn)
461 {
462 return get_attr_length_1 (insn, insn_min_length);
463 }
464 \f
465 /* Code to handle alignment inside shorten_branches. */
466
467 /* Here is an explanation how the algorithm in align_fuzz can give
468 proper results:
469
470 Call a sequence of instructions beginning with alignment point X
471 and continuing until the next alignment point `block X'. When `X'
472 is used in an expression, it means the alignment value of the
473 alignment point.
474
475 Call the distance between the start of the first insn of block X, and
476 the end of the last insn of block X `IX', for the `inner size of X'.
477 This is clearly the sum of the instruction lengths.
478
479 Likewise with the next alignment-delimited block following X, which we
480 shall call block Y.
481
482 Call the distance between the start of the first insn of block X, and
483 the start of the first insn of block Y `OX', for the `outer size of X'.
484
485 The estimated padding is then OX - IX.
486
487 OX can be safely estimated as
488
489 if (X >= Y)
490 OX = round_up(IX, Y)
491 else
492 OX = round_up(IX, X) + Y - X
493
494 Clearly est(IX) >= real(IX), because that only depends on the
495 instruction lengths, and those being overestimated is a given.
496
497 Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so
498 we needn't worry about that when thinking about OX.
499
500 When X >= Y, the alignment provided by Y adds no uncertainty factor
501 for branch ranges starting before X, so we can just round what we have.
502 But when X < Y, we don't know anything about the, so to speak,
503 `middle bits', so we have to assume the worst when aligning up from an
504 address mod X to one mod Y, which is Y - X. */
505
506 #ifndef LABEL_ALIGN
507 #define LABEL_ALIGN(LABEL) align_labels_log
508 #endif
509
510 #ifndef LOOP_ALIGN
511 #define LOOP_ALIGN(LABEL) align_loops_log
512 #endif
513
514 #ifndef LABEL_ALIGN_AFTER_BARRIER
515 #define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0
516 #endif
517
518 #ifndef JUMP_ALIGN
519 #define JUMP_ALIGN(LABEL) align_jumps_log
520 #endif
521
522 int
523 default_label_align_after_barrier_max_skip (rtx insn ATTRIBUTE_UNUSED)
524 {
525 return 0;
526 }
527
528 int
529 default_loop_align_max_skip (rtx insn ATTRIBUTE_UNUSED)
530 {
531 return align_loops_max_skip;
532 }
533
534 int
535 default_label_align_max_skip (rtx insn ATTRIBUTE_UNUSED)
536 {
537 return align_labels_max_skip;
538 }
539
540 int
541 default_jump_align_max_skip (rtx insn ATTRIBUTE_UNUSED)
542 {
543 return align_jumps_max_skip;
544 }
545
546 #ifndef ADDR_VEC_ALIGN
547 static int
548 final_addr_vec_align (rtx addr_vec)
549 {
550 int align = GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec)));
551
552 if (align > BIGGEST_ALIGNMENT / BITS_PER_UNIT)
553 align = BIGGEST_ALIGNMENT / BITS_PER_UNIT;
554 return exact_log2 (align);
555
556 }
557
558 #define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC)
559 #endif
560
561 #ifndef INSN_LENGTH_ALIGNMENT
562 #define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log
563 #endif
564
565 #define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)])
566
567 static int min_labelno, max_labelno;
568
569 #define LABEL_TO_ALIGNMENT(LABEL) \
570 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment)
571
572 #define LABEL_TO_MAX_SKIP(LABEL) \
573 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip)
574
575 /* For the benefit of port specific code do this also as a function. */
576
577 int
578 label_to_alignment (rtx label)
579 {
580 if (CODE_LABEL_NUMBER (label) <= max_labelno)
581 return LABEL_TO_ALIGNMENT (label);
582 return 0;
583 }
584
585 int
586 label_to_max_skip (rtx label)
587 {
588 if (CODE_LABEL_NUMBER (label) <= max_labelno)
589 return LABEL_TO_MAX_SKIP (label);
590 return 0;
591 }
592
593 #ifdef HAVE_ATTR_length
594 /* The differences in addresses
595 between a branch and its target might grow or shrink depending on
596 the alignment the start insn of the range (the branch for a forward
597 branch or the label for a backward branch) starts out on; if these
598 differences are used naively, they can even oscillate infinitely.
599 We therefore want to compute a 'worst case' address difference that
600 is independent of the alignment the start insn of the range end
601 up on, and that is at least as large as the actual difference.
602 The function align_fuzz calculates the amount we have to add to the
603 naively computed difference, by traversing the part of the alignment
604 chain of the start insn of the range that is in front of the end insn
605 of the range, and considering for each alignment the maximum amount
606 that it might contribute to a size increase.
607
608 For casesi tables, we also want to know worst case minimum amounts of
609 address difference, in case a machine description wants to introduce
610 some common offset that is added to all offsets in a table.
611 For this purpose, align_fuzz with a growth argument of 0 computes the
612 appropriate adjustment. */
613
614 /* Compute the maximum delta by which the difference of the addresses of
615 START and END might grow / shrink due to a different address for start
616 which changes the size of alignment insns between START and END.
617 KNOWN_ALIGN_LOG is the alignment known for START.
618 GROWTH should be ~0 if the objective is to compute potential code size
619 increase, and 0 if the objective is to compute potential shrink.
620 The return value is undefined for any other value of GROWTH. */
621
622 static int
623 align_fuzz (rtx start, rtx end, int known_align_log, unsigned int growth)
624 {
625 int uid = INSN_UID (start);
626 rtx align_label;
627 int known_align = 1 << known_align_log;
628 int end_shuid = INSN_SHUID (end);
629 int fuzz = 0;
630
631 for (align_label = uid_align[uid]; align_label; align_label = uid_align[uid])
632 {
633 int align_addr, new_align;
634
635 uid = INSN_UID (align_label);
636 align_addr = INSN_ADDRESSES (uid) - insn_lengths[uid];
637 if (uid_shuid[uid] > end_shuid)
638 break;
639 known_align_log = LABEL_TO_ALIGNMENT (align_label);
640 new_align = 1 << known_align_log;
641 if (new_align < known_align)
642 continue;
643 fuzz += (-align_addr ^ growth) & (new_align - known_align);
644 known_align = new_align;
645 }
646 return fuzz;
647 }
648
649 /* Compute a worst-case reference address of a branch so that it
650 can be safely used in the presence of aligned labels. Since the
651 size of the branch itself is unknown, the size of the branch is
652 not included in the range. I.e. for a forward branch, the reference
653 address is the end address of the branch as known from the previous
654 branch shortening pass, minus a value to account for possible size
655 increase due to alignment. For a backward branch, it is the start
656 address of the branch as known from the current pass, plus a value
657 to account for possible size increase due to alignment.
658 NB.: Therefore, the maximum offset allowed for backward branches needs
659 to exclude the branch size. */
660
661 int
662 insn_current_reference_address (rtx branch)
663 {
664 rtx dest, seq;
665 int seq_uid;
666
667 if (! INSN_ADDRESSES_SET_P ())
668 return 0;
669
670 seq = NEXT_INSN (PREV_INSN (branch));
671 seq_uid = INSN_UID (seq);
672 if (!JUMP_P (branch))
673 /* This can happen for example on the PA; the objective is to know the
674 offset to address something in front of the start of the function.
675 Thus, we can treat it like a backward branch.
676 We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than
677 any alignment we'd encounter, so we skip the call to align_fuzz. */
678 return insn_current_address;
679 dest = JUMP_LABEL (branch);
680
681 /* BRANCH has no proper alignment chain set, so use SEQ.
682 BRANCH also has no INSN_SHUID. */
683 if (INSN_SHUID (seq) < INSN_SHUID (dest))
684 {
685 /* Forward branch. */
686 return (insn_last_address + insn_lengths[seq_uid]
687 - align_fuzz (seq, dest, length_unit_log, ~0));
688 }
689 else
690 {
691 /* Backward branch. */
692 return (insn_current_address
693 + align_fuzz (dest, seq, length_unit_log, ~0));
694 }
695 }
696 #endif /* HAVE_ATTR_length */
697 \f
698 /* Compute branch alignments based on frequency information in the
699 CFG. */
700
701 unsigned int
702 compute_alignments (void)
703 {
704 int log, max_skip, max_log;
705 basic_block bb;
706 int freq_max = 0;
707 int freq_threshold = 0;
708
709 if (label_align)
710 {
711 free (label_align);
712 label_align = 0;
713 }
714
715 max_labelno = max_label_num ();
716 min_labelno = get_first_label_num ();
717 label_align = XCNEWVEC (struct label_alignment, max_labelno - min_labelno + 1);
718
719 /* If not optimizing or optimizing for size, don't assign any alignments. */
720 if (! optimize || optimize_function_for_size_p (cfun))
721 return 0;
722
723 if (dump_file)
724 {
725 dump_flow_info (dump_file, TDF_DETAILS);
726 flow_loops_dump (dump_file, NULL, 1);
727 }
728 loop_optimizer_init (AVOID_CFG_MODIFICATIONS);
729 FOR_EACH_BB (bb)
730 if (bb->frequency > freq_max)
731 freq_max = bb->frequency;
732 freq_threshold = freq_max / PARAM_VALUE (PARAM_ALIGN_THRESHOLD);
733
734 if (dump_file)
735 fprintf(dump_file, "freq_max: %i\n",freq_max);
736 FOR_EACH_BB (bb)
737 {
738 rtx label = BB_HEAD (bb);
739 int fallthru_frequency = 0, branch_frequency = 0, has_fallthru = 0;
740 edge e;
741 edge_iterator ei;
742
743 if (!LABEL_P (label)
744 || optimize_bb_for_size_p (bb))
745 {
746 if (dump_file)
747 fprintf(dump_file, "BB %4i freq %4i loop %2i loop_depth %2i skipped.\n",
748 bb->index, bb->frequency, bb->loop_father->num, bb->loop_depth);
749 continue;
750 }
751 max_log = LABEL_ALIGN (label);
752 max_skip = targetm.asm_out.label_align_max_skip (label);
753
754 FOR_EACH_EDGE (e, ei, bb->preds)
755 {
756 if (e->flags & EDGE_FALLTHRU)
757 has_fallthru = 1, fallthru_frequency += EDGE_FREQUENCY (e);
758 else
759 branch_frequency += EDGE_FREQUENCY (e);
760 }
761 if (dump_file)
762 {
763 fprintf(dump_file, "BB %4i freq %4i loop %2i loop_depth %2i fall %4i branch %4i",
764 bb->index, bb->frequency, bb->loop_father->num,
765 bb->loop_depth,
766 fallthru_frequency, branch_frequency);
767 if (!bb->loop_father->inner && bb->loop_father->num)
768 fprintf (dump_file, " inner_loop");
769 if (bb->loop_father->header == bb)
770 fprintf (dump_file, " loop_header");
771 fprintf (dump_file, "\n");
772 }
773
774 /* There are two purposes to align block with no fallthru incoming edge:
775 1) to avoid fetch stalls when branch destination is near cache boundary
776 2) to improve cache efficiency in case the previous block is not executed
777 (so it does not need to be in the cache).
778
779 We to catch first case, we align frequently executed blocks.
780 To catch the second, we align blocks that are executed more frequently
781 than the predecessor and the predecessor is likely to not be executed
782 when function is called. */
783
784 if (!has_fallthru
785 && (branch_frequency > freq_threshold
786 || (bb->frequency > bb->prev_bb->frequency * 10
787 && (bb->prev_bb->frequency
788 <= ENTRY_BLOCK_PTR->frequency / 2))))
789 {
790 log = JUMP_ALIGN (label);
791 if (dump_file)
792 fprintf(dump_file, " jump alignment added.\n");
793 if (max_log < log)
794 {
795 max_log = log;
796 max_skip = targetm.asm_out.jump_align_max_skip (label);
797 }
798 }
799 /* In case block is frequent and reached mostly by non-fallthru edge,
800 align it. It is most likely a first block of loop. */
801 if (has_fallthru
802 && optimize_bb_for_speed_p (bb)
803 && branch_frequency + fallthru_frequency > freq_threshold
804 && (branch_frequency
805 > fallthru_frequency * PARAM_VALUE (PARAM_ALIGN_LOOP_ITERATIONS)))
806 {
807 log = LOOP_ALIGN (label);
808 if (dump_file)
809 fprintf(dump_file, " internal loop alignment added.\n");
810 if (max_log < log)
811 {
812 max_log = log;
813 max_skip = targetm.asm_out.loop_align_max_skip (label);
814 }
815 }
816 LABEL_TO_ALIGNMENT (label) = max_log;
817 LABEL_TO_MAX_SKIP (label) = max_skip;
818 }
819
820 loop_optimizer_finalize ();
821 free_dominance_info (CDI_DOMINATORS);
822 return 0;
823 }
824
825 struct rtl_opt_pass pass_compute_alignments =
826 {
827 {
828 RTL_PASS,
829 "alignments", /* name */
830 NULL, /* gate */
831 compute_alignments, /* execute */
832 NULL, /* sub */
833 NULL, /* next */
834 0, /* static_pass_number */
835 TV_NONE, /* tv_id */
836 0, /* properties_required */
837 0, /* properties_provided */
838 0, /* properties_destroyed */
839 0, /* todo_flags_start */
840 TODO_verify_rtl_sharing
841 | TODO_ggc_collect /* todo_flags_finish */
842 }
843 };
844
845 \f
846 /* Make a pass over all insns and compute their actual lengths by shortening
847 any branches of variable length if possible. */
848
849 /* shorten_branches might be called multiple times: for example, the SH
850 port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG.
851 In order to do this, it needs proper length information, which it obtains
852 by calling shorten_branches. This cannot be collapsed with
853 shorten_branches itself into a single pass unless we also want to integrate
854 reorg.c, since the branch splitting exposes new instructions with delay
855 slots. */
856
857 void
858 shorten_branches (rtx first ATTRIBUTE_UNUSED)
859 {
860 rtx insn;
861 int max_uid;
862 int i;
863 int max_log;
864 int max_skip;
865 #ifdef HAVE_ATTR_length
866 #define MAX_CODE_ALIGN 16
867 rtx seq;
868 int something_changed = 1;
869 char *varying_length;
870 rtx body;
871 int uid;
872 rtx align_tab[MAX_CODE_ALIGN];
873
874 #endif
875
876 /* Compute maximum UID and allocate label_align / uid_shuid. */
877 max_uid = get_max_uid ();
878
879 /* Free uid_shuid before reallocating it. */
880 free (uid_shuid);
881
882 uid_shuid = XNEWVEC (int, max_uid);
883
884 if (max_labelno != max_label_num ())
885 {
886 int old = max_labelno;
887 int n_labels;
888 int n_old_labels;
889
890 max_labelno = max_label_num ();
891
892 n_labels = max_labelno - min_labelno + 1;
893 n_old_labels = old - min_labelno + 1;
894
895 label_align = XRESIZEVEC (struct label_alignment, label_align, n_labels);
896
897 /* Range of labels grows monotonically in the function. Failing here
898 means that the initialization of array got lost. */
899 gcc_assert (n_old_labels <= n_labels);
900
901 memset (label_align + n_old_labels, 0,
902 (n_labels - n_old_labels) * sizeof (struct label_alignment));
903 }
904
905 /* Initialize label_align and set up uid_shuid to be strictly
906 monotonically rising with insn order. */
907 /* We use max_log here to keep track of the maximum alignment we want to
908 impose on the next CODE_LABEL (or the current one if we are processing
909 the CODE_LABEL itself). */
910
911 max_log = 0;
912 max_skip = 0;
913
914 for (insn = get_insns (), i = 1; insn; insn = NEXT_INSN (insn))
915 {
916 int log;
917
918 INSN_SHUID (insn) = i++;
919 if (INSN_P (insn))
920 continue;
921
922 if (LABEL_P (insn))
923 {
924 rtx next;
925 bool next_is_jumptable;
926
927 /* Merge in alignments computed by compute_alignments. */
928 log = LABEL_TO_ALIGNMENT (insn);
929 if (max_log < log)
930 {
931 max_log = log;
932 max_skip = LABEL_TO_MAX_SKIP (insn);
933 }
934
935 next = next_nonnote_insn (insn);
936 next_is_jumptable = next && JUMP_TABLE_DATA_P (next);
937 if (!next_is_jumptable)
938 {
939 log = LABEL_ALIGN (insn);
940 if (max_log < log)
941 {
942 max_log = log;
943 max_skip = targetm.asm_out.label_align_max_skip (insn);
944 }
945 }
946 /* ADDR_VECs only take room if read-only data goes into the text
947 section. */
948 if ((JUMP_TABLES_IN_TEXT_SECTION
949 || readonly_data_section == text_section)
950 && next_is_jumptable)
951 {
952 log = ADDR_VEC_ALIGN (next);
953 if (max_log < log)
954 {
955 max_log = log;
956 max_skip = targetm.asm_out.label_align_max_skip (insn);
957 }
958 }
959 LABEL_TO_ALIGNMENT (insn) = max_log;
960 LABEL_TO_MAX_SKIP (insn) = max_skip;
961 max_log = 0;
962 max_skip = 0;
963 }
964 else if (BARRIER_P (insn))
965 {
966 rtx label;
967
968 for (label = insn; label && ! INSN_P (label);
969 label = NEXT_INSN (label))
970 if (LABEL_P (label))
971 {
972 log = LABEL_ALIGN_AFTER_BARRIER (insn);
973 if (max_log < log)
974 {
975 max_log = log;
976 max_skip = targetm.asm_out.label_align_after_barrier_max_skip (label);
977 }
978 break;
979 }
980 }
981 }
982 #ifdef HAVE_ATTR_length
983
984 /* Allocate the rest of the arrays. */
985 insn_lengths = XNEWVEC (int, max_uid);
986 insn_lengths_max_uid = max_uid;
987 /* Syntax errors can lead to labels being outside of the main insn stream.
988 Initialize insn_addresses, so that we get reproducible results. */
989 INSN_ADDRESSES_ALLOC (max_uid);
990
991 varying_length = XCNEWVEC (char, max_uid);
992
993 /* Initialize uid_align. We scan instructions
994 from end to start, and keep in align_tab[n] the last seen insn
995 that does an alignment of at least n+1, i.e. the successor
996 in the alignment chain for an insn that does / has a known
997 alignment of n. */
998 uid_align = XCNEWVEC (rtx, max_uid);
999
1000 for (i = MAX_CODE_ALIGN; --i >= 0;)
1001 align_tab[i] = NULL_RTX;
1002 seq = get_last_insn ();
1003 for (; seq; seq = PREV_INSN (seq))
1004 {
1005 int uid = INSN_UID (seq);
1006 int log;
1007 log = (LABEL_P (seq) ? LABEL_TO_ALIGNMENT (seq) : 0);
1008 uid_align[uid] = align_tab[0];
1009 if (log)
1010 {
1011 /* Found an alignment label. */
1012 uid_align[uid] = align_tab[log];
1013 for (i = log - 1; i >= 0; i--)
1014 align_tab[i] = seq;
1015 }
1016 }
1017 #ifdef CASE_VECTOR_SHORTEN_MODE
1018 if (optimize)
1019 {
1020 /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum
1021 label fields. */
1022
1023 int min_shuid = INSN_SHUID (get_insns ()) - 1;
1024 int max_shuid = INSN_SHUID (get_last_insn ()) + 1;
1025 int rel;
1026
1027 for (insn = first; insn != 0; insn = NEXT_INSN (insn))
1028 {
1029 rtx min_lab = NULL_RTX, max_lab = NULL_RTX, pat;
1030 int len, i, min, max, insn_shuid;
1031 int min_align;
1032 addr_diff_vec_flags flags;
1033
1034 if (!JUMP_P (insn)
1035 || GET_CODE (PATTERN (insn)) != ADDR_DIFF_VEC)
1036 continue;
1037 pat = PATTERN (insn);
1038 len = XVECLEN (pat, 1);
1039 gcc_assert (len > 0);
1040 min_align = MAX_CODE_ALIGN;
1041 for (min = max_shuid, max = min_shuid, i = len - 1; i >= 0; i--)
1042 {
1043 rtx lab = XEXP (XVECEXP (pat, 1, i), 0);
1044 int shuid = INSN_SHUID (lab);
1045 if (shuid < min)
1046 {
1047 min = shuid;
1048 min_lab = lab;
1049 }
1050 if (shuid > max)
1051 {
1052 max = shuid;
1053 max_lab = lab;
1054 }
1055 if (min_align > LABEL_TO_ALIGNMENT (lab))
1056 min_align = LABEL_TO_ALIGNMENT (lab);
1057 }
1058 XEXP (pat, 2) = gen_rtx_LABEL_REF (Pmode, min_lab);
1059 XEXP (pat, 3) = gen_rtx_LABEL_REF (Pmode, max_lab);
1060 insn_shuid = INSN_SHUID (insn);
1061 rel = INSN_SHUID (XEXP (XEXP (pat, 0), 0));
1062 memset (&flags, 0, sizeof (flags));
1063 flags.min_align = min_align;
1064 flags.base_after_vec = rel > insn_shuid;
1065 flags.min_after_vec = min > insn_shuid;
1066 flags.max_after_vec = max > insn_shuid;
1067 flags.min_after_base = min > rel;
1068 flags.max_after_base = max > rel;
1069 ADDR_DIFF_VEC_FLAGS (pat) = flags;
1070 }
1071 }
1072 #endif /* CASE_VECTOR_SHORTEN_MODE */
1073
1074 /* Compute initial lengths, addresses, and varying flags for each insn. */
1075 for (insn_current_address = 0, insn = first;
1076 insn != 0;
1077 insn_current_address += insn_lengths[uid], insn = NEXT_INSN (insn))
1078 {
1079 uid = INSN_UID (insn);
1080
1081 insn_lengths[uid] = 0;
1082
1083 if (LABEL_P (insn))
1084 {
1085 int log = LABEL_TO_ALIGNMENT (insn);
1086 if (log)
1087 {
1088 int align = 1 << log;
1089 int new_address = (insn_current_address + align - 1) & -align;
1090 insn_lengths[uid] = new_address - insn_current_address;
1091 }
1092 }
1093
1094 INSN_ADDRESSES (uid) = insn_current_address + insn_lengths[uid];
1095
1096 if (NOTE_P (insn) || BARRIER_P (insn)
1097 || LABEL_P (insn) || DEBUG_INSN_P(insn))
1098 continue;
1099 if (INSN_DELETED_P (insn))
1100 continue;
1101
1102 body = PATTERN (insn);
1103 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
1104 {
1105 /* This only takes room if read-only data goes into the text
1106 section. */
1107 if (JUMP_TABLES_IN_TEXT_SECTION
1108 || readonly_data_section == text_section)
1109 insn_lengths[uid] = (XVECLEN (body,
1110 GET_CODE (body) == ADDR_DIFF_VEC)
1111 * GET_MODE_SIZE (GET_MODE (body)));
1112 /* Alignment is handled by ADDR_VEC_ALIGN. */
1113 }
1114 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
1115 insn_lengths[uid] = asm_insn_count (body) * insn_default_length (insn);
1116 else if (GET_CODE (body) == SEQUENCE)
1117 {
1118 int i;
1119 int const_delay_slots;
1120 #ifdef DELAY_SLOTS
1121 const_delay_slots = const_num_delay_slots (XVECEXP (body, 0, 0));
1122 #else
1123 const_delay_slots = 0;
1124 #endif
1125 /* Inside a delay slot sequence, we do not do any branch shortening
1126 if the shortening could change the number of delay slots
1127 of the branch. */
1128 for (i = 0; i < XVECLEN (body, 0); i++)
1129 {
1130 rtx inner_insn = XVECEXP (body, 0, i);
1131 int inner_uid = INSN_UID (inner_insn);
1132 int inner_length;
1133
1134 if (GET_CODE (body) == ASM_INPUT
1135 || asm_noperands (PATTERN (XVECEXP (body, 0, i))) >= 0)
1136 inner_length = (asm_insn_count (PATTERN (inner_insn))
1137 * insn_default_length (inner_insn));
1138 else
1139 inner_length = insn_default_length (inner_insn);
1140
1141 insn_lengths[inner_uid] = inner_length;
1142 if (const_delay_slots)
1143 {
1144 if ((varying_length[inner_uid]
1145 = insn_variable_length_p (inner_insn)) != 0)
1146 varying_length[uid] = 1;
1147 INSN_ADDRESSES (inner_uid) = (insn_current_address
1148 + insn_lengths[uid]);
1149 }
1150 else
1151 varying_length[inner_uid] = 0;
1152 insn_lengths[uid] += inner_length;
1153 }
1154 }
1155 else if (GET_CODE (body) != USE && GET_CODE (body) != CLOBBER)
1156 {
1157 insn_lengths[uid] = insn_default_length (insn);
1158 varying_length[uid] = insn_variable_length_p (insn);
1159 }
1160
1161 /* If needed, do any adjustment. */
1162 #ifdef ADJUST_INSN_LENGTH
1163 ADJUST_INSN_LENGTH (insn, insn_lengths[uid]);
1164 if (insn_lengths[uid] < 0)
1165 fatal_insn ("negative insn length", insn);
1166 #endif
1167 }
1168
1169 /* Now loop over all the insns finding varying length insns. For each,
1170 get the current insn length. If it has changed, reflect the change.
1171 When nothing changes for a full pass, we are done. */
1172
1173 while (something_changed)
1174 {
1175 something_changed = 0;
1176 insn_current_align = MAX_CODE_ALIGN - 1;
1177 for (insn_current_address = 0, insn = first;
1178 insn != 0;
1179 insn = NEXT_INSN (insn))
1180 {
1181 int new_length;
1182 #ifdef ADJUST_INSN_LENGTH
1183 int tmp_length;
1184 #endif
1185 int length_align;
1186
1187 uid = INSN_UID (insn);
1188
1189 if (LABEL_P (insn))
1190 {
1191 int log = LABEL_TO_ALIGNMENT (insn);
1192 if (log > insn_current_align)
1193 {
1194 int align = 1 << log;
1195 int new_address= (insn_current_address + align - 1) & -align;
1196 insn_lengths[uid] = new_address - insn_current_address;
1197 insn_current_align = log;
1198 insn_current_address = new_address;
1199 }
1200 else
1201 insn_lengths[uid] = 0;
1202 INSN_ADDRESSES (uid) = insn_current_address;
1203 continue;
1204 }
1205
1206 length_align = INSN_LENGTH_ALIGNMENT (insn);
1207 if (length_align < insn_current_align)
1208 insn_current_align = length_align;
1209
1210 insn_last_address = INSN_ADDRESSES (uid);
1211 INSN_ADDRESSES (uid) = insn_current_address;
1212
1213 #ifdef CASE_VECTOR_SHORTEN_MODE
1214 if (optimize && JUMP_P (insn)
1215 && GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
1216 {
1217 rtx body = PATTERN (insn);
1218 int old_length = insn_lengths[uid];
1219 rtx rel_lab = XEXP (XEXP (body, 0), 0);
1220 rtx min_lab = XEXP (XEXP (body, 2), 0);
1221 rtx max_lab = XEXP (XEXP (body, 3), 0);
1222 int rel_addr = INSN_ADDRESSES (INSN_UID (rel_lab));
1223 int min_addr = INSN_ADDRESSES (INSN_UID (min_lab));
1224 int max_addr = INSN_ADDRESSES (INSN_UID (max_lab));
1225 rtx prev;
1226 int rel_align = 0;
1227 addr_diff_vec_flags flags;
1228
1229 /* Avoid automatic aggregate initialization. */
1230 flags = ADDR_DIFF_VEC_FLAGS (body);
1231
1232 /* Try to find a known alignment for rel_lab. */
1233 for (prev = rel_lab;
1234 prev
1235 && ! insn_lengths[INSN_UID (prev)]
1236 && ! (varying_length[INSN_UID (prev)] & 1);
1237 prev = PREV_INSN (prev))
1238 if (varying_length[INSN_UID (prev)] & 2)
1239 {
1240 rel_align = LABEL_TO_ALIGNMENT (prev);
1241 break;
1242 }
1243
1244 /* See the comment on addr_diff_vec_flags in rtl.h for the
1245 meaning of the flags values. base: REL_LAB vec: INSN */
1246 /* Anything after INSN has still addresses from the last
1247 pass; adjust these so that they reflect our current
1248 estimate for this pass. */
1249 if (flags.base_after_vec)
1250 rel_addr += insn_current_address - insn_last_address;
1251 if (flags.min_after_vec)
1252 min_addr += insn_current_address - insn_last_address;
1253 if (flags.max_after_vec)
1254 max_addr += insn_current_address - insn_last_address;
1255 /* We want to know the worst case, i.e. lowest possible value
1256 for the offset of MIN_LAB. If MIN_LAB is after REL_LAB,
1257 its offset is positive, and we have to be wary of code shrink;
1258 otherwise, it is negative, and we have to be vary of code
1259 size increase. */
1260 if (flags.min_after_base)
1261 {
1262 /* If INSN is between REL_LAB and MIN_LAB, the size
1263 changes we are about to make can change the alignment
1264 within the observed offset, therefore we have to break
1265 it up into two parts that are independent. */
1266 if (! flags.base_after_vec && flags.min_after_vec)
1267 {
1268 min_addr -= align_fuzz (rel_lab, insn, rel_align, 0);
1269 min_addr -= align_fuzz (insn, min_lab, 0, 0);
1270 }
1271 else
1272 min_addr -= align_fuzz (rel_lab, min_lab, rel_align, 0);
1273 }
1274 else
1275 {
1276 if (flags.base_after_vec && ! flags.min_after_vec)
1277 {
1278 min_addr -= align_fuzz (min_lab, insn, 0, ~0);
1279 min_addr -= align_fuzz (insn, rel_lab, 0, ~0);
1280 }
1281 else
1282 min_addr -= align_fuzz (min_lab, rel_lab, 0, ~0);
1283 }
1284 /* Likewise, determine the highest lowest possible value
1285 for the offset of MAX_LAB. */
1286 if (flags.max_after_base)
1287 {
1288 if (! flags.base_after_vec && flags.max_after_vec)
1289 {
1290 max_addr += align_fuzz (rel_lab, insn, rel_align, ~0);
1291 max_addr += align_fuzz (insn, max_lab, 0, ~0);
1292 }
1293 else
1294 max_addr += align_fuzz (rel_lab, max_lab, rel_align, ~0);
1295 }
1296 else
1297 {
1298 if (flags.base_after_vec && ! flags.max_after_vec)
1299 {
1300 max_addr += align_fuzz (max_lab, insn, 0, 0);
1301 max_addr += align_fuzz (insn, rel_lab, 0, 0);
1302 }
1303 else
1304 max_addr += align_fuzz (max_lab, rel_lab, 0, 0);
1305 }
1306 PUT_MODE (body, CASE_VECTOR_SHORTEN_MODE (min_addr - rel_addr,
1307 max_addr - rel_addr,
1308 body));
1309 if (JUMP_TABLES_IN_TEXT_SECTION
1310 || readonly_data_section == text_section)
1311 {
1312 insn_lengths[uid]
1313 = (XVECLEN (body, 1) * GET_MODE_SIZE (GET_MODE (body)));
1314 insn_current_address += insn_lengths[uid];
1315 if (insn_lengths[uid] != old_length)
1316 something_changed = 1;
1317 }
1318
1319 continue;
1320 }
1321 #endif /* CASE_VECTOR_SHORTEN_MODE */
1322
1323 if (! (varying_length[uid]))
1324 {
1325 if (NONJUMP_INSN_P (insn)
1326 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1327 {
1328 int i;
1329
1330 body = PATTERN (insn);
1331 for (i = 0; i < XVECLEN (body, 0); i++)
1332 {
1333 rtx inner_insn = XVECEXP (body, 0, i);
1334 int inner_uid = INSN_UID (inner_insn);
1335
1336 INSN_ADDRESSES (inner_uid) = insn_current_address;
1337
1338 insn_current_address += insn_lengths[inner_uid];
1339 }
1340 }
1341 else
1342 insn_current_address += insn_lengths[uid];
1343
1344 continue;
1345 }
1346
1347 if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
1348 {
1349 int i;
1350
1351 body = PATTERN (insn);
1352 new_length = 0;
1353 for (i = 0; i < XVECLEN (body, 0); i++)
1354 {
1355 rtx inner_insn = XVECEXP (body, 0, i);
1356 int inner_uid = INSN_UID (inner_insn);
1357 int inner_length;
1358
1359 INSN_ADDRESSES (inner_uid) = insn_current_address;
1360
1361 /* insn_current_length returns 0 for insns with a
1362 non-varying length. */
1363 if (! varying_length[inner_uid])
1364 inner_length = insn_lengths[inner_uid];
1365 else
1366 inner_length = insn_current_length (inner_insn);
1367
1368 if (inner_length != insn_lengths[inner_uid])
1369 {
1370 insn_lengths[inner_uid] = inner_length;
1371 something_changed = 1;
1372 }
1373 insn_current_address += insn_lengths[inner_uid];
1374 new_length += inner_length;
1375 }
1376 }
1377 else
1378 {
1379 new_length = insn_current_length (insn);
1380 insn_current_address += new_length;
1381 }
1382
1383 #ifdef ADJUST_INSN_LENGTH
1384 /* If needed, do any adjustment. */
1385 tmp_length = new_length;
1386 ADJUST_INSN_LENGTH (insn, new_length);
1387 insn_current_address += (new_length - tmp_length);
1388 #endif
1389
1390 if (new_length != insn_lengths[uid])
1391 {
1392 insn_lengths[uid] = new_length;
1393 something_changed = 1;
1394 }
1395 }
1396 /* For a non-optimizing compile, do only a single pass. */
1397 if (!optimize)
1398 break;
1399 }
1400
1401 free (varying_length);
1402
1403 #endif /* HAVE_ATTR_length */
1404 }
1405
1406 #ifdef HAVE_ATTR_length
1407 /* Given the body of an INSN known to be generated by an ASM statement, return
1408 the number of machine instructions likely to be generated for this insn.
1409 This is used to compute its length. */
1410
1411 static int
1412 asm_insn_count (rtx body)
1413 {
1414 const char *templ;
1415
1416 if (GET_CODE (body) == ASM_INPUT)
1417 templ = XSTR (body, 0);
1418 else
1419 templ = decode_asm_operands (body, NULL, NULL, NULL, NULL, NULL);
1420
1421 return asm_str_count (templ);
1422 }
1423 #endif
1424
1425 /* Return the number of machine instructions likely to be generated for the
1426 inline-asm template. */
1427 int
1428 asm_str_count (const char *templ)
1429 {
1430 int count = 1;
1431
1432 if (!*templ)
1433 return 0;
1434
1435 for (; *templ; templ++)
1436 if (IS_ASM_LOGICAL_LINE_SEPARATOR (*templ, templ)
1437 || *templ == '\n')
1438 count++;
1439
1440 return count;
1441 }
1442 \f
1443 /* ??? This is probably the wrong place for these. */
1444 /* Structure recording the mapping from source file and directory
1445 names at compile time to those to be embedded in debug
1446 information. */
1447 typedef struct debug_prefix_map
1448 {
1449 const char *old_prefix;
1450 const char *new_prefix;
1451 size_t old_len;
1452 size_t new_len;
1453 struct debug_prefix_map *next;
1454 } debug_prefix_map;
1455
1456 /* Linked list of such structures. */
1457 debug_prefix_map *debug_prefix_maps;
1458
1459
1460 /* Record a debug file prefix mapping. ARG is the argument to
1461 -fdebug-prefix-map and must be of the form OLD=NEW. */
1462
1463 void
1464 add_debug_prefix_map (const char *arg)
1465 {
1466 debug_prefix_map *map;
1467 const char *p;
1468
1469 p = strchr (arg, '=');
1470 if (!p)
1471 {
1472 error ("invalid argument %qs to -fdebug-prefix-map", arg);
1473 return;
1474 }
1475 map = XNEW (debug_prefix_map);
1476 map->old_prefix = xstrndup (arg, p - arg);
1477 map->old_len = p - arg;
1478 p++;
1479 map->new_prefix = xstrdup (p);
1480 map->new_len = strlen (p);
1481 map->next = debug_prefix_maps;
1482 debug_prefix_maps = map;
1483 }
1484
1485 /* Perform user-specified mapping of debug filename prefixes. Return
1486 the new name corresponding to FILENAME. */
1487
1488 const char *
1489 remap_debug_filename (const char *filename)
1490 {
1491 debug_prefix_map *map;
1492 char *s;
1493 const char *name;
1494 size_t name_len;
1495
1496 for (map = debug_prefix_maps; map; map = map->next)
1497 if (filename_ncmp (filename, map->old_prefix, map->old_len) == 0)
1498 break;
1499 if (!map)
1500 return filename;
1501 name = filename + map->old_len;
1502 name_len = strlen (name) + 1;
1503 s = (char *) alloca (name_len + map->new_len);
1504 memcpy (s, map->new_prefix, map->new_len);
1505 memcpy (s + map->new_len, name, name_len);
1506 return ggc_strdup (s);
1507 }
1508 \f
1509 /* Return true if DWARF2 debug info can be emitted for DECL. */
1510
1511 static bool
1512 dwarf2_debug_info_emitted_p (tree decl)
1513 {
1514 if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG)
1515 return false;
1516
1517 if (DECL_IGNORED_P (decl))
1518 return false;
1519
1520 return true;
1521 }
1522
1523 /* Output assembler code for the start of a function,
1524 and initialize some of the variables in this file
1525 for the new function. The label for the function and associated
1526 assembler pseudo-ops have already been output in `assemble_start_function'.
1527
1528 FIRST is the first insn of the rtl for the function being compiled.
1529 FILE is the file to write assembler code to.
1530 OPTIMIZE_P is nonzero if we should eliminate redundant
1531 test and compare insns. */
1532
1533 void
1534 final_start_function (rtx first ATTRIBUTE_UNUSED, FILE *file,
1535 int optimize_p ATTRIBUTE_UNUSED)
1536 {
1537 block_depth = 0;
1538
1539 this_is_asm_operands = 0;
1540
1541 last_filename = locator_file (prologue_locator);
1542 last_linenum = locator_line (prologue_locator);
1543 last_discriminator = discriminator = 0;
1544
1545 high_block_linenum = high_function_linenum = last_linenum;
1546
1547 if (!DECL_IGNORED_P (current_function_decl))
1548 debug_hooks->begin_prologue (last_linenum, last_filename);
1549
1550 if (!dwarf2_debug_info_emitted_p (current_function_decl))
1551 dwarf2out_begin_prologue (0, NULL);
1552
1553 #ifdef LEAF_REG_REMAP
1554 if (current_function_uses_only_leaf_regs)
1555 leaf_renumber_regs (first);
1556 #endif
1557
1558 /* The Sun386i and perhaps other machines don't work right
1559 if the profiling code comes after the prologue. */
1560 if (targetm.profile_before_prologue () && crtl->profile)
1561 profile_function (file);
1562
1563 /* If debugging, assign block numbers to all of the blocks in this
1564 function. */
1565 if (write_symbols)
1566 {
1567 reemit_insn_block_notes ();
1568 number_blocks (current_function_decl);
1569 /* We never actually put out begin/end notes for the top-level
1570 block in the function. But, conceptually, that block is
1571 always needed. */
1572 TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl)) = 1;
1573 }
1574
1575 if (warn_frame_larger_than
1576 && get_frame_size () > frame_larger_than_size)
1577 {
1578 /* Issue a warning */
1579 warning (OPT_Wframe_larger_than_,
1580 "the frame size of %wd bytes is larger than %wd bytes",
1581 get_frame_size (), frame_larger_than_size);
1582 }
1583
1584 /* First output the function prologue: code to set up the stack frame. */
1585 targetm.asm_out.function_prologue (file, get_frame_size ());
1586
1587 /* If the machine represents the prologue as RTL, the profiling code must
1588 be emitted when NOTE_INSN_PROLOGUE_END is scanned. */
1589 #ifdef HAVE_prologue
1590 if (! HAVE_prologue)
1591 #endif
1592 profile_after_prologue (file);
1593 }
1594
1595 static void
1596 profile_after_prologue (FILE *file ATTRIBUTE_UNUSED)
1597 {
1598 if (!targetm.profile_before_prologue () && crtl->profile)
1599 profile_function (file);
1600 }
1601
1602 static void
1603 profile_function (FILE *file ATTRIBUTE_UNUSED)
1604 {
1605 #ifndef NO_PROFILE_COUNTERS
1606 # define NO_PROFILE_COUNTERS 0
1607 #endif
1608 #ifdef ASM_OUTPUT_REG_PUSH
1609 rtx sval = NULL, chain = NULL;
1610
1611 if (cfun->returns_struct)
1612 sval = targetm.calls.struct_value_rtx (TREE_TYPE (current_function_decl),
1613 true);
1614 if (cfun->static_chain_decl)
1615 chain = targetm.calls.static_chain (current_function_decl, true);
1616 #endif /* ASM_OUTPUT_REG_PUSH */
1617
1618 if (! NO_PROFILE_COUNTERS)
1619 {
1620 int align = MIN (BIGGEST_ALIGNMENT, LONG_TYPE_SIZE);
1621 switch_to_section (data_section);
1622 ASM_OUTPUT_ALIGN (file, floor_log2 (align / BITS_PER_UNIT));
1623 targetm.asm_out.internal_label (file, "LP", current_function_funcdef_no);
1624 assemble_integer (const0_rtx, LONG_TYPE_SIZE / BITS_PER_UNIT, align, 1);
1625 }
1626
1627 switch_to_section (current_function_section ());
1628
1629 #ifdef ASM_OUTPUT_REG_PUSH
1630 if (sval && REG_P (sval))
1631 ASM_OUTPUT_REG_PUSH (file, REGNO (sval));
1632 if (chain && REG_P (chain))
1633 ASM_OUTPUT_REG_PUSH (file, REGNO (chain));
1634 #endif
1635
1636 FUNCTION_PROFILER (file, current_function_funcdef_no);
1637
1638 #ifdef ASM_OUTPUT_REG_PUSH
1639 if (chain && REG_P (chain))
1640 ASM_OUTPUT_REG_POP (file, REGNO (chain));
1641 if (sval && REG_P (sval))
1642 ASM_OUTPUT_REG_POP (file, REGNO (sval));
1643 #endif
1644 }
1645
1646 /* Output assembler code for the end of a function.
1647 For clarity, args are same as those of `final_start_function'
1648 even though not all of them are needed. */
1649
1650 void
1651 final_end_function (void)
1652 {
1653 app_disable ();
1654
1655 if (!DECL_IGNORED_P (current_function_decl))
1656 debug_hooks->end_function (high_function_linenum);
1657
1658 /* Finally, output the function epilogue:
1659 code to restore the stack frame and return to the caller. */
1660 targetm.asm_out.function_epilogue (asm_out_file, get_frame_size ());
1661
1662 /* And debug output. */
1663 if (!DECL_IGNORED_P (current_function_decl))
1664 debug_hooks->end_epilogue (last_linenum, last_filename);
1665
1666 if (!dwarf2_debug_info_emitted_p (current_function_decl)
1667 && dwarf2out_do_frame ())
1668 dwarf2out_end_epilogue (last_linenum, last_filename);
1669 }
1670 \f
1671
1672 /* Dumper helper for basic block information. FILE is the assembly
1673 output file, and INSN is the instruction being emitted. */
1674
1675 static void
1676 dump_basic_block_info (FILE *file, rtx insn, basic_block *start_to_bb,
1677 basic_block *end_to_bb, int bb_map_size, int *bb_seqn)
1678 {
1679 basic_block bb;
1680
1681 if (!flag_debug_asm)
1682 return;
1683
1684 if (INSN_UID (insn) < bb_map_size
1685 && (bb = start_to_bb[INSN_UID (insn)]) != NULL)
1686 {
1687 edge e;
1688 edge_iterator ei;
1689
1690 fprintf (file, "%s BLOCK %d", ASM_COMMENT_START, bb->index);
1691 if (bb->frequency)
1692 fprintf (file, " freq:%d", bb->frequency);
1693 if (bb->count)
1694 fprintf (file, " count:" HOST_WIDEST_INT_PRINT_DEC,
1695 bb->count);
1696 fprintf (file, " seq:%d", (*bb_seqn)++);
1697 fprintf (file, "\n%s PRED:", ASM_COMMENT_START);
1698 FOR_EACH_EDGE (e, ei, bb->preds)
1699 {
1700 dump_edge_info (file, e, 0);
1701 }
1702 fprintf (file, "\n");
1703 }
1704 if (INSN_UID (insn) < bb_map_size
1705 && (bb = end_to_bb[INSN_UID (insn)]) != NULL)
1706 {
1707 edge e;
1708 edge_iterator ei;
1709
1710 fprintf (asm_out_file, "%s SUCC:", ASM_COMMENT_START);
1711 FOR_EACH_EDGE (e, ei, bb->succs)
1712 {
1713 dump_edge_info (asm_out_file, e, 1);
1714 }
1715 fprintf (file, "\n");
1716 }
1717 }
1718
1719 /* Output assembler code for some insns: all or part of a function.
1720 For description of args, see `final_start_function', above. */
1721
1722 void
1723 final (rtx first, FILE *file, int optimize_p)
1724 {
1725 rtx insn, next;
1726 int max_uid = 0;
1727 int seen = 0;
1728
1729 /* Used for -dA dump. */
1730 basic_block *start_to_bb = NULL;
1731 basic_block *end_to_bb = NULL;
1732 int bb_map_size = 0;
1733 int bb_seqn = 0;
1734
1735 last_ignored_compare = 0;
1736
1737 for (insn = first; insn; insn = NEXT_INSN (insn))
1738 {
1739 if (INSN_UID (insn) > max_uid) /* Find largest UID. */
1740 max_uid = INSN_UID (insn);
1741 #ifdef HAVE_cc0
1742 /* If CC tracking across branches is enabled, record the insn which
1743 jumps to each branch only reached from one place. */
1744 if (optimize_p && JUMP_P (insn))
1745 {
1746 rtx lab = JUMP_LABEL (insn);
1747 if (lab && LABEL_NUSES (lab) == 1)
1748 {
1749 LABEL_REFS (lab) = insn;
1750 }
1751 }
1752 #endif
1753 }
1754
1755 init_recog ();
1756
1757 CC_STATUS_INIT;
1758
1759 if (flag_debug_asm)
1760 {
1761 basic_block bb;
1762
1763 bb_map_size = get_max_uid () + 1;
1764 start_to_bb = XCNEWVEC (basic_block, bb_map_size);
1765 end_to_bb = XCNEWVEC (basic_block, bb_map_size);
1766
1767 FOR_EACH_BB_REVERSE (bb)
1768 {
1769 start_to_bb[INSN_UID (BB_HEAD (bb))] = bb;
1770 end_to_bb[INSN_UID (BB_END (bb))] = bb;
1771 }
1772 }
1773
1774 /* Output the insns. */
1775 for (insn = first; insn;)
1776 {
1777 #ifdef HAVE_ATTR_length
1778 if ((unsigned) INSN_UID (insn) >= INSN_ADDRESSES_SIZE ())
1779 {
1780 /* This can be triggered by bugs elsewhere in the compiler if
1781 new insns are created after init_insn_lengths is called. */
1782 gcc_assert (NOTE_P (insn));
1783 insn_current_address = -1;
1784 }
1785 else
1786 insn_current_address = INSN_ADDRESSES (INSN_UID (insn));
1787 #endif /* HAVE_ATTR_length */
1788
1789 dump_basic_block_info (file, insn, start_to_bb, end_to_bb,
1790 bb_map_size, &bb_seqn);
1791 insn = final_scan_insn (insn, file, optimize_p, 0, &seen);
1792 }
1793
1794 if (flag_debug_asm)
1795 {
1796 free (start_to_bb);
1797 free (end_to_bb);
1798 }
1799
1800 /* Remove CFI notes, to avoid compare-debug failures. */
1801 for (insn = first; insn; insn = next)
1802 {
1803 next = NEXT_INSN (insn);
1804 if (NOTE_P (insn)
1805 && (NOTE_KIND (insn) == NOTE_INSN_CFI
1806 || NOTE_KIND (insn) == NOTE_INSN_CFI_LABEL))
1807 delete_insn (insn);
1808 }
1809 }
1810 \f
1811 const char *
1812 get_insn_template (int code, rtx insn)
1813 {
1814 switch (insn_data[code].output_format)
1815 {
1816 case INSN_OUTPUT_FORMAT_SINGLE:
1817 return insn_data[code].output.single;
1818 case INSN_OUTPUT_FORMAT_MULTI:
1819 return insn_data[code].output.multi[which_alternative];
1820 case INSN_OUTPUT_FORMAT_FUNCTION:
1821 gcc_assert (insn);
1822 return (*insn_data[code].output.function) (recog_data.operand, insn);
1823
1824 default:
1825 gcc_unreachable ();
1826 }
1827 }
1828
1829 /* Emit the appropriate declaration for an alternate-entry-point
1830 symbol represented by INSN, to FILE. INSN is a CODE_LABEL with
1831 LABEL_KIND != LABEL_NORMAL.
1832
1833 The case fall-through in this function is intentional. */
1834 static void
1835 output_alternate_entry_point (FILE *file, rtx insn)
1836 {
1837 const char *name = LABEL_NAME (insn);
1838
1839 switch (LABEL_KIND (insn))
1840 {
1841 case LABEL_WEAK_ENTRY:
1842 #ifdef ASM_WEAKEN_LABEL
1843 ASM_WEAKEN_LABEL (file, name);
1844 #endif
1845 case LABEL_GLOBAL_ENTRY:
1846 targetm.asm_out.globalize_label (file, name);
1847 case LABEL_STATIC_ENTRY:
1848 #ifdef ASM_OUTPUT_TYPE_DIRECTIVE
1849 ASM_OUTPUT_TYPE_DIRECTIVE (file, name, "function");
1850 #endif
1851 ASM_OUTPUT_LABEL (file, name);
1852 break;
1853
1854 case LABEL_NORMAL:
1855 default:
1856 gcc_unreachable ();
1857 }
1858 }
1859
1860 /* Given a CALL_INSN, find and return the nested CALL. */
1861 static rtx
1862 call_from_call_insn (rtx insn)
1863 {
1864 rtx x;
1865 gcc_assert (CALL_P (insn));
1866 x = PATTERN (insn);
1867
1868 while (GET_CODE (x) != CALL)
1869 {
1870 switch (GET_CODE (x))
1871 {
1872 default:
1873 gcc_unreachable ();
1874 case COND_EXEC:
1875 x = COND_EXEC_CODE (x);
1876 break;
1877 case PARALLEL:
1878 x = XVECEXP (x, 0, 0);
1879 break;
1880 case SET:
1881 x = XEXP (x, 1);
1882 break;
1883 }
1884 }
1885 return x;
1886 }
1887
1888 /* The final scan for one insn, INSN.
1889 Args are same as in `final', except that INSN
1890 is the insn being scanned.
1891 Value returned is the next insn to be scanned.
1892
1893 NOPEEPHOLES is the flag to disallow peephole processing (currently
1894 used for within delayed branch sequence output).
1895
1896 SEEN is used to track the end of the prologue, for emitting
1897 debug information. We force the emission of a line note after
1898 both NOTE_INSN_PROLOGUE_END and NOTE_INSN_FUNCTION_BEG, or
1899 at the beginning of the second basic block, whichever comes
1900 first. */
1901
1902 rtx
1903 final_scan_insn (rtx insn, FILE *file, int optimize_p ATTRIBUTE_UNUSED,
1904 int nopeepholes ATTRIBUTE_UNUSED, int *seen)
1905 {
1906 #ifdef HAVE_cc0
1907 rtx set;
1908 #endif
1909 rtx next;
1910
1911 insn_counter++;
1912
1913 /* Ignore deleted insns. These can occur when we split insns (due to a
1914 template of "#") while not optimizing. */
1915 if (INSN_DELETED_P (insn))
1916 return NEXT_INSN (insn);
1917
1918 switch (GET_CODE (insn))
1919 {
1920 case NOTE:
1921 switch (NOTE_KIND (insn))
1922 {
1923 case NOTE_INSN_DELETED:
1924 break;
1925
1926 case NOTE_INSN_SWITCH_TEXT_SECTIONS:
1927 in_cold_section_p = !in_cold_section_p;
1928
1929 if (dwarf2out_do_frame ())
1930 dwarf2out_switch_text_section ();
1931 else if (!DECL_IGNORED_P (current_function_decl))
1932 debug_hooks->switch_text_section ();
1933
1934 switch_to_section (current_function_section ());
1935 targetm.asm_out.function_switched_text_sections (asm_out_file,
1936 current_function_decl,
1937 in_cold_section_p);
1938 break;
1939
1940 case NOTE_INSN_BASIC_BLOCK:
1941 if (targetm.asm_out.unwind_emit)
1942 targetm.asm_out.unwind_emit (asm_out_file, insn);
1943
1944 if ((*seen & (SEEN_EMITTED | SEEN_BB)) == SEEN_BB)
1945 {
1946 *seen |= SEEN_EMITTED;
1947 force_source_line = true;
1948 }
1949 else
1950 *seen |= SEEN_BB;
1951
1952 discriminator = NOTE_BASIC_BLOCK (insn)->discriminator;
1953
1954 break;
1955
1956 case NOTE_INSN_EH_REGION_BEG:
1957 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHB",
1958 NOTE_EH_HANDLER (insn));
1959 break;
1960
1961 case NOTE_INSN_EH_REGION_END:
1962 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHE",
1963 NOTE_EH_HANDLER (insn));
1964 break;
1965
1966 case NOTE_INSN_PROLOGUE_END:
1967 targetm.asm_out.function_end_prologue (file);
1968 profile_after_prologue (file);
1969
1970 if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE)
1971 {
1972 *seen |= SEEN_EMITTED;
1973 force_source_line = true;
1974 }
1975 else
1976 *seen |= SEEN_NOTE;
1977
1978 break;
1979
1980 case NOTE_INSN_EPILOGUE_BEG:
1981 (*debug_hooks->begin_epilogue) (last_linenum, last_filename);
1982 targetm.asm_out.function_begin_epilogue (file);
1983 break;
1984
1985 case NOTE_INSN_CFA_RESTORE_STATE:
1986 break;
1987
1988 case NOTE_INSN_CFI:
1989 dwarf2out_emit_cfi (NOTE_CFI (insn));
1990 break;
1991
1992 case NOTE_INSN_CFI_LABEL:
1993 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LCFI",
1994 NOTE_LABEL_NUMBER (insn));
1995 break;
1996
1997 case NOTE_INSN_FUNCTION_BEG:
1998 app_disable ();
1999 if (!DECL_IGNORED_P (current_function_decl))
2000 debug_hooks->end_prologue (last_linenum, last_filename);
2001
2002 if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE)
2003 {
2004 *seen |= SEEN_EMITTED;
2005 force_source_line = true;
2006 }
2007 else
2008 *seen |= SEEN_NOTE;
2009
2010 break;
2011
2012 case NOTE_INSN_BLOCK_BEG:
2013 if (debug_info_level == DINFO_LEVEL_NORMAL
2014 || debug_info_level == DINFO_LEVEL_VERBOSE
2015 || write_symbols == DWARF2_DEBUG
2016 || write_symbols == VMS_AND_DWARF2_DEBUG
2017 || write_symbols == VMS_DEBUG)
2018 {
2019 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
2020
2021 app_disable ();
2022 ++block_depth;
2023 high_block_linenum = last_linenum;
2024
2025 /* Output debugging info about the symbol-block beginning. */
2026 if (!DECL_IGNORED_P (current_function_decl))
2027 debug_hooks->begin_block (last_linenum, n);
2028
2029 /* Mark this block as output. */
2030 TREE_ASM_WRITTEN (NOTE_BLOCK (insn)) = 1;
2031 }
2032 if (write_symbols == DBX_DEBUG
2033 || write_symbols == SDB_DEBUG)
2034 {
2035 location_t *locus_ptr
2036 = block_nonartificial_location (NOTE_BLOCK (insn));
2037
2038 if (locus_ptr != NULL)
2039 {
2040 override_filename = LOCATION_FILE (*locus_ptr);
2041 override_linenum = LOCATION_LINE (*locus_ptr);
2042 }
2043 }
2044 break;
2045
2046 case NOTE_INSN_BLOCK_END:
2047 if (debug_info_level == DINFO_LEVEL_NORMAL
2048 || debug_info_level == DINFO_LEVEL_VERBOSE
2049 || write_symbols == DWARF2_DEBUG
2050 || write_symbols == VMS_AND_DWARF2_DEBUG
2051 || write_symbols == VMS_DEBUG)
2052 {
2053 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
2054
2055 app_disable ();
2056
2057 /* End of a symbol-block. */
2058 --block_depth;
2059 gcc_assert (block_depth >= 0);
2060
2061 if (!DECL_IGNORED_P (current_function_decl))
2062 debug_hooks->end_block (high_block_linenum, n);
2063 }
2064 if (write_symbols == DBX_DEBUG
2065 || write_symbols == SDB_DEBUG)
2066 {
2067 tree outer_block = BLOCK_SUPERCONTEXT (NOTE_BLOCK (insn));
2068 location_t *locus_ptr
2069 = block_nonartificial_location (outer_block);
2070
2071 if (locus_ptr != NULL)
2072 {
2073 override_filename = LOCATION_FILE (*locus_ptr);
2074 override_linenum = LOCATION_LINE (*locus_ptr);
2075 }
2076 else
2077 {
2078 override_filename = NULL;
2079 override_linenum = 0;
2080 }
2081 }
2082 break;
2083
2084 case NOTE_INSN_DELETED_LABEL:
2085 /* Emit the label. We may have deleted the CODE_LABEL because
2086 the label could be proved to be unreachable, though still
2087 referenced (in the form of having its address taken. */
2088 ASM_OUTPUT_DEBUG_LABEL (file, "L", CODE_LABEL_NUMBER (insn));
2089 break;
2090
2091 case NOTE_INSN_VAR_LOCATION:
2092 case NOTE_INSN_CALL_ARG_LOCATION:
2093 if (!DECL_IGNORED_P (current_function_decl))
2094 debug_hooks->var_location (insn);
2095 break;
2096
2097 default:
2098 gcc_unreachable ();
2099 break;
2100 }
2101 break;
2102
2103 case BARRIER:
2104 break;
2105
2106 case CODE_LABEL:
2107 /* The target port might emit labels in the output function for
2108 some insn, e.g. sh.c output_branchy_insn. */
2109 if (CODE_LABEL_NUMBER (insn) <= max_labelno)
2110 {
2111 int align = LABEL_TO_ALIGNMENT (insn);
2112 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2113 int max_skip = LABEL_TO_MAX_SKIP (insn);
2114 #endif
2115
2116 if (align && NEXT_INSN (insn))
2117 {
2118 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2119 ASM_OUTPUT_MAX_SKIP_ALIGN (file, align, max_skip);
2120 #else
2121 #ifdef ASM_OUTPUT_ALIGN_WITH_NOP
2122 ASM_OUTPUT_ALIGN_WITH_NOP (file, align);
2123 #else
2124 ASM_OUTPUT_ALIGN (file, align);
2125 #endif
2126 #endif
2127 }
2128 }
2129 CC_STATUS_INIT;
2130
2131 if (!DECL_IGNORED_P (current_function_decl) && LABEL_NAME (insn))
2132 debug_hooks->label (insn);
2133
2134 app_disable ();
2135
2136 next = next_nonnote_insn (insn);
2137 /* If this label is followed by a jump-table, make sure we put
2138 the label in the read-only section. Also possibly write the
2139 label and jump table together. */
2140 if (next != 0 && JUMP_TABLE_DATA_P (next))
2141 {
2142 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2143 /* In this case, the case vector is being moved by the
2144 target, so don't output the label at all. Leave that
2145 to the back end macros. */
2146 #else
2147 if (! JUMP_TABLES_IN_TEXT_SECTION)
2148 {
2149 int log_align;
2150
2151 switch_to_section (targetm.asm_out.function_rodata_section
2152 (current_function_decl));
2153
2154 #ifdef ADDR_VEC_ALIGN
2155 log_align = ADDR_VEC_ALIGN (next);
2156 #else
2157 log_align = exact_log2 (BIGGEST_ALIGNMENT / BITS_PER_UNIT);
2158 #endif
2159 ASM_OUTPUT_ALIGN (file, log_align);
2160 }
2161 else
2162 switch_to_section (current_function_section ());
2163
2164 #ifdef ASM_OUTPUT_CASE_LABEL
2165 ASM_OUTPUT_CASE_LABEL (file, "L", CODE_LABEL_NUMBER (insn),
2166 next);
2167 #else
2168 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn));
2169 #endif
2170 #endif
2171 break;
2172 }
2173 if (LABEL_ALT_ENTRY_P (insn))
2174 output_alternate_entry_point (file, insn);
2175 else
2176 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn));
2177 break;
2178
2179 default:
2180 {
2181 rtx body = PATTERN (insn);
2182 int insn_code_number;
2183 const char *templ;
2184 bool is_stmt;
2185
2186 /* Reset this early so it is correct for ASM statements. */
2187 current_insn_predicate = NULL_RTX;
2188
2189 /* An INSN, JUMP_INSN or CALL_INSN.
2190 First check for special kinds that recog doesn't recognize. */
2191
2192 if (GET_CODE (body) == USE /* These are just declarations. */
2193 || GET_CODE (body) == CLOBBER)
2194 break;
2195
2196 #ifdef HAVE_cc0
2197 {
2198 /* If there is a REG_CC_SETTER note on this insn, it means that
2199 the setting of the condition code was done in the delay slot
2200 of the insn that branched here. So recover the cc status
2201 from the insn that set it. */
2202
2203 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2204 if (note)
2205 {
2206 NOTICE_UPDATE_CC (PATTERN (XEXP (note, 0)), XEXP (note, 0));
2207 cc_prev_status = cc_status;
2208 }
2209 }
2210 #endif
2211
2212 /* Detect insns that are really jump-tables
2213 and output them as such. */
2214
2215 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
2216 {
2217 #if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC))
2218 int vlen, idx;
2219 #endif
2220
2221 if (! JUMP_TABLES_IN_TEXT_SECTION)
2222 switch_to_section (targetm.asm_out.function_rodata_section
2223 (current_function_decl));
2224 else
2225 switch_to_section (current_function_section ());
2226
2227 app_disable ();
2228
2229 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2230 if (GET_CODE (body) == ADDR_VEC)
2231 {
2232 #ifdef ASM_OUTPUT_ADDR_VEC
2233 ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn), body);
2234 #else
2235 gcc_unreachable ();
2236 #endif
2237 }
2238 else
2239 {
2240 #ifdef ASM_OUTPUT_ADDR_DIFF_VEC
2241 ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn), body);
2242 #else
2243 gcc_unreachable ();
2244 #endif
2245 }
2246 #else
2247 vlen = XVECLEN (body, GET_CODE (body) == ADDR_DIFF_VEC);
2248 for (idx = 0; idx < vlen; idx++)
2249 {
2250 if (GET_CODE (body) == ADDR_VEC)
2251 {
2252 #ifdef ASM_OUTPUT_ADDR_VEC_ELT
2253 ASM_OUTPUT_ADDR_VEC_ELT
2254 (file, CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 0, idx), 0)));
2255 #else
2256 gcc_unreachable ();
2257 #endif
2258 }
2259 else
2260 {
2261 #ifdef ASM_OUTPUT_ADDR_DIFF_ELT
2262 ASM_OUTPUT_ADDR_DIFF_ELT
2263 (file,
2264 body,
2265 CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 1, idx), 0)),
2266 CODE_LABEL_NUMBER (XEXP (XEXP (body, 0), 0)));
2267 #else
2268 gcc_unreachable ();
2269 #endif
2270 }
2271 }
2272 #ifdef ASM_OUTPUT_CASE_END
2273 ASM_OUTPUT_CASE_END (file,
2274 CODE_LABEL_NUMBER (PREV_INSN (insn)),
2275 insn);
2276 #endif
2277 #endif
2278
2279 switch_to_section (current_function_section ());
2280
2281 break;
2282 }
2283 /* Output this line note if it is the first or the last line
2284 note in a row. */
2285 if (!DECL_IGNORED_P (current_function_decl)
2286 && notice_source_line (insn, &is_stmt))
2287 (*debug_hooks->source_line) (last_linenum, last_filename,
2288 last_discriminator, is_stmt);
2289
2290 if (GET_CODE (body) == ASM_INPUT)
2291 {
2292 const char *string = XSTR (body, 0);
2293
2294 /* There's no telling what that did to the condition codes. */
2295 CC_STATUS_INIT;
2296
2297 if (string[0])
2298 {
2299 expanded_location loc;
2300
2301 app_enable ();
2302 loc = expand_location (ASM_INPUT_SOURCE_LOCATION (body));
2303 if (*loc.file && loc.line)
2304 fprintf (asm_out_file, "%s %i \"%s\" 1\n",
2305 ASM_COMMENT_START, loc.line, loc.file);
2306 fprintf (asm_out_file, "\t%s\n", string);
2307 #if HAVE_AS_LINE_ZERO
2308 if (*loc.file && loc.line)
2309 fprintf (asm_out_file, "%s 0 \"\" 2\n", ASM_COMMENT_START);
2310 #endif
2311 }
2312 break;
2313 }
2314
2315 /* Detect `asm' construct with operands. */
2316 if (asm_noperands (body) >= 0)
2317 {
2318 unsigned int noperands = asm_noperands (body);
2319 rtx *ops = XALLOCAVEC (rtx, noperands);
2320 const char *string;
2321 location_t loc;
2322 expanded_location expanded;
2323
2324 /* There's no telling what that did to the condition codes. */
2325 CC_STATUS_INIT;
2326
2327 /* Get out the operand values. */
2328 string = decode_asm_operands (body, ops, NULL, NULL, NULL, &loc);
2329 /* Inhibit dying on what would otherwise be compiler bugs. */
2330 insn_noperands = noperands;
2331 this_is_asm_operands = insn;
2332 expanded = expand_location (loc);
2333
2334 #ifdef FINAL_PRESCAN_INSN
2335 FINAL_PRESCAN_INSN (insn, ops, insn_noperands);
2336 #endif
2337
2338 /* Output the insn using them. */
2339 if (string[0])
2340 {
2341 app_enable ();
2342 if (expanded.file && expanded.line)
2343 fprintf (asm_out_file, "%s %i \"%s\" 1\n",
2344 ASM_COMMENT_START, expanded.line, expanded.file);
2345 output_asm_insn (string, ops);
2346 #if HAVE_AS_LINE_ZERO
2347 if (expanded.file && expanded.line)
2348 fprintf (asm_out_file, "%s 0 \"\" 2\n", ASM_COMMENT_START);
2349 #endif
2350 }
2351
2352 if (targetm.asm_out.final_postscan_insn)
2353 targetm.asm_out.final_postscan_insn (file, insn, ops,
2354 insn_noperands);
2355
2356 this_is_asm_operands = 0;
2357 break;
2358 }
2359
2360 app_disable ();
2361
2362 if (GET_CODE (body) == SEQUENCE)
2363 {
2364 /* A delayed-branch sequence */
2365 int i;
2366
2367 final_sequence = body;
2368
2369 /* The first insn in this SEQUENCE might be a JUMP_INSN that will
2370 force the restoration of a comparison that was previously
2371 thought unnecessary. If that happens, cancel this sequence
2372 and cause that insn to be restored. */
2373
2374 next = final_scan_insn (XVECEXP (body, 0, 0), file, 0, 1, seen);
2375 if (next != XVECEXP (body, 0, 1))
2376 {
2377 final_sequence = 0;
2378 return next;
2379 }
2380
2381 for (i = 1; i < XVECLEN (body, 0); i++)
2382 {
2383 rtx insn = XVECEXP (body, 0, i);
2384 rtx next = NEXT_INSN (insn);
2385 /* We loop in case any instruction in a delay slot gets
2386 split. */
2387 do
2388 insn = final_scan_insn (insn, file, 0, 1, seen);
2389 while (insn != next);
2390 }
2391 #ifdef DBR_OUTPUT_SEQEND
2392 DBR_OUTPUT_SEQEND (file);
2393 #endif
2394 final_sequence = 0;
2395
2396 /* If the insn requiring the delay slot was a CALL_INSN, the
2397 insns in the delay slot are actually executed before the
2398 called function. Hence we don't preserve any CC-setting
2399 actions in these insns and the CC must be marked as being
2400 clobbered by the function. */
2401 if (CALL_P (XVECEXP (body, 0, 0)))
2402 {
2403 CC_STATUS_INIT;
2404 }
2405 break;
2406 }
2407
2408 /* We have a real machine instruction as rtl. */
2409
2410 body = PATTERN (insn);
2411
2412 #ifdef HAVE_cc0
2413 set = single_set (insn);
2414
2415 /* Check for redundant test and compare instructions
2416 (when the condition codes are already set up as desired).
2417 This is done only when optimizing; if not optimizing,
2418 it should be possible for the user to alter a variable
2419 with the debugger in between statements
2420 and the next statement should reexamine the variable
2421 to compute the condition codes. */
2422
2423 if (optimize_p)
2424 {
2425 if (set
2426 && GET_CODE (SET_DEST (set)) == CC0
2427 && insn != last_ignored_compare)
2428 {
2429 rtx src1, src2;
2430 if (GET_CODE (SET_SRC (set)) == SUBREG)
2431 SET_SRC (set) = alter_subreg (&SET_SRC (set));
2432
2433 src1 = SET_SRC (set);
2434 src2 = NULL_RTX;
2435 if (GET_CODE (SET_SRC (set)) == COMPARE)
2436 {
2437 if (GET_CODE (XEXP (SET_SRC (set), 0)) == SUBREG)
2438 XEXP (SET_SRC (set), 0)
2439 = alter_subreg (&XEXP (SET_SRC (set), 0));
2440 if (GET_CODE (XEXP (SET_SRC (set), 1)) == SUBREG)
2441 XEXP (SET_SRC (set), 1)
2442 = alter_subreg (&XEXP (SET_SRC (set), 1));
2443 if (XEXP (SET_SRC (set), 1)
2444 == CONST0_RTX (GET_MODE (XEXP (SET_SRC (set), 0))))
2445 src2 = XEXP (SET_SRC (set), 0);
2446 }
2447 if ((cc_status.value1 != 0
2448 && rtx_equal_p (src1, cc_status.value1))
2449 || (cc_status.value2 != 0
2450 && rtx_equal_p (src1, cc_status.value2))
2451 || (src2 != 0 && cc_status.value1 != 0
2452 && rtx_equal_p (src2, cc_status.value1))
2453 || (src2 != 0 && cc_status.value2 != 0
2454 && rtx_equal_p (src2, cc_status.value2)))
2455 {
2456 /* Don't delete insn if it has an addressing side-effect. */
2457 if (! FIND_REG_INC_NOTE (insn, NULL_RTX)
2458 /* or if anything in it is volatile. */
2459 && ! volatile_refs_p (PATTERN (insn)))
2460 {
2461 /* We don't really delete the insn; just ignore it. */
2462 last_ignored_compare = insn;
2463 break;
2464 }
2465 }
2466 }
2467 }
2468
2469 /* If this is a conditional branch, maybe modify it
2470 if the cc's are in a nonstandard state
2471 so that it accomplishes the same thing that it would
2472 do straightforwardly if the cc's were set up normally. */
2473
2474 if (cc_status.flags != 0
2475 && JUMP_P (insn)
2476 && GET_CODE (body) == SET
2477 && SET_DEST (body) == pc_rtx
2478 && GET_CODE (SET_SRC (body)) == IF_THEN_ELSE
2479 && COMPARISON_P (XEXP (SET_SRC (body), 0))
2480 && XEXP (XEXP (SET_SRC (body), 0), 0) == cc0_rtx)
2481 {
2482 /* This function may alter the contents of its argument
2483 and clear some of the cc_status.flags bits.
2484 It may also return 1 meaning condition now always true
2485 or -1 meaning condition now always false
2486 or 2 meaning condition nontrivial but altered. */
2487 int result = alter_cond (XEXP (SET_SRC (body), 0));
2488 /* If condition now has fixed value, replace the IF_THEN_ELSE
2489 with its then-operand or its else-operand. */
2490 if (result == 1)
2491 SET_SRC (body) = XEXP (SET_SRC (body), 1);
2492 if (result == -1)
2493 SET_SRC (body) = XEXP (SET_SRC (body), 2);
2494
2495 /* The jump is now either unconditional or a no-op.
2496 If it has become a no-op, don't try to output it.
2497 (It would not be recognized.) */
2498 if (SET_SRC (body) == pc_rtx)
2499 {
2500 delete_insn (insn);
2501 break;
2502 }
2503 else if (GET_CODE (SET_SRC (body)) == RETURN)
2504 /* Replace (set (pc) (return)) with (return). */
2505 PATTERN (insn) = body = SET_SRC (body);
2506
2507 /* Rerecognize the instruction if it has changed. */
2508 if (result != 0)
2509 INSN_CODE (insn) = -1;
2510 }
2511
2512 /* If this is a conditional trap, maybe modify it if the cc's
2513 are in a nonstandard state so that it accomplishes the same
2514 thing that it would do straightforwardly if the cc's were
2515 set up normally. */
2516 if (cc_status.flags != 0
2517 && NONJUMP_INSN_P (insn)
2518 && GET_CODE (body) == TRAP_IF
2519 && COMPARISON_P (TRAP_CONDITION (body))
2520 && XEXP (TRAP_CONDITION (body), 0) == cc0_rtx)
2521 {
2522 /* This function may alter the contents of its argument
2523 and clear some of the cc_status.flags bits.
2524 It may also return 1 meaning condition now always true
2525 or -1 meaning condition now always false
2526 or 2 meaning condition nontrivial but altered. */
2527 int result = alter_cond (TRAP_CONDITION (body));
2528
2529 /* If TRAP_CONDITION has become always false, delete the
2530 instruction. */
2531 if (result == -1)
2532 {
2533 delete_insn (insn);
2534 break;
2535 }
2536
2537 /* If TRAP_CONDITION has become always true, replace
2538 TRAP_CONDITION with const_true_rtx. */
2539 if (result == 1)
2540 TRAP_CONDITION (body) = const_true_rtx;
2541
2542 /* Rerecognize the instruction if it has changed. */
2543 if (result != 0)
2544 INSN_CODE (insn) = -1;
2545 }
2546
2547 /* Make same adjustments to instructions that examine the
2548 condition codes without jumping and instructions that
2549 handle conditional moves (if this machine has either one). */
2550
2551 if (cc_status.flags != 0
2552 && set != 0)
2553 {
2554 rtx cond_rtx, then_rtx, else_rtx;
2555
2556 if (!JUMP_P (insn)
2557 && GET_CODE (SET_SRC (set)) == IF_THEN_ELSE)
2558 {
2559 cond_rtx = XEXP (SET_SRC (set), 0);
2560 then_rtx = XEXP (SET_SRC (set), 1);
2561 else_rtx = XEXP (SET_SRC (set), 2);
2562 }
2563 else
2564 {
2565 cond_rtx = SET_SRC (set);
2566 then_rtx = const_true_rtx;
2567 else_rtx = const0_rtx;
2568 }
2569
2570 switch (GET_CODE (cond_rtx))
2571 {
2572 case GTU:
2573 case GT:
2574 case LTU:
2575 case LT:
2576 case GEU:
2577 case GE:
2578 case LEU:
2579 case LE:
2580 case EQ:
2581 case NE:
2582 {
2583 int result;
2584 if (XEXP (cond_rtx, 0) != cc0_rtx)
2585 break;
2586 result = alter_cond (cond_rtx);
2587 if (result == 1)
2588 validate_change (insn, &SET_SRC (set), then_rtx, 0);
2589 else if (result == -1)
2590 validate_change (insn, &SET_SRC (set), else_rtx, 0);
2591 else if (result == 2)
2592 INSN_CODE (insn) = -1;
2593 if (SET_DEST (set) == SET_SRC (set))
2594 delete_insn (insn);
2595 }
2596 break;
2597
2598 default:
2599 break;
2600 }
2601 }
2602
2603 #endif
2604
2605 #ifdef HAVE_peephole
2606 /* Do machine-specific peephole optimizations if desired. */
2607
2608 if (optimize_p && !flag_no_peephole && !nopeepholes)
2609 {
2610 rtx next = peephole (insn);
2611 /* When peepholing, if there were notes within the peephole,
2612 emit them before the peephole. */
2613 if (next != 0 && next != NEXT_INSN (insn))
2614 {
2615 rtx note, prev = PREV_INSN (insn);
2616
2617 for (note = NEXT_INSN (insn); note != next;
2618 note = NEXT_INSN (note))
2619 final_scan_insn (note, file, optimize_p, nopeepholes, seen);
2620
2621 /* Put the notes in the proper position for a later
2622 rescan. For example, the SH target can do this
2623 when generating a far jump in a delayed branch
2624 sequence. */
2625 note = NEXT_INSN (insn);
2626 PREV_INSN (note) = prev;
2627 NEXT_INSN (prev) = note;
2628 NEXT_INSN (PREV_INSN (next)) = insn;
2629 PREV_INSN (insn) = PREV_INSN (next);
2630 NEXT_INSN (insn) = next;
2631 PREV_INSN (next) = insn;
2632 }
2633
2634 /* PEEPHOLE might have changed this. */
2635 body = PATTERN (insn);
2636 }
2637 #endif
2638
2639 /* Try to recognize the instruction.
2640 If successful, verify that the operands satisfy the
2641 constraints for the instruction. Crash if they don't,
2642 since `reload' should have changed them so that they do. */
2643
2644 insn_code_number = recog_memoized (insn);
2645 cleanup_subreg_operands (insn);
2646
2647 /* Dump the insn in the assembly for debugging. */
2648 if (flag_dump_rtl_in_asm)
2649 {
2650 print_rtx_head = ASM_COMMENT_START;
2651 print_rtl_single (asm_out_file, insn);
2652 print_rtx_head = "";
2653 }
2654
2655 if (! constrain_operands_cached (1))
2656 fatal_insn_not_found (insn);
2657
2658 /* Some target machines need to prescan each insn before
2659 it is output. */
2660
2661 #ifdef FINAL_PRESCAN_INSN
2662 FINAL_PRESCAN_INSN (insn, recog_data.operand, recog_data.n_operands);
2663 #endif
2664
2665 if (targetm.have_conditional_execution ()
2666 && GET_CODE (PATTERN (insn)) == COND_EXEC)
2667 current_insn_predicate = COND_EXEC_TEST (PATTERN (insn));
2668
2669 #ifdef HAVE_cc0
2670 cc_prev_status = cc_status;
2671
2672 /* Update `cc_status' for this instruction.
2673 The instruction's output routine may change it further.
2674 If the output routine for a jump insn needs to depend
2675 on the cc status, it should look at cc_prev_status. */
2676
2677 NOTICE_UPDATE_CC (body, insn);
2678 #endif
2679
2680 current_output_insn = debug_insn = insn;
2681
2682 /* Find the proper template for this insn. */
2683 templ = get_insn_template (insn_code_number, insn);
2684
2685 /* If the C code returns 0, it means that it is a jump insn
2686 which follows a deleted test insn, and that test insn
2687 needs to be reinserted. */
2688 if (templ == 0)
2689 {
2690 rtx prev;
2691
2692 gcc_assert (prev_nonnote_insn (insn) == last_ignored_compare);
2693
2694 /* We have already processed the notes between the setter and
2695 the user. Make sure we don't process them again, this is
2696 particularly important if one of the notes is a block
2697 scope note or an EH note. */
2698 for (prev = insn;
2699 prev != last_ignored_compare;
2700 prev = PREV_INSN (prev))
2701 {
2702 if (NOTE_P (prev))
2703 delete_insn (prev); /* Use delete_note. */
2704 }
2705
2706 return prev;
2707 }
2708
2709 /* If the template is the string "#", it means that this insn must
2710 be split. */
2711 if (templ[0] == '#' && templ[1] == '\0')
2712 {
2713 rtx new_rtx = try_split (body, insn, 0);
2714
2715 /* If we didn't split the insn, go away. */
2716 if (new_rtx == insn && PATTERN (new_rtx) == body)
2717 fatal_insn ("could not split insn", insn);
2718
2719 #ifdef HAVE_ATTR_length
2720 /* This instruction should have been split in shorten_branches,
2721 to ensure that we would have valid length info for the
2722 splitees. */
2723 gcc_unreachable ();
2724 #endif
2725
2726 return new_rtx;
2727 }
2728
2729 /* ??? This will put the directives in the wrong place if
2730 get_insn_template outputs assembly directly. However calling it
2731 before get_insn_template breaks if the insns is split. */
2732 if (targetm.asm_out.unwind_emit_before_insn
2733 && targetm.asm_out.unwind_emit)
2734 targetm.asm_out.unwind_emit (asm_out_file, insn);
2735
2736 if (CALL_P (insn))
2737 {
2738 rtx x = call_from_call_insn (insn);
2739 x = XEXP (x, 0);
2740 if (x && MEM_P (x) && GET_CODE (XEXP (x, 0)) == SYMBOL_REF)
2741 {
2742 tree t;
2743 x = XEXP (x, 0);
2744 t = SYMBOL_REF_DECL (x);
2745 if (t)
2746 assemble_external (t);
2747 }
2748 if (!DECL_IGNORED_P (current_function_decl))
2749 debug_hooks->var_location (insn);
2750 }
2751
2752 /* Output assembler code from the template. */
2753 output_asm_insn (templ, recog_data.operand);
2754
2755 /* Some target machines need to postscan each insn after
2756 it is output. */
2757 if (targetm.asm_out.final_postscan_insn)
2758 targetm.asm_out.final_postscan_insn (file, insn, recog_data.operand,
2759 recog_data.n_operands);
2760
2761 if (!targetm.asm_out.unwind_emit_before_insn
2762 && targetm.asm_out.unwind_emit)
2763 targetm.asm_out.unwind_emit (asm_out_file, insn);
2764
2765 current_output_insn = debug_insn = 0;
2766 }
2767 }
2768 return NEXT_INSN (insn);
2769 }
2770 \f
2771 /* Return whether a source line note needs to be emitted before INSN.
2772 Sets IS_STMT to TRUE if the line should be marked as a possible
2773 breakpoint location. */
2774
2775 static bool
2776 notice_source_line (rtx insn, bool *is_stmt)
2777 {
2778 const char *filename;
2779 int linenum;
2780
2781 if (override_filename)
2782 {
2783 filename = override_filename;
2784 linenum = override_linenum;
2785 }
2786 else
2787 {
2788 filename = insn_file (insn);
2789 linenum = insn_line (insn);
2790 }
2791
2792 if (filename == NULL)
2793 return false;
2794
2795 if (force_source_line
2796 || filename != last_filename
2797 || last_linenum != linenum)
2798 {
2799 force_source_line = false;
2800 last_filename = filename;
2801 last_linenum = linenum;
2802 last_discriminator = discriminator;
2803 *is_stmt = true;
2804 high_block_linenum = MAX (last_linenum, high_block_linenum);
2805 high_function_linenum = MAX (last_linenum, high_function_linenum);
2806 return true;
2807 }
2808
2809 if (SUPPORTS_DISCRIMINATOR && last_discriminator != discriminator)
2810 {
2811 /* If the discriminator changed, but the line number did not,
2812 output the line table entry with is_stmt false so the
2813 debugger does not treat this as a breakpoint location. */
2814 last_discriminator = discriminator;
2815 *is_stmt = false;
2816 return true;
2817 }
2818
2819 return false;
2820 }
2821 \f
2822 /* For each operand in INSN, simplify (subreg (reg)) so that it refers
2823 directly to the desired hard register. */
2824
2825 void
2826 cleanup_subreg_operands (rtx insn)
2827 {
2828 int i;
2829 bool changed = false;
2830 extract_insn_cached (insn);
2831 for (i = 0; i < recog_data.n_operands; i++)
2832 {
2833 /* The following test cannot use recog_data.operand when testing
2834 for a SUBREG: the underlying object might have been changed
2835 already if we are inside a match_operator expression that
2836 matches the else clause. Instead we test the underlying
2837 expression directly. */
2838 if (GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
2839 {
2840 recog_data.operand[i] = alter_subreg (recog_data.operand_loc[i]);
2841 changed = true;
2842 }
2843 else if (GET_CODE (recog_data.operand[i]) == PLUS
2844 || GET_CODE (recog_data.operand[i]) == MULT
2845 || MEM_P (recog_data.operand[i]))
2846 recog_data.operand[i] = walk_alter_subreg (recog_data.operand_loc[i], &changed);
2847 }
2848
2849 for (i = 0; i < recog_data.n_dups; i++)
2850 {
2851 if (GET_CODE (*recog_data.dup_loc[i]) == SUBREG)
2852 {
2853 *recog_data.dup_loc[i] = alter_subreg (recog_data.dup_loc[i]);
2854 changed = true;
2855 }
2856 else if (GET_CODE (*recog_data.dup_loc[i]) == PLUS
2857 || GET_CODE (*recog_data.dup_loc[i]) == MULT
2858 || MEM_P (*recog_data.dup_loc[i]))
2859 *recog_data.dup_loc[i] = walk_alter_subreg (recog_data.dup_loc[i], &changed);
2860 }
2861 if (changed)
2862 df_insn_rescan (insn);
2863 }
2864
2865 /* If X is a SUBREG, replace it with a REG or a MEM,
2866 based on the thing it is a subreg of. */
2867
2868 rtx
2869 alter_subreg (rtx *xp)
2870 {
2871 rtx x = *xp;
2872 rtx y = SUBREG_REG (x);
2873
2874 /* simplify_subreg does not remove subreg from volatile references.
2875 We are required to. */
2876 if (MEM_P (y))
2877 {
2878 int offset = SUBREG_BYTE (x);
2879
2880 /* For paradoxical subregs on big-endian machines, SUBREG_BYTE
2881 contains 0 instead of the proper offset. See simplify_subreg. */
2882 if (offset == 0
2883 && GET_MODE_SIZE (GET_MODE (y)) < GET_MODE_SIZE (GET_MODE (x)))
2884 {
2885 int difference = GET_MODE_SIZE (GET_MODE (y))
2886 - GET_MODE_SIZE (GET_MODE (x));
2887 if (WORDS_BIG_ENDIAN)
2888 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
2889 if (BYTES_BIG_ENDIAN)
2890 offset += difference % UNITS_PER_WORD;
2891 }
2892
2893 *xp = adjust_address (y, GET_MODE (x), offset);
2894 }
2895 else
2896 {
2897 rtx new_rtx = simplify_subreg (GET_MODE (x), y, GET_MODE (y),
2898 SUBREG_BYTE (x));
2899
2900 if (new_rtx != 0)
2901 *xp = new_rtx;
2902 else if (REG_P (y))
2903 {
2904 /* Simplify_subreg can't handle some REG cases, but we have to. */
2905 unsigned int regno;
2906 HOST_WIDE_INT offset;
2907
2908 regno = subreg_regno (x);
2909 if (subreg_lowpart_p (x))
2910 offset = byte_lowpart_offset (GET_MODE (x), GET_MODE (y));
2911 else
2912 offset = SUBREG_BYTE (x);
2913 *xp = gen_rtx_REG_offset (y, GET_MODE (x), regno, offset);
2914 }
2915 }
2916
2917 return *xp;
2918 }
2919
2920 /* Do alter_subreg on all the SUBREGs contained in X. */
2921
2922 static rtx
2923 walk_alter_subreg (rtx *xp, bool *changed)
2924 {
2925 rtx x = *xp;
2926 switch (GET_CODE (x))
2927 {
2928 case PLUS:
2929 case MULT:
2930 case AND:
2931 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed);
2932 XEXP (x, 1) = walk_alter_subreg (&XEXP (x, 1), changed);
2933 break;
2934
2935 case MEM:
2936 case ZERO_EXTEND:
2937 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed);
2938 break;
2939
2940 case SUBREG:
2941 *changed = true;
2942 return alter_subreg (xp);
2943
2944 default:
2945 break;
2946 }
2947
2948 return *xp;
2949 }
2950 \f
2951 #ifdef HAVE_cc0
2952
2953 /* Given BODY, the body of a jump instruction, alter the jump condition
2954 as required by the bits that are set in cc_status.flags.
2955 Not all of the bits there can be handled at this level in all cases.
2956
2957 The value is normally 0.
2958 1 means that the condition has become always true.
2959 -1 means that the condition has become always false.
2960 2 means that COND has been altered. */
2961
2962 static int
2963 alter_cond (rtx cond)
2964 {
2965 int value = 0;
2966
2967 if (cc_status.flags & CC_REVERSED)
2968 {
2969 value = 2;
2970 PUT_CODE (cond, swap_condition (GET_CODE (cond)));
2971 }
2972
2973 if (cc_status.flags & CC_INVERTED)
2974 {
2975 value = 2;
2976 PUT_CODE (cond, reverse_condition (GET_CODE (cond)));
2977 }
2978
2979 if (cc_status.flags & CC_NOT_POSITIVE)
2980 switch (GET_CODE (cond))
2981 {
2982 case LE:
2983 case LEU:
2984 case GEU:
2985 /* Jump becomes unconditional. */
2986 return 1;
2987
2988 case GT:
2989 case GTU:
2990 case LTU:
2991 /* Jump becomes no-op. */
2992 return -1;
2993
2994 case GE:
2995 PUT_CODE (cond, EQ);
2996 value = 2;
2997 break;
2998
2999 case LT:
3000 PUT_CODE (cond, NE);
3001 value = 2;
3002 break;
3003
3004 default:
3005 break;
3006 }
3007
3008 if (cc_status.flags & CC_NOT_NEGATIVE)
3009 switch (GET_CODE (cond))
3010 {
3011 case GE:
3012 case GEU:
3013 /* Jump becomes unconditional. */
3014 return 1;
3015
3016 case LT:
3017 case LTU:
3018 /* Jump becomes no-op. */
3019 return -1;
3020
3021 case LE:
3022 case LEU:
3023 PUT_CODE (cond, EQ);
3024 value = 2;
3025 break;
3026
3027 case GT:
3028 case GTU:
3029 PUT_CODE (cond, NE);
3030 value = 2;
3031 break;
3032
3033 default:
3034 break;
3035 }
3036
3037 if (cc_status.flags & CC_NO_OVERFLOW)
3038 switch (GET_CODE (cond))
3039 {
3040 case GEU:
3041 /* Jump becomes unconditional. */
3042 return 1;
3043
3044 case LEU:
3045 PUT_CODE (cond, EQ);
3046 value = 2;
3047 break;
3048
3049 case GTU:
3050 PUT_CODE (cond, NE);
3051 value = 2;
3052 break;
3053
3054 case LTU:
3055 /* Jump becomes no-op. */
3056 return -1;
3057
3058 default:
3059 break;
3060 }
3061
3062 if (cc_status.flags & (CC_Z_IN_NOT_N | CC_Z_IN_N))
3063 switch (GET_CODE (cond))
3064 {
3065 default:
3066 gcc_unreachable ();
3067
3068 case NE:
3069 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? GE : LT);
3070 value = 2;
3071 break;
3072
3073 case EQ:
3074 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? LT : GE);
3075 value = 2;
3076 break;
3077 }
3078
3079 if (cc_status.flags & CC_NOT_SIGNED)
3080 /* The flags are valid if signed condition operators are converted
3081 to unsigned. */
3082 switch (GET_CODE (cond))
3083 {
3084 case LE:
3085 PUT_CODE (cond, LEU);
3086 value = 2;
3087 break;
3088
3089 case LT:
3090 PUT_CODE (cond, LTU);
3091 value = 2;
3092 break;
3093
3094 case GT:
3095 PUT_CODE (cond, GTU);
3096 value = 2;
3097 break;
3098
3099 case GE:
3100 PUT_CODE (cond, GEU);
3101 value = 2;
3102 break;
3103
3104 default:
3105 break;
3106 }
3107
3108 return value;
3109 }
3110 #endif
3111 \f
3112 /* Report inconsistency between the assembler template and the operands.
3113 In an `asm', it's the user's fault; otherwise, the compiler's fault. */
3114
3115 void
3116 output_operand_lossage (const char *cmsgid, ...)
3117 {
3118 char *fmt_string;
3119 char *new_message;
3120 const char *pfx_str;
3121 va_list ap;
3122
3123 va_start (ap, cmsgid);
3124
3125 pfx_str = this_is_asm_operands ? _("invalid 'asm': ") : "output_operand: ";
3126 asprintf (&fmt_string, "%s%s", pfx_str, _(cmsgid));
3127 vasprintf (&new_message, fmt_string, ap);
3128
3129 if (this_is_asm_operands)
3130 error_for_asm (this_is_asm_operands, "%s", new_message);
3131 else
3132 internal_error ("%s", new_message);
3133
3134 free (fmt_string);
3135 free (new_message);
3136 va_end (ap);
3137 }
3138 \f
3139 /* Output of assembler code from a template, and its subroutines. */
3140
3141 /* Annotate the assembly with a comment describing the pattern and
3142 alternative used. */
3143
3144 static void
3145 output_asm_name (void)
3146 {
3147 if (debug_insn)
3148 {
3149 int num = INSN_CODE (debug_insn);
3150 fprintf (asm_out_file, "\t%s %d\t%s",
3151 ASM_COMMENT_START, INSN_UID (debug_insn),
3152 insn_data[num].name);
3153 if (insn_data[num].n_alternatives > 1)
3154 fprintf (asm_out_file, "/%d", which_alternative + 1);
3155 #ifdef HAVE_ATTR_length
3156 fprintf (asm_out_file, "\t[length = %d]",
3157 get_attr_length (debug_insn));
3158 #endif
3159 /* Clear this so only the first assembler insn
3160 of any rtl insn will get the special comment for -dp. */
3161 debug_insn = 0;
3162 }
3163 }
3164
3165 /* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it
3166 or its address, return that expr . Set *PADDRESSP to 1 if the expr
3167 corresponds to the address of the object and 0 if to the object. */
3168
3169 static tree
3170 get_mem_expr_from_op (rtx op, int *paddressp)
3171 {
3172 tree expr;
3173 int inner_addressp;
3174
3175 *paddressp = 0;
3176
3177 if (REG_P (op))
3178 return REG_EXPR (op);
3179 else if (!MEM_P (op))
3180 return 0;
3181
3182 if (MEM_EXPR (op) != 0)
3183 return MEM_EXPR (op);
3184
3185 /* Otherwise we have an address, so indicate it and look at the address. */
3186 *paddressp = 1;
3187 op = XEXP (op, 0);
3188
3189 /* First check if we have a decl for the address, then look at the right side
3190 if it is a PLUS. Otherwise, strip off arithmetic and keep looking.
3191 But don't allow the address to itself be indirect. */
3192 if ((expr = get_mem_expr_from_op (op, &inner_addressp)) && ! inner_addressp)
3193 return expr;
3194 else if (GET_CODE (op) == PLUS
3195 && (expr = get_mem_expr_from_op (XEXP (op, 1), &inner_addressp)))
3196 return expr;
3197
3198 while (UNARY_P (op)
3199 || GET_RTX_CLASS (GET_CODE (op)) == RTX_BIN_ARITH)
3200 op = XEXP (op, 0);
3201
3202 expr = get_mem_expr_from_op (op, &inner_addressp);
3203 return inner_addressp ? 0 : expr;
3204 }
3205
3206 /* Output operand names for assembler instructions. OPERANDS is the
3207 operand vector, OPORDER is the order to write the operands, and NOPS
3208 is the number of operands to write. */
3209
3210 static void
3211 output_asm_operand_names (rtx *operands, int *oporder, int nops)
3212 {
3213 int wrote = 0;
3214 int i;
3215
3216 for (i = 0; i < nops; i++)
3217 {
3218 int addressp;
3219 rtx op = operands[oporder[i]];
3220 tree expr = get_mem_expr_from_op (op, &addressp);
3221
3222 fprintf (asm_out_file, "%c%s",
3223 wrote ? ',' : '\t', wrote ? "" : ASM_COMMENT_START);
3224 wrote = 1;
3225 if (expr)
3226 {
3227 fprintf (asm_out_file, "%s",
3228 addressp ? "*" : "");
3229 print_mem_expr (asm_out_file, expr);
3230 wrote = 1;
3231 }
3232 else if (REG_P (op) && ORIGINAL_REGNO (op)
3233 && ORIGINAL_REGNO (op) != REGNO (op))
3234 fprintf (asm_out_file, " tmp%i", ORIGINAL_REGNO (op));
3235 }
3236 }
3237
3238 /* Output text from TEMPLATE to the assembler output file,
3239 obeying %-directions to substitute operands taken from
3240 the vector OPERANDS.
3241
3242 %N (for N a digit) means print operand N in usual manner.
3243 %lN means require operand N to be a CODE_LABEL or LABEL_REF
3244 and print the label name with no punctuation.
3245 %cN means require operand N to be a constant
3246 and print the constant expression with no punctuation.
3247 %aN means expect operand N to be a memory address
3248 (not a memory reference!) and print a reference
3249 to that address.
3250 %nN means expect operand N to be a constant
3251 and print a constant expression for minus the value
3252 of the operand, with no other punctuation. */
3253
3254 void
3255 output_asm_insn (const char *templ, rtx *operands)
3256 {
3257 const char *p;
3258 int c;
3259 #ifdef ASSEMBLER_DIALECT
3260 int dialect = 0;
3261 #endif
3262 int oporder[MAX_RECOG_OPERANDS];
3263 char opoutput[MAX_RECOG_OPERANDS];
3264 int ops = 0;
3265
3266 /* An insn may return a null string template
3267 in a case where no assembler code is needed. */
3268 if (*templ == 0)
3269 return;
3270
3271 memset (opoutput, 0, sizeof opoutput);
3272 p = templ;
3273 putc ('\t', asm_out_file);
3274
3275 #ifdef ASM_OUTPUT_OPCODE
3276 ASM_OUTPUT_OPCODE (asm_out_file, p);
3277 #endif
3278
3279 while ((c = *p++))
3280 switch (c)
3281 {
3282 case '\n':
3283 if (flag_verbose_asm)
3284 output_asm_operand_names (operands, oporder, ops);
3285 if (flag_print_asm_name)
3286 output_asm_name ();
3287
3288 ops = 0;
3289 memset (opoutput, 0, sizeof opoutput);
3290
3291 putc (c, asm_out_file);
3292 #ifdef ASM_OUTPUT_OPCODE
3293 while ((c = *p) == '\t')
3294 {
3295 putc (c, asm_out_file);
3296 p++;
3297 }
3298 ASM_OUTPUT_OPCODE (asm_out_file, p);
3299 #endif
3300 break;
3301
3302 #ifdef ASSEMBLER_DIALECT
3303 case '{':
3304 {
3305 int i;
3306
3307 if (dialect)
3308 output_operand_lossage ("nested assembly dialect alternatives");
3309 else
3310 dialect = 1;
3311
3312 /* If we want the first dialect, do nothing. Otherwise, skip
3313 DIALECT_NUMBER of strings ending with '|'. */
3314 for (i = 0; i < dialect_number; i++)
3315 {
3316 while (*p && *p != '}' && *p++ != '|')
3317 ;
3318 if (*p == '}')
3319 break;
3320 if (*p == '|')
3321 p++;
3322 }
3323
3324 if (*p == '\0')
3325 output_operand_lossage ("unterminated assembly dialect alternative");
3326 }
3327 break;
3328
3329 case '|':
3330 if (dialect)
3331 {
3332 /* Skip to close brace. */
3333 do
3334 {
3335 if (*p == '\0')
3336 {
3337 output_operand_lossage ("unterminated assembly dialect alternative");
3338 break;
3339 }
3340 }
3341 while (*p++ != '}');
3342 dialect = 0;
3343 }
3344 else
3345 putc (c, asm_out_file);
3346 break;
3347
3348 case '}':
3349 if (! dialect)
3350 putc (c, asm_out_file);
3351 dialect = 0;
3352 break;
3353 #endif
3354
3355 case '%':
3356 /* %% outputs a single %. */
3357 if (*p == '%')
3358 {
3359 p++;
3360 putc (c, asm_out_file);
3361 }
3362 /* %= outputs a number which is unique to each insn in the entire
3363 compilation. This is useful for making local labels that are
3364 referred to more than once in a given insn. */
3365 else if (*p == '=')
3366 {
3367 p++;
3368 fprintf (asm_out_file, "%d", insn_counter);
3369 }
3370 /* % followed by a letter and some digits
3371 outputs an operand in a special way depending on the letter.
3372 Letters `acln' are implemented directly.
3373 Other letters are passed to `output_operand' so that
3374 the TARGET_PRINT_OPERAND hook can define them. */
3375 else if (ISALPHA (*p))
3376 {
3377 int letter = *p++;
3378 unsigned long opnum;
3379 char *endptr;
3380
3381 opnum = strtoul (p, &endptr, 10);
3382
3383 if (endptr == p)
3384 output_operand_lossage ("operand number missing "
3385 "after %%-letter");
3386 else if (this_is_asm_operands && opnum >= insn_noperands)
3387 output_operand_lossage ("operand number out of range");
3388 else if (letter == 'l')
3389 output_asm_label (operands[opnum]);
3390 else if (letter == 'a')
3391 output_address (operands[opnum]);
3392 else if (letter == 'c')
3393 {
3394 if (CONSTANT_ADDRESS_P (operands[opnum]))
3395 output_addr_const (asm_out_file, operands[opnum]);
3396 else
3397 output_operand (operands[opnum], 'c');
3398 }
3399 else if (letter == 'n')
3400 {
3401 if (CONST_INT_P (operands[opnum]))
3402 fprintf (asm_out_file, HOST_WIDE_INT_PRINT_DEC,
3403 - INTVAL (operands[opnum]));
3404 else
3405 {
3406 putc ('-', asm_out_file);
3407 output_addr_const (asm_out_file, operands[opnum]);
3408 }
3409 }
3410 else
3411 output_operand (operands[opnum], letter);
3412
3413 if (!opoutput[opnum])
3414 oporder[ops++] = opnum;
3415 opoutput[opnum] = 1;
3416
3417 p = endptr;
3418 c = *p;
3419 }
3420 /* % followed by a digit outputs an operand the default way. */
3421 else if (ISDIGIT (*p))
3422 {
3423 unsigned long opnum;
3424 char *endptr;
3425
3426 opnum = strtoul (p, &endptr, 10);
3427 if (this_is_asm_operands && opnum >= insn_noperands)
3428 output_operand_lossage ("operand number out of range");
3429 else
3430 output_operand (operands[opnum], 0);
3431
3432 if (!opoutput[opnum])
3433 oporder[ops++] = opnum;
3434 opoutput[opnum] = 1;
3435
3436 p = endptr;
3437 c = *p;
3438 }
3439 /* % followed by punctuation: output something for that
3440 punctuation character alone, with no operand. The
3441 TARGET_PRINT_OPERAND hook decides what is actually done. */
3442 else if (targetm.asm_out.print_operand_punct_valid_p ((unsigned char) *p))
3443 output_operand (NULL_RTX, *p++);
3444 else
3445 output_operand_lossage ("invalid %%-code");
3446 break;
3447
3448 default:
3449 putc (c, asm_out_file);
3450 }
3451
3452 /* Write out the variable names for operands, if we know them. */
3453 if (flag_verbose_asm)
3454 output_asm_operand_names (operands, oporder, ops);
3455 if (flag_print_asm_name)
3456 output_asm_name ();
3457
3458 putc ('\n', asm_out_file);
3459 }
3460 \f
3461 /* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */
3462
3463 void
3464 output_asm_label (rtx x)
3465 {
3466 char buf[256];
3467
3468 if (GET_CODE (x) == LABEL_REF)
3469 x = XEXP (x, 0);
3470 if (LABEL_P (x)
3471 || (NOTE_P (x)
3472 && NOTE_KIND (x) == NOTE_INSN_DELETED_LABEL))
3473 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3474 else
3475 output_operand_lossage ("'%%l' operand isn't a label");
3476
3477 assemble_name (asm_out_file, buf);
3478 }
3479
3480 /* Helper rtx-iteration-function for mark_symbol_refs_as_used and
3481 output_operand. Marks SYMBOL_REFs as referenced through use of
3482 assemble_external. */
3483
3484 static int
3485 mark_symbol_ref_as_used (rtx *xp, void *dummy ATTRIBUTE_UNUSED)
3486 {
3487 rtx x = *xp;
3488
3489 /* If we have a used symbol, we may have to emit assembly
3490 annotations corresponding to whether the symbol is external, weak
3491 or has non-default visibility. */
3492 if (GET_CODE (x) == SYMBOL_REF)
3493 {
3494 tree t;
3495
3496 t = SYMBOL_REF_DECL (x);
3497 if (t)
3498 assemble_external (t);
3499
3500 return -1;
3501 }
3502
3503 return 0;
3504 }
3505
3506 /* Marks SYMBOL_REFs in x as referenced through use of assemble_external. */
3507
3508 void
3509 mark_symbol_refs_as_used (rtx x)
3510 {
3511 for_each_rtx (&x, mark_symbol_ref_as_used, NULL);
3512 }
3513
3514 /* Print operand X using machine-dependent assembler syntax.
3515 CODE is a non-digit that preceded the operand-number in the % spec,
3516 such as 'z' if the spec was `%z3'. CODE is 0 if there was no char
3517 between the % and the digits.
3518 When CODE is a non-letter, X is 0.
3519
3520 The meanings of the letters are machine-dependent and controlled
3521 by TARGET_PRINT_OPERAND. */
3522
3523 void
3524 output_operand (rtx x, int code ATTRIBUTE_UNUSED)
3525 {
3526 if (x && GET_CODE (x) == SUBREG)
3527 x = alter_subreg (&x);
3528
3529 /* X must not be a pseudo reg. */
3530 gcc_assert (!x || !REG_P (x) || REGNO (x) < FIRST_PSEUDO_REGISTER);
3531
3532 targetm.asm_out.print_operand (asm_out_file, x, code);
3533
3534 if (x == NULL_RTX)
3535 return;
3536
3537 for_each_rtx (&x, mark_symbol_ref_as_used, NULL);
3538 }
3539
3540 /* Print a memory reference operand for address X using
3541 machine-dependent assembler syntax. */
3542
3543 void
3544 output_address (rtx x)
3545 {
3546 bool changed = false;
3547 walk_alter_subreg (&x, &changed);
3548 targetm.asm_out.print_operand_address (asm_out_file, x);
3549 }
3550 \f
3551 /* Print an integer constant expression in assembler syntax.
3552 Addition and subtraction are the only arithmetic
3553 that may appear in these expressions. */
3554
3555 void
3556 output_addr_const (FILE *file, rtx x)
3557 {
3558 char buf[256];
3559
3560 restart:
3561 switch (GET_CODE (x))
3562 {
3563 case PC:
3564 putc ('.', file);
3565 break;
3566
3567 case SYMBOL_REF:
3568 if (SYMBOL_REF_DECL (x))
3569 assemble_external (SYMBOL_REF_DECL (x));
3570 #ifdef ASM_OUTPUT_SYMBOL_REF
3571 ASM_OUTPUT_SYMBOL_REF (file, x);
3572 #else
3573 assemble_name (file, XSTR (x, 0));
3574 #endif
3575 break;
3576
3577 case LABEL_REF:
3578 x = XEXP (x, 0);
3579 /* Fall through. */
3580 case CODE_LABEL:
3581 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3582 #ifdef ASM_OUTPUT_LABEL_REF
3583 ASM_OUTPUT_LABEL_REF (file, buf);
3584 #else
3585 assemble_name (file, buf);
3586 #endif
3587 break;
3588
3589 case CONST_INT:
3590 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x));
3591 break;
3592
3593 case CONST:
3594 /* This used to output parentheses around the expression,
3595 but that does not work on the 386 (either ATT or BSD assembler). */
3596 output_addr_const (file, XEXP (x, 0));
3597 break;
3598
3599 case CONST_DOUBLE:
3600 if (GET_MODE (x) == VOIDmode)
3601 {
3602 /* We can use %d if the number is one word and positive. */
3603 if (CONST_DOUBLE_HIGH (x))
3604 fprintf (file, HOST_WIDE_INT_PRINT_DOUBLE_HEX,
3605 (unsigned HOST_WIDE_INT) CONST_DOUBLE_HIGH (x),
3606 (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (x));
3607 else if (CONST_DOUBLE_LOW (x) < 0)
3608 fprintf (file, HOST_WIDE_INT_PRINT_HEX,
3609 (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (x));
3610 else
3611 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x));
3612 }
3613 else
3614 /* We can't handle floating point constants;
3615 PRINT_OPERAND must handle them. */
3616 output_operand_lossage ("floating constant misused");
3617 break;
3618
3619 case CONST_FIXED:
3620 fprintf (file, HOST_WIDE_INT_PRINT_HEX,
3621 (unsigned HOST_WIDE_INT) CONST_FIXED_VALUE_LOW (x));
3622 break;
3623
3624 case PLUS:
3625 /* Some assemblers need integer constants to appear last (eg masm). */
3626 if (CONST_INT_P (XEXP (x, 0)))
3627 {
3628 output_addr_const (file, XEXP (x, 1));
3629 if (INTVAL (XEXP (x, 0)) >= 0)
3630 fprintf (file, "+");
3631 output_addr_const (file, XEXP (x, 0));
3632 }
3633 else
3634 {
3635 output_addr_const (file, XEXP (x, 0));
3636 if (!CONST_INT_P (XEXP (x, 1))
3637 || INTVAL (XEXP (x, 1)) >= 0)
3638 fprintf (file, "+");
3639 output_addr_const (file, XEXP (x, 1));
3640 }
3641 break;
3642
3643 case MINUS:
3644 /* Avoid outputting things like x-x or x+5-x,
3645 since some assemblers can't handle that. */
3646 x = simplify_subtraction (x);
3647 if (GET_CODE (x) != MINUS)
3648 goto restart;
3649
3650 output_addr_const (file, XEXP (x, 0));
3651 fprintf (file, "-");
3652 if ((CONST_INT_P (XEXP (x, 1)) && INTVAL (XEXP (x, 1)) >= 0)
3653 || GET_CODE (XEXP (x, 1)) == PC
3654 || GET_CODE (XEXP (x, 1)) == SYMBOL_REF)
3655 output_addr_const (file, XEXP (x, 1));
3656 else
3657 {
3658 fputs (targetm.asm_out.open_paren, file);
3659 output_addr_const (file, XEXP (x, 1));
3660 fputs (targetm.asm_out.close_paren, file);
3661 }
3662 break;
3663
3664 case ZERO_EXTEND:
3665 case SIGN_EXTEND:
3666 case SUBREG:
3667 case TRUNCATE:
3668 output_addr_const (file, XEXP (x, 0));
3669 break;
3670
3671 default:
3672 if (targetm.asm_out.output_addr_const_extra (file, x))
3673 break;
3674
3675 output_operand_lossage ("invalid expression as operand");
3676 }
3677 }
3678 \f
3679 /* Output a quoted string. */
3680
3681 void
3682 output_quoted_string (FILE *asm_file, const char *string)
3683 {
3684 #ifdef OUTPUT_QUOTED_STRING
3685 OUTPUT_QUOTED_STRING (asm_file, string);
3686 #else
3687 char c;
3688
3689 putc ('\"', asm_file);
3690 while ((c = *string++) != 0)
3691 {
3692 if (ISPRINT (c))
3693 {
3694 if (c == '\"' || c == '\\')
3695 putc ('\\', asm_file);
3696 putc (c, asm_file);
3697 }
3698 else
3699 fprintf (asm_file, "\\%03o", (unsigned char) c);
3700 }
3701 putc ('\"', asm_file);
3702 #endif
3703 }
3704 \f
3705 /* A poor man's fprintf, with the added features of %I, %R, %L, and %U.
3706 %R prints the value of REGISTER_PREFIX.
3707 %L prints the value of LOCAL_LABEL_PREFIX.
3708 %U prints the value of USER_LABEL_PREFIX.
3709 %I prints the value of IMMEDIATE_PREFIX.
3710 %O runs ASM_OUTPUT_OPCODE to transform what follows in the string.
3711 Also supported are %d, %i, %u, %x, %X, %o, %c, %s and %%.
3712
3713 We handle alternate assembler dialects here, just like output_asm_insn. */
3714
3715 void
3716 asm_fprintf (FILE *file, const char *p, ...)
3717 {
3718 char buf[10];
3719 char *q, c;
3720 va_list argptr;
3721
3722 va_start (argptr, p);
3723
3724 buf[0] = '%';
3725
3726 while ((c = *p++))
3727 switch (c)
3728 {
3729 #ifdef ASSEMBLER_DIALECT
3730 case '{':
3731 {
3732 int i;
3733
3734 /* If we want the first dialect, do nothing. Otherwise, skip
3735 DIALECT_NUMBER of strings ending with '|'. */
3736 for (i = 0; i < dialect_number; i++)
3737 {
3738 while (*p && *p++ != '|')
3739 ;
3740
3741 if (*p == '|')
3742 p++;
3743 }
3744 }
3745 break;
3746
3747 case '|':
3748 /* Skip to close brace. */
3749 while (*p && *p++ != '}')
3750 ;
3751 break;
3752
3753 case '}':
3754 break;
3755 #endif
3756
3757 case '%':
3758 c = *p++;
3759 q = &buf[1];
3760 while (strchr ("-+ #0", c))
3761 {
3762 *q++ = c;
3763 c = *p++;
3764 }
3765 while (ISDIGIT (c) || c == '.')
3766 {
3767 *q++ = c;
3768 c = *p++;
3769 }
3770 switch (c)
3771 {
3772 case '%':
3773 putc ('%', file);
3774 break;
3775
3776 case 'd': case 'i': case 'u':
3777 case 'x': case 'X': case 'o':
3778 case 'c':
3779 *q++ = c;
3780 *q = 0;
3781 fprintf (file, buf, va_arg (argptr, int));
3782 break;
3783
3784 case 'w':
3785 /* This is a prefix to the 'd', 'i', 'u', 'x', 'X', and
3786 'o' cases, but we do not check for those cases. It
3787 means that the value is a HOST_WIDE_INT, which may be
3788 either `long' or `long long'. */
3789 memcpy (q, HOST_WIDE_INT_PRINT, strlen (HOST_WIDE_INT_PRINT));
3790 q += strlen (HOST_WIDE_INT_PRINT);
3791 *q++ = *p++;
3792 *q = 0;
3793 fprintf (file, buf, va_arg (argptr, HOST_WIDE_INT));
3794 break;
3795
3796 case 'l':
3797 *q++ = c;
3798 #ifdef HAVE_LONG_LONG
3799 if (*p == 'l')
3800 {
3801 *q++ = *p++;
3802 *q++ = *p++;
3803 *q = 0;
3804 fprintf (file, buf, va_arg (argptr, long long));
3805 }
3806 else
3807 #endif
3808 {
3809 *q++ = *p++;
3810 *q = 0;
3811 fprintf (file, buf, va_arg (argptr, long));
3812 }
3813
3814 break;
3815
3816 case 's':
3817 *q++ = c;
3818 *q = 0;
3819 fprintf (file, buf, va_arg (argptr, char *));
3820 break;
3821
3822 case 'O':
3823 #ifdef ASM_OUTPUT_OPCODE
3824 ASM_OUTPUT_OPCODE (asm_out_file, p);
3825 #endif
3826 break;
3827
3828 case 'R':
3829 #ifdef REGISTER_PREFIX
3830 fprintf (file, "%s", REGISTER_PREFIX);
3831 #endif
3832 break;
3833
3834 case 'I':
3835 #ifdef IMMEDIATE_PREFIX
3836 fprintf (file, "%s", IMMEDIATE_PREFIX);
3837 #endif
3838 break;
3839
3840 case 'L':
3841 #ifdef LOCAL_LABEL_PREFIX
3842 fprintf (file, "%s", LOCAL_LABEL_PREFIX);
3843 #endif
3844 break;
3845
3846 case 'U':
3847 fputs (user_label_prefix, file);
3848 break;
3849
3850 #ifdef ASM_FPRINTF_EXTENSIONS
3851 /* Uppercase letters are reserved for general use by asm_fprintf
3852 and so are not available to target specific code. In order to
3853 prevent the ASM_FPRINTF_EXTENSIONS macro from using them then,
3854 they are defined here. As they get turned into real extensions
3855 to asm_fprintf they should be removed from this list. */
3856 case 'A': case 'B': case 'C': case 'D': case 'E':
3857 case 'F': case 'G': case 'H': case 'J': case 'K':
3858 case 'M': case 'N': case 'P': case 'Q': case 'S':
3859 case 'T': case 'V': case 'W': case 'Y': case 'Z':
3860 break;
3861
3862 ASM_FPRINTF_EXTENSIONS (file, argptr, p)
3863 #endif
3864 default:
3865 gcc_unreachable ();
3866 }
3867 break;
3868
3869 default:
3870 putc (c, file);
3871 }
3872 va_end (argptr);
3873 }
3874 \f
3875 /* Split up a CONST_DOUBLE or integer constant rtx
3876 into two rtx's for single words,
3877 storing in *FIRST the word that comes first in memory in the target
3878 and in *SECOND the other. */
3879
3880 void
3881 split_double (rtx value, rtx *first, rtx *second)
3882 {
3883 if (CONST_INT_P (value))
3884 {
3885 if (HOST_BITS_PER_WIDE_INT >= (2 * BITS_PER_WORD))
3886 {
3887 /* In this case the CONST_INT holds both target words.
3888 Extract the bits from it into two word-sized pieces.
3889 Sign extend each half to HOST_WIDE_INT. */
3890 unsigned HOST_WIDE_INT low, high;
3891 unsigned HOST_WIDE_INT mask, sign_bit, sign_extend;
3892 unsigned bits_per_word = BITS_PER_WORD;
3893
3894 /* Set sign_bit to the most significant bit of a word. */
3895 sign_bit = 1;
3896 sign_bit <<= bits_per_word - 1;
3897
3898 /* Set mask so that all bits of the word are set. We could
3899 have used 1 << BITS_PER_WORD instead of basing the
3900 calculation on sign_bit. However, on machines where
3901 HOST_BITS_PER_WIDE_INT == BITS_PER_WORD, it could cause a
3902 compiler warning, even though the code would never be
3903 executed. */
3904 mask = sign_bit << 1;
3905 mask--;
3906
3907 /* Set sign_extend as any remaining bits. */
3908 sign_extend = ~mask;
3909
3910 /* Pick the lower word and sign-extend it. */
3911 low = INTVAL (value);
3912 low &= mask;
3913 if (low & sign_bit)
3914 low |= sign_extend;
3915
3916 /* Pick the higher word, shifted to the least significant
3917 bits, and sign-extend it. */
3918 high = INTVAL (value);
3919 high >>= bits_per_word - 1;
3920 high >>= 1;
3921 high &= mask;
3922 if (high & sign_bit)
3923 high |= sign_extend;
3924
3925 /* Store the words in the target machine order. */
3926 if (WORDS_BIG_ENDIAN)
3927 {
3928 *first = GEN_INT (high);
3929 *second = GEN_INT (low);
3930 }
3931 else
3932 {
3933 *first = GEN_INT (low);
3934 *second = GEN_INT (high);
3935 }
3936 }
3937 else
3938 {
3939 /* The rule for using CONST_INT for a wider mode
3940 is that we regard the value as signed.
3941 So sign-extend it. */
3942 rtx high = (INTVAL (value) < 0 ? constm1_rtx : const0_rtx);
3943 if (WORDS_BIG_ENDIAN)
3944 {
3945 *first = high;
3946 *second = value;
3947 }
3948 else
3949 {
3950 *first = value;
3951 *second = high;
3952 }
3953 }
3954 }
3955 else if (GET_CODE (value) != CONST_DOUBLE)
3956 {
3957 if (WORDS_BIG_ENDIAN)
3958 {
3959 *first = const0_rtx;
3960 *second = value;
3961 }
3962 else
3963 {
3964 *first = value;
3965 *second = const0_rtx;
3966 }
3967 }
3968 else if (GET_MODE (value) == VOIDmode
3969 /* This is the old way we did CONST_DOUBLE integers. */
3970 || GET_MODE_CLASS (GET_MODE (value)) == MODE_INT)
3971 {
3972 /* In an integer, the words are defined as most and least significant.
3973 So order them by the target's convention. */
3974 if (WORDS_BIG_ENDIAN)
3975 {
3976 *first = GEN_INT (CONST_DOUBLE_HIGH (value));
3977 *second = GEN_INT (CONST_DOUBLE_LOW (value));
3978 }
3979 else
3980 {
3981 *first = GEN_INT (CONST_DOUBLE_LOW (value));
3982 *second = GEN_INT (CONST_DOUBLE_HIGH (value));
3983 }
3984 }
3985 else
3986 {
3987 REAL_VALUE_TYPE r;
3988 long l[2];
3989 REAL_VALUE_FROM_CONST_DOUBLE (r, value);
3990
3991 /* Note, this converts the REAL_VALUE_TYPE to the target's
3992 format, splits up the floating point double and outputs
3993 exactly 32 bits of it into each of l[0] and l[1] --
3994 not necessarily BITS_PER_WORD bits. */
3995 REAL_VALUE_TO_TARGET_DOUBLE (r, l);
3996
3997 /* If 32 bits is an entire word for the target, but not for the host,
3998 then sign-extend on the host so that the number will look the same
3999 way on the host that it would on the target. See for instance
4000 simplify_unary_operation. The #if is needed to avoid compiler
4001 warnings. */
4002
4003 #if HOST_BITS_PER_LONG > 32
4004 if (BITS_PER_WORD < HOST_BITS_PER_LONG && BITS_PER_WORD == 32)
4005 {
4006 if (l[0] & ((long) 1 << 31))
4007 l[0] |= ((long) (-1) << 32);
4008 if (l[1] & ((long) 1 << 31))
4009 l[1] |= ((long) (-1) << 32);
4010 }
4011 #endif
4012
4013 *first = GEN_INT (l[0]);
4014 *second = GEN_INT (l[1]);
4015 }
4016 }
4017 \f
4018 /* Return nonzero if this function has no function calls. */
4019
4020 int
4021 leaf_function_p (void)
4022 {
4023 rtx insn;
4024 rtx link;
4025
4026 if (crtl->profile || profile_arc_flag)
4027 return 0;
4028
4029 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4030 {
4031 if (CALL_P (insn)
4032 && ! SIBLING_CALL_P (insn))
4033 return 0;
4034 if (NONJUMP_INSN_P (insn)
4035 && GET_CODE (PATTERN (insn)) == SEQUENCE
4036 && CALL_P (XVECEXP (PATTERN (insn), 0, 0))
4037 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0)))
4038 return 0;
4039 }
4040 for (link = crtl->epilogue_delay_list;
4041 link;
4042 link = XEXP (link, 1))
4043 {
4044 insn = XEXP (link, 0);
4045
4046 if (CALL_P (insn)
4047 && ! SIBLING_CALL_P (insn))
4048 return 0;
4049 if (NONJUMP_INSN_P (insn)
4050 && GET_CODE (PATTERN (insn)) == SEQUENCE
4051 && CALL_P (XVECEXP (PATTERN (insn), 0, 0))
4052 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0)))
4053 return 0;
4054 }
4055
4056 return 1;
4057 }
4058
4059 /* Return 1 if branch is a forward branch.
4060 Uses insn_shuid array, so it works only in the final pass. May be used by
4061 output templates to customary add branch prediction hints.
4062 */
4063 int
4064 final_forward_branch_p (rtx insn)
4065 {
4066 int insn_id, label_id;
4067
4068 gcc_assert (uid_shuid);
4069 insn_id = INSN_SHUID (insn);
4070 label_id = INSN_SHUID (JUMP_LABEL (insn));
4071 /* We've hit some insns that does not have id information available. */
4072 gcc_assert (insn_id && label_id);
4073 return insn_id < label_id;
4074 }
4075
4076 /* On some machines, a function with no call insns
4077 can run faster if it doesn't create its own register window.
4078 When output, the leaf function should use only the "output"
4079 registers. Ordinarily, the function would be compiled to use
4080 the "input" registers to find its arguments; it is a candidate
4081 for leaf treatment if it uses only the "input" registers.
4082 Leaf function treatment means renumbering so the function
4083 uses the "output" registers instead. */
4084
4085 #ifdef LEAF_REGISTERS
4086
4087 /* Return 1 if this function uses only the registers that can be
4088 safely renumbered. */
4089
4090 int
4091 only_leaf_regs_used (void)
4092 {
4093 int i;
4094 const char *const permitted_reg_in_leaf_functions = LEAF_REGISTERS;
4095
4096 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
4097 if ((df_regs_ever_live_p (i) || global_regs[i])
4098 && ! permitted_reg_in_leaf_functions[i])
4099 return 0;
4100
4101 if (crtl->uses_pic_offset_table
4102 && pic_offset_table_rtx != 0
4103 && REG_P (pic_offset_table_rtx)
4104 && ! permitted_reg_in_leaf_functions[REGNO (pic_offset_table_rtx)])
4105 return 0;
4106
4107 return 1;
4108 }
4109
4110 /* Scan all instructions and renumber all registers into those
4111 available in leaf functions. */
4112
4113 static void
4114 leaf_renumber_regs (rtx first)
4115 {
4116 rtx insn;
4117
4118 /* Renumber only the actual patterns.
4119 The reg-notes can contain frame pointer refs,
4120 and renumbering them could crash, and should not be needed. */
4121 for (insn = first; insn; insn = NEXT_INSN (insn))
4122 if (INSN_P (insn))
4123 leaf_renumber_regs_insn (PATTERN (insn));
4124 for (insn = crtl->epilogue_delay_list;
4125 insn;
4126 insn = XEXP (insn, 1))
4127 if (INSN_P (XEXP (insn, 0)))
4128 leaf_renumber_regs_insn (PATTERN (XEXP (insn, 0)));
4129 }
4130
4131 /* Scan IN_RTX and its subexpressions, and renumber all regs into those
4132 available in leaf functions. */
4133
4134 void
4135 leaf_renumber_regs_insn (rtx in_rtx)
4136 {
4137 int i, j;
4138 const char *format_ptr;
4139
4140 if (in_rtx == 0)
4141 return;
4142
4143 /* Renumber all input-registers into output-registers.
4144 renumbered_regs would be 1 for an output-register;
4145 they */
4146
4147 if (REG_P (in_rtx))
4148 {
4149 int newreg;
4150
4151 /* Don't renumber the same reg twice. */
4152 if (in_rtx->used)
4153 return;
4154
4155 newreg = REGNO (in_rtx);
4156 /* Don't try to renumber pseudo regs. It is possible for a pseudo reg
4157 to reach here as part of a REG_NOTE. */
4158 if (newreg >= FIRST_PSEUDO_REGISTER)
4159 {
4160 in_rtx->used = 1;
4161 return;
4162 }
4163 newreg = LEAF_REG_REMAP (newreg);
4164 gcc_assert (newreg >= 0);
4165 df_set_regs_ever_live (REGNO (in_rtx), false);
4166 df_set_regs_ever_live (newreg, true);
4167 SET_REGNO (in_rtx, newreg);
4168 in_rtx->used = 1;
4169 }
4170
4171 if (INSN_P (in_rtx))
4172 {
4173 /* Inside a SEQUENCE, we find insns.
4174 Renumber just the patterns of these insns,
4175 just as we do for the top-level insns. */
4176 leaf_renumber_regs_insn (PATTERN (in_rtx));
4177 return;
4178 }
4179
4180 format_ptr = GET_RTX_FORMAT (GET_CODE (in_rtx));
4181
4182 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (in_rtx)); i++)
4183 switch (*format_ptr++)
4184 {
4185 case 'e':
4186 leaf_renumber_regs_insn (XEXP (in_rtx, i));
4187 break;
4188
4189 case 'E':
4190 if (NULL != XVEC (in_rtx, i))
4191 {
4192 for (j = 0; j < XVECLEN (in_rtx, i); j++)
4193 leaf_renumber_regs_insn (XVECEXP (in_rtx, i, j));
4194 }
4195 break;
4196
4197 case 'S':
4198 case 's':
4199 case '0':
4200 case 'i':
4201 case 'w':
4202 case 'n':
4203 case 'u':
4204 break;
4205
4206 default:
4207 gcc_unreachable ();
4208 }
4209 }
4210 #endif
4211 \f
4212 /* Turn the RTL into assembly. */
4213 static unsigned int
4214 rest_of_handle_final (void)
4215 {
4216 rtx x;
4217 const char *fnname;
4218
4219 /* Get the function's name, as described by its RTL. This may be
4220 different from the DECL_NAME name used in the source file. */
4221
4222 x = DECL_RTL (current_function_decl);
4223 gcc_assert (MEM_P (x));
4224 x = XEXP (x, 0);
4225 gcc_assert (GET_CODE (x) == SYMBOL_REF);
4226 fnname = XSTR (x, 0);
4227
4228 assemble_start_function (current_function_decl, fnname);
4229 final_start_function (get_insns (), asm_out_file, optimize);
4230 final (get_insns (), asm_out_file, optimize);
4231 final_end_function ();
4232
4233 /* The IA-64 ".handlerdata" directive must be issued before the ".endp"
4234 directive that closes the procedure descriptor. Similarly, for x64 SEH.
4235 Otherwise it's not strictly necessary, but it doesn't hurt either. */
4236 output_function_exception_table (fnname);
4237
4238 assemble_end_function (current_function_decl, fnname);
4239
4240 user_defined_section_attribute = false;
4241
4242 /* Free up reg info memory. */
4243 free_reg_info ();
4244
4245 if (! quiet_flag)
4246 fflush (asm_out_file);
4247
4248 /* Write DBX symbols if requested. */
4249
4250 /* Note that for those inline functions where we don't initially
4251 know for certain that we will be generating an out-of-line copy,
4252 the first invocation of this routine (rest_of_compilation) will
4253 skip over this code by doing a `goto exit_rest_of_compilation;'.
4254 Later on, wrapup_global_declarations will (indirectly) call
4255 rest_of_compilation again for those inline functions that need
4256 to have out-of-line copies generated. During that call, we
4257 *will* be routed past here. */
4258
4259 timevar_push (TV_SYMOUT);
4260 if (!DECL_IGNORED_P (current_function_decl))
4261 debug_hooks->function_decl (current_function_decl);
4262 timevar_pop (TV_SYMOUT);
4263
4264 /* Release the blocks that are linked to DECL_INITIAL() to free the memory. */
4265 DECL_INITIAL (current_function_decl) = error_mark_node;
4266
4267 if (DECL_STATIC_CONSTRUCTOR (current_function_decl)
4268 && targetm.have_ctors_dtors)
4269 targetm.asm_out.constructor (XEXP (DECL_RTL (current_function_decl), 0),
4270 decl_init_priority_lookup
4271 (current_function_decl));
4272 if (DECL_STATIC_DESTRUCTOR (current_function_decl)
4273 && targetm.have_ctors_dtors)
4274 targetm.asm_out.destructor (XEXP (DECL_RTL (current_function_decl), 0),
4275 decl_fini_priority_lookup
4276 (current_function_decl));
4277 return 0;
4278 }
4279
4280 struct rtl_opt_pass pass_final =
4281 {
4282 {
4283 RTL_PASS,
4284 "final", /* name */
4285 NULL, /* gate */
4286 rest_of_handle_final, /* execute */
4287 NULL, /* sub */
4288 NULL, /* next */
4289 0, /* static_pass_number */
4290 TV_FINAL, /* tv_id */
4291 0, /* properties_required */
4292 0, /* properties_provided */
4293 0, /* properties_destroyed */
4294 0, /* todo_flags_start */
4295 TODO_ggc_collect /* todo_flags_finish */
4296 }
4297 };
4298
4299
4300 static unsigned int
4301 rest_of_handle_shorten_branches (void)
4302 {
4303 /* Shorten branches. */
4304 shorten_branches (get_insns ());
4305 return 0;
4306 }
4307
4308 struct rtl_opt_pass pass_shorten_branches =
4309 {
4310 {
4311 RTL_PASS,
4312 "shorten", /* name */
4313 NULL, /* gate */
4314 rest_of_handle_shorten_branches, /* execute */
4315 NULL, /* sub */
4316 NULL, /* next */
4317 0, /* static_pass_number */
4318 TV_FINAL, /* tv_id */
4319 0, /* properties_required */
4320 0, /* properties_provided */
4321 0, /* properties_destroyed */
4322 0, /* todo_flags_start */
4323 0 /* todo_flags_finish */
4324 }
4325 };
4326
4327
4328 static unsigned int
4329 rest_of_clean_state (void)
4330 {
4331 rtx insn, next;
4332 FILE *final_output = NULL;
4333 int save_unnumbered = flag_dump_unnumbered;
4334 int save_noaddr = flag_dump_noaddr;
4335
4336 if (flag_dump_final_insns)
4337 {
4338 final_output = fopen (flag_dump_final_insns, "a");
4339 if (!final_output)
4340 {
4341 error ("could not open final insn dump file %qs: %m",
4342 flag_dump_final_insns);
4343 flag_dump_final_insns = NULL;
4344 }
4345 else
4346 {
4347 flag_dump_noaddr = flag_dump_unnumbered = 1;
4348 if (flag_compare_debug_opt || flag_compare_debug)
4349 dump_flags |= TDF_NOUID;
4350 dump_function_header (final_output, current_function_decl,
4351 dump_flags);
4352 final_insns_dump_p = true;
4353
4354 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4355 if (LABEL_P (insn))
4356 INSN_UID (insn) = CODE_LABEL_NUMBER (insn);
4357 else
4358 {
4359 if (NOTE_P (insn))
4360 set_block_for_insn (insn, NULL);
4361 INSN_UID (insn) = 0;
4362 }
4363 }
4364 }
4365
4366 /* It is very important to decompose the RTL instruction chain here:
4367 debug information keeps pointing into CODE_LABEL insns inside the function
4368 body. If these remain pointing to the other insns, we end up preserving
4369 whole RTL chain and attached detailed debug info in memory. */
4370 for (insn = get_insns (); insn; insn = next)
4371 {
4372 next = NEXT_INSN (insn);
4373 NEXT_INSN (insn) = NULL;
4374 PREV_INSN (insn) = NULL;
4375
4376 if (final_output
4377 && (!NOTE_P (insn) ||
4378 (NOTE_KIND (insn) != NOTE_INSN_VAR_LOCATION
4379 && NOTE_KIND (insn) != NOTE_INSN_CALL_ARG_LOCATION
4380 && NOTE_KIND (insn) != NOTE_INSN_BLOCK_BEG
4381 && NOTE_KIND (insn) != NOTE_INSN_BLOCK_END
4382 && NOTE_KIND (insn) != NOTE_INSN_CFA_RESTORE_STATE)))
4383 print_rtl_single (final_output, insn);
4384 }
4385
4386 if (final_output)
4387 {
4388 flag_dump_noaddr = save_noaddr;
4389 flag_dump_unnumbered = save_unnumbered;
4390 final_insns_dump_p = false;
4391
4392 if (fclose (final_output))
4393 {
4394 error ("could not close final insn dump file %qs: %m",
4395 flag_dump_final_insns);
4396 flag_dump_final_insns = NULL;
4397 }
4398 }
4399
4400 /* In case the function was not output,
4401 don't leave any temporary anonymous types
4402 queued up for sdb output. */
4403 #ifdef SDB_DEBUGGING_INFO
4404 if (write_symbols == SDB_DEBUG)
4405 sdbout_types (NULL_TREE);
4406 #endif
4407
4408 flag_rerun_cse_after_global_opts = 0;
4409 reload_completed = 0;
4410 epilogue_completed = 0;
4411 #ifdef STACK_REGS
4412 regstack_completed = 0;
4413 #endif
4414
4415 /* Clear out the insn_length contents now that they are no
4416 longer valid. */
4417 init_insn_lengths ();
4418
4419 /* Show no temporary slots allocated. */
4420 init_temp_slots ();
4421
4422 free_bb_for_insn ();
4423
4424 delete_tree_ssa ();
4425
4426 /* We can reduce stack alignment on call site only when we are sure that
4427 the function body just produced will be actually used in the final
4428 executable. */
4429 if (decl_binds_to_current_def_p (current_function_decl))
4430 {
4431 unsigned int pref = crtl->preferred_stack_boundary;
4432 if (crtl->stack_alignment_needed > crtl->preferred_stack_boundary)
4433 pref = crtl->stack_alignment_needed;
4434 cgraph_rtl_info (current_function_decl)->preferred_incoming_stack_boundary
4435 = pref;
4436 }
4437
4438 /* Make sure volatile mem refs aren't considered valid operands for
4439 arithmetic insns. We must call this here if this is a nested inline
4440 function, since the above code leaves us in the init_recog state,
4441 and the function context push/pop code does not save/restore volatile_ok.
4442
4443 ??? Maybe it isn't necessary for expand_start_function to call this
4444 anymore if we do it here? */
4445
4446 init_recog_no_volatile ();
4447
4448 /* We're done with this function. Free up memory if we can. */
4449 free_after_parsing (cfun);
4450 free_after_compilation (cfun);
4451 return 0;
4452 }
4453
4454 struct rtl_opt_pass pass_clean_state =
4455 {
4456 {
4457 RTL_PASS,
4458 "*clean_state", /* name */
4459 NULL, /* gate */
4460 rest_of_clean_state, /* execute */
4461 NULL, /* sub */
4462 NULL, /* next */
4463 0, /* static_pass_number */
4464 TV_FINAL, /* tv_id */
4465 0, /* properties_required */
4466 0, /* properties_provided */
4467 PROP_rtl, /* properties_destroyed */
4468 0, /* todo_flags_start */
4469 0 /* todo_flags_finish */
4470 }
4471 };