insn_current_reference_address takes an rtx_insn
[gcc.git] / gcc / final.c
1 /* Convert RTL to assembler code and output it, for GNU compiler.
2 Copyright (C) 1987-2014 Free Software Foundation, Inc.
3
4 This file is part of GCC.
5
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
9 version.
10
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
19
20 /* This is the final pass of the compiler.
21 It looks at the rtl code for a function and outputs assembler code.
22
23 Call `final_start_function' to output the assembler code for function entry,
24 `final' to output assembler code for some RTL code,
25 `final_end_function' to output assembler code for function exit.
26 If a function is compiled in several pieces, each piece is
27 output separately with `final'.
28
29 Some optimizations are also done at this level.
30 Move instructions that were made unnecessary by good register allocation
31 are detected and omitted from the output. (Though most of these
32 are removed by the last jump pass.)
33
34 Instructions to set the condition codes are omitted when it can be
35 seen that the condition codes already had the desired values.
36
37 In some cases it is sufficient if the inherited condition codes
38 have related values, but this may require the following insn
39 (the one that tests the condition codes) to be modified.
40
41 The code for the function prologue and epilogue are generated
42 directly in assembler by the target functions function_prologue and
43 function_epilogue. Those instructions never exist as rtl. */
44
45 #include "config.h"
46 #include "system.h"
47 #include "coretypes.h"
48 #include "tm.h"
49
50 #include "tree.h"
51 #include "varasm.h"
52 #include "hard-reg-set.h"
53 #include "rtl.h"
54 #include "tm_p.h"
55 #include "regs.h"
56 #include "insn-config.h"
57 #include "insn-attr.h"
58 #include "recog.h"
59 #include "conditions.h"
60 #include "flags.h"
61 #include "output.h"
62 #include "except.h"
63 #include "function.h"
64 #include "rtl-error.h"
65 #include "toplev.h" /* exact_log2, floor_log2 */
66 #include "reload.h"
67 #include "intl.h"
68 #include "basic-block.h"
69 #include "target.h"
70 #include "targhooks.h"
71 #include "debug.h"
72 #include "expr.h"
73 #include "tree-pass.h"
74 #include "cgraph.h"
75 #include "tree-ssa.h"
76 #include "coverage.h"
77 #include "df.h"
78 #include "ggc.h"
79 #include "cfgloop.h"
80 #include "params.h"
81 #include "tree-pretty-print.h" /* for dump_function_header */
82 #include "asan.h"
83 #include "wide-int-print.h"
84 #include "rtl-iter.h"
85
86 #ifdef XCOFF_DEBUGGING_INFO
87 #include "xcoffout.h" /* Needed for external data
88 declarations for e.g. AIX 4.x. */
89 #endif
90
91 #include "dwarf2out.h"
92
93 #ifdef DBX_DEBUGGING_INFO
94 #include "dbxout.h"
95 #endif
96
97 #ifdef SDB_DEBUGGING_INFO
98 #include "sdbout.h"
99 #endif
100
101 /* Most ports that aren't using cc0 don't need to define CC_STATUS_INIT.
102 So define a null default for it to save conditionalization later. */
103 #ifndef CC_STATUS_INIT
104 #define CC_STATUS_INIT
105 #endif
106
107 /* Is the given character a logical line separator for the assembler? */
108 #ifndef IS_ASM_LOGICAL_LINE_SEPARATOR
109 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == ';')
110 #endif
111
112 #ifndef JUMP_TABLES_IN_TEXT_SECTION
113 #define JUMP_TABLES_IN_TEXT_SECTION 0
114 #endif
115
116 /* Bitflags used by final_scan_insn. */
117 #define SEEN_NOTE 1
118 #define SEEN_EMITTED 2
119
120 /* Last insn processed by final_scan_insn. */
121 static rtx_insn *debug_insn;
122 rtx_insn *current_output_insn;
123
124 /* Line number of last NOTE. */
125 static int last_linenum;
126
127 /* Last discriminator written to assembly. */
128 static int last_discriminator;
129
130 /* Discriminator of current block. */
131 static int discriminator;
132
133 /* Highest line number in current block. */
134 static int high_block_linenum;
135
136 /* Likewise for function. */
137 static int high_function_linenum;
138
139 /* Filename of last NOTE. */
140 static const char *last_filename;
141
142 /* Override filename and line number. */
143 static const char *override_filename;
144 static int override_linenum;
145
146 /* Whether to force emission of a line note before the next insn. */
147 static bool force_source_line = false;
148
149 extern const int length_unit_log; /* This is defined in insn-attrtab.c. */
150
151 /* Nonzero while outputting an `asm' with operands.
152 This means that inconsistencies are the user's fault, so don't die.
153 The precise value is the insn being output, to pass to error_for_asm. */
154 rtx this_is_asm_operands;
155
156 /* Number of operands of this insn, for an `asm' with operands. */
157 static unsigned int insn_noperands;
158
159 /* Compare optimization flag. */
160
161 static rtx last_ignored_compare = 0;
162
163 /* Assign a unique number to each insn that is output.
164 This can be used to generate unique local labels. */
165
166 static int insn_counter = 0;
167
168 #ifdef HAVE_cc0
169 /* This variable contains machine-dependent flags (defined in tm.h)
170 set and examined by output routines
171 that describe how to interpret the condition codes properly. */
172
173 CC_STATUS cc_status;
174
175 /* During output of an insn, this contains a copy of cc_status
176 from before the insn. */
177
178 CC_STATUS cc_prev_status;
179 #endif
180
181 /* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */
182
183 static int block_depth;
184
185 /* Nonzero if have enabled APP processing of our assembler output. */
186
187 static int app_on;
188
189 /* If we are outputting an insn sequence, this contains the sequence rtx.
190 Zero otherwise. */
191
192 rtx final_sequence;
193
194 #ifdef ASSEMBLER_DIALECT
195
196 /* Number of the assembler dialect to use, starting at 0. */
197 static int dialect_number;
198 #endif
199
200 /* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */
201 rtx current_insn_predicate;
202
203 /* True if printing into -fdump-final-insns= dump. */
204 bool final_insns_dump_p;
205
206 /* True if profile_function should be called, but hasn't been called yet. */
207 static bool need_profile_function;
208
209 static int asm_insn_count (rtx);
210 static void profile_function (FILE *);
211 static void profile_after_prologue (FILE *);
212 static bool notice_source_line (rtx_insn *, bool *);
213 static rtx walk_alter_subreg (rtx *, bool *);
214 static void output_asm_name (void);
215 static void output_alternate_entry_point (FILE *, rtx_insn *);
216 static tree get_mem_expr_from_op (rtx, int *);
217 static void output_asm_operand_names (rtx *, int *, int);
218 #ifdef LEAF_REGISTERS
219 static void leaf_renumber_regs (rtx_insn *);
220 #endif
221 #ifdef HAVE_cc0
222 static int alter_cond (rtx);
223 #endif
224 #ifndef ADDR_VEC_ALIGN
225 static int final_addr_vec_align (rtx);
226 #endif
227 static int align_fuzz (rtx, rtx, int, unsigned);
228 static void collect_fn_hard_reg_usage (void);
229 static tree get_call_fndecl (rtx_insn *);
230 \f
231 /* Initialize data in final at the beginning of a compilation. */
232
233 void
234 init_final (const char *filename ATTRIBUTE_UNUSED)
235 {
236 app_on = 0;
237 final_sequence = 0;
238
239 #ifdef ASSEMBLER_DIALECT
240 dialect_number = ASSEMBLER_DIALECT;
241 #endif
242 }
243
244 /* Default target function prologue and epilogue assembler output.
245
246 If not overridden for epilogue code, then the function body itself
247 contains return instructions wherever needed. */
248 void
249 default_function_pro_epilogue (FILE *file ATTRIBUTE_UNUSED,
250 HOST_WIDE_INT size ATTRIBUTE_UNUSED)
251 {
252 }
253
254 void
255 default_function_switched_text_sections (FILE *file ATTRIBUTE_UNUSED,
256 tree decl ATTRIBUTE_UNUSED,
257 bool new_is_cold ATTRIBUTE_UNUSED)
258 {
259 }
260
261 /* Default target hook that outputs nothing to a stream. */
262 void
263 no_asm_to_stream (FILE *file ATTRIBUTE_UNUSED)
264 {
265 }
266
267 /* Enable APP processing of subsequent output.
268 Used before the output from an `asm' statement. */
269
270 void
271 app_enable (void)
272 {
273 if (! app_on)
274 {
275 fputs (ASM_APP_ON, asm_out_file);
276 app_on = 1;
277 }
278 }
279
280 /* Disable APP processing of subsequent output.
281 Called from varasm.c before most kinds of output. */
282
283 void
284 app_disable (void)
285 {
286 if (app_on)
287 {
288 fputs (ASM_APP_OFF, asm_out_file);
289 app_on = 0;
290 }
291 }
292 \f
293 /* Return the number of slots filled in the current
294 delayed branch sequence (we don't count the insn needing the
295 delay slot). Zero if not in a delayed branch sequence. */
296
297 #ifdef DELAY_SLOTS
298 int
299 dbr_sequence_length (void)
300 {
301 if (final_sequence != 0)
302 return XVECLEN (final_sequence, 0) - 1;
303 else
304 return 0;
305 }
306 #endif
307 \f
308 /* The next two pages contain routines used to compute the length of an insn
309 and to shorten branches. */
310
311 /* Arrays for insn lengths, and addresses. The latter is referenced by
312 `insn_current_length'. */
313
314 static int *insn_lengths;
315
316 vec<int> insn_addresses_;
317
318 /* Max uid for which the above arrays are valid. */
319 static int insn_lengths_max_uid;
320
321 /* Address of insn being processed. Used by `insn_current_length'. */
322 int insn_current_address;
323
324 /* Address of insn being processed in previous iteration. */
325 int insn_last_address;
326
327 /* known invariant alignment of insn being processed. */
328 int insn_current_align;
329
330 /* After shorten_branches, for any insn, uid_align[INSN_UID (insn)]
331 gives the next following alignment insn that increases the known
332 alignment, or NULL_RTX if there is no such insn.
333 For any alignment obtained this way, we can again index uid_align with
334 its uid to obtain the next following align that in turn increases the
335 alignment, till we reach NULL_RTX; the sequence obtained this way
336 for each insn we'll call the alignment chain of this insn in the following
337 comments. */
338
339 struct label_alignment
340 {
341 short alignment;
342 short max_skip;
343 };
344
345 static rtx *uid_align;
346 static int *uid_shuid;
347 static struct label_alignment *label_align;
348
349 /* Indicate that branch shortening hasn't yet been done. */
350
351 void
352 init_insn_lengths (void)
353 {
354 if (uid_shuid)
355 {
356 free (uid_shuid);
357 uid_shuid = 0;
358 }
359 if (insn_lengths)
360 {
361 free (insn_lengths);
362 insn_lengths = 0;
363 insn_lengths_max_uid = 0;
364 }
365 if (HAVE_ATTR_length)
366 INSN_ADDRESSES_FREE ();
367 if (uid_align)
368 {
369 free (uid_align);
370 uid_align = 0;
371 }
372 }
373
374 /* Obtain the current length of an insn. If branch shortening has been done,
375 get its actual length. Otherwise, use FALLBACK_FN to calculate the
376 length. */
377 static int
378 get_attr_length_1 (rtx uncast_insn, int (*fallback_fn) (rtx))
379 {
380 rtx_insn *insn = as_a <rtx_insn *> (uncast_insn);
381 rtx body;
382 int i;
383 int length = 0;
384
385 if (!HAVE_ATTR_length)
386 return 0;
387
388 if (insn_lengths_max_uid > INSN_UID (insn))
389 return insn_lengths[INSN_UID (insn)];
390 else
391 switch (GET_CODE (insn))
392 {
393 case NOTE:
394 case BARRIER:
395 case CODE_LABEL:
396 case DEBUG_INSN:
397 return 0;
398
399 case CALL_INSN:
400 case JUMP_INSN:
401 length = fallback_fn (insn);
402 break;
403
404 case INSN:
405 body = PATTERN (insn);
406 if (GET_CODE (body) == USE || GET_CODE (body) == CLOBBER)
407 return 0;
408
409 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
410 length = asm_insn_count (body) * fallback_fn (insn);
411 else if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (body))
412 for (i = 0; i < seq->len (); i++)
413 length += get_attr_length_1 (seq->insn (i), fallback_fn);
414 else
415 length = fallback_fn (insn);
416 break;
417
418 default:
419 break;
420 }
421
422 #ifdef ADJUST_INSN_LENGTH
423 ADJUST_INSN_LENGTH (insn, length);
424 #endif
425 return length;
426 }
427
428 /* Obtain the current length of an insn. If branch shortening has been done,
429 get its actual length. Otherwise, get its maximum length. */
430 int
431 get_attr_length (rtx insn)
432 {
433 return get_attr_length_1 (insn, insn_default_length);
434 }
435
436 /* Obtain the current length of an insn. If branch shortening has been done,
437 get its actual length. Otherwise, get its minimum length. */
438 int
439 get_attr_min_length (rtx insn)
440 {
441 return get_attr_length_1 (insn, insn_min_length);
442 }
443 \f
444 /* Code to handle alignment inside shorten_branches. */
445
446 /* Here is an explanation how the algorithm in align_fuzz can give
447 proper results:
448
449 Call a sequence of instructions beginning with alignment point X
450 and continuing until the next alignment point `block X'. When `X'
451 is used in an expression, it means the alignment value of the
452 alignment point.
453
454 Call the distance between the start of the first insn of block X, and
455 the end of the last insn of block X `IX', for the `inner size of X'.
456 This is clearly the sum of the instruction lengths.
457
458 Likewise with the next alignment-delimited block following X, which we
459 shall call block Y.
460
461 Call the distance between the start of the first insn of block X, and
462 the start of the first insn of block Y `OX', for the `outer size of X'.
463
464 The estimated padding is then OX - IX.
465
466 OX can be safely estimated as
467
468 if (X >= Y)
469 OX = round_up(IX, Y)
470 else
471 OX = round_up(IX, X) + Y - X
472
473 Clearly est(IX) >= real(IX), because that only depends on the
474 instruction lengths, and those being overestimated is a given.
475
476 Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so
477 we needn't worry about that when thinking about OX.
478
479 When X >= Y, the alignment provided by Y adds no uncertainty factor
480 for branch ranges starting before X, so we can just round what we have.
481 But when X < Y, we don't know anything about the, so to speak,
482 `middle bits', so we have to assume the worst when aligning up from an
483 address mod X to one mod Y, which is Y - X. */
484
485 #ifndef LABEL_ALIGN
486 #define LABEL_ALIGN(LABEL) align_labels_log
487 #endif
488
489 #ifndef LOOP_ALIGN
490 #define LOOP_ALIGN(LABEL) align_loops_log
491 #endif
492
493 #ifndef LABEL_ALIGN_AFTER_BARRIER
494 #define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0
495 #endif
496
497 #ifndef JUMP_ALIGN
498 #define JUMP_ALIGN(LABEL) align_jumps_log
499 #endif
500
501 int
502 default_label_align_after_barrier_max_skip (rtx insn ATTRIBUTE_UNUSED)
503 {
504 return 0;
505 }
506
507 int
508 default_loop_align_max_skip (rtx insn ATTRIBUTE_UNUSED)
509 {
510 return align_loops_max_skip;
511 }
512
513 int
514 default_label_align_max_skip (rtx insn ATTRIBUTE_UNUSED)
515 {
516 return align_labels_max_skip;
517 }
518
519 int
520 default_jump_align_max_skip (rtx insn ATTRIBUTE_UNUSED)
521 {
522 return align_jumps_max_skip;
523 }
524
525 #ifndef ADDR_VEC_ALIGN
526 static int
527 final_addr_vec_align (rtx addr_vec)
528 {
529 int align = GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec)));
530
531 if (align > BIGGEST_ALIGNMENT / BITS_PER_UNIT)
532 align = BIGGEST_ALIGNMENT / BITS_PER_UNIT;
533 return exact_log2 (align);
534
535 }
536
537 #define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC)
538 #endif
539
540 #ifndef INSN_LENGTH_ALIGNMENT
541 #define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log
542 #endif
543
544 #define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)])
545
546 static int min_labelno, max_labelno;
547
548 #define LABEL_TO_ALIGNMENT(LABEL) \
549 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment)
550
551 #define LABEL_TO_MAX_SKIP(LABEL) \
552 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip)
553
554 /* For the benefit of port specific code do this also as a function. */
555
556 int
557 label_to_alignment (rtx label)
558 {
559 if (CODE_LABEL_NUMBER (label) <= max_labelno)
560 return LABEL_TO_ALIGNMENT (label);
561 return 0;
562 }
563
564 int
565 label_to_max_skip (rtx label)
566 {
567 if (CODE_LABEL_NUMBER (label) <= max_labelno)
568 return LABEL_TO_MAX_SKIP (label);
569 return 0;
570 }
571
572 /* The differences in addresses
573 between a branch and its target might grow or shrink depending on
574 the alignment the start insn of the range (the branch for a forward
575 branch or the label for a backward branch) starts out on; if these
576 differences are used naively, they can even oscillate infinitely.
577 We therefore want to compute a 'worst case' address difference that
578 is independent of the alignment the start insn of the range end
579 up on, and that is at least as large as the actual difference.
580 The function align_fuzz calculates the amount we have to add to the
581 naively computed difference, by traversing the part of the alignment
582 chain of the start insn of the range that is in front of the end insn
583 of the range, and considering for each alignment the maximum amount
584 that it might contribute to a size increase.
585
586 For casesi tables, we also want to know worst case minimum amounts of
587 address difference, in case a machine description wants to introduce
588 some common offset that is added to all offsets in a table.
589 For this purpose, align_fuzz with a growth argument of 0 computes the
590 appropriate adjustment. */
591
592 /* Compute the maximum delta by which the difference of the addresses of
593 START and END might grow / shrink due to a different address for start
594 which changes the size of alignment insns between START and END.
595 KNOWN_ALIGN_LOG is the alignment known for START.
596 GROWTH should be ~0 if the objective is to compute potential code size
597 increase, and 0 if the objective is to compute potential shrink.
598 The return value is undefined for any other value of GROWTH. */
599
600 static int
601 align_fuzz (rtx start, rtx end, int known_align_log, unsigned int growth)
602 {
603 int uid = INSN_UID (start);
604 rtx align_label;
605 int known_align = 1 << known_align_log;
606 int end_shuid = INSN_SHUID (end);
607 int fuzz = 0;
608
609 for (align_label = uid_align[uid]; align_label; align_label = uid_align[uid])
610 {
611 int align_addr, new_align;
612
613 uid = INSN_UID (align_label);
614 align_addr = INSN_ADDRESSES (uid) - insn_lengths[uid];
615 if (uid_shuid[uid] > end_shuid)
616 break;
617 known_align_log = LABEL_TO_ALIGNMENT (align_label);
618 new_align = 1 << known_align_log;
619 if (new_align < known_align)
620 continue;
621 fuzz += (-align_addr ^ growth) & (new_align - known_align);
622 known_align = new_align;
623 }
624 return fuzz;
625 }
626
627 /* Compute a worst-case reference address of a branch so that it
628 can be safely used in the presence of aligned labels. Since the
629 size of the branch itself is unknown, the size of the branch is
630 not included in the range. I.e. for a forward branch, the reference
631 address is the end address of the branch as known from the previous
632 branch shortening pass, minus a value to account for possible size
633 increase due to alignment. For a backward branch, it is the start
634 address of the branch as known from the current pass, plus a value
635 to account for possible size increase due to alignment.
636 NB.: Therefore, the maximum offset allowed for backward branches needs
637 to exclude the branch size. */
638
639 int
640 insn_current_reference_address (rtx_insn *branch)
641 {
642 rtx dest, seq;
643 int seq_uid;
644
645 if (! INSN_ADDRESSES_SET_P ())
646 return 0;
647
648 seq = NEXT_INSN (PREV_INSN (branch));
649 seq_uid = INSN_UID (seq);
650 if (!JUMP_P (branch))
651 /* This can happen for example on the PA; the objective is to know the
652 offset to address something in front of the start of the function.
653 Thus, we can treat it like a backward branch.
654 We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than
655 any alignment we'd encounter, so we skip the call to align_fuzz. */
656 return insn_current_address;
657 dest = JUMP_LABEL (branch);
658
659 /* BRANCH has no proper alignment chain set, so use SEQ.
660 BRANCH also has no INSN_SHUID. */
661 if (INSN_SHUID (seq) < INSN_SHUID (dest))
662 {
663 /* Forward branch. */
664 return (insn_last_address + insn_lengths[seq_uid]
665 - align_fuzz (seq, dest, length_unit_log, ~0));
666 }
667 else
668 {
669 /* Backward branch. */
670 return (insn_current_address
671 + align_fuzz (dest, seq, length_unit_log, ~0));
672 }
673 }
674 \f
675 /* Compute branch alignments based on frequency information in the
676 CFG. */
677
678 unsigned int
679 compute_alignments (void)
680 {
681 int log, max_skip, max_log;
682 basic_block bb;
683 int freq_max = 0;
684 int freq_threshold = 0;
685
686 if (label_align)
687 {
688 free (label_align);
689 label_align = 0;
690 }
691
692 max_labelno = max_label_num ();
693 min_labelno = get_first_label_num ();
694 label_align = XCNEWVEC (struct label_alignment, max_labelno - min_labelno + 1);
695
696 /* If not optimizing or optimizing for size, don't assign any alignments. */
697 if (! optimize || optimize_function_for_size_p (cfun))
698 return 0;
699
700 if (dump_file)
701 {
702 dump_reg_info (dump_file);
703 dump_flow_info (dump_file, TDF_DETAILS);
704 flow_loops_dump (dump_file, NULL, 1);
705 }
706 loop_optimizer_init (AVOID_CFG_MODIFICATIONS);
707 FOR_EACH_BB_FN (bb, cfun)
708 if (bb->frequency > freq_max)
709 freq_max = bb->frequency;
710 freq_threshold = freq_max / PARAM_VALUE (PARAM_ALIGN_THRESHOLD);
711
712 if (dump_file)
713 fprintf (dump_file, "freq_max: %i\n",freq_max);
714 FOR_EACH_BB_FN (bb, cfun)
715 {
716 rtx_insn *label = BB_HEAD (bb);
717 int fallthru_frequency = 0, branch_frequency = 0, has_fallthru = 0;
718 edge e;
719 edge_iterator ei;
720
721 if (!LABEL_P (label)
722 || optimize_bb_for_size_p (bb))
723 {
724 if (dump_file)
725 fprintf (dump_file,
726 "BB %4i freq %4i loop %2i loop_depth %2i skipped.\n",
727 bb->index, bb->frequency, bb->loop_father->num,
728 bb_loop_depth (bb));
729 continue;
730 }
731 max_log = LABEL_ALIGN (label);
732 max_skip = targetm.asm_out.label_align_max_skip (label);
733
734 FOR_EACH_EDGE (e, ei, bb->preds)
735 {
736 if (e->flags & EDGE_FALLTHRU)
737 has_fallthru = 1, fallthru_frequency += EDGE_FREQUENCY (e);
738 else
739 branch_frequency += EDGE_FREQUENCY (e);
740 }
741 if (dump_file)
742 {
743 fprintf (dump_file, "BB %4i freq %4i loop %2i loop_depth"
744 " %2i fall %4i branch %4i",
745 bb->index, bb->frequency, bb->loop_father->num,
746 bb_loop_depth (bb),
747 fallthru_frequency, branch_frequency);
748 if (!bb->loop_father->inner && bb->loop_father->num)
749 fprintf (dump_file, " inner_loop");
750 if (bb->loop_father->header == bb)
751 fprintf (dump_file, " loop_header");
752 fprintf (dump_file, "\n");
753 }
754
755 /* There are two purposes to align block with no fallthru incoming edge:
756 1) to avoid fetch stalls when branch destination is near cache boundary
757 2) to improve cache efficiency in case the previous block is not executed
758 (so it does not need to be in the cache).
759
760 We to catch first case, we align frequently executed blocks.
761 To catch the second, we align blocks that are executed more frequently
762 than the predecessor and the predecessor is likely to not be executed
763 when function is called. */
764
765 if (!has_fallthru
766 && (branch_frequency > freq_threshold
767 || (bb->frequency > bb->prev_bb->frequency * 10
768 && (bb->prev_bb->frequency
769 <= ENTRY_BLOCK_PTR_FOR_FN (cfun)->frequency / 2))))
770 {
771 log = JUMP_ALIGN (label);
772 if (dump_file)
773 fprintf (dump_file, " jump alignment added.\n");
774 if (max_log < log)
775 {
776 max_log = log;
777 max_skip = targetm.asm_out.jump_align_max_skip (label);
778 }
779 }
780 /* In case block is frequent and reached mostly by non-fallthru edge,
781 align it. It is most likely a first block of loop. */
782 if (has_fallthru
783 && !(single_succ_p (bb)
784 && single_succ (bb) == EXIT_BLOCK_PTR_FOR_FN (cfun))
785 && optimize_bb_for_speed_p (bb)
786 && branch_frequency + fallthru_frequency > freq_threshold
787 && (branch_frequency
788 > fallthru_frequency * PARAM_VALUE (PARAM_ALIGN_LOOP_ITERATIONS)))
789 {
790 log = LOOP_ALIGN (label);
791 if (dump_file)
792 fprintf (dump_file, " internal loop alignment added.\n");
793 if (max_log < log)
794 {
795 max_log = log;
796 max_skip = targetm.asm_out.loop_align_max_skip (label);
797 }
798 }
799 LABEL_TO_ALIGNMENT (label) = max_log;
800 LABEL_TO_MAX_SKIP (label) = max_skip;
801 }
802
803 loop_optimizer_finalize ();
804 free_dominance_info (CDI_DOMINATORS);
805 return 0;
806 }
807
808 /* Grow the LABEL_ALIGN array after new labels are created. */
809
810 static void
811 grow_label_align (void)
812 {
813 int old = max_labelno;
814 int n_labels;
815 int n_old_labels;
816
817 max_labelno = max_label_num ();
818
819 n_labels = max_labelno - min_labelno + 1;
820 n_old_labels = old - min_labelno + 1;
821
822 label_align = XRESIZEVEC (struct label_alignment, label_align, n_labels);
823
824 /* Range of labels grows monotonically in the function. Failing here
825 means that the initialization of array got lost. */
826 gcc_assert (n_old_labels <= n_labels);
827
828 memset (label_align + n_old_labels, 0,
829 (n_labels - n_old_labels) * sizeof (struct label_alignment));
830 }
831
832 /* Update the already computed alignment information. LABEL_PAIRS is a vector
833 made up of pairs of labels for which the alignment information of the first
834 element will be copied from that of the second element. */
835
836 void
837 update_alignments (vec<rtx> &label_pairs)
838 {
839 unsigned int i = 0;
840 rtx iter, label = NULL_RTX;
841
842 if (max_labelno != max_label_num ())
843 grow_label_align ();
844
845 FOR_EACH_VEC_ELT (label_pairs, i, iter)
846 if (i & 1)
847 {
848 LABEL_TO_ALIGNMENT (label) = LABEL_TO_ALIGNMENT (iter);
849 LABEL_TO_MAX_SKIP (label) = LABEL_TO_MAX_SKIP (iter);
850 }
851 else
852 label = iter;
853 }
854
855 namespace {
856
857 const pass_data pass_data_compute_alignments =
858 {
859 RTL_PASS, /* type */
860 "alignments", /* name */
861 OPTGROUP_NONE, /* optinfo_flags */
862 TV_NONE, /* tv_id */
863 0, /* properties_required */
864 0, /* properties_provided */
865 0, /* properties_destroyed */
866 0, /* todo_flags_start */
867 0, /* todo_flags_finish */
868 };
869
870 class pass_compute_alignments : public rtl_opt_pass
871 {
872 public:
873 pass_compute_alignments (gcc::context *ctxt)
874 : rtl_opt_pass (pass_data_compute_alignments, ctxt)
875 {}
876
877 /* opt_pass methods: */
878 virtual unsigned int execute (function *) { return compute_alignments (); }
879
880 }; // class pass_compute_alignments
881
882 } // anon namespace
883
884 rtl_opt_pass *
885 make_pass_compute_alignments (gcc::context *ctxt)
886 {
887 return new pass_compute_alignments (ctxt);
888 }
889
890 \f
891 /* Make a pass over all insns and compute their actual lengths by shortening
892 any branches of variable length if possible. */
893
894 /* shorten_branches might be called multiple times: for example, the SH
895 port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG.
896 In order to do this, it needs proper length information, which it obtains
897 by calling shorten_branches. This cannot be collapsed with
898 shorten_branches itself into a single pass unless we also want to integrate
899 reorg.c, since the branch splitting exposes new instructions with delay
900 slots. */
901
902 void
903 shorten_branches (rtx_insn *first)
904 {
905 rtx_insn *insn;
906 int max_uid;
907 int i;
908 int max_log;
909 int max_skip;
910 #define MAX_CODE_ALIGN 16
911 rtx_insn *seq;
912 int something_changed = 1;
913 char *varying_length;
914 rtx body;
915 int uid;
916 rtx align_tab[MAX_CODE_ALIGN];
917
918 /* Compute maximum UID and allocate label_align / uid_shuid. */
919 max_uid = get_max_uid ();
920
921 /* Free uid_shuid before reallocating it. */
922 free (uid_shuid);
923
924 uid_shuid = XNEWVEC (int, max_uid);
925
926 if (max_labelno != max_label_num ())
927 grow_label_align ();
928
929 /* Initialize label_align and set up uid_shuid to be strictly
930 monotonically rising with insn order. */
931 /* We use max_log here to keep track of the maximum alignment we want to
932 impose on the next CODE_LABEL (or the current one if we are processing
933 the CODE_LABEL itself). */
934
935 max_log = 0;
936 max_skip = 0;
937
938 for (insn = get_insns (), i = 1; insn; insn = NEXT_INSN (insn))
939 {
940 int log;
941
942 INSN_SHUID (insn) = i++;
943 if (INSN_P (insn))
944 continue;
945
946 if (LABEL_P (insn))
947 {
948 rtx_insn *next;
949 bool next_is_jumptable;
950
951 /* Merge in alignments computed by compute_alignments. */
952 log = LABEL_TO_ALIGNMENT (insn);
953 if (max_log < log)
954 {
955 max_log = log;
956 max_skip = LABEL_TO_MAX_SKIP (insn);
957 }
958
959 next = next_nonnote_insn (insn);
960 next_is_jumptable = next && JUMP_TABLE_DATA_P (next);
961 if (!next_is_jumptable)
962 {
963 log = LABEL_ALIGN (insn);
964 if (max_log < log)
965 {
966 max_log = log;
967 max_skip = targetm.asm_out.label_align_max_skip (insn);
968 }
969 }
970 /* ADDR_VECs only take room if read-only data goes into the text
971 section. */
972 if ((JUMP_TABLES_IN_TEXT_SECTION
973 || readonly_data_section == text_section)
974 && next_is_jumptable)
975 {
976 log = ADDR_VEC_ALIGN (next);
977 if (max_log < log)
978 {
979 max_log = log;
980 max_skip = targetm.asm_out.label_align_max_skip (insn);
981 }
982 }
983 LABEL_TO_ALIGNMENT (insn) = max_log;
984 LABEL_TO_MAX_SKIP (insn) = max_skip;
985 max_log = 0;
986 max_skip = 0;
987 }
988 else if (BARRIER_P (insn))
989 {
990 rtx_insn *label;
991
992 for (label = insn; label && ! INSN_P (label);
993 label = NEXT_INSN (label))
994 if (LABEL_P (label))
995 {
996 log = LABEL_ALIGN_AFTER_BARRIER (insn);
997 if (max_log < log)
998 {
999 max_log = log;
1000 max_skip = targetm.asm_out.label_align_after_barrier_max_skip (label);
1001 }
1002 break;
1003 }
1004 }
1005 }
1006 if (!HAVE_ATTR_length)
1007 return;
1008
1009 /* Allocate the rest of the arrays. */
1010 insn_lengths = XNEWVEC (int, max_uid);
1011 insn_lengths_max_uid = max_uid;
1012 /* Syntax errors can lead to labels being outside of the main insn stream.
1013 Initialize insn_addresses, so that we get reproducible results. */
1014 INSN_ADDRESSES_ALLOC (max_uid);
1015
1016 varying_length = XCNEWVEC (char, max_uid);
1017
1018 /* Initialize uid_align. We scan instructions
1019 from end to start, and keep in align_tab[n] the last seen insn
1020 that does an alignment of at least n+1, i.e. the successor
1021 in the alignment chain for an insn that does / has a known
1022 alignment of n. */
1023 uid_align = XCNEWVEC (rtx, max_uid);
1024
1025 for (i = MAX_CODE_ALIGN; --i >= 0;)
1026 align_tab[i] = NULL_RTX;
1027 seq = get_last_insn ();
1028 for (; seq; seq = PREV_INSN (seq))
1029 {
1030 int uid = INSN_UID (seq);
1031 int log;
1032 log = (LABEL_P (seq) ? LABEL_TO_ALIGNMENT (seq) : 0);
1033 uid_align[uid] = align_tab[0];
1034 if (log)
1035 {
1036 /* Found an alignment label. */
1037 uid_align[uid] = align_tab[log];
1038 for (i = log - 1; i >= 0; i--)
1039 align_tab[i] = seq;
1040 }
1041 }
1042
1043 /* When optimizing, we start assuming minimum length, and keep increasing
1044 lengths as we find the need for this, till nothing changes.
1045 When not optimizing, we start assuming maximum lengths, and
1046 do a single pass to update the lengths. */
1047 bool increasing = optimize != 0;
1048
1049 #ifdef CASE_VECTOR_SHORTEN_MODE
1050 if (optimize)
1051 {
1052 /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum
1053 label fields. */
1054
1055 int min_shuid = INSN_SHUID (get_insns ()) - 1;
1056 int max_shuid = INSN_SHUID (get_last_insn ()) + 1;
1057 int rel;
1058
1059 for (insn = first; insn != 0; insn = NEXT_INSN (insn))
1060 {
1061 rtx min_lab = NULL_RTX, max_lab = NULL_RTX, pat;
1062 int len, i, min, max, insn_shuid;
1063 int min_align;
1064 addr_diff_vec_flags flags;
1065
1066 if (! JUMP_TABLE_DATA_P (insn)
1067 || GET_CODE (PATTERN (insn)) != ADDR_DIFF_VEC)
1068 continue;
1069 pat = PATTERN (insn);
1070 len = XVECLEN (pat, 1);
1071 gcc_assert (len > 0);
1072 min_align = MAX_CODE_ALIGN;
1073 for (min = max_shuid, max = min_shuid, i = len - 1; i >= 0; i--)
1074 {
1075 rtx lab = XEXP (XVECEXP (pat, 1, i), 0);
1076 int shuid = INSN_SHUID (lab);
1077 if (shuid < min)
1078 {
1079 min = shuid;
1080 min_lab = lab;
1081 }
1082 if (shuid > max)
1083 {
1084 max = shuid;
1085 max_lab = lab;
1086 }
1087 if (min_align > LABEL_TO_ALIGNMENT (lab))
1088 min_align = LABEL_TO_ALIGNMENT (lab);
1089 }
1090 XEXP (pat, 2) = gen_rtx_LABEL_REF (Pmode, min_lab);
1091 XEXP (pat, 3) = gen_rtx_LABEL_REF (Pmode, max_lab);
1092 insn_shuid = INSN_SHUID (insn);
1093 rel = INSN_SHUID (XEXP (XEXP (pat, 0), 0));
1094 memset (&flags, 0, sizeof (flags));
1095 flags.min_align = min_align;
1096 flags.base_after_vec = rel > insn_shuid;
1097 flags.min_after_vec = min > insn_shuid;
1098 flags.max_after_vec = max > insn_shuid;
1099 flags.min_after_base = min > rel;
1100 flags.max_after_base = max > rel;
1101 ADDR_DIFF_VEC_FLAGS (pat) = flags;
1102
1103 if (increasing)
1104 PUT_MODE (pat, CASE_VECTOR_SHORTEN_MODE (0, 0, pat));
1105 }
1106 }
1107 #endif /* CASE_VECTOR_SHORTEN_MODE */
1108
1109 /* Compute initial lengths, addresses, and varying flags for each insn. */
1110 int (*length_fun) (rtx) = increasing ? insn_min_length : insn_default_length;
1111
1112 for (insn_current_address = 0, insn = first;
1113 insn != 0;
1114 insn_current_address += insn_lengths[uid], insn = NEXT_INSN (insn))
1115 {
1116 uid = INSN_UID (insn);
1117
1118 insn_lengths[uid] = 0;
1119
1120 if (LABEL_P (insn))
1121 {
1122 int log = LABEL_TO_ALIGNMENT (insn);
1123 if (log)
1124 {
1125 int align = 1 << log;
1126 int new_address = (insn_current_address + align - 1) & -align;
1127 insn_lengths[uid] = new_address - insn_current_address;
1128 }
1129 }
1130
1131 INSN_ADDRESSES (uid) = insn_current_address + insn_lengths[uid];
1132
1133 if (NOTE_P (insn) || BARRIER_P (insn)
1134 || LABEL_P (insn) || DEBUG_INSN_P (insn))
1135 continue;
1136 if (INSN_DELETED_P (insn))
1137 continue;
1138
1139 body = PATTERN (insn);
1140 if (JUMP_TABLE_DATA_P (insn))
1141 {
1142 /* This only takes room if read-only data goes into the text
1143 section. */
1144 if (JUMP_TABLES_IN_TEXT_SECTION
1145 || readonly_data_section == text_section)
1146 insn_lengths[uid] = (XVECLEN (body,
1147 GET_CODE (body) == ADDR_DIFF_VEC)
1148 * GET_MODE_SIZE (GET_MODE (body)));
1149 /* Alignment is handled by ADDR_VEC_ALIGN. */
1150 }
1151 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
1152 insn_lengths[uid] = asm_insn_count (body) * insn_default_length (insn);
1153 else if (rtx_sequence *body_seq = dyn_cast <rtx_sequence *> (body))
1154 {
1155 int i;
1156 int const_delay_slots;
1157 #ifdef DELAY_SLOTS
1158 const_delay_slots = const_num_delay_slots (body_seq->insn (0));
1159 #else
1160 const_delay_slots = 0;
1161 #endif
1162 int (*inner_length_fun) (rtx)
1163 = const_delay_slots ? length_fun : insn_default_length;
1164 /* Inside a delay slot sequence, we do not do any branch shortening
1165 if the shortening could change the number of delay slots
1166 of the branch. */
1167 for (i = 0; i < body_seq->len (); i++)
1168 {
1169 rtx_insn *inner_insn = body_seq->insn (i);
1170 int inner_uid = INSN_UID (inner_insn);
1171 int inner_length;
1172
1173 if (GET_CODE (body) == ASM_INPUT
1174 || asm_noperands (PATTERN (inner_insn)) >= 0)
1175 inner_length = (asm_insn_count (PATTERN (inner_insn))
1176 * insn_default_length (inner_insn));
1177 else
1178 inner_length = inner_length_fun (inner_insn);
1179
1180 insn_lengths[inner_uid] = inner_length;
1181 if (const_delay_slots)
1182 {
1183 if ((varying_length[inner_uid]
1184 = insn_variable_length_p (inner_insn)) != 0)
1185 varying_length[uid] = 1;
1186 INSN_ADDRESSES (inner_uid) = (insn_current_address
1187 + insn_lengths[uid]);
1188 }
1189 else
1190 varying_length[inner_uid] = 0;
1191 insn_lengths[uid] += inner_length;
1192 }
1193 }
1194 else if (GET_CODE (body) != USE && GET_CODE (body) != CLOBBER)
1195 {
1196 insn_lengths[uid] = length_fun (insn);
1197 varying_length[uid] = insn_variable_length_p (insn);
1198 }
1199
1200 /* If needed, do any adjustment. */
1201 #ifdef ADJUST_INSN_LENGTH
1202 ADJUST_INSN_LENGTH (insn, insn_lengths[uid]);
1203 if (insn_lengths[uid] < 0)
1204 fatal_insn ("negative insn length", insn);
1205 #endif
1206 }
1207
1208 /* Now loop over all the insns finding varying length insns. For each,
1209 get the current insn length. If it has changed, reflect the change.
1210 When nothing changes for a full pass, we are done. */
1211
1212 while (something_changed)
1213 {
1214 something_changed = 0;
1215 insn_current_align = MAX_CODE_ALIGN - 1;
1216 for (insn_current_address = 0, insn = first;
1217 insn != 0;
1218 insn = NEXT_INSN (insn))
1219 {
1220 int new_length;
1221 #ifdef ADJUST_INSN_LENGTH
1222 int tmp_length;
1223 #endif
1224 int length_align;
1225
1226 uid = INSN_UID (insn);
1227
1228 if (LABEL_P (insn))
1229 {
1230 int log = LABEL_TO_ALIGNMENT (insn);
1231
1232 #ifdef CASE_VECTOR_SHORTEN_MODE
1233 /* If the mode of a following jump table was changed, we
1234 may need to update the alignment of this label. */
1235 rtx_insn *next;
1236 bool next_is_jumptable;
1237
1238 next = next_nonnote_insn (insn);
1239 next_is_jumptable = next && JUMP_TABLE_DATA_P (next);
1240 if ((JUMP_TABLES_IN_TEXT_SECTION
1241 || readonly_data_section == text_section)
1242 && next_is_jumptable)
1243 {
1244 int newlog = ADDR_VEC_ALIGN (next);
1245 if (newlog != log)
1246 {
1247 log = newlog;
1248 LABEL_TO_ALIGNMENT (insn) = log;
1249 something_changed = 1;
1250 }
1251 }
1252 #endif
1253
1254 if (log > insn_current_align)
1255 {
1256 int align = 1 << log;
1257 int new_address= (insn_current_address + align - 1) & -align;
1258 insn_lengths[uid] = new_address - insn_current_address;
1259 insn_current_align = log;
1260 insn_current_address = new_address;
1261 }
1262 else
1263 insn_lengths[uid] = 0;
1264 INSN_ADDRESSES (uid) = insn_current_address;
1265 continue;
1266 }
1267
1268 length_align = INSN_LENGTH_ALIGNMENT (insn);
1269 if (length_align < insn_current_align)
1270 insn_current_align = length_align;
1271
1272 insn_last_address = INSN_ADDRESSES (uid);
1273 INSN_ADDRESSES (uid) = insn_current_address;
1274
1275 #ifdef CASE_VECTOR_SHORTEN_MODE
1276 if (optimize
1277 && JUMP_TABLE_DATA_P (insn)
1278 && GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
1279 {
1280 rtx body = PATTERN (insn);
1281 int old_length = insn_lengths[uid];
1282 rtx rel_lab = XEXP (XEXP (body, 0), 0);
1283 rtx min_lab = XEXP (XEXP (body, 2), 0);
1284 rtx max_lab = XEXP (XEXP (body, 3), 0);
1285 int rel_addr = INSN_ADDRESSES (INSN_UID (rel_lab));
1286 int min_addr = INSN_ADDRESSES (INSN_UID (min_lab));
1287 int max_addr = INSN_ADDRESSES (INSN_UID (max_lab));
1288 rtx prev;
1289 int rel_align = 0;
1290 addr_diff_vec_flags flags;
1291 enum machine_mode vec_mode;
1292
1293 /* Avoid automatic aggregate initialization. */
1294 flags = ADDR_DIFF_VEC_FLAGS (body);
1295
1296 /* Try to find a known alignment for rel_lab. */
1297 for (prev = rel_lab;
1298 prev
1299 && ! insn_lengths[INSN_UID (prev)]
1300 && ! (varying_length[INSN_UID (prev)] & 1);
1301 prev = PREV_INSN (prev))
1302 if (varying_length[INSN_UID (prev)] & 2)
1303 {
1304 rel_align = LABEL_TO_ALIGNMENT (prev);
1305 break;
1306 }
1307
1308 /* See the comment on addr_diff_vec_flags in rtl.h for the
1309 meaning of the flags values. base: REL_LAB vec: INSN */
1310 /* Anything after INSN has still addresses from the last
1311 pass; adjust these so that they reflect our current
1312 estimate for this pass. */
1313 if (flags.base_after_vec)
1314 rel_addr += insn_current_address - insn_last_address;
1315 if (flags.min_after_vec)
1316 min_addr += insn_current_address - insn_last_address;
1317 if (flags.max_after_vec)
1318 max_addr += insn_current_address - insn_last_address;
1319 /* We want to know the worst case, i.e. lowest possible value
1320 for the offset of MIN_LAB. If MIN_LAB is after REL_LAB,
1321 its offset is positive, and we have to be wary of code shrink;
1322 otherwise, it is negative, and we have to be vary of code
1323 size increase. */
1324 if (flags.min_after_base)
1325 {
1326 /* If INSN is between REL_LAB and MIN_LAB, the size
1327 changes we are about to make can change the alignment
1328 within the observed offset, therefore we have to break
1329 it up into two parts that are independent. */
1330 if (! flags.base_after_vec && flags.min_after_vec)
1331 {
1332 min_addr -= align_fuzz (rel_lab, insn, rel_align, 0);
1333 min_addr -= align_fuzz (insn, min_lab, 0, 0);
1334 }
1335 else
1336 min_addr -= align_fuzz (rel_lab, min_lab, rel_align, 0);
1337 }
1338 else
1339 {
1340 if (flags.base_after_vec && ! flags.min_after_vec)
1341 {
1342 min_addr -= align_fuzz (min_lab, insn, 0, ~0);
1343 min_addr -= align_fuzz (insn, rel_lab, 0, ~0);
1344 }
1345 else
1346 min_addr -= align_fuzz (min_lab, rel_lab, 0, ~0);
1347 }
1348 /* Likewise, determine the highest lowest possible value
1349 for the offset of MAX_LAB. */
1350 if (flags.max_after_base)
1351 {
1352 if (! flags.base_after_vec && flags.max_after_vec)
1353 {
1354 max_addr += align_fuzz (rel_lab, insn, rel_align, ~0);
1355 max_addr += align_fuzz (insn, max_lab, 0, ~0);
1356 }
1357 else
1358 max_addr += align_fuzz (rel_lab, max_lab, rel_align, ~0);
1359 }
1360 else
1361 {
1362 if (flags.base_after_vec && ! flags.max_after_vec)
1363 {
1364 max_addr += align_fuzz (max_lab, insn, 0, 0);
1365 max_addr += align_fuzz (insn, rel_lab, 0, 0);
1366 }
1367 else
1368 max_addr += align_fuzz (max_lab, rel_lab, 0, 0);
1369 }
1370 vec_mode = CASE_VECTOR_SHORTEN_MODE (min_addr - rel_addr,
1371 max_addr - rel_addr, body);
1372 if (!increasing
1373 || (GET_MODE_SIZE (vec_mode)
1374 >= GET_MODE_SIZE (GET_MODE (body))))
1375 PUT_MODE (body, vec_mode);
1376 if (JUMP_TABLES_IN_TEXT_SECTION
1377 || readonly_data_section == text_section)
1378 {
1379 insn_lengths[uid]
1380 = (XVECLEN (body, 1) * GET_MODE_SIZE (GET_MODE (body)));
1381 insn_current_address += insn_lengths[uid];
1382 if (insn_lengths[uid] != old_length)
1383 something_changed = 1;
1384 }
1385
1386 continue;
1387 }
1388 #endif /* CASE_VECTOR_SHORTEN_MODE */
1389
1390 if (! (varying_length[uid]))
1391 {
1392 if (NONJUMP_INSN_P (insn)
1393 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1394 {
1395 int i;
1396
1397 body = PATTERN (insn);
1398 for (i = 0; i < XVECLEN (body, 0); i++)
1399 {
1400 rtx inner_insn = XVECEXP (body, 0, i);
1401 int inner_uid = INSN_UID (inner_insn);
1402
1403 INSN_ADDRESSES (inner_uid) = insn_current_address;
1404
1405 insn_current_address += insn_lengths[inner_uid];
1406 }
1407 }
1408 else
1409 insn_current_address += insn_lengths[uid];
1410
1411 continue;
1412 }
1413
1414 if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
1415 {
1416 int i;
1417
1418 body = PATTERN (insn);
1419 new_length = 0;
1420 for (i = 0; i < XVECLEN (body, 0); i++)
1421 {
1422 rtx inner_insn = XVECEXP (body, 0, i);
1423 int inner_uid = INSN_UID (inner_insn);
1424 int inner_length;
1425
1426 INSN_ADDRESSES (inner_uid) = insn_current_address;
1427
1428 /* insn_current_length returns 0 for insns with a
1429 non-varying length. */
1430 if (! varying_length[inner_uid])
1431 inner_length = insn_lengths[inner_uid];
1432 else
1433 inner_length = insn_current_length (inner_insn);
1434
1435 if (inner_length != insn_lengths[inner_uid])
1436 {
1437 if (!increasing || inner_length > insn_lengths[inner_uid])
1438 {
1439 insn_lengths[inner_uid] = inner_length;
1440 something_changed = 1;
1441 }
1442 else
1443 inner_length = insn_lengths[inner_uid];
1444 }
1445 insn_current_address += inner_length;
1446 new_length += inner_length;
1447 }
1448 }
1449 else
1450 {
1451 new_length = insn_current_length (insn);
1452 insn_current_address += new_length;
1453 }
1454
1455 #ifdef ADJUST_INSN_LENGTH
1456 /* If needed, do any adjustment. */
1457 tmp_length = new_length;
1458 ADJUST_INSN_LENGTH (insn, new_length);
1459 insn_current_address += (new_length - tmp_length);
1460 #endif
1461
1462 if (new_length != insn_lengths[uid]
1463 && (!increasing || new_length > insn_lengths[uid]))
1464 {
1465 insn_lengths[uid] = new_length;
1466 something_changed = 1;
1467 }
1468 else
1469 insn_current_address += insn_lengths[uid] - new_length;
1470 }
1471 /* For a non-optimizing compile, do only a single pass. */
1472 if (!increasing)
1473 break;
1474 }
1475
1476 free (varying_length);
1477 }
1478
1479 /* Given the body of an INSN known to be generated by an ASM statement, return
1480 the number of machine instructions likely to be generated for this insn.
1481 This is used to compute its length. */
1482
1483 static int
1484 asm_insn_count (rtx body)
1485 {
1486 const char *templ;
1487
1488 if (GET_CODE (body) == ASM_INPUT)
1489 templ = XSTR (body, 0);
1490 else
1491 templ = decode_asm_operands (body, NULL, NULL, NULL, NULL, NULL);
1492
1493 return asm_str_count (templ);
1494 }
1495
1496 /* Return the number of machine instructions likely to be generated for the
1497 inline-asm template. */
1498 int
1499 asm_str_count (const char *templ)
1500 {
1501 int count = 1;
1502
1503 if (!*templ)
1504 return 0;
1505
1506 for (; *templ; templ++)
1507 if (IS_ASM_LOGICAL_LINE_SEPARATOR (*templ, templ)
1508 || *templ == '\n')
1509 count++;
1510
1511 return count;
1512 }
1513 \f
1514 /* ??? This is probably the wrong place for these. */
1515 /* Structure recording the mapping from source file and directory
1516 names at compile time to those to be embedded in debug
1517 information. */
1518 typedef struct debug_prefix_map
1519 {
1520 const char *old_prefix;
1521 const char *new_prefix;
1522 size_t old_len;
1523 size_t new_len;
1524 struct debug_prefix_map *next;
1525 } debug_prefix_map;
1526
1527 /* Linked list of such structures. */
1528 static debug_prefix_map *debug_prefix_maps;
1529
1530
1531 /* Record a debug file prefix mapping. ARG is the argument to
1532 -fdebug-prefix-map and must be of the form OLD=NEW. */
1533
1534 void
1535 add_debug_prefix_map (const char *arg)
1536 {
1537 debug_prefix_map *map;
1538 const char *p;
1539
1540 p = strchr (arg, '=');
1541 if (!p)
1542 {
1543 error ("invalid argument %qs to -fdebug-prefix-map", arg);
1544 return;
1545 }
1546 map = XNEW (debug_prefix_map);
1547 map->old_prefix = xstrndup (arg, p - arg);
1548 map->old_len = p - arg;
1549 p++;
1550 map->new_prefix = xstrdup (p);
1551 map->new_len = strlen (p);
1552 map->next = debug_prefix_maps;
1553 debug_prefix_maps = map;
1554 }
1555
1556 /* Perform user-specified mapping of debug filename prefixes. Return
1557 the new name corresponding to FILENAME. */
1558
1559 const char *
1560 remap_debug_filename (const char *filename)
1561 {
1562 debug_prefix_map *map;
1563 char *s;
1564 const char *name;
1565 size_t name_len;
1566
1567 for (map = debug_prefix_maps; map; map = map->next)
1568 if (filename_ncmp (filename, map->old_prefix, map->old_len) == 0)
1569 break;
1570 if (!map)
1571 return filename;
1572 name = filename + map->old_len;
1573 name_len = strlen (name) + 1;
1574 s = (char *) alloca (name_len + map->new_len);
1575 memcpy (s, map->new_prefix, map->new_len);
1576 memcpy (s + map->new_len, name, name_len);
1577 return ggc_strdup (s);
1578 }
1579 \f
1580 /* Return true if DWARF2 debug info can be emitted for DECL. */
1581
1582 static bool
1583 dwarf2_debug_info_emitted_p (tree decl)
1584 {
1585 if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG)
1586 return false;
1587
1588 if (DECL_IGNORED_P (decl))
1589 return false;
1590
1591 return true;
1592 }
1593
1594 /* Return scope resulting from combination of S1 and S2. */
1595 static tree
1596 choose_inner_scope (tree s1, tree s2)
1597 {
1598 if (!s1)
1599 return s2;
1600 if (!s2)
1601 return s1;
1602 if (BLOCK_NUMBER (s1) > BLOCK_NUMBER (s2))
1603 return s1;
1604 return s2;
1605 }
1606
1607 /* Emit lexical block notes needed to change scope from S1 to S2. */
1608
1609 static void
1610 change_scope (rtx_insn *orig_insn, tree s1, tree s2)
1611 {
1612 rtx_insn *insn = orig_insn;
1613 tree com = NULL_TREE;
1614 tree ts1 = s1, ts2 = s2;
1615 tree s;
1616
1617 while (ts1 != ts2)
1618 {
1619 gcc_assert (ts1 && ts2);
1620 if (BLOCK_NUMBER (ts1) > BLOCK_NUMBER (ts2))
1621 ts1 = BLOCK_SUPERCONTEXT (ts1);
1622 else if (BLOCK_NUMBER (ts1) < BLOCK_NUMBER (ts2))
1623 ts2 = BLOCK_SUPERCONTEXT (ts2);
1624 else
1625 {
1626 ts1 = BLOCK_SUPERCONTEXT (ts1);
1627 ts2 = BLOCK_SUPERCONTEXT (ts2);
1628 }
1629 }
1630 com = ts1;
1631
1632 /* Close scopes. */
1633 s = s1;
1634 while (s != com)
1635 {
1636 rtx_note *note = emit_note_before (NOTE_INSN_BLOCK_END, insn);
1637 NOTE_BLOCK (note) = s;
1638 s = BLOCK_SUPERCONTEXT (s);
1639 }
1640
1641 /* Open scopes. */
1642 s = s2;
1643 while (s != com)
1644 {
1645 insn = emit_note_before (NOTE_INSN_BLOCK_BEG, insn);
1646 NOTE_BLOCK (insn) = s;
1647 s = BLOCK_SUPERCONTEXT (s);
1648 }
1649 }
1650
1651 /* Rebuild all the NOTE_INSN_BLOCK_BEG and NOTE_INSN_BLOCK_END notes based
1652 on the scope tree and the newly reordered instructions. */
1653
1654 static void
1655 reemit_insn_block_notes (void)
1656 {
1657 tree cur_block = DECL_INITIAL (cfun->decl);
1658 rtx_insn *insn;
1659 rtx_note *note;
1660
1661 insn = get_insns ();
1662 for (; insn; insn = NEXT_INSN (insn))
1663 {
1664 tree this_block;
1665
1666 /* Prevent lexical blocks from straddling section boundaries. */
1667 if (NOTE_P (insn) && NOTE_KIND (insn) == NOTE_INSN_SWITCH_TEXT_SECTIONS)
1668 {
1669 for (tree s = cur_block; s != DECL_INITIAL (cfun->decl);
1670 s = BLOCK_SUPERCONTEXT (s))
1671 {
1672 rtx_note *note = emit_note_before (NOTE_INSN_BLOCK_END, insn);
1673 NOTE_BLOCK (note) = s;
1674 note = emit_note_after (NOTE_INSN_BLOCK_BEG, insn);
1675 NOTE_BLOCK (note) = s;
1676 }
1677 }
1678
1679 if (!active_insn_p (insn))
1680 continue;
1681
1682 /* Avoid putting scope notes between jump table and its label. */
1683 if (JUMP_TABLE_DATA_P (insn))
1684 continue;
1685
1686 this_block = insn_scope (insn);
1687 /* For sequences compute scope resulting from merging all scopes
1688 of instructions nested inside. */
1689 if (rtx_sequence *body = dyn_cast <rtx_sequence *> (PATTERN (insn)))
1690 {
1691 int i;
1692
1693 this_block = NULL;
1694 for (i = 0; i < body->len (); i++)
1695 this_block = choose_inner_scope (this_block,
1696 insn_scope (body->insn (i)));
1697 }
1698 if (! this_block)
1699 {
1700 if (INSN_LOCATION (insn) == UNKNOWN_LOCATION)
1701 continue;
1702 else
1703 this_block = DECL_INITIAL (cfun->decl);
1704 }
1705
1706 if (this_block != cur_block)
1707 {
1708 change_scope (insn, cur_block, this_block);
1709 cur_block = this_block;
1710 }
1711 }
1712
1713 /* change_scope emits before the insn, not after. */
1714 note = emit_note (NOTE_INSN_DELETED);
1715 change_scope (note, cur_block, DECL_INITIAL (cfun->decl));
1716 delete_insn (note);
1717
1718 reorder_blocks ();
1719 }
1720
1721 /* Output assembler code for the start of a function,
1722 and initialize some of the variables in this file
1723 for the new function. The label for the function and associated
1724 assembler pseudo-ops have already been output in `assemble_start_function'.
1725
1726 FIRST is the first insn of the rtl for the function being compiled.
1727 FILE is the file to write assembler code to.
1728 OPTIMIZE_P is nonzero if we should eliminate redundant
1729 test and compare insns. */
1730
1731 void
1732 final_start_function (rtx_insn *first, FILE *file,
1733 int optimize_p ATTRIBUTE_UNUSED)
1734 {
1735 block_depth = 0;
1736
1737 this_is_asm_operands = 0;
1738
1739 need_profile_function = false;
1740
1741 last_filename = LOCATION_FILE (prologue_location);
1742 last_linenum = LOCATION_LINE (prologue_location);
1743 last_discriminator = discriminator = 0;
1744
1745 high_block_linenum = high_function_linenum = last_linenum;
1746
1747 if (flag_sanitize & SANITIZE_ADDRESS)
1748 asan_function_start ();
1749
1750 if (!DECL_IGNORED_P (current_function_decl))
1751 debug_hooks->begin_prologue (last_linenum, last_filename);
1752
1753 if (!dwarf2_debug_info_emitted_p (current_function_decl))
1754 dwarf2out_begin_prologue (0, NULL);
1755
1756 #ifdef LEAF_REG_REMAP
1757 if (crtl->uses_only_leaf_regs)
1758 leaf_renumber_regs (first);
1759 #endif
1760
1761 /* The Sun386i and perhaps other machines don't work right
1762 if the profiling code comes after the prologue. */
1763 if (targetm.profile_before_prologue () && crtl->profile)
1764 {
1765 if (targetm.asm_out.function_prologue
1766 == default_function_pro_epilogue
1767 #ifdef HAVE_prologue
1768 && HAVE_prologue
1769 #endif
1770 )
1771 {
1772 rtx_insn *insn;
1773 for (insn = first; insn; insn = NEXT_INSN (insn))
1774 if (!NOTE_P (insn))
1775 {
1776 insn = NULL;
1777 break;
1778 }
1779 else if (NOTE_KIND (insn) == NOTE_INSN_BASIC_BLOCK
1780 || NOTE_KIND (insn) == NOTE_INSN_FUNCTION_BEG)
1781 break;
1782 else if (NOTE_KIND (insn) == NOTE_INSN_DELETED
1783 || NOTE_KIND (insn) == NOTE_INSN_VAR_LOCATION)
1784 continue;
1785 else
1786 {
1787 insn = NULL;
1788 break;
1789 }
1790
1791 if (insn)
1792 need_profile_function = true;
1793 else
1794 profile_function (file);
1795 }
1796 else
1797 profile_function (file);
1798 }
1799
1800 /* If debugging, assign block numbers to all of the blocks in this
1801 function. */
1802 if (write_symbols)
1803 {
1804 reemit_insn_block_notes ();
1805 number_blocks (current_function_decl);
1806 /* We never actually put out begin/end notes for the top-level
1807 block in the function. But, conceptually, that block is
1808 always needed. */
1809 TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl)) = 1;
1810 }
1811
1812 if (warn_frame_larger_than
1813 && get_frame_size () > frame_larger_than_size)
1814 {
1815 /* Issue a warning */
1816 warning (OPT_Wframe_larger_than_,
1817 "the frame size of %wd bytes is larger than %wd bytes",
1818 get_frame_size (), frame_larger_than_size);
1819 }
1820
1821 /* First output the function prologue: code to set up the stack frame. */
1822 targetm.asm_out.function_prologue (file, get_frame_size ());
1823
1824 /* If the machine represents the prologue as RTL, the profiling code must
1825 be emitted when NOTE_INSN_PROLOGUE_END is scanned. */
1826 #ifdef HAVE_prologue
1827 if (! HAVE_prologue)
1828 #endif
1829 profile_after_prologue (file);
1830 }
1831
1832 static void
1833 profile_after_prologue (FILE *file ATTRIBUTE_UNUSED)
1834 {
1835 if (!targetm.profile_before_prologue () && crtl->profile)
1836 profile_function (file);
1837 }
1838
1839 static void
1840 profile_function (FILE *file ATTRIBUTE_UNUSED)
1841 {
1842 #ifndef NO_PROFILE_COUNTERS
1843 # define NO_PROFILE_COUNTERS 0
1844 #endif
1845 #ifdef ASM_OUTPUT_REG_PUSH
1846 rtx sval = NULL, chain = NULL;
1847
1848 if (cfun->returns_struct)
1849 sval = targetm.calls.struct_value_rtx (TREE_TYPE (current_function_decl),
1850 true);
1851 if (cfun->static_chain_decl)
1852 chain = targetm.calls.static_chain (current_function_decl, true);
1853 #endif /* ASM_OUTPUT_REG_PUSH */
1854
1855 if (! NO_PROFILE_COUNTERS)
1856 {
1857 int align = MIN (BIGGEST_ALIGNMENT, LONG_TYPE_SIZE);
1858 switch_to_section (data_section);
1859 ASM_OUTPUT_ALIGN (file, floor_log2 (align / BITS_PER_UNIT));
1860 targetm.asm_out.internal_label (file, "LP", current_function_funcdef_no);
1861 assemble_integer (const0_rtx, LONG_TYPE_SIZE / BITS_PER_UNIT, align, 1);
1862 }
1863
1864 switch_to_section (current_function_section ());
1865
1866 #ifdef ASM_OUTPUT_REG_PUSH
1867 if (sval && REG_P (sval))
1868 ASM_OUTPUT_REG_PUSH (file, REGNO (sval));
1869 if (chain && REG_P (chain))
1870 ASM_OUTPUT_REG_PUSH (file, REGNO (chain));
1871 #endif
1872
1873 FUNCTION_PROFILER (file, current_function_funcdef_no);
1874
1875 #ifdef ASM_OUTPUT_REG_PUSH
1876 if (chain && REG_P (chain))
1877 ASM_OUTPUT_REG_POP (file, REGNO (chain));
1878 if (sval && REG_P (sval))
1879 ASM_OUTPUT_REG_POP (file, REGNO (sval));
1880 #endif
1881 }
1882
1883 /* Output assembler code for the end of a function.
1884 For clarity, args are same as those of `final_start_function'
1885 even though not all of them are needed. */
1886
1887 void
1888 final_end_function (void)
1889 {
1890 app_disable ();
1891
1892 if (!DECL_IGNORED_P (current_function_decl))
1893 debug_hooks->end_function (high_function_linenum);
1894
1895 /* Finally, output the function epilogue:
1896 code to restore the stack frame and return to the caller. */
1897 targetm.asm_out.function_epilogue (asm_out_file, get_frame_size ());
1898
1899 /* And debug output. */
1900 if (!DECL_IGNORED_P (current_function_decl))
1901 debug_hooks->end_epilogue (last_linenum, last_filename);
1902
1903 if (!dwarf2_debug_info_emitted_p (current_function_decl)
1904 && dwarf2out_do_frame ())
1905 dwarf2out_end_epilogue (last_linenum, last_filename);
1906 }
1907 \f
1908
1909 /* Dumper helper for basic block information. FILE is the assembly
1910 output file, and INSN is the instruction being emitted. */
1911
1912 static void
1913 dump_basic_block_info (FILE *file, rtx_insn *insn, basic_block *start_to_bb,
1914 basic_block *end_to_bb, int bb_map_size, int *bb_seqn)
1915 {
1916 basic_block bb;
1917
1918 if (!flag_debug_asm)
1919 return;
1920
1921 if (INSN_UID (insn) < bb_map_size
1922 && (bb = start_to_bb[INSN_UID (insn)]) != NULL)
1923 {
1924 edge e;
1925 edge_iterator ei;
1926
1927 fprintf (file, "%s BLOCK %d", ASM_COMMENT_START, bb->index);
1928 if (bb->frequency)
1929 fprintf (file, " freq:%d", bb->frequency);
1930 if (bb->count)
1931 fprintf (file, " count:%"PRId64,
1932 bb->count);
1933 fprintf (file, " seq:%d", (*bb_seqn)++);
1934 fprintf (file, "\n%s PRED:", ASM_COMMENT_START);
1935 FOR_EACH_EDGE (e, ei, bb->preds)
1936 {
1937 dump_edge_info (file, e, TDF_DETAILS, 0);
1938 }
1939 fprintf (file, "\n");
1940 }
1941 if (INSN_UID (insn) < bb_map_size
1942 && (bb = end_to_bb[INSN_UID (insn)]) != NULL)
1943 {
1944 edge e;
1945 edge_iterator ei;
1946
1947 fprintf (asm_out_file, "%s SUCC:", ASM_COMMENT_START);
1948 FOR_EACH_EDGE (e, ei, bb->succs)
1949 {
1950 dump_edge_info (asm_out_file, e, TDF_DETAILS, 1);
1951 }
1952 fprintf (file, "\n");
1953 }
1954 }
1955
1956 /* Output assembler code for some insns: all or part of a function.
1957 For description of args, see `final_start_function', above. */
1958
1959 void
1960 final (rtx_insn *first, FILE *file, int optimize_p)
1961 {
1962 rtx_insn *insn, *next;
1963 int seen = 0;
1964
1965 /* Used for -dA dump. */
1966 basic_block *start_to_bb = NULL;
1967 basic_block *end_to_bb = NULL;
1968 int bb_map_size = 0;
1969 int bb_seqn = 0;
1970
1971 last_ignored_compare = 0;
1972
1973 #ifdef HAVE_cc0
1974 for (insn = first; insn; insn = NEXT_INSN (insn))
1975 {
1976 /* If CC tracking across branches is enabled, record the insn which
1977 jumps to each branch only reached from one place. */
1978 if (optimize_p && JUMP_P (insn))
1979 {
1980 rtx lab = JUMP_LABEL (insn);
1981 if (lab && LABEL_P (lab) && LABEL_NUSES (lab) == 1)
1982 {
1983 LABEL_REFS (lab) = insn;
1984 }
1985 }
1986 }
1987 #endif
1988
1989 init_recog ();
1990
1991 CC_STATUS_INIT;
1992
1993 if (flag_debug_asm)
1994 {
1995 basic_block bb;
1996
1997 bb_map_size = get_max_uid () + 1;
1998 start_to_bb = XCNEWVEC (basic_block, bb_map_size);
1999 end_to_bb = XCNEWVEC (basic_block, bb_map_size);
2000
2001 /* There is no cfg for a thunk. */
2002 if (!cfun->is_thunk)
2003 FOR_EACH_BB_REVERSE_FN (bb, cfun)
2004 {
2005 start_to_bb[INSN_UID (BB_HEAD (bb))] = bb;
2006 end_to_bb[INSN_UID (BB_END (bb))] = bb;
2007 }
2008 }
2009
2010 /* Output the insns. */
2011 for (insn = first; insn;)
2012 {
2013 if (HAVE_ATTR_length)
2014 {
2015 if ((unsigned) INSN_UID (insn) >= INSN_ADDRESSES_SIZE ())
2016 {
2017 /* This can be triggered by bugs elsewhere in the compiler if
2018 new insns are created after init_insn_lengths is called. */
2019 gcc_assert (NOTE_P (insn));
2020 insn_current_address = -1;
2021 }
2022 else
2023 insn_current_address = INSN_ADDRESSES (INSN_UID (insn));
2024 }
2025
2026 dump_basic_block_info (file, insn, start_to_bb, end_to_bb,
2027 bb_map_size, &bb_seqn);
2028 insn = final_scan_insn (insn, file, optimize_p, 0, &seen);
2029 }
2030
2031 if (flag_debug_asm)
2032 {
2033 free (start_to_bb);
2034 free (end_to_bb);
2035 }
2036
2037 /* Remove CFI notes, to avoid compare-debug failures. */
2038 for (insn = first; insn; insn = next)
2039 {
2040 next = NEXT_INSN (insn);
2041 if (NOTE_P (insn)
2042 && (NOTE_KIND (insn) == NOTE_INSN_CFI
2043 || NOTE_KIND (insn) == NOTE_INSN_CFI_LABEL))
2044 delete_insn (insn);
2045 }
2046 }
2047 \f
2048 const char *
2049 get_insn_template (int code, rtx insn)
2050 {
2051 switch (insn_data[code].output_format)
2052 {
2053 case INSN_OUTPUT_FORMAT_SINGLE:
2054 return insn_data[code].output.single;
2055 case INSN_OUTPUT_FORMAT_MULTI:
2056 return insn_data[code].output.multi[which_alternative];
2057 case INSN_OUTPUT_FORMAT_FUNCTION:
2058 gcc_assert (insn);
2059 return (*insn_data[code].output.function) (recog_data.operand,
2060 as_a <rtx_insn *> (insn));
2061
2062 default:
2063 gcc_unreachable ();
2064 }
2065 }
2066
2067 /* Emit the appropriate declaration for an alternate-entry-point
2068 symbol represented by INSN, to FILE. INSN is a CODE_LABEL with
2069 LABEL_KIND != LABEL_NORMAL.
2070
2071 The case fall-through in this function is intentional. */
2072 static void
2073 output_alternate_entry_point (FILE *file, rtx_insn *insn)
2074 {
2075 const char *name = LABEL_NAME (insn);
2076
2077 switch (LABEL_KIND (insn))
2078 {
2079 case LABEL_WEAK_ENTRY:
2080 #ifdef ASM_WEAKEN_LABEL
2081 ASM_WEAKEN_LABEL (file, name);
2082 #endif
2083 case LABEL_GLOBAL_ENTRY:
2084 targetm.asm_out.globalize_label (file, name);
2085 case LABEL_STATIC_ENTRY:
2086 #ifdef ASM_OUTPUT_TYPE_DIRECTIVE
2087 ASM_OUTPUT_TYPE_DIRECTIVE (file, name, "function");
2088 #endif
2089 ASM_OUTPUT_LABEL (file, name);
2090 break;
2091
2092 case LABEL_NORMAL:
2093 default:
2094 gcc_unreachable ();
2095 }
2096 }
2097
2098 /* Given a CALL_INSN, find and return the nested CALL. */
2099 static rtx
2100 call_from_call_insn (rtx_call_insn *insn)
2101 {
2102 rtx x;
2103 gcc_assert (CALL_P (insn));
2104 x = PATTERN (insn);
2105
2106 while (GET_CODE (x) != CALL)
2107 {
2108 switch (GET_CODE (x))
2109 {
2110 default:
2111 gcc_unreachable ();
2112 case COND_EXEC:
2113 x = COND_EXEC_CODE (x);
2114 break;
2115 case PARALLEL:
2116 x = XVECEXP (x, 0, 0);
2117 break;
2118 case SET:
2119 x = XEXP (x, 1);
2120 break;
2121 }
2122 }
2123 return x;
2124 }
2125
2126 /* The final scan for one insn, INSN.
2127 Args are same as in `final', except that INSN
2128 is the insn being scanned.
2129 Value returned is the next insn to be scanned.
2130
2131 NOPEEPHOLES is the flag to disallow peephole processing (currently
2132 used for within delayed branch sequence output).
2133
2134 SEEN is used to track the end of the prologue, for emitting
2135 debug information. We force the emission of a line note after
2136 both NOTE_INSN_PROLOGUE_END and NOTE_INSN_FUNCTION_BEG. */
2137
2138 rtx_insn *
2139 final_scan_insn (rtx uncast_insn, FILE *file, int optimize_p ATTRIBUTE_UNUSED,
2140 int nopeepholes ATTRIBUTE_UNUSED, int *seen)
2141 {
2142 #ifdef HAVE_cc0
2143 rtx set;
2144 #endif
2145 rtx_insn *next;
2146
2147 rtx_insn *insn = as_a <rtx_insn *> (uncast_insn);
2148
2149 insn_counter++;
2150
2151 /* Ignore deleted insns. These can occur when we split insns (due to a
2152 template of "#") while not optimizing. */
2153 if (INSN_DELETED_P (insn))
2154 return NEXT_INSN (insn);
2155
2156 switch (GET_CODE (insn))
2157 {
2158 case NOTE:
2159 switch (NOTE_KIND (insn))
2160 {
2161 case NOTE_INSN_DELETED:
2162 break;
2163
2164 case NOTE_INSN_SWITCH_TEXT_SECTIONS:
2165 in_cold_section_p = !in_cold_section_p;
2166
2167 if (dwarf2out_do_frame ())
2168 dwarf2out_switch_text_section ();
2169 else if (!DECL_IGNORED_P (current_function_decl))
2170 debug_hooks->switch_text_section ();
2171
2172 switch_to_section (current_function_section ());
2173 targetm.asm_out.function_switched_text_sections (asm_out_file,
2174 current_function_decl,
2175 in_cold_section_p);
2176 /* Emit a label for the split cold section. Form label name by
2177 suffixing "cold" to the original function's name. */
2178 if (in_cold_section_p)
2179 {
2180 tree cold_function_name
2181 = clone_function_name (current_function_decl, "cold");
2182 ASM_OUTPUT_LABEL (asm_out_file,
2183 IDENTIFIER_POINTER (cold_function_name));
2184 }
2185 break;
2186
2187 case NOTE_INSN_BASIC_BLOCK:
2188 if (need_profile_function)
2189 {
2190 profile_function (asm_out_file);
2191 need_profile_function = false;
2192 }
2193
2194 if (targetm.asm_out.unwind_emit)
2195 targetm.asm_out.unwind_emit (asm_out_file, insn);
2196
2197 discriminator = NOTE_BASIC_BLOCK (insn)->discriminator;
2198
2199 break;
2200
2201 case NOTE_INSN_EH_REGION_BEG:
2202 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHB",
2203 NOTE_EH_HANDLER (insn));
2204 break;
2205
2206 case NOTE_INSN_EH_REGION_END:
2207 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHE",
2208 NOTE_EH_HANDLER (insn));
2209 break;
2210
2211 case NOTE_INSN_PROLOGUE_END:
2212 targetm.asm_out.function_end_prologue (file);
2213 profile_after_prologue (file);
2214
2215 if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE)
2216 {
2217 *seen |= SEEN_EMITTED;
2218 force_source_line = true;
2219 }
2220 else
2221 *seen |= SEEN_NOTE;
2222
2223 break;
2224
2225 case NOTE_INSN_EPILOGUE_BEG:
2226 if (!DECL_IGNORED_P (current_function_decl))
2227 (*debug_hooks->begin_epilogue) (last_linenum, last_filename);
2228 targetm.asm_out.function_begin_epilogue (file);
2229 break;
2230
2231 case NOTE_INSN_CFI:
2232 dwarf2out_emit_cfi (NOTE_CFI (insn));
2233 break;
2234
2235 case NOTE_INSN_CFI_LABEL:
2236 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LCFI",
2237 NOTE_LABEL_NUMBER (insn));
2238 break;
2239
2240 case NOTE_INSN_FUNCTION_BEG:
2241 if (need_profile_function)
2242 {
2243 profile_function (asm_out_file);
2244 need_profile_function = false;
2245 }
2246
2247 app_disable ();
2248 if (!DECL_IGNORED_P (current_function_decl))
2249 debug_hooks->end_prologue (last_linenum, last_filename);
2250
2251 if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE)
2252 {
2253 *seen |= SEEN_EMITTED;
2254 force_source_line = true;
2255 }
2256 else
2257 *seen |= SEEN_NOTE;
2258
2259 break;
2260
2261 case NOTE_INSN_BLOCK_BEG:
2262 if (debug_info_level == DINFO_LEVEL_NORMAL
2263 || debug_info_level == DINFO_LEVEL_VERBOSE
2264 || write_symbols == DWARF2_DEBUG
2265 || write_symbols == VMS_AND_DWARF2_DEBUG
2266 || write_symbols == VMS_DEBUG)
2267 {
2268 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
2269
2270 app_disable ();
2271 ++block_depth;
2272 high_block_linenum = last_linenum;
2273
2274 /* Output debugging info about the symbol-block beginning. */
2275 if (!DECL_IGNORED_P (current_function_decl))
2276 debug_hooks->begin_block (last_linenum, n);
2277
2278 /* Mark this block as output. */
2279 TREE_ASM_WRITTEN (NOTE_BLOCK (insn)) = 1;
2280 }
2281 if (write_symbols == DBX_DEBUG
2282 || write_symbols == SDB_DEBUG)
2283 {
2284 location_t *locus_ptr
2285 = block_nonartificial_location (NOTE_BLOCK (insn));
2286
2287 if (locus_ptr != NULL)
2288 {
2289 override_filename = LOCATION_FILE (*locus_ptr);
2290 override_linenum = LOCATION_LINE (*locus_ptr);
2291 }
2292 }
2293 break;
2294
2295 case NOTE_INSN_BLOCK_END:
2296 if (debug_info_level == DINFO_LEVEL_NORMAL
2297 || debug_info_level == DINFO_LEVEL_VERBOSE
2298 || write_symbols == DWARF2_DEBUG
2299 || write_symbols == VMS_AND_DWARF2_DEBUG
2300 || write_symbols == VMS_DEBUG)
2301 {
2302 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
2303
2304 app_disable ();
2305
2306 /* End of a symbol-block. */
2307 --block_depth;
2308 gcc_assert (block_depth >= 0);
2309
2310 if (!DECL_IGNORED_P (current_function_decl))
2311 debug_hooks->end_block (high_block_linenum, n);
2312 }
2313 if (write_symbols == DBX_DEBUG
2314 || write_symbols == SDB_DEBUG)
2315 {
2316 tree outer_block = BLOCK_SUPERCONTEXT (NOTE_BLOCK (insn));
2317 location_t *locus_ptr
2318 = block_nonartificial_location (outer_block);
2319
2320 if (locus_ptr != NULL)
2321 {
2322 override_filename = LOCATION_FILE (*locus_ptr);
2323 override_linenum = LOCATION_LINE (*locus_ptr);
2324 }
2325 else
2326 {
2327 override_filename = NULL;
2328 override_linenum = 0;
2329 }
2330 }
2331 break;
2332
2333 case NOTE_INSN_DELETED_LABEL:
2334 /* Emit the label. We may have deleted the CODE_LABEL because
2335 the label could be proved to be unreachable, though still
2336 referenced (in the form of having its address taken. */
2337 ASM_OUTPUT_DEBUG_LABEL (file, "L", CODE_LABEL_NUMBER (insn));
2338 break;
2339
2340 case NOTE_INSN_DELETED_DEBUG_LABEL:
2341 /* Similarly, but need to use different namespace for it. */
2342 if (CODE_LABEL_NUMBER (insn) != -1)
2343 ASM_OUTPUT_DEBUG_LABEL (file, "LDL", CODE_LABEL_NUMBER (insn));
2344 break;
2345
2346 case NOTE_INSN_VAR_LOCATION:
2347 case NOTE_INSN_CALL_ARG_LOCATION:
2348 if (!DECL_IGNORED_P (current_function_decl))
2349 debug_hooks->var_location (insn);
2350 break;
2351
2352 default:
2353 gcc_unreachable ();
2354 break;
2355 }
2356 break;
2357
2358 case BARRIER:
2359 break;
2360
2361 case CODE_LABEL:
2362 /* The target port might emit labels in the output function for
2363 some insn, e.g. sh.c output_branchy_insn. */
2364 if (CODE_LABEL_NUMBER (insn) <= max_labelno)
2365 {
2366 int align = LABEL_TO_ALIGNMENT (insn);
2367 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2368 int max_skip = LABEL_TO_MAX_SKIP (insn);
2369 #endif
2370
2371 if (align && NEXT_INSN (insn))
2372 {
2373 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2374 ASM_OUTPUT_MAX_SKIP_ALIGN (file, align, max_skip);
2375 #else
2376 #ifdef ASM_OUTPUT_ALIGN_WITH_NOP
2377 ASM_OUTPUT_ALIGN_WITH_NOP (file, align);
2378 #else
2379 ASM_OUTPUT_ALIGN (file, align);
2380 #endif
2381 #endif
2382 }
2383 }
2384 CC_STATUS_INIT;
2385
2386 if (!DECL_IGNORED_P (current_function_decl) && LABEL_NAME (insn))
2387 debug_hooks->label (as_a <rtx_code_label *> (insn));
2388
2389 app_disable ();
2390
2391 next = next_nonnote_insn (insn);
2392 /* If this label is followed by a jump-table, make sure we put
2393 the label in the read-only section. Also possibly write the
2394 label and jump table together. */
2395 if (next != 0 && JUMP_TABLE_DATA_P (next))
2396 {
2397 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2398 /* In this case, the case vector is being moved by the
2399 target, so don't output the label at all. Leave that
2400 to the back end macros. */
2401 #else
2402 if (! JUMP_TABLES_IN_TEXT_SECTION)
2403 {
2404 int log_align;
2405
2406 switch_to_section (targetm.asm_out.function_rodata_section
2407 (current_function_decl));
2408
2409 #ifdef ADDR_VEC_ALIGN
2410 log_align = ADDR_VEC_ALIGN (next);
2411 #else
2412 log_align = exact_log2 (BIGGEST_ALIGNMENT / BITS_PER_UNIT);
2413 #endif
2414 ASM_OUTPUT_ALIGN (file, log_align);
2415 }
2416 else
2417 switch_to_section (current_function_section ());
2418
2419 #ifdef ASM_OUTPUT_CASE_LABEL
2420 ASM_OUTPUT_CASE_LABEL (file, "L", CODE_LABEL_NUMBER (insn),
2421 next);
2422 #else
2423 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn));
2424 #endif
2425 #endif
2426 break;
2427 }
2428 if (LABEL_ALT_ENTRY_P (insn))
2429 output_alternate_entry_point (file, insn);
2430 else
2431 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn));
2432 break;
2433
2434 default:
2435 {
2436 rtx body = PATTERN (insn);
2437 int insn_code_number;
2438 const char *templ;
2439 bool is_stmt;
2440
2441 /* Reset this early so it is correct for ASM statements. */
2442 current_insn_predicate = NULL_RTX;
2443
2444 /* An INSN, JUMP_INSN or CALL_INSN.
2445 First check for special kinds that recog doesn't recognize. */
2446
2447 if (GET_CODE (body) == USE /* These are just declarations. */
2448 || GET_CODE (body) == CLOBBER)
2449 break;
2450
2451 #ifdef HAVE_cc0
2452 {
2453 /* If there is a REG_CC_SETTER note on this insn, it means that
2454 the setting of the condition code was done in the delay slot
2455 of the insn that branched here. So recover the cc status
2456 from the insn that set it. */
2457
2458 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2459 if (note)
2460 {
2461 NOTICE_UPDATE_CC (PATTERN (XEXP (note, 0)), XEXP (note, 0));
2462 cc_prev_status = cc_status;
2463 }
2464 }
2465 #endif
2466
2467 /* Detect insns that are really jump-tables
2468 and output them as such. */
2469
2470 if (JUMP_TABLE_DATA_P (insn))
2471 {
2472 #if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC))
2473 int vlen, idx;
2474 #endif
2475
2476 if (! JUMP_TABLES_IN_TEXT_SECTION)
2477 switch_to_section (targetm.asm_out.function_rodata_section
2478 (current_function_decl));
2479 else
2480 switch_to_section (current_function_section ());
2481
2482 app_disable ();
2483
2484 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2485 if (GET_CODE (body) == ADDR_VEC)
2486 {
2487 #ifdef ASM_OUTPUT_ADDR_VEC
2488 ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn), body);
2489 #else
2490 gcc_unreachable ();
2491 #endif
2492 }
2493 else
2494 {
2495 #ifdef ASM_OUTPUT_ADDR_DIFF_VEC
2496 ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn), body);
2497 #else
2498 gcc_unreachable ();
2499 #endif
2500 }
2501 #else
2502 vlen = XVECLEN (body, GET_CODE (body) == ADDR_DIFF_VEC);
2503 for (idx = 0; idx < vlen; idx++)
2504 {
2505 if (GET_CODE (body) == ADDR_VEC)
2506 {
2507 #ifdef ASM_OUTPUT_ADDR_VEC_ELT
2508 ASM_OUTPUT_ADDR_VEC_ELT
2509 (file, CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 0, idx), 0)));
2510 #else
2511 gcc_unreachable ();
2512 #endif
2513 }
2514 else
2515 {
2516 #ifdef ASM_OUTPUT_ADDR_DIFF_ELT
2517 ASM_OUTPUT_ADDR_DIFF_ELT
2518 (file,
2519 body,
2520 CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 1, idx), 0)),
2521 CODE_LABEL_NUMBER (XEXP (XEXP (body, 0), 0)));
2522 #else
2523 gcc_unreachable ();
2524 #endif
2525 }
2526 }
2527 #ifdef ASM_OUTPUT_CASE_END
2528 ASM_OUTPUT_CASE_END (file,
2529 CODE_LABEL_NUMBER (PREV_INSN (insn)),
2530 insn);
2531 #endif
2532 #endif
2533
2534 switch_to_section (current_function_section ());
2535
2536 break;
2537 }
2538 /* Output this line note if it is the first or the last line
2539 note in a row. */
2540 if (!DECL_IGNORED_P (current_function_decl)
2541 && notice_source_line (insn, &is_stmt))
2542 (*debug_hooks->source_line) (last_linenum, last_filename,
2543 last_discriminator, is_stmt);
2544
2545 if (GET_CODE (body) == ASM_INPUT)
2546 {
2547 const char *string = XSTR (body, 0);
2548
2549 /* There's no telling what that did to the condition codes. */
2550 CC_STATUS_INIT;
2551
2552 if (string[0])
2553 {
2554 expanded_location loc;
2555
2556 app_enable ();
2557 loc = expand_location (ASM_INPUT_SOURCE_LOCATION (body));
2558 if (*loc.file && loc.line)
2559 fprintf (asm_out_file, "%s %i \"%s\" 1\n",
2560 ASM_COMMENT_START, loc.line, loc.file);
2561 fprintf (asm_out_file, "\t%s\n", string);
2562 #if HAVE_AS_LINE_ZERO
2563 if (*loc.file && loc.line)
2564 fprintf (asm_out_file, "%s 0 \"\" 2\n", ASM_COMMENT_START);
2565 #endif
2566 }
2567 break;
2568 }
2569
2570 /* Detect `asm' construct with operands. */
2571 if (asm_noperands (body) >= 0)
2572 {
2573 unsigned int noperands = asm_noperands (body);
2574 rtx *ops = XALLOCAVEC (rtx, noperands);
2575 const char *string;
2576 location_t loc;
2577 expanded_location expanded;
2578
2579 /* There's no telling what that did to the condition codes. */
2580 CC_STATUS_INIT;
2581
2582 /* Get out the operand values. */
2583 string = decode_asm_operands (body, ops, NULL, NULL, NULL, &loc);
2584 /* Inhibit dying on what would otherwise be compiler bugs. */
2585 insn_noperands = noperands;
2586 this_is_asm_operands = insn;
2587 expanded = expand_location (loc);
2588
2589 #ifdef FINAL_PRESCAN_INSN
2590 FINAL_PRESCAN_INSN (insn, ops, insn_noperands);
2591 #endif
2592
2593 /* Output the insn using them. */
2594 if (string[0])
2595 {
2596 app_enable ();
2597 if (expanded.file && expanded.line)
2598 fprintf (asm_out_file, "%s %i \"%s\" 1\n",
2599 ASM_COMMENT_START, expanded.line, expanded.file);
2600 output_asm_insn (string, ops);
2601 #if HAVE_AS_LINE_ZERO
2602 if (expanded.file && expanded.line)
2603 fprintf (asm_out_file, "%s 0 \"\" 2\n", ASM_COMMENT_START);
2604 #endif
2605 }
2606
2607 if (targetm.asm_out.final_postscan_insn)
2608 targetm.asm_out.final_postscan_insn (file, insn, ops,
2609 insn_noperands);
2610
2611 this_is_asm_operands = 0;
2612 break;
2613 }
2614
2615 app_disable ();
2616
2617 if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (body))
2618 {
2619 /* A delayed-branch sequence */
2620 int i;
2621
2622 final_sequence = body;
2623
2624 /* The first insn in this SEQUENCE might be a JUMP_INSN that will
2625 force the restoration of a comparison that was previously
2626 thought unnecessary. If that happens, cancel this sequence
2627 and cause that insn to be restored. */
2628
2629 next = final_scan_insn (seq->insn (0), file, 0, 1, seen);
2630 if (next != seq->insn (1))
2631 {
2632 final_sequence = 0;
2633 return next;
2634 }
2635
2636 for (i = 1; i < seq->len (); i++)
2637 {
2638 rtx_insn *insn = seq->insn (i);
2639 rtx_insn *next = NEXT_INSN (insn);
2640 /* We loop in case any instruction in a delay slot gets
2641 split. */
2642 do
2643 insn = final_scan_insn (insn, file, 0, 1, seen);
2644 while (insn != next);
2645 }
2646 #ifdef DBR_OUTPUT_SEQEND
2647 DBR_OUTPUT_SEQEND (file);
2648 #endif
2649 final_sequence = 0;
2650
2651 /* If the insn requiring the delay slot was a CALL_INSN, the
2652 insns in the delay slot are actually executed before the
2653 called function. Hence we don't preserve any CC-setting
2654 actions in these insns and the CC must be marked as being
2655 clobbered by the function. */
2656 if (CALL_P (seq->insn (0)))
2657 {
2658 CC_STATUS_INIT;
2659 }
2660 break;
2661 }
2662
2663 /* We have a real machine instruction as rtl. */
2664
2665 body = PATTERN (insn);
2666
2667 #ifdef HAVE_cc0
2668 set = single_set (insn);
2669
2670 /* Check for redundant test and compare instructions
2671 (when the condition codes are already set up as desired).
2672 This is done only when optimizing; if not optimizing,
2673 it should be possible for the user to alter a variable
2674 with the debugger in between statements
2675 and the next statement should reexamine the variable
2676 to compute the condition codes. */
2677
2678 if (optimize_p)
2679 {
2680 if (set
2681 && GET_CODE (SET_DEST (set)) == CC0
2682 && insn != last_ignored_compare)
2683 {
2684 rtx src1, src2;
2685 if (GET_CODE (SET_SRC (set)) == SUBREG)
2686 SET_SRC (set) = alter_subreg (&SET_SRC (set), true);
2687
2688 src1 = SET_SRC (set);
2689 src2 = NULL_RTX;
2690 if (GET_CODE (SET_SRC (set)) == COMPARE)
2691 {
2692 if (GET_CODE (XEXP (SET_SRC (set), 0)) == SUBREG)
2693 XEXP (SET_SRC (set), 0)
2694 = alter_subreg (&XEXP (SET_SRC (set), 0), true);
2695 if (GET_CODE (XEXP (SET_SRC (set), 1)) == SUBREG)
2696 XEXP (SET_SRC (set), 1)
2697 = alter_subreg (&XEXP (SET_SRC (set), 1), true);
2698 if (XEXP (SET_SRC (set), 1)
2699 == CONST0_RTX (GET_MODE (XEXP (SET_SRC (set), 0))))
2700 src2 = XEXP (SET_SRC (set), 0);
2701 }
2702 if ((cc_status.value1 != 0
2703 && rtx_equal_p (src1, cc_status.value1))
2704 || (cc_status.value2 != 0
2705 && rtx_equal_p (src1, cc_status.value2))
2706 || (src2 != 0 && cc_status.value1 != 0
2707 && rtx_equal_p (src2, cc_status.value1))
2708 || (src2 != 0 && cc_status.value2 != 0
2709 && rtx_equal_p (src2, cc_status.value2)))
2710 {
2711 /* Don't delete insn if it has an addressing side-effect. */
2712 if (! FIND_REG_INC_NOTE (insn, NULL_RTX)
2713 /* or if anything in it is volatile. */
2714 && ! volatile_refs_p (PATTERN (insn)))
2715 {
2716 /* We don't really delete the insn; just ignore it. */
2717 last_ignored_compare = insn;
2718 break;
2719 }
2720 }
2721 }
2722 }
2723
2724 /* If this is a conditional branch, maybe modify it
2725 if the cc's are in a nonstandard state
2726 so that it accomplishes the same thing that it would
2727 do straightforwardly if the cc's were set up normally. */
2728
2729 if (cc_status.flags != 0
2730 && JUMP_P (insn)
2731 && GET_CODE (body) == SET
2732 && SET_DEST (body) == pc_rtx
2733 && GET_CODE (SET_SRC (body)) == IF_THEN_ELSE
2734 && COMPARISON_P (XEXP (SET_SRC (body), 0))
2735 && XEXP (XEXP (SET_SRC (body), 0), 0) == cc0_rtx)
2736 {
2737 /* This function may alter the contents of its argument
2738 and clear some of the cc_status.flags bits.
2739 It may also return 1 meaning condition now always true
2740 or -1 meaning condition now always false
2741 or 2 meaning condition nontrivial but altered. */
2742 int result = alter_cond (XEXP (SET_SRC (body), 0));
2743 /* If condition now has fixed value, replace the IF_THEN_ELSE
2744 with its then-operand or its else-operand. */
2745 if (result == 1)
2746 SET_SRC (body) = XEXP (SET_SRC (body), 1);
2747 if (result == -1)
2748 SET_SRC (body) = XEXP (SET_SRC (body), 2);
2749
2750 /* The jump is now either unconditional or a no-op.
2751 If it has become a no-op, don't try to output it.
2752 (It would not be recognized.) */
2753 if (SET_SRC (body) == pc_rtx)
2754 {
2755 delete_insn (insn);
2756 break;
2757 }
2758 else if (ANY_RETURN_P (SET_SRC (body)))
2759 /* Replace (set (pc) (return)) with (return). */
2760 PATTERN (insn) = body = SET_SRC (body);
2761
2762 /* Rerecognize the instruction if it has changed. */
2763 if (result != 0)
2764 INSN_CODE (insn) = -1;
2765 }
2766
2767 /* If this is a conditional trap, maybe modify it if the cc's
2768 are in a nonstandard state so that it accomplishes the same
2769 thing that it would do straightforwardly if the cc's were
2770 set up normally. */
2771 if (cc_status.flags != 0
2772 && NONJUMP_INSN_P (insn)
2773 && GET_CODE (body) == TRAP_IF
2774 && COMPARISON_P (TRAP_CONDITION (body))
2775 && XEXP (TRAP_CONDITION (body), 0) == cc0_rtx)
2776 {
2777 /* This function may alter the contents of its argument
2778 and clear some of the cc_status.flags bits.
2779 It may also return 1 meaning condition now always true
2780 or -1 meaning condition now always false
2781 or 2 meaning condition nontrivial but altered. */
2782 int result = alter_cond (TRAP_CONDITION (body));
2783
2784 /* If TRAP_CONDITION has become always false, delete the
2785 instruction. */
2786 if (result == -1)
2787 {
2788 delete_insn (insn);
2789 break;
2790 }
2791
2792 /* If TRAP_CONDITION has become always true, replace
2793 TRAP_CONDITION with const_true_rtx. */
2794 if (result == 1)
2795 TRAP_CONDITION (body) = const_true_rtx;
2796
2797 /* Rerecognize the instruction if it has changed. */
2798 if (result != 0)
2799 INSN_CODE (insn) = -1;
2800 }
2801
2802 /* Make same adjustments to instructions that examine the
2803 condition codes without jumping and instructions that
2804 handle conditional moves (if this machine has either one). */
2805
2806 if (cc_status.flags != 0
2807 && set != 0)
2808 {
2809 rtx cond_rtx, then_rtx, else_rtx;
2810
2811 if (!JUMP_P (insn)
2812 && GET_CODE (SET_SRC (set)) == IF_THEN_ELSE)
2813 {
2814 cond_rtx = XEXP (SET_SRC (set), 0);
2815 then_rtx = XEXP (SET_SRC (set), 1);
2816 else_rtx = XEXP (SET_SRC (set), 2);
2817 }
2818 else
2819 {
2820 cond_rtx = SET_SRC (set);
2821 then_rtx = const_true_rtx;
2822 else_rtx = const0_rtx;
2823 }
2824
2825 if (COMPARISON_P (cond_rtx)
2826 && XEXP (cond_rtx, 0) == cc0_rtx)
2827 {
2828 int result;
2829 result = alter_cond (cond_rtx);
2830 if (result == 1)
2831 validate_change (insn, &SET_SRC (set), then_rtx, 0);
2832 else if (result == -1)
2833 validate_change (insn, &SET_SRC (set), else_rtx, 0);
2834 else if (result == 2)
2835 INSN_CODE (insn) = -1;
2836 if (SET_DEST (set) == SET_SRC (set))
2837 delete_insn (insn);
2838 }
2839 }
2840
2841 #endif
2842
2843 #ifdef HAVE_peephole
2844 /* Do machine-specific peephole optimizations if desired. */
2845
2846 if (optimize_p && !flag_no_peephole && !nopeepholes)
2847 {
2848 rtx_insn *next = peephole (insn);
2849 /* When peepholing, if there were notes within the peephole,
2850 emit them before the peephole. */
2851 if (next != 0 && next != NEXT_INSN (insn))
2852 {
2853 rtx_insn *note, *prev = PREV_INSN (insn);
2854
2855 for (note = NEXT_INSN (insn); note != next;
2856 note = NEXT_INSN (note))
2857 final_scan_insn (note, file, optimize_p, nopeepholes, seen);
2858
2859 /* Put the notes in the proper position for a later
2860 rescan. For example, the SH target can do this
2861 when generating a far jump in a delayed branch
2862 sequence. */
2863 note = NEXT_INSN (insn);
2864 SET_PREV_INSN (note) = prev;
2865 SET_NEXT_INSN (prev) = note;
2866 SET_NEXT_INSN (PREV_INSN (next)) = insn;
2867 SET_PREV_INSN (insn) = PREV_INSN (next);
2868 SET_NEXT_INSN (insn) = next;
2869 SET_PREV_INSN (next) = insn;
2870 }
2871
2872 /* PEEPHOLE might have changed this. */
2873 body = PATTERN (insn);
2874 }
2875 #endif
2876
2877 /* Try to recognize the instruction.
2878 If successful, verify that the operands satisfy the
2879 constraints for the instruction. Crash if they don't,
2880 since `reload' should have changed them so that they do. */
2881
2882 insn_code_number = recog_memoized (insn);
2883 cleanup_subreg_operands (insn);
2884
2885 /* Dump the insn in the assembly for debugging (-dAP).
2886 If the final dump is requested as slim RTL, dump slim
2887 RTL to the assembly file also. */
2888 if (flag_dump_rtl_in_asm)
2889 {
2890 print_rtx_head = ASM_COMMENT_START;
2891 if (! (dump_flags & TDF_SLIM))
2892 print_rtl_single (asm_out_file, insn);
2893 else
2894 dump_insn_slim (asm_out_file, insn);
2895 print_rtx_head = "";
2896 }
2897
2898 if (! constrain_operands_cached (1))
2899 fatal_insn_not_found (insn);
2900
2901 /* Some target machines need to prescan each insn before
2902 it is output. */
2903
2904 #ifdef FINAL_PRESCAN_INSN
2905 FINAL_PRESCAN_INSN (insn, recog_data.operand, recog_data.n_operands);
2906 #endif
2907
2908 if (targetm.have_conditional_execution ()
2909 && GET_CODE (PATTERN (insn)) == COND_EXEC)
2910 current_insn_predicate = COND_EXEC_TEST (PATTERN (insn));
2911
2912 #ifdef HAVE_cc0
2913 cc_prev_status = cc_status;
2914
2915 /* Update `cc_status' for this instruction.
2916 The instruction's output routine may change it further.
2917 If the output routine for a jump insn needs to depend
2918 on the cc status, it should look at cc_prev_status. */
2919
2920 NOTICE_UPDATE_CC (body, insn);
2921 #endif
2922
2923 current_output_insn = debug_insn = insn;
2924
2925 /* Find the proper template for this insn. */
2926 templ = get_insn_template (insn_code_number, insn);
2927
2928 /* If the C code returns 0, it means that it is a jump insn
2929 which follows a deleted test insn, and that test insn
2930 needs to be reinserted. */
2931 if (templ == 0)
2932 {
2933 rtx_insn *prev;
2934
2935 gcc_assert (prev_nonnote_insn (insn) == last_ignored_compare);
2936
2937 /* We have already processed the notes between the setter and
2938 the user. Make sure we don't process them again, this is
2939 particularly important if one of the notes is a block
2940 scope note or an EH note. */
2941 for (prev = insn;
2942 prev != last_ignored_compare;
2943 prev = PREV_INSN (prev))
2944 {
2945 if (NOTE_P (prev))
2946 delete_insn (prev); /* Use delete_note. */
2947 }
2948
2949 return prev;
2950 }
2951
2952 /* If the template is the string "#", it means that this insn must
2953 be split. */
2954 if (templ[0] == '#' && templ[1] == '\0')
2955 {
2956 rtx_insn *new_rtx = try_split (body, insn, 0);
2957
2958 /* If we didn't split the insn, go away. */
2959 if (new_rtx == insn && PATTERN (new_rtx) == body)
2960 fatal_insn ("could not split insn", insn);
2961
2962 /* If we have a length attribute, this instruction should have
2963 been split in shorten_branches, to ensure that we would have
2964 valid length info for the splitees. */
2965 gcc_assert (!HAVE_ATTR_length);
2966
2967 return new_rtx;
2968 }
2969
2970 /* ??? This will put the directives in the wrong place if
2971 get_insn_template outputs assembly directly. However calling it
2972 before get_insn_template breaks if the insns is split. */
2973 if (targetm.asm_out.unwind_emit_before_insn
2974 && targetm.asm_out.unwind_emit)
2975 targetm.asm_out.unwind_emit (asm_out_file, insn);
2976
2977 if (rtx_call_insn *call_insn = dyn_cast <rtx_call_insn *> (insn))
2978 {
2979 rtx x = call_from_call_insn (call_insn);
2980 x = XEXP (x, 0);
2981 if (x && MEM_P (x) && GET_CODE (XEXP (x, 0)) == SYMBOL_REF)
2982 {
2983 tree t;
2984 x = XEXP (x, 0);
2985 t = SYMBOL_REF_DECL (x);
2986 if (t)
2987 assemble_external (t);
2988 }
2989 if (!DECL_IGNORED_P (current_function_decl))
2990 debug_hooks->var_location (insn);
2991 }
2992
2993 /* Output assembler code from the template. */
2994 output_asm_insn (templ, recog_data.operand);
2995
2996 /* Some target machines need to postscan each insn after
2997 it is output. */
2998 if (targetm.asm_out.final_postscan_insn)
2999 targetm.asm_out.final_postscan_insn (file, insn, recog_data.operand,
3000 recog_data.n_operands);
3001
3002 if (!targetm.asm_out.unwind_emit_before_insn
3003 && targetm.asm_out.unwind_emit)
3004 targetm.asm_out.unwind_emit (asm_out_file, insn);
3005
3006 current_output_insn = debug_insn = 0;
3007 }
3008 }
3009 return NEXT_INSN (insn);
3010 }
3011 \f
3012 /* Return whether a source line note needs to be emitted before INSN.
3013 Sets IS_STMT to TRUE if the line should be marked as a possible
3014 breakpoint location. */
3015
3016 static bool
3017 notice_source_line (rtx_insn *insn, bool *is_stmt)
3018 {
3019 const char *filename;
3020 int linenum;
3021
3022 if (override_filename)
3023 {
3024 filename = override_filename;
3025 linenum = override_linenum;
3026 }
3027 else if (INSN_HAS_LOCATION (insn))
3028 {
3029 expanded_location xloc = insn_location (insn);
3030 filename = xloc.file;
3031 linenum = xloc.line;
3032 }
3033 else
3034 {
3035 filename = NULL;
3036 linenum = 0;
3037 }
3038
3039 if (filename == NULL)
3040 return false;
3041
3042 if (force_source_line
3043 || filename != last_filename
3044 || last_linenum != linenum)
3045 {
3046 force_source_line = false;
3047 last_filename = filename;
3048 last_linenum = linenum;
3049 last_discriminator = discriminator;
3050 *is_stmt = true;
3051 high_block_linenum = MAX (last_linenum, high_block_linenum);
3052 high_function_linenum = MAX (last_linenum, high_function_linenum);
3053 return true;
3054 }
3055
3056 if (SUPPORTS_DISCRIMINATOR && last_discriminator != discriminator)
3057 {
3058 /* If the discriminator changed, but the line number did not,
3059 output the line table entry with is_stmt false so the
3060 debugger does not treat this as a breakpoint location. */
3061 last_discriminator = discriminator;
3062 *is_stmt = false;
3063 return true;
3064 }
3065
3066 return false;
3067 }
3068 \f
3069 /* For each operand in INSN, simplify (subreg (reg)) so that it refers
3070 directly to the desired hard register. */
3071
3072 void
3073 cleanup_subreg_operands (rtx insn)
3074 {
3075 int i;
3076 bool changed = false;
3077 extract_insn_cached (insn);
3078 for (i = 0; i < recog_data.n_operands; i++)
3079 {
3080 /* The following test cannot use recog_data.operand when testing
3081 for a SUBREG: the underlying object might have been changed
3082 already if we are inside a match_operator expression that
3083 matches the else clause. Instead we test the underlying
3084 expression directly. */
3085 if (GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
3086 {
3087 recog_data.operand[i] = alter_subreg (recog_data.operand_loc[i], true);
3088 changed = true;
3089 }
3090 else if (GET_CODE (recog_data.operand[i]) == PLUS
3091 || GET_CODE (recog_data.operand[i]) == MULT
3092 || MEM_P (recog_data.operand[i]))
3093 recog_data.operand[i] = walk_alter_subreg (recog_data.operand_loc[i], &changed);
3094 }
3095
3096 for (i = 0; i < recog_data.n_dups; i++)
3097 {
3098 if (GET_CODE (*recog_data.dup_loc[i]) == SUBREG)
3099 {
3100 *recog_data.dup_loc[i] = alter_subreg (recog_data.dup_loc[i], true);
3101 changed = true;
3102 }
3103 else if (GET_CODE (*recog_data.dup_loc[i]) == PLUS
3104 || GET_CODE (*recog_data.dup_loc[i]) == MULT
3105 || MEM_P (*recog_data.dup_loc[i]))
3106 *recog_data.dup_loc[i] = walk_alter_subreg (recog_data.dup_loc[i], &changed);
3107 }
3108 if (changed)
3109 df_insn_rescan (as_a <rtx_insn *> (insn));
3110 }
3111
3112 /* If X is a SUBREG, try to replace it with a REG or a MEM, based on
3113 the thing it is a subreg of. Do it anyway if FINAL_P. */
3114
3115 rtx
3116 alter_subreg (rtx *xp, bool final_p)
3117 {
3118 rtx x = *xp;
3119 rtx y = SUBREG_REG (x);
3120
3121 /* simplify_subreg does not remove subreg from volatile references.
3122 We are required to. */
3123 if (MEM_P (y))
3124 {
3125 int offset = SUBREG_BYTE (x);
3126
3127 /* For paradoxical subregs on big-endian machines, SUBREG_BYTE
3128 contains 0 instead of the proper offset. See simplify_subreg. */
3129 if (offset == 0
3130 && GET_MODE_SIZE (GET_MODE (y)) < GET_MODE_SIZE (GET_MODE (x)))
3131 {
3132 int difference = GET_MODE_SIZE (GET_MODE (y))
3133 - GET_MODE_SIZE (GET_MODE (x));
3134 if (WORDS_BIG_ENDIAN)
3135 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
3136 if (BYTES_BIG_ENDIAN)
3137 offset += difference % UNITS_PER_WORD;
3138 }
3139
3140 if (final_p)
3141 *xp = adjust_address (y, GET_MODE (x), offset);
3142 else
3143 *xp = adjust_address_nv (y, GET_MODE (x), offset);
3144 }
3145 else
3146 {
3147 rtx new_rtx = simplify_subreg (GET_MODE (x), y, GET_MODE (y),
3148 SUBREG_BYTE (x));
3149
3150 if (new_rtx != 0)
3151 *xp = new_rtx;
3152 else if (final_p && REG_P (y))
3153 {
3154 /* Simplify_subreg can't handle some REG cases, but we have to. */
3155 unsigned int regno;
3156 HOST_WIDE_INT offset;
3157
3158 regno = subreg_regno (x);
3159 if (subreg_lowpart_p (x))
3160 offset = byte_lowpart_offset (GET_MODE (x), GET_MODE (y));
3161 else
3162 offset = SUBREG_BYTE (x);
3163 *xp = gen_rtx_REG_offset (y, GET_MODE (x), regno, offset);
3164 }
3165 }
3166
3167 return *xp;
3168 }
3169
3170 /* Do alter_subreg on all the SUBREGs contained in X. */
3171
3172 static rtx
3173 walk_alter_subreg (rtx *xp, bool *changed)
3174 {
3175 rtx x = *xp;
3176 switch (GET_CODE (x))
3177 {
3178 case PLUS:
3179 case MULT:
3180 case AND:
3181 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed);
3182 XEXP (x, 1) = walk_alter_subreg (&XEXP (x, 1), changed);
3183 break;
3184
3185 case MEM:
3186 case ZERO_EXTEND:
3187 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed);
3188 break;
3189
3190 case SUBREG:
3191 *changed = true;
3192 return alter_subreg (xp, true);
3193
3194 default:
3195 break;
3196 }
3197
3198 return *xp;
3199 }
3200 \f
3201 #ifdef HAVE_cc0
3202
3203 /* Given BODY, the body of a jump instruction, alter the jump condition
3204 as required by the bits that are set in cc_status.flags.
3205 Not all of the bits there can be handled at this level in all cases.
3206
3207 The value is normally 0.
3208 1 means that the condition has become always true.
3209 -1 means that the condition has become always false.
3210 2 means that COND has been altered. */
3211
3212 static int
3213 alter_cond (rtx cond)
3214 {
3215 int value = 0;
3216
3217 if (cc_status.flags & CC_REVERSED)
3218 {
3219 value = 2;
3220 PUT_CODE (cond, swap_condition (GET_CODE (cond)));
3221 }
3222
3223 if (cc_status.flags & CC_INVERTED)
3224 {
3225 value = 2;
3226 PUT_CODE (cond, reverse_condition (GET_CODE (cond)));
3227 }
3228
3229 if (cc_status.flags & CC_NOT_POSITIVE)
3230 switch (GET_CODE (cond))
3231 {
3232 case LE:
3233 case LEU:
3234 case GEU:
3235 /* Jump becomes unconditional. */
3236 return 1;
3237
3238 case GT:
3239 case GTU:
3240 case LTU:
3241 /* Jump becomes no-op. */
3242 return -1;
3243
3244 case GE:
3245 PUT_CODE (cond, EQ);
3246 value = 2;
3247 break;
3248
3249 case LT:
3250 PUT_CODE (cond, NE);
3251 value = 2;
3252 break;
3253
3254 default:
3255 break;
3256 }
3257
3258 if (cc_status.flags & CC_NOT_NEGATIVE)
3259 switch (GET_CODE (cond))
3260 {
3261 case GE:
3262 case GEU:
3263 /* Jump becomes unconditional. */
3264 return 1;
3265
3266 case LT:
3267 case LTU:
3268 /* Jump becomes no-op. */
3269 return -1;
3270
3271 case LE:
3272 case LEU:
3273 PUT_CODE (cond, EQ);
3274 value = 2;
3275 break;
3276
3277 case GT:
3278 case GTU:
3279 PUT_CODE (cond, NE);
3280 value = 2;
3281 break;
3282
3283 default:
3284 break;
3285 }
3286
3287 if (cc_status.flags & CC_NO_OVERFLOW)
3288 switch (GET_CODE (cond))
3289 {
3290 case GEU:
3291 /* Jump becomes unconditional. */
3292 return 1;
3293
3294 case LEU:
3295 PUT_CODE (cond, EQ);
3296 value = 2;
3297 break;
3298
3299 case GTU:
3300 PUT_CODE (cond, NE);
3301 value = 2;
3302 break;
3303
3304 case LTU:
3305 /* Jump becomes no-op. */
3306 return -1;
3307
3308 default:
3309 break;
3310 }
3311
3312 if (cc_status.flags & (CC_Z_IN_NOT_N | CC_Z_IN_N))
3313 switch (GET_CODE (cond))
3314 {
3315 default:
3316 gcc_unreachable ();
3317
3318 case NE:
3319 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? GE : LT);
3320 value = 2;
3321 break;
3322
3323 case EQ:
3324 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? LT : GE);
3325 value = 2;
3326 break;
3327 }
3328
3329 if (cc_status.flags & CC_NOT_SIGNED)
3330 /* The flags are valid if signed condition operators are converted
3331 to unsigned. */
3332 switch (GET_CODE (cond))
3333 {
3334 case LE:
3335 PUT_CODE (cond, LEU);
3336 value = 2;
3337 break;
3338
3339 case LT:
3340 PUT_CODE (cond, LTU);
3341 value = 2;
3342 break;
3343
3344 case GT:
3345 PUT_CODE (cond, GTU);
3346 value = 2;
3347 break;
3348
3349 case GE:
3350 PUT_CODE (cond, GEU);
3351 value = 2;
3352 break;
3353
3354 default:
3355 break;
3356 }
3357
3358 return value;
3359 }
3360 #endif
3361 \f
3362 /* Report inconsistency between the assembler template and the operands.
3363 In an `asm', it's the user's fault; otherwise, the compiler's fault. */
3364
3365 void
3366 output_operand_lossage (const char *cmsgid, ...)
3367 {
3368 char *fmt_string;
3369 char *new_message;
3370 const char *pfx_str;
3371 va_list ap;
3372
3373 va_start (ap, cmsgid);
3374
3375 pfx_str = this_is_asm_operands ? _("invalid 'asm': ") : "output_operand: ";
3376 asprintf (&fmt_string, "%s%s", pfx_str, _(cmsgid));
3377 vasprintf (&new_message, fmt_string, ap);
3378
3379 if (this_is_asm_operands)
3380 error_for_asm (this_is_asm_operands, "%s", new_message);
3381 else
3382 internal_error ("%s", new_message);
3383
3384 free (fmt_string);
3385 free (new_message);
3386 va_end (ap);
3387 }
3388 \f
3389 /* Output of assembler code from a template, and its subroutines. */
3390
3391 /* Annotate the assembly with a comment describing the pattern and
3392 alternative used. */
3393
3394 static void
3395 output_asm_name (void)
3396 {
3397 if (debug_insn)
3398 {
3399 int num = INSN_CODE (debug_insn);
3400 fprintf (asm_out_file, "\t%s %d\t%s",
3401 ASM_COMMENT_START, INSN_UID (debug_insn),
3402 insn_data[num].name);
3403 if (insn_data[num].n_alternatives > 1)
3404 fprintf (asm_out_file, "/%d", which_alternative + 1);
3405
3406 if (HAVE_ATTR_length)
3407 fprintf (asm_out_file, "\t[length = %d]",
3408 get_attr_length (debug_insn));
3409
3410 /* Clear this so only the first assembler insn
3411 of any rtl insn will get the special comment for -dp. */
3412 debug_insn = 0;
3413 }
3414 }
3415
3416 /* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it
3417 or its address, return that expr . Set *PADDRESSP to 1 if the expr
3418 corresponds to the address of the object and 0 if to the object. */
3419
3420 static tree
3421 get_mem_expr_from_op (rtx op, int *paddressp)
3422 {
3423 tree expr;
3424 int inner_addressp;
3425
3426 *paddressp = 0;
3427
3428 if (REG_P (op))
3429 return REG_EXPR (op);
3430 else if (!MEM_P (op))
3431 return 0;
3432
3433 if (MEM_EXPR (op) != 0)
3434 return MEM_EXPR (op);
3435
3436 /* Otherwise we have an address, so indicate it and look at the address. */
3437 *paddressp = 1;
3438 op = XEXP (op, 0);
3439
3440 /* First check if we have a decl for the address, then look at the right side
3441 if it is a PLUS. Otherwise, strip off arithmetic and keep looking.
3442 But don't allow the address to itself be indirect. */
3443 if ((expr = get_mem_expr_from_op (op, &inner_addressp)) && ! inner_addressp)
3444 return expr;
3445 else if (GET_CODE (op) == PLUS
3446 && (expr = get_mem_expr_from_op (XEXP (op, 1), &inner_addressp)))
3447 return expr;
3448
3449 while (UNARY_P (op)
3450 || GET_RTX_CLASS (GET_CODE (op)) == RTX_BIN_ARITH)
3451 op = XEXP (op, 0);
3452
3453 expr = get_mem_expr_from_op (op, &inner_addressp);
3454 return inner_addressp ? 0 : expr;
3455 }
3456
3457 /* Output operand names for assembler instructions. OPERANDS is the
3458 operand vector, OPORDER is the order to write the operands, and NOPS
3459 is the number of operands to write. */
3460
3461 static void
3462 output_asm_operand_names (rtx *operands, int *oporder, int nops)
3463 {
3464 int wrote = 0;
3465 int i;
3466
3467 for (i = 0; i < nops; i++)
3468 {
3469 int addressp;
3470 rtx op = operands[oporder[i]];
3471 tree expr = get_mem_expr_from_op (op, &addressp);
3472
3473 fprintf (asm_out_file, "%c%s",
3474 wrote ? ',' : '\t', wrote ? "" : ASM_COMMENT_START);
3475 wrote = 1;
3476 if (expr)
3477 {
3478 fprintf (asm_out_file, "%s",
3479 addressp ? "*" : "");
3480 print_mem_expr (asm_out_file, expr);
3481 wrote = 1;
3482 }
3483 else if (REG_P (op) && ORIGINAL_REGNO (op)
3484 && ORIGINAL_REGNO (op) != REGNO (op))
3485 fprintf (asm_out_file, " tmp%i", ORIGINAL_REGNO (op));
3486 }
3487 }
3488
3489 #ifdef ASSEMBLER_DIALECT
3490 /* Helper function to parse assembler dialects in the asm string.
3491 This is called from output_asm_insn and asm_fprintf. */
3492 static const char *
3493 do_assembler_dialects (const char *p, int *dialect)
3494 {
3495 char c = *(p - 1);
3496
3497 switch (c)
3498 {
3499 case '{':
3500 {
3501 int i;
3502
3503 if (*dialect)
3504 output_operand_lossage ("nested assembly dialect alternatives");
3505 else
3506 *dialect = 1;
3507
3508 /* If we want the first dialect, do nothing. Otherwise, skip
3509 DIALECT_NUMBER of strings ending with '|'. */
3510 for (i = 0; i < dialect_number; i++)
3511 {
3512 while (*p && *p != '}')
3513 {
3514 if (*p == '|')
3515 {
3516 p++;
3517 break;
3518 }
3519
3520 /* Skip over any character after a percent sign. */
3521 if (*p == '%')
3522 p++;
3523 if (*p)
3524 p++;
3525 }
3526
3527 if (*p == '}')
3528 break;
3529 }
3530
3531 if (*p == '\0')
3532 output_operand_lossage ("unterminated assembly dialect alternative");
3533 }
3534 break;
3535
3536 case '|':
3537 if (*dialect)
3538 {
3539 /* Skip to close brace. */
3540 do
3541 {
3542 if (*p == '\0')
3543 {
3544 output_operand_lossage ("unterminated assembly dialect alternative");
3545 break;
3546 }
3547
3548 /* Skip over any character after a percent sign. */
3549 if (*p == '%' && p[1])
3550 {
3551 p += 2;
3552 continue;
3553 }
3554
3555 if (*p++ == '}')
3556 break;
3557 }
3558 while (1);
3559
3560 *dialect = 0;
3561 }
3562 else
3563 putc (c, asm_out_file);
3564 break;
3565
3566 case '}':
3567 if (! *dialect)
3568 putc (c, asm_out_file);
3569 *dialect = 0;
3570 break;
3571 default:
3572 gcc_unreachable ();
3573 }
3574
3575 return p;
3576 }
3577 #endif
3578
3579 /* Output text from TEMPLATE to the assembler output file,
3580 obeying %-directions to substitute operands taken from
3581 the vector OPERANDS.
3582
3583 %N (for N a digit) means print operand N in usual manner.
3584 %lN means require operand N to be a CODE_LABEL or LABEL_REF
3585 and print the label name with no punctuation.
3586 %cN means require operand N to be a constant
3587 and print the constant expression with no punctuation.
3588 %aN means expect operand N to be a memory address
3589 (not a memory reference!) and print a reference
3590 to that address.
3591 %nN means expect operand N to be a constant
3592 and print a constant expression for minus the value
3593 of the operand, with no other punctuation. */
3594
3595 void
3596 output_asm_insn (const char *templ, rtx *operands)
3597 {
3598 const char *p;
3599 int c;
3600 #ifdef ASSEMBLER_DIALECT
3601 int dialect = 0;
3602 #endif
3603 int oporder[MAX_RECOG_OPERANDS];
3604 char opoutput[MAX_RECOG_OPERANDS];
3605 int ops = 0;
3606
3607 /* An insn may return a null string template
3608 in a case where no assembler code is needed. */
3609 if (*templ == 0)
3610 return;
3611
3612 memset (opoutput, 0, sizeof opoutput);
3613 p = templ;
3614 putc ('\t', asm_out_file);
3615
3616 #ifdef ASM_OUTPUT_OPCODE
3617 ASM_OUTPUT_OPCODE (asm_out_file, p);
3618 #endif
3619
3620 while ((c = *p++))
3621 switch (c)
3622 {
3623 case '\n':
3624 if (flag_verbose_asm)
3625 output_asm_operand_names (operands, oporder, ops);
3626 if (flag_print_asm_name)
3627 output_asm_name ();
3628
3629 ops = 0;
3630 memset (opoutput, 0, sizeof opoutput);
3631
3632 putc (c, asm_out_file);
3633 #ifdef ASM_OUTPUT_OPCODE
3634 while ((c = *p) == '\t')
3635 {
3636 putc (c, asm_out_file);
3637 p++;
3638 }
3639 ASM_OUTPUT_OPCODE (asm_out_file, p);
3640 #endif
3641 break;
3642
3643 #ifdef ASSEMBLER_DIALECT
3644 case '{':
3645 case '}':
3646 case '|':
3647 p = do_assembler_dialects (p, &dialect);
3648 break;
3649 #endif
3650
3651 case '%':
3652 /* %% outputs a single %. %{, %} and %| print {, } and | respectively
3653 if ASSEMBLER_DIALECT defined and these characters have a special
3654 meaning as dialect delimiters.*/
3655 if (*p == '%'
3656 #ifdef ASSEMBLER_DIALECT
3657 || *p == '{' || *p == '}' || *p == '|'
3658 #endif
3659 )
3660 {
3661 putc (*p, asm_out_file);
3662 p++;
3663 }
3664 /* %= outputs a number which is unique to each insn in the entire
3665 compilation. This is useful for making local labels that are
3666 referred to more than once in a given insn. */
3667 else if (*p == '=')
3668 {
3669 p++;
3670 fprintf (asm_out_file, "%d", insn_counter);
3671 }
3672 /* % followed by a letter and some digits
3673 outputs an operand in a special way depending on the letter.
3674 Letters `acln' are implemented directly.
3675 Other letters are passed to `output_operand' so that
3676 the TARGET_PRINT_OPERAND hook can define them. */
3677 else if (ISALPHA (*p))
3678 {
3679 int letter = *p++;
3680 unsigned long opnum;
3681 char *endptr;
3682
3683 opnum = strtoul (p, &endptr, 10);
3684
3685 if (endptr == p)
3686 output_operand_lossage ("operand number missing "
3687 "after %%-letter");
3688 else if (this_is_asm_operands && opnum >= insn_noperands)
3689 output_operand_lossage ("operand number out of range");
3690 else if (letter == 'l')
3691 output_asm_label (operands[opnum]);
3692 else if (letter == 'a')
3693 output_address (operands[opnum]);
3694 else if (letter == 'c')
3695 {
3696 if (CONSTANT_ADDRESS_P (operands[opnum]))
3697 output_addr_const (asm_out_file, operands[opnum]);
3698 else
3699 output_operand (operands[opnum], 'c');
3700 }
3701 else if (letter == 'n')
3702 {
3703 if (CONST_INT_P (operands[opnum]))
3704 fprintf (asm_out_file, HOST_WIDE_INT_PRINT_DEC,
3705 - INTVAL (operands[opnum]));
3706 else
3707 {
3708 putc ('-', asm_out_file);
3709 output_addr_const (asm_out_file, operands[opnum]);
3710 }
3711 }
3712 else
3713 output_operand (operands[opnum], letter);
3714
3715 if (!opoutput[opnum])
3716 oporder[ops++] = opnum;
3717 opoutput[opnum] = 1;
3718
3719 p = endptr;
3720 c = *p;
3721 }
3722 /* % followed by a digit outputs an operand the default way. */
3723 else if (ISDIGIT (*p))
3724 {
3725 unsigned long opnum;
3726 char *endptr;
3727
3728 opnum = strtoul (p, &endptr, 10);
3729 if (this_is_asm_operands && opnum >= insn_noperands)
3730 output_operand_lossage ("operand number out of range");
3731 else
3732 output_operand (operands[opnum], 0);
3733
3734 if (!opoutput[opnum])
3735 oporder[ops++] = opnum;
3736 opoutput[opnum] = 1;
3737
3738 p = endptr;
3739 c = *p;
3740 }
3741 /* % followed by punctuation: output something for that
3742 punctuation character alone, with no operand. The
3743 TARGET_PRINT_OPERAND hook decides what is actually done. */
3744 else if (targetm.asm_out.print_operand_punct_valid_p ((unsigned char) *p))
3745 output_operand (NULL_RTX, *p++);
3746 else
3747 output_operand_lossage ("invalid %%-code");
3748 break;
3749
3750 default:
3751 putc (c, asm_out_file);
3752 }
3753
3754 /* Write out the variable names for operands, if we know them. */
3755 if (flag_verbose_asm)
3756 output_asm_operand_names (operands, oporder, ops);
3757 if (flag_print_asm_name)
3758 output_asm_name ();
3759
3760 putc ('\n', asm_out_file);
3761 }
3762 \f
3763 /* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */
3764
3765 void
3766 output_asm_label (rtx x)
3767 {
3768 char buf[256];
3769
3770 if (GET_CODE (x) == LABEL_REF)
3771 x = XEXP (x, 0);
3772 if (LABEL_P (x)
3773 || (NOTE_P (x)
3774 && NOTE_KIND (x) == NOTE_INSN_DELETED_LABEL))
3775 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3776 else
3777 output_operand_lossage ("'%%l' operand isn't a label");
3778
3779 assemble_name (asm_out_file, buf);
3780 }
3781
3782 /* Marks SYMBOL_REFs in x as referenced through use of assemble_external. */
3783
3784 void
3785 mark_symbol_refs_as_used (rtx x)
3786 {
3787 subrtx_iterator::array_type array;
3788 FOR_EACH_SUBRTX (iter, array, x, ALL)
3789 {
3790 const_rtx x = *iter;
3791 if (GET_CODE (x) == SYMBOL_REF)
3792 if (tree t = SYMBOL_REF_DECL (x))
3793 assemble_external (t);
3794 }
3795 }
3796
3797 /* Print operand X using machine-dependent assembler syntax.
3798 CODE is a non-digit that preceded the operand-number in the % spec,
3799 such as 'z' if the spec was `%z3'. CODE is 0 if there was no char
3800 between the % and the digits.
3801 When CODE is a non-letter, X is 0.
3802
3803 The meanings of the letters are machine-dependent and controlled
3804 by TARGET_PRINT_OPERAND. */
3805
3806 void
3807 output_operand (rtx x, int code ATTRIBUTE_UNUSED)
3808 {
3809 if (x && GET_CODE (x) == SUBREG)
3810 x = alter_subreg (&x, true);
3811
3812 /* X must not be a pseudo reg. */
3813 gcc_assert (!x || !REG_P (x) || REGNO (x) < FIRST_PSEUDO_REGISTER);
3814
3815 targetm.asm_out.print_operand (asm_out_file, x, code);
3816
3817 if (x == NULL_RTX)
3818 return;
3819
3820 mark_symbol_refs_as_used (x);
3821 }
3822
3823 /* Print a memory reference operand for address X using
3824 machine-dependent assembler syntax. */
3825
3826 void
3827 output_address (rtx x)
3828 {
3829 bool changed = false;
3830 walk_alter_subreg (&x, &changed);
3831 targetm.asm_out.print_operand_address (asm_out_file, x);
3832 }
3833 \f
3834 /* Print an integer constant expression in assembler syntax.
3835 Addition and subtraction are the only arithmetic
3836 that may appear in these expressions. */
3837
3838 void
3839 output_addr_const (FILE *file, rtx x)
3840 {
3841 char buf[256];
3842
3843 restart:
3844 switch (GET_CODE (x))
3845 {
3846 case PC:
3847 putc ('.', file);
3848 break;
3849
3850 case SYMBOL_REF:
3851 if (SYMBOL_REF_DECL (x))
3852 assemble_external (SYMBOL_REF_DECL (x));
3853 #ifdef ASM_OUTPUT_SYMBOL_REF
3854 ASM_OUTPUT_SYMBOL_REF (file, x);
3855 #else
3856 assemble_name (file, XSTR (x, 0));
3857 #endif
3858 break;
3859
3860 case LABEL_REF:
3861 x = XEXP (x, 0);
3862 /* Fall through. */
3863 case CODE_LABEL:
3864 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3865 #ifdef ASM_OUTPUT_LABEL_REF
3866 ASM_OUTPUT_LABEL_REF (file, buf);
3867 #else
3868 assemble_name (file, buf);
3869 #endif
3870 break;
3871
3872 case CONST_INT:
3873 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x));
3874 break;
3875
3876 case CONST:
3877 /* This used to output parentheses around the expression,
3878 but that does not work on the 386 (either ATT or BSD assembler). */
3879 output_addr_const (file, XEXP (x, 0));
3880 break;
3881
3882 case CONST_WIDE_INT:
3883 /* We do not know the mode here so we have to use a round about
3884 way to build a wide-int to get it printed properly. */
3885 {
3886 wide_int w = wide_int::from_array (&CONST_WIDE_INT_ELT (x, 0),
3887 CONST_WIDE_INT_NUNITS (x),
3888 CONST_WIDE_INT_NUNITS (x)
3889 * HOST_BITS_PER_WIDE_INT,
3890 false);
3891 print_decs (w, file);
3892 }
3893 break;
3894
3895 case CONST_DOUBLE:
3896 if (CONST_DOUBLE_AS_INT_P (x))
3897 {
3898 /* We can use %d if the number is one word and positive. */
3899 if (CONST_DOUBLE_HIGH (x))
3900 fprintf (file, HOST_WIDE_INT_PRINT_DOUBLE_HEX,
3901 (unsigned HOST_WIDE_INT) CONST_DOUBLE_HIGH (x),
3902 (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (x));
3903 else if (CONST_DOUBLE_LOW (x) < 0)
3904 fprintf (file, HOST_WIDE_INT_PRINT_HEX,
3905 (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (x));
3906 else
3907 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x));
3908 }
3909 else
3910 /* We can't handle floating point constants;
3911 PRINT_OPERAND must handle them. */
3912 output_operand_lossage ("floating constant misused");
3913 break;
3914
3915 case CONST_FIXED:
3916 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_FIXED_VALUE_LOW (x));
3917 break;
3918
3919 case PLUS:
3920 /* Some assemblers need integer constants to appear last (eg masm). */
3921 if (CONST_INT_P (XEXP (x, 0)))
3922 {
3923 output_addr_const (file, XEXP (x, 1));
3924 if (INTVAL (XEXP (x, 0)) >= 0)
3925 fprintf (file, "+");
3926 output_addr_const (file, XEXP (x, 0));
3927 }
3928 else
3929 {
3930 output_addr_const (file, XEXP (x, 0));
3931 if (!CONST_INT_P (XEXP (x, 1))
3932 || INTVAL (XEXP (x, 1)) >= 0)
3933 fprintf (file, "+");
3934 output_addr_const (file, XEXP (x, 1));
3935 }
3936 break;
3937
3938 case MINUS:
3939 /* Avoid outputting things like x-x or x+5-x,
3940 since some assemblers can't handle that. */
3941 x = simplify_subtraction (x);
3942 if (GET_CODE (x) != MINUS)
3943 goto restart;
3944
3945 output_addr_const (file, XEXP (x, 0));
3946 fprintf (file, "-");
3947 if ((CONST_INT_P (XEXP (x, 1)) && INTVAL (XEXP (x, 1)) >= 0)
3948 || GET_CODE (XEXP (x, 1)) == PC
3949 || GET_CODE (XEXP (x, 1)) == SYMBOL_REF)
3950 output_addr_const (file, XEXP (x, 1));
3951 else
3952 {
3953 fputs (targetm.asm_out.open_paren, file);
3954 output_addr_const (file, XEXP (x, 1));
3955 fputs (targetm.asm_out.close_paren, file);
3956 }
3957 break;
3958
3959 case ZERO_EXTEND:
3960 case SIGN_EXTEND:
3961 case SUBREG:
3962 case TRUNCATE:
3963 output_addr_const (file, XEXP (x, 0));
3964 break;
3965
3966 default:
3967 if (targetm.asm_out.output_addr_const_extra (file, x))
3968 break;
3969
3970 output_operand_lossage ("invalid expression as operand");
3971 }
3972 }
3973 \f
3974 /* Output a quoted string. */
3975
3976 void
3977 output_quoted_string (FILE *asm_file, const char *string)
3978 {
3979 #ifdef OUTPUT_QUOTED_STRING
3980 OUTPUT_QUOTED_STRING (asm_file, string);
3981 #else
3982 char c;
3983
3984 putc ('\"', asm_file);
3985 while ((c = *string++) != 0)
3986 {
3987 if (ISPRINT (c))
3988 {
3989 if (c == '\"' || c == '\\')
3990 putc ('\\', asm_file);
3991 putc (c, asm_file);
3992 }
3993 else
3994 fprintf (asm_file, "\\%03o", (unsigned char) c);
3995 }
3996 putc ('\"', asm_file);
3997 #endif
3998 }
3999 \f
4000 /* Write a HOST_WIDE_INT number in hex form 0x1234, fast. */
4001
4002 void
4003 fprint_whex (FILE *f, unsigned HOST_WIDE_INT value)
4004 {
4005 char buf[2 + CHAR_BIT * sizeof (value) / 4];
4006 if (value == 0)
4007 putc ('0', f);
4008 else
4009 {
4010 char *p = buf + sizeof (buf);
4011 do
4012 *--p = "0123456789abcdef"[value % 16];
4013 while ((value /= 16) != 0);
4014 *--p = 'x';
4015 *--p = '0';
4016 fwrite (p, 1, buf + sizeof (buf) - p, f);
4017 }
4018 }
4019
4020 /* Internal function that prints an unsigned long in decimal in reverse.
4021 The output string IS NOT null-terminated. */
4022
4023 static int
4024 sprint_ul_rev (char *s, unsigned long value)
4025 {
4026 int i = 0;
4027 do
4028 {
4029 s[i] = "0123456789"[value % 10];
4030 value /= 10;
4031 i++;
4032 /* alternate version, without modulo */
4033 /* oldval = value; */
4034 /* value /= 10; */
4035 /* s[i] = "0123456789" [oldval - 10*value]; */
4036 /* i++ */
4037 }
4038 while (value != 0);
4039 return i;
4040 }
4041
4042 /* Write an unsigned long as decimal to a file, fast. */
4043
4044 void
4045 fprint_ul (FILE *f, unsigned long value)
4046 {
4047 /* python says: len(str(2**64)) == 20 */
4048 char s[20];
4049 int i;
4050
4051 i = sprint_ul_rev (s, value);
4052
4053 /* It's probably too small to bother with string reversal and fputs. */
4054 do
4055 {
4056 i--;
4057 putc (s[i], f);
4058 }
4059 while (i != 0);
4060 }
4061
4062 /* Write an unsigned long as decimal to a string, fast.
4063 s must be wide enough to not overflow, at least 21 chars.
4064 Returns the length of the string (without terminating '\0'). */
4065
4066 int
4067 sprint_ul (char *s, unsigned long value)
4068 {
4069 int len;
4070 char tmp_c;
4071 int i;
4072 int j;
4073
4074 len = sprint_ul_rev (s, value);
4075 s[len] = '\0';
4076
4077 /* Reverse the string. */
4078 i = 0;
4079 j = len - 1;
4080 while (i < j)
4081 {
4082 tmp_c = s[i];
4083 s[i] = s[j];
4084 s[j] = tmp_c;
4085 i++; j--;
4086 }
4087
4088 return len;
4089 }
4090
4091 /* A poor man's fprintf, with the added features of %I, %R, %L, and %U.
4092 %R prints the value of REGISTER_PREFIX.
4093 %L prints the value of LOCAL_LABEL_PREFIX.
4094 %U prints the value of USER_LABEL_PREFIX.
4095 %I prints the value of IMMEDIATE_PREFIX.
4096 %O runs ASM_OUTPUT_OPCODE to transform what follows in the string.
4097 Also supported are %d, %i, %u, %x, %X, %o, %c, %s and %%.
4098
4099 We handle alternate assembler dialects here, just like output_asm_insn. */
4100
4101 void
4102 asm_fprintf (FILE *file, const char *p, ...)
4103 {
4104 char buf[10];
4105 char *q, c;
4106 #ifdef ASSEMBLER_DIALECT
4107 int dialect = 0;
4108 #endif
4109 va_list argptr;
4110
4111 va_start (argptr, p);
4112
4113 buf[0] = '%';
4114
4115 while ((c = *p++))
4116 switch (c)
4117 {
4118 #ifdef ASSEMBLER_DIALECT
4119 case '{':
4120 case '}':
4121 case '|':
4122 p = do_assembler_dialects (p, &dialect);
4123 break;
4124 #endif
4125
4126 case '%':
4127 c = *p++;
4128 q = &buf[1];
4129 while (strchr ("-+ #0", c))
4130 {
4131 *q++ = c;
4132 c = *p++;
4133 }
4134 while (ISDIGIT (c) || c == '.')
4135 {
4136 *q++ = c;
4137 c = *p++;
4138 }
4139 switch (c)
4140 {
4141 case '%':
4142 putc ('%', file);
4143 break;
4144
4145 case 'd': case 'i': case 'u':
4146 case 'x': case 'X': case 'o':
4147 case 'c':
4148 *q++ = c;
4149 *q = 0;
4150 fprintf (file, buf, va_arg (argptr, int));
4151 break;
4152
4153 case 'w':
4154 /* This is a prefix to the 'd', 'i', 'u', 'x', 'X', and
4155 'o' cases, but we do not check for those cases. It
4156 means that the value is a HOST_WIDE_INT, which may be
4157 either `long' or `long long'. */
4158 memcpy (q, HOST_WIDE_INT_PRINT, strlen (HOST_WIDE_INT_PRINT));
4159 q += strlen (HOST_WIDE_INT_PRINT);
4160 *q++ = *p++;
4161 *q = 0;
4162 fprintf (file, buf, va_arg (argptr, HOST_WIDE_INT));
4163 break;
4164
4165 case 'l':
4166 *q++ = c;
4167 #ifdef HAVE_LONG_LONG
4168 if (*p == 'l')
4169 {
4170 *q++ = *p++;
4171 *q++ = *p++;
4172 *q = 0;
4173 fprintf (file, buf, va_arg (argptr, long long));
4174 }
4175 else
4176 #endif
4177 {
4178 *q++ = *p++;
4179 *q = 0;
4180 fprintf (file, buf, va_arg (argptr, long));
4181 }
4182
4183 break;
4184
4185 case 's':
4186 *q++ = c;
4187 *q = 0;
4188 fprintf (file, buf, va_arg (argptr, char *));
4189 break;
4190
4191 case 'O':
4192 #ifdef ASM_OUTPUT_OPCODE
4193 ASM_OUTPUT_OPCODE (asm_out_file, p);
4194 #endif
4195 break;
4196
4197 case 'R':
4198 #ifdef REGISTER_PREFIX
4199 fprintf (file, "%s", REGISTER_PREFIX);
4200 #endif
4201 break;
4202
4203 case 'I':
4204 #ifdef IMMEDIATE_PREFIX
4205 fprintf (file, "%s", IMMEDIATE_PREFIX);
4206 #endif
4207 break;
4208
4209 case 'L':
4210 #ifdef LOCAL_LABEL_PREFIX
4211 fprintf (file, "%s", LOCAL_LABEL_PREFIX);
4212 #endif
4213 break;
4214
4215 case 'U':
4216 fputs (user_label_prefix, file);
4217 break;
4218
4219 #ifdef ASM_FPRINTF_EXTENSIONS
4220 /* Uppercase letters are reserved for general use by asm_fprintf
4221 and so are not available to target specific code. In order to
4222 prevent the ASM_FPRINTF_EXTENSIONS macro from using them then,
4223 they are defined here. As they get turned into real extensions
4224 to asm_fprintf they should be removed from this list. */
4225 case 'A': case 'B': case 'C': case 'D': case 'E':
4226 case 'F': case 'G': case 'H': case 'J': case 'K':
4227 case 'M': case 'N': case 'P': case 'Q': case 'S':
4228 case 'T': case 'V': case 'W': case 'Y': case 'Z':
4229 break;
4230
4231 ASM_FPRINTF_EXTENSIONS (file, argptr, p)
4232 #endif
4233 default:
4234 gcc_unreachable ();
4235 }
4236 break;
4237
4238 default:
4239 putc (c, file);
4240 }
4241 va_end (argptr);
4242 }
4243 \f
4244 /* Return nonzero if this function has no function calls. */
4245
4246 int
4247 leaf_function_p (void)
4248 {
4249 rtx_insn *insn;
4250
4251 /* Some back-ends (e.g. s390) want leaf functions to stay leaf
4252 functions even if they call mcount. */
4253 if (crtl->profile && !targetm.keep_leaf_when_profiled ())
4254 return 0;
4255
4256 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4257 {
4258 if (CALL_P (insn)
4259 && ! SIBLING_CALL_P (insn))
4260 return 0;
4261 if (NONJUMP_INSN_P (insn)
4262 && GET_CODE (PATTERN (insn)) == SEQUENCE
4263 && CALL_P (XVECEXP (PATTERN (insn), 0, 0))
4264 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0)))
4265 return 0;
4266 }
4267
4268 return 1;
4269 }
4270
4271 /* Return 1 if branch is a forward branch.
4272 Uses insn_shuid array, so it works only in the final pass. May be used by
4273 output templates to customary add branch prediction hints.
4274 */
4275 int
4276 final_forward_branch_p (rtx_insn *insn)
4277 {
4278 int insn_id, label_id;
4279
4280 gcc_assert (uid_shuid);
4281 insn_id = INSN_SHUID (insn);
4282 label_id = INSN_SHUID (JUMP_LABEL (insn));
4283 /* We've hit some insns that does not have id information available. */
4284 gcc_assert (insn_id && label_id);
4285 return insn_id < label_id;
4286 }
4287
4288 /* On some machines, a function with no call insns
4289 can run faster if it doesn't create its own register window.
4290 When output, the leaf function should use only the "output"
4291 registers. Ordinarily, the function would be compiled to use
4292 the "input" registers to find its arguments; it is a candidate
4293 for leaf treatment if it uses only the "input" registers.
4294 Leaf function treatment means renumbering so the function
4295 uses the "output" registers instead. */
4296
4297 #ifdef LEAF_REGISTERS
4298
4299 /* Return 1 if this function uses only the registers that can be
4300 safely renumbered. */
4301
4302 int
4303 only_leaf_regs_used (void)
4304 {
4305 int i;
4306 const char *const permitted_reg_in_leaf_functions = LEAF_REGISTERS;
4307
4308 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
4309 if ((df_regs_ever_live_p (i) || global_regs[i])
4310 && ! permitted_reg_in_leaf_functions[i])
4311 return 0;
4312
4313 if (crtl->uses_pic_offset_table
4314 && pic_offset_table_rtx != 0
4315 && REG_P (pic_offset_table_rtx)
4316 && ! permitted_reg_in_leaf_functions[REGNO (pic_offset_table_rtx)])
4317 return 0;
4318
4319 return 1;
4320 }
4321
4322 /* Scan all instructions and renumber all registers into those
4323 available in leaf functions. */
4324
4325 static void
4326 leaf_renumber_regs (rtx_insn *first)
4327 {
4328 rtx_insn *insn;
4329
4330 /* Renumber only the actual patterns.
4331 The reg-notes can contain frame pointer refs,
4332 and renumbering them could crash, and should not be needed. */
4333 for (insn = first; insn; insn = NEXT_INSN (insn))
4334 if (INSN_P (insn))
4335 leaf_renumber_regs_insn (PATTERN (insn));
4336 }
4337
4338 /* Scan IN_RTX and its subexpressions, and renumber all regs into those
4339 available in leaf functions. */
4340
4341 void
4342 leaf_renumber_regs_insn (rtx in_rtx)
4343 {
4344 int i, j;
4345 const char *format_ptr;
4346
4347 if (in_rtx == 0)
4348 return;
4349
4350 /* Renumber all input-registers into output-registers.
4351 renumbered_regs would be 1 for an output-register;
4352 they */
4353
4354 if (REG_P (in_rtx))
4355 {
4356 int newreg;
4357
4358 /* Don't renumber the same reg twice. */
4359 if (in_rtx->used)
4360 return;
4361
4362 newreg = REGNO (in_rtx);
4363 /* Don't try to renumber pseudo regs. It is possible for a pseudo reg
4364 to reach here as part of a REG_NOTE. */
4365 if (newreg >= FIRST_PSEUDO_REGISTER)
4366 {
4367 in_rtx->used = 1;
4368 return;
4369 }
4370 newreg = LEAF_REG_REMAP (newreg);
4371 gcc_assert (newreg >= 0);
4372 df_set_regs_ever_live (REGNO (in_rtx), false);
4373 df_set_regs_ever_live (newreg, true);
4374 SET_REGNO (in_rtx, newreg);
4375 in_rtx->used = 1;
4376 }
4377
4378 if (INSN_P (in_rtx))
4379 {
4380 /* Inside a SEQUENCE, we find insns.
4381 Renumber just the patterns of these insns,
4382 just as we do for the top-level insns. */
4383 leaf_renumber_regs_insn (PATTERN (in_rtx));
4384 return;
4385 }
4386
4387 format_ptr = GET_RTX_FORMAT (GET_CODE (in_rtx));
4388
4389 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (in_rtx)); i++)
4390 switch (*format_ptr++)
4391 {
4392 case 'e':
4393 leaf_renumber_regs_insn (XEXP (in_rtx, i));
4394 break;
4395
4396 case 'E':
4397 if (NULL != XVEC (in_rtx, i))
4398 {
4399 for (j = 0; j < XVECLEN (in_rtx, i); j++)
4400 leaf_renumber_regs_insn (XVECEXP (in_rtx, i, j));
4401 }
4402 break;
4403
4404 case 'S':
4405 case 's':
4406 case '0':
4407 case 'i':
4408 case 'w':
4409 case 'n':
4410 case 'u':
4411 break;
4412
4413 default:
4414 gcc_unreachable ();
4415 }
4416 }
4417 #endif
4418 \f
4419 /* Turn the RTL into assembly. */
4420 static unsigned int
4421 rest_of_handle_final (void)
4422 {
4423 rtx x;
4424 const char *fnname;
4425
4426 /* Get the function's name, as described by its RTL. This may be
4427 different from the DECL_NAME name used in the source file. */
4428
4429 x = DECL_RTL (current_function_decl);
4430 gcc_assert (MEM_P (x));
4431 x = XEXP (x, 0);
4432 gcc_assert (GET_CODE (x) == SYMBOL_REF);
4433 fnname = XSTR (x, 0);
4434
4435 assemble_start_function (current_function_decl, fnname);
4436 final_start_function (get_insns (), asm_out_file, optimize);
4437 final (get_insns (), asm_out_file, optimize);
4438 if (flag_use_caller_save)
4439 collect_fn_hard_reg_usage ();
4440 final_end_function ();
4441
4442 /* The IA-64 ".handlerdata" directive must be issued before the ".endp"
4443 directive that closes the procedure descriptor. Similarly, for x64 SEH.
4444 Otherwise it's not strictly necessary, but it doesn't hurt either. */
4445 output_function_exception_table (fnname);
4446
4447 assemble_end_function (current_function_decl, fnname);
4448
4449 user_defined_section_attribute = false;
4450
4451 /* Free up reg info memory. */
4452 free_reg_info ();
4453
4454 if (! quiet_flag)
4455 fflush (asm_out_file);
4456
4457 /* Write DBX symbols if requested. */
4458
4459 /* Note that for those inline functions where we don't initially
4460 know for certain that we will be generating an out-of-line copy,
4461 the first invocation of this routine (rest_of_compilation) will
4462 skip over this code by doing a `goto exit_rest_of_compilation;'.
4463 Later on, wrapup_global_declarations will (indirectly) call
4464 rest_of_compilation again for those inline functions that need
4465 to have out-of-line copies generated. During that call, we
4466 *will* be routed past here. */
4467
4468 timevar_push (TV_SYMOUT);
4469 if (!DECL_IGNORED_P (current_function_decl))
4470 debug_hooks->function_decl (current_function_decl);
4471 timevar_pop (TV_SYMOUT);
4472
4473 /* Release the blocks that are linked to DECL_INITIAL() to free the memory. */
4474 DECL_INITIAL (current_function_decl) = error_mark_node;
4475
4476 if (DECL_STATIC_CONSTRUCTOR (current_function_decl)
4477 && targetm.have_ctors_dtors)
4478 targetm.asm_out.constructor (XEXP (DECL_RTL (current_function_decl), 0),
4479 decl_init_priority_lookup
4480 (current_function_decl));
4481 if (DECL_STATIC_DESTRUCTOR (current_function_decl)
4482 && targetm.have_ctors_dtors)
4483 targetm.asm_out.destructor (XEXP (DECL_RTL (current_function_decl), 0),
4484 decl_fini_priority_lookup
4485 (current_function_decl));
4486 return 0;
4487 }
4488
4489 namespace {
4490
4491 const pass_data pass_data_final =
4492 {
4493 RTL_PASS, /* type */
4494 "final", /* name */
4495 OPTGROUP_NONE, /* optinfo_flags */
4496 TV_FINAL, /* tv_id */
4497 0, /* properties_required */
4498 0, /* properties_provided */
4499 0, /* properties_destroyed */
4500 0, /* todo_flags_start */
4501 0, /* todo_flags_finish */
4502 };
4503
4504 class pass_final : public rtl_opt_pass
4505 {
4506 public:
4507 pass_final (gcc::context *ctxt)
4508 : rtl_opt_pass (pass_data_final, ctxt)
4509 {}
4510
4511 /* opt_pass methods: */
4512 virtual unsigned int execute (function *) { return rest_of_handle_final (); }
4513
4514 }; // class pass_final
4515
4516 } // anon namespace
4517
4518 rtl_opt_pass *
4519 make_pass_final (gcc::context *ctxt)
4520 {
4521 return new pass_final (ctxt);
4522 }
4523
4524
4525 static unsigned int
4526 rest_of_handle_shorten_branches (void)
4527 {
4528 /* Shorten branches. */
4529 shorten_branches (get_insns ());
4530 return 0;
4531 }
4532
4533 namespace {
4534
4535 const pass_data pass_data_shorten_branches =
4536 {
4537 RTL_PASS, /* type */
4538 "shorten", /* name */
4539 OPTGROUP_NONE, /* optinfo_flags */
4540 TV_SHORTEN_BRANCH, /* tv_id */
4541 0, /* properties_required */
4542 0, /* properties_provided */
4543 0, /* properties_destroyed */
4544 0, /* todo_flags_start */
4545 0, /* todo_flags_finish */
4546 };
4547
4548 class pass_shorten_branches : public rtl_opt_pass
4549 {
4550 public:
4551 pass_shorten_branches (gcc::context *ctxt)
4552 : rtl_opt_pass (pass_data_shorten_branches, ctxt)
4553 {}
4554
4555 /* opt_pass methods: */
4556 virtual unsigned int execute (function *)
4557 {
4558 return rest_of_handle_shorten_branches ();
4559 }
4560
4561 }; // class pass_shorten_branches
4562
4563 } // anon namespace
4564
4565 rtl_opt_pass *
4566 make_pass_shorten_branches (gcc::context *ctxt)
4567 {
4568 return new pass_shorten_branches (ctxt);
4569 }
4570
4571
4572 static unsigned int
4573 rest_of_clean_state (void)
4574 {
4575 rtx_insn *insn, *next;
4576 FILE *final_output = NULL;
4577 int save_unnumbered = flag_dump_unnumbered;
4578 int save_noaddr = flag_dump_noaddr;
4579
4580 if (flag_dump_final_insns)
4581 {
4582 final_output = fopen (flag_dump_final_insns, "a");
4583 if (!final_output)
4584 {
4585 error ("could not open final insn dump file %qs: %m",
4586 flag_dump_final_insns);
4587 flag_dump_final_insns = NULL;
4588 }
4589 else
4590 {
4591 flag_dump_noaddr = flag_dump_unnumbered = 1;
4592 if (flag_compare_debug_opt || flag_compare_debug)
4593 dump_flags |= TDF_NOUID;
4594 dump_function_header (final_output, current_function_decl,
4595 dump_flags);
4596 final_insns_dump_p = true;
4597
4598 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4599 if (LABEL_P (insn))
4600 INSN_UID (insn) = CODE_LABEL_NUMBER (insn);
4601 else
4602 {
4603 if (NOTE_P (insn))
4604 set_block_for_insn (insn, NULL);
4605 INSN_UID (insn) = 0;
4606 }
4607 }
4608 }
4609
4610 /* It is very important to decompose the RTL instruction chain here:
4611 debug information keeps pointing into CODE_LABEL insns inside the function
4612 body. If these remain pointing to the other insns, we end up preserving
4613 whole RTL chain and attached detailed debug info in memory. */
4614 for (insn = get_insns (); insn; insn = next)
4615 {
4616 next = NEXT_INSN (insn);
4617 SET_NEXT_INSN (insn) = NULL;
4618 SET_PREV_INSN (insn) = NULL;
4619
4620 if (final_output
4621 && (!NOTE_P (insn) ||
4622 (NOTE_KIND (insn) != NOTE_INSN_VAR_LOCATION
4623 && NOTE_KIND (insn) != NOTE_INSN_CALL_ARG_LOCATION
4624 && NOTE_KIND (insn) != NOTE_INSN_BLOCK_BEG
4625 && NOTE_KIND (insn) != NOTE_INSN_BLOCK_END
4626 && NOTE_KIND (insn) != NOTE_INSN_DELETED_DEBUG_LABEL)))
4627 print_rtl_single (final_output, insn);
4628 }
4629
4630 if (final_output)
4631 {
4632 flag_dump_noaddr = save_noaddr;
4633 flag_dump_unnumbered = save_unnumbered;
4634 final_insns_dump_p = false;
4635
4636 if (fclose (final_output))
4637 {
4638 error ("could not close final insn dump file %qs: %m",
4639 flag_dump_final_insns);
4640 flag_dump_final_insns = NULL;
4641 }
4642 }
4643
4644 /* In case the function was not output,
4645 don't leave any temporary anonymous types
4646 queued up for sdb output. */
4647 #ifdef SDB_DEBUGGING_INFO
4648 if (write_symbols == SDB_DEBUG)
4649 sdbout_types (NULL_TREE);
4650 #endif
4651
4652 flag_rerun_cse_after_global_opts = 0;
4653 reload_completed = 0;
4654 epilogue_completed = 0;
4655 #ifdef STACK_REGS
4656 regstack_completed = 0;
4657 #endif
4658
4659 /* Clear out the insn_length contents now that they are no
4660 longer valid. */
4661 init_insn_lengths ();
4662
4663 /* Show no temporary slots allocated. */
4664 init_temp_slots ();
4665
4666 free_bb_for_insn ();
4667
4668 delete_tree_ssa ();
4669
4670 /* We can reduce stack alignment on call site only when we are sure that
4671 the function body just produced will be actually used in the final
4672 executable. */
4673 if (decl_binds_to_current_def_p (current_function_decl))
4674 {
4675 unsigned int pref = crtl->preferred_stack_boundary;
4676 if (crtl->stack_alignment_needed > crtl->preferred_stack_boundary)
4677 pref = crtl->stack_alignment_needed;
4678 cgraph_node::rtl_info (current_function_decl)
4679 ->preferred_incoming_stack_boundary = pref;
4680 }
4681
4682 /* Make sure volatile mem refs aren't considered valid operands for
4683 arithmetic insns. We must call this here if this is a nested inline
4684 function, since the above code leaves us in the init_recog state,
4685 and the function context push/pop code does not save/restore volatile_ok.
4686
4687 ??? Maybe it isn't necessary for expand_start_function to call this
4688 anymore if we do it here? */
4689
4690 init_recog_no_volatile ();
4691
4692 /* We're done with this function. Free up memory if we can. */
4693 free_after_parsing (cfun);
4694 free_after_compilation (cfun);
4695 return 0;
4696 }
4697
4698 namespace {
4699
4700 const pass_data pass_data_clean_state =
4701 {
4702 RTL_PASS, /* type */
4703 "*clean_state", /* name */
4704 OPTGROUP_NONE, /* optinfo_flags */
4705 TV_FINAL, /* tv_id */
4706 0, /* properties_required */
4707 0, /* properties_provided */
4708 PROP_rtl, /* properties_destroyed */
4709 0, /* todo_flags_start */
4710 0, /* todo_flags_finish */
4711 };
4712
4713 class pass_clean_state : public rtl_opt_pass
4714 {
4715 public:
4716 pass_clean_state (gcc::context *ctxt)
4717 : rtl_opt_pass (pass_data_clean_state, ctxt)
4718 {}
4719
4720 /* opt_pass methods: */
4721 virtual unsigned int execute (function *)
4722 {
4723 return rest_of_clean_state ();
4724 }
4725
4726 }; // class pass_clean_state
4727
4728 } // anon namespace
4729
4730 rtl_opt_pass *
4731 make_pass_clean_state (gcc::context *ctxt)
4732 {
4733 return new pass_clean_state (ctxt);
4734 }
4735
4736 /* Return true if INSN is a call to the the current function. */
4737
4738 static bool
4739 self_recursive_call_p (rtx_insn *insn)
4740 {
4741 tree fndecl = get_call_fndecl (insn);
4742 return (fndecl == current_function_decl
4743 && decl_binds_to_current_def_p (fndecl));
4744 }
4745
4746 /* Collect hard register usage for the current function. */
4747
4748 static void
4749 collect_fn_hard_reg_usage (void)
4750 {
4751 rtx_insn *insn;
4752 #ifdef STACK_REGS
4753 int i;
4754 #endif
4755 struct cgraph_rtl_info *node;
4756 HARD_REG_SET function_used_regs;
4757
4758 /* ??? To be removed when all the ports have been fixed. */
4759 if (!targetm.call_fusage_contains_non_callee_clobbers)
4760 return;
4761
4762 CLEAR_HARD_REG_SET (function_used_regs);
4763
4764 for (insn = get_insns (); insn != NULL_RTX; insn = next_insn (insn))
4765 {
4766 HARD_REG_SET insn_used_regs;
4767
4768 if (!NONDEBUG_INSN_P (insn))
4769 continue;
4770
4771 if (CALL_P (insn)
4772 && !self_recursive_call_p (insn))
4773 {
4774 if (!get_call_reg_set_usage (insn, &insn_used_regs,
4775 call_used_reg_set))
4776 return;
4777
4778 IOR_HARD_REG_SET (function_used_regs, insn_used_regs);
4779 }
4780
4781 find_all_hard_reg_sets (insn, &insn_used_regs, false);
4782 IOR_HARD_REG_SET (function_used_regs, insn_used_regs);
4783 }
4784
4785 /* Be conservative - mark fixed and global registers as used. */
4786 IOR_HARD_REG_SET (function_used_regs, fixed_reg_set);
4787
4788 #ifdef STACK_REGS
4789 /* Handle STACK_REGS conservatively, since the df-framework does not
4790 provide accurate information for them. */
4791
4792 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
4793 SET_HARD_REG_BIT (function_used_regs, i);
4794 #endif
4795
4796 /* The information we have gathered is only interesting if it exposes a
4797 register from the call_used_regs that is not used in this function. */
4798 if (hard_reg_set_subset_p (call_used_reg_set, function_used_regs))
4799 return;
4800
4801 node = cgraph_node::rtl_info (current_function_decl);
4802 gcc_assert (node != NULL);
4803
4804 COPY_HARD_REG_SET (node->function_used_regs, function_used_regs);
4805 node->function_used_regs_valid = 1;
4806 }
4807
4808 /* Get the declaration of the function called by INSN. */
4809
4810 static tree
4811 get_call_fndecl (rtx_insn *insn)
4812 {
4813 rtx note, datum;
4814
4815 note = find_reg_note (insn, REG_CALL_DECL, NULL_RTX);
4816 if (note == NULL_RTX)
4817 return NULL_TREE;
4818
4819 datum = XEXP (note, 0);
4820 if (datum != NULL_RTX)
4821 return SYMBOL_REF_DECL (datum);
4822
4823 return NULL_TREE;
4824 }
4825
4826 /* Return the cgraph_rtl_info of the function called by INSN. Returns NULL for
4827 call targets that can be overwritten. */
4828
4829 static struct cgraph_rtl_info *
4830 get_call_cgraph_rtl_info (rtx_insn *insn)
4831 {
4832 tree fndecl;
4833
4834 if (insn == NULL_RTX)
4835 return NULL;
4836
4837 fndecl = get_call_fndecl (insn);
4838 if (fndecl == NULL_TREE
4839 || !decl_binds_to_current_def_p (fndecl))
4840 return NULL;
4841
4842 return cgraph_node::rtl_info (fndecl);
4843 }
4844
4845 /* Find hard registers used by function call instruction INSN, and return them
4846 in REG_SET. Return DEFAULT_SET in REG_SET if not found. */
4847
4848 bool
4849 get_call_reg_set_usage (rtx uncast_insn, HARD_REG_SET *reg_set,
4850 HARD_REG_SET default_set)
4851 {
4852 rtx_insn *insn = safe_as_a <rtx_insn *> (uncast_insn);
4853 if (flag_use_caller_save)
4854 {
4855 struct cgraph_rtl_info *node = get_call_cgraph_rtl_info (insn);
4856 if (node != NULL
4857 && node->function_used_regs_valid)
4858 {
4859 COPY_HARD_REG_SET (*reg_set, node->function_used_regs);
4860 AND_HARD_REG_SET (*reg_set, default_set);
4861 return true;
4862 }
4863 }
4864
4865 COPY_HARD_REG_SET (*reg_set, default_set);
4866 return false;
4867 }