1 /* Convert RTL to assembler code and output it, for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
22 /* This is the final pass of the compiler.
23 It looks at the rtl code for a function and outputs assembler code.
25 Call `final_start_function' to output the assembler code for function entry,
26 `final' to output assembler code for some RTL code,
27 `final_end_function' to output assembler code for function exit.
28 If a function is compiled in several pieces, each piece is
29 output separately with `final'.
31 Some optimizations are also done at this level.
32 Move instructions that were made unnecessary by good register allocation
33 are detected and omitted from the output. (Though most of these
34 are removed by the last jump pass.)
36 Instructions to set the condition codes are omitted when it can be
37 seen that the condition codes already had the desired values.
39 In some cases it is sufficient if the inherited condition codes
40 have related values, but this may require the following insn
41 (the one that tests the condition codes) to be modified.
43 The code for the function prologue and epilogue are generated
44 directly in assembler by the target functions function_prologue and
45 function_epilogue. Those instructions never exist as rtl. */
54 #include "insn-config.h"
55 #include "insn-attr.h"
57 #include "conditions.h"
60 #include "hard-reg-set.h"
67 #include "basic-block.h"
72 #include "cfglayout.h"
74 #ifdef XCOFF_DEBUGGING_INFO
75 #include "xcoffout.h" /* Needed for external data
76 declarations for e.g. AIX 4.x. */
79 #if defined (DWARF2_UNWIND_INFO) || defined (DWARF2_DEBUGGING_INFO)
80 #include "dwarf2out.h"
83 /* If we aren't using cc0, CC_STATUS_INIT shouldn't exist. So define a
84 null default for it to save conditionalization later. */
85 #ifndef CC_STATUS_INIT
86 #define CC_STATUS_INIT
89 /* How to start an assembler comment. */
90 #ifndef ASM_COMMENT_START
91 #define ASM_COMMENT_START ";#"
94 /* Is the given character a logical line separator for the assembler? */
95 #ifndef IS_ASM_LOGICAL_LINE_SEPARATOR
96 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C) ((C) == ';')
99 #ifndef JUMP_TABLES_IN_TEXT_SECTION
100 #define JUMP_TABLES_IN_TEXT_SECTION 0
103 #if defined(READONLY_DATA_SECTION) || defined(READONLY_DATA_SECTION_ASM_OP)
104 #define HAVE_READONLY_DATA_SECTION 1
106 #define HAVE_READONLY_DATA_SECTION 0
109 /* Last insn processed by final_scan_insn. */
110 static rtx debug_insn
;
111 rtx current_output_insn
;
113 /* Line number of last NOTE. */
114 static int last_linenum
;
116 /* Highest line number in current block. */
117 static int high_block_linenum
;
119 /* Likewise for function. */
120 static int high_function_linenum
;
122 /* Filename of last NOTE. */
123 static const char *last_filename
;
125 extern int length_unit_log
; /* This is defined in insn-attrtab.c. */
127 /* Nonzero while outputting an `asm' with operands.
128 This means that inconsistencies are the user's fault, so don't abort.
129 The precise value is the insn being output, to pass to error_for_asm. */
130 rtx this_is_asm_operands
;
132 /* Number of operands of this insn, for an `asm' with operands. */
133 static unsigned int insn_noperands
;
135 /* Compare optimization flag. */
137 static rtx last_ignored_compare
= 0;
139 /* Flag indicating this insn is the start of a new basic block. */
141 static int new_block
= 1;
143 /* Assign a unique number to each insn that is output.
144 This can be used to generate unique local labels. */
146 static int insn_counter
= 0;
149 /* This variable contains machine-dependent flags (defined in tm.h)
150 set and examined by output routines
151 that describe how to interpret the condition codes properly. */
155 /* During output of an insn, this contains a copy of cc_status
156 from before the insn. */
158 CC_STATUS cc_prev_status
;
161 /* Indexed by hardware reg number, is 1 if that register is ever
162 used in the current function.
164 In life_analysis, or in stupid_life_analysis, this is set
165 up to record the hard regs used explicitly. Reload adds
166 in the hard regs used for holding pseudo regs. Final uses
167 it to generate the code in the function prologue and epilogue
168 to save and restore registers as needed. */
170 char regs_ever_live
[FIRST_PSEUDO_REGISTER
];
172 /* Nonzero means current function must be given a frame pointer.
173 Set in stmt.c if anything is allocated on the stack there.
174 Set in reload1.c if anything is allocated on the stack there. */
176 int frame_pointer_needed
;
178 /* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */
180 static int block_depth
;
182 /* Nonzero if have enabled APP processing of our assembler output. */
186 /* If we are outputting an insn sequence, this contains the sequence rtx.
191 #ifdef ASSEMBLER_DIALECT
193 /* Number of the assembler dialect to use, starting at 0. */
194 static int dialect_number
;
197 /* Indexed by line number, nonzero if there is a note for that line. */
199 static char *line_note_exists
;
201 #ifdef HAVE_conditional_execution
202 /* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */
203 rtx current_insn_predicate
;
208 struct function_list
*next
; /* next function */
209 const char *name
; /* function name */
210 long cfg_checksum
; /* function checksum */
211 long count_edges
; /* number of intrumented edges in this function */
214 static struct function_list
*functions_head
= 0;
215 static struct function_list
**functions_tail
= &functions_head
;
217 #ifdef HAVE_ATTR_length
218 static int asm_insn_count
PARAMS ((rtx
));
220 static void profile_function
PARAMS ((FILE *));
221 static void profile_after_prologue
PARAMS ((FILE *));
222 static void notice_source_line
PARAMS ((rtx
));
223 static rtx walk_alter_subreg
PARAMS ((rtx
*));
224 static void output_asm_name
PARAMS ((void));
225 static void output_alternate_entry_point
PARAMS ((FILE *, rtx
));
226 static tree get_mem_expr_from_op
PARAMS ((rtx
, int *));
227 static void output_asm_operand_names
PARAMS ((rtx
*, int *, int));
228 static void output_operand
PARAMS ((rtx
, int));
229 #ifdef LEAF_REGISTERS
230 static void leaf_renumber_regs
PARAMS ((rtx
));
233 static int alter_cond
PARAMS ((rtx
));
235 #ifndef ADDR_VEC_ALIGN
236 static int final_addr_vec_align
PARAMS ((rtx
));
238 #ifdef HAVE_ATTR_length
239 static int align_fuzz
PARAMS ((rtx
, rtx
, int, unsigned));
242 /* Initialize data in final at the beginning of a compilation. */
245 init_final (filename
)
246 const char *filename ATTRIBUTE_UNUSED
;
251 #ifdef ASSEMBLER_DIALECT
252 dialect_number
= ASSEMBLER_DIALECT
;
256 /* Called at end of source file,
257 to output the arc-profiling table for this entire compilation. */
261 const char *filename
;
263 if (profile_arc_flag
&& profile_info
.count_instrumented_edges
)
266 tree string_type
, string_cst
;
267 tree structure_decl
, structure_value
, structure_pointer_type
;
268 tree field_decl
, decl_chain
, value_chain
;
269 tree sizeof_field_value
, domain_type
;
272 string_type
= build_pointer_type (char_type_node
);
274 /* Libgcc2 bb structure. */
275 structure_decl
= make_node (RECORD_TYPE
);
276 structure_pointer_type
= build_pointer_type (structure_decl
);
278 /* Output the main header, of 7 words:
279 0: 1 if this file is initialized, else 0.
280 1: address of file name (LPBX1).
281 2: address of table of counts (LPBX2).
282 3: number of counts in the table.
283 4: always 0, libgcc2 uses this as a pointer to next ``struct bb''
285 The following are GNU extensions:
287 5: Number of bytes in this header.
288 6: address of table of function checksums (LPBX7). */
292 build_decl (FIELD_DECL
, get_identifier ("zero_word"),
293 long_integer_type_node
);
294 value_chain
= build_tree_list (decl_chain
,
295 convert (long_integer_type_node
,
298 /* Address of filename. */
300 char *cwd
, *da_filename
;
304 build_decl (FIELD_DECL
, get_identifier ("filename"), string_type
);
305 TREE_CHAIN (field_decl
) = decl_chain
;
306 decl_chain
= field_decl
;
309 da_filename_len
= strlen (filename
) + strlen (cwd
) + 4 + 1;
310 da_filename
= (char *) alloca (da_filename_len
);
311 strcpy (da_filename
, cwd
);
312 strcat (da_filename
, "/");
313 strcat (da_filename
, filename
);
314 strip_off_ending (da_filename
, da_filename_len
- 3);
315 strcat (da_filename
, ".da");
316 da_filename_len
= strlen (da_filename
);
317 string_cst
= build_string (da_filename_len
+ 1, da_filename
);
318 domain_type
= build_index_type (build_int_2 (da_filename_len
, 0));
319 TREE_TYPE (string_cst
)
320 = build_array_type (char_type_node
, domain_type
);
321 value_chain
= tree_cons (field_decl
,
322 build1 (ADDR_EXPR
, string_type
, string_cst
),
326 /* Table of counts. */
328 tree gcov_type_type
= make_unsigned_type (GCOV_TYPE_SIZE
);
329 tree gcov_type_pointer_type
= build_pointer_type (gcov_type_type
);
331 = build_index_type (build_int_2 (profile_info
.
332 count_instrumented_edges
- 1, 0));
333 tree gcov_type_array_type
334 = build_array_type (gcov_type_type
, domain_tree
);
335 tree gcov_type_array_pointer_type
336 = build_pointer_type (gcov_type_array_type
);
340 build_decl (FIELD_DECL
, get_identifier ("counts"),
341 gcov_type_pointer_type
);
342 TREE_CHAIN (field_decl
) = decl_chain
;
343 decl_chain
= field_decl
;
347 = build (VAR_DECL
, gcov_type_array_type
, NULL_TREE
, NULL_TREE
);
348 TREE_STATIC (counts_table
) = 1;
349 ASM_GENERATE_INTERNAL_LABEL (name
, "LPBX", 2);
350 DECL_NAME (counts_table
) = get_identifier (name
);
351 assemble_variable (counts_table
, 0, 0, 0);
353 value_chain
= tree_cons (field_decl
,
355 gcov_type_array_pointer_type
,
356 counts_table
), value_chain
);
359 /* Count of the # of instrumented arcs. */
361 = build_decl (FIELD_DECL
, get_identifier ("ncounts"),
362 long_integer_type_node
);
363 TREE_CHAIN (field_decl
) = decl_chain
;
364 decl_chain
= field_decl
;
366 value_chain
= tree_cons (field_decl
,
367 convert (long_integer_type_node
,
368 build_int_2 (profile_info
.
369 count_instrumented_edges
,
371 /* Pointer to the next bb. */
373 = build_decl (FIELD_DECL
, get_identifier ("next"),
374 structure_pointer_type
);
375 TREE_CHAIN (field_decl
) = decl_chain
;
376 decl_chain
= field_decl
;
378 value_chain
= tree_cons (field_decl
, null_pointer_node
, value_chain
);
380 /* sizeof(struct bb). We'll set this after entire structure
383 = build_decl (FIELD_DECL
, get_identifier ("sizeof_bb"),
384 long_integer_type_node
);
385 TREE_CHAIN (field_decl
) = decl_chain
;
386 decl_chain
= field_decl
;
388 sizeof_field_value
= tree_cons (field_decl
, NULL
, value_chain
);
389 value_chain
= sizeof_field_value
;
391 /* struct bb_function []. */
393 struct function_list
*item
;
395 tree checksum_field
, arc_count_field
, name_field
;
397 tree array_value_chain
= NULL_TREE
;
398 tree bb_fn_struct_type
;
399 tree bb_fn_struct_array_type
;
400 tree bb_fn_struct_array_pointer_type
;
401 tree bb_fn_struct_pointer_type
;
402 tree field_value
, field_value_chain
;
404 bb_fn_struct_type
= make_node (RECORD_TYPE
);
406 checksum_field
= build_decl (FIELD_DECL
, get_identifier ("checksum"),
407 long_integer_type_node
);
410 = build_decl (FIELD_DECL
, get_identifier ("arc_count"),
412 TREE_CHAIN (checksum_field
) = arc_count_field
;
415 = build_decl (FIELD_DECL
, get_identifier ("name"), string_type
);
416 TREE_CHAIN (arc_count_field
) = name_field
;
418 TYPE_FIELDS (bb_fn_struct_type
) = checksum_field
;
422 for (item
= functions_head
; item
!= 0; item
= item
->next
)
425 /* Note that the array contains a terminator, hence no - 1. */
426 domain
= build_index_type (build_int_2 (num_nodes
, 0));
428 bb_fn_struct_pointer_type
= build_pointer_type (bb_fn_struct_type
);
429 bb_fn_struct_array_type
430 = build_array_type (bb_fn_struct_type
, domain
);
431 bb_fn_struct_array_pointer_type
432 = build_pointer_type (bb_fn_struct_array_type
);
434 layout_type (bb_fn_struct_type
);
435 layout_type (bb_fn_struct_pointer_type
);
436 layout_type (bb_fn_struct_array_type
);
437 layout_type (bb_fn_struct_array_pointer_type
);
439 for (item
= functions_head
; item
!= 0; item
= item
->next
)
443 /* create constructor for structure. */
445 = build_tree_list (checksum_field
,
446 convert (long_integer_type_node
,
447 build_int_2 (item
->cfg_checksum
, 0)));
449 = tree_cons (arc_count_field
,
450 convert (integer_type_node
,
451 build_int_2 (item
->count_edges
, 0)),
454 name_len
= strlen (item
->name
);
455 string_cst
= build_string (name_len
+ 1, item
->name
);
456 domain_type
= build_index_type (build_int_2 (name_len
, 0));
457 TREE_TYPE (string_cst
)
458 = build_array_type (char_type_node
, domain_type
);
459 field_value_chain
= tree_cons (name_field
,
460 build1 (ADDR_EXPR
, string_type
,
466 = tree_cons (NULL_TREE
, build (CONSTRUCTOR
,
467 bb_fn_struct_type
, NULL_TREE
,
468 nreverse (field_value_chain
)),
472 /* Add terminator. */
473 field_value
= build_tree_list (arc_count_field
,
474 convert (integer_type_node
,
475 build_int_2 (-1, 0)));
477 array_value_chain
= tree_cons (NULL_TREE
,
478 build (CONSTRUCTOR
, bb_fn_struct_type
,
479 NULL_TREE
, field_value
),
483 /* Create constructor for array. */
485 = build_decl (FIELD_DECL
, get_identifier ("function_infos"),
486 bb_fn_struct_pointer_type
);
487 value_chain
= tree_cons (field_decl
,
489 bb_fn_struct_array_pointer_type
,
491 bb_fn_struct_array_type
,
494 (array_value_chain
))),
496 TREE_CHAIN (field_decl
) = decl_chain
;
497 decl_chain
= field_decl
;
500 /* Finish structure. */
501 TYPE_FIELDS (structure_decl
) = nreverse (decl_chain
);
502 layout_type (structure_decl
);
505 = build (VAR_DECL
, structure_decl
, NULL_TREE
, NULL_TREE
);
506 DECL_INITIAL (structure_value
)
507 = build (CONSTRUCTOR
, structure_decl
, NULL_TREE
,
508 nreverse (value_chain
));
509 TREE_STATIC (structure_value
) = 1;
510 ASM_GENERATE_INTERNAL_LABEL (name
, "LPBX", 0);
511 DECL_NAME (structure_value
) = get_identifier (name
);
513 /* Size of this structure. */
514 TREE_VALUE (sizeof_field_value
)
515 = convert (long_integer_type_node
,
516 build_int_2 (int_size_in_bytes (structure_decl
), 0));
518 /* Build structure. */
519 assemble_variable (structure_value
, 0, 0, 0);
523 /* Default target function prologue and epilogue assembler output.
525 If not overridden for epilogue code, then the function body itself
526 contains return instructions wherever needed. */
528 default_function_pro_epilogue (file
, size
)
529 FILE *file ATTRIBUTE_UNUSED
;
530 HOST_WIDE_INT size ATTRIBUTE_UNUSED
;
534 /* Default target hook that outputs nothing to a stream. */
536 no_asm_to_stream (file
)
537 FILE *file ATTRIBUTE_UNUSED
;
541 /* Enable APP processing of subsequent output.
542 Used before the output from an `asm' statement. */
549 fputs (ASM_APP_ON
, asm_out_file
);
554 /* Disable APP processing of subsequent output.
555 Called from varasm.c before most kinds of output. */
562 fputs (ASM_APP_OFF
, asm_out_file
);
567 /* Return the number of slots filled in the current
568 delayed branch sequence (we don't count the insn needing the
569 delay slot). Zero if not in a delayed branch sequence. */
573 dbr_sequence_length ()
575 if (final_sequence
!= 0)
576 return XVECLEN (final_sequence
, 0) - 1;
582 /* The next two pages contain routines used to compute the length of an insn
583 and to shorten branches. */
585 /* Arrays for insn lengths, and addresses. The latter is referenced by
586 `insn_current_length'. */
588 static int *insn_lengths
;
590 varray_type insn_addresses_
;
592 /* Max uid for which the above arrays are valid. */
593 static int insn_lengths_max_uid
;
595 /* Address of insn being processed. Used by `insn_current_length'. */
596 int insn_current_address
;
598 /* Address of insn being processed in previous iteration. */
599 int insn_last_address
;
601 /* known invariant alignment of insn being processed. */
602 int insn_current_align
;
604 /* After shorten_branches, for any insn, uid_align[INSN_UID (insn)]
605 gives the next following alignment insn that increases the known
606 alignment, or NULL_RTX if there is no such insn.
607 For any alignment obtained this way, we can again index uid_align with
608 its uid to obtain the next following align that in turn increases the
609 alignment, till we reach NULL_RTX; the sequence obtained this way
610 for each insn we'll call the alignment chain of this insn in the following
613 struct label_alignment
619 static rtx
*uid_align
;
620 static int *uid_shuid
;
621 static struct label_alignment
*label_align
;
623 /* Indicate that branch shortening hasn't yet been done. */
637 insn_lengths_max_uid
= 0;
639 #ifdef HAVE_ATTR_length
640 INSN_ADDRESSES_FREE ();
649 /* Obtain the current length of an insn. If branch shortening has been done,
650 get its actual length. Otherwise, get its maximum length. */
653 get_attr_length (insn
)
654 rtx insn ATTRIBUTE_UNUSED
;
656 #ifdef HAVE_ATTR_length
661 if (insn_lengths_max_uid
> INSN_UID (insn
))
662 return insn_lengths
[INSN_UID (insn
)];
664 switch (GET_CODE (insn
))
672 length
= insn_default_length (insn
);
676 body
= PATTERN (insn
);
677 if (GET_CODE (body
) == ADDR_VEC
|| GET_CODE (body
) == ADDR_DIFF_VEC
)
679 /* Alignment is machine-dependent and should be handled by
683 length
= insn_default_length (insn
);
687 body
= PATTERN (insn
);
688 if (GET_CODE (body
) == USE
|| GET_CODE (body
) == CLOBBER
)
691 else if (GET_CODE (body
) == ASM_INPUT
|| asm_noperands (body
) >= 0)
692 length
= asm_insn_count (body
) * insn_default_length (insn
);
693 else if (GET_CODE (body
) == SEQUENCE
)
694 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
695 length
+= get_attr_length (XVECEXP (body
, 0, i
));
697 length
= insn_default_length (insn
);
704 #ifdef ADJUST_INSN_LENGTH
705 ADJUST_INSN_LENGTH (insn
, length
);
708 #else /* not HAVE_ATTR_length */
710 #endif /* not HAVE_ATTR_length */
713 /* Code to handle alignment inside shorten_branches. */
715 /* Here is an explanation how the algorithm in align_fuzz can give
718 Call a sequence of instructions beginning with alignment point X
719 and continuing until the next alignment point `block X'. When `X'
720 is used in an expression, it means the alignment value of the
723 Call the distance between the start of the first insn of block X, and
724 the end of the last insn of block X `IX', for the `inner size of X'.
725 This is clearly the sum of the instruction lengths.
727 Likewise with the next alignment-delimited block following X, which we
730 Call the distance between the start of the first insn of block X, and
731 the start of the first insn of block Y `OX', for the `outer size of X'.
733 The estimated padding is then OX - IX.
735 OX can be safely estimated as
740 OX = round_up(IX, X) + Y - X
742 Clearly est(IX) >= real(IX), because that only depends on the
743 instruction lengths, and those being overestimated is a given.
745 Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so
746 we needn't worry about that when thinking about OX.
748 When X >= Y, the alignment provided by Y adds no uncertainty factor
749 for branch ranges starting before X, so we can just round what we have.
750 But when X < Y, we don't know anything about the, so to speak,
751 `middle bits', so we have to assume the worst when aligning up from an
752 address mod X to one mod Y, which is Y - X. */
755 #define LABEL_ALIGN(LABEL) align_labels_log
758 #ifndef LABEL_ALIGN_MAX_SKIP
759 #define LABEL_ALIGN_MAX_SKIP align_labels_max_skip
763 #define LOOP_ALIGN(LABEL) align_loops_log
766 #ifndef LOOP_ALIGN_MAX_SKIP
767 #define LOOP_ALIGN_MAX_SKIP align_loops_max_skip
770 #ifndef LABEL_ALIGN_AFTER_BARRIER
771 #define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0
774 #ifndef LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP
775 #define LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP 0
779 #define JUMP_ALIGN(LABEL) align_jumps_log
782 #ifndef JUMP_ALIGN_MAX_SKIP
783 #define JUMP_ALIGN_MAX_SKIP align_jumps_max_skip
786 #ifndef ADDR_VEC_ALIGN
788 final_addr_vec_align (addr_vec
)
791 int align
= GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec
)));
793 if (align
> BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
)
794 align
= BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
;
795 return exact_log2 (align
);
799 #define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC)
802 #ifndef INSN_LENGTH_ALIGNMENT
803 #define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log
806 #define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)])
808 static int min_labelno
, max_labelno
;
810 #define LABEL_TO_ALIGNMENT(LABEL) \
811 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment)
813 #define LABEL_TO_MAX_SKIP(LABEL) \
814 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip)
816 /* For the benefit of port specific code do this also as a function. */
819 label_to_alignment (label
)
822 return LABEL_TO_ALIGNMENT (label
);
825 #ifdef HAVE_ATTR_length
826 /* The differences in addresses
827 between a branch and its target might grow or shrink depending on
828 the alignment the start insn of the range (the branch for a forward
829 branch or the label for a backward branch) starts out on; if these
830 differences are used naively, they can even oscillate infinitely.
831 We therefore want to compute a 'worst case' address difference that
832 is independent of the alignment the start insn of the range end
833 up on, and that is at least as large as the actual difference.
834 The function align_fuzz calculates the amount we have to add to the
835 naively computed difference, by traversing the part of the alignment
836 chain of the start insn of the range that is in front of the end insn
837 of the range, and considering for each alignment the maximum amount
838 that it might contribute to a size increase.
840 For casesi tables, we also want to know worst case minimum amounts of
841 address difference, in case a machine description wants to introduce
842 some common offset that is added to all offsets in a table.
843 For this purpose, align_fuzz with a growth argument of 0 computes the
844 appropriate adjustment. */
846 /* Compute the maximum delta by which the difference of the addresses of
847 START and END might grow / shrink due to a different address for start
848 which changes the size of alignment insns between START and END.
849 KNOWN_ALIGN_LOG is the alignment known for START.
850 GROWTH should be ~0 if the objective is to compute potential code size
851 increase, and 0 if the objective is to compute potential shrink.
852 The return value is undefined for any other value of GROWTH. */
855 align_fuzz (start
, end
, known_align_log
, growth
)
860 int uid
= INSN_UID (start
);
862 int known_align
= 1 << known_align_log
;
863 int end_shuid
= INSN_SHUID (end
);
866 for (align_label
= uid_align
[uid
]; align_label
; align_label
= uid_align
[uid
])
868 int align_addr
, new_align
;
870 uid
= INSN_UID (align_label
);
871 align_addr
= INSN_ADDRESSES (uid
) - insn_lengths
[uid
];
872 if (uid_shuid
[uid
] > end_shuid
)
874 known_align_log
= LABEL_TO_ALIGNMENT (align_label
);
875 new_align
= 1 << known_align_log
;
876 if (new_align
< known_align
)
878 fuzz
+= (-align_addr
^ growth
) & (new_align
- known_align
);
879 known_align
= new_align
;
884 /* Compute a worst-case reference address of a branch so that it
885 can be safely used in the presence of aligned labels. Since the
886 size of the branch itself is unknown, the size of the branch is
887 not included in the range. I.e. for a forward branch, the reference
888 address is the end address of the branch as known from the previous
889 branch shortening pass, minus a value to account for possible size
890 increase due to alignment. For a backward branch, it is the start
891 address of the branch as known from the current pass, plus a value
892 to account for possible size increase due to alignment.
893 NB.: Therefore, the maximum offset allowed for backward branches needs
894 to exclude the branch size. */
897 insn_current_reference_address (branch
)
903 if (! INSN_ADDRESSES_SET_P ())
906 seq
= NEXT_INSN (PREV_INSN (branch
));
907 seq_uid
= INSN_UID (seq
);
908 if (GET_CODE (branch
) != JUMP_INSN
)
909 /* This can happen for example on the PA; the objective is to know the
910 offset to address something in front of the start of the function.
911 Thus, we can treat it like a backward branch.
912 We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than
913 any alignment we'd encounter, so we skip the call to align_fuzz. */
914 return insn_current_address
;
915 dest
= JUMP_LABEL (branch
);
917 /* BRANCH has no proper alignment chain set, so use SEQ.
918 BRANCH also has no INSN_SHUID. */
919 if (INSN_SHUID (seq
) < INSN_SHUID (dest
))
921 /* Forward branch. */
922 return (insn_last_address
+ insn_lengths
[seq_uid
]
923 - align_fuzz (seq
, dest
, length_unit_log
, ~0));
927 /* Backward branch. */
928 return (insn_current_address
929 + align_fuzz (dest
, seq
, length_unit_log
, ~0));
932 #endif /* HAVE_ATTR_length */
935 compute_alignments ()
937 int log
, max_skip
, max_log
;
946 max_labelno
= max_label_num ();
947 min_labelno
= get_first_label_num ();
948 label_align
= (struct label_alignment
*)
949 xcalloc (max_labelno
- min_labelno
+ 1, sizeof (struct label_alignment
));
951 /* If not optimizing or optimizing for size, don't assign any alignments. */
952 if (! optimize
|| optimize_size
)
957 rtx label
= bb
->head
;
958 int fallthru_frequency
= 0, branch_frequency
= 0, has_fallthru
= 0;
961 if (GET_CODE (label
) != CODE_LABEL
)
963 max_log
= LABEL_ALIGN (label
);
964 max_skip
= LABEL_ALIGN_MAX_SKIP
;
966 for (e
= bb
->pred
; e
; e
= e
->pred_next
)
968 if (e
->flags
& EDGE_FALLTHRU
)
969 has_fallthru
= 1, fallthru_frequency
+= EDGE_FREQUENCY (e
);
971 branch_frequency
+= EDGE_FREQUENCY (e
);
974 /* There are two purposes to align block with no fallthru incoming edge:
975 1) to avoid fetch stalls when branch destination is near cache boundary
976 2) to improve cache efficiency in case the previous block is not executed
977 (so it does not need to be in the cache).
979 We to catch first case, we align frequently executed blocks.
980 To catch the second, we align blocks that are executed more frequently
981 than the predecessor and the predecessor is likely to not be executed
982 when function is called. */
985 && (branch_frequency
> BB_FREQ_MAX
/ 10
986 || (bb
->frequency
> bb
->prev_bb
->frequency
* 10
987 && (bb
->prev_bb
->frequency
988 <= ENTRY_BLOCK_PTR
->frequency
/ 2))))
990 log
= JUMP_ALIGN (label
);
994 max_skip
= JUMP_ALIGN_MAX_SKIP
;
997 /* In case block is frequent and reached mostly by non-fallthru edge,
998 align it. It is most likely an first block of loop. */
1000 && branch_frequency
+ fallthru_frequency
> BB_FREQ_MAX
/ 10
1001 && branch_frequency
> fallthru_frequency
* 5)
1003 log
= LOOP_ALIGN (label
);
1007 max_skip
= LOOP_ALIGN_MAX_SKIP
;
1010 LABEL_TO_ALIGNMENT (label
) = max_log
;
1011 LABEL_TO_MAX_SKIP (label
) = max_skip
;
1015 /* Make a pass over all insns and compute their actual lengths by shortening
1016 any branches of variable length if possible. */
1018 /* Give a default value for the lowest address in a function. */
1020 #ifndef FIRST_INSN_ADDRESS
1021 #define FIRST_INSN_ADDRESS 0
1024 /* shorten_branches might be called multiple times: for example, the SH
1025 port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG.
1026 In order to do this, it needs proper length information, which it obtains
1027 by calling shorten_branches. This cannot be collapsed with
1028 shorten_branches itself into a single pass unless we also want to integrate
1029 reorg.c, since the branch splitting exposes new instructions with delay
1033 shorten_branches (first
)
1034 rtx first ATTRIBUTE_UNUSED
;
1041 #ifdef HAVE_ATTR_length
1042 #define MAX_CODE_ALIGN 16
1044 int something_changed
= 1;
1045 char *varying_length
;
1048 rtx align_tab
[MAX_CODE_ALIGN
];
1052 /* Compute maximum UID and allocate label_align / uid_shuid. */
1053 max_uid
= get_max_uid ();
1055 uid_shuid
= (int *) xmalloc (max_uid
* sizeof *uid_shuid
);
1057 if (max_labelno
!= max_label_num ())
1059 int old
= max_labelno
;
1063 max_labelno
= max_label_num ();
1065 n_labels
= max_labelno
- min_labelno
+ 1;
1066 n_old_labels
= old
- min_labelno
+ 1;
1068 label_align
= (struct label_alignment
*) xrealloc
1069 (label_align
, n_labels
* sizeof (struct label_alignment
));
1071 /* Range of labels grows monotonically in the function. Abort here
1072 means that the initialization of array got lost. */
1073 if (n_old_labels
> n_labels
)
1076 memset (label_align
+ n_old_labels
, 0,
1077 (n_labels
- n_old_labels
) * sizeof (struct label_alignment
));
1080 /* Initialize label_align and set up uid_shuid to be strictly
1081 monotonically rising with insn order. */
1082 /* We use max_log here to keep track of the maximum alignment we want to
1083 impose on the next CODE_LABEL (or the current one if we are processing
1084 the CODE_LABEL itself). */
1089 for (insn
= get_insns (), i
= 1; insn
; insn
= NEXT_INSN (insn
))
1093 INSN_SHUID (insn
) = i
++;
1096 /* reorg might make the first insn of a loop being run once only,
1097 and delete the label in front of it. Then we want to apply
1098 the loop alignment to the new label created by reorg, which
1099 is separated by the former loop start insn from the
1100 NOTE_INSN_LOOP_BEG. */
1102 else if (GET_CODE (insn
) == CODE_LABEL
)
1106 /* Merge in alignments computed by compute_alignments. */
1107 log
= LABEL_TO_ALIGNMENT (insn
);
1111 max_skip
= LABEL_TO_MAX_SKIP (insn
);
1114 log
= LABEL_ALIGN (insn
);
1118 max_skip
= LABEL_ALIGN_MAX_SKIP
;
1120 next
= NEXT_INSN (insn
);
1121 /* ADDR_VECs only take room if read-only data goes into the text
1123 if (JUMP_TABLES_IN_TEXT_SECTION
|| !HAVE_READONLY_DATA_SECTION
)
1124 if (next
&& GET_CODE (next
) == JUMP_INSN
)
1126 rtx nextbody
= PATTERN (next
);
1127 if (GET_CODE (nextbody
) == ADDR_VEC
1128 || GET_CODE (nextbody
) == ADDR_DIFF_VEC
)
1130 log
= ADDR_VEC_ALIGN (next
);
1134 max_skip
= LABEL_ALIGN_MAX_SKIP
;
1138 LABEL_TO_ALIGNMENT (insn
) = max_log
;
1139 LABEL_TO_MAX_SKIP (insn
) = max_skip
;
1143 else if (GET_CODE (insn
) == BARRIER
)
1147 for (label
= insn
; label
&& ! INSN_P (label
);
1148 label
= NEXT_INSN (label
))
1149 if (GET_CODE (label
) == CODE_LABEL
)
1151 log
= LABEL_ALIGN_AFTER_BARRIER (insn
);
1155 max_skip
= LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP
;
1161 #ifdef HAVE_ATTR_length
1163 /* Allocate the rest of the arrays. */
1164 insn_lengths
= (int *) xmalloc (max_uid
* sizeof (*insn_lengths
));
1165 insn_lengths_max_uid
= max_uid
;
1166 /* Syntax errors can lead to labels being outside of the main insn stream.
1167 Initialize insn_addresses, so that we get reproducible results. */
1168 INSN_ADDRESSES_ALLOC (max_uid
);
1170 varying_length
= (char *) xcalloc (max_uid
, sizeof (char));
1172 /* Initialize uid_align. We scan instructions
1173 from end to start, and keep in align_tab[n] the last seen insn
1174 that does an alignment of at least n+1, i.e. the successor
1175 in the alignment chain for an insn that does / has a known
1177 uid_align
= (rtx
*) xcalloc (max_uid
, sizeof *uid_align
);
1179 for (i
= MAX_CODE_ALIGN
; --i
>= 0;)
1180 align_tab
[i
] = NULL_RTX
;
1181 seq
= get_last_insn ();
1182 for (; seq
; seq
= PREV_INSN (seq
))
1184 int uid
= INSN_UID (seq
);
1186 log
= (GET_CODE (seq
) == CODE_LABEL
? LABEL_TO_ALIGNMENT (seq
) : 0);
1187 uid_align
[uid
] = align_tab
[0];
1190 /* Found an alignment label. */
1191 uid_align
[uid
] = align_tab
[log
];
1192 for (i
= log
- 1; i
>= 0; i
--)
1196 #ifdef CASE_VECTOR_SHORTEN_MODE
1199 /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum
1202 int min_shuid
= INSN_SHUID (get_insns ()) - 1;
1203 int max_shuid
= INSN_SHUID (get_last_insn ()) + 1;
1206 for (insn
= first
; insn
!= 0; insn
= NEXT_INSN (insn
))
1208 rtx min_lab
= NULL_RTX
, max_lab
= NULL_RTX
, pat
;
1209 int len
, i
, min
, max
, insn_shuid
;
1211 addr_diff_vec_flags flags
;
1213 if (GET_CODE (insn
) != JUMP_INSN
1214 || GET_CODE (PATTERN (insn
)) != ADDR_DIFF_VEC
)
1216 pat
= PATTERN (insn
);
1217 len
= XVECLEN (pat
, 1);
1220 min_align
= MAX_CODE_ALIGN
;
1221 for (min
= max_shuid
, max
= min_shuid
, i
= len
- 1; i
>= 0; i
--)
1223 rtx lab
= XEXP (XVECEXP (pat
, 1, i
), 0);
1224 int shuid
= INSN_SHUID (lab
);
1235 if (min_align
> LABEL_TO_ALIGNMENT (lab
))
1236 min_align
= LABEL_TO_ALIGNMENT (lab
);
1238 XEXP (pat
, 2) = gen_rtx_LABEL_REF (VOIDmode
, min_lab
);
1239 XEXP (pat
, 3) = gen_rtx_LABEL_REF (VOIDmode
, max_lab
);
1240 insn_shuid
= INSN_SHUID (insn
);
1241 rel
= INSN_SHUID (XEXP (XEXP (pat
, 0), 0));
1242 flags
.min_align
= min_align
;
1243 flags
.base_after_vec
= rel
> insn_shuid
;
1244 flags
.min_after_vec
= min
> insn_shuid
;
1245 flags
.max_after_vec
= max
> insn_shuid
;
1246 flags
.min_after_base
= min
> rel
;
1247 flags
.max_after_base
= max
> rel
;
1248 ADDR_DIFF_VEC_FLAGS (pat
) = flags
;
1251 #endif /* CASE_VECTOR_SHORTEN_MODE */
1253 /* Compute initial lengths, addresses, and varying flags for each insn. */
1254 for (insn_current_address
= FIRST_INSN_ADDRESS
, insn
= first
;
1256 insn_current_address
+= insn_lengths
[uid
], insn
= NEXT_INSN (insn
))
1258 uid
= INSN_UID (insn
);
1260 insn_lengths
[uid
] = 0;
1262 if (GET_CODE (insn
) == CODE_LABEL
)
1264 int log
= LABEL_TO_ALIGNMENT (insn
);
1267 int align
= 1 << log
;
1268 int new_address
= (insn_current_address
+ align
- 1) & -align
;
1269 insn_lengths
[uid
] = new_address
- insn_current_address
;
1273 INSN_ADDRESSES (uid
) = insn_current_address
;
1275 if (GET_CODE (insn
) == NOTE
|| GET_CODE (insn
) == BARRIER
1276 || GET_CODE (insn
) == CODE_LABEL
)
1278 if (INSN_DELETED_P (insn
))
1281 body
= PATTERN (insn
);
1282 if (GET_CODE (body
) == ADDR_VEC
|| GET_CODE (body
) == ADDR_DIFF_VEC
)
1284 /* This only takes room if read-only data goes into the text
1286 if (JUMP_TABLES_IN_TEXT_SECTION
|| !HAVE_READONLY_DATA_SECTION
)
1287 insn_lengths
[uid
] = (XVECLEN (body
,
1288 GET_CODE (body
) == ADDR_DIFF_VEC
)
1289 * GET_MODE_SIZE (GET_MODE (body
)));
1290 /* Alignment is handled by ADDR_VEC_ALIGN. */
1292 else if (GET_CODE (body
) == ASM_INPUT
|| asm_noperands (body
) >= 0)
1293 insn_lengths
[uid
] = asm_insn_count (body
) * insn_default_length (insn
);
1294 else if (GET_CODE (body
) == SEQUENCE
)
1297 int const_delay_slots
;
1299 const_delay_slots
= const_num_delay_slots (XVECEXP (body
, 0, 0));
1301 const_delay_slots
= 0;
1303 /* Inside a delay slot sequence, we do not do any branch shortening
1304 if the shortening could change the number of delay slots
1306 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
1308 rtx inner_insn
= XVECEXP (body
, 0, i
);
1309 int inner_uid
= INSN_UID (inner_insn
);
1312 if (GET_CODE (body
) == ASM_INPUT
1313 || asm_noperands (PATTERN (XVECEXP (body
, 0, i
))) >= 0)
1314 inner_length
= (asm_insn_count (PATTERN (inner_insn
))
1315 * insn_default_length (inner_insn
));
1317 inner_length
= insn_default_length (inner_insn
);
1319 insn_lengths
[inner_uid
] = inner_length
;
1320 if (const_delay_slots
)
1322 if ((varying_length
[inner_uid
]
1323 = insn_variable_length_p (inner_insn
)) != 0)
1324 varying_length
[uid
] = 1;
1325 INSN_ADDRESSES (inner_uid
) = (insn_current_address
1326 + insn_lengths
[uid
]);
1329 varying_length
[inner_uid
] = 0;
1330 insn_lengths
[uid
] += inner_length
;
1333 else if (GET_CODE (body
) != USE
&& GET_CODE (body
) != CLOBBER
)
1335 insn_lengths
[uid
] = insn_default_length (insn
);
1336 varying_length
[uid
] = insn_variable_length_p (insn
);
1339 /* If needed, do any adjustment. */
1340 #ifdef ADJUST_INSN_LENGTH
1341 ADJUST_INSN_LENGTH (insn
, insn_lengths
[uid
]);
1342 if (insn_lengths
[uid
] < 0)
1343 fatal_insn ("negative insn length", insn
);
1347 /* Now loop over all the insns finding varying length insns. For each,
1348 get the current insn length. If it has changed, reflect the change.
1349 When nothing changes for a full pass, we are done. */
1351 while (something_changed
)
1353 something_changed
= 0;
1354 insn_current_align
= MAX_CODE_ALIGN
- 1;
1355 for (insn_current_address
= FIRST_INSN_ADDRESS
, insn
= first
;
1357 insn
= NEXT_INSN (insn
))
1360 #ifdef ADJUST_INSN_LENGTH
1365 uid
= INSN_UID (insn
);
1367 if (GET_CODE (insn
) == CODE_LABEL
)
1369 int log
= LABEL_TO_ALIGNMENT (insn
);
1370 if (log
> insn_current_align
)
1372 int align
= 1 << log
;
1373 int new_address
= (insn_current_address
+ align
- 1) & -align
;
1374 insn_lengths
[uid
] = new_address
- insn_current_address
;
1375 insn_current_align
= log
;
1376 insn_current_address
= new_address
;
1379 insn_lengths
[uid
] = 0;
1380 INSN_ADDRESSES (uid
) = insn_current_address
;
1384 length_align
= INSN_LENGTH_ALIGNMENT (insn
);
1385 if (length_align
< insn_current_align
)
1386 insn_current_align
= length_align
;
1388 insn_last_address
= INSN_ADDRESSES (uid
);
1389 INSN_ADDRESSES (uid
) = insn_current_address
;
1391 #ifdef CASE_VECTOR_SHORTEN_MODE
1392 if (optimize
&& GET_CODE (insn
) == JUMP_INSN
1393 && GET_CODE (PATTERN (insn
)) == ADDR_DIFF_VEC
)
1395 rtx body
= PATTERN (insn
);
1396 int old_length
= insn_lengths
[uid
];
1397 rtx rel_lab
= XEXP (XEXP (body
, 0), 0);
1398 rtx min_lab
= XEXP (XEXP (body
, 2), 0);
1399 rtx max_lab
= XEXP (XEXP (body
, 3), 0);
1400 int rel_addr
= INSN_ADDRESSES (INSN_UID (rel_lab
));
1401 int min_addr
= INSN_ADDRESSES (INSN_UID (min_lab
));
1402 int max_addr
= INSN_ADDRESSES (INSN_UID (max_lab
));
1405 addr_diff_vec_flags flags
;
1407 /* Avoid automatic aggregate initialization. */
1408 flags
= ADDR_DIFF_VEC_FLAGS (body
);
1410 /* Try to find a known alignment for rel_lab. */
1411 for (prev
= rel_lab
;
1413 && ! insn_lengths
[INSN_UID (prev
)]
1414 && ! (varying_length
[INSN_UID (prev
)] & 1);
1415 prev
= PREV_INSN (prev
))
1416 if (varying_length
[INSN_UID (prev
)] & 2)
1418 rel_align
= LABEL_TO_ALIGNMENT (prev
);
1422 /* See the comment on addr_diff_vec_flags in rtl.h for the
1423 meaning of the flags values. base: REL_LAB vec: INSN */
1424 /* Anything after INSN has still addresses from the last
1425 pass; adjust these so that they reflect our current
1426 estimate for this pass. */
1427 if (flags
.base_after_vec
)
1428 rel_addr
+= insn_current_address
- insn_last_address
;
1429 if (flags
.min_after_vec
)
1430 min_addr
+= insn_current_address
- insn_last_address
;
1431 if (flags
.max_after_vec
)
1432 max_addr
+= insn_current_address
- insn_last_address
;
1433 /* We want to know the worst case, i.e. lowest possible value
1434 for the offset of MIN_LAB. If MIN_LAB is after REL_LAB,
1435 its offset is positive, and we have to be wary of code shrink;
1436 otherwise, it is negative, and we have to be vary of code
1438 if (flags
.min_after_base
)
1440 /* If INSN is between REL_LAB and MIN_LAB, the size
1441 changes we are about to make can change the alignment
1442 within the observed offset, therefore we have to break
1443 it up into two parts that are independent. */
1444 if (! flags
.base_after_vec
&& flags
.min_after_vec
)
1446 min_addr
-= align_fuzz (rel_lab
, insn
, rel_align
, 0);
1447 min_addr
-= align_fuzz (insn
, min_lab
, 0, 0);
1450 min_addr
-= align_fuzz (rel_lab
, min_lab
, rel_align
, 0);
1454 if (flags
.base_after_vec
&& ! flags
.min_after_vec
)
1456 min_addr
-= align_fuzz (min_lab
, insn
, 0, ~0);
1457 min_addr
-= align_fuzz (insn
, rel_lab
, 0, ~0);
1460 min_addr
-= align_fuzz (min_lab
, rel_lab
, 0, ~0);
1462 /* Likewise, determine the highest lowest possible value
1463 for the offset of MAX_LAB. */
1464 if (flags
.max_after_base
)
1466 if (! flags
.base_after_vec
&& flags
.max_after_vec
)
1468 max_addr
+= align_fuzz (rel_lab
, insn
, rel_align
, ~0);
1469 max_addr
+= align_fuzz (insn
, max_lab
, 0, ~0);
1472 max_addr
+= align_fuzz (rel_lab
, max_lab
, rel_align
, ~0);
1476 if (flags
.base_after_vec
&& ! flags
.max_after_vec
)
1478 max_addr
+= align_fuzz (max_lab
, insn
, 0, 0);
1479 max_addr
+= align_fuzz (insn
, rel_lab
, 0, 0);
1482 max_addr
+= align_fuzz (max_lab
, rel_lab
, 0, 0);
1484 PUT_MODE (body
, CASE_VECTOR_SHORTEN_MODE (min_addr
- rel_addr
,
1485 max_addr
- rel_addr
,
1487 if (JUMP_TABLES_IN_TEXT_SECTION
|| !HAVE_READONLY_DATA_SECTION
)
1490 = (XVECLEN (body
, 1) * GET_MODE_SIZE (GET_MODE (body
)));
1491 insn_current_address
+= insn_lengths
[uid
];
1492 if (insn_lengths
[uid
] != old_length
)
1493 something_changed
= 1;
1498 #endif /* CASE_VECTOR_SHORTEN_MODE */
1500 if (! (varying_length
[uid
]))
1502 if (GET_CODE (insn
) == INSN
1503 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
1507 body
= PATTERN (insn
);
1508 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
1510 rtx inner_insn
= XVECEXP (body
, 0, i
);
1511 int inner_uid
= INSN_UID (inner_insn
);
1513 INSN_ADDRESSES (inner_uid
) = insn_current_address
;
1515 insn_current_address
+= insn_lengths
[inner_uid
];
1519 insn_current_address
+= insn_lengths
[uid
];
1524 if (GET_CODE (insn
) == INSN
&& GET_CODE (PATTERN (insn
)) == SEQUENCE
)
1528 body
= PATTERN (insn
);
1530 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
1532 rtx inner_insn
= XVECEXP (body
, 0, i
);
1533 int inner_uid
= INSN_UID (inner_insn
);
1536 INSN_ADDRESSES (inner_uid
) = insn_current_address
;
1538 /* insn_current_length returns 0 for insns with a
1539 non-varying length. */
1540 if (! varying_length
[inner_uid
])
1541 inner_length
= insn_lengths
[inner_uid
];
1543 inner_length
= insn_current_length (inner_insn
);
1545 if (inner_length
!= insn_lengths
[inner_uid
])
1547 insn_lengths
[inner_uid
] = inner_length
;
1548 something_changed
= 1;
1550 insn_current_address
+= insn_lengths
[inner_uid
];
1551 new_length
+= inner_length
;
1556 new_length
= insn_current_length (insn
);
1557 insn_current_address
+= new_length
;
1560 #ifdef ADJUST_INSN_LENGTH
1561 /* If needed, do any adjustment. */
1562 tmp_length
= new_length
;
1563 ADJUST_INSN_LENGTH (insn
, new_length
);
1564 insn_current_address
+= (new_length
- tmp_length
);
1567 if (new_length
!= insn_lengths
[uid
])
1569 insn_lengths
[uid
] = new_length
;
1570 something_changed
= 1;
1573 /* For a non-optimizing compile, do only a single pass. */
1578 free (varying_length
);
1580 #endif /* HAVE_ATTR_length */
1583 #ifdef HAVE_ATTR_length
1584 /* Given the body of an INSN known to be generated by an ASM statement, return
1585 the number of machine instructions likely to be generated for this insn.
1586 This is used to compute its length. */
1589 asm_insn_count (body
)
1592 const char *template;
1595 if (GET_CODE (body
) == ASM_INPUT
)
1596 template = XSTR (body
, 0);
1598 template = decode_asm_operands (body
, NULL
, NULL
, NULL
, NULL
);
1600 for (; *template; template++)
1601 if (IS_ASM_LOGICAL_LINE_SEPARATOR (*template) || *template == '\n')
1608 /* Output assembler code for the start of a function,
1609 and initialize some of the variables in this file
1610 for the new function. The label for the function and associated
1611 assembler pseudo-ops have already been output in `assemble_start_function'.
1613 FIRST is the first insn of the rtl for the function being compiled.
1614 FILE is the file to write assembler code to.
1615 OPTIMIZE is nonzero if we should eliminate redundant
1616 test and compare insns. */
1619 final_start_function (first
, file
, optimize
)
1622 int optimize ATTRIBUTE_UNUSED
;
1626 this_is_asm_operands
= 0;
1628 #ifdef NON_SAVING_SETJMP
1629 /* A function that calls setjmp should save and restore all the
1630 call-saved registers on a system where longjmp clobbers them. */
1631 if (NON_SAVING_SETJMP
&& current_function_calls_setjmp
)
1635 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
1636 if (!call_used_regs
[i
])
1637 regs_ever_live
[i
] = 1;
1641 if (NOTE_LINE_NUMBER (first
) != NOTE_INSN_DELETED
)
1642 notice_source_line (first
);
1643 high_block_linenum
= high_function_linenum
= last_linenum
;
1645 (*debug_hooks
->begin_prologue
) (last_linenum
, last_filename
);
1647 #if defined (DWARF2_UNWIND_INFO) || defined (IA64_UNWIND_INFO)
1648 if (write_symbols
!= DWARF2_DEBUG
&& write_symbols
!= VMS_AND_DWARF2_DEBUG
)
1649 dwarf2out_begin_prologue (0, NULL
);
1652 #ifdef LEAF_REG_REMAP
1653 if (current_function_uses_only_leaf_regs
)
1654 leaf_renumber_regs (first
);
1657 /* The Sun386i and perhaps other machines don't work right
1658 if the profiling code comes after the prologue. */
1659 #ifdef PROFILE_BEFORE_PROLOGUE
1660 if (current_function_profile
)
1661 profile_function (file
);
1662 #endif /* PROFILE_BEFORE_PROLOGUE */
1664 #if defined (DWARF2_UNWIND_INFO) && defined (HAVE_prologue)
1665 if (dwarf2out_do_frame ())
1666 dwarf2out_frame_debug (NULL_RTX
);
1669 /* If debugging, assign block numbers to all of the blocks in this
1673 remove_unnecessary_notes ();
1674 scope_to_insns_finalize ();
1675 number_blocks (current_function_decl
);
1676 /* We never actually put out begin/end notes for the top-level
1677 block in the function. But, conceptually, that block is
1679 TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl
)) = 1;
1682 /* First output the function prologue: code to set up the stack frame. */
1683 (*targetm
.asm_out
.function_prologue
) (file
, get_frame_size ());
1685 #ifdef VMS_DEBUGGING_INFO
1686 /* Output label after the prologue of the function. */
1687 if (write_symbols
== VMS_DEBUG
|| write_symbols
== VMS_AND_DWARF2_DEBUG
)
1688 vmsdbgout_after_prologue ();
1691 /* If the machine represents the prologue as RTL, the profiling code must
1692 be emitted when NOTE_INSN_PROLOGUE_END is scanned. */
1693 #ifdef HAVE_prologue
1694 if (! HAVE_prologue
)
1696 profile_after_prologue (file
);
1700 profile_after_prologue (file
)
1701 FILE *file ATTRIBUTE_UNUSED
;
1703 #ifndef PROFILE_BEFORE_PROLOGUE
1704 if (current_function_profile
)
1705 profile_function (file
);
1706 #endif /* not PROFILE_BEFORE_PROLOGUE */
1710 profile_function (file
)
1711 FILE *file ATTRIBUTE_UNUSED
;
1713 #ifndef NO_PROFILE_COUNTERS
1714 int align
= MIN (BIGGEST_ALIGNMENT
, LONG_TYPE_SIZE
);
1716 #if defined(ASM_OUTPUT_REG_PUSH)
1717 #if defined(STRUCT_VALUE_INCOMING_REGNUM) || defined(STRUCT_VALUE_REGNUM)
1718 int sval
= current_function_returns_struct
;
1720 #if defined(STATIC_CHAIN_INCOMING_REGNUM) || defined(STATIC_CHAIN_REGNUM)
1721 int cxt
= current_function_needs_context
;
1723 #endif /* ASM_OUTPUT_REG_PUSH */
1725 #ifndef NO_PROFILE_COUNTERS
1727 ASM_OUTPUT_ALIGN (file
, floor_log2 (align
/ BITS_PER_UNIT
));
1728 ASM_OUTPUT_INTERNAL_LABEL (file
, "LP", current_function_funcdef_no
);
1729 assemble_integer (const0_rtx
, LONG_TYPE_SIZE
/ BITS_PER_UNIT
, align
, 1);
1732 function_section (current_function_decl
);
1734 #if defined(STRUCT_VALUE_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1736 ASM_OUTPUT_REG_PUSH (file
, STRUCT_VALUE_INCOMING_REGNUM
);
1738 #if defined(STRUCT_VALUE_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1741 ASM_OUTPUT_REG_PUSH (file
, STRUCT_VALUE_REGNUM
);
1746 #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1748 ASM_OUTPUT_REG_PUSH (file
, STATIC_CHAIN_INCOMING_REGNUM
);
1750 #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1753 ASM_OUTPUT_REG_PUSH (file
, STATIC_CHAIN_REGNUM
);
1758 FUNCTION_PROFILER (file
, current_function_funcdef_no
);
1760 #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1762 ASM_OUTPUT_REG_POP (file
, STATIC_CHAIN_INCOMING_REGNUM
);
1764 #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1767 ASM_OUTPUT_REG_POP (file
, STATIC_CHAIN_REGNUM
);
1772 #if defined(STRUCT_VALUE_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1774 ASM_OUTPUT_REG_POP (file
, STRUCT_VALUE_INCOMING_REGNUM
);
1776 #if defined(STRUCT_VALUE_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1779 ASM_OUTPUT_REG_POP (file
, STRUCT_VALUE_REGNUM
);
1785 /* Output assembler code for the end of a function.
1786 For clarity, args are same as those of `final_start_function'
1787 even though not all of them are needed. */
1790 final_end_function ()
1794 (*debug_hooks
->end_function
) (high_function_linenum
);
1796 /* Finally, output the function epilogue:
1797 code to restore the stack frame and return to the caller. */
1798 (*targetm
.asm_out
.function_epilogue
) (asm_out_file
, get_frame_size ());
1800 /* And debug output. */
1801 (*debug_hooks
->end_epilogue
) ();
1803 #if defined (DWARF2_UNWIND_INFO)
1804 if (write_symbols
!= DWARF2_DEBUG
&& write_symbols
!= VMS_AND_DWARF2_DEBUG
1805 && dwarf2out_do_frame ())
1806 dwarf2out_end_epilogue ();
1810 /* Output assembler code for some insns: all or part of a function.
1811 For description of args, see `final_start_function', above.
1813 PRESCAN is 1 if we are not really outputting,
1814 just scanning as if we were outputting.
1815 Prescanning deletes and rearranges insns just like ordinary output.
1816 PRESCAN is -2 if we are outputting after having prescanned.
1817 In this case, don't try to delete or rearrange insns
1818 because that has already been done.
1819 Prescanning is done only on certain machines. */
1822 final (first
, file
, optimize
, prescan
)
1832 last_ignored_compare
= 0;
1835 /* Make a map indicating which line numbers appear in this function.
1836 When producing SDB debugging info, delete troublesome line number
1837 notes from inlined functions in other files as well as duplicate
1838 line number notes. */
1839 #ifdef SDB_DEBUGGING_INFO
1840 if (write_symbols
== SDB_DEBUG
)
1843 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
1844 if (GET_CODE (insn
) == NOTE
&& NOTE_LINE_NUMBER (insn
) > 0)
1846 if ((RTX_INTEGRATED_P (insn
)
1847 && strcmp (NOTE_SOURCE_FILE (insn
), main_input_filename
) != 0)
1849 && NOTE_LINE_NUMBER (insn
) == NOTE_LINE_NUMBER (last
)
1850 && NOTE_SOURCE_FILE (insn
) == NOTE_SOURCE_FILE (last
)))
1852 delete_insn (insn
); /* Use delete_note. */
1856 if (NOTE_LINE_NUMBER (insn
) > max_line
)
1857 max_line
= NOTE_LINE_NUMBER (insn
);
1863 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
1864 if (GET_CODE (insn
) == NOTE
&& NOTE_LINE_NUMBER (insn
) > max_line
)
1865 max_line
= NOTE_LINE_NUMBER (insn
);
1868 line_note_exists
= (char *) xcalloc (max_line
+ 1, sizeof (char));
1870 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
1872 if (INSN_UID (insn
) > max_uid
) /* find largest UID */
1873 max_uid
= INSN_UID (insn
);
1874 if (GET_CODE (insn
) == NOTE
&& NOTE_LINE_NUMBER (insn
) > 0)
1875 line_note_exists
[NOTE_LINE_NUMBER (insn
)] = 1;
1877 /* If CC tracking across branches is enabled, record the insn which
1878 jumps to each branch only reached from one place. */
1879 if (optimize
&& GET_CODE (insn
) == JUMP_INSN
)
1881 rtx lab
= JUMP_LABEL (insn
);
1882 if (lab
&& LABEL_NUSES (lab
) == 1)
1884 LABEL_REFS (lab
) = insn
;
1894 /* Output the insns. */
1895 for (insn
= NEXT_INSN (first
); insn
;)
1897 #ifdef HAVE_ATTR_length
1898 if ((unsigned) INSN_UID (insn
) >= INSN_ADDRESSES_SIZE ())
1900 /* This can be triggered by bugs elsewhere in the compiler if
1901 new insns are created after init_insn_lengths is called. */
1902 if (GET_CODE (insn
) == NOTE
)
1903 insn_current_address
= -1;
1908 insn_current_address
= INSN_ADDRESSES (INSN_UID (insn
));
1909 #endif /* HAVE_ATTR_length */
1911 insn
= final_scan_insn (insn
, file
, optimize
, prescan
, 0);
1914 /* Store function names for edge-profiling. */
1915 /* ??? Probably should re-use the existing struct function. */
1917 if (cfun
->arc_profile
)
1919 struct function_list
*new_item
= xmalloc (sizeof (struct function_list
));
1921 *functions_tail
= new_item
;
1922 functions_tail
= &new_item
->next
;
1925 new_item
->name
= xstrdup (current_function_name
);
1926 new_item
->cfg_checksum
= profile_info
.current_function_cfg_checksum
;
1927 new_item
->count_edges
= profile_info
.count_edges_instrumented_now
;
1930 free (line_note_exists
);
1931 line_note_exists
= NULL
;
1935 get_insn_template (code
, insn
)
1939 const void *output
= insn_data
[code
].output
;
1940 switch (insn_data
[code
].output_format
)
1942 case INSN_OUTPUT_FORMAT_SINGLE
:
1943 return (const char *) output
;
1944 case INSN_OUTPUT_FORMAT_MULTI
:
1945 return ((const char *const *) output
)[which_alternative
];
1946 case INSN_OUTPUT_FORMAT_FUNCTION
:
1949 return (*(insn_output_fn
) output
) (recog_data
.operand
, insn
);
1956 /* Emit the appropriate declaration for an alternate-entry-point
1957 symbol represented by INSN, to FILE. INSN is a CODE_LABEL with
1958 LABEL_KIND != LABEL_NORMAL.
1960 The case fall-through in this function is intentional. */
1962 output_alternate_entry_point (file
, insn
)
1966 const char *name
= LABEL_NAME (insn
);
1968 switch (LABEL_KIND (insn
))
1970 case LABEL_WEAK_ENTRY
:
1971 #ifdef ASM_WEAKEN_LABEL
1972 ASM_WEAKEN_LABEL (file
, name
);
1974 case LABEL_GLOBAL_ENTRY
:
1975 ASM_GLOBALIZE_LABEL (file
, name
);
1976 case LABEL_STATIC_ENTRY
:
1977 #ifdef ASM_OUTPUT_TYPE_DIRECTIVE
1978 ASM_OUTPUT_TYPE_DIRECTIVE (file
, name
, "function");
1980 ASM_OUTPUT_LABEL (file
, name
);
1989 /* The final scan for one insn, INSN.
1990 Args are same as in `final', except that INSN
1991 is the insn being scanned.
1992 Value returned is the next insn to be scanned.
1994 NOPEEPHOLES is the flag to disallow peephole processing (currently
1995 used for within delayed branch sequence output). */
1998 final_scan_insn (insn
, file
, optimize
, prescan
, nopeepholes
)
2001 int optimize ATTRIBUTE_UNUSED
;
2003 int nopeepholes ATTRIBUTE_UNUSED
;
2011 /* Ignore deleted insns. These can occur when we split insns (due to a
2012 template of "#") while not optimizing. */
2013 if (INSN_DELETED_P (insn
))
2014 return NEXT_INSN (insn
);
2016 switch (GET_CODE (insn
))
2022 switch (NOTE_LINE_NUMBER (insn
))
2024 case NOTE_INSN_DELETED
:
2025 case NOTE_INSN_LOOP_BEG
:
2026 case NOTE_INSN_LOOP_END
:
2027 case NOTE_INSN_LOOP_END_TOP_COND
:
2028 case NOTE_INSN_LOOP_CONT
:
2029 case NOTE_INSN_LOOP_VTOP
:
2030 case NOTE_INSN_FUNCTION_END
:
2031 case NOTE_INSN_REPEATED_LINE_NUMBER
:
2032 case NOTE_INSN_EXPECTED_VALUE
:
2035 case NOTE_INSN_BASIC_BLOCK
:
2036 #ifdef IA64_UNWIND_INFO
2037 IA64_UNWIND_EMIT (asm_out_file
, insn
);
2040 fprintf (asm_out_file
, "\t%s basic block %d\n",
2041 ASM_COMMENT_START
, NOTE_BASIC_BLOCK (insn
)->index
);
2044 case NOTE_INSN_EH_REGION_BEG
:
2045 ASM_OUTPUT_DEBUG_LABEL (asm_out_file
, "LEHB",
2046 NOTE_EH_HANDLER (insn
));
2049 case NOTE_INSN_EH_REGION_END
:
2050 ASM_OUTPUT_DEBUG_LABEL (asm_out_file
, "LEHE",
2051 NOTE_EH_HANDLER (insn
));
2054 case NOTE_INSN_PROLOGUE_END
:
2055 (*targetm
.asm_out
.function_end_prologue
) (file
);
2056 profile_after_prologue (file
);
2059 case NOTE_INSN_EPILOGUE_BEG
:
2060 (*targetm
.asm_out
.function_begin_epilogue
) (file
);
2063 case NOTE_INSN_FUNCTION_BEG
:
2065 (*debug_hooks
->end_prologue
) (last_linenum
);
2068 case NOTE_INSN_BLOCK_BEG
:
2069 if (debug_info_level
== DINFO_LEVEL_NORMAL
2070 || debug_info_level
== DINFO_LEVEL_VERBOSE
2071 || write_symbols
== DWARF_DEBUG
2072 || write_symbols
== DWARF2_DEBUG
2073 || write_symbols
== VMS_AND_DWARF2_DEBUG
2074 || write_symbols
== VMS_DEBUG
)
2076 int n
= BLOCK_NUMBER (NOTE_BLOCK (insn
));
2080 high_block_linenum
= last_linenum
;
2082 /* Output debugging info about the symbol-block beginning. */
2083 (*debug_hooks
->begin_block
) (last_linenum
, n
);
2085 /* Mark this block as output. */
2086 TREE_ASM_WRITTEN (NOTE_BLOCK (insn
)) = 1;
2090 case NOTE_INSN_BLOCK_END
:
2091 if (debug_info_level
== DINFO_LEVEL_NORMAL
2092 || debug_info_level
== DINFO_LEVEL_VERBOSE
2093 || write_symbols
== DWARF_DEBUG
2094 || write_symbols
== DWARF2_DEBUG
2095 || write_symbols
== VMS_AND_DWARF2_DEBUG
2096 || write_symbols
== VMS_DEBUG
)
2098 int n
= BLOCK_NUMBER (NOTE_BLOCK (insn
));
2102 /* End of a symbol-block. */
2104 if (block_depth
< 0)
2107 (*debug_hooks
->end_block
) (high_block_linenum
, n
);
2111 case NOTE_INSN_DELETED_LABEL
:
2112 /* Emit the label. We may have deleted the CODE_LABEL because
2113 the label could be proved to be unreachable, though still
2114 referenced (in the form of having its address taken. */
2115 ASM_OUTPUT_DEBUG_LABEL (file
, "L", CODE_LABEL_NUMBER (insn
));
2122 if (NOTE_LINE_NUMBER (insn
) <= 0)
2125 /* This note is a line-number. */
2130 /* If there is anything real after this note, output it.
2131 If another line note follows, omit this one. */
2132 for (note
= NEXT_INSN (insn
); note
; note
= NEXT_INSN (note
))
2134 if (GET_CODE (note
) != NOTE
&& GET_CODE (note
) != CODE_LABEL
)
2137 /* These types of notes can be significant
2138 so make sure the preceding line number stays. */
2139 else if (GET_CODE (note
) == NOTE
2140 && (NOTE_LINE_NUMBER (note
) == NOTE_INSN_BLOCK_BEG
2141 || NOTE_LINE_NUMBER (note
) == NOTE_INSN_BLOCK_END
2142 || NOTE_LINE_NUMBER (note
) == NOTE_INSN_FUNCTION_BEG
))
2144 else if (GET_CODE (note
) == NOTE
&& NOTE_LINE_NUMBER (note
) > 0)
2146 /* Another line note follows; we can delete this note
2147 if no intervening line numbers have notes elsewhere. */
2149 for (num
= NOTE_LINE_NUMBER (insn
) + 1;
2150 num
< NOTE_LINE_NUMBER (note
);
2152 if (line_note_exists
[num
])
2155 if (num
>= NOTE_LINE_NUMBER (note
))
2161 /* Output this line note if it is the first or the last line
2165 notice_source_line (insn
);
2166 (*debug_hooks
->source_line
) (last_linenum
, last_filename
);
2174 #if defined (DWARF2_UNWIND_INFO)
2175 if (dwarf2out_do_frame ())
2176 dwarf2out_frame_debug (insn
);
2181 /* The target port might emit labels in the output function for
2182 some insn, e.g. sh.c output_branchy_insn. */
2183 if (CODE_LABEL_NUMBER (insn
) <= max_labelno
)
2185 int align
= LABEL_TO_ALIGNMENT (insn
);
2186 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2187 int max_skip
= LABEL_TO_MAX_SKIP (insn
);
2190 if (align
&& NEXT_INSN (insn
))
2192 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2193 ASM_OUTPUT_MAX_SKIP_ALIGN (file
, align
, max_skip
);
2195 ASM_OUTPUT_ALIGN (file
, align
);
2201 /* If this label is reached from only one place, set the condition
2202 codes from the instruction just before the branch. */
2204 /* Disabled because some insns set cc_status in the C output code
2205 and NOTICE_UPDATE_CC alone can set incorrect status. */
2206 if (0 /* optimize && LABEL_NUSES (insn) == 1*/)
2208 rtx jump
= LABEL_REFS (insn
);
2209 rtx barrier
= prev_nonnote_insn (insn
);
2211 /* If the LABEL_REFS field of this label has been set to point
2212 at a branch, the predecessor of the branch is a regular
2213 insn, and that branch is the only way to reach this label,
2214 set the condition codes based on the branch and its
2216 if (barrier
&& GET_CODE (barrier
) == BARRIER
2217 && jump
&& GET_CODE (jump
) == JUMP_INSN
2218 && (prev
= prev_nonnote_insn (jump
))
2219 && GET_CODE (prev
) == INSN
)
2221 NOTICE_UPDATE_CC (PATTERN (prev
), prev
);
2222 NOTICE_UPDATE_CC (PATTERN (jump
), jump
);
2230 #ifdef FINAL_PRESCAN_LABEL
2231 FINAL_PRESCAN_INSN (insn
, NULL
, 0);
2234 if (LABEL_NAME (insn
))
2235 (*debug_hooks
->label
) (insn
);
2239 fputs (ASM_APP_OFF
, file
);
2242 if (NEXT_INSN (insn
) != 0
2243 && GET_CODE (NEXT_INSN (insn
)) == JUMP_INSN
)
2245 rtx nextbody
= PATTERN (NEXT_INSN (insn
));
2247 /* If this label is followed by a jump-table,
2248 make sure we put the label in the read-only section. Also
2249 possibly write the label and jump table together. */
2251 if (GET_CODE (nextbody
) == ADDR_VEC
2252 || GET_CODE (nextbody
) == ADDR_DIFF_VEC
)
2254 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2255 /* In this case, the case vector is being moved by the
2256 target, so don't output the label at all. Leave that
2257 to the back end macros. */
2259 if (! JUMP_TABLES_IN_TEXT_SECTION
)
2263 readonly_data_section ();
2265 #ifdef ADDR_VEC_ALIGN
2266 log_align
= ADDR_VEC_ALIGN (NEXT_INSN (insn
));
2268 log_align
= exact_log2 (BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
);
2270 ASM_OUTPUT_ALIGN (file
, log_align
);
2273 function_section (current_function_decl
);
2275 #ifdef ASM_OUTPUT_CASE_LABEL
2276 ASM_OUTPUT_CASE_LABEL (file
, "L", CODE_LABEL_NUMBER (insn
),
2279 ASM_OUTPUT_INTERNAL_LABEL (file
, "L", CODE_LABEL_NUMBER (insn
));
2285 if (LABEL_ALT_ENTRY_P (insn
))
2286 output_alternate_entry_point (file
, insn
);
2288 ASM_OUTPUT_INTERNAL_LABEL (file
, "L", CODE_LABEL_NUMBER (insn
));
2293 rtx body
= PATTERN (insn
);
2294 int insn_code_number
;
2295 const char *template;
2298 /* An INSN, JUMP_INSN or CALL_INSN.
2299 First check for special kinds that recog doesn't recognize. */
2301 if (GET_CODE (body
) == USE
/* These are just declarations */
2302 || GET_CODE (body
) == CLOBBER
)
2306 /* If there is a REG_CC_SETTER note on this insn, it means that
2307 the setting of the condition code was done in the delay slot
2308 of the insn that branched here. So recover the cc status
2309 from the insn that set it. */
2311 note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
2314 NOTICE_UPDATE_CC (PATTERN (XEXP (note
, 0)), XEXP (note
, 0));
2315 cc_prev_status
= cc_status
;
2319 /* Detect insns that are really jump-tables
2320 and output them as such. */
2322 if (GET_CODE (body
) == ADDR_VEC
|| GET_CODE (body
) == ADDR_DIFF_VEC
)
2324 #if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC))
2333 fputs (ASM_APP_OFF
, file
);
2337 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2338 if (GET_CODE (body
) == ADDR_VEC
)
2340 #ifdef ASM_OUTPUT_ADDR_VEC
2341 ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn
), body
);
2348 #ifdef ASM_OUTPUT_ADDR_DIFF_VEC
2349 ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn
), body
);
2355 vlen
= XVECLEN (body
, GET_CODE (body
) == ADDR_DIFF_VEC
);
2356 for (idx
= 0; idx
< vlen
; idx
++)
2358 if (GET_CODE (body
) == ADDR_VEC
)
2360 #ifdef ASM_OUTPUT_ADDR_VEC_ELT
2361 ASM_OUTPUT_ADDR_VEC_ELT
2362 (file
, CODE_LABEL_NUMBER (XEXP (XVECEXP (body
, 0, idx
), 0)));
2369 #ifdef ASM_OUTPUT_ADDR_DIFF_ELT
2370 ASM_OUTPUT_ADDR_DIFF_ELT
2373 CODE_LABEL_NUMBER (XEXP (XVECEXP (body
, 1, idx
), 0)),
2374 CODE_LABEL_NUMBER (XEXP (XEXP (body
, 0), 0)));
2380 #ifdef ASM_OUTPUT_CASE_END
2381 ASM_OUTPUT_CASE_END (file
,
2382 CODE_LABEL_NUMBER (PREV_INSN (insn
)),
2387 function_section (current_function_decl
);
2392 if (GET_CODE (body
) == ASM_INPUT
)
2394 const char *string
= XSTR (body
, 0);
2396 /* There's no telling what that did to the condition codes. */
2405 fputs (ASM_APP_ON
, file
);
2408 fprintf (asm_out_file
, "\t%s\n", string
);
2413 /* Detect `asm' construct with operands. */
2414 if (asm_noperands (body
) >= 0)
2416 unsigned int noperands
= asm_noperands (body
);
2417 rtx
*ops
= (rtx
*) alloca (noperands
* sizeof (rtx
));
2420 /* There's no telling what that did to the condition codes. */
2425 /* Get out the operand values. */
2426 string
= decode_asm_operands (body
, ops
, NULL
, NULL
, NULL
);
2427 /* Inhibit aborts on what would otherwise be compiler bugs. */
2428 insn_noperands
= noperands
;
2429 this_is_asm_operands
= insn
;
2431 /* Output the insn using them. */
2436 fputs (ASM_APP_ON
, file
);
2439 output_asm_insn (string
, ops
);
2442 this_is_asm_operands
= 0;
2446 if (prescan
<= 0 && app_on
)
2448 fputs (ASM_APP_OFF
, file
);
2452 if (GET_CODE (body
) == SEQUENCE
)
2454 /* A delayed-branch sequence */
2460 final_sequence
= body
;
2462 /* The first insn in this SEQUENCE might be a JUMP_INSN that will
2463 force the restoration of a comparison that was previously
2464 thought unnecessary. If that happens, cancel this sequence
2465 and cause that insn to be restored. */
2467 next
= final_scan_insn (XVECEXP (body
, 0, 0), file
, 0, prescan
, 1);
2468 if (next
!= XVECEXP (body
, 0, 1))
2474 for (i
= 1; i
< XVECLEN (body
, 0); i
++)
2476 rtx insn
= XVECEXP (body
, 0, i
);
2477 rtx next
= NEXT_INSN (insn
);
2478 /* We loop in case any instruction in a delay slot gets
2481 insn
= final_scan_insn (insn
, file
, 0, prescan
, 1);
2482 while (insn
!= next
);
2484 #ifdef DBR_OUTPUT_SEQEND
2485 DBR_OUTPUT_SEQEND (file
);
2489 /* If the insn requiring the delay slot was a CALL_INSN, the
2490 insns in the delay slot are actually executed before the
2491 called function. Hence we don't preserve any CC-setting
2492 actions in these insns and the CC must be marked as being
2493 clobbered by the function. */
2494 if (GET_CODE (XVECEXP (body
, 0, 0)) == CALL_INSN
)
2501 /* We have a real machine instruction as rtl. */
2503 body
= PATTERN (insn
);
2506 set
= single_set (insn
);
2508 /* Check for redundant test and compare instructions
2509 (when the condition codes are already set up as desired).
2510 This is done only when optimizing; if not optimizing,
2511 it should be possible for the user to alter a variable
2512 with the debugger in between statements
2513 and the next statement should reexamine the variable
2514 to compute the condition codes. */
2519 rtx set
= single_set (insn
);
2523 && GET_CODE (SET_DEST (set
)) == CC0
2524 && insn
!= last_ignored_compare
)
2526 if (GET_CODE (SET_SRC (set
)) == SUBREG
)
2527 SET_SRC (set
) = alter_subreg (&SET_SRC (set
));
2528 else if (GET_CODE (SET_SRC (set
)) == COMPARE
)
2530 if (GET_CODE (XEXP (SET_SRC (set
), 0)) == SUBREG
)
2531 XEXP (SET_SRC (set
), 0)
2532 = alter_subreg (&XEXP (SET_SRC (set
), 0));
2533 if (GET_CODE (XEXP (SET_SRC (set
), 1)) == SUBREG
)
2534 XEXP (SET_SRC (set
), 1)
2535 = alter_subreg (&XEXP (SET_SRC (set
), 1));
2537 if ((cc_status
.value1
!= 0
2538 && rtx_equal_p (SET_SRC (set
), cc_status
.value1
))
2539 || (cc_status
.value2
!= 0
2540 && rtx_equal_p (SET_SRC (set
), cc_status
.value2
)))
2542 /* Don't delete insn if it has an addressing side-effect. */
2543 if (! FIND_REG_INC_NOTE (insn
, NULL_RTX
)
2544 /* or if anything in it is volatile. */
2545 && ! volatile_refs_p (PATTERN (insn
)))
2547 /* We don't really delete the insn; just ignore it. */
2548 last_ignored_compare
= insn
;
2557 /* Don't bother outputting obvious no-ops, even without -O.
2558 This optimization is fast and doesn't interfere with debugging.
2559 Don't do this if the insn is in a delay slot, since this
2560 will cause an improper number of delay insns to be written. */
2561 if (final_sequence
== 0
2563 && GET_CODE (insn
) == INSN
&& GET_CODE (body
) == SET
2564 && GET_CODE (SET_SRC (body
)) == REG
2565 && GET_CODE (SET_DEST (body
)) == REG
2566 && REGNO (SET_SRC (body
)) == REGNO (SET_DEST (body
)))
2571 /* If this is a conditional branch, maybe modify it
2572 if the cc's are in a nonstandard state
2573 so that it accomplishes the same thing that it would
2574 do straightforwardly if the cc's were set up normally. */
2576 if (cc_status
.flags
!= 0
2577 && GET_CODE (insn
) == JUMP_INSN
2578 && GET_CODE (body
) == SET
2579 && SET_DEST (body
) == pc_rtx
2580 && GET_CODE (SET_SRC (body
)) == IF_THEN_ELSE
2581 && GET_RTX_CLASS (GET_CODE (XEXP (SET_SRC (body
), 0))) == '<'
2582 && XEXP (XEXP (SET_SRC (body
), 0), 0) == cc0_rtx
2583 /* This is done during prescan; it is not done again
2584 in final scan when prescan has been done. */
2587 /* This function may alter the contents of its argument
2588 and clear some of the cc_status.flags bits.
2589 It may also return 1 meaning condition now always true
2590 or -1 meaning condition now always false
2591 or 2 meaning condition nontrivial but altered. */
2592 int result
= alter_cond (XEXP (SET_SRC (body
), 0));
2593 /* If condition now has fixed value, replace the IF_THEN_ELSE
2594 with its then-operand or its else-operand. */
2596 SET_SRC (body
) = XEXP (SET_SRC (body
), 1);
2598 SET_SRC (body
) = XEXP (SET_SRC (body
), 2);
2600 /* The jump is now either unconditional or a no-op.
2601 If it has become a no-op, don't try to output it.
2602 (It would not be recognized.) */
2603 if (SET_SRC (body
) == pc_rtx
)
2608 else if (GET_CODE (SET_SRC (body
)) == RETURN
)
2609 /* Replace (set (pc) (return)) with (return). */
2610 PATTERN (insn
) = body
= SET_SRC (body
);
2612 /* Rerecognize the instruction if it has changed. */
2614 INSN_CODE (insn
) = -1;
2617 /* Make same adjustments to instructions that examine the
2618 condition codes without jumping and instructions that
2619 handle conditional moves (if this machine has either one). */
2621 if (cc_status
.flags
!= 0
2624 rtx cond_rtx
, then_rtx
, else_rtx
;
2626 if (GET_CODE (insn
) != JUMP_INSN
2627 && GET_CODE (SET_SRC (set
)) == IF_THEN_ELSE
)
2629 cond_rtx
= XEXP (SET_SRC (set
), 0);
2630 then_rtx
= XEXP (SET_SRC (set
), 1);
2631 else_rtx
= XEXP (SET_SRC (set
), 2);
2635 cond_rtx
= SET_SRC (set
);
2636 then_rtx
= const_true_rtx
;
2637 else_rtx
= const0_rtx
;
2640 switch (GET_CODE (cond_rtx
))
2654 if (XEXP (cond_rtx
, 0) != cc0_rtx
)
2656 result
= alter_cond (cond_rtx
);
2658 validate_change (insn
, &SET_SRC (set
), then_rtx
, 0);
2659 else if (result
== -1)
2660 validate_change (insn
, &SET_SRC (set
), else_rtx
, 0);
2661 else if (result
== 2)
2662 INSN_CODE (insn
) = -1;
2663 if (SET_DEST (set
) == SET_SRC (set
))
2675 #ifdef HAVE_peephole
2676 /* Do machine-specific peephole optimizations if desired. */
2678 if (optimize
&& !flag_no_peephole
&& !nopeepholes
)
2680 rtx next
= peephole (insn
);
2681 /* When peepholing, if there were notes within the peephole,
2682 emit them before the peephole. */
2683 if (next
!= 0 && next
!= NEXT_INSN (insn
))
2685 rtx prev
= PREV_INSN (insn
);
2687 for (note
= NEXT_INSN (insn
); note
!= next
;
2688 note
= NEXT_INSN (note
))
2689 final_scan_insn (note
, file
, optimize
, prescan
, nopeepholes
);
2691 /* In case this is prescan, put the notes
2692 in proper position for later rescan. */
2693 note
= NEXT_INSN (insn
);
2694 PREV_INSN (note
) = prev
;
2695 NEXT_INSN (prev
) = note
;
2696 NEXT_INSN (PREV_INSN (next
)) = insn
;
2697 PREV_INSN (insn
) = PREV_INSN (next
);
2698 NEXT_INSN (insn
) = next
;
2699 PREV_INSN (next
) = insn
;
2702 /* PEEPHOLE might have changed this. */
2703 body
= PATTERN (insn
);
2707 /* Try to recognize the instruction.
2708 If successful, verify that the operands satisfy the
2709 constraints for the instruction. Crash if they don't,
2710 since `reload' should have changed them so that they do. */
2712 insn_code_number
= recog_memoized (insn
);
2713 cleanup_subreg_operands (insn
);
2715 /* Dump the insn in the assembly for debugging. */
2716 if (flag_dump_rtl_in_asm
)
2718 print_rtx_head
= ASM_COMMENT_START
;
2719 print_rtl_single (asm_out_file
, insn
);
2720 print_rtx_head
= "";
2723 if (! constrain_operands_cached (1))
2724 fatal_insn_not_found (insn
);
2726 /* Some target machines need to prescan each insn before
2729 #ifdef FINAL_PRESCAN_INSN
2730 FINAL_PRESCAN_INSN (insn
, recog_data
.operand
, recog_data
.n_operands
);
2733 #ifdef HAVE_conditional_execution
2734 if (GET_CODE (PATTERN (insn
)) == COND_EXEC
)
2735 current_insn_predicate
= COND_EXEC_TEST (PATTERN (insn
));
2737 current_insn_predicate
= NULL_RTX
;
2741 cc_prev_status
= cc_status
;
2743 /* Update `cc_status' for this instruction.
2744 The instruction's output routine may change it further.
2745 If the output routine for a jump insn needs to depend
2746 on the cc status, it should look at cc_prev_status. */
2748 NOTICE_UPDATE_CC (body
, insn
);
2751 current_output_insn
= debug_insn
= insn
;
2753 #if defined (DWARF2_UNWIND_INFO)
2754 if (GET_CODE (insn
) == CALL_INSN
&& dwarf2out_do_frame ())
2755 dwarf2out_frame_debug (insn
);
2758 /* Find the proper template for this insn. */
2759 template = get_insn_template (insn_code_number
, insn
);
2761 /* If the C code returns 0, it means that it is a jump insn
2762 which follows a deleted test insn, and that test insn
2763 needs to be reinserted. */
2768 if (prev_nonnote_insn (insn
) != last_ignored_compare
)
2772 /* We have already processed the notes between the setter and
2773 the user. Make sure we don't process them again, this is
2774 particularly important if one of the notes is a block
2775 scope note or an EH note. */
2777 prev
!= last_ignored_compare
;
2778 prev
= PREV_INSN (prev
))
2780 if (GET_CODE (prev
) == NOTE
)
2781 delete_insn (prev
); /* Use delete_note. */
2787 /* If the template is the string "#", it means that this insn must
2789 if (template[0] == '#' && template[1] == '\0')
2791 rtx
new = try_split (body
, insn
, 0);
2793 /* If we didn't split the insn, go away. */
2794 if (new == insn
&& PATTERN (new) == body
)
2795 fatal_insn ("could not split insn", insn
);
2797 #ifdef HAVE_ATTR_length
2798 /* This instruction should have been split in shorten_branches,
2799 to ensure that we would have valid length info for the
2811 #ifdef IA64_UNWIND_INFO
2812 IA64_UNWIND_EMIT (asm_out_file
, insn
);
2814 /* Output assembler code from the template. */
2816 output_asm_insn (template, recog_data
.operand
);
2818 #if defined (DWARF2_UNWIND_INFO)
2819 #if defined (HAVE_prologue)
2820 if (GET_CODE (insn
) == INSN
&& dwarf2out_do_frame ())
2821 dwarf2out_frame_debug (insn
);
2823 if (!ACCUMULATE_OUTGOING_ARGS
2824 && GET_CODE (insn
) == INSN
2825 && dwarf2out_do_frame ())
2826 dwarf2out_frame_debug (insn
);
2831 /* It's not at all clear why we did this and doing so interferes
2832 with tests we'd like to do to use REG_WAS_0 notes, so let's try
2835 /* Mark this insn as having been output. */
2836 INSN_DELETED_P (insn
) = 1;
2839 /* Emit information for vtable gc. */
2840 note
= find_reg_note (insn
, REG_VTABLE_REF
, NULL_RTX
);
2842 assemble_vtable_entry (XEXP (XEXP (note
, 0), 0),
2843 INTVAL (XEXP (XEXP (note
, 0), 1)));
2845 current_output_insn
= debug_insn
= 0;
2848 return NEXT_INSN (insn
);
2851 /* Output debugging info to the assembler file FILE
2852 based on the NOTE-insn INSN, assumed to be a line number. */
2855 notice_source_line (insn
)
2858 const char *filename
= NOTE_SOURCE_FILE (insn
);
2860 last_filename
= filename
;
2861 last_linenum
= NOTE_LINE_NUMBER (insn
);
2862 high_block_linenum
= MAX (last_linenum
, high_block_linenum
);
2863 high_function_linenum
= MAX (last_linenum
, high_function_linenum
);
2866 /* For each operand in INSN, simplify (subreg (reg)) so that it refers
2867 directly to the desired hard register. */
2870 cleanup_subreg_operands (insn
)
2874 extract_insn_cached (insn
);
2875 for (i
= 0; i
< recog_data
.n_operands
; i
++)
2877 /* The following test cannot use recog_data.operand when tesing
2878 for a SUBREG: the underlying object might have been changed
2879 already if we are inside a match_operator expression that
2880 matches the else clause. Instead we test the underlying
2881 expression directly. */
2882 if (GET_CODE (*recog_data
.operand_loc
[i
]) == SUBREG
)
2883 recog_data
.operand
[i
] = alter_subreg (recog_data
.operand_loc
[i
]);
2884 else if (GET_CODE (recog_data
.operand
[i
]) == PLUS
2885 || GET_CODE (recog_data
.operand
[i
]) == MULT
2886 || GET_CODE (recog_data
.operand
[i
]) == MEM
)
2887 recog_data
.operand
[i
] = walk_alter_subreg (recog_data
.operand_loc
[i
]);
2890 for (i
= 0; i
< recog_data
.n_dups
; i
++)
2892 if (GET_CODE (*recog_data
.dup_loc
[i
]) == SUBREG
)
2893 *recog_data
.dup_loc
[i
] = alter_subreg (recog_data
.dup_loc
[i
]);
2894 else if (GET_CODE (*recog_data
.dup_loc
[i
]) == PLUS
2895 || GET_CODE (*recog_data
.dup_loc
[i
]) == MULT
2896 || GET_CODE (*recog_data
.dup_loc
[i
]) == MEM
)
2897 *recog_data
.dup_loc
[i
] = walk_alter_subreg (recog_data
.dup_loc
[i
]);
2901 /* If X is a SUBREG, replace it with a REG or a MEM,
2902 based on the thing it is a subreg of. */
2909 rtx y
= SUBREG_REG (x
);
2911 /* simplify_subreg does not remove subreg from volatile references.
2912 We are required to. */
2913 if (GET_CODE (y
) == MEM
)
2914 *xp
= adjust_address (y
, GET_MODE (x
), SUBREG_BYTE (x
));
2917 rtx
new = simplify_subreg (GET_MODE (x
), y
, GET_MODE (y
),
2922 /* Simplify_subreg can't handle some REG cases, but we have to. */
2923 else if (GET_CODE (y
) == REG
)
2925 unsigned int regno
= subreg_hard_regno (x
, 1);
2928 ORIGINAL_REGNO (x
) = ORIGINAL_REGNO (y
);
2929 /* This field has a different meaning for REGs and SUBREGs. Make
2930 sure to clear it! */
2931 RTX_FLAG (x
, used
) = 0;
2940 /* Do alter_subreg on all the SUBREGs contained in X. */
2943 walk_alter_subreg (xp
)
2947 switch (GET_CODE (x
))
2951 XEXP (x
, 0) = walk_alter_subreg (&XEXP (x
, 0));
2952 XEXP (x
, 1) = walk_alter_subreg (&XEXP (x
, 1));
2956 XEXP (x
, 0) = walk_alter_subreg (&XEXP (x
, 0));
2960 return alter_subreg (xp
);
2971 /* Given BODY, the body of a jump instruction, alter the jump condition
2972 as required by the bits that are set in cc_status.flags.
2973 Not all of the bits there can be handled at this level in all cases.
2975 The value is normally 0.
2976 1 means that the condition has become always true.
2977 -1 means that the condition has become always false.
2978 2 means that COND has been altered. */
2986 if (cc_status
.flags
& CC_REVERSED
)
2989 PUT_CODE (cond
, swap_condition (GET_CODE (cond
)));
2992 if (cc_status
.flags
& CC_INVERTED
)
2995 PUT_CODE (cond
, reverse_condition (GET_CODE (cond
)));
2998 if (cc_status
.flags
& CC_NOT_POSITIVE
)
2999 switch (GET_CODE (cond
))
3004 /* Jump becomes unconditional. */
3010 /* Jump becomes no-op. */
3014 PUT_CODE (cond
, EQ
);
3019 PUT_CODE (cond
, NE
);
3027 if (cc_status
.flags
& CC_NOT_NEGATIVE
)
3028 switch (GET_CODE (cond
))
3032 /* Jump becomes unconditional. */
3037 /* Jump becomes no-op. */
3042 PUT_CODE (cond
, EQ
);
3048 PUT_CODE (cond
, NE
);
3056 if (cc_status
.flags
& CC_NO_OVERFLOW
)
3057 switch (GET_CODE (cond
))
3060 /* Jump becomes unconditional. */
3064 PUT_CODE (cond
, EQ
);
3069 PUT_CODE (cond
, NE
);
3074 /* Jump becomes no-op. */
3081 if (cc_status
.flags
& (CC_Z_IN_NOT_N
| CC_Z_IN_N
))
3082 switch (GET_CODE (cond
))
3088 PUT_CODE (cond
, cc_status
.flags
& CC_Z_IN_N
? GE
: LT
);
3093 PUT_CODE (cond
, cc_status
.flags
& CC_Z_IN_N
? LT
: GE
);
3098 if (cc_status
.flags
& CC_NOT_SIGNED
)
3099 /* The flags are valid if signed condition operators are converted
3101 switch (GET_CODE (cond
))
3104 PUT_CODE (cond
, LEU
);
3109 PUT_CODE (cond
, LTU
);
3114 PUT_CODE (cond
, GTU
);
3119 PUT_CODE (cond
, GEU
);
3131 /* Report inconsistency between the assembler template and the operands.
3132 In an `asm', it's the user's fault; otherwise, the compiler's fault. */
3135 output_operand_lossage
VPARAMS ((const char *msgid
, ...))
3139 const char *pfx_str
;
3140 VA_OPEN (ap
, msgid
);
3141 VA_FIXEDARG (ap
, const char *, msgid
);
3143 pfx_str
= this_is_asm_operands
? _("invalid `asm': ") : "output_operand: ";
3144 asprintf (&fmt_string
, "%s%s", pfx_str
, _(msgid
));
3145 vasprintf (&new_message
, fmt_string
, ap
);
3147 if (this_is_asm_operands
)
3148 error_for_asm (this_is_asm_operands
, "%s", new_message
);
3150 internal_error ("%s", new_message
);
3157 /* Output of assembler code from a template, and its subroutines. */
3159 /* Annotate the assembly with a comment describing the pattern and
3160 alternative used. */
3167 int num
= INSN_CODE (debug_insn
);
3168 fprintf (asm_out_file
, "\t%s %d\t%s",
3169 ASM_COMMENT_START
, INSN_UID (debug_insn
),
3170 insn_data
[num
].name
);
3171 if (insn_data
[num
].n_alternatives
> 1)
3172 fprintf (asm_out_file
, "/%d", which_alternative
+ 1);
3173 #ifdef HAVE_ATTR_length
3174 fprintf (asm_out_file
, "\t[length = %d]",
3175 get_attr_length (debug_insn
));
3177 /* Clear this so only the first assembler insn
3178 of any rtl insn will get the special comment for -dp. */
3183 /* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it
3184 or its address, return that expr . Set *PADDRESSP to 1 if the expr
3185 corresponds to the address of the object and 0 if to the object. */
3188 get_mem_expr_from_op (op
, paddressp
)
3200 if (GET_CODE (op
) == REG
&& ORIGINAL_REGNO (op
) >= FIRST_PSEUDO_REGISTER
)
3201 return REGNO_DECL (ORIGINAL_REGNO (op
));
3202 else if (GET_CODE (op
) != MEM
)
3205 if (MEM_EXPR (op
) != 0)
3206 return MEM_EXPR (op
);
3208 /* Otherwise we have an address, so indicate it and look at the address. */
3212 /* First check if we have a decl for the address, then look at the right side
3213 if it is a PLUS. Otherwise, strip off arithmetic and keep looking.
3214 But don't allow the address to itself be indirect. */
3215 if ((expr
= get_mem_expr_from_op (op
, &inner_addressp
)) && ! inner_addressp
)
3217 else if (GET_CODE (op
) == PLUS
3218 && (expr
= get_mem_expr_from_op (XEXP (op
, 1), &inner_addressp
)))
3221 while (GET_RTX_CLASS (GET_CODE (op
)) == '1'
3222 || GET_RTX_CLASS (GET_CODE (op
)) == '2')
3225 expr
= get_mem_expr_from_op (op
, &inner_addressp
);
3226 return inner_addressp
? 0 : expr
;
3229 /* Output operand names for assembler instructions. OPERANDS is the
3230 operand vector, OPORDER is the order to write the operands, and NOPS
3231 is the number of operands to write. */
3234 output_asm_operand_names (operands
, oporder
, nops
)
3242 for (i
= 0; i
< nops
; i
++)
3245 tree expr
= get_mem_expr_from_op (operands
[oporder
[i
]], &addressp
);
3249 fprintf (asm_out_file
, "%c%s %s",
3250 wrote
? ',' : '\t', wrote
? "" : ASM_COMMENT_START
,
3251 addressp
? "*" : "");
3252 print_mem_expr (asm_out_file
, expr
);
3258 /* Output text from TEMPLATE to the assembler output file,
3259 obeying %-directions to substitute operands taken from
3260 the vector OPERANDS.
3262 %N (for N a digit) means print operand N in usual manner.
3263 %lN means require operand N to be a CODE_LABEL or LABEL_REF
3264 and print the label name with no punctuation.
3265 %cN means require operand N to be a constant
3266 and print the constant expression with no punctuation.
3267 %aN means expect operand N to be a memory address
3268 (not a memory reference!) and print a reference
3270 %nN means expect operand N to be a constant
3271 and print a constant expression for minus the value
3272 of the operand, with no other punctuation. */
3275 output_asm_insn (template, operands
)
3276 const char *template;
3281 #ifdef ASSEMBLER_DIALECT
3284 int oporder
[MAX_RECOG_OPERANDS
];
3285 char opoutput
[MAX_RECOG_OPERANDS
];
3288 /* An insn may return a null string template
3289 in a case where no assembler code is needed. */
3293 memset (opoutput
, 0, sizeof opoutput
);
3295 putc ('\t', asm_out_file
);
3297 #ifdef ASM_OUTPUT_OPCODE
3298 ASM_OUTPUT_OPCODE (asm_out_file
, p
);
3305 if (flag_verbose_asm
)
3306 output_asm_operand_names (operands
, oporder
, ops
);
3307 if (flag_print_asm_name
)
3311 memset (opoutput
, 0, sizeof opoutput
);
3313 putc (c
, asm_out_file
);
3314 #ifdef ASM_OUTPUT_OPCODE
3315 while ((c
= *p
) == '\t')
3317 putc (c
, asm_out_file
);
3320 ASM_OUTPUT_OPCODE (asm_out_file
, p
);
3324 #ifdef ASSEMBLER_DIALECT
3330 output_operand_lossage ("nested assembly dialect alternatives");
3334 /* If we want the first dialect, do nothing. Otherwise, skip
3335 DIALECT_NUMBER of strings ending with '|'. */
3336 for (i
= 0; i
< dialect_number
; i
++)
3338 while (*p
&& *p
!= '}' && *p
++ != '|')
3347 output_operand_lossage ("unterminated assembly dialect alternative");
3354 /* Skip to close brace. */
3359 output_operand_lossage ("unterminated assembly dialect alternative");
3363 while (*p
++ != '}');
3367 putc (c
, asm_out_file
);
3372 putc (c
, asm_out_file
);
3378 /* %% outputs a single %. */
3382 putc (c
, asm_out_file
);
3384 /* %= outputs a number which is unique to each insn in the entire
3385 compilation. This is useful for making local labels that are
3386 referred to more than once in a given insn. */
3390 fprintf (asm_out_file
, "%d", insn_counter
);
3392 /* % followed by a letter and some digits
3393 outputs an operand in a special way depending on the letter.
3394 Letters `acln' are implemented directly.
3395 Other letters are passed to `output_operand' so that
3396 the PRINT_OPERAND macro can define them. */
3397 else if (ISALPHA (*p
))
3403 output_operand_lossage ("operand number missing after %%-letter");
3404 else if (this_is_asm_operands
3405 && (c
< 0 || (unsigned int) c
>= insn_noperands
))
3406 output_operand_lossage ("operand number out of range");
3407 else if (letter
== 'l')
3408 output_asm_label (operands
[c
]);
3409 else if (letter
== 'a')
3410 output_address (operands
[c
]);
3411 else if (letter
== 'c')
3413 if (CONSTANT_ADDRESS_P (operands
[c
]))
3414 output_addr_const (asm_out_file
, operands
[c
]);
3416 output_operand (operands
[c
], 'c');
3418 else if (letter
== 'n')
3420 if (GET_CODE (operands
[c
]) == CONST_INT
)
3421 fprintf (asm_out_file
, HOST_WIDE_INT_PRINT_DEC
,
3422 - INTVAL (operands
[c
]));
3425 putc ('-', asm_out_file
);
3426 output_addr_const (asm_out_file
, operands
[c
]);
3430 output_operand (operands
[c
], letter
);
3436 while (ISDIGIT (c
= *p
))
3439 /* % followed by a digit outputs an operand the default way. */
3440 else if (ISDIGIT (*p
))
3443 if (this_is_asm_operands
3444 && (c
< 0 || (unsigned int) c
>= insn_noperands
))
3445 output_operand_lossage ("operand number out of range");
3447 output_operand (operands
[c
], 0);
3453 while (ISDIGIT (c
= *p
))
3456 /* % followed by punctuation: output something for that
3457 punctuation character alone, with no operand.
3458 The PRINT_OPERAND macro decides what is actually done. */
3459 #ifdef PRINT_OPERAND_PUNCT_VALID_P
3460 else if (PRINT_OPERAND_PUNCT_VALID_P ((unsigned char) *p
))
3461 output_operand (NULL_RTX
, *p
++);
3464 output_operand_lossage ("invalid %%-code");
3468 putc (c
, asm_out_file
);
3471 /* Write out the variable names for operands, if we know them. */
3472 if (flag_verbose_asm
)
3473 output_asm_operand_names (operands
, oporder
, ops
);
3474 if (flag_print_asm_name
)
3477 putc ('\n', asm_out_file
);
3480 /* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */
3483 output_asm_label (x
)
3488 if (GET_CODE (x
) == LABEL_REF
)
3490 if (GET_CODE (x
) == CODE_LABEL
3491 || (GET_CODE (x
) == NOTE
3492 && NOTE_LINE_NUMBER (x
) == NOTE_INSN_DELETED_LABEL
))
3493 ASM_GENERATE_INTERNAL_LABEL (buf
, "L", CODE_LABEL_NUMBER (x
));
3495 output_operand_lossage ("`%%l' operand isn't a label");
3497 assemble_name (asm_out_file
, buf
);
3500 /* Print operand X using machine-dependent assembler syntax.
3501 The macro PRINT_OPERAND is defined just to control this function.
3502 CODE is a non-digit that preceded the operand-number in the % spec,
3503 such as 'z' if the spec was `%z3'. CODE is 0 if there was no char
3504 between the % and the digits.
3505 When CODE is a non-letter, X is 0.
3507 The meanings of the letters are machine-dependent and controlled
3508 by PRINT_OPERAND. */
3511 output_operand (x
, code
)
3513 int code ATTRIBUTE_UNUSED
;
3515 if (x
&& GET_CODE (x
) == SUBREG
)
3516 x
= alter_subreg (&x
);
3518 /* If X is a pseudo-register, abort now rather than writing trash to the
3521 if (x
&& GET_CODE (x
) == REG
&& REGNO (x
) >= FIRST_PSEUDO_REGISTER
)
3524 PRINT_OPERAND (asm_out_file
, x
, code
);
3527 /* Print a memory reference operand for address X
3528 using machine-dependent assembler syntax.
3529 The macro PRINT_OPERAND_ADDRESS exists just to control this function. */
3535 walk_alter_subreg (&x
);
3536 PRINT_OPERAND_ADDRESS (asm_out_file
, x
);
3539 /* Print an integer constant expression in assembler syntax.
3540 Addition and subtraction are the only arithmetic
3541 that may appear in these expressions. */
3544 output_addr_const (file
, x
)
3551 switch (GET_CODE (x
))
3558 #ifdef ASM_OUTPUT_SYMBOL_REF
3559 ASM_OUTPUT_SYMBOL_REF (file
, x
);
3561 assemble_name (file
, XSTR (x
, 0));
3569 ASM_GENERATE_INTERNAL_LABEL (buf
, "L", CODE_LABEL_NUMBER (x
));
3570 #ifdef ASM_OUTPUT_LABEL_REF
3571 ASM_OUTPUT_LABEL_REF (file
, buf
);
3573 assemble_name (file
, buf
);
3578 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, INTVAL (x
));
3582 /* This used to output parentheses around the expression,
3583 but that does not work on the 386 (either ATT or BSD assembler). */
3584 output_addr_const (file
, XEXP (x
, 0));
3588 if (GET_MODE (x
) == VOIDmode
)
3590 /* We can use %d if the number is one word and positive. */
3591 if (CONST_DOUBLE_HIGH (x
))
3592 fprintf (file
, HOST_WIDE_INT_PRINT_DOUBLE_HEX
,
3593 CONST_DOUBLE_HIGH (x
), CONST_DOUBLE_LOW (x
));
3594 else if (CONST_DOUBLE_LOW (x
) < 0)
3595 fprintf (file
, HOST_WIDE_INT_PRINT_HEX
, CONST_DOUBLE_LOW (x
));
3597 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, CONST_DOUBLE_LOW (x
));
3600 /* We can't handle floating point constants;
3601 PRINT_OPERAND must handle them. */
3602 output_operand_lossage ("floating constant misused");
3606 /* Some assemblers need integer constants to appear last (eg masm). */
3607 if (GET_CODE (XEXP (x
, 0)) == CONST_INT
)
3609 output_addr_const (file
, XEXP (x
, 1));
3610 if (INTVAL (XEXP (x
, 0)) >= 0)
3611 fprintf (file
, "+");
3612 output_addr_const (file
, XEXP (x
, 0));
3616 output_addr_const (file
, XEXP (x
, 0));
3617 if (GET_CODE (XEXP (x
, 1)) != CONST_INT
3618 || INTVAL (XEXP (x
, 1)) >= 0)
3619 fprintf (file
, "+");
3620 output_addr_const (file
, XEXP (x
, 1));
3625 /* Avoid outputting things like x-x or x+5-x,
3626 since some assemblers can't handle that. */
3627 x
= simplify_subtraction (x
);
3628 if (GET_CODE (x
) != MINUS
)
3631 output_addr_const (file
, XEXP (x
, 0));
3632 fprintf (file
, "-");
3633 if ((GET_CODE (XEXP (x
, 1)) == CONST_INT
&& INTVAL (XEXP (x
, 1)) >= 0)
3634 || GET_CODE (XEXP (x
, 1)) == PC
3635 || GET_CODE (XEXP (x
, 1)) == SYMBOL_REF
)
3636 output_addr_const (file
, XEXP (x
, 1));
3639 fputs (targetm
.asm_out
.open_paren
, file
);
3640 output_addr_const (file
, XEXP (x
, 1));
3641 fputs (targetm
.asm_out
.close_paren
, file
);
3648 output_addr_const (file
, XEXP (x
, 0));
3652 #ifdef OUTPUT_ADDR_CONST_EXTRA
3653 OUTPUT_ADDR_CONST_EXTRA (file
, x
, fail
);
3658 output_operand_lossage ("invalid expression as operand");
3662 /* A poor man's fprintf, with the added features of %I, %R, %L, and %U.
3663 %R prints the value of REGISTER_PREFIX.
3664 %L prints the value of LOCAL_LABEL_PREFIX.
3665 %U prints the value of USER_LABEL_PREFIX.
3666 %I prints the value of IMMEDIATE_PREFIX.
3667 %O runs ASM_OUTPUT_OPCODE to transform what follows in the string.
3668 Also supported are %d, %x, %s, %e, %f, %g and %%.
3670 We handle alternate assembler dialects here, just like output_asm_insn. */
3673 asm_fprintf
VPARAMS ((FILE *file
, const char *p
, ...))
3678 VA_OPEN (argptr
, p
);
3679 VA_FIXEDARG (argptr
, FILE *, file
);
3680 VA_FIXEDARG (argptr
, const char *, p
);
3687 #ifdef ASSEMBLER_DIALECT
3692 /* If we want the first dialect, do nothing. Otherwise, skip
3693 DIALECT_NUMBER of strings ending with '|'. */
3694 for (i
= 0; i
< dialect_number
; i
++)
3696 while (*p
&& *p
++ != '|')
3706 /* Skip to close brace. */
3707 while (*p
&& *p
++ != '}')
3718 while (ISDIGIT (c
) || c
== '.')
3726 fprintf (file
, "%%");
3729 case 'd': case 'i': case 'u':
3730 case 'x': case 'p': case 'X':
3734 fprintf (file
, buf
, va_arg (argptr
, int));
3738 /* This is a prefix to the 'd', 'i', 'u', 'x', 'p', and 'X' cases,
3739 but we do not check for those cases. It means that the value
3740 is a HOST_WIDE_INT, which may be either `int' or `long'. */
3742 #if HOST_BITS_PER_WIDE_INT == HOST_BITS_PER_INT
3744 #if HOST_BITS_PER_WIDE_INT == HOST_BITS_PER_LONG
3754 fprintf (file
, buf
, va_arg (argptr
, HOST_WIDE_INT
));
3761 fprintf (file
, buf
, va_arg (argptr
, long));
3769 fprintf (file
, buf
, va_arg (argptr
, double));
3775 fprintf (file
, buf
, va_arg (argptr
, char *));
3779 #ifdef ASM_OUTPUT_OPCODE
3780 ASM_OUTPUT_OPCODE (asm_out_file
, p
);
3785 #ifdef REGISTER_PREFIX
3786 fprintf (file
, "%s", REGISTER_PREFIX
);
3791 #ifdef IMMEDIATE_PREFIX
3792 fprintf (file
, "%s", IMMEDIATE_PREFIX
);
3797 #ifdef LOCAL_LABEL_PREFIX
3798 fprintf (file
, "%s", LOCAL_LABEL_PREFIX
);
3803 fputs (user_label_prefix
, file
);
3806 #ifdef ASM_FPRINTF_EXTENSIONS
3807 /* Upper case letters are reserved for general use by asm_fprintf
3808 and so are not available to target specific code. In order to
3809 prevent the ASM_FPRINTF_EXTENSIONS macro from using them then,
3810 they are defined here. As they get turned into real extensions
3811 to asm_fprintf they should be removed from this list. */
3812 case 'A': case 'B': case 'C': case 'D': case 'E':
3813 case 'F': case 'G': case 'H': case 'J': case 'K':
3814 case 'M': case 'N': case 'P': case 'Q': case 'S':
3815 case 'T': case 'V': case 'W': case 'Y': case 'Z':
3818 ASM_FPRINTF_EXTENSIONS (file
, argptr
, p
)
3831 /* Split up a CONST_DOUBLE or integer constant rtx
3832 into two rtx's for single words,
3833 storing in *FIRST the word that comes first in memory in the target
3834 and in *SECOND the other. */
3837 split_double (value
, first
, second
)
3839 rtx
*first
, *second
;
3841 if (GET_CODE (value
) == CONST_INT
)
3843 if (HOST_BITS_PER_WIDE_INT
>= (2 * BITS_PER_WORD
))
3845 /* In this case the CONST_INT holds both target words.
3846 Extract the bits from it into two word-sized pieces.
3847 Sign extend each half to HOST_WIDE_INT. */
3848 unsigned HOST_WIDE_INT low
, high
;
3849 unsigned HOST_WIDE_INT mask
, sign_bit
, sign_extend
;
3851 /* Set sign_bit to the most significant bit of a word. */
3853 sign_bit
<<= BITS_PER_WORD
- 1;
3855 /* Set mask so that all bits of the word are set. We could
3856 have used 1 << BITS_PER_WORD instead of basing the
3857 calculation on sign_bit. However, on machines where
3858 HOST_BITS_PER_WIDE_INT == BITS_PER_WORD, it could cause a
3859 compiler warning, even though the code would never be
3861 mask
= sign_bit
<< 1;
3864 /* Set sign_extend as any remaining bits. */
3865 sign_extend
= ~mask
;
3867 /* Pick the lower word and sign-extend it. */
3868 low
= INTVAL (value
);
3873 /* Pick the higher word, shifted to the least significant
3874 bits, and sign-extend it. */
3875 high
= INTVAL (value
);
3876 high
>>= BITS_PER_WORD
- 1;
3879 if (high
& sign_bit
)
3880 high
|= sign_extend
;
3882 /* Store the words in the target machine order. */
3883 if (WORDS_BIG_ENDIAN
)
3885 *first
= GEN_INT (high
);
3886 *second
= GEN_INT (low
);
3890 *first
= GEN_INT (low
);
3891 *second
= GEN_INT (high
);
3896 /* The rule for using CONST_INT for a wider mode
3897 is that we regard the value as signed.
3898 So sign-extend it. */
3899 rtx high
= (INTVAL (value
) < 0 ? constm1_rtx
: const0_rtx
);
3900 if (WORDS_BIG_ENDIAN
)
3912 else if (GET_CODE (value
) != CONST_DOUBLE
)
3914 if (WORDS_BIG_ENDIAN
)
3916 *first
= const0_rtx
;
3922 *second
= const0_rtx
;
3925 else if (GET_MODE (value
) == VOIDmode
3926 /* This is the old way we did CONST_DOUBLE integers. */
3927 || GET_MODE_CLASS (GET_MODE (value
)) == MODE_INT
)
3929 /* In an integer, the words are defined as most and least significant.
3930 So order them by the target's convention. */
3931 if (WORDS_BIG_ENDIAN
)
3933 *first
= GEN_INT (CONST_DOUBLE_HIGH (value
));
3934 *second
= GEN_INT (CONST_DOUBLE_LOW (value
));
3938 *first
= GEN_INT (CONST_DOUBLE_LOW (value
));
3939 *second
= GEN_INT (CONST_DOUBLE_HIGH (value
));
3946 REAL_VALUE_FROM_CONST_DOUBLE (r
, value
);
3948 /* Note, this converts the REAL_VALUE_TYPE to the target's
3949 format, splits up the floating point double and outputs
3950 exactly 32 bits of it into each of l[0] and l[1] --
3951 not necessarily BITS_PER_WORD bits. */
3952 REAL_VALUE_TO_TARGET_DOUBLE (r
, l
);
3954 /* If 32 bits is an entire word for the target, but not for the host,
3955 then sign-extend on the host so that the number will look the same
3956 way on the host that it would on the target. See for instance
3957 simplify_unary_operation. The #if is needed to avoid compiler
3960 #if HOST_BITS_PER_LONG > 32
3961 if (BITS_PER_WORD
< HOST_BITS_PER_LONG
&& BITS_PER_WORD
== 32)
3963 if (l
[0] & ((long) 1 << 31))
3964 l
[0] |= ((long) (-1) << 32);
3965 if (l
[1] & ((long) 1 << 31))
3966 l
[1] |= ((long) (-1) << 32);
3970 *first
= GEN_INT ((HOST_WIDE_INT
) l
[0]);
3971 *second
= GEN_INT ((HOST_WIDE_INT
) l
[1]);
3975 /* Return nonzero if this function has no function calls. */
3983 if (current_function_profile
|| profile_arc_flag
)
3986 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
3988 if (GET_CODE (insn
) == CALL_INSN
3989 && ! SIBLING_CALL_P (insn
))
3991 if (GET_CODE (insn
) == INSN
3992 && GET_CODE (PATTERN (insn
)) == SEQUENCE
3993 && GET_CODE (XVECEXP (PATTERN (insn
), 0, 0)) == CALL_INSN
3994 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn
), 0, 0)))
3997 for (link
= current_function_epilogue_delay_list
;
3999 link
= XEXP (link
, 1))
4001 insn
= XEXP (link
, 0);
4003 if (GET_CODE (insn
) == CALL_INSN
4004 && ! SIBLING_CALL_P (insn
))
4006 if (GET_CODE (insn
) == INSN
4007 && GET_CODE (PATTERN (insn
)) == SEQUENCE
4008 && GET_CODE (XVECEXP (PATTERN (insn
), 0, 0)) == CALL_INSN
4009 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn
), 0, 0)))
4016 /* Return 1 if branch is an forward branch.
4017 Uses insn_shuid array, so it works only in the final pass. May be used by
4018 output templates to customary add branch prediction hints.
4021 final_forward_branch_p (insn
)
4024 int insn_id
, label_id
;
4027 insn_id
= INSN_SHUID (insn
);
4028 label_id
= INSN_SHUID (JUMP_LABEL (insn
));
4029 /* We've hit some insns that does not have id information available. */
4030 if (!insn_id
|| !label_id
)
4032 return insn_id
< label_id
;
4035 /* On some machines, a function with no call insns
4036 can run faster if it doesn't create its own register window.
4037 When output, the leaf function should use only the "output"
4038 registers. Ordinarily, the function would be compiled to use
4039 the "input" registers to find its arguments; it is a candidate
4040 for leaf treatment if it uses only the "input" registers.
4041 Leaf function treatment means renumbering so the function
4042 uses the "output" registers instead. */
4044 #ifdef LEAF_REGISTERS
4046 /* Return 1 if this function uses only the registers that can be
4047 safely renumbered. */
4050 only_leaf_regs_used ()
4053 char *permitted_reg_in_leaf_functions
= LEAF_REGISTERS
;
4055 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
4056 if ((regs_ever_live
[i
] || global_regs
[i
])
4057 && ! permitted_reg_in_leaf_functions
[i
])
4060 if (current_function_uses_pic_offset_table
4061 && pic_offset_table_rtx
!= 0
4062 && GET_CODE (pic_offset_table_rtx
) == REG
4063 && ! permitted_reg_in_leaf_functions
[REGNO (pic_offset_table_rtx
)])
4069 /* Scan all instructions and renumber all registers into those
4070 available in leaf functions. */
4073 leaf_renumber_regs (first
)
4078 /* Renumber only the actual patterns.
4079 The reg-notes can contain frame pointer refs,
4080 and renumbering them could crash, and should not be needed. */
4081 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
4083 leaf_renumber_regs_insn (PATTERN (insn
));
4084 for (insn
= current_function_epilogue_delay_list
;
4086 insn
= XEXP (insn
, 1))
4087 if (INSN_P (XEXP (insn
, 0)))
4088 leaf_renumber_regs_insn (PATTERN (XEXP (insn
, 0)));
4091 /* Scan IN_RTX and its subexpressions, and renumber all regs into those
4092 available in leaf functions. */
4095 leaf_renumber_regs_insn (in_rtx
)
4099 const char *format_ptr
;
4104 /* Renumber all input-registers into output-registers.
4105 renumbered_regs would be 1 for an output-register;
4108 if (GET_CODE (in_rtx
) == REG
)
4112 /* Don't renumber the same reg twice. */
4116 newreg
= REGNO (in_rtx
);
4117 /* Don't try to renumber pseudo regs. It is possible for a pseudo reg
4118 to reach here as part of a REG_NOTE. */
4119 if (newreg
>= FIRST_PSEUDO_REGISTER
)
4124 newreg
= LEAF_REG_REMAP (newreg
);
4127 regs_ever_live
[REGNO (in_rtx
)] = 0;
4128 regs_ever_live
[newreg
] = 1;
4129 REGNO (in_rtx
) = newreg
;
4133 if (INSN_P (in_rtx
))
4135 /* Inside a SEQUENCE, we find insns.
4136 Renumber just the patterns of these insns,
4137 just as we do for the top-level insns. */
4138 leaf_renumber_regs_insn (PATTERN (in_rtx
));
4142 format_ptr
= GET_RTX_FORMAT (GET_CODE (in_rtx
));
4144 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (in_rtx
)); i
++)
4145 switch (*format_ptr
++)
4148 leaf_renumber_regs_insn (XEXP (in_rtx
, i
));
4152 if (NULL
!= XVEC (in_rtx
, i
))
4154 for (j
= 0; j
< XVECLEN (in_rtx
, i
); j
++)
4155 leaf_renumber_regs_insn (XVECEXP (in_rtx
, i
, j
));