1 /* Convert RTL to assembler code and output it, for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
22 /* This is the final pass of the compiler.
23 It looks at the rtl code for a function and outputs assembler code.
25 Call `final_start_function' to output the assembler code for function entry,
26 `final' to output assembler code for some RTL code,
27 `final_end_function' to output assembler code for function exit.
28 If a function is compiled in several pieces, each piece is
29 output separately with `final'.
31 Some optimizations are also done at this level.
32 Move instructions that were made unnecessary by good register allocation
33 are detected and omitted from the output. (Though most of these
34 are removed by the last jump pass.)
36 Instructions to set the condition codes are omitted when it can be
37 seen that the condition codes already had the desired values.
39 In some cases it is sufficient if the inherited condition codes
40 have related values, but this may require the following insn
41 (the one that tests the condition codes) to be modified.
43 The code for the function prologue and epilogue are generated
44 directly in assembler by the target functions function_prologue and
45 function_epilogue. Those instructions never exist as rtl. */
54 #include "insn-config.h"
55 #include "insn-attr.h"
57 #include "conditions.h"
60 #include "hard-reg-set.h"
67 #include "basic-block.h"
73 #ifdef XCOFF_DEBUGGING_INFO
74 #include "xcoffout.h" /* Needed for external data
75 declarations for e.g. AIX 4.x. */
78 #if defined (DWARF2_UNWIND_INFO) || defined (DWARF2_DEBUGGING_INFO)
79 #include "dwarf2out.h"
82 /* If we aren't using cc0, CC_STATUS_INIT shouldn't exist. So define a
83 null default for it to save conditionalization later. */
84 #ifndef CC_STATUS_INIT
85 #define CC_STATUS_INIT
88 /* How to start an assembler comment. */
89 #ifndef ASM_COMMENT_START
90 #define ASM_COMMENT_START ";#"
93 /* Is the given character a logical line separator for the assembler? */
94 #ifndef IS_ASM_LOGICAL_LINE_SEPARATOR
95 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C) ((C) == ';')
98 #ifndef JUMP_TABLES_IN_TEXT_SECTION
99 #define JUMP_TABLES_IN_TEXT_SECTION 0
102 /* Last insn processed by final_scan_insn. */
103 static rtx debug_insn
;
104 rtx current_output_insn
;
106 /* Line number of last NOTE. */
107 static int last_linenum
;
109 /* Highest line number in current block. */
110 static int high_block_linenum
;
112 /* Likewise for function. */
113 static int high_function_linenum
;
115 /* Filename of last NOTE. */
116 static const char *last_filename
;
118 extern int length_unit_log
; /* This is defined in insn-attrtab.c. */
120 /* Nonzero while outputting an `asm' with operands.
121 This means that inconsistencies are the user's fault, so don't abort.
122 The precise value is the insn being output, to pass to error_for_asm. */
123 rtx this_is_asm_operands
;
125 /* Number of operands of this insn, for an `asm' with operands. */
126 static unsigned int insn_noperands
;
128 /* Compare optimization flag. */
130 static rtx last_ignored_compare
= 0;
132 /* Flag indicating this insn is the start of a new basic block. */
134 static int new_block
= 1;
136 /* Assign a unique number to each insn that is output.
137 This can be used to generate unique local labels. */
139 static int insn_counter
= 0;
142 /* This variable contains machine-dependent flags (defined in tm.h)
143 set and examined by output routines
144 that describe how to interpret the condition codes properly. */
148 /* During output of an insn, this contains a copy of cc_status
149 from before the insn. */
151 CC_STATUS cc_prev_status
;
154 /* Indexed by hardware reg number, is 1 if that register is ever
155 used in the current function.
157 In life_analysis, or in stupid_life_analysis, this is set
158 up to record the hard regs used explicitly. Reload adds
159 in the hard regs used for holding pseudo regs. Final uses
160 it to generate the code in the function prologue and epilogue
161 to save and restore registers as needed. */
163 char regs_ever_live
[FIRST_PSEUDO_REGISTER
];
165 /* Nonzero means current function must be given a frame pointer.
166 Set in stmt.c if anything is allocated on the stack there.
167 Set in reload1.c if anything is allocated on the stack there. */
169 int frame_pointer_needed
;
171 /* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */
173 static int block_depth
;
175 /* Nonzero if have enabled APP processing of our assembler output. */
179 /* If we are outputting an insn sequence, this contains the sequence rtx.
184 #ifdef ASSEMBLER_DIALECT
186 /* Number of the assembler dialect to use, starting at 0. */
187 static int dialect_number
;
190 /* Indexed by line number, nonzero if there is a note for that line. */
192 static char *line_note_exists
;
194 #ifdef HAVE_conditional_execution
195 /* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */
196 rtx current_insn_predicate
;
201 struct function_list
*next
; /* next function */
202 const char *name
; /* function name */
203 long cfg_checksum
; /* function checksum */
204 long count_edges
; /* number of intrumented edges in this function */
207 static struct function_list
*functions_head
= 0;
208 static struct function_list
**functions_tail
= &functions_head
;
210 #ifdef HAVE_ATTR_length
211 static int asm_insn_count
PARAMS ((rtx
));
213 static void profile_function
PARAMS ((FILE *));
214 static void profile_after_prologue
PARAMS ((FILE *));
215 static void notice_source_line
PARAMS ((rtx
));
216 static rtx walk_alter_subreg
PARAMS ((rtx
*));
217 static void output_asm_name
PARAMS ((void));
218 static tree get_mem_expr_from_op
PARAMS ((rtx
, int *));
219 static void output_asm_operand_names
PARAMS ((rtx
*, int *, int));
220 static void output_operand
PARAMS ((rtx
, int));
221 #ifdef LEAF_REGISTERS
222 static void leaf_renumber_regs
PARAMS ((rtx
));
225 static int alter_cond
PARAMS ((rtx
));
227 #ifndef ADDR_VEC_ALIGN
228 static int final_addr_vec_align
PARAMS ((rtx
));
230 #ifdef HAVE_ATTR_length
231 static int align_fuzz
PARAMS ((rtx
, rtx
, int, unsigned));
234 /* Initialize data in final at the beginning of a compilation. */
237 init_final (filename
)
238 const char *filename ATTRIBUTE_UNUSED
;
243 #ifdef ASSEMBLER_DIALECT
244 dialect_number
= ASSEMBLER_DIALECT
;
248 /* Called at end of source file,
249 to output the arc-profiling table for this entire compilation. */
253 const char *filename
;
255 if (profile_arc_flag
)
258 tree string_type
, string_cst
;
259 tree structure_decl
, structure_value
, structure_pointer_type
;
260 tree field_decl
, decl_chain
, value_chain
;
261 tree nwords_field_value
, domain_type
;
264 string_type
= build_pointer_type (char_type_node
);
266 /* Libgcc2 bb structure. */
267 structure_decl
= make_node (RECORD_TYPE
);
268 TYPE_PACKED (structure_decl
) = flag_pack_struct
;
269 structure_pointer_type
= build_pointer_type (structure_decl
);
271 /* Output the main header, of 7 words:
272 0: 1 if this file is initialized, else 0.
273 1: address of file name (LPBX1).
274 2: address of table of counts (LPBX2).
275 3: number of counts in the table.
276 4: always 0, libgcc2 uses this as a pointer to next ``struct bb''
278 The following are GNU extensions:
280 5: Number of bytes in this header.
281 6: address of table of function checksums (LPBX7). */
285 build_decl (FIELD_DECL
, get_identifier ("zero_word"),
286 long_integer_type_node
);
287 value_chain
= build_tree_list (decl_chain
, integer_zero_node
);
289 /* Address of filename. */
291 char *cwd
= getpwd ();
292 int da_filename_len
= strlen (filename
) + strlen (cwd
) + 4 + 1;
293 char *da_filename
= (char *) alloca (da_filename_len
);
295 strcpy (da_filename
, cwd
);
296 strcat (da_filename
, "/");
297 strcat (da_filename
, filename
);
298 strip_off_ending (da_filename
, da_filename_len
- 3);
299 strcat (da_filename
, ".da");
301 build_decl (FIELD_DECL
, get_identifier ("filename"), string_type
);
302 string_cst
= build_string (strlen (da_filename
) + 1, da_filename
);
303 domain_type
= build_index_type (build_int_2 (strlen (da_filename
) + 1,
305 TREE_TYPE (string_cst
) =
306 build_array_type (char_type_node
, domain_type
);
307 value_chain
= tree_cons (field_decl
,
308 build1 (ADDR_EXPR
, string_type
, string_cst
),
310 TREE_CHAIN (field_decl
) = decl_chain
;
311 decl_chain
= field_decl
;
314 /* Table of counts. */
316 tree gcov_type_type
= make_unsigned_type (GCOV_TYPE_SIZE
);
317 tree gcov_type_pointer_type
= build_pointer_type (gcov_type_type
);
318 tree gcov_type_array_type
, gcov_type_array_pointer_type
;
319 tree domain_tree
= build_index_type (build_int_2
321 count_instrumented_edges
- 1,
325 gcov_type_array_type
= build_array_type (gcov_type_type
, domain_tree
);
326 gcov_type_array_pointer_type
=
327 build_pointer_type (gcov_type_array_type
);
331 build (VAR_DECL
, gcov_type_array_type
, NULL_TREE
, NULL_TREE
);
332 TREE_STATIC (counts_table
) = 1;
333 ASM_GENERATE_INTERNAL_LABEL (name
, "LPBX", 2);
334 DECL_NAME (counts_table
) = get_identifier (name
);
335 assemble_variable (counts_table
, 0, 0, 0);
338 build_decl (FIELD_DECL
, get_identifier ("counts"),
339 gcov_type_pointer_type
);
340 value_chain
= tree_cons (field_decl
,
342 gcov_type_array_pointer_type
,
343 counts_table
), value_chain
);
344 TREE_CHAIN (field_decl
) = decl_chain
;
345 decl_chain
= field_decl
;
348 /* Count of the # of instrumented arcs. */
350 build_decl (FIELD_DECL
, get_identifier ("ncounts"),
351 long_integer_type_node
);
352 value_chain
= tree_cons (field_decl
,
353 convert (long_integer_type_node
,
354 build_int_2 (profile_info
.
355 count_instrumented_edges
,
357 TREE_CHAIN (field_decl
) = decl_chain
;
358 decl_chain
= field_decl
;
360 /* Pointer to the next bb. */
362 build_decl (FIELD_DECL
, get_identifier ("next"),
363 structure_pointer_type
);
364 value_chain
= tree_cons (field_decl
, null_pointer_node
, value_chain
);
365 TREE_CHAIN (field_decl
) = decl_chain
;
366 decl_chain
= field_decl
;
368 /* Number of words. We'll set this after entire structure is laid out. */
370 build_decl (FIELD_DECL
, get_identifier ("nwords"),
371 long_integer_type_node
);
372 value_chain
= nwords_field_value
=
373 tree_cons (field_decl
, NULL
, value_chain
);
374 TREE_CHAIN (field_decl
) = decl_chain
;
375 decl_chain
= field_decl
;
377 /* struct bb_function []. */
379 struct function_list
*item
;
381 tree checksum_field
, arc_count_field
, name_field
;
383 tree array_value_chain
= NULL_TREE
;
384 tree bb_fn_struct_type
;
385 tree bb_fn_struct_array_type
;
386 tree bb_fn_struct_array_pointer_type
;
387 tree bb_fn_struct_pointer_type
;
388 tree field_value
, field_value_chain
;
390 bb_fn_struct_type
= make_node (RECORD_TYPE
);
391 TYPE_PACKED (bb_fn_struct_type
) = flag_pack_struct
;
393 checksum_field
= build_decl (FIELD_DECL
, get_identifier ("checksum"),
394 long_integer_type_node
);
396 build_decl (FIELD_DECL
, get_identifier ("arc_count"),
398 TREE_CHAIN (checksum_field
) = arc_count_field
;
400 build_decl (FIELD_DECL
, get_identifier ("name"), string_type
);
401 TREE_CHAIN (arc_count_field
) = name_field
;
403 TYPE_FIELDS (bb_fn_struct_type
) = checksum_field
;
407 for (item
= functions_head
; item
!= 0; item
= item
->next
)
410 /* Note that the array contains a terminator, hence no - 1. */
411 domain
= build_index_type (build_int_2 (num_nodes
, 0));
413 bb_fn_struct_pointer_type
= build_pointer_type (bb_fn_struct_type
);
414 bb_fn_struct_array_type
= build_array_type (bb_fn_struct_type
,
416 bb_fn_struct_array_pointer_type
=
417 build_pointer_type (bb_fn_struct_array_type
);
419 layout_type (bb_fn_struct_type
);
420 layout_type (bb_fn_struct_pointer_type
);
421 layout_type (bb_fn_struct_array_type
);
422 layout_type (bb_fn_struct_array_pointer_type
);
424 for (item
= functions_head
; item
!= 0; item
= item
->next
)
426 /* create constructor for structure. */
427 field_value_chain
= build_tree_list (checksum_field
,
429 (long_integer_type_node
,
434 tree_cons (arc_count_field
,
435 convert (integer_type_node
,
436 build_int_2 (item
->count_edges
, 0)),
439 string_cst
= build_string (strlen (item
->name
) + 1, item
->name
);
440 domain_type
= build_index_type (build_int_2 (strlen (item
->name
) +
442 TREE_TYPE (string_cst
) = build_array_type (char_type_node
,
444 field_value_chain
= tree_cons (name_field
,
445 build1 (ADDR_EXPR
, string_type
,
451 array_value_chain
= tree_cons (NULL_TREE
,
456 (field_value_chain
)),
460 /* Add terminator. */
461 field_value
= build_tree_list (arc_count_field
,
462 convert (integer_type_node
,
463 build_int_2 (-1, 0)));
465 array_value_chain
= tree_cons (NULL_TREE
,
466 build (CONSTRUCTOR
, bb_fn_struct_type
,
467 NULL_TREE
, field_value
),
471 /* Create constructor for array. */
474 build_decl (FIELD_DECL
, get_identifier ("function_infos"),
475 bb_fn_struct_pointer_type
);
476 value_chain
= tree_cons (field_decl
,
478 bb_fn_struct_array_pointer_type
,
480 bb_fn_struct_array_type
,
483 (array_value_chain
))),
485 TREE_CHAIN (field_decl
) = decl_chain
;
486 decl_chain
= field_decl
;
490 /* Finish structure. */
491 TYPE_FIELDS (structure_decl
) = nreverse (decl_chain
);
492 layout_type (structure_decl
);
495 build (VAR_DECL
, structure_decl
, NULL_TREE
, NULL_TREE
);
496 DECL_INITIAL (structure_value
) =
497 build (CONSTRUCTOR
, structure_decl
, NULL_TREE
,
498 nreverse (value_chain
));
499 TREE_STATIC (structure_value
) = 1;
500 ASM_GENERATE_INTERNAL_LABEL (name
, "LPBX", 0);
501 DECL_NAME (structure_value
) = get_identifier (name
);
503 /* Set number of words in this structure. */
504 TREE_VALUE (nwords_field_value
) =
505 build_int_2 (TREE_INT_CST_LOW (TYPE_SIZE_UNIT (structure_decl
)) /
506 (INT_TYPE_SIZE
/ BITS_PER_UNIT
), 0);
508 /* Build structure. */
509 assemble_variable (structure_value
, 0, 0, 0);
511 /* Offset to table of arc counters for thread-safe profiling. */
513 tree table_offset_var
= make_node (VAR_DECL
);
514 TREE_TYPE (table_offset_var
) = build_pointer_type (integer_type_node
);
515 DECL_INITIAL (table_offset_var
) = integer_zero_node
;
516 DECL_NAME (table_offset_var
) = get_identifier (".LPBF0");
517 TREE_STATIC (table_offset_var
) = 1;
518 assemble_variable (table_offset_var
, 0, 0, 0);
523 /* Default target function prologue and epilogue assembler output.
525 If not overridden for epilogue code, then the function body itself
526 contains return instructions wherever needed. */
528 default_function_pro_epilogue (file
, size
)
529 FILE *file ATTRIBUTE_UNUSED
;
530 HOST_WIDE_INT size ATTRIBUTE_UNUSED
;
534 /* Default target hook that outputs nothing to a stream. */
536 no_asm_to_stream (file
)
537 FILE *file ATTRIBUTE_UNUSED
;
541 /* Enable APP processing of subsequent output.
542 Used before the output from an `asm' statement. */
549 fputs (ASM_APP_ON
, asm_out_file
);
554 /* Disable APP processing of subsequent output.
555 Called from varasm.c before most kinds of output. */
562 fputs (ASM_APP_OFF
, asm_out_file
);
567 /* Return the number of slots filled in the current
568 delayed branch sequence (we don't count the insn needing the
569 delay slot). Zero if not in a delayed branch sequence. */
573 dbr_sequence_length ()
575 if (final_sequence
!= 0)
576 return XVECLEN (final_sequence
, 0) - 1;
582 /* The next two pages contain routines used to compute the length of an insn
583 and to shorten branches. */
585 /* Arrays for insn lengths, and addresses. The latter is referenced by
586 `insn_current_length'. */
588 static int *insn_lengths
;
590 #ifdef HAVE_ATTR_length
591 varray_type insn_addresses_
;
594 /* Max uid for which the above arrays are valid. */
595 static int insn_lengths_max_uid
;
597 /* Address of insn being processed. Used by `insn_current_length'. */
598 int insn_current_address
;
600 /* Address of insn being processed in previous iteration. */
601 int insn_last_address
;
603 /* known invariant alignment of insn being processed. */
604 int insn_current_align
;
606 /* After shorten_branches, for any insn, uid_align[INSN_UID (insn)]
607 gives the next following alignment insn that increases the known
608 alignment, or NULL_RTX if there is no such insn.
609 For any alignment obtained this way, we can again index uid_align with
610 its uid to obtain the next following align that in turn increases the
611 alignment, till we reach NULL_RTX; the sequence obtained this way
612 for each insn we'll call the alignment chain of this insn in the following
615 struct label_alignment
621 static rtx
*uid_align
;
622 static int *uid_shuid
;
623 static struct label_alignment
*label_align
;
625 /* Indicate that branch shortening hasn't yet been done. */
639 insn_lengths_max_uid
= 0;
641 #ifdef HAVE_ATTR_length
642 INSN_ADDRESSES_FREE ();
651 /* Obtain the current length of an insn. If branch shortening has been done,
652 get its actual length. Otherwise, get its maximum length. */
655 get_attr_length (insn
)
656 rtx insn ATTRIBUTE_UNUSED
;
658 #ifdef HAVE_ATTR_length
663 if (insn_lengths_max_uid
> INSN_UID (insn
))
664 return insn_lengths
[INSN_UID (insn
)];
666 switch (GET_CODE (insn
))
674 length
= insn_default_length (insn
);
678 body
= PATTERN (insn
);
679 if (GET_CODE (body
) == ADDR_VEC
|| GET_CODE (body
) == ADDR_DIFF_VEC
)
681 /* Alignment is machine-dependent and should be handled by
685 length
= insn_default_length (insn
);
689 body
= PATTERN (insn
);
690 if (GET_CODE (body
) == USE
|| GET_CODE (body
) == CLOBBER
)
693 else if (GET_CODE (body
) == ASM_INPUT
|| asm_noperands (body
) >= 0)
694 length
= asm_insn_count (body
) * insn_default_length (insn
);
695 else if (GET_CODE (body
) == SEQUENCE
)
696 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
697 length
+= get_attr_length (XVECEXP (body
, 0, i
));
699 length
= insn_default_length (insn
);
706 #ifdef ADJUST_INSN_LENGTH
707 ADJUST_INSN_LENGTH (insn
, length
);
710 #else /* not HAVE_ATTR_length */
712 #endif /* not HAVE_ATTR_length */
715 /* Code to handle alignment inside shorten_branches. */
717 /* Here is an explanation how the algorithm in align_fuzz can give
720 Call a sequence of instructions beginning with alignment point X
721 and continuing until the next alignment point `block X'. When `X'
722 is used in an expression, it means the alignment value of the
725 Call the distance between the start of the first insn of block X, and
726 the end of the last insn of block X `IX', for the `inner size of X'.
727 This is clearly the sum of the instruction lengths.
729 Likewise with the next alignment-delimited block following X, which we
732 Call the distance between the start of the first insn of block X, and
733 the start of the first insn of block Y `OX', for the `outer size of X'.
735 The estimated padding is then OX - IX.
737 OX can be safely estimated as
742 OX = round_up(IX, X) + Y - X
744 Clearly est(IX) >= real(IX), because that only depends on the
745 instruction lengths, and those being overestimated is a given.
747 Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so
748 we needn't worry about that when thinking about OX.
750 When X >= Y, the alignment provided by Y adds no uncertainty factor
751 for branch ranges starting before X, so we can just round what we have.
752 But when X < Y, we don't know anything about the, so to speak,
753 `middle bits', so we have to assume the worst when aligning up from an
754 address mod X to one mod Y, which is Y - X. */
757 #define LABEL_ALIGN(LABEL) align_labels_log
760 #ifndef LABEL_ALIGN_MAX_SKIP
761 #define LABEL_ALIGN_MAX_SKIP align_labels_max_skip
765 #define LOOP_ALIGN(LABEL) align_loops_log
768 #ifndef LOOP_ALIGN_MAX_SKIP
769 #define LOOP_ALIGN_MAX_SKIP align_loops_max_skip
772 #ifndef LABEL_ALIGN_AFTER_BARRIER
773 #define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0
776 #ifndef LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP
777 #define LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP 0
781 #define JUMP_ALIGN(LABEL) align_jumps_log
784 #ifndef JUMP_ALIGN_MAX_SKIP
785 #define JUMP_ALIGN_MAX_SKIP align_jumps_max_skip
788 #ifndef ADDR_VEC_ALIGN
790 final_addr_vec_align (addr_vec
)
793 int align
= GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec
)));
795 if (align
> BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
)
796 align
= BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
;
797 return exact_log2 (align
);
801 #define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC)
804 #ifndef INSN_LENGTH_ALIGNMENT
805 #define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log
808 #define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)])
810 static int min_labelno
, max_labelno
;
812 #define LABEL_TO_ALIGNMENT(LABEL) \
813 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment)
815 #define LABEL_TO_MAX_SKIP(LABEL) \
816 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip)
818 /* For the benefit of port specific code do this also as a function. */
821 label_to_alignment (label
)
824 return LABEL_TO_ALIGNMENT (label
);
827 #ifdef HAVE_ATTR_length
828 /* The differences in addresses
829 between a branch and its target might grow or shrink depending on
830 the alignment the start insn of the range (the branch for a forward
831 branch or the label for a backward branch) starts out on; if these
832 differences are used naively, they can even oscillate infinitely.
833 We therefore want to compute a 'worst case' address difference that
834 is independent of the alignment the start insn of the range end
835 up on, and that is at least as large as the actual difference.
836 The function align_fuzz calculates the amount we have to add to the
837 naively computed difference, by traversing the part of the alignment
838 chain of the start insn of the range that is in front of the end insn
839 of the range, and considering for each alignment the maximum amount
840 that it might contribute to a size increase.
842 For casesi tables, we also want to know worst case minimum amounts of
843 address difference, in case a machine description wants to introduce
844 some common offset that is added to all offsets in a table.
845 For this purpose, align_fuzz with a growth argument of 0 computes the
846 appropriate adjustment. */
848 /* Compute the maximum delta by which the difference of the addresses of
849 START and END might grow / shrink due to a different address for start
850 which changes the size of alignment insns between START and END.
851 KNOWN_ALIGN_LOG is the alignment known for START.
852 GROWTH should be ~0 if the objective is to compute potential code size
853 increase, and 0 if the objective is to compute potential shrink.
854 The return value is undefined for any other value of GROWTH. */
857 align_fuzz (start
, end
, known_align_log
, growth
)
862 int uid
= INSN_UID (start
);
864 int known_align
= 1 << known_align_log
;
865 int end_shuid
= INSN_SHUID (end
);
868 for (align_label
= uid_align
[uid
]; align_label
; align_label
= uid_align
[uid
])
870 int align_addr
, new_align
;
872 uid
= INSN_UID (align_label
);
873 align_addr
= INSN_ADDRESSES (uid
) - insn_lengths
[uid
];
874 if (uid_shuid
[uid
] > end_shuid
)
876 known_align_log
= LABEL_TO_ALIGNMENT (align_label
);
877 new_align
= 1 << known_align_log
;
878 if (new_align
< known_align
)
880 fuzz
+= (-align_addr
^ growth
) & (new_align
- known_align
);
881 known_align
= new_align
;
886 /* Compute a worst-case reference address of a branch so that it
887 can be safely used in the presence of aligned labels. Since the
888 size of the branch itself is unknown, the size of the branch is
889 not included in the range. I.e. for a forward branch, the reference
890 address is the end address of the branch as known from the previous
891 branch shortening pass, minus a value to account for possible size
892 increase due to alignment. For a backward branch, it is the start
893 address of the branch as known from the current pass, plus a value
894 to account for possible size increase due to alignment.
895 NB.: Therefore, the maximum offset allowed for backward branches needs
896 to exclude the branch size. */
899 insn_current_reference_address (branch
)
905 if (! INSN_ADDRESSES_SET_P ())
908 seq
= NEXT_INSN (PREV_INSN (branch
));
909 seq_uid
= INSN_UID (seq
);
910 if (GET_CODE (branch
) != JUMP_INSN
)
911 /* This can happen for example on the PA; the objective is to know the
912 offset to address something in front of the start of the function.
913 Thus, we can treat it like a backward branch.
914 We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than
915 any alignment we'd encounter, so we skip the call to align_fuzz. */
916 return insn_current_address
;
917 dest
= JUMP_LABEL (branch
);
919 /* BRANCH has no proper alignment chain set, so use SEQ.
920 BRANCH also has no INSN_SHUID. */
921 if (INSN_SHUID (seq
) < INSN_SHUID (dest
))
923 /* Forward branch. */
924 return (insn_last_address
+ insn_lengths
[seq_uid
]
925 - align_fuzz (seq
, dest
, length_unit_log
, ~0));
929 /* Backward branch. */
930 return (insn_current_address
931 + align_fuzz (dest
, seq
, length_unit_log
, ~0));
934 #endif /* HAVE_ATTR_length */
937 compute_alignments ()
940 int log
, max_skip
, max_log
;
948 max_labelno
= max_label_num ();
949 min_labelno
= get_first_label_num ();
950 label_align
= (struct label_alignment
*)
951 xcalloc (max_labelno
- min_labelno
+ 1, sizeof (struct label_alignment
));
953 /* If not optimizing or optimizing for size, don't assign any alignments. */
954 if (! optimize
|| optimize_size
)
957 for (i
= 0; i
< n_basic_blocks
; i
++)
959 basic_block bb
= BASIC_BLOCK (i
);
960 rtx label
= bb
->head
;
961 int fallthru_frequency
= 0, branch_frequency
= 0, has_fallthru
= 0;
964 if (GET_CODE (label
) != CODE_LABEL
)
966 max_log
= LABEL_ALIGN (label
);
967 max_skip
= LABEL_ALIGN_MAX_SKIP
;
969 for (e
= bb
->pred
; e
; e
= e
->pred_next
)
971 if (e
->flags
& EDGE_FALLTHRU
)
972 has_fallthru
= 1, fallthru_frequency
+= EDGE_FREQUENCY (e
);
974 branch_frequency
+= EDGE_FREQUENCY (e
);
977 /* There are two purposes to align block with no fallthru incoming edge:
978 1) to avoid fetch stalls when branch destination is near cache boundary
979 2) to improve cache efficiency in case the previous block is not executed
980 (so it does not need to be in the cache).
982 We to catch first case, we align frequently executed blocks.
983 To catch the second, we align blocks that are executed more frequently
984 than the predecessor and the predecessor is likely to not be executed
985 when function is called. */
988 && (branch_frequency
> BB_FREQ_MAX
/ 10
989 || (bb
->frequency
> BASIC_BLOCK (i
- 1)->frequency
* 10
990 && (BASIC_BLOCK (i
- 1)->frequency
991 <= ENTRY_BLOCK_PTR
->frequency
/ 2))))
993 log
= JUMP_ALIGN (label
);
997 max_skip
= JUMP_ALIGN_MAX_SKIP
;
1000 /* In case block is frequent and reached mostly by non-fallthru edge,
1001 align it. It is most likely an first block of loop. */
1003 && branch_frequency
+ fallthru_frequency
> BB_FREQ_MAX
/ 10
1004 && branch_frequency
> fallthru_frequency
* 5)
1006 log
= LOOP_ALIGN (label
);
1010 max_skip
= LOOP_ALIGN_MAX_SKIP
;
1013 LABEL_TO_ALIGNMENT (label
) = max_log
;
1014 LABEL_TO_MAX_SKIP (label
) = max_skip
;
1018 /* Make a pass over all insns and compute their actual lengths by shortening
1019 any branches of variable length if possible. */
1021 /* Give a default value for the lowest address in a function. */
1023 #ifndef FIRST_INSN_ADDRESS
1024 #define FIRST_INSN_ADDRESS 0
1027 /* shorten_branches might be called multiple times: for example, the SH
1028 port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG.
1029 In order to do this, it needs proper length information, which it obtains
1030 by calling shorten_branches. This cannot be collapsed with
1031 shorten_branches itself into a single pass unless we also want to integrate
1032 reorg.c, since the branch splitting exposes new instructions with delay
1036 shorten_branches (first
)
1037 rtx first ATTRIBUTE_UNUSED
;
1044 #ifdef HAVE_ATTR_length
1045 #define MAX_CODE_ALIGN 16
1047 int something_changed
= 1;
1048 char *varying_length
;
1051 rtx align_tab
[MAX_CODE_ALIGN
];
1055 /* Compute maximum UID and allocate label_align / uid_shuid. */
1056 max_uid
= get_max_uid ();
1058 uid_shuid
= (int *) xmalloc (max_uid
* sizeof *uid_shuid
);
1060 if (max_labelno
!= max_label_num ())
1062 int old
= max_labelno
;
1066 max_labelno
= max_label_num ();
1068 n_labels
= max_labelno
- min_labelno
+ 1;
1069 n_old_labels
= old
- min_labelno
+ 1;
1071 label_align
= (struct label_alignment
*) xrealloc
1072 (label_align
, n_labels
* sizeof (struct label_alignment
));
1074 /* Range of labels grows monotonically in the function. Abort here
1075 means that the initialization of array got lost. */
1076 if (n_old_labels
> n_labels
)
1079 memset (label_align
+ n_old_labels
, 0,
1080 (n_labels
- n_old_labels
) * sizeof (struct label_alignment
));
1083 /* Initialize label_align and set up uid_shuid to be strictly
1084 monotonically rising with insn order. */
1085 /* We use max_log here to keep track of the maximum alignment we want to
1086 impose on the next CODE_LABEL (or the current one if we are processing
1087 the CODE_LABEL itself). */
1092 for (insn
= get_insns (), i
= 1; insn
; insn
= NEXT_INSN (insn
))
1096 INSN_SHUID (insn
) = i
++;
1099 /* reorg might make the first insn of a loop being run once only,
1100 and delete the label in front of it. Then we want to apply
1101 the loop alignment to the new label created by reorg, which
1102 is separated by the former loop start insn from the
1103 NOTE_INSN_LOOP_BEG. */
1105 else if (GET_CODE (insn
) == CODE_LABEL
)
1109 /* Merge in alignments computed by compute_alignments. */
1110 log
= LABEL_TO_ALIGNMENT (insn
);
1114 max_skip
= LABEL_TO_MAX_SKIP (insn
);
1117 log
= LABEL_ALIGN (insn
);
1121 max_skip
= LABEL_ALIGN_MAX_SKIP
;
1123 next
= NEXT_INSN (insn
);
1124 /* ADDR_VECs only take room if read-only data goes into the text
1126 if (JUMP_TABLES_IN_TEXT_SECTION
1127 #if !defined(READONLY_DATA_SECTION)
1131 if (next
&& GET_CODE (next
) == JUMP_INSN
)
1133 rtx nextbody
= PATTERN (next
);
1134 if (GET_CODE (nextbody
) == ADDR_VEC
1135 || GET_CODE (nextbody
) == ADDR_DIFF_VEC
)
1137 log
= ADDR_VEC_ALIGN (next
);
1141 max_skip
= LABEL_ALIGN_MAX_SKIP
;
1145 LABEL_TO_ALIGNMENT (insn
) = max_log
;
1146 LABEL_TO_MAX_SKIP (insn
) = max_skip
;
1150 else if (GET_CODE (insn
) == BARRIER
)
1154 for (label
= insn
; label
&& ! INSN_P (label
);
1155 label
= NEXT_INSN (label
))
1156 if (GET_CODE (label
) == CODE_LABEL
)
1158 log
= LABEL_ALIGN_AFTER_BARRIER (insn
);
1162 max_skip
= LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP
;
1168 #ifdef HAVE_ATTR_length
1170 /* Allocate the rest of the arrays. */
1171 insn_lengths
= (int *) xmalloc (max_uid
* sizeof (*insn_lengths
));
1172 insn_lengths_max_uid
= max_uid
;
1173 /* Syntax errors can lead to labels being outside of the main insn stream.
1174 Initialize insn_addresses, so that we get reproducible results. */
1175 INSN_ADDRESSES_ALLOC (max_uid
);
1177 varying_length
= (char *) xcalloc (max_uid
, sizeof (char));
1179 /* Initialize uid_align. We scan instructions
1180 from end to start, and keep in align_tab[n] the last seen insn
1181 that does an alignment of at least n+1, i.e. the successor
1182 in the alignment chain for an insn that does / has a known
1184 uid_align
= (rtx
*) xcalloc (max_uid
, sizeof *uid_align
);
1186 for (i
= MAX_CODE_ALIGN
; --i
>= 0;)
1187 align_tab
[i
] = NULL_RTX
;
1188 seq
= get_last_insn ();
1189 for (; seq
; seq
= PREV_INSN (seq
))
1191 int uid
= INSN_UID (seq
);
1193 log
= (GET_CODE (seq
) == CODE_LABEL
? LABEL_TO_ALIGNMENT (seq
) : 0);
1194 uid_align
[uid
] = align_tab
[0];
1197 /* Found an alignment label. */
1198 uid_align
[uid
] = align_tab
[log
];
1199 for (i
= log
- 1; i
>= 0; i
--)
1203 #ifdef CASE_VECTOR_SHORTEN_MODE
1206 /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum
1209 int min_shuid
= INSN_SHUID (get_insns ()) - 1;
1210 int max_shuid
= INSN_SHUID (get_last_insn ()) + 1;
1213 for (insn
= first
; insn
!= 0; insn
= NEXT_INSN (insn
))
1215 rtx min_lab
= NULL_RTX
, max_lab
= NULL_RTX
, pat
;
1216 int len
, i
, min
, max
, insn_shuid
;
1218 addr_diff_vec_flags flags
;
1220 if (GET_CODE (insn
) != JUMP_INSN
1221 || GET_CODE (PATTERN (insn
)) != ADDR_DIFF_VEC
)
1223 pat
= PATTERN (insn
);
1224 len
= XVECLEN (pat
, 1);
1227 min_align
= MAX_CODE_ALIGN
;
1228 for (min
= max_shuid
, max
= min_shuid
, i
= len
- 1; i
>= 0; i
--)
1230 rtx lab
= XEXP (XVECEXP (pat
, 1, i
), 0);
1231 int shuid
= INSN_SHUID (lab
);
1242 if (min_align
> LABEL_TO_ALIGNMENT (lab
))
1243 min_align
= LABEL_TO_ALIGNMENT (lab
);
1245 XEXP (pat
, 2) = gen_rtx_LABEL_REF (VOIDmode
, min_lab
);
1246 XEXP (pat
, 3) = gen_rtx_LABEL_REF (VOIDmode
, max_lab
);
1247 insn_shuid
= INSN_SHUID (insn
);
1248 rel
= INSN_SHUID (XEXP (XEXP (pat
, 0), 0));
1249 flags
.min_align
= min_align
;
1250 flags
.base_after_vec
= rel
> insn_shuid
;
1251 flags
.min_after_vec
= min
> insn_shuid
;
1252 flags
.max_after_vec
= max
> insn_shuid
;
1253 flags
.min_after_base
= min
> rel
;
1254 flags
.max_after_base
= max
> rel
;
1255 ADDR_DIFF_VEC_FLAGS (pat
) = flags
;
1258 #endif /* CASE_VECTOR_SHORTEN_MODE */
1260 /* Compute initial lengths, addresses, and varying flags for each insn. */
1261 for (insn_current_address
= FIRST_INSN_ADDRESS
, insn
= first
;
1263 insn_current_address
+= insn_lengths
[uid
], insn
= NEXT_INSN (insn
))
1265 uid
= INSN_UID (insn
);
1267 insn_lengths
[uid
] = 0;
1269 if (GET_CODE (insn
) == CODE_LABEL
)
1271 int log
= LABEL_TO_ALIGNMENT (insn
);
1274 int align
= 1 << log
;
1275 int new_address
= (insn_current_address
+ align
- 1) & -align
;
1276 insn_lengths
[uid
] = new_address
- insn_current_address
;
1280 INSN_ADDRESSES (uid
) = insn_current_address
;
1282 if (GET_CODE (insn
) == NOTE
|| GET_CODE (insn
) == BARRIER
1283 || GET_CODE (insn
) == CODE_LABEL
)
1285 if (INSN_DELETED_P (insn
))
1288 body
= PATTERN (insn
);
1289 if (GET_CODE (body
) == ADDR_VEC
|| GET_CODE (body
) == ADDR_DIFF_VEC
)
1291 /* This only takes room if read-only data goes into the text
1293 if (JUMP_TABLES_IN_TEXT_SECTION
1294 #if !defined(READONLY_DATA_SECTION)
1298 insn_lengths
[uid
] = (XVECLEN (body
,
1299 GET_CODE (body
) == ADDR_DIFF_VEC
)
1300 * GET_MODE_SIZE (GET_MODE (body
)));
1301 /* Alignment is handled by ADDR_VEC_ALIGN. */
1303 else if (GET_CODE (body
) == ASM_INPUT
|| asm_noperands (body
) >= 0)
1304 insn_lengths
[uid
] = asm_insn_count (body
) * insn_default_length (insn
);
1305 else if (GET_CODE (body
) == SEQUENCE
)
1308 int const_delay_slots
;
1310 const_delay_slots
= const_num_delay_slots (XVECEXP (body
, 0, 0));
1312 const_delay_slots
= 0;
1314 /* Inside a delay slot sequence, we do not do any branch shortening
1315 if the shortening could change the number of delay slots
1317 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
1319 rtx inner_insn
= XVECEXP (body
, 0, i
);
1320 int inner_uid
= INSN_UID (inner_insn
);
1323 if (GET_CODE (body
) == ASM_INPUT
1324 || asm_noperands (PATTERN (XVECEXP (body
, 0, i
))) >= 0)
1325 inner_length
= (asm_insn_count (PATTERN (inner_insn
))
1326 * insn_default_length (inner_insn
));
1328 inner_length
= insn_default_length (inner_insn
);
1330 insn_lengths
[inner_uid
] = inner_length
;
1331 if (const_delay_slots
)
1333 if ((varying_length
[inner_uid
]
1334 = insn_variable_length_p (inner_insn
)) != 0)
1335 varying_length
[uid
] = 1;
1336 INSN_ADDRESSES (inner_uid
) = (insn_current_address
1337 + insn_lengths
[uid
]);
1340 varying_length
[inner_uid
] = 0;
1341 insn_lengths
[uid
] += inner_length
;
1344 else if (GET_CODE (body
) != USE
&& GET_CODE (body
) != CLOBBER
)
1346 insn_lengths
[uid
] = insn_default_length (insn
);
1347 varying_length
[uid
] = insn_variable_length_p (insn
);
1350 /* If needed, do any adjustment. */
1351 #ifdef ADJUST_INSN_LENGTH
1352 ADJUST_INSN_LENGTH (insn
, insn_lengths
[uid
]);
1353 if (insn_lengths
[uid
] < 0)
1354 fatal_insn ("negative insn length", insn
);
1358 /* Now loop over all the insns finding varying length insns. For each,
1359 get the current insn length. If it has changed, reflect the change.
1360 When nothing changes for a full pass, we are done. */
1362 while (something_changed
)
1364 something_changed
= 0;
1365 insn_current_align
= MAX_CODE_ALIGN
- 1;
1366 for (insn_current_address
= FIRST_INSN_ADDRESS
, insn
= first
;
1368 insn
= NEXT_INSN (insn
))
1371 #ifdef ADJUST_INSN_LENGTH
1376 uid
= INSN_UID (insn
);
1378 if (GET_CODE (insn
) == CODE_LABEL
)
1380 int log
= LABEL_TO_ALIGNMENT (insn
);
1381 if (log
> insn_current_align
)
1383 int align
= 1 << log
;
1384 int new_address
= (insn_current_address
+ align
- 1) & -align
;
1385 insn_lengths
[uid
] = new_address
- insn_current_address
;
1386 insn_current_align
= log
;
1387 insn_current_address
= new_address
;
1390 insn_lengths
[uid
] = 0;
1391 INSN_ADDRESSES (uid
) = insn_current_address
;
1395 length_align
= INSN_LENGTH_ALIGNMENT (insn
);
1396 if (length_align
< insn_current_align
)
1397 insn_current_align
= length_align
;
1399 insn_last_address
= INSN_ADDRESSES (uid
);
1400 INSN_ADDRESSES (uid
) = insn_current_address
;
1402 #ifdef CASE_VECTOR_SHORTEN_MODE
1403 if (optimize
&& GET_CODE (insn
) == JUMP_INSN
1404 && GET_CODE (PATTERN (insn
)) == ADDR_DIFF_VEC
)
1406 rtx body
= PATTERN (insn
);
1407 int old_length
= insn_lengths
[uid
];
1408 rtx rel_lab
= XEXP (XEXP (body
, 0), 0);
1409 rtx min_lab
= XEXP (XEXP (body
, 2), 0);
1410 rtx max_lab
= XEXP (XEXP (body
, 3), 0);
1411 int rel_addr
= INSN_ADDRESSES (INSN_UID (rel_lab
));
1412 int min_addr
= INSN_ADDRESSES (INSN_UID (min_lab
));
1413 int max_addr
= INSN_ADDRESSES (INSN_UID (max_lab
));
1416 addr_diff_vec_flags flags
;
1418 /* Avoid automatic aggregate initialization. */
1419 flags
= ADDR_DIFF_VEC_FLAGS (body
);
1421 /* Try to find a known alignment for rel_lab. */
1422 for (prev
= rel_lab
;
1424 && ! insn_lengths
[INSN_UID (prev
)]
1425 && ! (varying_length
[INSN_UID (prev
)] & 1);
1426 prev
= PREV_INSN (prev
))
1427 if (varying_length
[INSN_UID (prev
)] & 2)
1429 rel_align
= LABEL_TO_ALIGNMENT (prev
);
1433 /* See the comment on addr_diff_vec_flags in rtl.h for the
1434 meaning of the flags values. base: REL_LAB vec: INSN */
1435 /* Anything after INSN has still addresses from the last
1436 pass; adjust these so that they reflect our current
1437 estimate for this pass. */
1438 if (flags
.base_after_vec
)
1439 rel_addr
+= insn_current_address
- insn_last_address
;
1440 if (flags
.min_after_vec
)
1441 min_addr
+= insn_current_address
- insn_last_address
;
1442 if (flags
.max_after_vec
)
1443 max_addr
+= insn_current_address
- insn_last_address
;
1444 /* We want to know the worst case, i.e. lowest possible value
1445 for the offset of MIN_LAB. If MIN_LAB is after REL_LAB,
1446 its offset is positive, and we have to be wary of code shrink;
1447 otherwise, it is negative, and we have to be vary of code
1449 if (flags
.min_after_base
)
1451 /* If INSN is between REL_LAB and MIN_LAB, the size
1452 changes we are about to make can change the alignment
1453 within the observed offset, therefore we have to break
1454 it up into two parts that are independent. */
1455 if (! flags
.base_after_vec
&& flags
.min_after_vec
)
1457 min_addr
-= align_fuzz (rel_lab
, insn
, rel_align
, 0);
1458 min_addr
-= align_fuzz (insn
, min_lab
, 0, 0);
1461 min_addr
-= align_fuzz (rel_lab
, min_lab
, rel_align
, 0);
1465 if (flags
.base_after_vec
&& ! flags
.min_after_vec
)
1467 min_addr
-= align_fuzz (min_lab
, insn
, 0, ~0);
1468 min_addr
-= align_fuzz (insn
, rel_lab
, 0, ~0);
1471 min_addr
-= align_fuzz (min_lab
, rel_lab
, 0, ~0);
1473 /* Likewise, determine the highest lowest possible value
1474 for the offset of MAX_LAB. */
1475 if (flags
.max_after_base
)
1477 if (! flags
.base_after_vec
&& flags
.max_after_vec
)
1479 max_addr
+= align_fuzz (rel_lab
, insn
, rel_align
, ~0);
1480 max_addr
+= align_fuzz (insn
, max_lab
, 0, ~0);
1483 max_addr
+= align_fuzz (rel_lab
, max_lab
, rel_align
, ~0);
1487 if (flags
.base_after_vec
&& ! flags
.max_after_vec
)
1489 max_addr
+= align_fuzz (max_lab
, insn
, 0, 0);
1490 max_addr
+= align_fuzz (insn
, rel_lab
, 0, 0);
1493 max_addr
+= align_fuzz (max_lab
, rel_lab
, 0, 0);
1495 PUT_MODE (body
, CASE_VECTOR_SHORTEN_MODE (min_addr
- rel_addr
,
1496 max_addr
- rel_addr
,
1498 if (JUMP_TABLES_IN_TEXT_SECTION
1499 #if !defined(READONLY_DATA_SECTION)
1505 = (XVECLEN (body
, 1) * GET_MODE_SIZE (GET_MODE (body
)));
1506 insn_current_address
+= insn_lengths
[uid
];
1507 if (insn_lengths
[uid
] != old_length
)
1508 something_changed
= 1;
1513 #endif /* CASE_VECTOR_SHORTEN_MODE */
1515 if (! (varying_length
[uid
]))
1517 if (GET_CODE (insn
) == INSN
1518 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
1522 body
= PATTERN (insn
);
1523 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
1525 rtx inner_insn
= XVECEXP (body
, 0, i
);
1526 int inner_uid
= INSN_UID (inner_insn
);
1528 INSN_ADDRESSES (inner_uid
) = insn_current_address
;
1530 insn_current_address
+= insn_lengths
[inner_uid
];
1534 insn_current_address
+= insn_lengths
[uid
];
1539 if (GET_CODE (insn
) == INSN
&& GET_CODE (PATTERN (insn
)) == SEQUENCE
)
1543 body
= PATTERN (insn
);
1545 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
1547 rtx inner_insn
= XVECEXP (body
, 0, i
);
1548 int inner_uid
= INSN_UID (inner_insn
);
1551 INSN_ADDRESSES (inner_uid
) = insn_current_address
;
1553 /* insn_current_length returns 0 for insns with a
1554 non-varying length. */
1555 if (! varying_length
[inner_uid
])
1556 inner_length
= insn_lengths
[inner_uid
];
1558 inner_length
= insn_current_length (inner_insn
);
1560 if (inner_length
!= insn_lengths
[inner_uid
])
1562 insn_lengths
[inner_uid
] = inner_length
;
1563 something_changed
= 1;
1565 insn_current_address
+= insn_lengths
[inner_uid
];
1566 new_length
+= inner_length
;
1571 new_length
= insn_current_length (insn
);
1572 insn_current_address
+= new_length
;
1575 #ifdef ADJUST_INSN_LENGTH
1576 /* If needed, do any adjustment. */
1577 tmp_length
= new_length
;
1578 ADJUST_INSN_LENGTH (insn
, new_length
);
1579 insn_current_address
+= (new_length
- tmp_length
);
1582 if (new_length
!= insn_lengths
[uid
])
1584 insn_lengths
[uid
] = new_length
;
1585 something_changed
= 1;
1588 /* For a non-optimizing compile, do only a single pass. */
1593 free (varying_length
);
1595 #endif /* HAVE_ATTR_length */
1598 #ifdef HAVE_ATTR_length
1599 /* Given the body of an INSN known to be generated by an ASM statement, return
1600 the number of machine instructions likely to be generated for this insn.
1601 This is used to compute its length. */
1604 asm_insn_count (body
)
1607 const char *template;
1610 if (GET_CODE (body
) == ASM_INPUT
)
1611 template = XSTR (body
, 0);
1613 template = decode_asm_operands (body
, NULL
, NULL
, NULL
, NULL
);
1615 for (; *template; template++)
1616 if (IS_ASM_LOGICAL_LINE_SEPARATOR (*template) || *template == '\n')
1623 /* Output assembler code for the start of a function,
1624 and initialize some of the variables in this file
1625 for the new function. The label for the function and associated
1626 assembler pseudo-ops have already been output in `assemble_start_function'.
1628 FIRST is the first insn of the rtl for the function being compiled.
1629 FILE is the file to write assembler code to.
1630 OPTIMIZE is nonzero if we should eliminate redundant
1631 test and compare insns. */
1634 final_start_function (first
, file
, optimize
)
1637 int optimize ATTRIBUTE_UNUSED
;
1641 this_is_asm_operands
= 0;
1643 #ifdef NON_SAVING_SETJMP
1644 /* A function that calls setjmp should save and restore all the
1645 call-saved registers on a system where longjmp clobbers them. */
1646 if (NON_SAVING_SETJMP
&& current_function_calls_setjmp
)
1650 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
1651 if (!call_used_regs
[i
])
1652 regs_ever_live
[i
] = 1;
1656 if (NOTE_LINE_NUMBER (first
) != NOTE_INSN_DELETED
)
1657 notice_source_line (first
);
1658 high_block_linenum
= high_function_linenum
= last_linenum
;
1660 (*debug_hooks
->begin_prologue
) (last_linenum
, last_filename
);
1662 #if defined (DWARF2_UNWIND_INFO) || defined (IA64_UNWIND_INFO)
1663 if (write_symbols
!= DWARF2_DEBUG
&& write_symbols
!= VMS_AND_DWARF2_DEBUG
)
1664 dwarf2out_begin_prologue (0, NULL
);
1667 #ifdef LEAF_REG_REMAP
1668 if (current_function_uses_only_leaf_regs
)
1669 leaf_renumber_regs (first
);
1672 /* The Sun386i and perhaps other machines don't work right
1673 if the profiling code comes after the prologue. */
1674 #ifdef PROFILE_BEFORE_PROLOGUE
1675 if (current_function_profile
)
1676 profile_function (file
);
1677 #endif /* PROFILE_BEFORE_PROLOGUE */
1679 #if defined (DWARF2_UNWIND_INFO) && defined (HAVE_prologue)
1680 if (dwarf2out_do_frame ())
1681 dwarf2out_frame_debug (NULL_RTX
);
1684 /* If debugging, assign block numbers to all of the blocks in this
1688 remove_unnecessary_notes ();
1690 number_blocks (current_function_decl
);
1691 /* We never actually put out begin/end notes for the top-level
1692 block in the function. But, conceptually, that block is
1694 TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl
)) = 1;
1697 /* First output the function prologue: code to set up the stack frame. */
1698 (*targetm
.asm_out
.function_prologue
) (file
, get_frame_size ());
1700 #ifdef VMS_DEBUGGING_INFO
1701 /* Output label after the prologue of the function. */
1702 if (write_symbols
== VMS_DEBUG
|| write_symbols
== VMS_AND_DWARF2_DEBUG
)
1703 vmsdbgout_after_prologue ();
1706 /* If the machine represents the prologue as RTL, the profiling code must
1707 be emitted when NOTE_INSN_PROLOGUE_END is scanned. */
1708 #ifdef HAVE_prologue
1709 if (! HAVE_prologue
)
1711 profile_after_prologue (file
);
1715 profile_after_prologue (file
)
1716 FILE *file ATTRIBUTE_UNUSED
;
1718 #ifndef PROFILE_BEFORE_PROLOGUE
1719 if (current_function_profile
)
1720 profile_function (file
);
1721 #endif /* not PROFILE_BEFORE_PROLOGUE */
1725 profile_function (file
)
1726 FILE *file ATTRIBUTE_UNUSED
;
1728 #ifndef NO_PROFILE_COUNTERS
1729 int align
= MIN (BIGGEST_ALIGNMENT
, LONG_TYPE_SIZE
);
1731 #if defined(ASM_OUTPUT_REG_PUSH)
1732 #if defined(STRUCT_VALUE_INCOMING_REGNUM) || defined(STRUCT_VALUE_REGNUM)
1733 int sval
= current_function_returns_struct
;
1735 #if defined(STATIC_CHAIN_INCOMING_REGNUM) || defined(STATIC_CHAIN_REGNUM)
1736 int cxt
= current_function_needs_context
;
1738 #endif /* ASM_OUTPUT_REG_PUSH */
1740 #ifndef NO_PROFILE_COUNTERS
1742 ASM_OUTPUT_ALIGN (file
, floor_log2 (align
/ BITS_PER_UNIT
));
1743 ASM_OUTPUT_INTERNAL_LABEL (file
, "LP", current_function_profile_label_no
);
1744 assemble_integer (const0_rtx
, LONG_TYPE_SIZE
/ BITS_PER_UNIT
, align
, 1);
1747 function_section (current_function_decl
);
1749 #if defined(STRUCT_VALUE_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1751 ASM_OUTPUT_REG_PUSH (file
, STRUCT_VALUE_INCOMING_REGNUM
);
1753 #if defined(STRUCT_VALUE_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1756 ASM_OUTPUT_REG_PUSH (file
, STRUCT_VALUE_REGNUM
);
1761 #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1763 ASM_OUTPUT_REG_PUSH (file
, STATIC_CHAIN_INCOMING_REGNUM
);
1765 #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1768 ASM_OUTPUT_REG_PUSH (file
, STATIC_CHAIN_REGNUM
);
1773 FUNCTION_PROFILER (file
, current_function_profile_label_no
);
1775 #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1777 ASM_OUTPUT_REG_POP (file
, STATIC_CHAIN_INCOMING_REGNUM
);
1779 #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1782 ASM_OUTPUT_REG_POP (file
, STATIC_CHAIN_REGNUM
);
1787 #if defined(STRUCT_VALUE_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1789 ASM_OUTPUT_REG_POP (file
, STRUCT_VALUE_INCOMING_REGNUM
);
1791 #if defined(STRUCT_VALUE_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1794 ASM_OUTPUT_REG_POP (file
, STRUCT_VALUE_REGNUM
);
1800 /* Output assembler code for the end of a function.
1801 For clarity, args are same as those of `final_start_function'
1802 even though not all of them are needed. */
1805 final_end_function ()
1809 (*debug_hooks
->end_function
) (high_function_linenum
);
1811 /* Finally, output the function epilogue:
1812 code to restore the stack frame and return to the caller. */
1813 (*targetm
.asm_out
.function_epilogue
) (asm_out_file
, get_frame_size ());
1815 /* And debug output. */
1816 (*debug_hooks
->end_epilogue
) ();
1818 #if defined (DWARF2_UNWIND_INFO)
1819 if (write_symbols
!= DWARF2_DEBUG
&& write_symbols
!= VMS_AND_DWARF2_DEBUG
1820 && dwarf2out_do_frame ())
1821 dwarf2out_end_epilogue ();
1825 /* Output assembler code for some insns: all or part of a function.
1826 For description of args, see `final_start_function', above.
1828 PRESCAN is 1 if we are not really outputting,
1829 just scanning as if we were outputting.
1830 Prescanning deletes and rearranges insns just like ordinary output.
1831 PRESCAN is -2 if we are outputting after having prescanned.
1832 In this case, don't try to delete or rearrange insns
1833 because that has already been done.
1834 Prescanning is done only on certain machines. */
1837 final (first
, file
, optimize
, prescan
)
1847 last_ignored_compare
= 0;
1850 /* Make a map indicating which line numbers appear in this function.
1851 When producing SDB debugging info, delete troublesome line number
1852 notes from inlined functions in other files as well as duplicate
1853 line number notes. */
1854 #ifdef SDB_DEBUGGING_INFO
1855 if (write_symbols
== SDB_DEBUG
)
1858 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
1859 if (GET_CODE (insn
) == NOTE
&& NOTE_LINE_NUMBER (insn
) > 0)
1861 if ((RTX_INTEGRATED_P (insn
)
1862 && strcmp (NOTE_SOURCE_FILE (insn
), main_input_filename
) != 0)
1864 && NOTE_LINE_NUMBER (insn
) == NOTE_LINE_NUMBER (last
)
1865 && NOTE_SOURCE_FILE (insn
) == NOTE_SOURCE_FILE (last
)))
1867 delete_insn (insn
); /* Use delete_note. */
1871 if (NOTE_LINE_NUMBER (insn
) > max_line
)
1872 max_line
= NOTE_LINE_NUMBER (insn
);
1878 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
1879 if (GET_CODE (insn
) == NOTE
&& NOTE_LINE_NUMBER (insn
) > max_line
)
1880 max_line
= NOTE_LINE_NUMBER (insn
);
1883 line_note_exists
= (char *) xcalloc (max_line
+ 1, sizeof (char));
1885 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
1887 if (INSN_UID (insn
) > max_uid
) /* find largest UID */
1888 max_uid
= INSN_UID (insn
);
1889 if (GET_CODE (insn
) == NOTE
&& NOTE_LINE_NUMBER (insn
) > 0)
1890 line_note_exists
[NOTE_LINE_NUMBER (insn
)] = 1;
1892 /* If CC tracking across branches is enabled, record the insn which
1893 jumps to each branch only reached from one place. */
1894 if (optimize
&& GET_CODE (insn
) == JUMP_INSN
)
1896 rtx lab
= JUMP_LABEL (insn
);
1897 if (lab
&& LABEL_NUSES (lab
) == 1)
1899 LABEL_REFS (lab
) = insn
;
1909 /* Output the insns. */
1910 for (insn
= NEXT_INSN (first
); insn
;)
1912 #ifdef HAVE_ATTR_length
1913 if ((unsigned) INSN_UID (insn
) >= INSN_ADDRESSES_SIZE ())
1916 /* Irritatingly, the reg-stack pass is creating new instructions
1917 and because of REG_DEAD note abuse it has to run after
1918 shorten_branches. Fake address of -1 then. */
1919 insn_current_address
= -1;
1921 /* This can be triggered by bugs elsewhere in the compiler if
1922 new insns are created after init_insn_lengths is called. */
1927 insn_current_address
= INSN_ADDRESSES (INSN_UID (insn
));
1928 #endif /* HAVE_ATTR_length */
1930 insn
= final_scan_insn (insn
, file
, optimize
, prescan
, 0);
1933 /* Store function names for edge-profiling. */
1935 if (profile_arc_flag
)
1937 struct function_list
*new_item
= xmalloc (sizeof (struct function_list
));
1939 /* Add function to linked list. */
1941 *functions_tail
= new_item
;
1942 functions_tail
= &new_item
->next
;
1945 new_item
->cfg_checksum
= profile_info
.current_function_cfg_checksum
;
1946 new_item
->count_edges
= profile_info
.count_edges_instrumented_now
;
1947 new_item
->name
= xstrdup (current_function_name
);
1951 free (line_note_exists
);
1952 line_note_exists
= NULL
;
1956 get_insn_template (code
, insn
)
1960 const void *output
= insn_data
[code
].output
;
1961 switch (insn_data
[code
].output_format
)
1963 case INSN_OUTPUT_FORMAT_SINGLE
:
1964 return (const char *) output
;
1965 case INSN_OUTPUT_FORMAT_MULTI
:
1966 return ((const char *const *) output
)[which_alternative
];
1967 case INSN_OUTPUT_FORMAT_FUNCTION
:
1970 return (*(insn_output_fn
) output
) (recog_data
.operand
, insn
);
1977 /* The final scan for one insn, INSN.
1978 Args are same as in `final', except that INSN
1979 is the insn being scanned.
1980 Value returned is the next insn to be scanned.
1982 NOPEEPHOLES is the flag to disallow peephole processing (currently
1983 used for within delayed branch sequence output). */
1986 final_scan_insn (insn
, file
, optimize
, prescan
, nopeepholes
)
1989 int optimize ATTRIBUTE_UNUSED
;
1991 int nopeepholes ATTRIBUTE_UNUSED
;
1999 /* Ignore deleted insns. These can occur when we split insns (due to a
2000 template of "#") while not optimizing. */
2001 if (INSN_DELETED_P (insn
))
2002 return NEXT_INSN (insn
);
2004 switch (GET_CODE (insn
))
2010 switch (NOTE_LINE_NUMBER (insn
))
2012 case NOTE_INSN_DELETED
:
2013 case NOTE_INSN_LOOP_BEG
:
2014 case NOTE_INSN_LOOP_END
:
2015 case NOTE_INSN_LOOP_END_TOP_COND
:
2016 case NOTE_INSN_LOOP_CONT
:
2017 case NOTE_INSN_LOOP_VTOP
:
2018 case NOTE_INSN_FUNCTION_END
:
2019 case NOTE_INSN_REPEATED_LINE_NUMBER
:
2020 case NOTE_INSN_RANGE_BEG
:
2021 case NOTE_INSN_RANGE_END
:
2022 case NOTE_INSN_LIVE
:
2023 case NOTE_INSN_EXPECTED_VALUE
:
2026 case NOTE_INSN_BASIC_BLOCK
:
2027 #ifdef IA64_UNWIND_INFO
2028 IA64_UNWIND_EMIT (asm_out_file
, insn
);
2031 fprintf (asm_out_file
, "\t%s basic block %d\n",
2032 ASM_COMMENT_START
, NOTE_BASIC_BLOCK (insn
)->index
);
2035 case NOTE_INSN_EH_REGION_BEG
:
2036 ASM_OUTPUT_DEBUG_LABEL (asm_out_file
, "LEHB",
2037 NOTE_EH_HANDLER (insn
));
2040 case NOTE_INSN_EH_REGION_END
:
2041 ASM_OUTPUT_DEBUG_LABEL (asm_out_file
, "LEHE",
2042 NOTE_EH_HANDLER (insn
));
2045 case NOTE_INSN_PROLOGUE_END
:
2046 (*targetm
.asm_out
.function_end_prologue
) (file
);
2047 profile_after_prologue (file
);
2050 case NOTE_INSN_EPILOGUE_BEG
:
2051 (*targetm
.asm_out
.function_begin_epilogue
) (file
);
2054 case NOTE_INSN_FUNCTION_BEG
:
2056 (*debug_hooks
->end_prologue
) (last_linenum
);
2059 case NOTE_INSN_BLOCK_BEG
:
2060 if (debug_info_level
== DINFO_LEVEL_NORMAL
2061 || debug_info_level
== DINFO_LEVEL_VERBOSE
2062 || write_symbols
== DWARF_DEBUG
2063 || write_symbols
== DWARF2_DEBUG
2064 || write_symbols
== VMS_AND_DWARF2_DEBUG
2065 || write_symbols
== VMS_DEBUG
)
2067 int n
= BLOCK_NUMBER (NOTE_BLOCK (insn
));
2071 high_block_linenum
= last_linenum
;
2073 /* Output debugging info about the symbol-block beginning. */
2074 (*debug_hooks
->begin_block
) (last_linenum
, n
);
2076 /* Mark this block as output. */
2077 TREE_ASM_WRITTEN (NOTE_BLOCK (insn
)) = 1;
2081 case NOTE_INSN_BLOCK_END
:
2082 if (debug_info_level
== DINFO_LEVEL_NORMAL
2083 || debug_info_level
== DINFO_LEVEL_VERBOSE
2084 || write_symbols
== DWARF_DEBUG
2085 || write_symbols
== DWARF2_DEBUG
2086 || write_symbols
== VMS_AND_DWARF2_DEBUG
2087 || write_symbols
== VMS_DEBUG
)
2089 int n
= BLOCK_NUMBER (NOTE_BLOCK (insn
));
2093 /* End of a symbol-block. */
2095 if (block_depth
< 0)
2098 (*debug_hooks
->end_block
) (high_block_linenum
, n
);
2102 case NOTE_INSN_DELETED_LABEL
:
2103 /* Emit the label. We may have deleted the CODE_LABEL because
2104 the label could be proved to be unreachable, though still
2105 referenced (in the form of having its address taken. */
2106 ASM_OUTPUT_DEBUG_LABEL (file
, "L", CODE_LABEL_NUMBER (insn
));
2113 if (NOTE_LINE_NUMBER (insn
) <= 0)
2116 /* This note is a line-number. */
2121 /* If there is anything real after this note, output it.
2122 If another line note follows, omit this one. */
2123 for (note
= NEXT_INSN (insn
); note
; note
= NEXT_INSN (note
))
2125 if (GET_CODE (note
) != NOTE
&& GET_CODE (note
) != CODE_LABEL
)
2128 /* These types of notes can be significant
2129 so make sure the preceding line number stays. */
2130 else if (GET_CODE (note
) == NOTE
2131 && (NOTE_LINE_NUMBER (note
) == NOTE_INSN_BLOCK_BEG
2132 || NOTE_LINE_NUMBER (note
) == NOTE_INSN_BLOCK_END
2133 || NOTE_LINE_NUMBER (note
) == NOTE_INSN_FUNCTION_BEG
))
2135 else if (GET_CODE (note
) == NOTE
&& NOTE_LINE_NUMBER (note
) > 0)
2137 /* Another line note follows; we can delete this note
2138 if no intervening line numbers have notes elsewhere. */
2140 for (num
= NOTE_LINE_NUMBER (insn
) + 1;
2141 num
< NOTE_LINE_NUMBER (note
);
2143 if (line_note_exists
[num
])
2146 if (num
>= NOTE_LINE_NUMBER (note
))
2152 /* Output this line note if it is the first or the last line
2156 notice_source_line (insn
);
2157 (*debug_hooks
->source_line
) (last_linenum
, last_filename
);
2165 #if defined (DWARF2_UNWIND_INFO)
2166 if (dwarf2out_do_frame ())
2167 dwarf2out_frame_debug (insn
);
2172 /* The target port might emit labels in the output function for
2173 some insn, e.g. sh.c output_branchy_insn. */
2174 if (CODE_LABEL_NUMBER (insn
) <= max_labelno
)
2176 int align
= LABEL_TO_ALIGNMENT (insn
);
2177 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2178 int max_skip
= LABEL_TO_MAX_SKIP (insn
);
2181 if (align
&& NEXT_INSN (insn
))
2183 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2184 ASM_OUTPUT_MAX_SKIP_ALIGN (file
, align
, max_skip
);
2186 ASM_OUTPUT_ALIGN (file
, align
);
2192 /* If this label is reached from only one place, set the condition
2193 codes from the instruction just before the branch. */
2195 /* Disabled because some insns set cc_status in the C output code
2196 and NOTICE_UPDATE_CC alone can set incorrect status. */
2197 if (0 /* optimize && LABEL_NUSES (insn) == 1*/)
2199 rtx jump
= LABEL_REFS (insn
);
2200 rtx barrier
= prev_nonnote_insn (insn
);
2202 /* If the LABEL_REFS field of this label has been set to point
2203 at a branch, the predecessor of the branch is a regular
2204 insn, and that branch is the only way to reach this label,
2205 set the condition codes based on the branch and its
2207 if (barrier
&& GET_CODE (barrier
) == BARRIER
2208 && jump
&& GET_CODE (jump
) == JUMP_INSN
2209 && (prev
= prev_nonnote_insn (jump
))
2210 && GET_CODE (prev
) == INSN
)
2212 NOTICE_UPDATE_CC (PATTERN (prev
), prev
);
2213 NOTICE_UPDATE_CC (PATTERN (jump
), jump
);
2221 #ifdef FINAL_PRESCAN_LABEL
2222 FINAL_PRESCAN_INSN (insn
, NULL
, 0);
2225 if (LABEL_NAME (insn
))
2226 (*debug_hooks
->label
) (insn
);
2230 fputs (ASM_APP_OFF
, file
);
2233 if (NEXT_INSN (insn
) != 0
2234 && GET_CODE (NEXT_INSN (insn
)) == JUMP_INSN
)
2236 rtx nextbody
= PATTERN (NEXT_INSN (insn
));
2238 /* If this label is followed by a jump-table,
2239 make sure we put the label in the read-only section. Also
2240 possibly write the label and jump table together. */
2242 if (GET_CODE (nextbody
) == ADDR_VEC
2243 || GET_CODE (nextbody
) == ADDR_DIFF_VEC
)
2245 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2246 /* In this case, the case vector is being moved by the
2247 target, so don't output the label at all. Leave that
2248 to the back end macros. */
2250 if (! JUMP_TABLES_IN_TEXT_SECTION
)
2254 readonly_data_section ();
2256 #ifdef ADDR_VEC_ALIGN
2257 log_align
= ADDR_VEC_ALIGN (NEXT_INSN (insn
));
2259 log_align
= exact_log2 (BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
);
2261 ASM_OUTPUT_ALIGN (file
, log_align
);
2264 function_section (current_function_decl
);
2266 #ifdef ASM_OUTPUT_CASE_LABEL
2267 ASM_OUTPUT_CASE_LABEL (file
, "L", CODE_LABEL_NUMBER (insn
),
2270 if (LABEL_ALTERNATE_NAME (insn
))
2271 ASM_OUTPUT_ALTERNATE_LABEL_NAME (file
, insn
);
2273 ASM_OUTPUT_INTERNAL_LABEL (file
, "L", CODE_LABEL_NUMBER (insn
));
2279 if (LABEL_ALTERNATE_NAME (insn
))
2280 ASM_OUTPUT_ALTERNATE_LABEL_NAME (file
, insn
);
2282 ASM_OUTPUT_INTERNAL_LABEL (file
, "L", CODE_LABEL_NUMBER (insn
));
2287 rtx body
= PATTERN (insn
);
2288 int insn_code_number
;
2289 const char *template;
2292 /* An INSN, JUMP_INSN or CALL_INSN.
2293 First check for special kinds that recog doesn't recognize. */
2295 if (GET_CODE (body
) == USE
/* These are just declarations */
2296 || GET_CODE (body
) == CLOBBER
)
2300 /* If there is a REG_CC_SETTER note on this insn, it means that
2301 the setting of the condition code was done in the delay slot
2302 of the insn that branched here. So recover the cc status
2303 from the insn that set it. */
2305 note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
2308 NOTICE_UPDATE_CC (PATTERN (XEXP (note
, 0)), XEXP (note
, 0));
2309 cc_prev_status
= cc_status
;
2313 /* Detect insns that are really jump-tables
2314 and output them as such. */
2316 if (GET_CODE (body
) == ADDR_VEC
|| GET_CODE (body
) == ADDR_DIFF_VEC
)
2318 #if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC))
2327 fputs (ASM_APP_OFF
, file
);
2331 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2332 if (GET_CODE (body
) == ADDR_VEC
)
2334 #ifdef ASM_OUTPUT_ADDR_VEC
2335 ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn
), body
);
2342 #ifdef ASM_OUTPUT_ADDR_DIFF_VEC
2343 ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn
), body
);
2349 vlen
= XVECLEN (body
, GET_CODE (body
) == ADDR_DIFF_VEC
);
2350 for (idx
= 0; idx
< vlen
; idx
++)
2352 if (GET_CODE (body
) == ADDR_VEC
)
2354 #ifdef ASM_OUTPUT_ADDR_VEC_ELT
2355 ASM_OUTPUT_ADDR_VEC_ELT
2356 (file
, CODE_LABEL_NUMBER (XEXP (XVECEXP (body
, 0, idx
), 0)));
2363 #ifdef ASM_OUTPUT_ADDR_DIFF_ELT
2364 ASM_OUTPUT_ADDR_DIFF_ELT
2367 CODE_LABEL_NUMBER (XEXP (XVECEXP (body
, 1, idx
), 0)),
2368 CODE_LABEL_NUMBER (XEXP (XEXP (body
, 0), 0)));
2374 #ifdef ASM_OUTPUT_CASE_END
2375 ASM_OUTPUT_CASE_END (file
,
2376 CODE_LABEL_NUMBER (PREV_INSN (insn
)),
2381 function_section (current_function_decl
);
2386 if (GET_CODE (body
) == ASM_INPUT
)
2388 const char *string
= XSTR (body
, 0);
2390 /* There's no telling what that did to the condition codes. */
2399 fputs (ASM_APP_ON
, file
);
2402 fprintf (asm_out_file
, "\t%s\n", string
);
2407 /* Detect `asm' construct with operands. */
2408 if (asm_noperands (body
) >= 0)
2410 unsigned int noperands
= asm_noperands (body
);
2411 rtx
*ops
= (rtx
*) alloca (noperands
* sizeof (rtx
));
2414 /* There's no telling what that did to the condition codes. */
2419 /* Get out the operand values. */
2420 string
= decode_asm_operands (body
, ops
, NULL
, NULL
, NULL
);
2421 /* Inhibit aborts on what would otherwise be compiler bugs. */
2422 insn_noperands
= noperands
;
2423 this_is_asm_operands
= insn
;
2425 /* Output the insn using them. */
2430 fputs (ASM_APP_ON
, file
);
2433 output_asm_insn (string
, ops
);
2436 this_is_asm_operands
= 0;
2440 if (prescan
<= 0 && app_on
)
2442 fputs (ASM_APP_OFF
, file
);
2446 if (GET_CODE (body
) == SEQUENCE
)
2448 /* A delayed-branch sequence */
2454 final_sequence
= body
;
2456 /* The first insn in this SEQUENCE might be a JUMP_INSN that will
2457 force the restoration of a comparison that was previously
2458 thought unnecessary. If that happens, cancel this sequence
2459 and cause that insn to be restored. */
2461 next
= final_scan_insn (XVECEXP (body
, 0, 0), file
, 0, prescan
, 1);
2462 if (next
!= XVECEXP (body
, 0, 1))
2468 for (i
= 1; i
< XVECLEN (body
, 0); i
++)
2470 rtx insn
= XVECEXP (body
, 0, i
);
2471 rtx next
= NEXT_INSN (insn
);
2472 /* We loop in case any instruction in a delay slot gets
2475 insn
= final_scan_insn (insn
, file
, 0, prescan
, 1);
2476 while (insn
!= next
);
2478 #ifdef DBR_OUTPUT_SEQEND
2479 DBR_OUTPUT_SEQEND (file
);
2483 /* If the insn requiring the delay slot was a CALL_INSN, the
2484 insns in the delay slot are actually executed before the
2485 called function. Hence we don't preserve any CC-setting
2486 actions in these insns and the CC must be marked as being
2487 clobbered by the function. */
2488 if (GET_CODE (XVECEXP (body
, 0, 0)) == CALL_INSN
)
2495 /* We have a real machine instruction as rtl. */
2497 body
= PATTERN (insn
);
2500 set
= single_set (insn
);
2502 /* Check for redundant test and compare instructions
2503 (when the condition codes are already set up as desired).
2504 This is done only when optimizing; if not optimizing,
2505 it should be possible for the user to alter a variable
2506 with the debugger in between statements
2507 and the next statement should reexamine the variable
2508 to compute the condition codes. */
2513 rtx set
= single_set (insn
);
2517 && GET_CODE (SET_DEST (set
)) == CC0
2518 && insn
!= last_ignored_compare
)
2520 if (GET_CODE (SET_SRC (set
)) == SUBREG
)
2521 SET_SRC (set
) = alter_subreg (&SET_SRC (set
));
2522 else if (GET_CODE (SET_SRC (set
)) == COMPARE
)
2524 if (GET_CODE (XEXP (SET_SRC (set
), 0)) == SUBREG
)
2525 XEXP (SET_SRC (set
), 0)
2526 = alter_subreg (&XEXP (SET_SRC (set
), 0));
2527 if (GET_CODE (XEXP (SET_SRC (set
), 1)) == SUBREG
)
2528 XEXP (SET_SRC (set
), 1)
2529 = alter_subreg (&XEXP (SET_SRC (set
), 1));
2531 if ((cc_status
.value1
!= 0
2532 && rtx_equal_p (SET_SRC (set
), cc_status
.value1
))
2533 || (cc_status
.value2
!= 0
2534 && rtx_equal_p (SET_SRC (set
), cc_status
.value2
)))
2536 /* Don't delete insn if it has an addressing side-effect. */
2537 if (! FIND_REG_INC_NOTE (insn
, NULL_RTX
)
2538 /* or if anything in it is volatile. */
2539 && ! volatile_refs_p (PATTERN (insn
)))
2541 /* We don't really delete the insn; just ignore it. */
2542 last_ignored_compare
= insn
;
2551 /* Don't bother outputting obvious no-ops, even without -O.
2552 This optimization is fast and doesn't interfere with debugging.
2553 Don't do this if the insn is in a delay slot, since this
2554 will cause an improper number of delay insns to be written. */
2555 if (final_sequence
== 0
2557 && GET_CODE (insn
) == INSN
&& GET_CODE (body
) == SET
2558 && GET_CODE (SET_SRC (body
)) == REG
2559 && GET_CODE (SET_DEST (body
)) == REG
2560 && REGNO (SET_SRC (body
)) == REGNO (SET_DEST (body
)))
2565 /* If this is a conditional branch, maybe modify it
2566 if the cc's are in a nonstandard state
2567 so that it accomplishes the same thing that it would
2568 do straightforwardly if the cc's were set up normally. */
2570 if (cc_status
.flags
!= 0
2571 && GET_CODE (insn
) == JUMP_INSN
2572 && GET_CODE (body
) == SET
2573 && SET_DEST (body
) == pc_rtx
2574 && GET_CODE (SET_SRC (body
)) == IF_THEN_ELSE
2575 && GET_RTX_CLASS (GET_CODE (XEXP (SET_SRC (body
), 0))) == '<'
2576 && XEXP (XEXP (SET_SRC (body
), 0), 0) == cc0_rtx
2577 /* This is done during prescan; it is not done again
2578 in final scan when prescan has been done. */
2581 /* This function may alter the contents of its argument
2582 and clear some of the cc_status.flags bits.
2583 It may also return 1 meaning condition now always true
2584 or -1 meaning condition now always false
2585 or 2 meaning condition nontrivial but altered. */
2586 int result
= alter_cond (XEXP (SET_SRC (body
), 0));
2587 /* If condition now has fixed value, replace the IF_THEN_ELSE
2588 with its then-operand or its else-operand. */
2590 SET_SRC (body
) = XEXP (SET_SRC (body
), 1);
2592 SET_SRC (body
) = XEXP (SET_SRC (body
), 2);
2594 /* The jump is now either unconditional or a no-op.
2595 If it has become a no-op, don't try to output it.
2596 (It would not be recognized.) */
2597 if (SET_SRC (body
) == pc_rtx
)
2602 else if (GET_CODE (SET_SRC (body
)) == RETURN
)
2603 /* Replace (set (pc) (return)) with (return). */
2604 PATTERN (insn
) = body
= SET_SRC (body
);
2606 /* Rerecognize the instruction if it has changed. */
2608 INSN_CODE (insn
) = -1;
2611 /* Make same adjustments to instructions that examine the
2612 condition codes without jumping and instructions that
2613 handle conditional moves (if this machine has either one). */
2615 if (cc_status
.flags
!= 0
2618 rtx cond_rtx
, then_rtx
, else_rtx
;
2620 if (GET_CODE (insn
) != JUMP_INSN
2621 && GET_CODE (SET_SRC (set
)) == IF_THEN_ELSE
)
2623 cond_rtx
= XEXP (SET_SRC (set
), 0);
2624 then_rtx
= XEXP (SET_SRC (set
), 1);
2625 else_rtx
= XEXP (SET_SRC (set
), 2);
2629 cond_rtx
= SET_SRC (set
);
2630 then_rtx
= const_true_rtx
;
2631 else_rtx
= const0_rtx
;
2634 switch (GET_CODE (cond_rtx
))
2648 if (XEXP (cond_rtx
, 0) != cc0_rtx
)
2650 result
= alter_cond (cond_rtx
);
2652 validate_change (insn
, &SET_SRC (set
), then_rtx
, 0);
2653 else if (result
== -1)
2654 validate_change (insn
, &SET_SRC (set
), else_rtx
, 0);
2655 else if (result
== 2)
2656 INSN_CODE (insn
) = -1;
2657 if (SET_DEST (set
) == SET_SRC (set
))
2669 #ifdef HAVE_peephole
2670 /* Do machine-specific peephole optimizations if desired. */
2672 if (optimize
&& !flag_no_peephole
&& !nopeepholes
)
2674 rtx next
= peephole (insn
);
2675 /* When peepholing, if there were notes within the peephole,
2676 emit them before the peephole. */
2677 if (next
!= 0 && next
!= NEXT_INSN (insn
))
2679 rtx prev
= PREV_INSN (insn
);
2681 for (note
= NEXT_INSN (insn
); note
!= next
;
2682 note
= NEXT_INSN (note
))
2683 final_scan_insn (note
, file
, optimize
, prescan
, nopeepholes
);
2685 /* In case this is prescan, put the notes
2686 in proper position for later rescan. */
2687 note
= NEXT_INSN (insn
);
2688 PREV_INSN (note
) = prev
;
2689 NEXT_INSN (prev
) = note
;
2690 NEXT_INSN (PREV_INSN (next
)) = insn
;
2691 PREV_INSN (insn
) = PREV_INSN (next
);
2692 NEXT_INSN (insn
) = next
;
2693 PREV_INSN (next
) = insn
;
2696 /* PEEPHOLE might have changed this. */
2697 body
= PATTERN (insn
);
2701 /* Try to recognize the instruction.
2702 If successful, verify that the operands satisfy the
2703 constraints for the instruction. Crash if they don't,
2704 since `reload' should have changed them so that they do. */
2706 insn_code_number
= recog_memoized (insn
);
2707 cleanup_subreg_operands (insn
);
2709 /* Dump the insn in the assembly for debugging. */
2710 if (flag_dump_rtl_in_asm
)
2712 print_rtx_head
= ASM_COMMENT_START
;
2713 print_rtl_single (asm_out_file
, insn
);
2714 print_rtx_head
= "";
2717 if (! constrain_operands_cached (1))
2718 fatal_insn_not_found (insn
);
2720 /* Some target machines need to prescan each insn before
2723 #ifdef FINAL_PRESCAN_INSN
2724 FINAL_PRESCAN_INSN (insn
, recog_data
.operand
, recog_data
.n_operands
);
2727 #ifdef HAVE_conditional_execution
2728 if (GET_CODE (PATTERN (insn
)) == COND_EXEC
)
2729 current_insn_predicate
= COND_EXEC_TEST (PATTERN (insn
));
2731 current_insn_predicate
= NULL_RTX
;
2735 cc_prev_status
= cc_status
;
2737 /* Update `cc_status' for this instruction.
2738 The instruction's output routine may change it further.
2739 If the output routine for a jump insn needs to depend
2740 on the cc status, it should look at cc_prev_status. */
2742 NOTICE_UPDATE_CC (body
, insn
);
2745 current_output_insn
= debug_insn
= insn
;
2747 #if defined (DWARF2_UNWIND_INFO)
2748 if (GET_CODE (insn
) == CALL_INSN
&& dwarf2out_do_frame ())
2749 dwarf2out_frame_debug (insn
);
2752 /* Find the proper template for this insn. */
2753 template = get_insn_template (insn_code_number
, insn
);
2755 /* If the C code returns 0, it means that it is a jump insn
2756 which follows a deleted test insn, and that test insn
2757 needs to be reinserted. */
2762 if (prev_nonnote_insn (insn
) != last_ignored_compare
)
2766 /* We have already processed the notes between the setter and
2767 the user. Make sure we don't process them again, this is
2768 particularly important if one of the notes is a block
2769 scope note or an EH note. */
2771 prev
!= last_ignored_compare
;
2772 prev
= PREV_INSN (prev
))
2774 if (GET_CODE (prev
) == NOTE
)
2775 delete_insn (prev
); /* Use delete_note. */
2781 /* If the template is the string "#", it means that this insn must
2783 if (template[0] == '#' && template[1] == '\0')
2785 rtx
new = try_split (body
, insn
, 0);
2787 /* If we didn't split the insn, go away. */
2788 if (new == insn
&& PATTERN (new) == body
)
2789 fatal_insn ("could not split insn", insn
);
2791 #ifdef HAVE_ATTR_length
2792 /* This instruction should have been split in shorten_branches,
2793 to ensure that we would have valid length info for the
2805 #ifdef IA64_UNWIND_INFO
2806 IA64_UNWIND_EMIT (asm_out_file
, insn
);
2808 /* Output assembler code from the template. */
2810 output_asm_insn (template, recog_data
.operand
);
2812 #if defined (DWARF2_UNWIND_INFO)
2813 #if defined (HAVE_prologue)
2814 if (GET_CODE (insn
) == INSN
&& dwarf2out_do_frame ())
2815 dwarf2out_frame_debug (insn
);
2817 if (!ACCUMULATE_OUTGOING_ARGS
2818 && GET_CODE (insn
) == INSN
2819 && dwarf2out_do_frame ())
2820 dwarf2out_frame_debug (insn
);
2825 /* It's not at all clear why we did this and doing so interferes
2826 with tests we'd like to do to use REG_WAS_0 notes, so let's try
2829 /* Mark this insn as having been output. */
2830 INSN_DELETED_P (insn
) = 1;
2833 /* Emit information for vtable gc. */
2834 note
= find_reg_note (insn
, REG_VTABLE_REF
, NULL_RTX
);
2836 assemble_vtable_entry (XEXP (XEXP (note
, 0), 0),
2837 INTVAL (XEXP (XEXP (note
, 0), 1)));
2839 current_output_insn
= debug_insn
= 0;
2842 return NEXT_INSN (insn
);
2845 /* Output debugging info to the assembler file FILE
2846 based on the NOTE-insn INSN, assumed to be a line number. */
2849 notice_source_line (insn
)
2852 const char *filename
= NOTE_SOURCE_FILE (insn
);
2854 last_filename
= filename
;
2855 last_linenum
= NOTE_LINE_NUMBER (insn
);
2856 high_block_linenum
= MAX (last_linenum
, high_block_linenum
);
2857 high_function_linenum
= MAX (last_linenum
, high_function_linenum
);
2860 /* For each operand in INSN, simplify (subreg (reg)) so that it refers
2861 directly to the desired hard register. */
2864 cleanup_subreg_operands (insn
)
2868 extract_insn_cached (insn
);
2869 for (i
= 0; i
< recog_data
.n_operands
; i
++)
2871 /* The following test cannot use recog_data.operand when tesing
2872 for a SUBREG: the underlying object might have been changed
2873 already if we are inside a match_operator expression that
2874 matches the else clause. Instead we test the underlying
2875 expression directly. */
2876 if (GET_CODE (*recog_data
.operand_loc
[i
]) == SUBREG
)
2877 recog_data
.operand
[i
] = alter_subreg (recog_data
.operand_loc
[i
]);
2878 else if (GET_CODE (recog_data
.operand
[i
]) == PLUS
2879 || GET_CODE (recog_data
.operand
[i
]) == MULT
2880 || GET_CODE (recog_data
.operand
[i
]) == MEM
)
2881 recog_data
.operand
[i
] = walk_alter_subreg (recog_data
.operand_loc
[i
]);
2884 for (i
= 0; i
< recog_data
.n_dups
; i
++)
2886 if (GET_CODE (*recog_data
.dup_loc
[i
]) == SUBREG
)
2887 *recog_data
.dup_loc
[i
] = alter_subreg (recog_data
.dup_loc
[i
]);
2888 else if (GET_CODE (*recog_data
.dup_loc
[i
]) == PLUS
2889 || GET_CODE (*recog_data
.dup_loc
[i
]) == MULT
2890 || GET_CODE (*recog_data
.dup_loc
[i
]) == MEM
)
2891 *recog_data
.dup_loc
[i
] = walk_alter_subreg (recog_data
.dup_loc
[i
]);
2895 /* If X is a SUBREG, replace it with a REG or a MEM,
2896 based on the thing it is a subreg of. */
2903 rtx y
= SUBREG_REG (x
);
2905 /* simplify_subreg does not remove subreg from volatile references.
2906 We are required to. */
2907 if (GET_CODE (y
) == MEM
)
2908 *xp
= adjust_address (y
, GET_MODE (x
), SUBREG_BYTE (x
));
2911 rtx
new = simplify_subreg (GET_MODE (x
), y
, GET_MODE (y
),
2916 /* Simplify_subreg can't handle some REG cases, but we have to. */
2917 else if (GET_CODE (y
) == REG
)
2919 unsigned int regno
= subreg_hard_regno (x
, 1);
2922 ORIGINAL_REGNO (x
) = ORIGINAL_REGNO (y
);
2923 /* This field has a different meaning for REGs and SUBREGs. Make
2924 sure to clear it! */
2925 RTX_FLAG (x
, used
) = 0;
2934 /* Do alter_subreg on all the SUBREGs contained in X. */
2937 walk_alter_subreg (xp
)
2941 switch (GET_CODE (x
))
2945 XEXP (x
, 0) = walk_alter_subreg (&XEXP (x
, 0));
2946 XEXP (x
, 1) = walk_alter_subreg (&XEXP (x
, 1));
2950 XEXP (x
, 0) = walk_alter_subreg (&XEXP (x
, 0));
2954 return alter_subreg (xp
);
2965 /* Given BODY, the body of a jump instruction, alter the jump condition
2966 as required by the bits that are set in cc_status.flags.
2967 Not all of the bits there can be handled at this level in all cases.
2969 The value is normally 0.
2970 1 means that the condition has become always true.
2971 -1 means that the condition has become always false.
2972 2 means that COND has been altered. */
2980 if (cc_status
.flags
& CC_REVERSED
)
2983 PUT_CODE (cond
, swap_condition (GET_CODE (cond
)));
2986 if (cc_status
.flags
& CC_INVERTED
)
2989 PUT_CODE (cond
, reverse_condition (GET_CODE (cond
)));
2992 if (cc_status
.flags
& CC_NOT_POSITIVE
)
2993 switch (GET_CODE (cond
))
2998 /* Jump becomes unconditional. */
3004 /* Jump becomes no-op. */
3008 PUT_CODE (cond
, EQ
);
3013 PUT_CODE (cond
, NE
);
3021 if (cc_status
.flags
& CC_NOT_NEGATIVE
)
3022 switch (GET_CODE (cond
))
3026 /* Jump becomes unconditional. */
3031 /* Jump becomes no-op. */
3036 PUT_CODE (cond
, EQ
);
3042 PUT_CODE (cond
, NE
);
3050 if (cc_status
.flags
& CC_NO_OVERFLOW
)
3051 switch (GET_CODE (cond
))
3054 /* Jump becomes unconditional. */
3058 PUT_CODE (cond
, EQ
);
3063 PUT_CODE (cond
, NE
);
3068 /* Jump becomes no-op. */
3075 if (cc_status
.flags
& (CC_Z_IN_NOT_N
| CC_Z_IN_N
))
3076 switch (GET_CODE (cond
))
3082 PUT_CODE (cond
, cc_status
.flags
& CC_Z_IN_N
? GE
: LT
);
3087 PUT_CODE (cond
, cc_status
.flags
& CC_Z_IN_N
? LT
: GE
);
3092 if (cc_status
.flags
& CC_NOT_SIGNED
)
3093 /* The flags are valid if signed condition operators are converted
3095 switch (GET_CODE (cond
))
3098 PUT_CODE (cond
, LEU
);
3103 PUT_CODE (cond
, LTU
);
3108 PUT_CODE (cond
, GTU
);
3113 PUT_CODE (cond
, GEU
);
3125 /* Report inconsistency between the assembler template and the operands.
3126 In an `asm', it's the user's fault; otherwise, the compiler's fault. */
3129 output_operand_lossage
VPARAMS ((const char *msgid
, ...))
3133 const char *pfx_str
;
3134 VA_OPEN (ap
, msgid
);
3135 VA_FIXEDARG (ap
, const char *, msgid
);
3137 pfx_str
= this_is_asm_operands
? _("invalid `asm': ") : "output_operand: ";
3138 asprintf (&fmt_string
, "%s%s", pfx_str
, _(msgid
));
3139 vasprintf (&new_message
, fmt_string
, ap
);
3141 if (this_is_asm_operands
)
3142 error_for_asm (this_is_asm_operands
, "%s", new_message
);
3144 internal_error ("%s", new_message
);
3151 /* Output of assembler code from a template, and its subroutines. */
3153 /* Annotate the assembly with a comment describing the pattern and
3154 alternative used. */
3161 int num
= INSN_CODE (debug_insn
);
3162 fprintf (asm_out_file
, "\t%s %d\t%s",
3163 ASM_COMMENT_START
, INSN_UID (debug_insn
),
3164 insn_data
[num
].name
);
3165 if (insn_data
[num
].n_alternatives
> 1)
3166 fprintf (asm_out_file
, "/%d", which_alternative
+ 1);
3167 #ifdef HAVE_ATTR_length
3168 fprintf (asm_out_file
, "\t[length = %d]",
3169 get_attr_length (debug_insn
));
3171 /* Clear this so only the first assembler insn
3172 of any rtl insn will get the special comment for -dp. */
3177 /* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it
3178 or its address, return that expr . Set *PADDRESSP to 1 if the expr
3179 corresponds to the address of the object and 0 if to the object. */
3182 get_mem_expr_from_op (op
, paddressp
)
3191 if (GET_CODE (op
) == REG
&& ORIGINAL_REGNO (op
) >= FIRST_PSEUDO_REGISTER
)
3192 return REGNO_DECL (ORIGINAL_REGNO (op
));
3193 else if (GET_CODE (op
) != MEM
)
3196 if (MEM_EXPR (op
) != 0)
3197 return MEM_EXPR (op
);
3199 /* Otherwise we have an address, so indicate it and look at the address. */
3203 /* First check if we have a decl for the address, then look at the right side
3204 if it is a PLUS. Otherwise, strip off arithmetic and keep looking.
3205 But don't allow the address to itself be indirect. */
3206 if ((expr
= get_mem_expr_from_op (op
, &inner_addressp
)) && ! inner_addressp
)
3208 else if (GET_CODE (op
) == PLUS
3209 && (expr
= get_mem_expr_from_op (XEXP (op
, 1), &inner_addressp
)))
3212 while (GET_RTX_CLASS (GET_CODE (op
)) == '1'
3213 || GET_RTX_CLASS (GET_CODE (op
)) == '2')
3216 expr
= get_mem_expr_from_op (op
, &inner_addressp
);
3217 return inner_addressp
? 0 : expr
;
3220 /* Output operand names for assembler instructions. OPERANDS is the
3221 operand vector, OPORDER is the order to write the operands, and NOPS
3222 is the number of operands to write. */
3225 output_asm_operand_names (operands
, oporder
, nops
)
3233 for (i
= 0; i
< nops
; i
++)
3236 tree expr
= get_mem_expr_from_op (operands
[oporder
[i
]], &addressp
);
3240 fprintf (asm_out_file
, "%c%s %s",
3241 wrote
? ',' : '\t', wrote
? "" : ASM_COMMENT_START
,
3242 addressp
? "*" : "");
3243 print_mem_expr (asm_out_file
, expr
);
3249 /* Output text from TEMPLATE to the assembler output file,
3250 obeying %-directions to substitute operands taken from
3251 the vector OPERANDS.
3253 %N (for N a digit) means print operand N in usual manner.
3254 %lN means require operand N to be a CODE_LABEL or LABEL_REF
3255 and print the label name with no punctuation.
3256 %cN means require operand N to be a constant
3257 and print the constant expression with no punctuation.
3258 %aN means expect operand N to be a memory address
3259 (not a memory reference!) and print a reference
3261 %nN means expect operand N to be a constant
3262 and print a constant expression for minus the value
3263 of the operand, with no other punctuation. */
3266 output_asm_insn (template, operands
)
3267 const char *template;
3272 #ifdef ASSEMBLER_DIALECT
3275 int oporder
[MAX_RECOG_OPERANDS
];
3276 char opoutput
[MAX_RECOG_OPERANDS
];
3279 /* An insn may return a null string template
3280 in a case where no assembler code is needed. */
3284 memset (opoutput
, 0, sizeof opoutput
);
3286 putc ('\t', asm_out_file
);
3288 #ifdef ASM_OUTPUT_OPCODE
3289 ASM_OUTPUT_OPCODE (asm_out_file
, p
);
3296 if (flag_verbose_asm
)
3297 output_asm_operand_names (operands
, oporder
, ops
);
3298 if (flag_print_asm_name
)
3302 memset (opoutput
, 0, sizeof opoutput
);
3304 putc (c
, asm_out_file
);
3305 #ifdef ASM_OUTPUT_OPCODE
3306 while ((c
= *p
) == '\t')
3308 putc (c
, asm_out_file
);
3311 ASM_OUTPUT_OPCODE (asm_out_file
, p
);
3315 #ifdef ASSEMBLER_DIALECT
3321 output_operand_lossage ("nested assembly dialect alternatives");
3325 /* If we want the first dialect, do nothing. Otherwise, skip
3326 DIALECT_NUMBER of strings ending with '|'. */
3327 for (i
= 0; i
< dialect_number
; i
++)
3329 while (*p
&& *p
!= '}' && *p
++ != '|')
3338 output_operand_lossage ("unterminated assembly dialect alternative");
3345 /* Skip to close brace. */
3350 output_operand_lossage ("unterminated assembly dialect alternative");
3354 while (*p
++ != '}');
3358 putc (c
, asm_out_file
);
3363 putc (c
, asm_out_file
);
3369 /* %% outputs a single %. */
3373 putc (c
, asm_out_file
);
3375 /* %= outputs a number which is unique to each insn in the entire
3376 compilation. This is useful for making local labels that are
3377 referred to more than once in a given insn. */
3381 fprintf (asm_out_file
, "%d", insn_counter
);
3383 /* % followed by a letter and some digits
3384 outputs an operand in a special way depending on the letter.
3385 Letters `acln' are implemented directly.
3386 Other letters are passed to `output_operand' so that
3387 the PRINT_OPERAND macro can define them. */
3388 else if (ISALPHA (*p
))
3394 output_operand_lossage ("operand number missing after %%-letter");
3395 else if (this_is_asm_operands
3396 && (c
< 0 || (unsigned int) c
>= insn_noperands
))
3397 output_operand_lossage ("operand number out of range");
3398 else if (letter
== 'l')
3399 output_asm_label (operands
[c
]);
3400 else if (letter
== 'a')
3401 output_address (operands
[c
]);
3402 else if (letter
== 'c')
3404 if (CONSTANT_ADDRESS_P (operands
[c
]))
3405 output_addr_const (asm_out_file
, operands
[c
]);
3407 output_operand (operands
[c
], 'c');
3409 else if (letter
== 'n')
3411 if (GET_CODE (operands
[c
]) == CONST_INT
)
3412 fprintf (asm_out_file
, HOST_WIDE_INT_PRINT_DEC
,
3413 - INTVAL (operands
[c
]));
3416 putc ('-', asm_out_file
);
3417 output_addr_const (asm_out_file
, operands
[c
]);
3421 output_operand (operands
[c
], letter
);
3427 while (ISDIGIT (c
= *p
))
3430 /* % followed by a digit outputs an operand the default way. */
3431 else if (ISDIGIT (*p
))
3434 if (this_is_asm_operands
3435 && (c
< 0 || (unsigned int) c
>= insn_noperands
))
3436 output_operand_lossage ("operand number out of range");
3438 output_operand (operands
[c
], 0);
3444 while (ISDIGIT (c
= *p
))
3447 /* % followed by punctuation: output something for that
3448 punctuation character alone, with no operand.
3449 The PRINT_OPERAND macro decides what is actually done. */
3450 #ifdef PRINT_OPERAND_PUNCT_VALID_P
3451 else if (PRINT_OPERAND_PUNCT_VALID_P ((unsigned char) *p
))
3452 output_operand (NULL_RTX
, *p
++);
3455 output_operand_lossage ("invalid %%-code");
3459 putc (c
, asm_out_file
);
3462 /* Write out the variable names for operands, if we know them. */
3463 if (flag_verbose_asm
)
3464 output_asm_operand_names (operands
, oporder
, ops
);
3465 if (flag_print_asm_name
)
3468 putc ('\n', asm_out_file
);
3471 /* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */
3474 output_asm_label (x
)
3479 if (GET_CODE (x
) == LABEL_REF
)
3481 if (GET_CODE (x
) == CODE_LABEL
3482 || (GET_CODE (x
) == NOTE
3483 && NOTE_LINE_NUMBER (x
) == NOTE_INSN_DELETED_LABEL
))
3484 ASM_GENERATE_INTERNAL_LABEL (buf
, "L", CODE_LABEL_NUMBER (x
));
3486 output_operand_lossage ("`%%l' operand isn't a label");
3488 assemble_name (asm_out_file
, buf
);
3491 /* Print operand X using machine-dependent assembler syntax.
3492 The macro PRINT_OPERAND is defined just to control this function.
3493 CODE is a non-digit that preceded the operand-number in the % spec,
3494 such as 'z' if the spec was `%z3'. CODE is 0 if there was no char
3495 between the % and the digits.
3496 When CODE is a non-letter, X is 0.
3498 The meanings of the letters are machine-dependent and controlled
3499 by PRINT_OPERAND. */
3502 output_operand (x
, code
)
3504 int code ATTRIBUTE_UNUSED
;
3506 if (x
&& GET_CODE (x
) == SUBREG
)
3507 x
= alter_subreg (&x
);
3509 /* If X is a pseudo-register, abort now rather than writing trash to the
3512 if (x
&& GET_CODE (x
) == REG
&& REGNO (x
) >= FIRST_PSEUDO_REGISTER
)
3515 PRINT_OPERAND (asm_out_file
, x
, code
);
3518 /* Print a memory reference operand for address X
3519 using machine-dependent assembler syntax.
3520 The macro PRINT_OPERAND_ADDRESS exists just to control this function. */
3526 walk_alter_subreg (&x
);
3527 PRINT_OPERAND_ADDRESS (asm_out_file
, x
);
3530 /* Print an integer constant expression in assembler syntax.
3531 Addition and subtraction are the only arithmetic
3532 that may appear in these expressions. */
3535 output_addr_const (file
, x
)
3542 switch (GET_CODE (x
))
3549 #ifdef ASM_OUTPUT_SYMBOL_REF
3550 ASM_OUTPUT_SYMBOL_REF (file
, x
);
3552 assemble_name (file
, XSTR (x
, 0));
3560 ASM_GENERATE_INTERNAL_LABEL (buf
, "L", CODE_LABEL_NUMBER (x
));
3561 #ifdef ASM_OUTPUT_LABEL_REF
3562 ASM_OUTPUT_LABEL_REF (file
, buf
);
3564 assemble_name (file
, buf
);
3569 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, INTVAL (x
));
3573 /* This used to output parentheses around the expression,
3574 but that does not work on the 386 (either ATT or BSD assembler). */
3575 output_addr_const (file
, XEXP (x
, 0));
3579 if (GET_MODE (x
) == VOIDmode
)
3581 /* We can use %d if the number is one word and positive. */
3582 if (CONST_DOUBLE_HIGH (x
))
3583 fprintf (file
, HOST_WIDE_INT_PRINT_DOUBLE_HEX
,
3584 CONST_DOUBLE_HIGH (x
), CONST_DOUBLE_LOW (x
));
3585 else if (CONST_DOUBLE_LOW (x
) < 0)
3586 fprintf (file
, HOST_WIDE_INT_PRINT_HEX
, CONST_DOUBLE_LOW (x
));
3588 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, CONST_DOUBLE_LOW (x
));
3591 /* We can't handle floating point constants;
3592 PRINT_OPERAND must handle them. */
3593 output_operand_lossage ("floating constant misused");
3597 /* Some assemblers need integer constants to appear last (eg masm). */
3598 if (GET_CODE (XEXP (x
, 0)) == CONST_INT
)
3600 output_addr_const (file
, XEXP (x
, 1));
3601 if (INTVAL (XEXP (x
, 0)) >= 0)
3602 fprintf (file
, "+");
3603 output_addr_const (file
, XEXP (x
, 0));
3607 output_addr_const (file
, XEXP (x
, 0));
3608 if (GET_CODE (XEXP (x
, 1)) != CONST_INT
3609 || INTVAL (XEXP (x
, 1)) >= 0)
3610 fprintf (file
, "+");
3611 output_addr_const (file
, XEXP (x
, 1));
3616 /* Avoid outputting things like x-x or x+5-x,
3617 since some assemblers can't handle that. */
3618 x
= simplify_subtraction (x
);
3619 if (GET_CODE (x
) != MINUS
)
3622 output_addr_const (file
, XEXP (x
, 0));
3623 fprintf (file
, "-");
3624 if ((GET_CODE (XEXP (x
, 1)) == CONST_INT
&& INTVAL (XEXP (x
, 1)) >= 0)
3625 || GET_CODE (XEXP (x
, 1)) == PC
3626 || GET_CODE (XEXP (x
, 1)) == SYMBOL_REF
)
3627 output_addr_const (file
, XEXP (x
, 1));
3630 fputs (targetm
.asm_out
.open_paren
, file
);
3631 output_addr_const (file
, XEXP (x
, 1));
3632 fputs (targetm
.asm_out
.close_paren
, file
);
3639 output_addr_const (file
, XEXP (x
, 0));
3643 #ifdef OUTPUT_ADDR_CONST_EXTRA
3644 OUTPUT_ADDR_CONST_EXTRA (file
, x
, fail
);
3649 output_operand_lossage ("invalid expression as operand");
3653 /* A poor man's fprintf, with the added features of %I, %R, %L, and %U.
3654 %R prints the value of REGISTER_PREFIX.
3655 %L prints the value of LOCAL_LABEL_PREFIX.
3656 %U prints the value of USER_LABEL_PREFIX.
3657 %I prints the value of IMMEDIATE_PREFIX.
3658 %O runs ASM_OUTPUT_OPCODE to transform what follows in the string.
3659 Also supported are %d, %x, %s, %e, %f, %g and %%.
3661 We handle alternate assembler dialects here, just like output_asm_insn. */
3664 asm_fprintf
VPARAMS ((FILE *file
, const char *p
, ...))
3669 VA_OPEN (argptr
, p
);
3670 VA_FIXEDARG (argptr
, FILE *, file
);
3671 VA_FIXEDARG (argptr
, const char *, p
);
3678 #ifdef ASSEMBLER_DIALECT
3683 /* If we want the first dialect, do nothing. Otherwise, skip
3684 DIALECT_NUMBER of strings ending with '|'. */
3685 for (i
= 0; i
< dialect_number
; i
++)
3687 while (*p
&& *p
++ != '|')
3697 /* Skip to close brace. */
3698 while (*p
&& *p
++ != '}')
3709 while (ISDIGIT (c
) || c
== '.')
3717 fprintf (file
, "%%");
3720 case 'd': case 'i': case 'u':
3721 case 'x': case 'p': case 'X':
3725 fprintf (file
, buf
, va_arg (argptr
, int));
3729 /* This is a prefix to the 'd', 'i', 'u', 'x', 'p', and 'X' cases,
3730 but we do not check for those cases. It means that the value
3731 is a HOST_WIDE_INT, which may be either `int' or `long'. */
3733 #if HOST_BITS_PER_WIDE_INT == HOST_BITS_PER_INT
3735 #if HOST_BITS_PER_WIDE_INT == HOST_BITS_PER_LONG
3745 fprintf (file
, buf
, va_arg (argptr
, HOST_WIDE_INT
));
3752 fprintf (file
, buf
, va_arg (argptr
, long));
3760 fprintf (file
, buf
, va_arg (argptr
, double));
3766 fprintf (file
, buf
, va_arg (argptr
, char *));
3770 #ifdef ASM_OUTPUT_OPCODE
3771 ASM_OUTPUT_OPCODE (asm_out_file
, p
);
3776 #ifdef REGISTER_PREFIX
3777 fprintf (file
, "%s", REGISTER_PREFIX
);
3782 #ifdef IMMEDIATE_PREFIX
3783 fprintf (file
, "%s", IMMEDIATE_PREFIX
);
3788 #ifdef LOCAL_LABEL_PREFIX
3789 fprintf (file
, "%s", LOCAL_LABEL_PREFIX
);
3794 fputs (user_label_prefix
, file
);
3797 #ifdef ASM_FPRINTF_EXTENSIONS
3798 /* Upper case letters are reserved for general use by asm_fprintf
3799 and so are not available to target specific code. In order to
3800 prevent the ASM_FPRINTF_EXTENSIONS macro from using them then,
3801 they are defined here. As they get turned into real extensions
3802 to asm_fprintf they should be removed from this list. */
3803 case 'A': case 'B': case 'C': case 'D': case 'E':
3804 case 'F': case 'G': case 'H': case 'J': case 'K':
3805 case 'M': case 'N': case 'P': case 'Q': case 'S':
3806 case 'T': case 'V': case 'W': case 'Y': case 'Z':
3809 ASM_FPRINTF_EXTENSIONS (file
, argptr
, p
)
3822 /* Split up a CONST_DOUBLE or integer constant rtx
3823 into two rtx's for single words,
3824 storing in *FIRST the word that comes first in memory in the target
3825 and in *SECOND the other. */
3828 split_double (value
, first
, second
)
3830 rtx
*first
, *second
;
3832 if (GET_CODE (value
) == CONST_INT
)
3834 if (HOST_BITS_PER_WIDE_INT
>= (2 * BITS_PER_WORD
))
3836 /* In this case the CONST_INT holds both target words.
3837 Extract the bits from it into two word-sized pieces.
3838 Sign extend each half to HOST_WIDE_INT. */
3839 unsigned HOST_WIDE_INT low
, high
;
3840 unsigned HOST_WIDE_INT mask
, sign_bit
, sign_extend
;
3842 /* Set sign_bit to the most significant bit of a word. */
3844 sign_bit
<<= BITS_PER_WORD
- 1;
3846 /* Set mask so that all bits of the word are set. We could
3847 have used 1 << BITS_PER_WORD instead of basing the
3848 calculation on sign_bit. However, on machines where
3849 HOST_BITS_PER_WIDE_INT == BITS_PER_WORD, it could cause a
3850 compiler warning, even though the code would never be
3852 mask
= sign_bit
<< 1;
3855 /* Set sign_extend as any remaining bits. */
3856 sign_extend
= ~mask
;
3858 /* Pick the lower word and sign-extend it. */
3859 low
= INTVAL (value
);
3864 /* Pick the higher word, shifted to the least significant
3865 bits, and sign-extend it. */
3866 high
= INTVAL (value
);
3867 high
>>= BITS_PER_WORD
- 1;
3870 if (high
& sign_bit
)
3871 high
|= sign_extend
;
3873 /* Store the words in the target machine order. */
3874 if (WORDS_BIG_ENDIAN
)
3876 *first
= GEN_INT (high
);
3877 *second
= GEN_INT (low
);
3881 *first
= GEN_INT (low
);
3882 *second
= GEN_INT (high
);
3887 /* The rule for using CONST_INT for a wider mode
3888 is that we regard the value as signed.
3889 So sign-extend it. */
3890 rtx high
= (INTVAL (value
) < 0 ? constm1_rtx
: const0_rtx
);
3891 if (WORDS_BIG_ENDIAN
)
3903 else if (GET_CODE (value
) != CONST_DOUBLE
)
3905 if (WORDS_BIG_ENDIAN
)
3907 *first
= const0_rtx
;
3913 *second
= const0_rtx
;
3916 else if (GET_MODE (value
) == VOIDmode
3917 /* This is the old way we did CONST_DOUBLE integers. */
3918 || GET_MODE_CLASS (GET_MODE (value
)) == MODE_INT
)
3920 /* In an integer, the words are defined as most and least significant.
3921 So order them by the target's convention. */
3922 if (WORDS_BIG_ENDIAN
)
3924 *first
= GEN_INT (CONST_DOUBLE_HIGH (value
));
3925 *second
= GEN_INT (CONST_DOUBLE_LOW (value
));
3929 *first
= GEN_INT (CONST_DOUBLE_LOW (value
));
3930 *second
= GEN_INT (CONST_DOUBLE_HIGH (value
));
3937 REAL_VALUE_FROM_CONST_DOUBLE (r
, value
);
3939 /* Note, this converts the REAL_VALUE_TYPE to the target's
3940 format, splits up the floating point double and outputs
3941 exactly 32 bits of it into each of l[0] and l[1] --
3942 not necessarily BITS_PER_WORD bits. */
3943 REAL_VALUE_TO_TARGET_DOUBLE (r
, l
);
3945 /* If 32 bits is an entire word for the target, but not for the host,
3946 then sign-extend on the host so that the number will look the same
3947 way on the host that it would on the target. See for instance
3948 simplify_unary_operation. The #if is needed to avoid compiler
3951 #if HOST_BITS_PER_LONG > 32
3952 if (BITS_PER_WORD
< HOST_BITS_PER_LONG
&& BITS_PER_WORD
== 32)
3954 if (l
[0] & ((long) 1 << 31))
3955 l
[0] |= ((long) (-1) << 32);
3956 if (l
[1] & ((long) 1 << 31))
3957 l
[1] |= ((long) (-1) << 32);
3961 *first
= GEN_INT ((HOST_WIDE_INT
) l
[0]);
3962 *second
= GEN_INT ((HOST_WIDE_INT
) l
[1]);
3966 /* Return nonzero if this function has no function calls. */
3974 if (current_function_profile
|| profile_arc_flag
)
3977 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
3979 if (GET_CODE (insn
) == CALL_INSN
3980 && ! SIBLING_CALL_P (insn
))
3982 if (GET_CODE (insn
) == INSN
3983 && GET_CODE (PATTERN (insn
)) == SEQUENCE
3984 && GET_CODE (XVECEXP (PATTERN (insn
), 0, 0)) == CALL_INSN
3985 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn
), 0, 0)))
3988 for (link
= current_function_epilogue_delay_list
;
3990 link
= XEXP (link
, 1))
3992 insn
= XEXP (link
, 0);
3994 if (GET_CODE (insn
) == CALL_INSN
3995 && ! SIBLING_CALL_P (insn
))
3997 if (GET_CODE (insn
) == INSN
3998 && GET_CODE (PATTERN (insn
)) == SEQUENCE
3999 && GET_CODE (XVECEXP (PATTERN (insn
), 0, 0)) == CALL_INSN
4000 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn
), 0, 0)))
4007 /* Return 1 if branch is an forward branch.
4008 Uses insn_shuid array, so it works only in the final pass. May be used by
4009 output templates to customary add branch prediction hints.
4012 final_forward_branch_p (insn
)
4015 int insn_id
, label_id
;
4018 insn_id
= INSN_SHUID (insn
);
4019 label_id
= INSN_SHUID (JUMP_LABEL (insn
));
4020 /* We've hit some insns that does not have id information available. */
4021 if (!insn_id
|| !label_id
)
4023 return insn_id
< label_id
;
4026 /* On some machines, a function with no call insns
4027 can run faster if it doesn't create its own register window.
4028 When output, the leaf function should use only the "output"
4029 registers. Ordinarily, the function would be compiled to use
4030 the "input" registers to find its arguments; it is a candidate
4031 for leaf treatment if it uses only the "input" registers.
4032 Leaf function treatment means renumbering so the function
4033 uses the "output" registers instead. */
4035 #ifdef LEAF_REGISTERS
4037 /* Return 1 if this function uses only the registers that can be
4038 safely renumbered. */
4041 only_leaf_regs_used ()
4044 char *permitted_reg_in_leaf_functions
= LEAF_REGISTERS
;
4046 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
4047 if ((regs_ever_live
[i
] || global_regs
[i
])
4048 && ! permitted_reg_in_leaf_functions
[i
])
4051 if (current_function_uses_pic_offset_table
4052 && pic_offset_table_rtx
!= 0
4053 && GET_CODE (pic_offset_table_rtx
) == REG
4054 && ! permitted_reg_in_leaf_functions
[REGNO (pic_offset_table_rtx
)])
4060 /* Scan all instructions and renumber all registers into those
4061 available in leaf functions. */
4064 leaf_renumber_regs (first
)
4069 /* Renumber only the actual patterns.
4070 The reg-notes can contain frame pointer refs,
4071 and renumbering them could crash, and should not be needed. */
4072 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
4074 leaf_renumber_regs_insn (PATTERN (insn
));
4075 for (insn
= current_function_epilogue_delay_list
;
4077 insn
= XEXP (insn
, 1))
4078 if (INSN_P (XEXP (insn
, 0)))
4079 leaf_renumber_regs_insn (PATTERN (XEXP (insn
, 0)));
4082 /* Scan IN_RTX and its subexpressions, and renumber all regs into those
4083 available in leaf functions. */
4086 leaf_renumber_regs_insn (in_rtx
)
4090 const char *format_ptr
;
4095 /* Renumber all input-registers into output-registers.
4096 renumbered_regs would be 1 for an output-register;
4099 if (GET_CODE (in_rtx
) == REG
)
4103 /* Don't renumber the same reg twice. */
4107 newreg
= REGNO (in_rtx
);
4108 /* Don't try to renumber pseudo regs. It is possible for a pseudo reg
4109 to reach here as part of a REG_NOTE. */
4110 if (newreg
>= FIRST_PSEUDO_REGISTER
)
4115 newreg
= LEAF_REG_REMAP (newreg
);
4118 regs_ever_live
[REGNO (in_rtx
)] = 0;
4119 regs_ever_live
[newreg
] = 1;
4120 REGNO (in_rtx
) = newreg
;
4124 if (INSN_P (in_rtx
))
4126 /* Inside a SEQUENCE, we find insns.
4127 Renumber just the patterns of these insns,
4128 just as we do for the top-level insns. */
4129 leaf_renumber_regs_insn (PATTERN (in_rtx
));
4133 format_ptr
= GET_RTX_FORMAT (GET_CODE (in_rtx
));
4135 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (in_rtx
)); i
++)
4136 switch (*format_ptr
++)
4139 leaf_renumber_regs_insn (XEXP (in_rtx
, i
));
4143 if (NULL
!= XVEC (in_rtx
, i
))
4145 for (j
= 0; j
< XVECLEN (in_rtx
, i
); j
++)
4146 leaf_renumber_regs_insn (XVECEXP (in_rtx
, i
, j
));