1 /* Convert RTL to assembler code and output it, for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
22 /* This is the final pass of the compiler.
23 It looks at the rtl code for a function and outputs assembler code.
25 Call `final_start_function' to output the assembler code for function entry,
26 `final' to output assembler code for some RTL code,
27 `final_end_function' to output assembler code for function exit.
28 If a function is compiled in several pieces, each piece is
29 output separately with `final'.
31 Some optimizations are also done at this level.
32 Move instructions that were made unnecessary by good register allocation
33 are detected and omitted from the output. (Though most of these
34 are removed by the last jump pass.)
36 Instructions to set the condition codes are omitted when it can be
37 seen that the condition codes already had the desired values.
39 In some cases it is sufficient if the inherited condition codes
40 have related values, but this may require the following insn
41 (the one that tests the condition codes) to be modified.
43 The code for the function prologue and epilogue are generated
44 directly in assembler by the target functions function_prologue and
45 function_epilogue. Those instructions never exist as rtl. */
54 #include "insn-config.h"
55 #include "insn-attr.h"
57 #include "conditions.h"
60 #include "hard-reg-set.h"
67 #include "basic-block.h"
73 #ifdef XCOFF_DEBUGGING_INFO
74 #include "xcoffout.h" /* Needed for external data
75 declarations for e.g. AIX 4.x. */
78 #if defined (DWARF2_UNWIND_INFO) || defined (DWARF2_DEBUGGING_INFO)
79 #include "dwarf2out.h"
82 /* If we aren't using cc0, CC_STATUS_INIT shouldn't exist. So define a
83 null default for it to save conditionalization later. */
84 #ifndef CC_STATUS_INIT
85 #define CC_STATUS_INIT
88 /* How to start an assembler comment. */
89 #ifndef ASM_COMMENT_START
90 #define ASM_COMMENT_START ";#"
93 /* Is the given character a logical line separator for the assembler? */
94 #ifndef IS_ASM_LOGICAL_LINE_SEPARATOR
95 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C) ((C) == ';')
98 #ifndef JUMP_TABLES_IN_TEXT_SECTION
99 #define JUMP_TABLES_IN_TEXT_SECTION 0
102 #if defined(READONLY_DATA_SECTION) || defined(READONLY_DATA_SECTION_ASM_OP)
103 #define HAVE_READONLY_DATA_SECTION 1
105 #define HAVE_READONLY_DATA_SECTION 0
108 /* Last insn processed by final_scan_insn. */
109 static rtx debug_insn
;
110 rtx current_output_insn
;
112 /* Line number of last NOTE. */
113 static int last_linenum
;
115 /* Highest line number in current block. */
116 static int high_block_linenum
;
118 /* Likewise for function. */
119 static int high_function_linenum
;
121 /* Filename of last NOTE. */
122 static const char *last_filename
;
124 extern int length_unit_log
; /* This is defined in insn-attrtab.c. */
126 /* Nonzero while outputting an `asm' with operands.
127 This means that inconsistencies are the user's fault, so don't abort.
128 The precise value is the insn being output, to pass to error_for_asm. */
129 rtx this_is_asm_operands
;
131 /* Number of operands of this insn, for an `asm' with operands. */
132 static unsigned int insn_noperands
;
134 /* Compare optimization flag. */
136 static rtx last_ignored_compare
= 0;
138 /* Flag indicating this insn is the start of a new basic block. */
140 static int new_block
= 1;
142 /* Assign a unique number to each insn that is output.
143 This can be used to generate unique local labels. */
145 static int insn_counter
= 0;
148 /* This variable contains machine-dependent flags (defined in tm.h)
149 set and examined by output routines
150 that describe how to interpret the condition codes properly. */
154 /* During output of an insn, this contains a copy of cc_status
155 from before the insn. */
157 CC_STATUS cc_prev_status
;
160 /* Indexed by hardware reg number, is 1 if that register is ever
161 used in the current function.
163 In life_analysis, or in stupid_life_analysis, this is set
164 up to record the hard regs used explicitly. Reload adds
165 in the hard regs used for holding pseudo regs. Final uses
166 it to generate the code in the function prologue and epilogue
167 to save and restore registers as needed. */
169 char regs_ever_live
[FIRST_PSEUDO_REGISTER
];
171 /* Nonzero means current function must be given a frame pointer.
172 Set in stmt.c if anything is allocated on the stack there.
173 Set in reload1.c if anything is allocated on the stack there. */
175 int frame_pointer_needed
;
177 /* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */
179 static int block_depth
;
181 /* Nonzero if have enabled APP processing of our assembler output. */
185 /* If we are outputting an insn sequence, this contains the sequence rtx.
190 #ifdef ASSEMBLER_DIALECT
192 /* Number of the assembler dialect to use, starting at 0. */
193 static int dialect_number
;
196 /* Indexed by line number, nonzero if there is a note for that line. */
198 static char *line_note_exists
;
200 #ifdef HAVE_conditional_execution
201 /* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */
202 rtx current_insn_predicate
;
207 struct function_list
*next
; /* next function */
208 const char *name
; /* function name */
209 long cfg_checksum
; /* function checksum */
210 long count_edges
; /* number of intrumented edges in this function */
213 static struct function_list
*functions_head
= 0;
214 static struct function_list
**functions_tail
= &functions_head
;
216 #ifdef HAVE_ATTR_length
217 static int asm_insn_count
PARAMS ((rtx
));
219 static void profile_function
PARAMS ((FILE *));
220 static void profile_after_prologue
PARAMS ((FILE *));
221 static void notice_source_line
PARAMS ((rtx
));
222 static rtx walk_alter_subreg
PARAMS ((rtx
*));
223 static void output_asm_name
PARAMS ((void));
224 static tree get_mem_expr_from_op
PARAMS ((rtx
, int *));
225 static void output_asm_operand_names
PARAMS ((rtx
*, int *, int));
226 static void output_operand
PARAMS ((rtx
, int));
227 #ifdef LEAF_REGISTERS
228 static void leaf_renumber_regs
PARAMS ((rtx
));
231 static int alter_cond
PARAMS ((rtx
));
233 #ifndef ADDR_VEC_ALIGN
234 static int final_addr_vec_align
PARAMS ((rtx
));
236 #ifdef HAVE_ATTR_length
237 static int align_fuzz
PARAMS ((rtx
, rtx
, int, unsigned));
240 /* Initialize data in final at the beginning of a compilation. */
243 init_final (filename
)
244 const char *filename ATTRIBUTE_UNUSED
;
249 #ifdef ASSEMBLER_DIALECT
250 dialect_number
= ASSEMBLER_DIALECT
;
254 /* Called at end of source file,
255 to output the arc-profiling table for this entire compilation. */
259 const char *filename
;
261 if (profile_arc_flag
&& profile_info
.count_instrumented_edges
)
264 tree string_type
, string_cst
;
265 tree structure_decl
, structure_value
, structure_pointer_type
;
266 tree field_decl
, decl_chain
, value_chain
;
267 tree sizeof_field_value
, domain_type
;
270 string_type
= build_pointer_type (char_type_node
);
272 /* Libgcc2 bb structure. */
273 structure_decl
= make_node (RECORD_TYPE
);
274 structure_pointer_type
= build_pointer_type (structure_decl
);
276 /* Output the main header, of 7 words:
277 0: 1 if this file is initialized, else 0.
278 1: address of file name (LPBX1).
279 2: address of table of counts (LPBX2).
280 3: number of counts in the table.
281 4: always 0, libgcc2 uses this as a pointer to next ``struct bb''
283 The following are GNU extensions:
285 5: Number of bytes in this header.
286 6: address of table of function checksums (LPBX7). */
290 build_decl (FIELD_DECL
, get_identifier ("zero_word"),
291 long_integer_type_node
);
292 value_chain
= build_tree_list (decl_chain
,
293 convert (long_integer_type_node
,
296 /* Address of filename. */
298 char *cwd
, *da_filename
;
302 build_decl (FIELD_DECL
, get_identifier ("filename"), string_type
);
303 TREE_CHAIN (field_decl
) = decl_chain
;
304 decl_chain
= field_decl
;
307 da_filename_len
= strlen (filename
) + strlen (cwd
) + 4 + 1;
308 da_filename
= (char *) alloca (da_filename_len
);
309 strcpy (da_filename
, cwd
);
310 strcat (da_filename
, "/");
311 strcat (da_filename
, filename
);
312 strip_off_ending (da_filename
, da_filename_len
- 3);
313 strcat (da_filename
, ".da");
314 da_filename_len
= strlen (da_filename
);
315 string_cst
= build_string (da_filename_len
+ 1, da_filename
);
316 domain_type
= build_index_type (build_int_2 (da_filename_len
, 0));
317 TREE_TYPE (string_cst
)
318 = build_array_type (char_type_node
, domain_type
);
319 value_chain
= tree_cons (field_decl
,
320 build1 (ADDR_EXPR
, string_type
, string_cst
),
324 /* Table of counts. */
326 tree gcov_type_type
= make_unsigned_type (GCOV_TYPE_SIZE
);
327 tree gcov_type_pointer_type
= build_pointer_type (gcov_type_type
);
329 = build_index_type (build_int_2 (profile_info
.
330 count_instrumented_edges
- 1, 0));
331 tree gcov_type_array_type
332 = build_array_type (gcov_type_type
, domain_tree
);
333 tree gcov_type_array_pointer_type
334 = build_pointer_type (gcov_type_array_type
);
338 build_decl (FIELD_DECL
, get_identifier ("counts"),
339 gcov_type_pointer_type
);
340 TREE_CHAIN (field_decl
) = decl_chain
;
341 decl_chain
= field_decl
;
345 = build (VAR_DECL
, gcov_type_array_type
, NULL_TREE
, NULL_TREE
);
346 TREE_STATIC (counts_table
) = 1;
347 ASM_GENERATE_INTERNAL_LABEL (name
, "LPBX", 2);
348 DECL_NAME (counts_table
) = get_identifier (name
);
349 assemble_variable (counts_table
, 0, 0, 0);
351 value_chain
= tree_cons (field_decl
,
353 gcov_type_array_pointer_type
,
354 counts_table
), value_chain
);
357 /* Count of the # of instrumented arcs. */
359 = build_decl (FIELD_DECL
, get_identifier ("ncounts"),
360 long_integer_type_node
);
361 TREE_CHAIN (field_decl
) = decl_chain
;
362 decl_chain
= field_decl
;
364 value_chain
= tree_cons (field_decl
,
365 convert (long_integer_type_node
,
366 build_int_2 (profile_info
.
367 count_instrumented_edges
,
369 /* Pointer to the next bb. */
371 = build_decl (FIELD_DECL
, get_identifier ("next"),
372 structure_pointer_type
);
373 TREE_CHAIN (field_decl
) = decl_chain
;
374 decl_chain
= field_decl
;
376 value_chain
= tree_cons (field_decl
, null_pointer_node
, value_chain
);
378 /* sizeof(struct bb). We'll set this after entire structure
381 = build_decl (FIELD_DECL
, get_identifier ("sizeof_bb"),
382 long_integer_type_node
);
383 TREE_CHAIN (field_decl
) = decl_chain
;
384 decl_chain
= field_decl
;
386 sizeof_field_value
= tree_cons (field_decl
, NULL
, value_chain
);
387 value_chain
= sizeof_field_value
;
389 /* struct bb_function []. */
391 struct function_list
*item
;
393 tree checksum_field
, arc_count_field
, name_field
;
395 tree array_value_chain
= NULL_TREE
;
396 tree bb_fn_struct_type
;
397 tree bb_fn_struct_array_type
;
398 tree bb_fn_struct_array_pointer_type
;
399 tree bb_fn_struct_pointer_type
;
400 tree field_value
, field_value_chain
;
402 bb_fn_struct_type
= make_node (RECORD_TYPE
);
404 checksum_field
= build_decl (FIELD_DECL
, get_identifier ("checksum"),
405 long_integer_type_node
);
408 = build_decl (FIELD_DECL
, get_identifier ("arc_count"),
410 TREE_CHAIN (checksum_field
) = arc_count_field
;
413 = build_decl (FIELD_DECL
, get_identifier ("name"), string_type
);
414 TREE_CHAIN (arc_count_field
) = name_field
;
416 TYPE_FIELDS (bb_fn_struct_type
) = checksum_field
;
420 for (item
= functions_head
; item
!= 0; item
= item
->next
)
423 /* Note that the array contains a terminator, hence no - 1. */
424 domain
= build_index_type (build_int_2 (num_nodes
, 0));
426 bb_fn_struct_pointer_type
= build_pointer_type (bb_fn_struct_type
);
427 bb_fn_struct_array_type
428 = build_array_type (bb_fn_struct_type
, domain
);
429 bb_fn_struct_array_pointer_type
430 = build_pointer_type (bb_fn_struct_array_type
);
432 layout_type (bb_fn_struct_type
);
433 layout_type (bb_fn_struct_pointer_type
);
434 layout_type (bb_fn_struct_array_type
);
435 layout_type (bb_fn_struct_array_pointer_type
);
437 for (item
= functions_head
; item
!= 0; item
= item
->next
)
441 /* create constructor for structure. */
443 = build_tree_list (checksum_field
,
444 convert (long_integer_type_node
,
445 build_int_2 (item
->cfg_checksum
, 0)));
447 = tree_cons (arc_count_field
,
448 convert (integer_type_node
,
449 build_int_2 (item
->count_edges
, 0)),
452 name_len
= strlen (item
->name
);
453 string_cst
= build_string (name_len
+ 1, item
->name
);
454 domain_type
= build_index_type (build_int_2 (name_len
, 0));
455 TREE_TYPE (string_cst
)
456 = build_array_type (char_type_node
, domain_type
);
457 field_value_chain
= tree_cons (name_field
,
458 build1 (ADDR_EXPR
, string_type
,
464 = tree_cons (NULL_TREE
, build (CONSTRUCTOR
,
465 bb_fn_struct_type
, NULL_TREE
,
466 nreverse (field_value_chain
)),
470 /* Add terminator. */
471 field_value
= build_tree_list (arc_count_field
,
472 convert (integer_type_node
,
473 build_int_2 (-1, 0)));
475 array_value_chain
= tree_cons (NULL_TREE
,
476 build (CONSTRUCTOR
, bb_fn_struct_type
,
477 NULL_TREE
, field_value
),
481 /* Create constructor for array. */
483 = build_decl (FIELD_DECL
, get_identifier ("function_infos"),
484 bb_fn_struct_pointer_type
);
485 value_chain
= tree_cons (field_decl
,
487 bb_fn_struct_array_pointer_type
,
489 bb_fn_struct_array_type
,
492 (array_value_chain
))),
494 TREE_CHAIN (field_decl
) = decl_chain
;
495 decl_chain
= field_decl
;
498 /* Finish structure. */
499 TYPE_FIELDS (structure_decl
) = nreverse (decl_chain
);
500 layout_type (structure_decl
);
503 = build (VAR_DECL
, structure_decl
, NULL_TREE
, NULL_TREE
);
504 DECL_INITIAL (structure_value
)
505 = build (CONSTRUCTOR
, structure_decl
, NULL_TREE
,
506 nreverse (value_chain
));
507 TREE_STATIC (structure_value
) = 1;
508 ASM_GENERATE_INTERNAL_LABEL (name
, "LPBX", 0);
509 DECL_NAME (structure_value
) = get_identifier (name
);
511 /* Size of this structure. */
512 TREE_VALUE (sizeof_field_value
)
513 = convert (long_integer_type_node
,
514 build_int_2 (int_size_in_bytes (structure_decl
), 0));
516 /* Build structure. */
517 assemble_variable (structure_value
, 0, 0, 0);
521 /* Default target function prologue and epilogue assembler output.
523 If not overridden for epilogue code, then the function body itself
524 contains return instructions wherever needed. */
526 default_function_pro_epilogue (file
, size
)
527 FILE *file ATTRIBUTE_UNUSED
;
528 HOST_WIDE_INT size ATTRIBUTE_UNUSED
;
532 /* Default target hook that outputs nothing to a stream. */
534 no_asm_to_stream (file
)
535 FILE *file ATTRIBUTE_UNUSED
;
539 /* Enable APP processing of subsequent output.
540 Used before the output from an `asm' statement. */
547 fputs (ASM_APP_ON
, asm_out_file
);
552 /* Disable APP processing of subsequent output.
553 Called from varasm.c before most kinds of output. */
560 fputs (ASM_APP_OFF
, asm_out_file
);
565 /* Return the number of slots filled in the current
566 delayed branch sequence (we don't count the insn needing the
567 delay slot). Zero if not in a delayed branch sequence. */
571 dbr_sequence_length ()
573 if (final_sequence
!= 0)
574 return XVECLEN (final_sequence
, 0) - 1;
580 /* The next two pages contain routines used to compute the length of an insn
581 and to shorten branches. */
583 /* Arrays for insn lengths, and addresses. The latter is referenced by
584 `insn_current_length'. */
586 static int *insn_lengths
;
588 #ifdef HAVE_ATTR_length
589 varray_type insn_addresses_
;
592 /* Max uid for which the above arrays are valid. */
593 static int insn_lengths_max_uid
;
595 /* Address of insn being processed. Used by `insn_current_length'. */
596 int insn_current_address
;
598 /* Address of insn being processed in previous iteration. */
599 int insn_last_address
;
601 /* known invariant alignment of insn being processed. */
602 int insn_current_align
;
604 /* After shorten_branches, for any insn, uid_align[INSN_UID (insn)]
605 gives the next following alignment insn that increases the known
606 alignment, or NULL_RTX if there is no such insn.
607 For any alignment obtained this way, we can again index uid_align with
608 its uid to obtain the next following align that in turn increases the
609 alignment, till we reach NULL_RTX; the sequence obtained this way
610 for each insn we'll call the alignment chain of this insn in the following
613 struct label_alignment
619 static rtx
*uid_align
;
620 static int *uid_shuid
;
621 static struct label_alignment
*label_align
;
623 /* Indicate that branch shortening hasn't yet been done. */
637 insn_lengths_max_uid
= 0;
639 #ifdef HAVE_ATTR_length
640 INSN_ADDRESSES_FREE ();
649 /* Obtain the current length of an insn. If branch shortening has been done,
650 get its actual length. Otherwise, get its maximum length. */
653 get_attr_length (insn
)
654 rtx insn ATTRIBUTE_UNUSED
;
656 #ifdef HAVE_ATTR_length
661 if (insn_lengths_max_uid
> INSN_UID (insn
))
662 return insn_lengths
[INSN_UID (insn
)];
664 switch (GET_CODE (insn
))
672 length
= insn_default_length (insn
);
676 body
= PATTERN (insn
);
677 if (GET_CODE (body
) == ADDR_VEC
|| GET_CODE (body
) == ADDR_DIFF_VEC
)
679 /* Alignment is machine-dependent and should be handled by
683 length
= insn_default_length (insn
);
687 body
= PATTERN (insn
);
688 if (GET_CODE (body
) == USE
|| GET_CODE (body
) == CLOBBER
)
691 else if (GET_CODE (body
) == ASM_INPUT
|| asm_noperands (body
) >= 0)
692 length
= asm_insn_count (body
) * insn_default_length (insn
);
693 else if (GET_CODE (body
) == SEQUENCE
)
694 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
695 length
+= get_attr_length (XVECEXP (body
, 0, i
));
697 length
= insn_default_length (insn
);
704 #ifdef ADJUST_INSN_LENGTH
705 ADJUST_INSN_LENGTH (insn
, length
);
708 #else /* not HAVE_ATTR_length */
710 #endif /* not HAVE_ATTR_length */
713 /* Code to handle alignment inside shorten_branches. */
715 /* Here is an explanation how the algorithm in align_fuzz can give
718 Call a sequence of instructions beginning with alignment point X
719 and continuing until the next alignment point `block X'. When `X'
720 is used in an expression, it means the alignment value of the
723 Call the distance between the start of the first insn of block X, and
724 the end of the last insn of block X `IX', for the `inner size of X'.
725 This is clearly the sum of the instruction lengths.
727 Likewise with the next alignment-delimited block following X, which we
730 Call the distance between the start of the first insn of block X, and
731 the start of the first insn of block Y `OX', for the `outer size of X'.
733 The estimated padding is then OX - IX.
735 OX can be safely estimated as
740 OX = round_up(IX, X) + Y - X
742 Clearly est(IX) >= real(IX), because that only depends on the
743 instruction lengths, and those being overestimated is a given.
745 Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so
746 we needn't worry about that when thinking about OX.
748 When X >= Y, the alignment provided by Y adds no uncertainty factor
749 for branch ranges starting before X, so we can just round what we have.
750 But when X < Y, we don't know anything about the, so to speak,
751 `middle bits', so we have to assume the worst when aligning up from an
752 address mod X to one mod Y, which is Y - X. */
755 #define LABEL_ALIGN(LABEL) align_labels_log
758 #ifndef LABEL_ALIGN_MAX_SKIP
759 #define LABEL_ALIGN_MAX_SKIP align_labels_max_skip
763 #define LOOP_ALIGN(LABEL) align_loops_log
766 #ifndef LOOP_ALIGN_MAX_SKIP
767 #define LOOP_ALIGN_MAX_SKIP align_loops_max_skip
770 #ifndef LABEL_ALIGN_AFTER_BARRIER
771 #define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0
774 #ifndef LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP
775 #define LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP 0
779 #define JUMP_ALIGN(LABEL) align_jumps_log
782 #ifndef JUMP_ALIGN_MAX_SKIP
783 #define JUMP_ALIGN_MAX_SKIP align_jumps_max_skip
786 #ifndef ADDR_VEC_ALIGN
788 final_addr_vec_align (addr_vec
)
791 int align
= GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec
)));
793 if (align
> BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
)
794 align
= BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
;
795 return exact_log2 (align
);
799 #define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC)
802 #ifndef INSN_LENGTH_ALIGNMENT
803 #define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log
806 #define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)])
808 static int min_labelno
, max_labelno
;
810 #define LABEL_TO_ALIGNMENT(LABEL) \
811 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment)
813 #define LABEL_TO_MAX_SKIP(LABEL) \
814 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip)
816 /* For the benefit of port specific code do this also as a function. */
819 label_to_alignment (label
)
822 return LABEL_TO_ALIGNMENT (label
);
825 #ifdef HAVE_ATTR_length
826 /* The differences in addresses
827 between a branch and its target might grow or shrink depending on
828 the alignment the start insn of the range (the branch for a forward
829 branch or the label for a backward branch) starts out on; if these
830 differences are used naively, they can even oscillate infinitely.
831 We therefore want to compute a 'worst case' address difference that
832 is independent of the alignment the start insn of the range end
833 up on, and that is at least as large as the actual difference.
834 The function align_fuzz calculates the amount we have to add to the
835 naively computed difference, by traversing the part of the alignment
836 chain of the start insn of the range that is in front of the end insn
837 of the range, and considering for each alignment the maximum amount
838 that it might contribute to a size increase.
840 For casesi tables, we also want to know worst case minimum amounts of
841 address difference, in case a machine description wants to introduce
842 some common offset that is added to all offsets in a table.
843 For this purpose, align_fuzz with a growth argument of 0 computes the
844 appropriate adjustment. */
846 /* Compute the maximum delta by which the difference of the addresses of
847 START and END might grow / shrink due to a different address for start
848 which changes the size of alignment insns between START and END.
849 KNOWN_ALIGN_LOG is the alignment known for START.
850 GROWTH should be ~0 if the objective is to compute potential code size
851 increase, and 0 if the objective is to compute potential shrink.
852 The return value is undefined for any other value of GROWTH. */
855 align_fuzz (start
, end
, known_align_log
, growth
)
860 int uid
= INSN_UID (start
);
862 int known_align
= 1 << known_align_log
;
863 int end_shuid
= INSN_SHUID (end
);
866 for (align_label
= uid_align
[uid
]; align_label
; align_label
= uid_align
[uid
])
868 int align_addr
, new_align
;
870 uid
= INSN_UID (align_label
);
871 align_addr
= INSN_ADDRESSES (uid
) - insn_lengths
[uid
];
872 if (uid_shuid
[uid
] > end_shuid
)
874 known_align_log
= LABEL_TO_ALIGNMENT (align_label
);
875 new_align
= 1 << known_align_log
;
876 if (new_align
< known_align
)
878 fuzz
+= (-align_addr
^ growth
) & (new_align
- known_align
);
879 known_align
= new_align
;
884 /* Compute a worst-case reference address of a branch so that it
885 can be safely used in the presence of aligned labels. Since the
886 size of the branch itself is unknown, the size of the branch is
887 not included in the range. I.e. for a forward branch, the reference
888 address is the end address of the branch as known from the previous
889 branch shortening pass, minus a value to account for possible size
890 increase due to alignment. For a backward branch, it is the start
891 address of the branch as known from the current pass, plus a value
892 to account for possible size increase due to alignment.
893 NB.: Therefore, the maximum offset allowed for backward branches needs
894 to exclude the branch size. */
897 insn_current_reference_address (branch
)
903 if (! INSN_ADDRESSES_SET_P ())
906 seq
= NEXT_INSN (PREV_INSN (branch
));
907 seq_uid
= INSN_UID (seq
);
908 if (GET_CODE (branch
) != JUMP_INSN
)
909 /* This can happen for example on the PA; the objective is to know the
910 offset to address something in front of the start of the function.
911 Thus, we can treat it like a backward branch.
912 We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than
913 any alignment we'd encounter, so we skip the call to align_fuzz. */
914 return insn_current_address
;
915 dest
= JUMP_LABEL (branch
);
917 /* BRANCH has no proper alignment chain set, so use SEQ.
918 BRANCH also has no INSN_SHUID. */
919 if (INSN_SHUID (seq
) < INSN_SHUID (dest
))
921 /* Forward branch. */
922 return (insn_last_address
+ insn_lengths
[seq_uid
]
923 - align_fuzz (seq
, dest
, length_unit_log
, ~0));
927 /* Backward branch. */
928 return (insn_current_address
929 + align_fuzz (dest
, seq
, length_unit_log
, ~0));
932 #endif /* HAVE_ATTR_length */
935 compute_alignments ()
938 int log
, max_skip
, max_log
;
946 max_labelno
= max_label_num ();
947 min_labelno
= get_first_label_num ();
948 label_align
= (struct label_alignment
*)
949 xcalloc (max_labelno
- min_labelno
+ 1, sizeof (struct label_alignment
));
951 /* If not optimizing or optimizing for size, don't assign any alignments. */
952 if (! optimize
|| optimize_size
)
955 for (i
= 0; i
< n_basic_blocks
; i
++)
957 basic_block bb
= BASIC_BLOCK (i
);
958 rtx label
= bb
->head
;
959 int fallthru_frequency
= 0, branch_frequency
= 0, has_fallthru
= 0;
962 if (GET_CODE (label
) != CODE_LABEL
)
964 max_log
= LABEL_ALIGN (label
);
965 max_skip
= LABEL_ALIGN_MAX_SKIP
;
967 for (e
= bb
->pred
; e
; e
= e
->pred_next
)
969 if (e
->flags
& EDGE_FALLTHRU
)
970 has_fallthru
= 1, fallthru_frequency
+= EDGE_FREQUENCY (e
);
972 branch_frequency
+= EDGE_FREQUENCY (e
);
975 /* There are two purposes to align block with no fallthru incoming edge:
976 1) to avoid fetch stalls when branch destination is near cache boundary
977 2) to improve cache efficiency in case the previous block is not executed
978 (so it does not need to be in the cache).
980 We to catch first case, we align frequently executed blocks.
981 To catch the second, we align blocks that are executed more frequently
982 than the predecessor and the predecessor is likely to not be executed
983 when function is called. */
986 && (branch_frequency
> BB_FREQ_MAX
/ 10
987 || (bb
->frequency
> BASIC_BLOCK (i
- 1)->frequency
* 10
988 && (BASIC_BLOCK (i
- 1)->frequency
989 <= ENTRY_BLOCK_PTR
->frequency
/ 2))))
991 log
= JUMP_ALIGN (label
);
995 max_skip
= JUMP_ALIGN_MAX_SKIP
;
998 /* In case block is frequent and reached mostly by non-fallthru edge,
999 align it. It is most likely an first block of loop. */
1001 && branch_frequency
+ fallthru_frequency
> BB_FREQ_MAX
/ 10
1002 && branch_frequency
> fallthru_frequency
* 5)
1004 log
= LOOP_ALIGN (label
);
1008 max_skip
= LOOP_ALIGN_MAX_SKIP
;
1011 LABEL_TO_ALIGNMENT (label
) = max_log
;
1012 LABEL_TO_MAX_SKIP (label
) = max_skip
;
1016 /* Make a pass over all insns and compute their actual lengths by shortening
1017 any branches of variable length if possible. */
1019 /* Give a default value for the lowest address in a function. */
1021 #ifndef FIRST_INSN_ADDRESS
1022 #define FIRST_INSN_ADDRESS 0
1025 /* shorten_branches might be called multiple times: for example, the SH
1026 port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG.
1027 In order to do this, it needs proper length information, which it obtains
1028 by calling shorten_branches. This cannot be collapsed with
1029 shorten_branches itself into a single pass unless we also want to integrate
1030 reorg.c, since the branch splitting exposes new instructions with delay
1034 shorten_branches (first
)
1035 rtx first ATTRIBUTE_UNUSED
;
1042 #ifdef HAVE_ATTR_length
1043 #define MAX_CODE_ALIGN 16
1045 int something_changed
= 1;
1046 char *varying_length
;
1049 rtx align_tab
[MAX_CODE_ALIGN
];
1053 /* Compute maximum UID and allocate label_align / uid_shuid. */
1054 max_uid
= get_max_uid ();
1056 uid_shuid
= (int *) xmalloc (max_uid
* sizeof *uid_shuid
);
1058 if (max_labelno
!= max_label_num ())
1060 int old
= max_labelno
;
1064 max_labelno
= max_label_num ();
1066 n_labels
= max_labelno
- min_labelno
+ 1;
1067 n_old_labels
= old
- min_labelno
+ 1;
1069 label_align
= (struct label_alignment
*) xrealloc
1070 (label_align
, n_labels
* sizeof (struct label_alignment
));
1072 /* Range of labels grows monotonically in the function. Abort here
1073 means that the initialization of array got lost. */
1074 if (n_old_labels
> n_labels
)
1077 memset (label_align
+ n_old_labels
, 0,
1078 (n_labels
- n_old_labels
) * sizeof (struct label_alignment
));
1081 /* Initialize label_align and set up uid_shuid to be strictly
1082 monotonically rising with insn order. */
1083 /* We use max_log here to keep track of the maximum alignment we want to
1084 impose on the next CODE_LABEL (or the current one if we are processing
1085 the CODE_LABEL itself). */
1090 for (insn
= get_insns (), i
= 1; insn
; insn
= NEXT_INSN (insn
))
1094 INSN_SHUID (insn
) = i
++;
1097 /* reorg might make the first insn of a loop being run once only,
1098 and delete the label in front of it. Then we want to apply
1099 the loop alignment to the new label created by reorg, which
1100 is separated by the former loop start insn from the
1101 NOTE_INSN_LOOP_BEG. */
1103 else if (GET_CODE (insn
) == CODE_LABEL
)
1107 /* Merge in alignments computed by compute_alignments. */
1108 log
= LABEL_TO_ALIGNMENT (insn
);
1112 max_skip
= LABEL_TO_MAX_SKIP (insn
);
1115 log
= LABEL_ALIGN (insn
);
1119 max_skip
= LABEL_ALIGN_MAX_SKIP
;
1121 next
= NEXT_INSN (insn
);
1122 /* ADDR_VECs only take room if read-only data goes into the text
1124 if (JUMP_TABLES_IN_TEXT_SECTION
|| !HAVE_READONLY_DATA_SECTION
)
1125 if (next
&& GET_CODE (next
) == JUMP_INSN
)
1127 rtx nextbody
= PATTERN (next
);
1128 if (GET_CODE (nextbody
) == ADDR_VEC
1129 || GET_CODE (nextbody
) == ADDR_DIFF_VEC
)
1131 log
= ADDR_VEC_ALIGN (next
);
1135 max_skip
= LABEL_ALIGN_MAX_SKIP
;
1139 LABEL_TO_ALIGNMENT (insn
) = max_log
;
1140 LABEL_TO_MAX_SKIP (insn
) = max_skip
;
1144 else if (GET_CODE (insn
) == BARRIER
)
1148 for (label
= insn
; label
&& ! INSN_P (label
);
1149 label
= NEXT_INSN (label
))
1150 if (GET_CODE (label
) == CODE_LABEL
)
1152 log
= LABEL_ALIGN_AFTER_BARRIER (insn
);
1156 max_skip
= LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP
;
1162 #ifdef HAVE_ATTR_length
1164 /* Allocate the rest of the arrays. */
1165 insn_lengths
= (int *) xmalloc (max_uid
* sizeof (*insn_lengths
));
1166 insn_lengths_max_uid
= max_uid
;
1167 /* Syntax errors can lead to labels being outside of the main insn stream.
1168 Initialize insn_addresses, so that we get reproducible results. */
1169 INSN_ADDRESSES_ALLOC (max_uid
);
1171 varying_length
= (char *) xcalloc (max_uid
, sizeof (char));
1173 /* Initialize uid_align. We scan instructions
1174 from end to start, and keep in align_tab[n] the last seen insn
1175 that does an alignment of at least n+1, i.e. the successor
1176 in the alignment chain for an insn that does / has a known
1178 uid_align
= (rtx
*) xcalloc (max_uid
, sizeof *uid_align
);
1180 for (i
= MAX_CODE_ALIGN
; --i
>= 0;)
1181 align_tab
[i
] = NULL_RTX
;
1182 seq
= get_last_insn ();
1183 for (; seq
; seq
= PREV_INSN (seq
))
1185 int uid
= INSN_UID (seq
);
1187 log
= (GET_CODE (seq
) == CODE_LABEL
? LABEL_TO_ALIGNMENT (seq
) : 0);
1188 uid_align
[uid
] = align_tab
[0];
1191 /* Found an alignment label. */
1192 uid_align
[uid
] = align_tab
[log
];
1193 for (i
= log
- 1; i
>= 0; i
--)
1197 #ifdef CASE_VECTOR_SHORTEN_MODE
1200 /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum
1203 int min_shuid
= INSN_SHUID (get_insns ()) - 1;
1204 int max_shuid
= INSN_SHUID (get_last_insn ()) + 1;
1207 for (insn
= first
; insn
!= 0; insn
= NEXT_INSN (insn
))
1209 rtx min_lab
= NULL_RTX
, max_lab
= NULL_RTX
, pat
;
1210 int len
, i
, min
, max
, insn_shuid
;
1212 addr_diff_vec_flags flags
;
1214 if (GET_CODE (insn
) != JUMP_INSN
1215 || GET_CODE (PATTERN (insn
)) != ADDR_DIFF_VEC
)
1217 pat
= PATTERN (insn
);
1218 len
= XVECLEN (pat
, 1);
1221 min_align
= MAX_CODE_ALIGN
;
1222 for (min
= max_shuid
, max
= min_shuid
, i
= len
- 1; i
>= 0; i
--)
1224 rtx lab
= XEXP (XVECEXP (pat
, 1, i
), 0);
1225 int shuid
= INSN_SHUID (lab
);
1236 if (min_align
> LABEL_TO_ALIGNMENT (lab
))
1237 min_align
= LABEL_TO_ALIGNMENT (lab
);
1239 XEXP (pat
, 2) = gen_rtx_LABEL_REF (VOIDmode
, min_lab
);
1240 XEXP (pat
, 3) = gen_rtx_LABEL_REF (VOIDmode
, max_lab
);
1241 insn_shuid
= INSN_SHUID (insn
);
1242 rel
= INSN_SHUID (XEXP (XEXP (pat
, 0), 0));
1243 flags
.min_align
= min_align
;
1244 flags
.base_after_vec
= rel
> insn_shuid
;
1245 flags
.min_after_vec
= min
> insn_shuid
;
1246 flags
.max_after_vec
= max
> insn_shuid
;
1247 flags
.min_after_base
= min
> rel
;
1248 flags
.max_after_base
= max
> rel
;
1249 ADDR_DIFF_VEC_FLAGS (pat
) = flags
;
1252 #endif /* CASE_VECTOR_SHORTEN_MODE */
1254 /* Compute initial lengths, addresses, and varying flags for each insn. */
1255 for (insn_current_address
= FIRST_INSN_ADDRESS
, insn
= first
;
1257 insn_current_address
+= insn_lengths
[uid
], insn
= NEXT_INSN (insn
))
1259 uid
= INSN_UID (insn
);
1261 insn_lengths
[uid
] = 0;
1263 if (GET_CODE (insn
) == CODE_LABEL
)
1265 int log
= LABEL_TO_ALIGNMENT (insn
);
1268 int align
= 1 << log
;
1269 int new_address
= (insn_current_address
+ align
- 1) & -align
;
1270 insn_lengths
[uid
] = new_address
- insn_current_address
;
1274 INSN_ADDRESSES (uid
) = insn_current_address
;
1276 if (GET_CODE (insn
) == NOTE
|| GET_CODE (insn
) == BARRIER
1277 || GET_CODE (insn
) == CODE_LABEL
)
1279 if (INSN_DELETED_P (insn
))
1282 body
= PATTERN (insn
);
1283 if (GET_CODE (body
) == ADDR_VEC
|| GET_CODE (body
) == ADDR_DIFF_VEC
)
1285 /* This only takes room if read-only data goes into the text
1287 if (JUMP_TABLES_IN_TEXT_SECTION
|| !HAVE_READONLY_DATA_SECTION
)
1288 insn_lengths
[uid
] = (XVECLEN (body
,
1289 GET_CODE (body
) == ADDR_DIFF_VEC
)
1290 * GET_MODE_SIZE (GET_MODE (body
)));
1291 /* Alignment is handled by ADDR_VEC_ALIGN. */
1293 else if (GET_CODE (body
) == ASM_INPUT
|| asm_noperands (body
) >= 0)
1294 insn_lengths
[uid
] = asm_insn_count (body
) * insn_default_length (insn
);
1295 else if (GET_CODE (body
) == SEQUENCE
)
1298 int const_delay_slots
;
1300 const_delay_slots
= const_num_delay_slots (XVECEXP (body
, 0, 0));
1302 const_delay_slots
= 0;
1304 /* Inside a delay slot sequence, we do not do any branch shortening
1305 if the shortening could change the number of delay slots
1307 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
1309 rtx inner_insn
= XVECEXP (body
, 0, i
);
1310 int inner_uid
= INSN_UID (inner_insn
);
1313 if (GET_CODE (body
) == ASM_INPUT
1314 || asm_noperands (PATTERN (XVECEXP (body
, 0, i
))) >= 0)
1315 inner_length
= (asm_insn_count (PATTERN (inner_insn
))
1316 * insn_default_length (inner_insn
));
1318 inner_length
= insn_default_length (inner_insn
);
1320 insn_lengths
[inner_uid
] = inner_length
;
1321 if (const_delay_slots
)
1323 if ((varying_length
[inner_uid
]
1324 = insn_variable_length_p (inner_insn
)) != 0)
1325 varying_length
[uid
] = 1;
1326 INSN_ADDRESSES (inner_uid
) = (insn_current_address
1327 + insn_lengths
[uid
]);
1330 varying_length
[inner_uid
] = 0;
1331 insn_lengths
[uid
] += inner_length
;
1334 else if (GET_CODE (body
) != USE
&& GET_CODE (body
) != CLOBBER
)
1336 insn_lengths
[uid
] = insn_default_length (insn
);
1337 varying_length
[uid
] = insn_variable_length_p (insn
);
1340 /* If needed, do any adjustment. */
1341 #ifdef ADJUST_INSN_LENGTH
1342 ADJUST_INSN_LENGTH (insn
, insn_lengths
[uid
]);
1343 if (insn_lengths
[uid
] < 0)
1344 fatal_insn ("negative insn length", insn
);
1348 /* Now loop over all the insns finding varying length insns. For each,
1349 get the current insn length. If it has changed, reflect the change.
1350 When nothing changes for a full pass, we are done. */
1352 while (something_changed
)
1354 something_changed
= 0;
1355 insn_current_align
= MAX_CODE_ALIGN
- 1;
1356 for (insn_current_address
= FIRST_INSN_ADDRESS
, insn
= first
;
1358 insn
= NEXT_INSN (insn
))
1361 #ifdef ADJUST_INSN_LENGTH
1366 uid
= INSN_UID (insn
);
1368 if (GET_CODE (insn
) == CODE_LABEL
)
1370 int log
= LABEL_TO_ALIGNMENT (insn
);
1371 if (log
> insn_current_align
)
1373 int align
= 1 << log
;
1374 int new_address
= (insn_current_address
+ align
- 1) & -align
;
1375 insn_lengths
[uid
] = new_address
- insn_current_address
;
1376 insn_current_align
= log
;
1377 insn_current_address
= new_address
;
1380 insn_lengths
[uid
] = 0;
1381 INSN_ADDRESSES (uid
) = insn_current_address
;
1385 length_align
= INSN_LENGTH_ALIGNMENT (insn
);
1386 if (length_align
< insn_current_align
)
1387 insn_current_align
= length_align
;
1389 insn_last_address
= INSN_ADDRESSES (uid
);
1390 INSN_ADDRESSES (uid
) = insn_current_address
;
1392 #ifdef CASE_VECTOR_SHORTEN_MODE
1393 if (optimize
&& GET_CODE (insn
) == JUMP_INSN
1394 && GET_CODE (PATTERN (insn
)) == ADDR_DIFF_VEC
)
1396 rtx body
= PATTERN (insn
);
1397 int old_length
= insn_lengths
[uid
];
1398 rtx rel_lab
= XEXP (XEXP (body
, 0), 0);
1399 rtx min_lab
= XEXP (XEXP (body
, 2), 0);
1400 rtx max_lab
= XEXP (XEXP (body
, 3), 0);
1401 int rel_addr
= INSN_ADDRESSES (INSN_UID (rel_lab
));
1402 int min_addr
= INSN_ADDRESSES (INSN_UID (min_lab
));
1403 int max_addr
= INSN_ADDRESSES (INSN_UID (max_lab
));
1406 addr_diff_vec_flags flags
;
1408 /* Avoid automatic aggregate initialization. */
1409 flags
= ADDR_DIFF_VEC_FLAGS (body
);
1411 /* Try to find a known alignment for rel_lab. */
1412 for (prev
= rel_lab
;
1414 && ! insn_lengths
[INSN_UID (prev
)]
1415 && ! (varying_length
[INSN_UID (prev
)] & 1);
1416 prev
= PREV_INSN (prev
))
1417 if (varying_length
[INSN_UID (prev
)] & 2)
1419 rel_align
= LABEL_TO_ALIGNMENT (prev
);
1423 /* See the comment on addr_diff_vec_flags in rtl.h for the
1424 meaning of the flags values. base: REL_LAB vec: INSN */
1425 /* Anything after INSN has still addresses from the last
1426 pass; adjust these so that they reflect our current
1427 estimate for this pass. */
1428 if (flags
.base_after_vec
)
1429 rel_addr
+= insn_current_address
- insn_last_address
;
1430 if (flags
.min_after_vec
)
1431 min_addr
+= insn_current_address
- insn_last_address
;
1432 if (flags
.max_after_vec
)
1433 max_addr
+= insn_current_address
- insn_last_address
;
1434 /* We want to know the worst case, i.e. lowest possible value
1435 for the offset of MIN_LAB. If MIN_LAB is after REL_LAB,
1436 its offset is positive, and we have to be wary of code shrink;
1437 otherwise, it is negative, and we have to be vary of code
1439 if (flags
.min_after_base
)
1441 /* If INSN is between REL_LAB and MIN_LAB, the size
1442 changes we are about to make can change the alignment
1443 within the observed offset, therefore we have to break
1444 it up into two parts that are independent. */
1445 if (! flags
.base_after_vec
&& flags
.min_after_vec
)
1447 min_addr
-= align_fuzz (rel_lab
, insn
, rel_align
, 0);
1448 min_addr
-= align_fuzz (insn
, min_lab
, 0, 0);
1451 min_addr
-= align_fuzz (rel_lab
, min_lab
, rel_align
, 0);
1455 if (flags
.base_after_vec
&& ! flags
.min_after_vec
)
1457 min_addr
-= align_fuzz (min_lab
, insn
, 0, ~0);
1458 min_addr
-= align_fuzz (insn
, rel_lab
, 0, ~0);
1461 min_addr
-= align_fuzz (min_lab
, rel_lab
, 0, ~0);
1463 /* Likewise, determine the highest lowest possible value
1464 for the offset of MAX_LAB. */
1465 if (flags
.max_after_base
)
1467 if (! flags
.base_after_vec
&& flags
.max_after_vec
)
1469 max_addr
+= align_fuzz (rel_lab
, insn
, rel_align
, ~0);
1470 max_addr
+= align_fuzz (insn
, max_lab
, 0, ~0);
1473 max_addr
+= align_fuzz (rel_lab
, max_lab
, rel_align
, ~0);
1477 if (flags
.base_after_vec
&& ! flags
.max_after_vec
)
1479 max_addr
+= align_fuzz (max_lab
, insn
, 0, 0);
1480 max_addr
+= align_fuzz (insn
, rel_lab
, 0, 0);
1483 max_addr
+= align_fuzz (max_lab
, rel_lab
, 0, 0);
1485 PUT_MODE (body
, CASE_VECTOR_SHORTEN_MODE (min_addr
- rel_addr
,
1486 max_addr
- rel_addr
,
1488 if (JUMP_TABLES_IN_TEXT_SECTION
|| !HAVE_READONLY_DATA_SECTION
)
1491 = (XVECLEN (body
, 1) * GET_MODE_SIZE (GET_MODE (body
)));
1492 insn_current_address
+= insn_lengths
[uid
];
1493 if (insn_lengths
[uid
] != old_length
)
1494 something_changed
= 1;
1499 #endif /* CASE_VECTOR_SHORTEN_MODE */
1501 if (! (varying_length
[uid
]))
1503 if (GET_CODE (insn
) == INSN
1504 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
1508 body
= PATTERN (insn
);
1509 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
1511 rtx inner_insn
= XVECEXP (body
, 0, i
);
1512 int inner_uid
= INSN_UID (inner_insn
);
1514 INSN_ADDRESSES (inner_uid
) = insn_current_address
;
1516 insn_current_address
+= insn_lengths
[inner_uid
];
1520 insn_current_address
+= insn_lengths
[uid
];
1525 if (GET_CODE (insn
) == INSN
&& GET_CODE (PATTERN (insn
)) == SEQUENCE
)
1529 body
= PATTERN (insn
);
1531 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
1533 rtx inner_insn
= XVECEXP (body
, 0, i
);
1534 int inner_uid
= INSN_UID (inner_insn
);
1537 INSN_ADDRESSES (inner_uid
) = insn_current_address
;
1539 /* insn_current_length returns 0 for insns with a
1540 non-varying length. */
1541 if (! varying_length
[inner_uid
])
1542 inner_length
= insn_lengths
[inner_uid
];
1544 inner_length
= insn_current_length (inner_insn
);
1546 if (inner_length
!= insn_lengths
[inner_uid
])
1548 insn_lengths
[inner_uid
] = inner_length
;
1549 something_changed
= 1;
1551 insn_current_address
+= insn_lengths
[inner_uid
];
1552 new_length
+= inner_length
;
1557 new_length
= insn_current_length (insn
);
1558 insn_current_address
+= new_length
;
1561 #ifdef ADJUST_INSN_LENGTH
1562 /* If needed, do any adjustment. */
1563 tmp_length
= new_length
;
1564 ADJUST_INSN_LENGTH (insn
, new_length
);
1565 insn_current_address
+= (new_length
- tmp_length
);
1568 if (new_length
!= insn_lengths
[uid
])
1570 insn_lengths
[uid
] = new_length
;
1571 something_changed
= 1;
1574 /* For a non-optimizing compile, do only a single pass. */
1579 free (varying_length
);
1581 #endif /* HAVE_ATTR_length */
1584 #ifdef HAVE_ATTR_length
1585 /* Given the body of an INSN known to be generated by an ASM statement, return
1586 the number of machine instructions likely to be generated for this insn.
1587 This is used to compute its length. */
1590 asm_insn_count (body
)
1593 const char *template;
1596 if (GET_CODE (body
) == ASM_INPUT
)
1597 template = XSTR (body
, 0);
1599 template = decode_asm_operands (body
, NULL
, NULL
, NULL
, NULL
);
1601 for (; *template; template++)
1602 if (IS_ASM_LOGICAL_LINE_SEPARATOR (*template) || *template == '\n')
1609 /* Output assembler code for the start of a function,
1610 and initialize some of the variables in this file
1611 for the new function. The label for the function and associated
1612 assembler pseudo-ops have already been output in `assemble_start_function'.
1614 FIRST is the first insn of the rtl for the function being compiled.
1615 FILE is the file to write assembler code to.
1616 OPTIMIZE is nonzero if we should eliminate redundant
1617 test and compare insns. */
1620 final_start_function (first
, file
, optimize
)
1623 int optimize ATTRIBUTE_UNUSED
;
1627 this_is_asm_operands
= 0;
1629 #ifdef NON_SAVING_SETJMP
1630 /* A function that calls setjmp should save and restore all the
1631 call-saved registers on a system where longjmp clobbers them. */
1632 if (NON_SAVING_SETJMP
&& current_function_calls_setjmp
)
1636 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
1637 if (!call_used_regs
[i
])
1638 regs_ever_live
[i
] = 1;
1642 if (NOTE_LINE_NUMBER (first
) != NOTE_INSN_DELETED
)
1643 notice_source_line (first
);
1644 high_block_linenum
= high_function_linenum
= last_linenum
;
1646 (*debug_hooks
->begin_prologue
) (last_linenum
, last_filename
);
1648 #if defined (DWARF2_UNWIND_INFO) || defined (IA64_UNWIND_INFO)
1649 if (write_symbols
!= DWARF2_DEBUG
&& write_symbols
!= VMS_AND_DWARF2_DEBUG
)
1650 dwarf2out_begin_prologue (0, NULL
);
1653 #ifdef LEAF_REG_REMAP
1654 if (current_function_uses_only_leaf_regs
)
1655 leaf_renumber_regs (first
);
1658 /* The Sun386i and perhaps other machines don't work right
1659 if the profiling code comes after the prologue. */
1660 #ifdef PROFILE_BEFORE_PROLOGUE
1661 if (current_function_profile
)
1662 profile_function (file
);
1663 #endif /* PROFILE_BEFORE_PROLOGUE */
1665 #if defined (DWARF2_UNWIND_INFO) && defined (HAVE_prologue)
1666 if (dwarf2out_do_frame ())
1667 dwarf2out_frame_debug (NULL_RTX
);
1670 /* If debugging, assign block numbers to all of the blocks in this
1674 remove_unnecessary_notes ();
1676 number_blocks (current_function_decl
);
1677 /* We never actually put out begin/end notes for the top-level
1678 block in the function. But, conceptually, that block is
1680 TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl
)) = 1;
1683 /* First output the function prologue: code to set up the stack frame. */
1684 (*targetm
.asm_out
.function_prologue
) (file
, get_frame_size ());
1686 #ifdef VMS_DEBUGGING_INFO
1687 /* Output label after the prologue of the function. */
1688 if (write_symbols
== VMS_DEBUG
|| write_symbols
== VMS_AND_DWARF2_DEBUG
)
1689 vmsdbgout_after_prologue ();
1692 /* If the machine represents the prologue as RTL, the profiling code must
1693 be emitted when NOTE_INSN_PROLOGUE_END is scanned. */
1694 #ifdef HAVE_prologue
1695 if (! HAVE_prologue
)
1697 profile_after_prologue (file
);
1701 profile_after_prologue (file
)
1702 FILE *file ATTRIBUTE_UNUSED
;
1704 #ifndef PROFILE_BEFORE_PROLOGUE
1705 if (current_function_profile
)
1706 profile_function (file
);
1707 #endif /* not PROFILE_BEFORE_PROLOGUE */
1711 profile_function (file
)
1712 FILE *file ATTRIBUTE_UNUSED
;
1714 #ifndef NO_PROFILE_COUNTERS
1715 int align
= MIN (BIGGEST_ALIGNMENT
, LONG_TYPE_SIZE
);
1717 #if defined(ASM_OUTPUT_REG_PUSH)
1718 #if defined(STRUCT_VALUE_INCOMING_REGNUM) || defined(STRUCT_VALUE_REGNUM)
1719 int sval
= current_function_returns_struct
;
1721 #if defined(STATIC_CHAIN_INCOMING_REGNUM) || defined(STATIC_CHAIN_REGNUM)
1722 int cxt
= current_function_needs_context
;
1724 #endif /* ASM_OUTPUT_REG_PUSH */
1726 #ifndef NO_PROFILE_COUNTERS
1728 ASM_OUTPUT_ALIGN (file
, floor_log2 (align
/ BITS_PER_UNIT
));
1729 ASM_OUTPUT_INTERNAL_LABEL (file
, "LP", current_function_profile_label_no
);
1730 assemble_integer (const0_rtx
, LONG_TYPE_SIZE
/ BITS_PER_UNIT
, align
, 1);
1733 function_section (current_function_decl
);
1735 #if defined(STRUCT_VALUE_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1737 ASM_OUTPUT_REG_PUSH (file
, STRUCT_VALUE_INCOMING_REGNUM
);
1739 #if defined(STRUCT_VALUE_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1742 ASM_OUTPUT_REG_PUSH (file
, STRUCT_VALUE_REGNUM
);
1747 #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1749 ASM_OUTPUT_REG_PUSH (file
, STATIC_CHAIN_INCOMING_REGNUM
);
1751 #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1754 ASM_OUTPUT_REG_PUSH (file
, STATIC_CHAIN_REGNUM
);
1759 FUNCTION_PROFILER (file
, current_function_profile_label_no
);
1761 #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1763 ASM_OUTPUT_REG_POP (file
, STATIC_CHAIN_INCOMING_REGNUM
);
1765 #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1768 ASM_OUTPUT_REG_POP (file
, STATIC_CHAIN_REGNUM
);
1773 #if defined(STRUCT_VALUE_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1775 ASM_OUTPUT_REG_POP (file
, STRUCT_VALUE_INCOMING_REGNUM
);
1777 #if defined(STRUCT_VALUE_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1780 ASM_OUTPUT_REG_POP (file
, STRUCT_VALUE_REGNUM
);
1786 /* Output assembler code for the end of a function.
1787 For clarity, args are same as those of `final_start_function'
1788 even though not all of them are needed. */
1791 final_end_function ()
1795 (*debug_hooks
->end_function
) (high_function_linenum
);
1797 /* Finally, output the function epilogue:
1798 code to restore the stack frame and return to the caller. */
1799 (*targetm
.asm_out
.function_epilogue
) (asm_out_file
, get_frame_size ());
1801 /* And debug output. */
1802 (*debug_hooks
->end_epilogue
) ();
1804 #if defined (DWARF2_UNWIND_INFO)
1805 if (write_symbols
!= DWARF2_DEBUG
&& write_symbols
!= VMS_AND_DWARF2_DEBUG
1806 && dwarf2out_do_frame ())
1807 dwarf2out_end_epilogue ();
1811 /* Output assembler code for some insns: all or part of a function.
1812 For description of args, see `final_start_function', above.
1814 PRESCAN is 1 if we are not really outputting,
1815 just scanning as if we were outputting.
1816 Prescanning deletes and rearranges insns just like ordinary output.
1817 PRESCAN is -2 if we are outputting after having prescanned.
1818 In this case, don't try to delete or rearrange insns
1819 because that has already been done.
1820 Prescanning is done only on certain machines. */
1823 final (first
, file
, optimize
, prescan
)
1833 last_ignored_compare
= 0;
1836 /* Make a map indicating which line numbers appear in this function.
1837 When producing SDB debugging info, delete troublesome line number
1838 notes from inlined functions in other files as well as duplicate
1839 line number notes. */
1840 #ifdef SDB_DEBUGGING_INFO
1841 if (write_symbols
== SDB_DEBUG
)
1844 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
1845 if (GET_CODE (insn
) == NOTE
&& NOTE_LINE_NUMBER (insn
) > 0)
1847 if ((RTX_INTEGRATED_P (insn
)
1848 && strcmp (NOTE_SOURCE_FILE (insn
), main_input_filename
) != 0)
1850 && NOTE_LINE_NUMBER (insn
) == NOTE_LINE_NUMBER (last
)
1851 && NOTE_SOURCE_FILE (insn
) == NOTE_SOURCE_FILE (last
)))
1853 delete_insn (insn
); /* Use delete_note. */
1857 if (NOTE_LINE_NUMBER (insn
) > max_line
)
1858 max_line
= NOTE_LINE_NUMBER (insn
);
1864 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
1865 if (GET_CODE (insn
) == NOTE
&& NOTE_LINE_NUMBER (insn
) > max_line
)
1866 max_line
= NOTE_LINE_NUMBER (insn
);
1869 line_note_exists
= (char *) xcalloc (max_line
+ 1, sizeof (char));
1871 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
1873 if (INSN_UID (insn
) > max_uid
) /* find largest UID */
1874 max_uid
= INSN_UID (insn
);
1875 if (GET_CODE (insn
) == NOTE
&& NOTE_LINE_NUMBER (insn
) > 0)
1876 line_note_exists
[NOTE_LINE_NUMBER (insn
)] = 1;
1878 /* If CC tracking across branches is enabled, record the insn which
1879 jumps to each branch only reached from one place. */
1880 if (optimize
&& GET_CODE (insn
) == JUMP_INSN
)
1882 rtx lab
= JUMP_LABEL (insn
);
1883 if (lab
&& LABEL_NUSES (lab
) == 1)
1885 LABEL_REFS (lab
) = insn
;
1895 /* Output the insns. */
1896 for (insn
= NEXT_INSN (first
); insn
;)
1898 #ifdef HAVE_ATTR_length
1899 if ((unsigned) INSN_UID (insn
) >= INSN_ADDRESSES_SIZE ())
1902 /* Irritatingly, the reg-stack pass is creating new instructions
1903 and because of REG_DEAD note abuse it has to run after
1904 shorten_branches. Fake address of -1 then. */
1905 insn_current_address
= -1;
1907 /* This can be triggered by bugs elsewhere in the compiler if
1908 new insns are created after init_insn_lengths is called. */
1913 insn_current_address
= INSN_ADDRESSES (INSN_UID (insn
));
1914 #endif /* HAVE_ATTR_length */
1916 insn
= final_scan_insn (insn
, file
, optimize
, prescan
, 0);
1919 /* Store function names for edge-profiling. */
1920 /* ??? Probably should re-use the existing struct function. */
1922 if (cfun
->arc_profile
)
1924 struct function_list
*new_item
= xmalloc (sizeof (struct function_list
));
1926 *functions_tail
= new_item
;
1927 functions_tail
= &new_item
->next
;
1930 new_item
->name
= xstrdup (current_function_name
);
1931 new_item
->cfg_checksum
= profile_info
.current_function_cfg_checksum
;
1932 new_item
->count_edges
= profile_info
.count_edges_instrumented_now
;
1935 free (line_note_exists
);
1936 line_note_exists
= NULL
;
1940 get_insn_template (code
, insn
)
1944 const void *output
= insn_data
[code
].output
;
1945 switch (insn_data
[code
].output_format
)
1947 case INSN_OUTPUT_FORMAT_SINGLE
:
1948 return (const char *) output
;
1949 case INSN_OUTPUT_FORMAT_MULTI
:
1950 return ((const char *const *) output
)[which_alternative
];
1951 case INSN_OUTPUT_FORMAT_FUNCTION
:
1954 return (*(insn_output_fn
) output
) (recog_data
.operand
, insn
);
1961 /* The final scan for one insn, INSN.
1962 Args are same as in `final', except that INSN
1963 is the insn being scanned.
1964 Value returned is the next insn to be scanned.
1966 NOPEEPHOLES is the flag to disallow peephole processing (currently
1967 used for within delayed branch sequence output). */
1970 final_scan_insn (insn
, file
, optimize
, prescan
, nopeepholes
)
1973 int optimize ATTRIBUTE_UNUSED
;
1975 int nopeepholes ATTRIBUTE_UNUSED
;
1983 /* Ignore deleted insns. These can occur when we split insns (due to a
1984 template of "#") while not optimizing. */
1985 if (INSN_DELETED_P (insn
))
1986 return NEXT_INSN (insn
);
1988 switch (GET_CODE (insn
))
1994 switch (NOTE_LINE_NUMBER (insn
))
1996 case NOTE_INSN_DELETED
:
1997 case NOTE_INSN_LOOP_BEG
:
1998 case NOTE_INSN_LOOP_END
:
1999 case NOTE_INSN_LOOP_END_TOP_COND
:
2000 case NOTE_INSN_LOOP_CONT
:
2001 case NOTE_INSN_LOOP_VTOP
:
2002 case NOTE_INSN_FUNCTION_END
:
2003 case NOTE_INSN_REPEATED_LINE_NUMBER
:
2004 case NOTE_INSN_RANGE_BEG
:
2005 case NOTE_INSN_RANGE_END
:
2006 case NOTE_INSN_LIVE
:
2007 case NOTE_INSN_EXPECTED_VALUE
:
2010 case NOTE_INSN_BASIC_BLOCK
:
2011 #ifdef IA64_UNWIND_INFO
2012 IA64_UNWIND_EMIT (asm_out_file
, insn
);
2015 fprintf (asm_out_file
, "\t%s basic block %d\n",
2016 ASM_COMMENT_START
, NOTE_BASIC_BLOCK (insn
)->index
);
2019 case NOTE_INSN_EH_REGION_BEG
:
2020 ASM_OUTPUT_DEBUG_LABEL (asm_out_file
, "LEHB",
2021 NOTE_EH_HANDLER (insn
));
2024 case NOTE_INSN_EH_REGION_END
:
2025 ASM_OUTPUT_DEBUG_LABEL (asm_out_file
, "LEHE",
2026 NOTE_EH_HANDLER (insn
));
2029 case NOTE_INSN_PROLOGUE_END
:
2030 (*targetm
.asm_out
.function_end_prologue
) (file
);
2031 profile_after_prologue (file
);
2034 case NOTE_INSN_EPILOGUE_BEG
:
2035 (*targetm
.asm_out
.function_begin_epilogue
) (file
);
2038 case NOTE_INSN_FUNCTION_BEG
:
2040 (*debug_hooks
->end_prologue
) (last_linenum
);
2043 case NOTE_INSN_BLOCK_BEG
:
2044 if (debug_info_level
== DINFO_LEVEL_NORMAL
2045 || debug_info_level
== DINFO_LEVEL_VERBOSE
2046 || write_symbols
== DWARF_DEBUG
2047 || write_symbols
== DWARF2_DEBUG
2048 || write_symbols
== VMS_AND_DWARF2_DEBUG
2049 || write_symbols
== VMS_DEBUG
)
2051 int n
= BLOCK_NUMBER (NOTE_BLOCK (insn
));
2055 high_block_linenum
= last_linenum
;
2057 /* Output debugging info about the symbol-block beginning. */
2058 (*debug_hooks
->begin_block
) (last_linenum
, n
);
2060 /* Mark this block as output. */
2061 TREE_ASM_WRITTEN (NOTE_BLOCK (insn
)) = 1;
2065 case NOTE_INSN_BLOCK_END
:
2066 if (debug_info_level
== DINFO_LEVEL_NORMAL
2067 || debug_info_level
== DINFO_LEVEL_VERBOSE
2068 || write_symbols
== DWARF_DEBUG
2069 || write_symbols
== DWARF2_DEBUG
2070 || write_symbols
== VMS_AND_DWARF2_DEBUG
2071 || write_symbols
== VMS_DEBUG
)
2073 int n
= BLOCK_NUMBER (NOTE_BLOCK (insn
));
2077 /* End of a symbol-block. */
2079 if (block_depth
< 0)
2082 (*debug_hooks
->end_block
) (high_block_linenum
, n
);
2086 case NOTE_INSN_DELETED_LABEL
:
2087 /* Emit the label. We may have deleted the CODE_LABEL because
2088 the label could be proved to be unreachable, though still
2089 referenced (in the form of having its address taken. */
2090 ASM_OUTPUT_DEBUG_LABEL (file
, "L", CODE_LABEL_NUMBER (insn
));
2097 if (NOTE_LINE_NUMBER (insn
) <= 0)
2100 /* This note is a line-number. */
2105 /* If there is anything real after this note, output it.
2106 If another line note follows, omit this one. */
2107 for (note
= NEXT_INSN (insn
); note
; note
= NEXT_INSN (note
))
2109 if (GET_CODE (note
) != NOTE
&& GET_CODE (note
) != CODE_LABEL
)
2112 /* These types of notes can be significant
2113 so make sure the preceding line number stays. */
2114 else if (GET_CODE (note
) == NOTE
2115 && (NOTE_LINE_NUMBER (note
) == NOTE_INSN_BLOCK_BEG
2116 || NOTE_LINE_NUMBER (note
) == NOTE_INSN_BLOCK_END
2117 || NOTE_LINE_NUMBER (note
) == NOTE_INSN_FUNCTION_BEG
))
2119 else if (GET_CODE (note
) == NOTE
&& NOTE_LINE_NUMBER (note
) > 0)
2121 /* Another line note follows; we can delete this note
2122 if no intervening line numbers have notes elsewhere. */
2124 for (num
= NOTE_LINE_NUMBER (insn
) + 1;
2125 num
< NOTE_LINE_NUMBER (note
);
2127 if (line_note_exists
[num
])
2130 if (num
>= NOTE_LINE_NUMBER (note
))
2136 /* Output this line note if it is the first or the last line
2140 notice_source_line (insn
);
2141 (*debug_hooks
->source_line
) (last_linenum
, last_filename
);
2149 #if defined (DWARF2_UNWIND_INFO)
2150 if (dwarf2out_do_frame ())
2151 dwarf2out_frame_debug (insn
);
2156 /* The target port might emit labels in the output function for
2157 some insn, e.g. sh.c output_branchy_insn. */
2158 if (CODE_LABEL_NUMBER (insn
) <= max_labelno
)
2160 int align
= LABEL_TO_ALIGNMENT (insn
);
2161 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2162 int max_skip
= LABEL_TO_MAX_SKIP (insn
);
2165 if (align
&& NEXT_INSN (insn
))
2167 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2168 ASM_OUTPUT_MAX_SKIP_ALIGN (file
, align
, max_skip
);
2170 ASM_OUTPUT_ALIGN (file
, align
);
2176 /* If this label is reached from only one place, set the condition
2177 codes from the instruction just before the branch. */
2179 /* Disabled because some insns set cc_status in the C output code
2180 and NOTICE_UPDATE_CC alone can set incorrect status. */
2181 if (0 /* optimize && LABEL_NUSES (insn) == 1*/)
2183 rtx jump
= LABEL_REFS (insn
);
2184 rtx barrier
= prev_nonnote_insn (insn
);
2186 /* If the LABEL_REFS field of this label has been set to point
2187 at a branch, the predecessor of the branch is a regular
2188 insn, and that branch is the only way to reach this label,
2189 set the condition codes based on the branch and its
2191 if (barrier
&& GET_CODE (barrier
) == BARRIER
2192 && jump
&& GET_CODE (jump
) == JUMP_INSN
2193 && (prev
= prev_nonnote_insn (jump
))
2194 && GET_CODE (prev
) == INSN
)
2196 NOTICE_UPDATE_CC (PATTERN (prev
), prev
);
2197 NOTICE_UPDATE_CC (PATTERN (jump
), jump
);
2205 #ifdef FINAL_PRESCAN_LABEL
2206 FINAL_PRESCAN_INSN (insn
, NULL
, 0);
2209 if (LABEL_NAME (insn
))
2210 (*debug_hooks
->label
) (insn
);
2214 fputs (ASM_APP_OFF
, file
);
2217 if (NEXT_INSN (insn
) != 0
2218 && GET_CODE (NEXT_INSN (insn
)) == JUMP_INSN
)
2220 rtx nextbody
= PATTERN (NEXT_INSN (insn
));
2222 /* If this label is followed by a jump-table,
2223 make sure we put the label in the read-only section. Also
2224 possibly write the label and jump table together. */
2226 if (GET_CODE (nextbody
) == ADDR_VEC
2227 || GET_CODE (nextbody
) == ADDR_DIFF_VEC
)
2229 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2230 /* In this case, the case vector is being moved by the
2231 target, so don't output the label at all. Leave that
2232 to the back end macros. */
2234 if (! JUMP_TABLES_IN_TEXT_SECTION
)
2238 readonly_data_section ();
2240 #ifdef ADDR_VEC_ALIGN
2241 log_align
= ADDR_VEC_ALIGN (NEXT_INSN (insn
));
2243 log_align
= exact_log2 (BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
);
2245 ASM_OUTPUT_ALIGN (file
, log_align
);
2248 function_section (current_function_decl
);
2250 #ifdef ASM_OUTPUT_CASE_LABEL
2251 ASM_OUTPUT_CASE_LABEL (file
, "L", CODE_LABEL_NUMBER (insn
),
2254 if (LABEL_ALTERNATE_NAME (insn
))
2255 ASM_OUTPUT_ALTERNATE_LABEL_NAME (file
, insn
);
2257 ASM_OUTPUT_INTERNAL_LABEL (file
, "L", CODE_LABEL_NUMBER (insn
));
2263 if (LABEL_ALTERNATE_NAME (insn
))
2264 ASM_OUTPUT_ALTERNATE_LABEL_NAME (file
, insn
);
2266 ASM_OUTPUT_INTERNAL_LABEL (file
, "L", CODE_LABEL_NUMBER (insn
));
2271 rtx body
= PATTERN (insn
);
2272 int insn_code_number
;
2273 const char *template;
2276 /* An INSN, JUMP_INSN or CALL_INSN.
2277 First check for special kinds that recog doesn't recognize. */
2279 if (GET_CODE (body
) == USE
/* These are just declarations */
2280 || GET_CODE (body
) == CLOBBER
)
2284 /* If there is a REG_CC_SETTER note on this insn, it means that
2285 the setting of the condition code was done in the delay slot
2286 of the insn that branched here. So recover the cc status
2287 from the insn that set it. */
2289 note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
2292 NOTICE_UPDATE_CC (PATTERN (XEXP (note
, 0)), XEXP (note
, 0));
2293 cc_prev_status
= cc_status
;
2297 /* Detect insns that are really jump-tables
2298 and output them as such. */
2300 if (GET_CODE (body
) == ADDR_VEC
|| GET_CODE (body
) == ADDR_DIFF_VEC
)
2302 #if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC))
2311 fputs (ASM_APP_OFF
, file
);
2315 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2316 if (GET_CODE (body
) == ADDR_VEC
)
2318 #ifdef ASM_OUTPUT_ADDR_VEC
2319 ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn
), body
);
2326 #ifdef ASM_OUTPUT_ADDR_DIFF_VEC
2327 ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn
), body
);
2333 vlen
= XVECLEN (body
, GET_CODE (body
) == ADDR_DIFF_VEC
);
2334 for (idx
= 0; idx
< vlen
; idx
++)
2336 if (GET_CODE (body
) == ADDR_VEC
)
2338 #ifdef ASM_OUTPUT_ADDR_VEC_ELT
2339 ASM_OUTPUT_ADDR_VEC_ELT
2340 (file
, CODE_LABEL_NUMBER (XEXP (XVECEXP (body
, 0, idx
), 0)));
2347 #ifdef ASM_OUTPUT_ADDR_DIFF_ELT
2348 ASM_OUTPUT_ADDR_DIFF_ELT
2351 CODE_LABEL_NUMBER (XEXP (XVECEXP (body
, 1, idx
), 0)),
2352 CODE_LABEL_NUMBER (XEXP (XEXP (body
, 0), 0)));
2358 #ifdef ASM_OUTPUT_CASE_END
2359 ASM_OUTPUT_CASE_END (file
,
2360 CODE_LABEL_NUMBER (PREV_INSN (insn
)),
2365 function_section (current_function_decl
);
2370 if (GET_CODE (body
) == ASM_INPUT
)
2372 const char *string
= XSTR (body
, 0);
2374 /* There's no telling what that did to the condition codes. */
2383 fputs (ASM_APP_ON
, file
);
2386 fprintf (asm_out_file
, "\t%s\n", string
);
2391 /* Detect `asm' construct with operands. */
2392 if (asm_noperands (body
) >= 0)
2394 unsigned int noperands
= asm_noperands (body
);
2395 rtx
*ops
= (rtx
*) alloca (noperands
* sizeof (rtx
));
2398 /* There's no telling what that did to the condition codes. */
2403 /* Get out the operand values. */
2404 string
= decode_asm_operands (body
, ops
, NULL
, NULL
, NULL
);
2405 /* Inhibit aborts on what would otherwise be compiler bugs. */
2406 insn_noperands
= noperands
;
2407 this_is_asm_operands
= insn
;
2409 /* Output the insn using them. */
2414 fputs (ASM_APP_ON
, file
);
2417 output_asm_insn (string
, ops
);
2420 this_is_asm_operands
= 0;
2424 if (prescan
<= 0 && app_on
)
2426 fputs (ASM_APP_OFF
, file
);
2430 if (GET_CODE (body
) == SEQUENCE
)
2432 /* A delayed-branch sequence */
2438 final_sequence
= body
;
2440 /* The first insn in this SEQUENCE might be a JUMP_INSN that will
2441 force the restoration of a comparison that was previously
2442 thought unnecessary. If that happens, cancel this sequence
2443 and cause that insn to be restored. */
2445 next
= final_scan_insn (XVECEXP (body
, 0, 0), file
, 0, prescan
, 1);
2446 if (next
!= XVECEXP (body
, 0, 1))
2452 for (i
= 1; i
< XVECLEN (body
, 0); i
++)
2454 rtx insn
= XVECEXP (body
, 0, i
);
2455 rtx next
= NEXT_INSN (insn
);
2456 /* We loop in case any instruction in a delay slot gets
2459 insn
= final_scan_insn (insn
, file
, 0, prescan
, 1);
2460 while (insn
!= next
);
2462 #ifdef DBR_OUTPUT_SEQEND
2463 DBR_OUTPUT_SEQEND (file
);
2467 /* If the insn requiring the delay slot was a CALL_INSN, the
2468 insns in the delay slot are actually executed before the
2469 called function. Hence we don't preserve any CC-setting
2470 actions in these insns and the CC must be marked as being
2471 clobbered by the function. */
2472 if (GET_CODE (XVECEXP (body
, 0, 0)) == CALL_INSN
)
2479 /* We have a real machine instruction as rtl. */
2481 body
= PATTERN (insn
);
2484 set
= single_set (insn
);
2486 /* Check for redundant test and compare instructions
2487 (when the condition codes are already set up as desired).
2488 This is done only when optimizing; if not optimizing,
2489 it should be possible for the user to alter a variable
2490 with the debugger in between statements
2491 and the next statement should reexamine the variable
2492 to compute the condition codes. */
2497 rtx set
= single_set (insn
);
2501 && GET_CODE (SET_DEST (set
)) == CC0
2502 && insn
!= last_ignored_compare
)
2504 if (GET_CODE (SET_SRC (set
)) == SUBREG
)
2505 SET_SRC (set
) = alter_subreg (&SET_SRC (set
));
2506 else if (GET_CODE (SET_SRC (set
)) == COMPARE
)
2508 if (GET_CODE (XEXP (SET_SRC (set
), 0)) == SUBREG
)
2509 XEXP (SET_SRC (set
), 0)
2510 = alter_subreg (&XEXP (SET_SRC (set
), 0));
2511 if (GET_CODE (XEXP (SET_SRC (set
), 1)) == SUBREG
)
2512 XEXP (SET_SRC (set
), 1)
2513 = alter_subreg (&XEXP (SET_SRC (set
), 1));
2515 if ((cc_status
.value1
!= 0
2516 && rtx_equal_p (SET_SRC (set
), cc_status
.value1
))
2517 || (cc_status
.value2
!= 0
2518 && rtx_equal_p (SET_SRC (set
), cc_status
.value2
)))
2520 /* Don't delete insn if it has an addressing side-effect. */
2521 if (! FIND_REG_INC_NOTE (insn
, NULL_RTX
)
2522 /* or if anything in it is volatile. */
2523 && ! volatile_refs_p (PATTERN (insn
)))
2525 /* We don't really delete the insn; just ignore it. */
2526 last_ignored_compare
= insn
;
2535 /* Don't bother outputting obvious no-ops, even without -O.
2536 This optimization is fast and doesn't interfere with debugging.
2537 Don't do this if the insn is in a delay slot, since this
2538 will cause an improper number of delay insns to be written. */
2539 if (final_sequence
== 0
2541 && GET_CODE (insn
) == INSN
&& GET_CODE (body
) == SET
2542 && GET_CODE (SET_SRC (body
)) == REG
2543 && GET_CODE (SET_DEST (body
)) == REG
2544 && REGNO (SET_SRC (body
)) == REGNO (SET_DEST (body
)))
2549 /* If this is a conditional branch, maybe modify it
2550 if the cc's are in a nonstandard state
2551 so that it accomplishes the same thing that it would
2552 do straightforwardly if the cc's were set up normally. */
2554 if (cc_status
.flags
!= 0
2555 && GET_CODE (insn
) == JUMP_INSN
2556 && GET_CODE (body
) == SET
2557 && SET_DEST (body
) == pc_rtx
2558 && GET_CODE (SET_SRC (body
)) == IF_THEN_ELSE
2559 && GET_RTX_CLASS (GET_CODE (XEXP (SET_SRC (body
), 0))) == '<'
2560 && XEXP (XEXP (SET_SRC (body
), 0), 0) == cc0_rtx
2561 /* This is done during prescan; it is not done again
2562 in final scan when prescan has been done. */
2565 /* This function may alter the contents of its argument
2566 and clear some of the cc_status.flags bits.
2567 It may also return 1 meaning condition now always true
2568 or -1 meaning condition now always false
2569 or 2 meaning condition nontrivial but altered. */
2570 int result
= alter_cond (XEXP (SET_SRC (body
), 0));
2571 /* If condition now has fixed value, replace the IF_THEN_ELSE
2572 with its then-operand or its else-operand. */
2574 SET_SRC (body
) = XEXP (SET_SRC (body
), 1);
2576 SET_SRC (body
) = XEXP (SET_SRC (body
), 2);
2578 /* The jump is now either unconditional or a no-op.
2579 If it has become a no-op, don't try to output it.
2580 (It would not be recognized.) */
2581 if (SET_SRC (body
) == pc_rtx
)
2586 else if (GET_CODE (SET_SRC (body
)) == RETURN
)
2587 /* Replace (set (pc) (return)) with (return). */
2588 PATTERN (insn
) = body
= SET_SRC (body
);
2590 /* Rerecognize the instruction if it has changed. */
2592 INSN_CODE (insn
) = -1;
2595 /* Make same adjustments to instructions that examine the
2596 condition codes without jumping and instructions that
2597 handle conditional moves (if this machine has either one). */
2599 if (cc_status
.flags
!= 0
2602 rtx cond_rtx
, then_rtx
, else_rtx
;
2604 if (GET_CODE (insn
) != JUMP_INSN
2605 && GET_CODE (SET_SRC (set
)) == IF_THEN_ELSE
)
2607 cond_rtx
= XEXP (SET_SRC (set
), 0);
2608 then_rtx
= XEXP (SET_SRC (set
), 1);
2609 else_rtx
= XEXP (SET_SRC (set
), 2);
2613 cond_rtx
= SET_SRC (set
);
2614 then_rtx
= const_true_rtx
;
2615 else_rtx
= const0_rtx
;
2618 switch (GET_CODE (cond_rtx
))
2632 if (XEXP (cond_rtx
, 0) != cc0_rtx
)
2634 result
= alter_cond (cond_rtx
);
2636 validate_change (insn
, &SET_SRC (set
), then_rtx
, 0);
2637 else if (result
== -1)
2638 validate_change (insn
, &SET_SRC (set
), else_rtx
, 0);
2639 else if (result
== 2)
2640 INSN_CODE (insn
) = -1;
2641 if (SET_DEST (set
) == SET_SRC (set
))
2653 #ifdef HAVE_peephole
2654 /* Do machine-specific peephole optimizations if desired. */
2656 if (optimize
&& !flag_no_peephole
&& !nopeepholes
)
2658 rtx next
= peephole (insn
);
2659 /* When peepholing, if there were notes within the peephole,
2660 emit them before the peephole. */
2661 if (next
!= 0 && next
!= NEXT_INSN (insn
))
2663 rtx prev
= PREV_INSN (insn
);
2665 for (note
= NEXT_INSN (insn
); note
!= next
;
2666 note
= NEXT_INSN (note
))
2667 final_scan_insn (note
, file
, optimize
, prescan
, nopeepholes
);
2669 /* In case this is prescan, put the notes
2670 in proper position for later rescan. */
2671 note
= NEXT_INSN (insn
);
2672 PREV_INSN (note
) = prev
;
2673 NEXT_INSN (prev
) = note
;
2674 NEXT_INSN (PREV_INSN (next
)) = insn
;
2675 PREV_INSN (insn
) = PREV_INSN (next
);
2676 NEXT_INSN (insn
) = next
;
2677 PREV_INSN (next
) = insn
;
2680 /* PEEPHOLE might have changed this. */
2681 body
= PATTERN (insn
);
2685 /* Try to recognize the instruction.
2686 If successful, verify that the operands satisfy the
2687 constraints for the instruction. Crash if they don't,
2688 since `reload' should have changed them so that they do. */
2690 insn_code_number
= recog_memoized (insn
);
2691 cleanup_subreg_operands (insn
);
2693 /* Dump the insn in the assembly for debugging. */
2694 if (flag_dump_rtl_in_asm
)
2696 print_rtx_head
= ASM_COMMENT_START
;
2697 print_rtl_single (asm_out_file
, insn
);
2698 print_rtx_head
= "";
2701 if (! constrain_operands_cached (1))
2702 fatal_insn_not_found (insn
);
2704 /* Some target machines need to prescan each insn before
2707 #ifdef FINAL_PRESCAN_INSN
2708 FINAL_PRESCAN_INSN (insn
, recog_data
.operand
, recog_data
.n_operands
);
2711 #ifdef HAVE_conditional_execution
2712 if (GET_CODE (PATTERN (insn
)) == COND_EXEC
)
2713 current_insn_predicate
= COND_EXEC_TEST (PATTERN (insn
));
2715 current_insn_predicate
= NULL_RTX
;
2719 cc_prev_status
= cc_status
;
2721 /* Update `cc_status' for this instruction.
2722 The instruction's output routine may change it further.
2723 If the output routine for a jump insn needs to depend
2724 on the cc status, it should look at cc_prev_status. */
2726 NOTICE_UPDATE_CC (body
, insn
);
2729 current_output_insn
= debug_insn
= insn
;
2731 #if defined (DWARF2_UNWIND_INFO)
2732 if (GET_CODE (insn
) == CALL_INSN
&& dwarf2out_do_frame ())
2733 dwarf2out_frame_debug (insn
);
2736 /* Find the proper template for this insn. */
2737 template = get_insn_template (insn_code_number
, insn
);
2739 /* If the C code returns 0, it means that it is a jump insn
2740 which follows a deleted test insn, and that test insn
2741 needs to be reinserted. */
2746 if (prev_nonnote_insn (insn
) != last_ignored_compare
)
2750 /* We have already processed the notes between the setter and
2751 the user. Make sure we don't process them again, this is
2752 particularly important if one of the notes is a block
2753 scope note or an EH note. */
2755 prev
!= last_ignored_compare
;
2756 prev
= PREV_INSN (prev
))
2758 if (GET_CODE (prev
) == NOTE
)
2759 delete_insn (prev
); /* Use delete_note. */
2765 /* If the template is the string "#", it means that this insn must
2767 if (template[0] == '#' && template[1] == '\0')
2769 rtx
new = try_split (body
, insn
, 0);
2771 /* If we didn't split the insn, go away. */
2772 if (new == insn
&& PATTERN (new) == body
)
2773 fatal_insn ("could not split insn", insn
);
2775 #ifdef HAVE_ATTR_length
2776 /* This instruction should have been split in shorten_branches,
2777 to ensure that we would have valid length info for the
2789 #ifdef IA64_UNWIND_INFO
2790 IA64_UNWIND_EMIT (asm_out_file
, insn
);
2792 /* Output assembler code from the template. */
2794 output_asm_insn (template, recog_data
.operand
);
2796 #if defined (DWARF2_UNWIND_INFO)
2797 #if defined (HAVE_prologue)
2798 if (GET_CODE (insn
) == INSN
&& dwarf2out_do_frame ())
2799 dwarf2out_frame_debug (insn
);
2801 if (!ACCUMULATE_OUTGOING_ARGS
2802 && GET_CODE (insn
) == INSN
2803 && dwarf2out_do_frame ())
2804 dwarf2out_frame_debug (insn
);
2809 /* It's not at all clear why we did this and doing so interferes
2810 with tests we'd like to do to use REG_WAS_0 notes, so let's try
2813 /* Mark this insn as having been output. */
2814 INSN_DELETED_P (insn
) = 1;
2817 /* Emit information for vtable gc. */
2818 note
= find_reg_note (insn
, REG_VTABLE_REF
, NULL_RTX
);
2820 assemble_vtable_entry (XEXP (XEXP (note
, 0), 0),
2821 INTVAL (XEXP (XEXP (note
, 0), 1)));
2823 current_output_insn
= debug_insn
= 0;
2826 return NEXT_INSN (insn
);
2829 /* Output debugging info to the assembler file FILE
2830 based on the NOTE-insn INSN, assumed to be a line number. */
2833 notice_source_line (insn
)
2836 const char *filename
= NOTE_SOURCE_FILE (insn
);
2838 last_filename
= filename
;
2839 last_linenum
= NOTE_LINE_NUMBER (insn
);
2840 high_block_linenum
= MAX (last_linenum
, high_block_linenum
);
2841 high_function_linenum
= MAX (last_linenum
, high_function_linenum
);
2844 /* For each operand in INSN, simplify (subreg (reg)) so that it refers
2845 directly to the desired hard register. */
2848 cleanup_subreg_operands (insn
)
2852 extract_insn_cached (insn
);
2853 for (i
= 0; i
< recog_data
.n_operands
; i
++)
2855 /* The following test cannot use recog_data.operand when tesing
2856 for a SUBREG: the underlying object might have been changed
2857 already if we are inside a match_operator expression that
2858 matches the else clause. Instead we test the underlying
2859 expression directly. */
2860 if (GET_CODE (*recog_data
.operand_loc
[i
]) == SUBREG
)
2861 recog_data
.operand
[i
] = alter_subreg (recog_data
.operand_loc
[i
]);
2862 else if (GET_CODE (recog_data
.operand
[i
]) == PLUS
2863 || GET_CODE (recog_data
.operand
[i
]) == MULT
2864 || GET_CODE (recog_data
.operand
[i
]) == MEM
)
2865 recog_data
.operand
[i
] = walk_alter_subreg (recog_data
.operand_loc
[i
]);
2868 for (i
= 0; i
< recog_data
.n_dups
; i
++)
2870 if (GET_CODE (*recog_data
.dup_loc
[i
]) == SUBREG
)
2871 *recog_data
.dup_loc
[i
] = alter_subreg (recog_data
.dup_loc
[i
]);
2872 else if (GET_CODE (*recog_data
.dup_loc
[i
]) == PLUS
2873 || GET_CODE (*recog_data
.dup_loc
[i
]) == MULT
2874 || GET_CODE (*recog_data
.dup_loc
[i
]) == MEM
)
2875 *recog_data
.dup_loc
[i
] = walk_alter_subreg (recog_data
.dup_loc
[i
]);
2879 /* If X is a SUBREG, replace it with a REG or a MEM,
2880 based on the thing it is a subreg of. */
2887 rtx y
= SUBREG_REG (x
);
2889 /* simplify_subreg does not remove subreg from volatile references.
2890 We are required to. */
2891 if (GET_CODE (y
) == MEM
)
2892 *xp
= adjust_address (y
, GET_MODE (x
), SUBREG_BYTE (x
));
2895 rtx
new = simplify_subreg (GET_MODE (x
), y
, GET_MODE (y
),
2900 /* Simplify_subreg can't handle some REG cases, but we have to. */
2901 else if (GET_CODE (y
) == REG
)
2903 unsigned int regno
= subreg_hard_regno (x
, 1);
2906 ORIGINAL_REGNO (x
) = ORIGINAL_REGNO (y
);
2907 /* This field has a different meaning for REGs and SUBREGs. Make
2908 sure to clear it! */
2909 RTX_FLAG (x
, used
) = 0;
2918 /* Do alter_subreg on all the SUBREGs contained in X. */
2921 walk_alter_subreg (xp
)
2925 switch (GET_CODE (x
))
2929 XEXP (x
, 0) = walk_alter_subreg (&XEXP (x
, 0));
2930 XEXP (x
, 1) = walk_alter_subreg (&XEXP (x
, 1));
2934 XEXP (x
, 0) = walk_alter_subreg (&XEXP (x
, 0));
2938 return alter_subreg (xp
);
2949 /* Given BODY, the body of a jump instruction, alter the jump condition
2950 as required by the bits that are set in cc_status.flags.
2951 Not all of the bits there can be handled at this level in all cases.
2953 The value is normally 0.
2954 1 means that the condition has become always true.
2955 -1 means that the condition has become always false.
2956 2 means that COND has been altered. */
2964 if (cc_status
.flags
& CC_REVERSED
)
2967 PUT_CODE (cond
, swap_condition (GET_CODE (cond
)));
2970 if (cc_status
.flags
& CC_INVERTED
)
2973 PUT_CODE (cond
, reverse_condition (GET_CODE (cond
)));
2976 if (cc_status
.flags
& CC_NOT_POSITIVE
)
2977 switch (GET_CODE (cond
))
2982 /* Jump becomes unconditional. */
2988 /* Jump becomes no-op. */
2992 PUT_CODE (cond
, EQ
);
2997 PUT_CODE (cond
, NE
);
3005 if (cc_status
.flags
& CC_NOT_NEGATIVE
)
3006 switch (GET_CODE (cond
))
3010 /* Jump becomes unconditional. */
3015 /* Jump becomes no-op. */
3020 PUT_CODE (cond
, EQ
);
3026 PUT_CODE (cond
, NE
);
3034 if (cc_status
.flags
& CC_NO_OVERFLOW
)
3035 switch (GET_CODE (cond
))
3038 /* Jump becomes unconditional. */
3042 PUT_CODE (cond
, EQ
);
3047 PUT_CODE (cond
, NE
);
3052 /* Jump becomes no-op. */
3059 if (cc_status
.flags
& (CC_Z_IN_NOT_N
| CC_Z_IN_N
))
3060 switch (GET_CODE (cond
))
3066 PUT_CODE (cond
, cc_status
.flags
& CC_Z_IN_N
? GE
: LT
);
3071 PUT_CODE (cond
, cc_status
.flags
& CC_Z_IN_N
? LT
: GE
);
3076 if (cc_status
.flags
& CC_NOT_SIGNED
)
3077 /* The flags are valid if signed condition operators are converted
3079 switch (GET_CODE (cond
))
3082 PUT_CODE (cond
, LEU
);
3087 PUT_CODE (cond
, LTU
);
3092 PUT_CODE (cond
, GTU
);
3097 PUT_CODE (cond
, GEU
);
3109 /* Report inconsistency between the assembler template and the operands.
3110 In an `asm', it's the user's fault; otherwise, the compiler's fault. */
3113 output_operand_lossage
VPARAMS ((const char *msgid
, ...))
3117 const char *pfx_str
;
3118 VA_OPEN (ap
, msgid
);
3119 VA_FIXEDARG (ap
, const char *, msgid
);
3121 pfx_str
= this_is_asm_operands
? _("invalid `asm': ") : "output_operand: ";
3122 asprintf (&fmt_string
, "%s%s", pfx_str
, _(msgid
));
3123 vasprintf (&new_message
, fmt_string
, ap
);
3125 if (this_is_asm_operands
)
3126 error_for_asm (this_is_asm_operands
, "%s", new_message
);
3128 internal_error ("%s", new_message
);
3135 /* Output of assembler code from a template, and its subroutines. */
3137 /* Annotate the assembly with a comment describing the pattern and
3138 alternative used. */
3145 int num
= INSN_CODE (debug_insn
);
3146 fprintf (asm_out_file
, "\t%s %d\t%s",
3147 ASM_COMMENT_START
, INSN_UID (debug_insn
),
3148 insn_data
[num
].name
);
3149 if (insn_data
[num
].n_alternatives
> 1)
3150 fprintf (asm_out_file
, "/%d", which_alternative
+ 1);
3151 #ifdef HAVE_ATTR_length
3152 fprintf (asm_out_file
, "\t[length = %d]",
3153 get_attr_length (debug_insn
));
3155 /* Clear this so only the first assembler insn
3156 of any rtl insn will get the special comment for -dp. */
3161 /* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it
3162 or its address, return that expr . Set *PADDRESSP to 1 if the expr
3163 corresponds to the address of the object and 0 if to the object. */
3166 get_mem_expr_from_op (op
, paddressp
)
3175 if (GET_CODE (op
) == REG
&& ORIGINAL_REGNO (op
) >= FIRST_PSEUDO_REGISTER
)
3176 return REGNO_DECL (ORIGINAL_REGNO (op
));
3177 else if (GET_CODE (op
) != MEM
)
3180 if (MEM_EXPR (op
) != 0)
3181 return MEM_EXPR (op
);
3183 /* Otherwise we have an address, so indicate it and look at the address. */
3187 /* First check if we have a decl for the address, then look at the right side
3188 if it is a PLUS. Otherwise, strip off arithmetic and keep looking.
3189 But don't allow the address to itself be indirect. */
3190 if ((expr
= get_mem_expr_from_op (op
, &inner_addressp
)) && ! inner_addressp
)
3192 else if (GET_CODE (op
) == PLUS
3193 && (expr
= get_mem_expr_from_op (XEXP (op
, 1), &inner_addressp
)))
3196 while (GET_RTX_CLASS (GET_CODE (op
)) == '1'
3197 || GET_RTX_CLASS (GET_CODE (op
)) == '2')
3200 expr
= get_mem_expr_from_op (op
, &inner_addressp
);
3201 return inner_addressp
? 0 : expr
;
3204 /* Output operand names for assembler instructions. OPERANDS is the
3205 operand vector, OPORDER is the order to write the operands, and NOPS
3206 is the number of operands to write. */
3209 output_asm_operand_names (operands
, oporder
, nops
)
3217 for (i
= 0; i
< nops
; i
++)
3220 tree expr
= get_mem_expr_from_op (operands
[oporder
[i
]], &addressp
);
3224 fprintf (asm_out_file
, "%c%s %s",
3225 wrote
? ',' : '\t', wrote
? "" : ASM_COMMENT_START
,
3226 addressp
? "*" : "");
3227 print_mem_expr (asm_out_file
, expr
);
3233 /* Output text from TEMPLATE to the assembler output file,
3234 obeying %-directions to substitute operands taken from
3235 the vector OPERANDS.
3237 %N (for N a digit) means print operand N in usual manner.
3238 %lN means require operand N to be a CODE_LABEL or LABEL_REF
3239 and print the label name with no punctuation.
3240 %cN means require operand N to be a constant
3241 and print the constant expression with no punctuation.
3242 %aN means expect operand N to be a memory address
3243 (not a memory reference!) and print a reference
3245 %nN means expect operand N to be a constant
3246 and print a constant expression for minus the value
3247 of the operand, with no other punctuation. */
3250 output_asm_insn (template, operands
)
3251 const char *template;
3256 #ifdef ASSEMBLER_DIALECT
3259 int oporder
[MAX_RECOG_OPERANDS
];
3260 char opoutput
[MAX_RECOG_OPERANDS
];
3263 /* An insn may return a null string template
3264 in a case where no assembler code is needed. */
3268 memset (opoutput
, 0, sizeof opoutput
);
3270 putc ('\t', asm_out_file
);
3272 #ifdef ASM_OUTPUT_OPCODE
3273 ASM_OUTPUT_OPCODE (asm_out_file
, p
);
3280 if (flag_verbose_asm
)
3281 output_asm_operand_names (operands
, oporder
, ops
);
3282 if (flag_print_asm_name
)
3286 memset (opoutput
, 0, sizeof opoutput
);
3288 putc (c
, asm_out_file
);
3289 #ifdef ASM_OUTPUT_OPCODE
3290 while ((c
= *p
) == '\t')
3292 putc (c
, asm_out_file
);
3295 ASM_OUTPUT_OPCODE (asm_out_file
, p
);
3299 #ifdef ASSEMBLER_DIALECT
3305 output_operand_lossage ("nested assembly dialect alternatives");
3309 /* If we want the first dialect, do nothing. Otherwise, skip
3310 DIALECT_NUMBER of strings ending with '|'. */
3311 for (i
= 0; i
< dialect_number
; i
++)
3313 while (*p
&& *p
!= '}' && *p
++ != '|')
3322 output_operand_lossage ("unterminated assembly dialect alternative");
3329 /* Skip to close brace. */
3334 output_operand_lossage ("unterminated assembly dialect alternative");
3338 while (*p
++ != '}');
3342 putc (c
, asm_out_file
);
3347 putc (c
, asm_out_file
);
3353 /* %% outputs a single %. */
3357 putc (c
, asm_out_file
);
3359 /* %= outputs a number which is unique to each insn in the entire
3360 compilation. This is useful for making local labels that are
3361 referred to more than once in a given insn. */
3365 fprintf (asm_out_file
, "%d", insn_counter
);
3367 /* % followed by a letter and some digits
3368 outputs an operand in a special way depending on the letter.
3369 Letters `acln' are implemented directly.
3370 Other letters are passed to `output_operand' so that
3371 the PRINT_OPERAND macro can define them. */
3372 else if (ISALPHA (*p
))
3378 output_operand_lossage ("operand number missing after %%-letter");
3379 else if (this_is_asm_operands
3380 && (c
< 0 || (unsigned int) c
>= insn_noperands
))
3381 output_operand_lossage ("operand number out of range");
3382 else if (letter
== 'l')
3383 output_asm_label (operands
[c
]);
3384 else if (letter
== 'a')
3385 output_address (operands
[c
]);
3386 else if (letter
== 'c')
3388 if (CONSTANT_ADDRESS_P (operands
[c
]))
3389 output_addr_const (asm_out_file
, operands
[c
]);
3391 output_operand (operands
[c
], 'c');
3393 else if (letter
== 'n')
3395 if (GET_CODE (operands
[c
]) == CONST_INT
)
3396 fprintf (asm_out_file
, HOST_WIDE_INT_PRINT_DEC
,
3397 - INTVAL (operands
[c
]));
3400 putc ('-', asm_out_file
);
3401 output_addr_const (asm_out_file
, operands
[c
]);
3405 output_operand (operands
[c
], letter
);
3411 while (ISDIGIT (c
= *p
))
3414 /* % followed by a digit outputs an operand the default way. */
3415 else if (ISDIGIT (*p
))
3418 if (this_is_asm_operands
3419 && (c
< 0 || (unsigned int) c
>= insn_noperands
))
3420 output_operand_lossage ("operand number out of range");
3422 output_operand (operands
[c
], 0);
3428 while (ISDIGIT (c
= *p
))
3431 /* % followed by punctuation: output something for that
3432 punctuation character alone, with no operand.
3433 The PRINT_OPERAND macro decides what is actually done. */
3434 #ifdef PRINT_OPERAND_PUNCT_VALID_P
3435 else if (PRINT_OPERAND_PUNCT_VALID_P ((unsigned char) *p
))
3436 output_operand (NULL_RTX
, *p
++);
3439 output_operand_lossage ("invalid %%-code");
3443 putc (c
, asm_out_file
);
3446 /* Write out the variable names for operands, if we know them. */
3447 if (flag_verbose_asm
)
3448 output_asm_operand_names (operands
, oporder
, ops
);
3449 if (flag_print_asm_name
)
3452 putc ('\n', asm_out_file
);
3455 /* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */
3458 output_asm_label (x
)
3463 if (GET_CODE (x
) == LABEL_REF
)
3465 if (GET_CODE (x
) == CODE_LABEL
3466 || (GET_CODE (x
) == NOTE
3467 && NOTE_LINE_NUMBER (x
) == NOTE_INSN_DELETED_LABEL
))
3468 ASM_GENERATE_INTERNAL_LABEL (buf
, "L", CODE_LABEL_NUMBER (x
));
3470 output_operand_lossage ("`%%l' operand isn't a label");
3472 assemble_name (asm_out_file
, buf
);
3475 /* Print operand X using machine-dependent assembler syntax.
3476 The macro PRINT_OPERAND is defined just to control this function.
3477 CODE is a non-digit that preceded the operand-number in the % spec,
3478 such as 'z' if the spec was `%z3'. CODE is 0 if there was no char
3479 between the % and the digits.
3480 When CODE is a non-letter, X is 0.
3482 The meanings of the letters are machine-dependent and controlled
3483 by PRINT_OPERAND. */
3486 output_operand (x
, code
)
3488 int code ATTRIBUTE_UNUSED
;
3490 if (x
&& GET_CODE (x
) == SUBREG
)
3491 x
= alter_subreg (&x
);
3493 /* If X is a pseudo-register, abort now rather than writing trash to the
3496 if (x
&& GET_CODE (x
) == REG
&& REGNO (x
) >= FIRST_PSEUDO_REGISTER
)
3499 PRINT_OPERAND (asm_out_file
, x
, code
);
3502 /* Print a memory reference operand for address X
3503 using machine-dependent assembler syntax.
3504 The macro PRINT_OPERAND_ADDRESS exists just to control this function. */
3510 walk_alter_subreg (&x
);
3511 PRINT_OPERAND_ADDRESS (asm_out_file
, x
);
3514 /* Print an integer constant expression in assembler syntax.
3515 Addition and subtraction are the only arithmetic
3516 that may appear in these expressions. */
3519 output_addr_const (file
, x
)
3526 switch (GET_CODE (x
))
3533 #ifdef ASM_OUTPUT_SYMBOL_REF
3534 ASM_OUTPUT_SYMBOL_REF (file
, x
);
3536 assemble_name (file
, XSTR (x
, 0));
3544 ASM_GENERATE_INTERNAL_LABEL (buf
, "L", CODE_LABEL_NUMBER (x
));
3545 #ifdef ASM_OUTPUT_LABEL_REF
3546 ASM_OUTPUT_LABEL_REF (file
, buf
);
3548 assemble_name (file
, buf
);
3553 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, INTVAL (x
));
3557 /* This used to output parentheses around the expression,
3558 but that does not work on the 386 (either ATT or BSD assembler). */
3559 output_addr_const (file
, XEXP (x
, 0));
3563 if (GET_MODE (x
) == VOIDmode
)
3565 /* We can use %d if the number is one word and positive. */
3566 if (CONST_DOUBLE_HIGH (x
))
3567 fprintf (file
, HOST_WIDE_INT_PRINT_DOUBLE_HEX
,
3568 CONST_DOUBLE_HIGH (x
), CONST_DOUBLE_LOW (x
));
3569 else if (CONST_DOUBLE_LOW (x
) < 0)
3570 fprintf (file
, HOST_WIDE_INT_PRINT_HEX
, CONST_DOUBLE_LOW (x
));
3572 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, CONST_DOUBLE_LOW (x
));
3575 /* We can't handle floating point constants;
3576 PRINT_OPERAND must handle them. */
3577 output_operand_lossage ("floating constant misused");
3581 /* Some assemblers need integer constants to appear last (eg masm). */
3582 if (GET_CODE (XEXP (x
, 0)) == CONST_INT
)
3584 output_addr_const (file
, XEXP (x
, 1));
3585 if (INTVAL (XEXP (x
, 0)) >= 0)
3586 fprintf (file
, "+");
3587 output_addr_const (file
, XEXP (x
, 0));
3591 output_addr_const (file
, XEXP (x
, 0));
3592 if (GET_CODE (XEXP (x
, 1)) != CONST_INT
3593 || INTVAL (XEXP (x
, 1)) >= 0)
3594 fprintf (file
, "+");
3595 output_addr_const (file
, XEXP (x
, 1));
3600 /* Avoid outputting things like x-x or x+5-x,
3601 since some assemblers can't handle that. */
3602 x
= simplify_subtraction (x
);
3603 if (GET_CODE (x
) != MINUS
)
3606 output_addr_const (file
, XEXP (x
, 0));
3607 fprintf (file
, "-");
3608 if ((GET_CODE (XEXP (x
, 1)) == CONST_INT
&& INTVAL (XEXP (x
, 1)) >= 0)
3609 || GET_CODE (XEXP (x
, 1)) == PC
3610 || GET_CODE (XEXP (x
, 1)) == SYMBOL_REF
)
3611 output_addr_const (file
, XEXP (x
, 1));
3614 fputs (targetm
.asm_out
.open_paren
, file
);
3615 output_addr_const (file
, XEXP (x
, 1));
3616 fputs (targetm
.asm_out
.close_paren
, file
);
3623 output_addr_const (file
, XEXP (x
, 0));
3627 #ifdef OUTPUT_ADDR_CONST_EXTRA
3628 OUTPUT_ADDR_CONST_EXTRA (file
, x
, fail
);
3633 output_operand_lossage ("invalid expression as operand");
3637 /* A poor man's fprintf, with the added features of %I, %R, %L, and %U.
3638 %R prints the value of REGISTER_PREFIX.
3639 %L prints the value of LOCAL_LABEL_PREFIX.
3640 %U prints the value of USER_LABEL_PREFIX.
3641 %I prints the value of IMMEDIATE_PREFIX.
3642 %O runs ASM_OUTPUT_OPCODE to transform what follows in the string.
3643 Also supported are %d, %x, %s, %e, %f, %g and %%.
3645 We handle alternate assembler dialects here, just like output_asm_insn. */
3648 asm_fprintf
VPARAMS ((FILE *file
, const char *p
, ...))
3653 VA_OPEN (argptr
, p
);
3654 VA_FIXEDARG (argptr
, FILE *, file
);
3655 VA_FIXEDARG (argptr
, const char *, p
);
3662 #ifdef ASSEMBLER_DIALECT
3667 /* If we want the first dialect, do nothing. Otherwise, skip
3668 DIALECT_NUMBER of strings ending with '|'. */
3669 for (i
= 0; i
< dialect_number
; i
++)
3671 while (*p
&& *p
++ != '|')
3681 /* Skip to close brace. */
3682 while (*p
&& *p
++ != '}')
3693 while (ISDIGIT (c
) || c
== '.')
3701 fprintf (file
, "%%");
3704 case 'd': case 'i': case 'u':
3705 case 'x': case 'p': case 'X':
3709 fprintf (file
, buf
, va_arg (argptr
, int));
3713 /* This is a prefix to the 'd', 'i', 'u', 'x', 'p', and 'X' cases,
3714 but we do not check for those cases. It means that the value
3715 is a HOST_WIDE_INT, which may be either `int' or `long'. */
3717 #if HOST_BITS_PER_WIDE_INT == HOST_BITS_PER_INT
3719 #if HOST_BITS_PER_WIDE_INT == HOST_BITS_PER_LONG
3729 fprintf (file
, buf
, va_arg (argptr
, HOST_WIDE_INT
));
3736 fprintf (file
, buf
, va_arg (argptr
, long));
3744 fprintf (file
, buf
, va_arg (argptr
, double));
3750 fprintf (file
, buf
, va_arg (argptr
, char *));
3754 #ifdef ASM_OUTPUT_OPCODE
3755 ASM_OUTPUT_OPCODE (asm_out_file
, p
);
3760 #ifdef REGISTER_PREFIX
3761 fprintf (file
, "%s", REGISTER_PREFIX
);
3766 #ifdef IMMEDIATE_PREFIX
3767 fprintf (file
, "%s", IMMEDIATE_PREFIX
);
3772 #ifdef LOCAL_LABEL_PREFIX
3773 fprintf (file
, "%s", LOCAL_LABEL_PREFIX
);
3778 fputs (user_label_prefix
, file
);
3781 #ifdef ASM_FPRINTF_EXTENSIONS
3782 /* Upper case letters are reserved for general use by asm_fprintf
3783 and so are not available to target specific code. In order to
3784 prevent the ASM_FPRINTF_EXTENSIONS macro from using them then,
3785 they are defined here. As they get turned into real extensions
3786 to asm_fprintf they should be removed from this list. */
3787 case 'A': case 'B': case 'C': case 'D': case 'E':
3788 case 'F': case 'G': case 'H': case 'J': case 'K':
3789 case 'M': case 'N': case 'P': case 'Q': case 'S':
3790 case 'T': case 'V': case 'W': case 'Y': case 'Z':
3793 ASM_FPRINTF_EXTENSIONS (file
, argptr
, p
)
3806 /* Split up a CONST_DOUBLE or integer constant rtx
3807 into two rtx's for single words,
3808 storing in *FIRST the word that comes first in memory in the target
3809 and in *SECOND the other. */
3812 split_double (value
, first
, second
)
3814 rtx
*first
, *second
;
3816 if (GET_CODE (value
) == CONST_INT
)
3818 if (HOST_BITS_PER_WIDE_INT
>= (2 * BITS_PER_WORD
))
3820 /* In this case the CONST_INT holds both target words.
3821 Extract the bits from it into two word-sized pieces.
3822 Sign extend each half to HOST_WIDE_INT. */
3823 unsigned HOST_WIDE_INT low
, high
;
3824 unsigned HOST_WIDE_INT mask
, sign_bit
, sign_extend
;
3826 /* Set sign_bit to the most significant bit of a word. */
3828 sign_bit
<<= BITS_PER_WORD
- 1;
3830 /* Set mask so that all bits of the word are set. We could
3831 have used 1 << BITS_PER_WORD instead of basing the
3832 calculation on sign_bit. However, on machines where
3833 HOST_BITS_PER_WIDE_INT == BITS_PER_WORD, it could cause a
3834 compiler warning, even though the code would never be
3836 mask
= sign_bit
<< 1;
3839 /* Set sign_extend as any remaining bits. */
3840 sign_extend
= ~mask
;
3842 /* Pick the lower word and sign-extend it. */
3843 low
= INTVAL (value
);
3848 /* Pick the higher word, shifted to the least significant
3849 bits, and sign-extend it. */
3850 high
= INTVAL (value
);
3851 high
>>= BITS_PER_WORD
- 1;
3854 if (high
& sign_bit
)
3855 high
|= sign_extend
;
3857 /* Store the words in the target machine order. */
3858 if (WORDS_BIG_ENDIAN
)
3860 *first
= GEN_INT (high
);
3861 *second
= GEN_INT (low
);
3865 *first
= GEN_INT (low
);
3866 *second
= GEN_INT (high
);
3871 /* The rule for using CONST_INT for a wider mode
3872 is that we regard the value as signed.
3873 So sign-extend it. */
3874 rtx high
= (INTVAL (value
) < 0 ? constm1_rtx
: const0_rtx
);
3875 if (WORDS_BIG_ENDIAN
)
3887 else if (GET_CODE (value
) != CONST_DOUBLE
)
3889 if (WORDS_BIG_ENDIAN
)
3891 *first
= const0_rtx
;
3897 *second
= const0_rtx
;
3900 else if (GET_MODE (value
) == VOIDmode
3901 /* This is the old way we did CONST_DOUBLE integers. */
3902 || GET_MODE_CLASS (GET_MODE (value
)) == MODE_INT
)
3904 /* In an integer, the words are defined as most and least significant.
3905 So order them by the target's convention. */
3906 if (WORDS_BIG_ENDIAN
)
3908 *first
= GEN_INT (CONST_DOUBLE_HIGH (value
));
3909 *second
= GEN_INT (CONST_DOUBLE_LOW (value
));
3913 *first
= GEN_INT (CONST_DOUBLE_LOW (value
));
3914 *second
= GEN_INT (CONST_DOUBLE_HIGH (value
));
3921 REAL_VALUE_FROM_CONST_DOUBLE (r
, value
);
3923 /* Note, this converts the REAL_VALUE_TYPE to the target's
3924 format, splits up the floating point double and outputs
3925 exactly 32 bits of it into each of l[0] and l[1] --
3926 not necessarily BITS_PER_WORD bits. */
3927 REAL_VALUE_TO_TARGET_DOUBLE (r
, l
);
3929 /* If 32 bits is an entire word for the target, but not for the host,
3930 then sign-extend on the host so that the number will look the same
3931 way on the host that it would on the target. See for instance
3932 simplify_unary_operation. The #if is needed to avoid compiler
3935 #if HOST_BITS_PER_LONG > 32
3936 if (BITS_PER_WORD
< HOST_BITS_PER_LONG
&& BITS_PER_WORD
== 32)
3938 if (l
[0] & ((long) 1 << 31))
3939 l
[0] |= ((long) (-1) << 32);
3940 if (l
[1] & ((long) 1 << 31))
3941 l
[1] |= ((long) (-1) << 32);
3945 *first
= GEN_INT ((HOST_WIDE_INT
) l
[0]);
3946 *second
= GEN_INT ((HOST_WIDE_INT
) l
[1]);
3950 /* Return nonzero if this function has no function calls. */
3958 if (current_function_profile
|| profile_arc_flag
)
3961 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
3963 if (GET_CODE (insn
) == CALL_INSN
3964 && ! SIBLING_CALL_P (insn
))
3966 if (GET_CODE (insn
) == INSN
3967 && GET_CODE (PATTERN (insn
)) == SEQUENCE
3968 && GET_CODE (XVECEXP (PATTERN (insn
), 0, 0)) == CALL_INSN
3969 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn
), 0, 0)))
3972 for (link
= current_function_epilogue_delay_list
;
3974 link
= XEXP (link
, 1))
3976 insn
= XEXP (link
, 0);
3978 if (GET_CODE (insn
) == CALL_INSN
3979 && ! SIBLING_CALL_P (insn
))
3981 if (GET_CODE (insn
) == INSN
3982 && GET_CODE (PATTERN (insn
)) == SEQUENCE
3983 && GET_CODE (XVECEXP (PATTERN (insn
), 0, 0)) == CALL_INSN
3984 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn
), 0, 0)))
3991 /* Return 1 if branch is an forward branch.
3992 Uses insn_shuid array, so it works only in the final pass. May be used by
3993 output templates to customary add branch prediction hints.
3996 final_forward_branch_p (insn
)
3999 int insn_id
, label_id
;
4002 insn_id
= INSN_SHUID (insn
);
4003 label_id
= INSN_SHUID (JUMP_LABEL (insn
));
4004 /* We've hit some insns that does not have id information available. */
4005 if (!insn_id
|| !label_id
)
4007 return insn_id
< label_id
;
4010 /* On some machines, a function with no call insns
4011 can run faster if it doesn't create its own register window.
4012 When output, the leaf function should use only the "output"
4013 registers. Ordinarily, the function would be compiled to use
4014 the "input" registers to find its arguments; it is a candidate
4015 for leaf treatment if it uses only the "input" registers.
4016 Leaf function treatment means renumbering so the function
4017 uses the "output" registers instead. */
4019 #ifdef LEAF_REGISTERS
4021 /* Return 1 if this function uses only the registers that can be
4022 safely renumbered. */
4025 only_leaf_regs_used ()
4028 char *permitted_reg_in_leaf_functions
= LEAF_REGISTERS
;
4030 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
4031 if ((regs_ever_live
[i
] || global_regs
[i
])
4032 && ! permitted_reg_in_leaf_functions
[i
])
4035 if (current_function_uses_pic_offset_table
4036 && pic_offset_table_rtx
!= 0
4037 && GET_CODE (pic_offset_table_rtx
) == REG
4038 && ! permitted_reg_in_leaf_functions
[REGNO (pic_offset_table_rtx
)])
4044 /* Scan all instructions and renumber all registers into those
4045 available in leaf functions. */
4048 leaf_renumber_regs (first
)
4053 /* Renumber only the actual patterns.
4054 The reg-notes can contain frame pointer refs,
4055 and renumbering them could crash, and should not be needed. */
4056 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
4058 leaf_renumber_regs_insn (PATTERN (insn
));
4059 for (insn
= current_function_epilogue_delay_list
;
4061 insn
= XEXP (insn
, 1))
4062 if (INSN_P (XEXP (insn
, 0)))
4063 leaf_renumber_regs_insn (PATTERN (XEXP (insn
, 0)));
4066 /* Scan IN_RTX and its subexpressions, and renumber all regs into those
4067 available in leaf functions. */
4070 leaf_renumber_regs_insn (in_rtx
)
4074 const char *format_ptr
;
4079 /* Renumber all input-registers into output-registers.
4080 renumbered_regs would be 1 for an output-register;
4083 if (GET_CODE (in_rtx
) == REG
)
4087 /* Don't renumber the same reg twice. */
4091 newreg
= REGNO (in_rtx
);
4092 /* Don't try to renumber pseudo regs. It is possible for a pseudo reg
4093 to reach here as part of a REG_NOTE. */
4094 if (newreg
>= FIRST_PSEUDO_REGISTER
)
4099 newreg
= LEAF_REG_REMAP (newreg
);
4102 regs_ever_live
[REGNO (in_rtx
)] = 0;
4103 regs_ever_live
[newreg
] = 1;
4104 REGNO (in_rtx
) = newreg
;
4108 if (INSN_P (in_rtx
))
4110 /* Inside a SEQUENCE, we find insns.
4111 Renumber just the patterns of these insns,
4112 just as we do for the top-level insns. */
4113 leaf_renumber_regs_insn (PATTERN (in_rtx
));
4117 format_ptr
= GET_RTX_FORMAT (GET_CODE (in_rtx
));
4119 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (in_rtx
)); i
++)
4120 switch (*format_ptr
++)
4123 leaf_renumber_regs_insn (XEXP (in_rtx
, i
));
4127 if (NULL
!= XVEC (in_rtx
, i
))
4129 for (j
= 0; j
< XVECLEN (in_rtx
, i
); j
++)
4130 leaf_renumber_regs_insn (XVECEXP (in_rtx
, i
, j
));