1 /* Convert RTL to assembler code and output it, for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
22 /* This is the final pass of the compiler.
23 It looks at the rtl code for a function and outputs assembler code.
25 Call `final_start_function' to output the assembler code for function entry,
26 `final' to output assembler code for some RTL code,
27 `final_end_function' to output assembler code for function exit.
28 If a function is compiled in several pieces, each piece is
29 output separately with `final'.
31 Some optimizations are also done at this level.
32 Move instructions that were made unnecessary by good register allocation
33 are detected and omitted from the output. (Though most of these
34 are removed by the last jump pass.)
36 Instructions to set the condition codes are omitted when it can be
37 seen that the condition codes already had the desired values.
39 In some cases it is sufficient if the inherited condition codes
40 have related values, but this may require the following insn
41 (the one that tests the condition codes) to be modified.
43 The code for the function prologue and epilogue are generated
44 directly in assembler by the target functions function_prologue and
45 function_epilogue. Those instructions never exist as rtl. */
49 #include "coretypes.h"
56 #include "insn-config.h"
57 #include "insn-attr.h"
59 #include "conditions.h"
62 #include "hard-reg-set.h"
69 #include "basic-block.h"
73 #include "cfglayout.h"
75 #ifdef XCOFF_DEBUGGING_INFO
76 #include "xcoffout.h" /* Needed for external data
77 declarations for e.g. AIX 4.x. */
80 #if defined (DWARF2_UNWIND_INFO) || defined (DWARF2_DEBUGGING_INFO)
81 #include "dwarf2out.h"
84 #ifdef DBX_DEBUGGING_INFO
88 /* If we aren't using cc0, CC_STATUS_INIT shouldn't exist. So define a
89 null default for it to save conditionalization later. */
90 #ifndef CC_STATUS_INIT
91 #define CC_STATUS_INIT
94 /* How to start an assembler comment. */
95 #ifndef ASM_COMMENT_START
96 #define ASM_COMMENT_START ";#"
99 /* Is the given character a logical line separator for the assembler? */
100 #ifndef IS_ASM_LOGICAL_LINE_SEPARATOR
101 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C) ((C) == ';')
104 #ifndef JUMP_TABLES_IN_TEXT_SECTION
105 #define JUMP_TABLES_IN_TEXT_SECTION 0
108 #if defined(READONLY_DATA_SECTION) || defined(READONLY_DATA_SECTION_ASM_OP)
109 #define HAVE_READONLY_DATA_SECTION 1
111 #define HAVE_READONLY_DATA_SECTION 0
114 /* Last insn processed by final_scan_insn. */
115 static rtx debug_insn
;
116 rtx current_output_insn
;
118 /* Line number of last NOTE. */
119 static int last_linenum
;
121 /* Highest line number in current block. */
122 static int high_block_linenum
;
124 /* Likewise for function. */
125 static int high_function_linenum
;
127 /* Filename of last NOTE. */
128 static const char *last_filename
;
130 extern int length_unit_log
; /* This is defined in insn-attrtab.c. */
132 /* Nonzero while outputting an `asm' with operands.
133 This means that inconsistencies are the user's fault, so don't abort.
134 The precise value is the insn being output, to pass to error_for_asm. */
135 rtx this_is_asm_operands
;
137 /* Number of operands of this insn, for an `asm' with operands. */
138 static unsigned int insn_noperands
;
140 /* Compare optimization flag. */
142 static rtx last_ignored_compare
= 0;
144 /* Assign a unique number to each insn that is output.
145 This can be used to generate unique local labels. */
147 static int insn_counter
= 0;
150 /* This variable contains machine-dependent flags (defined in tm.h)
151 set and examined by output routines
152 that describe how to interpret the condition codes properly. */
156 /* During output of an insn, this contains a copy of cc_status
157 from before the insn. */
159 CC_STATUS cc_prev_status
;
162 /* Indexed by hardware reg number, is 1 if that register is ever
163 used in the current function.
165 In life_analysis, or in stupid_life_analysis, this is set
166 up to record the hard regs used explicitly. Reload adds
167 in the hard regs used for holding pseudo regs. Final uses
168 it to generate the code in the function prologue and epilogue
169 to save and restore registers as needed. */
171 char regs_ever_live
[FIRST_PSEUDO_REGISTER
];
173 /* Like regs_ever_live, but 1 if a reg is set or clobbered from an asm.
174 Unlike regs_ever_live, elements of this array corresponding to
175 eliminable regs like the frame pointer are set if an asm sets them. */
177 char regs_asm_clobbered
[FIRST_PSEUDO_REGISTER
];
179 /* Nonzero means current function must be given a frame pointer.
180 Initialized in function.c to 0. Set only in reload1.c as per
181 the needs of the function. */
183 int frame_pointer_needed
;
185 /* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */
187 static int block_depth
;
189 /* Nonzero if have enabled APP processing of our assembler output. */
193 /* If we are outputting an insn sequence, this contains the sequence rtx.
198 #ifdef ASSEMBLER_DIALECT
200 /* Number of the assembler dialect to use, starting at 0. */
201 static int dialect_number
;
204 /* Indexed by line number, nonzero if there is a note for that line. */
206 static char *line_note_exists
;
208 #ifdef HAVE_conditional_execution
209 /* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */
210 rtx current_insn_predicate
;
213 #ifdef HAVE_ATTR_length
214 static int asm_insn_count (rtx
);
216 static void profile_function (FILE *);
217 static void profile_after_prologue (FILE *);
218 static bool notice_source_line (rtx
);
219 static rtx
walk_alter_subreg (rtx
*);
220 static void output_asm_name (void);
221 static void output_alternate_entry_point (FILE *, rtx
);
222 static tree
get_mem_expr_from_op (rtx
, int *);
223 static void output_asm_operand_names (rtx
*, int *, int);
224 static void output_operand (rtx
, int);
225 #ifdef LEAF_REGISTERS
226 static void leaf_renumber_regs (rtx
);
229 static int alter_cond (rtx
);
231 #ifndef ADDR_VEC_ALIGN
232 static int final_addr_vec_align (rtx
);
234 #ifdef HAVE_ATTR_length
235 static int align_fuzz (rtx
, rtx
, int, unsigned);
238 /* Initialize data in final at the beginning of a compilation. */
241 init_final (const char *filename ATTRIBUTE_UNUSED
)
246 #ifdef ASSEMBLER_DIALECT
247 dialect_number
= ASSEMBLER_DIALECT
;
251 /* Default target function prologue and epilogue assembler output.
253 If not overridden for epilogue code, then the function body itself
254 contains return instructions wherever needed. */
256 default_function_pro_epilogue (FILE *file ATTRIBUTE_UNUSED
,
257 HOST_WIDE_INT size ATTRIBUTE_UNUSED
)
261 /* Default target hook that outputs nothing to a stream. */
263 no_asm_to_stream (FILE *file ATTRIBUTE_UNUSED
)
267 /* Enable APP processing of subsequent output.
268 Used before the output from an `asm' statement. */
275 fputs (ASM_APP_ON
, asm_out_file
);
280 /* Disable APP processing of subsequent output.
281 Called from varasm.c before most kinds of output. */
288 fputs (ASM_APP_OFF
, asm_out_file
);
293 /* Return the number of slots filled in the current
294 delayed branch sequence (we don't count the insn needing the
295 delay slot). Zero if not in a delayed branch sequence. */
299 dbr_sequence_length (void)
301 if (final_sequence
!= 0)
302 return XVECLEN (final_sequence
, 0) - 1;
308 /* The next two pages contain routines used to compute the length of an insn
309 and to shorten branches. */
311 /* Arrays for insn lengths, and addresses. The latter is referenced by
312 `insn_current_length'. */
314 static int *insn_lengths
;
316 varray_type insn_addresses_
;
318 /* Max uid for which the above arrays are valid. */
319 static int insn_lengths_max_uid
;
321 /* Address of insn being processed. Used by `insn_current_length'. */
322 int insn_current_address
;
324 /* Address of insn being processed in previous iteration. */
325 int insn_last_address
;
327 /* known invariant alignment of insn being processed. */
328 int insn_current_align
;
330 /* After shorten_branches, for any insn, uid_align[INSN_UID (insn)]
331 gives the next following alignment insn that increases the known
332 alignment, or NULL_RTX if there is no such insn.
333 For any alignment obtained this way, we can again index uid_align with
334 its uid to obtain the next following align that in turn increases the
335 alignment, till we reach NULL_RTX; the sequence obtained this way
336 for each insn we'll call the alignment chain of this insn in the following
339 struct label_alignment
345 static rtx
*uid_align
;
346 static int *uid_shuid
;
347 static struct label_alignment
*label_align
;
349 /* Indicate that branch shortening hasn't yet been done. */
352 init_insn_lengths (void)
363 insn_lengths_max_uid
= 0;
365 #ifdef HAVE_ATTR_length
366 INSN_ADDRESSES_FREE ();
375 /* Obtain the current length of an insn. If branch shortening has been done,
376 get its actual length. Otherwise, get its maximum length. */
379 get_attr_length (rtx insn ATTRIBUTE_UNUSED
)
381 #ifdef HAVE_ATTR_length
386 if (insn_lengths_max_uid
> INSN_UID (insn
))
387 return insn_lengths
[INSN_UID (insn
)];
389 switch (GET_CODE (insn
))
397 length
= insn_default_length (insn
);
401 body
= PATTERN (insn
);
402 if (GET_CODE (body
) == ADDR_VEC
|| GET_CODE (body
) == ADDR_DIFF_VEC
)
404 /* Alignment is machine-dependent and should be handled by
408 length
= insn_default_length (insn
);
412 body
= PATTERN (insn
);
413 if (GET_CODE (body
) == USE
|| GET_CODE (body
) == CLOBBER
)
416 else if (GET_CODE (body
) == ASM_INPUT
|| asm_noperands (body
) >= 0)
417 length
= asm_insn_count (body
) * insn_default_length (insn
);
418 else if (GET_CODE (body
) == SEQUENCE
)
419 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
420 length
+= get_attr_length (XVECEXP (body
, 0, i
));
422 length
= insn_default_length (insn
);
429 #ifdef ADJUST_INSN_LENGTH
430 ADJUST_INSN_LENGTH (insn
, length
);
433 #else /* not HAVE_ATTR_length */
435 #endif /* not HAVE_ATTR_length */
438 /* Code to handle alignment inside shorten_branches. */
440 /* Here is an explanation how the algorithm in align_fuzz can give
443 Call a sequence of instructions beginning with alignment point X
444 and continuing until the next alignment point `block X'. When `X'
445 is used in an expression, it means the alignment value of the
448 Call the distance between the start of the first insn of block X, and
449 the end of the last insn of block X `IX', for the `inner size of X'.
450 This is clearly the sum of the instruction lengths.
452 Likewise with the next alignment-delimited block following X, which we
455 Call the distance between the start of the first insn of block X, and
456 the start of the first insn of block Y `OX', for the `outer size of X'.
458 The estimated padding is then OX - IX.
460 OX can be safely estimated as
465 OX = round_up(IX, X) + Y - X
467 Clearly est(IX) >= real(IX), because that only depends on the
468 instruction lengths, and those being overestimated is a given.
470 Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so
471 we needn't worry about that when thinking about OX.
473 When X >= Y, the alignment provided by Y adds no uncertainty factor
474 for branch ranges starting before X, so we can just round what we have.
475 But when X < Y, we don't know anything about the, so to speak,
476 `middle bits', so we have to assume the worst when aligning up from an
477 address mod X to one mod Y, which is Y - X. */
480 #define LABEL_ALIGN(LABEL) align_labels_log
483 #ifndef LABEL_ALIGN_MAX_SKIP
484 #define LABEL_ALIGN_MAX_SKIP align_labels_max_skip
488 #define LOOP_ALIGN(LABEL) align_loops_log
491 #ifndef LOOP_ALIGN_MAX_SKIP
492 #define LOOP_ALIGN_MAX_SKIP align_loops_max_skip
495 #ifndef LABEL_ALIGN_AFTER_BARRIER
496 #define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0
499 #ifndef LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP
500 #define LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP 0
504 #define JUMP_ALIGN(LABEL) align_jumps_log
507 #ifndef JUMP_ALIGN_MAX_SKIP
508 #define JUMP_ALIGN_MAX_SKIP align_jumps_max_skip
511 #ifndef ADDR_VEC_ALIGN
513 final_addr_vec_align (rtx addr_vec
)
515 int align
= GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec
)));
517 if (align
> BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
)
518 align
= BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
;
519 return exact_log2 (align
);
523 #define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC)
526 #ifndef INSN_LENGTH_ALIGNMENT
527 #define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log
530 #define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)])
532 static int min_labelno
, max_labelno
;
534 #define LABEL_TO_ALIGNMENT(LABEL) \
535 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment)
537 #define LABEL_TO_MAX_SKIP(LABEL) \
538 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip)
540 /* For the benefit of port specific code do this also as a function. */
543 label_to_alignment (rtx label
)
545 return LABEL_TO_ALIGNMENT (label
);
548 #ifdef HAVE_ATTR_length
549 /* The differences in addresses
550 between a branch and its target might grow or shrink depending on
551 the alignment the start insn of the range (the branch for a forward
552 branch or the label for a backward branch) starts out on; if these
553 differences are used naively, they can even oscillate infinitely.
554 We therefore want to compute a 'worst case' address difference that
555 is independent of the alignment the start insn of the range end
556 up on, and that is at least as large as the actual difference.
557 The function align_fuzz calculates the amount we have to add to the
558 naively computed difference, by traversing the part of the alignment
559 chain of the start insn of the range that is in front of the end insn
560 of the range, and considering for each alignment the maximum amount
561 that it might contribute to a size increase.
563 For casesi tables, we also want to know worst case minimum amounts of
564 address difference, in case a machine description wants to introduce
565 some common offset that is added to all offsets in a table.
566 For this purpose, align_fuzz with a growth argument of 0 computes the
567 appropriate adjustment. */
569 /* Compute the maximum delta by which the difference of the addresses of
570 START and END might grow / shrink due to a different address for start
571 which changes the size of alignment insns between START and END.
572 KNOWN_ALIGN_LOG is the alignment known for START.
573 GROWTH should be ~0 if the objective is to compute potential code size
574 increase, and 0 if the objective is to compute potential shrink.
575 The return value is undefined for any other value of GROWTH. */
578 align_fuzz (rtx start
, rtx end
, int known_align_log
, unsigned int growth
)
580 int uid
= INSN_UID (start
);
582 int known_align
= 1 << known_align_log
;
583 int end_shuid
= INSN_SHUID (end
);
586 for (align_label
= uid_align
[uid
]; align_label
; align_label
= uid_align
[uid
])
588 int align_addr
, new_align
;
590 uid
= INSN_UID (align_label
);
591 align_addr
= INSN_ADDRESSES (uid
) - insn_lengths
[uid
];
592 if (uid_shuid
[uid
] > end_shuid
)
594 known_align_log
= LABEL_TO_ALIGNMENT (align_label
);
595 new_align
= 1 << known_align_log
;
596 if (new_align
< known_align
)
598 fuzz
+= (-align_addr
^ growth
) & (new_align
- known_align
);
599 known_align
= new_align
;
604 /* Compute a worst-case reference address of a branch so that it
605 can be safely used in the presence of aligned labels. Since the
606 size of the branch itself is unknown, the size of the branch is
607 not included in the range. I.e. for a forward branch, the reference
608 address is the end address of the branch as known from the previous
609 branch shortening pass, minus a value to account for possible size
610 increase due to alignment. For a backward branch, it is the start
611 address of the branch as known from the current pass, plus a value
612 to account for possible size increase due to alignment.
613 NB.: Therefore, the maximum offset allowed for backward branches needs
614 to exclude the branch size. */
617 insn_current_reference_address (rtx branch
)
622 if (! INSN_ADDRESSES_SET_P ())
625 seq
= NEXT_INSN (PREV_INSN (branch
));
626 seq_uid
= INSN_UID (seq
);
627 if (GET_CODE (branch
) != JUMP_INSN
)
628 /* This can happen for example on the PA; the objective is to know the
629 offset to address something in front of the start of the function.
630 Thus, we can treat it like a backward branch.
631 We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than
632 any alignment we'd encounter, so we skip the call to align_fuzz. */
633 return insn_current_address
;
634 dest
= JUMP_LABEL (branch
);
636 /* BRANCH has no proper alignment chain set, so use SEQ.
637 BRANCH also has no INSN_SHUID. */
638 if (INSN_SHUID (seq
) < INSN_SHUID (dest
))
640 /* Forward branch. */
641 return (insn_last_address
+ insn_lengths
[seq_uid
]
642 - align_fuzz (seq
, dest
, length_unit_log
, ~0));
646 /* Backward branch. */
647 return (insn_current_address
648 + align_fuzz (dest
, seq
, length_unit_log
, ~0));
651 #endif /* HAVE_ATTR_length */
654 compute_alignments (void)
656 int log
, max_skip
, max_log
;
665 max_labelno
= max_label_num ();
666 min_labelno
= get_first_label_num ();
667 label_align
= xcalloc (max_labelno
- min_labelno
+ 1,
668 sizeof (struct label_alignment
));
670 /* If not optimizing or optimizing for size, don't assign any alignments. */
671 if (! optimize
|| optimize_size
)
676 rtx label
= bb
->head
;
677 int fallthru_frequency
= 0, branch_frequency
= 0, has_fallthru
= 0;
680 if (GET_CODE (label
) != CODE_LABEL
681 || probably_never_executed_bb_p (bb
))
683 max_log
= LABEL_ALIGN (label
);
684 max_skip
= LABEL_ALIGN_MAX_SKIP
;
686 for (e
= bb
->pred
; e
; e
= e
->pred_next
)
688 if (e
->flags
& EDGE_FALLTHRU
)
689 has_fallthru
= 1, fallthru_frequency
+= EDGE_FREQUENCY (e
);
691 branch_frequency
+= EDGE_FREQUENCY (e
);
694 /* There are two purposes to align block with no fallthru incoming edge:
695 1) to avoid fetch stalls when branch destination is near cache boundary
696 2) to improve cache efficiency in case the previous block is not executed
697 (so it does not need to be in the cache).
699 We to catch first case, we align frequently executed blocks.
700 To catch the second, we align blocks that are executed more frequently
701 than the predecessor and the predecessor is likely to not be executed
702 when function is called. */
705 && (branch_frequency
> BB_FREQ_MAX
/ 10
706 || (bb
->frequency
> bb
->prev_bb
->frequency
* 10
707 && (bb
->prev_bb
->frequency
708 <= ENTRY_BLOCK_PTR
->frequency
/ 2))))
710 log
= JUMP_ALIGN (label
);
714 max_skip
= JUMP_ALIGN_MAX_SKIP
;
717 /* In case block is frequent and reached mostly by non-fallthru edge,
718 align it. It is most likely a first block of loop. */
720 && maybe_hot_bb_p (bb
)
721 && branch_frequency
+ fallthru_frequency
> BB_FREQ_MAX
/ 10
722 && branch_frequency
> fallthru_frequency
* 2)
724 log
= LOOP_ALIGN (label
);
728 max_skip
= LOOP_ALIGN_MAX_SKIP
;
731 LABEL_TO_ALIGNMENT (label
) = max_log
;
732 LABEL_TO_MAX_SKIP (label
) = max_skip
;
736 /* Make a pass over all insns and compute their actual lengths by shortening
737 any branches of variable length if possible. */
739 /* Give a default value for the lowest address in a function. */
741 #ifndef FIRST_INSN_ADDRESS
742 #define FIRST_INSN_ADDRESS 0
745 /* shorten_branches might be called multiple times: for example, the SH
746 port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG.
747 In order to do this, it needs proper length information, which it obtains
748 by calling shorten_branches. This cannot be collapsed with
749 shorten_branches itself into a single pass unless we also want to integrate
750 reorg.c, since the branch splitting exposes new instructions with delay
754 shorten_branches (rtx first ATTRIBUTE_UNUSED
)
761 #ifdef HAVE_ATTR_length
762 #define MAX_CODE_ALIGN 16
764 int something_changed
= 1;
765 char *varying_length
;
768 rtx align_tab
[MAX_CODE_ALIGN
];
772 /* Compute maximum UID and allocate label_align / uid_shuid. */
773 max_uid
= get_max_uid ();
775 uid_shuid
= xmalloc (max_uid
* sizeof *uid_shuid
);
777 if (max_labelno
!= max_label_num ())
779 int old
= max_labelno
;
783 max_labelno
= max_label_num ();
785 n_labels
= max_labelno
- min_labelno
+ 1;
786 n_old_labels
= old
- min_labelno
+ 1;
788 label_align
= xrealloc (label_align
,
789 n_labels
* sizeof (struct label_alignment
));
791 /* Range of labels grows monotonically in the function. Abort here
792 means that the initialization of array got lost. */
793 if (n_old_labels
> n_labels
)
796 memset (label_align
+ n_old_labels
, 0,
797 (n_labels
- n_old_labels
) * sizeof (struct label_alignment
));
800 /* Initialize label_align and set up uid_shuid to be strictly
801 monotonically rising with insn order. */
802 /* We use max_log here to keep track of the maximum alignment we want to
803 impose on the next CODE_LABEL (or the current one if we are processing
804 the CODE_LABEL itself). */
809 for (insn
= get_insns (), i
= 1; insn
; insn
= NEXT_INSN (insn
))
813 INSN_SHUID (insn
) = i
++;
816 /* reorg might make the first insn of a loop being run once only,
817 and delete the label in front of it. Then we want to apply
818 the loop alignment to the new label created by reorg, which
819 is separated by the former loop start insn from the
820 NOTE_INSN_LOOP_BEG. */
822 else if (GET_CODE (insn
) == CODE_LABEL
)
826 /* Merge in alignments computed by compute_alignments. */
827 log
= LABEL_TO_ALIGNMENT (insn
);
831 max_skip
= LABEL_TO_MAX_SKIP (insn
);
834 log
= LABEL_ALIGN (insn
);
838 max_skip
= LABEL_ALIGN_MAX_SKIP
;
840 next
= NEXT_INSN (insn
);
841 /* ADDR_VECs only take room if read-only data goes into the text
843 if (JUMP_TABLES_IN_TEXT_SECTION
|| !HAVE_READONLY_DATA_SECTION
)
844 if (next
&& GET_CODE (next
) == JUMP_INSN
)
846 rtx nextbody
= PATTERN (next
);
847 if (GET_CODE (nextbody
) == ADDR_VEC
848 || GET_CODE (nextbody
) == ADDR_DIFF_VEC
)
850 log
= ADDR_VEC_ALIGN (next
);
854 max_skip
= LABEL_ALIGN_MAX_SKIP
;
858 LABEL_TO_ALIGNMENT (insn
) = max_log
;
859 LABEL_TO_MAX_SKIP (insn
) = max_skip
;
863 else if (GET_CODE (insn
) == BARRIER
)
867 for (label
= insn
; label
&& ! INSN_P (label
);
868 label
= NEXT_INSN (label
))
869 if (GET_CODE (label
) == CODE_LABEL
)
871 log
= LABEL_ALIGN_AFTER_BARRIER (insn
);
875 max_skip
= LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP
;
881 #ifdef HAVE_ATTR_length
883 /* Allocate the rest of the arrays. */
884 insn_lengths
= xmalloc (max_uid
* sizeof (*insn_lengths
));
885 insn_lengths_max_uid
= max_uid
;
886 /* Syntax errors can lead to labels being outside of the main insn stream.
887 Initialize insn_addresses, so that we get reproducible results. */
888 INSN_ADDRESSES_ALLOC (max_uid
);
890 varying_length
= xcalloc (max_uid
, sizeof (char));
892 /* Initialize uid_align. We scan instructions
893 from end to start, and keep in align_tab[n] the last seen insn
894 that does an alignment of at least n+1, i.e. the successor
895 in the alignment chain for an insn that does / has a known
897 uid_align
= xcalloc (max_uid
, sizeof *uid_align
);
899 for (i
= MAX_CODE_ALIGN
; --i
>= 0;)
900 align_tab
[i
] = NULL_RTX
;
901 seq
= get_last_insn ();
902 for (; seq
; seq
= PREV_INSN (seq
))
904 int uid
= INSN_UID (seq
);
906 log
= (GET_CODE (seq
) == CODE_LABEL
? LABEL_TO_ALIGNMENT (seq
) : 0);
907 uid_align
[uid
] = align_tab
[0];
910 /* Found an alignment label. */
911 uid_align
[uid
] = align_tab
[log
];
912 for (i
= log
- 1; i
>= 0; i
--)
916 #ifdef CASE_VECTOR_SHORTEN_MODE
919 /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum
922 int min_shuid
= INSN_SHUID (get_insns ()) - 1;
923 int max_shuid
= INSN_SHUID (get_last_insn ()) + 1;
926 for (insn
= first
; insn
!= 0; insn
= NEXT_INSN (insn
))
928 rtx min_lab
= NULL_RTX
, max_lab
= NULL_RTX
, pat
;
929 int len
, i
, min
, max
, insn_shuid
;
931 addr_diff_vec_flags flags
;
933 if (GET_CODE (insn
) != JUMP_INSN
934 || GET_CODE (PATTERN (insn
)) != ADDR_DIFF_VEC
)
936 pat
= PATTERN (insn
);
937 len
= XVECLEN (pat
, 1);
940 min_align
= MAX_CODE_ALIGN
;
941 for (min
= max_shuid
, max
= min_shuid
, i
= len
- 1; i
>= 0; i
--)
943 rtx lab
= XEXP (XVECEXP (pat
, 1, i
), 0);
944 int shuid
= INSN_SHUID (lab
);
955 if (min_align
> LABEL_TO_ALIGNMENT (lab
))
956 min_align
= LABEL_TO_ALIGNMENT (lab
);
958 XEXP (pat
, 2) = gen_rtx_LABEL_REF (VOIDmode
, min_lab
);
959 XEXP (pat
, 3) = gen_rtx_LABEL_REF (VOIDmode
, max_lab
);
960 insn_shuid
= INSN_SHUID (insn
);
961 rel
= INSN_SHUID (XEXP (XEXP (pat
, 0), 0));
962 flags
.min_align
= min_align
;
963 flags
.base_after_vec
= rel
> insn_shuid
;
964 flags
.min_after_vec
= min
> insn_shuid
;
965 flags
.max_after_vec
= max
> insn_shuid
;
966 flags
.min_after_base
= min
> rel
;
967 flags
.max_after_base
= max
> rel
;
968 ADDR_DIFF_VEC_FLAGS (pat
) = flags
;
971 #endif /* CASE_VECTOR_SHORTEN_MODE */
973 /* Compute initial lengths, addresses, and varying flags for each insn. */
974 for (insn_current_address
= FIRST_INSN_ADDRESS
, insn
= first
;
976 insn_current_address
+= insn_lengths
[uid
], insn
= NEXT_INSN (insn
))
978 uid
= INSN_UID (insn
);
980 insn_lengths
[uid
] = 0;
982 if (GET_CODE (insn
) == CODE_LABEL
)
984 int log
= LABEL_TO_ALIGNMENT (insn
);
987 int align
= 1 << log
;
988 int new_address
= (insn_current_address
+ align
- 1) & -align
;
989 insn_lengths
[uid
] = new_address
- insn_current_address
;
993 INSN_ADDRESSES (uid
) = insn_current_address
+ insn_lengths
[uid
];
995 if (GET_CODE (insn
) == NOTE
|| GET_CODE (insn
) == BARRIER
996 || GET_CODE (insn
) == CODE_LABEL
)
998 if (INSN_DELETED_P (insn
))
1001 body
= PATTERN (insn
);
1002 if (GET_CODE (body
) == ADDR_VEC
|| GET_CODE (body
) == ADDR_DIFF_VEC
)
1004 /* This only takes room if read-only data goes into the text
1006 if (JUMP_TABLES_IN_TEXT_SECTION
|| !HAVE_READONLY_DATA_SECTION
)
1007 insn_lengths
[uid
] = (XVECLEN (body
,
1008 GET_CODE (body
) == ADDR_DIFF_VEC
)
1009 * GET_MODE_SIZE (GET_MODE (body
)));
1010 /* Alignment is handled by ADDR_VEC_ALIGN. */
1012 else if (GET_CODE (body
) == ASM_INPUT
|| asm_noperands (body
) >= 0)
1013 insn_lengths
[uid
] = asm_insn_count (body
) * insn_default_length (insn
);
1014 else if (GET_CODE (body
) == SEQUENCE
)
1017 int const_delay_slots
;
1019 const_delay_slots
= const_num_delay_slots (XVECEXP (body
, 0, 0));
1021 const_delay_slots
= 0;
1023 /* Inside a delay slot sequence, we do not do any branch shortening
1024 if the shortening could change the number of delay slots
1026 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
1028 rtx inner_insn
= XVECEXP (body
, 0, i
);
1029 int inner_uid
= INSN_UID (inner_insn
);
1032 if (GET_CODE (body
) == ASM_INPUT
1033 || asm_noperands (PATTERN (XVECEXP (body
, 0, i
))) >= 0)
1034 inner_length
= (asm_insn_count (PATTERN (inner_insn
))
1035 * insn_default_length (inner_insn
));
1037 inner_length
= insn_default_length (inner_insn
);
1039 insn_lengths
[inner_uid
] = inner_length
;
1040 if (const_delay_slots
)
1042 if ((varying_length
[inner_uid
]
1043 = insn_variable_length_p (inner_insn
)) != 0)
1044 varying_length
[uid
] = 1;
1045 INSN_ADDRESSES (inner_uid
) = (insn_current_address
1046 + insn_lengths
[uid
]);
1049 varying_length
[inner_uid
] = 0;
1050 insn_lengths
[uid
] += inner_length
;
1053 else if (GET_CODE (body
) != USE
&& GET_CODE (body
) != CLOBBER
)
1055 insn_lengths
[uid
] = insn_default_length (insn
);
1056 varying_length
[uid
] = insn_variable_length_p (insn
);
1059 /* If needed, do any adjustment. */
1060 #ifdef ADJUST_INSN_LENGTH
1061 ADJUST_INSN_LENGTH (insn
, insn_lengths
[uid
]);
1062 if (insn_lengths
[uid
] < 0)
1063 fatal_insn ("negative insn length", insn
);
1067 /* Now loop over all the insns finding varying length insns. For each,
1068 get the current insn length. If it has changed, reflect the change.
1069 When nothing changes for a full pass, we are done. */
1071 while (something_changed
)
1073 something_changed
= 0;
1074 insn_current_align
= MAX_CODE_ALIGN
- 1;
1075 for (insn_current_address
= FIRST_INSN_ADDRESS
, insn
= first
;
1077 insn
= NEXT_INSN (insn
))
1080 #ifdef ADJUST_INSN_LENGTH
1085 uid
= INSN_UID (insn
);
1087 if (GET_CODE (insn
) == CODE_LABEL
)
1089 int log
= LABEL_TO_ALIGNMENT (insn
);
1090 if (log
> insn_current_align
)
1092 int align
= 1 << log
;
1093 int new_address
= (insn_current_address
+ align
- 1) & -align
;
1094 insn_lengths
[uid
] = new_address
- insn_current_address
;
1095 insn_current_align
= log
;
1096 insn_current_address
= new_address
;
1099 insn_lengths
[uid
] = 0;
1100 INSN_ADDRESSES (uid
) = insn_current_address
;
1104 length_align
= INSN_LENGTH_ALIGNMENT (insn
);
1105 if (length_align
< insn_current_align
)
1106 insn_current_align
= length_align
;
1108 insn_last_address
= INSN_ADDRESSES (uid
);
1109 INSN_ADDRESSES (uid
) = insn_current_address
;
1111 #ifdef CASE_VECTOR_SHORTEN_MODE
1112 if (optimize
&& GET_CODE (insn
) == JUMP_INSN
1113 && GET_CODE (PATTERN (insn
)) == ADDR_DIFF_VEC
)
1115 rtx body
= PATTERN (insn
);
1116 int old_length
= insn_lengths
[uid
];
1117 rtx rel_lab
= XEXP (XEXP (body
, 0), 0);
1118 rtx min_lab
= XEXP (XEXP (body
, 2), 0);
1119 rtx max_lab
= XEXP (XEXP (body
, 3), 0);
1120 int rel_addr
= INSN_ADDRESSES (INSN_UID (rel_lab
));
1121 int min_addr
= INSN_ADDRESSES (INSN_UID (min_lab
));
1122 int max_addr
= INSN_ADDRESSES (INSN_UID (max_lab
));
1125 addr_diff_vec_flags flags
;
1127 /* Avoid automatic aggregate initialization. */
1128 flags
= ADDR_DIFF_VEC_FLAGS (body
);
1130 /* Try to find a known alignment for rel_lab. */
1131 for (prev
= rel_lab
;
1133 && ! insn_lengths
[INSN_UID (prev
)]
1134 && ! (varying_length
[INSN_UID (prev
)] & 1);
1135 prev
= PREV_INSN (prev
))
1136 if (varying_length
[INSN_UID (prev
)] & 2)
1138 rel_align
= LABEL_TO_ALIGNMENT (prev
);
1142 /* See the comment on addr_diff_vec_flags in rtl.h for the
1143 meaning of the flags values. base: REL_LAB vec: INSN */
1144 /* Anything after INSN has still addresses from the last
1145 pass; adjust these so that they reflect our current
1146 estimate for this pass. */
1147 if (flags
.base_after_vec
)
1148 rel_addr
+= insn_current_address
- insn_last_address
;
1149 if (flags
.min_after_vec
)
1150 min_addr
+= insn_current_address
- insn_last_address
;
1151 if (flags
.max_after_vec
)
1152 max_addr
+= insn_current_address
- insn_last_address
;
1153 /* We want to know the worst case, i.e. lowest possible value
1154 for the offset of MIN_LAB. If MIN_LAB is after REL_LAB,
1155 its offset is positive, and we have to be wary of code shrink;
1156 otherwise, it is negative, and we have to be vary of code
1158 if (flags
.min_after_base
)
1160 /* If INSN is between REL_LAB and MIN_LAB, the size
1161 changes we are about to make can change the alignment
1162 within the observed offset, therefore we have to break
1163 it up into two parts that are independent. */
1164 if (! flags
.base_after_vec
&& flags
.min_after_vec
)
1166 min_addr
-= align_fuzz (rel_lab
, insn
, rel_align
, 0);
1167 min_addr
-= align_fuzz (insn
, min_lab
, 0, 0);
1170 min_addr
-= align_fuzz (rel_lab
, min_lab
, rel_align
, 0);
1174 if (flags
.base_after_vec
&& ! flags
.min_after_vec
)
1176 min_addr
-= align_fuzz (min_lab
, insn
, 0, ~0);
1177 min_addr
-= align_fuzz (insn
, rel_lab
, 0, ~0);
1180 min_addr
-= align_fuzz (min_lab
, rel_lab
, 0, ~0);
1182 /* Likewise, determine the highest lowest possible value
1183 for the offset of MAX_LAB. */
1184 if (flags
.max_after_base
)
1186 if (! flags
.base_after_vec
&& flags
.max_after_vec
)
1188 max_addr
+= align_fuzz (rel_lab
, insn
, rel_align
, ~0);
1189 max_addr
+= align_fuzz (insn
, max_lab
, 0, ~0);
1192 max_addr
+= align_fuzz (rel_lab
, max_lab
, rel_align
, ~0);
1196 if (flags
.base_after_vec
&& ! flags
.max_after_vec
)
1198 max_addr
+= align_fuzz (max_lab
, insn
, 0, 0);
1199 max_addr
+= align_fuzz (insn
, rel_lab
, 0, 0);
1202 max_addr
+= align_fuzz (max_lab
, rel_lab
, 0, 0);
1204 PUT_MODE (body
, CASE_VECTOR_SHORTEN_MODE (min_addr
- rel_addr
,
1205 max_addr
- rel_addr
,
1207 if (JUMP_TABLES_IN_TEXT_SECTION
|| !HAVE_READONLY_DATA_SECTION
)
1210 = (XVECLEN (body
, 1) * GET_MODE_SIZE (GET_MODE (body
)));
1211 insn_current_address
+= insn_lengths
[uid
];
1212 if (insn_lengths
[uid
] != old_length
)
1213 something_changed
= 1;
1218 #endif /* CASE_VECTOR_SHORTEN_MODE */
1220 if (! (varying_length
[uid
]))
1222 if (GET_CODE (insn
) == INSN
1223 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
1227 body
= PATTERN (insn
);
1228 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
1230 rtx inner_insn
= XVECEXP (body
, 0, i
);
1231 int inner_uid
= INSN_UID (inner_insn
);
1233 INSN_ADDRESSES (inner_uid
) = insn_current_address
;
1235 insn_current_address
+= insn_lengths
[inner_uid
];
1239 insn_current_address
+= insn_lengths
[uid
];
1244 if (GET_CODE (insn
) == INSN
&& GET_CODE (PATTERN (insn
)) == SEQUENCE
)
1248 body
= PATTERN (insn
);
1250 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
1252 rtx inner_insn
= XVECEXP (body
, 0, i
);
1253 int inner_uid
= INSN_UID (inner_insn
);
1256 INSN_ADDRESSES (inner_uid
) = insn_current_address
;
1258 /* insn_current_length returns 0 for insns with a
1259 non-varying length. */
1260 if (! varying_length
[inner_uid
])
1261 inner_length
= insn_lengths
[inner_uid
];
1263 inner_length
= insn_current_length (inner_insn
);
1265 if (inner_length
!= insn_lengths
[inner_uid
])
1267 insn_lengths
[inner_uid
] = inner_length
;
1268 something_changed
= 1;
1270 insn_current_address
+= insn_lengths
[inner_uid
];
1271 new_length
+= inner_length
;
1276 new_length
= insn_current_length (insn
);
1277 insn_current_address
+= new_length
;
1280 #ifdef ADJUST_INSN_LENGTH
1281 /* If needed, do any adjustment. */
1282 tmp_length
= new_length
;
1283 ADJUST_INSN_LENGTH (insn
, new_length
);
1284 insn_current_address
+= (new_length
- tmp_length
);
1287 if (new_length
!= insn_lengths
[uid
])
1289 insn_lengths
[uid
] = new_length
;
1290 something_changed
= 1;
1293 /* For a non-optimizing compile, do only a single pass. */
1298 free (varying_length
);
1300 #endif /* HAVE_ATTR_length */
1303 #ifdef HAVE_ATTR_length
1304 /* Given the body of an INSN known to be generated by an ASM statement, return
1305 the number of machine instructions likely to be generated for this insn.
1306 This is used to compute its length. */
1309 asm_insn_count (rtx body
)
1311 const char *template;
1314 if (GET_CODE (body
) == ASM_INPUT
)
1315 template = XSTR (body
, 0);
1317 template = decode_asm_operands (body
, NULL
, NULL
, NULL
, NULL
);
1319 for (; *template; template++)
1320 if (IS_ASM_LOGICAL_LINE_SEPARATOR (*template) || *template == '\n')
1327 /* Output assembler code for the start of a function,
1328 and initialize some of the variables in this file
1329 for the new function. The label for the function and associated
1330 assembler pseudo-ops have already been output in `assemble_start_function'.
1332 FIRST is the first insn of the rtl for the function being compiled.
1333 FILE is the file to write assembler code to.
1334 OPTIMIZE is nonzero if we should eliminate redundant
1335 test and compare insns. */
1338 final_start_function (rtx first ATTRIBUTE_UNUSED
, FILE *file
,
1339 int optimize ATTRIBUTE_UNUSED
)
1343 this_is_asm_operands
= 0;
1345 last_filename
= locator_file (prologue_locator
);
1346 last_linenum
= locator_line (prologue_locator
);
1348 high_block_linenum
= high_function_linenum
= last_linenum
;
1350 (*debug_hooks
->begin_prologue
) (last_linenum
, last_filename
);
1352 #if defined (DWARF2_UNWIND_INFO) || defined (IA64_UNWIND_INFO)
1353 if (write_symbols
!= DWARF2_DEBUG
&& write_symbols
!= VMS_AND_DWARF2_DEBUG
)
1354 dwarf2out_begin_prologue (0, NULL
);
1357 #ifdef LEAF_REG_REMAP
1358 if (current_function_uses_only_leaf_regs
)
1359 leaf_renumber_regs (first
);
1362 /* The Sun386i and perhaps other machines don't work right
1363 if the profiling code comes after the prologue. */
1364 #ifdef PROFILE_BEFORE_PROLOGUE
1365 if (current_function_profile
)
1366 profile_function (file
);
1367 #endif /* PROFILE_BEFORE_PROLOGUE */
1369 #if defined (DWARF2_UNWIND_INFO) && defined (HAVE_prologue)
1370 if (dwarf2out_do_frame ())
1371 dwarf2out_frame_debug (NULL_RTX
);
1374 /* If debugging, assign block numbers to all of the blocks in this
1378 remove_unnecessary_notes ();
1379 reemit_insn_block_notes ();
1380 number_blocks (current_function_decl
);
1381 /* We never actually put out begin/end notes for the top-level
1382 block in the function. But, conceptually, that block is
1384 TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl
)) = 1;
1387 /* First output the function prologue: code to set up the stack frame. */
1388 (*targetm
.asm_out
.function_prologue
) (file
, get_frame_size ());
1390 /* If the machine represents the prologue as RTL, the profiling code must
1391 be emitted when NOTE_INSN_PROLOGUE_END is scanned. */
1392 #ifdef HAVE_prologue
1393 if (! HAVE_prologue
)
1395 profile_after_prologue (file
);
1399 profile_after_prologue (FILE *file ATTRIBUTE_UNUSED
)
1401 #ifndef PROFILE_BEFORE_PROLOGUE
1402 if (current_function_profile
)
1403 profile_function (file
);
1404 #endif /* not PROFILE_BEFORE_PROLOGUE */
1408 profile_function (FILE *file ATTRIBUTE_UNUSED
)
1410 #ifndef NO_PROFILE_COUNTERS
1411 # define NO_PROFILE_COUNTERS 0
1413 #if defined(ASM_OUTPUT_REG_PUSH)
1414 int sval
= current_function_returns_struct
;
1415 rtx svrtx
= targetm
.calls
.struct_value_rtx (TREE_TYPE (current_function_decl
), 1);
1416 #if defined(STATIC_CHAIN_INCOMING_REGNUM) || defined(STATIC_CHAIN_REGNUM)
1417 int cxt
= current_function_needs_context
;
1419 #endif /* ASM_OUTPUT_REG_PUSH */
1421 if (! NO_PROFILE_COUNTERS
)
1423 int align
= MIN (BIGGEST_ALIGNMENT
, LONG_TYPE_SIZE
);
1425 ASM_OUTPUT_ALIGN (file
, floor_log2 (align
/ BITS_PER_UNIT
));
1426 (*targetm
.asm_out
.internal_label
) (file
, "LP", current_function_funcdef_no
);
1427 assemble_integer (const0_rtx
, LONG_TYPE_SIZE
/ BITS_PER_UNIT
, align
, 1);
1430 function_section (current_function_decl
);
1432 #if defined(ASM_OUTPUT_REG_PUSH)
1433 if (sval
&& svrtx
!= NULL_RTX
&& GET_CODE (svrtx
) == REG
)
1434 ASM_OUTPUT_REG_PUSH (file
, REGNO (svrtx
));
1437 #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1439 ASM_OUTPUT_REG_PUSH (file
, STATIC_CHAIN_INCOMING_REGNUM
);
1441 #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1444 ASM_OUTPUT_REG_PUSH (file
, STATIC_CHAIN_REGNUM
);
1449 FUNCTION_PROFILER (file
, current_function_funcdef_no
);
1451 #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1453 ASM_OUTPUT_REG_POP (file
, STATIC_CHAIN_INCOMING_REGNUM
);
1455 #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1458 ASM_OUTPUT_REG_POP (file
, STATIC_CHAIN_REGNUM
);
1463 #if defined(ASM_OUTPUT_REG_PUSH)
1464 if (sval
&& svrtx
!= NULL_RTX
&& GET_CODE (svrtx
) == REG
)
1465 ASM_OUTPUT_REG_POP (file
, REGNO (svrtx
));
1469 /* Output assembler code for the end of a function.
1470 For clarity, args are same as those of `final_start_function'
1471 even though not all of them are needed. */
1474 final_end_function (void)
1478 (*debug_hooks
->end_function
) (high_function_linenum
);
1480 /* Finally, output the function epilogue:
1481 code to restore the stack frame and return to the caller. */
1482 (*targetm
.asm_out
.function_epilogue
) (asm_out_file
, get_frame_size ());
1484 /* And debug output. */
1485 (*debug_hooks
->end_epilogue
) (last_linenum
, last_filename
);
1487 #if defined (DWARF2_UNWIND_INFO)
1488 if (write_symbols
!= DWARF2_DEBUG
&& write_symbols
!= VMS_AND_DWARF2_DEBUG
1489 && dwarf2out_do_frame ())
1490 dwarf2out_end_epilogue (last_linenum
, last_filename
);
1494 /* Output assembler code for some insns: all or part of a function.
1495 For description of args, see `final_start_function', above.
1497 PRESCAN is 1 if we are not really outputting,
1498 just scanning as if we were outputting.
1499 Prescanning deletes and rearranges insns just like ordinary output.
1500 PRESCAN is -2 if we are outputting after having prescanned.
1501 In this case, don't try to delete or rearrange insns
1502 because that has already been done.
1503 Prescanning is done only on certain machines. */
1506 final (rtx first
, FILE *file
, int optimize
, int prescan
)
1512 last_ignored_compare
= 0;
1514 /* Make a map indicating which line numbers appear in this function.
1515 When producing SDB debugging info, delete troublesome line number
1516 notes from inlined functions in other files as well as duplicate
1517 line number notes. */
1518 #ifdef SDB_DEBUGGING_INFO
1519 if (write_symbols
== SDB_DEBUG
)
1522 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
1523 if (GET_CODE (insn
) == NOTE
&& NOTE_LINE_NUMBER (insn
) > 0)
1525 if ((RTX_INTEGRATED_P (insn
)
1526 && strcmp (NOTE_SOURCE_FILE (insn
), main_input_filename
) != 0)
1528 && NOTE_LINE_NUMBER (insn
) == NOTE_LINE_NUMBER (last
)
1529 && NOTE_SOURCE_FILE (insn
) == NOTE_SOURCE_FILE (last
)))
1531 delete_insn (insn
); /* Use delete_note. */
1535 if (NOTE_LINE_NUMBER (insn
) > max_line
)
1536 max_line
= NOTE_LINE_NUMBER (insn
);
1542 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
1543 if (GET_CODE (insn
) == NOTE
&& NOTE_LINE_NUMBER (insn
) > max_line
)
1544 max_line
= NOTE_LINE_NUMBER (insn
);
1547 line_note_exists
= xcalloc (max_line
+ 1, sizeof (char));
1549 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
1551 if (INSN_UID (insn
) > max_uid
) /* Find largest UID. */
1552 max_uid
= INSN_UID (insn
);
1553 if (GET_CODE (insn
) == NOTE
&& NOTE_LINE_NUMBER (insn
) > 0)
1554 line_note_exists
[NOTE_LINE_NUMBER (insn
)] = 1;
1556 /* If CC tracking across branches is enabled, record the insn which
1557 jumps to each branch only reached from one place. */
1558 if (optimize
&& GET_CODE (insn
) == JUMP_INSN
)
1560 rtx lab
= JUMP_LABEL (insn
);
1561 if (lab
&& LABEL_NUSES (lab
) == 1)
1563 LABEL_REFS (lab
) = insn
;
1573 /* Output the insns. */
1574 for (insn
= NEXT_INSN (first
); insn
;)
1576 #ifdef HAVE_ATTR_length
1577 if ((unsigned) INSN_UID (insn
) >= INSN_ADDRESSES_SIZE ())
1579 /* This can be triggered by bugs elsewhere in the compiler if
1580 new insns are created after init_insn_lengths is called. */
1581 if (GET_CODE (insn
) == NOTE
)
1582 insn_current_address
= -1;
1587 insn_current_address
= INSN_ADDRESSES (INSN_UID (insn
));
1588 #endif /* HAVE_ATTR_length */
1590 insn
= final_scan_insn (insn
, file
, optimize
, prescan
, 0);
1593 free (line_note_exists
);
1594 line_note_exists
= NULL
;
1598 get_insn_template (int code
, rtx insn
)
1600 const void *output
= insn_data
[code
].output
;
1601 switch (insn_data
[code
].output_format
)
1603 case INSN_OUTPUT_FORMAT_SINGLE
:
1604 return (const char *) output
;
1605 case INSN_OUTPUT_FORMAT_MULTI
:
1606 return ((const char *const *) output
)[which_alternative
];
1607 case INSN_OUTPUT_FORMAT_FUNCTION
:
1610 return (*(insn_output_fn
) output
) (recog_data
.operand
, insn
);
1617 /* Emit the appropriate declaration for an alternate-entry-point
1618 symbol represented by INSN, to FILE. INSN is a CODE_LABEL with
1619 LABEL_KIND != LABEL_NORMAL.
1621 The case fall-through in this function is intentional. */
1623 output_alternate_entry_point (FILE *file
, rtx insn
)
1625 const char *name
= LABEL_NAME (insn
);
1627 switch (LABEL_KIND (insn
))
1629 case LABEL_WEAK_ENTRY
:
1630 #ifdef ASM_WEAKEN_LABEL
1631 ASM_WEAKEN_LABEL (file
, name
);
1633 case LABEL_GLOBAL_ENTRY
:
1634 (*targetm
.asm_out
.globalize_label
) (file
, name
);
1635 case LABEL_STATIC_ENTRY
:
1636 #ifdef ASM_OUTPUT_TYPE_DIRECTIVE
1637 ASM_OUTPUT_TYPE_DIRECTIVE (file
, name
, "function");
1639 ASM_OUTPUT_LABEL (file
, name
);
1648 /* The final scan for one insn, INSN.
1649 Args are same as in `final', except that INSN
1650 is the insn being scanned.
1651 Value returned is the next insn to be scanned.
1653 NOPEEPHOLES is the flag to disallow peephole processing (currently
1654 used for within delayed branch sequence output). */
1657 final_scan_insn (rtx insn
, FILE *file
, int optimize ATTRIBUTE_UNUSED
,
1658 int prescan
, int nopeepholes ATTRIBUTE_UNUSED
)
1666 /* Ignore deleted insns. These can occur when we split insns (due to a
1667 template of "#") while not optimizing. */
1668 if (INSN_DELETED_P (insn
))
1669 return NEXT_INSN (insn
);
1671 switch (GET_CODE (insn
))
1677 switch (NOTE_LINE_NUMBER (insn
))
1679 case NOTE_INSN_DELETED
:
1680 case NOTE_INSN_LOOP_BEG
:
1681 case NOTE_INSN_LOOP_END
:
1682 case NOTE_INSN_LOOP_END_TOP_COND
:
1683 case NOTE_INSN_LOOP_CONT
:
1684 case NOTE_INSN_LOOP_VTOP
:
1685 case NOTE_INSN_FUNCTION_END
:
1686 case NOTE_INSN_REPEATED_LINE_NUMBER
:
1687 case NOTE_INSN_EXPECTED_VALUE
:
1690 case NOTE_INSN_BASIC_BLOCK
:
1691 #ifdef IA64_UNWIND_INFO
1692 IA64_UNWIND_EMIT (asm_out_file
, insn
);
1695 fprintf (asm_out_file
, "\t%s basic block %d\n",
1696 ASM_COMMENT_START
, NOTE_BASIC_BLOCK (insn
)->index
);
1699 case NOTE_INSN_EH_REGION_BEG
:
1700 ASM_OUTPUT_DEBUG_LABEL (asm_out_file
, "LEHB",
1701 NOTE_EH_HANDLER (insn
));
1704 case NOTE_INSN_EH_REGION_END
:
1705 ASM_OUTPUT_DEBUG_LABEL (asm_out_file
, "LEHE",
1706 NOTE_EH_HANDLER (insn
));
1709 case NOTE_INSN_PROLOGUE_END
:
1710 (*targetm
.asm_out
.function_end_prologue
) (file
);
1711 profile_after_prologue (file
);
1714 case NOTE_INSN_EPILOGUE_BEG
:
1715 (*targetm
.asm_out
.function_begin_epilogue
) (file
);
1718 case NOTE_INSN_FUNCTION_BEG
:
1720 (*debug_hooks
->end_prologue
) (last_linenum
, last_filename
);
1723 case NOTE_INSN_BLOCK_BEG
:
1724 if (debug_info_level
== DINFO_LEVEL_NORMAL
1725 || debug_info_level
== DINFO_LEVEL_VERBOSE
1726 || write_symbols
== DWARF_DEBUG
1727 || write_symbols
== DWARF2_DEBUG
1728 || write_symbols
== VMS_AND_DWARF2_DEBUG
1729 || write_symbols
== VMS_DEBUG
)
1731 int n
= BLOCK_NUMBER (NOTE_BLOCK (insn
));
1735 high_block_linenum
= last_linenum
;
1737 /* Output debugging info about the symbol-block beginning. */
1738 (*debug_hooks
->begin_block
) (last_linenum
, n
);
1740 /* Mark this block as output. */
1741 TREE_ASM_WRITTEN (NOTE_BLOCK (insn
)) = 1;
1745 case NOTE_INSN_BLOCK_END
:
1746 if (debug_info_level
== DINFO_LEVEL_NORMAL
1747 || debug_info_level
== DINFO_LEVEL_VERBOSE
1748 || write_symbols
== DWARF_DEBUG
1749 || write_symbols
== DWARF2_DEBUG
1750 || write_symbols
== VMS_AND_DWARF2_DEBUG
1751 || write_symbols
== VMS_DEBUG
)
1753 int n
= BLOCK_NUMBER (NOTE_BLOCK (insn
));
1757 /* End of a symbol-block. */
1759 if (block_depth
< 0)
1762 (*debug_hooks
->end_block
) (high_block_linenum
, n
);
1766 case NOTE_INSN_DELETED_LABEL
:
1767 /* Emit the label. We may have deleted the CODE_LABEL because
1768 the label could be proved to be unreachable, though still
1769 referenced (in the form of having its address taken. */
1770 ASM_OUTPUT_DEBUG_LABEL (file
, "L", CODE_LABEL_NUMBER (insn
));
1777 if (NOTE_LINE_NUMBER (insn
) <= 0)
1784 #if defined (DWARF2_UNWIND_INFO)
1785 if (dwarf2out_do_frame ())
1786 dwarf2out_frame_debug (insn
);
1791 /* The target port might emit labels in the output function for
1792 some insn, e.g. sh.c output_branchy_insn. */
1793 if (CODE_LABEL_NUMBER (insn
) <= max_labelno
)
1795 int align
= LABEL_TO_ALIGNMENT (insn
);
1796 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
1797 int max_skip
= LABEL_TO_MAX_SKIP (insn
);
1800 if (align
&& NEXT_INSN (insn
))
1802 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
1803 ASM_OUTPUT_MAX_SKIP_ALIGN (file
, align
, max_skip
);
1805 #ifdef ASM_OUTPUT_ALIGN_WITH_NOP
1806 ASM_OUTPUT_ALIGN_WITH_NOP (file
, align
);
1808 ASM_OUTPUT_ALIGN (file
, align
);
1815 /* If this label is reached from only one place, set the condition
1816 codes from the instruction just before the branch. */
1818 /* Disabled because some insns set cc_status in the C output code
1819 and NOTICE_UPDATE_CC alone can set incorrect status. */
1820 if (0 /* optimize && LABEL_NUSES (insn) == 1*/)
1822 rtx jump
= LABEL_REFS (insn
);
1823 rtx barrier
= prev_nonnote_insn (insn
);
1825 /* If the LABEL_REFS field of this label has been set to point
1826 at a branch, the predecessor of the branch is a regular
1827 insn, and that branch is the only way to reach this label,
1828 set the condition codes based on the branch and its
1830 if (barrier
&& GET_CODE (barrier
) == BARRIER
1831 && jump
&& GET_CODE (jump
) == JUMP_INSN
1832 && (prev
= prev_nonnote_insn (jump
))
1833 && GET_CODE (prev
) == INSN
)
1835 NOTICE_UPDATE_CC (PATTERN (prev
), prev
);
1836 NOTICE_UPDATE_CC (PATTERN (jump
), jump
);
1843 #ifdef FINAL_PRESCAN_LABEL
1844 FINAL_PRESCAN_INSN (insn
, NULL
, 0);
1847 if (LABEL_NAME (insn
))
1848 (*debug_hooks
->label
) (insn
);
1852 fputs (ASM_APP_OFF
, file
);
1855 if (NEXT_INSN (insn
) != 0
1856 && GET_CODE (NEXT_INSN (insn
)) == JUMP_INSN
)
1858 rtx nextbody
= PATTERN (NEXT_INSN (insn
));
1860 /* If this label is followed by a jump-table,
1861 make sure we put the label in the read-only section. Also
1862 possibly write the label and jump table together. */
1864 if (GET_CODE (nextbody
) == ADDR_VEC
1865 || GET_CODE (nextbody
) == ADDR_DIFF_VEC
)
1867 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
1868 /* In this case, the case vector is being moved by the
1869 target, so don't output the label at all. Leave that
1870 to the back end macros. */
1872 if (! JUMP_TABLES_IN_TEXT_SECTION
)
1876 readonly_data_section ();
1878 #ifdef ADDR_VEC_ALIGN
1879 log_align
= ADDR_VEC_ALIGN (NEXT_INSN (insn
));
1881 log_align
= exact_log2 (BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
);
1883 ASM_OUTPUT_ALIGN (file
, log_align
);
1886 function_section (current_function_decl
);
1888 #ifdef ASM_OUTPUT_CASE_LABEL
1889 ASM_OUTPUT_CASE_LABEL (file
, "L", CODE_LABEL_NUMBER (insn
),
1892 (*targetm
.asm_out
.internal_label
) (file
, "L", CODE_LABEL_NUMBER (insn
));
1898 if (LABEL_ALT_ENTRY_P (insn
))
1899 output_alternate_entry_point (file
, insn
);
1901 (*targetm
.asm_out
.internal_label
) (file
, "L", CODE_LABEL_NUMBER (insn
));
1906 rtx body
= PATTERN (insn
);
1907 int insn_code_number
;
1908 const char *template;
1911 /* An INSN, JUMP_INSN or CALL_INSN.
1912 First check for special kinds that recog doesn't recognize. */
1914 if (GET_CODE (body
) == USE
/* These are just declarations */
1915 || GET_CODE (body
) == CLOBBER
)
1919 /* If there is a REG_CC_SETTER note on this insn, it means that
1920 the setting of the condition code was done in the delay slot
1921 of the insn that branched here. So recover the cc status
1922 from the insn that set it. */
1924 note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
1927 NOTICE_UPDATE_CC (PATTERN (XEXP (note
, 0)), XEXP (note
, 0));
1928 cc_prev_status
= cc_status
;
1932 /* Detect insns that are really jump-tables
1933 and output them as such. */
1935 if (GET_CODE (body
) == ADDR_VEC
|| GET_CODE (body
) == ADDR_DIFF_VEC
)
1937 #if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC))
1946 fputs (ASM_APP_OFF
, file
);
1950 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
1951 if (GET_CODE (body
) == ADDR_VEC
)
1953 #ifdef ASM_OUTPUT_ADDR_VEC
1954 ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn
), body
);
1961 #ifdef ASM_OUTPUT_ADDR_DIFF_VEC
1962 ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn
), body
);
1968 vlen
= XVECLEN (body
, GET_CODE (body
) == ADDR_DIFF_VEC
);
1969 for (idx
= 0; idx
< vlen
; idx
++)
1971 if (GET_CODE (body
) == ADDR_VEC
)
1973 #ifdef ASM_OUTPUT_ADDR_VEC_ELT
1974 ASM_OUTPUT_ADDR_VEC_ELT
1975 (file
, CODE_LABEL_NUMBER (XEXP (XVECEXP (body
, 0, idx
), 0)));
1982 #ifdef ASM_OUTPUT_ADDR_DIFF_ELT
1983 ASM_OUTPUT_ADDR_DIFF_ELT
1986 CODE_LABEL_NUMBER (XEXP (XVECEXP (body
, 1, idx
), 0)),
1987 CODE_LABEL_NUMBER (XEXP (XEXP (body
, 0), 0)));
1993 #ifdef ASM_OUTPUT_CASE_END
1994 ASM_OUTPUT_CASE_END (file
,
1995 CODE_LABEL_NUMBER (PREV_INSN (insn
)),
2000 function_section (current_function_decl
);
2004 /* Output this line note if it is the first or the last line
2006 if (notice_source_line (insn
))
2008 (*debug_hooks
->source_line
) (last_linenum
, last_filename
);
2011 if (GET_CODE (body
) == ASM_INPUT
)
2013 const char *string
= XSTR (body
, 0);
2015 /* There's no telling what that did to the condition codes. */
2024 fputs (ASM_APP_ON
, file
);
2027 fprintf (asm_out_file
, "\t%s\n", string
);
2032 /* Detect `asm' construct with operands. */
2033 if (asm_noperands (body
) >= 0)
2035 unsigned int noperands
= asm_noperands (body
);
2036 rtx
*ops
= alloca (noperands
* sizeof (rtx
));
2039 /* There's no telling what that did to the condition codes. */
2044 /* Get out the operand values. */
2045 string
= decode_asm_operands (body
, ops
, NULL
, NULL
, NULL
);
2046 /* Inhibit aborts on what would otherwise be compiler bugs. */
2047 insn_noperands
= noperands
;
2048 this_is_asm_operands
= insn
;
2050 #ifdef FINAL_PRESCAN_INSN
2051 FINAL_PRESCAN_INSN (insn
, ops
, insn_noperands
);
2054 /* Output the insn using them. */
2059 fputs (ASM_APP_ON
, file
);
2062 output_asm_insn (string
, ops
);
2065 this_is_asm_operands
= 0;
2069 if (prescan
<= 0 && app_on
)
2071 fputs (ASM_APP_OFF
, file
);
2075 if (GET_CODE (body
) == SEQUENCE
)
2077 /* A delayed-branch sequence */
2083 final_sequence
= body
;
2085 /* Record the delay slots' frame information before the branch.
2086 This is needed for delayed calls: see execute_cfa_program(). */
2087 #if defined (DWARF2_UNWIND_INFO)
2088 if (dwarf2out_do_frame ())
2089 for (i
= 1; i
< XVECLEN (body
, 0); i
++)
2090 dwarf2out_frame_debug (XVECEXP (body
, 0, i
));
2093 /* The first insn in this SEQUENCE might be a JUMP_INSN that will
2094 force the restoration of a comparison that was previously
2095 thought unnecessary. If that happens, cancel this sequence
2096 and cause that insn to be restored. */
2098 next
= final_scan_insn (XVECEXP (body
, 0, 0), file
, 0, prescan
, 1);
2099 if (next
!= XVECEXP (body
, 0, 1))
2105 for (i
= 1; i
< XVECLEN (body
, 0); i
++)
2107 rtx insn
= XVECEXP (body
, 0, i
);
2108 rtx next
= NEXT_INSN (insn
);
2109 /* We loop in case any instruction in a delay slot gets
2112 insn
= final_scan_insn (insn
, file
, 0, prescan
, 1);
2113 while (insn
!= next
);
2115 #ifdef DBR_OUTPUT_SEQEND
2116 DBR_OUTPUT_SEQEND (file
);
2120 /* If the insn requiring the delay slot was a CALL_INSN, the
2121 insns in the delay slot are actually executed before the
2122 called function. Hence we don't preserve any CC-setting
2123 actions in these insns and the CC must be marked as being
2124 clobbered by the function. */
2125 if (GET_CODE (XVECEXP (body
, 0, 0)) == CALL_INSN
)
2132 /* We have a real machine instruction as rtl. */
2134 body
= PATTERN (insn
);
2137 set
= single_set (insn
);
2139 /* Check for redundant test and compare instructions
2140 (when the condition codes are already set up as desired).
2141 This is done only when optimizing; if not optimizing,
2142 it should be possible for the user to alter a variable
2143 with the debugger in between statements
2144 and the next statement should reexamine the variable
2145 to compute the condition codes. */
2150 && GET_CODE (SET_DEST (set
)) == CC0
2151 && insn
!= last_ignored_compare
)
2153 if (GET_CODE (SET_SRC (set
)) == SUBREG
)
2154 SET_SRC (set
) = alter_subreg (&SET_SRC (set
));
2155 else if (GET_CODE (SET_SRC (set
)) == COMPARE
)
2157 if (GET_CODE (XEXP (SET_SRC (set
), 0)) == SUBREG
)
2158 XEXP (SET_SRC (set
), 0)
2159 = alter_subreg (&XEXP (SET_SRC (set
), 0));
2160 if (GET_CODE (XEXP (SET_SRC (set
), 1)) == SUBREG
)
2161 XEXP (SET_SRC (set
), 1)
2162 = alter_subreg (&XEXP (SET_SRC (set
), 1));
2164 if ((cc_status
.value1
!= 0
2165 && rtx_equal_p (SET_SRC (set
), cc_status
.value1
))
2166 || (cc_status
.value2
!= 0
2167 && rtx_equal_p (SET_SRC (set
), cc_status
.value2
)))
2169 /* Don't delete insn if it has an addressing side-effect. */
2170 if (! FIND_REG_INC_NOTE (insn
, NULL_RTX
)
2171 /* or if anything in it is volatile. */
2172 && ! volatile_refs_p (PATTERN (insn
)))
2174 /* We don't really delete the insn; just ignore it. */
2175 last_ignored_compare
= insn
;
2184 /* Don't bother outputting obvious no-ops, even without -O.
2185 This optimization is fast and doesn't interfere with debugging.
2186 Don't do this if the insn is in a delay slot, since this
2187 will cause an improper number of delay insns to be written. */
2188 if (final_sequence
== 0
2190 && GET_CODE (insn
) == INSN
&& GET_CODE (body
) == SET
2191 && GET_CODE (SET_SRC (body
)) == REG
2192 && GET_CODE (SET_DEST (body
)) == REG
2193 && REGNO (SET_SRC (body
)) == REGNO (SET_DEST (body
)))
2198 /* If this is a conditional branch, maybe modify it
2199 if the cc's are in a nonstandard state
2200 so that it accomplishes the same thing that it would
2201 do straightforwardly if the cc's were set up normally. */
2203 if (cc_status
.flags
!= 0
2204 && GET_CODE (insn
) == JUMP_INSN
2205 && GET_CODE (body
) == SET
2206 && SET_DEST (body
) == pc_rtx
2207 && GET_CODE (SET_SRC (body
)) == IF_THEN_ELSE
2208 && GET_RTX_CLASS (GET_CODE (XEXP (SET_SRC (body
), 0))) == '<'
2209 && XEXP (XEXP (SET_SRC (body
), 0), 0) == cc0_rtx
2210 /* This is done during prescan; it is not done again
2211 in final scan when prescan has been done. */
2214 /* This function may alter the contents of its argument
2215 and clear some of the cc_status.flags bits.
2216 It may also return 1 meaning condition now always true
2217 or -1 meaning condition now always false
2218 or 2 meaning condition nontrivial but altered. */
2219 int result
= alter_cond (XEXP (SET_SRC (body
), 0));
2220 /* If condition now has fixed value, replace the IF_THEN_ELSE
2221 with its then-operand or its else-operand. */
2223 SET_SRC (body
) = XEXP (SET_SRC (body
), 1);
2225 SET_SRC (body
) = XEXP (SET_SRC (body
), 2);
2227 /* The jump is now either unconditional or a no-op.
2228 If it has become a no-op, don't try to output it.
2229 (It would not be recognized.) */
2230 if (SET_SRC (body
) == pc_rtx
)
2235 else if (GET_CODE (SET_SRC (body
)) == RETURN
)
2236 /* Replace (set (pc) (return)) with (return). */
2237 PATTERN (insn
) = body
= SET_SRC (body
);
2239 /* Rerecognize the instruction if it has changed. */
2241 INSN_CODE (insn
) = -1;
2244 /* Make same adjustments to instructions that examine the
2245 condition codes without jumping and instructions that
2246 handle conditional moves (if this machine has either one). */
2248 if (cc_status
.flags
!= 0
2251 rtx cond_rtx
, then_rtx
, else_rtx
;
2253 if (GET_CODE (insn
) != JUMP_INSN
2254 && GET_CODE (SET_SRC (set
)) == IF_THEN_ELSE
)
2256 cond_rtx
= XEXP (SET_SRC (set
), 0);
2257 then_rtx
= XEXP (SET_SRC (set
), 1);
2258 else_rtx
= XEXP (SET_SRC (set
), 2);
2262 cond_rtx
= SET_SRC (set
);
2263 then_rtx
= const_true_rtx
;
2264 else_rtx
= const0_rtx
;
2267 switch (GET_CODE (cond_rtx
))
2281 if (XEXP (cond_rtx
, 0) != cc0_rtx
)
2283 result
= alter_cond (cond_rtx
);
2285 validate_change (insn
, &SET_SRC (set
), then_rtx
, 0);
2286 else if (result
== -1)
2287 validate_change (insn
, &SET_SRC (set
), else_rtx
, 0);
2288 else if (result
== 2)
2289 INSN_CODE (insn
) = -1;
2290 if (SET_DEST (set
) == SET_SRC (set
))
2302 #ifdef HAVE_peephole
2303 /* Do machine-specific peephole optimizations if desired. */
2305 if (optimize
&& !flag_no_peephole
&& !nopeepholes
)
2307 rtx next
= peephole (insn
);
2308 /* When peepholing, if there were notes within the peephole,
2309 emit them before the peephole. */
2310 if (next
!= 0 && next
!= NEXT_INSN (insn
))
2312 rtx prev
= PREV_INSN (insn
);
2314 for (note
= NEXT_INSN (insn
); note
!= next
;
2315 note
= NEXT_INSN (note
))
2316 final_scan_insn (note
, file
, optimize
, prescan
, nopeepholes
);
2318 /* In case this is prescan, put the notes
2319 in proper position for later rescan. */
2320 note
= NEXT_INSN (insn
);
2321 PREV_INSN (note
) = prev
;
2322 NEXT_INSN (prev
) = note
;
2323 NEXT_INSN (PREV_INSN (next
)) = insn
;
2324 PREV_INSN (insn
) = PREV_INSN (next
);
2325 NEXT_INSN (insn
) = next
;
2326 PREV_INSN (next
) = insn
;
2329 /* PEEPHOLE might have changed this. */
2330 body
= PATTERN (insn
);
2334 /* Try to recognize the instruction.
2335 If successful, verify that the operands satisfy the
2336 constraints for the instruction. Crash if they don't,
2337 since `reload' should have changed them so that they do. */
2339 insn_code_number
= recog_memoized (insn
);
2340 cleanup_subreg_operands (insn
);
2342 /* Dump the insn in the assembly for debugging. */
2343 if (flag_dump_rtl_in_asm
)
2345 print_rtx_head
= ASM_COMMENT_START
;
2346 print_rtl_single (asm_out_file
, insn
);
2347 print_rtx_head
= "";
2350 if (! constrain_operands_cached (1))
2351 fatal_insn_not_found (insn
);
2353 /* Some target machines need to prescan each insn before
2356 #ifdef FINAL_PRESCAN_INSN
2357 FINAL_PRESCAN_INSN (insn
, recog_data
.operand
, recog_data
.n_operands
);
2360 #ifdef HAVE_conditional_execution
2361 if (GET_CODE (PATTERN (insn
)) == COND_EXEC
)
2362 current_insn_predicate
= COND_EXEC_TEST (PATTERN (insn
));
2364 current_insn_predicate
= NULL_RTX
;
2368 cc_prev_status
= cc_status
;
2370 /* Update `cc_status' for this instruction.
2371 The instruction's output routine may change it further.
2372 If the output routine for a jump insn needs to depend
2373 on the cc status, it should look at cc_prev_status. */
2375 NOTICE_UPDATE_CC (body
, insn
);
2378 current_output_insn
= debug_insn
= insn
;
2380 #if defined (DWARF2_UNWIND_INFO)
2381 if (GET_CODE (insn
) == CALL_INSN
&& dwarf2out_do_frame ())
2382 dwarf2out_frame_debug (insn
);
2385 /* Find the proper template for this insn. */
2386 template = get_insn_template (insn_code_number
, insn
);
2388 /* If the C code returns 0, it means that it is a jump insn
2389 which follows a deleted test insn, and that test insn
2390 needs to be reinserted. */
2395 if (prev_nonnote_insn (insn
) != last_ignored_compare
)
2398 /* We have already processed the notes between the setter and
2399 the user. Make sure we don't process them again, this is
2400 particularly important if one of the notes is a block
2401 scope note or an EH note. */
2403 prev
!= last_ignored_compare
;
2404 prev
= PREV_INSN (prev
))
2406 if (GET_CODE (prev
) == NOTE
)
2407 delete_insn (prev
); /* Use delete_note. */
2413 /* If the template is the string "#", it means that this insn must
2415 if (template[0] == '#' && template[1] == '\0')
2417 rtx
new = try_split (body
, insn
, 0);
2419 /* If we didn't split the insn, go away. */
2420 if (new == insn
&& PATTERN (new) == body
)
2421 fatal_insn ("could not split insn", insn
);
2423 #ifdef HAVE_ATTR_length
2424 /* This instruction should have been split in shorten_branches,
2425 to ensure that we would have valid length info for the
2436 #ifdef IA64_UNWIND_INFO
2437 IA64_UNWIND_EMIT (asm_out_file
, insn
);
2439 /* Output assembler code from the template. */
2441 output_asm_insn (template, recog_data
.operand
);
2443 /* If necessary, report the effect that the instruction has on
2444 the unwind info. We've already done this for delay slots
2445 and call instructions. */
2446 #if defined (DWARF2_UNWIND_INFO)
2447 if (GET_CODE (insn
) == INSN
2448 #if !defined (HAVE_prologue)
2449 && !ACCUMULATE_OUTGOING_ARGS
2451 && final_sequence
== 0
2452 && dwarf2out_do_frame ())
2453 dwarf2out_frame_debug (insn
);
2457 /* It's not at all clear why we did this and doing so used to
2458 interfere with tests that used REG_WAS_0 notes, which are
2459 now gone, so let's try with this out. */
2461 /* Mark this insn as having been output. */
2462 INSN_DELETED_P (insn
) = 1;
2465 /* Emit information for vtable gc. */
2466 note
= find_reg_note (insn
, REG_VTABLE_REF
, NULL_RTX
);
2468 current_output_insn
= debug_insn
= 0;
2471 return NEXT_INSN (insn
);
2474 /* Output debugging info to the assembler file FILE
2475 based on the NOTE-insn INSN, assumed to be a line number. */
2478 notice_source_line (rtx insn
)
2480 const char *filename
= insn_file (insn
);
2481 int linenum
= insn_line (insn
);
2483 if (filename
&& (filename
!= last_filename
|| last_linenum
!= linenum
))
2485 last_filename
= filename
;
2486 last_linenum
= linenum
;
2487 high_block_linenum
= MAX (last_linenum
, high_block_linenum
);
2488 high_function_linenum
= MAX (last_linenum
, high_function_linenum
);
2494 /* For each operand in INSN, simplify (subreg (reg)) so that it refers
2495 directly to the desired hard register. */
2498 cleanup_subreg_operands (rtx insn
)
2501 extract_insn_cached (insn
);
2502 for (i
= 0; i
< recog_data
.n_operands
; i
++)
2504 /* The following test cannot use recog_data.operand when testing
2505 for a SUBREG: the underlying object might have been changed
2506 already if we are inside a match_operator expression that
2507 matches the else clause. Instead we test the underlying
2508 expression directly. */
2509 if (GET_CODE (*recog_data
.operand_loc
[i
]) == SUBREG
)
2510 recog_data
.operand
[i
] = alter_subreg (recog_data
.operand_loc
[i
]);
2511 else if (GET_CODE (recog_data
.operand
[i
]) == PLUS
2512 || GET_CODE (recog_data
.operand
[i
]) == MULT
2513 || GET_CODE (recog_data
.operand
[i
]) == MEM
)
2514 recog_data
.operand
[i
] = walk_alter_subreg (recog_data
.operand_loc
[i
]);
2517 for (i
= 0; i
< recog_data
.n_dups
; i
++)
2519 if (GET_CODE (*recog_data
.dup_loc
[i
]) == SUBREG
)
2520 *recog_data
.dup_loc
[i
] = alter_subreg (recog_data
.dup_loc
[i
]);
2521 else if (GET_CODE (*recog_data
.dup_loc
[i
]) == PLUS
2522 || GET_CODE (*recog_data
.dup_loc
[i
]) == MULT
2523 || GET_CODE (*recog_data
.dup_loc
[i
]) == MEM
)
2524 *recog_data
.dup_loc
[i
] = walk_alter_subreg (recog_data
.dup_loc
[i
]);
2528 /* If X is a SUBREG, replace it with a REG or a MEM,
2529 based on the thing it is a subreg of. */
2532 alter_subreg (rtx
*xp
)
2535 rtx y
= SUBREG_REG (x
);
2537 /* simplify_subreg does not remove subreg from volatile references.
2538 We are required to. */
2539 if (GET_CODE (y
) == MEM
)
2540 *xp
= adjust_address (y
, GET_MODE (x
), SUBREG_BYTE (x
));
2543 rtx
new = simplify_subreg (GET_MODE (x
), y
, GET_MODE (y
),
2548 /* Simplify_subreg can't handle some REG cases, but we have to. */
2549 else if (GET_CODE (y
) == REG
)
2551 unsigned int regno
= subreg_hard_regno (x
, 1);
2552 *xp
= gen_rtx_REG_offset (y
, GET_MODE (x
), regno
, SUBREG_BYTE (x
));
2561 /* Do alter_subreg on all the SUBREGs contained in X. */
2564 walk_alter_subreg (rtx
*xp
)
2567 switch (GET_CODE (x
))
2571 XEXP (x
, 0) = walk_alter_subreg (&XEXP (x
, 0));
2572 XEXP (x
, 1) = walk_alter_subreg (&XEXP (x
, 1));
2576 XEXP (x
, 0) = walk_alter_subreg (&XEXP (x
, 0));
2580 return alter_subreg (xp
);
2591 /* Given BODY, the body of a jump instruction, alter the jump condition
2592 as required by the bits that are set in cc_status.flags.
2593 Not all of the bits there can be handled at this level in all cases.
2595 The value is normally 0.
2596 1 means that the condition has become always true.
2597 -1 means that the condition has become always false.
2598 2 means that COND has been altered. */
2601 alter_cond (rtx cond
)
2605 if (cc_status
.flags
& CC_REVERSED
)
2608 PUT_CODE (cond
, swap_condition (GET_CODE (cond
)));
2611 if (cc_status
.flags
& CC_INVERTED
)
2614 PUT_CODE (cond
, reverse_condition (GET_CODE (cond
)));
2617 if (cc_status
.flags
& CC_NOT_POSITIVE
)
2618 switch (GET_CODE (cond
))
2623 /* Jump becomes unconditional. */
2629 /* Jump becomes no-op. */
2633 PUT_CODE (cond
, EQ
);
2638 PUT_CODE (cond
, NE
);
2646 if (cc_status
.flags
& CC_NOT_NEGATIVE
)
2647 switch (GET_CODE (cond
))
2651 /* Jump becomes unconditional. */
2656 /* Jump becomes no-op. */
2661 PUT_CODE (cond
, EQ
);
2667 PUT_CODE (cond
, NE
);
2675 if (cc_status
.flags
& CC_NO_OVERFLOW
)
2676 switch (GET_CODE (cond
))
2679 /* Jump becomes unconditional. */
2683 PUT_CODE (cond
, EQ
);
2688 PUT_CODE (cond
, NE
);
2693 /* Jump becomes no-op. */
2700 if (cc_status
.flags
& (CC_Z_IN_NOT_N
| CC_Z_IN_N
))
2701 switch (GET_CODE (cond
))
2707 PUT_CODE (cond
, cc_status
.flags
& CC_Z_IN_N
? GE
: LT
);
2712 PUT_CODE (cond
, cc_status
.flags
& CC_Z_IN_N
? LT
: GE
);
2717 if (cc_status
.flags
& CC_NOT_SIGNED
)
2718 /* The flags are valid if signed condition operators are converted
2720 switch (GET_CODE (cond
))
2723 PUT_CODE (cond
, LEU
);
2728 PUT_CODE (cond
, LTU
);
2733 PUT_CODE (cond
, GTU
);
2738 PUT_CODE (cond
, GEU
);
2750 /* Report inconsistency between the assembler template and the operands.
2751 In an `asm', it's the user's fault; otherwise, the compiler's fault. */
2754 output_operand_lossage (const char *msgid
, ...)
2758 const char *pfx_str
;
2761 va_start (ap
, msgid
);
2763 pfx_str
= this_is_asm_operands
? _("invalid `asm': ") : "output_operand: ";
2764 asprintf (&fmt_string
, "%s%s", pfx_str
, _(msgid
));
2765 vasprintf (&new_message
, fmt_string
, ap
);
2767 if (this_is_asm_operands
)
2768 error_for_asm (this_is_asm_operands
, "%s", new_message
);
2770 internal_error ("%s", new_message
);
2777 /* Output of assembler code from a template, and its subroutines. */
2779 /* Annotate the assembly with a comment describing the pattern and
2780 alternative used. */
2783 output_asm_name (void)
2787 int num
= INSN_CODE (debug_insn
);
2788 fprintf (asm_out_file
, "\t%s %d\t%s",
2789 ASM_COMMENT_START
, INSN_UID (debug_insn
),
2790 insn_data
[num
].name
);
2791 if (insn_data
[num
].n_alternatives
> 1)
2792 fprintf (asm_out_file
, "/%d", which_alternative
+ 1);
2793 #ifdef HAVE_ATTR_length
2794 fprintf (asm_out_file
, "\t[length = %d]",
2795 get_attr_length (debug_insn
));
2797 /* Clear this so only the first assembler insn
2798 of any rtl insn will get the special comment for -dp. */
2803 /* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it
2804 or its address, return that expr . Set *PADDRESSP to 1 if the expr
2805 corresponds to the address of the object and 0 if to the object. */
2808 get_mem_expr_from_op (rtx op
, int *paddressp
)
2815 if (GET_CODE (op
) == REG
)
2816 return REG_EXPR (op
);
2817 else if (GET_CODE (op
) != MEM
)
2820 if (MEM_EXPR (op
) != 0)
2821 return MEM_EXPR (op
);
2823 /* Otherwise we have an address, so indicate it and look at the address. */
2827 /* First check if we have a decl for the address, then look at the right side
2828 if it is a PLUS. Otherwise, strip off arithmetic and keep looking.
2829 But don't allow the address to itself be indirect. */
2830 if ((expr
= get_mem_expr_from_op (op
, &inner_addressp
)) && ! inner_addressp
)
2832 else if (GET_CODE (op
) == PLUS
2833 && (expr
= get_mem_expr_from_op (XEXP (op
, 1), &inner_addressp
)))
2836 while (GET_RTX_CLASS (GET_CODE (op
)) == '1'
2837 || GET_RTX_CLASS (GET_CODE (op
)) == '2')
2840 expr
= get_mem_expr_from_op (op
, &inner_addressp
);
2841 return inner_addressp
? 0 : expr
;
2844 /* Output operand names for assembler instructions. OPERANDS is the
2845 operand vector, OPORDER is the order to write the operands, and NOPS
2846 is the number of operands to write. */
2849 output_asm_operand_names (rtx
*operands
, int *oporder
, int nops
)
2854 for (i
= 0; i
< nops
; i
++)
2857 rtx op
= operands
[oporder
[i
]];
2858 tree expr
= get_mem_expr_from_op (op
, &addressp
);
2860 fprintf (asm_out_file
, "%c%s",
2861 wrote
? ',' : '\t', wrote
? "" : ASM_COMMENT_START
);
2865 fprintf (asm_out_file
, "%s",
2866 addressp
? "*" : "");
2867 print_mem_expr (asm_out_file
, expr
);
2870 else if (REG_P (op
) && ORIGINAL_REGNO (op
)
2871 && ORIGINAL_REGNO (op
) != REGNO (op
))
2872 fprintf (asm_out_file
, " tmp%i", ORIGINAL_REGNO (op
));
2876 /* Output text from TEMPLATE to the assembler output file,
2877 obeying %-directions to substitute operands taken from
2878 the vector OPERANDS.
2880 %N (for N a digit) means print operand N in usual manner.
2881 %lN means require operand N to be a CODE_LABEL or LABEL_REF
2882 and print the label name with no punctuation.
2883 %cN means require operand N to be a constant
2884 and print the constant expression with no punctuation.
2885 %aN means expect operand N to be a memory address
2886 (not a memory reference!) and print a reference
2888 %nN means expect operand N to be a constant
2889 and print a constant expression for minus the value
2890 of the operand, with no other punctuation. */
2893 output_asm_insn (const char *template, rtx
*operands
)
2897 #ifdef ASSEMBLER_DIALECT
2900 int oporder
[MAX_RECOG_OPERANDS
];
2901 char opoutput
[MAX_RECOG_OPERANDS
];
2904 /* An insn may return a null string template
2905 in a case where no assembler code is needed. */
2909 memset (opoutput
, 0, sizeof opoutput
);
2911 putc ('\t', asm_out_file
);
2913 #ifdef ASM_OUTPUT_OPCODE
2914 ASM_OUTPUT_OPCODE (asm_out_file
, p
);
2921 if (flag_verbose_asm
)
2922 output_asm_operand_names (operands
, oporder
, ops
);
2923 if (flag_print_asm_name
)
2927 memset (opoutput
, 0, sizeof opoutput
);
2929 putc (c
, asm_out_file
);
2930 #ifdef ASM_OUTPUT_OPCODE
2931 while ((c
= *p
) == '\t')
2933 putc (c
, asm_out_file
);
2936 ASM_OUTPUT_OPCODE (asm_out_file
, p
);
2940 #ifdef ASSEMBLER_DIALECT
2946 output_operand_lossage ("nested assembly dialect alternatives");
2950 /* If we want the first dialect, do nothing. Otherwise, skip
2951 DIALECT_NUMBER of strings ending with '|'. */
2952 for (i
= 0; i
< dialect_number
; i
++)
2954 while (*p
&& *p
!= '}' && *p
++ != '|')
2963 output_operand_lossage ("unterminated assembly dialect alternative");
2970 /* Skip to close brace. */
2975 output_operand_lossage ("unterminated assembly dialect alternative");
2979 while (*p
++ != '}');
2983 putc (c
, asm_out_file
);
2988 putc (c
, asm_out_file
);
2994 /* %% outputs a single %. */
2998 putc (c
, asm_out_file
);
3000 /* %= outputs a number which is unique to each insn in the entire
3001 compilation. This is useful for making local labels that are
3002 referred to more than once in a given insn. */
3006 fprintf (asm_out_file
, "%d", insn_counter
);
3008 /* % followed by a letter and some digits
3009 outputs an operand in a special way depending on the letter.
3010 Letters `acln' are implemented directly.
3011 Other letters are passed to `output_operand' so that
3012 the PRINT_OPERAND macro can define them. */
3013 else if (ISALPHA (*p
))
3019 output_operand_lossage ("operand number missing after %%-letter");
3020 else if (this_is_asm_operands
3021 && (c
< 0 || (unsigned int) c
>= insn_noperands
))
3022 output_operand_lossage ("operand number out of range");
3023 else if (letter
== 'l')
3024 output_asm_label (operands
[c
]);
3025 else if (letter
== 'a')
3026 output_address (operands
[c
]);
3027 else if (letter
== 'c')
3029 if (CONSTANT_ADDRESS_P (operands
[c
]))
3030 output_addr_const (asm_out_file
, operands
[c
]);
3032 output_operand (operands
[c
], 'c');
3034 else if (letter
== 'n')
3036 if (GET_CODE (operands
[c
]) == CONST_INT
)
3037 fprintf (asm_out_file
, HOST_WIDE_INT_PRINT_DEC
,
3038 - INTVAL (operands
[c
]));
3041 putc ('-', asm_out_file
);
3042 output_addr_const (asm_out_file
, operands
[c
]);
3046 output_operand (operands
[c
], letter
);
3052 while (ISDIGIT (c
= *p
))
3055 /* % followed by a digit outputs an operand the default way. */
3056 else if (ISDIGIT (*p
))
3059 if (this_is_asm_operands
3060 && (c
< 0 || (unsigned int) c
>= insn_noperands
))
3061 output_operand_lossage ("operand number out of range");
3063 output_operand (operands
[c
], 0);
3069 while (ISDIGIT (c
= *p
))
3072 /* % followed by punctuation: output something for that
3073 punctuation character alone, with no operand.
3074 The PRINT_OPERAND macro decides what is actually done. */
3075 #ifdef PRINT_OPERAND_PUNCT_VALID_P
3076 else if (PRINT_OPERAND_PUNCT_VALID_P ((unsigned char) *p
))
3077 output_operand (NULL_RTX
, *p
++);
3080 output_operand_lossage ("invalid %%-code");
3084 putc (c
, asm_out_file
);
3087 /* Write out the variable names for operands, if we know them. */
3088 if (flag_verbose_asm
)
3089 output_asm_operand_names (operands
, oporder
, ops
);
3090 if (flag_print_asm_name
)
3093 putc ('\n', asm_out_file
);
3096 /* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */
3099 output_asm_label (rtx x
)
3103 if (GET_CODE (x
) == LABEL_REF
)
3105 if (GET_CODE (x
) == CODE_LABEL
3106 || (GET_CODE (x
) == NOTE
3107 && NOTE_LINE_NUMBER (x
) == NOTE_INSN_DELETED_LABEL
))
3108 ASM_GENERATE_INTERNAL_LABEL (buf
, "L", CODE_LABEL_NUMBER (x
));
3110 output_operand_lossage ("`%%l' operand isn't a label");
3112 assemble_name (asm_out_file
, buf
);
3115 /* Print operand X using machine-dependent assembler syntax.
3116 The macro PRINT_OPERAND is defined just to control this function.
3117 CODE is a non-digit that preceded the operand-number in the % spec,
3118 such as 'z' if the spec was `%z3'. CODE is 0 if there was no char
3119 between the % and the digits.
3120 When CODE is a non-letter, X is 0.
3122 The meanings of the letters are machine-dependent and controlled
3123 by PRINT_OPERAND. */
3126 output_operand (rtx x
, int code ATTRIBUTE_UNUSED
)
3128 if (x
&& GET_CODE (x
) == SUBREG
)
3129 x
= alter_subreg (&x
);
3131 /* If X is a pseudo-register, abort now rather than writing trash to the
3134 if (x
&& GET_CODE (x
) == REG
&& REGNO (x
) >= FIRST_PSEUDO_REGISTER
)
3137 PRINT_OPERAND (asm_out_file
, x
, code
);
3140 /* Print a memory reference operand for address X
3141 using machine-dependent assembler syntax.
3142 The macro PRINT_OPERAND_ADDRESS exists just to control this function. */
3145 output_address (rtx x
)
3147 walk_alter_subreg (&x
);
3148 PRINT_OPERAND_ADDRESS (asm_out_file
, x
);
3151 /* Print an integer constant expression in assembler syntax.
3152 Addition and subtraction are the only arithmetic
3153 that may appear in these expressions. */
3156 output_addr_const (FILE *file
, rtx x
)
3161 switch (GET_CODE (x
))
3168 #ifdef ASM_OUTPUT_SYMBOL_REF
3169 ASM_OUTPUT_SYMBOL_REF (file
, x
);
3171 assemble_name (file
, XSTR (x
, 0));
3179 ASM_GENERATE_INTERNAL_LABEL (buf
, "L", CODE_LABEL_NUMBER (x
));
3180 #ifdef ASM_OUTPUT_LABEL_REF
3181 ASM_OUTPUT_LABEL_REF (file
, buf
);
3183 assemble_name (file
, buf
);
3188 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, INTVAL (x
));
3192 /* This used to output parentheses around the expression,
3193 but that does not work on the 386 (either ATT or BSD assembler). */
3194 output_addr_const (file
, XEXP (x
, 0));
3198 if (GET_MODE (x
) == VOIDmode
)
3200 /* We can use %d if the number is one word and positive. */
3201 if (CONST_DOUBLE_HIGH (x
))
3202 fprintf (file
, HOST_WIDE_INT_PRINT_DOUBLE_HEX
,
3203 CONST_DOUBLE_HIGH (x
), CONST_DOUBLE_LOW (x
));
3204 else if (CONST_DOUBLE_LOW (x
) < 0)
3205 fprintf (file
, HOST_WIDE_INT_PRINT_HEX
, CONST_DOUBLE_LOW (x
));
3207 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, CONST_DOUBLE_LOW (x
));
3210 /* We can't handle floating point constants;
3211 PRINT_OPERAND must handle them. */
3212 output_operand_lossage ("floating constant misused");
3216 /* Some assemblers need integer constants to appear last (eg masm). */
3217 if (GET_CODE (XEXP (x
, 0)) == CONST_INT
)
3219 output_addr_const (file
, XEXP (x
, 1));
3220 if (INTVAL (XEXP (x
, 0)) >= 0)
3221 fprintf (file
, "+");
3222 output_addr_const (file
, XEXP (x
, 0));
3226 output_addr_const (file
, XEXP (x
, 0));
3227 if (GET_CODE (XEXP (x
, 1)) != CONST_INT
3228 || INTVAL (XEXP (x
, 1)) >= 0)
3229 fprintf (file
, "+");
3230 output_addr_const (file
, XEXP (x
, 1));
3235 /* Avoid outputting things like x-x or x+5-x,
3236 since some assemblers can't handle that. */
3237 x
= simplify_subtraction (x
);
3238 if (GET_CODE (x
) != MINUS
)
3241 output_addr_const (file
, XEXP (x
, 0));
3242 fprintf (file
, "-");
3243 if ((GET_CODE (XEXP (x
, 1)) == CONST_INT
&& INTVAL (XEXP (x
, 1)) >= 0)
3244 || GET_CODE (XEXP (x
, 1)) == PC
3245 || GET_CODE (XEXP (x
, 1)) == SYMBOL_REF
)
3246 output_addr_const (file
, XEXP (x
, 1));
3249 fputs (targetm
.asm_out
.open_paren
, file
);
3250 output_addr_const (file
, XEXP (x
, 1));
3251 fputs (targetm
.asm_out
.close_paren
, file
);
3258 output_addr_const (file
, XEXP (x
, 0));
3262 #ifdef OUTPUT_ADDR_CONST_EXTRA
3263 OUTPUT_ADDR_CONST_EXTRA (file
, x
, fail
);
3268 output_operand_lossage ("invalid expression as operand");
3272 /* A poor man's fprintf, with the added features of %I, %R, %L, and %U.
3273 %R prints the value of REGISTER_PREFIX.
3274 %L prints the value of LOCAL_LABEL_PREFIX.
3275 %U prints the value of USER_LABEL_PREFIX.
3276 %I prints the value of IMMEDIATE_PREFIX.
3277 %O runs ASM_OUTPUT_OPCODE to transform what follows in the string.
3278 Also supported are %d, %i, %u, %x, %X, %o, %c, %s and %%.
3280 We handle alternate assembler dialects here, just like output_asm_insn. */
3283 asm_fprintf (FILE *file
, const char *p
, ...)
3289 va_start (argptr
, p
);
3296 #ifdef ASSEMBLER_DIALECT
3301 /* If we want the first dialect, do nothing. Otherwise, skip
3302 DIALECT_NUMBER of strings ending with '|'. */
3303 for (i
= 0; i
< dialect_number
; i
++)
3305 while (*p
&& *p
++ != '|')
3315 /* Skip to close brace. */
3316 while (*p
&& *p
++ != '}')
3327 while (strchr ("-+ #0", c
))
3332 while (ISDIGIT (c
) || c
== '.')
3343 case 'd': case 'i': case 'u':
3344 case 'x': case 'X': case 'o':
3348 fprintf (file
, buf
, va_arg (argptr
, int));
3352 /* This is a prefix to the 'd', 'i', 'u', 'x', 'X', and
3353 'o' cases, but we do not check for those cases. It
3354 means that the value is a HOST_WIDE_INT, which may be
3355 either `long' or `long long'. */
3356 memcpy (q
, HOST_WIDE_INT_PRINT
, strlen (HOST_WIDE_INT_PRINT
));
3357 q
+= strlen (HOST_WIDE_INT_PRINT
);
3360 fprintf (file
, buf
, va_arg (argptr
, HOST_WIDE_INT
));
3365 #ifdef HAVE_LONG_LONG
3371 fprintf (file
, buf
, va_arg (argptr
, long long));
3378 fprintf (file
, buf
, va_arg (argptr
, long));
3386 fprintf (file
, buf
, va_arg (argptr
, char *));
3390 #ifdef ASM_OUTPUT_OPCODE
3391 ASM_OUTPUT_OPCODE (asm_out_file
, p
);
3396 #ifdef REGISTER_PREFIX
3397 fprintf (file
, "%s", REGISTER_PREFIX
);
3402 #ifdef IMMEDIATE_PREFIX
3403 fprintf (file
, "%s", IMMEDIATE_PREFIX
);
3408 #ifdef LOCAL_LABEL_PREFIX
3409 fprintf (file
, "%s", LOCAL_LABEL_PREFIX
);
3414 fputs (user_label_prefix
, file
);
3417 #ifdef ASM_FPRINTF_EXTENSIONS
3418 /* Uppercase letters are reserved for general use by asm_fprintf
3419 and so are not available to target specific code. In order to
3420 prevent the ASM_FPRINTF_EXTENSIONS macro from using them then,
3421 they are defined here. As they get turned into real extensions
3422 to asm_fprintf they should be removed from this list. */
3423 case 'A': case 'B': case 'C': case 'D': case 'E':
3424 case 'F': case 'G': case 'H': case 'J': case 'K':
3425 case 'M': case 'N': case 'P': case 'Q': case 'S':
3426 case 'T': case 'V': case 'W': case 'Y': case 'Z':
3429 ASM_FPRINTF_EXTENSIONS (file
, argptr
, p
)
3442 /* Split up a CONST_DOUBLE or integer constant rtx
3443 into two rtx's for single words,
3444 storing in *FIRST the word that comes first in memory in the target
3445 and in *SECOND the other. */
3448 split_double (rtx value
, rtx
*first
, rtx
*second
)
3450 if (GET_CODE (value
) == CONST_INT
)
3452 if (HOST_BITS_PER_WIDE_INT
>= (2 * BITS_PER_WORD
))
3454 /* In this case the CONST_INT holds both target words.
3455 Extract the bits from it into two word-sized pieces.
3456 Sign extend each half to HOST_WIDE_INT. */
3457 unsigned HOST_WIDE_INT low
, high
;
3458 unsigned HOST_WIDE_INT mask
, sign_bit
, sign_extend
;
3460 /* Set sign_bit to the most significant bit of a word. */
3462 sign_bit
<<= BITS_PER_WORD
- 1;
3464 /* Set mask so that all bits of the word are set. We could
3465 have used 1 << BITS_PER_WORD instead of basing the
3466 calculation on sign_bit. However, on machines where
3467 HOST_BITS_PER_WIDE_INT == BITS_PER_WORD, it could cause a
3468 compiler warning, even though the code would never be
3470 mask
= sign_bit
<< 1;
3473 /* Set sign_extend as any remaining bits. */
3474 sign_extend
= ~mask
;
3476 /* Pick the lower word and sign-extend it. */
3477 low
= INTVAL (value
);
3482 /* Pick the higher word, shifted to the least significant
3483 bits, and sign-extend it. */
3484 high
= INTVAL (value
);
3485 high
>>= BITS_PER_WORD
- 1;
3488 if (high
& sign_bit
)
3489 high
|= sign_extend
;
3491 /* Store the words in the target machine order. */
3492 if (WORDS_BIG_ENDIAN
)
3494 *first
= GEN_INT (high
);
3495 *second
= GEN_INT (low
);
3499 *first
= GEN_INT (low
);
3500 *second
= GEN_INT (high
);
3505 /* The rule for using CONST_INT for a wider mode
3506 is that we regard the value as signed.
3507 So sign-extend it. */
3508 rtx high
= (INTVAL (value
) < 0 ? constm1_rtx
: const0_rtx
);
3509 if (WORDS_BIG_ENDIAN
)
3521 else if (GET_CODE (value
) != CONST_DOUBLE
)
3523 if (WORDS_BIG_ENDIAN
)
3525 *first
= const0_rtx
;
3531 *second
= const0_rtx
;
3534 else if (GET_MODE (value
) == VOIDmode
3535 /* This is the old way we did CONST_DOUBLE integers. */
3536 || GET_MODE_CLASS (GET_MODE (value
)) == MODE_INT
)
3538 /* In an integer, the words are defined as most and least significant.
3539 So order them by the target's convention. */
3540 if (WORDS_BIG_ENDIAN
)
3542 *first
= GEN_INT (CONST_DOUBLE_HIGH (value
));
3543 *second
= GEN_INT (CONST_DOUBLE_LOW (value
));
3547 *first
= GEN_INT (CONST_DOUBLE_LOW (value
));
3548 *second
= GEN_INT (CONST_DOUBLE_HIGH (value
));
3555 REAL_VALUE_FROM_CONST_DOUBLE (r
, value
);
3557 /* Note, this converts the REAL_VALUE_TYPE to the target's
3558 format, splits up the floating point double and outputs
3559 exactly 32 bits of it into each of l[0] and l[1] --
3560 not necessarily BITS_PER_WORD bits. */
3561 REAL_VALUE_TO_TARGET_DOUBLE (r
, l
);
3563 /* If 32 bits is an entire word for the target, but not for the host,
3564 then sign-extend on the host so that the number will look the same
3565 way on the host that it would on the target. See for instance
3566 simplify_unary_operation. The #if is needed to avoid compiler
3569 #if HOST_BITS_PER_LONG > 32
3570 if (BITS_PER_WORD
< HOST_BITS_PER_LONG
&& BITS_PER_WORD
== 32)
3572 if (l
[0] & ((long) 1 << 31))
3573 l
[0] |= ((long) (-1) << 32);
3574 if (l
[1] & ((long) 1 << 31))
3575 l
[1] |= ((long) (-1) << 32);
3579 *first
= GEN_INT ((HOST_WIDE_INT
) l
[0]);
3580 *second
= GEN_INT ((HOST_WIDE_INT
) l
[1]);
3584 /* Return nonzero if this function has no function calls. */
3587 leaf_function_p (void)
3592 if (current_function_profile
|| profile_arc_flag
)
3595 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
3597 if (GET_CODE (insn
) == CALL_INSN
3598 && ! SIBLING_CALL_P (insn
))
3600 if (GET_CODE (insn
) == INSN
3601 && GET_CODE (PATTERN (insn
)) == SEQUENCE
3602 && GET_CODE (XVECEXP (PATTERN (insn
), 0, 0)) == CALL_INSN
3603 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn
), 0, 0)))
3606 for (link
= current_function_epilogue_delay_list
;
3608 link
= XEXP (link
, 1))
3610 insn
= XEXP (link
, 0);
3612 if (GET_CODE (insn
) == CALL_INSN
3613 && ! SIBLING_CALL_P (insn
))
3615 if (GET_CODE (insn
) == INSN
3616 && GET_CODE (PATTERN (insn
)) == SEQUENCE
3617 && GET_CODE (XVECEXP (PATTERN (insn
), 0, 0)) == CALL_INSN
3618 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn
), 0, 0)))
3625 /* Return 1 if branch is a forward branch.
3626 Uses insn_shuid array, so it works only in the final pass. May be used by
3627 output templates to customary add branch prediction hints.
3630 final_forward_branch_p (rtx insn
)
3632 int insn_id
, label_id
;
3635 insn_id
= INSN_SHUID (insn
);
3636 label_id
= INSN_SHUID (JUMP_LABEL (insn
));
3637 /* We've hit some insns that does not have id information available. */
3638 if (!insn_id
|| !label_id
)
3640 return insn_id
< label_id
;
3643 /* On some machines, a function with no call insns
3644 can run faster if it doesn't create its own register window.
3645 When output, the leaf function should use only the "output"
3646 registers. Ordinarily, the function would be compiled to use
3647 the "input" registers to find its arguments; it is a candidate
3648 for leaf treatment if it uses only the "input" registers.
3649 Leaf function treatment means renumbering so the function
3650 uses the "output" registers instead. */
3652 #ifdef LEAF_REGISTERS
3654 /* Return 1 if this function uses only the registers that can be
3655 safely renumbered. */
3658 only_leaf_regs_used (void)
3661 const char *const permitted_reg_in_leaf_functions
= LEAF_REGISTERS
;
3663 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
3664 if ((regs_ever_live
[i
] || global_regs
[i
])
3665 && ! permitted_reg_in_leaf_functions
[i
])
3668 if (current_function_uses_pic_offset_table
3669 && pic_offset_table_rtx
!= 0
3670 && GET_CODE (pic_offset_table_rtx
) == REG
3671 && ! permitted_reg_in_leaf_functions
[REGNO (pic_offset_table_rtx
)])
3677 /* Scan all instructions and renumber all registers into those
3678 available in leaf functions. */
3681 leaf_renumber_regs (rtx first
)
3685 /* Renumber only the actual patterns.
3686 The reg-notes can contain frame pointer refs,
3687 and renumbering them could crash, and should not be needed. */
3688 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
3690 leaf_renumber_regs_insn (PATTERN (insn
));
3691 for (insn
= current_function_epilogue_delay_list
;
3693 insn
= XEXP (insn
, 1))
3694 if (INSN_P (XEXP (insn
, 0)))
3695 leaf_renumber_regs_insn (PATTERN (XEXP (insn
, 0)));
3698 /* Scan IN_RTX and its subexpressions, and renumber all regs into those
3699 available in leaf functions. */
3702 leaf_renumber_regs_insn (rtx in_rtx
)
3705 const char *format_ptr
;
3710 /* Renumber all input-registers into output-registers.
3711 renumbered_regs would be 1 for an output-register;
3714 if (GET_CODE (in_rtx
) == REG
)
3718 /* Don't renumber the same reg twice. */
3722 newreg
= REGNO (in_rtx
);
3723 /* Don't try to renumber pseudo regs. It is possible for a pseudo reg
3724 to reach here as part of a REG_NOTE. */
3725 if (newreg
>= FIRST_PSEUDO_REGISTER
)
3730 newreg
= LEAF_REG_REMAP (newreg
);
3733 regs_ever_live
[REGNO (in_rtx
)] = 0;
3734 regs_ever_live
[newreg
] = 1;
3735 REGNO (in_rtx
) = newreg
;
3739 if (INSN_P (in_rtx
))
3741 /* Inside a SEQUENCE, we find insns.
3742 Renumber just the patterns of these insns,
3743 just as we do for the top-level insns. */
3744 leaf_renumber_regs_insn (PATTERN (in_rtx
));
3748 format_ptr
= GET_RTX_FORMAT (GET_CODE (in_rtx
));
3750 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (in_rtx
)); i
++)
3751 switch (*format_ptr
++)
3754 leaf_renumber_regs_insn (XEXP (in_rtx
, i
));
3758 if (NULL
!= XVEC (in_rtx
, i
))
3760 for (j
= 0; j
< XVECLEN (in_rtx
, i
); j
++)
3761 leaf_renumber_regs_insn (XVECEXP (in_rtx
, i
, j
));
3781 /* When -gused is used, emit debug info for only used symbols. But in
3782 addition to the standard intercepted debug_hooks there are some direct
3783 calls into this file, i.e., dbxout_symbol, dbxout_parms, and dbxout_reg_params.
3784 Those routines may also be called from a higher level intercepted routine. So
3785 to prevent recording data for an inner call to one of these for an intercept,
3786 we maintain a intercept nesting counter (debug_nesting). We only save the
3787 intercepted arguments if the nesting is 1. */
3788 int debug_nesting
= 0;
3790 static tree
*symbol_queue
;
3791 int symbol_queue_index
= 0;
3792 static int symbol_queue_size
= 0;
3794 /* Generate the symbols for any queued up type symbols we encountered
3795 while generating the type info for some originally used symbol.
3796 This might generate additional entries in the queue. Only when
3797 the nesting depth goes to 0 is this routine called. */
3800 debug_flush_symbol_queue (void)
3804 /* Make sure that additionally queued items are not flushed
3809 for (i
= 0; i
< symbol_queue_index
; ++i
)
3811 /* If we pushed queued symbols then such symbols are must be
3812 output no matter what anyone else says. Specifically,
3813 we need to make sure dbxout_symbol() thinks the symbol was
3814 used and also we need to override TYPE_DECL_SUPPRESS_DEBUG
3815 which may be set for outside reasons. */
3816 int saved_tree_used
= TREE_USED (symbol_queue
[i
]);
3817 int saved_suppress_debug
= TYPE_DECL_SUPPRESS_DEBUG (symbol_queue
[i
]);
3818 TREE_USED (symbol_queue
[i
]) = 1;
3819 TYPE_DECL_SUPPRESS_DEBUG (symbol_queue
[i
]) = 0;
3821 #ifdef DBX_DEBUGGING_INFO
3822 dbxout_symbol (symbol_queue
[i
], 0);
3825 TREE_USED (symbol_queue
[i
]) = saved_tree_used
;
3826 TYPE_DECL_SUPPRESS_DEBUG (symbol_queue
[i
]) = saved_suppress_debug
;
3829 symbol_queue_index
= 0;
3833 /* Queue a type symbol needed as part of the definition of a decl
3834 symbol. These symbols are generated when debug_flush_symbol_queue()
3838 debug_queue_symbol (tree decl
)
3840 if (symbol_queue_index
>= symbol_queue_size
)
3842 symbol_queue_size
+= 10;
3843 symbol_queue
= xrealloc (symbol_queue
,
3844 symbol_queue_size
* sizeof (tree
));
3847 symbol_queue
[symbol_queue_index
++] = decl
;
3850 /* Free symbol queue. */
3852 debug_free_queue (void)
3856 free (symbol_queue
);
3857 symbol_queue
= NULL
;
3858 symbol_queue_size
= 0;