1 /* Convert RTL to assembler code and output it, for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
22 /* This is the final pass of the compiler.
23 It looks at the rtl code for a function and outputs assembler code.
25 Call `final_start_function' to output the assembler code for function entry,
26 `final' to output assembler code for some RTL code,
27 `final_end_function' to output assembler code for function exit.
28 If a function is compiled in several pieces, each piece is
29 output separately with `final'.
31 Some optimizations are also done at this level.
32 Move instructions that were made unnecessary by good register allocation
33 are detected and omitted from the output. (Though most of these
34 are removed by the last jump pass.)
36 Instructions to set the condition codes are omitted when it can be
37 seen that the condition codes already had the desired values.
39 In some cases it is sufficient if the inherited condition codes
40 have related values, but this may require the following insn
41 (the one that tests the condition codes) to be modified.
43 The code for the function prologue and epilogue are generated
44 directly in assembler by the target functions function_prologue and
45 function_epilogue. Those instructions never exist as rtl. */
54 #include "insn-config.h"
55 #include "insn-attr.h"
57 #include "conditions.h"
60 #include "hard-reg-set.h"
67 #include "basic-block.h"
73 #ifdef XCOFF_DEBUGGING_INFO
74 #include "xcoffout.h" /* Needed for external data
75 declarations for e.g. AIX 4.x. */
78 #if defined (DWARF2_UNWIND_INFO) || defined (DWARF2_DEBUGGING_INFO)
79 #include "dwarf2out.h"
82 /* If we aren't using cc0, CC_STATUS_INIT shouldn't exist. So define a
83 null default for it to save conditionalization later. */
84 #ifndef CC_STATUS_INIT
85 #define CC_STATUS_INIT
88 /* How to start an assembler comment. */
89 #ifndef ASM_COMMENT_START
90 #define ASM_COMMENT_START ";#"
93 /* Is the given character a logical line separator for the assembler? */
94 #ifndef IS_ASM_LOGICAL_LINE_SEPARATOR
95 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C) ((C) == ';')
98 #ifndef JUMP_TABLES_IN_TEXT_SECTION
99 #define JUMP_TABLES_IN_TEXT_SECTION 0
102 #if defined(READONLY_DATA_SECTION) || defined(READONLY_DATA_SECTION_ASM_OP)
103 #define HAVE_READONLY_DATA_SECTION 1
105 #define HAVE_READONLY_DATA_SECTION 0
108 /* Last insn processed by final_scan_insn. */
109 static rtx debug_insn
;
110 rtx current_output_insn
;
112 /* Line number of last NOTE. */
113 static int last_linenum
;
115 /* Highest line number in current block. */
116 static int high_block_linenum
;
118 /* Likewise for function. */
119 static int high_function_linenum
;
121 /* Filename of last NOTE. */
122 static const char *last_filename
;
124 extern int length_unit_log
; /* This is defined in insn-attrtab.c. */
126 /* Nonzero while outputting an `asm' with operands.
127 This means that inconsistencies are the user's fault, so don't abort.
128 The precise value is the insn being output, to pass to error_for_asm. */
129 rtx this_is_asm_operands
;
131 /* Number of operands of this insn, for an `asm' with operands. */
132 static unsigned int insn_noperands
;
134 /* Compare optimization flag. */
136 static rtx last_ignored_compare
= 0;
138 /* Flag indicating this insn is the start of a new basic block. */
140 static int new_block
= 1;
142 /* Assign a unique number to each insn that is output.
143 This can be used to generate unique local labels. */
145 static int insn_counter
= 0;
148 /* This variable contains machine-dependent flags (defined in tm.h)
149 set and examined by output routines
150 that describe how to interpret the condition codes properly. */
154 /* During output of an insn, this contains a copy of cc_status
155 from before the insn. */
157 CC_STATUS cc_prev_status
;
160 /* Indexed by hardware reg number, is 1 if that register is ever
161 used in the current function.
163 In life_analysis, or in stupid_life_analysis, this is set
164 up to record the hard regs used explicitly. Reload adds
165 in the hard regs used for holding pseudo regs. Final uses
166 it to generate the code in the function prologue and epilogue
167 to save and restore registers as needed. */
169 char regs_ever_live
[FIRST_PSEUDO_REGISTER
];
171 /* Nonzero means current function must be given a frame pointer.
172 Set in stmt.c if anything is allocated on the stack there.
173 Set in reload1.c if anything is allocated on the stack there. */
175 int frame_pointer_needed
;
177 /* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */
179 static int block_depth
;
181 /* Nonzero if have enabled APP processing of our assembler output. */
185 /* If we are outputting an insn sequence, this contains the sequence rtx.
190 #ifdef ASSEMBLER_DIALECT
192 /* Number of the assembler dialect to use, starting at 0. */
193 static int dialect_number
;
196 /* Indexed by line number, nonzero if there is a note for that line. */
198 static char *line_note_exists
;
200 #ifdef HAVE_conditional_execution
201 /* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */
202 rtx current_insn_predicate
;
207 struct function_list
*next
; /* next function */
208 const char *name
; /* function name */
209 long cfg_checksum
; /* function checksum */
210 long count_edges
; /* number of intrumented edges in this function */
213 static struct function_list
*functions_head
= 0;
214 static struct function_list
**functions_tail
= &functions_head
;
216 #ifdef HAVE_ATTR_length
217 static int asm_insn_count
PARAMS ((rtx
));
219 static void profile_function
PARAMS ((FILE *));
220 static void profile_after_prologue
PARAMS ((FILE *));
221 static void notice_source_line
PARAMS ((rtx
));
222 static rtx walk_alter_subreg
PARAMS ((rtx
*));
223 static void output_asm_name
PARAMS ((void));
224 static tree get_mem_expr_from_op
PARAMS ((rtx
, int *));
225 static void output_asm_operand_names
PARAMS ((rtx
*, int *, int));
226 static void output_operand
PARAMS ((rtx
, int));
227 #ifdef LEAF_REGISTERS
228 static void leaf_renumber_regs
PARAMS ((rtx
));
231 static int alter_cond
PARAMS ((rtx
));
233 #ifndef ADDR_VEC_ALIGN
234 static int final_addr_vec_align
PARAMS ((rtx
));
236 #ifdef HAVE_ATTR_length
237 static int align_fuzz
PARAMS ((rtx
, rtx
, int, unsigned));
240 /* Initialize data in final at the beginning of a compilation. */
243 init_final (filename
)
244 const char *filename ATTRIBUTE_UNUSED
;
249 #ifdef ASSEMBLER_DIALECT
250 dialect_number
= ASSEMBLER_DIALECT
;
254 /* Called at end of source file,
255 to output the arc-profiling table for this entire compilation. */
259 const char *filename
;
261 if (profile_arc_flag
&& profile_info
.count_instrumented_edges
)
264 tree string_type
, string_cst
;
265 tree structure_decl
, structure_value
, structure_pointer_type
;
266 tree field_decl
, decl_chain
, value_chain
;
267 tree sizeof_field_value
, domain_type
;
270 string_type
= build_pointer_type (char_type_node
);
272 /* Libgcc2 bb structure. */
273 structure_decl
= make_node (RECORD_TYPE
);
274 structure_pointer_type
= build_pointer_type (structure_decl
);
276 /* Output the main header, of 7 words:
277 0: 1 if this file is initialized, else 0.
278 1: address of file name (LPBX1).
279 2: address of table of counts (LPBX2).
280 3: number of counts in the table.
281 4: always 0, libgcc2 uses this as a pointer to next ``struct bb''
283 The following are GNU extensions:
285 5: Number of bytes in this header.
286 6: address of table of function checksums (LPBX7). */
290 build_decl (FIELD_DECL
, get_identifier ("zero_word"),
291 long_integer_type_node
);
292 value_chain
= build_tree_list (decl_chain
,
293 convert (long_integer_type_node
,
296 /* Address of filename. */
298 char *cwd
, *da_filename
;
302 build_decl (FIELD_DECL
, get_identifier ("filename"), string_type
);
303 TREE_CHAIN (field_decl
) = decl_chain
;
304 decl_chain
= field_decl
;
307 da_filename_len
= strlen (filename
) + strlen (cwd
) + 4 + 1;
308 da_filename
= (char *) alloca (da_filename_len
);
309 strcpy (da_filename
, cwd
);
310 strcat (da_filename
, "/");
311 strcat (da_filename
, filename
);
312 strip_off_ending (da_filename
, da_filename_len
- 3);
313 strcat (da_filename
, ".da");
314 da_filename_len
= strlen (da_filename
);
315 string_cst
= build_string (da_filename_len
+ 1, da_filename
);
316 domain_type
= build_index_type (build_int_2 (da_filename_len
, 0));
317 TREE_TYPE (string_cst
)
318 = build_array_type (char_type_node
, domain_type
);
319 value_chain
= tree_cons (field_decl
,
320 build1 (ADDR_EXPR
, string_type
, string_cst
),
324 /* Table of counts. */
326 tree gcov_type_type
= make_unsigned_type (GCOV_TYPE_SIZE
);
327 tree gcov_type_pointer_type
= build_pointer_type (gcov_type_type
);
329 = build_index_type (build_int_2 (profile_info
.
330 count_instrumented_edges
- 1, 0));
331 tree gcov_type_array_type
332 = build_array_type (gcov_type_type
, domain_tree
);
333 tree gcov_type_array_pointer_type
334 = build_pointer_type (gcov_type_array_type
);
338 build_decl (FIELD_DECL
, get_identifier ("counts"),
339 gcov_type_pointer_type
);
340 TREE_CHAIN (field_decl
) = decl_chain
;
341 decl_chain
= field_decl
;
345 = build (VAR_DECL
, gcov_type_array_type
, NULL_TREE
, NULL_TREE
);
346 TREE_STATIC (counts_table
) = 1;
347 ASM_GENERATE_INTERNAL_LABEL (name
, "LPBX", 2);
348 DECL_NAME (counts_table
) = get_identifier (name
);
349 assemble_variable (counts_table
, 0, 0, 0);
351 value_chain
= tree_cons (field_decl
,
353 gcov_type_array_pointer_type
,
354 counts_table
), value_chain
);
357 /* Count of the # of instrumented arcs. */
359 = build_decl (FIELD_DECL
, get_identifier ("ncounts"),
360 long_integer_type_node
);
361 TREE_CHAIN (field_decl
) = decl_chain
;
362 decl_chain
= field_decl
;
364 value_chain
= tree_cons (field_decl
,
365 convert (long_integer_type_node
,
366 build_int_2 (profile_info
.
367 count_instrumented_edges
,
369 /* Pointer to the next bb. */
371 = build_decl (FIELD_DECL
, get_identifier ("next"),
372 structure_pointer_type
);
373 TREE_CHAIN (field_decl
) = decl_chain
;
374 decl_chain
= field_decl
;
376 value_chain
= tree_cons (field_decl
, null_pointer_node
, value_chain
);
378 /* sizeof(struct bb). We'll set this after entire structure
381 = build_decl (FIELD_DECL
, get_identifier ("sizeof_bb"),
382 long_integer_type_node
);
383 TREE_CHAIN (field_decl
) = decl_chain
;
384 decl_chain
= field_decl
;
386 sizeof_field_value
= tree_cons (field_decl
, NULL
, value_chain
);
387 value_chain
= sizeof_field_value
;
389 /* struct bb_function []. */
391 struct function_list
*item
;
393 tree checksum_field
, arc_count_field
, name_field
;
395 tree array_value_chain
= NULL_TREE
;
396 tree bb_fn_struct_type
;
397 tree bb_fn_struct_array_type
;
398 tree bb_fn_struct_array_pointer_type
;
399 tree bb_fn_struct_pointer_type
;
400 tree field_value
, field_value_chain
;
402 bb_fn_struct_type
= make_node (RECORD_TYPE
);
404 checksum_field
= build_decl (FIELD_DECL
, get_identifier ("checksum"),
405 long_integer_type_node
);
408 = build_decl (FIELD_DECL
, get_identifier ("arc_count"),
410 TREE_CHAIN (checksum_field
) = arc_count_field
;
413 = build_decl (FIELD_DECL
, get_identifier ("name"), string_type
);
414 TREE_CHAIN (arc_count_field
) = name_field
;
416 TYPE_FIELDS (bb_fn_struct_type
) = checksum_field
;
420 for (item
= functions_head
; item
!= 0; item
= item
->next
)
423 /* Note that the array contains a terminator, hence no - 1. */
424 domain
= build_index_type (build_int_2 (num_nodes
, 0));
426 bb_fn_struct_pointer_type
= build_pointer_type (bb_fn_struct_type
);
427 bb_fn_struct_array_type
428 = build_array_type (bb_fn_struct_type
, domain
);
429 bb_fn_struct_array_pointer_type
430 = build_pointer_type (bb_fn_struct_array_type
);
432 layout_type (bb_fn_struct_type
);
433 layout_type (bb_fn_struct_pointer_type
);
434 layout_type (bb_fn_struct_array_type
);
435 layout_type (bb_fn_struct_array_pointer_type
);
437 for (item
= functions_head
; item
!= 0; item
= item
->next
)
441 /* create constructor for structure. */
443 = build_tree_list (checksum_field
,
444 convert (long_integer_type_node
,
445 build_int_2 (item
->cfg_checksum
, 0)));
447 = tree_cons (arc_count_field
,
448 convert (integer_type_node
,
449 build_int_2 (item
->count_edges
, 0)),
452 name_len
= strlen (item
->name
);
453 string_cst
= build_string (name_len
+ 1, item
->name
);
454 domain_type
= build_index_type (build_int_2 (name_len
, 0));
455 TREE_TYPE (string_cst
)
456 = build_array_type (char_type_node
, domain_type
);
457 field_value_chain
= tree_cons (name_field
,
458 build1 (ADDR_EXPR
, string_type
,
464 = tree_cons (NULL_TREE
, build (CONSTRUCTOR
,
465 bb_fn_struct_type
, NULL_TREE
,
466 nreverse (field_value_chain
)),
470 /* Add terminator. */
471 field_value
= build_tree_list (arc_count_field
,
472 convert (integer_type_node
,
473 build_int_2 (-1, 0)));
475 array_value_chain
= tree_cons (NULL_TREE
,
476 build (CONSTRUCTOR
, bb_fn_struct_type
,
477 NULL_TREE
, field_value
),
481 /* Create constructor for array. */
483 = build_decl (FIELD_DECL
, get_identifier ("function_infos"),
484 bb_fn_struct_pointer_type
);
485 value_chain
= tree_cons (field_decl
,
487 bb_fn_struct_array_pointer_type
,
489 bb_fn_struct_array_type
,
492 (array_value_chain
))),
494 TREE_CHAIN (field_decl
) = decl_chain
;
495 decl_chain
= field_decl
;
498 /* Finish structure. */
499 TYPE_FIELDS (structure_decl
) = nreverse (decl_chain
);
500 layout_type (structure_decl
);
503 = build (VAR_DECL
, structure_decl
, NULL_TREE
, NULL_TREE
);
504 DECL_INITIAL (structure_value
)
505 = build (CONSTRUCTOR
, structure_decl
, NULL_TREE
,
506 nreverse (value_chain
));
507 TREE_STATIC (structure_value
) = 1;
508 ASM_GENERATE_INTERNAL_LABEL (name
, "LPBX", 0);
509 DECL_NAME (structure_value
) = get_identifier (name
);
511 /* Size of this structure. */
512 TREE_VALUE (sizeof_field_value
)
513 = convert (long_integer_type_node
,
514 build_int_2 (int_size_in_bytes (structure_decl
), 0));
516 /* Build structure. */
517 assemble_variable (structure_value
, 0, 0, 0);
521 /* Default target function prologue and epilogue assembler output.
523 If not overridden for epilogue code, then the function body itself
524 contains return instructions wherever needed. */
526 default_function_pro_epilogue (file
, size
)
527 FILE *file ATTRIBUTE_UNUSED
;
528 HOST_WIDE_INT size ATTRIBUTE_UNUSED
;
532 /* Default target hook that outputs nothing to a stream. */
534 no_asm_to_stream (file
)
535 FILE *file ATTRIBUTE_UNUSED
;
539 /* Enable APP processing of subsequent output.
540 Used before the output from an `asm' statement. */
547 fputs (ASM_APP_ON
, asm_out_file
);
552 /* Disable APP processing of subsequent output.
553 Called from varasm.c before most kinds of output. */
560 fputs (ASM_APP_OFF
, asm_out_file
);
565 /* Return the number of slots filled in the current
566 delayed branch sequence (we don't count the insn needing the
567 delay slot). Zero if not in a delayed branch sequence. */
571 dbr_sequence_length ()
573 if (final_sequence
!= 0)
574 return XVECLEN (final_sequence
, 0) - 1;
580 /* The next two pages contain routines used to compute the length of an insn
581 and to shorten branches. */
583 /* Arrays for insn lengths, and addresses. The latter is referenced by
584 `insn_current_length'. */
586 static int *insn_lengths
;
588 #ifdef HAVE_ATTR_length
589 varray_type insn_addresses_
;
592 /* Max uid for which the above arrays are valid. */
593 static int insn_lengths_max_uid
;
595 /* Address of insn being processed. Used by `insn_current_length'. */
596 int insn_current_address
;
598 /* Address of insn being processed in previous iteration. */
599 int insn_last_address
;
601 /* known invariant alignment of insn being processed. */
602 int insn_current_align
;
604 /* After shorten_branches, for any insn, uid_align[INSN_UID (insn)]
605 gives the next following alignment insn that increases the known
606 alignment, or NULL_RTX if there is no such insn.
607 For any alignment obtained this way, we can again index uid_align with
608 its uid to obtain the next following align that in turn increases the
609 alignment, till we reach NULL_RTX; the sequence obtained this way
610 for each insn we'll call the alignment chain of this insn in the following
613 struct label_alignment
619 static rtx
*uid_align
;
620 static int *uid_shuid
;
621 static struct label_alignment
*label_align
;
623 /* Indicate that branch shortening hasn't yet been done. */
637 insn_lengths_max_uid
= 0;
639 #ifdef HAVE_ATTR_length
640 INSN_ADDRESSES_FREE ();
649 /* Obtain the current length of an insn. If branch shortening has been done,
650 get its actual length. Otherwise, get its maximum length. */
653 get_attr_length (insn
)
654 rtx insn ATTRIBUTE_UNUSED
;
656 #ifdef HAVE_ATTR_length
661 if (insn_lengths_max_uid
> INSN_UID (insn
))
662 return insn_lengths
[INSN_UID (insn
)];
664 switch (GET_CODE (insn
))
672 length
= insn_default_length (insn
);
676 body
= PATTERN (insn
);
677 if (GET_CODE (body
) == ADDR_VEC
|| GET_CODE (body
) == ADDR_DIFF_VEC
)
679 /* Alignment is machine-dependent and should be handled by
683 length
= insn_default_length (insn
);
687 body
= PATTERN (insn
);
688 if (GET_CODE (body
) == USE
|| GET_CODE (body
) == CLOBBER
)
691 else if (GET_CODE (body
) == ASM_INPUT
|| asm_noperands (body
) >= 0)
692 length
= asm_insn_count (body
) * insn_default_length (insn
);
693 else if (GET_CODE (body
) == SEQUENCE
)
694 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
695 length
+= get_attr_length (XVECEXP (body
, 0, i
));
697 length
= insn_default_length (insn
);
704 #ifdef ADJUST_INSN_LENGTH
705 ADJUST_INSN_LENGTH (insn
, length
);
708 #else /* not HAVE_ATTR_length */
710 #endif /* not HAVE_ATTR_length */
713 /* Code to handle alignment inside shorten_branches. */
715 /* Here is an explanation how the algorithm in align_fuzz can give
718 Call a sequence of instructions beginning with alignment point X
719 and continuing until the next alignment point `block X'. When `X'
720 is used in an expression, it means the alignment value of the
723 Call the distance between the start of the first insn of block X, and
724 the end of the last insn of block X `IX', for the `inner size of X'.
725 This is clearly the sum of the instruction lengths.
727 Likewise with the next alignment-delimited block following X, which we
730 Call the distance between the start of the first insn of block X, and
731 the start of the first insn of block Y `OX', for the `outer size of X'.
733 The estimated padding is then OX - IX.
735 OX can be safely estimated as
740 OX = round_up(IX, X) + Y - X
742 Clearly est(IX) >= real(IX), because that only depends on the
743 instruction lengths, and those being overestimated is a given.
745 Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so
746 we needn't worry about that when thinking about OX.
748 When X >= Y, the alignment provided by Y adds no uncertainty factor
749 for branch ranges starting before X, so we can just round what we have.
750 But when X < Y, we don't know anything about the, so to speak,
751 `middle bits', so we have to assume the worst when aligning up from an
752 address mod X to one mod Y, which is Y - X. */
755 #define LABEL_ALIGN(LABEL) align_labels_log
758 #ifndef LABEL_ALIGN_MAX_SKIP
759 #define LABEL_ALIGN_MAX_SKIP align_labels_max_skip
763 #define LOOP_ALIGN(LABEL) align_loops_log
766 #ifndef LOOP_ALIGN_MAX_SKIP
767 #define LOOP_ALIGN_MAX_SKIP align_loops_max_skip
770 #ifndef LABEL_ALIGN_AFTER_BARRIER
771 #define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0
774 #ifndef LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP
775 #define LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP 0
779 #define JUMP_ALIGN(LABEL) align_jumps_log
782 #ifndef JUMP_ALIGN_MAX_SKIP
783 #define JUMP_ALIGN_MAX_SKIP align_jumps_max_skip
786 #ifndef ADDR_VEC_ALIGN
788 final_addr_vec_align (addr_vec
)
791 int align
= GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec
)));
793 if (align
> BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
)
794 align
= BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
;
795 return exact_log2 (align
);
799 #define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC)
802 #ifndef INSN_LENGTH_ALIGNMENT
803 #define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log
806 #define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)])
808 static int min_labelno
, max_labelno
;
810 #define LABEL_TO_ALIGNMENT(LABEL) \
811 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment)
813 #define LABEL_TO_MAX_SKIP(LABEL) \
814 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip)
816 /* For the benefit of port specific code do this also as a function. */
819 label_to_alignment (label
)
822 return LABEL_TO_ALIGNMENT (label
);
825 #ifdef HAVE_ATTR_length
826 /* The differences in addresses
827 between a branch and its target might grow or shrink depending on
828 the alignment the start insn of the range (the branch for a forward
829 branch or the label for a backward branch) starts out on; if these
830 differences are used naively, they can even oscillate infinitely.
831 We therefore want to compute a 'worst case' address difference that
832 is independent of the alignment the start insn of the range end
833 up on, and that is at least as large as the actual difference.
834 The function align_fuzz calculates the amount we have to add to the
835 naively computed difference, by traversing the part of the alignment
836 chain of the start insn of the range that is in front of the end insn
837 of the range, and considering for each alignment the maximum amount
838 that it might contribute to a size increase.
840 For casesi tables, we also want to know worst case minimum amounts of
841 address difference, in case a machine description wants to introduce
842 some common offset that is added to all offsets in a table.
843 For this purpose, align_fuzz with a growth argument of 0 computes the
844 appropriate adjustment. */
846 /* Compute the maximum delta by which the difference of the addresses of
847 START and END might grow / shrink due to a different address for start
848 which changes the size of alignment insns between START and END.
849 KNOWN_ALIGN_LOG is the alignment known for START.
850 GROWTH should be ~0 if the objective is to compute potential code size
851 increase, and 0 if the objective is to compute potential shrink.
852 The return value is undefined for any other value of GROWTH. */
855 align_fuzz (start
, end
, known_align_log
, growth
)
860 int uid
= INSN_UID (start
);
862 int known_align
= 1 << known_align_log
;
863 int end_shuid
= INSN_SHUID (end
);
866 for (align_label
= uid_align
[uid
]; align_label
; align_label
= uid_align
[uid
])
868 int align_addr
, new_align
;
870 uid
= INSN_UID (align_label
);
871 align_addr
= INSN_ADDRESSES (uid
) - insn_lengths
[uid
];
872 if (uid_shuid
[uid
] > end_shuid
)
874 known_align_log
= LABEL_TO_ALIGNMENT (align_label
);
875 new_align
= 1 << known_align_log
;
876 if (new_align
< known_align
)
878 fuzz
+= (-align_addr
^ growth
) & (new_align
- known_align
);
879 known_align
= new_align
;
884 /* Compute a worst-case reference address of a branch so that it
885 can be safely used in the presence of aligned labels. Since the
886 size of the branch itself is unknown, the size of the branch is
887 not included in the range. I.e. for a forward branch, the reference
888 address is the end address of the branch as known from the previous
889 branch shortening pass, minus a value to account for possible size
890 increase due to alignment. For a backward branch, it is the start
891 address of the branch as known from the current pass, plus a value
892 to account for possible size increase due to alignment.
893 NB.: Therefore, the maximum offset allowed for backward branches needs
894 to exclude the branch size. */
897 insn_current_reference_address (branch
)
903 if (! INSN_ADDRESSES_SET_P ())
906 seq
= NEXT_INSN (PREV_INSN (branch
));
907 seq_uid
= INSN_UID (seq
);
908 if (GET_CODE (branch
) != JUMP_INSN
)
909 /* This can happen for example on the PA; the objective is to know the
910 offset to address something in front of the start of the function.
911 Thus, we can treat it like a backward branch.
912 We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than
913 any alignment we'd encounter, so we skip the call to align_fuzz. */
914 return insn_current_address
;
915 dest
= JUMP_LABEL (branch
);
917 /* BRANCH has no proper alignment chain set, so use SEQ.
918 BRANCH also has no INSN_SHUID. */
919 if (INSN_SHUID (seq
) < INSN_SHUID (dest
))
921 /* Forward branch. */
922 return (insn_last_address
+ insn_lengths
[seq_uid
]
923 - align_fuzz (seq
, dest
, length_unit_log
, ~0));
927 /* Backward branch. */
928 return (insn_current_address
929 + align_fuzz (dest
, seq
, length_unit_log
, ~0));
932 #endif /* HAVE_ATTR_length */
935 compute_alignments ()
937 int log
, max_skip
, max_log
;
946 max_labelno
= max_label_num ();
947 min_labelno
= get_first_label_num ();
948 label_align
= (struct label_alignment
*)
949 xcalloc (max_labelno
- min_labelno
+ 1, sizeof (struct label_alignment
));
951 /* If not optimizing or optimizing for size, don't assign any alignments. */
952 if (! optimize
|| optimize_size
)
957 rtx label
= bb
->head
;
958 int fallthru_frequency
= 0, branch_frequency
= 0, has_fallthru
= 0;
961 if (GET_CODE (label
) != CODE_LABEL
)
963 max_log
= LABEL_ALIGN (label
);
964 max_skip
= LABEL_ALIGN_MAX_SKIP
;
966 for (e
= bb
->pred
; e
; e
= e
->pred_next
)
968 if (e
->flags
& EDGE_FALLTHRU
)
969 has_fallthru
= 1, fallthru_frequency
+= EDGE_FREQUENCY (e
);
971 branch_frequency
+= EDGE_FREQUENCY (e
);
974 /* There are two purposes to align block with no fallthru incoming edge:
975 1) to avoid fetch stalls when branch destination is near cache boundary
976 2) to improve cache efficiency in case the previous block is not executed
977 (so it does not need to be in the cache).
979 We to catch first case, we align frequently executed blocks.
980 To catch the second, we align blocks that are executed more frequently
981 than the predecessor and the predecessor is likely to not be executed
982 when function is called. */
985 && (branch_frequency
> BB_FREQ_MAX
/ 10
986 || (bb
->frequency
> bb
->prev_bb
->frequency
* 10
987 && (bb
->prev_bb
->frequency
988 <= ENTRY_BLOCK_PTR
->frequency
/ 2))))
990 log
= JUMP_ALIGN (label
);
994 max_skip
= JUMP_ALIGN_MAX_SKIP
;
997 /* In case block is frequent and reached mostly by non-fallthru edge,
998 align it. It is most likely an first block of loop. */
1000 && branch_frequency
+ fallthru_frequency
> BB_FREQ_MAX
/ 10
1001 && branch_frequency
> fallthru_frequency
* 5)
1003 log
= LOOP_ALIGN (label
);
1007 max_skip
= LOOP_ALIGN_MAX_SKIP
;
1010 LABEL_TO_ALIGNMENT (label
) = max_log
;
1011 LABEL_TO_MAX_SKIP (label
) = max_skip
;
1015 /* Make a pass over all insns and compute their actual lengths by shortening
1016 any branches of variable length if possible. */
1018 /* Give a default value for the lowest address in a function. */
1020 #ifndef FIRST_INSN_ADDRESS
1021 #define FIRST_INSN_ADDRESS 0
1024 /* shorten_branches might be called multiple times: for example, the SH
1025 port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG.
1026 In order to do this, it needs proper length information, which it obtains
1027 by calling shorten_branches. This cannot be collapsed with
1028 shorten_branches itself into a single pass unless we also want to integrate
1029 reorg.c, since the branch splitting exposes new instructions with delay
1033 shorten_branches (first
)
1034 rtx first ATTRIBUTE_UNUSED
;
1041 #ifdef HAVE_ATTR_length
1042 #define MAX_CODE_ALIGN 16
1044 int something_changed
= 1;
1045 char *varying_length
;
1048 rtx align_tab
[MAX_CODE_ALIGN
];
1052 /* Compute maximum UID and allocate label_align / uid_shuid. */
1053 max_uid
= get_max_uid ();
1055 uid_shuid
= (int *) xmalloc (max_uid
* sizeof *uid_shuid
);
1057 if (max_labelno
!= max_label_num ())
1059 int old
= max_labelno
;
1063 max_labelno
= max_label_num ();
1065 n_labels
= max_labelno
- min_labelno
+ 1;
1066 n_old_labels
= old
- min_labelno
+ 1;
1068 label_align
= (struct label_alignment
*) xrealloc
1069 (label_align
, n_labels
* sizeof (struct label_alignment
));
1071 /* Range of labels grows monotonically in the function. Abort here
1072 means that the initialization of array got lost. */
1073 if (n_old_labels
> n_labels
)
1076 memset (label_align
+ n_old_labels
, 0,
1077 (n_labels
- n_old_labels
) * sizeof (struct label_alignment
));
1080 /* Initialize label_align and set up uid_shuid to be strictly
1081 monotonically rising with insn order. */
1082 /* We use max_log here to keep track of the maximum alignment we want to
1083 impose on the next CODE_LABEL (or the current one if we are processing
1084 the CODE_LABEL itself). */
1089 for (insn
= get_insns (), i
= 1; insn
; insn
= NEXT_INSN (insn
))
1093 INSN_SHUID (insn
) = i
++;
1096 /* reorg might make the first insn of a loop being run once only,
1097 and delete the label in front of it. Then we want to apply
1098 the loop alignment to the new label created by reorg, which
1099 is separated by the former loop start insn from the
1100 NOTE_INSN_LOOP_BEG. */
1102 else if (GET_CODE (insn
) == CODE_LABEL
)
1106 /* Merge in alignments computed by compute_alignments. */
1107 log
= LABEL_TO_ALIGNMENT (insn
);
1111 max_skip
= LABEL_TO_MAX_SKIP (insn
);
1114 log
= LABEL_ALIGN (insn
);
1118 max_skip
= LABEL_ALIGN_MAX_SKIP
;
1120 next
= NEXT_INSN (insn
);
1121 /* ADDR_VECs only take room if read-only data goes into the text
1123 if (JUMP_TABLES_IN_TEXT_SECTION
|| !HAVE_READONLY_DATA_SECTION
)
1124 if (next
&& GET_CODE (next
) == JUMP_INSN
)
1126 rtx nextbody
= PATTERN (next
);
1127 if (GET_CODE (nextbody
) == ADDR_VEC
1128 || GET_CODE (nextbody
) == ADDR_DIFF_VEC
)
1130 log
= ADDR_VEC_ALIGN (next
);
1134 max_skip
= LABEL_ALIGN_MAX_SKIP
;
1138 LABEL_TO_ALIGNMENT (insn
) = max_log
;
1139 LABEL_TO_MAX_SKIP (insn
) = max_skip
;
1143 else if (GET_CODE (insn
) == BARRIER
)
1147 for (label
= insn
; label
&& ! INSN_P (label
);
1148 label
= NEXT_INSN (label
))
1149 if (GET_CODE (label
) == CODE_LABEL
)
1151 log
= LABEL_ALIGN_AFTER_BARRIER (insn
);
1155 max_skip
= LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP
;
1161 #ifdef HAVE_ATTR_length
1163 /* Allocate the rest of the arrays. */
1164 insn_lengths
= (int *) xmalloc (max_uid
* sizeof (*insn_lengths
));
1165 insn_lengths_max_uid
= max_uid
;
1166 /* Syntax errors can lead to labels being outside of the main insn stream.
1167 Initialize insn_addresses, so that we get reproducible results. */
1168 INSN_ADDRESSES_ALLOC (max_uid
);
1170 varying_length
= (char *) xcalloc (max_uid
, sizeof (char));
1172 /* Initialize uid_align. We scan instructions
1173 from end to start, and keep in align_tab[n] the last seen insn
1174 that does an alignment of at least n+1, i.e. the successor
1175 in the alignment chain for an insn that does / has a known
1177 uid_align
= (rtx
*) xcalloc (max_uid
, sizeof *uid_align
);
1179 for (i
= MAX_CODE_ALIGN
; --i
>= 0;)
1180 align_tab
[i
] = NULL_RTX
;
1181 seq
= get_last_insn ();
1182 for (; seq
; seq
= PREV_INSN (seq
))
1184 int uid
= INSN_UID (seq
);
1186 log
= (GET_CODE (seq
) == CODE_LABEL
? LABEL_TO_ALIGNMENT (seq
) : 0);
1187 uid_align
[uid
] = align_tab
[0];
1190 /* Found an alignment label. */
1191 uid_align
[uid
] = align_tab
[log
];
1192 for (i
= log
- 1; i
>= 0; i
--)
1196 #ifdef CASE_VECTOR_SHORTEN_MODE
1199 /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum
1202 int min_shuid
= INSN_SHUID (get_insns ()) - 1;
1203 int max_shuid
= INSN_SHUID (get_last_insn ()) + 1;
1206 for (insn
= first
; insn
!= 0; insn
= NEXT_INSN (insn
))
1208 rtx min_lab
= NULL_RTX
, max_lab
= NULL_RTX
, pat
;
1209 int len
, i
, min
, max
, insn_shuid
;
1211 addr_diff_vec_flags flags
;
1213 if (GET_CODE (insn
) != JUMP_INSN
1214 || GET_CODE (PATTERN (insn
)) != ADDR_DIFF_VEC
)
1216 pat
= PATTERN (insn
);
1217 len
= XVECLEN (pat
, 1);
1220 min_align
= MAX_CODE_ALIGN
;
1221 for (min
= max_shuid
, max
= min_shuid
, i
= len
- 1; i
>= 0; i
--)
1223 rtx lab
= XEXP (XVECEXP (pat
, 1, i
), 0);
1224 int shuid
= INSN_SHUID (lab
);
1235 if (min_align
> LABEL_TO_ALIGNMENT (lab
))
1236 min_align
= LABEL_TO_ALIGNMENT (lab
);
1238 XEXP (pat
, 2) = gen_rtx_LABEL_REF (VOIDmode
, min_lab
);
1239 XEXP (pat
, 3) = gen_rtx_LABEL_REF (VOIDmode
, max_lab
);
1240 insn_shuid
= INSN_SHUID (insn
);
1241 rel
= INSN_SHUID (XEXP (XEXP (pat
, 0), 0));
1242 flags
.min_align
= min_align
;
1243 flags
.base_after_vec
= rel
> insn_shuid
;
1244 flags
.min_after_vec
= min
> insn_shuid
;
1245 flags
.max_after_vec
= max
> insn_shuid
;
1246 flags
.min_after_base
= min
> rel
;
1247 flags
.max_after_base
= max
> rel
;
1248 ADDR_DIFF_VEC_FLAGS (pat
) = flags
;
1251 #endif /* CASE_VECTOR_SHORTEN_MODE */
1253 /* Compute initial lengths, addresses, and varying flags for each insn. */
1254 for (insn_current_address
= FIRST_INSN_ADDRESS
, insn
= first
;
1256 insn_current_address
+= insn_lengths
[uid
], insn
= NEXT_INSN (insn
))
1258 uid
= INSN_UID (insn
);
1260 insn_lengths
[uid
] = 0;
1262 if (GET_CODE (insn
) == CODE_LABEL
)
1264 int log
= LABEL_TO_ALIGNMENT (insn
);
1267 int align
= 1 << log
;
1268 int new_address
= (insn_current_address
+ align
- 1) & -align
;
1269 insn_lengths
[uid
] = new_address
- insn_current_address
;
1273 INSN_ADDRESSES (uid
) = insn_current_address
;
1275 if (GET_CODE (insn
) == NOTE
|| GET_CODE (insn
) == BARRIER
1276 || GET_CODE (insn
) == CODE_LABEL
)
1278 if (INSN_DELETED_P (insn
))
1281 body
= PATTERN (insn
);
1282 if (GET_CODE (body
) == ADDR_VEC
|| GET_CODE (body
) == ADDR_DIFF_VEC
)
1284 /* This only takes room if read-only data goes into the text
1286 if (JUMP_TABLES_IN_TEXT_SECTION
|| !HAVE_READONLY_DATA_SECTION
)
1287 insn_lengths
[uid
] = (XVECLEN (body
,
1288 GET_CODE (body
) == ADDR_DIFF_VEC
)
1289 * GET_MODE_SIZE (GET_MODE (body
)));
1290 /* Alignment is handled by ADDR_VEC_ALIGN. */
1292 else if (GET_CODE (body
) == ASM_INPUT
|| asm_noperands (body
) >= 0)
1293 insn_lengths
[uid
] = asm_insn_count (body
) * insn_default_length (insn
);
1294 else if (GET_CODE (body
) == SEQUENCE
)
1297 int const_delay_slots
;
1299 const_delay_slots
= const_num_delay_slots (XVECEXP (body
, 0, 0));
1301 const_delay_slots
= 0;
1303 /* Inside a delay slot sequence, we do not do any branch shortening
1304 if the shortening could change the number of delay slots
1306 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
1308 rtx inner_insn
= XVECEXP (body
, 0, i
);
1309 int inner_uid
= INSN_UID (inner_insn
);
1312 if (GET_CODE (body
) == ASM_INPUT
1313 || asm_noperands (PATTERN (XVECEXP (body
, 0, i
))) >= 0)
1314 inner_length
= (asm_insn_count (PATTERN (inner_insn
))
1315 * insn_default_length (inner_insn
));
1317 inner_length
= insn_default_length (inner_insn
);
1319 insn_lengths
[inner_uid
] = inner_length
;
1320 if (const_delay_slots
)
1322 if ((varying_length
[inner_uid
]
1323 = insn_variable_length_p (inner_insn
)) != 0)
1324 varying_length
[uid
] = 1;
1325 INSN_ADDRESSES (inner_uid
) = (insn_current_address
1326 + insn_lengths
[uid
]);
1329 varying_length
[inner_uid
] = 0;
1330 insn_lengths
[uid
] += inner_length
;
1333 else if (GET_CODE (body
) != USE
&& GET_CODE (body
) != CLOBBER
)
1335 insn_lengths
[uid
] = insn_default_length (insn
);
1336 varying_length
[uid
] = insn_variable_length_p (insn
);
1339 /* If needed, do any adjustment. */
1340 #ifdef ADJUST_INSN_LENGTH
1341 ADJUST_INSN_LENGTH (insn
, insn_lengths
[uid
]);
1342 if (insn_lengths
[uid
] < 0)
1343 fatal_insn ("negative insn length", insn
);
1347 /* Now loop over all the insns finding varying length insns. For each,
1348 get the current insn length. If it has changed, reflect the change.
1349 When nothing changes for a full pass, we are done. */
1351 while (something_changed
)
1353 something_changed
= 0;
1354 insn_current_align
= MAX_CODE_ALIGN
- 1;
1355 for (insn_current_address
= FIRST_INSN_ADDRESS
, insn
= first
;
1357 insn
= NEXT_INSN (insn
))
1360 #ifdef ADJUST_INSN_LENGTH
1365 uid
= INSN_UID (insn
);
1367 if (GET_CODE (insn
) == CODE_LABEL
)
1369 int log
= LABEL_TO_ALIGNMENT (insn
);
1370 if (log
> insn_current_align
)
1372 int align
= 1 << log
;
1373 int new_address
= (insn_current_address
+ align
- 1) & -align
;
1374 insn_lengths
[uid
] = new_address
- insn_current_address
;
1375 insn_current_align
= log
;
1376 insn_current_address
= new_address
;
1379 insn_lengths
[uid
] = 0;
1380 INSN_ADDRESSES (uid
) = insn_current_address
;
1384 length_align
= INSN_LENGTH_ALIGNMENT (insn
);
1385 if (length_align
< insn_current_align
)
1386 insn_current_align
= length_align
;
1388 insn_last_address
= INSN_ADDRESSES (uid
);
1389 INSN_ADDRESSES (uid
) = insn_current_address
;
1391 #ifdef CASE_VECTOR_SHORTEN_MODE
1392 if (optimize
&& GET_CODE (insn
) == JUMP_INSN
1393 && GET_CODE (PATTERN (insn
)) == ADDR_DIFF_VEC
)
1395 rtx body
= PATTERN (insn
);
1396 int old_length
= insn_lengths
[uid
];
1397 rtx rel_lab
= XEXP (XEXP (body
, 0), 0);
1398 rtx min_lab
= XEXP (XEXP (body
, 2), 0);
1399 rtx max_lab
= XEXP (XEXP (body
, 3), 0);
1400 int rel_addr
= INSN_ADDRESSES (INSN_UID (rel_lab
));
1401 int min_addr
= INSN_ADDRESSES (INSN_UID (min_lab
));
1402 int max_addr
= INSN_ADDRESSES (INSN_UID (max_lab
));
1405 addr_diff_vec_flags flags
;
1407 /* Avoid automatic aggregate initialization. */
1408 flags
= ADDR_DIFF_VEC_FLAGS (body
);
1410 /* Try to find a known alignment for rel_lab. */
1411 for (prev
= rel_lab
;
1413 && ! insn_lengths
[INSN_UID (prev
)]
1414 && ! (varying_length
[INSN_UID (prev
)] & 1);
1415 prev
= PREV_INSN (prev
))
1416 if (varying_length
[INSN_UID (prev
)] & 2)
1418 rel_align
= LABEL_TO_ALIGNMENT (prev
);
1422 /* See the comment on addr_diff_vec_flags in rtl.h for the
1423 meaning of the flags values. base: REL_LAB vec: INSN */
1424 /* Anything after INSN has still addresses from the last
1425 pass; adjust these so that they reflect our current
1426 estimate for this pass. */
1427 if (flags
.base_after_vec
)
1428 rel_addr
+= insn_current_address
- insn_last_address
;
1429 if (flags
.min_after_vec
)
1430 min_addr
+= insn_current_address
- insn_last_address
;
1431 if (flags
.max_after_vec
)
1432 max_addr
+= insn_current_address
- insn_last_address
;
1433 /* We want to know the worst case, i.e. lowest possible value
1434 for the offset of MIN_LAB. If MIN_LAB is after REL_LAB,
1435 its offset is positive, and we have to be wary of code shrink;
1436 otherwise, it is negative, and we have to be vary of code
1438 if (flags
.min_after_base
)
1440 /* If INSN is between REL_LAB and MIN_LAB, the size
1441 changes we are about to make can change the alignment
1442 within the observed offset, therefore we have to break
1443 it up into two parts that are independent. */
1444 if (! flags
.base_after_vec
&& flags
.min_after_vec
)
1446 min_addr
-= align_fuzz (rel_lab
, insn
, rel_align
, 0);
1447 min_addr
-= align_fuzz (insn
, min_lab
, 0, 0);
1450 min_addr
-= align_fuzz (rel_lab
, min_lab
, rel_align
, 0);
1454 if (flags
.base_after_vec
&& ! flags
.min_after_vec
)
1456 min_addr
-= align_fuzz (min_lab
, insn
, 0, ~0);
1457 min_addr
-= align_fuzz (insn
, rel_lab
, 0, ~0);
1460 min_addr
-= align_fuzz (min_lab
, rel_lab
, 0, ~0);
1462 /* Likewise, determine the highest lowest possible value
1463 for the offset of MAX_LAB. */
1464 if (flags
.max_after_base
)
1466 if (! flags
.base_after_vec
&& flags
.max_after_vec
)
1468 max_addr
+= align_fuzz (rel_lab
, insn
, rel_align
, ~0);
1469 max_addr
+= align_fuzz (insn
, max_lab
, 0, ~0);
1472 max_addr
+= align_fuzz (rel_lab
, max_lab
, rel_align
, ~0);
1476 if (flags
.base_after_vec
&& ! flags
.max_after_vec
)
1478 max_addr
+= align_fuzz (max_lab
, insn
, 0, 0);
1479 max_addr
+= align_fuzz (insn
, rel_lab
, 0, 0);
1482 max_addr
+= align_fuzz (max_lab
, rel_lab
, 0, 0);
1484 PUT_MODE (body
, CASE_VECTOR_SHORTEN_MODE (min_addr
- rel_addr
,
1485 max_addr
- rel_addr
,
1487 if (JUMP_TABLES_IN_TEXT_SECTION
|| !HAVE_READONLY_DATA_SECTION
)
1490 = (XVECLEN (body
, 1) * GET_MODE_SIZE (GET_MODE (body
)));
1491 insn_current_address
+= insn_lengths
[uid
];
1492 if (insn_lengths
[uid
] != old_length
)
1493 something_changed
= 1;
1498 #endif /* CASE_VECTOR_SHORTEN_MODE */
1500 if (! (varying_length
[uid
]))
1502 if (GET_CODE (insn
) == INSN
1503 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
1507 body
= PATTERN (insn
);
1508 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
1510 rtx inner_insn
= XVECEXP (body
, 0, i
);
1511 int inner_uid
= INSN_UID (inner_insn
);
1513 INSN_ADDRESSES (inner_uid
) = insn_current_address
;
1515 insn_current_address
+= insn_lengths
[inner_uid
];
1519 insn_current_address
+= insn_lengths
[uid
];
1524 if (GET_CODE (insn
) == INSN
&& GET_CODE (PATTERN (insn
)) == SEQUENCE
)
1528 body
= PATTERN (insn
);
1530 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
1532 rtx inner_insn
= XVECEXP (body
, 0, i
);
1533 int inner_uid
= INSN_UID (inner_insn
);
1536 INSN_ADDRESSES (inner_uid
) = insn_current_address
;
1538 /* insn_current_length returns 0 for insns with a
1539 non-varying length. */
1540 if (! varying_length
[inner_uid
])
1541 inner_length
= insn_lengths
[inner_uid
];
1543 inner_length
= insn_current_length (inner_insn
);
1545 if (inner_length
!= insn_lengths
[inner_uid
])
1547 insn_lengths
[inner_uid
] = inner_length
;
1548 something_changed
= 1;
1550 insn_current_address
+= insn_lengths
[inner_uid
];
1551 new_length
+= inner_length
;
1556 new_length
= insn_current_length (insn
);
1557 insn_current_address
+= new_length
;
1560 #ifdef ADJUST_INSN_LENGTH
1561 /* If needed, do any adjustment. */
1562 tmp_length
= new_length
;
1563 ADJUST_INSN_LENGTH (insn
, new_length
);
1564 insn_current_address
+= (new_length
- tmp_length
);
1567 if (new_length
!= insn_lengths
[uid
])
1569 insn_lengths
[uid
] = new_length
;
1570 something_changed
= 1;
1573 /* For a non-optimizing compile, do only a single pass. */
1578 free (varying_length
);
1580 #endif /* HAVE_ATTR_length */
1583 #ifdef HAVE_ATTR_length
1584 /* Given the body of an INSN known to be generated by an ASM statement, return
1585 the number of machine instructions likely to be generated for this insn.
1586 This is used to compute its length. */
1589 asm_insn_count (body
)
1592 const char *template;
1595 if (GET_CODE (body
) == ASM_INPUT
)
1596 template = XSTR (body
, 0);
1598 template = decode_asm_operands (body
, NULL
, NULL
, NULL
, NULL
);
1600 for (; *template; template++)
1601 if (IS_ASM_LOGICAL_LINE_SEPARATOR (*template) || *template == '\n')
1608 /* Output assembler code for the start of a function,
1609 and initialize some of the variables in this file
1610 for the new function. The label for the function and associated
1611 assembler pseudo-ops have already been output in `assemble_start_function'.
1613 FIRST is the first insn of the rtl for the function being compiled.
1614 FILE is the file to write assembler code to.
1615 OPTIMIZE is nonzero if we should eliminate redundant
1616 test and compare insns. */
1619 final_start_function (first
, file
, optimize
)
1622 int optimize ATTRIBUTE_UNUSED
;
1626 this_is_asm_operands
= 0;
1628 #ifdef NON_SAVING_SETJMP
1629 /* A function that calls setjmp should save and restore all the
1630 call-saved registers on a system where longjmp clobbers them. */
1631 if (NON_SAVING_SETJMP
&& current_function_calls_setjmp
)
1635 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
1636 if (!call_used_regs
[i
])
1637 regs_ever_live
[i
] = 1;
1641 if (NOTE_LINE_NUMBER (first
) != NOTE_INSN_DELETED
)
1642 notice_source_line (first
);
1643 high_block_linenum
= high_function_linenum
= last_linenum
;
1645 (*debug_hooks
->begin_prologue
) (last_linenum
, last_filename
);
1647 #if defined (DWARF2_UNWIND_INFO) || defined (IA64_UNWIND_INFO)
1648 if (write_symbols
!= DWARF2_DEBUG
&& write_symbols
!= VMS_AND_DWARF2_DEBUG
)
1649 dwarf2out_begin_prologue (0, NULL
);
1652 #ifdef LEAF_REG_REMAP
1653 if (current_function_uses_only_leaf_regs
)
1654 leaf_renumber_regs (first
);
1657 /* The Sun386i and perhaps other machines don't work right
1658 if the profiling code comes after the prologue. */
1659 #ifdef PROFILE_BEFORE_PROLOGUE
1660 if (current_function_profile
)
1661 profile_function (file
);
1662 #endif /* PROFILE_BEFORE_PROLOGUE */
1664 #if defined (DWARF2_UNWIND_INFO) && defined (HAVE_prologue)
1665 if (dwarf2out_do_frame ())
1666 dwarf2out_frame_debug (NULL_RTX
);
1669 /* If debugging, assign block numbers to all of the blocks in this
1673 remove_unnecessary_notes ();
1675 number_blocks (current_function_decl
);
1676 /* We never actually put out begin/end notes for the top-level
1677 block in the function. But, conceptually, that block is
1679 TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl
)) = 1;
1682 /* First output the function prologue: code to set up the stack frame. */
1683 (*targetm
.asm_out
.function_prologue
) (file
, get_frame_size ());
1685 #ifdef VMS_DEBUGGING_INFO
1686 /* Output label after the prologue of the function. */
1687 if (write_symbols
== VMS_DEBUG
|| write_symbols
== VMS_AND_DWARF2_DEBUG
)
1688 vmsdbgout_after_prologue ();
1691 /* If the machine represents the prologue as RTL, the profiling code must
1692 be emitted when NOTE_INSN_PROLOGUE_END is scanned. */
1693 #ifdef HAVE_prologue
1694 if (! HAVE_prologue
)
1696 profile_after_prologue (file
);
1700 profile_after_prologue (file
)
1701 FILE *file ATTRIBUTE_UNUSED
;
1703 #ifndef PROFILE_BEFORE_PROLOGUE
1704 if (current_function_profile
)
1705 profile_function (file
);
1706 #endif /* not PROFILE_BEFORE_PROLOGUE */
1710 profile_function (file
)
1711 FILE *file ATTRIBUTE_UNUSED
;
1713 #ifndef NO_PROFILE_COUNTERS
1714 int align
= MIN (BIGGEST_ALIGNMENT
, LONG_TYPE_SIZE
);
1716 #if defined(ASM_OUTPUT_REG_PUSH)
1717 #if defined(STRUCT_VALUE_INCOMING_REGNUM) || defined(STRUCT_VALUE_REGNUM)
1718 int sval
= current_function_returns_struct
;
1720 #if defined(STATIC_CHAIN_INCOMING_REGNUM) || defined(STATIC_CHAIN_REGNUM)
1721 int cxt
= current_function_needs_context
;
1723 #endif /* ASM_OUTPUT_REG_PUSH */
1725 #ifndef NO_PROFILE_COUNTERS
1727 ASM_OUTPUT_ALIGN (file
, floor_log2 (align
/ BITS_PER_UNIT
));
1728 ASM_OUTPUT_INTERNAL_LABEL (file
, "LP", current_function_profile_label_no
);
1729 assemble_integer (const0_rtx
, LONG_TYPE_SIZE
/ BITS_PER_UNIT
, align
, 1);
1732 function_section (current_function_decl
);
1734 #if defined(STRUCT_VALUE_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1736 ASM_OUTPUT_REG_PUSH (file
, STRUCT_VALUE_INCOMING_REGNUM
);
1738 #if defined(STRUCT_VALUE_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1741 ASM_OUTPUT_REG_PUSH (file
, STRUCT_VALUE_REGNUM
);
1746 #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1748 ASM_OUTPUT_REG_PUSH (file
, STATIC_CHAIN_INCOMING_REGNUM
);
1750 #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1753 ASM_OUTPUT_REG_PUSH (file
, STATIC_CHAIN_REGNUM
);
1758 FUNCTION_PROFILER (file
, current_function_profile_label_no
);
1760 #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1762 ASM_OUTPUT_REG_POP (file
, STATIC_CHAIN_INCOMING_REGNUM
);
1764 #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1767 ASM_OUTPUT_REG_POP (file
, STATIC_CHAIN_REGNUM
);
1772 #if defined(STRUCT_VALUE_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1774 ASM_OUTPUT_REG_POP (file
, STRUCT_VALUE_INCOMING_REGNUM
);
1776 #if defined(STRUCT_VALUE_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1779 ASM_OUTPUT_REG_POP (file
, STRUCT_VALUE_REGNUM
);
1785 /* Output assembler code for the end of a function.
1786 For clarity, args are same as those of `final_start_function'
1787 even though not all of them are needed. */
1790 final_end_function ()
1794 (*debug_hooks
->end_function
) (high_function_linenum
);
1796 /* Finally, output the function epilogue:
1797 code to restore the stack frame and return to the caller. */
1798 (*targetm
.asm_out
.function_epilogue
) (asm_out_file
, get_frame_size ());
1800 /* And debug output. */
1801 (*debug_hooks
->end_epilogue
) ();
1803 #if defined (DWARF2_UNWIND_INFO)
1804 if (write_symbols
!= DWARF2_DEBUG
&& write_symbols
!= VMS_AND_DWARF2_DEBUG
1805 && dwarf2out_do_frame ())
1806 dwarf2out_end_epilogue ();
1810 /* Output assembler code for some insns: all or part of a function.
1811 For description of args, see `final_start_function', above.
1813 PRESCAN is 1 if we are not really outputting,
1814 just scanning as if we were outputting.
1815 Prescanning deletes and rearranges insns just like ordinary output.
1816 PRESCAN is -2 if we are outputting after having prescanned.
1817 In this case, don't try to delete or rearrange insns
1818 because that has already been done.
1819 Prescanning is done only on certain machines. */
1822 final (first
, file
, optimize
, prescan
)
1832 last_ignored_compare
= 0;
1835 /* Make a map indicating which line numbers appear in this function.
1836 When producing SDB debugging info, delete troublesome line number
1837 notes from inlined functions in other files as well as duplicate
1838 line number notes. */
1839 #ifdef SDB_DEBUGGING_INFO
1840 if (write_symbols
== SDB_DEBUG
)
1843 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
1844 if (GET_CODE (insn
) == NOTE
&& NOTE_LINE_NUMBER (insn
) > 0)
1846 if ((RTX_INTEGRATED_P (insn
)
1847 && strcmp (NOTE_SOURCE_FILE (insn
), main_input_filename
) != 0)
1849 && NOTE_LINE_NUMBER (insn
) == NOTE_LINE_NUMBER (last
)
1850 && NOTE_SOURCE_FILE (insn
) == NOTE_SOURCE_FILE (last
)))
1852 delete_insn (insn
); /* Use delete_note. */
1856 if (NOTE_LINE_NUMBER (insn
) > max_line
)
1857 max_line
= NOTE_LINE_NUMBER (insn
);
1863 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
1864 if (GET_CODE (insn
) == NOTE
&& NOTE_LINE_NUMBER (insn
) > max_line
)
1865 max_line
= NOTE_LINE_NUMBER (insn
);
1868 line_note_exists
= (char *) xcalloc (max_line
+ 1, sizeof (char));
1870 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
1872 if (INSN_UID (insn
) > max_uid
) /* find largest UID */
1873 max_uid
= INSN_UID (insn
);
1874 if (GET_CODE (insn
) == NOTE
&& NOTE_LINE_NUMBER (insn
) > 0)
1875 line_note_exists
[NOTE_LINE_NUMBER (insn
)] = 1;
1877 /* If CC tracking across branches is enabled, record the insn which
1878 jumps to each branch only reached from one place. */
1879 if (optimize
&& GET_CODE (insn
) == JUMP_INSN
)
1881 rtx lab
= JUMP_LABEL (insn
);
1882 if (lab
&& LABEL_NUSES (lab
) == 1)
1884 LABEL_REFS (lab
) = insn
;
1894 /* Output the insns. */
1895 for (insn
= NEXT_INSN (first
); insn
;)
1897 #ifdef HAVE_ATTR_length
1898 if ((unsigned) INSN_UID (insn
) >= INSN_ADDRESSES_SIZE ())
1901 /* Irritatingly, the reg-stack pass is creating new instructions
1902 and because of REG_DEAD note abuse it has to run after
1903 shorten_branches. Fake address of -1 then. */
1904 insn_current_address
= -1;
1906 /* This can be triggered by bugs elsewhere in the compiler if
1907 new insns are created after init_insn_lengths is called. */
1912 insn_current_address
= INSN_ADDRESSES (INSN_UID (insn
));
1913 #endif /* HAVE_ATTR_length */
1915 insn
= final_scan_insn (insn
, file
, optimize
, prescan
, 0);
1918 /* Store function names for edge-profiling. */
1919 /* ??? Probably should re-use the existing struct function. */
1921 if (cfun
->arc_profile
)
1923 struct function_list
*new_item
= xmalloc (sizeof (struct function_list
));
1925 *functions_tail
= new_item
;
1926 functions_tail
= &new_item
->next
;
1929 new_item
->name
= xstrdup (current_function_name
);
1930 new_item
->cfg_checksum
= profile_info
.current_function_cfg_checksum
;
1931 new_item
->count_edges
= profile_info
.count_edges_instrumented_now
;
1934 free (line_note_exists
);
1935 line_note_exists
= NULL
;
1939 get_insn_template (code
, insn
)
1943 const void *output
= insn_data
[code
].output
;
1944 switch (insn_data
[code
].output_format
)
1946 case INSN_OUTPUT_FORMAT_SINGLE
:
1947 return (const char *) output
;
1948 case INSN_OUTPUT_FORMAT_MULTI
:
1949 return ((const char *const *) output
)[which_alternative
];
1950 case INSN_OUTPUT_FORMAT_FUNCTION
:
1953 return (*(insn_output_fn
) output
) (recog_data
.operand
, insn
);
1960 /* The final scan for one insn, INSN.
1961 Args are same as in `final', except that INSN
1962 is the insn being scanned.
1963 Value returned is the next insn to be scanned.
1965 NOPEEPHOLES is the flag to disallow peephole processing (currently
1966 used for within delayed branch sequence output). */
1969 final_scan_insn (insn
, file
, optimize
, prescan
, nopeepholes
)
1972 int optimize ATTRIBUTE_UNUSED
;
1974 int nopeepholes ATTRIBUTE_UNUSED
;
1982 /* Ignore deleted insns. These can occur when we split insns (due to a
1983 template of "#") while not optimizing. */
1984 if (INSN_DELETED_P (insn
))
1985 return NEXT_INSN (insn
);
1987 switch (GET_CODE (insn
))
1993 switch (NOTE_LINE_NUMBER (insn
))
1995 case NOTE_INSN_DELETED
:
1996 case NOTE_INSN_LOOP_BEG
:
1997 case NOTE_INSN_LOOP_END
:
1998 case NOTE_INSN_LOOP_END_TOP_COND
:
1999 case NOTE_INSN_LOOP_CONT
:
2000 case NOTE_INSN_LOOP_VTOP
:
2001 case NOTE_INSN_FUNCTION_END
:
2002 case NOTE_INSN_REPEATED_LINE_NUMBER
:
2003 case NOTE_INSN_RANGE_BEG
:
2004 case NOTE_INSN_RANGE_END
:
2005 case NOTE_INSN_LIVE
:
2006 case NOTE_INSN_EXPECTED_VALUE
:
2009 case NOTE_INSN_BASIC_BLOCK
:
2010 #ifdef IA64_UNWIND_INFO
2011 IA64_UNWIND_EMIT (asm_out_file
, insn
);
2014 fprintf (asm_out_file
, "\t%s basic block %d\n",
2015 ASM_COMMENT_START
, NOTE_BASIC_BLOCK (insn
)->index
);
2018 case NOTE_INSN_EH_REGION_BEG
:
2019 ASM_OUTPUT_DEBUG_LABEL (asm_out_file
, "LEHB",
2020 NOTE_EH_HANDLER (insn
));
2023 case NOTE_INSN_EH_REGION_END
:
2024 ASM_OUTPUT_DEBUG_LABEL (asm_out_file
, "LEHE",
2025 NOTE_EH_HANDLER (insn
));
2028 case NOTE_INSN_PROLOGUE_END
:
2029 (*targetm
.asm_out
.function_end_prologue
) (file
);
2030 profile_after_prologue (file
);
2033 case NOTE_INSN_EPILOGUE_BEG
:
2034 (*targetm
.asm_out
.function_begin_epilogue
) (file
);
2037 case NOTE_INSN_FUNCTION_BEG
:
2039 (*debug_hooks
->end_prologue
) (last_linenum
);
2042 case NOTE_INSN_BLOCK_BEG
:
2043 if (debug_info_level
== DINFO_LEVEL_NORMAL
2044 || debug_info_level
== DINFO_LEVEL_VERBOSE
2045 || write_symbols
== DWARF_DEBUG
2046 || write_symbols
== DWARF2_DEBUG
2047 || write_symbols
== VMS_AND_DWARF2_DEBUG
2048 || write_symbols
== VMS_DEBUG
)
2050 int n
= BLOCK_NUMBER (NOTE_BLOCK (insn
));
2054 high_block_linenum
= last_linenum
;
2056 /* Output debugging info about the symbol-block beginning. */
2057 (*debug_hooks
->begin_block
) (last_linenum
, n
);
2059 /* Mark this block as output. */
2060 TREE_ASM_WRITTEN (NOTE_BLOCK (insn
)) = 1;
2064 case NOTE_INSN_BLOCK_END
:
2065 if (debug_info_level
== DINFO_LEVEL_NORMAL
2066 || debug_info_level
== DINFO_LEVEL_VERBOSE
2067 || write_symbols
== DWARF_DEBUG
2068 || write_symbols
== DWARF2_DEBUG
2069 || write_symbols
== VMS_AND_DWARF2_DEBUG
2070 || write_symbols
== VMS_DEBUG
)
2072 int n
= BLOCK_NUMBER (NOTE_BLOCK (insn
));
2076 /* End of a symbol-block. */
2078 if (block_depth
< 0)
2081 (*debug_hooks
->end_block
) (high_block_linenum
, n
);
2085 case NOTE_INSN_DELETED_LABEL
:
2086 /* Emit the label. We may have deleted the CODE_LABEL because
2087 the label could be proved to be unreachable, though still
2088 referenced (in the form of having its address taken. */
2089 ASM_OUTPUT_DEBUG_LABEL (file
, "L", CODE_LABEL_NUMBER (insn
));
2096 if (NOTE_LINE_NUMBER (insn
) <= 0)
2099 /* This note is a line-number. */
2104 /* If there is anything real after this note, output it.
2105 If another line note follows, omit this one. */
2106 for (note
= NEXT_INSN (insn
); note
; note
= NEXT_INSN (note
))
2108 if (GET_CODE (note
) != NOTE
&& GET_CODE (note
) != CODE_LABEL
)
2111 /* These types of notes can be significant
2112 so make sure the preceding line number stays. */
2113 else if (GET_CODE (note
) == NOTE
2114 && (NOTE_LINE_NUMBER (note
) == NOTE_INSN_BLOCK_BEG
2115 || NOTE_LINE_NUMBER (note
) == NOTE_INSN_BLOCK_END
2116 || NOTE_LINE_NUMBER (note
) == NOTE_INSN_FUNCTION_BEG
))
2118 else if (GET_CODE (note
) == NOTE
&& NOTE_LINE_NUMBER (note
) > 0)
2120 /* Another line note follows; we can delete this note
2121 if no intervening line numbers have notes elsewhere. */
2123 for (num
= NOTE_LINE_NUMBER (insn
) + 1;
2124 num
< NOTE_LINE_NUMBER (note
);
2126 if (line_note_exists
[num
])
2129 if (num
>= NOTE_LINE_NUMBER (note
))
2135 /* Output this line note if it is the first or the last line
2139 notice_source_line (insn
);
2140 (*debug_hooks
->source_line
) (last_linenum
, last_filename
);
2148 #if defined (DWARF2_UNWIND_INFO)
2149 if (dwarf2out_do_frame ())
2150 dwarf2out_frame_debug (insn
);
2155 /* The target port might emit labels in the output function for
2156 some insn, e.g. sh.c output_branchy_insn. */
2157 if (CODE_LABEL_NUMBER (insn
) <= max_labelno
)
2159 int align
= LABEL_TO_ALIGNMENT (insn
);
2160 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2161 int max_skip
= LABEL_TO_MAX_SKIP (insn
);
2164 if (align
&& NEXT_INSN (insn
))
2166 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2167 ASM_OUTPUT_MAX_SKIP_ALIGN (file
, align
, max_skip
);
2169 ASM_OUTPUT_ALIGN (file
, align
);
2175 /* If this label is reached from only one place, set the condition
2176 codes from the instruction just before the branch. */
2178 /* Disabled because some insns set cc_status in the C output code
2179 and NOTICE_UPDATE_CC alone can set incorrect status. */
2180 if (0 /* optimize && LABEL_NUSES (insn) == 1*/)
2182 rtx jump
= LABEL_REFS (insn
);
2183 rtx barrier
= prev_nonnote_insn (insn
);
2185 /* If the LABEL_REFS field of this label has been set to point
2186 at a branch, the predecessor of the branch is a regular
2187 insn, and that branch is the only way to reach this label,
2188 set the condition codes based on the branch and its
2190 if (barrier
&& GET_CODE (barrier
) == BARRIER
2191 && jump
&& GET_CODE (jump
) == JUMP_INSN
2192 && (prev
= prev_nonnote_insn (jump
))
2193 && GET_CODE (prev
) == INSN
)
2195 NOTICE_UPDATE_CC (PATTERN (prev
), prev
);
2196 NOTICE_UPDATE_CC (PATTERN (jump
), jump
);
2204 #ifdef FINAL_PRESCAN_LABEL
2205 FINAL_PRESCAN_INSN (insn
, NULL
, 0);
2208 if (LABEL_NAME (insn
))
2209 (*debug_hooks
->label
) (insn
);
2213 fputs (ASM_APP_OFF
, file
);
2216 if (NEXT_INSN (insn
) != 0
2217 && GET_CODE (NEXT_INSN (insn
)) == JUMP_INSN
)
2219 rtx nextbody
= PATTERN (NEXT_INSN (insn
));
2221 /* If this label is followed by a jump-table,
2222 make sure we put the label in the read-only section. Also
2223 possibly write the label and jump table together. */
2225 if (GET_CODE (nextbody
) == ADDR_VEC
2226 || GET_CODE (nextbody
) == ADDR_DIFF_VEC
)
2228 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2229 /* In this case, the case vector is being moved by the
2230 target, so don't output the label at all. Leave that
2231 to the back end macros. */
2233 if (! JUMP_TABLES_IN_TEXT_SECTION
)
2237 readonly_data_section ();
2239 #ifdef ADDR_VEC_ALIGN
2240 log_align
= ADDR_VEC_ALIGN (NEXT_INSN (insn
));
2242 log_align
= exact_log2 (BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
);
2244 ASM_OUTPUT_ALIGN (file
, log_align
);
2247 function_section (current_function_decl
);
2249 #ifdef ASM_OUTPUT_CASE_LABEL
2250 ASM_OUTPUT_CASE_LABEL (file
, "L", CODE_LABEL_NUMBER (insn
),
2253 if (LABEL_ALTERNATE_NAME (insn
))
2254 ASM_OUTPUT_ALTERNATE_LABEL_NAME (file
, insn
);
2256 ASM_OUTPUT_INTERNAL_LABEL (file
, "L", CODE_LABEL_NUMBER (insn
));
2262 if (LABEL_ALTERNATE_NAME (insn
))
2263 ASM_OUTPUT_ALTERNATE_LABEL_NAME (file
, insn
);
2265 ASM_OUTPUT_INTERNAL_LABEL (file
, "L", CODE_LABEL_NUMBER (insn
));
2270 rtx body
= PATTERN (insn
);
2271 int insn_code_number
;
2272 const char *template;
2275 /* An INSN, JUMP_INSN or CALL_INSN.
2276 First check for special kinds that recog doesn't recognize. */
2278 if (GET_CODE (body
) == USE
/* These are just declarations */
2279 || GET_CODE (body
) == CLOBBER
)
2283 /* If there is a REG_CC_SETTER note on this insn, it means that
2284 the setting of the condition code was done in the delay slot
2285 of the insn that branched here. So recover the cc status
2286 from the insn that set it. */
2288 note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
2291 NOTICE_UPDATE_CC (PATTERN (XEXP (note
, 0)), XEXP (note
, 0));
2292 cc_prev_status
= cc_status
;
2296 /* Detect insns that are really jump-tables
2297 and output them as such. */
2299 if (GET_CODE (body
) == ADDR_VEC
|| GET_CODE (body
) == ADDR_DIFF_VEC
)
2301 #if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC))
2310 fputs (ASM_APP_OFF
, file
);
2314 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2315 if (GET_CODE (body
) == ADDR_VEC
)
2317 #ifdef ASM_OUTPUT_ADDR_VEC
2318 ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn
), body
);
2325 #ifdef ASM_OUTPUT_ADDR_DIFF_VEC
2326 ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn
), body
);
2332 vlen
= XVECLEN (body
, GET_CODE (body
) == ADDR_DIFF_VEC
);
2333 for (idx
= 0; idx
< vlen
; idx
++)
2335 if (GET_CODE (body
) == ADDR_VEC
)
2337 #ifdef ASM_OUTPUT_ADDR_VEC_ELT
2338 ASM_OUTPUT_ADDR_VEC_ELT
2339 (file
, CODE_LABEL_NUMBER (XEXP (XVECEXP (body
, 0, idx
), 0)));
2346 #ifdef ASM_OUTPUT_ADDR_DIFF_ELT
2347 ASM_OUTPUT_ADDR_DIFF_ELT
2350 CODE_LABEL_NUMBER (XEXP (XVECEXP (body
, 1, idx
), 0)),
2351 CODE_LABEL_NUMBER (XEXP (XEXP (body
, 0), 0)));
2357 #ifdef ASM_OUTPUT_CASE_END
2358 ASM_OUTPUT_CASE_END (file
,
2359 CODE_LABEL_NUMBER (PREV_INSN (insn
)),
2364 function_section (current_function_decl
);
2369 if (GET_CODE (body
) == ASM_INPUT
)
2371 const char *string
= XSTR (body
, 0);
2373 /* There's no telling what that did to the condition codes. */
2382 fputs (ASM_APP_ON
, file
);
2385 fprintf (asm_out_file
, "\t%s\n", string
);
2390 /* Detect `asm' construct with operands. */
2391 if (asm_noperands (body
) >= 0)
2393 unsigned int noperands
= asm_noperands (body
);
2394 rtx
*ops
= (rtx
*) alloca (noperands
* sizeof (rtx
));
2397 /* There's no telling what that did to the condition codes. */
2402 /* Get out the operand values. */
2403 string
= decode_asm_operands (body
, ops
, NULL
, NULL
, NULL
);
2404 /* Inhibit aborts on what would otherwise be compiler bugs. */
2405 insn_noperands
= noperands
;
2406 this_is_asm_operands
= insn
;
2408 /* Output the insn using them. */
2413 fputs (ASM_APP_ON
, file
);
2416 output_asm_insn (string
, ops
);
2419 this_is_asm_operands
= 0;
2423 if (prescan
<= 0 && app_on
)
2425 fputs (ASM_APP_OFF
, file
);
2429 if (GET_CODE (body
) == SEQUENCE
)
2431 /* A delayed-branch sequence */
2437 final_sequence
= body
;
2439 /* The first insn in this SEQUENCE might be a JUMP_INSN that will
2440 force the restoration of a comparison that was previously
2441 thought unnecessary. If that happens, cancel this sequence
2442 and cause that insn to be restored. */
2444 next
= final_scan_insn (XVECEXP (body
, 0, 0), file
, 0, prescan
, 1);
2445 if (next
!= XVECEXP (body
, 0, 1))
2451 for (i
= 1; i
< XVECLEN (body
, 0); i
++)
2453 rtx insn
= XVECEXP (body
, 0, i
);
2454 rtx next
= NEXT_INSN (insn
);
2455 /* We loop in case any instruction in a delay slot gets
2458 insn
= final_scan_insn (insn
, file
, 0, prescan
, 1);
2459 while (insn
!= next
);
2461 #ifdef DBR_OUTPUT_SEQEND
2462 DBR_OUTPUT_SEQEND (file
);
2466 /* If the insn requiring the delay slot was a CALL_INSN, the
2467 insns in the delay slot are actually executed before the
2468 called function. Hence we don't preserve any CC-setting
2469 actions in these insns and the CC must be marked as being
2470 clobbered by the function. */
2471 if (GET_CODE (XVECEXP (body
, 0, 0)) == CALL_INSN
)
2478 /* We have a real machine instruction as rtl. */
2480 body
= PATTERN (insn
);
2483 set
= single_set (insn
);
2485 /* Check for redundant test and compare instructions
2486 (when the condition codes are already set up as desired).
2487 This is done only when optimizing; if not optimizing,
2488 it should be possible for the user to alter a variable
2489 with the debugger in between statements
2490 and the next statement should reexamine the variable
2491 to compute the condition codes. */
2496 rtx set
= single_set (insn
);
2500 && GET_CODE (SET_DEST (set
)) == CC0
2501 && insn
!= last_ignored_compare
)
2503 if (GET_CODE (SET_SRC (set
)) == SUBREG
)
2504 SET_SRC (set
) = alter_subreg (&SET_SRC (set
));
2505 else if (GET_CODE (SET_SRC (set
)) == COMPARE
)
2507 if (GET_CODE (XEXP (SET_SRC (set
), 0)) == SUBREG
)
2508 XEXP (SET_SRC (set
), 0)
2509 = alter_subreg (&XEXP (SET_SRC (set
), 0));
2510 if (GET_CODE (XEXP (SET_SRC (set
), 1)) == SUBREG
)
2511 XEXP (SET_SRC (set
), 1)
2512 = alter_subreg (&XEXP (SET_SRC (set
), 1));
2514 if ((cc_status
.value1
!= 0
2515 && rtx_equal_p (SET_SRC (set
), cc_status
.value1
))
2516 || (cc_status
.value2
!= 0
2517 && rtx_equal_p (SET_SRC (set
), cc_status
.value2
)))
2519 /* Don't delete insn if it has an addressing side-effect. */
2520 if (! FIND_REG_INC_NOTE (insn
, NULL_RTX
)
2521 /* or if anything in it is volatile. */
2522 && ! volatile_refs_p (PATTERN (insn
)))
2524 /* We don't really delete the insn; just ignore it. */
2525 last_ignored_compare
= insn
;
2534 /* Don't bother outputting obvious no-ops, even without -O.
2535 This optimization is fast and doesn't interfere with debugging.
2536 Don't do this if the insn is in a delay slot, since this
2537 will cause an improper number of delay insns to be written. */
2538 if (final_sequence
== 0
2540 && GET_CODE (insn
) == INSN
&& GET_CODE (body
) == SET
2541 && GET_CODE (SET_SRC (body
)) == REG
2542 && GET_CODE (SET_DEST (body
)) == REG
2543 && REGNO (SET_SRC (body
)) == REGNO (SET_DEST (body
)))
2548 /* If this is a conditional branch, maybe modify it
2549 if the cc's are in a nonstandard state
2550 so that it accomplishes the same thing that it would
2551 do straightforwardly if the cc's were set up normally. */
2553 if (cc_status
.flags
!= 0
2554 && GET_CODE (insn
) == JUMP_INSN
2555 && GET_CODE (body
) == SET
2556 && SET_DEST (body
) == pc_rtx
2557 && GET_CODE (SET_SRC (body
)) == IF_THEN_ELSE
2558 && GET_RTX_CLASS (GET_CODE (XEXP (SET_SRC (body
), 0))) == '<'
2559 && XEXP (XEXP (SET_SRC (body
), 0), 0) == cc0_rtx
2560 /* This is done during prescan; it is not done again
2561 in final scan when prescan has been done. */
2564 /* This function may alter the contents of its argument
2565 and clear some of the cc_status.flags bits.
2566 It may also return 1 meaning condition now always true
2567 or -1 meaning condition now always false
2568 or 2 meaning condition nontrivial but altered. */
2569 int result
= alter_cond (XEXP (SET_SRC (body
), 0));
2570 /* If condition now has fixed value, replace the IF_THEN_ELSE
2571 with its then-operand or its else-operand. */
2573 SET_SRC (body
) = XEXP (SET_SRC (body
), 1);
2575 SET_SRC (body
) = XEXP (SET_SRC (body
), 2);
2577 /* The jump is now either unconditional or a no-op.
2578 If it has become a no-op, don't try to output it.
2579 (It would not be recognized.) */
2580 if (SET_SRC (body
) == pc_rtx
)
2585 else if (GET_CODE (SET_SRC (body
)) == RETURN
)
2586 /* Replace (set (pc) (return)) with (return). */
2587 PATTERN (insn
) = body
= SET_SRC (body
);
2589 /* Rerecognize the instruction if it has changed. */
2591 INSN_CODE (insn
) = -1;
2594 /* Make same adjustments to instructions that examine the
2595 condition codes without jumping and instructions that
2596 handle conditional moves (if this machine has either one). */
2598 if (cc_status
.flags
!= 0
2601 rtx cond_rtx
, then_rtx
, else_rtx
;
2603 if (GET_CODE (insn
) != JUMP_INSN
2604 && GET_CODE (SET_SRC (set
)) == IF_THEN_ELSE
)
2606 cond_rtx
= XEXP (SET_SRC (set
), 0);
2607 then_rtx
= XEXP (SET_SRC (set
), 1);
2608 else_rtx
= XEXP (SET_SRC (set
), 2);
2612 cond_rtx
= SET_SRC (set
);
2613 then_rtx
= const_true_rtx
;
2614 else_rtx
= const0_rtx
;
2617 switch (GET_CODE (cond_rtx
))
2631 if (XEXP (cond_rtx
, 0) != cc0_rtx
)
2633 result
= alter_cond (cond_rtx
);
2635 validate_change (insn
, &SET_SRC (set
), then_rtx
, 0);
2636 else if (result
== -1)
2637 validate_change (insn
, &SET_SRC (set
), else_rtx
, 0);
2638 else if (result
== 2)
2639 INSN_CODE (insn
) = -1;
2640 if (SET_DEST (set
) == SET_SRC (set
))
2652 #ifdef HAVE_peephole
2653 /* Do machine-specific peephole optimizations if desired. */
2655 if (optimize
&& !flag_no_peephole
&& !nopeepholes
)
2657 rtx next
= peephole (insn
);
2658 /* When peepholing, if there were notes within the peephole,
2659 emit them before the peephole. */
2660 if (next
!= 0 && next
!= NEXT_INSN (insn
))
2662 rtx prev
= PREV_INSN (insn
);
2664 for (note
= NEXT_INSN (insn
); note
!= next
;
2665 note
= NEXT_INSN (note
))
2666 final_scan_insn (note
, file
, optimize
, prescan
, nopeepholes
);
2668 /* In case this is prescan, put the notes
2669 in proper position for later rescan. */
2670 note
= NEXT_INSN (insn
);
2671 PREV_INSN (note
) = prev
;
2672 NEXT_INSN (prev
) = note
;
2673 NEXT_INSN (PREV_INSN (next
)) = insn
;
2674 PREV_INSN (insn
) = PREV_INSN (next
);
2675 NEXT_INSN (insn
) = next
;
2676 PREV_INSN (next
) = insn
;
2679 /* PEEPHOLE might have changed this. */
2680 body
= PATTERN (insn
);
2684 /* Try to recognize the instruction.
2685 If successful, verify that the operands satisfy the
2686 constraints for the instruction. Crash if they don't,
2687 since `reload' should have changed them so that they do. */
2689 insn_code_number
= recog_memoized (insn
);
2690 cleanup_subreg_operands (insn
);
2692 /* Dump the insn in the assembly for debugging. */
2693 if (flag_dump_rtl_in_asm
)
2695 print_rtx_head
= ASM_COMMENT_START
;
2696 print_rtl_single (asm_out_file
, insn
);
2697 print_rtx_head
= "";
2700 if (! constrain_operands_cached (1))
2701 fatal_insn_not_found (insn
);
2703 /* Some target machines need to prescan each insn before
2706 #ifdef FINAL_PRESCAN_INSN
2707 FINAL_PRESCAN_INSN (insn
, recog_data
.operand
, recog_data
.n_operands
);
2710 #ifdef HAVE_conditional_execution
2711 if (GET_CODE (PATTERN (insn
)) == COND_EXEC
)
2712 current_insn_predicate
= COND_EXEC_TEST (PATTERN (insn
));
2714 current_insn_predicate
= NULL_RTX
;
2718 cc_prev_status
= cc_status
;
2720 /* Update `cc_status' for this instruction.
2721 The instruction's output routine may change it further.
2722 If the output routine for a jump insn needs to depend
2723 on the cc status, it should look at cc_prev_status. */
2725 NOTICE_UPDATE_CC (body
, insn
);
2728 current_output_insn
= debug_insn
= insn
;
2730 #if defined (DWARF2_UNWIND_INFO)
2731 if (GET_CODE (insn
) == CALL_INSN
&& dwarf2out_do_frame ())
2732 dwarf2out_frame_debug (insn
);
2735 /* Find the proper template for this insn. */
2736 template = get_insn_template (insn_code_number
, insn
);
2738 /* If the C code returns 0, it means that it is a jump insn
2739 which follows a deleted test insn, and that test insn
2740 needs to be reinserted. */
2745 if (prev_nonnote_insn (insn
) != last_ignored_compare
)
2749 /* We have already processed the notes between the setter and
2750 the user. Make sure we don't process them again, this is
2751 particularly important if one of the notes is a block
2752 scope note or an EH note. */
2754 prev
!= last_ignored_compare
;
2755 prev
= PREV_INSN (prev
))
2757 if (GET_CODE (prev
) == NOTE
)
2758 delete_insn (prev
); /* Use delete_note. */
2764 /* If the template is the string "#", it means that this insn must
2766 if (template[0] == '#' && template[1] == '\0')
2768 rtx
new = try_split (body
, insn
, 0);
2770 /* If we didn't split the insn, go away. */
2771 if (new == insn
&& PATTERN (new) == body
)
2772 fatal_insn ("could not split insn", insn
);
2774 #ifdef HAVE_ATTR_length
2775 /* This instruction should have been split in shorten_branches,
2776 to ensure that we would have valid length info for the
2788 #ifdef IA64_UNWIND_INFO
2789 IA64_UNWIND_EMIT (asm_out_file
, insn
);
2791 /* Output assembler code from the template. */
2793 output_asm_insn (template, recog_data
.operand
);
2795 #if defined (DWARF2_UNWIND_INFO)
2796 #if defined (HAVE_prologue)
2797 if (GET_CODE (insn
) == INSN
&& dwarf2out_do_frame ())
2798 dwarf2out_frame_debug (insn
);
2800 if (!ACCUMULATE_OUTGOING_ARGS
2801 && GET_CODE (insn
) == INSN
2802 && dwarf2out_do_frame ())
2803 dwarf2out_frame_debug (insn
);
2808 /* It's not at all clear why we did this and doing so interferes
2809 with tests we'd like to do to use REG_WAS_0 notes, so let's try
2812 /* Mark this insn as having been output. */
2813 INSN_DELETED_P (insn
) = 1;
2816 /* Emit information for vtable gc. */
2817 note
= find_reg_note (insn
, REG_VTABLE_REF
, NULL_RTX
);
2819 assemble_vtable_entry (XEXP (XEXP (note
, 0), 0),
2820 INTVAL (XEXP (XEXP (note
, 0), 1)));
2822 current_output_insn
= debug_insn
= 0;
2825 return NEXT_INSN (insn
);
2828 /* Output debugging info to the assembler file FILE
2829 based on the NOTE-insn INSN, assumed to be a line number. */
2832 notice_source_line (insn
)
2835 const char *filename
= NOTE_SOURCE_FILE (insn
);
2837 last_filename
= filename
;
2838 last_linenum
= NOTE_LINE_NUMBER (insn
);
2839 high_block_linenum
= MAX (last_linenum
, high_block_linenum
);
2840 high_function_linenum
= MAX (last_linenum
, high_function_linenum
);
2843 /* For each operand in INSN, simplify (subreg (reg)) so that it refers
2844 directly to the desired hard register. */
2847 cleanup_subreg_operands (insn
)
2851 extract_insn_cached (insn
);
2852 for (i
= 0; i
< recog_data
.n_operands
; i
++)
2854 /* The following test cannot use recog_data.operand when tesing
2855 for a SUBREG: the underlying object might have been changed
2856 already if we are inside a match_operator expression that
2857 matches the else clause. Instead we test the underlying
2858 expression directly. */
2859 if (GET_CODE (*recog_data
.operand_loc
[i
]) == SUBREG
)
2860 recog_data
.operand
[i
] = alter_subreg (recog_data
.operand_loc
[i
]);
2861 else if (GET_CODE (recog_data
.operand
[i
]) == PLUS
2862 || GET_CODE (recog_data
.operand
[i
]) == MULT
2863 || GET_CODE (recog_data
.operand
[i
]) == MEM
)
2864 recog_data
.operand
[i
] = walk_alter_subreg (recog_data
.operand_loc
[i
]);
2867 for (i
= 0; i
< recog_data
.n_dups
; i
++)
2869 if (GET_CODE (*recog_data
.dup_loc
[i
]) == SUBREG
)
2870 *recog_data
.dup_loc
[i
] = alter_subreg (recog_data
.dup_loc
[i
]);
2871 else if (GET_CODE (*recog_data
.dup_loc
[i
]) == PLUS
2872 || GET_CODE (*recog_data
.dup_loc
[i
]) == MULT
2873 || GET_CODE (*recog_data
.dup_loc
[i
]) == MEM
)
2874 *recog_data
.dup_loc
[i
] = walk_alter_subreg (recog_data
.dup_loc
[i
]);
2878 /* If X is a SUBREG, replace it with a REG or a MEM,
2879 based on the thing it is a subreg of. */
2886 rtx y
= SUBREG_REG (x
);
2888 /* simplify_subreg does not remove subreg from volatile references.
2889 We are required to. */
2890 if (GET_CODE (y
) == MEM
)
2891 *xp
= adjust_address (y
, GET_MODE (x
), SUBREG_BYTE (x
));
2894 rtx
new = simplify_subreg (GET_MODE (x
), y
, GET_MODE (y
),
2899 /* Simplify_subreg can't handle some REG cases, but we have to. */
2900 else if (GET_CODE (y
) == REG
)
2902 unsigned int regno
= subreg_hard_regno (x
, 1);
2905 ORIGINAL_REGNO (x
) = ORIGINAL_REGNO (y
);
2906 /* This field has a different meaning for REGs and SUBREGs. Make
2907 sure to clear it! */
2908 RTX_FLAG (x
, used
) = 0;
2917 /* Do alter_subreg on all the SUBREGs contained in X. */
2920 walk_alter_subreg (xp
)
2924 switch (GET_CODE (x
))
2928 XEXP (x
, 0) = walk_alter_subreg (&XEXP (x
, 0));
2929 XEXP (x
, 1) = walk_alter_subreg (&XEXP (x
, 1));
2933 XEXP (x
, 0) = walk_alter_subreg (&XEXP (x
, 0));
2937 return alter_subreg (xp
);
2948 /* Given BODY, the body of a jump instruction, alter the jump condition
2949 as required by the bits that are set in cc_status.flags.
2950 Not all of the bits there can be handled at this level in all cases.
2952 The value is normally 0.
2953 1 means that the condition has become always true.
2954 -1 means that the condition has become always false.
2955 2 means that COND has been altered. */
2963 if (cc_status
.flags
& CC_REVERSED
)
2966 PUT_CODE (cond
, swap_condition (GET_CODE (cond
)));
2969 if (cc_status
.flags
& CC_INVERTED
)
2972 PUT_CODE (cond
, reverse_condition (GET_CODE (cond
)));
2975 if (cc_status
.flags
& CC_NOT_POSITIVE
)
2976 switch (GET_CODE (cond
))
2981 /* Jump becomes unconditional. */
2987 /* Jump becomes no-op. */
2991 PUT_CODE (cond
, EQ
);
2996 PUT_CODE (cond
, NE
);
3004 if (cc_status
.flags
& CC_NOT_NEGATIVE
)
3005 switch (GET_CODE (cond
))
3009 /* Jump becomes unconditional. */
3014 /* Jump becomes no-op. */
3019 PUT_CODE (cond
, EQ
);
3025 PUT_CODE (cond
, NE
);
3033 if (cc_status
.flags
& CC_NO_OVERFLOW
)
3034 switch (GET_CODE (cond
))
3037 /* Jump becomes unconditional. */
3041 PUT_CODE (cond
, EQ
);
3046 PUT_CODE (cond
, NE
);
3051 /* Jump becomes no-op. */
3058 if (cc_status
.flags
& (CC_Z_IN_NOT_N
| CC_Z_IN_N
))
3059 switch (GET_CODE (cond
))
3065 PUT_CODE (cond
, cc_status
.flags
& CC_Z_IN_N
? GE
: LT
);
3070 PUT_CODE (cond
, cc_status
.flags
& CC_Z_IN_N
? LT
: GE
);
3075 if (cc_status
.flags
& CC_NOT_SIGNED
)
3076 /* The flags are valid if signed condition operators are converted
3078 switch (GET_CODE (cond
))
3081 PUT_CODE (cond
, LEU
);
3086 PUT_CODE (cond
, LTU
);
3091 PUT_CODE (cond
, GTU
);
3096 PUT_CODE (cond
, GEU
);
3108 /* Report inconsistency between the assembler template and the operands.
3109 In an `asm', it's the user's fault; otherwise, the compiler's fault. */
3112 output_operand_lossage
VPARAMS ((const char *msgid
, ...))
3116 const char *pfx_str
;
3117 VA_OPEN (ap
, msgid
);
3118 VA_FIXEDARG (ap
, const char *, msgid
);
3120 pfx_str
= this_is_asm_operands
? _("invalid `asm': ") : "output_operand: ";
3121 asprintf (&fmt_string
, "%s%s", pfx_str
, _(msgid
));
3122 vasprintf (&new_message
, fmt_string
, ap
);
3124 if (this_is_asm_operands
)
3125 error_for_asm (this_is_asm_operands
, "%s", new_message
);
3127 internal_error ("%s", new_message
);
3134 /* Output of assembler code from a template, and its subroutines. */
3136 /* Annotate the assembly with a comment describing the pattern and
3137 alternative used. */
3144 int num
= INSN_CODE (debug_insn
);
3145 fprintf (asm_out_file
, "\t%s %d\t%s",
3146 ASM_COMMENT_START
, INSN_UID (debug_insn
),
3147 insn_data
[num
].name
);
3148 if (insn_data
[num
].n_alternatives
> 1)
3149 fprintf (asm_out_file
, "/%d", which_alternative
+ 1);
3150 #ifdef HAVE_ATTR_length
3151 fprintf (asm_out_file
, "\t[length = %d]",
3152 get_attr_length (debug_insn
));
3154 /* Clear this so only the first assembler insn
3155 of any rtl insn will get the special comment for -dp. */
3160 /* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it
3161 or its address, return that expr . Set *PADDRESSP to 1 if the expr
3162 corresponds to the address of the object and 0 if to the object. */
3165 get_mem_expr_from_op (op
, paddressp
)
3174 if (GET_CODE (op
) == REG
&& ORIGINAL_REGNO (op
) >= FIRST_PSEUDO_REGISTER
)
3175 return REGNO_DECL (ORIGINAL_REGNO (op
));
3176 else if (GET_CODE (op
) != MEM
)
3179 if (MEM_EXPR (op
) != 0)
3180 return MEM_EXPR (op
);
3182 /* Otherwise we have an address, so indicate it and look at the address. */
3186 /* First check if we have a decl for the address, then look at the right side
3187 if it is a PLUS. Otherwise, strip off arithmetic and keep looking.
3188 But don't allow the address to itself be indirect. */
3189 if ((expr
= get_mem_expr_from_op (op
, &inner_addressp
)) && ! inner_addressp
)
3191 else if (GET_CODE (op
) == PLUS
3192 && (expr
= get_mem_expr_from_op (XEXP (op
, 1), &inner_addressp
)))
3195 while (GET_RTX_CLASS (GET_CODE (op
)) == '1'
3196 || GET_RTX_CLASS (GET_CODE (op
)) == '2')
3199 expr
= get_mem_expr_from_op (op
, &inner_addressp
);
3200 return inner_addressp
? 0 : expr
;
3203 /* Output operand names for assembler instructions. OPERANDS is the
3204 operand vector, OPORDER is the order to write the operands, and NOPS
3205 is the number of operands to write. */
3208 output_asm_operand_names (operands
, oporder
, nops
)
3216 for (i
= 0; i
< nops
; i
++)
3219 tree expr
= get_mem_expr_from_op (operands
[oporder
[i
]], &addressp
);
3223 fprintf (asm_out_file
, "%c%s %s",
3224 wrote
? ',' : '\t', wrote
? "" : ASM_COMMENT_START
,
3225 addressp
? "*" : "");
3226 print_mem_expr (asm_out_file
, expr
);
3232 /* Output text from TEMPLATE to the assembler output file,
3233 obeying %-directions to substitute operands taken from
3234 the vector OPERANDS.
3236 %N (for N a digit) means print operand N in usual manner.
3237 %lN means require operand N to be a CODE_LABEL or LABEL_REF
3238 and print the label name with no punctuation.
3239 %cN means require operand N to be a constant
3240 and print the constant expression with no punctuation.
3241 %aN means expect operand N to be a memory address
3242 (not a memory reference!) and print a reference
3244 %nN means expect operand N to be a constant
3245 and print a constant expression for minus the value
3246 of the operand, with no other punctuation. */
3249 output_asm_insn (template, operands
)
3250 const char *template;
3255 #ifdef ASSEMBLER_DIALECT
3258 int oporder
[MAX_RECOG_OPERANDS
];
3259 char opoutput
[MAX_RECOG_OPERANDS
];
3262 /* An insn may return a null string template
3263 in a case where no assembler code is needed. */
3267 memset (opoutput
, 0, sizeof opoutput
);
3269 putc ('\t', asm_out_file
);
3271 #ifdef ASM_OUTPUT_OPCODE
3272 ASM_OUTPUT_OPCODE (asm_out_file
, p
);
3279 if (flag_verbose_asm
)
3280 output_asm_operand_names (operands
, oporder
, ops
);
3281 if (flag_print_asm_name
)
3285 memset (opoutput
, 0, sizeof opoutput
);
3287 putc (c
, asm_out_file
);
3288 #ifdef ASM_OUTPUT_OPCODE
3289 while ((c
= *p
) == '\t')
3291 putc (c
, asm_out_file
);
3294 ASM_OUTPUT_OPCODE (asm_out_file
, p
);
3298 #ifdef ASSEMBLER_DIALECT
3304 output_operand_lossage ("nested assembly dialect alternatives");
3308 /* If we want the first dialect, do nothing. Otherwise, skip
3309 DIALECT_NUMBER of strings ending with '|'. */
3310 for (i
= 0; i
< dialect_number
; i
++)
3312 while (*p
&& *p
!= '}' && *p
++ != '|')
3321 output_operand_lossage ("unterminated assembly dialect alternative");
3328 /* Skip to close brace. */
3333 output_operand_lossage ("unterminated assembly dialect alternative");
3337 while (*p
++ != '}');
3341 putc (c
, asm_out_file
);
3346 putc (c
, asm_out_file
);
3352 /* %% outputs a single %. */
3356 putc (c
, asm_out_file
);
3358 /* %= outputs a number which is unique to each insn in the entire
3359 compilation. This is useful for making local labels that are
3360 referred to more than once in a given insn. */
3364 fprintf (asm_out_file
, "%d", insn_counter
);
3366 /* % followed by a letter and some digits
3367 outputs an operand in a special way depending on the letter.
3368 Letters `acln' are implemented directly.
3369 Other letters are passed to `output_operand' so that
3370 the PRINT_OPERAND macro can define them. */
3371 else if (ISALPHA (*p
))
3377 output_operand_lossage ("operand number missing after %%-letter");
3378 else if (this_is_asm_operands
3379 && (c
< 0 || (unsigned int) c
>= insn_noperands
))
3380 output_operand_lossage ("operand number out of range");
3381 else if (letter
== 'l')
3382 output_asm_label (operands
[c
]);
3383 else if (letter
== 'a')
3384 output_address (operands
[c
]);
3385 else if (letter
== 'c')
3387 if (CONSTANT_ADDRESS_P (operands
[c
]))
3388 output_addr_const (asm_out_file
, operands
[c
]);
3390 output_operand (operands
[c
], 'c');
3392 else if (letter
== 'n')
3394 if (GET_CODE (operands
[c
]) == CONST_INT
)
3395 fprintf (asm_out_file
, HOST_WIDE_INT_PRINT_DEC
,
3396 - INTVAL (operands
[c
]));
3399 putc ('-', asm_out_file
);
3400 output_addr_const (asm_out_file
, operands
[c
]);
3404 output_operand (operands
[c
], letter
);
3410 while (ISDIGIT (c
= *p
))
3413 /* % followed by a digit outputs an operand the default way. */
3414 else if (ISDIGIT (*p
))
3417 if (this_is_asm_operands
3418 && (c
< 0 || (unsigned int) c
>= insn_noperands
))
3419 output_operand_lossage ("operand number out of range");
3421 output_operand (operands
[c
], 0);
3427 while (ISDIGIT (c
= *p
))
3430 /* % followed by punctuation: output something for that
3431 punctuation character alone, with no operand.
3432 The PRINT_OPERAND macro decides what is actually done. */
3433 #ifdef PRINT_OPERAND_PUNCT_VALID_P
3434 else if (PRINT_OPERAND_PUNCT_VALID_P ((unsigned char) *p
))
3435 output_operand (NULL_RTX
, *p
++);
3438 output_operand_lossage ("invalid %%-code");
3442 putc (c
, asm_out_file
);
3445 /* Write out the variable names for operands, if we know them. */
3446 if (flag_verbose_asm
)
3447 output_asm_operand_names (operands
, oporder
, ops
);
3448 if (flag_print_asm_name
)
3451 putc ('\n', asm_out_file
);
3454 /* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */
3457 output_asm_label (x
)
3462 if (GET_CODE (x
) == LABEL_REF
)
3464 if (GET_CODE (x
) == CODE_LABEL
3465 || (GET_CODE (x
) == NOTE
3466 && NOTE_LINE_NUMBER (x
) == NOTE_INSN_DELETED_LABEL
))
3467 ASM_GENERATE_INTERNAL_LABEL (buf
, "L", CODE_LABEL_NUMBER (x
));
3469 output_operand_lossage ("`%%l' operand isn't a label");
3471 assemble_name (asm_out_file
, buf
);
3474 /* Print operand X using machine-dependent assembler syntax.
3475 The macro PRINT_OPERAND is defined just to control this function.
3476 CODE is a non-digit that preceded the operand-number in the % spec,
3477 such as 'z' if the spec was `%z3'. CODE is 0 if there was no char
3478 between the % and the digits.
3479 When CODE is a non-letter, X is 0.
3481 The meanings of the letters are machine-dependent and controlled
3482 by PRINT_OPERAND. */
3485 output_operand (x
, code
)
3487 int code ATTRIBUTE_UNUSED
;
3489 if (x
&& GET_CODE (x
) == SUBREG
)
3490 x
= alter_subreg (&x
);
3492 /* If X is a pseudo-register, abort now rather than writing trash to the
3495 if (x
&& GET_CODE (x
) == REG
&& REGNO (x
) >= FIRST_PSEUDO_REGISTER
)
3498 PRINT_OPERAND (asm_out_file
, x
, code
);
3501 /* Print a memory reference operand for address X
3502 using machine-dependent assembler syntax.
3503 The macro PRINT_OPERAND_ADDRESS exists just to control this function. */
3509 walk_alter_subreg (&x
);
3510 PRINT_OPERAND_ADDRESS (asm_out_file
, x
);
3513 /* Print an integer constant expression in assembler syntax.
3514 Addition and subtraction are the only arithmetic
3515 that may appear in these expressions. */
3518 output_addr_const (file
, x
)
3525 switch (GET_CODE (x
))
3532 #ifdef ASM_OUTPUT_SYMBOL_REF
3533 ASM_OUTPUT_SYMBOL_REF (file
, x
);
3535 assemble_name (file
, XSTR (x
, 0));
3543 ASM_GENERATE_INTERNAL_LABEL (buf
, "L", CODE_LABEL_NUMBER (x
));
3544 #ifdef ASM_OUTPUT_LABEL_REF
3545 ASM_OUTPUT_LABEL_REF (file
, buf
);
3547 assemble_name (file
, buf
);
3552 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, INTVAL (x
));
3556 /* This used to output parentheses around the expression,
3557 but that does not work on the 386 (either ATT or BSD assembler). */
3558 output_addr_const (file
, XEXP (x
, 0));
3562 if (GET_MODE (x
) == VOIDmode
)
3564 /* We can use %d if the number is one word and positive. */
3565 if (CONST_DOUBLE_HIGH (x
))
3566 fprintf (file
, HOST_WIDE_INT_PRINT_DOUBLE_HEX
,
3567 CONST_DOUBLE_HIGH (x
), CONST_DOUBLE_LOW (x
));
3568 else if (CONST_DOUBLE_LOW (x
) < 0)
3569 fprintf (file
, HOST_WIDE_INT_PRINT_HEX
, CONST_DOUBLE_LOW (x
));
3571 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, CONST_DOUBLE_LOW (x
));
3574 /* We can't handle floating point constants;
3575 PRINT_OPERAND must handle them. */
3576 output_operand_lossage ("floating constant misused");
3580 /* Some assemblers need integer constants to appear last (eg masm). */
3581 if (GET_CODE (XEXP (x
, 0)) == CONST_INT
)
3583 output_addr_const (file
, XEXP (x
, 1));
3584 if (INTVAL (XEXP (x
, 0)) >= 0)
3585 fprintf (file
, "+");
3586 output_addr_const (file
, XEXP (x
, 0));
3590 output_addr_const (file
, XEXP (x
, 0));
3591 if (GET_CODE (XEXP (x
, 1)) != CONST_INT
3592 || INTVAL (XEXP (x
, 1)) >= 0)
3593 fprintf (file
, "+");
3594 output_addr_const (file
, XEXP (x
, 1));
3599 /* Avoid outputting things like x-x or x+5-x,
3600 since some assemblers can't handle that. */
3601 x
= simplify_subtraction (x
);
3602 if (GET_CODE (x
) != MINUS
)
3605 output_addr_const (file
, XEXP (x
, 0));
3606 fprintf (file
, "-");
3607 if ((GET_CODE (XEXP (x
, 1)) == CONST_INT
&& INTVAL (XEXP (x
, 1)) >= 0)
3608 || GET_CODE (XEXP (x
, 1)) == PC
3609 || GET_CODE (XEXP (x
, 1)) == SYMBOL_REF
)
3610 output_addr_const (file
, XEXP (x
, 1));
3613 fputs (targetm
.asm_out
.open_paren
, file
);
3614 output_addr_const (file
, XEXP (x
, 1));
3615 fputs (targetm
.asm_out
.close_paren
, file
);
3622 output_addr_const (file
, XEXP (x
, 0));
3626 #ifdef OUTPUT_ADDR_CONST_EXTRA
3627 OUTPUT_ADDR_CONST_EXTRA (file
, x
, fail
);
3632 output_operand_lossage ("invalid expression as operand");
3636 /* A poor man's fprintf, with the added features of %I, %R, %L, and %U.
3637 %R prints the value of REGISTER_PREFIX.
3638 %L prints the value of LOCAL_LABEL_PREFIX.
3639 %U prints the value of USER_LABEL_PREFIX.
3640 %I prints the value of IMMEDIATE_PREFIX.
3641 %O runs ASM_OUTPUT_OPCODE to transform what follows in the string.
3642 Also supported are %d, %x, %s, %e, %f, %g and %%.
3644 We handle alternate assembler dialects here, just like output_asm_insn. */
3647 asm_fprintf
VPARAMS ((FILE *file
, const char *p
, ...))
3652 VA_OPEN (argptr
, p
);
3653 VA_FIXEDARG (argptr
, FILE *, file
);
3654 VA_FIXEDARG (argptr
, const char *, p
);
3661 #ifdef ASSEMBLER_DIALECT
3666 /* If we want the first dialect, do nothing. Otherwise, skip
3667 DIALECT_NUMBER of strings ending with '|'. */
3668 for (i
= 0; i
< dialect_number
; i
++)
3670 while (*p
&& *p
++ != '|')
3680 /* Skip to close brace. */
3681 while (*p
&& *p
++ != '}')
3692 while (ISDIGIT (c
) || c
== '.')
3700 fprintf (file
, "%%");
3703 case 'd': case 'i': case 'u':
3704 case 'x': case 'p': case 'X':
3708 fprintf (file
, buf
, va_arg (argptr
, int));
3712 /* This is a prefix to the 'd', 'i', 'u', 'x', 'p', and 'X' cases,
3713 but we do not check for those cases. It means that the value
3714 is a HOST_WIDE_INT, which may be either `int' or `long'. */
3716 #if HOST_BITS_PER_WIDE_INT == HOST_BITS_PER_INT
3718 #if HOST_BITS_PER_WIDE_INT == HOST_BITS_PER_LONG
3728 fprintf (file
, buf
, va_arg (argptr
, HOST_WIDE_INT
));
3735 fprintf (file
, buf
, va_arg (argptr
, long));
3743 fprintf (file
, buf
, va_arg (argptr
, double));
3749 fprintf (file
, buf
, va_arg (argptr
, char *));
3753 #ifdef ASM_OUTPUT_OPCODE
3754 ASM_OUTPUT_OPCODE (asm_out_file
, p
);
3759 #ifdef REGISTER_PREFIX
3760 fprintf (file
, "%s", REGISTER_PREFIX
);
3765 #ifdef IMMEDIATE_PREFIX
3766 fprintf (file
, "%s", IMMEDIATE_PREFIX
);
3771 #ifdef LOCAL_LABEL_PREFIX
3772 fprintf (file
, "%s", LOCAL_LABEL_PREFIX
);
3777 fputs (user_label_prefix
, file
);
3780 #ifdef ASM_FPRINTF_EXTENSIONS
3781 /* Upper case letters are reserved for general use by asm_fprintf
3782 and so are not available to target specific code. In order to
3783 prevent the ASM_FPRINTF_EXTENSIONS macro from using them then,
3784 they are defined here. As they get turned into real extensions
3785 to asm_fprintf they should be removed from this list. */
3786 case 'A': case 'B': case 'C': case 'D': case 'E':
3787 case 'F': case 'G': case 'H': case 'J': case 'K':
3788 case 'M': case 'N': case 'P': case 'Q': case 'S':
3789 case 'T': case 'V': case 'W': case 'Y': case 'Z':
3792 ASM_FPRINTF_EXTENSIONS (file
, argptr
, p
)
3805 /* Split up a CONST_DOUBLE or integer constant rtx
3806 into two rtx's for single words,
3807 storing in *FIRST the word that comes first in memory in the target
3808 and in *SECOND the other. */
3811 split_double (value
, first
, second
)
3813 rtx
*first
, *second
;
3815 if (GET_CODE (value
) == CONST_INT
)
3817 if (HOST_BITS_PER_WIDE_INT
>= (2 * BITS_PER_WORD
))
3819 /* In this case the CONST_INT holds both target words.
3820 Extract the bits from it into two word-sized pieces.
3821 Sign extend each half to HOST_WIDE_INT. */
3822 unsigned HOST_WIDE_INT low
, high
;
3823 unsigned HOST_WIDE_INT mask
, sign_bit
, sign_extend
;
3825 /* Set sign_bit to the most significant bit of a word. */
3827 sign_bit
<<= BITS_PER_WORD
- 1;
3829 /* Set mask so that all bits of the word are set. We could
3830 have used 1 << BITS_PER_WORD instead of basing the
3831 calculation on sign_bit. However, on machines where
3832 HOST_BITS_PER_WIDE_INT == BITS_PER_WORD, it could cause a
3833 compiler warning, even though the code would never be
3835 mask
= sign_bit
<< 1;
3838 /* Set sign_extend as any remaining bits. */
3839 sign_extend
= ~mask
;
3841 /* Pick the lower word and sign-extend it. */
3842 low
= INTVAL (value
);
3847 /* Pick the higher word, shifted to the least significant
3848 bits, and sign-extend it. */
3849 high
= INTVAL (value
);
3850 high
>>= BITS_PER_WORD
- 1;
3853 if (high
& sign_bit
)
3854 high
|= sign_extend
;
3856 /* Store the words in the target machine order. */
3857 if (WORDS_BIG_ENDIAN
)
3859 *first
= GEN_INT (high
);
3860 *second
= GEN_INT (low
);
3864 *first
= GEN_INT (low
);
3865 *second
= GEN_INT (high
);
3870 /* The rule for using CONST_INT for a wider mode
3871 is that we regard the value as signed.
3872 So sign-extend it. */
3873 rtx high
= (INTVAL (value
) < 0 ? constm1_rtx
: const0_rtx
);
3874 if (WORDS_BIG_ENDIAN
)
3886 else if (GET_CODE (value
) != CONST_DOUBLE
)
3888 if (WORDS_BIG_ENDIAN
)
3890 *first
= const0_rtx
;
3896 *second
= const0_rtx
;
3899 else if (GET_MODE (value
) == VOIDmode
3900 /* This is the old way we did CONST_DOUBLE integers. */
3901 || GET_MODE_CLASS (GET_MODE (value
)) == MODE_INT
)
3903 /* In an integer, the words are defined as most and least significant.
3904 So order them by the target's convention. */
3905 if (WORDS_BIG_ENDIAN
)
3907 *first
= GEN_INT (CONST_DOUBLE_HIGH (value
));
3908 *second
= GEN_INT (CONST_DOUBLE_LOW (value
));
3912 *first
= GEN_INT (CONST_DOUBLE_LOW (value
));
3913 *second
= GEN_INT (CONST_DOUBLE_HIGH (value
));
3920 REAL_VALUE_FROM_CONST_DOUBLE (r
, value
);
3922 /* Note, this converts the REAL_VALUE_TYPE to the target's
3923 format, splits up the floating point double and outputs
3924 exactly 32 bits of it into each of l[0] and l[1] --
3925 not necessarily BITS_PER_WORD bits. */
3926 REAL_VALUE_TO_TARGET_DOUBLE (r
, l
);
3928 /* If 32 bits is an entire word for the target, but not for the host,
3929 then sign-extend on the host so that the number will look the same
3930 way on the host that it would on the target. See for instance
3931 simplify_unary_operation. The #if is needed to avoid compiler
3934 #if HOST_BITS_PER_LONG > 32
3935 if (BITS_PER_WORD
< HOST_BITS_PER_LONG
&& BITS_PER_WORD
== 32)
3937 if (l
[0] & ((long) 1 << 31))
3938 l
[0] |= ((long) (-1) << 32);
3939 if (l
[1] & ((long) 1 << 31))
3940 l
[1] |= ((long) (-1) << 32);
3944 *first
= GEN_INT ((HOST_WIDE_INT
) l
[0]);
3945 *second
= GEN_INT ((HOST_WIDE_INT
) l
[1]);
3949 /* Return nonzero if this function has no function calls. */
3957 if (current_function_profile
|| profile_arc_flag
)
3960 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
3962 if (GET_CODE (insn
) == CALL_INSN
3963 && ! SIBLING_CALL_P (insn
))
3965 if (GET_CODE (insn
) == INSN
3966 && GET_CODE (PATTERN (insn
)) == SEQUENCE
3967 && GET_CODE (XVECEXP (PATTERN (insn
), 0, 0)) == CALL_INSN
3968 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn
), 0, 0)))
3971 for (link
= current_function_epilogue_delay_list
;
3973 link
= XEXP (link
, 1))
3975 insn
= XEXP (link
, 0);
3977 if (GET_CODE (insn
) == CALL_INSN
3978 && ! SIBLING_CALL_P (insn
))
3980 if (GET_CODE (insn
) == INSN
3981 && GET_CODE (PATTERN (insn
)) == SEQUENCE
3982 && GET_CODE (XVECEXP (PATTERN (insn
), 0, 0)) == CALL_INSN
3983 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn
), 0, 0)))
3990 /* Return 1 if branch is an forward branch.
3991 Uses insn_shuid array, so it works only in the final pass. May be used by
3992 output templates to customary add branch prediction hints.
3995 final_forward_branch_p (insn
)
3998 int insn_id
, label_id
;
4001 insn_id
= INSN_SHUID (insn
);
4002 label_id
= INSN_SHUID (JUMP_LABEL (insn
));
4003 /* We've hit some insns that does not have id information available. */
4004 if (!insn_id
|| !label_id
)
4006 return insn_id
< label_id
;
4009 /* On some machines, a function with no call insns
4010 can run faster if it doesn't create its own register window.
4011 When output, the leaf function should use only the "output"
4012 registers. Ordinarily, the function would be compiled to use
4013 the "input" registers to find its arguments; it is a candidate
4014 for leaf treatment if it uses only the "input" registers.
4015 Leaf function treatment means renumbering so the function
4016 uses the "output" registers instead. */
4018 #ifdef LEAF_REGISTERS
4020 /* Return 1 if this function uses only the registers that can be
4021 safely renumbered. */
4024 only_leaf_regs_used ()
4027 char *permitted_reg_in_leaf_functions
= LEAF_REGISTERS
;
4029 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
4030 if ((regs_ever_live
[i
] || global_regs
[i
])
4031 && ! permitted_reg_in_leaf_functions
[i
])
4034 if (current_function_uses_pic_offset_table
4035 && pic_offset_table_rtx
!= 0
4036 && GET_CODE (pic_offset_table_rtx
) == REG
4037 && ! permitted_reg_in_leaf_functions
[REGNO (pic_offset_table_rtx
)])
4043 /* Scan all instructions and renumber all registers into those
4044 available in leaf functions. */
4047 leaf_renumber_regs (first
)
4052 /* Renumber only the actual patterns.
4053 The reg-notes can contain frame pointer refs,
4054 and renumbering them could crash, and should not be needed. */
4055 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
4057 leaf_renumber_regs_insn (PATTERN (insn
));
4058 for (insn
= current_function_epilogue_delay_list
;
4060 insn
= XEXP (insn
, 1))
4061 if (INSN_P (XEXP (insn
, 0)))
4062 leaf_renumber_regs_insn (PATTERN (XEXP (insn
, 0)));
4065 /* Scan IN_RTX and its subexpressions, and renumber all regs into those
4066 available in leaf functions. */
4069 leaf_renumber_regs_insn (in_rtx
)
4073 const char *format_ptr
;
4078 /* Renumber all input-registers into output-registers.
4079 renumbered_regs would be 1 for an output-register;
4082 if (GET_CODE (in_rtx
) == REG
)
4086 /* Don't renumber the same reg twice. */
4090 newreg
= REGNO (in_rtx
);
4091 /* Don't try to renumber pseudo regs. It is possible for a pseudo reg
4092 to reach here as part of a REG_NOTE. */
4093 if (newreg
>= FIRST_PSEUDO_REGISTER
)
4098 newreg
= LEAF_REG_REMAP (newreg
);
4101 regs_ever_live
[REGNO (in_rtx
)] = 0;
4102 regs_ever_live
[newreg
] = 1;
4103 REGNO (in_rtx
) = newreg
;
4107 if (INSN_P (in_rtx
))
4109 /* Inside a SEQUENCE, we find insns.
4110 Renumber just the patterns of these insns,
4111 just as we do for the top-level insns. */
4112 leaf_renumber_regs_insn (PATTERN (in_rtx
));
4116 format_ptr
= GET_RTX_FORMAT (GET_CODE (in_rtx
));
4118 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (in_rtx
)); i
++)
4119 switch (*format_ptr
++)
4122 leaf_renumber_regs_insn (XEXP (in_rtx
, i
));
4126 if (NULL
!= XVEC (in_rtx
, i
))
4128 for (j
= 0; j
< XVECLEN (in_rtx
, i
); j
++)
4129 leaf_renumber_regs_insn (XVECEXP (in_rtx
, i
, j
));