basic-block.h (BLOCK_HEAD, BLOCK_END): Remove.
[gcc.git] / gcc / flow.c
1 /* Data flow analysis for GNU compiler.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
4
5 This file is part of GCC.
6
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
10 version.
11
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
20 02111-1307, USA. */
21
22 /* This file contains the data flow analysis pass of the compiler. It
23 computes data flow information which tells combine_instructions
24 which insns to consider combining and controls register allocation.
25
26 Additional data flow information that is too bulky to record is
27 generated during the analysis, and is used at that time to create
28 autoincrement and autodecrement addressing.
29
30 The first step is dividing the function into basic blocks.
31 find_basic_blocks does this. Then life_analysis determines
32 where each register is live and where it is dead.
33
34 ** find_basic_blocks **
35
36 find_basic_blocks divides the current function's rtl into basic
37 blocks and constructs the CFG. The blocks are recorded in the
38 basic_block_info array; the CFG exists in the edge structures
39 referenced by the blocks.
40
41 find_basic_blocks also finds any unreachable loops and deletes them.
42
43 ** life_analysis **
44
45 life_analysis is called immediately after find_basic_blocks.
46 It uses the basic block information to determine where each
47 hard or pseudo register is live.
48
49 ** live-register info **
50
51 The information about where each register is live is in two parts:
52 the REG_NOTES of insns, and the vector basic_block->global_live_at_start.
53
54 basic_block->global_live_at_start has an element for each basic
55 block, and the element is a bit-vector with a bit for each hard or
56 pseudo register. The bit is 1 if the register is live at the
57 beginning of the basic block.
58
59 Two types of elements can be added to an insn's REG_NOTES.
60 A REG_DEAD note is added to an insn's REG_NOTES for any register
61 that meets both of two conditions: The value in the register is not
62 needed in subsequent insns and the insn does not replace the value in
63 the register (in the case of multi-word hard registers, the value in
64 each register must be replaced by the insn to avoid a REG_DEAD note).
65
66 In the vast majority of cases, an object in a REG_DEAD note will be
67 used somewhere in the insn. The (rare) exception to this is if an
68 insn uses a multi-word hard register and only some of the registers are
69 needed in subsequent insns. In that case, REG_DEAD notes will be
70 provided for those hard registers that are not subsequently needed.
71 Partial REG_DEAD notes of this type do not occur when an insn sets
72 only some of the hard registers used in such a multi-word operand;
73 omitting REG_DEAD notes for objects stored in an insn is optional and
74 the desire to do so does not justify the complexity of the partial
75 REG_DEAD notes.
76
77 REG_UNUSED notes are added for each register that is set by the insn
78 but is unused subsequently (if every register set by the insn is unused
79 and the insn does not reference memory or have some other side-effect,
80 the insn is deleted instead). If only part of a multi-word hard
81 register is used in a subsequent insn, REG_UNUSED notes are made for
82 the parts that will not be used.
83
84 To determine which registers are live after any insn, one can
85 start from the beginning of the basic block and scan insns, noting
86 which registers are set by each insn and which die there.
87
88 ** Other actions of life_analysis **
89
90 life_analysis sets up the LOG_LINKS fields of insns because the
91 information needed to do so is readily available.
92
93 life_analysis deletes insns whose only effect is to store a value
94 that is never used.
95
96 life_analysis notices cases where a reference to a register as
97 a memory address can be combined with a preceding or following
98 incrementation or decrementation of the register. The separate
99 instruction to increment or decrement is deleted and the address
100 is changed to a POST_INC or similar rtx.
101
102 Each time an incrementing or decrementing address is created,
103 a REG_INC element is added to the insn's REG_NOTES list.
104
105 life_analysis fills in certain vectors containing information about
106 register usage: REG_N_REFS, REG_N_DEATHS, REG_N_SETS, REG_LIVE_LENGTH,
107 REG_N_CALLS_CROSSED and REG_BASIC_BLOCK.
108
109 life_analysis sets current_function_sp_is_unchanging if the function
110 doesn't modify the stack pointer. */
111
112 /* TODO:
113
114 Split out from life_analysis:
115 - local property discovery (bb->local_live, bb->local_set)
116 - global property computation
117 - log links creation
118 - pre/post modify transformation
119 */
120 \f
121 #include "config.h"
122 #include "system.h"
123 #include "coretypes.h"
124 #include "tm.h"
125 #include "tree.h"
126 #include "rtl.h"
127 #include "tm_p.h"
128 #include "hard-reg-set.h"
129 #include "basic-block.h"
130 #include "insn-config.h"
131 #include "regs.h"
132 #include "flags.h"
133 #include "output.h"
134 #include "function.h"
135 #include "except.h"
136 #include "toplev.h"
137 #include "recog.h"
138 #include "expr.h"
139 #include "timevar.h"
140
141 #include "obstack.h"
142 #include "splay-tree.h"
143
144 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
145 the stack pointer does not matter. The value is tested only in
146 functions that have frame pointers.
147 No definition is equivalent to always zero. */
148 #ifndef EXIT_IGNORE_STACK
149 #define EXIT_IGNORE_STACK 0
150 #endif
151
152 #ifndef HAVE_epilogue
153 #define HAVE_epilogue 0
154 #endif
155 #ifndef HAVE_prologue
156 #define HAVE_prologue 0
157 #endif
158 #ifndef HAVE_sibcall_epilogue
159 #define HAVE_sibcall_epilogue 0
160 #endif
161
162 #ifndef EPILOGUE_USES
163 #define EPILOGUE_USES(REGNO) 0
164 #endif
165 #ifndef EH_USES
166 #define EH_USES(REGNO) 0
167 #endif
168
169 #ifdef HAVE_conditional_execution
170 #ifndef REVERSE_CONDEXEC_PREDICATES_P
171 #define REVERSE_CONDEXEC_PREDICATES_P(x, y) ((x) == reverse_condition (y))
172 #endif
173 #endif
174
175 /* Nonzero if the second flow pass has completed. */
176 int flow2_completed;
177
178 /* Maximum register number used in this function, plus one. */
179
180 int max_regno;
181
182 /* Indexed by n, giving various register information */
183
184 varray_type reg_n_info;
185
186 /* Size of a regset for the current function,
187 in (1) bytes and (2) elements. */
188
189 int regset_bytes;
190 int regset_size;
191
192 /* Regset of regs live when calls to `setjmp'-like functions happen. */
193 /* ??? Does this exist only for the setjmp-clobbered warning message? */
194
195 regset regs_live_at_setjmp;
196
197 /* List made of EXPR_LIST rtx's which gives pairs of pseudo registers
198 that have to go in the same hard reg.
199 The first two regs in the list are a pair, and the next two
200 are another pair, etc. */
201 rtx regs_may_share;
202
203 /* Callback that determines if it's ok for a function to have no
204 noreturn attribute. */
205 int (*lang_missing_noreturn_ok_p) (tree);
206
207 /* Set of registers that may be eliminable. These are handled specially
208 in updating regs_ever_live. */
209
210 static HARD_REG_SET elim_reg_set;
211
212 /* Holds information for tracking conditional register life information. */
213 struct reg_cond_life_info
214 {
215 /* A boolean expression of conditions under which a register is dead. */
216 rtx condition;
217 /* Conditions under which a register is dead at the basic block end. */
218 rtx orig_condition;
219
220 /* A boolean expression of conditions under which a register has been
221 stored into. */
222 rtx stores;
223
224 /* ??? Could store mask of bytes that are dead, so that we could finally
225 track lifetimes of multi-word registers accessed via subregs. */
226 };
227
228 /* For use in communicating between propagate_block and its subroutines.
229 Holds all information needed to compute life and def-use information. */
230
231 struct propagate_block_info
232 {
233 /* The basic block we're considering. */
234 basic_block bb;
235
236 /* Bit N is set if register N is conditionally or unconditionally live. */
237 regset reg_live;
238
239 /* Bit N is set if register N is set this insn. */
240 regset new_set;
241
242 /* Element N is the next insn that uses (hard or pseudo) register N
243 within the current basic block; or zero, if there is no such insn. */
244 rtx *reg_next_use;
245
246 /* Contains a list of all the MEMs we are tracking for dead store
247 elimination. */
248 rtx mem_set_list;
249
250 /* If non-null, record the set of registers set unconditionally in the
251 basic block. */
252 regset local_set;
253
254 /* If non-null, record the set of registers set conditionally in the
255 basic block. */
256 regset cond_local_set;
257
258 #ifdef HAVE_conditional_execution
259 /* Indexed by register number, holds a reg_cond_life_info for each
260 register that is not unconditionally live or dead. */
261 splay_tree reg_cond_dead;
262
263 /* Bit N is set if register N is in an expression in reg_cond_dead. */
264 regset reg_cond_reg;
265 #endif
266
267 /* The length of mem_set_list. */
268 int mem_set_list_len;
269
270 /* Nonzero if the value of CC0 is live. */
271 int cc0_live;
272
273 /* Flags controlling the set of information propagate_block collects. */
274 int flags;
275 };
276
277 /* Number of dead insns removed. */
278 static int ndead;
279
280 /* Maximum length of pbi->mem_set_list before we start dropping
281 new elements on the floor. */
282 #define MAX_MEM_SET_LIST_LEN 100
283
284 /* Forward declarations */
285 static int verify_wide_reg_1 (rtx *, void *);
286 static void verify_wide_reg (int, basic_block);
287 static void verify_local_live_at_start (regset, basic_block);
288 static void notice_stack_pointer_modification_1 (rtx, rtx, void *);
289 static void notice_stack_pointer_modification (rtx);
290 static void mark_reg (rtx, void *);
291 static void mark_regs_live_at_end (regset);
292 static void calculate_global_regs_live (sbitmap, sbitmap, int);
293 static void propagate_block_delete_insn (rtx);
294 static rtx propagate_block_delete_libcall (rtx, rtx);
295 static int insn_dead_p (struct propagate_block_info *, rtx, int, rtx);
296 static int libcall_dead_p (struct propagate_block_info *, rtx, rtx);
297 static void mark_set_regs (struct propagate_block_info *, rtx, rtx);
298 static void mark_set_1 (struct propagate_block_info *, enum rtx_code, rtx,
299 rtx, rtx, int);
300 static int find_regno_partial (rtx *, void *);
301
302 #ifdef HAVE_conditional_execution
303 static int mark_regno_cond_dead (struct propagate_block_info *, int, rtx);
304 static void free_reg_cond_life_info (splay_tree_value);
305 static int flush_reg_cond_reg_1 (splay_tree_node, void *);
306 static void flush_reg_cond_reg (struct propagate_block_info *, int);
307 static rtx elim_reg_cond (rtx, unsigned int);
308 static rtx ior_reg_cond (rtx, rtx, int);
309 static rtx not_reg_cond (rtx);
310 static rtx and_reg_cond (rtx, rtx, int);
311 #endif
312 #ifdef AUTO_INC_DEC
313 static void attempt_auto_inc (struct propagate_block_info *, rtx, rtx, rtx,
314 rtx, rtx);
315 static void find_auto_inc (struct propagate_block_info *, rtx, rtx);
316 static int try_pre_increment_1 (struct propagate_block_info *, rtx);
317 static int try_pre_increment (rtx, rtx, HOST_WIDE_INT);
318 #endif
319 static void mark_used_reg (struct propagate_block_info *, rtx, rtx, rtx);
320 static void mark_used_regs (struct propagate_block_info *, rtx, rtx, rtx);
321 void debug_flow_info (void);
322 static void add_to_mem_set_list (struct propagate_block_info *, rtx);
323 static int invalidate_mems_from_autoinc (rtx *, void *);
324 static void invalidate_mems_from_set (struct propagate_block_info *, rtx);
325 static void clear_log_links (sbitmap);
326 static int count_or_remove_death_notes_bb (basic_block, int);
327 \f
328
329 void
330 check_function_return_warnings (void)
331 {
332 if (warn_missing_noreturn
333 && !TREE_THIS_VOLATILE (cfun->decl)
334 && EXIT_BLOCK_PTR->pred == NULL
335 && (lang_missing_noreturn_ok_p
336 && !lang_missing_noreturn_ok_p (cfun->decl)))
337 warning ("function might be possible candidate for attribute `noreturn'");
338
339 /* If we have a path to EXIT, then we do return. */
340 if (TREE_THIS_VOLATILE (cfun->decl)
341 && EXIT_BLOCK_PTR->pred != NULL)
342 warning ("`noreturn' function does return");
343
344 /* If the clobber_return_insn appears in some basic block, then we
345 do reach the end without returning a value. */
346 else if (warn_return_type
347 && cfun->x_clobber_return_insn != NULL
348 && EXIT_BLOCK_PTR->pred != NULL)
349 {
350 int max_uid = get_max_uid ();
351
352 /* If clobber_return_insn was excised by jump1, then renumber_insns
353 can make max_uid smaller than the number still recorded in our rtx.
354 That's fine, since this is a quick way of verifying that the insn
355 is no longer in the chain. */
356 if (INSN_UID (cfun->x_clobber_return_insn) < max_uid)
357 {
358 rtx insn;
359
360 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
361 if (insn == cfun->x_clobber_return_insn)
362 {
363 warning ("control reaches end of non-void function");
364 break;
365 }
366 }
367 }
368 }
369 \f
370 /* Return the INSN immediately following the NOTE_INSN_BASIC_BLOCK
371 note associated with the BLOCK. */
372
373 rtx
374 first_insn_after_basic_block_note (basic_block block)
375 {
376 rtx insn;
377
378 /* Get the first instruction in the block. */
379 insn = BB_HEAD (block);
380
381 if (insn == NULL_RTX)
382 return NULL_RTX;
383 if (GET_CODE (insn) == CODE_LABEL)
384 insn = NEXT_INSN (insn);
385 if (!NOTE_INSN_BASIC_BLOCK_P (insn))
386 abort ();
387
388 return NEXT_INSN (insn);
389 }
390 \f
391 /* Perform data flow analysis.
392 F is the first insn of the function; FLAGS is a set of PROP_* flags
393 to be used in accumulating flow info. */
394
395 void
396 life_analysis (rtx f, FILE *file, int flags)
397 {
398 #ifdef ELIMINABLE_REGS
399 int i;
400 static const struct {const int from, to; } eliminables[] = ELIMINABLE_REGS;
401 #endif
402
403 /* Record which registers will be eliminated. We use this in
404 mark_used_regs. */
405
406 CLEAR_HARD_REG_SET (elim_reg_set);
407
408 #ifdef ELIMINABLE_REGS
409 for (i = 0; i < (int) ARRAY_SIZE (eliminables); i++)
410 SET_HARD_REG_BIT (elim_reg_set, eliminables[i].from);
411 #else
412 SET_HARD_REG_BIT (elim_reg_set, FRAME_POINTER_REGNUM);
413 #endif
414
415
416 #ifdef CANNOT_CHANGE_MODE_CLASS
417 if (flags & PROP_REG_INFO)
418 bitmap_initialize (&subregs_of_mode, 1);
419 #endif
420
421 if (! optimize)
422 flags &= ~(PROP_LOG_LINKS | PROP_AUTOINC | PROP_ALLOW_CFG_CHANGES);
423
424 /* The post-reload life analysis have (on a global basis) the same
425 registers live as was computed by reload itself. elimination
426 Otherwise offsets and such may be incorrect.
427
428 Reload will make some registers as live even though they do not
429 appear in the rtl.
430
431 We don't want to create new auto-incs after reload, since they
432 are unlikely to be useful and can cause problems with shared
433 stack slots. */
434 if (reload_completed)
435 flags &= ~(PROP_REG_INFO | PROP_AUTOINC);
436
437 /* We want alias analysis information for local dead store elimination. */
438 if (optimize && (flags & PROP_SCAN_DEAD_STORES))
439 init_alias_analysis ();
440
441 /* Always remove no-op moves. Do this before other processing so
442 that we don't have to keep re-scanning them. */
443 delete_noop_moves (f);
444
445 /* Some targets can emit simpler epilogues if they know that sp was
446 not ever modified during the function. After reload, of course,
447 we've already emitted the epilogue so there's no sense searching. */
448 if (! reload_completed)
449 notice_stack_pointer_modification (f);
450
451 /* Allocate and zero out data structures that will record the
452 data from lifetime analysis. */
453 allocate_reg_life_data ();
454 allocate_bb_life_data ();
455
456 /* Find the set of registers live on function exit. */
457 mark_regs_live_at_end (EXIT_BLOCK_PTR->global_live_at_start);
458
459 /* "Update" life info from zero. It'd be nice to begin the
460 relaxation with just the exit and noreturn blocks, but that set
461 is not immediately handy. */
462
463 if (flags & PROP_REG_INFO)
464 {
465 memset (regs_ever_live, 0, sizeof (regs_ever_live));
466 memset (regs_asm_clobbered, 0, sizeof (regs_asm_clobbered));
467 }
468 update_life_info (NULL, UPDATE_LIFE_GLOBAL, flags);
469
470 /* Clean up. */
471 if (optimize && (flags & PROP_SCAN_DEAD_STORES))
472 end_alias_analysis ();
473
474 if (file)
475 dump_flow_info (file);
476
477 free_basic_block_vars (1);
478
479 /* Removing dead insns should've made jumptables really dead. */
480 delete_dead_jumptables ();
481 }
482
483 /* A subroutine of verify_wide_reg, called through for_each_rtx.
484 Search for REGNO. If found, return 2 if it is not wider than
485 word_mode. */
486
487 static int
488 verify_wide_reg_1 (rtx *px, void *pregno)
489 {
490 rtx x = *px;
491 unsigned int regno = *(int *) pregno;
492
493 if (GET_CODE (x) == REG && REGNO (x) == regno)
494 {
495 if (GET_MODE_BITSIZE (GET_MODE (x)) <= BITS_PER_WORD)
496 return 2;
497 return 1;
498 }
499 return 0;
500 }
501
502 /* A subroutine of verify_local_live_at_start. Search through insns
503 of BB looking for register REGNO. */
504
505 static void
506 verify_wide_reg (int regno, basic_block bb)
507 {
508 rtx head = BB_HEAD (bb), end = BB_END (bb);
509
510 while (1)
511 {
512 if (INSN_P (head))
513 {
514 int r = for_each_rtx (&PATTERN (head), verify_wide_reg_1, &regno);
515 if (r == 1)
516 return;
517 if (r == 2)
518 break;
519 }
520 if (head == end)
521 break;
522 head = NEXT_INSN (head);
523 }
524
525 if (rtl_dump_file)
526 {
527 fprintf (rtl_dump_file, "Register %d died unexpectedly.\n", regno);
528 dump_bb (bb, rtl_dump_file);
529 }
530 abort ();
531 }
532
533 /* A subroutine of update_life_info. Verify that there are no untoward
534 changes in live_at_start during a local update. */
535
536 static void
537 verify_local_live_at_start (regset new_live_at_start, basic_block bb)
538 {
539 if (reload_completed)
540 {
541 /* After reload, there are no pseudos, nor subregs of multi-word
542 registers. The regsets should exactly match. */
543 if (! REG_SET_EQUAL_P (new_live_at_start, bb->global_live_at_start))
544 {
545 if (rtl_dump_file)
546 {
547 fprintf (rtl_dump_file,
548 "live_at_start mismatch in bb %d, aborting\nNew:\n",
549 bb->index);
550 debug_bitmap_file (rtl_dump_file, new_live_at_start);
551 fputs ("Old:\n", rtl_dump_file);
552 dump_bb (bb, rtl_dump_file);
553 }
554 abort ();
555 }
556 }
557 else
558 {
559 int i;
560
561 /* Find the set of changed registers. */
562 XOR_REG_SET (new_live_at_start, bb->global_live_at_start);
563
564 EXECUTE_IF_SET_IN_REG_SET (new_live_at_start, 0, i,
565 {
566 /* No registers should die. */
567 if (REGNO_REG_SET_P (bb->global_live_at_start, i))
568 {
569 if (rtl_dump_file)
570 {
571 fprintf (rtl_dump_file,
572 "Register %d died unexpectedly.\n", i);
573 dump_bb (bb, rtl_dump_file);
574 }
575 abort ();
576 }
577
578 /* Verify that the now-live register is wider than word_mode. */
579 verify_wide_reg (i, bb);
580 });
581 }
582 }
583
584 /* Updates life information starting with the basic blocks set in BLOCKS.
585 If BLOCKS is null, consider it to be the universal set.
586
587 If EXTENT is UPDATE_LIFE_LOCAL, such as after splitting or peepholing,
588 we are only expecting local modifications to basic blocks. If we find
589 extra registers live at the beginning of a block, then we either killed
590 useful data, or we have a broken split that wants data not provided.
591 If we find registers removed from live_at_start, that means we have
592 a broken peephole that is killing a register it shouldn't.
593
594 ??? This is not true in one situation -- when a pre-reload splitter
595 generates subregs of a multi-word pseudo, current life analysis will
596 lose the kill. So we _can_ have a pseudo go live. How irritating.
597
598 It is also not true when a peephole decides that it doesn't need one
599 or more of the inputs.
600
601 Including PROP_REG_INFO does not properly refresh regs_ever_live
602 unless the caller resets it to zero. */
603
604 int
605 update_life_info (sbitmap blocks, enum update_life_extent extent, int prop_flags)
606 {
607 regset tmp;
608 regset_head tmp_head;
609 int i;
610 int stabilized_prop_flags = prop_flags;
611 basic_block bb;
612
613 tmp = INITIALIZE_REG_SET (tmp_head);
614 ndead = 0;
615
616 timevar_push ((extent == UPDATE_LIFE_LOCAL || blocks)
617 ? TV_LIFE_UPDATE : TV_LIFE);
618
619 /* Changes to the CFG are only allowed when
620 doing a global update for the entire CFG. */
621 if ((prop_flags & PROP_ALLOW_CFG_CHANGES)
622 && (extent == UPDATE_LIFE_LOCAL || blocks))
623 abort ();
624
625 /* For a global update, we go through the relaxation process again. */
626 if (extent != UPDATE_LIFE_LOCAL)
627 {
628 for ( ; ; )
629 {
630 int changed = 0;
631
632 calculate_global_regs_live (blocks, blocks,
633 prop_flags & (PROP_SCAN_DEAD_CODE
634 | PROP_SCAN_DEAD_STORES
635 | PROP_ALLOW_CFG_CHANGES));
636
637 if ((prop_flags & (PROP_KILL_DEAD_CODE | PROP_ALLOW_CFG_CHANGES))
638 != (PROP_KILL_DEAD_CODE | PROP_ALLOW_CFG_CHANGES))
639 break;
640
641 /* Removing dead code may allow the CFG to be simplified which
642 in turn may allow for further dead code detection / removal. */
643 FOR_EACH_BB_REVERSE (bb)
644 {
645 COPY_REG_SET (tmp, bb->global_live_at_end);
646 changed |= propagate_block (bb, tmp, NULL, NULL,
647 prop_flags & (PROP_SCAN_DEAD_CODE
648 | PROP_SCAN_DEAD_STORES
649 | PROP_KILL_DEAD_CODE));
650 }
651
652 /* Don't pass PROP_SCAN_DEAD_CODE or PROP_KILL_DEAD_CODE to
653 subsequent propagate_block calls, since removing or acting as
654 removing dead code can affect global register liveness, which
655 is supposed to be finalized for this call after this loop. */
656 stabilized_prop_flags
657 &= ~(PROP_SCAN_DEAD_CODE | PROP_SCAN_DEAD_STORES
658 | PROP_KILL_DEAD_CODE);
659
660 if (! changed)
661 break;
662
663 /* We repeat regardless of what cleanup_cfg says. If there were
664 instructions deleted above, that might have been only a
665 partial improvement (see MAX_MEM_SET_LIST_LEN usage).
666 Further improvement may be possible. */
667 cleanup_cfg (CLEANUP_EXPENSIVE);
668
669 /* Zap the life information from the last round. If we don't
670 do this, we can wind up with registers that no longer appear
671 in the code being marked live at entry, which twiggs bogus
672 warnings from regno_uninitialized. */
673 FOR_EACH_BB (bb)
674 {
675 CLEAR_REG_SET (bb->global_live_at_start);
676 CLEAR_REG_SET (bb->global_live_at_end);
677 }
678 }
679
680 /* If asked, remove notes from the blocks we'll update. */
681 if (extent == UPDATE_LIFE_GLOBAL_RM_NOTES)
682 count_or_remove_death_notes (blocks, 1);
683 }
684
685 /* Clear log links in case we are asked to (re)compute them. */
686 if (prop_flags & PROP_LOG_LINKS)
687 clear_log_links (blocks);
688
689 if (blocks)
690 {
691 EXECUTE_IF_SET_IN_SBITMAP (blocks, 0, i,
692 {
693 bb = BASIC_BLOCK (i);
694
695 COPY_REG_SET (tmp, bb->global_live_at_end);
696 propagate_block (bb, tmp, NULL, NULL, stabilized_prop_flags);
697
698 if (extent == UPDATE_LIFE_LOCAL)
699 verify_local_live_at_start (tmp, bb);
700 });
701 }
702 else
703 {
704 FOR_EACH_BB_REVERSE (bb)
705 {
706 COPY_REG_SET (tmp, bb->global_live_at_end);
707
708 propagate_block (bb, tmp, NULL, NULL, stabilized_prop_flags);
709
710 if (extent == UPDATE_LIFE_LOCAL)
711 verify_local_live_at_start (tmp, bb);
712 }
713 }
714
715 FREE_REG_SET (tmp);
716
717 if (prop_flags & PROP_REG_INFO)
718 {
719 /* The only pseudos that are live at the beginning of the function
720 are those that were not set anywhere in the function. local-alloc
721 doesn't know how to handle these correctly, so mark them as not
722 local to any one basic block. */
723 EXECUTE_IF_SET_IN_REG_SET (ENTRY_BLOCK_PTR->global_live_at_end,
724 FIRST_PSEUDO_REGISTER, i,
725 { REG_BASIC_BLOCK (i) = REG_BLOCK_GLOBAL; });
726
727 /* We have a problem with any pseudoreg that lives across the setjmp.
728 ANSI says that if a user variable does not change in value between
729 the setjmp and the longjmp, then the longjmp preserves it. This
730 includes longjmp from a place where the pseudo appears dead.
731 (In principle, the value still exists if it is in scope.)
732 If the pseudo goes in a hard reg, some other value may occupy
733 that hard reg where this pseudo is dead, thus clobbering the pseudo.
734 Conclusion: such a pseudo must not go in a hard reg. */
735 EXECUTE_IF_SET_IN_REG_SET (regs_live_at_setjmp,
736 FIRST_PSEUDO_REGISTER, i,
737 {
738 if (regno_reg_rtx[i] != 0)
739 {
740 REG_LIVE_LENGTH (i) = -1;
741 REG_BASIC_BLOCK (i) = REG_BLOCK_UNKNOWN;
742 }
743 });
744 }
745 timevar_pop ((extent == UPDATE_LIFE_LOCAL || blocks)
746 ? TV_LIFE_UPDATE : TV_LIFE);
747 if (ndead && rtl_dump_file)
748 fprintf (rtl_dump_file, "deleted %i dead insns\n", ndead);
749 return ndead;
750 }
751
752 /* Update life information in all blocks where BB_DIRTY is set. */
753
754 int
755 update_life_info_in_dirty_blocks (enum update_life_extent extent, int prop_flags)
756 {
757 sbitmap update_life_blocks = sbitmap_alloc (last_basic_block);
758 int n = 0;
759 basic_block bb;
760 int retval = 0;
761
762 sbitmap_zero (update_life_blocks);
763 FOR_EACH_BB (bb)
764 {
765 if (extent == UPDATE_LIFE_LOCAL)
766 {
767 if (bb->flags & BB_DIRTY)
768 {
769 SET_BIT (update_life_blocks, bb->index);
770 n++;
771 }
772 }
773 else
774 {
775 /* ??? Bootstrap with -march=pentium4 fails to terminate
776 with only a partial life update. */
777 SET_BIT (update_life_blocks, bb->index);
778 if (bb->flags & BB_DIRTY)
779 n++;
780 }
781 }
782
783 if (n)
784 retval = update_life_info (update_life_blocks, extent, prop_flags);
785
786 sbitmap_free (update_life_blocks);
787 return retval;
788 }
789
790 /* Free the variables allocated by find_basic_blocks.
791
792 KEEP_HEAD_END_P is nonzero if basic_block_info is not to be freed. */
793
794 void
795 free_basic_block_vars (int keep_head_end_p)
796 {
797 if (! keep_head_end_p)
798 {
799 if (basic_block_info)
800 {
801 clear_edges ();
802 VARRAY_FREE (basic_block_info);
803 }
804 n_basic_blocks = 0;
805 last_basic_block = 0;
806
807 ENTRY_BLOCK_PTR->aux = NULL;
808 ENTRY_BLOCK_PTR->global_live_at_end = NULL;
809 EXIT_BLOCK_PTR->aux = NULL;
810 EXIT_BLOCK_PTR->global_live_at_start = NULL;
811 }
812 }
813
814 /* Delete any insns that copy a register to itself. */
815
816 int
817 delete_noop_moves (rtx f ATTRIBUTE_UNUSED)
818 {
819 rtx insn, next;
820 basic_block bb;
821 int nnoops = 0;
822
823 FOR_EACH_BB (bb)
824 {
825 for (insn = BB_HEAD (bb); insn != NEXT_INSN (BB_END (bb)); insn = next)
826 {
827 next = NEXT_INSN (insn);
828 if (INSN_P (insn) && noop_move_p (insn))
829 {
830 rtx note;
831
832 /* If we're about to remove the first insn of a libcall
833 then move the libcall note to the next real insn and
834 update the retval note. */
835 if ((note = find_reg_note (insn, REG_LIBCALL, NULL_RTX))
836 && XEXP (note, 0) != insn)
837 {
838 rtx new_libcall_insn = next_real_insn (insn);
839 rtx retval_note = find_reg_note (XEXP (note, 0),
840 REG_RETVAL, NULL_RTX);
841 REG_NOTES (new_libcall_insn)
842 = gen_rtx_INSN_LIST (REG_LIBCALL, XEXP (note, 0),
843 REG_NOTES (new_libcall_insn));
844 XEXP (retval_note, 0) = new_libcall_insn;
845 }
846
847 delete_insn_and_edges (insn);
848 nnoops++;
849 }
850 }
851 }
852 if (nnoops && rtl_dump_file)
853 fprintf (rtl_dump_file, "deleted %i noop moves", nnoops);
854 return nnoops;
855 }
856
857 /* Delete any jump tables never referenced. We can't delete them at the
858 time of removing tablejump insn as they are referenced by the preceding
859 insns computing the destination, so we delay deleting and garbagecollect
860 them once life information is computed. */
861 void
862 delete_dead_jumptables (void)
863 {
864 rtx insn, next;
865 for (insn = get_insns (); insn; insn = next)
866 {
867 next = NEXT_INSN (insn);
868 if (GET_CODE (insn) == CODE_LABEL
869 && LABEL_NUSES (insn) == LABEL_PRESERVE_P (insn)
870 && GET_CODE (next) == JUMP_INSN
871 && (GET_CODE (PATTERN (next)) == ADDR_VEC
872 || GET_CODE (PATTERN (next)) == ADDR_DIFF_VEC))
873 {
874 if (rtl_dump_file)
875 fprintf (rtl_dump_file, "Dead jumptable %i removed\n", INSN_UID (insn));
876 delete_insn (NEXT_INSN (insn));
877 delete_insn (insn);
878 next = NEXT_INSN (next);
879 }
880 }
881 }
882
883 /* Determine if the stack pointer is constant over the life of the function.
884 Only useful before prologues have been emitted. */
885
886 static void
887 notice_stack_pointer_modification_1 (rtx x, rtx pat ATTRIBUTE_UNUSED,
888 void *data ATTRIBUTE_UNUSED)
889 {
890 if (x == stack_pointer_rtx
891 /* The stack pointer is only modified indirectly as the result
892 of a push until later in flow. See the comments in rtl.texi
893 regarding Embedded Side-Effects on Addresses. */
894 || (GET_CODE (x) == MEM
895 && GET_RTX_CLASS (GET_CODE (XEXP (x, 0))) == 'a'
896 && XEXP (XEXP (x, 0), 0) == stack_pointer_rtx))
897 current_function_sp_is_unchanging = 0;
898 }
899
900 static void
901 notice_stack_pointer_modification (rtx f)
902 {
903 rtx insn;
904
905 /* Assume that the stack pointer is unchanging if alloca hasn't
906 been used. */
907 current_function_sp_is_unchanging = !current_function_calls_alloca;
908 if (! current_function_sp_is_unchanging)
909 return;
910
911 for (insn = f; insn; insn = NEXT_INSN (insn))
912 {
913 if (INSN_P (insn))
914 {
915 /* Check if insn modifies the stack pointer. */
916 note_stores (PATTERN (insn), notice_stack_pointer_modification_1,
917 NULL);
918 if (! current_function_sp_is_unchanging)
919 return;
920 }
921 }
922 }
923
924 /* Mark a register in SET. Hard registers in large modes get all
925 of their component registers set as well. */
926
927 static void
928 mark_reg (rtx reg, void *xset)
929 {
930 regset set = (regset) xset;
931 int regno = REGNO (reg);
932
933 if (GET_MODE (reg) == BLKmode)
934 abort ();
935
936 SET_REGNO_REG_SET (set, regno);
937 if (regno < FIRST_PSEUDO_REGISTER)
938 {
939 int n = HARD_REGNO_NREGS (regno, GET_MODE (reg));
940 while (--n > 0)
941 SET_REGNO_REG_SET (set, regno + n);
942 }
943 }
944
945 /* Mark those regs which are needed at the end of the function as live
946 at the end of the last basic block. */
947
948 static void
949 mark_regs_live_at_end (regset set)
950 {
951 unsigned int i;
952
953 /* If exiting needs the right stack value, consider the stack pointer
954 live at the end of the function. */
955 if ((HAVE_epilogue && epilogue_completed)
956 || ! EXIT_IGNORE_STACK
957 || (! FRAME_POINTER_REQUIRED
958 && ! current_function_calls_alloca
959 && flag_omit_frame_pointer)
960 || current_function_sp_is_unchanging)
961 {
962 SET_REGNO_REG_SET (set, STACK_POINTER_REGNUM);
963 }
964
965 /* Mark the frame pointer if needed at the end of the function. If
966 we end up eliminating it, it will be removed from the live list
967 of each basic block by reload. */
968
969 if (! reload_completed || frame_pointer_needed)
970 {
971 SET_REGNO_REG_SET (set, FRAME_POINTER_REGNUM);
972 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
973 /* If they are different, also mark the hard frame pointer as live. */
974 if (! LOCAL_REGNO (HARD_FRAME_POINTER_REGNUM))
975 SET_REGNO_REG_SET (set, HARD_FRAME_POINTER_REGNUM);
976 #endif
977 }
978
979 #ifndef PIC_OFFSET_TABLE_REG_CALL_CLOBBERED
980 /* Many architectures have a GP register even without flag_pic.
981 Assume the pic register is not in use, or will be handled by
982 other means, if it is not fixed. */
983 if ((unsigned) PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM
984 && fixed_regs[PIC_OFFSET_TABLE_REGNUM])
985 SET_REGNO_REG_SET (set, PIC_OFFSET_TABLE_REGNUM);
986 #endif
987
988 /* Mark all global registers, and all registers used by the epilogue
989 as being live at the end of the function since they may be
990 referenced by our caller. */
991 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
992 if (global_regs[i] || EPILOGUE_USES (i))
993 SET_REGNO_REG_SET (set, i);
994
995 if (HAVE_epilogue && epilogue_completed)
996 {
997 /* Mark all call-saved registers that we actually used. */
998 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
999 if (regs_ever_live[i] && ! LOCAL_REGNO (i)
1000 && ! TEST_HARD_REG_BIT (regs_invalidated_by_call, i))
1001 SET_REGNO_REG_SET (set, i);
1002 }
1003
1004 #ifdef EH_RETURN_DATA_REGNO
1005 /* Mark the registers that will contain data for the handler. */
1006 if (reload_completed && current_function_calls_eh_return)
1007 for (i = 0; ; ++i)
1008 {
1009 unsigned regno = EH_RETURN_DATA_REGNO(i);
1010 if (regno == INVALID_REGNUM)
1011 break;
1012 SET_REGNO_REG_SET (set, regno);
1013 }
1014 #endif
1015 #ifdef EH_RETURN_STACKADJ_RTX
1016 if ((! HAVE_epilogue || ! epilogue_completed)
1017 && current_function_calls_eh_return)
1018 {
1019 rtx tmp = EH_RETURN_STACKADJ_RTX;
1020 if (tmp && REG_P (tmp))
1021 mark_reg (tmp, set);
1022 }
1023 #endif
1024 #ifdef EH_RETURN_HANDLER_RTX
1025 if ((! HAVE_epilogue || ! epilogue_completed)
1026 && current_function_calls_eh_return)
1027 {
1028 rtx tmp = EH_RETURN_HANDLER_RTX;
1029 if (tmp && REG_P (tmp))
1030 mark_reg (tmp, set);
1031 }
1032 #endif
1033
1034 /* Mark function return value. */
1035 diddle_return_value (mark_reg, set);
1036 }
1037
1038 /* Propagate global life info around the graph of basic blocks. Begin
1039 considering blocks with their corresponding bit set in BLOCKS_IN.
1040 If BLOCKS_IN is null, consider it the universal set.
1041
1042 BLOCKS_OUT is set for every block that was changed. */
1043
1044 static void
1045 calculate_global_regs_live (sbitmap blocks_in, sbitmap blocks_out, int flags)
1046 {
1047 basic_block *queue, *qhead, *qtail, *qend, bb;
1048 regset tmp, new_live_at_end, invalidated_by_call;
1049 regset_head tmp_head, invalidated_by_call_head;
1050 regset_head new_live_at_end_head;
1051 int i;
1052
1053 /* Some passes used to forget clear aux field of basic block causing
1054 sick behavior here. */
1055 #ifdef ENABLE_CHECKING
1056 FOR_BB_BETWEEN (bb, ENTRY_BLOCK_PTR, NULL, next_bb)
1057 if (bb->aux)
1058 abort ();
1059 #endif
1060
1061 tmp = INITIALIZE_REG_SET (tmp_head);
1062 new_live_at_end = INITIALIZE_REG_SET (new_live_at_end_head);
1063 invalidated_by_call = INITIALIZE_REG_SET (invalidated_by_call_head);
1064
1065 /* Inconveniently, this is only readily available in hard reg set form. */
1066 for (i = 0; i < FIRST_PSEUDO_REGISTER; ++i)
1067 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i))
1068 SET_REGNO_REG_SET (invalidated_by_call, i);
1069
1070 /* Create a worklist. Allocate an extra slot for ENTRY_BLOCK, and one
1071 because the `head == tail' style test for an empty queue doesn't
1072 work with a full queue. */
1073 queue = xmalloc ((n_basic_blocks + 2) * sizeof (*queue));
1074 qtail = queue;
1075 qhead = qend = queue + n_basic_blocks + 2;
1076
1077 /* Queue the blocks set in the initial mask. Do this in reverse block
1078 number order so that we are more likely for the first round to do
1079 useful work. We use AUX non-null to flag that the block is queued. */
1080 if (blocks_in)
1081 {
1082 FOR_EACH_BB (bb)
1083 if (TEST_BIT (blocks_in, bb->index))
1084 {
1085 *--qhead = bb;
1086 bb->aux = bb;
1087 }
1088 }
1089 else
1090 {
1091 FOR_EACH_BB (bb)
1092 {
1093 *--qhead = bb;
1094 bb->aux = bb;
1095 }
1096 }
1097
1098 /* We clean aux when we remove the initially-enqueued bbs, but we
1099 don't enqueue ENTRY and EXIT initially, so clean them upfront and
1100 unconditionally. */
1101 ENTRY_BLOCK_PTR->aux = EXIT_BLOCK_PTR->aux = NULL;
1102
1103 if (blocks_out)
1104 sbitmap_zero (blocks_out);
1105
1106 /* We work through the queue until there are no more blocks. What
1107 is live at the end of this block is precisely the union of what
1108 is live at the beginning of all its successors. So, we set its
1109 GLOBAL_LIVE_AT_END field based on the GLOBAL_LIVE_AT_START field
1110 for its successors. Then, we compute GLOBAL_LIVE_AT_START for
1111 this block by walking through the instructions in this block in
1112 reverse order and updating as we go. If that changed
1113 GLOBAL_LIVE_AT_START, we add the predecessors of the block to the
1114 queue; they will now need to recalculate GLOBAL_LIVE_AT_END.
1115
1116 We are guaranteed to terminate, because GLOBAL_LIVE_AT_START
1117 never shrinks. If a register appears in GLOBAL_LIVE_AT_START, it
1118 must either be live at the end of the block, or used within the
1119 block. In the latter case, it will certainly never disappear
1120 from GLOBAL_LIVE_AT_START. In the former case, the register
1121 could go away only if it disappeared from GLOBAL_LIVE_AT_START
1122 for one of the successor blocks. By induction, that cannot
1123 occur. */
1124 while (qhead != qtail)
1125 {
1126 int rescan, changed;
1127 basic_block bb;
1128 edge e;
1129
1130 bb = *qhead++;
1131 if (qhead == qend)
1132 qhead = queue;
1133 bb->aux = NULL;
1134
1135 /* Begin by propagating live_at_start from the successor blocks. */
1136 CLEAR_REG_SET (new_live_at_end);
1137
1138 if (bb->succ)
1139 for (e = bb->succ; e; e = e->succ_next)
1140 {
1141 basic_block sb = e->dest;
1142
1143 /* Call-clobbered registers die across exception and
1144 call edges. */
1145 /* ??? Abnormal call edges ignored for the moment, as this gets
1146 confused by sibling call edges, which crashes reg-stack. */
1147 if (e->flags & EDGE_EH)
1148 {
1149 bitmap_operation (tmp, sb->global_live_at_start,
1150 invalidated_by_call, BITMAP_AND_COMPL);
1151 IOR_REG_SET (new_live_at_end, tmp);
1152 }
1153 else
1154 IOR_REG_SET (new_live_at_end, sb->global_live_at_start);
1155
1156 /* If a target saves one register in another (instead of on
1157 the stack) the save register will need to be live for EH. */
1158 if (e->flags & EDGE_EH)
1159 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1160 if (EH_USES (i))
1161 SET_REGNO_REG_SET (new_live_at_end, i);
1162 }
1163 else
1164 {
1165 /* This might be a noreturn function that throws. And
1166 even if it isn't, getting the unwind info right helps
1167 debugging. */
1168 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1169 if (EH_USES (i))
1170 SET_REGNO_REG_SET (new_live_at_end, i);
1171 }
1172
1173 /* The all-important stack pointer must always be live. */
1174 SET_REGNO_REG_SET (new_live_at_end, STACK_POINTER_REGNUM);
1175
1176 /* Before reload, there are a few registers that must be forced
1177 live everywhere -- which might not already be the case for
1178 blocks within infinite loops. */
1179 if (! reload_completed)
1180 {
1181 /* Any reference to any pseudo before reload is a potential
1182 reference of the frame pointer. */
1183 SET_REGNO_REG_SET (new_live_at_end, FRAME_POINTER_REGNUM);
1184
1185 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1186 /* Pseudos with argument area equivalences may require
1187 reloading via the argument pointer. */
1188 if (fixed_regs[ARG_POINTER_REGNUM])
1189 SET_REGNO_REG_SET (new_live_at_end, ARG_POINTER_REGNUM);
1190 #endif
1191
1192 /* Any constant, or pseudo with constant equivalences, may
1193 require reloading from memory using the pic register. */
1194 if ((unsigned) PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM
1195 && fixed_regs[PIC_OFFSET_TABLE_REGNUM])
1196 SET_REGNO_REG_SET (new_live_at_end, PIC_OFFSET_TABLE_REGNUM);
1197 }
1198
1199 if (bb == ENTRY_BLOCK_PTR)
1200 {
1201 COPY_REG_SET (bb->global_live_at_end, new_live_at_end);
1202 continue;
1203 }
1204
1205 /* On our first pass through this block, we'll go ahead and continue.
1206 Recognize first pass by local_set NULL. On subsequent passes, we
1207 get to skip out early if live_at_end wouldn't have changed. */
1208
1209 if (bb->local_set == NULL)
1210 {
1211 bb->local_set = OBSTACK_ALLOC_REG_SET (&flow_obstack);
1212 bb->cond_local_set = OBSTACK_ALLOC_REG_SET (&flow_obstack);
1213 rescan = 1;
1214 }
1215 else
1216 {
1217 /* If any bits were removed from live_at_end, we'll have to
1218 rescan the block. This wouldn't be necessary if we had
1219 precalculated local_live, however with PROP_SCAN_DEAD_CODE
1220 local_live is really dependent on live_at_end. */
1221 CLEAR_REG_SET (tmp);
1222 rescan = bitmap_operation (tmp, bb->global_live_at_end,
1223 new_live_at_end, BITMAP_AND_COMPL);
1224
1225 if (! rescan)
1226 {
1227 /* If any of the registers in the new live_at_end set are
1228 conditionally set in this basic block, we must rescan.
1229 This is because conditional lifetimes at the end of the
1230 block do not just take the live_at_end set into account,
1231 but also the liveness at the start of each successor
1232 block. We can miss changes in those sets if we only
1233 compare the new live_at_end against the previous one. */
1234 CLEAR_REG_SET (tmp);
1235 rescan = bitmap_operation (tmp, new_live_at_end,
1236 bb->cond_local_set, BITMAP_AND);
1237 }
1238
1239 if (! rescan)
1240 {
1241 /* Find the set of changed bits. Take this opportunity
1242 to notice that this set is empty and early out. */
1243 CLEAR_REG_SET (tmp);
1244 changed = bitmap_operation (tmp, bb->global_live_at_end,
1245 new_live_at_end, BITMAP_XOR);
1246 if (! changed)
1247 continue;
1248
1249 /* If any of the changed bits overlap with local_set,
1250 we'll have to rescan the block. Detect overlap by
1251 the AND with ~local_set turning off bits. */
1252 rescan = bitmap_operation (tmp, tmp, bb->local_set,
1253 BITMAP_AND_COMPL);
1254 }
1255 }
1256
1257 /* Let our caller know that BB changed enough to require its
1258 death notes updated. */
1259 if (blocks_out)
1260 SET_BIT (blocks_out, bb->index);
1261
1262 if (! rescan)
1263 {
1264 /* Add to live_at_start the set of all registers in
1265 new_live_at_end that aren't in the old live_at_end. */
1266
1267 bitmap_operation (tmp, new_live_at_end, bb->global_live_at_end,
1268 BITMAP_AND_COMPL);
1269 COPY_REG_SET (bb->global_live_at_end, new_live_at_end);
1270
1271 changed = bitmap_operation (bb->global_live_at_start,
1272 bb->global_live_at_start,
1273 tmp, BITMAP_IOR);
1274 if (! changed)
1275 continue;
1276 }
1277 else
1278 {
1279 COPY_REG_SET (bb->global_live_at_end, new_live_at_end);
1280
1281 /* Rescan the block insn by insn to turn (a copy of) live_at_end
1282 into live_at_start. */
1283 propagate_block (bb, new_live_at_end, bb->local_set,
1284 bb->cond_local_set, flags);
1285
1286 /* If live_at start didn't change, no need to go farther. */
1287 if (REG_SET_EQUAL_P (bb->global_live_at_start, new_live_at_end))
1288 continue;
1289
1290 COPY_REG_SET (bb->global_live_at_start, new_live_at_end);
1291 }
1292
1293 /* Queue all predecessors of BB so that we may re-examine
1294 their live_at_end. */
1295 for (e = bb->pred; e; e = e->pred_next)
1296 {
1297 basic_block pb = e->src;
1298 if (pb->aux == NULL)
1299 {
1300 *qtail++ = pb;
1301 if (qtail == qend)
1302 qtail = queue;
1303 pb->aux = pb;
1304 }
1305 }
1306 }
1307
1308 FREE_REG_SET (tmp);
1309 FREE_REG_SET (new_live_at_end);
1310 FREE_REG_SET (invalidated_by_call);
1311
1312 if (blocks_out)
1313 {
1314 EXECUTE_IF_SET_IN_SBITMAP (blocks_out, 0, i,
1315 {
1316 basic_block bb = BASIC_BLOCK (i);
1317 FREE_REG_SET (bb->local_set);
1318 FREE_REG_SET (bb->cond_local_set);
1319 });
1320 }
1321 else
1322 {
1323 FOR_EACH_BB (bb)
1324 {
1325 FREE_REG_SET (bb->local_set);
1326 FREE_REG_SET (bb->cond_local_set);
1327 }
1328 }
1329
1330 free (queue);
1331 }
1332
1333 \f
1334 /* This structure is used to pass parameters to and from the
1335 the function find_regno_partial(). It is used to pass in the
1336 register number we are looking, as well as to return any rtx
1337 we find. */
1338
1339 typedef struct {
1340 unsigned regno_to_find;
1341 rtx retval;
1342 } find_regno_partial_param;
1343
1344
1345 /* Find the rtx for the reg numbers specified in 'data' if it is
1346 part of an expression which only uses part of the register. Return
1347 it in the structure passed in. */
1348 static int
1349 find_regno_partial (rtx *ptr, void *data)
1350 {
1351 find_regno_partial_param *param = (find_regno_partial_param *)data;
1352 unsigned reg = param->regno_to_find;
1353 param->retval = NULL_RTX;
1354
1355 if (*ptr == NULL_RTX)
1356 return 0;
1357
1358 switch (GET_CODE (*ptr))
1359 {
1360 case ZERO_EXTRACT:
1361 case SIGN_EXTRACT:
1362 case STRICT_LOW_PART:
1363 if (GET_CODE (XEXP (*ptr, 0)) == REG && REGNO (XEXP (*ptr, 0)) == reg)
1364 {
1365 param->retval = XEXP (*ptr, 0);
1366 return 1;
1367 }
1368 break;
1369
1370 case SUBREG:
1371 if (GET_CODE (SUBREG_REG (*ptr)) == REG
1372 && REGNO (SUBREG_REG (*ptr)) == reg)
1373 {
1374 param->retval = SUBREG_REG (*ptr);
1375 return 1;
1376 }
1377 break;
1378
1379 default:
1380 break;
1381 }
1382
1383 return 0;
1384 }
1385
1386 /* Process all immediate successors of the entry block looking for pseudo
1387 registers which are live on entry. Find all of those whose first
1388 instance is a partial register reference of some kind, and initialize
1389 them to 0 after the entry block. This will prevent bit sets within
1390 registers whose value is unknown, and may contain some kind of sticky
1391 bits we don't want. */
1392
1393 int
1394 initialize_uninitialized_subregs (void)
1395 {
1396 rtx insn;
1397 edge e;
1398 int reg, did_something = 0;
1399 find_regno_partial_param param;
1400
1401 for (e = ENTRY_BLOCK_PTR->succ; e; e = e->succ_next)
1402 {
1403 basic_block bb = e->dest;
1404 regset map = bb->global_live_at_start;
1405 EXECUTE_IF_SET_IN_REG_SET (map,
1406 FIRST_PSEUDO_REGISTER, reg,
1407 {
1408 int uid = REGNO_FIRST_UID (reg);
1409 rtx i;
1410
1411 /* Find an insn which mentions the register we are looking for.
1412 Its preferable to have an instance of the register's rtl since
1413 there may be various flags set which we need to duplicate.
1414 If we can't find it, its probably an automatic whose initial
1415 value doesn't matter, or hopefully something we don't care about. */
1416 for (i = get_insns (); i && INSN_UID (i) != uid; i = NEXT_INSN (i))
1417 ;
1418 if (i != NULL_RTX)
1419 {
1420 /* Found the insn, now get the REG rtx, if we can. */
1421 param.regno_to_find = reg;
1422 for_each_rtx (&i, find_regno_partial, &param);
1423 if (param.retval != NULL_RTX)
1424 {
1425 start_sequence ();
1426 emit_move_insn (param.retval,
1427 CONST0_RTX (GET_MODE (param.retval)));
1428 insn = get_insns ();
1429 end_sequence ();
1430 insert_insn_on_edge (insn, e);
1431 did_something = 1;
1432 }
1433 }
1434 });
1435 }
1436
1437 if (did_something)
1438 commit_edge_insertions ();
1439 return did_something;
1440 }
1441
1442 \f
1443 /* Subroutines of life analysis. */
1444
1445 /* Allocate the permanent data structures that represent the results
1446 of life analysis. Not static since used also for stupid life analysis. */
1447
1448 void
1449 allocate_bb_life_data (void)
1450 {
1451 basic_block bb;
1452
1453 FOR_BB_BETWEEN (bb, ENTRY_BLOCK_PTR, NULL, next_bb)
1454 {
1455 bb->global_live_at_start = OBSTACK_ALLOC_REG_SET (&flow_obstack);
1456 bb->global_live_at_end = OBSTACK_ALLOC_REG_SET (&flow_obstack);
1457 }
1458
1459 regs_live_at_setjmp = OBSTACK_ALLOC_REG_SET (&flow_obstack);
1460 }
1461
1462 void
1463 allocate_reg_life_data (void)
1464 {
1465 int i;
1466
1467 max_regno = max_reg_num ();
1468
1469 /* Recalculate the register space, in case it has grown. Old style
1470 vector oriented regsets would set regset_{size,bytes} here also. */
1471 allocate_reg_info (max_regno, FALSE, FALSE);
1472
1473 /* Reset all the data we'll collect in propagate_block and its
1474 subroutines. */
1475 for (i = 0; i < max_regno; i++)
1476 {
1477 REG_N_SETS (i) = 0;
1478 REG_N_REFS (i) = 0;
1479 REG_N_DEATHS (i) = 0;
1480 REG_N_CALLS_CROSSED (i) = 0;
1481 REG_LIVE_LENGTH (i) = 0;
1482 REG_FREQ (i) = 0;
1483 REG_BASIC_BLOCK (i) = REG_BLOCK_UNKNOWN;
1484 }
1485 }
1486
1487 /* Delete dead instructions for propagate_block. */
1488
1489 static void
1490 propagate_block_delete_insn (rtx insn)
1491 {
1492 rtx inote = find_reg_note (insn, REG_LABEL, NULL_RTX);
1493
1494 /* If the insn referred to a label, and that label was attached to
1495 an ADDR_VEC, it's safe to delete the ADDR_VEC. In fact, it's
1496 pretty much mandatory to delete it, because the ADDR_VEC may be
1497 referencing labels that no longer exist.
1498
1499 INSN may reference a deleted label, particularly when a jump
1500 table has been optimized into a direct jump. There's no
1501 real good way to fix up the reference to the deleted label
1502 when the label is deleted, so we just allow it here. */
1503
1504 if (inote && GET_CODE (inote) == CODE_LABEL)
1505 {
1506 rtx label = XEXP (inote, 0);
1507 rtx next;
1508
1509 /* The label may be forced if it has been put in the constant
1510 pool. If that is the only use we must discard the table
1511 jump following it, but not the label itself. */
1512 if (LABEL_NUSES (label) == 1 + LABEL_PRESERVE_P (label)
1513 && (next = next_nonnote_insn (label)) != NULL
1514 && GET_CODE (next) == JUMP_INSN
1515 && (GET_CODE (PATTERN (next)) == ADDR_VEC
1516 || GET_CODE (PATTERN (next)) == ADDR_DIFF_VEC))
1517 {
1518 rtx pat = PATTERN (next);
1519 int diff_vec_p = GET_CODE (pat) == ADDR_DIFF_VEC;
1520 int len = XVECLEN (pat, diff_vec_p);
1521 int i;
1522
1523 for (i = 0; i < len; i++)
1524 LABEL_NUSES (XEXP (XVECEXP (pat, diff_vec_p, i), 0))--;
1525
1526 delete_insn_and_edges (next);
1527 ndead++;
1528 }
1529 }
1530
1531 delete_insn_and_edges (insn);
1532 ndead++;
1533 }
1534
1535 /* Delete dead libcalls for propagate_block. Return the insn
1536 before the libcall. */
1537
1538 static rtx
1539 propagate_block_delete_libcall (rtx insn, rtx note)
1540 {
1541 rtx first = XEXP (note, 0);
1542 rtx before = PREV_INSN (first);
1543
1544 delete_insn_chain_and_edges (first, insn);
1545 ndead++;
1546 return before;
1547 }
1548
1549 /* Update the life-status of regs for one insn. Return the previous insn. */
1550
1551 rtx
1552 propagate_one_insn (struct propagate_block_info *pbi, rtx insn)
1553 {
1554 rtx prev = PREV_INSN (insn);
1555 int flags = pbi->flags;
1556 int insn_is_dead = 0;
1557 int libcall_is_dead = 0;
1558 rtx note;
1559 int i;
1560
1561 if (! INSN_P (insn))
1562 return prev;
1563
1564 note = find_reg_note (insn, REG_RETVAL, NULL_RTX);
1565 if (flags & PROP_SCAN_DEAD_CODE)
1566 {
1567 insn_is_dead = insn_dead_p (pbi, PATTERN (insn), 0, REG_NOTES (insn));
1568 libcall_is_dead = (insn_is_dead && note != 0
1569 && libcall_dead_p (pbi, note, insn));
1570 }
1571
1572 /* If an instruction consists of just dead store(s) on final pass,
1573 delete it. */
1574 if ((flags & PROP_KILL_DEAD_CODE) && insn_is_dead)
1575 {
1576 /* If we're trying to delete a prologue or epilogue instruction
1577 that isn't flagged as possibly being dead, something is wrong.
1578 But if we are keeping the stack pointer depressed, we might well
1579 be deleting insns that are used to compute the amount to update
1580 it by, so they are fine. */
1581 if (reload_completed
1582 && !(TREE_CODE (TREE_TYPE (current_function_decl)) == FUNCTION_TYPE
1583 && (TYPE_RETURNS_STACK_DEPRESSED
1584 (TREE_TYPE (current_function_decl))))
1585 && (((HAVE_epilogue || HAVE_prologue)
1586 && prologue_epilogue_contains (insn))
1587 || (HAVE_sibcall_epilogue
1588 && sibcall_epilogue_contains (insn)))
1589 && find_reg_note (insn, REG_MAYBE_DEAD, NULL_RTX) == 0)
1590 fatal_insn ("Attempt to delete prologue/epilogue insn:", insn);
1591
1592 /* Record sets. Do this even for dead instructions, since they
1593 would have killed the values if they hadn't been deleted. */
1594 mark_set_regs (pbi, PATTERN (insn), insn);
1595
1596 /* CC0 is now known to be dead. Either this insn used it,
1597 in which case it doesn't anymore, or clobbered it,
1598 so the next insn can't use it. */
1599 pbi->cc0_live = 0;
1600
1601 if (libcall_is_dead)
1602 prev = propagate_block_delete_libcall ( insn, note);
1603 else
1604 {
1605
1606 /* If INSN contains a RETVAL note and is dead, but the libcall
1607 as a whole is not dead, then we want to remove INSN, but
1608 not the whole libcall sequence.
1609
1610 However, we need to also remove the dangling REG_LIBCALL
1611 note so that we do not have mis-matched LIBCALL/RETVAL
1612 notes. In theory we could find a new location for the
1613 REG_RETVAL note, but it hardly seems worth the effort.
1614
1615 NOTE at this point will be the RETVAL note if it exists. */
1616 if (note)
1617 {
1618 rtx libcall_note;
1619
1620 libcall_note
1621 = find_reg_note (XEXP (note, 0), REG_LIBCALL, NULL_RTX);
1622 remove_note (XEXP (note, 0), libcall_note);
1623 }
1624
1625 /* Similarly if INSN contains a LIBCALL note, remove the
1626 dangling REG_RETVAL note. */
1627 note = find_reg_note (insn, REG_LIBCALL, NULL_RTX);
1628 if (note)
1629 {
1630 rtx retval_note;
1631
1632 retval_note
1633 = find_reg_note (XEXP (note, 0), REG_RETVAL, NULL_RTX);
1634 remove_note (XEXP (note, 0), retval_note);
1635 }
1636
1637 /* Now delete INSN. */
1638 propagate_block_delete_insn (insn);
1639 }
1640
1641 return prev;
1642 }
1643
1644 /* See if this is an increment or decrement that can be merged into
1645 a following memory address. */
1646 #ifdef AUTO_INC_DEC
1647 {
1648 rtx x = single_set (insn);
1649
1650 /* Does this instruction increment or decrement a register? */
1651 if ((flags & PROP_AUTOINC)
1652 && x != 0
1653 && GET_CODE (SET_DEST (x)) == REG
1654 && (GET_CODE (SET_SRC (x)) == PLUS
1655 || GET_CODE (SET_SRC (x)) == MINUS)
1656 && XEXP (SET_SRC (x), 0) == SET_DEST (x)
1657 && GET_CODE (XEXP (SET_SRC (x), 1)) == CONST_INT
1658 /* Ok, look for a following memory ref we can combine with.
1659 If one is found, change the memory ref to a PRE_INC
1660 or PRE_DEC, cancel this insn, and return 1.
1661 Return 0 if nothing has been done. */
1662 && try_pre_increment_1 (pbi, insn))
1663 return prev;
1664 }
1665 #endif /* AUTO_INC_DEC */
1666
1667 CLEAR_REG_SET (pbi->new_set);
1668
1669 /* If this is not the final pass, and this insn is copying the value of
1670 a library call and it's dead, don't scan the insns that perform the
1671 library call, so that the call's arguments are not marked live. */
1672 if (libcall_is_dead)
1673 {
1674 /* Record the death of the dest reg. */
1675 mark_set_regs (pbi, PATTERN (insn), insn);
1676
1677 insn = XEXP (note, 0);
1678 return PREV_INSN (insn);
1679 }
1680 else if (GET_CODE (PATTERN (insn)) == SET
1681 && SET_DEST (PATTERN (insn)) == stack_pointer_rtx
1682 && GET_CODE (SET_SRC (PATTERN (insn))) == PLUS
1683 && XEXP (SET_SRC (PATTERN (insn)), 0) == stack_pointer_rtx
1684 && GET_CODE (XEXP (SET_SRC (PATTERN (insn)), 1)) == CONST_INT)
1685 /* We have an insn to pop a constant amount off the stack.
1686 (Such insns use PLUS regardless of the direction of the stack,
1687 and any insn to adjust the stack by a constant is always a pop.)
1688 These insns, if not dead stores, have no effect on life, though
1689 they do have an effect on the memory stores we are tracking. */
1690 invalidate_mems_from_set (pbi, stack_pointer_rtx);
1691 else
1692 {
1693 rtx note;
1694 /* Any regs live at the time of a call instruction must not go
1695 in a register clobbered by calls. Find all regs now live and
1696 record this for them. */
1697
1698 if (GET_CODE (insn) == CALL_INSN && (flags & PROP_REG_INFO))
1699 EXECUTE_IF_SET_IN_REG_SET (pbi->reg_live, 0, i,
1700 { REG_N_CALLS_CROSSED (i)++; });
1701
1702 /* Record sets. Do this even for dead instructions, since they
1703 would have killed the values if they hadn't been deleted. */
1704 mark_set_regs (pbi, PATTERN (insn), insn);
1705
1706 if (GET_CODE (insn) == CALL_INSN)
1707 {
1708 regset live_at_end;
1709 bool sibcall_p;
1710 rtx note, cond;
1711 int i;
1712
1713 cond = NULL_RTX;
1714 if (GET_CODE (PATTERN (insn)) == COND_EXEC)
1715 cond = COND_EXEC_TEST (PATTERN (insn));
1716
1717 /* Non-constant calls clobber memory, constant calls do not
1718 clobber memory, though they may clobber outgoing arguments
1719 on the stack. */
1720 if (! CONST_OR_PURE_CALL_P (insn))
1721 {
1722 free_EXPR_LIST_list (&pbi->mem_set_list);
1723 pbi->mem_set_list_len = 0;
1724 }
1725 else
1726 invalidate_mems_from_set (pbi, stack_pointer_rtx);
1727
1728 /* There may be extra registers to be clobbered. */
1729 for (note = CALL_INSN_FUNCTION_USAGE (insn);
1730 note;
1731 note = XEXP (note, 1))
1732 if (GET_CODE (XEXP (note, 0)) == CLOBBER)
1733 mark_set_1 (pbi, CLOBBER, XEXP (XEXP (note, 0), 0),
1734 cond, insn, pbi->flags);
1735
1736 /* Calls change all call-used and global registers; sibcalls do not
1737 clobber anything that must be preserved at end-of-function,
1738 except for return values. */
1739
1740 sibcall_p = SIBLING_CALL_P (insn);
1741 live_at_end = EXIT_BLOCK_PTR->global_live_at_start;
1742 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1743 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i)
1744 && ! (sibcall_p
1745 && REGNO_REG_SET_P (live_at_end, i)
1746 && ! refers_to_regno_p (i, i+1,
1747 current_function_return_rtx,
1748 (rtx *) 0)))
1749 {
1750 /* We do not want REG_UNUSED notes for these registers. */
1751 mark_set_1 (pbi, CLOBBER, regno_reg_rtx[i], cond, insn,
1752 pbi->flags & ~(PROP_DEATH_NOTES | PROP_REG_INFO));
1753 }
1754 }
1755
1756 /* If an insn doesn't use CC0, it becomes dead since we assume
1757 that every insn clobbers it. So show it dead here;
1758 mark_used_regs will set it live if it is referenced. */
1759 pbi->cc0_live = 0;
1760
1761 /* Record uses. */
1762 if (! insn_is_dead)
1763 mark_used_regs (pbi, PATTERN (insn), NULL_RTX, insn);
1764 if ((flags & PROP_EQUAL_NOTES)
1765 && ((note = find_reg_note (insn, REG_EQUAL, NULL_RTX))
1766 || (note = find_reg_note (insn, REG_EQUIV, NULL_RTX))))
1767 mark_used_regs (pbi, XEXP (note, 0), NULL_RTX, insn);
1768
1769 /* Sometimes we may have inserted something before INSN (such as a move)
1770 when we make an auto-inc. So ensure we will scan those insns. */
1771 #ifdef AUTO_INC_DEC
1772 prev = PREV_INSN (insn);
1773 #endif
1774
1775 if (! insn_is_dead && GET_CODE (insn) == CALL_INSN)
1776 {
1777 int i;
1778 rtx note, cond;
1779
1780 cond = NULL_RTX;
1781 if (GET_CODE (PATTERN (insn)) == COND_EXEC)
1782 cond = COND_EXEC_TEST (PATTERN (insn));
1783
1784 /* Calls use their arguments, and may clobber memory which
1785 address involves some register. */
1786 for (note = CALL_INSN_FUNCTION_USAGE (insn);
1787 note;
1788 note = XEXP (note, 1))
1789 /* We find USE or CLOBBER entities in a FUNCTION_USAGE list: both
1790 of which mark_used_regs knows how to handle. */
1791 mark_used_regs (pbi, XEXP (XEXP (note, 0), 0), cond, insn);
1792
1793 /* The stack ptr is used (honorarily) by a CALL insn. */
1794 SET_REGNO_REG_SET (pbi->reg_live, STACK_POINTER_REGNUM);
1795
1796 /* Calls may also reference any of the global registers,
1797 so they are made live. */
1798 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1799 if (global_regs[i])
1800 mark_used_reg (pbi, regno_reg_rtx[i], cond, insn);
1801 }
1802 }
1803
1804 /* On final pass, update counts of how many insns in which each reg
1805 is live. */
1806 if (flags & PROP_REG_INFO)
1807 EXECUTE_IF_SET_IN_REG_SET (pbi->reg_live, 0, i,
1808 { REG_LIVE_LENGTH (i)++; });
1809
1810 return prev;
1811 }
1812
1813 /* Initialize a propagate_block_info struct for public consumption.
1814 Note that the structure itself is opaque to this file, but that
1815 the user can use the regsets provided here. */
1816
1817 struct propagate_block_info *
1818 init_propagate_block_info (basic_block bb, regset live, regset local_set,
1819 regset cond_local_set, int flags)
1820 {
1821 struct propagate_block_info *pbi = xmalloc (sizeof (*pbi));
1822
1823 pbi->bb = bb;
1824 pbi->reg_live = live;
1825 pbi->mem_set_list = NULL_RTX;
1826 pbi->mem_set_list_len = 0;
1827 pbi->local_set = local_set;
1828 pbi->cond_local_set = cond_local_set;
1829 pbi->cc0_live = 0;
1830 pbi->flags = flags;
1831
1832 if (flags & (PROP_LOG_LINKS | PROP_AUTOINC))
1833 pbi->reg_next_use = xcalloc (max_reg_num (), sizeof (rtx));
1834 else
1835 pbi->reg_next_use = NULL;
1836
1837 pbi->new_set = BITMAP_XMALLOC ();
1838
1839 #ifdef HAVE_conditional_execution
1840 pbi->reg_cond_dead = splay_tree_new (splay_tree_compare_ints, NULL,
1841 free_reg_cond_life_info);
1842 pbi->reg_cond_reg = BITMAP_XMALLOC ();
1843
1844 /* If this block ends in a conditional branch, for each register
1845 live from one side of the branch and not the other, record the
1846 register as conditionally dead. */
1847 if (GET_CODE (BB_END (bb)) == JUMP_INSN
1848 && any_condjump_p (BB_END (bb)))
1849 {
1850 regset_head diff_head;
1851 regset diff = INITIALIZE_REG_SET (diff_head);
1852 basic_block bb_true, bb_false;
1853 int i;
1854
1855 /* Identify the successor blocks. */
1856 bb_true = bb->succ->dest;
1857 if (bb->succ->succ_next != NULL)
1858 {
1859 bb_false = bb->succ->succ_next->dest;
1860
1861 if (bb->succ->flags & EDGE_FALLTHRU)
1862 {
1863 basic_block t = bb_false;
1864 bb_false = bb_true;
1865 bb_true = t;
1866 }
1867 else if (! (bb->succ->succ_next->flags & EDGE_FALLTHRU))
1868 abort ();
1869 }
1870 else
1871 {
1872 /* This can happen with a conditional jump to the next insn. */
1873 if (JUMP_LABEL (BB_END (bb)) != BB_HEAD (bb_true))
1874 abort ();
1875
1876 /* Simplest way to do nothing. */
1877 bb_false = bb_true;
1878 }
1879
1880 /* Compute which register lead different lives in the successors. */
1881 if (bitmap_operation (diff, bb_true->global_live_at_start,
1882 bb_false->global_live_at_start, BITMAP_XOR))
1883 {
1884 /* Extract the condition from the branch. */
1885 rtx set_src = SET_SRC (pc_set (BB_END (bb)));
1886 rtx cond_true = XEXP (set_src, 0);
1887 rtx reg = XEXP (cond_true, 0);
1888
1889 if (GET_CODE (reg) == SUBREG)
1890 reg = SUBREG_REG (reg);
1891
1892 /* We can only track conditional lifetimes if the condition is
1893 in the form of a comparison of a register against zero.
1894 If the condition is more complex than that, then it is safe
1895 not to record any information. */
1896 if (GET_CODE (reg) == REG
1897 && XEXP (cond_true, 1) == const0_rtx)
1898 {
1899 rtx cond_false
1900 = gen_rtx_fmt_ee (reverse_condition (GET_CODE (cond_true)),
1901 GET_MODE (cond_true), XEXP (cond_true, 0),
1902 XEXP (cond_true, 1));
1903 if (GET_CODE (XEXP (set_src, 1)) == PC)
1904 {
1905 rtx t = cond_false;
1906 cond_false = cond_true;
1907 cond_true = t;
1908 }
1909
1910 SET_REGNO_REG_SET (pbi->reg_cond_reg, REGNO (reg));
1911
1912 /* For each such register, mark it conditionally dead. */
1913 EXECUTE_IF_SET_IN_REG_SET
1914 (diff, 0, i,
1915 {
1916 struct reg_cond_life_info *rcli;
1917 rtx cond;
1918
1919 rcli = xmalloc (sizeof (*rcli));
1920
1921 if (REGNO_REG_SET_P (bb_true->global_live_at_start, i))
1922 cond = cond_false;
1923 else
1924 cond = cond_true;
1925 rcli->condition = cond;
1926 rcli->stores = const0_rtx;
1927 rcli->orig_condition = cond;
1928
1929 splay_tree_insert (pbi->reg_cond_dead, i,
1930 (splay_tree_value) rcli);
1931 });
1932 }
1933 }
1934
1935 FREE_REG_SET (diff);
1936 }
1937 #endif
1938
1939 /* If this block has no successors, any stores to the frame that aren't
1940 used later in the block are dead. So make a pass over the block
1941 recording any such that are made and show them dead at the end. We do
1942 a very conservative and simple job here. */
1943 if (optimize
1944 && ! (TREE_CODE (TREE_TYPE (current_function_decl)) == FUNCTION_TYPE
1945 && (TYPE_RETURNS_STACK_DEPRESSED
1946 (TREE_TYPE (current_function_decl))))
1947 && (flags & PROP_SCAN_DEAD_STORES)
1948 && (bb->succ == NULL
1949 || (bb->succ->succ_next == NULL
1950 && bb->succ->dest == EXIT_BLOCK_PTR
1951 && ! current_function_calls_eh_return)))
1952 {
1953 rtx insn, set;
1954 for (insn = BB_END (bb); insn != BB_HEAD (bb); insn = PREV_INSN (insn))
1955 if (GET_CODE (insn) == INSN
1956 && (set = single_set (insn))
1957 && GET_CODE (SET_DEST (set)) == MEM)
1958 {
1959 rtx mem = SET_DEST (set);
1960 rtx canon_mem = canon_rtx (mem);
1961
1962 if (XEXP (canon_mem, 0) == frame_pointer_rtx
1963 || (GET_CODE (XEXP (canon_mem, 0)) == PLUS
1964 && XEXP (XEXP (canon_mem, 0), 0) == frame_pointer_rtx
1965 && GET_CODE (XEXP (XEXP (canon_mem, 0), 1)) == CONST_INT))
1966 add_to_mem_set_list (pbi, canon_mem);
1967 }
1968 }
1969
1970 return pbi;
1971 }
1972
1973 /* Release a propagate_block_info struct. */
1974
1975 void
1976 free_propagate_block_info (struct propagate_block_info *pbi)
1977 {
1978 free_EXPR_LIST_list (&pbi->mem_set_list);
1979
1980 BITMAP_XFREE (pbi->new_set);
1981
1982 #ifdef HAVE_conditional_execution
1983 splay_tree_delete (pbi->reg_cond_dead);
1984 BITMAP_XFREE (pbi->reg_cond_reg);
1985 #endif
1986
1987 if (pbi->reg_next_use)
1988 free (pbi->reg_next_use);
1989
1990 free (pbi);
1991 }
1992
1993 /* Compute the registers live at the beginning of a basic block BB from
1994 those live at the end.
1995
1996 When called, REG_LIVE contains those live at the end. On return, it
1997 contains those live at the beginning.
1998
1999 LOCAL_SET, if non-null, will be set with all registers killed
2000 unconditionally by this basic block.
2001 Likewise, COND_LOCAL_SET, if non-null, will be set with all registers
2002 killed conditionally by this basic block. If there is any unconditional
2003 set of a register, then the corresponding bit will be set in LOCAL_SET
2004 and cleared in COND_LOCAL_SET.
2005 It is valid for LOCAL_SET and COND_LOCAL_SET to be the same set. In this
2006 case, the resulting set will be equal to the union of the two sets that
2007 would otherwise be computed.
2008
2009 Return nonzero if an INSN is deleted (i.e. by dead code removal). */
2010
2011 int
2012 propagate_block (basic_block bb, regset live, regset local_set,
2013 regset cond_local_set, int flags)
2014 {
2015 struct propagate_block_info *pbi;
2016 rtx insn, prev;
2017 int changed;
2018
2019 pbi = init_propagate_block_info (bb, live, local_set, cond_local_set, flags);
2020
2021 if (flags & PROP_REG_INFO)
2022 {
2023 int i;
2024
2025 /* Process the regs live at the end of the block.
2026 Mark them as not local to any one basic block. */
2027 EXECUTE_IF_SET_IN_REG_SET (live, 0, i,
2028 { REG_BASIC_BLOCK (i) = REG_BLOCK_GLOBAL; });
2029 }
2030
2031 /* Scan the block an insn at a time from end to beginning. */
2032
2033 changed = 0;
2034 for (insn = BB_END (bb); ; insn = prev)
2035 {
2036 /* If this is a call to `setjmp' et al, warn if any
2037 non-volatile datum is live. */
2038 if ((flags & PROP_REG_INFO)
2039 && GET_CODE (insn) == CALL_INSN
2040 && find_reg_note (insn, REG_SETJMP, NULL))
2041 IOR_REG_SET (regs_live_at_setjmp, pbi->reg_live);
2042
2043 prev = propagate_one_insn (pbi, insn);
2044 if (!prev)
2045 changed |= insn != get_insns ();
2046 else
2047 changed |= NEXT_INSN (prev) != insn;
2048
2049 if (insn == BB_HEAD (bb))
2050 break;
2051 }
2052
2053 free_propagate_block_info (pbi);
2054
2055 return changed;
2056 }
2057 \f
2058 /* Return 1 if X (the body of an insn, or part of it) is just dead stores
2059 (SET expressions whose destinations are registers dead after the insn).
2060 NEEDED is the regset that says which regs are alive after the insn.
2061
2062 Unless CALL_OK is nonzero, an insn is needed if it contains a CALL.
2063
2064 If X is the entire body of an insn, NOTES contains the reg notes
2065 pertaining to the insn. */
2066
2067 static int
2068 insn_dead_p (struct propagate_block_info *pbi, rtx x, int call_ok,
2069 rtx notes ATTRIBUTE_UNUSED)
2070 {
2071 enum rtx_code code = GET_CODE (x);
2072
2073 /* Don't eliminate insns that may trap. */
2074 if (flag_non_call_exceptions && may_trap_p (x))
2075 return 0;
2076
2077 #ifdef AUTO_INC_DEC
2078 /* As flow is invoked after combine, we must take existing AUTO_INC
2079 expressions into account. */
2080 for (; notes; notes = XEXP (notes, 1))
2081 {
2082 if (REG_NOTE_KIND (notes) == REG_INC)
2083 {
2084 int regno = REGNO (XEXP (notes, 0));
2085
2086 /* Don't delete insns to set global regs. */
2087 if ((regno < FIRST_PSEUDO_REGISTER && global_regs[regno])
2088 || REGNO_REG_SET_P (pbi->reg_live, regno))
2089 return 0;
2090 }
2091 }
2092 #endif
2093
2094 /* If setting something that's a reg or part of one,
2095 see if that register's altered value will be live. */
2096
2097 if (code == SET)
2098 {
2099 rtx r = SET_DEST (x);
2100
2101 #ifdef HAVE_cc0
2102 if (GET_CODE (r) == CC0)
2103 return ! pbi->cc0_live;
2104 #endif
2105
2106 /* A SET that is a subroutine call cannot be dead. */
2107 if (GET_CODE (SET_SRC (x)) == CALL)
2108 {
2109 if (! call_ok)
2110 return 0;
2111 }
2112
2113 /* Don't eliminate loads from volatile memory or volatile asms. */
2114 else if (volatile_refs_p (SET_SRC (x)))
2115 return 0;
2116
2117 if (GET_CODE (r) == MEM)
2118 {
2119 rtx temp, canon_r;
2120
2121 if (MEM_VOLATILE_P (r) || GET_MODE (r) == BLKmode)
2122 return 0;
2123
2124 canon_r = canon_rtx (r);
2125
2126 /* Walk the set of memory locations we are currently tracking
2127 and see if one is an identical match to this memory location.
2128 If so, this memory write is dead (remember, we're walking
2129 backwards from the end of the block to the start). Since
2130 rtx_equal_p does not check the alias set or flags, we also
2131 must have the potential for them to conflict (anti_dependence). */
2132 for (temp = pbi->mem_set_list; temp != 0; temp = XEXP (temp, 1))
2133 if (unchanging_anti_dependence (r, XEXP (temp, 0)))
2134 {
2135 rtx mem = XEXP (temp, 0);
2136
2137 if (rtx_equal_p (XEXP (canon_r, 0), XEXP (mem, 0))
2138 && (GET_MODE_SIZE (GET_MODE (canon_r))
2139 <= GET_MODE_SIZE (GET_MODE (mem))))
2140 return 1;
2141
2142 #ifdef AUTO_INC_DEC
2143 /* Check if memory reference matches an auto increment. Only
2144 post increment/decrement or modify are valid. */
2145 if (GET_MODE (mem) == GET_MODE (r)
2146 && (GET_CODE (XEXP (mem, 0)) == POST_DEC
2147 || GET_CODE (XEXP (mem, 0)) == POST_INC
2148 || GET_CODE (XEXP (mem, 0)) == POST_MODIFY)
2149 && GET_MODE (XEXP (mem, 0)) == GET_MODE (r)
2150 && rtx_equal_p (XEXP (XEXP (mem, 0), 0), XEXP (r, 0)))
2151 return 1;
2152 #endif
2153 }
2154 }
2155 else
2156 {
2157 while (GET_CODE (r) == SUBREG
2158 || GET_CODE (r) == STRICT_LOW_PART
2159 || GET_CODE (r) == ZERO_EXTRACT)
2160 r = XEXP (r, 0);
2161
2162 if (GET_CODE (r) == REG)
2163 {
2164 int regno = REGNO (r);
2165
2166 /* Obvious. */
2167 if (REGNO_REG_SET_P (pbi->reg_live, regno))
2168 return 0;
2169
2170 /* If this is a hard register, verify that subsequent
2171 words are not needed. */
2172 if (regno < FIRST_PSEUDO_REGISTER)
2173 {
2174 int n = HARD_REGNO_NREGS (regno, GET_MODE (r));
2175
2176 while (--n > 0)
2177 if (REGNO_REG_SET_P (pbi->reg_live, regno+n))
2178 return 0;
2179 }
2180
2181 /* Don't delete insns to set global regs. */
2182 if (regno < FIRST_PSEUDO_REGISTER && global_regs[regno])
2183 return 0;
2184
2185 /* Make sure insns to set the stack pointer aren't deleted. */
2186 if (regno == STACK_POINTER_REGNUM)
2187 return 0;
2188
2189 /* ??? These bits might be redundant with the force live bits
2190 in calculate_global_regs_live. We would delete from
2191 sequential sets; whether this actually affects real code
2192 for anything but the stack pointer I don't know. */
2193 /* Make sure insns to set the frame pointer aren't deleted. */
2194 if (regno == FRAME_POINTER_REGNUM
2195 && (! reload_completed || frame_pointer_needed))
2196 return 0;
2197 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
2198 if (regno == HARD_FRAME_POINTER_REGNUM
2199 && (! reload_completed || frame_pointer_needed))
2200 return 0;
2201 #endif
2202
2203 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
2204 /* Make sure insns to set arg pointer are never deleted
2205 (if the arg pointer isn't fixed, there will be a USE
2206 for it, so we can treat it normally). */
2207 if (regno == ARG_POINTER_REGNUM && fixed_regs[regno])
2208 return 0;
2209 #endif
2210
2211 /* Otherwise, the set is dead. */
2212 return 1;
2213 }
2214 }
2215 }
2216
2217 /* If performing several activities, insn is dead if each activity
2218 is individually dead. Also, CLOBBERs and USEs can be ignored; a
2219 CLOBBER or USE that's inside a PARALLEL doesn't make the insn
2220 worth keeping. */
2221 else if (code == PARALLEL)
2222 {
2223 int i = XVECLEN (x, 0);
2224
2225 for (i--; i >= 0; i--)
2226 if (GET_CODE (XVECEXP (x, 0, i)) != CLOBBER
2227 && GET_CODE (XVECEXP (x, 0, i)) != USE
2228 && ! insn_dead_p (pbi, XVECEXP (x, 0, i), call_ok, NULL_RTX))
2229 return 0;
2230
2231 return 1;
2232 }
2233
2234 /* A CLOBBER of a pseudo-register that is dead serves no purpose. That
2235 is not necessarily true for hard registers. */
2236 else if (code == CLOBBER && GET_CODE (XEXP (x, 0)) == REG
2237 && REGNO (XEXP (x, 0)) >= FIRST_PSEUDO_REGISTER
2238 && ! REGNO_REG_SET_P (pbi->reg_live, REGNO (XEXP (x, 0))))
2239 return 1;
2240
2241 /* We do not check other CLOBBER or USE here. An insn consisting of just
2242 a CLOBBER or just a USE should not be deleted. */
2243 return 0;
2244 }
2245
2246 /* If INSN is the last insn in a libcall, and assuming INSN is dead,
2247 return 1 if the entire library call is dead.
2248 This is true if INSN copies a register (hard or pseudo)
2249 and if the hard return reg of the call insn is dead.
2250 (The caller should have tested the destination of the SET inside
2251 INSN already for death.)
2252
2253 If this insn doesn't just copy a register, then we don't
2254 have an ordinary libcall. In that case, cse could not have
2255 managed to substitute the source for the dest later on,
2256 so we can assume the libcall is dead.
2257
2258 PBI is the block info giving pseudoregs live before this insn.
2259 NOTE is the REG_RETVAL note of the insn. */
2260
2261 static int
2262 libcall_dead_p (struct propagate_block_info *pbi, rtx note, rtx insn)
2263 {
2264 rtx x = single_set (insn);
2265
2266 if (x)
2267 {
2268 rtx r = SET_SRC (x);
2269
2270 if (GET_CODE (r) == REG)
2271 {
2272 rtx call = XEXP (note, 0);
2273 rtx call_pat;
2274 int i;
2275
2276 /* Find the call insn. */
2277 while (call != insn && GET_CODE (call) != CALL_INSN)
2278 call = NEXT_INSN (call);
2279
2280 /* If there is none, do nothing special,
2281 since ordinary death handling can understand these insns. */
2282 if (call == insn)
2283 return 0;
2284
2285 /* See if the hard reg holding the value is dead.
2286 If this is a PARALLEL, find the call within it. */
2287 call_pat = PATTERN (call);
2288 if (GET_CODE (call_pat) == PARALLEL)
2289 {
2290 for (i = XVECLEN (call_pat, 0) - 1; i >= 0; i--)
2291 if (GET_CODE (XVECEXP (call_pat, 0, i)) == SET
2292 && GET_CODE (SET_SRC (XVECEXP (call_pat, 0, i))) == CALL)
2293 break;
2294
2295 /* This may be a library call that is returning a value
2296 via invisible pointer. Do nothing special, since
2297 ordinary death handling can understand these insns. */
2298 if (i < 0)
2299 return 0;
2300
2301 call_pat = XVECEXP (call_pat, 0, i);
2302 }
2303
2304 return insn_dead_p (pbi, call_pat, 1, REG_NOTES (call));
2305 }
2306 }
2307 return 1;
2308 }
2309
2310 /* Return 1 if register REGNO was used before it was set, i.e. if it is
2311 live at function entry. Don't count global register variables, variables
2312 in registers that can be used for function arg passing, or variables in
2313 fixed hard registers. */
2314
2315 int
2316 regno_uninitialized (unsigned int regno)
2317 {
2318 if (n_basic_blocks == 0
2319 || (regno < FIRST_PSEUDO_REGISTER
2320 && (global_regs[regno]
2321 || fixed_regs[regno]
2322 || FUNCTION_ARG_REGNO_P (regno))))
2323 return 0;
2324
2325 return REGNO_REG_SET_P (ENTRY_BLOCK_PTR->global_live_at_end, regno);
2326 }
2327
2328 /* 1 if register REGNO was alive at a place where `setjmp' was called
2329 and was set more than once or is an argument.
2330 Such regs may be clobbered by `longjmp'. */
2331
2332 int
2333 regno_clobbered_at_setjmp (int regno)
2334 {
2335 if (n_basic_blocks == 0)
2336 return 0;
2337
2338 return ((REG_N_SETS (regno) > 1
2339 || REGNO_REG_SET_P (ENTRY_BLOCK_PTR->global_live_at_end, regno))
2340 && REGNO_REG_SET_P (regs_live_at_setjmp, regno));
2341 }
2342 \f
2343 /* Add MEM to PBI->MEM_SET_LIST. MEM should be canonical. Respect the
2344 maximal list size; look for overlaps in mode and select the largest. */
2345 static void
2346 add_to_mem_set_list (struct propagate_block_info *pbi, rtx mem)
2347 {
2348 rtx i;
2349
2350 /* We don't know how large a BLKmode store is, so we must not
2351 take them into consideration. */
2352 if (GET_MODE (mem) == BLKmode)
2353 return;
2354
2355 for (i = pbi->mem_set_list; i ; i = XEXP (i, 1))
2356 {
2357 rtx e = XEXP (i, 0);
2358 if (rtx_equal_p (XEXP (mem, 0), XEXP (e, 0)))
2359 {
2360 if (GET_MODE_SIZE (GET_MODE (mem)) > GET_MODE_SIZE (GET_MODE (e)))
2361 {
2362 #ifdef AUTO_INC_DEC
2363 /* If we must store a copy of the mem, we can just modify
2364 the mode of the stored copy. */
2365 if (pbi->flags & PROP_AUTOINC)
2366 PUT_MODE (e, GET_MODE (mem));
2367 else
2368 #endif
2369 XEXP (i, 0) = mem;
2370 }
2371 return;
2372 }
2373 }
2374
2375 if (pbi->mem_set_list_len < MAX_MEM_SET_LIST_LEN)
2376 {
2377 #ifdef AUTO_INC_DEC
2378 /* Store a copy of mem, otherwise the address may be
2379 scrogged by find_auto_inc. */
2380 if (pbi->flags & PROP_AUTOINC)
2381 mem = shallow_copy_rtx (mem);
2382 #endif
2383 pbi->mem_set_list = alloc_EXPR_LIST (0, mem, pbi->mem_set_list);
2384 pbi->mem_set_list_len++;
2385 }
2386 }
2387
2388 /* INSN references memory, possibly using autoincrement addressing modes.
2389 Find any entries on the mem_set_list that need to be invalidated due
2390 to an address change. */
2391
2392 static int
2393 invalidate_mems_from_autoinc (rtx *px, void *data)
2394 {
2395 rtx x = *px;
2396 struct propagate_block_info *pbi = data;
2397
2398 if (GET_RTX_CLASS (GET_CODE (x)) == 'a')
2399 {
2400 invalidate_mems_from_set (pbi, XEXP (x, 0));
2401 return -1;
2402 }
2403
2404 return 0;
2405 }
2406
2407 /* EXP is a REG. Remove any dependent entries from pbi->mem_set_list. */
2408
2409 static void
2410 invalidate_mems_from_set (struct propagate_block_info *pbi, rtx exp)
2411 {
2412 rtx temp = pbi->mem_set_list;
2413 rtx prev = NULL_RTX;
2414 rtx next;
2415
2416 while (temp)
2417 {
2418 next = XEXP (temp, 1);
2419 if (reg_overlap_mentioned_p (exp, XEXP (temp, 0)))
2420 {
2421 /* Splice this entry out of the list. */
2422 if (prev)
2423 XEXP (prev, 1) = next;
2424 else
2425 pbi->mem_set_list = next;
2426 free_EXPR_LIST_node (temp);
2427 pbi->mem_set_list_len--;
2428 }
2429 else
2430 prev = temp;
2431 temp = next;
2432 }
2433 }
2434
2435 /* Process the registers that are set within X. Their bits are set to
2436 1 in the regset DEAD, because they are dead prior to this insn.
2437
2438 If INSN is nonzero, it is the insn being processed.
2439
2440 FLAGS is the set of operations to perform. */
2441
2442 static void
2443 mark_set_regs (struct propagate_block_info *pbi, rtx x, rtx insn)
2444 {
2445 rtx cond = NULL_RTX;
2446 rtx link;
2447 enum rtx_code code;
2448 int flags = pbi->flags;
2449
2450 if (insn)
2451 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
2452 {
2453 if (REG_NOTE_KIND (link) == REG_INC)
2454 mark_set_1 (pbi, SET, XEXP (link, 0),
2455 (GET_CODE (x) == COND_EXEC
2456 ? COND_EXEC_TEST (x) : NULL_RTX),
2457 insn, flags);
2458 }
2459 retry:
2460 switch (code = GET_CODE (x))
2461 {
2462 case SET:
2463 if (GET_CODE (XEXP (x, 1)) == ASM_OPERANDS)
2464 flags |= PROP_ASM_SCAN;
2465 /* Fall thru */
2466 case CLOBBER:
2467 mark_set_1 (pbi, code, SET_DEST (x), cond, insn, flags);
2468 return;
2469
2470 case COND_EXEC:
2471 cond = COND_EXEC_TEST (x);
2472 x = COND_EXEC_CODE (x);
2473 goto retry;
2474
2475 case PARALLEL:
2476 {
2477 int i;
2478
2479 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
2480 {
2481 rtx sub = XVECEXP (x, 0, i);
2482 switch (code = GET_CODE (sub))
2483 {
2484 case COND_EXEC:
2485 if (cond != NULL_RTX)
2486 abort ();
2487
2488 cond = COND_EXEC_TEST (sub);
2489 sub = COND_EXEC_CODE (sub);
2490 if (GET_CODE (sub) == SET)
2491 goto mark_set;
2492 if (GET_CODE (sub) == CLOBBER)
2493 goto mark_clob;
2494 break;
2495
2496 case SET:
2497 mark_set:
2498 if (GET_CODE (XEXP (sub, 1)) == ASM_OPERANDS)
2499 flags |= PROP_ASM_SCAN;
2500 /* Fall thru */
2501 case CLOBBER:
2502 mark_clob:
2503 mark_set_1 (pbi, code, SET_DEST (sub), cond, insn, flags);
2504 break;
2505
2506 default:
2507 break;
2508 }
2509 }
2510 break;
2511 }
2512
2513 default:
2514 break;
2515 }
2516 }
2517
2518 /* Process a single set, which appears in INSN. REG (which may not
2519 actually be a REG, it may also be a SUBREG, PARALLEL, etc.) is
2520 being set using the CODE (which may be SET, CLOBBER, or COND_EXEC).
2521 If the set is conditional (because it appear in a COND_EXEC), COND
2522 will be the condition. */
2523
2524 static void
2525 mark_set_1 (struct propagate_block_info *pbi, enum rtx_code code, rtx reg, rtx cond, rtx insn, int flags)
2526 {
2527 int regno_first = -1, regno_last = -1;
2528 unsigned long not_dead = 0;
2529 int i;
2530
2531 /* Modifying just one hardware register of a multi-reg value or just a
2532 byte field of a register does not mean the value from before this insn
2533 is now dead. Of course, if it was dead after it's unused now. */
2534
2535 switch (GET_CODE (reg))
2536 {
2537 case PARALLEL:
2538 /* Some targets place small structures in registers for return values of
2539 functions. We have to detect this case specially here to get correct
2540 flow information. */
2541 for (i = XVECLEN (reg, 0) - 1; i >= 0; i--)
2542 if (XEXP (XVECEXP (reg, 0, i), 0) != 0)
2543 mark_set_1 (pbi, code, XEXP (XVECEXP (reg, 0, i), 0), cond, insn,
2544 flags);
2545 return;
2546
2547 case ZERO_EXTRACT:
2548 case SIGN_EXTRACT:
2549 case STRICT_LOW_PART:
2550 /* ??? Assumes STRICT_LOW_PART not used on multi-word registers. */
2551 do
2552 reg = XEXP (reg, 0);
2553 while (GET_CODE (reg) == SUBREG
2554 || GET_CODE (reg) == ZERO_EXTRACT
2555 || GET_CODE (reg) == SIGN_EXTRACT
2556 || GET_CODE (reg) == STRICT_LOW_PART);
2557 if (GET_CODE (reg) == MEM)
2558 break;
2559 not_dead = (unsigned long) REGNO_REG_SET_P (pbi->reg_live, REGNO (reg));
2560 /* Fall through. */
2561
2562 case REG:
2563 regno_last = regno_first = REGNO (reg);
2564 if (regno_first < FIRST_PSEUDO_REGISTER)
2565 regno_last += HARD_REGNO_NREGS (regno_first, GET_MODE (reg)) - 1;
2566 break;
2567
2568 case SUBREG:
2569 if (GET_CODE (SUBREG_REG (reg)) == REG)
2570 {
2571 enum machine_mode outer_mode = GET_MODE (reg);
2572 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (reg));
2573
2574 /* Identify the range of registers affected. This is moderately
2575 tricky for hard registers. See alter_subreg. */
2576
2577 regno_last = regno_first = REGNO (SUBREG_REG (reg));
2578 if (regno_first < FIRST_PSEUDO_REGISTER)
2579 {
2580 regno_first += subreg_regno_offset (regno_first, inner_mode,
2581 SUBREG_BYTE (reg),
2582 outer_mode);
2583 regno_last = (regno_first
2584 + HARD_REGNO_NREGS (regno_first, outer_mode) - 1);
2585
2586 /* Since we've just adjusted the register number ranges, make
2587 sure REG matches. Otherwise some_was_live will be clear
2588 when it shouldn't have been, and we'll create incorrect
2589 REG_UNUSED notes. */
2590 reg = gen_rtx_REG (outer_mode, regno_first);
2591 }
2592 else
2593 {
2594 /* If the number of words in the subreg is less than the number
2595 of words in the full register, we have a well-defined partial
2596 set. Otherwise the high bits are undefined.
2597
2598 This is only really applicable to pseudos, since we just took
2599 care of multi-word hard registers. */
2600 if (((GET_MODE_SIZE (outer_mode)
2601 + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
2602 < ((GET_MODE_SIZE (inner_mode)
2603 + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
2604 not_dead = (unsigned long) REGNO_REG_SET_P (pbi->reg_live,
2605 regno_first);
2606
2607 reg = SUBREG_REG (reg);
2608 }
2609 }
2610 else
2611 reg = SUBREG_REG (reg);
2612 break;
2613
2614 default:
2615 break;
2616 }
2617
2618 /* If this set is a MEM, then it kills any aliased writes.
2619 If this set is a REG, then it kills any MEMs which use the reg. */
2620 if (optimize && (flags & PROP_SCAN_DEAD_STORES))
2621 {
2622 if (GET_CODE (reg) == REG)
2623 invalidate_mems_from_set (pbi, reg);
2624
2625 /* If the memory reference had embedded side effects (autoincrement
2626 address modes. Then we may need to kill some entries on the
2627 memory set list. */
2628 if (insn && GET_CODE (reg) == MEM)
2629 for_each_rtx (&PATTERN (insn), invalidate_mems_from_autoinc, pbi);
2630
2631 if (GET_CODE (reg) == MEM && ! side_effects_p (reg)
2632 /* ??? With more effort we could track conditional memory life. */
2633 && ! cond)
2634 add_to_mem_set_list (pbi, canon_rtx (reg));
2635 }
2636
2637 if (GET_CODE (reg) == REG
2638 && ! (regno_first == FRAME_POINTER_REGNUM
2639 && (! reload_completed || frame_pointer_needed))
2640 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
2641 && ! (regno_first == HARD_FRAME_POINTER_REGNUM
2642 && (! reload_completed || frame_pointer_needed))
2643 #endif
2644 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
2645 && ! (regno_first == ARG_POINTER_REGNUM && fixed_regs[regno_first])
2646 #endif
2647 )
2648 {
2649 int some_was_live = 0, some_was_dead = 0;
2650
2651 for (i = regno_first; i <= regno_last; ++i)
2652 {
2653 int needed_regno = REGNO_REG_SET_P (pbi->reg_live, i);
2654 if (pbi->local_set)
2655 {
2656 /* Order of the set operation matters here since both
2657 sets may be the same. */
2658 CLEAR_REGNO_REG_SET (pbi->cond_local_set, i);
2659 if (cond != NULL_RTX
2660 && ! REGNO_REG_SET_P (pbi->local_set, i))
2661 SET_REGNO_REG_SET (pbi->cond_local_set, i);
2662 else
2663 SET_REGNO_REG_SET (pbi->local_set, i);
2664 }
2665 if (code != CLOBBER)
2666 SET_REGNO_REG_SET (pbi->new_set, i);
2667
2668 some_was_live |= needed_regno;
2669 some_was_dead |= ! needed_regno;
2670 }
2671
2672 #ifdef HAVE_conditional_execution
2673 /* Consider conditional death in deciding that the register needs
2674 a death note. */
2675 if (some_was_live && ! not_dead
2676 /* The stack pointer is never dead. Well, not strictly true,
2677 but it's very difficult to tell from here. Hopefully
2678 combine_stack_adjustments will fix up the most egregious
2679 errors. */
2680 && regno_first != STACK_POINTER_REGNUM)
2681 {
2682 for (i = regno_first; i <= regno_last; ++i)
2683 if (! mark_regno_cond_dead (pbi, i, cond))
2684 not_dead |= ((unsigned long) 1) << (i - regno_first);
2685 }
2686 #endif
2687
2688 /* Additional data to record if this is the final pass. */
2689 if (flags & (PROP_LOG_LINKS | PROP_REG_INFO
2690 | PROP_DEATH_NOTES | PROP_AUTOINC))
2691 {
2692 rtx y;
2693 int blocknum = pbi->bb->index;
2694
2695 y = NULL_RTX;
2696 if (flags & (PROP_LOG_LINKS | PROP_AUTOINC))
2697 {
2698 y = pbi->reg_next_use[regno_first];
2699
2700 /* The next use is no longer next, since a store intervenes. */
2701 for (i = regno_first; i <= regno_last; ++i)
2702 pbi->reg_next_use[i] = 0;
2703 }
2704
2705 if (flags & PROP_REG_INFO)
2706 {
2707 for (i = regno_first; i <= regno_last; ++i)
2708 {
2709 /* Count (weighted) references, stores, etc. This counts a
2710 register twice if it is modified, but that is correct. */
2711 REG_N_SETS (i) += 1;
2712 REG_N_REFS (i) += 1;
2713 REG_FREQ (i) += REG_FREQ_FROM_BB (pbi->bb);
2714
2715 /* The insns where a reg is live are normally counted
2716 elsewhere, but we want the count to include the insn
2717 where the reg is set, and the normal counting mechanism
2718 would not count it. */
2719 REG_LIVE_LENGTH (i) += 1;
2720 }
2721
2722 /* If this is a hard reg, record this function uses the reg. */
2723 if (regno_first < FIRST_PSEUDO_REGISTER)
2724 {
2725 for (i = regno_first; i <= regno_last; i++)
2726 regs_ever_live[i] = 1;
2727 if (flags & PROP_ASM_SCAN)
2728 for (i = regno_first; i <= regno_last; i++)
2729 regs_asm_clobbered[i] = 1;
2730 }
2731 else
2732 {
2733 /* Keep track of which basic blocks each reg appears in. */
2734 if (REG_BASIC_BLOCK (regno_first) == REG_BLOCK_UNKNOWN)
2735 REG_BASIC_BLOCK (regno_first) = blocknum;
2736 else if (REG_BASIC_BLOCK (regno_first) != blocknum)
2737 REG_BASIC_BLOCK (regno_first) = REG_BLOCK_GLOBAL;
2738 }
2739 }
2740
2741 if (! some_was_dead)
2742 {
2743 if (flags & PROP_LOG_LINKS)
2744 {
2745 /* Make a logical link from the next following insn
2746 that uses this register, back to this insn.
2747 The following insns have already been processed.
2748
2749 We don't build a LOG_LINK for hard registers containing
2750 in ASM_OPERANDs. If these registers get replaced,
2751 we might wind up changing the semantics of the insn,
2752 even if reload can make what appear to be valid
2753 assignments later. */
2754 if (y && (BLOCK_NUM (y) == blocknum)
2755 && (regno_first >= FIRST_PSEUDO_REGISTER
2756 || asm_noperands (PATTERN (y)) < 0))
2757 LOG_LINKS (y) = alloc_INSN_LIST (insn, LOG_LINKS (y));
2758 }
2759 }
2760 else if (not_dead)
2761 ;
2762 else if (! some_was_live)
2763 {
2764 if (flags & PROP_REG_INFO)
2765 REG_N_DEATHS (regno_first) += 1;
2766
2767 if (flags & PROP_DEATH_NOTES)
2768 {
2769 /* Note that dead stores have already been deleted
2770 when possible. If we get here, we have found a
2771 dead store that cannot be eliminated (because the
2772 same insn does something useful). Indicate this
2773 by marking the reg being set as dying here. */
2774 REG_NOTES (insn)
2775 = alloc_EXPR_LIST (REG_UNUSED, reg, REG_NOTES (insn));
2776 }
2777 }
2778 else
2779 {
2780 if (flags & PROP_DEATH_NOTES)
2781 {
2782 /* This is a case where we have a multi-word hard register
2783 and some, but not all, of the words of the register are
2784 needed in subsequent insns. Write REG_UNUSED notes
2785 for those parts that were not needed. This case should
2786 be rare. */
2787
2788 for (i = regno_first; i <= regno_last; ++i)
2789 if (! REGNO_REG_SET_P (pbi->reg_live, i))
2790 REG_NOTES (insn)
2791 = alloc_EXPR_LIST (REG_UNUSED,
2792 regno_reg_rtx[i],
2793 REG_NOTES (insn));
2794 }
2795 }
2796 }
2797
2798 /* Mark the register as being dead. */
2799 if (some_was_live
2800 /* The stack pointer is never dead. Well, not strictly true,
2801 but it's very difficult to tell from here. Hopefully
2802 combine_stack_adjustments will fix up the most egregious
2803 errors. */
2804 && regno_first != STACK_POINTER_REGNUM)
2805 {
2806 for (i = regno_first; i <= regno_last; ++i)
2807 if (!(not_dead & (((unsigned long) 1) << (i - regno_first))))
2808 CLEAR_REGNO_REG_SET (pbi->reg_live, i);
2809 }
2810 }
2811 else if (GET_CODE (reg) == REG)
2812 {
2813 if (flags & (PROP_LOG_LINKS | PROP_AUTOINC))
2814 pbi->reg_next_use[regno_first] = 0;
2815
2816 if ((flags & PROP_REG_INFO) != 0
2817 && (flags & PROP_ASM_SCAN) != 0
2818 && regno_first < FIRST_PSEUDO_REGISTER)
2819 {
2820 for (i = regno_first; i <= regno_last; i++)
2821 regs_asm_clobbered[i] = 1;
2822 }
2823 }
2824
2825 /* If this is the last pass and this is a SCRATCH, show it will be dying
2826 here and count it. */
2827 else if (GET_CODE (reg) == SCRATCH)
2828 {
2829 if (flags & PROP_DEATH_NOTES)
2830 REG_NOTES (insn)
2831 = alloc_EXPR_LIST (REG_UNUSED, reg, REG_NOTES (insn));
2832 }
2833 }
2834 \f
2835 #ifdef HAVE_conditional_execution
2836 /* Mark REGNO conditionally dead.
2837 Return true if the register is now unconditionally dead. */
2838
2839 static int
2840 mark_regno_cond_dead (struct propagate_block_info *pbi, int regno, rtx cond)
2841 {
2842 /* If this is a store to a predicate register, the value of the
2843 predicate is changing, we don't know that the predicate as seen
2844 before is the same as that seen after. Flush all dependent
2845 conditions from reg_cond_dead. This will make all such
2846 conditionally live registers unconditionally live. */
2847 if (REGNO_REG_SET_P (pbi->reg_cond_reg, regno))
2848 flush_reg_cond_reg (pbi, regno);
2849
2850 /* If this is an unconditional store, remove any conditional
2851 life that may have existed. */
2852 if (cond == NULL_RTX)
2853 splay_tree_remove (pbi->reg_cond_dead, regno);
2854 else
2855 {
2856 splay_tree_node node;
2857 struct reg_cond_life_info *rcli;
2858 rtx ncond;
2859
2860 /* Otherwise this is a conditional set. Record that fact.
2861 It may have been conditionally used, or there may be a
2862 subsequent set with a complimentary condition. */
2863
2864 node = splay_tree_lookup (pbi->reg_cond_dead, regno);
2865 if (node == NULL)
2866 {
2867 /* The register was unconditionally live previously.
2868 Record the current condition as the condition under
2869 which it is dead. */
2870 rcli = xmalloc (sizeof (*rcli));
2871 rcli->condition = cond;
2872 rcli->stores = cond;
2873 rcli->orig_condition = const0_rtx;
2874 splay_tree_insert (pbi->reg_cond_dead, regno,
2875 (splay_tree_value) rcli);
2876
2877 SET_REGNO_REG_SET (pbi->reg_cond_reg, REGNO (XEXP (cond, 0)));
2878
2879 /* Not unconditionally dead. */
2880 return 0;
2881 }
2882 else
2883 {
2884 /* The register was conditionally live previously.
2885 Add the new condition to the old. */
2886 rcli = (struct reg_cond_life_info *) node->value;
2887 ncond = rcli->condition;
2888 ncond = ior_reg_cond (ncond, cond, 1);
2889 if (rcli->stores == const0_rtx)
2890 rcli->stores = cond;
2891 else if (rcli->stores != const1_rtx)
2892 rcli->stores = ior_reg_cond (rcli->stores, cond, 1);
2893
2894 /* If the register is now unconditionally dead, remove the entry
2895 in the splay_tree. A register is unconditionally dead if the
2896 dead condition ncond is true. A register is also unconditionally
2897 dead if the sum of all conditional stores is an unconditional
2898 store (stores is true), and the dead condition is identically the
2899 same as the original dead condition initialized at the end of
2900 the block. This is a pointer compare, not an rtx_equal_p
2901 compare. */
2902 if (ncond == const1_rtx
2903 || (ncond == rcli->orig_condition && rcli->stores == const1_rtx))
2904 splay_tree_remove (pbi->reg_cond_dead, regno);
2905 else
2906 {
2907 rcli->condition = ncond;
2908
2909 SET_REGNO_REG_SET (pbi->reg_cond_reg, REGNO (XEXP (cond, 0)));
2910
2911 /* Not unconditionally dead. */
2912 return 0;
2913 }
2914 }
2915 }
2916
2917 return 1;
2918 }
2919
2920 /* Called from splay_tree_delete for pbi->reg_cond_life. */
2921
2922 static void
2923 free_reg_cond_life_info (splay_tree_value value)
2924 {
2925 struct reg_cond_life_info *rcli = (struct reg_cond_life_info *) value;
2926 free (rcli);
2927 }
2928
2929 /* Helper function for flush_reg_cond_reg. */
2930
2931 static int
2932 flush_reg_cond_reg_1 (splay_tree_node node, void *data)
2933 {
2934 struct reg_cond_life_info *rcli;
2935 int *xdata = (int *) data;
2936 unsigned int regno = xdata[0];
2937
2938 /* Don't need to search if last flushed value was farther on in
2939 the in-order traversal. */
2940 if (xdata[1] >= (int) node->key)
2941 return 0;
2942
2943 /* Splice out portions of the expression that refer to regno. */
2944 rcli = (struct reg_cond_life_info *) node->value;
2945 rcli->condition = elim_reg_cond (rcli->condition, regno);
2946 if (rcli->stores != const0_rtx && rcli->stores != const1_rtx)
2947 rcli->stores = elim_reg_cond (rcli->stores, regno);
2948
2949 /* If the entire condition is now false, signal the node to be removed. */
2950 if (rcli->condition == const0_rtx)
2951 {
2952 xdata[1] = node->key;
2953 return -1;
2954 }
2955 else if (rcli->condition == const1_rtx)
2956 abort ();
2957
2958 return 0;
2959 }
2960
2961 /* Flush all (sub) expressions referring to REGNO from REG_COND_LIVE. */
2962
2963 static void
2964 flush_reg_cond_reg (struct propagate_block_info *pbi, int regno)
2965 {
2966 int pair[2];
2967
2968 pair[0] = regno;
2969 pair[1] = -1;
2970 while (splay_tree_foreach (pbi->reg_cond_dead,
2971 flush_reg_cond_reg_1, pair) == -1)
2972 splay_tree_remove (pbi->reg_cond_dead, pair[1]);
2973
2974 CLEAR_REGNO_REG_SET (pbi->reg_cond_reg, regno);
2975 }
2976
2977 /* Logical arithmetic on predicate conditions. IOR, NOT and AND.
2978 For ior/and, the ADD flag determines whether we want to add the new
2979 condition X to the old one unconditionally. If it is zero, we will
2980 only return a new expression if X allows us to simplify part of
2981 OLD, otherwise we return NULL to the caller.
2982 If ADD is nonzero, we will return a new condition in all cases. The
2983 toplevel caller of one of these functions should always pass 1 for
2984 ADD. */
2985
2986 static rtx
2987 ior_reg_cond (rtx old, rtx x, int add)
2988 {
2989 rtx op0, op1;
2990
2991 if (GET_RTX_CLASS (GET_CODE (old)) == '<')
2992 {
2993 if (GET_RTX_CLASS (GET_CODE (x)) == '<'
2994 && REVERSE_CONDEXEC_PREDICATES_P (GET_CODE (x), GET_CODE (old))
2995 && REGNO (XEXP (x, 0)) == REGNO (XEXP (old, 0)))
2996 return const1_rtx;
2997 if (GET_CODE (x) == GET_CODE (old)
2998 && REGNO (XEXP (x, 0)) == REGNO (XEXP (old, 0)))
2999 return old;
3000 if (! add)
3001 return NULL;
3002 return gen_rtx_IOR (0, old, x);
3003 }
3004
3005 switch (GET_CODE (old))
3006 {
3007 case IOR:
3008 op0 = ior_reg_cond (XEXP (old, 0), x, 0);
3009 op1 = ior_reg_cond (XEXP (old, 1), x, 0);
3010 if (op0 != NULL || op1 != NULL)
3011 {
3012 if (op0 == const0_rtx)
3013 return op1 ? op1 : gen_rtx_IOR (0, XEXP (old, 1), x);
3014 if (op1 == const0_rtx)
3015 return op0 ? op0 : gen_rtx_IOR (0, XEXP (old, 0), x);
3016 if (op0 == const1_rtx || op1 == const1_rtx)
3017 return const1_rtx;
3018 if (op0 == NULL)
3019 op0 = gen_rtx_IOR (0, XEXP (old, 0), x);
3020 else if (rtx_equal_p (x, op0))
3021 /* (x | A) | x ~ (x | A). */
3022 return old;
3023 if (op1 == NULL)
3024 op1 = gen_rtx_IOR (0, XEXP (old, 1), x);
3025 else if (rtx_equal_p (x, op1))
3026 /* (A | x) | x ~ (A | x). */
3027 return old;
3028 return gen_rtx_IOR (0, op0, op1);
3029 }
3030 if (! add)
3031 return NULL;
3032 return gen_rtx_IOR (0, old, x);
3033
3034 case AND:
3035 op0 = ior_reg_cond (XEXP (old, 0), x, 0);
3036 op1 = ior_reg_cond (XEXP (old, 1), x, 0);
3037 if (op0 != NULL || op1 != NULL)
3038 {
3039 if (op0 == const1_rtx)
3040 return op1 ? op1 : gen_rtx_IOR (0, XEXP (old, 1), x);
3041 if (op1 == const1_rtx)
3042 return op0 ? op0 : gen_rtx_IOR (0, XEXP (old, 0), x);
3043 if (op0 == const0_rtx || op1 == const0_rtx)
3044 return const0_rtx;
3045 if (op0 == NULL)
3046 op0 = gen_rtx_IOR (0, XEXP (old, 0), x);
3047 else if (rtx_equal_p (x, op0))
3048 /* (x & A) | x ~ x. */
3049 return op0;
3050 if (op1 == NULL)
3051 op1 = gen_rtx_IOR (0, XEXP (old, 1), x);
3052 else if (rtx_equal_p (x, op1))
3053 /* (A & x) | x ~ x. */
3054 return op1;
3055 return gen_rtx_AND (0, op0, op1);
3056 }
3057 if (! add)
3058 return NULL;
3059 return gen_rtx_IOR (0, old, x);
3060
3061 case NOT:
3062 op0 = and_reg_cond (XEXP (old, 0), not_reg_cond (x), 0);
3063 if (op0 != NULL)
3064 return not_reg_cond (op0);
3065 if (! add)
3066 return NULL;
3067 return gen_rtx_IOR (0, old, x);
3068
3069 default:
3070 abort ();
3071 }
3072 }
3073
3074 static rtx
3075 not_reg_cond (rtx x)
3076 {
3077 enum rtx_code x_code;
3078
3079 if (x == const0_rtx)
3080 return const1_rtx;
3081 else if (x == const1_rtx)
3082 return const0_rtx;
3083 x_code = GET_CODE (x);
3084 if (x_code == NOT)
3085 return XEXP (x, 0);
3086 if (GET_RTX_CLASS (x_code) == '<'
3087 && GET_CODE (XEXP (x, 0)) == REG)
3088 {
3089 if (XEXP (x, 1) != const0_rtx)
3090 abort ();
3091
3092 return gen_rtx_fmt_ee (reverse_condition (x_code),
3093 VOIDmode, XEXP (x, 0), const0_rtx);
3094 }
3095 return gen_rtx_NOT (0, x);
3096 }
3097
3098 static rtx
3099 and_reg_cond (rtx old, rtx x, int add)
3100 {
3101 rtx op0, op1;
3102
3103 if (GET_RTX_CLASS (GET_CODE (old)) == '<')
3104 {
3105 if (GET_RTX_CLASS (GET_CODE (x)) == '<'
3106 && GET_CODE (x) == reverse_condition (GET_CODE (old))
3107 && REGNO (XEXP (x, 0)) == REGNO (XEXP (old, 0)))
3108 return const0_rtx;
3109 if (GET_CODE (x) == GET_CODE (old)
3110 && REGNO (XEXP (x, 0)) == REGNO (XEXP (old, 0)))
3111 return old;
3112 if (! add)
3113 return NULL;
3114 return gen_rtx_AND (0, old, x);
3115 }
3116
3117 switch (GET_CODE (old))
3118 {
3119 case IOR:
3120 op0 = and_reg_cond (XEXP (old, 0), x, 0);
3121 op1 = and_reg_cond (XEXP (old, 1), x, 0);
3122 if (op0 != NULL || op1 != NULL)
3123 {
3124 if (op0 == const0_rtx)
3125 return op1 ? op1 : gen_rtx_AND (0, XEXP (old, 1), x);
3126 if (op1 == const0_rtx)
3127 return op0 ? op0 : gen_rtx_AND (0, XEXP (old, 0), x);
3128 if (op0 == const1_rtx || op1 == const1_rtx)
3129 return const1_rtx;
3130 if (op0 == NULL)
3131 op0 = gen_rtx_AND (0, XEXP (old, 0), x);
3132 else if (rtx_equal_p (x, op0))
3133 /* (x | A) & x ~ x. */
3134 return op0;
3135 if (op1 == NULL)
3136 op1 = gen_rtx_AND (0, XEXP (old, 1), x);
3137 else if (rtx_equal_p (x, op1))
3138 /* (A | x) & x ~ x. */
3139 return op1;
3140 return gen_rtx_IOR (0, op0, op1);
3141 }
3142 if (! add)
3143 return NULL;
3144 return gen_rtx_AND (0, old, x);
3145
3146 case AND:
3147 op0 = and_reg_cond (XEXP (old, 0), x, 0);
3148 op1 = and_reg_cond (XEXP (old, 1), x, 0);
3149 if (op0 != NULL || op1 != NULL)
3150 {
3151 if (op0 == const1_rtx)
3152 return op1 ? op1 : gen_rtx_AND (0, XEXP (old, 1), x);
3153 if (op1 == const1_rtx)
3154 return op0 ? op0 : gen_rtx_AND (0, XEXP (old, 0), x);
3155 if (op0 == const0_rtx || op1 == const0_rtx)
3156 return const0_rtx;
3157 if (op0 == NULL)
3158 op0 = gen_rtx_AND (0, XEXP (old, 0), x);
3159 else if (rtx_equal_p (x, op0))
3160 /* (x & A) & x ~ (x & A). */
3161 return old;
3162 if (op1 == NULL)
3163 op1 = gen_rtx_AND (0, XEXP (old, 1), x);
3164 else if (rtx_equal_p (x, op1))
3165 /* (A & x) & x ~ (A & x). */
3166 return old;
3167 return gen_rtx_AND (0, op0, op1);
3168 }
3169 if (! add)
3170 return NULL;
3171 return gen_rtx_AND (0, old, x);
3172
3173 case NOT:
3174 op0 = ior_reg_cond (XEXP (old, 0), not_reg_cond (x), 0);
3175 if (op0 != NULL)
3176 return not_reg_cond (op0);
3177 if (! add)
3178 return NULL;
3179 return gen_rtx_AND (0, old, x);
3180
3181 default:
3182 abort ();
3183 }
3184 }
3185
3186 /* Given a condition X, remove references to reg REGNO and return the
3187 new condition. The removal will be done so that all conditions
3188 involving REGNO are considered to evaluate to false. This function
3189 is used when the value of REGNO changes. */
3190
3191 static rtx
3192 elim_reg_cond (rtx x, unsigned int regno)
3193 {
3194 rtx op0, op1;
3195
3196 if (GET_RTX_CLASS (GET_CODE (x)) == '<')
3197 {
3198 if (REGNO (XEXP (x, 0)) == regno)
3199 return const0_rtx;
3200 return x;
3201 }
3202
3203 switch (GET_CODE (x))
3204 {
3205 case AND:
3206 op0 = elim_reg_cond (XEXP (x, 0), regno);
3207 op1 = elim_reg_cond (XEXP (x, 1), regno);
3208 if (op0 == const0_rtx || op1 == const0_rtx)
3209 return const0_rtx;
3210 if (op0 == const1_rtx)
3211 return op1;
3212 if (op1 == const1_rtx)
3213 return op0;
3214 if (op0 == XEXP (x, 0) && op1 == XEXP (x, 1))
3215 return x;
3216 return gen_rtx_AND (0, op0, op1);
3217
3218 case IOR:
3219 op0 = elim_reg_cond (XEXP (x, 0), regno);
3220 op1 = elim_reg_cond (XEXP (x, 1), regno);
3221 if (op0 == const1_rtx || op1 == const1_rtx)
3222 return const1_rtx;
3223 if (op0 == const0_rtx)
3224 return op1;
3225 if (op1 == const0_rtx)
3226 return op0;
3227 if (op0 == XEXP (x, 0) && op1 == XEXP (x, 1))
3228 return x;
3229 return gen_rtx_IOR (0, op0, op1);
3230
3231 case NOT:
3232 op0 = elim_reg_cond (XEXP (x, 0), regno);
3233 if (op0 == const0_rtx)
3234 return const1_rtx;
3235 if (op0 == const1_rtx)
3236 return const0_rtx;
3237 if (op0 != XEXP (x, 0))
3238 return not_reg_cond (op0);
3239 return x;
3240
3241 default:
3242 abort ();
3243 }
3244 }
3245 #endif /* HAVE_conditional_execution */
3246 \f
3247 #ifdef AUTO_INC_DEC
3248
3249 /* Try to substitute the auto-inc expression INC as the address inside
3250 MEM which occurs in INSN. Currently, the address of MEM is an expression
3251 involving INCR_REG, and INCR is the next use of INCR_REG; it is an insn
3252 that has a single set whose source is a PLUS of INCR_REG and something
3253 else. */
3254
3255 static void
3256 attempt_auto_inc (struct propagate_block_info *pbi, rtx inc, rtx insn,
3257 rtx mem, rtx incr, rtx incr_reg)
3258 {
3259 int regno = REGNO (incr_reg);
3260 rtx set = single_set (incr);
3261 rtx q = SET_DEST (set);
3262 rtx y = SET_SRC (set);
3263 int opnum = XEXP (y, 0) == incr_reg ? 0 : 1;
3264
3265 /* Make sure this reg appears only once in this insn. */
3266 if (count_occurrences (PATTERN (insn), incr_reg, 1) != 1)
3267 return;
3268
3269 if (dead_or_set_p (incr, incr_reg)
3270 /* Mustn't autoinc an eliminable register. */
3271 && (regno >= FIRST_PSEUDO_REGISTER
3272 || ! TEST_HARD_REG_BIT (elim_reg_set, regno)))
3273 {
3274 /* This is the simple case. Try to make the auto-inc. If
3275 we can't, we are done. Otherwise, we will do any
3276 needed updates below. */
3277 if (! validate_change (insn, &XEXP (mem, 0), inc, 0))
3278 return;
3279 }
3280 else if (GET_CODE (q) == REG
3281 /* PREV_INSN used here to check the semi-open interval
3282 [insn,incr). */
3283 && ! reg_used_between_p (q, PREV_INSN (insn), incr)
3284 /* We must also check for sets of q as q may be
3285 a call clobbered hard register and there may
3286 be a call between PREV_INSN (insn) and incr. */
3287 && ! reg_set_between_p (q, PREV_INSN (insn), incr))
3288 {
3289 /* We have *p followed sometime later by q = p+size.
3290 Both p and q must be live afterward,
3291 and q is not used between INSN and its assignment.
3292 Change it to q = p, ...*q..., q = q+size.
3293 Then fall into the usual case. */
3294 rtx insns, temp;
3295
3296 start_sequence ();
3297 emit_move_insn (q, incr_reg);
3298 insns = get_insns ();
3299 end_sequence ();
3300
3301 /* If we can't make the auto-inc, or can't make the
3302 replacement into Y, exit. There's no point in making
3303 the change below if we can't do the auto-inc and doing
3304 so is not correct in the pre-inc case. */
3305
3306 XEXP (inc, 0) = q;
3307 validate_change (insn, &XEXP (mem, 0), inc, 1);
3308 validate_change (incr, &XEXP (y, opnum), q, 1);
3309 if (! apply_change_group ())
3310 return;
3311
3312 /* We now know we'll be doing this change, so emit the
3313 new insn(s) and do the updates. */
3314 emit_insn_before (insns, insn);
3315
3316 if (BB_HEAD (pbi->bb) == insn)
3317 BB_HEAD (pbi->bb) = insns;
3318
3319 /* INCR will become a NOTE and INSN won't contain a
3320 use of INCR_REG. If a use of INCR_REG was just placed in
3321 the insn before INSN, make that the next use.
3322 Otherwise, invalidate it. */
3323 if (GET_CODE (PREV_INSN (insn)) == INSN
3324 && GET_CODE (PATTERN (PREV_INSN (insn))) == SET
3325 && SET_SRC (PATTERN (PREV_INSN (insn))) == incr_reg)
3326 pbi->reg_next_use[regno] = PREV_INSN (insn);
3327 else
3328 pbi->reg_next_use[regno] = 0;
3329
3330 incr_reg = q;
3331 regno = REGNO (q);
3332
3333 /* REGNO is now used in INCR which is below INSN, but
3334 it previously wasn't live here. If we don't mark
3335 it as live, we'll put a REG_DEAD note for it
3336 on this insn, which is incorrect. */
3337 SET_REGNO_REG_SET (pbi->reg_live, regno);
3338
3339 /* If there are any calls between INSN and INCR, show
3340 that REGNO now crosses them. */
3341 for (temp = insn; temp != incr; temp = NEXT_INSN (temp))
3342 if (GET_CODE (temp) == CALL_INSN)
3343 REG_N_CALLS_CROSSED (regno)++;
3344
3345 /* Invalidate alias info for Q since we just changed its value. */
3346 clear_reg_alias_info (q);
3347 }
3348 else
3349 return;
3350
3351 /* If we haven't returned, it means we were able to make the
3352 auto-inc, so update the status. First, record that this insn
3353 has an implicit side effect. */
3354
3355 REG_NOTES (insn) = alloc_EXPR_LIST (REG_INC, incr_reg, REG_NOTES (insn));
3356
3357 /* Modify the old increment-insn to simply copy
3358 the already-incremented value of our register. */
3359 if (! validate_change (incr, &SET_SRC (set), incr_reg, 0))
3360 abort ();
3361
3362 /* If that makes it a no-op (copying the register into itself) delete
3363 it so it won't appear to be a "use" and a "set" of this
3364 register. */
3365 if (REGNO (SET_DEST (set)) == REGNO (incr_reg))
3366 {
3367 /* If the original source was dead, it's dead now. */
3368 rtx note;
3369
3370 while ((note = find_reg_note (incr, REG_DEAD, NULL_RTX)) != NULL_RTX)
3371 {
3372 remove_note (incr, note);
3373 if (XEXP (note, 0) != incr_reg)
3374 CLEAR_REGNO_REG_SET (pbi->reg_live, REGNO (XEXP (note, 0)));
3375 }
3376
3377 PUT_CODE (incr, NOTE);
3378 NOTE_LINE_NUMBER (incr) = NOTE_INSN_DELETED;
3379 NOTE_SOURCE_FILE (incr) = 0;
3380 }
3381
3382 if (regno >= FIRST_PSEUDO_REGISTER)
3383 {
3384 /* Count an extra reference to the reg. When a reg is
3385 incremented, spilling it is worse, so we want to make
3386 that less likely. */
3387 REG_FREQ (regno) += REG_FREQ_FROM_BB (pbi->bb);
3388
3389 /* Count the increment as a setting of the register,
3390 even though it isn't a SET in rtl. */
3391 REG_N_SETS (regno)++;
3392 }
3393 }
3394
3395 /* X is a MEM found in INSN. See if we can convert it into an auto-increment
3396 reference. */
3397
3398 static void
3399 find_auto_inc (struct propagate_block_info *pbi, rtx x, rtx insn)
3400 {
3401 rtx addr = XEXP (x, 0);
3402 HOST_WIDE_INT offset = 0;
3403 rtx set, y, incr, inc_val;
3404 int regno;
3405 int size = GET_MODE_SIZE (GET_MODE (x));
3406
3407 if (GET_CODE (insn) == JUMP_INSN)
3408 return;
3409
3410 /* Here we detect use of an index register which might be good for
3411 postincrement, postdecrement, preincrement, or predecrement. */
3412
3413 if (GET_CODE (addr) == PLUS && GET_CODE (XEXP (addr, 1)) == CONST_INT)
3414 offset = INTVAL (XEXP (addr, 1)), addr = XEXP (addr, 0);
3415
3416 if (GET_CODE (addr) != REG)
3417 return;
3418
3419 regno = REGNO (addr);
3420
3421 /* Is the next use an increment that might make auto-increment? */
3422 incr = pbi->reg_next_use[regno];
3423 if (incr == 0 || BLOCK_NUM (incr) != BLOCK_NUM (insn))
3424 return;
3425 set = single_set (incr);
3426 if (set == 0 || GET_CODE (set) != SET)
3427 return;
3428 y = SET_SRC (set);
3429
3430 if (GET_CODE (y) != PLUS)
3431 return;
3432
3433 if (REG_P (XEXP (y, 0)) && REGNO (XEXP (y, 0)) == REGNO (addr))
3434 inc_val = XEXP (y, 1);
3435 else if (REG_P (XEXP (y, 1)) && REGNO (XEXP (y, 1)) == REGNO (addr))
3436 inc_val = XEXP (y, 0);
3437 else
3438 return;
3439
3440 if (GET_CODE (inc_val) == CONST_INT)
3441 {
3442 if (HAVE_POST_INCREMENT
3443 && (INTVAL (inc_val) == size && offset == 0))
3444 attempt_auto_inc (pbi, gen_rtx_POST_INC (Pmode, addr), insn, x,
3445 incr, addr);
3446 else if (HAVE_POST_DECREMENT
3447 && (INTVAL (inc_val) == -size && offset == 0))
3448 attempt_auto_inc (pbi, gen_rtx_POST_DEC (Pmode, addr), insn, x,
3449 incr, addr);
3450 else if (HAVE_PRE_INCREMENT
3451 && (INTVAL (inc_val) == size && offset == size))
3452 attempt_auto_inc (pbi, gen_rtx_PRE_INC (Pmode, addr), insn, x,
3453 incr, addr);
3454 else if (HAVE_PRE_DECREMENT
3455 && (INTVAL (inc_val) == -size && offset == -size))
3456 attempt_auto_inc (pbi, gen_rtx_PRE_DEC (Pmode, addr), insn, x,
3457 incr, addr);
3458 else if (HAVE_POST_MODIFY_DISP && offset == 0)
3459 attempt_auto_inc (pbi, gen_rtx_POST_MODIFY (Pmode, addr,
3460 gen_rtx_PLUS (Pmode,
3461 addr,
3462 inc_val)),
3463 insn, x, incr, addr);
3464 else if (HAVE_PRE_MODIFY_DISP && offset == INTVAL (inc_val))
3465 attempt_auto_inc (pbi, gen_rtx_PRE_MODIFY (Pmode, addr,
3466 gen_rtx_PLUS (Pmode,
3467 addr,
3468 inc_val)),
3469 insn, x, incr, addr);
3470 }
3471 else if (GET_CODE (inc_val) == REG
3472 && ! reg_set_between_p (inc_val, PREV_INSN (insn),
3473 NEXT_INSN (incr)))
3474
3475 {
3476 if (HAVE_POST_MODIFY_REG && offset == 0)
3477 attempt_auto_inc (pbi, gen_rtx_POST_MODIFY (Pmode, addr,
3478 gen_rtx_PLUS (Pmode,
3479 addr,
3480 inc_val)),
3481 insn, x, incr, addr);
3482 }
3483 }
3484
3485 #endif /* AUTO_INC_DEC */
3486 \f
3487 static void
3488 mark_used_reg (struct propagate_block_info *pbi, rtx reg,
3489 rtx cond ATTRIBUTE_UNUSED, rtx insn)
3490 {
3491 unsigned int regno_first, regno_last, i;
3492 int some_was_live, some_was_dead, some_not_set;
3493
3494 regno_last = regno_first = REGNO (reg);
3495 if (regno_first < FIRST_PSEUDO_REGISTER)
3496 regno_last += HARD_REGNO_NREGS (regno_first, GET_MODE (reg)) - 1;
3497
3498 /* Find out if any of this register is live after this instruction. */
3499 some_was_live = some_was_dead = 0;
3500 for (i = regno_first; i <= regno_last; ++i)
3501 {
3502 int needed_regno = REGNO_REG_SET_P (pbi->reg_live, i);
3503 some_was_live |= needed_regno;
3504 some_was_dead |= ! needed_regno;
3505 }
3506
3507 /* Find out if any of the register was set this insn. */
3508 some_not_set = 0;
3509 for (i = regno_first; i <= regno_last; ++i)
3510 some_not_set |= ! REGNO_REG_SET_P (pbi->new_set, i);
3511
3512 if (pbi->flags & (PROP_LOG_LINKS | PROP_AUTOINC))
3513 {
3514 /* Record where each reg is used, so when the reg is set we know
3515 the next insn that uses it. */
3516 pbi->reg_next_use[regno_first] = insn;
3517 }
3518
3519 if (pbi->flags & PROP_REG_INFO)
3520 {
3521 if (regno_first < FIRST_PSEUDO_REGISTER)
3522 {
3523 /* If this is a register we are going to try to eliminate,
3524 don't mark it live here. If we are successful in
3525 eliminating it, it need not be live unless it is used for
3526 pseudos, in which case it will have been set live when it
3527 was allocated to the pseudos. If the register will not
3528 be eliminated, reload will set it live at that point.
3529
3530 Otherwise, record that this function uses this register. */
3531 /* ??? The PPC backend tries to "eliminate" on the pic
3532 register to itself. This should be fixed. In the mean
3533 time, hack around it. */
3534
3535 if (! (TEST_HARD_REG_BIT (elim_reg_set, regno_first)
3536 && (regno_first == FRAME_POINTER_REGNUM
3537 || regno_first == ARG_POINTER_REGNUM)))
3538 for (i = regno_first; i <= regno_last; ++i)
3539 regs_ever_live[i] = 1;
3540 }
3541 else
3542 {
3543 /* Keep track of which basic block each reg appears in. */
3544
3545 int blocknum = pbi->bb->index;
3546 if (REG_BASIC_BLOCK (regno_first) == REG_BLOCK_UNKNOWN)
3547 REG_BASIC_BLOCK (regno_first) = blocknum;
3548 else if (REG_BASIC_BLOCK (regno_first) != blocknum)
3549 REG_BASIC_BLOCK (regno_first) = REG_BLOCK_GLOBAL;
3550
3551 /* Count (weighted) number of uses of each reg. */
3552 REG_FREQ (regno_first) += REG_FREQ_FROM_BB (pbi->bb);
3553 REG_N_REFS (regno_first)++;
3554 }
3555 }
3556
3557 /* Record and count the insns in which a reg dies. If it is used in
3558 this insn and was dead below the insn then it dies in this insn.
3559 If it was set in this insn, we do not make a REG_DEAD note;
3560 likewise if we already made such a note. */
3561 if ((pbi->flags & (PROP_DEATH_NOTES | PROP_REG_INFO))
3562 && some_was_dead
3563 && some_not_set)
3564 {
3565 /* Check for the case where the register dying partially
3566 overlaps the register set by this insn. */
3567 if (regno_first != regno_last)
3568 for (i = regno_first; i <= regno_last; ++i)
3569 some_was_live |= REGNO_REG_SET_P (pbi->new_set, i);
3570
3571 /* If none of the words in X is needed, make a REG_DEAD note.
3572 Otherwise, we must make partial REG_DEAD notes. */
3573 if (! some_was_live)
3574 {
3575 if ((pbi->flags & PROP_DEATH_NOTES)
3576 && ! find_regno_note (insn, REG_DEAD, regno_first))
3577 REG_NOTES (insn)
3578 = alloc_EXPR_LIST (REG_DEAD, reg, REG_NOTES (insn));
3579
3580 if (pbi->flags & PROP_REG_INFO)
3581 REG_N_DEATHS (regno_first)++;
3582 }
3583 else
3584 {
3585 /* Don't make a REG_DEAD note for a part of a register
3586 that is set in the insn. */
3587 for (i = regno_first; i <= regno_last; ++i)
3588 if (! REGNO_REG_SET_P (pbi->reg_live, i)
3589 && ! dead_or_set_regno_p (insn, i))
3590 REG_NOTES (insn)
3591 = alloc_EXPR_LIST (REG_DEAD,
3592 regno_reg_rtx[i],
3593 REG_NOTES (insn));
3594 }
3595 }
3596
3597 /* Mark the register as being live. */
3598 for (i = regno_first; i <= regno_last; ++i)
3599 {
3600 #ifdef HAVE_conditional_execution
3601 int this_was_live = REGNO_REG_SET_P (pbi->reg_live, i);
3602 #endif
3603
3604 SET_REGNO_REG_SET (pbi->reg_live, i);
3605
3606 #ifdef HAVE_conditional_execution
3607 /* If this is a conditional use, record that fact. If it is later
3608 conditionally set, we'll know to kill the register. */
3609 if (cond != NULL_RTX)
3610 {
3611 splay_tree_node node;
3612 struct reg_cond_life_info *rcli;
3613 rtx ncond;
3614
3615 if (this_was_live)
3616 {
3617 node = splay_tree_lookup (pbi->reg_cond_dead, i);
3618 if (node == NULL)
3619 {
3620 /* The register was unconditionally live previously.
3621 No need to do anything. */
3622 }
3623 else
3624 {
3625 /* The register was conditionally live previously.
3626 Subtract the new life cond from the old death cond. */
3627 rcli = (struct reg_cond_life_info *) node->value;
3628 ncond = rcli->condition;
3629 ncond = and_reg_cond (ncond, not_reg_cond (cond), 1);
3630
3631 /* If the register is now unconditionally live,
3632 remove the entry in the splay_tree. */
3633 if (ncond == const0_rtx)
3634 splay_tree_remove (pbi->reg_cond_dead, i);
3635 else
3636 {
3637 rcli->condition = ncond;
3638 SET_REGNO_REG_SET (pbi->reg_cond_reg,
3639 REGNO (XEXP (cond, 0)));
3640 }
3641 }
3642 }
3643 else
3644 {
3645 /* The register was not previously live at all. Record
3646 the condition under which it is still dead. */
3647 rcli = xmalloc (sizeof (*rcli));
3648 rcli->condition = not_reg_cond (cond);
3649 rcli->stores = const0_rtx;
3650 rcli->orig_condition = const0_rtx;
3651 splay_tree_insert (pbi->reg_cond_dead, i,
3652 (splay_tree_value) rcli);
3653
3654 SET_REGNO_REG_SET (pbi->reg_cond_reg, REGNO (XEXP (cond, 0)));
3655 }
3656 }
3657 else if (this_was_live)
3658 {
3659 /* The register may have been conditionally live previously, but
3660 is now unconditionally live. Remove it from the conditionally
3661 dead list, so that a conditional set won't cause us to think
3662 it dead. */
3663 splay_tree_remove (pbi->reg_cond_dead, i);
3664 }
3665 #endif
3666 }
3667 }
3668
3669 /* Scan expression X and store a 1-bit in NEW_LIVE for each reg it uses.
3670 This is done assuming the registers needed from X are those that
3671 have 1-bits in PBI->REG_LIVE.
3672
3673 INSN is the containing instruction. If INSN is dead, this function
3674 is not called. */
3675
3676 static void
3677 mark_used_regs (struct propagate_block_info *pbi, rtx x, rtx cond, rtx insn)
3678 {
3679 RTX_CODE code;
3680 int regno;
3681 int flags = pbi->flags;
3682
3683 retry:
3684 if (!x)
3685 return;
3686 code = GET_CODE (x);
3687 switch (code)
3688 {
3689 case LABEL_REF:
3690 case SYMBOL_REF:
3691 case CONST_INT:
3692 case CONST:
3693 case CONST_DOUBLE:
3694 case CONST_VECTOR:
3695 case PC:
3696 case ADDR_VEC:
3697 case ADDR_DIFF_VEC:
3698 return;
3699
3700 #ifdef HAVE_cc0
3701 case CC0:
3702 pbi->cc0_live = 1;
3703 return;
3704 #endif
3705
3706 case CLOBBER:
3707 /* If we are clobbering a MEM, mark any registers inside the address
3708 as being used. */
3709 if (GET_CODE (XEXP (x, 0)) == MEM)
3710 mark_used_regs (pbi, XEXP (XEXP (x, 0), 0), cond, insn);
3711 return;
3712
3713 case MEM:
3714 /* Don't bother watching stores to mems if this is not the
3715 final pass. We'll not be deleting dead stores this round. */
3716 if (optimize && (flags & PROP_SCAN_DEAD_STORES))
3717 {
3718 /* Invalidate the data for the last MEM stored, but only if MEM is
3719 something that can be stored into. */
3720 if (GET_CODE (XEXP (x, 0)) == SYMBOL_REF
3721 && CONSTANT_POOL_ADDRESS_P (XEXP (x, 0)))
3722 /* Needn't clear the memory set list. */
3723 ;
3724 else
3725 {
3726 rtx temp = pbi->mem_set_list;
3727 rtx prev = NULL_RTX;
3728 rtx next;
3729
3730 while (temp)
3731 {
3732 next = XEXP (temp, 1);
3733 if (unchanging_anti_dependence (XEXP (temp, 0), x))
3734 {
3735 /* Splice temp out of the list. */
3736 if (prev)
3737 XEXP (prev, 1) = next;
3738 else
3739 pbi->mem_set_list = next;
3740 free_EXPR_LIST_node (temp);
3741 pbi->mem_set_list_len--;
3742 }
3743 else
3744 prev = temp;
3745 temp = next;
3746 }
3747 }
3748
3749 /* If the memory reference had embedded side effects (autoincrement
3750 address modes. Then we may need to kill some entries on the
3751 memory set list. */
3752 if (insn)
3753 for_each_rtx (&PATTERN (insn), invalidate_mems_from_autoinc, pbi);
3754 }
3755
3756 #ifdef AUTO_INC_DEC
3757 if (flags & PROP_AUTOINC)
3758 find_auto_inc (pbi, x, insn);
3759 #endif
3760 break;
3761
3762 case SUBREG:
3763 #ifdef CANNOT_CHANGE_MODE_CLASS
3764 if ((flags & PROP_REG_INFO)
3765 && GET_CODE (SUBREG_REG (x)) == REG
3766 && REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER)
3767 bitmap_set_bit (&subregs_of_mode, REGNO (SUBREG_REG (x))
3768 * MAX_MACHINE_MODE
3769 + GET_MODE (x));
3770 #endif
3771
3772 /* While we're here, optimize this case. */
3773 x = SUBREG_REG (x);
3774 if (GET_CODE (x) != REG)
3775 goto retry;
3776 /* Fall through. */
3777
3778 case REG:
3779 /* See a register other than being set => mark it as needed. */
3780 mark_used_reg (pbi, x, cond, insn);
3781 return;
3782
3783 case SET:
3784 {
3785 rtx testreg = SET_DEST (x);
3786 int mark_dest = 0;
3787
3788 /* If storing into MEM, don't show it as being used. But do
3789 show the address as being used. */
3790 if (GET_CODE (testreg) == MEM)
3791 {
3792 #ifdef AUTO_INC_DEC
3793 if (flags & PROP_AUTOINC)
3794 find_auto_inc (pbi, testreg, insn);
3795 #endif
3796 mark_used_regs (pbi, XEXP (testreg, 0), cond, insn);
3797 mark_used_regs (pbi, SET_SRC (x), cond, insn);
3798 return;
3799 }
3800
3801 /* Storing in STRICT_LOW_PART is like storing in a reg
3802 in that this SET might be dead, so ignore it in TESTREG.
3803 but in some other ways it is like using the reg.
3804
3805 Storing in a SUBREG or a bit field is like storing the entire
3806 register in that if the register's value is not used
3807 then this SET is not needed. */
3808 while (GET_CODE (testreg) == STRICT_LOW_PART
3809 || GET_CODE (testreg) == ZERO_EXTRACT
3810 || GET_CODE (testreg) == SIGN_EXTRACT
3811 || GET_CODE (testreg) == SUBREG)
3812 {
3813 #ifdef CANNOT_CHANGE_MODE_CLASS
3814 if ((flags & PROP_REG_INFO)
3815 && GET_CODE (testreg) == SUBREG
3816 && GET_CODE (SUBREG_REG (testreg)) == REG
3817 && REGNO (SUBREG_REG (testreg)) >= FIRST_PSEUDO_REGISTER)
3818 bitmap_set_bit (&subregs_of_mode, REGNO (SUBREG_REG (testreg))
3819 * MAX_MACHINE_MODE
3820 + GET_MODE (testreg));
3821 #endif
3822
3823 /* Modifying a single register in an alternate mode
3824 does not use any of the old value. But these other
3825 ways of storing in a register do use the old value. */
3826 if (GET_CODE (testreg) == SUBREG
3827 && !((REG_BYTES (SUBREG_REG (testreg))
3828 + UNITS_PER_WORD - 1) / UNITS_PER_WORD
3829 > (REG_BYTES (testreg)
3830 + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
3831 ;
3832 else
3833 mark_dest = 1;
3834
3835 testreg = XEXP (testreg, 0);
3836 }
3837
3838 /* If this is a store into a register or group of registers,
3839 recursively scan the value being stored. */
3840
3841 if ((GET_CODE (testreg) == PARALLEL
3842 && GET_MODE (testreg) == BLKmode)
3843 || (GET_CODE (testreg) == REG
3844 && (regno = REGNO (testreg),
3845 ! (regno == FRAME_POINTER_REGNUM
3846 && (! reload_completed || frame_pointer_needed)))
3847 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
3848 && ! (regno == HARD_FRAME_POINTER_REGNUM
3849 && (! reload_completed || frame_pointer_needed))
3850 #endif
3851 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
3852 && ! (regno == ARG_POINTER_REGNUM && fixed_regs[regno])
3853 #endif
3854 ))
3855 {
3856 if (mark_dest)
3857 mark_used_regs (pbi, SET_DEST (x), cond, insn);
3858 mark_used_regs (pbi, SET_SRC (x), cond, insn);
3859 return;
3860 }
3861 }
3862 break;
3863
3864 case ASM_OPERANDS:
3865 case UNSPEC_VOLATILE:
3866 case TRAP_IF:
3867 case ASM_INPUT:
3868 {
3869 /* Traditional and volatile asm instructions must be considered to use
3870 and clobber all hard registers, all pseudo-registers and all of
3871 memory. So must TRAP_IF and UNSPEC_VOLATILE operations.
3872
3873 Consider for instance a volatile asm that changes the fpu rounding
3874 mode. An insn should not be moved across this even if it only uses
3875 pseudo-regs because it might give an incorrectly rounded result.
3876
3877 ?!? Unfortunately, marking all hard registers as live causes massive
3878 problems for the register allocator and marking all pseudos as live
3879 creates mountains of uninitialized variable warnings.
3880
3881 So for now, just clear the memory set list and mark any regs
3882 we can find in ASM_OPERANDS as used. */
3883 if (code != ASM_OPERANDS || MEM_VOLATILE_P (x))
3884 {
3885 free_EXPR_LIST_list (&pbi->mem_set_list);
3886 pbi->mem_set_list_len = 0;
3887 }
3888
3889 /* For all ASM_OPERANDS, we must traverse the vector of input operands.
3890 We can not just fall through here since then we would be confused
3891 by the ASM_INPUT rtx inside ASM_OPERANDS, which do not indicate
3892 traditional asms unlike their normal usage. */
3893 if (code == ASM_OPERANDS)
3894 {
3895 int j;
3896
3897 for (j = 0; j < ASM_OPERANDS_INPUT_LENGTH (x); j++)
3898 mark_used_regs (pbi, ASM_OPERANDS_INPUT (x, j), cond, insn);
3899 }
3900 break;
3901 }
3902
3903 case COND_EXEC:
3904 if (cond != NULL_RTX)
3905 abort ();
3906
3907 mark_used_regs (pbi, COND_EXEC_TEST (x), NULL_RTX, insn);
3908
3909 cond = COND_EXEC_TEST (x);
3910 x = COND_EXEC_CODE (x);
3911 goto retry;
3912
3913 default:
3914 break;
3915 }
3916
3917 /* Recursively scan the operands of this expression. */
3918
3919 {
3920 const char * const fmt = GET_RTX_FORMAT (code);
3921 int i;
3922
3923 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3924 {
3925 if (fmt[i] == 'e')
3926 {
3927 /* Tail recursive case: save a function call level. */
3928 if (i == 0)
3929 {
3930 x = XEXP (x, 0);
3931 goto retry;
3932 }
3933 mark_used_regs (pbi, XEXP (x, i), cond, insn);
3934 }
3935 else if (fmt[i] == 'E')
3936 {
3937 int j;
3938 for (j = 0; j < XVECLEN (x, i); j++)
3939 mark_used_regs (pbi, XVECEXP (x, i, j), cond, insn);
3940 }
3941 }
3942 }
3943 }
3944 \f
3945 #ifdef AUTO_INC_DEC
3946
3947 static int
3948 try_pre_increment_1 (struct propagate_block_info *pbi, rtx insn)
3949 {
3950 /* Find the next use of this reg. If in same basic block,
3951 make it do pre-increment or pre-decrement if appropriate. */
3952 rtx x = single_set (insn);
3953 HOST_WIDE_INT amount = ((GET_CODE (SET_SRC (x)) == PLUS ? 1 : -1)
3954 * INTVAL (XEXP (SET_SRC (x), 1)));
3955 int regno = REGNO (SET_DEST (x));
3956 rtx y = pbi->reg_next_use[regno];
3957 if (y != 0
3958 && SET_DEST (x) != stack_pointer_rtx
3959 && BLOCK_NUM (y) == BLOCK_NUM (insn)
3960 /* Don't do this if the reg dies, or gets set in y; a standard addressing
3961 mode would be better. */
3962 && ! dead_or_set_p (y, SET_DEST (x))
3963 && try_pre_increment (y, SET_DEST (x), amount))
3964 {
3965 /* We have found a suitable auto-increment and already changed
3966 insn Y to do it. So flush this increment instruction. */
3967 propagate_block_delete_insn (insn);
3968
3969 /* Count a reference to this reg for the increment insn we are
3970 deleting. When a reg is incremented, spilling it is worse,
3971 so we want to make that less likely. */
3972 if (regno >= FIRST_PSEUDO_REGISTER)
3973 {
3974 REG_FREQ (regno) += REG_FREQ_FROM_BB (pbi->bb);
3975 REG_N_SETS (regno)++;
3976 }
3977
3978 /* Flush any remembered memories depending on the value of
3979 the incremented register. */
3980 invalidate_mems_from_set (pbi, SET_DEST (x));
3981
3982 return 1;
3983 }
3984 return 0;
3985 }
3986
3987 /* Try to change INSN so that it does pre-increment or pre-decrement
3988 addressing on register REG in order to add AMOUNT to REG.
3989 AMOUNT is negative for pre-decrement.
3990 Returns 1 if the change could be made.
3991 This checks all about the validity of the result of modifying INSN. */
3992
3993 static int
3994 try_pre_increment (rtx insn, rtx reg, HOST_WIDE_INT amount)
3995 {
3996 rtx use;
3997
3998 /* Nonzero if we can try to make a pre-increment or pre-decrement.
3999 For example, addl $4,r1; movl (r1),... can become movl +(r1),... */
4000 int pre_ok = 0;
4001 /* Nonzero if we can try to make a post-increment or post-decrement.
4002 For example, addl $4,r1; movl -4(r1),... can become movl (r1)+,...
4003 It is possible for both PRE_OK and POST_OK to be nonzero if the machine
4004 supports both pre-inc and post-inc, or both pre-dec and post-dec. */
4005 int post_ok = 0;
4006
4007 /* Nonzero if the opportunity actually requires post-inc or post-dec. */
4008 int do_post = 0;
4009
4010 /* From the sign of increment, see which possibilities are conceivable
4011 on this target machine. */
4012 if (HAVE_PRE_INCREMENT && amount > 0)
4013 pre_ok = 1;
4014 if (HAVE_POST_INCREMENT && amount > 0)
4015 post_ok = 1;
4016
4017 if (HAVE_PRE_DECREMENT && amount < 0)
4018 pre_ok = 1;
4019 if (HAVE_POST_DECREMENT && amount < 0)
4020 post_ok = 1;
4021
4022 if (! (pre_ok || post_ok))
4023 return 0;
4024
4025 /* It is not safe to add a side effect to a jump insn
4026 because if the incremented register is spilled and must be reloaded
4027 there would be no way to store the incremented value back in memory. */
4028
4029 if (GET_CODE (insn) == JUMP_INSN)
4030 return 0;
4031
4032 use = 0;
4033 if (pre_ok)
4034 use = find_use_as_address (PATTERN (insn), reg, 0);
4035 if (post_ok && (use == 0 || use == (rtx) (size_t) 1))
4036 {
4037 use = find_use_as_address (PATTERN (insn), reg, -amount);
4038 do_post = 1;
4039 }
4040
4041 if (use == 0 || use == (rtx) (size_t) 1)
4042 return 0;
4043
4044 if (GET_MODE_SIZE (GET_MODE (use)) != (amount > 0 ? amount : - amount))
4045 return 0;
4046
4047 /* See if this combination of instruction and addressing mode exists. */
4048 if (! validate_change (insn, &XEXP (use, 0),
4049 gen_rtx_fmt_e (amount > 0
4050 ? (do_post ? POST_INC : PRE_INC)
4051 : (do_post ? POST_DEC : PRE_DEC),
4052 Pmode, reg), 0))
4053 return 0;
4054
4055 /* Record that this insn now has an implicit side effect on X. */
4056 REG_NOTES (insn) = alloc_EXPR_LIST (REG_INC, reg, REG_NOTES (insn));
4057 return 1;
4058 }
4059
4060 #endif /* AUTO_INC_DEC */
4061 \f
4062 /* Find the place in the rtx X where REG is used as a memory address.
4063 Return the MEM rtx that so uses it.
4064 If PLUSCONST is nonzero, search instead for a memory address equivalent to
4065 (plus REG (const_int PLUSCONST)).
4066
4067 If such an address does not appear, return 0.
4068 If REG appears more than once, or is used other than in such an address,
4069 return (rtx) 1. */
4070
4071 rtx
4072 find_use_as_address (rtx x, rtx reg, HOST_WIDE_INT plusconst)
4073 {
4074 enum rtx_code code = GET_CODE (x);
4075 const char * const fmt = GET_RTX_FORMAT (code);
4076 int i;
4077 rtx value = 0;
4078 rtx tem;
4079
4080 if (code == MEM && XEXP (x, 0) == reg && plusconst == 0)
4081 return x;
4082
4083 if (code == MEM && GET_CODE (XEXP (x, 0)) == PLUS
4084 && XEXP (XEXP (x, 0), 0) == reg
4085 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT
4086 && INTVAL (XEXP (XEXP (x, 0), 1)) == plusconst)
4087 return x;
4088
4089 if (code == SIGN_EXTRACT || code == ZERO_EXTRACT)
4090 {
4091 /* If REG occurs inside a MEM used in a bit-field reference,
4092 that is unacceptable. */
4093 if (find_use_as_address (XEXP (x, 0), reg, 0) != 0)
4094 return (rtx) (size_t) 1;
4095 }
4096
4097 if (x == reg)
4098 return (rtx) (size_t) 1;
4099
4100 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4101 {
4102 if (fmt[i] == 'e')
4103 {
4104 tem = find_use_as_address (XEXP (x, i), reg, plusconst);
4105 if (value == 0)
4106 value = tem;
4107 else if (tem != 0)
4108 return (rtx) (size_t) 1;
4109 }
4110 else if (fmt[i] == 'E')
4111 {
4112 int j;
4113 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
4114 {
4115 tem = find_use_as_address (XVECEXP (x, i, j), reg, plusconst);
4116 if (value == 0)
4117 value = tem;
4118 else if (tem != 0)
4119 return (rtx) (size_t) 1;
4120 }
4121 }
4122 }
4123
4124 return value;
4125 }
4126 \f
4127 /* Write information about registers and basic blocks into FILE.
4128 This is part of making a debugging dump. */
4129
4130 void
4131 dump_regset (regset r, FILE *outf)
4132 {
4133 int i;
4134 if (r == NULL)
4135 {
4136 fputs (" (nil)", outf);
4137 return;
4138 }
4139
4140 EXECUTE_IF_SET_IN_REG_SET (r, 0, i,
4141 {
4142 fprintf (outf, " %d", i);
4143 if (i < FIRST_PSEUDO_REGISTER)
4144 fprintf (outf, " [%s]",
4145 reg_names[i]);
4146 });
4147 }
4148
4149 /* Print a human-readable representation of R on the standard error
4150 stream. This function is designed to be used from within the
4151 debugger. */
4152
4153 void
4154 debug_regset (regset r)
4155 {
4156 dump_regset (r, stderr);
4157 putc ('\n', stderr);
4158 }
4159
4160 /* Recompute register set/reference counts immediately prior to register
4161 allocation.
4162
4163 This avoids problems with set/reference counts changing to/from values
4164 which have special meanings to the register allocators.
4165
4166 Additionally, the reference counts are the primary component used by the
4167 register allocators to prioritize pseudos for allocation to hard regs.
4168 More accurate reference counts generally lead to better register allocation.
4169
4170 F is the first insn to be scanned.
4171
4172 LOOP_STEP denotes how much loop_depth should be incremented per
4173 loop nesting level in order to increase the ref count more for
4174 references in a loop.
4175
4176 It might be worthwhile to update REG_LIVE_LENGTH, REG_BASIC_BLOCK and
4177 possibly other information which is used by the register allocators. */
4178
4179 void
4180 recompute_reg_usage (rtx f ATTRIBUTE_UNUSED, int loop_step ATTRIBUTE_UNUSED)
4181 {
4182 allocate_reg_life_data ();
4183 update_life_info (NULL, UPDATE_LIFE_LOCAL, PROP_REG_INFO);
4184 }
4185
4186 /* Optionally removes all the REG_DEAD and REG_UNUSED notes from a set of
4187 blocks. If BLOCKS is NULL, assume the universal set. Returns a count
4188 of the number of registers that died. */
4189
4190 int
4191 count_or_remove_death_notes (sbitmap blocks, int kill)
4192 {
4193 int count = 0;
4194 int i;
4195 basic_block bb;
4196
4197
4198 /* This used to be a loop over all the blocks with a membership test
4199 inside the loop. That can be amazingly expensive on a large CFG
4200 when only a small number of bits are set in BLOCKs (for example,
4201 the calls from the scheduler typically have very few bits set).
4202
4203 For extra credit, someone should convert BLOCKS to a bitmap rather
4204 than an sbitmap. */
4205 if (blocks)
4206 {
4207 EXECUTE_IF_SET_IN_SBITMAP (blocks, 0, i,
4208 {
4209 count += count_or_remove_death_notes_bb (BASIC_BLOCK (i), kill);
4210 });
4211 }
4212 else
4213 {
4214 FOR_EACH_BB (bb)
4215 {
4216 count += count_or_remove_death_notes_bb (bb, kill);
4217 }
4218 }
4219
4220 return count;
4221 }
4222
4223 /* Optionally removes all the REG_DEAD and REG_UNUSED notes from basic
4224 block BB. Returns a count of the number of registers that died. */
4225
4226 static int
4227 count_or_remove_death_notes_bb (basic_block bb, int kill)
4228 {
4229 int count = 0;
4230 rtx insn;
4231
4232 for (insn = BB_HEAD (bb); ; insn = NEXT_INSN (insn))
4233 {
4234 if (INSN_P (insn))
4235 {
4236 rtx *pprev = &REG_NOTES (insn);
4237 rtx link = *pprev;
4238
4239 while (link)
4240 {
4241 switch (REG_NOTE_KIND (link))
4242 {
4243 case REG_DEAD:
4244 if (GET_CODE (XEXP (link, 0)) == REG)
4245 {
4246 rtx reg = XEXP (link, 0);
4247 int n;
4248
4249 if (REGNO (reg) >= FIRST_PSEUDO_REGISTER)
4250 n = 1;
4251 else
4252 n = HARD_REGNO_NREGS (REGNO (reg), GET_MODE (reg));
4253 count += n;
4254 }
4255
4256 /* Fall through. */
4257
4258 case REG_UNUSED:
4259 if (kill)
4260 {
4261 rtx next = XEXP (link, 1);
4262 free_EXPR_LIST_node (link);
4263 *pprev = link = next;
4264 break;
4265 }
4266 /* Fall through. */
4267
4268 default:
4269 pprev = &XEXP (link, 1);
4270 link = *pprev;
4271 break;
4272 }
4273 }
4274 }
4275
4276 if (insn == BB_END (bb))
4277 break;
4278 }
4279
4280 return count;
4281 }
4282
4283 /* Clear LOG_LINKS fields of insns in a selected blocks or whole chain
4284 if blocks is NULL. */
4285
4286 static void
4287 clear_log_links (sbitmap blocks)
4288 {
4289 rtx insn;
4290 int i;
4291
4292 if (!blocks)
4293 {
4294 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4295 if (INSN_P (insn))
4296 free_INSN_LIST_list (&LOG_LINKS (insn));
4297 }
4298 else
4299 EXECUTE_IF_SET_IN_SBITMAP (blocks, 0, i,
4300 {
4301 basic_block bb = BASIC_BLOCK (i);
4302
4303 for (insn = BB_HEAD (bb); insn != NEXT_INSN (BB_END (bb));
4304 insn = NEXT_INSN (insn))
4305 if (INSN_P (insn))
4306 free_INSN_LIST_list (&LOG_LINKS (insn));
4307 });
4308 }
4309
4310 /* Given a register bitmap, turn on the bits in a HARD_REG_SET that
4311 correspond to the hard registers, if any, set in that map. This
4312 could be done far more efficiently by having all sorts of special-cases
4313 with moving single words, but probably isn't worth the trouble. */
4314
4315 void
4316 reg_set_to_hard_reg_set (HARD_REG_SET *to, bitmap from)
4317 {
4318 int i;
4319
4320 EXECUTE_IF_SET_IN_BITMAP
4321 (from, 0, i,
4322 {
4323 if (i >= FIRST_PSEUDO_REGISTER)
4324 return;
4325 SET_HARD_REG_BIT (*to, i);
4326 });
4327 }