gcse.c (record_set_info): Use predicates like REG_P.
[gcc.git] / gcc / gcse.c
1 /* Global common subexpression elimination/Partial redundancy elimination
2 and global constant/copy propagation for GNU compiler.
3 Copyright (C) 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004
4 Free Software Foundation, Inc.
5
6 This file is part of GCC.
7
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 2, or (at your option) any later
11 version.
12
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING. If not, write to the Free
20 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
21 02111-1307, USA. */
22
23 /* TODO
24 - reordering of memory allocation and freeing to be more space efficient
25 - do rough calc of how many regs are needed in each block, and a rough
26 calc of how many regs are available in each class and use that to
27 throttle back the code in cases where RTX_COST is minimal.
28 - a store to the same address as a load does not kill the load if the
29 source of the store is also the destination of the load. Handling this
30 allows more load motion, particularly out of loops.
31 - ability to realloc sbitmap vectors would allow one initial computation
32 of reg_set_in_block with only subsequent additions, rather than
33 recomputing it for each pass
34
35 */
36
37 /* References searched while implementing this.
38
39 Compilers Principles, Techniques and Tools
40 Aho, Sethi, Ullman
41 Addison-Wesley, 1988
42
43 Global Optimization by Suppression of Partial Redundancies
44 E. Morel, C. Renvoise
45 communications of the acm, Vol. 22, Num. 2, Feb. 1979
46
47 A Portable Machine-Independent Global Optimizer - Design and Measurements
48 Frederick Chow
49 Stanford Ph.D. thesis, Dec. 1983
50
51 A Fast Algorithm for Code Movement Optimization
52 D.M. Dhamdhere
53 SIGPLAN Notices, Vol. 23, Num. 10, Oct. 1988
54
55 A Solution to a Problem with Morel and Renvoise's
56 Global Optimization by Suppression of Partial Redundancies
57 K-H Drechsler, M.P. Stadel
58 ACM TOPLAS, Vol. 10, Num. 4, Oct. 1988
59
60 Practical Adaptation of the Global Optimization
61 Algorithm of Morel and Renvoise
62 D.M. Dhamdhere
63 ACM TOPLAS, Vol. 13, Num. 2. Apr. 1991
64
65 Efficiently Computing Static Single Assignment Form and the Control
66 Dependence Graph
67 R. Cytron, J. Ferrante, B.K. Rosen, M.N. Wegman, and F.K. Zadeck
68 ACM TOPLAS, Vol. 13, Num. 4, Oct. 1991
69
70 Lazy Code Motion
71 J. Knoop, O. Ruthing, B. Steffen
72 ACM SIGPLAN Notices Vol. 27, Num. 7, Jul. 1992, '92 Conference on PLDI
73
74 What's In a Region? Or Computing Control Dependence Regions in Near-Linear
75 Time for Reducible Flow Control
76 Thomas Ball
77 ACM Letters on Programming Languages and Systems,
78 Vol. 2, Num. 1-4, Mar-Dec 1993
79
80 An Efficient Representation for Sparse Sets
81 Preston Briggs, Linda Torczon
82 ACM Letters on Programming Languages and Systems,
83 Vol. 2, Num. 1-4, Mar-Dec 1993
84
85 A Variation of Knoop, Ruthing, and Steffen's Lazy Code Motion
86 K-H Drechsler, M.P. Stadel
87 ACM SIGPLAN Notices, Vol. 28, Num. 5, May 1993
88
89 Partial Dead Code Elimination
90 J. Knoop, O. Ruthing, B. Steffen
91 ACM SIGPLAN Notices, Vol. 29, Num. 6, Jun. 1994
92
93 Effective Partial Redundancy Elimination
94 P. Briggs, K.D. Cooper
95 ACM SIGPLAN Notices, Vol. 29, Num. 6, Jun. 1994
96
97 The Program Structure Tree: Computing Control Regions in Linear Time
98 R. Johnson, D. Pearson, K. Pingali
99 ACM SIGPLAN Notices, Vol. 29, Num. 6, Jun. 1994
100
101 Optimal Code Motion: Theory and Practice
102 J. Knoop, O. Ruthing, B. Steffen
103 ACM TOPLAS, Vol. 16, Num. 4, Jul. 1994
104
105 The power of assignment motion
106 J. Knoop, O. Ruthing, B. Steffen
107 ACM SIGPLAN Notices Vol. 30, Num. 6, Jun. 1995, '95 Conference on PLDI
108
109 Global code motion / global value numbering
110 C. Click
111 ACM SIGPLAN Notices Vol. 30, Num. 6, Jun. 1995, '95 Conference on PLDI
112
113 Value Driven Redundancy Elimination
114 L.T. Simpson
115 Rice University Ph.D. thesis, Apr. 1996
116
117 Value Numbering
118 L.T. Simpson
119 Massively Scalar Compiler Project, Rice University, Sep. 1996
120
121 High Performance Compilers for Parallel Computing
122 Michael Wolfe
123 Addison-Wesley, 1996
124
125 Advanced Compiler Design and Implementation
126 Steven Muchnick
127 Morgan Kaufmann, 1997
128
129 Building an Optimizing Compiler
130 Robert Morgan
131 Digital Press, 1998
132
133 People wishing to speed up the code here should read:
134 Elimination Algorithms for Data Flow Analysis
135 B.G. Ryder, M.C. Paull
136 ACM Computing Surveys, Vol. 18, Num. 3, Sep. 1986
137
138 How to Analyze Large Programs Efficiently and Informatively
139 D.M. Dhamdhere, B.K. Rosen, F.K. Zadeck
140 ACM SIGPLAN Notices Vol. 27, Num. 7, Jul. 1992, '92 Conference on PLDI
141
142 People wishing to do something different can find various possibilities
143 in the above papers and elsewhere.
144 */
145
146 #include "config.h"
147 #include "system.h"
148 #include "coretypes.h"
149 #include "tm.h"
150 #include "toplev.h"
151
152 #include "rtl.h"
153 #include "tree.h"
154 #include "tm_p.h"
155 #include "regs.h"
156 #include "hard-reg-set.h"
157 #include "flags.h"
158 #include "real.h"
159 #include "insn-config.h"
160 #include "recog.h"
161 #include "basic-block.h"
162 #include "output.h"
163 #include "function.h"
164 #include "expr.h"
165 #include "except.h"
166 #include "ggc.h"
167 #include "params.h"
168 #include "cselib.h"
169 #include "intl.h"
170 #include "obstack.h"
171
172 /* Propagate flow information through back edges and thus enable PRE's
173 moving loop invariant calculations out of loops.
174
175 Originally this tended to create worse overall code, but several
176 improvements during the development of PRE seem to have made following
177 back edges generally a win.
178
179 Note much of the loop invariant code motion done here would normally
180 be done by loop.c, which has more heuristics for when to move invariants
181 out of loops. At some point we might need to move some of those
182 heuristics into gcse.c. */
183
184 /* We support GCSE via Partial Redundancy Elimination. PRE optimizations
185 are a superset of those done by GCSE.
186
187 We perform the following steps:
188
189 1) Compute basic block information.
190
191 2) Compute table of places where registers are set.
192
193 3) Perform copy/constant propagation.
194
195 4) Perform global cse using lazy code motion if not optimizing
196 for size, or code hoisting if we are.
197
198 5) Perform another pass of copy/constant propagation.
199
200 Two passes of copy/constant propagation are done because the first one
201 enables more GCSE and the second one helps to clean up the copies that
202 GCSE creates. This is needed more for PRE than for Classic because Classic
203 GCSE will try to use an existing register containing the common
204 subexpression rather than create a new one. This is harder to do for PRE
205 because of the code motion (which Classic GCSE doesn't do).
206
207 Expressions we are interested in GCSE-ing are of the form
208 (set (pseudo-reg) (expression)).
209 Function want_to_gcse_p says what these are.
210
211 PRE handles moving invariant expressions out of loops (by treating them as
212 partially redundant).
213
214 Eventually it would be nice to replace cse.c/gcse.c with SSA (static single
215 assignment) based GVN (global value numbering). L. T. Simpson's paper
216 (Rice University) on value numbering is a useful reference for this.
217
218 **********************
219
220 We used to support multiple passes but there are diminishing returns in
221 doing so. The first pass usually makes 90% of the changes that are doable.
222 A second pass can make a few more changes made possible by the first pass.
223 Experiments show any further passes don't make enough changes to justify
224 the expense.
225
226 A study of spec92 using an unlimited number of passes:
227 [1 pass] = 1208 substitutions, [2] = 577, [3] = 202, [4] = 192, [5] = 83,
228 [6] = 34, [7] = 17, [8] = 9, [9] = 4, [10] = 4, [11] = 2,
229 [12] = 2, [13] = 1, [15] = 1, [16] = 2, [41] = 1
230
231 It was found doing copy propagation between each pass enables further
232 substitutions.
233
234 PRE is quite expensive in complicated functions because the DFA can take
235 a while to converge. Hence we only perform one pass. The parameter
236 max-gcse-passes can be modified if one wants to experiment.
237
238 **********************
239
240 The steps for PRE are:
241
242 1) Build the hash table of expressions we wish to GCSE (expr_hash_table).
243
244 2) Perform the data flow analysis for PRE.
245
246 3) Delete the redundant instructions
247
248 4) Insert the required copies [if any] that make the partially
249 redundant instructions fully redundant.
250
251 5) For other reaching expressions, insert an instruction to copy the value
252 to a newly created pseudo that will reach the redundant instruction.
253
254 The deletion is done first so that when we do insertions we
255 know which pseudo reg to use.
256
257 Various papers have argued that PRE DFA is expensive (O(n^2)) and others
258 argue it is not. The number of iterations for the algorithm to converge
259 is typically 2-4 so I don't view it as that expensive (relatively speaking).
260
261 PRE GCSE depends heavily on the second CSE pass to clean up the copies
262 we create. To make an expression reach the place where it's redundant,
263 the result of the expression is copied to a new register, and the redundant
264 expression is deleted by replacing it with this new register. Classic GCSE
265 doesn't have this problem as much as it computes the reaching defs of
266 each register in each block and thus can try to use an existing register.
267
268 **********************
269
270 A fair bit of simplicity is created by creating small functions for simple
271 tasks, even when the function is only called in one place. This may
272 measurably slow things down [or may not] by creating more function call
273 overhead than is necessary. The source is laid out so that it's trivial
274 to make the affected functions inline so that one can measure what speed
275 up, if any, can be achieved, and maybe later when things settle things can
276 be rearranged.
277
278 Help stamp out big monolithic functions! */
279 \f
280 /* GCSE global vars. */
281
282 /* -dG dump file. */
283 static FILE *gcse_file;
284
285 /* Note whether or not we should run jump optimization after gcse. We
286 want to do this for two cases.
287
288 * If we changed any jumps via cprop.
289
290 * If we added any labels via edge splitting. */
291 static int run_jump_opt_after_gcse;
292
293 /* Bitmaps are normally not included in debugging dumps.
294 However it's useful to be able to print them from GDB.
295 We could create special functions for this, but it's simpler to
296 just allow passing stderr to the dump_foo fns. Since stderr can
297 be a macro, we store a copy here. */
298 static FILE *debug_stderr;
299
300 /* An obstack for our working variables. */
301 static struct obstack gcse_obstack;
302
303 struct reg_use {rtx reg_rtx; };
304
305 /* Hash table of expressions. */
306
307 struct expr
308 {
309 /* The expression (SET_SRC for expressions, PATTERN for assignments). */
310 rtx expr;
311 /* Index in the available expression bitmaps. */
312 int bitmap_index;
313 /* Next entry with the same hash. */
314 struct expr *next_same_hash;
315 /* List of anticipatable occurrences in basic blocks in the function.
316 An "anticipatable occurrence" is one that is the first occurrence in the
317 basic block, the operands are not modified in the basic block prior
318 to the occurrence and the output is not used between the start of
319 the block and the occurrence. */
320 struct occr *antic_occr;
321 /* List of available occurrence in basic blocks in the function.
322 An "available occurrence" is one that is the last occurrence in the
323 basic block and the operands are not modified by following statements in
324 the basic block [including this insn]. */
325 struct occr *avail_occr;
326 /* Non-null if the computation is PRE redundant.
327 The value is the newly created pseudo-reg to record a copy of the
328 expression in all the places that reach the redundant copy. */
329 rtx reaching_reg;
330 };
331
332 /* Occurrence of an expression.
333 There is one per basic block. If a pattern appears more than once the
334 last appearance is used [or first for anticipatable expressions]. */
335
336 struct occr
337 {
338 /* Next occurrence of this expression. */
339 struct occr *next;
340 /* The insn that computes the expression. */
341 rtx insn;
342 /* Nonzero if this [anticipatable] occurrence has been deleted. */
343 char deleted_p;
344 /* Nonzero if this [available] occurrence has been copied to
345 reaching_reg. */
346 /* ??? This is mutually exclusive with deleted_p, so they could share
347 the same byte. */
348 char copied_p;
349 };
350
351 /* Expression and copy propagation hash tables.
352 Each hash table is an array of buckets.
353 ??? It is known that if it were an array of entries, structure elements
354 `next_same_hash' and `bitmap_index' wouldn't be necessary. However, it is
355 not clear whether in the final analysis a sufficient amount of memory would
356 be saved as the size of the available expression bitmaps would be larger
357 [one could build a mapping table without holes afterwards though].
358 Someday I'll perform the computation and figure it out. */
359
360 struct hash_table
361 {
362 /* The table itself.
363 This is an array of `expr_hash_table_size' elements. */
364 struct expr **table;
365
366 /* Size of the hash table, in elements. */
367 unsigned int size;
368
369 /* Number of hash table elements. */
370 unsigned int n_elems;
371
372 /* Whether the table is expression of copy propagation one. */
373 int set_p;
374 };
375
376 /* Expression hash table. */
377 static struct hash_table expr_hash_table;
378
379 /* Copy propagation hash table. */
380 static struct hash_table set_hash_table;
381
382 /* Mapping of uids to cuids.
383 Only real insns get cuids. */
384 static int *uid_cuid;
385
386 /* Highest UID in UID_CUID. */
387 static int max_uid;
388
389 /* Get the cuid of an insn. */
390 #ifdef ENABLE_CHECKING
391 #define INSN_CUID(INSN) (INSN_UID (INSN) > max_uid ? (abort (), 0) : uid_cuid[INSN_UID (INSN)])
392 #else
393 #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)])
394 #endif
395
396 /* Number of cuids. */
397 static int max_cuid;
398
399 /* Mapping of cuids to insns. */
400 static rtx *cuid_insn;
401
402 /* Get insn from cuid. */
403 #define CUID_INSN(CUID) (cuid_insn[CUID])
404
405 /* Maximum register number in function prior to doing gcse + 1.
406 Registers created during this pass have regno >= max_gcse_regno.
407 This is named with "gcse" to not collide with global of same name. */
408 static unsigned int max_gcse_regno;
409
410 /* Table of registers that are modified.
411
412 For each register, each element is a list of places where the pseudo-reg
413 is set.
414
415 For simplicity, GCSE is done on sets of pseudo-regs only. PRE GCSE only
416 requires knowledge of which blocks kill which regs [and thus could use
417 a bitmap instead of the lists `reg_set_table' uses].
418
419 `reg_set_table' and could be turned into an array of bitmaps (num-bbs x
420 num-regs) [however perhaps it may be useful to keep the data as is]. One
421 advantage of recording things this way is that `reg_set_table' is fairly
422 sparse with respect to pseudo regs but for hard regs could be fairly dense
423 [relatively speaking]. And recording sets of pseudo-regs in lists speeds
424 up functions like compute_transp since in the case of pseudo-regs we only
425 need to iterate over the number of times a pseudo-reg is set, not over the
426 number of basic blocks [clearly there is a bit of a slow down in the cases
427 where a pseudo is set more than once in a block, however it is believed
428 that the net effect is to speed things up]. This isn't done for hard-regs
429 because recording call-clobbered hard-regs in `reg_set_table' at each
430 function call can consume a fair bit of memory, and iterating over
431 hard-regs stored this way in compute_transp will be more expensive. */
432
433 typedef struct reg_set
434 {
435 /* The next setting of this register. */
436 struct reg_set *next;
437 /* The insn where it was set. */
438 rtx insn;
439 } reg_set;
440
441 static reg_set **reg_set_table;
442
443 /* Size of `reg_set_table'.
444 The table starts out at max_gcse_regno + slop, and is enlarged as
445 necessary. */
446 static int reg_set_table_size;
447
448 /* Amount to grow `reg_set_table' by when it's full. */
449 #define REG_SET_TABLE_SLOP 100
450
451 /* This is a list of expressions which are MEMs and will be used by load
452 or store motion.
453 Load motion tracks MEMs which aren't killed by
454 anything except itself. (ie, loads and stores to a single location).
455 We can then allow movement of these MEM refs with a little special
456 allowance. (all stores copy the same value to the reaching reg used
457 for the loads). This means all values used to store into memory must have
458 no side effects so we can re-issue the setter value.
459 Store Motion uses this structure as an expression table to track stores
460 which look interesting, and might be moveable towards the exit block. */
461
462 struct ls_expr
463 {
464 struct expr * expr; /* Gcse expression reference for LM. */
465 rtx pattern; /* Pattern of this mem. */
466 rtx pattern_regs; /* List of registers mentioned by the mem. */
467 rtx loads; /* INSN list of loads seen. */
468 rtx stores; /* INSN list of stores seen. */
469 struct ls_expr * next; /* Next in the list. */
470 int invalid; /* Invalid for some reason. */
471 int index; /* If it maps to a bitmap index. */
472 unsigned int hash_index; /* Index when in a hash table. */
473 rtx reaching_reg; /* Register to use when re-writing. */
474 };
475
476 /* Array of implicit set patterns indexed by basic block index. */
477 static rtx *implicit_sets;
478
479 /* Head of the list of load/store memory refs. */
480 static struct ls_expr * pre_ldst_mems = NULL;
481
482 /* Bitmap containing one bit for each register in the program.
483 Used when performing GCSE to track which registers have been set since
484 the start of the basic block. */
485 static regset reg_set_bitmap;
486
487 /* For each block, a bitmap of registers set in the block.
488 This is used by compute_transp.
489 It is computed during hash table computation and not by compute_sets
490 as it includes registers added since the last pass (or between cprop and
491 gcse) and it's currently not easy to realloc sbitmap vectors. */
492 static sbitmap *reg_set_in_block;
493
494 /* Array, indexed by basic block number for a list of insns which modify
495 memory within that block. */
496 static rtx * modify_mem_list;
497 bitmap modify_mem_list_set;
498
499 /* This array parallels modify_mem_list, but is kept canonicalized. */
500 static rtx * canon_modify_mem_list;
501 bitmap canon_modify_mem_list_set;
502 /* Various variables for statistics gathering. */
503
504 /* Memory used in a pass.
505 This isn't intended to be absolutely precise. Its intent is only
506 to keep an eye on memory usage. */
507 static int bytes_used;
508
509 /* GCSE substitutions made. */
510 static int gcse_subst_count;
511 /* Number of copy instructions created. */
512 static int gcse_create_count;
513 /* Number of constants propagated. */
514 static int const_prop_count;
515 /* Number of copys propagated. */
516 static int copy_prop_count;
517 \f
518 /* For available exprs */
519 static sbitmap *ae_kill, *ae_gen;
520
521 /* Objects of this type are passed around by the null-pointer check
522 removal routines. */
523 struct null_pointer_info
524 {
525 /* The basic block being processed. */
526 basic_block current_block;
527 /* The first register to be handled in this pass. */
528 unsigned int min_reg;
529 /* One greater than the last register to be handled in this pass. */
530 unsigned int max_reg;
531 sbitmap *nonnull_local;
532 sbitmap *nonnull_killed;
533 };
534 \f
535 static void compute_can_copy (void);
536 static void *gmalloc (size_t) ATTRIBUTE_MALLOC;
537 static void *gcalloc (size_t, size_t) ATTRIBUTE_MALLOC;
538 static void *grealloc (void *, size_t);
539 static void *gcse_alloc (unsigned long);
540 static void alloc_gcse_mem (rtx);
541 static void free_gcse_mem (void);
542 static void alloc_reg_set_mem (int);
543 static void free_reg_set_mem (void);
544 static void record_one_set (int, rtx);
545 static void replace_one_set (int, rtx, rtx);
546 static void record_set_info (rtx, rtx, void *);
547 static void compute_sets (rtx);
548 static void hash_scan_insn (rtx, struct hash_table *, int);
549 static void hash_scan_set (rtx, rtx, struct hash_table *);
550 static void hash_scan_clobber (rtx, rtx, struct hash_table *);
551 static void hash_scan_call (rtx, rtx, struct hash_table *);
552 static int want_to_gcse_p (rtx);
553 static bool can_assign_to_reg_p (rtx);
554 static bool gcse_constant_p (rtx);
555 static int oprs_unchanged_p (rtx, rtx, int);
556 static int oprs_anticipatable_p (rtx, rtx);
557 static int oprs_available_p (rtx, rtx);
558 static void insert_expr_in_table (rtx, enum machine_mode, rtx, int, int,
559 struct hash_table *);
560 static void insert_set_in_table (rtx, rtx, struct hash_table *);
561 static unsigned int hash_expr (rtx, enum machine_mode, int *, int);
562 static unsigned int hash_expr_1 (rtx, enum machine_mode, int *);
563 static unsigned int hash_string_1 (const char *);
564 static unsigned int hash_set (int, int);
565 static int expr_equiv_p (rtx, rtx);
566 static void record_last_reg_set_info (rtx, int);
567 static void record_last_mem_set_info (rtx);
568 static void record_last_set_info (rtx, rtx, void *);
569 static void compute_hash_table (struct hash_table *);
570 static void alloc_hash_table (int, struct hash_table *, int);
571 static void free_hash_table (struct hash_table *);
572 static void compute_hash_table_work (struct hash_table *);
573 static void dump_hash_table (FILE *, const char *, struct hash_table *);
574 static struct expr *lookup_expr (rtx, struct hash_table *);
575 static struct expr *lookup_set (unsigned int, struct hash_table *);
576 static struct expr *next_set (unsigned int, struct expr *);
577 static void reset_opr_set_tables (void);
578 static int oprs_not_set_p (rtx, rtx);
579 static void mark_call (rtx);
580 static void mark_set (rtx, rtx);
581 static void mark_clobber (rtx, rtx);
582 static void mark_oprs_set (rtx);
583 static void alloc_cprop_mem (int, int);
584 static void free_cprop_mem (void);
585 static void compute_transp (rtx, int, sbitmap *, int);
586 static void compute_transpout (void);
587 static void compute_local_properties (sbitmap *, sbitmap *, sbitmap *,
588 struct hash_table *);
589 static void compute_cprop_data (void);
590 static void find_used_regs (rtx *, void *);
591 static int try_replace_reg (rtx, rtx, rtx);
592 static struct expr *find_avail_set (int, rtx);
593 static int cprop_jump (basic_block, rtx, rtx, rtx, rtx);
594 static void mems_conflict_for_gcse_p (rtx, rtx, void *);
595 static int load_killed_in_block_p (basic_block, int, rtx, int);
596 static void canon_list_insert (rtx, rtx, void *);
597 static int cprop_insn (rtx, int);
598 static int cprop (int);
599 static void find_implicit_sets (void);
600 static int one_cprop_pass (int, int, int);
601 static bool constprop_register (rtx, rtx, rtx, int);
602 static struct expr *find_bypass_set (int, int);
603 static bool reg_killed_on_edge (rtx, edge);
604 static int bypass_block (basic_block, rtx, rtx);
605 static int bypass_conditional_jumps (void);
606 static void alloc_pre_mem (int, int);
607 static void free_pre_mem (void);
608 static void compute_pre_data (void);
609 static int pre_expr_reaches_here_p (basic_block, struct expr *,
610 basic_block);
611 static void insert_insn_end_bb (struct expr *, basic_block, int);
612 static void pre_insert_copy_insn (struct expr *, rtx);
613 static void pre_insert_copies (void);
614 static int pre_delete (void);
615 static int pre_gcse (void);
616 static int one_pre_gcse_pass (int);
617 static void add_label_notes (rtx, rtx);
618 static void alloc_code_hoist_mem (int, int);
619 static void free_code_hoist_mem (void);
620 static void compute_code_hoist_vbeinout (void);
621 static void compute_code_hoist_data (void);
622 static int hoist_expr_reaches_here_p (basic_block, int, basic_block, char *);
623 static void hoist_code (void);
624 static int one_code_hoisting_pass (void);
625 static rtx process_insert_insn (struct expr *);
626 static int pre_edge_insert (struct edge_list *, struct expr **);
627 static int pre_expr_reaches_here_p_work (basic_block, struct expr *,
628 basic_block, char *);
629 static struct ls_expr * ldst_entry (rtx);
630 static void free_ldst_entry (struct ls_expr *);
631 static void free_ldst_mems (void);
632 static void print_ldst_list (FILE *);
633 static struct ls_expr * find_rtx_in_ldst (rtx);
634 static int enumerate_ldsts (void);
635 static inline struct ls_expr * first_ls_expr (void);
636 static inline struct ls_expr * next_ls_expr (struct ls_expr *);
637 static int simple_mem (rtx);
638 static void invalidate_any_buried_refs (rtx);
639 static void compute_ld_motion_mems (void);
640 static void trim_ld_motion_mems (void);
641 static void update_ld_motion_stores (struct expr *);
642 static void reg_set_info (rtx, rtx, void *);
643 static void reg_clear_last_set (rtx, rtx, void *);
644 static bool store_ops_ok (rtx, int *);
645 static rtx extract_mentioned_regs (rtx);
646 static rtx extract_mentioned_regs_helper (rtx, rtx);
647 static void find_moveable_store (rtx, int *, int *);
648 static int compute_store_table (void);
649 static bool load_kills_store (rtx, rtx, int);
650 static bool find_loads (rtx, rtx, int);
651 static bool store_killed_in_insn (rtx, rtx, rtx, int);
652 static bool store_killed_after (rtx, rtx, rtx, basic_block, int *, rtx *);
653 static bool store_killed_before (rtx, rtx, rtx, basic_block, int *);
654 static void build_store_vectors (void);
655 static void insert_insn_start_bb (rtx, basic_block);
656 static int insert_store (struct ls_expr *, edge);
657 static void remove_reachable_equiv_notes (basic_block, struct ls_expr *);
658 static void replace_store_insn (rtx, rtx, basic_block, struct ls_expr *);
659 static void delete_store (struct ls_expr *, basic_block);
660 static void free_store_memory (void);
661 static void store_motion (void);
662 static void free_insn_expr_list_list (rtx *);
663 static void clear_modify_mem_tables (void);
664 static void free_modify_mem_tables (void);
665 static rtx gcse_emit_move_after (rtx, rtx, rtx);
666 static void local_cprop_find_used_regs (rtx *, void *);
667 static bool do_local_cprop (rtx, rtx, int, rtx*);
668 static bool adjust_libcall_notes (rtx, rtx, rtx, rtx*);
669 static void local_cprop_pass (int);
670 static bool is_too_expensive (const char *);
671 \f
672
673 /* Entry point for global common subexpression elimination.
674 F is the first instruction in the function. */
675
676 int
677 gcse_main (rtx f, FILE *file)
678 {
679 int changed, pass;
680 /* Bytes used at start of pass. */
681 int initial_bytes_used;
682 /* Maximum number of bytes used by a pass. */
683 int max_pass_bytes;
684 /* Point to release obstack data from for each pass. */
685 char *gcse_obstack_bottom;
686
687 /* We do not construct an accurate cfg in functions which call
688 setjmp, so just punt to be safe. */
689 if (current_function_calls_setjmp)
690 return 0;
691
692 /* Assume that we do not need to run jump optimizations after gcse. */
693 run_jump_opt_after_gcse = 0;
694
695 /* For calling dump_foo fns from gdb. */
696 debug_stderr = stderr;
697 gcse_file = file;
698
699 /* Identify the basic block information for this function, including
700 successors and predecessors. */
701 max_gcse_regno = max_reg_num ();
702
703 if (file)
704 dump_flow_info (file);
705
706 /* Return if there's nothing to do, or it is too expensive. */
707 if (n_basic_blocks <= 1 || is_too_expensive (_("GCSE disabled")))
708 return 0;
709
710 gcc_obstack_init (&gcse_obstack);
711 bytes_used = 0;
712
713 /* We need alias. */
714 init_alias_analysis ();
715 /* Record where pseudo-registers are set. This data is kept accurate
716 during each pass. ??? We could also record hard-reg information here
717 [since it's unchanging], however it is currently done during hash table
718 computation.
719
720 It may be tempting to compute MEM set information here too, but MEM sets
721 will be subject to code motion one day and thus we need to compute
722 information about memory sets when we build the hash tables. */
723
724 alloc_reg_set_mem (max_gcse_regno);
725 compute_sets (f);
726
727 pass = 0;
728 initial_bytes_used = bytes_used;
729 max_pass_bytes = 0;
730 gcse_obstack_bottom = gcse_alloc (1);
731 changed = 1;
732 while (changed && pass < MAX_GCSE_PASSES)
733 {
734 changed = 0;
735 if (file)
736 fprintf (file, "GCSE pass %d\n\n", pass + 1);
737
738 /* Initialize bytes_used to the space for the pred/succ lists,
739 and the reg_set_table data. */
740 bytes_used = initial_bytes_used;
741
742 /* Each pass may create new registers, so recalculate each time. */
743 max_gcse_regno = max_reg_num ();
744
745 alloc_gcse_mem (f);
746
747 /* Don't allow constant propagation to modify jumps
748 during this pass. */
749 changed = one_cprop_pass (pass + 1, 0, 0);
750
751 if (optimize_size)
752 /* Do nothing. */ ;
753 else
754 {
755 changed |= one_pre_gcse_pass (pass + 1);
756 /* We may have just created new basic blocks. Release and
757 recompute various things which are sized on the number of
758 basic blocks. */
759 if (changed)
760 {
761 free_modify_mem_tables ();
762 modify_mem_list = gcalloc (last_basic_block, sizeof (rtx));
763 canon_modify_mem_list = gcalloc (last_basic_block, sizeof (rtx));
764 }
765 free_reg_set_mem ();
766 alloc_reg_set_mem (max_reg_num ());
767 compute_sets (f);
768 run_jump_opt_after_gcse = 1;
769 }
770
771 if (max_pass_bytes < bytes_used)
772 max_pass_bytes = bytes_used;
773
774 /* Free up memory, then reallocate for code hoisting. We can
775 not re-use the existing allocated memory because the tables
776 will not have info for the insns or registers created by
777 partial redundancy elimination. */
778 free_gcse_mem ();
779
780 /* It does not make sense to run code hoisting unless we are optimizing
781 for code size -- it rarely makes programs faster, and can make
782 them bigger if we did partial redundancy elimination (when optimizing
783 for space, we don't run the partial redundancy algorithms). */
784 if (optimize_size)
785 {
786 max_gcse_regno = max_reg_num ();
787 alloc_gcse_mem (f);
788 changed |= one_code_hoisting_pass ();
789 free_gcse_mem ();
790
791 if (max_pass_bytes < bytes_used)
792 max_pass_bytes = bytes_used;
793 }
794
795 if (file)
796 {
797 fprintf (file, "\n");
798 fflush (file);
799 }
800
801 obstack_free (&gcse_obstack, gcse_obstack_bottom);
802 pass++;
803 }
804
805 /* Do one last pass of copy propagation, including cprop into
806 conditional jumps. */
807
808 max_gcse_regno = max_reg_num ();
809 alloc_gcse_mem (f);
810 /* This time, go ahead and allow cprop to alter jumps. */
811 one_cprop_pass (pass + 1, 1, 0);
812 free_gcse_mem ();
813
814 if (file)
815 {
816 fprintf (file, "GCSE of %s: %d basic blocks, ",
817 current_function_name (), n_basic_blocks);
818 fprintf (file, "%d pass%s, %d bytes\n\n",
819 pass, pass > 1 ? "es" : "", max_pass_bytes);
820 }
821
822 obstack_free (&gcse_obstack, NULL);
823 free_reg_set_mem ();
824
825 /* We are finished with alias. */
826 end_alias_analysis ();
827 allocate_reg_info (max_reg_num (), FALSE, FALSE);
828
829 if (!optimize_size && flag_gcse_sm)
830 store_motion ();
831
832 /* Record where pseudo-registers are set. */
833 return run_jump_opt_after_gcse;
834 }
835 \f
836 /* Misc. utilities. */
837
838 /* Nonzero for each mode that supports (set (reg) (reg)).
839 This is trivially true for integer and floating point values.
840 It may or may not be true for condition codes. */
841 static char can_copy[(int) NUM_MACHINE_MODES];
842
843 /* Compute which modes support reg/reg copy operations. */
844
845 static void
846 compute_can_copy (void)
847 {
848 int i;
849 #ifndef AVOID_CCMODE_COPIES
850 rtx reg, insn;
851 #endif
852 memset (can_copy, 0, NUM_MACHINE_MODES);
853
854 start_sequence ();
855 for (i = 0; i < NUM_MACHINE_MODES; i++)
856 if (GET_MODE_CLASS (i) == MODE_CC)
857 {
858 #ifdef AVOID_CCMODE_COPIES
859 can_copy[i] = 0;
860 #else
861 reg = gen_rtx_REG ((enum machine_mode) i, LAST_VIRTUAL_REGISTER + 1);
862 insn = emit_insn (gen_rtx_SET (VOIDmode, reg, reg));
863 if (recog (PATTERN (insn), insn, NULL) >= 0)
864 can_copy[i] = 1;
865 #endif
866 }
867 else
868 can_copy[i] = 1;
869
870 end_sequence ();
871 }
872
873 /* Returns whether the mode supports reg/reg copy operations. */
874
875 bool
876 can_copy_p (enum machine_mode mode)
877 {
878 static bool can_copy_init_p = false;
879
880 if (! can_copy_init_p)
881 {
882 compute_can_copy ();
883 can_copy_init_p = true;
884 }
885
886 return can_copy[mode] != 0;
887 }
888 \f
889 /* Cover function to xmalloc to record bytes allocated. */
890
891 static void *
892 gmalloc (size_t size)
893 {
894 bytes_used += size;
895 return xmalloc (size);
896 }
897
898 /* Cover function to xcalloc to record bytes allocated. */
899
900 static void *
901 gcalloc (size_t nelem, size_t elsize)
902 {
903 bytes_used += nelem * elsize;
904 return xcalloc (nelem, elsize);
905 }
906
907 /* Cover function to xrealloc.
908 We don't record the additional size since we don't know it.
909 It won't affect memory usage stats much anyway. */
910
911 static void *
912 grealloc (void *ptr, size_t size)
913 {
914 return xrealloc (ptr, size);
915 }
916
917 /* Cover function to obstack_alloc. */
918
919 static void *
920 gcse_alloc (unsigned long size)
921 {
922 bytes_used += size;
923 return obstack_alloc (&gcse_obstack, size);
924 }
925
926 /* Allocate memory for the cuid mapping array,
927 and reg/memory set tracking tables.
928
929 This is called at the start of each pass. */
930
931 static void
932 alloc_gcse_mem (rtx f)
933 {
934 int i;
935 rtx insn;
936
937 /* Find the largest UID and create a mapping from UIDs to CUIDs.
938 CUIDs are like UIDs except they increase monotonically, have no gaps,
939 and only apply to real insns. */
940
941 max_uid = get_max_uid ();
942 uid_cuid = gcalloc (max_uid + 1, sizeof (int));
943 for (insn = f, i = 0; insn; insn = NEXT_INSN (insn))
944 {
945 if (INSN_P (insn))
946 uid_cuid[INSN_UID (insn)] = i++;
947 else
948 uid_cuid[INSN_UID (insn)] = i;
949 }
950
951 /* Create a table mapping cuids to insns. */
952
953 max_cuid = i;
954 cuid_insn = gcalloc (max_cuid + 1, sizeof (rtx));
955 for (insn = f, i = 0; insn; insn = NEXT_INSN (insn))
956 if (INSN_P (insn))
957 CUID_INSN (i++) = insn;
958
959 /* Allocate vars to track sets of regs. */
960 reg_set_bitmap = BITMAP_XMALLOC ();
961
962 /* Allocate vars to track sets of regs, memory per block. */
963 reg_set_in_block = sbitmap_vector_alloc (last_basic_block, max_gcse_regno);
964 /* Allocate array to keep a list of insns which modify memory in each
965 basic block. */
966 modify_mem_list = gcalloc (last_basic_block, sizeof (rtx));
967 canon_modify_mem_list = gcalloc (last_basic_block, sizeof (rtx));
968 modify_mem_list_set = BITMAP_XMALLOC ();
969 canon_modify_mem_list_set = BITMAP_XMALLOC ();
970 }
971
972 /* Free memory allocated by alloc_gcse_mem. */
973
974 static void
975 free_gcse_mem (void)
976 {
977 free (uid_cuid);
978 free (cuid_insn);
979
980 BITMAP_XFREE (reg_set_bitmap);
981
982 sbitmap_vector_free (reg_set_in_block);
983 free_modify_mem_tables ();
984 BITMAP_XFREE (modify_mem_list_set);
985 BITMAP_XFREE (canon_modify_mem_list_set);
986 }
987 \f
988 /* Compute the local properties of each recorded expression.
989
990 Local properties are those that are defined by the block, irrespective of
991 other blocks.
992
993 An expression is transparent in a block if its operands are not modified
994 in the block.
995
996 An expression is computed (locally available) in a block if it is computed
997 at least once and expression would contain the same value if the
998 computation was moved to the end of the block.
999
1000 An expression is locally anticipatable in a block if it is computed at
1001 least once and expression would contain the same value if the computation
1002 was moved to the beginning of the block.
1003
1004 We call this routine for cprop, pre and code hoisting. They all compute
1005 basically the same information and thus can easily share this code.
1006
1007 TRANSP, COMP, and ANTLOC are destination sbitmaps for recording local
1008 properties. If NULL, then it is not necessary to compute or record that
1009 particular property.
1010
1011 TABLE controls which hash table to look at. If it is set hash table,
1012 additionally, TRANSP is computed as ~TRANSP, since this is really cprop's
1013 ABSALTERED. */
1014
1015 static void
1016 compute_local_properties (sbitmap *transp, sbitmap *comp, sbitmap *antloc,
1017 struct hash_table *table)
1018 {
1019 unsigned int i;
1020
1021 /* Initialize any bitmaps that were passed in. */
1022 if (transp)
1023 {
1024 if (table->set_p)
1025 sbitmap_vector_zero (transp, last_basic_block);
1026 else
1027 sbitmap_vector_ones (transp, last_basic_block);
1028 }
1029
1030 if (comp)
1031 sbitmap_vector_zero (comp, last_basic_block);
1032 if (antloc)
1033 sbitmap_vector_zero (antloc, last_basic_block);
1034
1035 for (i = 0; i < table->size; i++)
1036 {
1037 struct expr *expr;
1038
1039 for (expr = table->table[i]; expr != NULL; expr = expr->next_same_hash)
1040 {
1041 int indx = expr->bitmap_index;
1042 struct occr *occr;
1043
1044 /* The expression is transparent in this block if it is not killed.
1045 We start by assuming all are transparent [none are killed], and
1046 then reset the bits for those that are. */
1047 if (transp)
1048 compute_transp (expr->expr, indx, transp, table->set_p);
1049
1050 /* The occurrences recorded in antic_occr are exactly those that
1051 we want to set to nonzero in ANTLOC. */
1052 if (antloc)
1053 for (occr = expr->antic_occr; occr != NULL; occr = occr->next)
1054 {
1055 SET_BIT (antloc[BLOCK_NUM (occr->insn)], indx);
1056
1057 /* While we're scanning the table, this is a good place to
1058 initialize this. */
1059 occr->deleted_p = 0;
1060 }
1061
1062 /* The occurrences recorded in avail_occr are exactly those that
1063 we want to set to nonzero in COMP. */
1064 if (comp)
1065 for (occr = expr->avail_occr; occr != NULL; occr = occr->next)
1066 {
1067 SET_BIT (comp[BLOCK_NUM (occr->insn)], indx);
1068
1069 /* While we're scanning the table, this is a good place to
1070 initialize this. */
1071 occr->copied_p = 0;
1072 }
1073
1074 /* While we're scanning the table, this is a good place to
1075 initialize this. */
1076 expr->reaching_reg = 0;
1077 }
1078 }
1079 }
1080 \f
1081 /* Register set information.
1082
1083 `reg_set_table' records where each register is set or otherwise
1084 modified. */
1085
1086 static struct obstack reg_set_obstack;
1087
1088 static void
1089 alloc_reg_set_mem (int n_regs)
1090 {
1091 reg_set_table_size = n_regs + REG_SET_TABLE_SLOP;
1092 reg_set_table = gcalloc (reg_set_table_size, sizeof (struct reg_set *));
1093
1094 gcc_obstack_init (&reg_set_obstack);
1095 }
1096
1097 static void
1098 free_reg_set_mem (void)
1099 {
1100 free (reg_set_table);
1101 obstack_free (&reg_set_obstack, NULL);
1102 }
1103
1104 /* An OLD_INSN that used to set REGNO was replaced by NEW_INSN.
1105 Update the corresponding `reg_set_table' entry accordingly.
1106 We assume that NEW_INSN is not already recorded in reg_set_table[regno]. */
1107
1108 static void
1109 replace_one_set (int regno, rtx old_insn, rtx new_insn)
1110 {
1111 struct reg_set *reg_info;
1112 if (regno >= reg_set_table_size)
1113 return;
1114 for (reg_info = reg_set_table[regno]; reg_info; reg_info = reg_info->next)
1115 if (reg_info->insn == old_insn)
1116 {
1117 reg_info->insn = new_insn;
1118 break;
1119 }
1120 }
1121
1122 /* Record REGNO in the reg_set table. */
1123
1124 static void
1125 record_one_set (int regno, rtx insn)
1126 {
1127 /* Allocate a new reg_set element and link it onto the list. */
1128 struct reg_set *new_reg_info;
1129
1130 /* If the table isn't big enough, enlarge it. */
1131 if (regno >= reg_set_table_size)
1132 {
1133 int new_size = regno + REG_SET_TABLE_SLOP;
1134
1135 reg_set_table = grealloc (reg_set_table,
1136 new_size * sizeof (struct reg_set *));
1137 memset (reg_set_table + reg_set_table_size, 0,
1138 (new_size - reg_set_table_size) * sizeof (struct reg_set *));
1139 reg_set_table_size = new_size;
1140 }
1141
1142 new_reg_info = obstack_alloc (&reg_set_obstack, sizeof (struct reg_set));
1143 bytes_used += sizeof (struct reg_set);
1144 new_reg_info->insn = insn;
1145 new_reg_info->next = reg_set_table[regno];
1146 reg_set_table[regno] = new_reg_info;
1147 }
1148
1149 /* Called from compute_sets via note_stores to handle one SET or CLOBBER in
1150 an insn. The DATA is really the instruction in which the SET is
1151 occurring. */
1152
1153 static void
1154 record_set_info (rtx dest, rtx setter ATTRIBUTE_UNUSED, void *data)
1155 {
1156 rtx record_set_insn = (rtx) data;
1157
1158 if (REG_P (dest) && REGNO (dest) >= FIRST_PSEUDO_REGISTER)
1159 record_one_set (REGNO (dest), record_set_insn);
1160 }
1161
1162 /* Scan the function and record each set of each pseudo-register.
1163
1164 This is called once, at the start of the gcse pass. See the comments for
1165 `reg_set_table' for further documentation. */
1166
1167 static void
1168 compute_sets (rtx f)
1169 {
1170 rtx insn;
1171
1172 for (insn = f; insn != 0; insn = NEXT_INSN (insn))
1173 if (INSN_P (insn))
1174 note_stores (PATTERN (insn), record_set_info, insn);
1175 }
1176 \f
1177 /* Hash table support. */
1178
1179 struct reg_avail_info
1180 {
1181 basic_block last_bb;
1182 int first_set;
1183 int last_set;
1184 };
1185
1186 static struct reg_avail_info *reg_avail_info;
1187 static basic_block current_bb;
1188
1189
1190 /* See whether X, the source of a set, is something we want to consider for
1191 GCSE. */
1192
1193 static int
1194 want_to_gcse_p (rtx x)
1195 {
1196 switch (GET_CODE (x))
1197 {
1198 case REG:
1199 case SUBREG:
1200 case CONST_INT:
1201 case CONST_DOUBLE:
1202 case CONST_VECTOR:
1203 case CALL:
1204 return 0;
1205
1206 default:
1207 return can_assign_to_reg_p (x);
1208 }
1209 }
1210
1211 /* Used internally by can_assign_to_reg_p. */
1212
1213 static GTY(()) rtx test_insn;
1214
1215 /* Return true if we can assign X to a pseudo register. */
1216
1217 static bool
1218 can_assign_to_reg_p (rtx x)
1219 {
1220 int num_clobbers = 0;
1221 int icode;
1222
1223 /* If this is a valid operand, we are OK. If it's VOIDmode, we aren't. */
1224 if (general_operand (x, GET_MODE (x)))
1225 return 1;
1226 else if (GET_MODE (x) == VOIDmode)
1227 return 0;
1228
1229 /* Otherwise, check if we can make a valid insn from it. First initialize
1230 our test insn if we haven't already. */
1231 if (test_insn == 0)
1232 {
1233 test_insn
1234 = make_insn_raw (gen_rtx_SET (VOIDmode,
1235 gen_rtx_REG (word_mode,
1236 FIRST_PSEUDO_REGISTER * 2),
1237 const0_rtx));
1238 NEXT_INSN (test_insn) = PREV_INSN (test_insn) = 0;
1239 }
1240
1241 /* Now make an insn like the one we would make when GCSE'ing and see if
1242 valid. */
1243 PUT_MODE (SET_DEST (PATTERN (test_insn)), GET_MODE (x));
1244 SET_SRC (PATTERN (test_insn)) = x;
1245 return ((icode = recog (PATTERN (test_insn), test_insn, &num_clobbers)) >= 0
1246 && (num_clobbers == 0 || ! added_clobbers_hard_reg_p (icode)));
1247 }
1248
1249 /* Return nonzero if the operands of expression X are unchanged from the
1250 start of INSN's basic block up to but not including INSN (if AVAIL_P == 0),
1251 or from INSN to the end of INSN's basic block (if AVAIL_P != 0). */
1252
1253 static int
1254 oprs_unchanged_p (rtx x, rtx insn, int avail_p)
1255 {
1256 int i, j;
1257 enum rtx_code code;
1258 const char *fmt;
1259
1260 if (x == 0)
1261 return 1;
1262
1263 code = GET_CODE (x);
1264 switch (code)
1265 {
1266 case REG:
1267 {
1268 struct reg_avail_info *info = &reg_avail_info[REGNO (x)];
1269
1270 if (info->last_bb != current_bb)
1271 return 1;
1272 if (avail_p)
1273 return info->last_set < INSN_CUID (insn);
1274 else
1275 return info->first_set >= INSN_CUID (insn);
1276 }
1277
1278 case MEM:
1279 if (load_killed_in_block_p (current_bb, INSN_CUID (insn),
1280 x, avail_p))
1281 return 0;
1282 else
1283 return oprs_unchanged_p (XEXP (x, 0), insn, avail_p);
1284
1285 case PRE_DEC:
1286 case PRE_INC:
1287 case POST_DEC:
1288 case POST_INC:
1289 case PRE_MODIFY:
1290 case POST_MODIFY:
1291 return 0;
1292
1293 case PC:
1294 case CC0: /*FIXME*/
1295 case CONST:
1296 case CONST_INT:
1297 case CONST_DOUBLE:
1298 case CONST_VECTOR:
1299 case SYMBOL_REF:
1300 case LABEL_REF:
1301 case ADDR_VEC:
1302 case ADDR_DIFF_VEC:
1303 return 1;
1304
1305 default:
1306 break;
1307 }
1308
1309 for (i = GET_RTX_LENGTH (code) - 1, fmt = GET_RTX_FORMAT (code); i >= 0; i--)
1310 {
1311 if (fmt[i] == 'e')
1312 {
1313 /* If we are about to do the last recursive call needed at this
1314 level, change it into iteration. This function is called enough
1315 to be worth it. */
1316 if (i == 0)
1317 return oprs_unchanged_p (XEXP (x, i), insn, avail_p);
1318
1319 else if (! oprs_unchanged_p (XEXP (x, i), insn, avail_p))
1320 return 0;
1321 }
1322 else if (fmt[i] == 'E')
1323 for (j = 0; j < XVECLEN (x, i); j++)
1324 if (! oprs_unchanged_p (XVECEXP (x, i, j), insn, avail_p))
1325 return 0;
1326 }
1327
1328 return 1;
1329 }
1330
1331 /* Used for communication between mems_conflict_for_gcse_p and
1332 load_killed_in_block_p. Nonzero if mems_conflict_for_gcse_p finds a
1333 conflict between two memory references. */
1334 static int gcse_mems_conflict_p;
1335
1336 /* Used for communication between mems_conflict_for_gcse_p and
1337 load_killed_in_block_p. A memory reference for a load instruction,
1338 mems_conflict_for_gcse_p will see if a memory store conflicts with
1339 this memory load. */
1340 static rtx gcse_mem_operand;
1341
1342 /* DEST is the output of an instruction. If it is a memory reference, and
1343 possibly conflicts with the load found in gcse_mem_operand, then set
1344 gcse_mems_conflict_p to a nonzero value. */
1345
1346 static void
1347 mems_conflict_for_gcse_p (rtx dest, rtx setter ATTRIBUTE_UNUSED,
1348 void *data ATTRIBUTE_UNUSED)
1349 {
1350 while (GET_CODE (dest) == SUBREG
1351 || GET_CODE (dest) == ZERO_EXTRACT
1352 || GET_CODE (dest) == SIGN_EXTRACT
1353 || GET_CODE (dest) == STRICT_LOW_PART)
1354 dest = XEXP (dest, 0);
1355
1356 /* If DEST is not a MEM, then it will not conflict with the load. Note
1357 that function calls are assumed to clobber memory, but are handled
1358 elsewhere. */
1359 if (! MEM_P (dest))
1360 return;
1361
1362 /* If we are setting a MEM in our list of specially recognized MEMs,
1363 don't mark as killed this time. */
1364
1365 if (expr_equiv_p (dest, gcse_mem_operand) && pre_ldst_mems != NULL)
1366 {
1367 if (!find_rtx_in_ldst (dest))
1368 gcse_mems_conflict_p = 1;
1369 return;
1370 }
1371
1372 if (true_dependence (dest, GET_MODE (dest), gcse_mem_operand,
1373 rtx_addr_varies_p))
1374 gcse_mems_conflict_p = 1;
1375 }
1376
1377 /* Return nonzero if the expression in X (a memory reference) is killed
1378 in block BB before or after the insn with the CUID in UID_LIMIT.
1379 AVAIL_P is nonzero for kills after UID_LIMIT, and zero for kills
1380 before UID_LIMIT.
1381
1382 To check the entire block, set UID_LIMIT to max_uid + 1 and
1383 AVAIL_P to 0. */
1384
1385 static int
1386 load_killed_in_block_p (basic_block bb, int uid_limit, rtx x, int avail_p)
1387 {
1388 rtx list_entry = modify_mem_list[bb->index];
1389 while (list_entry)
1390 {
1391 rtx setter;
1392 /* Ignore entries in the list that do not apply. */
1393 if ((avail_p
1394 && INSN_CUID (XEXP (list_entry, 0)) < uid_limit)
1395 || (! avail_p
1396 && INSN_CUID (XEXP (list_entry, 0)) > uid_limit))
1397 {
1398 list_entry = XEXP (list_entry, 1);
1399 continue;
1400 }
1401
1402 setter = XEXP (list_entry, 0);
1403
1404 /* If SETTER is a call everything is clobbered. Note that calls
1405 to pure functions are never put on the list, so we need not
1406 worry about them. */
1407 if (CALL_P (setter))
1408 return 1;
1409
1410 /* SETTER must be an INSN of some kind that sets memory. Call
1411 note_stores to examine each hunk of memory that is modified.
1412
1413 The note_stores interface is pretty limited, so we have to
1414 communicate via global variables. Yuk. */
1415 gcse_mem_operand = x;
1416 gcse_mems_conflict_p = 0;
1417 note_stores (PATTERN (setter), mems_conflict_for_gcse_p, NULL);
1418 if (gcse_mems_conflict_p)
1419 return 1;
1420 list_entry = XEXP (list_entry, 1);
1421 }
1422 return 0;
1423 }
1424
1425 /* Return nonzero if the operands of expression X are unchanged from
1426 the start of INSN's basic block up to but not including INSN. */
1427
1428 static int
1429 oprs_anticipatable_p (rtx x, rtx insn)
1430 {
1431 return oprs_unchanged_p (x, insn, 0);
1432 }
1433
1434 /* Return nonzero if the operands of expression X are unchanged from
1435 INSN to the end of INSN's basic block. */
1436
1437 static int
1438 oprs_available_p (rtx x, rtx insn)
1439 {
1440 return oprs_unchanged_p (x, insn, 1);
1441 }
1442
1443 /* Hash expression X.
1444
1445 MODE is only used if X is a CONST_INT. DO_NOT_RECORD_P is a boolean
1446 indicating if a volatile operand is found or if the expression contains
1447 something we don't want to insert in the table. HASH_TABLE_SIZE is
1448 the current size of the hash table to be probed.
1449
1450 ??? One might want to merge this with canon_hash. Later. */
1451
1452 static unsigned int
1453 hash_expr (rtx x, enum machine_mode mode, int *do_not_record_p,
1454 int hash_table_size)
1455 {
1456 unsigned int hash;
1457
1458 *do_not_record_p = 0;
1459
1460 hash = hash_expr_1 (x, mode, do_not_record_p);
1461 return hash % hash_table_size;
1462 }
1463
1464 /* Hash a string. Just add its bytes up. */
1465
1466 static inline unsigned
1467 hash_string_1 (const char *ps)
1468 {
1469 unsigned hash = 0;
1470 const unsigned char *p = (const unsigned char *) ps;
1471
1472 if (p)
1473 while (*p)
1474 hash += *p++;
1475
1476 return hash;
1477 }
1478
1479 /* Subroutine of hash_expr to do the actual work. */
1480
1481 static unsigned int
1482 hash_expr_1 (rtx x, enum machine_mode mode, int *do_not_record_p)
1483 {
1484 int i, j;
1485 unsigned hash = 0;
1486 enum rtx_code code;
1487 const char *fmt;
1488
1489 if (x == 0)
1490 return hash;
1491
1492 /* Used to turn recursion into iteration. We can't rely on GCC's
1493 tail-recursion elimination since we need to keep accumulating values
1494 in HASH. */
1495 repeat:
1496
1497 code = GET_CODE (x);
1498 switch (code)
1499 {
1500 case REG:
1501 hash += ((unsigned int) REG << 7) + REGNO (x);
1502 return hash;
1503
1504 case CONST_INT:
1505 hash += (((unsigned int) CONST_INT << 7) + (unsigned int) mode
1506 + (unsigned int) INTVAL (x));
1507 return hash;
1508
1509 case CONST_DOUBLE:
1510 /* This is like the general case, except that it only counts
1511 the integers representing the constant. */
1512 hash += (unsigned int) code + (unsigned int) GET_MODE (x);
1513 if (GET_MODE (x) != VOIDmode)
1514 for (i = 2; i < GET_RTX_LENGTH (CONST_DOUBLE); i++)
1515 hash += (unsigned int) XWINT (x, i);
1516 else
1517 hash += ((unsigned int) CONST_DOUBLE_LOW (x)
1518 + (unsigned int) CONST_DOUBLE_HIGH (x));
1519 return hash;
1520
1521 case CONST_VECTOR:
1522 {
1523 int units;
1524 rtx elt;
1525
1526 units = CONST_VECTOR_NUNITS (x);
1527
1528 for (i = 0; i < units; ++i)
1529 {
1530 elt = CONST_VECTOR_ELT (x, i);
1531 hash += hash_expr_1 (elt, GET_MODE (elt), do_not_record_p);
1532 }
1533
1534 return hash;
1535 }
1536
1537 /* Assume there is only one rtx object for any given label. */
1538 case LABEL_REF:
1539 /* We don't hash on the address of the CODE_LABEL to avoid bootstrap
1540 differences and differences between each stage's debugging dumps. */
1541 hash += (((unsigned int) LABEL_REF << 7)
1542 + CODE_LABEL_NUMBER (XEXP (x, 0)));
1543 return hash;
1544
1545 case SYMBOL_REF:
1546 {
1547 /* Don't hash on the symbol's address to avoid bootstrap differences.
1548 Different hash values may cause expressions to be recorded in
1549 different orders and thus different registers to be used in the
1550 final assembler. This also avoids differences in the dump files
1551 between various stages. */
1552 unsigned int h = 0;
1553 const unsigned char *p = (const unsigned char *) XSTR (x, 0);
1554
1555 while (*p)
1556 h += (h << 7) + *p++; /* ??? revisit */
1557
1558 hash += ((unsigned int) SYMBOL_REF << 7) + h;
1559 return hash;
1560 }
1561
1562 case MEM:
1563 if (MEM_VOLATILE_P (x))
1564 {
1565 *do_not_record_p = 1;
1566 return 0;
1567 }
1568
1569 hash += (unsigned int) MEM;
1570 /* We used alias set for hashing, but this is not good, since the alias
1571 set may differ in -fprofile-arcs and -fbranch-probabilities compilation
1572 causing the profiles to fail to match. */
1573 x = XEXP (x, 0);
1574 goto repeat;
1575
1576 case PRE_DEC:
1577 case PRE_INC:
1578 case POST_DEC:
1579 case POST_INC:
1580 case PC:
1581 case CC0:
1582 case CALL:
1583 case UNSPEC_VOLATILE:
1584 *do_not_record_p = 1;
1585 return 0;
1586
1587 case ASM_OPERANDS:
1588 if (MEM_VOLATILE_P (x))
1589 {
1590 *do_not_record_p = 1;
1591 return 0;
1592 }
1593 else
1594 {
1595 /* We don't want to take the filename and line into account. */
1596 hash += (unsigned) code + (unsigned) GET_MODE (x)
1597 + hash_string_1 (ASM_OPERANDS_TEMPLATE (x))
1598 + hash_string_1 (ASM_OPERANDS_OUTPUT_CONSTRAINT (x))
1599 + (unsigned) ASM_OPERANDS_OUTPUT_IDX (x);
1600
1601 if (ASM_OPERANDS_INPUT_LENGTH (x))
1602 {
1603 for (i = 1; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
1604 {
1605 hash += (hash_expr_1 (ASM_OPERANDS_INPUT (x, i),
1606 GET_MODE (ASM_OPERANDS_INPUT (x, i)),
1607 do_not_record_p)
1608 + hash_string_1 (ASM_OPERANDS_INPUT_CONSTRAINT
1609 (x, i)));
1610 }
1611
1612 hash += hash_string_1 (ASM_OPERANDS_INPUT_CONSTRAINT (x, 0));
1613 x = ASM_OPERANDS_INPUT (x, 0);
1614 mode = GET_MODE (x);
1615 goto repeat;
1616 }
1617 return hash;
1618 }
1619
1620 default:
1621 break;
1622 }
1623
1624 hash += (unsigned) code + (unsigned) GET_MODE (x);
1625 for (i = GET_RTX_LENGTH (code) - 1, fmt = GET_RTX_FORMAT (code); i >= 0; i--)
1626 {
1627 if (fmt[i] == 'e')
1628 {
1629 /* If we are about to do the last recursive call
1630 needed at this level, change it into iteration.
1631 This function is called enough to be worth it. */
1632 if (i == 0)
1633 {
1634 x = XEXP (x, i);
1635 goto repeat;
1636 }
1637
1638 hash += hash_expr_1 (XEXP (x, i), 0, do_not_record_p);
1639 if (*do_not_record_p)
1640 return 0;
1641 }
1642
1643 else if (fmt[i] == 'E')
1644 for (j = 0; j < XVECLEN (x, i); j++)
1645 {
1646 hash += hash_expr_1 (XVECEXP (x, i, j), 0, do_not_record_p);
1647 if (*do_not_record_p)
1648 return 0;
1649 }
1650
1651 else if (fmt[i] == 's')
1652 hash += hash_string_1 (XSTR (x, i));
1653 else if (fmt[i] == 'i')
1654 hash += (unsigned int) XINT (x, i);
1655 else
1656 abort ();
1657 }
1658
1659 return hash;
1660 }
1661
1662 /* Hash a set of register REGNO.
1663
1664 Sets are hashed on the register that is set. This simplifies the PRE copy
1665 propagation code.
1666
1667 ??? May need to make things more elaborate. Later, as necessary. */
1668
1669 static unsigned int
1670 hash_set (int regno, int hash_table_size)
1671 {
1672 unsigned int hash;
1673
1674 hash = regno;
1675 return hash % hash_table_size;
1676 }
1677
1678 /* Return nonzero if exp1 is equivalent to exp2.
1679 ??? Borrowed from cse.c. Might want to remerge with cse.c. Later. */
1680
1681 static int
1682 expr_equiv_p (rtx x, rtx y)
1683 {
1684 int i, j;
1685 enum rtx_code code;
1686 const char *fmt;
1687
1688 if (x == y)
1689 return 1;
1690
1691 if (x == 0 || y == 0)
1692 return 0;
1693
1694 code = GET_CODE (x);
1695 if (code != GET_CODE (y))
1696 return 0;
1697
1698 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
1699 if (GET_MODE (x) != GET_MODE (y))
1700 return 0;
1701
1702 switch (code)
1703 {
1704 case PC:
1705 case CC0:
1706 case CONST_INT:
1707 return 0;
1708
1709 case LABEL_REF:
1710 return XEXP (x, 0) == XEXP (y, 0);
1711
1712 case SYMBOL_REF:
1713 return XSTR (x, 0) == XSTR (y, 0);
1714
1715 case REG:
1716 return REGNO (x) == REGNO (y);
1717
1718 case MEM:
1719 /* Can't merge two expressions in different alias sets, since we can
1720 decide that the expression is transparent in a block when it isn't,
1721 due to it being set with the different alias set. */
1722 if (MEM_ALIAS_SET (x) != MEM_ALIAS_SET (y))
1723 return 0;
1724
1725 /* A volatile mem should not be considered equivalent to any other. */
1726 if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y))
1727 return 0;
1728 break;
1729
1730 /* For commutative operations, check both orders. */
1731 case PLUS:
1732 case MULT:
1733 case AND:
1734 case IOR:
1735 case XOR:
1736 case NE:
1737 case EQ:
1738 return ((expr_equiv_p (XEXP (x, 0), XEXP (y, 0))
1739 && expr_equiv_p (XEXP (x, 1), XEXP (y, 1)))
1740 || (expr_equiv_p (XEXP (x, 0), XEXP (y, 1))
1741 && expr_equiv_p (XEXP (x, 1), XEXP (y, 0))));
1742
1743 case ASM_OPERANDS:
1744 /* We don't use the generic code below because we want to
1745 disregard filename and line numbers. */
1746
1747 /* A volatile asm isn't equivalent to any other. */
1748 if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y))
1749 return 0;
1750
1751 if (GET_MODE (x) != GET_MODE (y)
1752 || strcmp (ASM_OPERANDS_TEMPLATE (x), ASM_OPERANDS_TEMPLATE (y))
1753 || strcmp (ASM_OPERANDS_OUTPUT_CONSTRAINT (x),
1754 ASM_OPERANDS_OUTPUT_CONSTRAINT (y))
1755 || ASM_OPERANDS_OUTPUT_IDX (x) != ASM_OPERANDS_OUTPUT_IDX (y)
1756 || ASM_OPERANDS_INPUT_LENGTH (x) != ASM_OPERANDS_INPUT_LENGTH (y))
1757 return 0;
1758
1759 if (ASM_OPERANDS_INPUT_LENGTH (x))
1760 {
1761 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
1762 if (! expr_equiv_p (ASM_OPERANDS_INPUT (x, i),
1763 ASM_OPERANDS_INPUT (y, i))
1764 || strcmp (ASM_OPERANDS_INPUT_CONSTRAINT (x, i),
1765 ASM_OPERANDS_INPUT_CONSTRAINT (y, i)))
1766 return 0;
1767 }
1768
1769 return 1;
1770
1771 default:
1772 break;
1773 }
1774
1775 /* Compare the elements. If any pair of corresponding elements
1776 fail to match, return 0 for the whole thing. */
1777
1778 fmt = GET_RTX_FORMAT (code);
1779 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1780 {
1781 switch (fmt[i])
1782 {
1783 case 'e':
1784 if (! expr_equiv_p (XEXP (x, i), XEXP (y, i)))
1785 return 0;
1786 break;
1787
1788 case 'E':
1789 if (XVECLEN (x, i) != XVECLEN (y, i))
1790 return 0;
1791 for (j = 0; j < XVECLEN (x, i); j++)
1792 if (! expr_equiv_p (XVECEXP (x, i, j), XVECEXP (y, i, j)))
1793 return 0;
1794 break;
1795
1796 case 's':
1797 if (strcmp (XSTR (x, i), XSTR (y, i)))
1798 return 0;
1799 break;
1800
1801 case 'i':
1802 if (XINT (x, i) != XINT (y, i))
1803 return 0;
1804 break;
1805
1806 case 'w':
1807 if (XWINT (x, i) != XWINT (y, i))
1808 return 0;
1809 break;
1810
1811 case '0':
1812 break;
1813
1814 default:
1815 abort ();
1816 }
1817 }
1818
1819 return 1;
1820 }
1821
1822 /* Insert expression X in INSN in the hash TABLE.
1823 If it is already present, record it as the last occurrence in INSN's
1824 basic block.
1825
1826 MODE is the mode of the value X is being stored into.
1827 It is only used if X is a CONST_INT.
1828
1829 ANTIC_P is nonzero if X is an anticipatable expression.
1830 AVAIL_P is nonzero if X is an available expression. */
1831
1832 static void
1833 insert_expr_in_table (rtx x, enum machine_mode mode, rtx insn, int antic_p,
1834 int avail_p, struct hash_table *table)
1835 {
1836 int found, do_not_record_p;
1837 unsigned int hash;
1838 struct expr *cur_expr, *last_expr = NULL;
1839 struct occr *antic_occr, *avail_occr;
1840 struct occr *last_occr = NULL;
1841
1842 hash = hash_expr (x, mode, &do_not_record_p, table->size);
1843
1844 /* Do not insert expression in table if it contains volatile operands,
1845 or if hash_expr determines the expression is something we don't want
1846 to or can't handle. */
1847 if (do_not_record_p)
1848 return;
1849
1850 cur_expr = table->table[hash];
1851 found = 0;
1852
1853 while (cur_expr && 0 == (found = expr_equiv_p (cur_expr->expr, x)))
1854 {
1855 /* If the expression isn't found, save a pointer to the end of
1856 the list. */
1857 last_expr = cur_expr;
1858 cur_expr = cur_expr->next_same_hash;
1859 }
1860
1861 if (! found)
1862 {
1863 cur_expr = gcse_alloc (sizeof (struct expr));
1864 bytes_used += sizeof (struct expr);
1865 if (table->table[hash] == NULL)
1866 /* This is the first pattern that hashed to this index. */
1867 table->table[hash] = cur_expr;
1868 else
1869 /* Add EXPR to end of this hash chain. */
1870 last_expr->next_same_hash = cur_expr;
1871
1872 /* Set the fields of the expr element. */
1873 cur_expr->expr = x;
1874 cur_expr->bitmap_index = table->n_elems++;
1875 cur_expr->next_same_hash = NULL;
1876 cur_expr->antic_occr = NULL;
1877 cur_expr->avail_occr = NULL;
1878 }
1879
1880 /* Now record the occurrence(s). */
1881 if (antic_p)
1882 {
1883 antic_occr = cur_expr->antic_occr;
1884
1885 /* Search for another occurrence in the same basic block. */
1886 while (antic_occr && BLOCK_NUM (antic_occr->insn) != BLOCK_NUM (insn))
1887 {
1888 /* If an occurrence isn't found, save a pointer to the end of
1889 the list. */
1890 last_occr = antic_occr;
1891 antic_occr = antic_occr->next;
1892 }
1893
1894 if (antic_occr)
1895 /* Found another instance of the expression in the same basic block.
1896 Prefer the currently recorded one. We want the first one in the
1897 block and the block is scanned from start to end. */
1898 ; /* nothing to do */
1899 else
1900 {
1901 /* First occurrence of this expression in this basic block. */
1902 antic_occr = gcse_alloc (sizeof (struct occr));
1903 bytes_used += sizeof (struct occr);
1904 /* First occurrence of this expression in any block? */
1905 if (cur_expr->antic_occr == NULL)
1906 cur_expr->antic_occr = antic_occr;
1907 else
1908 last_occr->next = antic_occr;
1909
1910 antic_occr->insn = insn;
1911 antic_occr->next = NULL;
1912 antic_occr->deleted_p = 0;
1913 }
1914 }
1915
1916 if (avail_p)
1917 {
1918 avail_occr = cur_expr->avail_occr;
1919
1920 /* Search for another occurrence in the same basic block. */
1921 while (avail_occr && BLOCK_NUM (avail_occr->insn) != BLOCK_NUM (insn))
1922 {
1923 /* If an occurrence isn't found, save a pointer to the end of
1924 the list. */
1925 last_occr = avail_occr;
1926 avail_occr = avail_occr->next;
1927 }
1928
1929 if (avail_occr)
1930 /* Found another instance of the expression in the same basic block.
1931 Prefer this occurrence to the currently recorded one. We want
1932 the last one in the block and the block is scanned from start
1933 to end. */
1934 avail_occr->insn = insn;
1935 else
1936 {
1937 /* First occurrence of this expression in this basic block. */
1938 avail_occr = gcse_alloc (sizeof (struct occr));
1939 bytes_used += sizeof (struct occr);
1940
1941 /* First occurrence of this expression in any block? */
1942 if (cur_expr->avail_occr == NULL)
1943 cur_expr->avail_occr = avail_occr;
1944 else
1945 last_occr->next = avail_occr;
1946
1947 avail_occr->insn = insn;
1948 avail_occr->next = NULL;
1949 avail_occr->deleted_p = 0;
1950 }
1951 }
1952 }
1953
1954 /* Insert pattern X in INSN in the hash table.
1955 X is a SET of a reg to either another reg or a constant.
1956 If it is already present, record it as the last occurrence in INSN's
1957 basic block. */
1958
1959 static void
1960 insert_set_in_table (rtx x, rtx insn, struct hash_table *table)
1961 {
1962 int found;
1963 unsigned int hash;
1964 struct expr *cur_expr, *last_expr = NULL;
1965 struct occr *cur_occr, *last_occr = NULL;
1966
1967 if (GET_CODE (x) != SET
1968 || ! REG_P (SET_DEST (x)))
1969 abort ();
1970
1971 hash = hash_set (REGNO (SET_DEST (x)), table->size);
1972
1973 cur_expr = table->table[hash];
1974 found = 0;
1975
1976 while (cur_expr && 0 == (found = expr_equiv_p (cur_expr->expr, x)))
1977 {
1978 /* If the expression isn't found, save a pointer to the end of
1979 the list. */
1980 last_expr = cur_expr;
1981 cur_expr = cur_expr->next_same_hash;
1982 }
1983
1984 if (! found)
1985 {
1986 cur_expr = gcse_alloc (sizeof (struct expr));
1987 bytes_used += sizeof (struct expr);
1988 if (table->table[hash] == NULL)
1989 /* This is the first pattern that hashed to this index. */
1990 table->table[hash] = cur_expr;
1991 else
1992 /* Add EXPR to end of this hash chain. */
1993 last_expr->next_same_hash = cur_expr;
1994
1995 /* Set the fields of the expr element.
1996 We must copy X because it can be modified when copy propagation is
1997 performed on its operands. */
1998 cur_expr->expr = copy_rtx (x);
1999 cur_expr->bitmap_index = table->n_elems++;
2000 cur_expr->next_same_hash = NULL;
2001 cur_expr->antic_occr = NULL;
2002 cur_expr->avail_occr = NULL;
2003 }
2004
2005 /* Now record the occurrence. */
2006 cur_occr = cur_expr->avail_occr;
2007
2008 /* Search for another occurrence in the same basic block. */
2009 while (cur_occr && BLOCK_NUM (cur_occr->insn) != BLOCK_NUM (insn))
2010 {
2011 /* If an occurrence isn't found, save a pointer to the end of
2012 the list. */
2013 last_occr = cur_occr;
2014 cur_occr = cur_occr->next;
2015 }
2016
2017 if (cur_occr)
2018 /* Found another instance of the expression in the same basic block.
2019 Prefer this occurrence to the currently recorded one. We want the
2020 last one in the block and the block is scanned from start to end. */
2021 cur_occr->insn = insn;
2022 else
2023 {
2024 /* First occurrence of this expression in this basic block. */
2025 cur_occr = gcse_alloc (sizeof (struct occr));
2026 bytes_used += sizeof (struct occr);
2027
2028 /* First occurrence of this expression in any block? */
2029 if (cur_expr->avail_occr == NULL)
2030 cur_expr->avail_occr = cur_occr;
2031 else
2032 last_occr->next = cur_occr;
2033
2034 cur_occr->insn = insn;
2035 cur_occr->next = NULL;
2036 cur_occr->deleted_p = 0;
2037 }
2038 }
2039
2040 /* Determine whether the rtx X should be treated as a constant for
2041 the purposes of GCSE's constant propagation. */
2042
2043 static bool
2044 gcse_constant_p (rtx x)
2045 {
2046 /* Consider a COMPARE of two integers constant. */
2047 if (GET_CODE (x) == COMPARE
2048 && GET_CODE (XEXP (x, 0)) == CONST_INT
2049 && GET_CODE (XEXP (x, 1)) == CONST_INT)
2050 return true;
2051
2052 /* Consider a COMPARE of the same registers is a constant
2053 if they are not floating point registers. */
2054 if (GET_CODE(x) == COMPARE
2055 && REG_P (XEXP (x, 0)) && REG_P (XEXP (x, 1))
2056 && REGNO (XEXP (x, 0)) == REGNO (XEXP (x, 1))
2057 && ! FLOAT_MODE_P (GET_MODE (XEXP (x, 0)))
2058 && ! FLOAT_MODE_P (GET_MODE (XEXP (x, 1))))
2059 return true;
2060
2061 return CONSTANT_P (x);
2062 }
2063
2064 /* Scan pattern PAT of INSN and add an entry to the hash TABLE (set or
2065 expression one). */
2066
2067 static void
2068 hash_scan_set (rtx pat, rtx insn, struct hash_table *table)
2069 {
2070 rtx src = SET_SRC (pat);
2071 rtx dest = SET_DEST (pat);
2072 rtx note;
2073
2074 if (CALL_P (src))
2075 hash_scan_call (src, insn, table);
2076
2077 else if (REG_P (dest))
2078 {
2079 unsigned int regno = REGNO (dest);
2080 rtx tmp;
2081
2082 /* If this is a single set and we are doing constant propagation,
2083 see if a REG_NOTE shows this equivalent to a constant. */
2084 if (table->set_p && (note = find_reg_equal_equiv_note (insn)) != 0
2085 && gcse_constant_p (XEXP (note, 0)))
2086 src = XEXP (note, 0), pat = gen_rtx_SET (VOIDmode, dest, src);
2087
2088 /* Only record sets of pseudo-regs in the hash table. */
2089 if (! table->set_p
2090 && regno >= FIRST_PSEUDO_REGISTER
2091 /* Don't GCSE something if we can't do a reg/reg copy. */
2092 && can_copy_p (GET_MODE (dest))
2093 /* GCSE commonly inserts instruction after the insn. We can't
2094 do that easily for EH_REGION notes so disable GCSE on these
2095 for now. */
2096 && !find_reg_note (insn, REG_EH_REGION, NULL_RTX)
2097 /* Is SET_SRC something we want to gcse? */
2098 && want_to_gcse_p (src)
2099 /* Don't CSE a nop. */
2100 && ! set_noop_p (pat)
2101 /* Don't GCSE if it has attached REG_EQUIV note.
2102 At this point this only function parameters should have
2103 REG_EQUIV notes and if the argument slot is used somewhere
2104 explicitly, it means address of parameter has been taken,
2105 so we should not extend the lifetime of the pseudo. */
2106 && ((note = find_reg_note (insn, REG_EQUIV, NULL_RTX)) == 0
2107 || ! MEM_P (XEXP (note, 0))))
2108 {
2109 /* An expression is not anticipatable if its operands are
2110 modified before this insn or if this is not the only SET in
2111 this insn. */
2112 int antic_p = oprs_anticipatable_p (src, insn) && single_set (insn);
2113 /* An expression is not available if its operands are
2114 subsequently modified, including this insn. It's also not
2115 available if this is a branch, because we can't insert
2116 a set after the branch. */
2117 int avail_p = (oprs_available_p (src, insn)
2118 && ! JUMP_P (insn));
2119
2120 insert_expr_in_table (src, GET_MODE (dest), insn, antic_p, avail_p, table);
2121 }
2122
2123 /* Record sets for constant/copy propagation. */
2124 else if (table->set_p
2125 && regno >= FIRST_PSEUDO_REGISTER
2126 && ((REG_P (src)
2127 && REGNO (src) >= FIRST_PSEUDO_REGISTER
2128 && can_copy_p (GET_MODE (dest))
2129 && REGNO (src) != regno)
2130 || gcse_constant_p (src))
2131 /* A copy is not available if its src or dest is subsequently
2132 modified. Here we want to search from INSN+1 on, but
2133 oprs_available_p searches from INSN on. */
2134 && (insn == BB_END (BLOCK_FOR_INSN (insn))
2135 || ((tmp = next_nonnote_insn (insn)) != NULL_RTX
2136 && oprs_available_p (pat, tmp))))
2137 insert_set_in_table (pat, insn, table);
2138 }
2139 /* In case of store we want to consider the memory value as available in
2140 the REG stored in that memory. This makes it possible to remove
2141 redundant loads from due to stores to the same location. */
2142 else if (flag_gcse_las && REG_P (src) && MEM_P (dest))
2143 {
2144 unsigned int regno = REGNO (src);
2145
2146 /* Do not do this for constant/copy propagation. */
2147 if (! table->set_p
2148 /* Only record sets of pseudo-regs in the hash table. */
2149 && regno >= FIRST_PSEUDO_REGISTER
2150 /* Don't GCSE something if we can't do a reg/reg copy. */
2151 && can_copy_p (GET_MODE (src))
2152 /* GCSE commonly inserts instruction after the insn. We can't
2153 do that easily for EH_REGION notes so disable GCSE on these
2154 for now. */
2155 && ! find_reg_note (insn, REG_EH_REGION, NULL_RTX)
2156 /* Is SET_DEST something we want to gcse? */
2157 && want_to_gcse_p (dest)
2158 /* Don't CSE a nop. */
2159 && ! set_noop_p (pat)
2160 /* Don't GCSE if it has attached REG_EQUIV note.
2161 At this point this only function parameters should have
2162 REG_EQUIV notes and if the argument slot is used somewhere
2163 explicitly, it means address of parameter has been taken,
2164 so we should not extend the lifetime of the pseudo. */
2165 && ((note = find_reg_note (insn, REG_EQUIV, NULL_RTX)) == 0
2166 || ! MEM_P (XEXP (note, 0))))
2167 {
2168 /* Stores are never anticipatable. */
2169 int antic_p = 0;
2170 /* An expression is not available if its operands are
2171 subsequently modified, including this insn. It's also not
2172 available if this is a branch, because we can't insert
2173 a set after the branch. */
2174 int avail_p = oprs_available_p (dest, insn)
2175 && ! JUMP_P (insn);
2176
2177 /* Record the memory expression (DEST) in the hash table. */
2178 insert_expr_in_table (dest, GET_MODE (dest), insn,
2179 antic_p, avail_p, table);
2180 }
2181 }
2182 }
2183
2184 static void
2185 hash_scan_clobber (rtx x ATTRIBUTE_UNUSED, rtx insn ATTRIBUTE_UNUSED,
2186 struct hash_table *table ATTRIBUTE_UNUSED)
2187 {
2188 /* Currently nothing to do. */
2189 }
2190
2191 static void
2192 hash_scan_call (rtx x ATTRIBUTE_UNUSED, rtx insn ATTRIBUTE_UNUSED,
2193 struct hash_table *table ATTRIBUTE_UNUSED)
2194 {
2195 /* Currently nothing to do. */
2196 }
2197
2198 /* Process INSN and add hash table entries as appropriate.
2199
2200 Only available expressions that set a single pseudo-reg are recorded.
2201
2202 Single sets in a PARALLEL could be handled, but it's an extra complication
2203 that isn't dealt with right now. The trick is handling the CLOBBERs that
2204 are also in the PARALLEL. Later.
2205
2206 If SET_P is nonzero, this is for the assignment hash table,
2207 otherwise it is for the expression hash table.
2208 If IN_LIBCALL_BLOCK nonzero, we are in a libcall block, and should
2209 not record any expressions. */
2210
2211 static void
2212 hash_scan_insn (rtx insn, struct hash_table *table, int in_libcall_block)
2213 {
2214 rtx pat = PATTERN (insn);
2215 int i;
2216
2217 if (in_libcall_block)
2218 return;
2219
2220 /* Pick out the sets of INSN and for other forms of instructions record
2221 what's been modified. */
2222
2223 if (GET_CODE (pat) == SET)
2224 hash_scan_set (pat, insn, table);
2225 else if (GET_CODE (pat) == PARALLEL)
2226 for (i = 0; i < XVECLEN (pat, 0); i++)
2227 {
2228 rtx x = XVECEXP (pat, 0, i);
2229
2230 if (GET_CODE (x) == SET)
2231 hash_scan_set (x, insn, table);
2232 else if (GET_CODE (x) == CLOBBER)
2233 hash_scan_clobber (x, insn, table);
2234 else if (CALL_P (x))
2235 hash_scan_call (x, insn, table);
2236 }
2237
2238 else if (GET_CODE (pat) == CLOBBER)
2239 hash_scan_clobber (pat, insn, table);
2240 else if (CALL_P (pat))
2241 hash_scan_call (pat, insn, table);
2242 }
2243
2244 static void
2245 dump_hash_table (FILE *file, const char *name, struct hash_table *table)
2246 {
2247 int i;
2248 /* Flattened out table, so it's printed in proper order. */
2249 struct expr **flat_table;
2250 unsigned int *hash_val;
2251 struct expr *expr;
2252
2253 flat_table = xcalloc (table->n_elems, sizeof (struct expr *));
2254 hash_val = xmalloc (table->n_elems * sizeof (unsigned int));
2255
2256 for (i = 0; i < (int) table->size; i++)
2257 for (expr = table->table[i]; expr != NULL; expr = expr->next_same_hash)
2258 {
2259 flat_table[expr->bitmap_index] = expr;
2260 hash_val[expr->bitmap_index] = i;
2261 }
2262
2263 fprintf (file, "%s hash table (%d buckets, %d entries)\n",
2264 name, table->size, table->n_elems);
2265
2266 for (i = 0; i < (int) table->n_elems; i++)
2267 if (flat_table[i] != 0)
2268 {
2269 expr = flat_table[i];
2270 fprintf (file, "Index %d (hash value %d)\n ",
2271 expr->bitmap_index, hash_val[i]);
2272 print_rtl (file, expr->expr);
2273 fprintf (file, "\n");
2274 }
2275
2276 fprintf (file, "\n");
2277
2278 free (flat_table);
2279 free (hash_val);
2280 }
2281
2282 /* Record register first/last/block set information for REGNO in INSN.
2283
2284 first_set records the first place in the block where the register
2285 is set and is used to compute "anticipatability".
2286
2287 last_set records the last place in the block where the register
2288 is set and is used to compute "availability".
2289
2290 last_bb records the block for which first_set and last_set are
2291 valid, as a quick test to invalidate them.
2292
2293 reg_set_in_block records whether the register is set in the block
2294 and is used to compute "transparency". */
2295
2296 static void
2297 record_last_reg_set_info (rtx insn, int regno)
2298 {
2299 struct reg_avail_info *info = &reg_avail_info[regno];
2300 int cuid = INSN_CUID (insn);
2301
2302 info->last_set = cuid;
2303 if (info->last_bb != current_bb)
2304 {
2305 info->last_bb = current_bb;
2306 info->first_set = cuid;
2307 SET_BIT (reg_set_in_block[current_bb->index], regno);
2308 }
2309 }
2310
2311
2312 /* Record all of the canonicalized MEMs of record_last_mem_set_info's insn.
2313 Note we store a pair of elements in the list, so they have to be
2314 taken off pairwise. */
2315
2316 static void
2317 canon_list_insert (rtx dest ATTRIBUTE_UNUSED, rtx unused1 ATTRIBUTE_UNUSED,
2318 void * v_insn)
2319 {
2320 rtx dest_addr, insn;
2321 int bb;
2322
2323 while (GET_CODE (dest) == SUBREG
2324 || GET_CODE (dest) == ZERO_EXTRACT
2325 || GET_CODE (dest) == SIGN_EXTRACT
2326 || GET_CODE (dest) == STRICT_LOW_PART)
2327 dest = XEXP (dest, 0);
2328
2329 /* If DEST is not a MEM, then it will not conflict with a load. Note
2330 that function calls are assumed to clobber memory, but are handled
2331 elsewhere. */
2332
2333 if (! MEM_P (dest))
2334 return;
2335
2336 dest_addr = get_addr (XEXP (dest, 0));
2337 dest_addr = canon_rtx (dest_addr);
2338 insn = (rtx) v_insn;
2339 bb = BLOCK_NUM (insn);
2340
2341 canon_modify_mem_list[bb] =
2342 alloc_EXPR_LIST (VOIDmode, dest_addr, canon_modify_mem_list[bb]);
2343 canon_modify_mem_list[bb] =
2344 alloc_EXPR_LIST (VOIDmode, dest, canon_modify_mem_list[bb]);
2345 bitmap_set_bit (canon_modify_mem_list_set, bb);
2346 }
2347
2348 /* Record memory modification information for INSN. We do not actually care
2349 about the memory location(s) that are set, or even how they are set (consider
2350 a CALL_INSN). We merely need to record which insns modify memory. */
2351
2352 static void
2353 record_last_mem_set_info (rtx insn)
2354 {
2355 int bb = BLOCK_NUM (insn);
2356
2357 /* load_killed_in_block_p will handle the case of calls clobbering
2358 everything. */
2359 modify_mem_list[bb] = alloc_INSN_LIST (insn, modify_mem_list[bb]);
2360 bitmap_set_bit (modify_mem_list_set, bb);
2361
2362 if (CALL_P (insn))
2363 {
2364 /* Note that traversals of this loop (other than for free-ing)
2365 will break after encountering a CALL_INSN. So, there's no
2366 need to insert a pair of items, as canon_list_insert does. */
2367 canon_modify_mem_list[bb] =
2368 alloc_INSN_LIST (insn, canon_modify_mem_list[bb]);
2369 bitmap_set_bit (canon_modify_mem_list_set, bb);
2370 }
2371 else
2372 note_stores (PATTERN (insn), canon_list_insert, (void*) insn);
2373 }
2374
2375 /* Called from compute_hash_table via note_stores to handle one
2376 SET or CLOBBER in an insn. DATA is really the instruction in which
2377 the SET is taking place. */
2378
2379 static void
2380 record_last_set_info (rtx dest, rtx setter ATTRIBUTE_UNUSED, void *data)
2381 {
2382 rtx last_set_insn = (rtx) data;
2383
2384 if (GET_CODE (dest) == SUBREG)
2385 dest = SUBREG_REG (dest);
2386
2387 if (REG_P (dest))
2388 record_last_reg_set_info (last_set_insn, REGNO (dest));
2389 else if (MEM_P (dest)
2390 /* Ignore pushes, they clobber nothing. */
2391 && ! push_operand (dest, GET_MODE (dest)))
2392 record_last_mem_set_info (last_set_insn);
2393 }
2394
2395 /* Top level function to create an expression or assignment hash table.
2396
2397 Expression entries are placed in the hash table if
2398 - they are of the form (set (pseudo-reg) src),
2399 - src is something we want to perform GCSE on,
2400 - none of the operands are subsequently modified in the block
2401
2402 Assignment entries are placed in the hash table if
2403 - they are of the form (set (pseudo-reg) src),
2404 - src is something we want to perform const/copy propagation on,
2405 - none of the operands or target are subsequently modified in the block
2406
2407 Currently src must be a pseudo-reg or a const_int.
2408
2409 TABLE is the table computed. */
2410
2411 static void
2412 compute_hash_table_work (struct hash_table *table)
2413 {
2414 unsigned int i;
2415
2416 /* While we compute the hash table we also compute a bit array of which
2417 registers are set in which blocks.
2418 ??? This isn't needed during const/copy propagation, but it's cheap to
2419 compute. Later. */
2420 sbitmap_vector_zero (reg_set_in_block, last_basic_block);
2421
2422 /* re-Cache any INSN_LIST nodes we have allocated. */
2423 clear_modify_mem_tables ();
2424 /* Some working arrays used to track first and last set in each block. */
2425 reg_avail_info = gmalloc (max_gcse_regno * sizeof (struct reg_avail_info));
2426
2427 for (i = 0; i < max_gcse_regno; ++i)
2428 reg_avail_info[i].last_bb = NULL;
2429
2430 FOR_EACH_BB (current_bb)
2431 {
2432 rtx insn;
2433 unsigned int regno;
2434 int in_libcall_block;
2435
2436 /* First pass over the instructions records information used to
2437 determine when registers and memory are first and last set.
2438 ??? hard-reg reg_set_in_block computation
2439 could be moved to compute_sets since they currently don't change. */
2440
2441 for (insn = BB_HEAD (current_bb);
2442 insn && insn != NEXT_INSN (BB_END (current_bb));
2443 insn = NEXT_INSN (insn))
2444 {
2445 if (! INSN_P (insn))
2446 continue;
2447
2448 if (CALL_P (insn))
2449 {
2450 bool clobbers_all = false;
2451 #ifdef NON_SAVING_SETJMP
2452 if (NON_SAVING_SETJMP
2453 && find_reg_note (insn, REG_SETJMP, NULL_RTX))
2454 clobbers_all = true;
2455 #endif
2456
2457 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
2458 if (clobbers_all
2459 || TEST_HARD_REG_BIT (regs_invalidated_by_call, regno))
2460 record_last_reg_set_info (insn, regno);
2461
2462 mark_call (insn);
2463 }
2464
2465 note_stores (PATTERN (insn), record_last_set_info, insn);
2466 }
2467
2468 /* Insert implicit sets in the hash table. */
2469 if (table->set_p
2470 && implicit_sets[current_bb->index] != NULL_RTX)
2471 hash_scan_set (implicit_sets[current_bb->index],
2472 BB_HEAD (current_bb), table);
2473
2474 /* The next pass builds the hash table. */
2475
2476 for (insn = BB_HEAD (current_bb), in_libcall_block = 0;
2477 insn && insn != NEXT_INSN (BB_END (current_bb));
2478 insn = NEXT_INSN (insn))
2479 if (INSN_P (insn))
2480 {
2481 if (find_reg_note (insn, REG_LIBCALL, NULL_RTX))
2482 in_libcall_block = 1;
2483 else if (table->set_p && find_reg_note (insn, REG_RETVAL, NULL_RTX))
2484 in_libcall_block = 0;
2485 hash_scan_insn (insn, table, in_libcall_block);
2486 if (!table->set_p && find_reg_note (insn, REG_RETVAL, NULL_RTX))
2487 in_libcall_block = 0;
2488 }
2489 }
2490
2491 free (reg_avail_info);
2492 reg_avail_info = NULL;
2493 }
2494
2495 /* Allocate space for the set/expr hash TABLE.
2496 N_INSNS is the number of instructions in the function.
2497 It is used to determine the number of buckets to use.
2498 SET_P determines whether set or expression table will
2499 be created. */
2500
2501 static void
2502 alloc_hash_table (int n_insns, struct hash_table *table, int set_p)
2503 {
2504 int n;
2505
2506 table->size = n_insns / 4;
2507 if (table->size < 11)
2508 table->size = 11;
2509
2510 /* Attempt to maintain efficient use of hash table.
2511 Making it an odd number is simplest for now.
2512 ??? Later take some measurements. */
2513 table->size |= 1;
2514 n = table->size * sizeof (struct expr *);
2515 table->table = gmalloc (n);
2516 table->set_p = set_p;
2517 }
2518
2519 /* Free things allocated by alloc_hash_table. */
2520
2521 static void
2522 free_hash_table (struct hash_table *table)
2523 {
2524 free (table->table);
2525 }
2526
2527 /* Compute the hash TABLE for doing copy/const propagation or
2528 expression hash table. */
2529
2530 static void
2531 compute_hash_table (struct hash_table *table)
2532 {
2533 /* Initialize count of number of entries in hash table. */
2534 table->n_elems = 0;
2535 memset (table->table, 0, table->size * sizeof (struct expr *));
2536
2537 compute_hash_table_work (table);
2538 }
2539 \f
2540 /* Expression tracking support. */
2541
2542 /* Lookup pattern PAT in the expression TABLE.
2543 The result is a pointer to the table entry, or NULL if not found. */
2544
2545 static struct expr *
2546 lookup_expr (rtx pat, struct hash_table *table)
2547 {
2548 int do_not_record_p;
2549 unsigned int hash = hash_expr (pat, GET_MODE (pat), &do_not_record_p,
2550 table->size);
2551 struct expr *expr;
2552
2553 if (do_not_record_p)
2554 return NULL;
2555
2556 expr = table->table[hash];
2557
2558 while (expr && ! expr_equiv_p (expr->expr, pat))
2559 expr = expr->next_same_hash;
2560
2561 return expr;
2562 }
2563
2564 /* Lookup REGNO in the set TABLE. The result is a pointer to the
2565 table entry, or NULL if not found. */
2566
2567 static struct expr *
2568 lookup_set (unsigned int regno, struct hash_table *table)
2569 {
2570 unsigned int hash = hash_set (regno, table->size);
2571 struct expr *expr;
2572
2573 expr = table->table[hash];
2574
2575 while (expr && REGNO (SET_DEST (expr->expr)) != regno)
2576 expr = expr->next_same_hash;
2577
2578 return expr;
2579 }
2580
2581 /* Return the next entry for REGNO in list EXPR. */
2582
2583 static struct expr *
2584 next_set (unsigned int regno, struct expr *expr)
2585 {
2586 do
2587 expr = expr->next_same_hash;
2588 while (expr && REGNO (SET_DEST (expr->expr)) != regno);
2589
2590 return expr;
2591 }
2592
2593 /* Like free_INSN_LIST_list or free_EXPR_LIST_list, except that the node
2594 types may be mixed. */
2595
2596 static void
2597 free_insn_expr_list_list (rtx *listp)
2598 {
2599 rtx list, next;
2600
2601 for (list = *listp; list ; list = next)
2602 {
2603 next = XEXP (list, 1);
2604 if (GET_CODE (list) == EXPR_LIST)
2605 free_EXPR_LIST_node (list);
2606 else
2607 free_INSN_LIST_node (list);
2608 }
2609
2610 *listp = NULL;
2611 }
2612
2613 /* Clear canon_modify_mem_list and modify_mem_list tables. */
2614 static void
2615 clear_modify_mem_tables (void)
2616 {
2617 int i;
2618
2619 EXECUTE_IF_SET_IN_BITMAP
2620 (modify_mem_list_set, 0, i, free_INSN_LIST_list (modify_mem_list + i));
2621 bitmap_clear (modify_mem_list_set);
2622
2623 EXECUTE_IF_SET_IN_BITMAP
2624 (canon_modify_mem_list_set, 0, i,
2625 free_insn_expr_list_list (canon_modify_mem_list + i));
2626 bitmap_clear (canon_modify_mem_list_set);
2627 }
2628
2629 /* Release memory used by modify_mem_list_set and canon_modify_mem_list_set. */
2630
2631 static void
2632 free_modify_mem_tables (void)
2633 {
2634 clear_modify_mem_tables ();
2635 free (modify_mem_list);
2636 free (canon_modify_mem_list);
2637 modify_mem_list = 0;
2638 canon_modify_mem_list = 0;
2639 }
2640
2641 /* Reset tables used to keep track of what's still available [since the
2642 start of the block]. */
2643
2644 static void
2645 reset_opr_set_tables (void)
2646 {
2647 /* Maintain a bitmap of which regs have been set since beginning of
2648 the block. */
2649 CLEAR_REG_SET (reg_set_bitmap);
2650
2651 /* Also keep a record of the last instruction to modify memory.
2652 For now this is very trivial, we only record whether any memory
2653 location has been modified. */
2654 clear_modify_mem_tables ();
2655 }
2656
2657 /* Return nonzero if the operands of X are not set before INSN in
2658 INSN's basic block. */
2659
2660 static int
2661 oprs_not_set_p (rtx x, rtx insn)
2662 {
2663 int i, j;
2664 enum rtx_code code;
2665 const char *fmt;
2666
2667 if (x == 0)
2668 return 1;
2669
2670 code = GET_CODE (x);
2671 switch (code)
2672 {
2673 case PC:
2674 case CC0:
2675 case CONST:
2676 case CONST_INT:
2677 case CONST_DOUBLE:
2678 case CONST_VECTOR:
2679 case SYMBOL_REF:
2680 case LABEL_REF:
2681 case ADDR_VEC:
2682 case ADDR_DIFF_VEC:
2683 return 1;
2684
2685 case MEM:
2686 if (load_killed_in_block_p (BLOCK_FOR_INSN (insn),
2687 INSN_CUID (insn), x, 0))
2688 return 0;
2689 else
2690 return oprs_not_set_p (XEXP (x, 0), insn);
2691
2692 case REG:
2693 return ! REGNO_REG_SET_P (reg_set_bitmap, REGNO (x));
2694
2695 default:
2696 break;
2697 }
2698
2699 for (i = GET_RTX_LENGTH (code) - 1, fmt = GET_RTX_FORMAT (code); i >= 0; i--)
2700 {
2701 if (fmt[i] == 'e')
2702 {
2703 /* If we are about to do the last recursive call
2704 needed at this level, change it into iteration.
2705 This function is called enough to be worth it. */
2706 if (i == 0)
2707 return oprs_not_set_p (XEXP (x, i), insn);
2708
2709 if (! oprs_not_set_p (XEXP (x, i), insn))
2710 return 0;
2711 }
2712 else if (fmt[i] == 'E')
2713 for (j = 0; j < XVECLEN (x, i); j++)
2714 if (! oprs_not_set_p (XVECEXP (x, i, j), insn))
2715 return 0;
2716 }
2717
2718 return 1;
2719 }
2720
2721 /* Mark things set by a CALL. */
2722
2723 static void
2724 mark_call (rtx insn)
2725 {
2726 if (! CONST_OR_PURE_CALL_P (insn))
2727 record_last_mem_set_info (insn);
2728 }
2729
2730 /* Mark things set by a SET. */
2731
2732 static void
2733 mark_set (rtx pat, rtx insn)
2734 {
2735 rtx dest = SET_DEST (pat);
2736
2737 while (GET_CODE (dest) == SUBREG
2738 || GET_CODE (dest) == ZERO_EXTRACT
2739 || GET_CODE (dest) == SIGN_EXTRACT
2740 || GET_CODE (dest) == STRICT_LOW_PART)
2741 dest = XEXP (dest, 0);
2742
2743 if (REG_P (dest))
2744 SET_REGNO_REG_SET (reg_set_bitmap, REGNO (dest));
2745 else if (MEM_P (dest))
2746 record_last_mem_set_info (insn);
2747
2748 if (CALL_P (SET_SRC (pat)))
2749 mark_call (insn);
2750 }
2751
2752 /* Record things set by a CLOBBER. */
2753
2754 static void
2755 mark_clobber (rtx pat, rtx insn)
2756 {
2757 rtx clob = XEXP (pat, 0);
2758
2759 while (GET_CODE (clob) == SUBREG || GET_CODE (clob) == STRICT_LOW_PART)
2760 clob = XEXP (clob, 0);
2761
2762 if (REG_P (clob))
2763 SET_REGNO_REG_SET (reg_set_bitmap, REGNO (clob));
2764 else
2765 record_last_mem_set_info (insn);
2766 }
2767
2768 /* Record things set by INSN.
2769 This data is used by oprs_not_set_p. */
2770
2771 static void
2772 mark_oprs_set (rtx insn)
2773 {
2774 rtx pat = PATTERN (insn);
2775 int i;
2776
2777 if (GET_CODE (pat) == SET)
2778 mark_set (pat, insn);
2779 else if (GET_CODE (pat) == PARALLEL)
2780 for (i = 0; i < XVECLEN (pat, 0); i++)
2781 {
2782 rtx x = XVECEXP (pat, 0, i);
2783
2784 if (GET_CODE (x) == SET)
2785 mark_set (x, insn);
2786 else if (GET_CODE (x) == CLOBBER)
2787 mark_clobber (x, insn);
2788 else if (CALL_P (x))
2789 mark_call (insn);
2790 }
2791
2792 else if (GET_CODE (pat) == CLOBBER)
2793 mark_clobber (pat, insn);
2794 else if (CALL_P (pat))
2795 mark_call (insn);
2796 }
2797
2798 \f
2799 /* Compute copy/constant propagation working variables. */
2800
2801 /* Local properties of assignments. */
2802 static sbitmap *cprop_pavloc;
2803 static sbitmap *cprop_absaltered;
2804
2805 /* Global properties of assignments (computed from the local properties). */
2806 static sbitmap *cprop_avin;
2807 static sbitmap *cprop_avout;
2808
2809 /* Allocate vars used for copy/const propagation. N_BLOCKS is the number of
2810 basic blocks. N_SETS is the number of sets. */
2811
2812 static void
2813 alloc_cprop_mem (int n_blocks, int n_sets)
2814 {
2815 cprop_pavloc = sbitmap_vector_alloc (n_blocks, n_sets);
2816 cprop_absaltered = sbitmap_vector_alloc (n_blocks, n_sets);
2817
2818 cprop_avin = sbitmap_vector_alloc (n_blocks, n_sets);
2819 cprop_avout = sbitmap_vector_alloc (n_blocks, n_sets);
2820 }
2821
2822 /* Free vars used by copy/const propagation. */
2823
2824 static void
2825 free_cprop_mem (void)
2826 {
2827 sbitmap_vector_free (cprop_pavloc);
2828 sbitmap_vector_free (cprop_absaltered);
2829 sbitmap_vector_free (cprop_avin);
2830 sbitmap_vector_free (cprop_avout);
2831 }
2832
2833 /* For each block, compute whether X is transparent. X is either an
2834 expression or an assignment [though we don't care which, for this context
2835 an assignment is treated as an expression]. For each block where an
2836 element of X is modified, set (SET_P == 1) or reset (SET_P == 0) the INDX
2837 bit in BMAP. */
2838
2839 static void
2840 compute_transp (rtx x, int indx, sbitmap *bmap, int set_p)
2841 {
2842 int i, j;
2843 basic_block bb;
2844 enum rtx_code code;
2845 reg_set *r;
2846 const char *fmt;
2847
2848 /* repeat is used to turn tail-recursion into iteration since GCC
2849 can't do it when there's no return value. */
2850 repeat:
2851
2852 if (x == 0)
2853 return;
2854
2855 code = GET_CODE (x);
2856 switch (code)
2857 {
2858 case REG:
2859 if (set_p)
2860 {
2861 if (REGNO (x) < FIRST_PSEUDO_REGISTER)
2862 {
2863 FOR_EACH_BB (bb)
2864 if (TEST_BIT (reg_set_in_block[bb->index], REGNO (x)))
2865 SET_BIT (bmap[bb->index], indx);
2866 }
2867 else
2868 {
2869 for (r = reg_set_table[REGNO (x)]; r != NULL; r = r->next)
2870 SET_BIT (bmap[BLOCK_NUM (r->insn)], indx);
2871 }
2872 }
2873 else
2874 {
2875 if (REGNO (x) < FIRST_PSEUDO_REGISTER)
2876 {
2877 FOR_EACH_BB (bb)
2878 if (TEST_BIT (reg_set_in_block[bb->index], REGNO (x)))
2879 RESET_BIT (bmap[bb->index], indx);
2880 }
2881 else
2882 {
2883 for (r = reg_set_table[REGNO (x)]; r != NULL; r = r->next)
2884 RESET_BIT (bmap[BLOCK_NUM (r->insn)], indx);
2885 }
2886 }
2887
2888 return;
2889
2890 case MEM:
2891 FOR_EACH_BB (bb)
2892 {
2893 rtx list_entry = canon_modify_mem_list[bb->index];
2894
2895 while (list_entry)
2896 {
2897 rtx dest, dest_addr;
2898
2899 if (CALL_P (XEXP (list_entry, 0)))
2900 {
2901 if (set_p)
2902 SET_BIT (bmap[bb->index], indx);
2903 else
2904 RESET_BIT (bmap[bb->index], indx);
2905 break;
2906 }
2907 /* LIST_ENTRY must be an INSN of some kind that sets memory.
2908 Examine each hunk of memory that is modified. */
2909
2910 dest = XEXP (list_entry, 0);
2911 list_entry = XEXP (list_entry, 1);
2912 dest_addr = XEXP (list_entry, 0);
2913
2914 if (canon_true_dependence (dest, GET_MODE (dest), dest_addr,
2915 x, rtx_addr_varies_p))
2916 {
2917 if (set_p)
2918 SET_BIT (bmap[bb->index], indx);
2919 else
2920 RESET_BIT (bmap[bb->index], indx);
2921 break;
2922 }
2923 list_entry = XEXP (list_entry, 1);
2924 }
2925 }
2926
2927 x = XEXP (x, 0);
2928 goto repeat;
2929
2930 case PC:
2931 case CC0: /*FIXME*/
2932 case CONST:
2933 case CONST_INT:
2934 case CONST_DOUBLE:
2935 case CONST_VECTOR:
2936 case SYMBOL_REF:
2937 case LABEL_REF:
2938 case ADDR_VEC:
2939 case ADDR_DIFF_VEC:
2940 return;
2941
2942 default:
2943 break;
2944 }
2945
2946 for (i = GET_RTX_LENGTH (code) - 1, fmt = GET_RTX_FORMAT (code); i >= 0; i--)
2947 {
2948 if (fmt[i] == 'e')
2949 {
2950 /* If we are about to do the last recursive call
2951 needed at this level, change it into iteration.
2952 This function is called enough to be worth it. */
2953 if (i == 0)
2954 {
2955 x = XEXP (x, i);
2956 goto repeat;
2957 }
2958
2959 compute_transp (XEXP (x, i), indx, bmap, set_p);
2960 }
2961 else if (fmt[i] == 'E')
2962 for (j = 0; j < XVECLEN (x, i); j++)
2963 compute_transp (XVECEXP (x, i, j), indx, bmap, set_p);
2964 }
2965 }
2966
2967 /* Top level routine to do the dataflow analysis needed by copy/const
2968 propagation. */
2969
2970 static void
2971 compute_cprop_data (void)
2972 {
2973 compute_local_properties (cprop_absaltered, cprop_pavloc, NULL, &set_hash_table);
2974 compute_available (cprop_pavloc, cprop_absaltered,
2975 cprop_avout, cprop_avin);
2976 }
2977 \f
2978 /* Copy/constant propagation. */
2979
2980 /* Maximum number of register uses in an insn that we handle. */
2981 #define MAX_USES 8
2982
2983 /* Table of uses found in an insn.
2984 Allocated statically to avoid alloc/free complexity and overhead. */
2985 static struct reg_use reg_use_table[MAX_USES];
2986
2987 /* Index into `reg_use_table' while building it. */
2988 static int reg_use_count;
2989
2990 /* Set up a list of register numbers used in INSN. The found uses are stored
2991 in `reg_use_table'. `reg_use_count' is initialized to zero before entry,
2992 and contains the number of uses in the table upon exit.
2993
2994 ??? If a register appears multiple times we will record it multiple times.
2995 This doesn't hurt anything but it will slow things down. */
2996
2997 static void
2998 find_used_regs (rtx *xptr, void *data ATTRIBUTE_UNUSED)
2999 {
3000 int i, j;
3001 enum rtx_code code;
3002 const char *fmt;
3003 rtx x = *xptr;
3004
3005 /* repeat is used to turn tail-recursion into iteration since GCC
3006 can't do it when there's no return value. */
3007 repeat:
3008 if (x == 0)
3009 return;
3010
3011 code = GET_CODE (x);
3012 if (REG_P (x))
3013 {
3014 if (reg_use_count == MAX_USES)
3015 return;
3016
3017 reg_use_table[reg_use_count].reg_rtx = x;
3018 reg_use_count++;
3019 }
3020
3021 /* Recursively scan the operands of this expression. */
3022
3023 for (i = GET_RTX_LENGTH (code) - 1, fmt = GET_RTX_FORMAT (code); i >= 0; i--)
3024 {
3025 if (fmt[i] == 'e')
3026 {
3027 /* If we are about to do the last recursive call
3028 needed at this level, change it into iteration.
3029 This function is called enough to be worth it. */
3030 if (i == 0)
3031 {
3032 x = XEXP (x, 0);
3033 goto repeat;
3034 }
3035
3036 find_used_regs (&XEXP (x, i), data);
3037 }
3038 else if (fmt[i] == 'E')
3039 for (j = 0; j < XVECLEN (x, i); j++)
3040 find_used_regs (&XVECEXP (x, i, j), data);
3041 }
3042 }
3043
3044 /* Try to replace all non-SET_DEST occurrences of FROM in INSN with TO.
3045 Returns nonzero is successful. */
3046
3047 static int
3048 try_replace_reg (rtx from, rtx to, rtx insn)
3049 {
3050 rtx note = find_reg_equal_equiv_note (insn);
3051 rtx src = 0;
3052 int success = 0;
3053 rtx set = single_set (insn);
3054
3055 validate_replace_src_group (from, to, insn);
3056 if (num_changes_pending () && apply_change_group ())
3057 success = 1;
3058
3059 /* Try to simplify SET_SRC if we have substituted a constant. */
3060 if (success && set && CONSTANT_P (to))
3061 {
3062 src = simplify_rtx (SET_SRC (set));
3063
3064 if (src)
3065 validate_change (insn, &SET_SRC (set), src, 0);
3066 }
3067
3068 /* If there is already a NOTE, update the expression in it with our
3069 replacement. */
3070 if (note != 0)
3071 XEXP (note, 0) = simplify_replace_rtx (XEXP (note, 0), from, to);
3072
3073 if (!success && set && reg_mentioned_p (from, SET_SRC (set)))
3074 {
3075 /* If above failed and this is a single set, try to simplify the source of
3076 the set given our substitution. We could perhaps try this for multiple
3077 SETs, but it probably won't buy us anything. */
3078 src = simplify_replace_rtx (SET_SRC (set), from, to);
3079
3080 if (!rtx_equal_p (src, SET_SRC (set))
3081 && validate_change (insn, &SET_SRC (set), src, 0))
3082 success = 1;
3083
3084 /* If we've failed to do replacement, have a single SET, don't already
3085 have a note, and have no special SET, add a REG_EQUAL note to not
3086 lose information. */
3087 if (!success && note == 0 && set != 0
3088 && GET_CODE (XEXP (set, 0)) != ZERO_EXTRACT
3089 && GET_CODE (XEXP (set, 0)) != SIGN_EXTRACT)
3090 note = set_unique_reg_note (insn, REG_EQUAL, copy_rtx (src));
3091 }
3092
3093 /* REG_EQUAL may get simplified into register.
3094 We don't allow that. Remove that note. This code ought
3095 not to happen, because previous code ought to synthesize
3096 reg-reg move, but be on the safe side. */
3097 if (note && REG_P (XEXP (note, 0)))
3098 remove_note (insn, note);
3099
3100 return success;
3101 }
3102
3103 /* Find a set of REGNOs that are available on entry to INSN's block. Returns
3104 NULL no such set is found. */
3105
3106 static struct expr *
3107 find_avail_set (int regno, rtx insn)
3108 {
3109 /* SET1 contains the last set found that can be returned to the caller for
3110 use in a substitution. */
3111 struct expr *set1 = 0;
3112
3113 /* Loops are not possible here. To get a loop we would need two sets
3114 available at the start of the block containing INSN. ie we would
3115 need two sets like this available at the start of the block:
3116
3117 (set (reg X) (reg Y))
3118 (set (reg Y) (reg X))
3119
3120 This can not happen since the set of (reg Y) would have killed the
3121 set of (reg X) making it unavailable at the start of this block. */
3122 while (1)
3123 {
3124 rtx src;
3125 struct expr *set = lookup_set (regno, &set_hash_table);
3126
3127 /* Find a set that is available at the start of the block
3128 which contains INSN. */
3129 while (set)
3130 {
3131 if (TEST_BIT (cprop_avin[BLOCK_NUM (insn)], set->bitmap_index))
3132 break;
3133 set = next_set (regno, set);
3134 }
3135
3136 /* If no available set was found we've reached the end of the
3137 (possibly empty) copy chain. */
3138 if (set == 0)
3139 break;
3140
3141 if (GET_CODE (set->expr) != SET)
3142 abort ();
3143
3144 src = SET_SRC (set->expr);
3145
3146 /* We know the set is available.
3147 Now check that SRC is ANTLOC (i.e. none of the source operands
3148 have changed since the start of the block).
3149
3150 If the source operand changed, we may still use it for the next
3151 iteration of this loop, but we may not use it for substitutions. */
3152
3153 if (gcse_constant_p (src) || oprs_not_set_p (src, insn))
3154 set1 = set;
3155
3156 /* If the source of the set is anything except a register, then
3157 we have reached the end of the copy chain. */
3158 if (! REG_P (src))
3159 break;
3160
3161 /* Follow the copy chain, ie start another iteration of the loop
3162 and see if we have an available copy into SRC. */
3163 regno = REGNO (src);
3164 }
3165
3166 /* SET1 holds the last set that was available and anticipatable at
3167 INSN. */
3168 return set1;
3169 }
3170
3171 /* Subroutine of cprop_insn that tries to propagate constants into
3172 JUMP_INSNS. JUMP must be a conditional jump. If SETCC is non-NULL
3173 it is the instruction that immediately precedes JUMP, and must be a
3174 single SET of a register. FROM is what we will try to replace,
3175 SRC is the constant we will try to substitute for it. Returns nonzero
3176 if a change was made. */
3177
3178 static int
3179 cprop_jump (basic_block bb, rtx setcc, rtx jump, rtx from, rtx src)
3180 {
3181 rtx new, set_src, note_src;
3182 rtx set = pc_set (jump);
3183 rtx note = find_reg_equal_equiv_note (jump);
3184
3185 if (note)
3186 {
3187 note_src = XEXP (note, 0);
3188 if (GET_CODE (note_src) == EXPR_LIST)
3189 note_src = NULL_RTX;
3190 }
3191 else note_src = NULL_RTX;
3192
3193 /* Prefer REG_EQUAL notes except those containing EXPR_LISTs. */
3194 set_src = note_src ? note_src : SET_SRC (set);
3195
3196 /* First substitute the SETCC condition into the JUMP instruction,
3197 then substitute that given values into this expanded JUMP. */
3198 if (setcc != NULL_RTX
3199 && !modified_between_p (from, setcc, jump)
3200 && !modified_between_p (src, setcc, jump))
3201 {
3202 rtx setcc_src;
3203 rtx setcc_set = single_set (setcc);
3204 rtx setcc_note = find_reg_equal_equiv_note (setcc);
3205 setcc_src = (setcc_note && GET_CODE (XEXP (setcc_note, 0)) != EXPR_LIST)
3206 ? XEXP (setcc_note, 0) : SET_SRC (setcc_set);
3207 set_src = simplify_replace_rtx (set_src, SET_DEST (setcc_set),
3208 setcc_src);
3209 }
3210 else
3211 setcc = NULL_RTX;
3212
3213 new = simplify_replace_rtx (set_src, from, src);
3214
3215 /* If no simplification can be made, then try the next register. */
3216 if (rtx_equal_p (new, SET_SRC (set)))
3217 return 0;
3218
3219 /* If this is now a no-op delete it, otherwise this must be a valid insn. */
3220 if (new == pc_rtx)
3221 delete_insn (jump);
3222 else
3223 {
3224 /* Ensure the value computed inside the jump insn to be equivalent
3225 to one computed by setcc. */
3226 if (setcc && modified_in_p (new, setcc))
3227 return 0;
3228 if (! validate_change (jump, &SET_SRC (set), new, 0))
3229 {
3230 /* When (some) constants are not valid in a comparison, and there
3231 are two registers to be replaced by constants before the entire
3232 comparison can be folded into a constant, we need to keep
3233 intermediate information in REG_EQUAL notes. For targets with
3234 separate compare insns, such notes are added by try_replace_reg.
3235 When we have a combined compare-and-branch instruction, however,
3236 we need to attach a note to the branch itself to make this
3237 optimization work. */
3238
3239 if (!rtx_equal_p (new, note_src))
3240 set_unique_reg_note (jump, REG_EQUAL, copy_rtx (new));
3241 return 0;
3242 }
3243
3244 /* Remove REG_EQUAL note after simplification. */
3245 if (note_src)
3246 remove_note (jump, note);
3247
3248 /* If this has turned into an unconditional jump,
3249 then put a barrier after it so that the unreachable
3250 code will be deleted. */
3251 if (GET_CODE (SET_SRC (set)) == LABEL_REF)
3252 emit_barrier_after (jump);
3253 }
3254
3255 #ifdef HAVE_cc0
3256 /* Delete the cc0 setter. */
3257 if (setcc != NULL && CC0_P (SET_DEST (single_set (setcc))))
3258 delete_insn (setcc);
3259 #endif
3260
3261 run_jump_opt_after_gcse = 1;
3262
3263 const_prop_count++;
3264 if (gcse_file != NULL)
3265 {
3266 fprintf (gcse_file,
3267 "CONST-PROP: Replacing reg %d in jump_insn %d with constant ",
3268 REGNO (from), INSN_UID (jump));
3269 print_rtl (gcse_file, src);
3270 fprintf (gcse_file, "\n");
3271 }
3272 purge_dead_edges (bb);
3273
3274 return 1;
3275 }
3276
3277 static bool
3278 constprop_register (rtx insn, rtx from, rtx to, int alter_jumps)
3279 {
3280 rtx sset;
3281
3282 /* Check for reg or cc0 setting instructions followed by
3283 conditional branch instructions first. */
3284 if (alter_jumps
3285 && (sset = single_set (insn)) != NULL
3286 && NEXT_INSN (insn)
3287 && any_condjump_p (NEXT_INSN (insn)) && onlyjump_p (NEXT_INSN (insn)))
3288 {
3289 rtx dest = SET_DEST (sset);
3290 if ((REG_P (dest) || CC0_P (dest))
3291 && cprop_jump (BLOCK_FOR_INSN (insn), insn, NEXT_INSN (insn), from, to))
3292 return 1;
3293 }
3294
3295 /* Handle normal insns next. */
3296 if (GET_CODE (insn) == INSN
3297 && try_replace_reg (from, to, insn))
3298 return 1;
3299
3300 /* Try to propagate a CONST_INT into a conditional jump.
3301 We're pretty specific about what we will handle in this
3302 code, we can extend this as necessary over time.
3303
3304 Right now the insn in question must look like
3305 (set (pc) (if_then_else ...)) */
3306 else if (alter_jumps && any_condjump_p (insn) && onlyjump_p (insn))
3307 return cprop_jump (BLOCK_FOR_INSN (insn), NULL, insn, from, to);
3308 return 0;
3309 }
3310
3311 /* Perform constant and copy propagation on INSN.
3312 The result is nonzero if a change was made. */
3313
3314 static int
3315 cprop_insn (rtx insn, int alter_jumps)
3316 {
3317 struct reg_use *reg_used;
3318 int changed = 0;
3319 rtx note;
3320
3321 if (!INSN_P (insn))
3322 return 0;
3323
3324 reg_use_count = 0;
3325 note_uses (&PATTERN (insn), find_used_regs, NULL);
3326
3327 note = find_reg_equal_equiv_note (insn);
3328
3329 /* We may win even when propagating constants into notes. */
3330 if (note)
3331 find_used_regs (&XEXP (note, 0), NULL);
3332
3333 for (reg_used = &reg_use_table[0]; reg_use_count > 0;
3334 reg_used++, reg_use_count--)
3335 {
3336 unsigned int regno = REGNO (reg_used->reg_rtx);
3337 rtx pat, src;
3338 struct expr *set;
3339
3340 /* Ignore registers created by GCSE.
3341 We do this because ... */
3342 if (regno >= max_gcse_regno)
3343 continue;
3344
3345 /* If the register has already been set in this block, there's
3346 nothing we can do. */
3347 if (! oprs_not_set_p (reg_used->reg_rtx, insn))
3348 continue;
3349
3350 /* Find an assignment that sets reg_used and is available
3351 at the start of the block. */
3352 set = find_avail_set (regno, insn);
3353 if (! set)
3354 continue;
3355
3356 pat = set->expr;
3357 /* ??? We might be able to handle PARALLELs. Later. */
3358 if (GET_CODE (pat) != SET)
3359 abort ();
3360
3361 src = SET_SRC (pat);
3362
3363 /* Constant propagation. */
3364 if (gcse_constant_p (src))
3365 {
3366 if (constprop_register (insn, reg_used->reg_rtx, src, alter_jumps))
3367 {
3368 changed = 1;
3369 const_prop_count++;
3370 if (gcse_file != NULL)
3371 {
3372 fprintf (gcse_file, "GLOBAL CONST-PROP: Replacing reg %d in ", regno);
3373 fprintf (gcse_file, "insn %d with constant ", INSN_UID (insn));
3374 print_rtl (gcse_file, src);
3375 fprintf (gcse_file, "\n");
3376 }
3377 if (INSN_DELETED_P (insn))
3378 return 1;
3379 }
3380 }
3381 else if (REG_P (src)
3382 && REGNO (src) >= FIRST_PSEUDO_REGISTER
3383 && REGNO (src) != regno)
3384 {
3385 if (try_replace_reg (reg_used->reg_rtx, src, insn))
3386 {
3387 changed = 1;
3388 copy_prop_count++;
3389 if (gcse_file != NULL)
3390 {
3391 fprintf (gcse_file, "GLOBAL COPY-PROP: Replacing reg %d in insn %d",
3392 regno, INSN_UID (insn));
3393 fprintf (gcse_file, " with reg %d\n", REGNO (src));
3394 }
3395
3396 /* The original insn setting reg_used may or may not now be
3397 deletable. We leave the deletion to flow. */
3398 /* FIXME: If it turns out that the insn isn't deletable,
3399 then we may have unnecessarily extended register lifetimes
3400 and made things worse. */
3401 }
3402 }
3403 }
3404
3405 return changed;
3406 }
3407
3408 /* Like find_used_regs, but avoid recording uses that appear in
3409 input-output contexts such as zero_extract or pre_dec. This
3410 restricts the cases we consider to those for which local cprop
3411 can legitimately make replacements. */
3412
3413 static void
3414 local_cprop_find_used_regs (rtx *xptr, void *data)
3415 {
3416 rtx x = *xptr;
3417
3418 if (x == 0)
3419 return;
3420
3421 switch (GET_CODE (x))
3422 {
3423 case ZERO_EXTRACT:
3424 case SIGN_EXTRACT:
3425 case STRICT_LOW_PART:
3426 return;
3427
3428 case PRE_DEC:
3429 case PRE_INC:
3430 case POST_DEC:
3431 case POST_INC:
3432 case PRE_MODIFY:
3433 case POST_MODIFY:
3434 /* Can only legitimately appear this early in the context of
3435 stack pushes for function arguments, but handle all of the
3436 codes nonetheless. */
3437 return;
3438
3439 case SUBREG:
3440 /* Setting a subreg of a register larger than word_mode leaves
3441 the non-written words unchanged. */
3442 if (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x))) > BITS_PER_WORD)
3443 return;
3444 break;
3445
3446 default:
3447 break;
3448 }
3449
3450 find_used_regs (xptr, data);
3451 }
3452
3453 /* LIBCALL_SP is a zero-terminated array of insns at the end of a libcall;
3454 their REG_EQUAL notes need updating. */
3455
3456 static bool
3457 do_local_cprop (rtx x, rtx insn, int alter_jumps, rtx *libcall_sp)
3458 {
3459 rtx newreg = NULL, newcnst = NULL;
3460
3461 /* Rule out USE instructions and ASM statements as we don't want to
3462 change the hard registers mentioned. */
3463 if (REG_P (x)
3464 && (REGNO (x) >= FIRST_PSEUDO_REGISTER
3465 || (GET_CODE (PATTERN (insn)) != USE
3466 && asm_noperands (PATTERN (insn)) < 0)))
3467 {
3468 cselib_val *val = cselib_lookup (x, GET_MODE (x), 0);
3469 struct elt_loc_list *l;
3470
3471 if (!val)
3472 return false;
3473 for (l = val->locs; l; l = l->next)
3474 {
3475 rtx this_rtx = l->loc;
3476 rtx note;
3477
3478 if (l->in_libcall)
3479 continue;
3480
3481 if (gcse_constant_p (this_rtx))
3482 newcnst = this_rtx;
3483 if (REG_P (this_rtx) && REGNO (this_rtx) >= FIRST_PSEUDO_REGISTER
3484 /* Don't copy propagate if it has attached REG_EQUIV note.
3485 At this point this only function parameters should have
3486 REG_EQUIV notes and if the argument slot is used somewhere
3487 explicitly, it means address of parameter has been taken,
3488 so we should not extend the lifetime of the pseudo. */
3489 && (!(note = find_reg_note (l->setting_insn, REG_EQUIV, NULL_RTX))
3490 || ! MEM_P (XEXP (note, 0))))
3491 newreg = this_rtx;
3492 }
3493 if (newcnst && constprop_register (insn, x, newcnst, alter_jumps))
3494 {
3495 /* If we find a case where we can't fix the retval REG_EQUAL notes
3496 match the new register, we either have to abandon this replacement
3497 or fix delete_trivially_dead_insns to preserve the setting insn,
3498 or make it delete the REG_EUAQL note, and fix up all passes that
3499 require the REG_EQUAL note there. */
3500 if (!adjust_libcall_notes (x, newcnst, insn, libcall_sp))
3501 abort ();
3502 if (gcse_file != NULL)
3503 {
3504 fprintf (gcse_file, "LOCAL CONST-PROP: Replacing reg %d in ",
3505 REGNO (x));
3506 fprintf (gcse_file, "insn %d with constant ",
3507 INSN_UID (insn));
3508 print_rtl (gcse_file, newcnst);
3509 fprintf (gcse_file, "\n");
3510 }
3511 const_prop_count++;
3512 return true;
3513 }
3514 else if (newreg && newreg != x && try_replace_reg (x, newreg, insn))
3515 {
3516 adjust_libcall_notes (x, newreg, insn, libcall_sp);
3517 if (gcse_file != NULL)
3518 {
3519 fprintf (gcse_file,
3520 "LOCAL COPY-PROP: Replacing reg %d in insn %d",
3521 REGNO (x), INSN_UID (insn));
3522 fprintf (gcse_file, " with reg %d\n", REGNO (newreg));
3523 }
3524 copy_prop_count++;
3525 return true;
3526 }
3527 }
3528 return false;
3529 }
3530
3531 /* LIBCALL_SP is a zero-terminated array of insns at the end of a libcall;
3532 their REG_EQUAL notes need updating to reflect that OLDREG has been
3533 replaced with NEWVAL in INSN. Return true if all substitutions could
3534 be made. */
3535 static bool
3536 adjust_libcall_notes (rtx oldreg, rtx newval, rtx insn, rtx *libcall_sp)
3537 {
3538 rtx end;
3539
3540 while ((end = *libcall_sp++))
3541 {
3542 rtx note = find_reg_equal_equiv_note (end);
3543
3544 if (! note)
3545 continue;
3546
3547 if (REG_P (newval))
3548 {
3549 if (reg_set_between_p (newval, PREV_INSN (insn), end))
3550 {
3551 do
3552 {
3553 note = find_reg_equal_equiv_note (end);
3554 if (! note)
3555 continue;
3556 if (reg_mentioned_p (newval, XEXP (note, 0)))
3557 return false;
3558 }
3559 while ((end = *libcall_sp++));
3560 return true;
3561 }
3562 }
3563 XEXP (note, 0) = replace_rtx (XEXP (note, 0), oldreg, newval);
3564 insn = end;
3565 }
3566 return true;
3567 }
3568
3569 #define MAX_NESTED_LIBCALLS 9
3570
3571 static void
3572 local_cprop_pass (int alter_jumps)
3573 {
3574 rtx insn;
3575 struct reg_use *reg_used;
3576 rtx libcall_stack[MAX_NESTED_LIBCALLS + 1], *libcall_sp;
3577 bool changed = false;
3578
3579 cselib_init (false);
3580 libcall_sp = &libcall_stack[MAX_NESTED_LIBCALLS];
3581 *libcall_sp = 0;
3582 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
3583 {
3584 if (INSN_P (insn))
3585 {
3586 rtx note = find_reg_note (insn, REG_LIBCALL, NULL_RTX);
3587
3588 if (note)
3589 {
3590 if (libcall_sp == libcall_stack)
3591 abort ();
3592 *--libcall_sp = XEXP (note, 0);
3593 }
3594 note = find_reg_note (insn, REG_RETVAL, NULL_RTX);
3595 if (note)
3596 libcall_sp++;
3597 note = find_reg_equal_equiv_note (insn);
3598 do
3599 {
3600 reg_use_count = 0;
3601 note_uses (&PATTERN (insn), local_cprop_find_used_regs, NULL);
3602 if (note)
3603 local_cprop_find_used_regs (&XEXP (note, 0), NULL);
3604
3605 for (reg_used = &reg_use_table[0]; reg_use_count > 0;
3606 reg_used++, reg_use_count--)
3607 if (do_local_cprop (reg_used->reg_rtx, insn, alter_jumps,
3608 libcall_sp))
3609 {
3610 changed = true;
3611 break;
3612 }
3613 if (INSN_DELETED_P (insn))
3614 break;
3615 }
3616 while (reg_use_count);
3617 }
3618 cselib_process_insn (insn);
3619 }
3620 cselib_finish ();
3621 /* Global analysis may get into infinite loops for unreachable blocks. */
3622 if (changed && alter_jumps)
3623 {
3624 delete_unreachable_blocks ();
3625 free_reg_set_mem ();
3626 alloc_reg_set_mem (max_reg_num ());
3627 compute_sets (get_insns ());
3628 }
3629 }
3630
3631 /* Forward propagate copies. This includes copies and constants. Return
3632 nonzero if a change was made. */
3633
3634 static int
3635 cprop (int alter_jumps)
3636 {
3637 int changed;
3638 basic_block bb;
3639 rtx insn;
3640
3641 /* Note we start at block 1. */
3642 if (ENTRY_BLOCK_PTR->next_bb == EXIT_BLOCK_PTR)
3643 {
3644 if (gcse_file != NULL)
3645 fprintf (gcse_file, "\n");
3646 return 0;
3647 }
3648
3649 changed = 0;
3650 FOR_BB_BETWEEN (bb, ENTRY_BLOCK_PTR->next_bb->next_bb, EXIT_BLOCK_PTR, next_bb)
3651 {
3652 /* Reset tables used to keep track of what's still valid [since the
3653 start of the block]. */
3654 reset_opr_set_tables ();
3655
3656 for (insn = BB_HEAD (bb);
3657 insn != NULL && insn != NEXT_INSN (BB_END (bb));
3658 insn = NEXT_INSN (insn))
3659 if (INSN_P (insn))
3660 {
3661 changed |= cprop_insn (insn, alter_jumps);
3662
3663 /* Keep track of everything modified by this insn. */
3664 /* ??? Need to be careful w.r.t. mods done to INSN. Don't
3665 call mark_oprs_set if we turned the insn into a NOTE. */
3666 if (! NOTE_P (insn))
3667 mark_oprs_set (insn);
3668 }
3669 }
3670
3671 if (gcse_file != NULL)
3672 fprintf (gcse_file, "\n");
3673
3674 return changed;
3675 }
3676
3677 /* Similar to get_condition, only the resulting condition must be
3678 valid at JUMP, instead of at EARLIEST.
3679
3680 This differs from noce_get_condition in ifcvt.c in that we prefer not to
3681 settle for the condition variable in the jump instruction being integral.
3682 We prefer to be able to record the value of a user variable, rather than
3683 the value of a temporary used in a condition. This could be solved by
3684 recording the value of *every* register scaned by canonicalize_condition,
3685 but this would require some code reorganization. */
3686
3687 rtx
3688 fis_get_condition (rtx jump)
3689 {
3690 rtx cond, set, tmp, insn, earliest;
3691 bool reverse;
3692
3693 if (! any_condjump_p (jump))
3694 return NULL_RTX;
3695
3696 set = pc_set (jump);
3697 cond = XEXP (SET_SRC (set), 0);
3698
3699 /* If this branches to JUMP_LABEL when the condition is false,
3700 reverse the condition. */
3701 reverse = (GET_CODE (XEXP (SET_SRC (set), 2)) == LABEL_REF
3702 && XEXP (XEXP (SET_SRC (set), 2), 0) == JUMP_LABEL (jump));
3703
3704 /* Use canonicalize_condition to do the dirty work of manipulating
3705 MODE_CC values and COMPARE rtx codes. */
3706 tmp = canonicalize_condition (jump, cond, reverse, &earliest, NULL_RTX,
3707 false);
3708 if (!tmp)
3709 return NULL_RTX;
3710
3711 /* Verify that the given condition is valid at JUMP by virtue of not
3712 having been modified since EARLIEST. */
3713 for (insn = earliest; insn != jump; insn = NEXT_INSN (insn))
3714 if (INSN_P (insn) && modified_in_p (tmp, insn))
3715 break;
3716 if (insn == jump)
3717 return tmp;
3718
3719 /* The condition was modified. See if we can get a partial result
3720 that doesn't follow all the reversals. Perhaps combine can fold
3721 them together later. */
3722 tmp = XEXP (tmp, 0);
3723 if (!REG_P (tmp) || GET_MODE_CLASS (GET_MODE (tmp)) != MODE_INT)
3724 return NULL_RTX;
3725 tmp = canonicalize_condition (jump, cond, reverse, &earliest, tmp,
3726 false);
3727 if (!tmp)
3728 return NULL_RTX;
3729
3730 /* For sanity's sake, re-validate the new result. */
3731 for (insn = earliest; insn != jump; insn = NEXT_INSN (insn))
3732 if (INSN_P (insn) && modified_in_p (tmp, insn))
3733 return NULL_RTX;
3734
3735 return tmp;
3736 }
3737
3738 /* Check the comparison COND to see if we can safely form an implicit set from
3739 it. COND is either an EQ or NE comparison. */
3740
3741 static bool
3742 implicit_set_cond_p (rtx cond)
3743 {
3744 enum machine_mode mode = GET_MODE (XEXP (cond, 0));
3745 rtx cst = XEXP (cond, 1);
3746
3747 /* We can't perform this optimization if either operand might be or might
3748 contain a signed zero. */
3749 if (HONOR_SIGNED_ZEROS (mode))
3750 {
3751 /* It is sufficient to check if CST is or contains a zero. We must
3752 handle float, complex, and vector. If any subpart is a zero, then
3753 the optimization can't be performed. */
3754 /* ??? The complex and vector checks are not implemented yet. We just
3755 always return zero for them. */
3756 if (GET_CODE (cst) == CONST_DOUBLE)
3757 {
3758 REAL_VALUE_TYPE d;
3759 REAL_VALUE_FROM_CONST_DOUBLE (d, cst);
3760 if (REAL_VALUES_EQUAL (d, dconst0))
3761 return 0;
3762 }
3763 else
3764 return 0;
3765 }
3766
3767 return gcse_constant_p (cst);
3768 }
3769
3770 /* Find the implicit sets of a function. An "implicit set" is a constraint
3771 on the value of a variable, implied by a conditional jump. For example,
3772 following "if (x == 2)", the then branch may be optimized as though the
3773 conditional performed an "explicit set", in this example, "x = 2". This
3774 function records the set patterns that are implicit at the start of each
3775 basic block. */
3776
3777 static void
3778 find_implicit_sets (void)
3779 {
3780 basic_block bb, dest;
3781 unsigned int count;
3782 rtx cond, new;
3783
3784 count = 0;
3785 FOR_EACH_BB (bb)
3786 /* Check for more than one successor. */
3787 if (bb->succ && bb->succ->succ_next)
3788 {
3789 cond = fis_get_condition (BB_END (bb));
3790
3791 if (cond
3792 && (GET_CODE (cond) == EQ || GET_CODE (cond) == NE)
3793 && REG_P (XEXP (cond, 0))
3794 && REGNO (XEXP (cond, 0)) >= FIRST_PSEUDO_REGISTER
3795 && implicit_set_cond_p (cond))
3796 {
3797 dest = GET_CODE (cond) == EQ ? BRANCH_EDGE (bb)->dest
3798 : FALLTHRU_EDGE (bb)->dest;
3799
3800 if (dest && ! dest->pred->pred_next
3801 && dest != EXIT_BLOCK_PTR)
3802 {
3803 new = gen_rtx_SET (VOIDmode, XEXP (cond, 0),
3804 XEXP (cond, 1));
3805 implicit_sets[dest->index] = new;
3806 if (gcse_file)
3807 {
3808 fprintf(gcse_file, "Implicit set of reg %d in ",
3809 REGNO (XEXP (cond, 0)));
3810 fprintf(gcse_file, "basic block %d\n", dest->index);
3811 }
3812 count++;
3813 }
3814 }
3815 }
3816
3817 if (gcse_file)
3818 fprintf (gcse_file, "Found %d implicit sets\n", count);
3819 }
3820
3821 /* Perform one copy/constant propagation pass.
3822 PASS is the pass count. If CPROP_JUMPS is true, perform constant
3823 propagation into conditional jumps. If BYPASS_JUMPS is true,
3824 perform conditional jump bypassing optimizations. */
3825
3826 static int
3827 one_cprop_pass (int pass, int cprop_jumps, int bypass_jumps)
3828 {
3829 int changed = 0;
3830
3831 const_prop_count = 0;
3832 copy_prop_count = 0;
3833
3834 local_cprop_pass (cprop_jumps);
3835
3836 /* Determine implicit sets. */
3837 implicit_sets = xcalloc (last_basic_block, sizeof (rtx));
3838 find_implicit_sets ();
3839
3840 alloc_hash_table (max_cuid, &set_hash_table, 1);
3841 compute_hash_table (&set_hash_table);
3842
3843 /* Free implicit_sets before peak usage. */
3844 free (implicit_sets);
3845 implicit_sets = NULL;
3846
3847 if (gcse_file)
3848 dump_hash_table (gcse_file, "SET", &set_hash_table);
3849 if (set_hash_table.n_elems > 0)
3850 {
3851 alloc_cprop_mem (last_basic_block, set_hash_table.n_elems);
3852 compute_cprop_data ();
3853 changed = cprop (cprop_jumps);
3854 if (bypass_jumps)
3855 changed |= bypass_conditional_jumps ();
3856 free_cprop_mem ();
3857 }
3858
3859 free_hash_table (&set_hash_table);
3860
3861 if (gcse_file)
3862 {
3863 fprintf (gcse_file, "CPROP of %s, pass %d: %d bytes needed, ",
3864 current_function_name (), pass, bytes_used);
3865 fprintf (gcse_file, "%d const props, %d copy props\n\n",
3866 const_prop_count, copy_prop_count);
3867 }
3868 /* Global analysis may get into infinite loops for unreachable blocks. */
3869 if (changed && cprop_jumps)
3870 delete_unreachable_blocks ();
3871
3872 return changed;
3873 }
3874 \f
3875 /* Bypass conditional jumps. */
3876
3877 /* The value of last_basic_block at the beginning of the jump_bypass
3878 pass. The use of redirect_edge_and_branch_force may introduce new
3879 basic blocks, but the data flow analysis is only valid for basic
3880 block indices less than bypass_last_basic_block. */
3881
3882 static int bypass_last_basic_block;
3883
3884 /* Find a set of REGNO to a constant that is available at the end of basic
3885 block BB. Returns NULL if no such set is found. Based heavily upon
3886 find_avail_set. */
3887
3888 static struct expr *
3889 find_bypass_set (int regno, int bb)
3890 {
3891 struct expr *result = 0;
3892
3893 for (;;)
3894 {
3895 rtx src;
3896 struct expr *set = lookup_set (regno, &set_hash_table);
3897
3898 while (set)
3899 {
3900 if (TEST_BIT (cprop_avout[bb], set->bitmap_index))
3901 break;
3902 set = next_set (regno, set);
3903 }
3904
3905 if (set == 0)
3906 break;
3907
3908 if (GET_CODE (set->expr) != SET)
3909 abort ();
3910
3911 src = SET_SRC (set->expr);
3912 if (gcse_constant_p (src))
3913 result = set;
3914
3915 if (! REG_P (src))
3916 break;
3917
3918 regno = REGNO (src);
3919 }
3920 return result;
3921 }
3922
3923
3924 /* Subroutine of bypass_block that checks whether a pseudo is killed by
3925 any of the instructions inserted on an edge. Jump bypassing places
3926 condition code setters on CFG edges using insert_insn_on_edge. This
3927 function is required to check that our data flow analysis is still
3928 valid prior to commit_edge_insertions. */
3929
3930 static bool
3931 reg_killed_on_edge (rtx reg, edge e)
3932 {
3933 rtx insn;
3934
3935 for (insn = e->insns.r; insn; insn = NEXT_INSN (insn))
3936 if (INSN_P (insn) && reg_set_p (reg, insn))
3937 return true;
3938
3939 return false;
3940 }
3941
3942 /* Subroutine of bypass_conditional_jumps that attempts to bypass the given
3943 basic block BB which has more than one predecessor. If not NULL, SETCC
3944 is the first instruction of BB, which is immediately followed by JUMP_INSN
3945 JUMP. Otherwise, SETCC is NULL, and JUMP is the first insn of BB.
3946 Returns nonzero if a change was made.
3947
3948 During the jump bypassing pass, we may place copies of SETCC instructions
3949 on CFG edges. The following routine must be careful to pay attention to
3950 these inserted insns when performing its transformations. */
3951
3952 static int
3953 bypass_block (basic_block bb, rtx setcc, rtx jump)
3954 {
3955 rtx insn, note;
3956 edge e, enext, edest;
3957 int i, change;
3958 int may_be_loop_header;
3959
3960 insn = (setcc != NULL) ? setcc : jump;
3961
3962 /* Determine set of register uses in INSN. */
3963 reg_use_count = 0;
3964 note_uses (&PATTERN (insn), find_used_regs, NULL);
3965 note = find_reg_equal_equiv_note (insn);
3966 if (note)
3967 find_used_regs (&XEXP (note, 0), NULL);
3968
3969 may_be_loop_header = false;
3970 for (e = bb->pred; e; e = e->pred_next)
3971 if (e->flags & EDGE_DFS_BACK)
3972 {
3973 may_be_loop_header = true;
3974 break;
3975 }
3976
3977 change = 0;
3978 for (e = bb->pred; e; e = enext)
3979 {
3980 enext = e->pred_next;
3981 if (e->flags & EDGE_COMPLEX)
3982 continue;
3983
3984 /* We can't redirect edges from new basic blocks. */
3985 if (e->src->index >= bypass_last_basic_block)
3986 continue;
3987
3988 /* The irreducible loops created by redirecting of edges entering the
3989 loop from outside would decrease effectiveness of some of the following
3990 optimizations, so prevent this. */
3991 if (may_be_loop_header
3992 && !(e->flags & EDGE_DFS_BACK))
3993 continue;
3994
3995 for (i = 0; i < reg_use_count; i++)
3996 {
3997 struct reg_use *reg_used = &reg_use_table[i];
3998 unsigned int regno = REGNO (reg_used->reg_rtx);
3999 basic_block dest, old_dest;
4000 struct expr *set;
4001 rtx src, new;
4002
4003 if (regno >= max_gcse_regno)
4004 continue;
4005
4006 set = find_bypass_set (regno, e->src->index);
4007
4008 if (! set)
4009 continue;
4010
4011 /* Check the data flow is valid after edge insertions. */
4012 if (e->insns.r && reg_killed_on_edge (reg_used->reg_rtx, e))
4013 continue;
4014
4015 src = SET_SRC (pc_set (jump));
4016
4017 if (setcc != NULL)
4018 src = simplify_replace_rtx (src,
4019 SET_DEST (PATTERN (setcc)),
4020 SET_SRC (PATTERN (setcc)));
4021
4022 new = simplify_replace_rtx (src, reg_used->reg_rtx,
4023 SET_SRC (set->expr));
4024
4025 /* Jump bypassing may have already placed instructions on
4026 edges of the CFG. We can't bypass an outgoing edge that
4027 has instructions associated with it, as these insns won't
4028 get executed if the incoming edge is redirected. */
4029
4030 if (new == pc_rtx)
4031 {
4032 edest = FALLTHRU_EDGE (bb);
4033 dest = edest->insns.r ? NULL : edest->dest;
4034 }
4035 else if (GET_CODE (new) == LABEL_REF)
4036 {
4037 dest = BLOCK_FOR_INSN (XEXP (new, 0));
4038 /* Don't bypass edges containing instructions. */
4039 for (edest = bb->succ; edest; edest = edest->succ_next)
4040 if (edest->dest == dest && edest->insns.r)
4041 {
4042 dest = NULL;
4043 break;
4044 }
4045 }
4046 else
4047 dest = NULL;
4048
4049 /* Avoid unification of the edge with other edges from original
4050 branch. We would end up emitting the instruction on "both"
4051 edges. */
4052
4053 if (dest && setcc && !CC0_P (SET_DEST (PATTERN (setcc))))
4054 {
4055 edge e2;
4056 for (e2 = e->src->succ; e2; e2 = e2->succ_next)
4057 if (e2->dest == dest)
4058 {
4059 dest = NULL;
4060 break;
4061 }
4062 }
4063
4064 old_dest = e->dest;
4065 if (dest != NULL
4066 && dest != old_dest
4067 && dest != EXIT_BLOCK_PTR)
4068 {
4069 redirect_edge_and_branch_force (e, dest);
4070
4071 /* Copy the register setter to the redirected edge.
4072 Don't copy CC0 setters, as CC0 is dead after jump. */
4073 if (setcc)
4074 {
4075 rtx pat = PATTERN (setcc);
4076 if (!CC0_P (SET_DEST (pat)))
4077 insert_insn_on_edge (copy_insn (pat), e);
4078 }
4079
4080 if (gcse_file != NULL)
4081 {
4082 fprintf (gcse_file, "JUMP-BYPASS: Proved reg %d in jump_insn %d equals constant ",
4083 regno, INSN_UID (jump));
4084 print_rtl (gcse_file, SET_SRC (set->expr));
4085 fprintf (gcse_file, "\nBypass edge from %d->%d to %d\n",
4086 e->src->index, old_dest->index, dest->index);
4087 }
4088 change = 1;
4089 break;
4090 }
4091 }
4092 }
4093 return change;
4094 }
4095
4096 /* Find basic blocks with more than one predecessor that only contain a
4097 single conditional jump. If the result of the comparison is known at
4098 compile-time from any incoming edge, redirect that edge to the
4099 appropriate target. Returns nonzero if a change was made.
4100
4101 This function is now mis-named, because we also handle indirect jumps. */
4102
4103 static int
4104 bypass_conditional_jumps (void)
4105 {
4106 basic_block bb;
4107 int changed;
4108 rtx setcc;
4109 rtx insn;
4110 rtx dest;
4111
4112 /* Note we start at block 1. */
4113 if (ENTRY_BLOCK_PTR->next_bb == EXIT_BLOCK_PTR)
4114 return 0;
4115
4116 bypass_last_basic_block = last_basic_block;
4117 mark_dfs_back_edges ();
4118
4119 changed = 0;
4120 FOR_BB_BETWEEN (bb, ENTRY_BLOCK_PTR->next_bb->next_bb,
4121 EXIT_BLOCK_PTR, next_bb)
4122 {
4123 /* Check for more than one predecessor. */
4124 if (bb->pred && bb->pred->pred_next)
4125 {
4126 setcc = NULL_RTX;
4127 for (insn = BB_HEAD (bb);
4128 insn != NULL && insn != NEXT_INSN (BB_END (bb));
4129 insn = NEXT_INSN (insn))
4130 if (GET_CODE (insn) == INSN)
4131 {
4132 if (setcc)
4133 break;
4134 if (GET_CODE (PATTERN (insn)) != SET)
4135 break;
4136
4137 dest = SET_DEST (PATTERN (insn));
4138 if (REG_P (dest) || CC0_P (dest))
4139 setcc = insn;
4140 else
4141 break;
4142 }
4143 else if (JUMP_P (insn))
4144 {
4145 if ((any_condjump_p (insn) || computed_jump_p (insn))
4146 && onlyjump_p (insn))
4147 changed |= bypass_block (bb, setcc, insn);
4148 break;
4149 }
4150 else if (INSN_P (insn))
4151 break;
4152 }
4153 }
4154
4155 /* If we bypassed any register setting insns, we inserted a
4156 copy on the redirected edge. These need to be committed. */
4157 if (changed)
4158 commit_edge_insertions();
4159
4160 return changed;
4161 }
4162 \f
4163 /* Compute PRE+LCM working variables. */
4164
4165 /* Local properties of expressions. */
4166 /* Nonzero for expressions that are transparent in the block. */
4167 static sbitmap *transp;
4168
4169 /* Nonzero for expressions that are transparent at the end of the block.
4170 This is only zero for expressions killed by abnormal critical edge
4171 created by a calls. */
4172 static sbitmap *transpout;
4173
4174 /* Nonzero for expressions that are computed (available) in the block. */
4175 static sbitmap *comp;
4176
4177 /* Nonzero for expressions that are locally anticipatable in the block. */
4178 static sbitmap *antloc;
4179
4180 /* Nonzero for expressions where this block is an optimal computation
4181 point. */
4182 static sbitmap *pre_optimal;
4183
4184 /* Nonzero for expressions which are redundant in a particular block. */
4185 static sbitmap *pre_redundant;
4186
4187 /* Nonzero for expressions which should be inserted on a specific edge. */
4188 static sbitmap *pre_insert_map;
4189
4190 /* Nonzero for expressions which should be deleted in a specific block. */
4191 static sbitmap *pre_delete_map;
4192
4193 /* Contains the edge_list returned by pre_edge_lcm. */
4194 static struct edge_list *edge_list;
4195
4196 /* Redundant insns. */
4197 static sbitmap pre_redundant_insns;
4198
4199 /* Allocate vars used for PRE analysis. */
4200
4201 static void
4202 alloc_pre_mem (int n_blocks, int n_exprs)
4203 {
4204 transp = sbitmap_vector_alloc (n_blocks, n_exprs);
4205 comp = sbitmap_vector_alloc (n_blocks, n_exprs);
4206 antloc = sbitmap_vector_alloc (n_blocks, n_exprs);
4207
4208 pre_optimal = NULL;
4209 pre_redundant = NULL;
4210 pre_insert_map = NULL;
4211 pre_delete_map = NULL;
4212 ae_kill = sbitmap_vector_alloc (n_blocks, n_exprs);
4213
4214 /* pre_insert and pre_delete are allocated later. */
4215 }
4216
4217 /* Free vars used for PRE analysis. */
4218
4219 static void
4220 free_pre_mem (void)
4221 {
4222 sbitmap_vector_free (transp);
4223 sbitmap_vector_free (comp);
4224
4225 /* ANTLOC and AE_KILL are freed just after pre_lcm finishes. */
4226
4227 if (pre_optimal)
4228 sbitmap_vector_free (pre_optimal);
4229 if (pre_redundant)
4230 sbitmap_vector_free (pre_redundant);
4231 if (pre_insert_map)
4232 sbitmap_vector_free (pre_insert_map);
4233 if (pre_delete_map)
4234 sbitmap_vector_free (pre_delete_map);
4235
4236 transp = comp = NULL;
4237 pre_optimal = pre_redundant = pre_insert_map = pre_delete_map = NULL;
4238 }
4239
4240 /* Top level routine to do the dataflow analysis needed by PRE. */
4241
4242 static void
4243 compute_pre_data (void)
4244 {
4245 sbitmap trapping_expr;
4246 basic_block bb;
4247 unsigned int ui;
4248
4249 compute_local_properties (transp, comp, antloc, &expr_hash_table);
4250 sbitmap_vector_zero (ae_kill, last_basic_block);
4251
4252 /* Collect expressions which might trap. */
4253 trapping_expr = sbitmap_alloc (expr_hash_table.n_elems);
4254 sbitmap_zero (trapping_expr);
4255 for (ui = 0; ui < expr_hash_table.size; ui++)
4256 {
4257 struct expr *e;
4258 for (e = expr_hash_table.table[ui]; e != NULL; e = e->next_same_hash)
4259 if (may_trap_p (e->expr))
4260 SET_BIT (trapping_expr, e->bitmap_index);
4261 }
4262
4263 /* Compute ae_kill for each basic block using:
4264
4265 ~(TRANSP | COMP)
4266 */
4267
4268 FOR_EACH_BB (bb)
4269 {
4270 edge e;
4271
4272 /* If the current block is the destination of an abnormal edge, we
4273 kill all trapping expressions because we won't be able to properly
4274 place the instruction on the edge. So make them neither
4275 anticipatable nor transparent. This is fairly conservative. */
4276 for (e = bb->pred; e ; e = e->pred_next)
4277 if (e->flags & EDGE_ABNORMAL)
4278 {
4279 sbitmap_difference (antloc[bb->index], antloc[bb->index], trapping_expr);
4280 sbitmap_difference (transp[bb->index], transp[bb->index], trapping_expr);
4281 break;
4282 }
4283
4284 sbitmap_a_or_b (ae_kill[bb->index], transp[bb->index], comp[bb->index]);
4285 sbitmap_not (ae_kill[bb->index], ae_kill[bb->index]);
4286 }
4287
4288 edge_list = pre_edge_lcm (gcse_file, expr_hash_table.n_elems, transp, comp, antloc,
4289 ae_kill, &pre_insert_map, &pre_delete_map);
4290 sbitmap_vector_free (antloc);
4291 antloc = NULL;
4292 sbitmap_vector_free (ae_kill);
4293 ae_kill = NULL;
4294 sbitmap_free (trapping_expr);
4295 }
4296 \f
4297 /* PRE utilities */
4298
4299 /* Return nonzero if an occurrence of expression EXPR in OCCR_BB would reach
4300 block BB.
4301
4302 VISITED is a pointer to a working buffer for tracking which BB's have
4303 been visited. It is NULL for the top-level call.
4304
4305 We treat reaching expressions that go through blocks containing the same
4306 reaching expression as "not reaching". E.g. if EXPR is generated in blocks
4307 2 and 3, INSN is in block 4, and 2->3->4, we treat the expression in block
4308 2 as not reaching. The intent is to improve the probability of finding
4309 only one reaching expression and to reduce register lifetimes by picking
4310 the closest such expression. */
4311
4312 static int
4313 pre_expr_reaches_here_p_work (basic_block occr_bb, struct expr *expr, basic_block bb, char *visited)
4314 {
4315 edge pred;
4316
4317 for (pred = bb->pred; pred != NULL; pred = pred->pred_next)
4318 {
4319 basic_block pred_bb = pred->src;
4320
4321 if (pred->src == ENTRY_BLOCK_PTR
4322 /* Has predecessor has already been visited? */
4323 || visited[pred_bb->index])
4324 ;/* Nothing to do. */
4325
4326 /* Does this predecessor generate this expression? */
4327 else if (TEST_BIT (comp[pred_bb->index], expr->bitmap_index))
4328 {
4329 /* Is this the occurrence we're looking for?
4330 Note that there's only one generating occurrence per block
4331 so we just need to check the block number. */
4332 if (occr_bb == pred_bb)
4333 return 1;
4334
4335 visited[pred_bb->index] = 1;
4336 }
4337 /* Ignore this predecessor if it kills the expression. */
4338 else if (! TEST_BIT (transp[pred_bb->index], expr->bitmap_index))
4339 visited[pred_bb->index] = 1;
4340
4341 /* Neither gen nor kill. */
4342 else
4343 {
4344 visited[pred_bb->index] = 1;
4345 if (pre_expr_reaches_here_p_work (occr_bb, expr, pred_bb, visited))
4346 return 1;
4347 }
4348 }
4349
4350 /* All paths have been checked. */
4351 return 0;
4352 }
4353
4354 /* The wrapper for pre_expr_reaches_here_work that ensures that any
4355 memory allocated for that function is returned. */
4356
4357 static int
4358 pre_expr_reaches_here_p (basic_block occr_bb, struct expr *expr, basic_block bb)
4359 {
4360 int rval;
4361 char *visited = xcalloc (last_basic_block, 1);
4362
4363 rval = pre_expr_reaches_here_p_work (occr_bb, expr, bb, visited);
4364
4365 free (visited);
4366 return rval;
4367 }
4368 \f
4369
4370 /* Given an expr, generate RTL which we can insert at the end of a BB,
4371 or on an edge. Set the block number of any insns generated to
4372 the value of BB. */
4373
4374 static rtx
4375 process_insert_insn (struct expr *expr)
4376 {
4377 rtx reg = expr->reaching_reg;
4378 rtx exp = copy_rtx (expr->expr);
4379 rtx pat;
4380
4381 start_sequence ();
4382
4383 /* If the expression is something that's an operand, like a constant,
4384 just copy it to a register. */
4385 if (general_operand (exp, GET_MODE (reg)))
4386 emit_move_insn (reg, exp);
4387
4388 /* Otherwise, make a new insn to compute this expression and make sure the
4389 insn will be recognized (this also adds any needed CLOBBERs). Copy the
4390 expression to make sure we don't have any sharing issues. */
4391 else if (insn_invalid_p (emit_insn (gen_rtx_SET (VOIDmode, reg, exp))))
4392 abort ();
4393
4394 pat = get_insns ();
4395 end_sequence ();
4396
4397 return pat;
4398 }
4399
4400 /* Add EXPR to the end of basic block BB.
4401
4402 This is used by both the PRE and code hoisting.
4403
4404 For PRE, we want to verify that the expr is either transparent
4405 or locally anticipatable in the target block. This check makes
4406 no sense for code hoisting. */
4407
4408 static void
4409 insert_insn_end_bb (struct expr *expr, basic_block bb, int pre)
4410 {
4411 rtx insn = BB_END (bb);
4412 rtx new_insn;
4413 rtx reg = expr->reaching_reg;
4414 int regno = REGNO (reg);
4415 rtx pat, pat_end;
4416
4417 pat = process_insert_insn (expr);
4418 if (pat == NULL_RTX || ! INSN_P (pat))
4419 abort ();
4420
4421 pat_end = pat;
4422 while (NEXT_INSN (pat_end) != NULL_RTX)
4423 pat_end = NEXT_INSN (pat_end);
4424
4425 /* If the last insn is a jump, insert EXPR in front [taking care to
4426 handle cc0, etc. properly]. Similarly we need to care trapping
4427 instructions in presence of non-call exceptions. */
4428
4429 if (JUMP_P (insn)
4430 || (GET_CODE (insn) == INSN
4431 && (bb->succ->succ_next || (bb->succ->flags & EDGE_ABNORMAL))))
4432 {
4433 #ifdef HAVE_cc0
4434 rtx note;
4435 #endif
4436 /* It should always be the case that we can put these instructions
4437 anywhere in the basic block with performing PRE optimizations.
4438 Check this. */
4439 if (GET_CODE (insn) == INSN && pre
4440 && !TEST_BIT (antloc[bb->index], expr->bitmap_index)
4441 && !TEST_BIT (transp[bb->index], expr->bitmap_index))
4442 abort ();
4443
4444 /* If this is a jump table, then we can't insert stuff here. Since
4445 we know the previous real insn must be the tablejump, we insert
4446 the new instruction just before the tablejump. */
4447 if (GET_CODE (PATTERN (insn)) == ADDR_VEC
4448 || GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
4449 insn = prev_real_insn (insn);
4450
4451 #ifdef HAVE_cc0
4452 /* FIXME: 'twould be nice to call prev_cc0_setter here but it aborts
4453 if cc0 isn't set. */
4454 note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
4455 if (note)
4456 insn = XEXP (note, 0);
4457 else
4458 {
4459 rtx maybe_cc0_setter = prev_nonnote_insn (insn);
4460 if (maybe_cc0_setter
4461 && INSN_P (maybe_cc0_setter)
4462 && sets_cc0_p (PATTERN (maybe_cc0_setter)))
4463 insn = maybe_cc0_setter;
4464 }
4465 #endif
4466 /* FIXME: What if something in cc0/jump uses value set in new insn? */
4467 new_insn = emit_insn_before (pat, insn);
4468 }
4469
4470 /* Likewise if the last insn is a call, as will happen in the presence
4471 of exception handling. */
4472 else if (CALL_P (insn)
4473 && (bb->succ->succ_next || (bb->succ->flags & EDGE_ABNORMAL)))
4474 {
4475 /* Keeping in mind SMALL_REGISTER_CLASSES and parameters in registers,
4476 we search backward and place the instructions before the first
4477 parameter is loaded. Do this for everyone for consistency and a
4478 presumption that we'll get better code elsewhere as well.
4479
4480 It should always be the case that we can put these instructions
4481 anywhere in the basic block with performing PRE optimizations.
4482 Check this. */
4483
4484 if (pre
4485 && !TEST_BIT (antloc[bb->index], expr->bitmap_index)
4486 && !TEST_BIT (transp[bb->index], expr->bitmap_index))
4487 abort ();
4488
4489 /* Since different machines initialize their parameter registers
4490 in different orders, assume nothing. Collect the set of all
4491 parameter registers. */
4492 insn = find_first_parameter_load (insn, BB_HEAD (bb));
4493
4494 /* If we found all the parameter loads, then we want to insert
4495 before the first parameter load.
4496
4497 If we did not find all the parameter loads, then we might have
4498 stopped on the head of the block, which could be a CODE_LABEL.
4499 If we inserted before the CODE_LABEL, then we would be putting
4500 the insn in the wrong basic block. In that case, put the insn
4501 after the CODE_LABEL. Also, respect NOTE_INSN_BASIC_BLOCK. */
4502 while (LABEL_P (insn)
4503 || NOTE_INSN_BASIC_BLOCK_P (insn))
4504 insn = NEXT_INSN (insn);
4505
4506 new_insn = emit_insn_before (pat, insn);
4507 }
4508 else
4509 new_insn = emit_insn_after (pat, insn);
4510
4511 while (1)
4512 {
4513 if (INSN_P (pat))
4514 {
4515 add_label_notes (PATTERN (pat), new_insn);
4516 note_stores (PATTERN (pat), record_set_info, pat);
4517 }
4518 if (pat == pat_end)
4519 break;
4520 pat = NEXT_INSN (pat);
4521 }
4522
4523 gcse_create_count++;
4524
4525 if (gcse_file)
4526 {
4527 fprintf (gcse_file, "PRE/HOIST: end of bb %d, insn %d, ",
4528 bb->index, INSN_UID (new_insn));
4529 fprintf (gcse_file, "copying expression %d to reg %d\n",
4530 expr->bitmap_index, regno);
4531 }
4532 }
4533
4534 /* Insert partially redundant expressions on edges in the CFG to make
4535 the expressions fully redundant. */
4536
4537 static int
4538 pre_edge_insert (struct edge_list *edge_list, struct expr **index_map)
4539 {
4540 int e, i, j, num_edges, set_size, did_insert = 0;
4541 sbitmap *inserted;
4542
4543 /* Where PRE_INSERT_MAP is nonzero, we add the expression on that edge
4544 if it reaches any of the deleted expressions. */
4545
4546 set_size = pre_insert_map[0]->size;
4547 num_edges = NUM_EDGES (edge_list);
4548 inserted = sbitmap_vector_alloc (num_edges, expr_hash_table.n_elems);
4549 sbitmap_vector_zero (inserted, num_edges);
4550
4551 for (e = 0; e < num_edges; e++)
4552 {
4553 int indx;
4554 basic_block bb = INDEX_EDGE_PRED_BB (edge_list, e);
4555
4556 for (i = indx = 0; i < set_size; i++, indx += SBITMAP_ELT_BITS)
4557 {
4558 SBITMAP_ELT_TYPE insert = pre_insert_map[e]->elms[i];
4559
4560 for (j = indx; insert && j < (int) expr_hash_table.n_elems; j++, insert >>= 1)
4561 if ((insert & 1) != 0 && index_map[j]->reaching_reg != NULL_RTX)
4562 {
4563 struct expr *expr = index_map[j];
4564 struct occr *occr;
4565
4566 /* Now look at each deleted occurrence of this expression. */
4567 for (occr = expr->antic_occr; occr != NULL; occr = occr->next)
4568 {
4569 if (! occr->deleted_p)
4570 continue;
4571
4572 /* Insert this expression on this edge if if it would
4573 reach the deleted occurrence in BB. */
4574 if (!TEST_BIT (inserted[e], j))
4575 {
4576 rtx insn;
4577 edge eg = INDEX_EDGE (edge_list, e);
4578
4579 /* We can't insert anything on an abnormal and
4580 critical edge, so we insert the insn at the end of
4581 the previous block. There are several alternatives
4582 detailed in Morgans book P277 (sec 10.5) for
4583 handling this situation. This one is easiest for
4584 now. */
4585
4586 if ((eg->flags & EDGE_ABNORMAL) == EDGE_ABNORMAL)
4587 insert_insn_end_bb (index_map[j], bb, 0);
4588 else
4589 {
4590 insn = process_insert_insn (index_map[j]);
4591 insert_insn_on_edge (insn, eg);
4592 }
4593
4594 if (gcse_file)
4595 {
4596 fprintf (gcse_file, "PRE/HOIST: edge (%d,%d), ",
4597 bb->index,
4598 INDEX_EDGE_SUCC_BB (edge_list, e)->index);
4599 fprintf (gcse_file, "copy expression %d\n",
4600 expr->bitmap_index);
4601 }
4602
4603 update_ld_motion_stores (expr);
4604 SET_BIT (inserted[e], j);
4605 did_insert = 1;
4606 gcse_create_count++;
4607 }
4608 }
4609 }
4610 }
4611 }
4612
4613 sbitmap_vector_free (inserted);
4614 return did_insert;
4615 }
4616
4617 /* Copy the result of EXPR->EXPR generated by INSN to EXPR->REACHING_REG.
4618 Given "old_reg <- expr" (INSN), instead of adding after it
4619 reaching_reg <- old_reg
4620 it's better to do the following:
4621 reaching_reg <- expr
4622 old_reg <- reaching_reg
4623 because this way copy propagation can discover additional PRE
4624 opportunities. But if this fails, we try the old way.
4625 When "expr" is a store, i.e.
4626 given "MEM <- old_reg", instead of adding after it
4627 reaching_reg <- old_reg
4628 it's better to add it before as follows:
4629 reaching_reg <- old_reg
4630 MEM <- reaching_reg. */
4631
4632 static void
4633 pre_insert_copy_insn (struct expr *expr, rtx insn)
4634 {
4635 rtx reg = expr->reaching_reg;
4636 int regno = REGNO (reg);
4637 int indx = expr->bitmap_index;
4638 rtx pat = PATTERN (insn);
4639 rtx set, new_insn;
4640 rtx old_reg;
4641 int i;
4642
4643 /* This block matches the logic in hash_scan_insn. */
4644 if (GET_CODE (pat) == SET)
4645 set = pat;
4646 else if (GET_CODE (pat) == PARALLEL)
4647 {
4648 /* Search through the parallel looking for the set whose
4649 source was the expression that we're interested in. */
4650 set = NULL_RTX;
4651 for (i = 0; i < XVECLEN (pat, 0); i++)
4652 {
4653 rtx x = XVECEXP (pat, 0, i);
4654 if (GET_CODE (x) == SET
4655 && expr_equiv_p (SET_SRC (x), expr->expr))
4656 {
4657 set = x;
4658 break;
4659 }
4660 }
4661 }
4662 else
4663 abort ();
4664
4665 if (REG_P (SET_DEST (set)))
4666 {
4667 old_reg = SET_DEST (set);
4668 /* Check if we can modify the set destination in the original insn. */
4669 if (validate_change (insn, &SET_DEST (set), reg, 0))
4670 {
4671 new_insn = gen_move_insn (old_reg, reg);
4672 new_insn = emit_insn_after (new_insn, insn);
4673
4674 /* Keep register set table up to date. */
4675 replace_one_set (REGNO (old_reg), insn, new_insn);
4676 record_one_set (regno, insn);
4677 }
4678 else
4679 {
4680 new_insn = gen_move_insn (reg, old_reg);
4681 new_insn = emit_insn_after (new_insn, insn);
4682
4683 /* Keep register set table up to date. */
4684 record_one_set (regno, new_insn);
4685 }
4686 }
4687 else /* This is possible only in case of a store to memory. */
4688 {
4689 old_reg = SET_SRC (set);
4690 new_insn = gen_move_insn (reg, old_reg);
4691
4692 /* Check if we can modify the set source in the original insn. */
4693 if (validate_change (insn, &SET_SRC (set), reg, 0))
4694 new_insn = emit_insn_before (new_insn, insn);
4695 else
4696 new_insn = emit_insn_after (new_insn, insn);
4697
4698 /* Keep register set table up to date. */
4699 record_one_set (regno, new_insn);
4700 }
4701
4702 gcse_create_count++;
4703
4704 if (gcse_file)
4705 fprintf (gcse_file,
4706 "PRE: bb %d, insn %d, copy expression %d in insn %d to reg %d\n",
4707 BLOCK_NUM (insn), INSN_UID (new_insn), indx,
4708 INSN_UID (insn), regno);
4709 }
4710
4711 /* Copy available expressions that reach the redundant expression
4712 to `reaching_reg'. */
4713
4714 static void
4715 pre_insert_copies (void)
4716 {
4717 unsigned int i, added_copy;
4718 struct expr *expr;
4719 struct occr *occr;
4720 struct occr *avail;
4721
4722 /* For each available expression in the table, copy the result to
4723 `reaching_reg' if the expression reaches a deleted one.
4724
4725 ??? The current algorithm is rather brute force.
4726 Need to do some profiling. */
4727
4728 for (i = 0; i < expr_hash_table.size; i++)
4729 for (expr = expr_hash_table.table[i]; expr != NULL; expr = expr->next_same_hash)
4730 {
4731 /* If the basic block isn't reachable, PPOUT will be TRUE. However,
4732 we don't want to insert a copy here because the expression may not
4733 really be redundant. So only insert an insn if the expression was
4734 deleted. This test also avoids further processing if the
4735 expression wasn't deleted anywhere. */
4736 if (expr->reaching_reg == NULL)
4737 continue;
4738
4739 /* Set when we add a copy for that expression. */
4740 added_copy = 0;
4741
4742 for (occr = expr->antic_occr; occr != NULL; occr = occr->next)
4743 {
4744 if (! occr->deleted_p)
4745 continue;
4746
4747 for (avail = expr->avail_occr; avail != NULL; avail = avail->next)
4748 {
4749 rtx insn = avail->insn;
4750
4751 /* No need to handle this one if handled already. */
4752 if (avail->copied_p)
4753 continue;
4754
4755 /* Don't handle this one if it's a redundant one. */
4756 if (TEST_BIT (pre_redundant_insns, INSN_CUID (insn)))
4757 continue;
4758
4759 /* Or if the expression doesn't reach the deleted one. */
4760 if (! pre_expr_reaches_here_p (BLOCK_FOR_INSN (avail->insn),
4761 expr,
4762 BLOCK_FOR_INSN (occr->insn)))
4763 continue;
4764
4765 added_copy = 1;
4766
4767 /* Copy the result of avail to reaching_reg. */
4768 pre_insert_copy_insn (expr, insn);
4769 avail->copied_p = 1;
4770 }
4771 }
4772
4773 if (added_copy)
4774 update_ld_motion_stores (expr);
4775 }
4776 }
4777
4778 /* Emit move from SRC to DEST noting the equivalence with expression computed
4779 in INSN. */
4780 static rtx
4781 gcse_emit_move_after (rtx src, rtx dest, rtx insn)
4782 {
4783 rtx new;
4784 rtx set = single_set (insn), set2;
4785 rtx note;
4786 rtx eqv;
4787
4788 /* This should never fail since we're creating a reg->reg copy
4789 we've verified to be valid. */
4790
4791 new = emit_insn_after (gen_move_insn (dest, src), insn);
4792
4793 /* Note the equivalence for local CSE pass. */
4794 set2 = single_set (new);
4795 if (!set2 || !rtx_equal_p (SET_DEST (set2), dest))
4796 return new;
4797 if ((note = find_reg_equal_equiv_note (insn)))
4798 eqv = XEXP (note, 0);
4799 else
4800 eqv = SET_SRC (set);
4801
4802 set_unique_reg_note (new, REG_EQUAL, copy_insn_1 (eqv));
4803
4804 return new;
4805 }
4806
4807 /* Delete redundant computations.
4808 Deletion is done by changing the insn to copy the `reaching_reg' of
4809 the expression into the result of the SET. It is left to later passes
4810 (cprop, cse2, flow, combine, regmove) to propagate the copy or eliminate it.
4811
4812 Returns nonzero if a change is made. */
4813
4814 static int
4815 pre_delete (void)
4816 {
4817 unsigned int i;
4818 int changed;
4819 struct expr *expr;
4820 struct occr *occr;
4821
4822 changed = 0;
4823 for (i = 0; i < expr_hash_table.size; i++)
4824 for (expr = expr_hash_table.table[i];
4825 expr != NULL;
4826 expr = expr->next_same_hash)
4827 {
4828 int indx = expr->bitmap_index;
4829
4830 /* We only need to search antic_occr since we require
4831 ANTLOC != 0. */
4832
4833 for (occr = expr->antic_occr; occr != NULL; occr = occr->next)
4834 {
4835 rtx insn = occr->insn;
4836 rtx set;
4837 basic_block bb = BLOCK_FOR_INSN (insn);
4838
4839 /* We only delete insns that have a single_set. */
4840 if (TEST_BIT (pre_delete_map[bb->index], indx)
4841 && (set = single_set (insn)) != 0)
4842 {
4843 /* Create a pseudo-reg to store the result of reaching
4844 expressions into. Get the mode for the new pseudo from
4845 the mode of the original destination pseudo. */
4846 if (expr->reaching_reg == NULL)
4847 expr->reaching_reg
4848 = gen_reg_rtx (GET_MODE (SET_DEST (set)));
4849
4850 gcse_emit_move_after (expr->reaching_reg, SET_DEST (set), insn);
4851 delete_insn (insn);
4852 occr->deleted_p = 1;
4853 SET_BIT (pre_redundant_insns, INSN_CUID (insn));
4854 changed = 1;
4855 gcse_subst_count++;
4856
4857 if (gcse_file)
4858 {
4859 fprintf (gcse_file,
4860 "PRE: redundant insn %d (expression %d) in ",
4861 INSN_UID (insn), indx);
4862 fprintf (gcse_file, "bb %d, reaching reg is %d\n",
4863 bb->index, REGNO (expr->reaching_reg));
4864 }
4865 }
4866 }
4867 }
4868
4869 return changed;
4870 }
4871
4872 /* Perform GCSE optimizations using PRE.
4873 This is called by one_pre_gcse_pass after all the dataflow analysis
4874 has been done.
4875
4876 This is based on the original Morel-Renvoise paper Fred Chow's thesis, and
4877 lazy code motion from Knoop, Ruthing and Steffen as described in Advanced
4878 Compiler Design and Implementation.
4879
4880 ??? A new pseudo reg is created to hold the reaching expression. The nice
4881 thing about the classical approach is that it would try to use an existing
4882 reg. If the register can't be adequately optimized [i.e. we introduce
4883 reload problems], one could add a pass here to propagate the new register
4884 through the block.
4885
4886 ??? We don't handle single sets in PARALLELs because we're [currently] not
4887 able to copy the rest of the parallel when we insert copies to create full
4888 redundancies from partial redundancies. However, there's no reason why we
4889 can't handle PARALLELs in the cases where there are no partial
4890 redundancies. */
4891
4892 static int
4893 pre_gcse (void)
4894 {
4895 unsigned int i;
4896 int did_insert, changed;
4897 struct expr **index_map;
4898 struct expr *expr;
4899
4900 /* Compute a mapping from expression number (`bitmap_index') to
4901 hash table entry. */
4902
4903 index_map = xcalloc (expr_hash_table.n_elems, sizeof (struct expr *));
4904 for (i = 0; i < expr_hash_table.size; i++)
4905 for (expr = expr_hash_table.table[i]; expr != NULL; expr = expr->next_same_hash)
4906 index_map[expr->bitmap_index] = expr;
4907
4908 /* Reset bitmap used to track which insns are redundant. */
4909 pre_redundant_insns = sbitmap_alloc (max_cuid);
4910 sbitmap_zero (pre_redundant_insns);
4911
4912 /* Delete the redundant insns first so that
4913 - we know what register to use for the new insns and for the other
4914 ones with reaching expressions
4915 - we know which insns are redundant when we go to create copies */
4916
4917 changed = pre_delete ();
4918
4919 did_insert = pre_edge_insert (edge_list, index_map);
4920
4921 /* In other places with reaching expressions, copy the expression to the
4922 specially allocated pseudo-reg that reaches the redundant expr. */
4923 pre_insert_copies ();
4924 if (did_insert)
4925 {
4926 commit_edge_insertions ();
4927 changed = 1;
4928 }
4929
4930 free (index_map);
4931 sbitmap_free (pre_redundant_insns);
4932 return changed;
4933 }
4934
4935 /* Top level routine to perform one PRE GCSE pass.
4936
4937 Return nonzero if a change was made. */
4938
4939 static int
4940 one_pre_gcse_pass (int pass)
4941 {
4942 int changed = 0;
4943
4944 gcse_subst_count = 0;
4945 gcse_create_count = 0;
4946
4947 alloc_hash_table (max_cuid, &expr_hash_table, 0);
4948 add_noreturn_fake_exit_edges ();
4949 if (flag_gcse_lm)
4950 compute_ld_motion_mems ();
4951
4952 compute_hash_table (&expr_hash_table);
4953 trim_ld_motion_mems ();
4954 if (gcse_file)
4955 dump_hash_table (gcse_file, "Expression", &expr_hash_table);
4956
4957 if (expr_hash_table.n_elems > 0)
4958 {
4959 alloc_pre_mem (last_basic_block, expr_hash_table.n_elems);
4960 compute_pre_data ();
4961 changed |= pre_gcse ();
4962 free_edge_list (edge_list);
4963 free_pre_mem ();
4964 }
4965
4966 free_ldst_mems ();
4967 remove_fake_edges ();
4968 free_hash_table (&expr_hash_table);
4969
4970 if (gcse_file)
4971 {
4972 fprintf (gcse_file, "\nPRE GCSE of %s, pass %d: %d bytes needed, ",
4973 current_function_name (), pass, bytes_used);
4974 fprintf (gcse_file, "%d substs, %d insns created\n",
4975 gcse_subst_count, gcse_create_count);
4976 }
4977
4978 return changed;
4979 }
4980 \f
4981 /* If X contains any LABEL_REF's, add REG_LABEL notes for them to INSN.
4982 If notes are added to an insn which references a CODE_LABEL, the
4983 LABEL_NUSES count is incremented. We have to add REG_LABEL notes,
4984 because the following loop optimization pass requires them. */
4985
4986 /* ??? This is very similar to the loop.c add_label_notes function. We
4987 could probably share code here. */
4988
4989 /* ??? If there was a jump optimization pass after gcse and before loop,
4990 then we would not need to do this here, because jump would add the
4991 necessary REG_LABEL notes. */
4992
4993 static void
4994 add_label_notes (rtx x, rtx insn)
4995 {
4996 enum rtx_code code = GET_CODE (x);
4997 int i, j;
4998 const char *fmt;
4999
5000 if (code == LABEL_REF && !LABEL_REF_NONLOCAL_P (x))
5001 {
5002 /* This code used to ignore labels that referred to dispatch tables to
5003 avoid flow generating (slightly) worse code.
5004
5005 We no longer ignore such label references (see LABEL_REF handling in
5006 mark_jump_label for additional information). */
5007
5008 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_LABEL, XEXP (x, 0),
5009 REG_NOTES (insn));
5010 if (LABEL_P (XEXP (x, 0)))
5011 LABEL_NUSES (XEXP (x, 0))++;
5012 return;
5013 }
5014
5015 for (i = GET_RTX_LENGTH (code) - 1, fmt = GET_RTX_FORMAT (code); i >= 0; i--)
5016 {
5017 if (fmt[i] == 'e')
5018 add_label_notes (XEXP (x, i), insn);
5019 else if (fmt[i] == 'E')
5020 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
5021 add_label_notes (XVECEXP (x, i, j), insn);
5022 }
5023 }
5024
5025 /* Compute transparent outgoing information for each block.
5026
5027 An expression is transparent to an edge unless it is killed by
5028 the edge itself. This can only happen with abnormal control flow,
5029 when the edge is traversed through a call. This happens with
5030 non-local labels and exceptions.
5031
5032 This would not be necessary if we split the edge. While this is
5033 normally impossible for abnormal critical edges, with some effort
5034 it should be possible with exception handling, since we still have
5035 control over which handler should be invoked. But due to increased
5036 EH table sizes, this may not be worthwhile. */
5037
5038 static void
5039 compute_transpout (void)
5040 {
5041 basic_block bb;
5042 unsigned int i;
5043 struct expr *expr;
5044
5045 sbitmap_vector_ones (transpout, last_basic_block);
5046
5047 FOR_EACH_BB (bb)
5048 {
5049 /* Note that flow inserted a nop a the end of basic blocks that
5050 end in call instructions for reasons other than abnormal
5051 control flow. */
5052 if (! CALL_P (BB_END (bb)))
5053 continue;
5054
5055 for (i = 0; i < expr_hash_table.size; i++)
5056 for (expr = expr_hash_table.table[i]; expr ; expr = expr->next_same_hash)
5057 if (MEM_P (expr->expr))
5058 {
5059 if (GET_CODE (XEXP (expr->expr, 0)) == SYMBOL_REF
5060 && CONSTANT_POOL_ADDRESS_P (XEXP (expr->expr, 0)))
5061 continue;
5062
5063 /* ??? Optimally, we would use interprocedural alias
5064 analysis to determine if this mem is actually killed
5065 by this call. */
5066 RESET_BIT (transpout[bb->index], expr->bitmap_index);
5067 }
5068 }
5069 }
5070
5071 /* Code Hoisting variables and subroutines. */
5072
5073 /* Very busy expressions. */
5074 static sbitmap *hoist_vbein;
5075 static sbitmap *hoist_vbeout;
5076
5077 /* Hoistable expressions. */
5078 static sbitmap *hoist_exprs;
5079
5080 /* ??? We could compute post dominators and run this algorithm in
5081 reverse to perform tail merging, doing so would probably be
5082 more effective than the tail merging code in jump.c.
5083
5084 It's unclear if tail merging could be run in parallel with
5085 code hoisting. It would be nice. */
5086
5087 /* Allocate vars used for code hoisting analysis. */
5088
5089 static void
5090 alloc_code_hoist_mem (int n_blocks, int n_exprs)
5091 {
5092 antloc = sbitmap_vector_alloc (n_blocks, n_exprs);
5093 transp = sbitmap_vector_alloc (n_blocks, n_exprs);
5094 comp = sbitmap_vector_alloc (n_blocks, n_exprs);
5095
5096 hoist_vbein = sbitmap_vector_alloc (n_blocks, n_exprs);
5097 hoist_vbeout = sbitmap_vector_alloc (n_blocks, n_exprs);
5098 hoist_exprs = sbitmap_vector_alloc (n_blocks, n_exprs);
5099 transpout = sbitmap_vector_alloc (n_blocks, n_exprs);
5100 }
5101
5102 /* Free vars used for code hoisting analysis. */
5103
5104 static void
5105 free_code_hoist_mem (void)
5106 {
5107 sbitmap_vector_free (antloc);
5108 sbitmap_vector_free (transp);
5109 sbitmap_vector_free (comp);
5110
5111 sbitmap_vector_free (hoist_vbein);
5112 sbitmap_vector_free (hoist_vbeout);
5113 sbitmap_vector_free (hoist_exprs);
5114 sbitmap_vector_free (transpout);
5115
5116 free_dominance_info (CDI_DOMINATORS);
5117 }
5118
5119 /* Compute the very busy expressions at entry/exit from each block.
5120
5121 An expression is very busy if all paths from a given point
5122 compute the expression. */
5123
5124 static void
5125 compute_code_hoist_vbeinout (void)
5126 {
5127 int changed, passes;
5128 basic_block bb;
5129
5130 sbitmap_vector_zero (hoist_vbeout, last_basic_block);
5131 sbitmap_vector_zero (hoist_vbein, last_basic_block);
5132
5133 passes = 0;
5134 changed = 1;
5135
5136 while (changed)
5137 {
5138 changed = 0;
5139
5140 /* We scan the blocks in the reverse order to speed up
5141 the convergence. */
5142 FOR_EACH_BB_REVERSE (bb)
5143 {
5144 changed |= sbitmap_a_or_b_and_c_cg (hoist_vbein[bb->index], antloc[bb->index],
5145 hoist_vbeout[bb->index], transp[bb->index]);
5146 if (bb->next_bb != EXIT_BLOCK_PTR)
5147 sbitmap_intersection_of_succs (hoist_vbeout[bb->index], hoist_vbein, bb->index);
5148 }
5149
5150 passes++;
5151 }
5152
5153 if (gcse_file)
5154 fprintf (gcse_file, "hoisting vbeinout computation: %d passes\n", passes);
5155 }
5156
5157 /* Top level routine to do the dataflow analysis needed by code hoisting. */
5158
5159 static void
5160 compute_code_hoist_data (void)
5161 {
5162 compute_local_properties (transp, comp, antloc, &expr_hash_table);
5163 compute_transpout ();
5164 compute_code_hoist_vbeinout ();
5165 calculate_dominance_info (CDI_DOMINATORS);
5166 if (gcse_file)
5167 fprintf (gcse_file, "\n");
5168 }
5169
5170 /* Determine if the expression identified by EXPR_INDEX would
5171 reach BB unimpared if it was placed at the end of EXPR_BB.
5172
5173 It's unclear exactly what Muchnick meant by "unimpared". It seems
5174 to me that the expression must either be computed or transparent in
5175 *every* block in the path(s) from EXPR_BB to BB. Any other definition
5176 would allow the expression to be hoisted out of loops, even if
5177 the expression wasn't a loop invariant.
5178
5179 Contrast this to reachability for PRE where an expression is
5180 considered reachable if *any* path reaches instead of *all*
5181 paths. */
5182
5183 static int
5184 hoist_expr_reaches_here_p (basic_block expr_bb, int expr_index, basic_block bb, char *visited)
5185 {
5186 edge pred;
5187 int visited_allocated_locally = 0;
5188
5189
5190 if (visited == NULL)
5191 {
5192 visited_allocated_locally = 1;
5193 visited = xcalloc (last_basic_block, 1);
5194 }
5195
5196 for (pred = bb->pred; pred != NULL; pred = pred->pred_next)
5197 {
5198 basic_block pred_bb = pred->src;
5199
5200 if (pred->src == ENTRY_BLOCK_PTR)
5201 break;
5202 else if (pred_bb == expr_bb)
5203 continue;
5204 else if (visited[pred_bb->index])
5205 continue;
5206
5207 /* Does this predecessor generate this expression? */
5208 else if (TEST_BIT (comp[pred_bb->index], expr_index))
5209 break;
5210 else if (! TEST_BIT (transp[pred_bb->index], expr_index))
5211 break;
5212
5213 /* Not killed. */
5214 else
5215 {
5216 visited[pred_bb->index] = 1;
5217 if (! hoist_expr_reaches_here_p (expr_bb, expr_index,
5218 pred_bb, visited))
5219 break;
5220 }
5221 }
5222 if (visited_allocated_locally)
5223 free (visited);
5224
5225 return (pred == NULL);
5226 }
5227 \f
5228 /* Actually perform code hoisting. */
5229
5230 static void
5231 hoist_code (void)
5232 {
5233 basic_block bb, dominated;
5234 basic_block *domby;
5235 unsigned int domby_len;
5236 unsigned int i,j;
5237 struct expr **index_map;
5238 struct expr *expr;
5239
5240 sbitmap_vector_zero (hoist_exprs, last_basic_block);
5241
5242 /* Compute a mapping from expression number (`bitmap_index') to
5243 hash table entry. */
5244
5245 index_map = xcalloc (expr_hash_table.n_elems, sizeof (struct expr *));
5246 for (i = 0; i < expr_hash_table.size; i++)
5247 for (expr = expr_hash_table.table[i]; expr != NULL; expr = expr->next_same_hash)
5248 index_map[expr->bitmap_index] = expr;
5249
5250 /* Walk over each basic block looking for potentially hoistable
5251 expressions, nothing gets hoisted from the entry block. */
5252 FOR_EACH_BB (bb)
5253 {
5254 int found = 0;
5255 int insn_inserted_p;
5256
5257 domby_len = get_dominated_by (CDI_DOMINATORS, bb, &domby);
5258 /* Examine each expression that is very busy at the exit of this
5259 block. These are the potentially hoistable expressions. */
5260 for (i = 0; i < hoist_vbeout[bb->index]->n_bits; i++)
5261 {
5262 int hoistable = 0;
5263
5264 if (TEST_BIT (hoist_vbeout[bb->index], i)
5265 && TEST_BIT (transpout[bb->index], i))
5266 {
5267 /* We've found a potentially hoistable expression, now
5268 we look at every block BB dominates to see if it
5269 computes the expression. */
5270 for (j = 0; j < domby_len; j++)
5271 {
5272 dominated = domby[j];
5273 /* Ignore self dominance. */
5274 if (bb == dominated)
5275 continue;
5276 /* We've found a dominated block, now see if it computes
5277 the busy expression and whether or not moving that
5278 expression to the "beginning" of that block is safe. */
5279 if (!TEST_BIT (antloc[dominated->index], i))
5280 continue;
5281
5282 /* Note if the expression would reach the dominated block
5283 unimpared if it was placed at the end of BB.
5284
5285 Keep track of how many times this expression is hoistable
5286 from a dominated block into BB. */
5287 if (hoist_expr_reaches_here_p (bb, i, dominated, NULL))
5288 hoistable++;
5289 }
5290
5291 /* If we found more than one hoistable occurrence of this
5292 expression, then note it in the bitmap of expressions to
5293 hoist. It makes no sense to hoist things which are computed
5294 in only one BB, and doing so tends to pessimize register
5295 allocation. One could increase this value to try harder
5296 to avoid any possible code expansion due to register
5297 allocation issues; however experiments have shown that
5298 the vast majority of hoistable expressions are only movable
5299 from two successors, so raising this threshold is likely
5300 to nullify any benefit we get from code hoisting. */
5301 if (hoistable > 1)
5302 {
5303 SET_BIT (hoist_exprs[bb->index], i);
5304 found = 1;
5305 }
5306 }
5307 }
5308 /* If we found nothing to hoist, then quit now. */
5309 if (! found)
5310 {
5311 free (domby);
5312 continue;
5313 }
5314
5315 /* Loop over all the hoistable expressions. */
5316 for (i = 0; i < hoist_exprs[bb->index]->n_bits; i++)
5317 {
5318 /* We want to insert the expression into BB only once, so
5319 note when we've inserted it. */
5320 insn_inserted_p = 0;
5321
5322 /* These tests should be the same as the tests above. */
5323 if (TEST_BIT (hoist_vbeout[bb->index], i))
5324 {
5325 /* We've found a potentially hoistable expression, now
5326 we look at every block BB dominates to see if it
5327 computes the expression. */
5328 for (j = 0; j < domby_len; j++)
5329 {
5330 dominated = domby[j];
5331 /* Ignore self dominance. */
5332 if (bb == dominated)
5333 continue;
5334
5335 /* We've found a dominated block, now see if it computes
5336 the busy expression and whether or not moving that
5337 expression to the "beginning" of that block is safe. */
5338 if (!TEST_BIT (antloc[dominated->index], i))
5339 continue;
5340
5341 /* The expression is computed in the dominated block and
5342 it would be safe to compute it at the start of the
5343 dominated block. Now we have to determine if the
5344 expression would reach the dominated block if it was
5345 placed at the end of BB. */
5346 if (hoist_expr_reaches_here_p (bb, i, dominated, NULL))
5347 {
5348 struct expr *expr = index_map[i];
5349 struct occr *occr = expr->antic_occr;
5350 rtx insn;
5351 rtx set;
5352
5353 /* Find the right occurrence of this expression. */
5354 while (BLOCK_FOR_INSN (occr->insn) != dominated && occr)
5355 occr = occr->next;
5356
5357 /* Should never happen. */
5358 if (!occr)
5359 abort ();
5360
5361 insn = occr->insn;
5362
5363 set = single_set (insn);
5364 if (! set)
5365 abort ();
5366
5367 /* Create a pseudo-reg to store the result of reaching
5368 expressions into. Get the mode for the new pseudo
5369 from the mode of the original destination pseudo. */
5370 if (expr->reaching_reg == NULL)
5371 expr->reaching_reg
5372 = gen_reg_rtx (GET_MODE (SET_DEST (set)));
5373
5374 gcse_emit_move_after (expr->reaching_reg, SET_DEST (set), insn);
5375 delete_insn (insn);
5376 occr->deleted_p = 1;
5377 if (!insn_inserted_p)
5378 {
5379 insert_insn_end_bb (index_map[i], bb, 0);
5380 insn_inserted_p = 1;
5381 }
5382 }
5383 }
5384 }
5385 }
5386 free (domby);
5387 }
5388
5389 free (index_map);
5390 }
5391
5392 /* Top level routine to perform one code hoisting (aka unification) pass
5393
5394 Return nonzero if a change was made. */
5395
5396 static int
5397 one_code_hoisting_pass (void)
5398 {
5399 int changed = 0;
5400
5401 alloc_hash_table (max_cuid, &expr_hash_table, 0);
5402 compute_hash_table (&expr_hash_table);
5403 if (gcse_file)
5404 dump_hash_table (gcse_file, "Code Hosting Expressions", &expr_hash_table);
5405
5406 if (expr_hash_table.n_elems > 0)
5407 {
5408 alloc_code_hoist_mem (last_basic_block, expr_hash_table.n_elems);
5409 compute_code_hoist_data ();
5410 hoist_code ();
5411 free_code_hoist_mem ();
5412 }
5413
5414 free_hash_table (&expr_hash_table);
5415
5416 return changed;
5417 }
5418 \f
5419 /* Here we provide the things required to do store motion towards
5420 the exit. In order for this to be effective, gcse also needed to
5421 be taught how to move a load when it is kill only by a store to itself.
5422
5423 int i;
5424 float a[10];
5425
5426 void foo(float scale)
5427 {
5428 for (i=0; i<10; i++)
5429 a[i] *= scale;
5430 }
5431
5432 'i' is both loaded and stored to in the loop. Normally, gcse cannot move
5433 the load out since its live around the loop, and stored at the bottom
5434 of the loop.
5435
5436 The 'Load Motion' referred to and implemented in this file is
5437 an enhancement to gcse which when using edge based lcm, recognizes
5438 this situation and allows gcse to move the load out of the loop.
5439
5440 Once gcse has hoisted the load, store motion can then push this
5441 load towards the exit, and we end up with no loads or stores of 'i'
5442 in the loop. */
5443
5444 /* This will search the ldst list for a matching expression. If it
5445 doesn't find one, we create one and initialize it. */
5446
5447 static struct ls_expr *
5448 ldst_entry (rtx x)
5449 {
5450 int do_not_record_p = 0;
5451 struct ls_expr * ptr;
5452 unsigned int hash;
5453
5454 hash = hash_expr_1 (x, GET_MODE (x), & do_not_record_p);
5455
5456 for (ptr = pre_ldst_mems; ptr != NULL; ptr = ptr->next)
5457 if (ptr->hash_index == hash && expr_equiv_p (ptr->pattern, x))
5458 return ptr;
5459
5460 ptr = xmalloc (sizeof (struct ls_expr));
5461
5462 ptr->next = pre_ldst_mems;
5463 ptr->expr = NULL;
5464 ptr->pattern = x;
5465 ptr->pattern_regs = NULL_RTX;
5466 ptr->loads = NULL_RTX;
5467 ptr->stores = NULL_RTX;
5468 ptr->reaching_reg = NULL_RTX;
5469 ptr->invalid = 0;
5470 ptr->index = 0;
5471 ptr->hash_index = hash;
5472 pre_ldst_mems = ptr;
5473
5474 return ptr;
5475 }
5476
5477 /* Free up an individual ldst entry. */
5478
5479 static void
5480 free_ldst_entry (struct ls_expr * ptr)
5481 {
5482 free_INSN_LIST_list (& ptr->loads);
5483 free_INSN_LIST_list (& ptr->stores);
5484
5485 free (ptr);
5486 }
5487
5488 /* Free up all memory associated with the ldst list. */
5489
5490 static void
5491 free_ldst_mems (void)
5492 {
5493 while (pre_ldst_mems)
5494 {
5495 struct ls_expr * tmp = pre_ldst_mems;
5496
5497 pre_ldst_mems = pre_ldst_mems->next;
5498
5499 free_ldst_entry (tmp);
5500 }
5501
5502 pre_ldst_mems = NULL;
5503 }
5504
5505 /* Dump debugging info about the ldst list. */
5506
5507 static void
5508 print_ldst_list (FILE * file)
5509 {
5510 struct ls_expr * ptr;
5511
5512 fprintf (file, "LDST list: \n");
5513
5514 for (ptr = first_ls_expr(); ptr != NULL; ptr = next_ls_expr (ptr))
5515 {
5516 fprintf (file, " Pattern (%3d): ", ptr->index);
5517
5518 print_rtl (file, ptr->pattern);
5519
5520 fprintf (file, "\n Loads : ");
5521
5522 if (ptr->loads)
5523 print_rtl (file, ptr->loads);
5524 else
5525 fprintf (file, "(nil)");
5526
5527 fprintf (file, "\n Stores : ");
5528
5529 if (ptr->stores)
5530 print_rtl (file, ptr->stores);
5531 else
5532 fprintf (file, "(nil)");
5533
5534 fprintf (file, "\n\n");
5535 }
5536
5537 fprintf (file, "\n");
5538 }
5539
5540 /* Returns 1 if X is in the list of ldst only expressions. */
5541
5542 static struct ls_expr *
5543 find_rtx_in_ldst (rtx x)
5544 {
5545 struct ls_expr * ptr;
5546
5547 for (ptr = pre_ldst_mems; ptr != NULL; ptr = ptr->next)
5548 if (expr_equiv_p (ptr->pattern, x) && ! ptr->invalid)
5549 return ptr;
5550
5551 return NULL;
5552 }
5553
5554 /* Assign each element of the list of mems a monotonically increasing value. */
5555
5556 static int
5557 enumerate_ldsts (void)
5558 {
5559 struct ls_expr * ptr;
5560 int n = 0;
5561
5562 for (ptr = pre_ldst_mems; ptr != NULL; ptr = ptr->next)
5563 ptr->index = n++;
5564
5565 return n;
5566 }
5567
5568 /* Return first item in the list. */
5569
5570 static inline struct ls_expr *
5571 first_ls_expr (void)
5572 {
5573 return pre_ldst_mems;
5574 }
5575
5576 /* Return the next item in the list after the specified one. */
5577
5578 static inline struct ls_expr *
5579 next_ls_expr (struct ls_expr * ptr)
5580 {
5581 return ptr->next;
5582 }
5583 \f
5584 /* Load Motion for loads which only kill themselves. */
5585
5586 /* Return true if x is a simple MEM operation, with no registers or
5587 side effects. These are the types of loads we consider for the
5588 ld_motion list, otherwise we let the usual aliasing take care of it. */
5589
5590 static int
5591 simple_mem (rtx x)
5592 {
5593 if (! MEM_P (x))
5594 return 0;
5595
5596 if (MEM_VOLATILE_P (x))
5597 return 0;
5598
5599 if (GET_MODE (x) == BLKmode)
5600 return 0;
5601
5602 /* If we are handling exceptions, we must be careful with memory references
5603 that may trap. If we are not, the behavior is undefined, so we may just
5604 continue. */
5605 if (flag_non_call_exceptions && may_trap_p (x))
5606 return 0;
5607
5608 if (side_effects_p (x))
5609 return 0;
5610
5611 /* Do not consider function arguments passed on stack. */
5612 if (reg_mentioned_p (stack_pointer_rtx, x))
5613 return 0;
5614
5615 if (flag_float_store && FLOAT_MODE_P (GET_MODE (x)))
5616 return 0;
5617
5618 return 1;
5619 }
5620
5621 /* Make sure there isn't a buried reference in this pattern anywhere.
5622 If there is, invalidate the entry for it since we're not capable
5623 of fixing it up just yet.. We have to be sure we know about ALL
5624 loads since the aliasing code will allow all entries in the
5625 ld_motion list to not-alias itself. If we miss a load, we will get
5626 the wrong value since gcse might common it and we won't know to
5627 fix it up. */
5628
5629 static void
5630 invalidate_any_buried_refs (rtx x)
5631 {
5632 const char * fmt;
5633 int i, j;
5634 struct ls_expr * ptr;
5635
5636 /* Invalidate it in the list. */
5637 if (MEM_P (x) && simple_mem (x))
5638 {
5639 ptr = ldst_entry (x);
5640 ptr->invalid = 1;
5641 }
5642
5643 /* Recursively process the insn. */
5644 fmt = GET_RTX_FORMAT (GET_CODE (x));
5645
5646 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
5647 {
5648 if (fmt[i] == 'e')
5649 invalidate_any_buried_refs (XEXP (x, i));
5650 else if (fmt[i] == 'E')
5651 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
5652 invalidate_any_buried_refs (XVECEXP (x, i, j));
5653 }
5654 }
5655
5656 /* Find all the 'simple' MEMs which are used in LOADs and STORES. Simple
5657 being defined as MEM loads and stores to symbols, with no side effects
5658 and no registers in the expression. For a MEM destination, we also
5659 check that the insn is still valid if we replace the destination with a
5660 REG, as is done in update_ld_motion_stores. If there are any uses/defs
5661 which don't match this criteria, they are invalidated and trimmed out
5662 later. */
5663
5664 static void
5665 compute_ld_motion_mems (void)
5666 {
5667 struct ls_expr * ptr;
5668 basic_block bb;
5669 rtx insn;
5670
5671 pre_ldst_mems = NULL;
5672
5673 FOR_EACH_BB (bb)
5674 {
5675 for (insn = BB_HEAD (bb);
5676 insn && insn != NEXT_INSN (BB_END (bb));
5677 insn = NEXT_INSN (insn))
5678 {
5679 if (INSN_P (insn))
5680 {
5681 if (GET_CODE (PATTERN (insn)) == SET)
5682 {
5683 rtx src = SET_SRC (PATTERN (insn));
5684 rtx dest = SET_DEST (PATTERN (insn));
5685
5686 /* Check for a simple LOAD... */
5687 if (MEM_P (src) && simple_mem (src))
5688 {
5689 ptr = ldst_entry (src);
5690 if (REG_P (dest))
5691 ptr->loads = alloc_INSN_LIST (insn, ptr->loads);
5692 else
5693 ptr->invalid = 1;
5694 }
5695 else
5696 {
5697 /* Make sure there isn't a buried load somewhere. */
5698 invalidate_any_buried_refs (src);
5699 }
5700
5701 /* Check for stores. Don't worry about aliased ones, they
5702 will block any movement we might do later. We only care
5703 about this exact pattern since those are the only
5704 circumstance that we will ignore the aliasing info. */
5705 if (MEM_P (dest) && simple_mem (dest))
5706 {
5707 ptr = ldst_entry (dest);
5708
5709 if (! MEM_P (src)
5710 && GET_CODE (src) != ASM_OPERANDS
5711 /* Check for REG manually since want_to_gcse_p
5712 returns 0 for all REGs. */
5713 && can_assign_to_reg_p (src))
5714 ptr->stores = alloc_INSN_LIST (insn, ptr->stores);
5715 else
5716 ptr->invalid = 1;
5717 }
5718 }
5719 else
5720 invalidate_any_buried_refs (PATTERN (insn));
5721 }
5722 }
5723 }
5724 }
5725
5726 /* Remove any references that have been either invalidated or are not in the
5727 expression list for pre gcse. */
5728
5729 static void
5730 trim_ld_motion_mems (void)
5731 {
5732 struct ls_expr * * last = & pre_ldst_mems;
5733 struct ls_expr * ptr = pre_ldst_mems;
5734
5735 while (ptr != NULL)
5736 {
5737 struct expr * expr;
5738
5739 /* Delete if entry has been made invalid. */
5740 if (! ptr->invalid)
5741 {
5742 /* Delete if we cannot find this mem in the expression list. */
5743 unsigned int hash = ptr->hash_index % expr_hash_table.size;
5744
5745 for (expr = expr_hash_table.table[hash];
5746 expr != NULL;
5747 expr = expr->next_same_hash)
5748 if (expr_equiv_p (expr->expr, ptr->pattern))
5749 break;
5750 }
5751 else
5752 expr = (struct expr *) 0;
5753
5754 if (expr)
5755 {
5756 /* Set the expression field if we are keeping it. */
5757 ptr->expr = expr;
5758 last = & ptr->next;
5759 ptr = ptr->next;
5760 }
5761 else
5762 {
5763 *last = ptr->next;
5764 free_ldst_entry (ptr);
5765 ptr = * last;
5766 }
5767 }
5768
5769 /* Show the world what we've found. */
5770 if (gcse_file && pre_ldst_mems != NULL)
5771 print_ldst_list (gcse_file);
5772 }
5773
5774 /* This routine will take an expression which we are replacing with
5775 a reaching register, and update any stores that are needed if
5776 that expression is in the ld_motion list. Stores are updated by
5777 copying their SRC to the reaching register, and then storing
5778 the reaching register into the store location. These keeps the
5779 correct value in the reaching register for the loads. */
5780
5781 static void
5782 update_ld_motion_stores (struct expr * expr)
5783 {
5784 struct ls_expr * mem_ptr;
5785
5786 if ((mem_ptr = find_rtx_in_ldst (expr->expr)))
5787 {
5788 /* We can try to find just the REACHED stores, but is shouldn't
5789 matter to set the reaching reg everywhere... some might be
5790 dead and should be eliminated later. */
5791
5792 /* We replace (set mem expr) with (set reg expr) (set mem reg)
5793 where reg is the reaching reg used in the load. We checked in
5794 compute_ld_motion_mems that we can replace (set mem expr) with
5795 (set reg expr) in that insn. */
5796 rtx list = mem_ptr->stores;
5797
5798 for ( ; list != NULL_RTX; list = XEXP (list, 1))
5799 {
5800 rtx insn = XEXP (list, 0);
5801 rtx pat = PATTERN (insn);
5802 rtx src = SET_SRC (pat);
5803 rtx reg = expr->reaching_reg;
5804 rtx copy, new;
5805
5806 /* If we've already copied it, continue. */
5807 if (expr->reaching_reg == src)
5808 continue;
5809
5810 if (gcse_file)
5811 {
5812 fprintf (gcse_file, "PRE: store updated with reaching reg ");
5813 print_rtl (gcse_file, expr->reaching_reg);
5814 fprintf (gcse_file, ":\n ");
5815 print_inline_rtx (gcse_file, insn, 8);
5816 fprintf (gcse_file, "\n");
5817 }
5818
5819 copy = gen_move_insn ( reg, copy_rtx (SET_SRC (pat)));
5820 new = emit_insn_before (copy, insn);
5821 record_one_set (REGNO (reg), new);
5822 SET_SRC (pat) = reg;
5823
5824 /* un-recognize this pattern since it's probably different now. */
5825 INSN_CODE (insn) = -1;
5826 gcse_create_count++;
5827 }
5828 }
5829 }
5830 \f
5831 /* Store motion code. */
5832
5833 #define ANTIC_STORE_LIST(x) ((x)->loads)
5834 #define AVAIL_STORE_LIST(x) ((x)->stores)
5835 #define LAST_AVAIL_CHECK_FAILURE(x) ((x)->reaching_reg)
5836
5837 /* This is used to communicate the target bitvector we want to use in the
5838 reg_set_info routine when called via the note_stores mechanism. */
5839 static int * regvec;
5840
5841 /* And current insn, for the same routine. */
5842 static rtx compute_store_table_current_insn;
5843
5844 /* Used in computing the reverse edge graph bit vectors. */
5845 static sbitmap * st_antloc;
5846
5847 /* Global holding the number of store expressions we are dealing with. */
5848 static int num_stores;
5849
5850 /* Checks to set if we need to mark a register set. Called from
5851 note_stores. */
5852
5853 static void
5854 reg_set_info (rtx dest, rtx setter ATTRIBUTE_UNUSED,
5855 void *data)
5856 {
5857 sbitmap bb_reg = data;
5858
5859 if (GET_CODE (dest) == SUBREG)
5860 dest = SUBREG_REG (dest);
5861
5862 if (REG_P (dest))
5863 {
5864 regvec[REGNO (dest)] = INSN_UID (compute_store_table_current_insn);
5865 if (bb_reg)
5866 SET_BIT (bb_reg, REGNO (dest));
5867 }
5868 }
5869
5870 /* Clear any mark that says that this insn sets dest. Called from
5871 note_stores. */
5872
5873 static void
5874 reg_clear_last_set (rtx dest, rtx setter ATTRIBUTE_UNUSED,
5875 void *data)
5876 {
5877 int *dead_vec = data;
5878
5879 if (GET_CODE (dest) == SUBREG)
5880 dest = SUBREG_REG (dest);
5881
5882 if (REG_P (dest) &&
5883 dead_vec[REGNO (dest)] == INSN_UID (compute_store_table_current_insn))
5884 dead_vec[REGNO (dest)] = 0;
5885 }
5886
5887 /* Return zero if some of the registers in list X are killed
5888 due to set of registers in bitmap REGS_SET. */
5889
5890 static bool
5891 store_ops_ok (rtx x, int *regs_set)
5892 {
5893 rtx reg;
5894
5895 for (; x; x = XEXP (x, 1))
5896 {
5897 reg = XEXP (x, 0);
5898 if (regs_set[REGNO(reg)])
5899 return false;
5900 }
5901
5902 return true;
5903 }
5904
5905 /* Returns a list of registers mentioned in X. */
5906 static rtx
5907 extract_mentioned_regs (rtx x)
5908 {
5909 return extract_mentioned_regs_helper (x, NULL_RTX);
5910 }
5911
5912 /* Helper for extract_mentioned_regs; ACCUM is used to accumulate used
5913 registers. */
5914 static rtx
5915 extract_mentioned_regs_helper (rtx x, rtx accum)
5916 {
5917 int i;
5918 enum rtx_code code;
5919 const char * fmt;
5920
5921 /* Repeat is used to turn tail-recursion into iteration. */
5922 repeat:
5923
5924 if (x == 0)
5925 return accum;
5926
5927 code = GET_CODE (x);
5928 switch (code)
5929 {
5930 case REG:
5931 return alloc_EXPR_LIST (0, x, accum);
5932
5933 case MEM:
5934 x = XEXP (x, 0);
5935 goto repeat;
5936
5937 case PRE_DEC:
5938 case PRE_INC:
5939 case POST_DEC:
5940 case POST_INC:
5941 /* We do not run this function with arguments having side effects. */
5942 abort ();
5943
5944 case PC:
5945 case CC0: /*FIXME*/
5946 case CONST:
5947 case CONST_INT:
5948 case CONST_DOUBLE:
5949 case CONST_VECTOR:
5950 case SYMBOL_REF:
5951 case LABEL_REF:
5952 case ADDR_VEC:
5953 case ADDR_DIFF_VEC:
5954 return accum;
5955
5956 default:
5957 break;
5958 }
5959
5960 i = GET_RTX_LENGTH (code) - 1;
5961 fmt = GET_RTX_FORMAT (code);
5962
5963 for (; i >= 0; i--)
5964 {
5965 if (fmt[i] == 'e')
5966 {
5967 rtx tem = XEXP (x, i);
5968
5969 /* If we are about to do the last recursive call
5970 needed at this level, change it into iteration. */
5971 if (i == 0)
5972 {
5973 x = tem;
5974 goto repeat;
5975 }
5976
5977 accum = extract_mentioned_regs_helper (tem, accum);
5978 }
5979 else if (fmt[i] == 'E')
5980 {
5981 int j;
5982
5983 for (j = 0; j < XVECLEN (x, i); j++)
5984 accum = extract_mentioned_regs_helper (XVECEXP (x, i, j), accum);
5985 }
5986 }
5987
5988 return accum;
5989 }
5990
5991 /* Determine whether INSN is MEM store pattern that we will consider moving.
5992 REGS_SET_BEFORE is bitmap of registers set before (and including) the
5993 current insn, REGS_SET_AFTER is bitmap of registers set after (and
5994 including) the insn in this basic block. We must be passing through BB from
5995 head to end, as we are using this fact to speed things up.
5996
5997 The results are stored this way:
5998
5999 -- the first anticipatable expression is added into ANTIC_STORE_LIST
6000 -- if the processed expression is not anticipatable, NULL_RTX is added
6001 there instead, so that we can use it as indicator that no further
6002 expression of this type may be anticipatable
6003 -- if the expression is available, it is added as head of AVAIL_STORE_LIST;
6004 consequently, all of them but this head are dead and may be deleted.
6005 -- if the expression is not available, the insn due to that it fails to be
6006 available is stored in reaching_reg.
6007
6008 The things are complicated a bit by fact that there already may be stores
6009 to the same MEM from other blocks; also caller must take care of the
6010 necessary cleanup of the temporary markers after end of the basic block.
6011 */
6012
6013 static void
6014 find_moveable_store (rtx insn, int *regs_set_before, int *regs_set_after)
6015 {
6016 struct ls_expr * ptr;
6017 rtx dest, set, tmp;
6018 int check_anticipatable, check_available;
6019 basic_block bb = BLOCK_FOR_INSN (insn);
6020
6021 set = single_set (insn);
6022 if (!set)
6023 return;
6024
6025 dest = SET_DEST (set);
6026
6027 if (! MEM_P (dest) || MEM_VOLATILE_P (dest)
6028 || GET_MODE (dest) == BLKmode)
6029 return;
6030
6031 if (side_effects_p (dest))
6032 return;
6033
6034 /* If we are handling exceptions, we must be careful with memory references
6035 that may trap. If we are not, the behavior is undefined, so we may just
6036 continue. */
6037 if (flag_non_call_exceptions && may_trap_p (dest))
6038 return;
6039
6040 /* Even if the destination cannot trap, the source may. In this case we'd
6041 need to handle updating the REG_EH_REGION note. */
6042 if (find_reg_note (insn, REG_EH_REGION, NULL_RTX))
6043 return;
6044
6045 ptr = ldst_entry (dest);
6046 if (!ptr->pattern_regs)
6047 ptr->pattern_regs = extract_mentioned_regs (dest);
6048
6049 /* Do not check for anticipatability if we either found one anticipatable
6050 store already, or tested for one and found out that it was killed. */
6051 check_anticipatable = 0;
6052 if (!ANTIC_STORE_LIST (ptr))
6053 check_anticipatable = 1;
6054 else
6055 {
6056 tmp = XEXP (ANTIC_STORE_LIST (ptr), 0);
6057 if (tmp != NULL_RTX
6058 && BLOCK_FOR_INSN (tmp) != bb)
6059 check_anticipatable = 1;
6060 }
6061 if (check_anticipatable)
6062 {
6063 if (store_killed_before (dest, ptr->pattern_regs, insn, bb, regs_set_before))
6064 tmp = NULL_RTX;
6065 else
6066 tmp = insn;
6067 ANTIC_STORE_LIST (ptr) = alloc_INSN_LIST (tmp,
6068 ANTIC_STORE_LIST (ptr));
6069 }
6070
6071 /* It is not necessary to check whether store is available if we did
6072 it successfully before; if we failed before, do not bother to check
6073 until we reach the insn that caused us to fail. */
6074 check_available = 0;
6075 if (!AVAIL_STORE_LIST (ptr))
6076 check_available = 1;
6077 else
6078 {
6079 tmp = XEXP (AVAIL_STORE_LIST (ptr), 0);
6080 if (BLOCK_FOR_INSN (tmp) != bb)
6081 check_available = 1;
6082 }
6083 if (check_available)
6084 {
6085 /* Check that we have already reached the insn at that the check
6086 failed last time. */
6087 if (LAST_AVAIL_CHECK_FAILURE (ptr))
6088 {
6089 for (tmp = BB_END (bb);
6090 tmp != insn && tmp != LAST_AVAIL_CHECK_FAILURE (ptr);
6091 tmp = PREV_INSN (tmp))
6092 continue;
6093 if (tmp == insn)
6094 check_available = 0;
6095 }
6096 else
6097 check_available = store_killed_after (dest, ptr->pattern_regs, insn,
6098 bb, regs_set_after,
6099 &LAST_AVAIL_CHECK_FAILURE (ptr));
6100 }
6101 if (!check_available)
6102 AVAIL_STORE_LIST (ptr) = alloc_INSN_LIST (insn, AVAIL_STORE_LIST (ptr));
6103 }
6104
6105 /* Find available and anticipatable stores. */
6106
6107 static int
6108 compute_store_table (void)
6109 {
6110 int ret;
6111 basic_block bb;
6112 unsigned regno;
6113 rtx insn, pat, tmp;
6114 int *last_set_in, *already_set;
6115 struct ls_expr * ptr, **prev_next_ptr_ptr;
6116
6117 max_gcse_regno = max_reg_num ();
6118
6119 reg_set_in_block = sbitmap_vector_alloc (last_basic_block,
6120 max_gcse_regno);
6121 sbitmap_vector_zero (reg_set_in_block, last_basic_block);
6122 pre_ldst_mems = 0;
6123 last_set_in = xcalloc (max_gcse_regno, sizeof (int));
6124 already_set = xmalloc (sizeof (int) * max_gcse_regno);
6125
6126 /* Find all the stores we care about. */
6127 FOR_EACH_BB (bb)
6128 {
6129 /* First compute the registers set in this block. */
6130 regvec = last_set_in;
6131
6132 for (insn = BB_HEAD (bb);
6133 insn != NEXT_INSN (BB_END (bb));
6134 insn = NEXT_INSN (insn))
6135 {
6136 if (! INSN_P (insn))
6137 continue;
6138
6139 if (CALL_P (insn))
6140 {
6141 bool clobbers_all = false;
6142 #ifdef NON_SAVING_SETJMP
6143 if (NON_SAVING_SETJMP
6144 && find_reg_note (insn, REG_SETJMP, NULL_RTX))
6145 clobbers_all = true;
6146 #endif
6147
6148 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
6149 if (clobbers_all
6150 || TEST_HARD_REG_BIT (regs_invalidated_by_call, regno))
6151 {
6152 last_set_in[regno] = INSN_UID (insn);
6153 SET_BIT (reg_set_in_block[bb->index], regno);
6154 }
6155 }
6156
6157 pat = PATTERN (insn);
6158 compute_store_table_current_insn = insn;
6159 note_stores (pat, reg_set_info, reg_set_in_block[bb->index]);
6160 }
6161
6162 /* Now find the stores. */
6163 memset (already_set, 0, sizeof (int) * max_gcse_regno);
6164 regvec = already_set;
6165 for (insn = BB_HEAD (bb);
6166 insn != NEXT_INSN (BB_END (bb));
6167 insn = NEXT_INSN (insn))
6168 {
6169 if (! INSN_P (insn))
6170 continue;
6171
6172 if (CALL_P (insn))
6173 {
6174 bool clobbers_all = false;
6175 #ifdef NON_SAVING_SETJMP
6176 if (NON_SAVING_SETJMP
6177 && find_reg_note (insn, REG_SETJMP, NULL_RTX))
6178 clobbers_all = true;
6179 #endif
6180
6181 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
6182 if (clobbers_all
6183 || TEST_HARD_REG_BIT (regs_invalidated_by_call, regno))
6184 already_set[regno] = 1;
6185 }
6186
6187 pat = PATTERN (insn);
6188 note_stores (pat, reg_set_info, NULL);
6189
6190 /* Now that we've marked regs, look for stores. */
6191 find_moveable_store (insn, already_set, last_set_in);
6192
6193 /* Unmark regs that are no longer set. */
6194 compute_store_table_current_insn = insn;
6195 note_stores (pat, reg_clear_last_set, last_set_in);
6196 if (CALL_P (insn))
6197 {
6198 bool clobbers_all = false;
6199 #ifdef NON_SAVING_SETJMP
6200 if (NON_SAVING_SETJMP
6201 && find_reg_note (insn, REG_SETJMP, NULL_RTX))
6202 clobbers_all = true;
6203 #endif
6204
6205 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
6206 if ((clobbers_all
6207 || TEST_HARD_REG_BIT (regs_invalidated_by_call, regno))
6208 && last_set_in[regno] == INSN_UID (insn))
6209 last_set_in[regno] = 0;
6210 }
6211 }
6212
6213 #ifdef ENABLE_CHECKING
6214 /* last_set_in should now be all-zero. */
6215 for (regno = 0; regno < max_gcse_regno; regno++)
6216 if (last_set_in[regno] != 0)
6217 abort ();
6218 #endif
6219
6220 /* Clear temporary marks. */
6221 for (ptr = first_ls_expr (); ptr != NULL; ptr = next_ls_expr (ptr))
6222 {
6223 LAST_AVAIL_CHECK_FAILURE(ptr) = NULL_RTX;
6224 if (ANTIC_STORE_LIST (ptr)
6225 && (tmp = XEXP (ANTIC_STORE_LIST (ptr), 0)) == NULL_RTX)
6226 ANTIC_STORE_LIST (ptr) = XEXP (ANTIC_STORE_LIST (ptr), 1);
6227 }
6228 }
6229
6230 /* Remove the stores that are not available anywhere, as there will
6231 be no opportunity to optimize them. */
6232 for (ptr = pre_ldst_mems, prev_next_ptr_ptr = &pre_ldst_mems;
6233 ptr != NULL;
6234 ptr = *prev_next_ptr_ptr)
6235 {
6236 if (!AVAIL_STORE_LIST (ptr))
6237 {
6238 *prev_next_ptr_ptr = ptr->next;
6239 free_ldst_entry (ptr);
6240 }
6241 else
6242 prev_next_ptr_ptr = &ptr->next;
6243 }
6244
6245 ret = enumerate_ldsts ();
6246
6247 if (gcse_file)
6248 {
6249 fprintf (gcse_file, "ST_avail and ST_antic (shown under loads..)\n");
6250 print_ldst_list (gcse_file);
6251 }
6252
6253 free (last_set_in);
6254 free (already_set);
6255 return ret;
6256 }
6257
6258 /* Check to see if the load X is aliased with STORE_PATTERN.
6259 AFTER is true if we are checking the case when STORE_PATTERN occurs
6260 after the X. */
6261
6262 static bool
6263 load_kills_store (rtx x, rtx store_pattern, int after)
6264 {
6265 if (after)
6266 return anti_dependence (x, store_pattern);
6267 else
6268 return true_dependence (store_pattern, GET_MODE (store_pattern), x,
6269 rtx_addr_varies_p);
6270 }
6271
6272 /* Go through the entire insn X, looking for any loads which might alias
6273 STORE_PATTERN. Return true if found.
6274 AFTER is true if we are checking the case when STORE_PATTERN occurs
6275 after the insn X. */
6276
6277 static bool
6278 find_loads (rtx x, rtx store_pattern, int after)
6279 {
6280 const char * fmt;
6281 int i, j;
6282 int ret = false;
6283
6284 if (!x)
6285 return false;
6286
6287 if (GET_CODE (x) == SET)
6288 x = SET_SRC (x);
6289
6290 if (MEM_P (x))
6291 {
6292 if (load_kills_store (x, store_pattern, after))
6293 return true;
6294 }
6295
6296 /* Recursively process the insn. */
6297 fmt = GET_RTX_FORMAT (GET_CODE (x));
6298
6299 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0 && !ret; i--)
6300 {
6301 if (fmt[i] == 'e')
6302 ret |= find_loads (XEXP (x, i), store_pattern, after);
6303 else if (fmt[i] == 'E')
6304 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6305 ret |= find_loads (XVECEXP (x, i, j), store_pattern, after);
6306 }
6307 return ret;
6308 }
6309
6310 /* Check if INSN kills the store pattern X (is aliased with it).
6311 AFTER is true if we are checking the case when store X occurs
6312 after the insn. Return true if it it does. */
6313
6314 static bool
6315 store_killed_in_insn (rtx x, rtx x_regs, rtx insn, int after)
6316 {
6317 rtx reg, base, note;
6318
6319 if (!INSN_P (insn))
6320 return false;
6321
6322 if (CALL_P (insn))
6323 {
6324 /* A normal or pure call might read from pattern,
6325 but a const call will not. */
6326 if (! CONST_OR_PURE_CALL_P (insn) || pure_call_p (insn))
6327 return true;
6328
6329 /* But even a const call reads its parameters. Check whether the
6330 base of some of registers used in mem is stack pointer. */
6331 for (reg = x_regs; reg; reg = XEXP (reg, 1))
6332 {
6333 base = find_base_term (XEXP (reg, 0));
6334 if (!base
6335 || (GET_CODE (base) == ADDRESS
6336 && GET_MODE (base) == Pmode
6337 && XEXP (base, 0) == stack_pointer_rtx))
6338 return true;
6339 }
6340
6341 return false;
6342 }
6343
6344 if (GET_CODE (PATTERN (insn)) == SET)
6345 {
6346 rtx pat = PATTERN (insn);
6347 rtx dest = SET_DEST (pat);
6348
6349 if (GET_CODE (dest) == SIGN_EXTRACT
6350 || GET_CODE (dest) == ZERO_EXTRACT)
6351 dest = XEXP (dest, 0);
6352
6353 /* Check for memory stores to aliased objects. */
6354 if (MEM_P (dest)
6355 && !expr_equiv_p (dest, x))
6356 {
6357 if (after)
6358 {
6359 if (output_dependence (dest, x))
6360 return true;
6361 }
6362 else
6363 {
6364 if (output_dependence (x, dest))
6365 return true;
6366 }
6367 }
6368 if (find_loads (SET_SRC (pat), x, after))
6369 return true;
6370 }
6371 else if (find_loads (PATTERN (insn), x, after))
6372 return true;
6373
6374 /* If this insn has a REG_EQUAL or REG_EQUIV note referencing a memory
6375 location aliased with X, then this insn kills X. */
6376 note = find_reg_equal_equiv_note (insn);
6377 if (! note)
6378 return false;
6379 note = XEXP (note, 0);
6380
6381 /* However, if the note represents a must alias rather than a may
6382 alias relationship, then it does not kill X. */
6383 if (expr_equiv_p (note, x))
6384 return false;
6385
6386 /* See if there are any aliased loads in the note. */
6387 return find_loads (note, x, after);
6388 }
6389
6390 /* Returns true if the expression X is loaded or clobbered on or after INSN
6391 within basic block BB. REGS_SET_AFTER is bitmap of registers set in
6392 or after the insn. X_REGS is list of registers mentioned in X. If the store
6393 is killed, return the last insn in that it occurs in FAIL_INSN. */
6394
6395 static bool
6396 store_killed_after (rtx x, rtx x_regs, rtx insn, basic_block bb,
6397 int *regs_set_after, rtx *fail_insn)
6398 {
6399 rtx last = BB_END (bb), act;
6400
6401 if (!store_ops_ok (x_regs, regs_set_after))
6402 {
6403 /* We do not know where it will happen. */
6404 if (fail_insn)
6405 *fail_insn = NULL_RTX;
6406 return true;
6407 }
6408
6409 /* Scan from the end, so that fail_insn is determined correctly. */
6410 for (act = last; act != PREV_INSN (insn); act = PREV_INSN (act))
6411 if (store_killed_in_insn (x, x_regs, act, false))
6412 {
6413 if (fail_insn)
6414 *fail_insn = act;
6415 return true;
6416 }
6417
6418 return false;
6419 }
6420
6421 /* Returns true if the expression X is loaded or clobbered on or before INSN
6422 within basic block BB. X_REGS is list of registers mentioned in X.
6423 REGS_SET_BEFORE is bitmap of registers set before or in this insn. */
6424 static bool
6425 store_killed_before (rtx x, rtx x_regs, rtx insn, basic_block bb,
6426 int *regs_set_before)
6427 {
6428 rtx first = BB_HEAD (bb);
6429
6430 if (!store_ops_ok (x_regs, regs_set_before))
6431 return true;
6432
6433 for ( ; insn != PREV_INSN (first); insn = PREV_INSN (insn))
6434 if (store_killed_in_insn (x, x_regs, insn, true))
6435 return true;
6436
6437 return false;
6438 }
6439
6440 /* Fill in available, anticipatable, transparent and kill vectors in
6441 STORE_DATA, based on lists of available and anticipatable stores. */
6442 static void
6443 build_store_vectors (void)
6444 {
6445 basic_block bb;
6446 int *regs_set_in_block;
6447 rtx insn, st;
6448 struct ls_expr * ptr;
6449 unsigned regno;
6450
6451 /* Build the gen_vector. This is any store in the table which is not killed
6452 by aliasing later in its block. */
6453 ae_gen = sbitmap_vector_alloc (last_basic_block, num_stores);
6454 sbitmap_vector_zero (ae_gen, last_basic_block);
6455
6456 st_antloc = sbitmap_vector_alloc (last_basic_block, num_stores);
6457 sbitmap_vector_zero (st_antloc, last_basic_block);
6458
6459 for (ptr = first_ls_expr (); ptr != NULL; ptr = next_ls_expr (ptr))
6460 {
6461 for (st = AVAIL_STORE_LIST (ptr); st != NULL; st = XEXP (st, 1))
6462 {
6463 insn = XEXP (st, 0);
6464 bb = BLOCK_FOR_INSN (insn);
6465
6466 /* If we've already seen an available expression in this block,
6467 we can delete this one (It occurs earlier in the block). We'll
6468 copy the SRC expression to an unused register in case there
6469 are any side effects. */
6470 if (TEST_BIT (ae_gen[bb->index], ptr->index))
6471 {
6472 rtx r = gen_reg_rtx (GET_MODE (ptr->pattern));
6473 if (gcse_file)
6474 fprintf (gcse_file, "Removing redundant store:\n");
6475 replace_store_insn (r, XEXP (st, 0), bb, ptr);
6476 continue;
6477 }
6478 SET_BIT (ae_gen[bb->index], ptr->index);
6479 }
6480
6481 for (st = ANTIC_STORE_LIST (ptr); st != NULL; st = XEXP (st, 1))
6482 {
6483 insn = XEXP (st, 0);
6484 bb = BLOCK_FOR_INSN (insn);
6485 SET_BIT (st_antloc[bb->index], ptr->index);
6486 }
6487 }
6488
6489 ae_kill = sbitmap_vector_alloc (last_basic_block, num_stores);
6490 sbitmap_vector_zero (ae_kill, last_basic_block);
6491
6492 transp = sbitmap_vector_alloc (last_basic_block, num_stores);
6493 sbitmap_vector_zero (transp, last_basic_block);
6494 regs_set_in_block = xmalloc (sizeof (int) * max_gcse_regno);
6495
6496 FOR_EACH_BB (bb)
6497 {
6498 for (regno = 0; regno < max_gcse_regno; regno++)
6499 regs_set_in_block[regno] = TEST_BIT (reg_set_in_block[bb->index], regno);
6500
6501 for (ptr = first_ls_expr (); ptr != NULL; ptr = next_ls_expr (ptr))
6502 {
6503 if (store_killed_after (ptr->pattern, ptr->pattern_regs, BB_HEAD (bb),
6504 bb, regs_set_in_block, NULL))
6505 {
6506 /* It should not be necessary to consider the expression
6507 killed if it is both anticipatable and available. */
6508 if (!TEST_BIT (st_antloc[bb->index], ptr->index)
6509 || !TEST_BIT (ae_gen[bb->index], ptr->index))
6510 SET_BIT (ae_kill[bb->index], ptr->index);
6511 }
6512 else
6513 SET_BIT (transp[bb->index], ptr->index);
6514 }
6515 }
6516
6517 free (regs_set_in_block);
6518
6519 if (gcse_file)
6520 {
6521 dump_sbitmap_vector (gcse_file, "st_antloc", "", st_antloc, last_basic_block);
6522 dump_sbitmap_vector (gcse_file, "st_kill", "", ae_kill, last_basic_block);
6523 dump_sbitmap_vector (gcse_file, "Transpt", "", transp, last_basic_block);
6524 dump_sbitmap_vector (gcse_file, "st_avloc", "", ae_gen, last_basic_block);
6525 }
6526 }
6527
6528 /* Insert an instruction at the beginning of a basic block, and update
6529 the BB_HEAD if needed. */
6530
6531 static void
6532 insert_insn_start_bb (rtx insn, basic_block bb)
6533 {
6534 /* Insert at start of successor block. */
6535 rtx prev = PREV_INSN (BB_HEAD (bb));
6536 rtx before = BB_HEAD (bb);
6537 while (before != 0)
6538 {
6539 if (! LABEL_P (before)
6540 && (! NOTE_P (before)
6541 || NOTE_LINE_NUMBER (before) != NOTE_INSN_BASIC_BLOCK))
6542 break;
6543 prev = before;
6544 if (prev == BB_END (bb))
6545 break;
6546 before = NEXT_INSN (before);
6547 }
6548
6549 insn = emit_insn_after (insn, prev);
6550
6551 if (gcse_file)
6552 {
6553 fprintf (gcse_file, "STORE_MOTION insert store at start of BB %d:\n",
6554 bb->index);
6555 print_inline_rtx (gcse_file, insn, 6);
6556 fprintf (gcse_file, "\n");
6557 }
6558 }
6559
6560 /* This routine will insert a store on an edge. EXPR is the ldst entry for
6561 the memory reference, and E is the edge to insert it on. Returns nonzero
6562 if an edge insertion was performed. */
6563
6564 static int
6565 insert_store (struct ls_expr * expr, edge e)
6566 {
6567 rtx reg, insn;
6568 basic_block bb;
6569 edge tmp;
6570
6571 /* We did all the deleted before this insert, so if we didn't delete a
6572 store, then we haven't set the reaching reg yet either. */
6573 if (expr->reaching_reg == NULL_RTX)
6574 return 0;
6575
6576 if (e->flags & EDGE_FAKE)
6577 return 0;
6578
6579 reg = expr->reaching_reg;
6580 insn = gen_move_insn (copy_rtx (expr->pattern), reg);
6581
6582 /* If we are inserting this expression on ALL predecessor edges of a BB,
6583 insert it at the start of the BB, and reset the insert bits on the other
6584 edges so we don't try to insert it on the other edges. */
6585 bb = e->dest;
6586 for (tmp = e->dest->pred; tmp ; tmp = tmp->pred_next)
6587 if (!(tmp->flags & EDGE_FAKE))
6588 {
6589 int index = EDGE_INDEX (edge_list, tmp->src, tmp->dest);
6590 if (index == EDGE_INDEX_NO_EDGE)
6591 abort ();
6592 if (! TEST_BIT (pre_insert_map[index], expr->index))
6593 break;
6594 }
6595
6596 /* If tmp is NULL, we found an insertion on every edge, blank the
6597 insertion vector for these edges, and insert at the start of the BB. */
6598 if (!tmp && bb != EXIT_BLOCK_PTR)
6599 {
6600 for (tmp = e->dest->pred; tmp ; tmp = tmp->pred_next)
6601 {
6602 int index = EDGE_INDEX (edge_list, tmp->src, tmp->dest);
6603 RESET_BIT (pre_insert_map[index], expr->index);
6604 }
6605 insert_insn_start_bb (insn, bb);
6606 return 0;
6607 }
6608
6609 /* We can't insert on this edge, so we'll insert at the head of the
6610 successors block. See Morgan, sec 10.5. */
6611 if ((e->flags & EDGE_ABNORMAL) == EDGE_ABNORMAL)
6612 {
6613 insert_insn_start_bb (insn, bb);
6614 return 0;
6615 }
6616
6617 insert_insn_on_edge (insn, e);
6618
6619 if (gcse_file)
6620 {
6621 fprintf (gcse_file, "STORE_MOTION insert insn on edge (%d, %d):\n",
6622 e->src->index, e->dest->index);
6623 print_inline_rtx (gcse_file, insn, 6);
6624 fprintf (gcse_file, "\n");
6625 }
6626
6627 return 1;
6628 }
6629
6630 /* Remove any REG_EQUAL or REG_EQUIV notes containing a reference to the
6631 memory location in SMEXPR set in basic block BB.
6632
6633 This could be rather expensive. */
6634
6635 static void
6636 remove_reachable_equiv_notes (basic_block bb, struct ls_expr *smexpr)
6637 {
6638 edge *stack = xmalloc (sizeof (edge) * n_basic_blocks), act;
6639 sbitmap visited = sbitmap_alloc (last_basic_block);
6640 int stack_top = 0;
6641 rtx last, insn, note;
6642 rtx mem = smexpr->pattern;
6643
6644 sbitmap_zero (visited);
6645 act = bb->succ;
6646
6647 while (1)
6648 {
6649 if (!act)
6650 {
6651 if (!stack_top)
6652 {
6653 free (stack);
6654 sbitmap_free (visited);
6655 return;
6656 }
6657 act = stack[--stack_top];
6658 }
6659 bb = act->dest;
6660
6661 if (bb == EXIT_BLOCK_PTR
6662 || TEST_BIT (visited, bb->index))
6663 {
6664 act = act->succ_next;
6665 continue;
6666 }
6667 SET_BIT (visited, bb->index);
6668
6669 if (TEST_BIT (st_antloc[bb->index], smexpr->index))
6670 {
6671 for (last = ANTIC_STORE_LIST (smexpr);
6672 BLOCK_FOR_INSN (XEXP (last, 0)) != bb;
6673 last = XEXP (last, 1))
6674 continue;
6675 last = XEXP (last, 0);
6676 }
6677 else
6678 last = NEXT_INSN (BB_END (bb));
6679
6680 for (insn = BB_HEAD (bb); insn != last; insn = NEXT_INSN (insn))
6681 if (INSN_P (insn))
6682 {
6683 note = find_reg_equal_equiv_note (insn);
6684 if (!note || !expr_equiv_p (XEXP (note, 0), mem))
6685 continue;
6686
6687 if (gcse_file)
6688 fprintf (gcse_file, "STORE_MOTION drop REG_EQUAL note at insn %d:\n",
6689 INSN_UID (insn));
6690 remove_note (insn, note);
6691 }
6692 act = act->succ_next;
6693 if (bb->succ)
6694 {
6695 if (act)
6696 stack[stack_top++] = act;
6697 act = bb->succ;
6698 }
6699 }
6700 }
6701
6702 /* This routine will replace a store with a SET to a specified register. */
6703
6704 static void
6705 replace_store_insn (rtx reg, rtx del, basic_block bb, struct ls_expr *smexpr)
6706 {
6707 rtx insn, mem, note, set, ptr;
6708
6709 mem = smexpr->pattern;
6710 insn = gen_move_insn (reg, SET_SRC (single_set (del)));
6711 insn = emit_insn_after (insn, del);
6712
6713 if (gcse_file)
6714 {
6715 fprintf (gcse_file,
6716 "STORE_MOTION delete insn in BB %d:\n ", bb->index);
6717 print_inline_rtx (gcse_file, del, 6);
6718 fprintf (gcse_file, "\nSTORE MOTION replaced with insn:\n ");
6719 print_inline_rtx (gcse_file, insn, 6);
6720 fprintf (gcse_file, "\n");
6721 }
6722
6723 for (ptr = ANTIC_STORE_LIST (smexpr); ptr; ptr = XEXP (ptr, 1))
6724 if (XEXP (ptr, 0) == del)
6725 {
6726 XEXP (ptr, 0) = insn;
6727 break;
6728 }
6729 delete_insn (del);
6730
6731 /* Now we must handle REG_EQUAL notes whose contents is equal to the mem;
6732 they are no longer accurate provided that they are reached by this
6733 definition, so drop them. */
6734 for (; insn != NEXT_INSN (BB_END (bb)); insn = NEXT_INSN (insn))
6735 if (INSN_P (insn))
6736 {
6737 set = single_set (insn);
6738 if (!set)
6739 continue;
6740 if (expr_equiv_p (SET_DEST (set), mem))
6741 return;
6742 note = find_reg_equal_equiv_note (insn);
6743 if (!note || !expr_equiv_p (XEXP (note, 0), mem))
6744 continue;
6745
6746 if (gcse_file)
6747 fprintf (gcse_file, "STORE_MOTION drop REG_EQUAL note at insn %d:\n",
6748 INSN_UID (insn));
6749 remove_note (insn, note);
6750 }
6751 remove_reachable_equiv_notes (bb, smexpr);
6752 }
6753
6754
6755 /* Delete a store, but copy the value that would have been stored into
6756 the reaching_reg for later storing. */
6757
6758 static void
6759 delete_store (struct ls_expr * expr, basic_block bb)
6760 {
6761 rtx reg, i, del;
6762
6763 if (expr->reaching_reg == NULL_RTX)
6764 expr->reaching_reg = gen_reg_rtx (GET_MODE (expr->pattern));
6765
6766 reg = expr->reaching_reg;
6767
6768 for (i = AVAIL_STORE_LIST (expr); i; i = XEXP (i, 1))
6769 {
6770 del = XEXP (i, 0);
6771 if (BLOCK_FOR_INSN (del) == bb)
6772 {
6773 /* We know there is only one since we deleted redundant
6774 ones during the available computation. */
6775 replace_store_insn (reg, del, bb, expr);
6776 break;
6777 }
6778 }
6779 }
6780
6781 /* Free memory used by store motion. */
6782
6783 static void
6784 free_store_memory (void)
6785 {
6786 free_ldst_mems ();
6787
6788 if (ae_gen)
6789 sbitmap_vector_free (ae_gen);
6790 if (ae_kill)
6791 sbitmap_vector_free (ae_kill);
6792 if (transp)
6793 sbitmap_vector_free (transp);
6794 if (st_antloc)
6795 sbitmap_vector_free (st_antloc);
6796 if (pre_insert_map)
6797 sbitmap_vector_free (pre_insert_map);
6798 if (pre_delete_map)
6799 sbitmap_vector_free (pre_delete_map);
6800 if (reg_set_in_block)
6801 sbitmap_vector_free (reg_set_in_block);
6802
6803 ae_gen = ae_kill = transp = st_antloc = NULL;
6804 pre_insert_map = pre_delete_map = reg_set_in_block = NULL;
6805 }
6806
6807 /* Perform store motion. Much like gcse, except we move expressions the
6808 other way by looking at the flowgraph in reverse. */
6809
6810 static void
6811 store_motion (void)
6812 {
6813 basic_block bb;
6814 int x;
6815 struct ls_expr * ptr;
6816 int update_flow = 0;
6817
6818 if (gcse_file)
6819 {
6820 fprintf (gcse_file, "before store motion\n");
6821 print_rtl (gcse_file, get_insns ());
6822 }
6823
6824 init_alias_analysis ();
6825
6826 /* Find all the available and anticipatable stores. */
6827 num_stores = compute_store_table ();
6828 if (num_stores == 0)
6829 {
6830 sbitmap_vector_free (reg_set_in_block);
6831 end_alias_analysis ();
6832 return;
6833 }
6834
6835 /* Now compute kill & transp vectors. */
6836 build_store_vectors ();
6837 add_noreturn_fake_exit_edges ();
6838 connect_infinite_loops_to_exit ();
6839
6840 edge_list = pre_edge_rev_lcm (gcse_file, num_stores, transp, ae_gen,
6841 st_antloc, ae_kill, &pre_insert_map,
6842 &pre_delete_map);
6843
6844 /* Now we want to insert the new stores which are going to be needed. */
6845 for (ptr = first_ls_expr (); ptr != NULL; ptr = next_ls_expr (ptr))
6846 {
6847 FOR_EACH_BB (bb)
6848 if (TEST_BIT (pre_delete_map[bb->index], ptr->index))
6849 delete_store (ptr, bb);
6850
6851 for (x = 0; x < NUM_EDGES (edge_list); x++)
6852 if (TEST_BIT (pre_insert_map[x], ptr->index))
6853 update_flow |= insert_store (ptr, INDEX_EDGE (edge_list, x));
6854 }
6855
6856 if (update_flow)
6857 commit_edge_insertions ();
6858
6859 free_store_memory ();
6860 free_edge_list (edge_list);
6861 remove_fake_edges ();
6862 end_alias_analysis ();
6863 }
6864
6865 \f
6866 /* Entry point for jump bypassing optimization pass. */
6867
6868 int
6869 bypass_jumps (FILE *file)
6870 {
6871 int changed;
6872
6873 /* We do not construct an accurate cfg in functions which call
6874 setjmp, so just punt to be safe. */
6875 if (current_function_calls_setjmp)
6876 return 0;
6877
6878 /* For calling dump_foo fns from gdb. */
6879 debug_stderr = stderr;
6880 gcse_file = file;
6881
6882 /* Identify the basic block information for this function, including
6883 successors and predecessors. */
6884 max_gcse_regno = max_reg_num ();
6885
6886 if (file)
6887 dump_flow_info (file);
6888
6889 /* Return if there's nothing to do, or it is too expensive. */
6890 if (n_basic_blocks <= 1 || is_too_expensive (_ ("jump bypassing disabled")))
6891 return 0;
6892
6893 gcc_obstack_init (&gcse_obstack);
6894 bytes_used = 0;
6895
6896 /* We need alias. */
6897 init_alias_analysis ();
6898
6899 /* Record where pseudo-registers are set. This data is kept accurate
6900 during each pass. ??? We could also record hard-reg information here
6901 [since it's unchanging], however it is currently done during hash table
6902 computation.
6903
6904 It may be tempting to compute MEM set information here too, but MEM sets
6905 will be subject to code motion one day and thus we need to compute
6906 information about memory sets when we build the hash tables. */
6907
6908 alloc_reg_set_mem (max_gcse_regno);
6909 compute_sets (get_insns ());
6910
6911 max_gcse_regno = max_reg_num ();
6912 alloc_gcse_mem (get_insns ());
6913 changed = one_cprop_pass (1, 1, 1);
6914 free_gcse_mem ();
6915
6916 if (file)
6917 {
6918 fprintf (file, "BYPASS of %s: %d basic blocks, ",
6919 current_function_name (), n_basic_blocks);
6920 fprintf (file, "%d bytes\n\n", bytes_used);
6921 }
6922
6923 obstack_free (&gcse_obstack, NULL);
6924 free_reg_set_mem ();
6925
6926 /* We are finished with alias. */
6927 end_alias_analysis ();
6928 allocate_reg_info (max_reg_num (), FALSE, FALSE);
6929
6930 return changed;
6931 }
6932
6933 /* Return true if the graph is too expensive to optimize. PASS is the
6934 optimization about to be performed. */
6935
6936 static bool
6937 is_too_expensive (const char *pass)
6938 {
6939 /* Trying to perform global optimizations on flow graphs which have
6940 a high connectivity will take a long time and is unlikely to be
6941 particularly useful.
6942
6943 In normal circumstances a cfg should have about twice as many
6944 edges as blocks. But we do not want to punish small functions
6945 which have a couple switch statements. Rather than simply
6946 threshold the number of blocks, uses something with a more
6947 graceful degradation. */
6948 if (n_edges > 20000 + n_basic_blocks * 4)
6949 {
6950 if (warn_disabled_optimization)
6951 warning ("%s: %d basic blocks and %d edges/basic block",
6952 pass, n_basic_blocks, n_edges / n_basic_blocks);
6953
6954 return true;
6955 }
6956
6957 /* If allocating memory for the cprop bitmap would take up too much
6958 storage it's better just to disable the optimization. */
6959 if ((n_basic_blocks
6960 * SBITMAP_SET_SIZE (max_reg_num ())
6961 * sizeof (SBITMAP_ELT_TYPE)) > MAX_GCSE_MEMORY)
6962 {
6963 if (warn_disabled_optimization)
6964 warning ("%s: %d basic blocks and %d registers",
6965 pass, n_basic_blocks, max_reg_num ());
6966
6967 return true;
6968 }
6969
6970 return false;
6971 }
6972
6973 /* The following code implements gcse after reload, the purpose of this
6974 pass is to cleanup redundant loads generated by reload and other
6975 optimizations that come after gcse. It searches for simple inter-block
6976 redundancies and tries to eliminate them by adding moves and loads
6977 in cold places. */
6978
6979 /* The following structure holds the information about the occurrences of
6980 the redundant instructions. */
6981 struct unoccr
6982 {
6983 struct unoccr *next;
6984 edge pred;
6985 rtx insn;
6986 };
6987
6988 static bool reg_used_on_edge (rtx, edge);
6989 static rtx reg_set_between_after_reload_p (rtx, rtx, rtx);
6990 static rtx reg_used_between_after_reload_p (rtx, rtx, rtx);
6991 static rtx get_avail_load_store_reg (rtx);
6992 static bool is_jump_table_basic_block (basic_block);
6993 static bool bb_has_well_behaved_predecessors (basic_block);
6994 static struct occr* get_bb_avail_insn (basic_block, struct occr *);
6995 static void hash_scan_set_after_reload (rtx, rtx, struct hash_table *);
6996 static void compute_hash_table_after_reload (struct hash_table *);
6997 static void eliminate_partially_redundant_loads (basic_block,
6998 rtx,
6999 struct expr *);
7000 static void gcse_after_reload (void);
7001 static struct occr* get_bb_avail_insn (basic_block, struct occr *);
7002 void gcse_after_reload_main (rtx, FILE *);
7003
7004
7005 /* Check if register REG is used in any insn waiting to be inserted on E.
7006 Assumes no such insn can be a CALL_INSN; if so call reg_used_between_p
7007 with PREV(insn),NEXT(insn) instead of calling
7008 reg_overlap_mentioned_p. */
7009
7010 static bool
7011 reg_used_on_edge (rtx reg, edge e)
7012 {
7013 rtx insn;
7014
7015 for (insn = e->insns.r; insn; insn = NEXT_INSN (insn))
7016 if (INSN_P (insn) && reg_overlap_mentioned_p (reg, PATTERN (insn)))
7017 return true;
7018
7019 return false;
7020 }
7021
7022 /* Return the insn that sets register REG or clobbers it in between
7023 FROM_INSN and TO_INSN (exclusive of those two).
7024 Just like reg_set_between but for hard registers and not pseudos. */
7025
7026 static rtx
7027 reg_set_between_after_reload_p (rtx reg, rtx from_insn, rtx to_insn)
7028 {
7029 rtx insn;
7030 int regno;
7031
7032 if (! REG_P (reg))
7033 abort ();
7034 regno = REGNO (reg);
7035
7036 /* We are called after register allocation. */
7037 if (regno >= FIRST_PSEUDO_REGISTER)
7038 abort ();
7039
7040 if (from_insn == to_insn)
7041 return NULL_RTX;
7042
7043 for (insn = NEXT_INSN (from_insn);
7044 insn != to_insn;
7045 insn = NEXT_INSN (insn))
7046 {
7047 if (INSN_P (insn))
7048 {
7049 if (FIND_REG_INC_NOTE (insn, reg)
7050 || (CALL_P (insn)
7051 && call_used_regs[regno])
7052 || find_reg_fusage (insn, CLOBBER, reg))
7053 return insn;
7054 }
7055 if (set_of (reg, insn) != NULL_RTX)
7056 return insn;
7057 }
7058 return NULL_RTX;
7059 }
7060
7061 /* Return the insn that uses register REG in between FROM_INSN and TO_INSN
7062 (exclusive of those two). Similar to reg_used_between but for hard
7063 registers and not pseudos. */
7064
7065 static rtx
7066 reg_used_between_after_reload_p (rtx reg, rtx from_insn, rtx to_insn)
7067 {
7068 rtx insn;
7069 int regno;
7070
7071 if (! REG_P (reg))
7072 return to_insn;
7073 regno = REGNO (reg);
7074
7075 /* We are called after register allocation. */
7076 if (regno >= FIRST_PSEUDO_REGISTER)
7077 abort ();
7078 if (from_insn == to_insn)
7079 return NULL_RTX;
7080
7081 for (insn = NEXT_INSN (from_insn);
7082 insn != to_insn;
7083 insn = NEXT_INSN (insn))
7084 if (INSN_P (insn)
7085 && (reg_overlap_mentioned_p (reg, PATTERN (insn))
7086 || (CALL_P (insn)
7087 && call_used_regs[regno])
7088 || find_reg_fusage (insn, USE, reg)
7089 || find_reg_fusage (insn, CLOBBER, reg)))
7090 return insn;
7091 return NULL_RTX;
7092 }
7093
7094 /* Return the loaded/stored register of a load/store instruction. */
7095
7096 static rtx
7097 get_avail_load_store_reg (rtx insn)
7098 {
7099 if (REG_P (SET_DEST (PATTERN (insn)))) /* A load. */
7100 return SET_DEST(PATTERN(insn));
7101 if (REG_P (SET_SRC (PATTERN (insn)))) /* A store. */
7102 return SET_SRC (PATTERN (insn));
7103 abort ();
7104 }
7105
7106 /* Don't handle ABNORMAL edges or jump tables. */
7107
7108 static bool
7109 is_jump_table_basic_block (basic_block bb)
7110 {
7111 rtx insn = BB_END (bb);
7112
7113 if (JUMP_TABLE_DATA_P (insn))
7114 return true;
7115 return false;
7116 }
7117
7118 /* Return nonzero if the predecessors of BB are "well behaved". */
7119
7120 static bool
7121 bb_has_well_behaved_predecessors (basic_block bb)
7122 {
7123 edge pred;
7124
7125 if (! bb->pred)
7126 return false;
7127 for (pred = bb->pred; pred != NULL; pred = pred->pred_next)
7128 if (((pred->flags & EDGE_ABNORMAL) && EDGE_CRITICAL_P (pred))
7129 || is_jump_table_basic_block (pred->src))
7130 return false;
7131 return true;
7132 }
7133
7134
7135 /* Search for the occurrences of expression in BB. */
7136
7137 static struct occr*
7138 get_bb_avail_insn (basic_block bb, struct occr *occr)
7139 {
7140 for (; occr != NULL; occr = occr->next)
7141 if (BLOCK_FOR_INSN (occr->insn)->index == bb->index)
7142 return occr;
7143 return NULL;
7144 }
7145
7146 /* Perform partial GCSE pass after reload, try to eliminate redundant loads
7147 created by the reload pass. We try to look for a full or partial
7148 redundant loads fed by one or more loads/stores in predecessor BBs,
7149 and try adding loads to make them fully redundant. We also check if
7150 it's worth adding loads to be able to delete the redundant load.
7151
7152 Algorithm:
7153 1. Build available expressions hash table:
7154 For each load/store instruction, if the loaded/stored memory didn't
7155 change until the end of the basic block add this memory expression to
7156 the hash table.
7157 2. Perform Redundancy elimination:
7158 For each load instruction do the following:
7159 perform partial redundancy elimination, check if it's worth adding
7160 loads to make the load fully redundant. If so add loads and
7161 register copies and delete the load.
7162
7163 Future enhancement:
7164 if loaded register is used/defined between load and some store,
7165 look for some other free register between load and all its stores,
7166 and replace load with a copy from this register to the loaded
7167 register. */
7168
7169
7170 /* This handles the case where several stores feed a partially redundant
7171 load. It checks if the redundancy elimination is possible and if it's
7172 worth it. */
7173
7174 static void
7175 eliminate_partially_redundant_loads (basic_block bb, rtx insn,
7176 struct expr *expr)
7177 {
7178 edge pred;
7179 rtx avail_insn = NULL_RTX;
7180 rtx avail_reg;
7181 rtx dest, pat;
7182 struct occr *a_occr;
7183 struct unoccr *occr, *avail_occrs = NULL;
7184 struct unoccr *unoccr, *unavail_occrs = NULL;
7185 int npred_ok = 0;
7186 gcov_type ok_count = 0; /* Redundant load execution count. */
7187 gcov_type critical_count = 0; /* Execution count of critical edges. */
7188
7189 /* The execution count of the loads to be added to make the
7190 load fully redundant. */
7191 gcov_type not_ok_count = 0;
7192 basic_block pred_bb;
7193
7194 pat = PATTERN (insn);
7195 dest = SET_DEST (pat);
7196 /* Check that the loaded register is not used, set, or killed from the
7197 beginning of the block. */
7198 if (reg_used_between_after_reload_p (dest,
7199 PREV_INSN (BB_HEAD (bb)), insn)
7200 || reg_set_between_after_reload_p (dest,
7201 PREV_INSN (BB_HEAD (bb)), insn))
7202 return;
7203
7204 /* Check potential for replacing load with copy for predecessors. */
7205 for (pred = bb->pred; pred; pred = pred->pred_next)
7206 {
7207 rtx next_pred_bb_end;
7208
7209 avail_insn = NULL_RTX;
7210 pred_bb = pred->src;
7211 next_pred_bb_end = NEXT_INSN (BB_END (pred_bb));
7212 for (a_occr = get_bb_avail_insn (pred_bb, expr->avail_occr); a_occr;
7213 a_occr = get_bb_avail_insn (pred_bb, a_occr->next))
7214 {
7215 /* Check if the loaded register is not used. */
7216 avail_insn = a_occr->insn;
7217 if (! (avail_reg = get_avail_load_store_reg (avail_insn)))
7218 abort ();
7219 /* Make sure we can generate a move from register avail_reg to
7220 dest. */
7221 extract_insn (gen_move_insn (copy_rtx (dest),
7222 copy_rtx (avail_reg)));
7223 if (! constrain_operands (1)
7224 || reg_killed_on_edge (avail_reg, pred)
7225 || reg_used_on_edge (dest, pred))
7226 {
7227 avail_insn = NULL;
7228 continue;
7229 }
7230 if (! reg_set_between_after_reload_p (avail_reg, avail_insn,
7231 next_pred_bb_end))
7232 /* AVAIL_INSN remains non-null. */
7233 break;
7234 else
7235 avail_insn = NULL;
7236 }
7237 if (avail_insn != NULL_RTX)
7238 {
7239 npred_ok++;
7240 ok_count += pred->count;
7241 if (EDGE_CRITICAL_P (pred))
7242 critical_count += pred->count;
7243 occr = gmalloc (sizeof (struct unoccr));
7244 occr->insn = avail_insn;
7245 occr->pred = pred;
7246 occr->next = avail_occrs;
7247 avail_occrs = occr;
7248 }
7249 else
7250 {
7251 not_ok_count += pred->count;
7252 if (EDGE_CRITICAL_P (pred))
7253 critical_count += pred->count;
7254 unoccr = gmalloc (sizeof (struct unoccr));
7255 unoccr->insn = NULL_RTX;
7256 unoccr->pred = pred;
7257 unoccr->next = unavail_occrs;
7258 unavail_occrs = unoccr;
7259 }
7260 }
7261
7262 if (npred_ok == 0 /* No load can be replaced by copy. */
7263 || (optimize_size && npred_ok > 1)) /* Prevent exploding the code. */
7264 goto cleanup;
7265
7266 /* Check if it's worth applying the partial redundancy elimination. */
7267 if (ok_count < GCSE_AFTER_RELOAD_PARTIAL_FRACTION * not_ok_count)
7268 goto cleanup;
7269
7270 if (ok_count < GCSE_AFTER_RELOAD_CRITICAL_FRACTION * critical_count)
7271 goto cleanup;
7272
7273 /* Generate moves to the loaded register from where
7274 the memory is available. */
7275 for (occr = avail_occrs; occr; occr = occr->next)
7276 {
7277 avail_insn = occr->insn;
7278 pred = occr->pred;
7279 /* Set avail_reg to be the register having the value of the
7280 memory. */
7281 avail_reg = get_avail_load_store_reg (avail_insn);
7282 if (! avail_reg)
7283 abort ();
7284
7285 insert_insn_on_edge (gen_move_insn (copy_rtx (dest),
7286 copy_rtx (avail_reg)),
7287 pred);
7288
7289 if (gcse_file)
7290 fprintf (gcse_file,
7291 "GCSE AFTER reload generating move from %d to %d on \
7292 edge from %d to %d\n",
7293 REGNO (avail_reg),
7294 REGNO (dest),
7295 pred->src->index,
7296 pred->dest->index);
7297 }
7298
7299 /* Regenerate loads where the memory is unavailable. */
7300 for (unoccr = unavail_occrs; unoccr; unoccr = unoccr->next)
7301 {
7302 pred = unoccr->pred;
7303 insert_insn_on_edge (copy_insn (PATTERN (insn)), pred);
7304
7305 if (gcse_file)
7306 fprintf (gcse_file,
7307 "GCSE AFTER reload: generating on edge from %d to %d\
7308 a copy of load:\n",
7309 pred->src->index,
7310 pred->dest->index);
7311 }
7312
7313 /* Delete the insn if it is not available in this block and mark it
7314 for deletion if it is available. If insn is available it may help
7315 discover additional redundancies, so mark it for later deletion.*/
7316 for (a_occr = get_bb_avail_insn (bb, expr->avail_occr);
7317 a_occr && (a_occr->insn != insn);
7318 a_occr = get_bb_avail_insn (bb, a_occr->next));
7319
7320 if (!a_occr)
7321 delete_insn (insn);
7322 else
7323 a_occr->deleted_p = 1;
7324
7325 cleanup:
7326
7327 while (unavail_occrs)
7328 {
7329 struct unoccr *temp = unavail_occrs->next;
7330 free (unavail_occrs);
7331 unavail_occrs = temp;
7332 }
7333
7334 while (avail_occrs)
7335 {
7336 struct unoccr *temp = avail_occrs->next;
7337 free (avail_occrs);
7338 avail_occrs = temp;
7339 }
7340 }
7341
7342 /* Performing the redundancy elimination as described before. */
7343
7344 static void
7345 gcse_after_reload (void)
7346 {
7347 unsigned int i;
7348 rtx insn;
7349 basic_block bb;
7350 struct expr *expr;
7351 struct occr *occr;
7352
7353 /* Note we start at block 1. */
7354
7355 if (ENTRY_BLOCK_PTR->next_bb == EXIT_BLOCK_PTR)
7356 return;
7357
7358 FOR_BB_BETWEEN (bb,
7359 ENTRY_BLOCK_PTR->next_bb->next_bb,
7360 EXIT_BLOCK_PTR,
7361 next_bb)
7362 {
7363 if (! bb_has_well_behaved_predecessors (bb))
7364 continue;
7365
7366 /* Do not try this optimization on cold basic blocks. */
7367 if (probably_cold_bb_p (bb))
7368 continue;
7369
7370 reset_opr_set_tables ();
7371
7372 for (insn = BB_HEAD (bb);
7373 insn != NULL
7374 && insn != NEXT_INSN (BB_END (bb));
7375 insn = NEXT_INSN (insn))
7376 {
7377 /* Is it a load - of the form (set (reg) (mem))? */
7378 if (GET_CODE (insn) == INSN
7379 && GET_CODE (PATTERN (insn)) == SET
7380 && REG_P (SET_DEST (PATTERN (insn)))
7381 && MEM_P (SET_SRC (PATTERN (insn))))
7382 {
7383 rtx pat = PATTERN (insn);
7384 rtx src = SET_SRC (pat);
7385 struct expr *expr;
7386
7387 if (general_operand (src, GET_MODE (src))
7388 /* Is the expression recorded? */
7389 && (expr = lookup_expr (src, &expr_hash_table)) != NULL
7390 /* Are the operands unchanged since the start of the
7391 block? */
7392 && oprs_not_set_p (src, insn)
7393 && ! MEM_VOLATILE_P (src)
7394 && GET_MODE (src) != BLKmode
7395 && !(flag_non_call_exceptions && may_trap_p (src))
7396 && !side_effects_p (src))
7397 {
7398 /* We now have a load (insn) and an available memory at
7399 its BB start (expr). Try to remove the loads if it is
7400 redundant. */
7401 eliminate_partially_redundant_loads (bb, insn, expr);
7402 }
7403 }
7404
7405 /* Keep track of everything modified by this insn. */
7406 if (INSN_P (insn))
7407 mark_oprs_set (insn);
7408 }
7409 }
7410
7411 commit_edge_insertions ();
7412
7413 /* Go over the expression hash table and delete insns that were
7414 marked for later deletion. */
7415 for (i = 0; i < expr_hash_table.size; i++)
7416 {
7417 for (expr = expr_hash_table.table[i];
7418 expr != NULL;
7419 expr = expr->next_same_hash)
7420 for (occr = expr->avail_occr; occr; occr = occr->next)
7421 if (occr->deleted_p)
7422 delete_insn (occr->insn);
7423 }
7424 }
7425
7426 /* Scan pattern PAT of INSN and add an entry to the hash TABLE.
7427 After reload we are interested in loads/stores only. */
7428
7429 static void
7430 hash_scan_set_after_reload (rtx pat, rtx insn, struct hash_table *table)
7431 {
7432 rtx src = SET_SRC (pat);
7433 rtx dest = SET_DEST (pat);
7434
7435 if (! MEM_P (src) && ! MEM_P (dest))
7436 return;
7437
7438 if (REG_P (dest))
7439 {
7440 if (/* Don't GCSE something if we can't do a reg/reg copy. */
7441 can_copy_p (GET_MODE (dest))
7442 /* GCSE commonly inserts instruction after the insn. We can't
7443 do that easily for EH_REGION notes so disable GCSE on these
7444 for now. */
7445 && ! find_reg_note (insn, REG_EH_REGION, NULL_RTX)
7446 /* Is SET_SRC something we want to gcse? */
7447 && general_operand (src, GET_MODE (src))
7448 /* Don't CSE a nop. */
7449 && ! set_noop_p (pat)
7450 && ! JUMP_P (insn))
7451 {
7452 /* An expression is not available if its operands are
7453 subsequently modified, including this insn. */
7454 if (oprs_available_p (src, insn))
7455 insert_expr_in_table (src, GET_MODE (dest), insn, 0, 1, table);
7456 }
7457 }
7458 else if (REG_P (src))
7459 {
7460 /* Only record sets of pseudo-regs in the hash table. */
7461 if (/* Don't GCSE something if we can't do a reg/reg copy. */
7462 can_copy_p (GET_MODE (src))
7463 /* GCSE commonly inserts instruction after the insn. We can't
7464 do that easily for EH_REGION notes so disable GCSE on these
7465 for now. */
7466 && ! find_reg_note (insn, REG_EH_REGION, NULL_RTX)
7467 /* Is SET_DEST something we want to gcse? */
7468 && general_operand (dest, GET_MODE (dest))
7469 /* Don't CSE a nop. */
7470 && ! set_noop_p (pat)
7471 &&! JUMP_P (insn)
7472 && ! (flag_float_store && FLOAT_MODE_P (GET_MODE (dest)))
7473 /* Check if the memory expression is killed after insn. */
7474 && ! load_killed_in_block_p (BLOCK_FOR_INSN (insn),
7475 INSN_CUID (insn) + 1,
7476 dest,
7477 1)
7478 && oprs_unchanged_p (XEXP (dest, 0), insn, 1))
7479 {
7480 insert_expr_in_table (dest, GET_MODE (dest), insn, 0, 1, table);
7481 }
7482 }
7483 }
7484
7485
7486 /* Create hash table of memory expressions available at end of basic
7487 blocks. */
7488
7489 static void
7490 compute_hash_table_after_reload (struct hash_table *table)
7491 {
7492 unsigned int i;
7493
7494 table->set_p = 0;
7495
7496 /* Initialize count of number of entries in hash table. */
7497 table->n_elems = 0;
7498 memset ((char *) table->table, 0,
7499 table->size * sizeof (struct expr *));
7500
7501 /* While we compute the hash table we also compute a bit array of which
7502 registers are set in which blocks. */
7503 sbitmap_vector_zero (reg_set_in_block, last_basic_block);
7504
7505 /* Re-cache any INSN_LIST nodes we have allocated. */
7506 clear_modify_mem_tables ();
7507
7508 /* Some working arrays used to track first and last set in each block. */
7509 reg_avail_info = gmalloc (max_gcse_regno * sizeof (struct reg_avail_info));
7510
7511 for (i = 0; i < max_gcse_regno; ++i)
7512 reg_avail_info[i].last_bb = NULL;
7513
7514 FOR_EACH_BB (current_bb)
7515 {
7516 rtx insn;
7517 unsigned int regno;
7518
7519 /* First pass over the instructions records information used to
7520 determine when registers and memory are first and last set. */
7521 for (insn = BB_HEAD (current_bb);
7522 insn && insn != NEXT_INSN (BB_END (current_bb));
7523 insn = NEXT_INSN (insn))
7524 {
7525 if (! INSN_P (insn))
7526 continue;
7527
7528 if (CALL_P (insn))
7529 {
7530 bool clobbers_all = false;
7531
7532 #ifdef NON_SAVING_SETJMP
7533 if (NON_SAVING_SETJMP
7534 && find_reg_note (insn, REG_SETJMP, NULL_RTX))
7535 clobbers_all = true;
7536 #endif
7537
7538 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
7539 if (clobbers_all
7540 || TEST_HARD_REG_BIT (regs_invalidated_by_call,
7541 regno))
7542 record_last_reg_set_info (insn, regno);
7543
7544 mark_call (insn);
7545 }
7546
7547 note_stores (PATTERN (insn), record_last_set_info, insn);
7548
7549 if (GET_CODE (PATTERN (insn)) == SET)
7550 {
7551 rtx src, dest;
7552
7553 src = SET_SRC (PATTERN (insn));
7554 dest = SET_DEST (PATTERN (insn));
7555 if (MEM_P (src) && auto_inc_p (XEXP (src, 0)))
7556 {
7557 regno = REGNO (XEXP (XEXP (src, 0), 0));
7558 record_last_reg_set_info (insn, regno);
7559 }
7560 if (MEM_P (dest) && auto_inc_p (XEXP (dest, 0)))
7561 {
7562 regno = REGNO (XEXP (XEXP (dest, 0), 0));
7563 record_last_reg_set_info (insn, regno);
7564 }
7565 }
7566 }
7567
7568 /* The next pass builds the hash table. */
7569 for (insn = BB_HEAD (current_bb);
7570 insn && insn != NEXT_INSN (BB_END (current_bb));
7571 insn = NEXT_INSN (insn))
7572 if (INSN_P (insn) && GET_CODE (PATTERN (insn)) == SET)
7573 if (! find_reg_note (insn, REG_LIBCALL, NULL_RTX))
7574 hash_scan_set_after_reload (PATTERN (insn), insn, table);
7575 }
7576
7577 free (reg_avail_info);
7578 reg_avail_info = NULL;
7579 }
7580
7581
7582 /* Main entry point of the GCSE after reload - clean some redundant loads
7583 due to spilling. */
7584
7585 void
7586 gcse_after_reload_main (rtx f, FILE* file)
7587 {
7588 gcse_subst_count = 0;
7589 gcse_create_count = 0;
7590
7591 gcse_file = file;
7592
7593 gcc_obstack_init (&gcse_obstack);
7594 bytes_used = 0;
7595
7596 /* We need alias. */
7597 init_alias_analysis ();
7598
7599 max_gcse_regno = max_reg_num ();
7600
7601 alloc_reg_set_mem (max_gcse_regno);
7602 alloc_gcse_mem (f);
7603 alloc_hash_table (max_cuid, &expr_hash_table, 0);
7604 compute_hash_table_after_reload (&expr_hash_table);
7605
7606 if (gcse_file)
7607 dump_hash_table (gcse_file, "Expression", &expr_hash_table);
7608
7609 if (expr_hash_table.n_elems > 0)
7610 gcse_after_reload ();
7611
7612 free_hash_table (&expr_hash_table);
7613
7614 free_gcse_mem ();
7615 free_reg_set_mem ();
7616
7617 /* We are finished with alias. */
7618 end_alias_analysis ();
7619
7620 obstack_free (&gcse_obstack, NULL);
7621 }
7622
7623 #include "gt-gcse.h"