re PR c++/36185 (wrong code with -O2 -fgcse-sm)
[gcc.git] / gcc / gcse.c
1 /* Global common subexpression elimination/Partial redundancy elimination
2 and global constant/copy propagation for GNU compiler.
3 Copyright (C) 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
4 2006, 2007, 2008 Free Software Foundation, Inc.
5
6 This file is part of GCC.
7
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
11 version.
12
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
21
22 /* TODO
23 - reordering of memory allocation and freeing to be more space efficient
24 - do rough calc of how many regs are needed in each block, and a rough
25 calc of how many regs are available in each class and use that to
26 throttle back the code in cases where RTX_COST is minimal.
27 - a store to the same address as a load does not kill the load if the
28 source of the store is also the destination of the load. Handling this
29 allows more load motion, particularly out of loops.
30 - ability to realloc sbitmap vectors would allow one initial computation
31 of reg_set_in_block with only subsequent additions, rather than
32 recomputing it for each pass
33
34 */
35
36 /* References searched while implementing this.
37
38 Compilers Principles, Techniques and Tools
39 Aho, Sethi, Ullman
40 Addison-Wesley, 1988
41
42 Global Optimization by Suppression of Partial Redundancies
43 E. Morel, C. Renvoise
44 communications of the acm, Vol. 22, Num. 2, Feb. 1979
45
46 A Portable Machine-Independent Global Optimizer - Design and Measurements
47 Frederick Chow
48 Stanford Ph.D. thesis, Dec. 1983
49
50 A Fast Algorithm for Code Movement Optimization
51 D.M. Dhamdhere
52 SIGPLAN Notices, Vol. 23, Num. 10, Oct. 1988
53
54 A Solution to a Problem with Morel and Renvoise's
55 Global Optimization by Suppression of Partial Redundancies
56 K-H Drechsler, M.P. Stadel
57 ACM TOPLAS, Vol. 10, Num. 4, Oct. 1988
58
59 Practical Adaptation of the Global Optimization
60 Algorithm of Morel and Renvoise
61 D.M. Dhamdhere
62 ACM TOPLAS, Vol. 13, Num. 2. Apr. 1991
63
64 Efficiently Computing Static Single Assignment Form and the Control
65 Dependence Graph
66 R. Cytron, J. Ferrante, B.K. Rosen, M.N. Wegman, and F.K. Zadeck
67 ACM TOPLAS, Vol. 13, Num. 4, Oct. 1991
68
69 Lazy Code Motion
70 J. Knoop, O. Ruthing, B. Steffen
71 ACM SIGPLAN Notices Vol. 27, Num. 7, Jul. 1992, '92 Conference on PLDI
72
73 What's In a Region? Or Computing Control Dependence Regions in Near-Linear
74 Time for Reducible Flow Control
75 Thomas Ball
76 ACM Letters on Programming Languages and Systems,
77 Vol. 2, Num. 1-4, Mar-Dec 1993
78
79 An Efficient Representation for Sparse Sets
80 Preston Briggs, Linda Torczon
81 ACM Letters on Programming Languages and Systems,
82 Vol. 2, Num. 1-4, Mar-Dec 1993
83
84 A Variation of Knoop, Ruthing, and Steffen's Lazy Code Motion
85 K-H Drechsler, M.P. Stadel
86 ACM SIGPLAN Notices, Vol. 28, Num. 5, May 1993
87
88 Partial Dead Code Elimination
89 J. Knoop, O. Ruthing, B. Steffen
90 ACM SIGPLAN Notices, Vol. 29, Num. 6, Jun. 1994
91
92 Effective Partial Redundancy Elimination
93 P. Briggs, K.D. Cooper
94 ACM SIGPLAN Notices, Vol. 29, Num. 6, Jun. 1994
95
96 The Program Structure Tree: Computing Control Regions in Linear Time
97 R. Johnson, D. Pearson, K. Pingali
98 ACM SIGPLAN Notices, Vol. 29, Num. 6, Jun. 1994
99
100 Optimal Code Motion: Theory and Practice
101 J. Knoop, O. Ruthing, B. Steffen
102 ACM TOPLAS, Vol. 16, Num. 4, Jul. 1994
103
104 The power of assignment motion
105 J. Knoop, O. Ruthing, B. Steffen
106 ACM SIGPLAN Notices Vol. 30, Num. 6, Jun. 1995, '95 Conference on PLDI
107
108 Global code motion / global value numbering
109 C. Click
110 ACM SIGPLAN Notices Vol. 30, Num. 6, Jun. 1995, '95 Conference on PLDI
111
112 Value Driven Redundancy Elimination
113 L.T. Simpson
114 Rice University Ph.D. thesis, Apr. 1996
115
116 Value Numbering
117 L.T. Simpson
118 Massively Scalar Compiler Project, Rice University, Sep. 1996
119
120 High Performance Compilers for Parallel Computing
121 Michael Wolfe
122 Addison-Wesley, 1996
123
124 Advanced Compiler Design and Implementation
125 Steven Muchnick
126 Morgan Kaufmann, 1997
127
128 Building an Optimizing Compiler
129 Robert Morgan
130 Digital Press, 1998
131
132 People wishing to speed up the code here should read:
133 Elimination Algorithms for Data Flow Analysis
134 B.G. Ryder, M.C. Paull
135 ACM Computing Surveys, Vol. 18, Num. 3, Sep. 1986
136
137 How to Analyze Large Programs Efficiently and Informatively
138 D.M. Dhamdhere, B.K. Rosen, F.K. Zadeck
139 ACM SIGPLAN Notices Vol. 27, Num. 7, Jul. 1992, '92 Conference on PLDI
140
141 People wishing to do something different can find various possibilities
142 in the above papers and elsewhere.
143 */
144
145 #include "config.h"
146 #include "system.h"
147 #include "coretypes.h"
148 #include "tm.h"
149 #include "toplev.h"
150
151 #include "rtl.h"
152 #include "tree.h"
153 #include "tm_p.h"
154 #include "regs.h"
155 #include "hard-reg-set.h"
156 #include "flags.h"
157 #include "real.h"
158 #include "insn-config.h"
159 #include "recog.h"
160 #include "basic-block.h"
161 #include "output.h"
162 #include "function.h"
163 #include "expr.h"
164 #include "except.h"
165 #include "ggc.h"
166 #include "params.h"
167 #include "cselib.h"
168 #include "intl.h"
169 #include "obstack.h"
170 #include "timevar.h"
171 #include "tree-pass.h"
172 #include "hashtab.h"
173 #include "df.h"
174 #include "dbgcnt.h"
175
176 /* Propagate flow information through back edges and thus enable PRE's
177 moving loop invariant calculations out of loops.
178
179 Originally this tended to create worse overall code, but several
180 improvements during the development of PRE seem to have made following
181 back edges generally a win.
182
183 Note much of the loop invariant code motion done here would normally
184 be done by loop.c, which has more heuristics for when to move invariants
185 out of loops. At some point we might need to move some of those
186 heuristics into gcse.c. */
187
188 /* We support GCSE via Partial Redundancy Elimination. PRE optimizations
189 are a superset of those done by GCSE.
190
191 We perform the following steps:
192
193 1) Compute basic block information.
194
195 2) Compute table of places where registers are set.
196
197 3) Perform copy/constant propagation.
198
199 4) Perform global cse using lazy code motion if not optimizing
200 for size, or code hoisting if we are.
201
202 5) Perform another pass of copy/constant propagation.
203
204 Two passes of copy/constant propagation are done because the first one
205 enables more GCSE and the second one helps to clean up the copies that
206 GCSE creates. This is needed more for PRE than for Classic because Classic
207 GCSE will try to use an existing register containing the common
208 subexpression rather than create a new one. This is harder to do for PRE
209 because of the code motion (which Classic GCSE doesn't do).
210
211 Expressions we are interested in GCSE-ing are of the form
212 (set (pseudo-reg) (expression)).
213 Function want_to_gcse_p says what these are.
214
215 PRE handles moving invariant expressions out of loops (by treating them as
216 partially redundant).
217
218 Eventually it would be nice to replace cse.c/gcse.c with SSA (static single
219 assignment) based GVN (global value numbering). L. T. Simpson's paper
220 (Rice University) on value numbering is a useful reference for this.
221
222 **********************
223
224 We used to support multiple passes but there are diminishing returns in
225 doing so. The first pass usually makes 90% of the changes that are doable.
226 A second pass can make a few more changes made possible by the first pass.
227 Experiments show any further passes don't make enough changes to justify
228 the expense.
229
230 A study of spec92 using an unlimited number of passes:
231 [1 pass] = 1208 substitutions, [2] = 577, [3] = 202, [4] = 192, [5] = 83,
232 [6] = 34, [7] = 17, [8] = 9, [9] = 4, [10] = 4, [11] = 2,
233 [12] = 2, [13] = 1, [15] = 1, [16] = 2, [41] = 1
234
235 It was found doing copy propagation between each pass enables further
236 substitutions.
237
238 PRE is quite expensive in complicated functions because the DFA can take
239 a while to converge. Hence we only perform one pass. The parameter
240 max-gcse-passes can be modified if one wants to experiment.
241
242 **********************
243
244 The steps for PRE are:
245
246 1) Build the hash table of expressions we wish to GCSE (expr_hash_table).
247
248 2) Perform the data flow analysis for PRE.
249
250 3) Delete the redundant instructions
251
252 4) Insert the required copies [if any] that make the partially
253 redundant instructions fully redundant.
254
255 5) For other reaching expressions, insert an instruction to copy the value
256 to a newly created pseudo that will reach the redundant instruction.
257
258 The deletion is done first so that when we do insertions we
259 know which pseudo reg to use.
260
261 Various papers have argued that PRE DFA is expensive (O(n^2)) and others
262 argue it is not. The number of iterations for the algorithm to converge
263 is typically 2-4 so I don't view it as that expensive (relatively speaking).
264
265 PRE GCSE depends heavily on the second CSE pass to clean up the copies
266 we create. To make an expression reach the place where it's redundant,
267 the result of the expression is copied to a new register, and the redundant
268 expression is deleted by replacing it with this new register. Classic GCSE
269 doesn't have this problem as much as it computes the reaching defs of
270 each register in each block and thus can try to use an existing
271 register. */
272 \f
273 /* GCSE global vars. */
274
275 /* Note whether or not we should run jump optimization after gcse. We
276 want to do this for two cases.
277
278 * If we changed any jumps via cprop.
279
280 * If we added any labels via edge splitting. */
281 static int run_jump_opt_after_gcse;
282
283 /* An obstack for our working variables. */
284 static struct obstack gcse_obstack;
285
286 struct reg_use {rtx reg_rtx; };
287
288 /* Hash table of expressions. */
289
290 struct expr
291 {
292 /* The expression (SET_SRC for expressions, PATTERN for assignments). */
293 rtx expr;
294 /* Index in the available expression bitmaps. */
295 int bitmap_index;
296 /* Next entry with the same hash. */
297 struct expr *next_same_hash;
298 /* List of anticipatable occurrences in basic blocks in the function.
299 An "anticipatable occurrence" is one that is the first occurrence in the
300 basic block, the operands are not modified in the basic block prior
301 to the occurrence and the output is not used between the start of
302 the block and the occurrence. */
303 struct occr *antic_occr;
304 /* List of available occurrence in basic blocks in the function.
305 An "available occurrence" is one that is the last occurrence in the
306 basic block and the operands are not modified by following statements in
307 the basic block [including this insn]. */
308 struct occr *avail_occr;
309 /* Non-null if the computation is PRE redundant.
310 The value is the newly created pseudo-reg to record a copy of the
311 expression in all the places that reach the redundant copy. */
312 rtx reaching_reg;
313 };
314
315 /* Occurrence of an expression.
316 There is one per basic block. If a pattern appears more than once the
317 last appearance is used [or first for anticipatable expressions]. */
318
319 struct occr
320 {
321 /* Next occurrence of this expression. */
322 struct occr *next;
323 /* The insn that computes the expression. */
324 rtx insn;
325 /* Nonzero if this [anticipatable] occurrence has been deleted. */
326 char deleted_p;
327 /* Nonzero if this [available] occurrence has been copied to
328 reaching_reg. */
329 /* ??? This is mutually exclusive with deleted_p, so they could share
330 the same byte. */
331 char copied_p;
332 };
333
334 /* Expression and copy propagation hash tables.
335 Each hash table is an array of buckets.
336 ??? It is known that if it were an array of entries, structure elements
337 `next_same_hash' and `bitmap_index' wouldn't be necessary. However, it is
338 not clear whether in the final analysis a sufficient amount of memory would
339 be saved as the size of the available expression bitmaps would be larger
340 [one could build a mapping table without holes afterwards though].
341 Someday I'll perform the computation and figure it out. */
342
343 struct hash_table
344 {
345 /* The table itself.
346 This is an array of `expr_hash_table_size' elements. */
347 struct expr **table;
348
349 /* Size of the hash table, in elements. */
350 unsigned int size;
351
352 /* Number of hash table elements. */
353 unsigned int n_elems;
354
355 /* Whether the table is expression of copy propagation one. */
356 int set_p;
357 };
358
359 /* Expression hash table. */
360 static struct hash_table expr_hash_table;
361
362 /* Copy propagation hash table. */
363 static struct hash_table set_hash_table;
364
365 /* Mapping of uids to cuids.
366 Only real insns get cuids. */
367 static int *uid_cuid;
368
369 /* Highest UID in UID_CUID. */
370 static int max_uid;
371
372 /* Get the cuid of an insn. */
373 #ifdef ENABLE_CHECKING
374 #define INSN_CUID(INSN) \
375 (gcc_assert (INSN_UID (INSN) <= max_uid), uid_cuid[INSN_UID (INSN)])
376 #else
377 #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)])
378 #endif
379
380 /* Number of cuids. */
381 static int max_cuid;
382
383 /* Maximum register number in function prior to doing gcse + 1.
384 Registers created during this pass have regno >= max_gcse_regno.
385 This is named with "gcse" to not collide with global of same name. */
386 static unsigned int max_gcse_regno;
387
388 /* Table of registers that are modified.
389
390 For each register, each element is a list of places where the pseudo-reg
391 is set.
392
393 For simplicity, GCSE is done on sets of pseudo-regs only. PRE GCSE only
394 requires knowledge of which blocks kill which regs [and thus could use
395 a bitmap instead of the lists `reg_set_table' uses].
396
397 `reg_set_table' and could be turned into an array of bitmaps (num-bbs x
398 num-regs) [however perhaps it may be useful to keep the data as is]. One
399 advantage of recording things this way is that `reg_set_table' is fairly
400 sparse with respect to pseudo regs but for hard regs could be fairly dense
401 [relatively speaking]. And recording sets of pseudo-regs in lists speeds
402 up functions like compute_transp since in the case of pseudo-regs we only
403 need to iterate over the number of times a pseudo-reg is set, not over the
404 number of basic blocks [clearly there is a bit of a slow down in the cases
405 where a pseudo is set more than once in a block, however it is believed
406 that the net effect is to speed things up]. This isn't done for hard-regs
407 because recording call-clobbered hard-regs in `reg_set_table' at each
408 function call can consume a fair bit of memory, and iterating over
409 hard-regs stored this way in compute_transp will be more expensive. */
410
411 typedef struct reg_set
412 {
413 /* The next setting of this register. */
414 struct reg_set *next;
415 /* The index of the block where it was set. */
416 int bb_index;
417 } reg_set;
418
419 static reg_set **reg_set_table;
420
421 /* Size of `reg_set_table'.
422 The table starts out at max_gcse_regno + slop, and is enlarged as
423 necessary. */
424 static int reg_set_table_size;
425
426 /* Amount to grow `reg_set_table' by when it's full. */
427 #define REG_SET_TABLE_SLOP 100
428
429 /* This is a list of expressions which are MEMs and will be used by load
430 or store motion.
431 Load motion tracks MEMs which aren't killed by
432 anything except itself. (i.e., loads and stores to a single location).
433 We can then allow movement of these MEM refs with a little special
434 allowance. (all stores copy the same value to the reaching reg used
435 for the loads). This means all values used to store into memory must have
436 no side effects so we can re-issue the setter value.
437 Store Motion uses this structure as an expression table to track stores
438 which look interesting, and might be moveable towards the exit block. */
439
440 struct ls_expr
441 {
442 struct expr * expr; /* Gcse expression reference for LM. */
443 rtx pattern; /* Pattern of this mem. */
444 rtx pattern_regs; /* List of registers mentioned by the mem. */
445 rtx loads; /* INSN list of loads seen. */
446 rtx stores; /* INSN list of stores seen. */
447 struct ls_expr * next; /* Next in the list. */
448 int invalid; /* Invalid for some reason. */
449 int index; /* If it maps to a bitmap index. */
450 unsigned int hash_index; /* Index when in a hash table. */
451 rtx reaching_reg; /* Register to use when re-writing. */
452 };
453
454 /* Array of implicit set patterns indexed by basic block index. */
455 static rtx *implicit_sets;
456
457 /* Head of the list of load/store memory refs. */
458 static struct ls_expr * pre_ldst_mems = NULL;
459
460 /* Hashtable for the load/store memory refs. */
461 static htab_t pre_ldst_table = NULL;
462
463 /* Bitmap containing one bit for each register in the program.
464 Used when performing GCSE to track which registers have been set since
465 the start of the basic block. */
466 static regset reg_set_bitmap;
467
468 /* For each block, a bitmap of registers set in the block.
469 This is used by compute_transp.
470 It is computed during hash table computation and not by compute_sets
471 as it includes registers added since the last pass (or between cprop and
472 gcse) and it's currently not easy to realloc sbitmap vectors. */
473 static sbitmap *reg_set_in_block;
474
475 /* Array, indexed by basic block number for a list of insns which modify
476 memory within that block. */
477 static rtx * modify_mem_list;
478 static bitmap modify_mem_list_set;
479
480 /* This array parallels modify_mem_list, but is kept canonicalized. */
481 static rtx * canon_modify_mem_list;
482
483 /* Bitmap indexed by block numbers to record which blocks contain
484 function calls. */
485 static bitmap blocks_with_calls;
486
487 /* Various variables for statistics gathering. */
488
489 /* Memory used in a pass.
490 This isn't intended to be absolutely precise. Its intent is only
491 to keep an eye on memory usage. */
492 static int bytes_used;
493
494 /* GCSE substitutions made. */
495 static int gcse_subst_count;
496 /* Number of copy instructions created. */
497 static int gcse_create_count;
498 /* Number of local constants propagated. */
499 static int local_const_prop_count;
500 /* Number of local copies propagated. */
501 static int local_copy_prop_count;
502 /* Number of global constants propagated. */
503 static int global_const_prop_count;
504 /* Number of global copies propagated. */
505 static int global_copy_prop_count;
506 \f
507 /* For available exprs */
508 static sbitmap *ae_kill, *ae_gen;
509 \f
510 static void compute_can_copy (void);
511 static void *gmalloc (size_t) ATTRIBUTE_MALLOC;
512 static void *gcalloc (size_t, size_t) ATTRIBUTE_MALLOC;
513 static void *grealloc (void *, size_t);
514 static void *gcse_alloc (unsigned long);
515 static void alloc_gcse_mem (void);
516 static void free_gcse_mem (void);
517 static void alloc_reg_set_mem (int);
518 static void free_reg_set_mem (void);
519 static void record_one_set (int, rtx);
520 static void record_set_info (rtx, const_rtx, void *);
521 static void compute_sets (void);
522 static void hash_scan_insn (rtx, struct hash_table *, int);
523 static void hash_scan_set (rtx, rtx, struct hash_table *);
524 static void hash_scan_clobber (rtx, rtx, struct hash_table *);
525 static void hash_scan_call (rtx, rtx, struct hash_table *);
526 static int want_to_gcse_p (rtx);
527 static bool can_assign_to_reg_p (rtx);
528 static bool gcse_constant_p (const_rtx);
529 static int oprs_unchanged_p (const_rtx, const_rtx, int);
530 static int oprs_anticipatable_p (const_rtx, const_rtx);
531 static int oprs_available_p (const_rtx, const_rtx);
532 static void insert_expr_in_table (rtx, enum machine_mode, rtx, int, int,
533 struct hash_table *);
534 static void insert_set_in_table (rtx, rtx, struct hash_table *);
535 static unsigned int hash_expr (const_rtx, enum machine_mode, int *, int);
536 static unsigned int hash_set (int, int);
537 static int expr_equiv_p (const_rtx, const_rtx);
538 static void record_last_reg_set_info (rtx, int);
539 static void record_last_mem_set_info (rtx);
540 static void record_last_set_info (rtx, const_rtx, void *);
541 static void compute_hash_table (struct hash_table *);
542 static void alloc_hash_table (int, struct hash_table *, int);
543 static void free_hash_table (struct hash_table *);
544 static void compute_hash_table_work (struct hash_table *);
545 static void dump_hash_table (FILE *, const char *, struct hash_table *);
546 static struct expr *lookup_set (unsigned int, struct hash_table *);
547 static struct expr *next_set (unsigned int, struct expr *);
548 static void reset_opr_set_tables (void);
549 static int oprs_not_set_p (const_rtx, const_rtx);
550 static void mark_call (rtx);
551 static void mark_set (rtx, rtx);
552 static void mark_clobber (rtx, rtx);
553 static void mark_oprs_set (rtx);
554 static void alloc_cprop_mem (int, int);
555 static void free_cprop_mem (void);
556 static void compute_transp (const_rtx, int, sbitmap *, int);
557 static void compute_transpout (void);
558 static void compute_local_properties (sbitmap *, sbitmap *, sbitmap *,
559 struct hash_table *);
560 static void compute_cprop_data (void);
561 static void find_used_regs (rtx *, void *);
562 static int try_replace_reg (rtx, rtx, rtx);
563 static struct expr *find_avail_set (int, rtx);
564 static int cprop_jump (basic_block, rtx, rtx, rtx, rtx);
565 static void mems_conflict_for_gcse_p (rtx, const_rtx, void *);
566 static int load_killed_in_block_p (const_basic_block, int, const_rtx, int);
567 static void canon_list_insert (rtx, const_rtx, void *);
568 static int cprop_insn (rtx, int);
569 static int cprop (int);
570 static void find_implicit_sets (void);
571 static int one_cprop_pass (int, bool, bool);
572 static bool constprop_register (rtx, rtx, rtx, bool);
573 static struct expr *find_bypass_set (int, int);
574 static bool reg_killed_on_edge (const_rtx, const_edge);
575 static int bypass_block (basic_block, rtx, rtx);
576 static int bypass_conditional_jumps (void);
577 static void alloc_pre_mem (int, int);
578 static void free_pre_mem (void);
579 static void compute_pre_data (void);
580 static int pre_expr_reaches_here_p (basic_block, struct expr *,
581 basic_block);
582 static void insert_insn_end_basic_block (struct expr *, basic_block, int);
583 static void pre_insert_copy_insn (struct expr *, rtx);
584 static void pre_insert_copies (void);
585 static int pre_delete (void);
586 static int pre_gcse (void);
587 static int one_pre_gcse_pass (int);
588 static void add_label_notes (rtx, rtx);
589 static void alloc_code_hoist_mem (int, int);
590 static void free_code_hoist_mem (void);
591 static void compute_code_hoist_vbeinout (void);
592 static void compute_code_hoist_data (void);
593 static int hoist_expr_reaches_here_p (basic_block, int, basic_block, char *);
594 static void hoist_code (void);
595 static int one_code_hoisting_pass (void);
596 static rtx process_insert_insn (struct expr *);
597 static int pre_edge_insert (struct edge_list *, struct expr **);
598 static int pre_expr_reaches_here_p_work (basic_block, struct expr *,
599 basic_block, char *);
600 static struct ls_expr * ldst_entry (rtx);
601 static void free_ldst_entry (struct ls_expr *);
602 static void free_ldst_mems (void);
603 static void print_ldst_list (FILE *);
604 static struct ls_expr * find_rtx_in_ldst (rtx);
605 static int enumerate_ldsts (void);
606 static inline struct ls_expr * first_ls_expr (void);
607 static inline struct ls_expr * next_ls_expr (struct ls_expr *);
608 static int simple_mem (const_rtx);
609 static void invalidate_any_buried_refs (rtx);
610 static void compute_ld_motion_mems (void);
611 static void trim_ld_motion_mems (void);
612 static void update_ld_motion_stores (struct expr *);
613 static void reg_set_info (rtx, const_rtx, void *);
614 static void reg_clear_last_set (rtx, const_rtx, void *);
615 static bool store_ops_ok (const_rtx, int *);
616 static rtx extract_mentioned_regs (rtx);
617 static rtx extract_mentioned_regs_helper (rtx, rtx);
618 static void find_moveable_store (rtx, int *, int *);
619 static int compute_store_table (void);
620 static bool load_kills_store (const_rtx, const_rtx, int);
621 static bool find_loads (const_rtx, const_rtx, int);
622 static bool store_killed_in_insn (const_rtx, const_rtx, const_rtx, int);
623 static bool store_killed_after (const_rtx, const_rtx, const_rtx, const_basic_block, int *, rtx *);
624 static bool store_killed_before (const_rtx, const_rtx, const_rtx, const_basic_block, int *);
625 static void build_store_vectors (void);
626 static void insert_insn_start_basic_block (rtx, basic_block);
627 static int insert_store (struct ls_expr *, edge);
628 static void remove_reachable_equiv_notes (basic_block, struct ls_expr *);
629 static void replace_store_insn (rtx, rtx, basic_block, struct ls_expr *);
630 static void delete_store (struct ls_expr *, basic_block);
631 static void free_store_memory (void);
632 static void store_motion (void);
633 static void free_insn_expr_list_list (rtx *);
634 static void clear_modify_mem_tables (void);
635 static void free_modify_mem_tables (void);
636 static rtx gcse_emit_move_after (rtx, rtx, rtx);
637 static void local_cprop_find_used_regs (rtx *, void *);
638 static bool do_local_cprop (rtx, rtx, bool, rtx*);
639 static bool adjust_libcall_notes (rtx, rtx, rtx, rtx*);
640 static void local_cprop_pass (bool);
641 static bool is_too_expensive (const char *);
642 \f
643
644 /* Entry point for global common subexpression elimination.
645 F is the first instruction in the function. Return nonzero if a
646 change is mode. */
647
648 static int
649 gcse_main (rtx f ATTRIBUTE_UNUSED)
650 {
651 int changed, pass;
652 /* Bytes used at start of pass. */
653 int initial_bytes_used;
654 /* Maximum number of bytes used by a pass. */
655 int max_pass_bytes;
656 /* Point to release obstack data from for each pass. */
657 char *gcse_obstack_bottom;
658
659 /* We do not construct an accurate cfg in functions which call
660 setjmp, so just punt to be safe. */
661 if (cfun->calls_setjmp)
662 return 0;
663
664 /* Assume that we do not need to run jump optimizations after gcse. */
665 run_jump_opt_after_gcse = 0;
666
667 /* Identify the basic block information for this function, including
668 successors and predecessors. */
669 max_gcse_regno = max_reg_num ();
670
671 df_note_add_problem ();
672 df_analyze ();
673
674 if (dump_file)
675 dump_flow_info (dump_file, dump_flags);
676
677 /* Return if there's nothing to do, or it is too expensive. */
678 if (n_basic_blocks <= NUM_FIXED_BLOCKS + 1
679 || is_too_expensive (_("GCSE disabled")))
680 return 0;
681
682 gcc_obstack_init (&gcse_obstack);
683 bytes_used = 0;
684
685 /* We need alias. */
686 init_alias_analysis ();
687 /* Record where pseudo-registers are set. This data is kept accurate
688 during each pass. ??? We could also record hard-reg information here
689 [since it's unchanging], however it is currently done during hash table
690 computation.
691
692 It may be tempting to compute MEM set information here too, but MEM sets
693 will be subject to code motion one day and thus we need to compute
694 information about memory sets when we build the hash tables. */
695
696 alloc_reg_set_mem (max_gcse_regno);
697 compute_sets ();
698
699 pass = 0;
700 initial_bytes_used = bytes_used;
701 max_pass_bytes = 0;
702 gcse_obstack_bottom = gcse_alloc (1);
703 changed = 1;
704 while (changed && pass < MAX_GCSE_PASSES)
705 {
706 changed = 0;
707 if (dump_file)
708 fprintf (dump_file, "GCSE pass %d\n\n", pass + 1);
709
710 /* Initialize bytes_used to the space for the pred/succ lists,
711 and the reg_set_table data. */
712 bytes_used = initial_bytes_used;
713
714 /* Each pass may create new registers, so recalculate each time. */
715 max_gcse_regno = max_reg_num ();
716
717 alloc_gcse_mem ();
718
719 /* Don't allow constant propagation to modify jumps
720 during this pass. */
721 if (dbg_cnt (cprop1))
722 {
723 timevar_push (TV_CPROP1);
724 changed = one_cprop_pass (pass + 1, false, false);
725 timevar_pop (TV_CPROP1);
726 }
727
728 if (optimize_size)
729 /* Do nothing. */ ;
730 else
731 {
732 timevar_push (TV_PRE);
733 changed |= one_pre_gcse_pass (pass + 1);
734 /* We may have just created new basic blocks. Release and
735 recompute various things which are sized on the number of
736 basic blocks. */
737 if (changed)
738 {
739 free_modify_mem_tables ();
740 modify_mem_list = gcalloc (last_basic_block, sizeof (rtx));
741 canon_modify_mem_list = gcalloc (last_basic_block, sizeof (rtx));
742 }
743 free_reg_set_mem ();
744 alloc_reg_set_mem (max_reg_num ());
745 compute_sets ();
746 run_jump_opt_after_gcse = 1;
747 timevar_pop (TV_PRE);
748 }
749
750 if (max_pass_bytes < bytes_used)
751 max_pass_bytes = bytes_used;
752
753 /* Free up memory, then reallocate for code hoisting. We can
754 not re-use the existing allocated memory because the tables
755 will not have info for the insns or registers created by
756 partial redundancy elimination. */
757 free_gcse_mem ();
758
759 /* It does not make sense to run code hoisting unless we are optimizing
760 for code size -- it rarely makes programs faster, and can make
761 them bigger if we did partial redundancy elimination (when optimizing
762 for space, we don't run the partial redundancy algorithms). */
763 if (optimize_size)
764 {
765 timevar_push (TV_HOIST);
766 max_gcse_regno = max_reg_num ();
767 alloc_gcse_mem ();
768 changed |= one_code_hoisting_pass ();
769 free_gcse_mem ();
770
771 if (max_pass_bytes < bytes_used)
772 max_pass_bytes = bytes_used;
773 timevar_pop (TV_HOIST);
774 }
775
776 if (dump_file)
777 {
778 fprintf (dump_file, "\n");
779 fflush (dump_file);
780 }
781
782 obstack_free (&gcse_obstack, gcse_obstack_bottom);
783 pass++;
784 }
785
786 /* Do one last pass of copy propagation, including cprop into
787 conditional jumps. */
788
789 if (dbg_cnt (cprop2))
790 {
791 max_gcse_regno = max_reg_num ();
792 alloc_gcse_mem ();
793
794 /* This time, go ahead and allow cprop to alter jumps. */
795 timevar_push (TV_CPROP2);
796 one_cprop_pass (pass + 1, true, true);
797 timevar_pop (TV_CPROP2);
798 free_gcse_mem ();
799 }
800
801 if (dump_file)
802 {
803 fprintf (dump_file, "GCSE of %s: %d basic blocks, ",
804 current_function_name (), n_basic_blocks);
805 fprintf (dump_file, "%d pass%s, %d bytes\n\n",
806 pass, pass > 1 ? "es" : "", max_pass_bytes);
807 }
808
809 obstack_free (&gcse_obstack, NULL);
810 free_reg_set_mem ();
811
812 /* We are finished with alias. */
813 end_alias_analysis ();
814
815 if (!optimize_size && flag_gcse_sm)
816 {
817 timevar_push (TV_LSM);
818 store_motion ();
819 timevar_pop (TV_LSM);
820 }
821
822 /* Record where pseudo-registers are set. */
823 return run_jump_opt_after_gcse;
824 }
825 \f
826 /* Misc. utilities. */
827
828 /* Nonzero for each mode that supports (set (reg) (reg)).
829 This is trivially true for integer and floating point values.
830 It may or may not be true for condition codes. */
831 static char can_copy[(int) NUM_MACHINE_MODES];
832
833 /* Compute which modes support reg/reg copy operations. */
834
835 static void
836 compute_can_copy (void)
837 {
838 int i;
839 #ifndef AVOID_CCMODE_COPIES
840 rtx reg, insn;
841 #endif
842 memset (can_copy, 0, NUM_MACHINE_MODES);
843
844 start_sequence ();
845 for (i = 0; i < NUM_MACHINE_MODES; i++)
846 if (GET_MODE_CLASS (i) == MODE_CC)
847 {
848 #ifdef AVOID_CCMODE_COPIES
849 can_copy[i] = 0;
850 #else
851 reg = gen_rtx_REG ((enum machine_mode) i, LAST_VIRTUAL_REGISTER + 1);
852 insn = emit_insn (gen_rtx_SET (VOIDmode, reg, reg));
853 if (recog (PATTERN (insn), insn, NULL) >= 0)
854 can_copy[i] = 1;
855 #endif
856 }
857 else
858 can_copy[i] = 1;
859
860 end_sequence ();
861 }
862
863 /* Returns whether the mode supports reg/reg copy operations. */
864
865 bool
866 can_copy_p (enum machine_mode mode)
867 {
868 static bool can_copy_init_p = false;
869
870 if (! can_copy_init_p)
871 {
872 compute_can_copy ();
873 can_copy_init_p = true;
874 }
875
876 return can_copy[mode] != 0;
877 }
878 \f
879 /* Cover function to xmalloc to record bytes allocated. */
880
881 static void *
882 gmalloc (size_t size)
883 {
884 bytes_used += size;
885 return xmalloc (size);
886 }
887
888 /* Cover function to xcalloc to record bytes allocated. */
889
890 static void *
891 gcalloc (size_t nelem, size_t elsize)
892 {
893 bytes_used += nelem * elsize;
894 return xcalloc (nelem, elsize);
895 }
896
897 /* Cover function to xrealloc.
898 We don't record the additional size since we don't know it.
899 It won't affect memory usage stats much anyway. */
900
901 static void *
902 grealloc (void *ptr, size_t size)
903 {
904 return xrealloc (ptr, size);
905 }
906
907 /* Cover function to obstack_alloc. */
908
909 static void *
910 gcse_alloc (unsigned long size)
911 {
912 bytes_used += size;
913 return obstack_alloc (&gcse_obstack, size);
914 }
915
916 /* Allocate memory for the cuid mapping array,
917 and reg/memory set tracking tables.
918
919 This is called at the start of each pass. */
920
921 static void
922 alloc_gcse_mem (void)
923 {
924 int i;
925 basic_block bb;
926 rtx insn;
927
928 /* Find the largest UID and create a mapping from UIDs to CUIDs.
929 CUIDs are like UIDs except they increase monotonically, have no gaps,
930 and only apply to real insns.
931 (Actually, there are gaps, for insn that are not inside a basic block.
932 but we should never see those anyway, so this is OK.) */
933
934 max_uid = get_max_uid ();
935 uid_cuid = gcalloc (max_uid + 1, sizeof (int));
936 i = 0;
937 FOR_EACH_BB (bb)
938 FOR_BB_INSNS (bb, insn)
939 {
940 if (INSN_P (insn))
941 uid_cuid[INSN_UID (insn)] = i++;
942 else
943 uid_cuid[INSN_UID (insn)] = i;
944 }
945
946 max_cuid = i;
947
948 /* Allocate vars to track sets of regs. */
949 reg_set_bitmap = BITMAP_ALLOC (NULL);
950
951 /* Allocate vars to track sets of regs, memory per block. */
952 reg_set_in_block = sbitmap_vector_alloc (last_basic_block, max_gcse_regno);
953 /* Allocate array to keep a list of insns which modify memory in each
954 basic block. */
955 modify_mem_list = gcalloc (last_basic_block, sizeof (rtx));
956 canon_modify_mem_list = gcalloc (last_basic_block, sizeof (rtx));
957 modify_mem_list_set = BITMAP_ALLOC (NULL);
958 blocks_with_calls = BITMAP_ALLOC (NULL);
959 }
960
961 /* Free memory allocated by alloc_gcse_mem. */
962
963 static void
964 free_gcse_mem (void)
965 {
966 free (uid_cuid);
967
968 BITMAP_FREE (reg_set_bitmap);
969
970 sbitmap_vector_free (reg_set_in_block);
971 free_modify_mem_tables ();
972 BITMAP_FREE (modify_mem_list_set);
973 BITMAP_FREE (blocks_with_calls);
974 }
975 \f
976 /* Compute the local properties of each recorded expression.
977
978 Local properties are those that are defined by the block, irrespective of
979 other blocks.
980
981 An expression is transparent in a block if its operands are not modified
982 in the block.
983
984 An expression is computed (locally available) in a block if it is computed
985 at least once and expression would contain the same value if the
986 computation was moved to the end of the block.
987
988 An expression is locally anticipatable in a block if it is computed at
989 least once and expression would contain the same value if the computation
990 was moved to the beginning of the block.
991
992 We call this routine for cprop, pre and code hoisting. They all compute
993 basically the same information and thus can easily share this code.
994
995 TRANSP, COMP, and ANTLOC are destination sbitmaps for recording local
996 properties. If NULL, then it is not necessary to compute or record that
997 particular property.
998
999 TABLE controls which hash table to look at. If it is set hash table,
1000 additionally, TRANSP is computed as ~TRANSP, since this is really cprop's
1001 ABSALTERED. */
1002
1003 static void
1004 compute_local_properties (sbitmap *transp, sbitmap *comp, sbitmap *antloc,
1005 struct hash_table *table)
1006 {
1007 unsigned int i;
1008
1009 /* Initialize any bitmaps that were passed in. */
1010 if (transp)
1011 {
1012 if (table->set_p)
1013 sbitmap_vector_zero (transp, last_basic_block);
1014 else
1015 sbitmap_vector_ones (transp, last_basic_block);
1016 }
1017
1018 if (comp)
1019 sbitmap_vector_zero (comp, last_basic_block);
1020 if (antloc)
1021 sbitmap_vector_zero (antloc, last_basic_block);
1022
1023 for (i = 0; i < table->size; i++)
1024 {
1025 struct expr *expr;
1026
1027 for (expr = table->table[i]; expr != NULL; expr = expr->next_same_hash)
1028 {
1029 int indx = expr->bitmap_index;
1030 struct occr *occr;
1031
1032 /* The expression is transparent in this block if it is not killed.
1033 We start by assuming all are transparent [none are killed], and
1034 then reset the bits for those that are. */
1035 if (transp)
1036 compute_transp (expr->expr, indx, transp, table->set_p);
1037
1038 /* The occurrences recorded in antic_occr are exactly those that
1039 we want to set to nonzero in ANTLOC. */
1040 if (antloc)
1041 for (occr = expr->antic_occr; occr != NULL; occr = occr->next)
1042 {
1043 SET_BIT (antloc[BLOCK_NUM (occr->insn)], indx);
1044
1045 /* While we're scanning the table, this is a good place to
1046 initialize this. */
1047 occr->deleted_p = 0;
1048 }
1049
1050 /* The occurrences recorded in avail_occr are exactly those that
1051 we want to set to nonzero in COMP. */
1052 if (comp)
1053 for (occr = expr->avail_occr; occr != NULL; occr = occr->next)
1054 {
1055 SET_BIT (comp[BLOCK_NUM (occr->insn)], indx);
1056
1057 /* While we're scanning the table, this is a good place to
1058 initialize this. */
1059 occr->copied_p = 0;
1060 }
1061
1062 /* While we're scanning the table, this is a good place to
1063 initialize this. */
1064 expr->reaching_reg = 0;
1065 }
1066 }
1067 }
1068 \f
1069 /* Register set information.
1070
1071 `reg_set_table' records where each register is set or otherwise
1072 modified. */
1073
1074 static struct obstack reg_set_obstack;
1075
1076 static void
1077 alloc_reg_set_mem (int n_regs)
1078 {
1079 reg_set_table_size = n_regs + REG_SET_TABLE_SLOP;
1080 reg_set_table = gcalloc (reg_set_table_size, sizeof (struct reg_set *));
1081
1082 gcc_obstack_init (&reg_set_obstack);
1083 }
1084
1085 static void
1086 free_reg_set_mem (void)
1087 {
1088 free (reg_set_table);
1089 obstack_free (&reg_set_obstack, NULL);
1090 }
1091
1092 /* Record REGNO in the reg_set table. */
1093
1094 static void
1095 record_one_set (int regno, rtx insn)
1096 {
1097 /* Allocate a new reg_set element and link it onto the list. */
1098 struct reg_set *new_reg_info;
1099
1100 /* If the table isn't big enough, enlarge it. */
1101 if (regno >= reg_set_table_size)
1102 {
1103 int new_size = regno + REG_SET_TABLE_SLOP;
1104
1105 reg_set_table = grealloc (reg_set_table,
1106 new_size * sizeof (struct reg_set *));
1107 memset (reg_set_table + reg_set_table_size, 0,
1108 (new_size - reg_set_table_size) * sizeof (struct reg_set *));
1109 reg_set_table_size = new_size;
1110 }
1111
1112 new_reg_info = obstack_alloc (&reg_set_obstack, sizeof (struct reg_set));
1113 bytes_used += sizeof (struct reg_set);
1114 new_reg_info->bb_index = BLOCK_NUM (insn);
1115 new_reg_info->next = reg_set_table[regno];
1116 reg_set_table[regno] = new_reg_info;
1117 }
1118
1119 /* Called from compute_sets via note_stores to handle one SET or CLOBBER in
1120 an insn. The DATA is really the instruction in which the SET is
1121 occurring. */
1122
1123 static void
1124 record_set_info (rtx dest, const_rtx setter ATTRIBUTE_UNUSED, void *data)
1125 {
1126 rtx record_set_insn = (rtx) data;
1127
1128 if (REG_P (dest) && REGNO (dest) >= FIRST_PSEUDO_REGISTER)
1129 record_one_set (REGNO (dest), record_set_insn);
1130 }
1131
1132 /* Scan the function and record each set of each pseudo-register.
1133
1134 This is called once, at the start of the gcse pass. See the comments for
1135 `reg_set_table' for further documentation. */
1136
1137 static void
1138 compute_sets (void)
1139 {
1140 basic_block bb;
1141 rtx insn;
1142
1143 FOR_EACH_BB (bb)
1144 FOR_BB_INSNS (bb, insn)
1145 if (INSN_P (insn))
1146 note_stores (PATTERN (insn), record_set_info, insn);
1147 }
1148 \f
1149 /* Hash table support. */
1150
1151 struct reg_avail_info
1152 {
1153 basic_block last_bb;
1154 int first_set;
1155 int last_set;
1156 };
1157
1158 static struct reg_avail_info *reg_avail_info;
1159 static basic_block current_bb;
1160
1161
1162 /* See whether X, the source of a set, is something we want to consider for
1163 GCSE. */
1164
1165 static int
1166 want_to_gcse_p (rtx x)
1167 {
1168 #ifdef STACK_REGS
1169 /* On register stack architectures, don't GCSE constants from the
1170 constant pool, as the benefits are often swamped by the overhead
1171 of shuffling the register stack between basic blocks. */
1172 if (IS_STACK_MODE (GET_MODE (x)))
1173 x = avoid_constant_pool_reference (x);
1174 #endif
1175
1176 switch (GET_CODE (x))
1177 {
1178 case REG:
1179 case SUBREG:
1180 case CONST_INT:
1181 case CONST_DOUBLE:
1182 case CONST_FIXED:
1183 case CONST_VECTOR:
1184 case CALL:
1185 return 0;
1186
1187 default:
1188 return can_assign_to_reg_p (x);
1189 }
1190 }
1191
1192 /* Used internally by can_assign_to_reg_p. */
1193
1194 static GTY(()) rtx test_insn;
1195
1196 /* Return true if we can assign X to a pseudo register. */
1197
1198 static bool
1199 can_assign_to_reg_p (rtx x)
1200 {
1201 int num_clobbers = 0;
1202 int icode;
1203
1204 /* If this is a valid operand, we are OK. If it's VOIDmode, we aren't. */
1205 if (general_operand (x, GET_MODE (x)))
1206 return 1;
1207 else if (GET_MODE (x) == VOIDmode)
1208 return 0;
1209
1210 /* Otherwise, check if we can make a valid insn from it. First initialize
1211 our test insn if we haven't already. */
1212 if (test_insn == 0)
1213 {
1214 test_insn
1215 = make_insn_raw (gen_rtx_SET (VOIDmode,
1216 gen_rtx_REG (word_mode,
1217 FIRST_PSEUDO_REGISTER * 2),
1218 const0_rtx));
1219 NEXT_INSN (test_insn) = PREV_INSN (test_insn) = 0;
1220 }
1221
1222 /* Now make an insn like the one we would make when GCSE'ing and see if
1223 valid. */
1224 PUT_MODE (SET_DEST (PATTERN (test_insn)), GET_MODE (x));
1225 SET_SRC (PATTERN (test_insn)) = x;
1226 return ((icode = recog (PATTERN (test_insn), test_insn, &num_clobbers)) >= 0
1227 && (num_clobbers == 0 || ! added_clobbers_hard_reg_p (icode)));
1228 }
1229
1230 /* Return nonzero if the operands of expression X are unchanged from the
1231 start of INSN's basic block up to but not including INSN (if AVAIL_P == 0),
1232 or from INSN to the end of INSN's basic block (if AVAIL_P != 0). */
1233
1234 static int
1235 oprs_unchanged_p (const_rtx x, const_rtx insn, int avail_p)
1236 {
1237 int i, j;
1238 enum rtx_code code;
1239 const char *fmt;
1240
1241 if (x == 0)
1242 return 1;
1243
1244 code = GET_CODE (x);
1245 switch (code)
1246 {
1247 case REG:
1248 {
1249 struct reg_avail_info *info = &reg_avail_info[REGNO (x)];
1250
1251 if (info->last_bb != current_bb)
1252 return 1;
1253 if (avail_p)
1254 return info->last_set < INSN_CUID (insn);
1255 else
1256 return info->first_set >= INSN_CUID (insn);
1257 }
1258
1259 case MEM:
1260 if (load_killed_in_block_p (current_bb, INSN_CUID (insn),
1261 x, avail_p))
1262 return 0;
1263 else
1264 return oprs_unchanged_p (XEXP (x, 0), insn, avail_p);
1265
1266 case PRE_DEC:
1267 case PRE_INC:
1268 case POST_DEC:
1269 case POST_INC:
1270 case PRE_MODIFY:
1271 case POST_MODIFY:
1272 return 0;
1273
1274 case PC:
1275 case CC0: /*FIXME*/
1276 case CONST:
1277 case CONST_INT:
1278 case CONST_DOUBLE:
1279 case CONST_FIXED:
1280 case CONST_VECTOR:
1281 case SYMBOL_REF:
1282 case LABEL_REF:
1283 case ADDR_VEC:
1284 case ADDR_DIFF_VEC:
1285 return 1;
1286
1287 default:
1288 break;
1289 }
1290
1291 for (i = GET_RTX_LENGTH (code) - 1, fmt = GET_RTX_FORMAT (code); i >= 0; i--)
1292 {
1293 if (fmt[i] == 'e')
1294 {
1295 /* If we are about to do the last recursive call needed at this
1296 level, change it into iteration. This function is called enough
1297 to be worth it. */
1298 if (i == 0)
1299 return oprs_unchanged_p (XEXP (x, i), insn, avail_p);
1300
1301 else if (! oprs_unchanged_p (XEXP (x, i), insn, avail_p))
1302 return 0;
1303 }
1304 else if (fmt[i] == 'E')
1305 for (j = 0; j < XVECLEN (x, i); j++)
1306 if (! oprs_unchanged_p (XVECEXP (x, i, j), insn, avail_p))
1307 return 0;
1308 }
1309
1310 return 1;
1311 }
1312
1313 /* Used for communication between mems_conflict_for_gcse_p and
1314 load_killed_in_block_p. Nonzero if mems_conflict_for_gcse_p finds a
1315 conflict between two memory references. */
1316 static int gcse_mems_conflict_p;
1317
1318 /* Used for communication between mems_conflict_for_gcse_p and
1319 load_killed_in_block_p. A memory reference for a load instruction,
1320 mems_conflict_for_gcse_p will see if a memory store conflicts with
1321 this memory load. */
1322 static const_rtx gcse_mem_operand;
1323
1324 /* DEST is the output of an instruction. If it is a memory reference, and
1325 possibly conflicts with the load found in gcse_mem_operand, then set
1326 gcse_mems_conflict_p to a nonzero value. */
1327
1328 static void
1329 mems_conflict_for_gcse_p (rtx dest, const_rtx setter ATTRIBUTE_UNUSED,
1330 void *data ATTRIBUTE_UNUSED)
1331 {
1332 while (GET_CODE (dest) == SUBREG
1333 || GET_CODE (dest) == ZERO_EXTRACT
1334 || GET_CODE (dest) == STRICT_LOW_PART)
1335 dest = XEXP (dest, 0);
1336
1337 /* If DEST is not a MEM, then it will not conflict with the load. Note
1338 that function calls are assumed to clobber memory, but are handled
1339 elsewhere. */
1340 if (! MEM_P (dest))
1341 return;
1342
1343 /* If we are setting a MEM in our list of specially recognized MEMs,
1344 don't mark as killed this time. */
1345
1346 if (expr_equiv_p (dest, gcse_mem_operand) && pre_ldst_mems != NULL)
1347 {
1348 if (!find_rtx_in_ldst (dest))
1349 gcse_mems_conflict_p = 1;
1350 return;
1351 }
1352
1353 if (true_dependence (dest, GET_MODE (dest), gcse_mem_operand,
1354 rtx_addr_varies_p))
1355 gcse_mems_conflict_p = 1;
1356 }
1357
1358 /* Return nonzero if the expression in X (a memory reference) is killed
1359 in block BB before or after the insn with the CUID in UID_LIMIT.
1360 AVAIL_P is nonzero for kills after UID_LIMIT, and zero for kills
1361 before UID_LIMIT.
1362
1363 To check the entire block, set UID_LIMIT to max_uid + 1 and
1364 AVAIL_P to 0. */
1365
1366 static int
1367 load_killed_in_block_p (const_basic_block bb, int uid_limit, const_rtx x, int avail_p)
1368 {
1369 rtx list_entry = modify_mem_list[bb->index];
1370
1371 /* If this is a readonly then we aren't going to be changing it. */
1372 if (MEM_READONLY_P (x))
1373 return 0;
1374
1375 while (list_entry)
1376 {
1377 rtx setter;
1378 /* Ignore entries in the list that do not apply. */
1379 if ((avail_p
1380 && INSN_CUID (XEXP (list_entry, 0)) < uid_limit)
1381 || (! avail_p
1382 && INSN_CUID (XEXP (list_entry, 0)) > uid_limit))
1383 {
1384 list_entry = XEXP (list_entry, 1);
1385 continue;
1386 }
1387
1388 setter = XEXP (list_entry, 0);
1389
1390 /* If SETTER is a call everything is clobbered. Note that calls
1391 to pure functions are never put on the list, so we need not
1392 worry about them. */
1393 if (CALL_P (setter))
1394 return 1;
1395
1396 /* SETTER must be an INSN of some kind that sets memory. Call
1397 note_stores to examine each hunk of memory that is modified.
1398
1399 The note_stores interface is pretty limited, so we have to
1400 communicate via global variables. Yuk. */
1401 gcse_mem_operand = x;
1402 gcse_mems_conflict_p = 0;
1403 note_stores (PATTERN (setter), mems_conflict_for_gcse_p, NULL);
1404 if (gcse_mems_conflict_p)
1405 return 1;
1406 list_entry = XEXP (list_entry, 1);
1407 }
1408 return 0;
1409 }
1410
1411 /* Return nonzero if the operands of expression X are unchanged from
1412 the start of INSN's basic block up to but not including INSN. */
1413
1414 static int
1415 oprs_anticipatable_p (const_rtx x, const_rtx insn)
1416 {
1417 return oprs_unchanged_p (x, insn, 0);
1418 }
1419
1420 /* Return nonzero if the operands of expression X are unchanged from
1421 INSN to the end of INSN's basic block. */
1422
1423 static int
1424 oprs_available_p (const_rtx x, const_rtx insn)
1425 {
1426 return oprs_unchanged_p (x, insn, 1);
1427 }
1428
1429 /* Hash expression X.
1430
1431 MODE is only used if X is a CONST_INT. DO_NOT_RECORD_P is a boolean
1432 indicating if a volatile operand is found or if the expression contains
1433 something we don't want to insert in the table. HASH_TABLE_SIZE is
1434 the current size of the hash table to be probed. */
1435
1436 static unsigned int
1437 hash_expr (const_rtx x, enum machine_mode mode, int *do_not_record_p,
1438 int hash_table_size)
1439 {
1440 unsigned int hash;
1441
1442 *do_not_record_p = 0;
1443
1444 hash = hash_rtx (x, mode, do_not_record_p,
1445 NULL, /*have_reg_qty=*/false);
1446 return hash % hash_table_size;
1447 }
1448
1449 /* Hash a set of register REGNO.
1450
1451 Sets are hashed on the register that is set. This simplifies the PRE copy
1452 propagation code.
1453
1454 ??? May need to make things more elaborate. Later, as necessary. */
1455
1456 static unsigned int
1457 hash_set (int regno, int hash_table_size)
1458 {
1459 unsigned int hash;
1460
1461 hash = regno;
1462 return hash % hash_table_size;
1463 }
1464
1465 /* Return nonzero if exp1 is equivalent to exp2. */
1466
1467 static int
1468 expr_equiv_p (const_rtx x, const_rtx y)
1469 {
1470 return exp_equiv_p (x, y, 0, true);
1471 }
1472
1473 /* Insert expression X in INSN in the hash TABLE.
1474 If it is already present, record it as the last occurrence in INSN's
1475 basic block.
1476
1477 MODE is the mode of the value X is being stored into.
1478 It is only used if X is a CONST_INT.
1479
1480 ANTIC_P is nonzero if X is an anticipatable expression.
1481 AVAIL_P is nonzero if X is an available expression. */
1482
1483 static void
1484 insert_expr_in_table (rtx x, enum machine_mode mode, rtx insn, int antic_p,
1485 int avail_p, struct hash_table *table)
1486 {
1487 int found, do_not_record_p;
1488 unsigned int hash;
1489 struct expr *cur_expr, *last_expr = NULL;
1490 struct occr *antic_occr, *avail_occr;
1491
1492 hash = hash_expr (x, mode, &do_not_record_p, table->size);
1493
1494 /* Do not insert expression in table if it contains volatile operands,
1495 or if hash_expr determines the expression is something we don't want
1496 to or can't handle. */
1497 if (do_not_record_p)
1498 return;
1499
1500 cur_expr = table->table[hash];
1501 found = 0;
1502
1503 while (cur_expr && 0 == (found = expr_equiv_p (cur_expr->expr, x)))
1504 {
1505 /* If the expression isn't found, save a pointer to the end of
1506 the list. */
1507 last_expr = cur_expr;
1508 cur_expr = cur_expr->next_same_hash;
1509 }
1510
1511 if (! found)
1512 {
1513 cur_expr = gcse_alloc (sizeof (struct expr));
1514 bytes_used += sizeof (struct expr);
1515 if (table->table[hash] == NULL)
1516 /* This is the first pattern that hashed to this index. */
1517 table->table[hash] = cur_expr;
1518 else
1519 /* Add EXPR to end of this hash chain. */
1520 last_expr->next_same_hash = cur_expr;
1521
1522 /* Set the fields of the expr element. */
1523 cur_expr->expr = x;
1524 cur_expr->bitmap_index = table->n_elems++;
1525 cur_expr->next_same_hash = NULL;
1526 cur_expr->antic_occr = NULL;
1527 cur_expr->avail_occr = NULL;
1528 }
1529
1530 /* Now record the occurrence(s). */
1531 if (antic_p)
1532 {
1533 antic_occr = cur_expr->antic_occr;
1534
1535 if (antic_occr && BLOCK_NUM (antic_occr->insn) != BLOCK_NUM (insn))
1536 antic_occr = NULL;
1537
1538 if (antic_occr)
1539 /* Found another instance of the expression in the same basic block.
1540 Prefer the currently recorded one. We want the first one in the
1541 block and the block is scanned from start to end. */
1542 ; /* nothing to do */
1543 else
1544 {
1545 /* First occurrence of this expression in this basic block. */
1546 antic_occr = gcse_alloc (sizeof (struct occr));
1547 bytes_used += sizeof (struct occr);
1548 antic_occr->insn = insn;
1549 antic_occr->next = cur_expr->antic_occr;
1550 antic_occr->deleted_p = 0;
1551 cur_expr->antic_occr = antic_occr;
1552 }
1553 }
1554
1555 if (avail_p)
1556 {
1557 avail_occr = cur_expr->avail_occr;
1558
1559 if (avail_occr && BLOCK_NUM (avail_occr->insn) == BLOCK_NUM (insn))
1560 {
1561 /* Found another instance of the expression in the same basic block.
1562 Prefer this occurrence to the currently recorded one. We want
1563 the last one in the block and the block is scanned from start
1564 to end. */
1565 avail_occr->insn = insn;
1566 }
1567 else
1568 {
1569 /* First occurrence of this expression in this basic block. */
1570 avail_occr = gcse_alloc (sizeof (struct occr));
1571 bytes_used += sizeof (struct occr);
1572 avail_occr->insn = insn;
1573 avail_occr->next = cur_expr->avail_occr;
1574 avail_occr->deleted_p = 0;
1575 cur_expr->avail_occr = avail_occr;
1576 }
1577 }
1578 }
1579
1580 /* Insert pattern X in INSN in the hash table.
1581 X is a SET of a reg to either another reg or a constant.
1582 If it is already present, record it as the last occurrence in INSN's
1583 basic block. */
1584
1585 static void
1586 insert_set_in_table (rtx x, rtx insn, struct hash_table *table)
1587 {
1588 int found;
1589 unsigned int hash;
1590 struct expr *cur_expr, *last_expr = NULL;
1591 struct occr *cur_occr;
1592
1593 gcc_assert (GET_CODE (x) == SET && REG_P (SET_DEST (x)));
1594
1595 hash = hash_set (REGNO (SET_DEST (x)), table->size);
1596
1597 cur_expr = table->table[hash];
1598 found = 0;
1599
1600 while (cur_expr && 0 == (found = expr_equiv_p (cur_expr->expr, x)))
1601 {
1602 /* If the expression isn't found, save a pointer to the end of
1603 the list. */
1604 last_expr = cur_expr;
1605 cur_expr = cur_expr->next_same_hash;
1606 }
1607
1608 if (! found)
1609 {
1610 cur_expr = gcse_alloc (sizeof (struct expr));
1611 bytes_used += sizeof (struct expr);
1612 if (table->table[hash] == NULL)
1613 /* This is the first pattern that hashed to this index. */
1614 table->table[hash] = cur_expr;
1615 else
1616 /* Add EXPR to end of this hash chain. */
1617 last_expr->next_same_hash = cur_expr;
1618
1619 /* Set the fields of the expr element.
1620 We must copy X because it can be modified when copy propagation is
1621 performed on its operands. */
1622 cur_expr->expr = copy_rtx (x);
1623 cur_expr->bitmap_index = table->n_elems++;
1624 cur_expr->next_same_hash = NULL;
1625 cur_expr->antic_occr = NULL;
1626 cur_expr->avail_occr = NULL;
1627 }
1628
1629 /* Now record the occurrence. */
1630 cur_occr = cur_expr->avail_occr;
1631
1632 if (cur_occr && BLOCK_NUM (cur_occr->insn) == BLOCK_NUM (insn))
1633 {
1634 /* Found another instance of the expression in the same basic block.
1635 Prefer this occurrence to the currently recorded one. We want
1636 the last one in the block and the block is scanned from start
1637 to end. */
1638 cur_occr->insn = insn;
1639 }
1640 else
1641 {
1642 /* First occurrence of this expression in this basic block. */
1643 cur_occr = gcse_alloc (sizeof (struct occr));
1644 bytes_used += sizeof (struct occr);
1645
1646 cur_occr->insn = insn;
1647 cur_occr->next = cur_expr->avail_occr;
1648 cur_occr->deleted_p = 0;
1649 cur_expr->avail_occr = cur_occr;
1650 }
1651 }
1652
1653 /* Determine whether the rtx X should be treated as a constant for
1654 the purposes of GCSE's constant propagation. */
1655
1656 static bool
1657 gcse_constant_p (const_rtx x)
1658 {
1659 /* Consider a COMPARE of two integers constant. */
1660 if (GET_CODE (x) == COMPARE
1661 && GET_CODE (XEXP (x, 0)) == CONST_INT
1662 && GET_CODE (XEXP (x, 1)) == CONST_INT)
1663 return true;
1664
1665 /* Consider a COMPARE of the same registers is a constant
1666 if they are not floating point registers. */
1667 if (GET_CODE(x) == COMPARE
1668 && REG_P (XEXP (x, 0)) && REG_P (XEXP (x, 1))
1669 && REGNO (XEXP (x, 0)) == REGNO (XEXP (x, 1))
1670 && ! FLOAT_MODE_P (GET_MODE (XEXP (x, 0)))
1671 && ! FLOAT_MODE_P (GET_MODE (XEXP (x, 1))))
1672 return true;
1673
1674 return CONSTANT_P (x);
1675 }
1676
1677 /* Scan pattern PAT of INSN and add an entry to the hash TABLE (set or
1678 expression one). */
1679
1680 static void
1681 hash_scan_set (rtx pat, rtx insn, struct hash_table *table)
1682 {
1683 rtx src = SET_SRC (pat);
1684 rtx dest = SET_DEST (pat);
1685 rtx note;
1686
1687 if (GET_CODE (src) == CALL)
1688 hash_scan_call (src, insn, table);
1689
1690 else if (REG_P (dest))
1691 {
1692 unsigned int regno = REGNO (dest);
1693 rtx tmp;
1694
1695 /* See if a REG_NOTE shows this equivalent to a simpler expression.
1696 This allows us to do a single GCSE pass and still eliminate
1697 redundant constants, addresses or other expressions that are
1698 constructed with multiple instructions. */
1699 note = find_reg_equal_equiv_note (insn);
1700 if (note != 0
1701 && (table->set_p
1702 ? gcse_constant_p (XEXP (note, 0))
1703 : want_to_gcse_p (XEXP (note, 0))))
1704 src = XEXP (note, 0), pat = gen_rtx_SET (VOIDmode, dest, src);
1705
1706 /* Only record sets of pseudo-regs in the hash table. */
1707 if (! table->set_p
1708 && regno >= FIRST_PSEUDO_REGISTER
1709 /* Don't GCSE something if we can't do a reg/reg copy. */
1710 && can_copy_p (GET_MODE (dest))
1711 /* GCSE commonly inserts instruction after the insn. We can't
1712 do that easily for EH_REGION notes so disable GCSE on these
1713 for now. */
1714 && !find_reg_note (insn, REG_EH_REGION, NULL_RTX)
1715 /* Is SET_SRC something we want to gcse? */
1716 && want_to_gcse_p (src)
1717 /* Don't CSE a nop. */
1718 && ! set_noop_p (pat)
1719 /* Don't GCSE if it has attached REG_EQUIV note.
1720 At this point this only function parameters should have
1721 REG_EQUIV notes and if the argument slot is used somewhere
1722 explicitly, it means address of parameter has been taken,
1723 so we should not extend the lifetime of the pseudo. */
1724 && (note == NULL_RTX || ! MEM_P (XEXP (note, 0))))
1725 {
1726 /* An expression is not anticipatable if its operands are
1727 modified before this insn or if this is not the only SET in
1728 this insn. The latter condition does not have to mean that
1729 SRC itself is not anticipatable, but we just will not be
1730 able to handle code motion of insns with multiple sets. */
1731 int antic_p = oprs_anticipatable_p (src, insn)
1732 && !multiple_sets (insn);
1733 /* An expression is not available if its operands are
1734 subsequently modified, including this insn. It's also not
1735 available if this is a branch, because we can't insert
1736 a set after the branch. */
1737 int avail_p = (oprs_available_p (src, insn)
1738 && ! JUMP_P (insn));
1739
1740 insert_expr_in_table (src, GET_MODE (dest), insn, antic_p, avail_p, table);
1741 }
1742
1743 /* Record sets for constant/copy propagation. */
1744 else if (table->set_p
1745 && regno >= FIRST_PSEUDO_REGISTER
1746 && ((REG_P (src)
1747 && REGNO (src) >= FIRST_PSEUDO_REGISTER
1748 && can_copy_p (GET_MODE (dest))
1749 && REGNO (src) != regno)
1750 || gcse_constant_p (src))
1751 /* A copy is not available if its src or dest is subsequently
1752 modified. Here we want to search from INSN+1 on, but
1753 oprs_available_p searches from INSN on. */
1754 && (insn == BB_END (BLOCK_FOR_INSN (insn))
1755 || (tmp = next_nonnote_insn (insn)) == NULL_RTX
1756 || BLOCK_FOR_INSN (tmp) != BLOCK_FOR_INSN (insn)
1757 || oprs_available_p (pat, tmp)))
1758 insert_set_in_table (pat, insn, table);
1759 }
1760 /* In case of store we want to consider the memory value as available in
1761 the REG stored in that memory. This makes it possible to remove
1762 redundant loads from due to stores to the same location. */
1763 else if (flag_gcse_las && REG_P (src) && MEM_P (dest))
1764 {
1765 unsigned int regno = REGNO (src);
1766
1767 /* Do not do this for constant/copy propagation. */
1768 if (! table->set_p
1769 /* Only record sets of pseudo-regs in the hash table. */
1770 && regno >= FIRST_PSEUDO_REGISTER
1771 /* Don't GCSE something if we can't do a reg/reg copy. */
1772 && can_copy_p (GET_MODE (src))
1773 /* GCSE commonly inserts instruction after the insn. We can't
1774 do that easily for EH_REGION notes so disable GCSE on these
1775 for now. */
1776 && ! find_reg_note (insn, REG_EH_REGION, NULL_RTX)
1777 /* Is SET_DEST something we want to gcse? */
1778 && want_to_gcse_p (dest)
1779 /* Don't CSE a nop. */
1780 && ! set_noop_p (pat)
1781 /* Don't GCSE if it has attached REG_EQUIV note.
1782 At this point this only function parameters should have
1783 REG_EQUIV notes and if the argument slot is used somewhere
1784 explicitly, it means address of parameter has been taken,
1785 so we should not extend the lifetime of the pseudo. */
1786 && ((note = find_reg_note (insn, REG_EQUIV, NULL_RTX)) == 0
1787 || ! MEM_P (XEXP (note, 0))))
1788 {
1789 /* Stores are never anticipatable. */
1790 int antic_p = 0;
1791 /* An expression is not available if its operands are
1792 subsequently modified, including this insn. It's also not
1793 available if this is a branch, because we can't insert
1794 a set after the branch. */
1795 int avail_p = oprs_available_p (dest, insn)
1796 && ! JUMP_P (insn);
1797
1798 /* Record the memory expression (DEST) in the hash table. */
1799 insert_expr_in_table (dest, GET_MODE (dest), insn,
1800 antic_p, avail_p, table);
1801 }
1802 }
1803 }
1804
1805 static void
1806 hash_scan_clobber (rtx x ATTRIBUTE_UNUSED, rtx insn ATTRIBUTE_UNUSED,
1807 struct hash_table *table ATTRIBUTE_UNUSED)
1808 {
1809 /* Currently nothing to do. */
1810 }
1811
1812 static void
1813 hash_scan_call (rtx x ATTRIBUTE_UNUSED, rtx insn ATTRIBUTE_UNUSED,
1814 struct hash_table *table ATTRIBUTE_UNUSED)
1815 {
1816 /* Currently nothing to do. */
1817 }
1818
1819 /* Process INSN and add hash table entries as appropriate.
1820
1821 Only available expressions that set a single pseudo-reg are recorded.
1822
1823 Single sets in a PARALLEL could be handled, but it's an extra complication
1824 that isn't dealt with right now. The trick is handling the CLOBBERs that
1825 are also in the PARALLEL. Later.
1826
1827 If SET_P is nonzero, this is for the assignment hash table,
1828 otherwise it is for the expression hash table.
1829 If IN_LIBCALL_BLOCK nonzero, we are in a libcall block, and should
1830 not record any expressions. */
1831
1832 static void
1833 hash_scan_insn (rtx insn, struct hash_table *table, int in_libcall_block)
1834 {
1835 rtx pat = PATTERN (insn);
1836 int i;
1837
1838 if (in_libcall_block)
1839 return;
1840
1841 /* Pick out the sets of INSN and for other forms of instructions record
1842 what's been modified. */
1843
1844 if (GET_CODE (pat) == SET)
1845 hash_scan_set (pat, insn, table);
1846 else if (GET_CODE (pat) == PARALLEL)
1847 for (i = 0; i < XVECLEN (pat, 0); i++)
1848 {
1849 rtx x = XVECEXP (pat, 0, i);
1850
1851 if (GET_CODE (x) == SET)
1852 hash_scan_set (x, insn, table);
1853 else if (GET_CODE (x) == CLOBBER)
1854 hash_scan_clobber (x, insn, table);
1855 else if (GET_CODE (x) == CALL)
1856 hash_scan_call (x, insn, table);
1857 }
1858
1859 else if (GET_CODE (pat) == CLOBBER)
1860 hash_scan_clobber (pat, insn, table);
1861 else if (GET_CODE (pat) == CALL)
1862 hash_scan_call (pat, insn, table);
1863 }
1864
1865 static void
1866 dump_hash_table (FILE *file, const char *name, struct hash_table *table)
1867 {
1868 int i;
1869 /* Flattened out table, so it's printed in proper order. */
1870 struct expr **flat_table;
1871 unsigned int *hash_val;
1872 struct expr *expr;
1873
1874 flat_table = xcalloc (table->n_elems, sizeof (struct expr *));
1875 hash_val = xmalloc (table->n_elems * sizeof (unsigned int));
1876
1877 for (i = 0; i < (int) table->size; i++)
1878 for (expr = table->table[i]; expr != NULL; expr = expr->next_same_hash)
1879 {
1880 flat_table[expr->bitmap_index] = expr;
1881 hash_val[expr->bitmap_index] = i;
1882 }
1883
1884 fprintf (file, "%s hash table (%d buckets, %d entries)\n",
1885 name, table->size, table->n_elems);
1886
1887 for (i = 0; i < (int) table->n_elems; i++)
1888 if (flat_table[i] != 0)
1889 {
1890 expr = flat_table[i];
1891 fprintf (file, "Index %d (hash value %d)\n ",
1892 expr->bitmap_index, hash_val[i]);
1893 print_rtl (file, expr->expr);
1894 fprintf (file, "\n");
1895 }
1896
1897 fprintf (file, "\n");
1898
1899 free (flat_table);
1900 free (hash_val);
1901 }
1902
1903 /* Record register first/last/block set information for REGNO in INSN.
1904
1905 first_set records the first place in the block where the register
1906 is set and is used to compute "anticipatability".
1907
1908 last_set records the last place in the block where the register
1909 is set and is used to compute "availability".
1910
1911 last_bb records the block for which first_set and last_set are
1912 valid, as a quick test to invalidate them.
1913
1914 reg_set_in_block records whether the register is set in the block
1915 and is used to compute "transparency". */
1916
1917 static void
1918 record_last_reg_set_info (rtx insn, int regno)
1919 {
1920 struct reg_avail_info *info = &reg_avail_info[regno];
1921 int cuid = INSN_CUID (insn);
1922
1923 info->last_set = cuid;
1924 if (info->last_bb != current_bb)
1925 {
1926 info->last_bb = current_bb;
1927 info->first_set = cuid;
1928 SET_BIT (reg_set_in_block[current_bb->index], regno);
1929 }
1930 }
1931
1932
1933 /* Record all of the canonicalized MEMs of record_last_mem_set_info's insn.
1934 Note we store a pair of elements in the list, so they have to be
1935 taken off pairwise. */
1936
1937 static void
1938 canon_list_insert (rtx dest ATTRIBUTE_UNUSED, const_rtx unused1 ATTRIBUTE_UNUSED,
1939 void * v_insn)
1940 {
1941 rtx dest_addr, insn;
1942 int bb;
1943
1944 while (GET_CODE (dest) == SUBREG
1945 || GET_CODE (dest) == ZERO_EXTRACT
1946 || GET_CODE (dest) == STRICT_LOW_PART)
1947 dest = XEXP (dest, 0);
1948
1949 /* If DEST is not a MEM, then it will not conflict with a load. Note
1950 that function calls are assumed to clobber memory, but are handled
1951 elsewhere. */
1952
1953 if (! MEM_P (dest))
1954 return;
1955
1956 dest_addr = get_addr (XEXP (dest, 0));
1957 dest_addr = canon_rtx (dest_addr);
1958 insn = (rtx) v_insn;
1959 bb = BLOCK_NUM (insn);
1960
1961 canon_modify_mem_list[bb] =
1962 alloc_EXPR_LIST (VOIDmode, dest_addr, canon_modify_mem_list[bb]);
1963 canon_modify_mem_list[bb] =
1964 alloc_EXPR_LIST (VOIDmode, dest, canon_modify_mem_list[bb]);
1965 }
1966
1967 /* Record memory modification information for INSN. We do not actually care
1968 about the memory location(s) that are set, or even how they are set (consider
1969 a CALL_INSN). We merely need to record which insns modify memory. */
1970
1971 static void
1972 record_last_mem_set_info (rtx insn)
1973 {
1974 int bb = BLOCK_NUM (insn);
1975
1976 /* load_killed_in_block_p will handle the case of calls clobbering
1977 everything. */
1978 modify_mem_list[bb] = alloc_INSN_LIST (insn, modify_mem_list[bb]);
1979 bitmap_set_bit (modify_mem_list_set, bb);
1980
1981 if (CALL_P (insn))
1982 {
1983 /* Note that traversals of this loop (other than for free-ing)
1984 will break after encountering a CALL_INSN. So, there's no
1985 need to insert a pair of items, as canon_list_insert does. */
1986 canon_modify_mem_list[bb] =
1987 alloc_INSN_LIST (insn, canon_modify_mem_list[bb]);
1988 bitmap_set_bit (blocks_with_calls, bb);
1989 }
1990 else
1991 note_stores (PATTERN (insn), canon_list_insert, (void*) insn);
1992 }
1993
1994 /* Called from compute_hash_table via note_stores to handle one
1995 SET or CLOBBER in an insn. DATA is really the instruction in which
1996 the SET is taking place. */
1997
1998 static void
1999 record_last_set_info (rtx dest, const_rtx setter ATTRIBUTE_UNUSED, void *data)
2000 {
2001 rtx last_set_insn = (rtx) data;
2002
2003 if (GET_CODE (dest) == SUBREG)
2004 dest = SUBREG_REG (dest);
2005
2006 if (REG_P (dest))
2007 record_last_reg_set_info (last_set_insn, REGNO (dest));
2008 else if (MEM_P (dest)
2009 /* Ignore pushes, they clobber nothing. */
2010 && ! push_operand (dest, GET_MODE (dest)))
2011 record_last_mem_set_info (last_set_insn);
2012 }
2013
2014 /* Top level function to create an expression or assignment hash table.
2015
2016 Expression entries are placed in the hash table if
2017 - they are of the form (set (pseudo-reg) src),
2018 - src is something we want to perform GCSE on,
2019 - none of the operands are subsequently modified in the block
2020
2021 Assignment entries are placed in the hash table if
2022 - they are of the form (set (pseudo-reg) src),
2023 - src is something we want to perform const/copy propagation on,
2024 - none of the operands or target are subsequently modified in the block
2025
2026 Currently src must be a pseudo-reg or a const_int.
2027
2028 TABLE is the table computed. */
2029
2030 static void
2031 compute_hash_table_work (struct hash_table *table)
2032 {
2033 unsigned int i;
2034
2035 /* While we compute the hash table we also compute a bit array of which
2036 registers are set in which blocks.
2037 ??? This isn't needed during const/copy propagation, but it's cheap to
2038 compute. Later. */
2039 sbitmap_vector_zero (reg_set_in_block, last_basic_block);
2040
2041 /* re-Cache any INSN_LIST nodes we have allocated. */
2042 clear_modify_mem_tables ();
2043 /* Some working arrays used to track first and last set in each block. */
2044 reg_avail_info = gmalloc (max_gcse_regno * sizeof (struct reg_avail_info));
2045
2046 for (i = 0; i < max_gcse_regno; ++i)
2047 reg_avail_info[i].last_bb = NULL;
2048
2049 FOR_EACH_BB (current_bb)
2050 {
2051 rtx insn;
2052 unsigned int regno;
2053 int in_libcall_block;
2054
2055 /* First pass over the instructions records information used to
2056 determine when registers and memory are first and last set.
2057 ??? hard-reg reg_set_in_block computation
2058 could be moved to compute_sets since they currently don't change. */
2059
2060 FOR_BB_INSNS (current_bb, insn)
2061 {
2062 if (! INSN_P (insn))
2063 continue;
2064
2065 if (CALL_P (insn))
2066 {
2067 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
2068 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno))
2069 record_last_reg_set_info (insn, regno);
2070
2071 mark_call (insn);
2072 }
2073
2074 note_stores (PATTERN (insn), record_last_set_info, insn);
2075 }
2076
2077 /* Insert implicit sets in the hash table. */
2078 if (table->set_p
2079 && implicit_sets[current_bb->index] != NULL_RTX)
2080 hash_scan_set (implicit_sets[current_bb->index],
2081 BB_HEAD (current_bb), table);
2082
2083 /* The next pass builds the hash table. */
2084 in_libcall_block = 0;
2085 FOR_BB_INSNS (current_bb, insn)
2086 if (INSN_P (insn))
2087 {
2088 if (find_reg_note (insn, REG_LIBCALL, NULL_RTX))
2089 in_libcall_block = 1;
2090 else if (table->set_p && find_reg_note (insn, REG_RETVAL, NULL_RTX))
2091 in_libcall_block = 0;
2092 hash_scan_insn (insn, table, in_libcall_block);
2093 if (!table->set_p && find_reg_note (insn, REG_RETVAL, NULL_RTX))
2094 in_libcall_block = 0;
2095 }
2096 }
2097
2098 free (reg_avail_info);
2099 reg_avail_info = NULL;
2100 }
2101
2102 /* Allocate space for the set/expr hash TABLE.
2103 N_INSNS is the number of instructions in the function.
2104 It is used to determine the number of buckets to use.
2105 SET_P determines whether set or expression table will
2106 be created. */
2107
2108 static void
2109 alloc_hash_table (int n_insns, struct hash_table *table, int set_p)
2110 {
2111 int n;
2112
2113 table->size = n_insns / 4;
2114 if (table->size < 11)
2115 table->size = 11;
2116
2117 /* Attempt to maintain efficient use of hash table.
2118 Making it an odd number is simplest for now.
2119 ??? Later take some measurements. */
2120 table->size |= 1;
2121 n = table->size * sizeof (struct expr *);
2122 table->table = gmalloc (n);
2123 table->set_p = set_p;
2124 }
2125
2126 /* Free things allocated by alloc_hash_table. */
2127
2128 static void
2129 free_hash_table (struct hash_table *table)
2130 {
2131 free (table->table);
2132 }
2133
2134 /* Compute the hash TABLE for doing copy/const propagation or
2135 expression hash table. */
2136
2137 static void
2138 compute_hash_table (struct hash_table *table)
2139 {
2140 /* Initialize count of number of entries in hash table. */
2141 table->n_elems = 0;
2142 memset (table->table, 0, table->size * sizeof (struct expr *));
2143
2144 compute_hash_table_work (table);
2145 }
2146 \f
2147 /* Expression tracking support. */
2148
2149 /* Lookup REGNO in the set TABLE. The result is a pointer to the
2150 table entry, or NULL if not found. */
2151
2152 static struct expr *
2153 lookup_set (unsigned int regno, struct hash_table *table)
2154 {
2155 unsigned int hash = hash_set (regno, table->size);
2156 struct expr *expr;
2157
2158 expr = table->table[hash];
2159
2160 while (expr && REGNO (SET_DEST (expr->expr)) != regno)
2161 expr = expr->next_same_hash;
2162
2163 return expr;
2164 }
2165
2166 /* Return the next entry for REGNO in list EXPR. */
2167
2168 static struct expr *
2169 next_set (unsigned int regno, struct expr *expr)
2170 {
2171 do
2172 expr = expr->next_same_hash;
2173 while (expr && REGNO (SET_DEST (expr->expr)) != regno);
2174
2175 return expr;
2176 }
2177
2178 /* Like free_INSN_LIST_list or free_EXPR_LIST_list, except that the node
2179 types may be mixed. */
2180
2181 static void
2182 free_insn_expr_list_list (rtx *listp)
2183 {
2184 rtx list, next;
2185
2186 for (list = *listp; list ; list = next)
2187 {
2188 next = XEXP (list, 1);
2189 if (GET_CODE (list) == EXPR_LIST)
2190 free_EXPR_LIST_node (list);
2191 else
2192 free_INSN_LIST_node (list);
2193 }
2194
2195 *listp = NULL;
2196 }
2197
2198 /* Clear canon_modify_mem_list and modify_mem_list tables. */
2199 static void
2200 clear_modify_mem_tables (void)
2201 {
2202 unsigned i;
2203 bitmap_iterator bi;
2204
2205 EXECUTE_IF_SET_IN_BITMAP (modify_mem_list_set, 0, i, bi)
2206 {
2207 free_INSN_LIST_list (modify_mem_list + i);
2208 free_insn_expr_list_list (canon_modify_mem_list + i);
2209 }
2210 bitmap_clear (modify_mem_list_set);
2211 bitmap_clear (blocks_with_calls);
2212 }
2213
2214 /* Release memory used by modify_mem_list_set. */
2215
2216 static void
2217 free_modify_mem_tables (void)
2218 {
2219 clear_modify_mem_tables ();
2220 free (modify_mem_list);
2221 free (canon_modify_mem_list);
2222 modify_mem_list = 0;
2223 canon_modify_mem_list = 0;
2224 }
2225
2226 /* Reset tables used to keep track of what's still available [since the
2227 start of the block]. */
2228
2229 static void
2230 reset_opr_set_tables (void)
2231 {
2232 /* Maintain a bitmap of which regs have been set since beginning of
2233 the block. */
2234 CLEAR_REG_SET (reg_set_bitmap);
2235
2236 /* Also keep a record of the last instruction to modify memory.
2237 For now this is very trivial, we only record whether any memory
2238 location has been modified. */
2239 clear_modify_mem_tables ();
2240 }
2241
2242 /* Return nonzero if the operands of X are not set before INSN in
2243 INSN's basic block. */
2244
2245 static int
2246 oprs_not_set_p (const_rtx x, const_rtx insn)
2247 {
2248 int i, j;
2249 enum rtx_code code;
2250 const char *fmt;
2251
2252 if (x == 0)
2253 return 1;
2254
2255 code = GET_CODE (x);
2256 switch (code)
2257 {
2258 case PC:
2259 case CC0:
2260 case CONST:
2261 case CONST_INT:
2262 case CONST_DOUBLE:
2263 case CONST_FIXED:
2264 case CONST_VECTOR:
2265 case SYMBOL_REF:
2266 case LABEL_REF:
2267 case ADDR_VEC:
2268 case ADDR_DIFF_VEC:
2269 return 1;
2270
2271 case MEM:
2272 if (load_killed_in_block_p (BLOCK_FOR_INSN (insn),
2273 INSN_CUID (insn), x, 0))
2274 return 0;
2275 else
2276 return oprs_not_set_p (XEXP (x, 0), insn);
2277
2278 case REG:
2279 return ! REGNO_REG_SET_P (reg_set_bitmap, REGNO (x));
2280
2281 default:
2282 break;
2283 }
2284
2285 for (i = GET_RTX_LENGTH (code) - 1, fmt = GET_RTX_FORMAT (code); i >= 0; i--)
2286 {
2287 if (fmt[i] == 'e')
2288 {
2289 /* If we are about to do the last recursive call
2290 needed at this level, change it into iteration.
2291 This function is called enough to be worth it. */
2292 if (i == 0)
2293 return oprs_not_set_p (XEXP (x, i), insn);
2294
2295 if (! oprs_not_set_p (XEXP (x, i), insn))
2296 return 0;
2297 }
2298 else if (fmt[i] == 'E')
2299 for (j = 0; j < XVECLEN (x, i); j++)
2300 if (! oprs_not_set_p (XVECEXP (x, i, j), insn))
2301 return 0;
2302 }
2303
2304 return 1;
2305 }
2306
2307 /* Mark things set by a CALL. */
2308
2309 static void
2310 mark_call (rtx insn)
2311 {
2312 if (! RTL_CONST_OR_PURE_CALL_P (insn))
2313 record_last_mem_set_info (insn);
2314 }
2315
2316 /* Mark things set by a SET. */
2317
2318 static void
2319 mark_set (rtx pat, rtx insn)
2320 {
2321 rtx dest = SET_DEST (pat);
2322
2323 while (GET_CODE (dest) == SUBREG
2324 || GET_CODE (dest) == ZERO_EXTRACT
2325 || GET_CODE (dest) == STRICT_LOW_PART)
2326 dest = XEXP (dest, 0);
2327
2328 if (REG_P (dest))
2329 SET_REGNO_REG_SET (reg_set_bitmap, REGNO (dest));
2330 else if (MEM_P (dest))
2331 record_last_mem_set_info (insn);
2332
2333 if (GET_CODE (SET_SRC (pat)) == CALL)
2334 mark_call (insn);
2335 }
2336
2337 /* Record things set by a CLOBBER. */
2338
2339 static void
2340 mark_clobber (rtx pat, rtx insn)
2341 {
2342 rtx clob = XEXP (pat, 0);
2343
2344 while (GET_CODE (clob) == SUBREG || GET_CODE (clob) == STRICT_LOW_PART)
2345 clob = XEXP (clob, 0);
2346
2347 if (REG_P (clob))
2348 SET_REGNO_REG_SET (reg_set_bitmap, REGNO (clob));
2349 else
2350 record_last_mem_set_info (insn);
2351 }
2352
2353 /* Record things set by INSN.
2354 This data is used by oprs_not_set_p. */
2355
2356 static void
2357 mark_oprs_set (rtx insn)
2358 {
2359 rtx pat = PATTERN (insn);
2360 int i;
2361
2362 if (GET_CODE (pat) == SET)
2363 mark_set (pat, insn);
2364 else if (GET_CODE (pat) == PARALLEL)
2365 for (i = 0; i < XVECLEN (pat, 0); i++)
2366 {
2367 rtx x = XVECEXP (pat, 0, i);
2368
2369 if (GET_CODE (x) == SET)
2370 mark_set (x, insn);
2371 else if (GET_CODE (x) == CLOBBER)
2372 mark_clobber (x, insn);
2373 else if (GET_CODE (x) == CALL)
2374 mark_call (insn);
2375 }
2376
2377 else if (GET_CODE (pat) == CLOBBER)
2378 mark_clobber (pat, insn);
2379 else if (GET_CODE (pat) == CALL)
2380 mark_call (insn);
2381 }
2382
2383 \f
2384 /* Compute copy/constant propagation working variables. */
2385
2386 /* Local properties of assignments. */
2387 static sbitmap *cprop_pavloc;
2388 static sbitmap *cprop_absaltered;
2389
2390 /* Global properties of assignments (computed from the local properties). */
2391 static sbitmap *cprop_avin;
2392 static sbitmap *cprop_avout;
2393
2394 /* Allocate vars used for copy/const propagation. N_BLOCKS is the number of
2395 basic blocks. N_SETS is the number of sets. */
2396
2397 static void
2398 alloc_cprop_mem (int n_blocks, int n_sets)
2399 {
2400 cprop_pavloc = sbitmap_vector_alloc (n_blocks, n_sets);
2401 cprop_absaltered = sbitmap_vector_alloc (n_blocks, n_sets);
2402
2403 cprop_avin = sbitmap_vector_alloc (n_blocks, n_sets);
2404 cprop_avout = sbitmap_vector_alloc (n_blocks, n_sets);
2405 }
2406
2407 /* Free vars used by copy/const propagation. */
2408
2409 static void
2410 free_cprop_mem (void)
2411 {
2412 sbitmap_vector_free (cprop_pavloc);
2413 sbitmap_vector_free (cprop_absaltered);
2414 sbitmap_vector_free (cprop_avin);
2415 sbitmap_vector_free (cprop_avout);
2416 }
2417
2418 /* For each block, compute whether X is transparent. X is either an
2419 expression or an assignment [though we don't care which, for this context
2420 an assignment is treated as an expression]. For each block where an
2421 element of X is modified, set (SET_P == 1) or reset (SET_P == 0) the INDX
2422 bit in BMAP. */
2423
2424 static void
2425 compute_transp (const_rtx x, int indx, sbitmap *bmap, int set_p)
2426 {
2427 int i, j;
2428 basic_block bb;
2429 enum rtx_code code;
2430 reg_set *r;
2431 const char *fmt;
2432
2433 /* repeat is used to turn tail-recursion into iteration since GCC
2434 can't do it when there's no return value. */
2435 repeat:
2436
2437 if (x == 0)
2438 return;
2439
2440 code = GET_CODE (x);
2441 switch (code)
2442 {
2443 case REG:
2444 if (set_p)
2445 {
2446 if (REGNO (x) < FIRST_PSEUDO_REGISTER)
2447 {
2448 FOR_EACH_BB (bb)
2449 if (TEST_BIT (reg_set_in_block[bb->index], REGNO (x)))
2450 SET_BIT (bmap[bb->index], indx);
2451 }
2452 else
2453 {
2454 for (r = reg_set_table[REGNO (x)]; r != NULL; r = r->next)
2455 SET_BIT (bmap[r->bb_index], indx);
2456 }
2457 }
2458 else
2459 {
2460 if (REGNO (x) < FIRST_PSEUDO_REGISTER)
2461 {
2462 FOR_EACH_BB (bb)
2463 if (TEST_BIT (reg_set_in_block[bb->index], REGNO (x)))
2464 RESET_BIT (bmap[bb->index], indx);
2465 }
2466 else
2467 {
2468 for (r = reg_set_table[REGNO (x)]; r != NULL; r = r->next)
2469 RESET_BIT (bmap[r->bb_index], indx);
2470 }
2471 }
2472
2473 return;
2474
2475 case MEM:
2476 if (! MEM_READONLY_P (x))
2477 {
2478 bitmap_iterator bi;
2479 unsigned bb_index;
2480
2481 /* First handle all the blocks with calls. We don't need to
2482 do any list walking for them. */
2483 EXECUTE_IF_SET_IN_BITMAP (blocks_with_calls, 0, bb_index, bi)
2484 {
2485 if (set_p)
2486 SET_BIT (bmap[bb_index], indx);
2487 else
2488 RESET_BIT (bmap[bb_index], indx);
2489 }
2490
2491 /* Now iterate over the blocks which have memory modifications
2492 but which do not have any calls. */
2493 EXECUTE_IF_AND_COMPL_IN_BITMAP (modify_mem_list_set,
2494 blocks_with_calls,
2495 0, bb_index, bi)
2496 {
2497 rtx list_entry = canon_modify_mem_list[bb_index];
2498
2499 while (list_entry)
2500 {
2501 rtx dest, dest_addr;
2502
2503 /* LIST_ENTRY must be an INSN of some kind that sets memory.
2504 Examine each hunk of memory that is modified. */
2505
2506 dest = XEXP (list_entry, 0);
2507 list_entry = XEXP (list_entry, 1);
2508 dest_addr = XEXP (list_entry, 0);
2509
2510 if (canon_true_dependence (dest, GET_MODE (dest), dest_addr,
2511 x, rtx_addr_varies_p))
2512 {
2513 if (set_p)
2514 SET_BIT (bmap[bb_index], indx);
2515 else
2516 RESET_BIT (bmap[bb_index], indx);
2517 break;
2518 }
2519 list_entry = XEXP (list_entry, 1);
2520 }
2521 }
2522 }
2523
2524 x = XEXP (x, 0);
2525 goto repeat;
2526
2527 case PC:
2528 case CC0: /*FIXME*/
2529 case CONST:
2530 case CONST_INT:
2531 case CONST_DOUBLE:
2532 case CONST_FIXED:
2533 case CONST_VECTOR:
2534 case SYMBOL_REF:
2535 case LABEL_REF:
2536 case ADDR_VEC:
2537 case ADDR_DIFF_VEC:
2538 return;
2539
2540 default:
2541 break;
2542 }
2543
2544 for (i = GET_RTX_LENGTH (code) - 1, fmt = GET_RTX_FORMAT (code); i >= 0; i--)
2545 {
2546 if (fmt[i] == 'e')
2547 {
2548 /* If we are about to do the last recursive call
2549 needed at this level, change it into iteration.
2550 This function is called enough to be worth it. */
2551 if (i == 0)
2552 {
2553 x = XEXP (x, i);
2554 goto repeat;
2555 }
2556
2557 compute_transp (XEXP (x, i), indx, bmap, set_p);
2558 }
2559 else if (fmt[i] == 'E')
2560 for (j = 0; j < XVECLEN (x, i); j++)
2561 compute_transp (XVECEXP (x, i, j), indx, bmap, set_p);
2562 }
2563 }
2564
2565 /* Top level routine to do the dataflow analysis needed by copy/const
2566 propagation. */
2567
2568 static void
2569 compute_cprop_data (void)
2570 {
2571 compute_local_properties (cprop_absaltered, cprop_pavloc, NULL, &set_hash_table);
2572 compute_available (cprop_pavloc, cprop_absaltered,
2573 cprop_avout, cprop_avin);
2574 }
2575 \f
2576 /* Copy/constant propagation. */
2577
2578 /* Maximum number of register uses in an insn that we handle. */
2579 #define MAX_USES 8
2580
2581 /* Table of uses found in an insn.
2582 Allocated statically to avoid alloc/free complexity and overhead. */
2583 static struct reg_use reg_use_table[MAX_USES];
2584
2585 /* Index into `reg_use_table' while building it. */
2586 static int reg_use_count;
2587
2588 /* Set up a list of register numbers used in INSN. The found uses are stored
2589 in `reg_use_table'. `reg_use_count' is initialized to zero before entry,
2590 and contains the number of uses in the table upon exit.
2591
2592 ??? If a register appears multiple times we will record it multiple times.
2593 This doesn't hurt anything but it will slow things down. */
2594
2595 static void
2596 find_used_regs (rtx *xptr, void *data ATTRIBUTE_UNUSED)
2597 {
2598 int i, j;
2599 enum rtx_code code;
2600 const char *fmt;
2601 rtx x = *xptr;
2602
2603 /* repeat is used to turn tail-recursion into iteration since GCC
2604 can't do it when there's no return value. */
2605 repeat:
2606 if (x == 0)
2607 return;
2608
2609 code = GET_CODE (x);
2610 if (REG_P (x))
2611 {
2612 if (reg_use_count == MAX_USES)
2613 return;
2614
2615 reg_use_table[reg_use_count].reg_rtx = x;
2616 reg_use_count++;
2617 }
2618
2619 /* Recursively scan the operands of this expression. */
2620
2621 for (i = GET_RTX_LENGTH (code) - 1, fmt = GET_RTX_FORMAT (code); i >= 0; i--)
2622 {
2623 if (fmt[i] == 'e')
2624 {
2625 /* If we are about to do the last recursive call
2626 needed at this level, change it into iteration.
2627 This function is called enough to be worth it. */
2628 if (i == 0)
2629 {
2630 x = XEXP (x, 0);
2631 goto repeat;
2632 }
2633
2634 find_used_regs (&XEXP (x, i), data);
2635 }
2636 else if (fmt[i] == 'E')
2637 for (j = 0; j < XVECLEN (x, i); j++)
2638 find_used_regs (&XVECEXP (x, i, j), data);
2639 }
2640 }
2641
2642 /* Try to replace all non-SET_DEST occurrences of FROM in INSN with TO.
2643 Returns nonzero is successful. */
2644
2645 static int
2646 try_replace_reg (rtx from, rtx to, rtx insn)
2647 {
2648 rtx note = find_reg_equal_equiv_note (insn);
2649 rtx src = 0;
2650 int success = 0;
2651 rtx set = single_set (insn);
2652
2653 /* Usually we substitute easy stuff, so we won't copy everything.
2654 We however need to take care to not duplicate non-trivial CONST
2655 expressions. */
2656 to = copy_rtx (to);
2657
2658 validate_replace_src_group (from, to, insn);
2659 if (num_changes_pending () && apply_change_group ())
2660 success = 1;
2661
2662 /* Try to simplify SET_SRC if we have substituted a constant. */
2663 if (success && set && CONSTANT_P (to))
2664 {
2665 src = simplify_rtx (SET_SRC (set));
2666
2667 if (src)
2668 validate_change (insn, &SET_SRC (set), src, 0);
2669 }
2670
2671 /* If there is already a REG_EQUAL note, update the expression in it
2672 with our replacement. */
2673 if (note != 0 && REG_NOTE_KIND (note) == REG_EQUAL)
2674 set_unique_reg_note (insn, REG_EQUAL,
2675 simplify_replace_rtx (XEXP (note, 0), from,
2676 copy_rtx (to)));
2677 if (!success && set && reg_mentioned_p (from, SET_SRC (set)))
2678 {
2679 /* If above failed and this is a single set, try to simplify the source of
2680 the set given our substitution. We could perhaps try this for multiple
2681 SETs, but it probably won't buy us anything. */
2682 src = simplify_replace_rtx (SET_SRC (set), from, to);
2683
2684 if (!rtx_equal_p (src, SET_SRC (set))
2685 && validate_change (insn, &SET_SRC (set), src, 0))
2686 success = 1;
2687
2688 /* If we've failed to do replacement, have a single SET, don't already
2689 have a note, and have no special SET, add a REG_EQUAL note to not
2690 lose information. */
2691 if (!success && note == 0 && set != 0
2692 && GET_CODE (SET_DEST (set)) != ZERO_EXTRACT
2693 && GET_CODE (SET_DEST (set)) != STRICT_LOW_PART)
2694 note = set_unique_reg_note (insn, REG_EQUAL, copy_rtx (src));
2695 }
2696
2697 /* REG_EQUAL may get simplified into register.
2698 We don't allow that. Remove that note. This code ought
2699 not to happen, because previous code ought to synthesize
2700 reg-reg move, but be on the safe side. */
2701 if (note && REG_NOTE_KIND (note) == REG_EQUAL && REG_P (XEXP (note, 0)))
2702 remove_note (insn, note);
2703
2704 return success;
2705 }
2706
2707 /* Find a set of REGNOs that are available on entry to INSN's block. Returns
2708 NULL no such set is found. */
2709
2710 static struct expr *
2711 find_avail_set (int regno, rtx insn)
2712 {
2713 /* SET1 contains the last set found that can be returned to the caller for
2714 use in a substitution. */
2715 struct expr *set1 = 0;
2716
2717 /* Loops are not possible here. To get a loop we would need two sets
2718 available at the start of the block containing INSN. i.e. we would
2719 need two sets like this available at the start of the block:
2720
2721 (set (reg X) (reg Y))
2722 (set (reg Y) (reg X))
2723
2724 This can not happen since the set of (reg Y) would have killed the
2725 set of (reg X) making it unavailable at the start of this block. */
2726 while (1)
2727 {
2728 rtx src;
2729 struct expr *set = lookup_set (regno, &set_hash_table);
2730
2731 /* Find a set that is available at the start of the block
2732 which contains INSN. */
2733 while (set)
2734 {
2735 if (TEST_BIT (cprop_avin[BLOCK_NUM (insn)], set->bitmap_index))
2736 break;
2737 set = next_set (regno, set);
2738 }
2739
2740 /* If no available set was found we've reached the end of the
2741 (possibly empty) copy chain. */
2742 if (set == 0)
2743 break;
2744
2745 gcc_assert (GET_CODE (set->expr) == SET);
2746
2747 src = SET_SRC (set->expr);
2748
2749 /* We know the set is available.
2750 Now check that SRC is ANTLOC (i.e. none of the source operands
2751 have changed since the start of the block).
2752
2753 If the source operand changed, we may still use it for the next
2754 iteration of this loop, but we may not use it for substitutions. */
2755
2756 if (gcse_constant_p (src) || oprs_not_set_p (src, insn))
2757 set1 = set;
2758
2759 /* If the source of the set is anything except a register, then
2760 we have reached the end of the copy chain. */
2761 if (! REG_P (src))
2762 break;
2763
2764 /* Follow the copy chain, i.e. start another iteration of the loop
2765 and see if we have an available copy into SRC. */
2766 regno = REGNO (src);
2767 }
2768
2769 /* SET1 holds the last set that was available and anticipatable at
2770 INSN. */
2771 return set1;
2772 }
2773
2774 /* Subroutine of cprop_insn that tries to propagate constants into
2775 JUMP_INSNS. JUMP must be a conditional jump. If SETCC is non-NULL
2776 it is the instruction that immediately precedes JUMP, and must be a
2777 single SET of a register. FROM is what we will try to replace,
2778 SRC is the constant we will try to substitute for it. Returns nonzero
2779 if a change was made. */
2780
2781 static int
2782 cprop_jump (basic_block bb, rtx setcc, rtx jump, rtx from, rtx src)
2783 {
2784 rtx new, set_src, note_src;
2785 rtx set = pc_set (jump);
2786 rtx note = find_reg_equal_equiv_note (jump);
2787
2788 if (note)
2789 {
2790 note_src = XEXP (note, 0);
2791 if (GET_CODE (note_src) == EXPR_LIST)
2792 note_src = NULL_RTX;
2793 }
2794 else note_src = NULL_RTX;
2795
2796 /* Prefer REG_EQUAL notes except those containing EXPR_LISTs. */
2797 set_src = note_src ? note_src : SET_SRC (set);
2798
2799 /* First substitute the SETCC condition into the JUMP instruction,
2800 then substitute that given values into this expanded JUMP. */
2801 if (setcc != NULL_RTX
2802 && !modified_between_p (from, setcc, jump)
2803 && !modified_between_p (src, setcc, jump))
2804 {
2805 rtx setcc_src;
2806 rtx setcc_set = single_set (setcc);
2807 rtx setcc_note = find_reg_equal_equiv_note (setcc);
2808 setcc_src = (setcc_note && GET_CODE (XEXP (setcc_note, 0)) != EXPR_LIST)
2809 ? XEXP (setcc_note, 0) : SET_SRC (setcc_set);
2810 set_src = simplify_replace_rtx (set_src, SET_DEST (setcc_set),
2811 setcc_src);
2812 }
2813 else
2814 setcc = NULL_RTX;
2815
2816 new = simplify_replace_rtx (set_src, from, src);
2817
2818 /* If no simplification can be made, then try the next register. */
2819 if (rtx_equal_p (new, SET_SRC (set)))
2820 return 0;
2821
2822 /* If this is now a no-op delete it, otherwise this must be a valid insn. */
2823 if (new == pc_rtx)
2824 delete_insn (jump);
2825 else
2826 {
2827 /* Ensure the value computed inside the jump insn to be equivalent
2828 to one computed by setcc. */
2829 if (setcc && modified_in_p (new, setcc))
2830 return 0;
2831 if (! validate_unshare_change (jump, &SET_SRC (set), new, 0))
2832 {
2833 /* When (some) constants are not valid in a comparison, and there
2834 are two registers to be replaced by constants before the entire
2835 comparison can be folded into a constant, we need to keep
2836 intermediate information in REG_EQUAL notes. For targets with
2837 separate compare insns, such notes are added by try_replace_reg.
2838 When we have a combined compare-and-branch instruction, however,
2839 we need to attach a note to the branch itself to make this
2840 optimization work. */
2841
2842 if (!rtx_equal_p (new, note_src))
2843 set_unique_reg_note (jump, REG_EQUAL, copy_rtx (new));
2844 return 0;
2845 }
2846
2847 /* Remove REG_EQUAL note after simplification. */
2848 if (note_src)
2849 remove_note (jump, note);
2850 }
2851
2852 #ifdef HAVE_cc0
2853 /* Delete the cc0 setter. */
2854 if (setcc != NULL && CC0_P (SET_DEST (single_set (setcc))))
2855 delete_insn (setcc);
2856 #endif
2857
2858 run_jump_opt_after_gcse = 1;
2859
2860 global_const_prop_count++;
2861 if (dump_file != NULL)
2862 {
2863 fprintf (dump_file,
2864 "GLOBAL CONST-PROP: Replacing reg %d in jump_insn %d with constant ",
2865 REGNO (from), INSN_UID (jump));
2866 print_rtl (dump_file, src);
2867 fprintf (dump_file, "\n");
2868 }
2869 purge_dead_edges (bb);
2870
2871 /* If a conditional jump has been changed into unconditional jump, remove
2872 the jump and make the edge fallthru - this is always called in
2873 cfglayout mode. */
2874 if (new != pc_rtx && simplejump_p (jump))
2875 {
2876 edge e;
2877 edge_iterator ei;
2878
2879 for (ei = ei_start (bb->succs); (e = ei_safe_edge (ei)); ei_next (&ei))
2880 if (e->dest != EXIT_BLOCK_PTR
2881 && BB_HEAD (e->dest) == JUMP_LABEL (jump))
2882 {
2883 e->flags |= EDGE_FALLTHRU;
2884 break;
2885 }
2886 delete_insn (jump);
2887 }
2888
2889 return 1;
2890 }
2891
2892 static bool
2893 constprop_register (rtx insn, rtx from, rtx to, bool alter_jumps)
2894 {
2895 rtx sset;
2896
2897 /* Check for reg or cc0 setting instructions followed by
2898 conditional branch instructions first. */
2899 if (alter_jumps
2900 && (sset = single_set (insn)) != NULL
2901 && NEXT_INSN (insn)
2902 && any_condjump_p (NEXT_INSN (insn)) && onlyjump_p (NEXT_INSN (insn)))
2903 {
2904 rtx dest = SET_DEST (sset);
2905 if ((REG_P (dest) || CC0_P (dest))
2906 && cprop_jump (BLOCK_FOR_INSN (insn), insn, NEXT_INSN (insn), from, to))
2907 return 1;
2908 }
2909
2910 /* Handle normal insns next. */
2911 if (NONJUMP_INSN_P (insn)
2912 && try_replace_reg (from, to, insn))
2913 return 1;
2914
2915 /* Try to propagate a CONST_INT into a conditional jump.
2916 We're pretty specific about what we will handle in this
2917 code, we can extend this as necessary over time.
2918
2919 Right now the insn in question must look like
2920 (set (pc) (if_then_else ...)) */
2921 else if (alter_jumps && any_condjump_p (insn) && onlyjump_p (insn))
2922 return cprop_jump (BLOCK_FOR_INSN (insn), NULL, insn, from, to);
2923 return 0;
2924 }
2925
2926 /* Perform constant and copy propagation on INSN.
2927 The result is nonzero if a change was made. */
2928
2929 static int
2930 cprop_insn (rtx insn, int alter_jumps)
2931 {
2932 struct reg_use *reg_used;
2933 int changed = 0;
2934 rtx note;
2935
2936 if (!INSN_P (insn))
2937 return 0;
2938
2939 reg_use_count = 0;
2940 note_uses (&PATTERN (insn), find_used_regs, NULL);
2941
2942 note = find_reg_equal_equiv_note (insn);
2943
2944 /* We may win even when propagating constants into notes. */
2945 if (note)
2946 find_used_regs (&XEXP (note, 0), NULL);
2947
2948 for (reg_used = &reg_use_table[0]; reg_use_count > 0;
2949 reg_used++, reg_use_count--)
2950 {
2951 unsigned int regno = REGNO (reg_used->reg_rtx);
2952 rtx pat, src;
2953 struct expr *set;
2954
2955 /* Ignore registers created by GCSE.
2956 We do this because ... */
2957 if (regno >= max_gcse_regno)
2958 continue;
2959
2960 /* If the register has already been set in this block, there's
2961 nothing we can do. */
2962 if (! oprs_not_set_p (reg_used->reg_rtx, insn))
2963 continue;
2964
2965 /* Find an assignment that sets reg_used and is available
2966 at the start of the block. */
2967 set = find_avail_set (regno, insn);
2968 if (! set)
2969 continue;
2970
2971 pat = set->expr;
2972 /* ??? We might be able to handle PARALLELs. Later. */
2973 gcc_assert (GET_CODE (pat) == SET);
2974
2975 src = SET_SRC (pat);
2976
2977 /* Constant propagation. */
2978 if (gcse_constant_p (src))
2979 {
2980 if (constprop_register (insn, reg_used->reg_rtx, src, alter_jumps))
2981 {
2982 changed = 1;
2983 global_const_prop_count++;
2984 if (dump_file != NULL)
2985 {
2986 fprintf (dump_file, "GLOBAL CONST-PROP: Replacing reg %d in ", regno);
2987 fprintf (dump_file, "insn %d with constant ", INSN_UID (insn));
2988 print_rtl (dump_file, src);
2989 fprintf (dump_file, "\n");
2990 }
2991 if (INSN_DELETED_P (insn))
2992 return 1;
2993 }
2994 }
2995 else if (REG_P (src)
2996 && REGNO (src) >= FIRST_PSEUDO_REGISTER
2997 && REGNO (src) != regno)
2998 {
2999 if (try_replace_reg (reg_used->reg_rtx, src, insn))
3000 {
3001 changed = 1;
3002 global_copy_prop_count++;
3003 if (dump_file != NULL)
3004 {
3005 fprintf (dump_file, "GLOBAL COPY-PROP: Replacing reg %d in insn %d",
3006 regno, INSN_UID (insn));
3007 fprintf (dump_file, " with reg %d\n", REGNO (src));
3008 }
3009
3010 /* The original insn setting reg_used may or may not now be
3011 deletable. We leave the deletion to flow. */
3012 /* FIXME: If it turns out that the insn isn't deletable,
3013 then we may have unnecessarily extended register lifetimes
3014 and made things worse. */
3015 }
3016 }
3017 }
3018
3019 return changed;
3020 }
3021
3022 /* Like find_used_regs, but avoid recording uses that appear in
3023 input-output contexts such as zero_extract or pre_dec. This
3024 restricts the cases we consider to those for which local cprop
3025 can legitimately make replacements. */
3026
3027 static void
3028 local_cprop_find_used_regs (rtx *xptr, void *data)
3029 {
3030 rtx x = *xptr;
3031
3032 if (x == 0)
3033 return;
3034
3035 switch (GET_CODE (x))
3036 {
3037 case ZERO_EXTRACT:
3038 case SIGN_EXTRACT:
3039 case STRICT_LOW_PART:
3040 return;
3041
3042 case PRE_DEC:
3043 case PRE_INC:
3044 case POST_DEC:
3045 case POST_INC:
3046 case PRE_MODIFY:
3047 case POST_MODIFY:
3048 /* Can only legitimately appear this early in the context of
3049 stack pushes for function arguments, but handle all of the
3050 codes nonetheless. */
3051 return;
3052
3053 case SUBREG:
3054 /* Setting a subreg of a register larger than word_mode leaves
3055 the non-written words unchanged. */
3056 if (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x))) > BITS_PER_WORD)
3057 return;
3058 break;
3059
3060 default:
3061 break;
3062 }
3063
3064 find_used_regs (xptr, data);
3065 }
3066
3067 /* LIBCALL_SP is a zero-terminated array of insns at the end of a libcall;
3068 their REG_EQUAL notes need updating. */
3069
3070 static bool
3071 do_local_cprop (rtx x, rtx insn, bool alter_jumps, rtx *libcall_sp)
3072 {
3073 rtx newreg = NULL, newcnst = NULL;
3074
3075 /* Rule out USE instructions and ASM statements as we don't want to
3076 change the hard registers mentioned. */
3077 if (REG_P (x)
3078 && (REGNO (x) >= FIRST_PSEUDO_REGISTER
3079 || (GET_CODE (PATTERN (insn)) != USE
3080 && asm_noperands (PATTERN (insn)) < 0)))
3081 {
3082 cselib_val *val = cselib_lookup (x, GET_MODE (x), 0);
3083 struct elt_loc_list *l;
3084
3085 if (!val)
3086 return false;
3087 for (l = val->locs; l; l = l->next)
3088 {
3089 rtx this_rtx = l->loc;
3090 rtx note;
3091
3092 /* Don't CSE non-constant values out of libcall blocks. */
3093 if (l->in_libcall && ! CONSTANT_P (this_rtx))
3094 continue;
3095
3096 if (gcse_constant_p (this_rtx))
3097 newcnst = this_rtx;
3098 if (REG_P (this_rtx) && REGNO (this_rtx) >= FIRST_PSEUDO_REGISTER
3099 /* Don't copy propagate if it has attached REG_EQUIV note.
3100 At this point this only function parameters should have
3101 REG_EQUIV notes and if the argument slot is used somewhere
3102 explicitly, it means address of parameter has been taken,
3103 so we should not extend the lifetime of the pseudo. */
3104 && (!(note = find_reg_note (l->setting_insn, REG_EQUIV, NULL_RTX))
3105 || ! MEM_P (XEXP (note, 0))))
3106 newreg = this_rtx;
3107 }
3108 if (newcnst && constprop_register (insn, x, newcnst, alter_jumps))
3109 {
3110 /* If we find a case where we can't fix the retval REG_EQUAL notes
3111 match the new register, we either have to abandon this replacement
3112 or fix delete_trivially_dead_insns to preserve the setting insn,
3113 or make it delete the REG_EQUAL note, and fix up all passes that
3114 require the REG_EQUAL note there. */
3115 bool adjusted;
3116
3117 adjusted = adjust_libcall_notes (x, newcnst, insn, libcall_sp);
3118 gcc_assert (adjusted);
3119
3120 if (dump_file != NULL)
3121 {
3122 fprintf (dump_file, "LOCAL CONST-PROP: Replacing reg %d in ",
3123 REGNO (x));
3124 fprintf (dump_file, "insn %d with constant ",
3125 INSN_UID (insn));
3126 print_rtl (dump_file, newcnst);
3127 fprintf (dump_file, "\n");
3128 }
3129 local_const_prop_count++;
3130 return true;
3131 }
3132 else if (newreg && newreg != x && try_replace_reg (x, newreg, insn))
3133 {
3134 adjust_libcall_notes (x, newreg, insn, libcall_sp);
3135 if (dump_file != NULL)
3136 {
3137 fprintf (dump_file,
3138 "LOCAL COPY-PROP: Replacing reg %d in insn %d",
3139 REGNO (x), INSN_UID (insn));
3140 fprintf (dump_file, " with reg %d\n", REGNO (newreg));
3141 }
3142 local_copy_prop_count++;
3143 return true;
3144 }
3145 }
3146 return false;
3147 }
3148
3149 /* LIBCALL_SP is a zero-terminated array of insns at the end of a libcall;
3150 their REG_EQUAL notes need updating to reflect that OLDREG has been
3151 replaced with NEWVAL in INSN. Return true if all substitutions could
3152 be made. */
3153 static bool
3154 adjust_libcall_notes (rtx oldreg, rtx newval, rtx insn, rtx *libcall_sp)
3155 {
3156 rtx end;
3157
3158 while ((end = *libcall_sp++))
3159 {
3160 rtx note = find_reg_equal_equiv_note (end);
3161
3162 if (! note)
3163 continue;
3164
3165 if (REG_P (newval))
3166 {
3167 if (reg_set_between_p (newval, PREV_INSN (insn), end))
3168 {
3169 do
3170 {
3171 note = find_reg_equal_equiv_note (end);
3172 if (! note)
3173 continue;
3174 if (reg_mentioned_p (newval, XEXP (note, 0)))
3175 return false;
3176 }
3177 while ((end = *libcall_sp++));
3178 return true;
3179 }
3180 }
3181 XEXP (note, 0) = simplify_replace_rtx (XEXP (note, 0), oldreg, newval);
3182 df_notes_rescan (end);
3183 insn = end;
3184 }
3185 return true;
3186 }
3187
3188 #define MAX_NESTED_LIBCALLS 9
3189
3190 /* Do local const/copy propagation (i.e. within each basic block).
3191 If ALTER_JUMPS is true, allow propagating into jump insns, which
3192 could modify the CFG. */
3193
3194 static void
3195 local_cprop_pass (bool alter_jumps)
3196 {
3197 basic_block bb;
3198 rtx insn;
3199 struct reg_use *reg_used;
3200 rtx libcall_stack[MAX_NESTED_LIBCALLS + 1], *libcall_sp;
3201 bool changed = false;
3202
3203 cselib_init (false);
3204 libcall_sp = &libcall_stack[MAX_NESTED_LIBCALLS];
3205 *libcall_sp = 0;
3206 FOR_EACH_BB (bb)
3207 {
3208 FOR_BB_INSNS (bb, insn)
3209 {
3210 if (INSN_P (insn))
3211 {
3212 rtx note = find_reg_note (insn, REG_LIBCALL, NULL_RTX);
3213
3214 if (note)
3215 {
3216 gcc_assert (libcall_sp != libcall_stack);
3217 *--libcall_sp = XEXP (note, 0);
3218 }
3219 note = find_reg_note (insn, REG_RETVAL, NULL_RTX);
3220 if (note)
3221 libcall_sp++;
3222 note = find_reg_equal_equiv_note (insn);
3223 do
3224 {
3225 reg_use_count = 0;
3226 note_uses (&PATTERN (insn), local_cprop_find_used_regs,
3227 NULL);
3228 if (note)
3229 local_cprop_find_used_regs (&XEXP (note, 0), NULL);
3230
3231 for (reg_used = &reg_use_table[0]; reg_use_count > 0;
3232 reg_used++, reg_use_count--)
3233 {
3234 if (do_local_cprop (reg_used->reg_rtx, insn, alter_jumps,
3235 libcall_sp))
3236 {
3237 changed = true;
3238 break;
3239 }
3240 }
3241 if (INSN_DELETED_P (insn))
3242 break;
3243 }
3244 while (reg_use_count);
3245 }
3246 cselib_process_insn (insn);
3247 }
3248
3249 /* Forget everything at the end of a basic block. Make sure we are
3250 not inside a libcall, they should never cross basic blocks. */
3251 cselib_clear_table ();
3252 gcc_assert (libcall_sp == &libcall_stack[MAX_NESTED_LIBCALLS]);
3253 }
3254
3255 cselib_finish ();
3256
3257 /* Global analysis may get into infinite loops for unreachable blocks. */
3258 if (changed && alter_jumps)
3259 {
3260 delete_unreachable_blocks ();
3261 free_reg_set_mem ();
3262 alloc_reg_set_mem (max_reg_num ());
3263 compute_sets ();
3264 }
3265 }
3266
3267 /* Forward propagate copies. This includes copies and constants. Return
3268 nonzero if a change was made. */
3269
3270 static int
3271 cprop (int alter_jumps)
3272 {
3273 int changed;
3274 basic_block bb;
3275 rtx insn;
3276
3277 /* Note we start at block 1. */
3278 if (ENTRY_BLOCK_PTR->next_bb == EXIT_BLOCK_PTR)
3279 {
3280 if (dump_file != NULL)
3281 fprintf (dump_file, "\n");
3282 return 0;
3283 }
3284
3285 changed = 0;
3286 FOR_BB_BETWEEN (bb, ENTRY_BLOCK_PTR->next_bb->next_bb, EXIT_BLOCK_PTR, next_bb)
3287 {
3288 /* Reset tables used to keep track of what's still valid [since the
3289 start of the block]. */
3290 reset_opr_set_tables ();
3291
3292 FOR_BB_INSNS (bb, insn)
3293 if (INSN_P (insn))
3294 {
3295 changed |= cprop_insn (insn, alter_jumps);
3296
3297 /* Keep track of everything modified by this insn. */
3298 /* ??? Need to be careful w.r.t. mods done to INSN. Don't
3299 call mark_oprs_set if we turned the insn into a NOTE. */
3300 if (! NOTE_P (insn))
3301 mark_oprs_set (insn);
3302 }
3303 }
3304
3305 if (dump_file != NULL)
3306 fprintf (dump_file, "\n");
3307
3308 return changed;
3309 }
3310
3311 /* Similar to get_condition, only the resulting condition must be
3312 valid at JUMP, instead of at EARLIEST.
3313
3314 This differs from noce_get_condition in ifcvt.c in that we prefer not to
3315 settle for the condition variable in the jump instruction being integral.
3316 We prefer to be able to record the value of a user variable, rather than
3317 the value of a temporary used in a condition. This could be solved by
3318 recording the value of *every* register scanned by canonicalize_condition,
3319 but this would require some code reorganization. */
3320
3321 rtx
3322 fis_get_condition (rtx jump)
3323 {
3324 return get_condition (jump, NULL, false, true);
3325 }
3326
3327 /* Check the comparison COND to see if we can safely form an implicit set from
3328 it. COND is either an EQ or NE comparison. */
3329
3330 static bool
3331 implicit_set_cond_p (const_rtx cond)
3332 {
3333 const enum machine_mode mode = GET_MODE (XEXP (cond, 0));
3334 const_rtx cst = XEXP (cond, 1);
3335
3336 /* We can't perform this optimization if either operand might be or might
3337 contain a signed zero. */
3338 if (HONOR_SIGNED_ZEROS (mode))
3339 {
3340 /* It is sufficient to check if CST is or contains a zero. We must
3341 handle float, complex, and vector. If any subpart is a zero, then
3342 the optimization can't be performed. */
3343 /* ??? The complex and vector checks are not implemented yet. We just
3344 always return zero for them. */
3345 if (GET_CODE (cst) == CONST_DOUBLE)
3346 {
3347 REAL_VALUE_TYPE d;
3348 REAL_VALUE_FROM_CONST_DOUBLE (d, cst);
3349 if (REAL_VALUES_EQUAL (d, dconst0))
3350 return 0;
3351 }
3352 else
3353 return 0;
3354 }
3355
3356 return gcse_constant_p (cst);
3357 }
3358
3359 /* Find the implicit sets of a function. An "implicit set" is a constraint
3360 on the value of a variable, implied by a conditional jump. For example,
3361 following "if (x == 2)", the then branch may be optimized as though the
3362 conditional performed an "explicit set", in this example, "x = 2". This
3363 function records the set patterns that are implicit at the start of each
3364 basic block. */
3365
3366 static void
3367 find_implicit_sets (void)
3368 {
3369 basic_block bb, dest;
3370 unsigned int count;
3371 rtx cond, new;
3372
3373 count = 0;
3374 FOR_EACH_BB (bb)
3375 /* Check for more than one successor. */
3376 if (EDGE_COUNT (bb->succs) > 1)
3377 {
3378 cond = fis_get_condition (BB_END (bb));
3379
3380 if (cond
3381 && (GET_CODE (cond) == EQ || GET_CODE (cond) == NE)
3382 && REG_P (XEXP (cond, 0))
3383 && REGNO (XEXP (cond, 0)) >= FIRST_PSEUDO_REGISTER
3384 && implicit_set_cond_p (cond))
3385 {
3386 dest = GET_CODE (cond) == EQ ? BRANCH_EDGE (bb)->dest
3387 : FALLTHRU_EDGE (bb)->dest;
3388
3389 if (dest && single_pred_p (dest)
3390 && dest != EXIT_BLOCK_PTR)
3391 {
3392 new = gen_rtx_SET (VOIDmode, XEXP (cond, 0),
3393 XEXP (cond, 1));
3394 implicit_sets[dest->index] = new;
3395 if (dump_file)
3396 {
3397 fprintf(dump_file, "Implicit set of reg %d in ",
3398 REGNO (XEXP (cond, 0)));
3399 fprintf(dump_file, "basic block %d\n", dest->index);
3400 }
3401 count++;
3402 }
3403 }
3404 }
3405
3406 if (dump_file)
3407 fprintf (dump_file, "Found %d implicit sets\n", count);
3408 }
3409
3410 /* Perform one copy/constant propagation pass.
3411 PASS is the pass count. If CPROP_JUMPS is true, perform constant
3412 propagation into conditional jumps. If BYPASS_JUMPS is true,
3413 perform conditional jump bypassing optimizations. */
3414
3415 static int
3416 one_cprop_pass (int pass, bool cprop_jumps, bool bypass_jumps)
3417 {
3418 int changed = 0;
3419
3420 global_const_prop_count = local_const_prop_count = 0;
3421 global_copy_prop_count = local_copy_prop_count = 0;
3422
3423 if (cprop_jumps)
3424 local_cprop_pass (cprop_jumps);
3425
3426 /* Determine implicit sets. */
3427 implicit_sets = XCNEWVEC (rtx, last_basic_block);
3428 find_implicit_sets ();
3429
3430 alloc_hash_table (max_cuid, &set_hash_table, 1);
3431 compute_hash_table (&set_hash_table);
3432
3433 /* Free implicit_sets before peak usage. */
3434 free (implicit_sets);
3435 implicit_sets = NULL;
3436
3437 if (dump_file)
3438 dump_hash_table (dump_file, "SET", &set_hash_table);
3439 if (set_hash_table.n_elems > 0)
3440 {
3441 alloc_cprop_mem (last_basic_block, set_hash_table.n_elems);
3442 compute_cprop_data ();
3443 changed = cprop (cprop_jumps);
3444 if (bypass_jumps)
3445 changed |= bypass_conditional_jumps ();
3446 free_cprop_mem ();
3447 }
3448
3449 free_hash_table (&set_hash_table);
3450
3451 if (dump_file)
3452 {
3453 fprintf (dump_file, "CPROP of %s, pass %d: %d bytes needed, ",
3454 current_function_name (), pass, bytes_used);
3455 fprintf (dump_file, "%d local const props, %d local copy props, ",
3456 local_const_prop_count, local_copy_prop_count);
3457 fprintf (dump_file, "%d global const props, %d global copy props\n\n",
3458 global_const_prop_count, global_copy_prop_count);
3459 }
3460 /* Global analysis may get into infinite loops for unreachable blocks. */
3461 if (changed && cprop_jumps)
3462 delete_unreachable_blocks ();
3463
3464 return changed;
3465 }
3466 \f
3467 /* Bypass conditional jumps. */
3468
3469 /* The value of last_basic_block at the beginning of the jump_bypass
3470 pass. The use of redirect_edge_and_branch_force may introduce new
3471 basic blocks, but the data flow analysis is only valid for basic
3472 block indices less than bypass_last_basic_block. */
3473
3474 static int bypass_last_basic_block;
3475
3476 /* Find a set of REGNO to a constant that is available at the end of basic
3477 block BB. Returns NULL if no such set is found. Based heavily upon
3478 find_avail_set. */
3479
3480 static struct expr *
3481 find_bypass_set (int regno, int bb)
3482 {
3483 struct expr *result = 0;
3484
3485 for (;;)
3486 {
3487 rtx src;
3488 struct expr *set = lookup_set (regno, &set_hash_table);
3489
3490 while (set)
3491 {
3492 if (TEST_BIT (cprop_avout[bb], set->bitmap_index))
3493 break;
3494 set = next_set (regno, set);
3495 }
3496
3497 if (set == 0)
3498 break;
3499
3500 gcc_assert (GET_CODE (set->expr) == SET);
3501
3502 src = SET_SRC (set->expr);
3503 if (gcse_constant_p (src))
3504 result = set;
3505
3506 if (! REG_P (src))
3507 break;
3508
3509 regno = REGNO (src);
3510 }
3511 return result;
3512 }
3513
3514
3515 /* Subroutine of bypass_block that checks whether a pseudo is killed by
3516 any of the instructions inserted on an edge. Jump bypassing places
3517 condition code setters on CFG edges using insert_insn_on_edge. This
3518 function is required to check that our data flow analysis is still
3519 valid prior to commit_edge_insertions. */
3520
3521 static bool
3522 reg_killed_on_edge (const_rtx reg, const_edge e)
3523 {
3524 rtx insn;
3525
3526 for (insn = e->insns.r; insn; insn = NEXT_INSN (insn))
3527 if (INSN_P (insn) && reg_set_p (reg, insn))
3528 return true;
3529
3530 return false;
3531 }
3532
3533 /* Subroutine of bypass_conditional_jumps that attempts to bypass the given
3534 basic block BB which has more than one predecessor. If not NULL, SETCC
3535 is the first instruction of BB, which is immediately followed by JUMP_INSN
3536 JUMP. Otherwise, SETCC is NULL, and JUMP is the first insn of BB.
3537 Returns nonzero if a change was made.
3538
3539 During the jump bypassing pass, we may place copies of SETCC instructions
3540 on CFG edges. The following routine must be careful to pay attention to
3541 these inserted insns when performing its transformations. */
3542
3543 static int
3544 bypass_block (basic_block bb, rtx setcc, rtx jump)
3545 {
3546 rtx insn, note;
3547 edge e, edest;
3548 int i, change;
3549 int may_be_loop_header;
3550 unsigned removed_p;
3551 edge_iterator ei;
3552
3553 insn = (setcc != NULL) ? setcc : jump;
3554
3555 /* Determine set of register uses in INSN. */
3556 reg_use_count = 0;
3557 note_uses (&PATTERN (insn), find_used_regs, NULL);
3558 note = find_reg_equal_equiv_note (insn);
3559 if (note)
3560 find_used_regs (&XEXP (note, 0), NULL);
3561
3562 may_be_loop_header = false;
3563 FOR_EACH_EDGE (e, ei, bb->preds)
3564 if (e->flags & EDGE_DFS_BACK)
3565 {
3566 may_be_loop_header = true;
3567 break;
3568 }
3569
3570 change = 0;
3571 for (ei = ei_start (bb->preds); (e = ei_safe_edge (ei)); )
3572 {
3573 removed_p = 0;
3574
3575 if (e->flags & EDGE_COMPLEX)
3576 {
3577 ei_next (&ei);
3578 continue;
3579 }
3580
3581 /* We can't redirect edges from new basic blocks. */
3582 if (e->src->index >= bypass_last_basic_block)
3583 {
3584 ei_next (&ei);
3585 continue;
3586 }
3587
3588 /* The irreducible loops created by redirecting of edges entering the
3589 loop from outside would decrease effectiveness of some of the following
3590 optimizations, so prevent this. */
3591 if (may_be_loop_header
3592 && !(e->flags & EDGE_DFS_BACK))
3593 {
3594 ei_next (&ei);
3595 continue;
3596 }
3597
3598 for (i = 0; i < reg_use_count; i++)
3599 {
3600 struct reg_use *reg_used = &reg_use_table[i];
3601 unsigned int regno = REGNO (reg_used->reg_rtx);
3602 basic_block dest, old_dest;
3603 struct expr *set;
3604 rtx src, new;
3605
3606 if (regno >= max_gcse_regno)
3607 continue;
3608
3609 set = find_bypass_set (regno, e->src->index);
3610
3611 if (! set)
3612 continue;
3613
3614 /* Check the data flow is valid after edge insertions. */
3615 if (e->insns.r && reg_killed_on_edge (reg_used->reg_rtx, e))
3616 continue;
3617
3618 src = SET_SRC (pc_set (jump));
3619
3620 if (setcc != NULL)
3621 src = simplify_replace_rtx (src,
3622 SET_DEST (PATTERN (setcc)),
3623 SET_SRC (PATTERN (setcc)));
3624
3625 new = simplify_replace_rtx (src, reg_used->reg_rtx,
3626 SET_SRC (set->expr));
3627
3628 /* Jump bypassing may have already placed instructions on
3629 edges of the CFG. We can't bypass an outgoing edge that
3630 has instructions associated with it, as these insns won't
3631 get executed if the incoming edge is redirected. */
3632
3633 if (new == pc_rtx)
3634 {
3635 edest = FALLTHRU_EDGE (bb);
3636 dest = edest->insns.r ? NULL : edest->dest;
3637 }
3638 else if (GET_CODE (new) == LABEL_REF)
3639 {
3640 dest = BLOCK_FOR_INSN (XEXP (new, 0));
3641 /* Don't bypass edges containing instructions. */
3642 edest = find_edge (bb, dest);
3643 if (edest && edest->insns.r)
3644 dest = NULL;
3645 }
3646 else
3647 dest = NULL;
3648
3649 /* Avoid unification of the edge with other edges from original
3650 branch. We would end up emitting the instruction on "both"
3651 edges. */
3652
3653 if (dest && setcc && !CC0_P (SET_DEST (PATTERN (setcc)))
3654 && find_edge (e->src, dest))
3655 dest = NULL;
3656
3657 old_dest = e->dest;
3658 if (dest != NULL
3659 && dest != old_dest
3660 && dest != EXIT_BLOCK_PTR)
3661 {
3662 redirect_edge_and_branch_force (e, dest);
3663
3664 /* Copy the register setter to the redirected edge.
3665 Don't copy CC0 setters, as CC0 is dead after jump. */
3666 if (setcc)
3667 {
3668 rtx pat = PATTERN (setcc);
3669 if (!CC0_P (SET_DEST (pat)))
3670 insert_insn_on_edge (copy_insn (pat), e);
3671 }
3672
3673 if (dump_file != NULL)
3674 {
3675 fprintf (dump_file, "JUMP-BYPASS: Proved reg %d "
3676 "in jump_insn %d equals constant ",
3677 regno, INSN_UID (jump));
3678 print_rtl (dump_file, SET_SRC (set->expr));
3679 fprintf (dump_file, "\nBypass edge from %d->%d to %d\n",
3680 e->src->index, old_dest->index, dest->index);
3681 }
3682 change = 1;
3683 removed_p = 1;
3684 break;
3685 }
3686 }
3687 if (!removed_p)
3688 ei_next (&ei);
3689 }
3690 return change;
3691 }
3692
3693 /* Find basic blocks with more than one predecessor that only contain a
3694 single conditional jump. If the result of the comparison is known at
3695 compile-time from any incoming edge, redirect that edge to the
3696 appropriate target. Returns nonzero if a change was made.
3697
3698 This function is now mis-named, because we also handle indirect jumps. */
3699
3700 static int
3701 bypass_conditional_jumps (void)
3702 {
3703 basic_block bb;
3704 int changed;
3705 rtx setcc;
3706 rtx insn;
3707 rtx dest;
3708
3709 /* Note we start at block 1. */
3710 if (ENTRY_BLOCK_PTR->next_bb == EXIT_BLOCK_PTR)
3711 return 0;
3712
3713 bypass_last_basic_block = last_basic_block;
3714 mark_dfs_back_edges ();
3715
3716 changed = 0;
3717 FOR_BB_BETWEEN (bb, ENTRY_BLOCK_PTR->next_bb->next_bb,
3718 EXIT_BLOCK_PTR, next_bb)
3719 {
3720 /* Check for more than one predecessor. */
3721 if (!single_pred_p (bb))
3722 {
3723 setcc = NULL_RTX;
3724 FOR_BB_INSNS (bb, insn)
3725 if (NONJUMP_INSN_P (insn))
3726 {
3727 if (setcc)
3728 break;
3729 if (GET_CODE (PATTERN (insn)) != SET)
3730 break;
3731
3732 dest = SET_DEST (PATTERN (insn));
3733 if (REG_P (dest) || CC0_P (dest))
3734 setcc = insn;
3735 else
3736 break;
3737 }
3738 else if (JUMP_P (insn))
3739 {
3740 if ((any_condjump_p (insn) || computed_jump_p (insn))
3741 && onlyjump_p (insn))
3742 changed |= bypass_block (bb, setcc, insn);
3743 break;
3744 }
3745 else if (INSN_P (insn))
3746 break;
3747 }
3748 }
3749
3750 /* If we bypassed any register setting insns, we inserted a
3751 copy on the redirected edge. These need to be committed. */
3752 if (changed)
3753 commit_edge_insertions ();
3754
3755 return changed;
3756 }
3757 \f
3758 /* Compute PRE+LCM working variables. */
3759
3760 /* Local properties of expressions. */
3761 /* Nonzero for expressions that are transparent in the block. */
3762 static sbitmap *transp;
3763
3764 /* Nonzero for expressions that are transparent at the end of the block.
3765 This is only zero for expressions killed by abnormal critical edge
3766 created by a calls. */
3767 static sbitmap *transpout;
3768
3769 /* Nonzero for expressions that are computed (available) in the block. */
3770 static sbitmap *comp;
3771
3772 /* Nonzero for expressions that are locally anticipatable in the block. */
3773 static sbitmap *antloc;
3774
3775 /* Nonzero for expressions where this block is an optimal computation
3776 point. */
3777 static sbitmap *pre_optimal;
3778
3779 /* Nonzero for expressions which are redundant in a particular block. */
3780 static sbitmap *pre_redundant;
3781
3782 /* Nonzero for expressions which should be inserted on a specific edge. */
3783 static sbitmap *pre_insert_map;
3784
3785 /* Nonzero for expressions which should be deleted in a specific block. */
3786 static sbitmap *pre_delete_map;
3787
3788 /* Contains the edge_list returned by pre_edge_lcm. */
3789 static struct edge_list *edge_list;
3790
3791 /* Redundant insns. */
3792 static sbitmap pre_redundant_insns;
3793
3794 /* Allocate vars used for PRE analysis. */
3795
3796 static void
3797 alloc_pre_mem (int n_blocks, int n_exprs)
3798 {
3799 transp = sbitmap_vector_alloc (n_blocks, n_exprs);
3800 comp = sbitmap_vector_alloc (n_blocks, n_exprs);
3801 antloc = sbitmap_vector_alloc (n_blocks, n_exprs);
3802
3803 pre_optimal = NULL;
3804 pre_redundant = NULL;
3805 pre_insert_map = NULL;
3806 pre_delete_map = NULL;
3807 ae_kill = sbitmap_vector_alloc (n_blocks, n_exprs);
3808
3809 /* pre_insert and pre_delete are allocated later. */
3810 }
3811
3812 /* Free vars used for PRE analysis. */
3813
3814 static void
3815 free_pre_mem (void)
3816 {
3817 sbitmap_vector_free (transp);
3818 sbitmap_vector_free (comp);
3819
3820 /* ANTLOC and AE_KILL are freed just after pre_lcm finishes. */
3821
3822 if (pre_optimal)
3823 sbitmap_vector_free (pre_optimal);
3824 if (pre_redundant)
3825 sbitmap_vector_free (pre_redundant);
3826 if (pre_insert_map)
3827 sbitmap_vector_free (pre_insert_map);
3828 if (pre_delete_map)
3829 sbitmap_vector_free (pre_delete_map);
3830
3831 transp = comp = NULL;
3832 pre_optimal = pre_redundant = pre_insert_map = pre_delete_map = NULL;
3833 }
3834
3835 /* Top level routine to do the dataflow analysis needed by PRE. */
3836
3837 static void
3838 compute_pre_data (void)
3839 {
3840 sbitmap trapping_expr;
3841 basic_block bb;
3842 unsigned int ui;
3843
3844 compute_local_properties (transp, comp, antloc, &expr_hash_table);
3845 sbitmap_vector_zero (ae_kill, last_basic_block);
3846
3847 /* Collect expressions which might trap. */
3848 trapping_expr = sbitmap_alloc (expr_hash_table.n_elems);
3849 sbitmap_zero (trapping_expr);
3850 for (ui = 0; ui < expr_hash_table.size; ui++)
3851 {
3852 struct expr *e;
3853 for (e = expr_hash_table.table[ui]; e != NULL; e = e->next_same_hash)
3854 if (may_trap_p (e->expr))
3855 SET_BIT (trapping_expr, e->bitmap_index);
3856 }
3857
3858 /* Compute ae_kill for each basic block using:
3859
3860 ~(TRANSP | COMP)
3861 */
3862
3863 FOR_EACH_BB (bb)
3864 {
3865 edge e;
3866 edge_iterator ei;
3867
3868 /* If the current block is the destination of an abnormal edge, we
3869 kill all trapping expressions because we won't be able to properly
3870 place the instruction on the edge. So make them neither
3871 anticipatable nor transparent. This is fairly conservative. */
3872 FOR_EACH_EDGE (e, ei, bb->preds)
3873 if (e->flags & EDGE_ABNORMAL)
3874 {
3875 sbitmap_difference (antloc[bb->index], antloc[bb->index], trapping_expr);
3876 sbitmap_difference (transp[bb->index], transp[bb->index], trapping_expr);
3877 break;
3878 }
3879
3880 sbitmap_a_or_b (ae_kill[bb->index], transp[bb->index], comp[bb->index]);
3881 sbitmap_not (ae_kill[bb->index], ae_kill[bb->index]);
3882 }
3883
3884 edge_list = pre_edge_lcm (expr_hash_table.n_elems, transp, comp, antloc,
3885 ae_kill, &pre_insert_map, &pre_delete_map);
3886 sbitmap_vector_free (antloc);
3887 antloc = NULL;
3888 sbitmap_vector_free (ae_kill);
3889 ae_kill = NULL;
3890 sbitmap_free (trapping_expr);
3891 }
3892 \f
3893 /* PRE utilities */
3894
3895 /* Return nonzero if an occurrence of expression EXPR in OCCR_BB would reach
3896 block BB.
3897
3898 VISITED is a pointer to a working buffer for tracking which BB's have
3899 been visited. It is NULL for the top-level call.
3900
3901 We treat reaching expressions that go through blocks containing the same
3902 reaching expression as "not reaching". E.g. if EXPR is generated in blocks
3903 2 and 3, INSN is in block 4, and 2->3->4, we treat the expression in block
3904 2 as not reaching. The intent is to improve the probability of finding
3905 only one reaching expression and to reduce register lifetimes by picking
3906 the closest such expression. */
3907
3908 static int
3909 pre_expr_reaches_here_p_work (basic_block occr_bb, struct expr *expr, basic_block bb, char *visited)
3910 {
3911 edge pred;
3912 edge_iterator ei;
3913
3914 FOR_EACH_EDGE (pred, ei, bb->preds)
3915 {
3916 basic_block pred_bb = pred->src;
3917
3918 if (pred->src == ENTRY_BLOCK_PTR
3919 /* Has predecessor has already been visited? */
3920 || visited[pred_bb->index])
3921 ;/* Nothing to do. */
3922
3923 /* Does this predecessor generate this expression? */
3924 else if (TEST_BIT (comp[pred_bb->index], expr->bitmap_index))
3925 {
3926 /* Is this the occurrence we're looking for?
3927 Note that there's only one generating occurrence per block
3928 so we just need to check the block number. */
3929 if (occr_bb == pred_bb)
3930 return 1;
3931
3932 visited[pred_bb->index] = 1;
3933 }
3934 /* Ignore this predecessor if it kills the expression. */
3935 else if (! TEST_BIT (transp[pred_bb->index], expr->bitmap_index))
3936 visited[pred_bb->index] = 1;
3937
3938 /* Neither gen nor kill. */
3939 else
3940 {
3941 visited[pred_bb->index] = 1;
3942 if (pre_expr_reaches_here_p_work (occr_bb, expr, pred_bb, visited))
3943 return 1;
3944 }
3945 }
3946
3947 /* All paths have been checked. */
3948 return 0;
3949 }
3950
3951 /* The wrapper for pre_expr_reaches_here_work that ensures that any
3952 memory allocated for that function is returned. */
3953
3954 static int
3955 pre_expr_reaches_here_p (basic_block occr_bb, struct expr *expr, basic_block bb)
3956 {
3957 int rval;
3958 char *visited = XCNEWVEC (char, last_basic_block);
3959
3960 rval = pre_expr_reaches_here_p_work (occr_bb, expr, bb, visited);
3961
3962 free (visited);
3963 return rval;
3964 }
3965 \f
3966
3967 /* Given an expr, generate RTL which we can insert at the end of a BB,
3968 or on an edge. Set the block number of any insns generated to
3969 the value of BB. */
3970
3971 static rtx
3972 process_insert_insn (struct expr *expr)
3973 {
3974 rtx reg = expr->reaching_reg;
3975 rtx exp = copy_rtx (expr->expr);
3976 rtx pat;
3977
3978 start_sequence ();
3979
3980 /* If the expression is something that's an operand, like a constant,
3981 just copy it to a register. */
3982 if (general_operand (exp, GET_MODE (reg)))
3983 emit_move_insn (reg, exp);
3984
3985 /* Otherwise, make a new insn to compute this expression and make sure the
3986 insn will be recognized (this also adds any needed CLOBBERs). Copy the
3987 expression to make sure we don't have any sharing issues. */
3988 else
3989 {
3990 rtx insn = emit_insn (gen_rtx_SET (VOIDmode, reg, exp));
3991
3992 if (insn_invalid_p (insn))
3993 gcc_unreachable ();
3994 }
3995
3996
3997 pat = get_insns ();
3998 end_sequence ();
3999
4000 return pat;
4001 }
4002
4003 /* Add EXPR to the end of basic block BB.
4004
4005 This is used by both the PRE and code hoisting.
4006
4007 For PRE, we want to verify that the expr is either transparent
4008 or locally anticipatable in the target block. This check makes
4009 no sense for code hoisting. */
4010
4011 static void
4012 insert_insn_end_basic_block (struct expr *expr, basic_block bb, int pre)
4013 {
4014 rtx insn = BB_END (bb);
4015 rtx new_insn;
4016 rtx reg = expr->reaching_reg;
4017 int regno = REGNO (reg);
4018 rtx pat, pat_end;
4019
4020 pat = process_insert_insn (expr);
4021 gcc_assert (pat && INSN_P (pat));
4022
4023 pat_end = pat;
4024 while (NEXT_INSN (pat_end) != NULL_RTX)
4025 pat_end = NEXT_INSN (pat_end);
4026
4027 /* If the last insn is a jump, insert EXPR in front [taking care to
4028 handle cc0, etc. properly]. Similarly we need to care trapping
4029 instructions in presence of non-call exceptions. */
4030
4031 if (JUMP_P (insn)
4032 || (NONJUMP_INSN_P (insn)
4033 && (!single_succ_p (bb)
4034 || single_succ_edge (bb)->flags & EDGE_ABNORMAL)))
4035 {
4036 #ifdef HAVE_cc0
4037 rtx note;
4038 #endif
4039 /* It should always be the case that we can put these instructions
4040 anywhere in the basic block with performing PRE optimizations.
4041 Check this. */
4042 gcc_assert (!NONJUMP_INSN_P (insn) || !pre
4043 || TEST_BIT (antloc[bb->index], expr->bitmap_index)
4044 || TEST_BIT (transp[bb->index], expr->bitmap_index));
4045
4046 /* If this is a jump table, then we can't insert stuff here. Since
4047 we know the previous real insn must be the tablejump, we insert
4048 the new instruction just before the tablejump. */
4049 if (GET_CODE (PATTERN (insn)) == ADDR_VEC
4050 || GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
4051 insn = prev_real_insn (insn);
4052
4053 #ifdef HAVE_cc0
4054 /* FIXME: 'twould be nice to call prev_cc0_setter here but it aborts
4055 if cc0 isn't set. */
4056 note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
4057 if (note)
4058 insn = XEXP (note, 0);
4059 else
4060 {
4061 rtx maybe_cc0_setter = prev_nonnote_insn (insn);
4062 if (maybe_cc0_setter
4063 && INSN_P (maybe_cc0_setter)
4064 && sets_cc0_p (PATTERN (maybe_cc0_setter)))
4065 insn = maybe_cc0_setter;
4066 }
4067 #endif
4068 /* FIXME: What if something in cc0/jump uses value set in new insn? */
4069 new_insn = emit_insn_before_noloc (pat, insn, bb);
4070 }
4071
4072 /* Likewise if the last insn is a call, as will happen in the presence
4073 of exception handling. */
4074 else if (CALL_P (insn)
4075 && (!single_succ_p (bb)
4076 || single_succ_edge (bb)->flags & EDGE_ABNORMAL))
4077 {
4078 /* Keeping in mind SMALL_REGISTER_CLASSES and parameters in registers,
4079 we search backward and place the instructions before the first
4080 parameter is loaded. Do this for everyone for consistency and a
4081 presumption that we'll get better code elsewhere as well.
4082
4083 It should always be the case that we can put these instructions
4084 anywhere in the basic block with performing PRE optimizations.
4085 Check this. */
4086
4087 gcc_assert (!pre
4088 || TEST_BIT (antloc[bb->index], expr->bitmap_index)
4089 || TEST_BIT (transp[bb->index], expr->bitmap_index));
4090
4091 /* Since different machines initialize their parameter registers
4092 in different orders, assume nothing. Collect the set of all
4093 parameter registers. */
4094 insn = find_first_parameter_load (insn, BB_HEAD (bb));
4095
4096 /* If we found all the parameter loads, then we want to insert
4097 before the first parameter load.
4098
4099 If we did not find all the parameter loads, then we might have
4100 stopped on the head of the block, which could be a CODE_LABEL.
4101 If we inserted before the CODE_LABEL, then we would be putting
4102 the insn in the wrong basic block. In that case, put the insn
4103 after the CODE_LABEL. Also, respect NOTE_INSN_BASIC_BLOCK. */
4104 while (LABEL_P (insn)
4105 || NOTE_INSN_BASIC_BLOCK_P (insn))
4106 insn = NEXT_INSN (insn);
4107
4108 new_insn = emit_insn_before_noloc (pat, insn, bb);
4109 }
4110 else
4111 new_insn = emit_insn_after_noloc (pat, insn, bb);
4112
4113 while (1)
4114 {
4115 if (INSN_P (pat))
4116 {
4117 add_label_notes (PATTERN (pat), new_insn);
4118 note_stores (PATTERN (pat), record_set_info, pat);
4119 }
4120 if (pat == pat_end)
4121 break;
4122 pat = NEXT_INSN (pat);
4123 }
4124
4125 gcse_create_count++;
4126
4127 if (dump_file)
4128 {
4129 fprintf (dump_file, "PRE/HOIST: end of bb %d, insn %d, ",
4130 bb->index, INSN_UID (new_insn));
4131 fprintf (dump_file, "copying expression %d to reg %d\n",
4132 expr->bitmap_index, regno);
4133 }
4134 }
4135
4136 /* Insert partially redundant expressions on edges in the CFG to make
4137 the expressions fully redundant. */
4138
4139 static int
4140 pre_edge_insert (struct edge_list *edge_list, struct expr **index_map)
4141 {
4142 int e, i, j, num_edges, set_size, did_insert = 0;
4143 sbitmap *inserted;
4144
4145 /* Where PRE_INSERT_MAP is nonzero, we add the expression on that edge
4146 if it reaches any of the deleted expressions. */
4147
4148 set_size = pre_insert_map[0]->size;
4149 num_edges = NUM_EDGES (edge_list);
4150 inserted = sbitmap_vector_alloc (num_edges, expr_hash_table.n_elems);
4151 sbitmap_vector_zero (inserted, num_edges);
4152
4153 for (e = 0; e < num_edges; e++)
4154 {
4155 int indx;
4156 basic_block bb = INDEX_EDGE_PRED_BB (edge_list, e);
4157
4158 for (i = indx = 0; i < set_size; i++, indx += SBITMAP_ELT_BITS)
4159 {
4160 SBITMAP_ELT_TYPE insert = pre_insert_map[e]->elms[i];
4161
4162 for (j = indx; insert && j < (int) expr_hash_table.n_elems; j++, insert >>= 1)
4163 if ((insert & 1) != 0 && index_map[j]->reaching_reg != NULL_RTX)
4164 {
4165 struct expr *expr = index_map[j];
4166 struct occr *occr;
4167
4168 /* Now look at each deleted occurrence of this expression. */
4169 for (occr = expr->antic_occr; occr != NULL; occr = occr->next)
4170 {
4171 if (! occr->deleted_p)
4172 continue;
4173
4174 /* Insert this expression on this edge if it would
4175 reach the deleted occurrence in BB. */
4176 if (!TEST_BIT (inserted[e], j))
4177 {
4178 rtx insn;
4179 edge eg = INDEX_EDGE (edge_list, e);
4180
4181 /* We can't insert anything on an abnormal and
4182 critical edge, so we insert the insn at the end of
4183 the previous block. There are several alternatives
4184 detailed in Morgans book P277 (sec 10.5) for
4185 handling this situation. This one is easiest for
4186 now. */
4187
4188 if (eg->flags & EDGE_ABNORMAL)
4189 insert_insn_end_basic_block (index_map[j], bb, 0);
4190 else
4191 {
4192 insn = process_insert_insn (index_map[j]);
4193 insert_insn_on_edge (insn, eg);
4194 }
4195
4196 if (dump_file)
4197 {
4198 fprintf (dump_file, "PRE/HOIST: edge (%d,%d), ",
4199 bb->index,
4200 INDEX_EDGE_SUCC_BB (edge_list, e)->index);
4201 fprintf (dump_file, "copy expression %d\n",
4202 expr->bitmap_index);
4203 }
4204
4205 update_ld_motion_stores (expr);
4206 SET_BIT (inserted[e], j);
4207 did_insert = 1;
4208 gcse_create_count++;
4209 }
4210 }
4211 }
4212 }
4213 }
4214
4215 sbitmap_vector_free (inserted);
4216 return did_insert;
4217 }
4218
4219 /* Copy the result of EXPR->EXPR generated by INSN to EXPR->REACHING_REG.
4220 Given "old_reg <- expr" (INSN), instead of adding after it
4221 reaching_reg <- old_reg
4222 it's better to do the following:
4223 reaching_reg <- expr
4224 old_reg <- reaching_reg
4225 because this way copy propagation can discover additional PRE
4226 opportunities. But if this fails, we try the old way.
4227 When "expr" is a store, i.e.
4228 given "MEM <- old_reg", instead of adding after it
4229 reaching_reg <- old_reg
4230 it's better to add it before as follows:
4231 reaching_reg <- old_reg
4232 MEM <- reaching_reg. */
4233
4234 static void
4235 pre_insert_copy_insn (struct expr *expr, rtx insn)
4236 {
4237 rtx reg = expr->reaching_reg;
4238 int regno = REGNO (reg);
4239 int indx = expr->bitmap_index;
4240 rtx pat = PATTERN (insn);
4241 rtx set, first_set, new_insn;
4242 rtx old_reg;
4243 int i;
4244
4245 /* This block matches the logic in hash_scan_insn. */
4246 switch (GET_CODE (pat))
4247 {
4248 case SET:
4249 set = pat;
4250 break;
4251
4252 case PARALLEL:
4253 /* Search through the parallel looking for the set whose
4254 source was the expression that we're interested in. */
4255 first_set = NULL_RTX;
4256 set = NULL_RTX;
4257 for (i = 0; i < XVECLEN (pat, 0); i++)
4258 {
4259 rtx x = XVECEXP (pat, 0, i);
4260 if (GET_CODE (x) == SET)
4261 {
4262 /* If the source was a REG_EQUAL or REG_EQUIV note, we
4263 may not find an equivalent expression, but in this
4264 case the PARALLEL will have a single set. */
4265 if (first_set == NULL_RTX)
4266 first_set = x;
4267 if (expr_equiv_p (SET_SRC (x), expr->expr))
4268 {
4269 set = x;
4270 break;
4271 }
4272 }
4273 }
4274
4275 gcc_assert (first_set);
4276 if (set == NULL_RTX)
4277 set = first_set;
4278 break;
4279
4280 default:
4281 gcc_unreachable ();
4282 }
4283
4284 if (REG_P (SET_DEST (set)))
4285 {
4286 old_reg = SET_DEST (set);
4287 /* Check if we can modify the set destination in the original insn. */
4288 if (validate_change (insn, &SET_DEST (set), reg, 0))
4289 {
4290 new_insn = gen_move_insn (old_reg, reg);
4291 new_insn = emit_insn_after (new_insn, insn);
4292
4293 /* Keep register set table up to date. */
4294 record_one_set (regno, insn);
4295 }
4296 else
4297 {
4298 new_insn = gen_move_insn (reg, old_reg);
4299 new_insn = emit_insn_after (new_insn, insn);
4300
4301 /* Keep register set table up to date. */
4302 record_one_set (regno, new_insn);
4303 }
4304 }
4305 else /* This is possible only in case of a store to memory. */
4306 {
4307 old_reg = SET_SRC (set);
4308 new_insn = gen_move_insn (reg, old_reg);
4309
4310 /* Check if we can modify the set source in the original insn. */
4311 if (validate_change (insn, &SET_SRC (set), reg, 0))
4312 new_insn = emit_insn_before (new_insn, insn);
4313 else
4314 new_insn = emit_insn_after (new_insn, insn);
4315
4316 /* Keep register set table up to date. */
4317 record_one_set (regno, new_insn);
4318 }
4319
4320 gcse_create_count++;
4321
4322 if (dump_file)
4323 fprintf (dump_file,
4324 "PRE: bb %d, insn %d, copy expression %d in insn %d to reg %d\n",
4325 BLOCK_NUM (insn), INSN_UID (new_insn), indx,
4326 INSN_UID (insn), regno);
4327 }
4328
4329 /* Copy available expressions that reach the redundant expression
4330 to `reaching_reg'. */
4331
4332 static void
4333 pre_insert_copies (void)
4334 {
4335 unsigned int i, added_copy;
4336 struct expr *expr;
4337 struct occr *occr;
4338 struct occr *avail;
4339
4340 /* For each available expression in the table, copy the result to
4341 `reaching_reg' if the expression reaches a deleted one.
4342
4343 ??? The current algorithm is rather brute force.
4344 Need to do some profiling. */
4345
4346 for (i = 0; i < expr_hash_table.size; i++)
4347 for (expr = expr_hash_table.table[i]; expr != NULL; expr = expr->next_same_hash)
4348 {
4349 /* If the basic block isn't reachable, PPOUT will be TRUE. However,
4350 we don't want to insert a copy here because the expression may not
4351 really be redundant. So only insert an insn if the expression was
4352 deleted. This test also avoids further processing if the
4353 expression wasn't deleted anywhere. */
4354 if (expr->reaching_reg == NULL)
4355 continue;
4356
4357 /* Set when we add a copy for that expression. */
4358 added_copy = 0;
4359
4360 for (occr = expr->antic_occr; occr != NULL; occr = occr->next)
4361 {
4362 if (! occr->deleted_p)
4363 continue;
4364
4365 for (avail = expr->avail_occr; avail != NULL; avail = avail->next)
4366 {
4367 rtx insn = avail->insn;
4368
4369 /* No need to handle this one if handled already. */
4370 if (avail->copied_p)
4371 continue;
4372
4373 /* Don't handle this one if it's a redundant one. */
4374 if (TEST_BIT (pre_redundant_insns, INSN_CUID (insn)))
4375 continue;
4376
4377 /* Or if the expression doesn't reach the deleted one. */
4378 if (! pre_expr_reaches_here_p (BLOCK_FOR_INSN (avail->insn),
4379 expr,
4380 BLOCK_FOR_INSN (occr->insn)))
4381 continue;
4382
4383 added_copy = 1;
4384
4385 /* Copy the result of avail to reaching_reg. */
4386 pre_insert_copy_insn (expr, insn);
4387 avail->copied_p = 1;
4388 }
4389 }
4390
4391 if (added_copy)
4392 update_ld_motion_stores (expr);
4393 }
4394 }
4395
4396 /* Emit move from SRC to DEST noting the equivalence with expression computed
4397 in INSN. */
4398 static rtx
4399 gcse_emit_move_after (rtx src, rtx dest, rtx insn)
4400 {
4401 rtx new;
4402 rtx set = single_set (insn), set2;
4403 rtx note;
4404 rtx eqv;
4405
4406 /* This should never fail since we're creating a reg->reg copy
4407 we've verified to be valid. */
4408
4409 new = emit_insn_after (gen_move_insn (dest, src), insn);
4410
4411 /* Note the equivalence for local CSE pass. */
4412 set2 = single_set (new);
4413 if (!set2 || !rtx_equal_p (SET_DEST (set2), dest))
4414 return new;
4415 if ((note = find_reg_equal_equiv_note (insn)))
4416 eqv = XEXP (note, 0);
4417 else
4418 eqv = SET_SRC (set);
4419
4420 set_unique_reg_note (new, REG_EQUAL, copy_insn_1 (eqv));
4421
4422 return new;
4423 }
4424
4425 /* Delete redundant computations.
4426 Deletion is done by changing the insn to copy the `reaching_reg' of
4427 the expression into the result of the SET. It is left to later passes
4428 (cprop, cse2, flow, combine, regmove) to propagate the copy or eliminate it.
4429
4430 Returns nonzero if a change is made. */
4431
4432 static int
4433 pre_delete (void)
4434 {
4435 unsigned int i;
4436 int changed;
4437 struct expr *expr;
4438 struct occr *occr;
4439
4440 changed = 0;
4441 for (i = 0; i < expr_hash_table.size; i++)
4442 for (expr = expr_hash_table.table[i];
4443 expr != NULL;
4444 expr = expr->next_same_hash)
4445 {
4446 int indx = expr->bitmap_index;
4447
4448 /* We only need to search antic_occr since we require
4449 ANTLOC != 0. */
4450
4451 for (occr = expr->antic_occr; occr != NULL; occr = occr->next)
4452 {
4453 rtx insn = occr->insn;
4454 rtx set;
4455 basic_block bb = BLOCK_FOR_INSN (insn);
4456
4457 /* We only delete insns that have a single_set. */
4458 if (TEST_BIT (pre_delete_map[bb->index], indx)
4459 && (set = single_set (insn)) != 0
4460 && dbg_cnt (pre_insn))
4461 {
4462 /* Create a pseudo-reg to store the result of reaching
4463 expressions into. Get the mode for the new pseudo from
4464 the mode of the original destination pseudo. */
4465 if (expr->reaching_reg == NULL)
4466 expr->reaching_reg = gen_reg_rtx_and_attrs (SET_DEST (set));
4467
4468 gcse_emit_move_after (expr->reaching_reg, SET_DEST (set), insn);
4469 delete_insn (insn);
4470 occr->deleted_p = 1;
4471 SET_BIT (pre_redundant_insns, INSN_CUID (insn));
4472 changed = 1;
4473 gcse_subst_count++;
4474
4475 if (dump_file)
4476 {
4477 fprintf (dump_file,
4478 "PRE: redundant insn %d (expression %d) in ",
4479 INSN_UID (insn), indx);
4480 fprintf (dump_file, "bb %d, reaching reg is %d\n",
4481 bb->index, REGNO (expr->reaching_reg));
4482 }
4483 }
4484 }
4485 }
4486
4487 return changed;
4488 }
4489
4490 /* Perform GCSE optimizations using PRE.
4491 This is called by one_pre_gcse_pass after all the dataflow analysis
4492 has been done.
4493
4494 This is based on the original Morel-Renvoise paper Fred Chow's thesis, and
4495 lazy code motion from Knoop, Ruthing and Steffen as described in Advanced
4496 Compiler Design and Implementation.
4497
4498 ??? A new pseudo reg is created to hold the reaching expression. The nice
4499 thing about the classical approach is that it would try to use an existing
4500 reg. If the register can't be adequately optimized [i.e. we introduce
4501 reload problems], one could add a pass here to propagate the new register
4502 through the block.
4503
4504 ??? We don't handle single sets in PARALLELs because we're [currently] not
4505 able to copy the rest of the parallel when we insert copies to create full
4506 redundancies from partial redundancies. However, there's no reason why we
4507 can't handle PARALLELs in the cases where there are no partial
4508 redundancies. */
4509
4510 static int
4511 pre_gcse (void)
4512 {
4513 unsigned int i;
4514 int did_insert, changed;
4515 struct expr **index_map;
4516 struct expr *expr;
4517
4518 /* Compute a mapping from expression number (`bitmap_index') to
4519 hash table entry. */
4520
4521 index_map = XCNEWVEC (struct expr *, expr_hash_table.n_elems);
4522 for (i = 0; i < expr_hash_table.size; i++)
4523 for (expr = expr_hash_table.table[i]; expr != NULL; expr = expr->next_same_hash)
4524 index_map[expr->bitmap_index] = expr;
4525
4526 /* Reset bitmap used to track which insns are redundant. */
4527 pre_redundant_insns = sbitmap_alloc (max_cuid);
4528 sbitmap_zero (pre_redundant_insns);
4529
4530 /* Delete the redundant insns first so that
4531 - we know what register to use for the new insns and for the other
4532 ones with reaching expressions
4533 - we know which insns are redundant when we go to create copies */
4534
4535 changed = pre_delete ();
4536 did_insert = pre_edge_insert (edge_list, index_map);
4537
4538 /* In other places with reaching expressions, copy the expression to the
4539 specially allocated pseudo-reg that reaches the redundant expr. */
4540 pre_insert_copies ();
4541 if (did_insert)
4542 {
4543 commit_edge_insertions ();
4544 changed = 1;
4545 }
4546
4547 free (index_map);
4548 sbitmap_free (pre_redundant_insns);
4549 return changed;
4550 }
4551
4552 /* Top level routine to perform one PRE GCSE pass.
4553
4554 Return nonzero if a change was made. */
4555
4556 static int
4557 one_pre_gcse_pass (int pass)
4558 {
4559 int changed = 0;
4560
4561 gcse_subst_count = 0;
4562 gcse_create_count = 0;
4563
4564 alloc_hash_table (max_cuid, &expr_hash_table, 0);
4565 add_noreturn_fake_exit_edges ();
4566 if (flag_gcse_lm)
4567 compute_ld_motion_mems ();
4568
4569 compute_hash_table (&expr_hash_table);
4570 trim_ld_motion_mems ();
4571 if (dump_file)
4572 dump_hash_table (dump_file, "Expression", &expr_hash_table);
4573
4574 if (expr_hash_table.n_elems > 0)
4575 {
4576 alloc_pre_mem (last_basic_block, expr_hash_table.n_elems);
4577 compute_pre_data ();
4578 changed |= pre_gcse ();
4579 free_edge_list (edge_list);
4580 free_pre_mem ();
4581 }
4582
4583 free_ldst_mems ();
4584 remove_fake_exit_edges ();
4585 free_hash_table (&expr_hash_table);
4586
4587 if (dump_file)
4588 {
4589 fprintf (dump_file, "\nPRE GCSE of %s, pass %d: %d bytes needed, ",
4590 current_function_name (), pass, bytes_used);
4591 fprintf (dump_file, "%d substs, %d insns created\n",
4592 gcse_subst_count, gcse_create_count);
4593 }
4594
4595 return changed;
4596 }
4597 \f
4598 /* If X contains any LABEL_REF's, add REG_LABEL_OPERAND notes for them
4599 to INSN. If such notes are added to an insn which references a
4600 CODE_LABEL, the LABEL_NUSES count is incremented. We have to add
4601 that note, because the following loop optimization pass requires
4602 them. */
4603
4604 /* ??? If there was a jump optimization pass after gcse and before loop,
4605 then we would not need to do this here, because jump would add the
4606 necessary REG_LABEL_OPERAND and REG_LABEL_TARGET notes. */
4607
4608 static void
4609 add_label_notes (rtx x, rtx insn)
4610 {
4611 enum rtx_code code = GET_CODE (x);
4612 int i, j;
4613 const char *fmt;
4614
4615 if (code == LABEL_REF && !LABEL_REF_NONLOCAL_P (x))
4616 {
4617 /* This code used to ignore labels that referred to dispatch tables to
4618 avoid flow generating (slightly) worse code.
4619
4620 We no longer ignore such label references (see LABEL_REF handling in
4621 mark_jump_label for additional information). */
4622
4623 /* There's no reason for current users to emit jump-insns with
4624 such a LABEL_REF, so we don't have to handle REG_LABEL_TARGET
4625 notes. */
4626 gcc_assert (!JUMP_P (insn));
4627 REG_NOTES (insn)
4628 = gen_rtx_INSN_LIST (REG_LABEL_OPERAND, XEXP (x, 0),
4629 REG_NOTES (insn));
4630 if (LABEL_P (XEXP (x, 0)))
4631 LABEL_NUSES (XEXP (x, 0))++;
4632
4633 return;
4634 }
4635
4636 for (i = GET_RTX_LENGTH (code) - 1, fmt = GET_RTX_FORMAT (code); i >= 0; i--)
4637 {
4638 if (fmt[i] == 'e')
4639 add_label_notes (XEXP (x, i), insn);
4640 else if (fmt[i] == 'E')
4641 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
4642 add_label_notes (XVECEXP (x, i, j), insn);
4643 }
4644 }
4645
4646 /* Compute transparent outgoing information for each block.
4647
4648 An expression is transparent to an edge unless it is killed by
4649 the edge itself. This can only happen with abnormal control flow,
4650 when the edge is traversed through a call. This happens with
4651 non-local labels and exceptions.
4652
4653 This would not be necessary if we split the edge. While this is
4654 normally impossible for abnormal critical edges, with some effort
4655 it should be possible with exception handling, since we still have
4656 control over which handler should be invoked. But due to increased
4657 EH table sizes, this may not be worthwhile. */
4658
4659 static void
4660 compute_transpout (void)
4661 {
4662 basic_block bb;
4663 unsigned int i;
4664 struct expr *expr;
4665
4666 sbitmap_vector_ones (transpout, last_basic_block);
4667
4668 FOR_EACH_BB (bb)
4669 {
4670 /* Note that flow inserted a nop a the end of basic blocks that
4671 end in call instructions for reasons other than abnormal
4672 control flow. */
4673 if (! CALL_P (BB_END (bb)))
4674 continue;
4675
4676 for (i = 0; i < expr_hash_table.size; i++)
4677 for (expr = expr_hash_table.table[i]; expr ; expr = expr->next_same_hash)
4678 if (MEM_P (expr->expr))
4679 {
4680 if (GET_CODE (XEXP (expr->expr, 0)) == SYMBOL_REF
4681 && CONSTANT_POOL_ADDRESS_P (XEXP (expr->expr, 0)))
4682 continue;
4683
4684 /* ??? Optimally, we would use interprocedural alias
4685 analysis to determine if this mem is actually killed
4686 by this call. */
4687 RESET_BIT (transpout[bb->index], expr->bitmap_index);
4688 }
4689 }
4690 }
4691
4692 /* Code Hoisting variables and subroutines. */
4693
4694 /* Very busy expressions. */
4695 static sbitmap *hoist_vbein;
4696 static sbitmap *hoist_vbeout;
4697
4698 /* Hoistable expressions. */
4699 static sbitmap *hoist_exprs;
4700
4701 /* ??? We could compute post dominators and run this algorithm in
4702 reverse to perform tail merging, doing so would probably be
4703 more effective than the tail merging code in jump.c.
4704
4705 It's unclear if tail merging could be run in parallel with
4706 code hoisting. It would be nice. */
4707
4708 /* Allocate vars used for code hoisting analysis. */
4709
4710 static void
4711 alloc_code_hoist_mem (int n_blocks, int n_exprs)
4712 {
4713 antloc = sbitmap_vector_alloc (n_blocks, n_exprs);
4714 transp = sbitmap_vector_alloc (n_blocks, n_exprs);
4715 comp = sbitmap_vector_alloc (n_blocks, n_exprs);
4716
4717 hoist_vbein = sbitmap_vector_alloc (n_blocks, n_exprs);
4718 hoist_vbeout = sbitmap_vector_alloc (n_blocks, n_exprs);
4719 hoist_exprs = sbitmap_vector_alloc (n_blocks, n_exprs);
4720 transpout = sbitmap_vector_alloc (n_blocks, n_exprs);
4721 }
4722
4723 /* Free vars used for code hoisting analysis. */
4724
4725 static void
4726 free_code_hoist_mem (void)
4727 {
4728 sbitmap_vector_free (antloc);
4729 sbitmap_vector_free (transp);
4730 sbitmap_vector_free (comp);
4731
4732 sbitmap_vector_free (hoist_vbein);
4733 sbitmap_vector_free (hoist_vbeout);
4734 sbitmap_vector_free (hoist_exprs);
4735 sbitmap_vector_free (transpout);
4736
4737 free_dominance_info (CDI_DOMINATORS);
4738 }
4739
4740 /* Compute the very busy expressions at entry/exit from each block.
4741
4742 An expression is very busy if all paths from a given point
4743 compute the expression. */
4744
4745 static void
4746 compute_code_hoist_vbeinout (void)
4747 {
4748 int changed, passes;
4749 basic_block bb;
4750
4751 sbitmap_vector_zero (hoist_vbeout, last_basic_block);
4752 sbitmap_vector_zero (hoist_vbein, last_basic_block);
4753
4754 passes = 0;
4755 changed = 1;
4756
4757 while (changed)
4758 {
4759 changed = 0;
4760
4761 /* We scan the blocks in the reverse order to speed up
4762 the convergence. */
4763 FOR_EACH_BB_REVERSE (bb)
4764 {
4765 if (bb->next_bb != EXIT_BLOCK_PTR)
4766 sbitmap_intersection_of_succs (hoist_vbeout[bb->index],
4767 hoist_vbein, bb->index);
4768
4769 changed |= sbitmap_a_or_b_and_c_cg (hoist_vbein[bb->index],
4770 antloc[bb->index],
4771 hoist_vbeout[bb->index],
4772 transp[bb->index]);
4773 }
4774
4775 passes++;
4776 }
4777
4778 if (dump_file)
4779 fprintf (dump_file, "hoisting vbeinout computation: %d passes\n", passes);
4780 }
4781
4782 /* Top level routine to do the dataflow analysis needed by code hoisting. */
4783
4784 static void
4785 compute_code_hoist_data (void)
4786 {
4787 compute_local_properties (transp, comp, antloc, &expr_hash_table);
4788 compute_transpout ();
4789 compute_code_hoist_vbeinout ();
4790 calculate_dominance_info (CDI_DOMINATORS);
4791 if (dump_file)
4792 fprintf (dump_file, "\n");
4793 }
4794
4795 /* Determine if the expression identified by EXPR_INDEX would
4796 reach BB unimpared if it was placed at the end of EXPR_BB.
4797
4798 It's unclear exactly what Muchnick meant by "unimpared". It seems
4799 to me that the expression must either be computed or transparent in
4800 *every* block in the path(s) from EXPR_BB to BB. Any other definition
4801 would allow the expression to be hoisted out of loops, even if
4802 the expression wasn't a loop invariant.
4803
4804 Contrast this to reachability for PRE where an expression is
4805 considered reachable if *any* path reaches instead of *all*
4806 paths. */
4807
4808 static int
4809 hoist_expr_reaches_here_p (basic_block expr_bb, int expr_index, basic_block bb, char *visited)
4810 {
4811 edge pred;
4812 edge_iterator ei;
4813 int visited_allocated_locally = 0;
4814
4815
4816 if (visited == NULL)
4817 {
4818 visited_allocated_locally = 1;
4819 visited = XCNEWVEC (char, last_basic_block);
4820 }
4821
4822 FOR_EACH_EDGE (pred, ei, bb->preds)
4823 {
4824 basic_block pred_bb = pred->src;
4825
4826 if (pred->src == ENTRY_BLOCK_PTR)
4827 break;
4828 else if (pred_bb == expr_bb)
4829 continue;
4830 else if (visited[pred_bb->index])
4831 continue;
4832
4833 /* Does this predecessor generate this expression? */
4834 else if (TEST_BIT (comp[pred_bb->index], expr_index))
4835 break;
4836 else if (! TEST_BIT (transp[pred_bb->index], expr_index))
4837 break;
4838
4839 /* Not killed. */
4840 else
4841 {
4842 visited[pred_bb->index] = 1;
4843 if (! hoist_expr_reaches_here_p (expr_bb, expr_index,
4844 pred_bb, visited))
4845 break;
4846 }
4847 }
4848 if (visited_allocated_locally)
4849 free (visited);
4850
4851 return (pred == NULL);
4852 }
4853 \f
4854 /* Actually perform code hoisting. */
4855
4856 static void
4857 hoist_code (void)
4858 {
4859 basic_block bb, dominated;
4860 VEC (basic_block, heap) *domby;
4861 unsigned int i,j;
4862 struct expr **index_map;
4863 struct expr *expr;
4864
4865 sbitmap_vector_zero (hoist_exprs, last_basic_block);
4866
4867 /* Compute a mapping from expression number (`bitmap_index') to
4868 hash table entry. */
4869
4870 index_map = XCNEWVEC (struct expr *, expr_hash_table.n_elems);
4871 for (i = 0; i < expr_hash_table.size; i++)
4872 for (expr = expr_hash_table.table[i]; expr != NULL; expr = expr->next_same_hash)
4873 index_map[expr->bitmap_index] = expr;
4874
4875 /* Walk over each basic block looking for potentially hoistable
4876 expressions, nothing gets hoisted from the entry block. */
4877 FOR_EACH_BB (bb)
4878 {
4879 int found = 0;
4880 int insn_inserted_p;
4881
4882 domby = get_dominated_by (CDI_DOMINATORS, bb);
4883 /* Examine each expression that is very busy at the exit of this
4884 block. These are the potentially hoistable expressions. */
4885 for (i = 0; i < hoist_vbeout[bb->index]->n_bits; i++)
4886 {
4887 int hoistable = 0;
4888
4889 if (TEST_BIT (hoist_vbeout[bb->index], i)
4890 && TEST_BIT (transpout[bb->index], i))
4891 {
4892 /* We've found a potentially hoistable expression, now
4893 we look at every block BB dominates to see if it
4894 computes the expression. */
4895 for (j = 0; VEC_iterate (basic_block, domby, j, dominated); j++)
4896 {
4897 /* Ignore self dominance. */
4898 if (bb == dominated)
4899 continue;
4900 /* We've found a dominated block, now see if it computes
4901 the busy expression and whether or not moving that
4902 expression to the "beginning" of that block is safe. */
4903 if (!TEST_BIT (antloc[dominated->index], i))
4904 continue;
4905
4906 /* Note if the expression would reach the dominated block
4907 unimpared if it was placed at the end of BB.
4908
4909 Keep track of how many times this expression is hoistable
4910 from a dominated block into BB. */
4911 if (hoist_expr_reaches_here_p (bb, i, dominated, NULL))
4912 hoistable++;
4913 }
4914
4915 /* If we found more than one hoistable occurrence of this
4916 expression, then note it in the bitmap of expressions to
4917 hoist. It makes no sense to hoist things which are computed
4918 in only one BB, and doing so tends to pessimize register
4919 allocation. One could increase this value to try harder
4920 to avoid any possible code expansion due to register
4921 allocation issues; however experiments have shown that
4922 the vast majority of hoistable expressions are only movable
4923 from two successors, so raising this threshold is likely
4924 to nullify any benefit we get from code hoisting. */
4925 if (hoistable > 1)
4926 {
4927 SET_BIT (hoist_exprs[bb->index], i);
4928 found = 1;
4929 }
4930 }
4931 }
4932 /* If we found nothing to hoist, then quit now. */
4933 if (! found)
4934 {
4935 VEC_free (basic_block, heap, domby);
4936 continue;
4937 }
4938
4939 /* Loop over all the hoistable expressions. */
4940 for (i = 0; i < hoist_exprs[bb->index]->n_bits; i++)
4941 {
4942 /* We want to insert the expression into BB only once, so
4943 note when we've inserted it. */
4944 insn_inserted_p = 0;
4945
4946 /* These tests should be the same as the tests above. */
4947 if (TEST_BIT (hoist_exprs[bb->index], i))
4948 {
4949 /* We've found a potentially hoistable expression, now
4950 we look at every block BB dominates to see if it
4951 computes the expression. */
4952 for (j = 0; VEC_iterate (basic_block, domby, j, dominated); j++)
4953 {
4954 /* Ignore self dominance. */
4955 if (bb == dominated)
4956 continue;
4957
4958 /* We've found a dominated block, now see if it computes
4959 the busy expression and whether or not moving that
4960 expression to the "beginning" of that block is safe. */
4961 if (!TEST_BIT (antloc[dominated->index], i))
4962 continue;
4963
4964 /* The expression is computed in the dominated block and
4965 it would be safe to compute it at the start of the
4966 dominated block. Now we have to determine if the
4967 expression would reach the dominated block if it was
4968 placed at the end of BB. */
4969 if (hoist_expr_reaches_here_p (bb, i, dominated, NULL))
4970 {
4971 struct expr *expr = index_map[i];
4972 struct occr *occr = expr->antic_occr;
4973 rtx insn;
4974 rtx set;
4975
4976 /* Find the right occurrence of this expression. */
4977 while (BLOCK_FOR_INSN (occr->insn) != dominated && occr)
4978 occr = occr->next;
4979
4980 gcc_assert (occr);
4981 insn = occr->insn;
4982 set = single_set (insn);
4983 gcc_assert (set);
4984
4985 /* Create a pseudo-reg to store the result of reaching
4986 expressions into. Get the mode for the new pseudo
4987 from the mode of the original destination pseudo. */
4988 if (expr->reaching_reg == NULL)
4989 expr->reaching_reg
4990 = gen_reg_rtx_and_attrs (SET_DEST (set));
4991
4992 gcse_emit_move_after (expr->reaching_reg, SET_DEST (set), insn);
4993 delete_insn (insn);
4994 occr->deleted_p = 1;
4995 if (!insn_inserted_p)
4996 {
4997 insert_insn_end_basic_block (index_map[i], bb, 0);
4998 insn_inserted_p = 1;
4999 }
5000 }
5001 }
5002 }
5003 }
5004 VEC_free (basic_block, heap, domby);
5005 }
5006
5007 free (index_map);
5008 }
5009
5010 /* Top level routine to perform one code hoisting (aka unification) pass
5011
5012 Return nonzero if a change was made. */
5013
5014 static int
5015 one_code_hoisting_pass (void)
5016 {
5017 int changed = 0;
5018
5019 alloc_hash_table (max_cuid, &expr_hash_table, 0);
5020 compute_hash_table (&expr_hash_table);
5021 if (dump_file)
5022 dump_hash_table (dump_file, "Code Hosting Expressions", &expr_hash_table);
5023
5024 if (expr_hash_table.n_elems > 0)
5025 {
5026 alloc_code_hoist_mem (last_basic_block, expr_hash_table.n_elems);
5027 compute_code_hoist_data ();
5028 hoist_code ();
5029 free_code_hoist_mem ();
5030 }
5031
5032 free_hash_table (&expr_hash_table);
5033
5034 return changed;
5035 }
5036 \f
5037 /* Here we provide the things required to do store motion towards
5038 the exit. In order for this to be effective, gcse also needed to
5039 be taught how to move a load when it is kill only by a store to itself.
5040
5041 int i;
5042 float a[10];
5043
5044 void foo(float scale)
5045 {
5046 for (i=0; i<10; i++)
5047 a[i] *= scale;
5048 }
5049
5050 'i' is both loaded and stored to in the loop. Normally, gcse cannot move
5051 the load out since its live around the loop, and stored at the bottom
5052 of the loop.
5053
5054 The 'Load Motion' referred to and implemented in this file is
5055 an enhancement to gcse which when using edge based lcm, recognizes
5056 this situation and allows gcse to move the load out of the loop.
5057
5058 Once gcse has hoisted the load, store motion can then push this
5059 load towards the exit, and we end up with no loads or stores of 'i'
5060 in the loop. */
5061
5062 static hashval_t
5063 pre_ldst_expr_hash (const void *p)
5064 {
5065 int do_not_record_p = 0;
5066 const struct ls_expr *x = p;
5067 return hash_rtx (x->pattern, GET_MODE (x->pattern), &do_not_record_p, NULL, false);
5068 }
5069
5070 static int
5071 pre_ldst_expr_eq (const void *p1, const void *p2)
5072 {
5073 const struct ls_expr *ptr1 = p1, *ptr2 = p2;
5074 return expr_equiv_p (ptr1->pattern, ptr2->pattern);
5075 }
5076
5077 /* This will search the ldst list for a matching expression. If it
5078 doesn't find one, we create one and initialize it. */
5079
5080 static struct ls_expr *
5081 ldst_entry (rtx x)
5082 {
5083 int do_not_record_p = 0;
5084 struct ls_expr * ptr;
5085 unsigned int hash;
5086 void **slot;
5087 struct ls_expr e;
5088
5089 hash = hash_rtx (x, GET_MODE (x), &do_not_record_p,
5090 NULL, /*have_reg_qty=*/false);
5091
5092 e.pattern = x;
5093 slot = htab_find_slot_with_hash (pre_ldst_table, &e, hash, INSERT);
5094 if (*slot)
5095 return (struct ls_expr *)*slot;
5096
5097 ptr = XNEW (struct ls_expr);
5098
5099 ptr->next = pre_ldst_mems;
5100 ptr->expr = NULL;
5101 ptr->pattern = x;
5102 ptr->pattern_regs = NULL_RTX;
5103 ptr->loads = NULL_RTX;
5104 ptr->stores = NULL_RTX;
5105 ptr->reaching_reg = NULL_RTX;
5106 ptr->invalid = 0;
5107 ptr->index = 0;
5108 ptr->hash_index = hash;
5109 pre_ldst_mems = ptr;
5110 *slot = ptr;
5111
5112 return ptr;
5113 }
5114
5115 /* Free up an individual ldst entry. */
5116
5117 static void
5118 free_ldst_entry (struct ls_expr * ptr)
5119 {
5120 free_INSN_LIST_list (& ptr->loads);
5121 free_INSN_LIST_list (& ptr->stores);
5122
5123 free (ptr);
5124 }
5125
5126 /* Free up all memory associated with the ldst list. */
5127
5128 static void
5129 free_ldst_mems (void)
5130 {
5131 if (pre_ldst_table)
5132 htab_delete (pre_ldst_table);
5133 pre_ldst_table = NULL;
5134
5135 while (pre_ldst_mems)
5136 {
5137 struct ls_expr * tmp = pre_ldst_mems;
5138
5139 pre_ldst_mems = pre_ldst_mems->next;
5140
5141 free_ldst_entry (tmp);
5142 }
5143
5144 pre_ldst_mems = NULL;
5145 }
5146
5147 /* Dump debugging info about the ldst list. */
5148
5149 static void
5150 print_ldst_list (FILE * file)
5151 {
5152 struct ls_expr * ptr;
5153
5154 fprintf (file, "LDST list: \n");
5155
5156 for (ptr = first_ls_expr (); ptr != NULL; ptr = next_ls_expr (ptr))
5157 {
5158 fprintf (file, " Pattern (%3d): ", ptr->index);
5159
5160 print_rtl (file, ptr->pattern);
5161
5162 fprintf (file, "\n Loads : ");
5163
5164 if (ptr->loads)
5165 print_rtl (file, ptr->loads);
5166 else
5167 fprintf (file, "(nil)");
5168
5169 fprintf (file, "\n Stores : ");
5170
5171 if (ptr->stores)
5172 print_rtl (file, ptr->stores);
5173 else
5174 fprintf (file, "(nil)");
5175
5176 fprintf (file, "\n\n");
5177 }
5178
5179 fprintf (file, "\n");
5180 }
5181
5182 /* Returns 1 if X is in the list of ldst only expressions. */
5183
5184 static struct ls_expr *
5185 find_rtx_in_ldst (rtx x)
5186 {
5187 struct ls_expr e;
5188 void **slot;
5189 if (!pre_ldst_table)
5190 return NULL;
5191 e.pattern = x;
5192 slot = htab_find_slot (pre_ldst_table, &e, NO_INSERT);
5193 if (!slot || ((struct ls_expr *)*slot)->invalid)
5194 return NULL;
5195 return *slot;
5196 }
5197
5198 /* Assign each element of the list of mems a monotonically increasing value. */
5199
5200 static int
5201 enumerate_ldsts (void)
5202 {
5203 struct ls_expr * ptr;
5204 int n = 0;
5205
5206 for (ptr = pre_ldst_mems; ptr != NULL; ptr = ptr->next)
5207 ptr->index = n++;
5208
5209 return n;
5210 }
5211
5212 /* Return first item in the list. */
5213
5214 static inline struct ls_expr *
5215 first_ls_expr (void)
5216 {
5217 return pre_ldst_mems;
5218 }
5219
5220 /* Return the next item in the list after the specified one. */
5221
5222 static inline struct ls_expr *
5223 next_ls_expr (struct ls_expr * ptr)
5224 {
5225 return ptr->next;
5226 }
5227 \f
5228 /* Load Motion for loads which only kill themselves. */
5229
5230 /* Return true if x is a simple MEM operation, with no registers or
5231 side effects. These are the types of loads we consider for the
5232 ld_motion list, otherwise we let the usual aliasing take care of it. */
5233
5234 static int
5235 simple_mem (const_rtx x)
5236 {
5237 if (! MEM_P (x))
5238 return 0;
5239
5240 if (MEM_VOLATILE_P (x))
5241 return 0;
5242
5243 if (GET_MODE (x) == BLKmode)
5244 return 0;
5245
5246 /* If we are handling exceptions, we must be careful with memory references
5247 that may trap. If we are not, the behavior is undefined, so we may just
5248 continue. */
5249 if (flag_non_call_exceptions && may_trap_p (x))
5250 return 0;
5251
5252 if (side_effects_p (x))
5253 return 0;
5254
5255 /* Do not consider function arguments passed on stack. */
5256 if (reg_mentioned_p (stack_pointer_rtx, x))
5257 return 0;
5258
5259 if (flag_float_store && FLOAT_MODE_P (GET_MODE (x)))
5260 return 0;
5261
5262 return 1;
5263 }
5264
5265 /* Make sure there isn't a buried reference in this pattern anywhere.
5266 If there is, invalidate the entry for it since we're not capable
5267 of fixing it up just yet.. We have to be sure we know about ALL
5268 loads since the aliasing code will allow all entries in the
5269 ld_motion list to not-alias itself. If we miss a load, we will get
5270 the wrong value since gcse might common it and we won't know to
5271 fix it up. */
5272
5273 static void
5274 invalidate_any_buried_refs (rtx x)
5275 {
5276 const char * fmt;
5277 int i, j;
5278 struct ls_expr * ptr;
5279
5280 /* Invalidate it in the list. */
5281 if (MEM_P (x) && simple_mem (x))
5282 {
5283 ptr = ldst_entry (x);
5284 ptr->invalid = 1;
5285 }
5286
5287 /* Recursively process the insn. */
5288 fmt = GET_RTX_FORMAT (GET_CODE (x));
5289
5290 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
5291 {
5292 if (fmt[i] == 'e')
5293 invalidate_any_buried_refs (XEXP (x, i));
5294 else if (fmt[i] == 'E')
5295 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
5296 invalidate_any_buried_refs (XVECEXP (x, i, j));
5297 }
5298 }
5299
5300 /* Find all the 'simple' MEMs which are used in LOADs and STORES. Simple
5301 being defined as MEM loads and stores to symbols, with no side effects
5302 and no registers in the expression. For a MEM destination, we also
5303 check that the insn is still valid if we replace the destination with a
5304 REG, as is done in update_ld_motion_stores. If there are any uses/defs
5305 which don't match this criteria, they are invalidated and trimmed out
5306 later. */
5307
5308 static void
5309 compute_ld_motion_mems (void)
5310 {
5311 struct ls_expr * ptr;
5312 basic_block bb;
5313 rtx insn;
5314
5315 pre_ldst_mems = NULL;
5316 pre_ldst_table = htab_create (13, pre_ldst_expr_hash,
5317 pre_ldst_expr_eq, NULL);
5318
5319 FOR_EACH_BB (bb)
5320 {
5321 FOR_BB_INSNS (bb, insn)
5322 {
5323 if (INSN_P (insn))
5324 {
5325 if (GET_CODE (PATTERN (insn)) == SET)
5326 {
5327 rtx src = SET_SRC (PATTERN (insn));
5328 rtx dest = SET_DEST (PATTERN (insn));
5329
5330 /* Check for a simple LOAD... */
5331 if (MEM_P (src) && simple_mem (src))
5332 {
5333 ptr = ldst_entry (src);
5334 if (REG_P (dest))
5335 ptr->loads = alloc_INSN_LIST (insn, ptr->loads);
5336 else
5337 ptr->invalid = 1;
5338 }
5339 else
5340 {
5341 /* Make sure there isn't a buried load somewhere. */
5342 invalidate_any_buried_refs (src);
5343 }
5344
5345 /* Check for stores. Don't worry about aliased ones, they
5346 will block any movement we might do later. We only care
5347 about this exact pattern since those are the only
5348 circumstance that we will ignore the aliasing info. */
5349 if (MEM_P (dest) && simple_mem (dest))
5350 {
5351 ptr = ldst_entry (dest);
5352
5353 if (! MEM_P (src)
5354 && GET_CODE (src) != ASM_OPERANDS
5355 /* Check for REG manually since want_to_gcse_p
5356 returns 0 for all REGs. */
5357 && can_assign_to_reg_p (src))
5358 ptr->stores = alloc_INSN_LIST (insn, ptr->stores);
5359 else
5360 ptr->invalid = 1;
5361 }
5362 }
5363 else
5364 invalidate_any_buried_refs (PATTERN (insn));
5365 }
5366 }
5367 }
5368 }
5369
5370 /* Remove any references that have been either invalidated or are not in the
5371 expression list for pre gcse. */
5372
5373 static void
5374 trim_ld_motion_mems (void)
5375 {
5376 struct ls_expr * * last = & pre_ldst_mems;
5377 struct ls_expr * ptr = pre_ldst_mems;
5378
5379 while (ptr != NULL)
5380 {
5381 struct expr * expr;
5382
5383 /* Delete if entry has been made invalid. */
5384 if (! ptr->invalid)
5385 {
5386 /* Delete if we cannot find this mem in the expression list. */
5387 unsigned int hash = ptr->hash_index % expr_hash_table.size;
5388
5389 for (expr = expr_hash_table.table[hash];
5390 expr != NULL;
5391 expr = expr->next_same_hash)
5392 if (expr_equiv_p (expr->expr, ptr->pattern))
5393 break;
5394 }
5395 else
5396 expr = (struct expr *) 0;
5397
5398 if (expr)
5399 {
5400 /* Set the expression field if we are keeping it. */
5401 ptr->expr = expr;
5402 last = & ptr->next;
5403 ptr = ptr->next;
5404 }
5405 else
5406 {
5407 *last = ptr->next;
5408 htab_remove_elt_with_hash (pre_ldst_table, ptr, ptr->hash_index);
5409 free_ldst_entry (ptr);
5410 ptr = * last;
5411 }
5412 }
5413
5414 /* Show the world what we've found. */
5415 if (dump_file && pre_ldst_mems != NULL)
5416 print_ldst_list (dump_file);
5417 }
5418
5419 /* This routine will take an expression which we are replacing with
5420 a reaching register, and update any stores that are needed if
5421 that expression is in the ld_motion list. Stores are updated by
5422 copying their SRC to the reaching register, and then storing
5423 the reaching register into the store location. These keeps the
5424 correct value in the reaching register for the loads. */
5425
5426 static void
5427 update_ld_motion_stores (struct expr * expr)
5428 {
5429 struct ls_expr * mem_ptr;
5430
5431 if ((mem_ptr = find_rtx_in_ldst (expr->expr)))
5432 {
5433 /* We can try to find just the REACHED stores, but is shouldn't
5434 matter to set the reaching reg everywhere... some might be
5435 dead and should be eliminated later. */
5436
5437 /* We replace (set mem expr) with (set reg expr) (set mem reg)
5438 where reg is the reaching reg used in the load. We checked in
5439 compute_ld_motion_mems that we can replace (set mem expr) with
5440 (set reg expr) in that insn. */
5441 rtx list = mem_ptr->stores;
5442
5443 for ( ; list != NULL_RTX; list = XEXP (list, 1))
5444 {
5445 rtx insn = XEXP (list, 0);
5446 rtx pat = PATTERN (insn);
5447 rtx src = SET_SRC (pat);
5448 rtx reg = expr->reaching_reg;
5449 rtx copy, new;
5450
5451 /* If we've already copied it, continue. */
5452 if (expr->reaching_reg == src)
5453 continue;
5454
5455 if (dump_file)
5456 {
5457 fprintf (dump_file, "PRE: store updated with reaching reg ");
5458 print_rtl (dump_file, expr->reaching_reg);
5459 fprintf (dump_file, ":\n ");
5460 print_inline_rtx (dump_file, insn, 8);
5461 fprintf (dump_file, "\n");
5462 }
5463
5464 copy = gen_move_insn ( reg, copy_rtx (SET_SRC (pat)));
5465 new = emit_insn_before (copy, insn);
5466 record_one_set (REGNO (reg), new);
5467 SET_SRC (pat) = reg;
5468 df_insn_rescan (insn);
5469
5470 /* un-recognize this pattern since it's probably different now. */
5471 INSN_CODE (insn) = -1;
5472 gcse_create_count++;
5473 }
5474 }
5475 }
5476 \f
5477 /* Store motion code. */
5478
5479 #define ANTIC_STORE_LIST(x) ((x)->loads)
5480 #define AVAIL_STORE_LIST(x) ((x)->stores)
5481 #define LAST_AVAIL_CHECK_FAILURE(x) ((x)->reaching_reg)
5482
5483 /* This is used to communicate the target bitvector we want to use in the
5484 reg_set_info routine when called via the note_stores mechanism. */
5485 static int * regvec;
5486
5487 /* And current insn, for the same routine. */
5488 static rtx compute_store_table_current_insn;
5489
5490 /* Used in computing the reverse edge graph bit vectors. */
5491 static sbitmap * st_antloc;
5492
5493 /* Global holding the number of store expressions we are dealing with. */
5494 static int num_stores;
5495
5496 /* Checks to set if we need to mark a register set. Called from
5497 note_stores. */
5498
5499 static void
5500 reg_set_info (rtx dest, const_rtx setter ATTRIBUTE_UNUSED,
5501 void *data)
5502 {
5503 sbitmap bb_reg = data;
5504
5505 if (GET_CODE (dest) == SUBREG)
5506 dest = SUBREG_REG (dest);
5507
5508 if (REG_P (dest))
5509 {
5510 regvec[REGNO (dest)] = INSN_UID (compute_store_table_current_insn);
5511 if (bb_reg)
5512 SET_BIT (bb_reg, REGNO (dest));
5513 }
5514 }
5515
5516 /* Clear any mark that says that this insn sets dest. Called from
5517 note_stores. */
5518
5519 static void
5520 reg_clear_last_set (rtx dest, const_rtx setter ATTRIBUTE_UNUSED,
5521 void *data)
5522 {
5523 int *dead_vec = data;
5524
5525 if (GET_CODE (dest) == SUBREG)
5526 dest = SUBREG_REG (dest);
5527
5528 if (REG_P (dest) &&
5529 dead_vec[REGNO (dest)] == INSN_UID (compute_store_table_current_insn))
5530 dead_vec[REGNO (dest)] = 0;
5531 }
5532
5533 /* Return zero if some of the registers in list X are killed
5534 due to set of registers in bitmap REGS_SET. */
5535
5536 static bool
5537 store_ops_ok (const_rtx x, int *regs_set)
5538 {
5539 const_rtx reg;
5540
5541 for (; x; x = XEXP (x, 1))
5542 {
5543 reg = XEXP (x, 0);
5544 if (regs_set[REGNO(reg)])
5545 return false;
5546 }
5547
5548 return true;
5549 }
5550
5551 /* Returns a list of registers mentioned in X. */
5552 static rtx
5553 extract_mentioned_regs (rtx x)
5554 {
5555 return extract_mentioned_regs_helper (x, NULL_RTX);
5556 }
5557
5558 /* Helper for extract_mentioned_regs; ACCUM is used to accumulate used
5559 registers. */
5560 static rtx
5561 extract_mentioned_regs_helper (rtx x, rtx accum)
5562 {
5563 int i;
5564 enum rtx_code code;
5565 const char * fmt;
5566
5567 /* Repeat is used to turn tail-recursion into iteration. */
5568 repeat:
5569
5570 if (x == 0)
5571 return accum;
5572
5573 code = GET_CODE (x);
5574 switch (code)
5575 {
5576 case REG:
5577 return alloc_EXPR_LIST (0, x, accum);
5578
5579 case MEM:
5580 x = XEXP (x, 0);
5581 goto repeat;
5582
5583 case PRE_DEC:
5584 case PRE_INC:
5585 case PRE_MODIFY:
5586 case POST_DEC:
5587 case POST_INC:
5588 case POST_MODIFY:
5589 /* We do not run this function with arguments having side effects. */
5590 gcc_unreachable ();
5591
5592 case PC:
5593 case CC0: /*FIXME*/
5594 case CONST:
5595 case CONST_INT:
5596 case CONST_DOUBLE:
5597 case CONST_FIXED:
5598 case CONST_VECTOR:
5599 case SYMBOL_REF:
5600 case LABEL_REF:
5601 case ADDR_VEC:
5602 case ADDR_DIFF_VEC:
5603 return accum;
5604
5605 default:
5606 break;
5607 }
5608
5609 i = GET_RTX_LENGTH (code) - 1;
5610 fmt = GET_RTX_FORMAT (code);
5611
5612 for (; i >= 0; i--)
5613 {
5614 if (fmt[i] == 'e')
5615 {
5616 rtx tem = XEXP (x, i);
5617
5618 /* If we are about to do the last recursive call
5619 needed at this level, change it into iteration. */
5620 if (i == 0)
5621 {
5622 x = tem;
5623 goto repeat;
5624 }
5625
5626 accum = extract_mentioned_regs_helper (tem, accum);
5627 }
5628 else if (fmt[i] == 'E')
5629 {
5630 int j;
5631
5632 for (j = 0; j < XVECLEN (x, i); j++)
5633 accum = extract_mentioned_regs_helper (XVECEXP (x, i, j), accum);
5634 }
5635 }
5636
5637 return accum;
5638 }
5639
5640 /* Determine whether INSN is MEM store pattern that we will consider moving.
5641 REGS_SET_BEFORE is bitmap of registers set before (and including) the
5642 current insn, REGS_SET_AFTER is bitmap of registers set after (and
5643 including) the insn in this basic block. We must be passing through BB from
5644 head to end, as we are using this fact to speed things up.
5645
5646 The results are stored this way:
5647
5648 -- the first anticipatable expression is added into ANTIC_STORE_LIST
5649 -- if the processed expression is not anticipatable, NULL_RTX is added
5650 there instead, so that we can use it as indicator that no further
5651 expression of this type may be anticipatable
5652 -- if the expression is available, it is added as head of AVAIL_STORE_LIST;
5653 consequently, all of them but this head are dead and may be deleted.
5654 -- if the expression is not available, the insn due to that it fails to be
5655 available is stored in reaching_reg.
5656
5657 The things are complicated a bit by fact that there already may be stores
5658 to the same MEM from other blocks; also caller must take care of the
5659 necessary cleanup of the temporary markers after end of the basic block.
5660 */
5661
5662 static void
5663 find_moveable_store (rtx insn, int *regs_set_before, int *regs_set_after)
5664 {
5665 struct ls_expr * ptr;
5666 rtx dest, set, tmp;
5667 int check_anticipatable, check_available;
5668 basic_block bb = BLOCK_FOR_INSN (insn);
5669
5670 set = single_set (insn);
5671 if (!set)
5672 return;
5673
5674 dest = SET_DEST (set);
5675
5676 if (! MEM_P (dest) || MEM_VOLATILE_P (dest)
5677 || GET_MODE (dest) == BLKmode)
5678 return;
5679
5680 if (side_effects_p (dest))
5681 return;
5682
5683 /* If we are handling exceptions, we must be careful with memory references
5684 that may trap. If we are not, the behavior is undefined, so we may just
5685 continue. */
5686 if (flag_non_call_exceptions && may_trap_p (dest))
5687 return;
5688
5689 /* Even if the destination cannot trap, the source may. In this case we'd
5690 need to handle updating the REG_EH_REGION note. */
5691 if (find_reg_note (insn, REG_EH_REGION, NULL_RTX))
5692 return;
5693
5694 /* Make sure that the SET_SRC of this store insns can be assigned to
5695 a register, or we will fail later on in replace_store_insn, which
5696 assumes that we can do this. But sometimes the target machine has
5697 oddities like MEM read-modify-write instruction. See for example
5698 PR24257. */
5699 if (!can_assign_to_reg_p (SET_SRC (set)))
5700 return;
5701
5702 ptr = ldst_entry (dest);
5703 if (!ptr->pattern_regs)
5704 ptr->pattern_regs = extract_mentioned_regs (dest);
5705
5706 /* Do not check for anticipatability if we either found one anticipatable
5707 store already, or tested for one and found out that it was killed. */
5708 check_anticipatable = 0;
5709 if (!ANTIC_STORE_LIST (ptr))
5710 check_anticipatable = 1;
5711 else
5712 {
5713 tmp = XEXP (ANTIC_STORE_LIST (ptr), 0);
5714 if (tmp != NULL_RTX
5715 && BLOCK_FOR_INSN (tmp) != bb)
5716 check_anticipatable = 1;
5717 }
5718 if (check_anticipatable)
5719 {
5720 if (store_killed_before (dest, ptr->pattern_regs, insn, bb, regs_set_before))
5721 tmp = NULL_RTX;
5722 else
5723 tmp = insn;
5724 ANTIC_STORE_LIST (ptr) = alloc_INSN_LIST (tmp,
5725 ANTIC_STORE_LIST (ptr));
5726 }
5727
5728 /* It is not necessary to check whether store is available if we did
5729 it successfully before; if we failed before, do not bother to check
5730 until we reach the insn that caused us to fail. */
5731 check_available = 0;
5732 if (!AVAIL_STORE_LIST (ptr))
5733 check_available = 1;
5734 else
5735 {
5736 tmp = XEXP (AVAIL_STORE_LIST (ptr), 0);
5737 if (BLOCK_FOR_INSN (tmp) != bb)
5738 check_available = 1;
5739 }
5740 if (check_available)
5741 {
5742 /* Check that we have already reached the insn at that the check
5743 failed last time. */
5744 if (LAST_AVAIL_CHECK_FAILURE (ptr))
5745 {
5746 for (tmp = BB_END (bb);
5747 tmp != insn && tmp != LAST_AVAIL_CHECK_FAILURE (ptr);
5748 tmp = PREV_INSN (tmp))
5749 continue;
5750 if (tmp == insn)
5751 check_available = 0;
5752 }
5753 else
5754 check_available = store_killed_after (dest, ptr->pattern_regs, insn,
5755 bb, regs_set_after,
5756 &LAST_AVAIL_CHECK_FAILURE (ptr));
5757 }
5758 if (!check_available)
5759 AVAIL_STORE_LIST (ptr) = alloc_INSN_LIST (insn, AVAIL_STORE_LIST (ptr));
5760 }
5761
5762 /* Find available and anticipatable stores. */
5763
5764 static int
5765 compute_store_table (void)
5766 {
5767 int ret;
5768 basic_block bb;
5769 unsigned regno;
5770 rtx insn, pat, tmp;
5771 int *last_set_in, *already_set;
5772 struct ls_expr * ptr, **prev_next_ptr_ptr;
5773
5774 max_gcse_regno = max_reg_num ();
5775
5776 reg_set_in_block = sbitmap_vector_alloc (last_basic_block,
5777 max_gcse_regno);
5778 sbitmap_vector_zero (reg_set_in_block, last_basic_block);
5779 pre_ldst_mems = 0;
5780 pre_ldst_table = htab_create (13, pre_ldst_expr_hash,
5781 pre_ldst_expr_eq, NULL);
5782 last_set_in = XCNEWVEC (int, max_gcse_regno);
5783 already_set = XNEWVEC (int, max_gcse_regno);
5784
5785 /* Find all the stores we care about. */
5786 FOR_EACH_BB (bb)
5787 {
5788 /* First compute the registers set in this block. */
5789 regvec = last_set_in;
5790
5791 FOR_BB_INSNS (bb, insn)
5792 {
5793 if (! INSN_P (insn))
5794 continue;
5795
5796 if (CALL_P (insn))
5797 {
5798 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
5799 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno))
5800 {
5801 last_set_in[regno] = INSN_UID (insn);
5802 SET_BIT (reg_set_in_block[bb->index], regno);
5803 }
5804 }
5805
5806 pat = PATTERN (insn);
5807 compute_store_table_current_insn = insn;
5808 note_stores (pat, reg_set_info, reg_set_in_block[bb->index]);
5809 }
5810
5811 /* Now find the stores. */
5812 memset (already_set, 0, sizeof (int) * max_gcse_regno);
5813 regvec = already_set;
5814 FOR_BB_INSNS (bb, insn)
5815 {
5816 if (! INSN_P (insn))
5817 continue;
5818
5819 if (CALL_P (insn))
5820 {
5821 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
5822 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno))
5823 already_set[regno] = 1;
5824 }
5825
5826 pat = PATTERN (insn);
5827 note_stores (pat, reg_set_info, NULL);
5828
5829 /* Now that we've marked regs, look for stores. */
5830 find_moveable_store (insn, already_set, last_set_in);
5831
5832 /* Unmark regs that are no longer set. */
5833 compute_store_table_current_insn = insn;
5834 note_stores (pat, reg_clear_last_set, last_set_in);
5835 if (CALL_P (insn))
5836 {
5837 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
5838 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno)
5839 && last_set_in[regno] == INSN_UID (insn))
5840 last_set_in[regno] = 0;
5841 }
5842 }
5843
5844 #ifdef ENABLE_CHECKING
5845 /* last_set_in should now be all-zero. */
5846 for (regno = 0; regno < max_gcse_regno; regno++)
5847 gcc_assert (!last_set_in[regno]);
5848 #endif
5849
5850 /* Clear temporary marks. */
5851 for (ptr = first_ls_expr (); ptr != NULL; ptr = next_ls_expr (ptr))
5852 {
5853 LAST_AVAIL_CHECK_FAILURE(ptr) = NULL_RTX;
5854 if (ANTIC_STORE_LIST (ptr)
5855 && (tmp = XEXP (ANTIC_STORE_LIST (ptr), 0)) == NULL_RTX)
5856 ANTIC_STORE_LIST (ptr) = XEXP (ANTIC_STORE_LIST (ptr), 1);
5857 }
5858 }
5859
5860 /* Remove the stores that are not available anywhere, as there will
5861 be no opportunity to optimize them. */
5862 for (ptr = pre_ldst_mems, prev_next_ptr_ptr = &pre_ldst_mems;
5863 ptr != NULL;
5864 ptr = *prev_next_ptr_ptr)
5865 {
5866 if (!AVAIL_STORE_LIST (ptr))
5867 {
5868 *prev_next_ptr_ptr = ptr->next;
5869 htab_remove_elt_with_hash (pre_ldst_table, ptr, ptr->hash_index);
5870 free_ldst_entry (ptr);
5871 }
5872 else
5873 prev_next_ptr_ptr = &ptr->next;
5874 }
5875
5876 ret = enumerate_ldsts ();
5877
5878 if (dump_file)
5879 {
5880 fprintf (dump_file, "ST_avail and ST_antic (shown under loads..)\n");
5881 print_ldst_list (dump_file);
5882 }
5883
5884 free (last_set_in);
5885 free (already_set);
5886 return ret;
5887 }
5888
5889 /* Check to see if the load X is aliased with STORE_PATTERN.
5890 AFTER is true if we are checking the case when STORE_PATTERN occurs
5891 after the X. */
5892
5893 static bool
5894 load_kills_store (const_rtx x, const_rtx store_pattern, int after)
5895 {
5896 if (after)
5897 return anti_dependence (x, store_pattern);
5898 else
5899 return true_dependence (store_pattern, GET_MODE (store_pattern), x,
5900 rtx_addr_varies_p);
5901 }
5902
5903 /* Go through the entire insn X, looking for any loads which might alias
5904 STORE_PATTERN. Return true if found.
5905 AFTER is true if we are checking the case when STORE_PATTERN occurs
5906 after the insn X. */
5907
5908 static bool
5909 find_loads (const_rtx x, const_rtx store_pattern, int after)
5910 {
5911 const char * fmt;
5912 int i, j;
5913 int ret = false;
5914
5915 if (!x)
5916 return false;
5917
5918 if (GET_CODE (x) == SET)
5919 x = SET_SRC (x);
5920
5921 if (MEM_P (x))
5922 {
5923 if (load_kills_store (x, store_pattern, after))
5924 return true;
5925 }
5926
5927 /* Recursively process the insn. */
5928 fmt = GET_RTX_FORMAT (GET_CODE (x));
5929
5930 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0 && !ret; i--)
5931 {
5932 if (fmt[i] == 'e')
5933 ret |= find_loads (XEXP (x, i), store_pattern, after);
5934 else if (fmt[i] == 'E')
5935 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
5936 ret |= find_loads (XVECEXP (x, i, j), store_pattern, after);
5937 }
5938 return ret;
5939 }
5940
5941 static inline bool
5942 store_killed_in_pat (const_rtx x, const_rtx pat, int after)
5943 {
5944 if (GET_CODE (pat) == SET)
5945 {
5946 rtx dest = SET_DEST (pat);
5947
5948 if (GET_CODE (dest) == ZERO_EXTRACT)
5949 dest = XEXP (dest, 0);
5950
5951 /* Check for memory stores to aliased objects. */
5952 if (MEM_P (dest)
5953 && !expr_equiv_p (dest, x))
5954 {
5955 if (after)
5956 {
5957 if (output_dependence (dest, x))
5958 return true;
5959 }
5960 else
5961 {
5962 if (output_dependence (x, dest))
5963 return true;
5964 }
5965 }
5966 }
5967
5968 if (find_loads (pat, x, after))
5969 return true;
5970
5971 return false;
5972 }
5973
5974 /* Check if INSN kills the store pattern X (is aliased with it).
5975 AFTER is true if we are checking the case when store X occurs
5976 after the insn. Return true if it does. */
5977
5978 static bool
5979 store_killed_in_insn (const_rtx x, const_rtx x_regs, const_rtx insn, int after)
5980 {
5981 const_rtx reg, base, note, pat;
5982
5983 if (!INSN_P (insn))
5984 return false;
5985
5986 if (CALL_P (insn))
5987 {
5988 /* A normal or pure call might read from pattern,
5989 but a const call will not. */
5990 if (!RTL_CONST_CALL_P (insn))
5991 return true;
5992
5993 /* But even a const call reads its parameters. Check whether the
5994 base of some of registers used in mem is stack pointer. */
5995 for (reg = x_regs; reg; reg = XEXP (reg, 1))
5996 {
5997 base = find_base_term (XEXP (reg, 0));
5998 if (!base
5999 || (GET_CODE (base) == ADDRESS
6000 && GET_MODE (base) == Pmode
6001 && XEXP (base, 0) == stack_pointer_rtx))
6002 return true;
6003 }
6004
6005 return false;
6006 }
6007
6008 pat = PATTERN (insn);
6009 if (GET_CODE (pat) == SET)
6010 {
6011 if (store_killed_in_pat (x, pat, after))
6012 return true;
6013 }
6014 else if (GET_CODE (pat) == PARALLEL)
6015 {
6016 int i;
6017
6018 for (i = 0; i < XVECLEN (pat, 0); i++)
6019 if (store_killed_in_pat (x, XVECEXP (pat, 0, i), after))
6020 return true;
6021 }
6022 else if (find_loads (PATTERN (insn), x, after))
6023 return true;
6024
6025 /* If this insn has a REG_EQUAL or REG_EQUIV note referencing a memory
6026 location aliased with X, then this insn kills X. */
6027 note = find_reg_equal_equiv_note (insn);
6028 if (! note)
6029 return false;
6030 note = XEXP (note, 0);
6031
6032 /* However, if the note represents a must alias rather than a may
6033 alias relationship, then it does not kill X. */
6034 if (expr_equiv_p (note, x))
6035 return false;
6036
6037 /* See if there are any aliased loads in the note. */
6038 return find_loads (note, x, after);
6039 }
6040
6041 /* Returns true if the expression X is loaded or clobbered on or after INSN
6042 within basic block BB. REGS_SET_AFTER is bitmap of registers set in
6043 or after the insn. X_REGS is list of registers mentioned in X. If the store
6044 is killed, return the last insn in that it occurs in FAIL_INSN. */
6045
6046 static bool
6047 store_killed_after (const_rtx x, const_rtx x_regs, const_rtx insn, const_basic_block bb,
6048 int *regs_set_after, rtx *fail_insn)
6049 {
6050 rtx last = BB_END (bb), act;
6051
6052 if (!store_ops_ok (x_regs, regs_set_after))
6053 {
6054 /* We do not know where it will happen. */
6055 if (fail_insn)
6056 *fail_insn = NULL_RTX;
6057 return true;
6058 }
6059
6060 /* Scan from the end, so that fail_insn is determined correctly. */
6061 for (act = last; act != PREV_INSN (insn); act = PREV_INSN (act))
6062 if (store_killed_in_insn (x, x_regs, act, false))
6063 {
6064 if (fail_insn)
6065 *fail_insn = act;
6066 return true;
6067 }
6068
6069 return false;
6070 }
6071
6072 /* Returns true if the expression X is loaded or clobbered on or before INSN
6073 within basic block BB. X_REGS is list of registers mentioned in X.
6074 REGS_SET_BEFORE is bitmap of registers set before or in this insn. */
6075 static bool
6076 store_killed_before (const_rtx x, const_rtx x_regs, const_rtx insn, const_basic_block bb,
6077 int *regs_set_before)
6078 {
6079 rtx first = BB_HEAD (bb);
6080
6081 if (!store_ops_ok (x_regs, regs_set_before))
6082 return true;
6083
6084 for ( ; insn != PREV_INSN (first); insn = PREV_INSN (insn))
6085 if (store_killed_in_insn (x, x_regs, insn, true))
6086 return true;
6087
6088 return false;
6089 }
6090
6091 /* Fill in available, anticipatable, transparent and kill vectors in
6092 STORE_DATA, based on lists of available and anticipatable stores. */
6093 static void
6094 build_store_vectors (void)
6095 {
6096 basic_block bb;
6097 int *regs_set_in_block;
6098 rtx insn, st;
6099 struct ls_expr * ptr;
6100 unsigned regno;
6101
6102 /* Build the gen_vector. This is any store in the table which is not killed
6103 by aliasing later in its block. */
6104 ae_gen = sbitmap_vector_alloc (last_basic_block, num_stores);
6105 sbitmap_vector_zero (ae_gen, last_basic_block);
6106
6107 st_antloc = sbitmap_vector_alloc (last_basic_block, num_stores);
6108 sbitmap_vector_zero (st_antloc, last_basic_block);
6109
6110 for (ptr = first_ls_expr (); ptr != NULL; ptr = next_ls_expr (ptr))
6111 {
6112 for (st = AVAIL_STORE_LIST (ptr); st != NULL; st = XEXP (st, 1))
6113 {
6114 insn = XEXP (st, 0);
6115 bb = BLOCK_FOR_INSN (insn);
6116
6117 /* If we've already seen an available expression in this block,
6118 we can delete this one (It occurs earlier in the block). We'll
6119 copy the SRC expression to an unused register in case there
6120 are any side effects. */
6121 if (TEST_BIT (ae_gen[bb->index], ptr->index))
6122 {
6123 rtx r = gen_reg_rtx_and_attrs (ptr->pattern);
6124 if (dump_file)
6125 fprintf (dump_file, "Removing redundant store:\n");
6126 replace_store_insn (r, XEXP (st, 0), bb, ptr);
6127 continue;
6128 }
6129 SET_BIT (ae_gen[bb->index], ptr->index);
6130 }
6131
6132 for (st = ANTIC_STORE_LIST (ptr); st != NULL; st = XEXP (st, 1))
6133 {
6134 insn = XEXP (st, 0);
6135 bb = BLOCK_FOR_INSN (insn);
6136 SET_BIT (st_antloc[bb->index], ptr->index);
6137 }
6138 }
6139
6140 ae_kill = sbitmap_vector_alloc (last_basic_block, num_stores);
6141 sbitmap_vector_zero (ae_kill, last_basic_block);
6142
6143 transp = sbitmap_vector_alloc (last_basic_block, num_stores);
6144 sbitmap_vector_zero (transp, last_basic_block);
6145 regs_set_in_block = XNEWVEC (int, max_gcse_regno);
6146
6147 FOR_EACH_BB (bb)
6148 {
6149 for (regno = 0; regno < max_gcse_regno; regno++)
6150 regs_set_in_block[regno] = TEST_BIT (reg_set_in_block[bb->index], regno);
6151
6152 for (ptr = first_ls_expr (); ptr != NULL; ptr = next_ls_expr (ptr))
6153 {
6154 if (store_killed_after (ptr->pattern, ptr->pattern_regs, BB_HEAD (bb),
6155 bb, regs_set_in_block, NULL))
6156 {
6157 /* It should not be necessary to consider the expression
6158 killed if it is both anticipatable and available. */
6159 if (!TEST_BIT (st_antloc[bb->index], ptr->index)
6160 || !TEST_BIT (ae_gen[bb->index], ptr->index))
6161 SET_BIT (ae_kill[bb->index], ptr->index);
6162 }
6163 else
6164 SET_BIT (transp[bb->index], ptr->index);
6165 }
6166 }
6167
6168 free (regs_set_in_block);
6169
6170 if (dump_file)
6171 {
6172 dump_sbitmap_vector (dump_file, "st_antloc", "", st_antloc, last_basic_block);
6173 dump_sbitmap_vector (dump_file, "st_kill", "", ae_kill, last_basic_block);
6174 dump_sbitmap_vector (dump_file, "Transpt", "", transp, last_basic_block);
6175 dump_sbitmap_vector (dump_file, "st_avloc", "", ae_gen, last_basic_block);
6176 }
6177 }
6178
6179 /* Insert an instruction at the beginning of a basic block, and update
6180 the BB_HEAD if needed. */
6181
6182 static void
6183 insert_insn_start_basic_block (rtx insn, basic_block bb)
6184 {
6185 /* Insert at start of successor block. */
6186 rtx prev = PREV_INSN (BB_HEAD (bb));
6187 rtx before = BB_HEAD (bb);
6188 while (before != 0)
6189 {
6190 if (! LABEL_P (before)
6191 && !NOTE_INSN_BASIC_BLOCK_P (before))
6192 break;
6193 prev = before;
6194 if (prev == BB_END (bb))
6195 break;
6196 before = NEXT_INSN (before);
6197 }
6198
6199 insn = emit_insn_after_noloc (insn, prev, bb);
6200
6201 if (dump_file)
6202 {
6203 fprintf (dump_file, "STORE_MOTION insert store at start of BB %d:\n",
6204 bb->index);
6205 print_inline_rtx (dump_file, insn, 6);
6206 fprintf (dump_file, "\n");
6207 }
6208 }
6209
6210 /* This routine will insert a store on an edge. EXPR is the ldst entry for
6211 the memory reference, and E is the edge to insert it on. Returns nonzero
6212 if an edge insertion was performed. */
6213
6214 static int
6215 insert_store (struct ls_expr * expr, edge e)
6216 {
6217 rtx reg, insn;
6218 basic_block bb;
6219 edge tmp;
6220 edge_iterator ei;
6221
6222 /* We did all the deleted before this insert, so if we didn't delete a
6223 store, then we haven't set the reaching reg yet either. */
6224 if (expr->reaching_reg == NULL_RTX)
6225 return 0;
6226
6227 if (e->flags & EDGE_FAKE)
6228 return 0;
6229
6230 reg = expr->reaching_reg;
6231 insn = gen_move_insn (copy_rtx (expr->pattern), reg);
6232
6233 /* If we are inserting this expression on ALL predecessor edges of a BB,
6234 insert it at the start of the BB, and reset the insert bits on the other
6235 edges so we don't try to insert it on the other edges. */
6236 bb = e->dest;
6237 FOR_EACH_EDGE (tmp, ei, e->dest->preds)
6238 if (!(tmp->flags & EDGE_FAKE))
6239 {
6240 int index = EDGE_INDEX (edge_list, tmp->src, tmp->dest);
6241
6242 gcc_assert (index != EDGE_INDEX_NO_EDGE);
6243 if (! TEST_BIT (pre_insert_map[index], expr->index))
6244 break;
6245 }
6246
6247 /* If tmp is NULL, we found an insertion on every edge, blank the
6248 insertion vector for these edges, and insert at the start of the BB. */
6249 if (!tmp && bb != EXIT_BLOCK_PTR)
6250 {
6251 FOR_EACH_EDGE (tmp, ei, e->dest->preds)
6252 {
6253 int index = EDGE_INDEX (edge_list, tmp->src, tmp->dest);
6254 RESET_BIT (pre_insert_map[index], expr->index);
6255 }
6256 insert_insn_start_basic_block (insn, bb);
6257 return 0;
6258 }
6259
6260 /* We can't put stores in the front of blocks pointed to by abnormal
6261 edges since that may put a store where one didn't used to be. */
6262 gcc_assert (!(e->flags & EDGE_ABNORMAL));
6263
6264 insert_insn_on_edge (insn, e);
6265
6266 if (dump_file)
6267 {
6268 fprintf (dump_file, "STORE_MOTION insert insn on edge (%d, %d):\n",
6269 e->src->index, e->dest->index);
6270 print_inline_rtx (dump_file, insn, 6);
6271 fprintf (dump_file, "\n");
6272 }
6273
6274 return 1;
6275 }
6276
6277 /* Remove any REG_EQUAL or REG_EQUIV notes containing a reference to the
6278 memory location in SMEXPR set in basic block BB.
6279
6280 This could be rather expensive. */
6281
6282 static void
6283 remove_reachable_equiv_notes (basic_block bb, struct ls_expr *smexpr)
6284 {
6285 edge_iterator *stack, ei;
6286 int sp;
6287 edge act;
6288 sbitmap visited = sbitmap_alloc (last_basic_block);
6289 rtx last, insn, note;
6290 rtx mem = smexpr->pattern;
6291
6292 stack = XNEWVEC (edge_iterator, n_basic_blocks);
6293 sp = 0;
6294 ei = ei_start (bb->succs);
6295
6296 sbitmap_zero (visited);
6297
6298 act = (EDGE_COUNT (ei_container (ei)) > 0 ? EDGE_I (ei_container (ei), 0) : NULL);
6299 while (1)
6300 {
6301 if (!act)
6302 {
6303 if (!sp)
6304 {
6305 free (stack);
6306 sbitmap_free (visited);
6307 return;
6308 }
6309 act = ei_edge (stack[--sp]);
6310 }
6311 bb = act->dest;
6312
6313 if (bb == EXIT_BLOCK_PTR
6314 || TEST_BIT (visited, bb->index))
6315 {
6316 if (!ei_end_p (ei))
6317 ei_next (&ei);
6318 act = (! ei_end_p (ei)) ? ei_edge (ei) : NULL;
6319 continue;
6320 }
6321 SET_BIT (visited, bb->index);
6322
6323 if (TEST_BIT (st_antloc[bb->index], smexpr->index))
6324 {
6325 for (last = ANTIC_STORE_LIST (smexpr);
6326 BLOCK_FOR_INSN (XEXP (last, 0)) != bb;
6327 last = XEXP (last, 1))
6328 continue;
6329 last = XEXP (last, 0);
6330 }
6331 else
6332 last = NEXT_INSN (BB_END (bb));
6333
6334 for (insn = BB_HEAD (bb); insn != last; insn = NEXT_INSN (insn))
6335 if (INSN_P (insn))
6336 {
6337 note = find_reg_equal_equiv_note (insn);
6338 if (!note || !expr_equiv_p (XEXP (note, 0), mem))
6339 continue;
6340
6341 if (dump_file)
6342 fprintf (dump_file, "STORE_MOTION drop REG_EQUAL note at insn %d:\n",
6343 INSN_UID (insn));
6344 remove_note (insn, note);
6345 }
6346
6347 if (!ei_end_p (ei))
6348 ei_next (&ei);
6349 act = (! ei_end_p (ei)) ? ei_edge (ei) : NULL;
6350
6351 if (EDGE_COUNT (bb->succs) > 0)
6352 {
6353 if (act)
6354 stack[sp++] = ei;
6355 ei = ei_start (bb->succs);
6356 act = (EDGE_COUNT (ei_container (ei)) > 0 ? EDGE_I (ei_container (ei), 0) : NULL);
6357 }
6358 }
6359 }
6360
6361 /* This routine will replace a store with a SET to a specified register. */
6362
6363 static void
6364 replace_store_insn (rtx reg, rtx del, basic_block bb, struct ls_expr *smexpr)
6365 {
6366 rtx insn, mem, note, set, ptr, pair;
6367
6368 mem = smexpr->pattern;
6369 insn = gen_move_insn (reg, SET_SRC (single_set (del)));
6370
6371 for (ptr = ANTIC_STORE_LIST (smexpr); ptr; ptr = XEXP (ptr, 1))
6372 if (XEXP (ptr, 0) == del)
6373 {
6374 XEXP (ptr, 0) = insn;
6375 break;
6376 }
6377
6378 /* Move the notes from the deleted insn to its replacement, and patch
6379 up the LIBCALL notes. */
6380 REG_NOTES (insn) = REG_NOTES (del);
6381
6382 note = find_reg_note (insn, REG_RETVAL, NULL_RTX);
6383 if (note)
6384 {
6385 pair = XEXP (note, 0);
6386 note = find_reg_note (pair, REG_LIBCALL, NULL_RTX);
6387 XEXP (note, 0) = insn;
6388 }
6389 note = find_reg_note (insn, REG_LIBCALL, NULL_RTX);
6390 if (note)
6391 {
6392 pair = XEXP (note, 0);
6393 note = find_reg_note (pair, REG_RETVAL, NULL_RTX);
6394 XEXP (note, 0) = insn;
6395 }
6396
6397 /* Emit the insn AFTER all the notes are transferred.
6398 This is cheaper since we avoid df rescanning for the note change. */
6399 insn = emit_insn_after (insn, del);
6400
6401 if (dump_file)
6402 {
6403 fprintf (dump_file,
6404 "STORE_MOTION delete insn in BB %d:\n ", bb->index);
6405 print_inline_rtx (dump_file, del, 6);
6406 fprintf (dump_file, "\nSTORE MOTION replaced with insn:\n ");
6407 print_inline_rtx (dump_file, insn, 6);
6408 fprintf (dump_file, "\n");
6409 }
6410
6411 delete_insn (del);
6412
6413 /* Now we must handle REG_EQUAL notes whose contents is equal to the mem;
6414 they are no longer accurate provided that they are reached by this
6415 definition, so drop them. */
6416 for (; insn != NEXT_INSN (BB_END (bb)); insn = NEXT_INSN (insn))
6417 if (INSN_P (insn))
6418 {
6419 set = single_set (insn);
6420 if (!set)
6421 continue;
6422 if (expr_equiv_p (SET_DEST (set), mem))
6423 return;
6424 note = find_reg_equal_equiv_note (insn);
6425 if (!note || !expr_equiv_p (XEXP (note, 0), mem))
6426 continue;
6427
6428 if (dump_file)
6429 fprintf (dump_file, "STORE_MOTION drop REG_EQUAL note at insn %d:\n",
6430 INSN_UID (insn));
6431 remove_note (insn, note);
6432 }
6433 remove_reachable_equiv_notes (bb, smexpr);
6434 }
6435
6436
6437 /* Delete a store, but copy the value that would have been stored into
6438 the reaching_reg for later storing. */
6439
6440 static void
6441 delete_store (struct ls_expr * expr, basic_block bb)
6442 {
6443 rtx reg, i, del;
6444
6445 if (expr->reaching_reg == NULL_RTX)
6446 expr->reaching_reg = gen_reg_rtx_and_attrs (expr->pattern);
6447
6448 reg = expr->reaching_reg;
6449
6450 for (i = AVAIL_STORE_LIST (expr); i; i = XEXP (i, 1))
6451 {
6452 del = XEXP (i, 0);
6453 if (BLOCK_FOR_INSN (del) == bb)
6454 {
6455 /* We know there is only one since we deleted redundant
6456 ones during the available computation. */
6457 replace_store_insn (reg, del, bb, expr);
6458 break;
6459 }
6460 }
6461 }
6462
6463 /* Free memory used by store motion. */
6464
6465 static void
6466 free_store_memory (void)
6467 {
6468 free_ldst_mems ();
6469
6470 if (ae_gen)
6471 sbitmap_vector_free (ae_gen);
6472 if (ae_kill)
6473 sbitmap_vector_free (ae_kill);
6474 if (transp)
6475 sbitmap_vector_free (transp);
6476 if (st_antloc)
6477 sbitmap_vector_free (st_antloc);
6478 if (pre_insert_map)
6479 sbitmap_vector_free (pre_insert_map);
6480 if (pre_delete_map)
6481 sbitmap_vector_free (pre_delete_map);
6482 if (reg_set_in_block)
6483 sbitmap_vector_free (reg_set_in_block);
6484
6485 ae_gen = ae_kill = transp = st_antloc = NULL;
6486 pre_insert_map = pre_delete_map = reg_set_in_block = NULL;
6487 }
6488
6489 /* Perform store motion. Much like gcse, except we move expressions the
6490 other way by looking at the flowgraph in reverse. */
6491
6492 static void
6493 store_motion (void)
6494 {
6495 basic_block bb;
6496 int x;
6497 struct ls_expr * ptr;
6498 int update_flow = 0;
6499
6500 if (dump_file)
6501 {
6502 fprintf (dump_file, "before store motion\n");
6503 print_rtl (dump_file, get_insns ());
6504 }
6505
6506 init_alias_analysis ();
6507
6508 /* Find all the available and anticipatable stores. */
6509 num_stores = compute_store_table ();
6510 if (num_stores == 0)
6511 {
6512 htab_delete (pre_ldst_table);
6513 pre_ldst_table = NULL;
6514 sbitmap_vector_free (reg_set_in_block);
6515 end_alias_analysis ();
6516 return;
6517 }
6518
6519 /* Now compute kill & transp vectors. */
6520 build_store_vectors ();
6521 add_noreturn_fake_exit_edges ();
6522 connect_infinite_loops_to_exit ();
6523
6524 edge_list = pre_edge_rev_lcm (num_stores, transp, ae_gen,
6525 st_antloc, ae_kill, &pre_insert_map,
6526 &pre_delete_map);
6527
6528 /* Now we want to insert the new stores which are going to be needed. */
6529 for (ptr = first_ls_expr (); ptr != NULL; ptr = next_ls_expr (ptr))
6530 {
6531 /* If any of the edges we have above are abnormal, we can't move this
6532 store. */
6533 for (x = NUM_EDGES (edge_list) - 1; x >= 0; x--)
6534 if (TEST_BIT (pre_insert_map[x], ptr->index)
6535 && (INDEX_EDGE (edge_list, x)->flags & EDGE_ABNORMAL))
6536 break;
6537
6538 if (x >= 0)
6539 {
6540 if (dump_file != NULL)
6541 fprintf (dump_file,
6542 "Can't replace store %d: abnormal edge from %d to %d\n",
6543 ptr->index, INDEX_EDGE (edge_list, x)->src->index,
6544 INDEX_EDGE (edge_list, x)->dest->index);
6545 continue;
6546 }
6547
6548 /* Now we want to insert the new stores which are going to be needed. */
6549
6550 FOR_EACH_BB (bb)
6551 if (TEST_BIT (pre_delete_map[bb->index], ptr->index))
6552 delete_store (ptr, bb);
6553
6554 for (x = 0; x < NUM_EDGES (edge_list); x++)
6555 if (TEST_BIT (pre_insert_map[x], ptr->index))
6556 update_flow |= insert_store (ptr, INDEX_EDGE (edge_list, x));
6557 }
6558
6559 if (update_flow)
6560 commit_edge_insertions ();
6561
6562 free_store_memory ();
6563 free_edge_list (edge_list);
6564 remove_fake_exit_edges ();
6565 end_alias_analysis ();
6566 }
6567
6568 \f
6569 /* Entry point for jump bypassing optimization pass. */
6570
6571 static int
6572 bypass_jumps (void)
6573 {
6574 int changed;
6575
6576 /* We do not construct an accurate cfg in functions which call
6577 setjmp, so just punt to be safe. */
6578 if (cfun->calls_setjmp)
6579 return 0;
6580
6581 /* Identify the basic block information for this function, including
6582 successors and predecessors. */
6583 max_gcse_regno = max_reg_num ();
6584
6585 if (dump_file)
6586 dump_flow_info (dump_file, dump_flags);
6587
6588 /* Return if there's nothing to do, or it is too expensive. */
6589 if (n_basic_blocks <= NUM_FIXED_BLOCKS + 1
6590 || is_too_expensive (_ ("jump bypassing disabled")))
6591 return 0;
6592
6593 gcc_obstack_init (&gcse_obstack);
6594 bytes_used = 0;
6595
6596 /* We need alias. */
6597 init_alias_analysis ();
6598
6599 /* Record where pseudo-registers are set. This data is kept accurate
6600 during each pass. ??? We could also record hard-reg information here
6601 [since it's unchanging], however it is currently done during hash table
6602 computation.
6603
6604 It may be tempting to compute MEM set information here too, but MEM sets
6605 will be subject to code motion one day and thus we need to compute
6606 information about memory sets when we build the hash tables. */
6607
6608 alloc_reg_set_mem (max_gcse_regno);
6609 compute_sets ();
6610
6611 max_gcse_regno = max_reg_num ();
6612 alloc_gcse_mem ();
6613 changed = one_cprop_pass (MAX_GCSE_PASSES + 2, true, true);
6614 free_gcse_mem ();
6615
6616 if (dump_file)
6617 {
6618 fprintf (dump_file, "BYPASS of %s: %d basic blocks, ",
6619 current_function_name (), n_basic_blocks);
6620 fprintf (dump_file, "%d bytes\n\n", bytes_used);
6621 }
6622
6623 obstack_free (&gcse_obstack, NULL);
6624 free_reg_set_mem ();
6625
6626 /* We are finished with alias. */
6627 end_alias_analysis ();
6628
6629 return changed;
6630 }
6631
6632 /* Return true if the graph is too expensive to optimize. PASS is the
6633 optimization about to be performed. */
6634
6635 static bool
6636 is_too_expensive (const char *pass)
6637 {
6638 /* Trying to perform global optimizations on flow graphs which have
6639 a high connectivity will take a long time and is unlikely to be
6640 particularly useful.
6641
6642 In normal circumstances a cfg should have about twice as many
6643 edges as blocks. But we do not want to punish small functions
6644 which have a couple switch statements. Rather than simply
6645 threshold the number of blocks, uses something with a more
6646 graceful degradation. */
6647 if (n_edges > 20000 + n_basic_blocks * 4)
6648 {
6649 warning (OPT_Wdisabled_optimization,
6650 "%s: %d basic blocks and %d edges/basic block",
6651 pass, n_basic_blocks, n_edges / n_basic_blocks);
6652
6653 return true;
6654 }
6655
6656 /* If allocating memory for the cprop bitmap would take up too much
6657 storage it's better just to disable the optimization. */
6658 if ((n_basic_blocks
6659 * SBITMAP_SET_SIZE (max_reg_num ())
6660 * sizeof (SBITMAP_ELT_TYPE)) > MAX_GCSE_MEMORY)
6661 {
6662 warning (OPT_Wdisabled_optimization,
6663 "%s: %d basic blocks and %d registers",
6664 pass, n_basic_blocks, max_reg_num ());
6665
6666 return true;
6667 }
6668
6669 return false;
6670 }
6671 \f
6672 static bool
6673 gate_handle_jump_bypass (void)
6674 {
6675 return optimize > 0 && flag_gcse
6676 && dbg_cnt (jump_bypass);
6677 }
6678
6679 /* Perform jump bypassing and control flow optimizations. */
6680 static unsigned int
6681 rest_of_handle_jump_bypass (void)
6682 {
6683 delete_unreachable_blocks ();
6684 if (bypass_jumps ())
6685 {
6686 delete_trivially_dead_insns (get_insns (), max_reg_num ());
6687 rebuild_jump_labels (get_insns ());
6688 cleanup_cfg (0);
6689 }
6690 return 0;
6691 }
6692
6693 struct rtl_opt_pass pass_jump_bypass =
6694 {
6695 {
6696 RTL_PASS,
6697 "bypass", /* name */
6698 gate_handle_jump_bypass, /* gate */
6699 rest_of_handle_jump_bypass, /* execute */
6700 NULL, /* sub */
6701 NULL, /* next */
6702 0, /* static_pass_number */
6703 TV_BYPASS, /* tv_id */
6704 0, /* properties_required */
6705 0, /* properties_provided */
6706 0, /* properties_destroyed */
6707 0, /* todo_flags_start */
6708 TODO_dump_func |
6709 TODO_ggc_collect | TODO_verify_flow /* todo_flags_finish */
6710 }
6711 };
6712
6713
6714 static bool
6715 gate_handle_gcse (void)
6716 {
6717 return optimize > 0 && flag_gcse
6718 && dbg_cnt (gcse);
6719 }
6720
6721
6722 static unsigned int
6723 rest_of_handle_gcse (void)
6724 {
6725 int save_csb, save_cfj;
6726 int tem2 = 0, tem;
6727 tem = gcse_main (get_insns ());
6728 delete_trivially_dead_insns (get_insns (), max_reg_num ());
6729 rebuild_jump_labels (get_insns ());
6730 save_csb = flag_cse_skip_blocks;
6731 save_cfj = flag_cse_follow_jumps;
6732 flag_cse_skip_blocks = flag_cse_follow_jumps = 0;
6733
6734 /* If -fexpensive-optimizations, re-run CSE to clean up things done
6735 by gcse. */
6736 if (flag_expensive_optimizations)
6737 {
6738 timevar_push (TV_CSE);
6739 tem2 = cse_main (get_insns (), max_reg_num ());
6740 df_finish_pass (false);
6741 purge_all_dead_edges ();
6742 delete_trivially_dead_insns (get_insns (), max_reg_num ());
6743 timevar_pop (TV_CSE);
6744 cse_not_expected = !flag_rerun_cse_after_loop;
6745 }
6746
6747 /* If gcse or cse altered any jumps, rerun jump optimizations to clean
6748 things up. */
6749 if (tem || tem2 == 2)
6750 {
6751 timevar_push (TV_JUMP);
6752 rebuild_jump_labels (get_insns ());
6753 cleanup_cfg (0);
6754 timevar_pop (TV_JUMP);
6755 }
6756 else if (tem2 == 1)
6757 cleanup_cfg (0);
6758
6759 flag_cse_skip_blocks = save_csb;
6760 flag_cse_follow_jumps = save_cfj;
6761 return 0;
6762 }
6763
6764 struct rtl_opt_pass pass_gcse =
6765 {
6766 {
6767 RTL_PASS,
6768 "gcse1", /* name */
6769 gate_handle_gcse, /* gate */
6770 rest_of_handle_gcse, /* execute */
6771 NULL, /* sub */
6772 NULL, /* next */
6773 0, /* static_pass_number */
6774 TV_GCSE, /* tv_id */
6775 0, /* properties_required */
6776 0, /* properties_provided */
6777 0, /* properties_destroyed */
6778 0, /* todo_flags_start */
6779 TODO_df_finish | TODO_verify_rtl_sharing |
6780 TODO_dump_func |
6781 TODO_verify_flow | TODO_ggc_collect /* todo_flags_finish */
6782 }
6783 };
6784
6785
6786 #include "gt-gcse.h"