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1 /* Global common subexpression elimination/Partial redundancy elimination
2 and global constant/copy propagation for GNU compiler.
3 Copyright (C) 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
4 2006, 2007 Free Software Foundation, Inc.
5
6 This file is part of GCC.
7
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
11 version.
12
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
21
22 /* TODO
23 - reordering of memory allocation and freeing to be more space efficient
24 - do rough calc of how many regs are needed in each block, and a rough
25 calc of how many regs are available in each class and use that to
26 throttle back the code in cases where RTX_COST is minimal.
27 - a store to the same address as a load does not kill the load if the
28 source of the store is also the destination of the load. Handling this
29 allows more load motion, particularly out of loops.
30 - ability to realloc sbitmap vectors would allow one initial computation
31 of reg_set_in_block with only subsequent additions, rather than
32 recomputing it for each pass
33
34 */
35
36 /* References searched while implementing this.
37
38 Compilers Principles, Techniques and Tools
39 Aho, Sethi, Ullman
40 Addison-Wesley, 1988
41
42 Global Optimization by Suppression of Partial Redundancies
43 E. Morel, C. Renvoise
44 communications of the acm, Vol. 22, Num. 2, Feb. 1979
45
46 A Portable Machine-Independent Global Optimizer - Design and Measurements
47 Frederick Chow
48 Stanford Ph.D. thesis, Dec. 1983
49
50 A Fast Algorithm for Code Movement Optimization
51 D.M. Dhamdhere
52 SIGPLAN Notices, Vol. 23, Num. 10, Oct. 1988
53
54 A Solution to a Problem with Morel and Renvoise's
55 Global Optimization by Suppression of Partial Redundancies
56 K-H Drechsler, M.P. Stadel
57 ACM TOPLAS, Vol. 10, Num. 4, Oct. 1988
58
59 Practical Adaptation of the Global Optimization
60 Algorithm of Morel and Renvoise
61 D.M. Dhamdhere
62 ACM TOPLAS, Vol. 13, Num. 2. Apr. 1991
63
64 Efficiently Computing Static Single Assignment Form and the Control
65 Dependence Graph
66 R. Cytron, J. Ferrante, B.K. Rosen, M.N. Wegman, and F.K. Zadeck
67 ACM TOPLAS, Vol. 13, Num. 4, Oct. 1991
68
69 Lazy Code Motion
70 J. Knoop, O. Ruthing, B. Steffen
71 ACM SIGPLAN Notices Vol. 27, Num. 7, Jul. 1992, '92 Conference on PLDI
72
73 What's In a Region? Or Computing Control Dependence Regions in Near-Linear
74 Time for Reducible Flow Control
75 Thomas Ball
76 ACM Letters on Programming Languages and Systems,
77 Vol. 2, Num. 1-4, Mar-Dec 1993
78
79 An Efficient Representation for Sparse Sets
80 Preston Briggs, Linda Torczon
81 ACM Letters on Programming Languages and Systems,
82 Vol. 2, Num. 1-4, Mar-Dec 1993
83
84 A Variation of Knoop, Ruthing, and Steffen's Lazy Code Motion
85 K-H Drechsler, M.P. Stadel
86 ACM SIGPLAN Notices, Vol. 28, Num. 5, May 1993
87
88 Partial Dead Code Elimination
89 J. Knoop, O. Ruthing, B. Steffen
90 ACM SIGPLAN Notices, Vol. 29, Num. 6, Jun. 1994
91
92 Effective Partial Redundancy Elimination
93 P. Briggs, K.D. Cooper
94 ACM SIGPLAN Notices, Vol. 29, Num. 6, Jun. 1994
95
96 The Program Structure Tree: Computing Control Regions in Linear Time
97 R. Johnson, D. Pearson, K. Pingali
98 ACM SIGPLAN Notices, Vol. 29, Num. 6, Jun. 1994
99
100 Optimal Code Motion: Theory and Practice
101 J. Knoop, O. Ruthing, B. Steffen
102 ACM TOPLAS, Vol. 16, Num. 4, Jul. 1994
103
104 The power of assignment motion
105 J. Knoop, O. Ruthing, B. Steffen
106 ACM SIGPLAN Notices Vol. 30, Num. 6, Jun. 1995, '95 Conference on PLDI
107
108 Global code motion / global value numbering
109 C. Click
110 ACM SIGPLAN Notices Vol. 30, Num. 6, Jun. 1995, '95 Conference on PLDI
111
112 Value Driven Redundancy Elimination
113 L.T. Simpson
114 Rice University Ph.D. thesis, Apr. 1996
115
116 Value Numbering
117 L.T. Simpson
118 Massively Scalar Compiler Project, Rice University, Sep. 1996
119
120 High Performance Compilers for Parallel Computing
121 Michael Wolfe
122 Addison-Wesley, 1996
123
124 Advanced Compiler Design and Implementation
125 Steven Muchnick
126 Morgan Kaufmann, 1997
127
128 Building an Optimizing Compiler
129 Robert Morgan
130 Digital Press, 1998
131
132 People wishing to speed up the code here should read:
133 Elimination Algorithms for Data Flow Analysis
134 B.G. Ryder, M.C. Paull
135 ACM Computing Surveys, Vol. 18, Num. 3, Sep. 1986
136
137 How to Analyze Large Programs Efficiently and Informatively
138 D.M. Dhamdhere, B.K. Rosen, F.K. Zadeck
139 ACM SIGPLAN Notices Vol. 27, Num. 7, Jul. 1992, '92 Conference on PLDI
140
141 People wishing to do something different can find various possibilities
142 in the above papers and elsewhere.
143 */
144
145 #include "config.h"
146 #include "system.h"
147 #include "coretypes.h"
148 #include "tm.h"
149 #include "toplev.h"
150
151 #include "rtl.h"
152 #include "tree.h"
153 #include "tm_p.h"
154 #include "regs.h"
155 #include "hard-reg-set.h"
156 #include "flags.h"
157 #include "real.h"
158 #include "insn-config.h"
159 #include "recog.h"
160 #include "basic-block.h"
161 #include "output.h"
162 #include "function.h"
163 #include "expr.h"
164 #include "except.h"
165 #include "ggc.h"
166 #include "params.h"
167 #include "cselib.h"
168 #include "intl.h"
169 #include "obstack.h"
170 #include "timevar.h"
171 #include "tree-pass.h"
172 #include "hashtab.h"
173 #include "df.h"
174 #include "dbgcnt.h"
175
176 /* Propagate flow information through back edges and thus enable PRE's
177 moving loop invariant calculations out of loops.
178
179 Originally this tended to create worse overall code, but several
180 improvements during the development of PRE seem to have made following
181 back edges generally a win.
182
183 Note much of the loop invariant code motion done here would normally
184 be done by loop.c, which has more heuristics for when to move invariants
185 out of loops. At some point we might need to move some of those
186 heuristics into gcse.c. */
187
188 /* We support GCSE via Partial Redundancy Elimination. PRE optimizations
189 are a superset of those done by GCSE.
190
191 We perform the following steps:
192
193 1) Compute basic block information.
194
195 2) Compute table of places where registers are set.
196
197 3) Perform copy/constant propagation.
198
199 4) Perform global cse using lazy code motion if not optimizing
200 for size, or code hoisting if we are.
201
202 5) Perform another pass of copy/constant propagation.
203
204 Two passes of copy/constant propagation are done because the first one
205 enables more GCSE and the second one helps to clean up the copies that
206 GCSE creates. This is needed more for PRE than for Classic because Classic
207 GCSE will try to use an existing register containing the common
208 subexpression rather than create a new one. This is harder to do for PRE
209 because of the code motion (which Classic GCSE doesn't do).
210
211 Expressions we are interested in GCSE-ing are of the form
212 (set (pseudo-reg) (expression)).
213 Function want_to_gcse_p says what these are.
214
215 PRE handles moving invariant expressions out of loops (by treating them as
216 partially redundant).
217
218 Eventually it would be nice to replace cse.c/gcse.c with SSA (static single
219 assignment) based GVN (global value numbering). L. T. Simpson's paper
220 (Rice University) on value numbering is a useful reference for this.
221
222 **********************
223
224 We used to support multiple passes but there are diminishing returns in
225 doing so. The first pass usually makes 90% of the changes that are doable.
226 A second pass can make a few more changes made possible by the first pass.
227 Experiments show any further passes don't make enough changes to justify
228 the expense.
229
230 A study of spec92 using an unlimited number of passes:
231 [1 pass] = 1208 substitutions, [2] = 577, [3] = 202, [4] = 192, [5] = 83,
232 [6] = 34, [7] = 17, [8] = 9, [9] = 4, [10] = 4, [11] = 2,
233 [12] = 2, [13] = 1, [15] = 1, [16] = 2, [41] = 1
234
235 It was found doing copy propagation between each pass enables further
236 substitutions.
237
238 PRE is quite expensive in complicated functions because the DFA can take
239 a while to converge. Hence we only perform one pass. The parameter
240 max-gcse-passes can be modified if one wants to experiment.
241
242 **********************
243
244 The steps for PRE are:
245
246 1) Build the hash table of expressions we wish to GCSE (expr_hash_table).
247
248 2) Perform the data flow analysis for PRE.
249
250 3) Delete the redundant instructions
251
252 4) Insert the required copies [if any] that make the partially
253 redundant instructions fully redundant.
254
255 5) For other reaching expressions, insert an instruction to copy the value
256 to a newly created pseudo that will reach the redundant instruction.
257
258 The deletion is done first so that when we do insertions we
259 know which pseudo reg to use.
260
261 Various papers have argued that PRE DFA is expensive (O(n^2)) and others
262 argue it is not. The number of iterations for the algorithm to converge
263 is typically 2-4 so I don't view it as that expensive (relatively speaking).
264
265 PRE GCSE depends heavily on the second CSE pass to clean up the copies
266 we create. To make an expression reach the place where it's redundant,
267 the result of the expression is copied to a new register, and the redundant
268 expression is deleted by replacing it with this new register. Classic GCSE
269 doesn't have this problem as much as it computes the reaching defs of
270 each register in each block and thus can try to use an existing
271 register. */
272 \f
273 /* GCSE global vars. */
274
275 /* Note whether or not we should run jump optimization after gcse. We
276 want to do this for two cases.
277
278 * If we changed any jumps via cprop.
279
280 * If we added any labels via edge splitting. */
281 static int run_jump_opt_after_gcse;
282
283 /* An obstack for our working variables. */
284 static struct obstack gcse_obstack;
285
286 struct reg_use {rtx reg_rtx; };
287
288 /* Hash table of expressions. */
289
290 struct expr
291 {
292 /* The expression (SET_SRC for expressions, PATTERN for assignments). */
293 rtx expr;
294 /* Index in the available expression bitmaps. */
295 int bitmap_index;
296 /* Next entry with the same hash. */
297 struct expr *next_same_hash;
298 /* List of anticipatable occurrences in basic blocks in the function.
299 An "anticipatable occurrence" is one that is the first occurrence in the
300 basic block, the operands are not modified in the basic block prior
301 to the occurrence and the output is not used between the start of
302 the block and the occurrence. */
303 struct occr *antic_occr;
304 /* List of available occurrence in basic blocks in the function.
305 An "available occurrence" is one that is the last occurrence in the
306 basic block and the operands are not modified by following statements in
307 the basic block [including this insn]. */
308 struct occr *avail_occr;
309 /* Non-null if the computation is PRE redundant.
310 The value is the newly created pseudo-reg to record a copy of the
311 expression in all the places that reach the redundant copy. */
312 rtx reaching_reg;
313 };
314
315 /* Occurrence of an expression.
316 There is one per basic block. If a pattern appears more than once the
317 last appearance is used [or first for anticipatable expressions]. */
318
319 struct occr
320 {
321 /* Next occurrence of this expression. */
322 struct occr *next;
323 /* The insn that computes the expression. */
324 rtx insn;
325 /* Nonzero if this [anticipatable] occurrence has been deleted. */
326 char deleted_p;
327 /* Nonzero if this [available] occurrence has been copied to
328 reaching_reg. */
329 /* ??? This is mutually exclusive with deleted_p, so they could share
330 the same byte. */
331 char copied_p;
332 };
333
334 /* Expression and copy propagation hash tables.
335 Each hash table is an array of buckets.
336 ??? It is known that if it were an array of entries, structure elements
337 `next_same_hash' and `bitmap_index' wouldn't be necessary. However, it is
338 not clear whether in the final analysis a sufficient amount of memory would
339 be saved as the size of the available expression bitmaps would be larger
340 [one could build a mapping table without holes afterwards though].
341 Someday I'll perform the computation and figure it out. */
342
343 struct hash_table
344 {
345 /* The table itself.
346 This is an array of `expr_hash_table_size' elements. */
347 struct expr **table;
348
349 /* Size of the hash table, in elements. */
350 unsigned int size;
351
352 /* Number of hash table elements. */
353 unsigned int n_elems;
354
355 /* Whether the table is expression of copy propagation one. */
356 int set_p;
357 };
358
359 /* Expression hash table. */
360 static struct hash_table expr_hash_table;
361
362 /* Copy propagation hash table. */
363 static struct hash_table set_hash_table;
364
365 /* Mapping of uids to cuids.
366 Only real insns get cuids. */
367 static int *uid_cuid;
368
369 /* Highest UID in UID_CUID. */
370 static int max_uid;
371
372 /* Get the cuid of an insn. */
373 #ifdef ENABLE_CHECKING
374 #define INSN_CUID(INSN) \
375 (gcc_assert (INSN_UID (INSN) <= max_uid), uid_cuid[INSN_UID (INSN)])
376 #else
377 #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)])
378 #endif
379
380 /* Number of cuids. */
381 static int max_cuid;
382
383 /* Mapping of cuids to insns. */
384 static rtx *cuid_insn;
385
386 /* Get insn from cuid. */
387 #define CUID_INSN(CUID) (cuid_insn[CUID])
388
389 /* Maximum register number in function prior to doing gcse + 1.
390 Registers created during this pass have regno >= max_gcse_regno.
391 This is named with "gcse" to not collide with global of same name. */
392 static unsigned int max_gcse_regno;
393
394 /* Table of registers that are modified.
395
396 For each register, each element is a list of places where the pseudo-reg
397 is set.
398
399 For simplicity, GCSE is done on sets of pseudo-regs only. PRE GCSE only
400 requires knowledge of which blocks kill which regs [and thus could use
401 a bitmap instead of the lists `reg_set_table' uses].
402
403 `reg_set_table' and could be turned into an array of bitmaps (num-bbs x
404 num-regs) [however perhaps it may be useful to keep the data as is]. One
405 advantage of recording things this way is that `reg_set_table' is fairly
406 sparse with respect to pseudo regs but for hard regs could be fairly dense
407 [relatively speaking]. And recording sets of pseudo-regs in lists speeds
408 up functions like compute_transp since in the case of pseudo-regs we only
409 need to iterate over the number of times a pseudo-reg is set, not over the
410 number of basic blocks [clearly there is a bit of a slow down in the cases
411 where a pseudo is set more than once in a block, however it is believed
412 that the net effect is to speed things up]. This isn't done for hard-regs
413 because recording call-clobbered hard-regs in `reg_set_table' at each
414 function call can consume a fair bit of memory, and iterating over
415 hard-regs stored this way in compute_transp will be more expensive. */
416
417 typedef struct reg_set
418 {
419 /* The next setting of this register. */
420 struct reg_set *next;
421 /* The index of the block where it was set. */
422 int bb_index;
423 } reg_set;
424
425 static reg_set **reg_set_table;
426
427 /* Size of `reg_set_table'.
428 The table starts out at max_gcse_regno + slop, and is enlarged as
429 necessary. */
430 static int reg_set_table_size;
431
432 /* Amount to grow `reg_set_table' by when it's full. */
433 #define REG_SET_TABLE_SLOP 100
434
435 /* This is a list of expressions which are MEMs and will be used by load
436 or store motion.
437 Load motion tracks MEMs which aren't killed by
438 anything except itself. (i.e., loads and stores to a single location).
439 We can then allow movement of these MEM refs with a little special
440 allowance. (all stores copy the same value to the reaching reg used
441 for the loads). This means all values used to store into memory must have
442 no side effects so we can re-issue the setter value.
443 Store Motion uses this structure as an expression table to track stores
444 which look interesting, and might be moveable towards the exit block. */
445
446 struct ls_expr
447 {
448 struct expr * expr; /* Gcse expression reference for LM. */
449 rtx pattern; /* Pattern of this mem. */
450 rtx pattern_regs; /* List of registers mentioned by the mem. */
451 rtx loads; /* INSN list of loads seen. */
452 rtx stores; /* INSN list of stores seen. */
453 struct ls_expr * next; /* Next in the list. */
454 int invalid; /* Invalid for some reason. */
455 int index; /* If it maps to a bitmap index. */
456 unsigned int hash_index; /* Index when in a hash table. */
457 rtx reaching_reg; /* Register to use when re-writing. */
458 };
459
460 /* Array of implicit set patterns indexed by basic block index. */
461 static rtx *implicit_sets;
462
463 /* Head of the list of load/store memory refs. */
464 static struct ls_expr * pre_ldst_mems = NULL;
465
466 /* Hashtable for the load/store memory refs. */
467 static htab_t pre_ldst_table = NULL;
468
469 /* Bitmap containing one bit for each register in the program.
470 Used when performing GCSE to track which registers have been set since
471 the start of the basic block. */
472 static regset reg_set_bitmap;
473
474 /* For each block, a bitmap of registers set in the block.
475 This is used by compute_transp.
476 It is computed during hash table computation and not by compute_sets
477 as it includes registers added since the last pass (or between cprop and
478 gcse) and it's currently not easy to realloc sbitmap vectors. */
479 static sbitmap *reg_set_in_block;
480
481 /* Array, indexed by basic block number for a list of insns which modify
482 memory within that block. */
483 static rtx * modify_mem_list;
484 static bitmap modify_mem_list_set;
485
486 /* This array parallels modify_mem_list, but is kept canonicalized. */
487 static rtx * canon_modify_mem_list;
488
489 /* Bitmap indexed by block numbers to record which blocks contain
490 function calls. */
491 static bitmap blocks_with_calls;
492
493 /* Various variables for statistics gathering. */
494
495 /* Memory used in a pass.
496 This isn't intended to be absolutely precise. Its intent is only
497 to keep an eye on memory usage. */
498 static int bytes_used;
499
500 /* GCSE substitutions made. */
501 static int gcse_subst_count;
502 /* Number of copy instructions created. */
503 static int gcse_create_count;
504 /* Number of local constants propagated. */
505 static int local_const_prop_count;
506 /* Number of local copies propagated. */
507 static int local_copy_prop_count;
508 /* Number of global constants propagated. */
509 static int global_const_prop_count;
510 /* Number of global copies propagated. */
511 static int global_copy_prop_count;
512 \f
513 /* For available exprs */
514 static sbitmap *ae_kill, *ae_gen;
515 \f
516 static void compute_can_copy (void);
517 static void *gmalloc (size_t) ATTRIBUTE_MALLOC;
518 static void *gcalloc (size_t, size_t) ATTRIBUTE_MALLOC;
519 static void *grealloc (void *, size_t);
520 static void *gcse_alloc (unsigned long);
521 static void alloc_gcse_mem (void);
522 static void free_gcse_mem (void);
523 static void alloc_reg_set_mem (int);
524 static void free_reg_set_mem (void);
525 static void record_one_set (int, rtx);
526 static void record_set_info (rtx, rtx, void *);
527 static void compute_sets (void);
528 static void hash_scan_insn (rtx, struct hash_table *, int);
529 static void hash_scan_set (rtx, rtx, struct hash_table *);
530 static void hash_scan_clobber (rtx, rtx, struct hash_table *);
531 static void hash_scan_call (rtx, rtx, struct hash_table *);
532 static int want_to_gcse_p (rtx);
533 static bool can_assign_to_reg_p (rtx);
534 static bool gcse_constant_p (rtx);
535 static int oprs_unchanged_p (rtx, rtx, int);
536 static int oprs_anticipatable_p (rtx, rtx);
537 static int oprs_available_p (rtx, rtx);
538 static void insert_expr_in_table (rtx, enum machine_mode, rtx, int, int,
539 struct hash_table *);
540 static void insert_set_in_table (rtx, rtx, struct hash_table *);
541 static unsigned int hash_expr (rtx, enum machine_mode, int *, int);
542 static unsigned int hash_set (int, int);
543 static int expr_equiv_p (rtx, rtx);
544 static void record_last_reg_set_info (rtx, int);
545 static void record_last_mem_set_info (rtx);
546 static void record_last_set_info (rtx, rtx, void *);
547 static void compute_hash_table (struct hash_table *);
548 static void alloc_hash_table (int, struct hash_table *, int);
549 static void free_hash_table (struct hash_table *);
550 static void compute_hash_table_work (struct hash_table *);
551 static void dump_hash_table (FILE *, const char *, struct hash_table *);
552 static struct expr *lookup_set (unsigned int, struct hash_table *);
553 static struct expr *next_set (unsigned int, struct expr *);
554 static void reset_opr_set_tables (void);
555 static int oprs_not_set_p (rtx, rtx);
556 static void mark_call (rtx);
557 static void mark_set (rtx, rtx);
558 static void mark_clobber (rtx, rtx);
559 static void mark_oprs_set (rtx);
560 static void alloc_cprop_mem (int, int);
561 static void free_cprop_mem (void);
562 static void compute_transp (rtx, int, sbitmap *, int);
563 static void compute_transpout (void);
564 static void compute_local_properties (sbitmap *, sbitmap *, sbitmap *,
565 struct hash_table *);
566 static void compute_cprop_data (void);
567 static void find_used_regs (rtx *, void *);
568 static int try_replace_reg (rtx, rtx, rtx);
569 static struct expr *find_avail_set (int, rtx);
570 static int cprop_jump (basic_block, rtx, rtx, rtx, rtx);
571 static void mems_conflict_for_gcse_p (rtx, rtx, void *);
572 static int load_killed_in_block_p (basic_block, int, rtx, int);
573 static void canon_list_insert (rtx, rtx, void *);
574 static int cprop_insn (rtx, int);
575 static int cprop (int);
576 static void find_implicit_sets (void);
577 static int one_cprop_pass (int, bool, bool);
578 static bool constprop_register (rtx, rtx, rtx, bool);
579 static struct expr *find_bypass_set (int, int);
580 static bool reg_killed_on_edge (rtx, edge);
581 static int bypass_block (basic_block, rtx, rtx);
582 static int bypass_conditional_jumps (void);
583 static void alloc_pre_mem (int, int);
584 static void free_pre_mem (void);
585 static void compute_pre_data (void);
586 static int pre_expr_reaches_here_p (basic_block, struct expr *,
587 basic_block);
588 static void insert_insn_end_basic_block (struct expr *, basic_block, int);
589 static void pre_insert_copy_insn (struct expr *, rtx);
590 static void pre_insert_copies (void);
591 static int pre_delete (void);
592 static int pre_gcse (void);
593 static int one_pre_gcse_pass (int);
594 static void add_label_notes (rtx, rtx);
595 static void alloc_code_hoist_mem (int, int);
596 static void free_code_hoist_mem (void);
597 static void compute_code_hoist_vbeinout (void);
598 static void compute_code_hoist_data (void);
599 static int hoist_expr_reaches_here_p (basic_block, int, basic_block, char *);
600 static void hoist_code (void);
601 static int one_code_hoisting_pass (void);
602 static rtx process_insert_insn (struct expr *);
603 static int pre_edge_insert (struct edge_list *, struct expr **);
604 static int pre_expr_reaches_here_p_work (basic_block, struct expr *,
605 basic_block, char *);
606 static struct ls_expr * ldst_entry (rtx);
607 static void free_ldst_entry (struct ls_expr *);
608 static void free_ldst_mems (void);
609 static void print_ldst_list (FILE *);
610 static struct ls_expr * find_rtx_in_ldst (rtx);
611 static int enumerate_ldsts (void);
612 static inline struct ls_expr * first_ls_expr (void);
613 static inline struct ls_expr * next_ls_expr (struct ls_expr *);
614 static int simple_mem (rtx);
615 static void invalidate_any_buried_refs (rtx);
616 static void compute_ld_motion_mems (void);
617 static void trim_ld_motion_mems (void);
618 static void update_ld_motion_stores (struct expr *);
619 static void reg_set_info (rtx, rtx, void *);
620 static void reg_clear_last_set (rtx, rtx, void *);
621 static bool store_ops_ok (rtx, int *);
622 static rtx extract_mentioned_regs (rtx);
623 static rtx extract_mentioned_regs_helper (rtx, rtx);
624 static void find_moveable_store (rtx, int *, int *);
625 static int compute_store_table (void);
626 static bool load_kills_store (rtx, rtx, int);
627 static bool find_loads (rtx, rtx, int);
628 static bool store_killed_in_insn (rtx, rtx, rtx, int);
629 static bool store_killed_after (rtx, rtx, rtx, basic_block, int *, rtx *);
630 static bool store_killed_before (rtx, rtx, rtx, basic_block, int *);
631 static void build_store_vectors (void);
632 static void insert_insn_start_basic_block (rtx, basic_block);
633 static int insert_store (struct ls_expr *, edge);
634 static void remove_reachable_equiv_notes (basic_block, struct ls_expr *);
635 static void replace_store_insn (rtx, rtx, basic_block, struct ls_expr *);
636 static void delete_store (struct ls_expr *, basic_block);
637 static void free_store_memory (void);
638 static void store_motion (void);
639 static void free_insn_expr_list_list (rtx *);
640 static void clear_modify_mem_tables (void);
641 static void free_modify_mem_tables (void);
642 static rtx gcse_emit_move_after (rtx, rtx, rtx);
643 static void local_cprop_find_used_regs (rtx *, void *);
644 static bool do_local_cprop (rtx, rtx, bool, rtx*);
645 static bool adjust_libcall_notes (rtx, rtx, rtx, rtx*);
646 static void local_cprop_pass (bool);
647 static bool is_too_expensive (const char *);
648 \f
649
650 /* Entry point for global common subexpression elimination.
651 F is the first instruction in the function. Return nonzero if a
652 change is mode. */
653
654 static int
655 gcse_main (rtx f ATTRIBUTE_UNUSED)
656 {
657 int changed, pass;
658 /* Bytes used at start of pass. */
659 int initial_bytes_used;
660 /* Maximum number of bytes used by a pass. */
661 int max_pass_bytes;
662 /* Point to release obstack data from for each pass. */
663 char *gcse_obstack_bottom;
664
665 /* We do not construct an accurate cfg in functions which call
666 setjmp, so just punt to be safe. */
667 if (current_function_calls_setjmp)
668 return 0;
669
670 /* Assume that we do not need to run jump optimizations after gcse. */
671 run_jump_opt_after_gcse = 0;
672
673 /* Identify the basic block information for this function, including
674 successors and predecessors. */
675 max_gcse_regno = max_reg_num ();
676
677 df_note_add_problem ();
678 df_analyze ();
679
680 if (dump_file)
681 dump_flow_info (dump_file, dump_flags);
682
683 /* Return if there's nothing to do, or it is too expensive. */
684 if (n_basic_blocks <= NUM_FIXED_BLOCKS + 1
685 || is_too_expensive (_("GCSE disabled")))
686 return 0;
687
688 gcc_obstack_init (&gcse_obstack);
689 bytes_used = 0;
690
691 /* We need alias. */
692 init_alias_analysis ();
693 /* Record where pseudo-registers are set. This data is kept accurate
694 during each pass. ??? We could also record hard-reg information here
695 [since it's unchanging], however it is currently done during hash table
696 computation.
697
698 It may be tempting to compute MEM set information here too, but MEM sets
699 will be subject to code motion one day and thus we need to compute
700 information about memory sets when we build the hash tables. */
701
702 alloc_reg_set_mem (max_gcse_regno);
703 compute_sets ();
704
705 pass = 0;
706 initial_bytes_used = bytes_used;
707 max_pass_bytes = 0;
708 gcse_obstack_bottom = gcse_alloc (1);
709 changed = 1;
710 while (changed && pass < MAX_GCSE_PASSES)
711 {
712 changed = 0;
713 if (dump_file)
714 fprintf (dump_file, "GCSE pass %d\n\n", pass + 1);
715
716 /* Initialize bytes_used to the space for the pred/succ lists,
717 and the reg_set_table data. */
718 bytes_used = initial_bytes_used;
719
720 /* Each pass may create new registers, so recalculate each time. */
721 max_gcse_regno = max_reg_num ();
722
723 alloc_gcse_mem ();
724
725 /* Don't allow constant propagation to modify jumps
726 during this pass. */
727 timevar_push (TV_CPROP1);
728 changed = one_cprop_pass (pass + 1, false, false);
729 timevar_pop (TV_CPROP1);
730
731 if (optimize_size)
732 /* Do nothing. */ ;
733 else
734 {
735 timevar_push (TV_PRE);
736 changed |= one_pre_gcse_pass (pass + 1);
737 /* We may have just created new basic blocks. Release and
738 recompute various things which are sized on the number of
739 basic blocks. */
740 if (changed)
741 {
742 free_modify_mem_tables ();
743 modify_mem_list = gcalloc (last_basic_block, sizeof (rtx));
744 canon_modify_mem_list = gcalloc (last_basic_block, sizeof (rtx));
745 }
746 free_reg_set_mem ();
747 alloc_reg_set_mem (max_reg_num ());
748 compute_sets ();
749 run_jump_opt_after_gcse = 1;
750 timevar_pop (TV_PRE);
751 }
752
753 if (max_pass_bytes < bytes_used)
754 max_pass_bytes = bytes_used;
755
756 /* Free up memory, then reallocate for code hoisting. We can
757 not re-use the existing allocated memory because the tables
758 will not have info for the insns or registers created by
759 partial redundancy elimination. */
760 free_gcse_mem ();
761
762 /* It does not make sense to run code hoisting unless we are optimizing
763 for code size -- it rarely makes programs faster, and can make
764 them bigger if we did partial redundancy elimination (when optimizing
765 for space, we don't run the partial redundancy algorithms). */
766 if (optimize_size)
767 {
768 timevar_push (TV_HOIST);
769 max_gcse_regno = max_reg_num ();
770 alloc_gcse_mem ();
771 changed |= one_code_hoisting_pass ();
772 free_gcse_mem ();
773
774 if (max_pass_bytes < bytes_used)
775 max_pass_bytes = bytes_used;
776 timevar_pop (TV_HOIST);
777 }
778
779 if (dump_file)
780 {
781 fprintf (dump_file, "\n");
782 fflush (dump_file);
783 }
784
785 obstack_free (&gcse_obstack, gcse_obstack_bottom);
786 pass++;
787 }
788
789 /* Do one last pass of copy propagation, including cprop into
790 conditional jumps. */
791
792 max_gcse_regno = max_reg_num ();
793 alloc_gcse_mem ();
794 /* This time, go ahead and allow cprop to alter jumps. */
795 timevar_push (TV_CPROP2);
796 one_cprop_pass (pass + 1, true, true);
797 timevar_pop (TV_CPROP2);
798 free_gcse_mem ();
799
800 if (dump_file)
801 {
802 fprintf (dump_file, "GCSE of %s: %d basic blocks, ",
803 current_function_name (), n_basic_blocks);
804 fprintf (dump_file, "%d pass%s, %d bytes\n\n",
805 pass, pass > 1 ? "es" : "", max_pass_bytes);
806 }
807
808 obstack_free (&gcse_obstack, NULL);
809 free_reg_set_mem ();
810
811 /* We are finished with alias. */
812 end_alias_analysis ();
813
814 if (!optimize_size && flag_gcse_sm)
815 {
816 timevar_push (TV_LSM);
817 store_motion ();
818 timevar_pop (TV_LSM);
819 }
820
821 /* Record where pseudo-registers are set. */
822 return run_jump_opt_after_gcse;
823 }
824 \f
825 /* Misc. utilities. */
826
827 /* Nonzero for each mode that supports (set (reg) (reg)).
828 This is trivially true for integer and floating point values.
829 It may or may not be true for condition codes. */
830 static char can_copy[(int) NUM_MACHINE_MODES];
831
832 /* Compute which modes support reg/reg copy operations. */
833
834 static void
835 compute_can_copy (void)
836 {
837 int i;
838 #ifndef AVOID_CCMODE_COPIES
839 rtx reg, insn;
840 #endif
841 memset (can_copy, 0, NUM_MACHINE_MODES);
842
843 start_sequence ();
844 for (i = 0; i < NUM_MACHINE_MODES; i++)
845 if (GET_MODE_CLASS (i) == MODE_CC)
846 {
847 #ifdef AVOID_CCMODE_COPIES
848 can_copy[i] = 0;
849 #else
850 reg = gen_rtx_REG ((enum machine_mode) i, LAST_VIRTUAL_REGISTER + 1);
851 insn = emit_insn (gen_rtx_SET (VOIDmode, reg, reg));
852 if (recog (PATTERN (insn), insn, NULL) >= 0)
853 can_copy[i] = 1;
854 #endif
855 }
856 else
857 can_copy[i] = 1;
858
859 end_sequence ();
860 }
861
862 /* Returns whether the mode supports reg/reg copy operations. */
863
864 bool
865 can_copy_p (enum machine_mode mode)
866 {
867 static bool can_copy_init_p = false;
868
869 if (! can_copy_init_p)
870 {
871 compute_can_copy ();
872 can_copy_init_p = true;
873 }
874
875 return can_copy[mode] != 0;
876 }
877 \f
878 /* Cover function to xmalloc to record bytes allocated. */
879
880 static void *
881 gmalloc (size_t size)
882 {
883 bytes_used += size;
884 return xmalloc (size);
885 }
886
887 /* Cover function to xcalloc to record bytes allocated. */
888
889 static void *
890 gcalloc (size_t nelem, size_t elsize)
891 {
892 bytes_used += nelem * elsize;
893 return xcalloc (nelem, elsize);
894 }
895
896 /* Cover function to xrealloc.
897 We don't record the additional size since we don't know it.
898 It won't affect memory usage stats much anyway. */
899
900 static void *
901 grealloc (void *ptr, size_t size)
902 {
903 return xrealloc (ptr, size);
904 }
905
906 /* Cover function to obstack_alloc. */
907
908 static void *
909 gcse_alloc (unsigned long size)
910 {
911 bytes_used += size;
912 return obstack_alloc (&gcse_obstack, size);
913 }
914
915 /* Allocate memory for the cuid mapping array,
916 and reg/memory set tracking tables.
917
918 This is called at the start of each pass. */
919
920 static void
921 alloc_gcse_mem (void)
922 {
923 int i;
924 basic_block bb;
925 rtx insn;
926
927 /* Find the largest UID and create a mapping from UIDs to CUIDs.
928 CUIDs are like UIDs except they increase monotonically, have no gaps,
929 and only apply to real insns.
930 (Actually, there are gaps, for insn that are not inside a basic block.
931 but we should never see those anyway, so this is OK.) */
932
933 max_uid = get_max_uid ();
934 uid_cuid = gcalloc (max_uid + 1, sizeof (int));
935 i = 0;
936 FOR_EACH_BB (bb)
937 FOR_BB_INSNS (bb, insn)
938 {
939 if (INSN_P (insn))
940 uid_cuid[INSN_UID (insn)] = i++;
941 else
942 uid_cuid[INSN_UID (insn)] = i;
943 }
944
945 /* Create a table mapping cuids to insns. */
946
947 max_cuid = i;
948 cuid_insn = gcalloc (max_cuid + 1, sizeof (rtx));
949 i = 0;
950 FOR_EACH_BB (bb)
951 FOR_BB_INSNS (bb, insn)
952 if (INSN_P (insn))
953 CUID_INSN (i++) = insn;
954
955 /* Allocate vars to track sets of regs. */
956 reg_set_bitmap = BITMAP_ALLOC (NULL);
957
958 /* Allocate vars to track sets of regs, memory per block. */
959 reg_set_in_block = sbitmap_vector_alloc (last_basic_block, max_gcse_regno);
960 /* Allocate array to keep a list of insns which modify memory in each
961 basic block. */
962 modify_mem_list = gcalloc (last_basic_block, sizeof (rtx));
963 canon_modify_mem_list = gcalloc (last_basic_block, sizeof (rtx));
964 modify_mem_list_set = BITMAP_ALLOC (NULL);
965 blocks_with_calls = BITMAP_ALLOC (NULL);
966 }
967
968 /* Free memory allocated by alloc_gcse_mem. */
969
970 static void
971 free_gcse_mem (void)
972 {
973 free (uid_cuid);
974 free (cuid_insn);
975
976 BITMAP_FREE (reg_set_bitmap);
977
978 sbitmap_vector_free (reg_set_in_block);
979 free_modify_mem_tables ();
980 BITMAP_FREE (modify_mem_list_set);
981 BITMAP_FREE (blocks_with_calls);
982 }
983 \f
984 /* Compute the local properties of each recorded expression.
985
986 Local properties are those that are defined by the block, irrespective of
987 other blocks.
988
989 An expression is transparent in a block if its operands are not modified
990 in the block.
991
992 An expression is computed (locally available) in a block if it is computed
993 at least once and expression would contain the same value if the
994 computation was moved to the end of the block.
995
996 An expression is locally anticipatable in a block if it is computed at
997 least once and expression would contain the same value if the computation
998 was moved to the beginning of the block.
999
1000 We call this routine for cprop, pre and code hoisting. They all compute
1001 basically the same information and thus can easily share this code.
1002
1003 TRANSP, COMP, and ANTLOC are destination sbitmaps for recording local
1004 properties. If NULL, then it is not necessary to compute or record that
1005 particular property.
1006
1007 TABLE controls which hash table to look at. If it is set hash table,
1008 additionally, TRANSP is computed as ~TRANSP, since this is really cprop's
1009 ABSALTERED. */
1010
1011 static void
1012 compute_local_properties (sbitmap *transp, sbitmap *comp, sbitmap *antloc,
1013 struct hash_table *table)
1014 {
1015 unsigned int i;
1016
1017 /* Initialize any bitmaps that were passed in. */
1018 if (transp)
1019 {
1020 if (table->set_p)
1021 sbitmap_vector_zero (transp, last_basic_block);
1022 else
1023 sbitmap_vector_ones (transp, last_basic_block);
1024 }
1025
1026 if (comp)
1027 sbitmap_vector_zero (comp, last_basic_block);
1028 if (antloc)
1029 sbitmap_vector_zero (antloc, last_basic_block);
1030
1031 for (i = 0; i < table->size; i++)
1032 {
1033 struct expr *expr;
1034
1035 for (expr = table->table[i]; expr != NULL; expr = expr->next_same_hash)
1036 {
1037 int indx = expr->bitmap_index;
1038 struct occr *occr;
1039
1040 /* The expression is transparent in this block if it is not killed.
1041 We start by assuming all are transparent [none are killed], and
1042 then reset the bits for those that are. */
1043 if (transp)
1044 compute_transp (expr->expr, indx, transp, table->set_p);
1045
1046 /* The occurrences recorded in antic_occr are exactly those that
1047 we want to set to nonzero in ANTLOC. */
1048 if (antloc)
1049 for (occr = expr->antic_occr; occr != NULL; occr = occr->next)
1050 {
1051 SET_BIT (antloc[BLOCK_NUM (occr->insn)], indx);
1052
1053 /* While we're scanning the table, this is a good place to
1054 initialize this. */
1055 occr->deleted_p = 0;
1056 }
1057
1058 /* The occurrences recorded in avail_occr are exactly those that
1059 we want to set to nonzero in COMP. */
1060 if (comp)
1061 for (occr = expr->avail_occr; occr != NULL; occr = occr->next)
1062 {
1063 SET_BIT (comp[BLOCK_NUM (occr->insn)], indx);
1064
1065 /* While we're scanning the table, this is a good place to
1066 initialize this. */
1067 occr->copied_p = 0;
1068 }
1069
1070 /* While we're scanning the table, this is a good place to
1071 initialize this. */
1072 expr->reaching_reg = 0;
1073 }
1074 }
1075 }
1076 \f
1077 /* Register set information.
1078
1079 `reg_set_table' records where each register is set or otherwise
1080 modified. */
1081
1082 static struct obstack reg_set_obstack;
1083
1084 static void
1085 alloc_reg_set_mem (int n_regs)
1086 {
1087 reg_set_table_size = n_regs + REG_SET_TABLE_SLOP;
1088 reg_set_table = gcalloc (reg_set_table_size, sizeof (struct reg_set *));
1089
1090 gcc_obstack_init (&reg_set_obstack);
1091 }
1092
1093 static void
1094 free_reg_set_mem (void)
1095 {
1096 free (reg_set_table);
1097 obstack_free (&reg_set_obstack, NULL);
1098 }
1099
1100 /* Record REGNO in the reg_set table. */
1101
1102 static void
1103 record_one_set (int regno, rtx insn)
1104 {
1105 /* Allocate a new reg_set element and link it onto the list. */
1106 struct reg_set *new_reg_info;
1107
1108 /* If the table isn't big enough, enlarge it. */
1109 if (regno >= reg_set_table_size)
1110 {
1111 int new_size = regno + REG_SET_TABLE_SLOP;
1112
1113 reg_set_table = grealloc (reg_set_table,
1114 new_size * sizeof (struct reg_set *));
1115 memset (reg_set_table + reg_set_table_size, 0,
1116 (new_size - reg_set_table_size) * sizeof (struct reg_set *));
1117 reg_set_table_size = new_size;
1118 }
1119
1120 new_reg_info = obstack_alloc (&reg_set_obstack, sizeof (struct reg_set));
1121 bytes_used += sizeof (struct reg_set);
1122 new_reg_info->bb_index = BLOCK_NUM (insn);
1123 new_reg_info->next = reg_set_table[regno];
1124 reg_set_table[regno] = new_reg_info;
1125 }
1126
1127 /* Called from compute_sets via note_stores to handle one SET or CLOBBER in
1128 an insn. The DATA is really the instruction in which the SET is
1129 occurring. */
1130
1131 static void
1132 record_set_info (rtx dest, rtx setter ATTRIBUTE_UNUSED, void *data)
1133 {
1134 rtx record_set_insn = (rtx) data;
1135
1136 if (REG_P (dest) && REGNO (dest) >= FIRST_PSEUDO_REGISTER)
1137 record_one_set (REGNO (dest), record_set_insn);
1138 }
1139
1140 /* Scan the function and record each set of each pseudo-register.
1141
1142 This is called once, at the start of the gcse pass. See the comments for
1143 `reg_set_table' for further documentation. */
1144
1145 static void
1146 compute_sets (void)
1147 {
1148 basic_block bb;
1149 rtx insn;
1150
1151 FOR_EACH_BB (bb)
1152 FOR_BB_INSNS (bb, insn)
1153 if (INSN_P (insn))
1154 note_stores (PATTERN (insn), record_set_info, insn);
1155 }
1156 \f
1157 /* Hash table support. */
1158
1159 struct reg_avail_info
1160 {
1161 basic_block last_bb;
1162 int first_set;
1163 int last_set;
1164 };
1165
1166 static struct reg_avail_info *reg_avail_info;
1167 static basic_block current_bb;
1168
1169
1170 /* See whether X, the source of a set, is something we want to consider for
1171 GCSE. */
1172
1173 static int
1174 want_to_gcse_p (rtx x)
1175 {
1176 #ifdef STACK_REGS
1177 /* On register stack architectures, don't GCSE constants from the
1178 constant pool, as the benefits are often swamped by the overhead
1179 of shuffling the register stack between basic blocks. */
1180 if (IS_STACK_MODE (GET_MODE (x)))
1181 x = avoid_constant_pool_reference (x);
1182 #endif
1183
1184 switch (GET_CODE (x))
1185 {
1186 case REG:
1187 case SUBREG:
1188 case CONST_INT:
1189 case CONST_DOUBLE:
1190 case CONST_VECTOR:
1191 case CALL:
1192 return 0;
1193
1194 default:
1195 return can_assign_to_reg_p (x);
1196 }
1197 }
1198
1199 /* Used internally by can_assign_to_reg_p. */
1200
1201 static GTY(()) rtx test_insn;
1202
1203 /* Return true if we can assign X to a pseudo register. */
1204
1205 static bool
1206 can_assign_to_reg_p (rtx x)
1207 {
1208 int num_clobbers = 0;
1209 int icode;
1210
1211 /* If this is a valid operand, we are OK. If it's VOIDmode, we aren't. */
1212 if (general_operand (x, GET_MODE (x)))
1213 return 1;
1214 else if (GET_MODE (x) == VOIDmode)
1215 return 0;
1216
1217 /* Otherwise, check if we can make a valid insn from it. First initialize
1218 our test insn if we haven't already. */
1219 if (test_insn == 0)
1220 {
1221 test_insn
1222 = make_insn_raw (gen_rtx_SET (VOIDmode,
1223 gen_rtx_REG (word_mode,
1224 FIRST_PSEUDO_REGISTER * 2),
1225 const0_rtx));
1226 NEXT_INSN (test_insn) = PREV_INSN (test_insn) = 0;
1227 }
1228
1229 /* Now make an insn like the one we would make when GCSE'ing and see if
1230 valid. */
1231 PUT_MODE (SET_DEST (PATTERN (test_insn)), GET_MODE (x));
1232 SET_SRC (PATTERN (test_insn)) = x;
1233 return ((icode = recog (PATTERN (test_insn), test_insn, &num_clobbers)) >= 0
1234 && (num_clobbers == 0 || ! added_clobbers_hard_reg_p (icode)));
1235 }
1236
1237 /* Return nonzero if the operands of expression X are unchanged from the
1238 start of INSN's basic block up to but not including INSN (if AVAIL_P == 0),
1239 or from INSN to the end of INSN's basic block (if AVAIL_P != 0). */
1240
1241 static int
1242 oprs_unchanged_p (rtx x, rtx insn, int avail_p)
1243 {
1244 int i, j;
1245 enum rtx_code code;
1246 const char *fmt;
1247
1248 if (x == 0)
1249 return 1;
1250
1251 code = GET_CODE (x);
1252 switch (code)
1253 {
1254 case REG:
1255 {
1256 struct reg_avail_info *info = &reg_avail_info[REGNO (x)];
1257
1258 if (info->last_bb != current_bb)
1259 return 1;
1260 if (avail_p)
1261 return info->last_set < INSN_CUID (insn);
1262 else
1263 return info->first_set >= INSN_CUID (insn);
1264 }
1265
1266 case MEM:
1267 if (load_killed_in_block_p (current_bb, INSN_CUID (insn),
1268 x, avail_p))
1269 return 0;
1270 else
1271 return oprs_unchanged_p (XEXP (x, 0), insn, avail_p);
1272
1273 case PRE_DEC:
1274 case PRE_INC:
1275 case POST_DEC:
1276 case POST_INC:
1277 case PRE_MODIFY:
1278 case POST_MODIFY:
1279 return 0;
1280
1281 case PC:
1282 case CC0: /*FIXME*/
1283 case CONST:
1284 case CONST_INT:
1285 case CONST_DOUBLE:
1286 case CONST_VECTOR:
1287 case SYMBOL_REF:
1288 case LABEL_REF:
1289 case ADDR_VEC:
1290 case ADDR_DIFF_VEC:
1291 return 1;
1292
1293 default:
1294 break;
1295 }
1296
1297 for (i = GET_RTX_LENGTH (code) - 1, fmt = GET_RTX_FORMAT (code); i >= 0; i--)
1298 {
1299 if (fmt[i] == 'e')
1300 {
1301 /* If we are about to do the last recursive call needed at this
1302 level, change it into iteration. This function is called enough
1303 to be worth it. */
1304 if (i == 0)
1305 return oprs_unchanged_p (XEXP (x, i), insn, avail_p);
1306
1307 else if (! oprs_unchanged_p (XEXP (x, i), insn, avail_p))
1308 return 0;
1309 }
1310 else if (fmt[i] == 'E')
1311 for (j = 0; j < XVECLEN (x, i); j++)
1312 if (! oprs_unchanged_p (XVECEXP (x, i, j), insn, avail_p))
1313 return 0;
1314 }
1315
1316 return 1;
1317 }
1318
1319 /* Used for communication between mems_conflict_for_gcse_p and
1320 load_killed_in_block_p. Nonzero if mems_conflict_for_gcse_p finds a
1321 conflict between two memory references. */
1322 static int gcse_mems_conflict_p;
1323
1324 /* Used for communication between mems_conflict_for_gcse_p and
1325 load_killed_in_block_p. A memory reference for a load instruction,
1326 mems_conflict_for_gcse_p will see if a memory store conflicts with
1327 this memory load. */
1328 static rtx gcse_mem_operand;
1329
1330 /* DEST is the output of an instruction. If it is a memory reference, and
1331 possibly conflicts with the load found in gcse_mem_operand, then set
1332 gcse_mems_conflict_p to a nonzero value. */
1333
1334 static void
1335 mems_conflict_for_gcse_p (rtx dest, rtx setter ATTRIBUTE_UNUSED,
1336 void *data ATTRIBUTE_UNUSED)
1337 {
1338 while (GET_CODE (dest) == SUBREG
1339 || GET_CODE (dest) == ZERO_EXTRACT
1340 || GET_CODE (dest) == STRICT_LOW_PART)
1341 dest = XEXP (dest, 0);
1342
1343 /* If DEST is not a MEM, then it will not conflict with the load. Note
1344 that function calls are assumed to clobber memory, but are handled
1345 elsewhere. */
1346 if (! MEM_P (dest))
1347 return;
1348
1349 /* If we are setting a MEM in our list of specially recognized MEMs,
1350 don't mark as killed this time. */
1351
1352 if (expr_equiv_p (dest, gcse_mem_operand) && pre_ldst_mems != NULL)
1353 {
1354 if (!find_rtx_in_ldst (dest))
1355 gcse_mems_conflict_p = 1;
1356 return;
1357 }
1358
1359 if (true_dependence (dest, GET_MODE (dest), gcse_mem_operand,
1360 rtx_addr_varies_p))
1361 gcse_mems_conflict_p = 1;
1362 }
1363
1364 /* Return nonzero if the expression in X (a memory reference) is killed
1365 in block BB before or after the insn with the CUID in UID_LIMIT.
1366 AVAIL_P is nonzero for kills after UID_LIMIT, and zero for kills
1367 before UID_LIMIT.
1368
1369 To check the entire block, set UID_LIMIT to max_uid + 1 and
1370 AVAIL_P to 0. */
1371
1372 static int
1373 load_killed_in_block_p (basic_block bb, int uid_limit, rtx x, int avail_p)
1374 {
1375 rtx list_entry = modify_mem_list[bb->index];
1376
1377 /* If this is a readonly then we aren't going to be changing it. */
1378 if (MEM_READONLY_P (x))
1379 return 0;
1380
1381 while (list_entry)
1382 {
1383 rtx setter;
1384 /* Ignore entries in the list that do not apply. */
1385 if ((avail_p
1386 && INSN_CUID (XEXP (list_entry, 0)) < uid_limit)
1387 || (! avail_p
1388 && INSN_CUID (XEXP (list_entry, 0)) > uid_limit))
1389 {
1390 list_entry = XEXP (list_entry, 1);
1391 continue;
1392 }
1393
1394 setter = XEXP (list_entry, 0);
1395
1396 /* If SETTER is a call everything is clobbered. Note that calls
1397 to pure functions are never put on the list, so we need not
1398 worry about them. */
1399 if (CALL_P (setter))
1400 return 1;
1401
1402 /* SETTER must be an INSN of some kind that sets memory. Call
1403 note_stores to examine each hunk of memory that is modified.
1404
1405 The note_stores interface is pretty limited, so we have to
1406 communicate via global variables. Yuk. */
1407 gcse_mem_operand = x;
1408 gcse_mems_conflict_p = 0;
1409 note_stores (PATTERN (setter), mems_conflict_for_gcse_p, NULL);
1410 if (gcse_mems_conflict_p)
1411 return 1;
1412 list_entry = XEXP (list_entry, 1);
1413 }
1414 return 0;
1415 }
1416
1417 /* Return nonzero if the operands of expression X are unchanged from
1418 the start of INSN's basic block up to but not including INSN. */
1419
1420 static int
1421 oprs_anticipatable_p (rtx x, rtx insn)
1422 {
1423 return oprs_unchanged_p (x, insn, 0);
1424 }
1425
1426 /* Return nonzero if the operands of expression X are unchanged from
1427 INSN to the end of INSN's basic block. */
1428
1429 static int
1430 oprs_available_p (rtx x, rtx insn)
1431 {
1432 return oprs_unchanged_p (x, insn, 1);
1433 }
1434
1435 /* Hash expression X.
1436
1437 MODE is only used if X is a CONST_INT. DO_NOT_RECORD_P is a boolean
1438 indicating if a volatile operand is found or if the expression contains
1439 something we don't want to insert in the table. HASH_TABLE_SIZE is
1440 the current size of the hash table to be probed. */
1441
1442 static unsigned int
1443 hash_expr (rtx x, enum machine_mode mode, int *do_not_record_p,
1444 int hash_table_size)
1445 {
1446 unsigned int hash;
1447
1448 *do_not_record_p = 0;
1449
1450 hash = hash_rtx (x, mode, do_not_record_p,
1451 NULL, /*have_reg_qty=*/false);
1452 return hash % hash_table_size;
1453 }
1454
1455 /* Hash a set of register REGNO.
1456
1457 Sets are hashed on the register that is set. This simplifies the PRE copy
1458 propagation code.
1459
1460 ??? May need to make things more elaborate. Later, as necessary. */
1461
1462 static unsigned int
1463 hash_set (int regno, int hash_table_size)
1464 {
1465 unsigned int hash;
1466
1467 hash = regno;
1468 return hash % hash_table_size;
1469 }
1470
1471 /* Return nonzero if exp1 is equivalent to exp2. */
1472
1473 static int
1474 expr_equiv_p (rtx x, rtx y)
1475 {
1476 return exp_equiv_p (x, y, 0, true);
1477 }
1478
1479 /* Insert expression X in INSN in the hash TABLE.
1480 If it is already present, record it as the last occurrence in INSN's
1481 basic block.
1482
1483 MODE is the mode of the value X is being stored into.
1484 It is only used if X is a CONST_INT.
1485
1486 ANTIC_P is nonzero if X is an anticipatable expression.
1487 AVAIL_P is nonzero if X is an available expression. */
1488
1489 static void
1490 insert_expr_in_table (rtx x, enum machine_mode mode, rtx insn, int antic_p,
1491 int avail_p, struct hash_table *table)
1492 {
1493 int found, do_not_record_p;
1494 unsigned int hash;
1495 struct expr *cur_expr, *last_expr = NULL;
1496 struct occr *antic_occr, *avail_occr;
1497
1498 hash = hash_expr (x, mode, &do_not_record_p, table->size);
1499
1500 /* Do not insert expression in table if it contains volatile operands,
1501 or if hash_expr determines the expression is something we don't want
1502 to or can't handle. */
1503 if (do_not_record_p)
1504 return;
1505
1506 cur_expr = table->table[hash];
1507 found = 0;
1508
1509 while (cur_expr && 0 == (found = expr_equiv_p (cur_expr->expr, x)))
1510 {
1511 /* If the expression isn't found, save a pointer to the end of
1512 the list. */
1513 last_expr = cur_expr;
1514 cur_expr = cur_expr->next_same_hash;
1515 }
1516
1517 if (! found)
1518 {
1519 cur_expr = gcse_alloc (sizeof (struct expr));
1520 bytes_used += sizeof (struct expr);
1521 if (table->table[hash] == NULL)
1522 /* This is the first pattern that hashed to this index. */
1523 table->table[hash] = cur_expr;
1524 else
1525 /* Add EXPR to end of this hash chain. */
1526 last_expr->next_same_hash = cur_expr;
1527
1528 /* Set the fields of the expr element. */
1529 cur_expr->expr = x;
1530 cur_expr->bitmap_index = table->n_elems++;
1531 cur_expr->next_same_hash = NULL;
1532 cur_expr->antic_occr = NULL;
1533 cur_expr->avail_occr = NULL;
1534 }
1535
1536 /* Now record the occurrence(s). */
1537 if (antic_p)
1538 {
1539 antic_occr = cur_expr->antic_occr;
1540
1541 if (antic_occr && BLOCK_NUM (antic_occr->insn) != BLOCK_NUM (insn))
1542 antic_occr = NULL;
1543
1544 if (antic_occr)
1545 /* Found another instance of the expression in the same basic block.
1546 Prefer the currently recorded one. We want the first one in the
1547 block and the block is scanned from start to end. */
1548 ; /* nothing to do */
1549 else
1550 {
1551 /* First occurrence of this expression in this basic block. */
1552 antic_occr = gcse_alloc (sizeof (struct occr));
1553 bytes_used += sizeof (struct occr);
1554 antic_occr->insn = insn;
1555 antic_occr->next = cur_expr->antic_occr;
1556 antic_occr->deleted_p = 0;
1557 cur_expr->antic_occr = antic_occr;
1558 }
1559 }
1560
1561 if (avail_p)
1562 {
1563 avail_occr = cur_expr->avail_occr;
1564
1565 if (avail_occr && BLOCK_NUM (avail_occr->insn) == BLOCK_NUM (insn))
1566 {
1567 /* Found another instance of the expression in the same basic block.
1568 Prefer this occurrence to the currently recorded one. We want
1569 the last one in the block and the block is scanned from start
1570 to end. */
1571 avail_occr->insn = insn;
1572 }
1573 else
1574 {
1575 /* First occurrence of this expression in this basic block. */
1576 avail_occr = gcse_alloc (sizeof (struct occr));
1577 bytes_used += sizeof (struct occr);
1578 avail_occr->insn = insn;
1579 avail_occr->next = cur_expr->avail_occr;
1580 avail_occr->deleted_p = 0;
1581 cur_expr->avail_occr = avail_occr;
1582 }
1583 }
1584 }
1585
1586 /* Insert pattern X in INSN in the hash table.
1587 X is a SET of a reg to either another reg or a constant.
1588 If it is already present, record it as the last occurrence in INSN's
1589 basic block. */
1590
1591 static void
1592 insert_set_in_table (rtx x, rtx insn, struct hash_table *table)
1593 {
1594 int found;
1595 unsigned int hash;
1596 struct expr *cur_expr, *last_expr = NULL;
1597 struct occr *cur_occr;
1598
1599 gcc_assert (GET_CODE (x) == SET && REG_P (SET_DEST (x)));
1600
1601 hash = hash_set (REGNO (SET_DEST (x)), table->size);
1602
1603 cur_expr = table->table[hash];
1604 found = 0;
1605
1606 while (cur_expr && 0 == (found = expr_equiv_p (cur_expr->expr, x)))
1607 {
1608 /* If the expression isn't found, save a pointer to the end of
1609 the list. */
1610 last_expr = cur_expr;
1611 cur_expr = cur_expr->next_same_hash;
1612 }
1613
1614 if (! found)
1615 {
1616 cur_expr = gcse_alloc (sizeof (struct expr));
1617 bytes_used += sizeof (struct expr);
1618 if (table->table[hash] == NULL)
1619 /* This is the first pattern that hashed to this index. */
1620 table->table[hash] = cur_expr;
1621 else
1622 /* Add EXPR to end of this hash chain. */
1623 last_expr->next_same_hash = cur_expr;
1624
1625 /* Set the fields of the expr element.
1626 We must copy X because it can be modified when copy propagation is
1627 performed on its operands. */
1628 cur_expr->expr = copy_rtx (x);
1629 cur_expr->bitmap_index = table->n_elems++;
1630 cur_expr->next_same_hash = NULL;
1631 cur_expr->antic_occr = NULL;
1632 cur_expr->avail_occr = NULL;
1633 }
1634
1635 /* Now record the occurrence. */
1636 cur_occr = cur_expr->avail_occr;
1637
1638 if (cur_occr && BLOCK_NUM (cur_occr->insn) == BLOCK_NUM (insn))
1639 {
1640 /* Found another instance of the expression in the same basic block.
1641 Prefer this occurrence to the currently recorded one. We want
1642 the last one in the block and the block is scanned from start
1643 to end. */
1644 cur_occr->insn = insn;
1645 }
1646 else
1647 {
1648 /* First occurrence of this expression in this basic block. */
1649 cur_occr = gcse_alloc (sizeof (struct occr));
1650 bytes_used += sizeof (struct occr);
1651
1652 cur_occr->insn = insn;
1653 cur_occr->next = cur_expr->avail_occr;
1654 cur_occr->deleted_p = 0;
1655 cur_expr->avail_occr = cur_occr;
1656 }
1657 }
1658
1659 /* Determine whether the rtx X should be treated as a constant for
1660 the purposes of GCSE's constant propagation. */
1661
1662 static bool
1663 gcse_constant_p (rtx x)
1664 {
1665 /* Consider a COMPARE of two integers constant. */
1666 if (GET_CODE (x) == COMPARE
1667 && GET_CODE (XEXP (x, 0)) == CONST_INT
1668 && GET_CODE (XEXP (x, 1)) == CONST_INT)
1669 return true;
1670
1671 /* Consider a COMPARE of the same registers is a constant
1672 if they are not floating point registers. */
1673 if (GET_CODE(x) == COMPARE
1674 && REG_P (XEXP (x, 0)) && REG_P (XEXP (x, 1))
1675 && REGNO (XEXP (x, 0)) == REGNO (XEXP (x, 1))
1676 && ! FLOAT_MODE_P (GET_MODE (XEXP (x, 0)))
1677 && ! FLOAT_MODE_P (GET_MODE (XEXP (x, 1))))
1678 return true;
1679
1680 return CONSTANT_P (x);
1681 }
1682
1683 /* Scan pattern PAT of INSN and add an entry to the hash TABLE (set or
1684 expression one). */
1685
1686 static void
1687 hash_scan_set (rtx pat, rtx insn, struct hash_table *table)
1688 {
1689 rtx src = SET_SRC (pat);
1690 rtx dest = SET_DEST (pat);
1691 rtx note;
1692
1693 if (GET_CODE (src) == CALL)
1694 hash_scan_call (src, insn, table);
1695
1696 else if (REG_P (dest))
1697 {
1698 unsigned int regno = REGNO (dest);
1699 rtx tmp;
1700
1701 /* See if a REG_NOTE shows this equivalent to a simpler expression.
1702 This allows us to do a single GCSE pass and still eliminate
1703 redundant constants, addresses or other expressions that are
1704 constructed with multiple instructions. */
1705 note = find_reg_equal_equiv_note (insn);
1706 if (note != 0
1707 && (table->set_p
1708 ? gcse_constant_p (XEXP (note, 0))
1709 : want_to_gcse_p (XEXP (note, 0))))
1710 src = XEXP (note, 0), pat = gen_rtx_SET (VOIDmode, dest, src);
1711
1712 /* Only record sets of pseudo-regs in the hash table. */
1713 if (! table->set_p
1714 && regno >= FIRST_PSEUDO_REGISTER
1715 /* Don't GCSE something if we can't do a reg/reg copy. */
1716 && can_copy_p (GET_MODE (dest))
1717 /* GCSE commonly inserts instruction after the insn. We can't
1718 do that easily for EH_REGION notes so disable GCSE on these
1719 for now. */
1720 && !find_reg_note (insn, REG_EH_REGION, NULL_RTX)
1721 /* Is SET_SRC something we want to gcse? */
1722 && want_to_gcse_p (src)
1723 /* Don't CSE a nop. */
1724 && ! set_noop_p (pat)
1725 /* Don't GCSE if it has attached REG_EQUIV note.
1726 At this point this only function parameters should have
1727 REG_EQUIV notes and if the argument slot is used somewhere
1728 explicitly, it means address of parameter has been taken,
1729 so we should not extend the lifetime of the pseudo. */
1730 && (note == NULL_RTX || ! MEM_P (XEXP (note, 0))))
1731 {
1732 /* An expression is not anticipatable if its operands are
1733 modified before this insn or if this is not the only SET in
1734 this insn. The latter condition does not have to mean that
1735 SRC itself is not anticipatable, but we just will not be
1736 able to handle code motion of insns with multiple sets. */
1737 int antic_p = oprs_anticipatable_p (src, insn)
1738 && !multiple_sets (insn);
1739 /* An expression is not available if its operands are
1740 subsequently modified, including this insn. It's also not
1741 available if this is a branch, because we can't insert
1742 a set after the branch. */
1743 int avail_p = (oprs_available_p (src, insn)
1744 && ! JUMP_P (insn));
1745
1746 insert_expr_in_table (src, GET_MODE (dest), insn, antic_p, avail_p, table);
1747 }
1748
1749 /* Record sets for constant/copy propagation. */
1750 else if (table->set_p
1751 && regno >= FIRST_PSEUDO_REGISTER
1752 && ((REG_P (src)
1753 && REGNO (src) >= FIRST_PSEUDO_REGISTER
1754 && can_copy_p (GET_MODE (dest))
1755 && REGNO (src) != regno)
1756 || gcse_constant_p (src))
1757 /* A copy is not available if its src or dest is subsequently
1758 modified. Here we want to search from INSN+1 on, but
1759 oprs_available_p searches from INSN on. */
1760 && (insn == BB_END (BLOCK_FOR_INSN (insn))
1761 || ((tmp = next_nonnote_insn (insn)) != NULL_RTX
1762 && oprs_available_p (pat, tmp))))
1763 insert_set_in_table (pat, insn, table);
1764 }
1765 /* In case of store we want to consider the memory value as available in
1766 the REG stored in that memory. This makes it possible to remove
1767 redundant loads from due to stores to the same location. */
1768 else if (flag_gcse_las && REG_P (src) && MEM_P (dest))
1769 {
1770 unsigned int regno = REGNO (src);
1771
1772 /* Do not do this for constant/copy propagation. */
1773 if (! table->set_p
1774 /* Only record sets of pseudo-regs in the hash table. */
1775 && regno >= FIRST_PSEUDO_REGISTER
1776 /* Don't GCSE something if we can't do a reg/reg copy. */
1777 && can_copy_p (GET_MODE (src))
1778 /* GCSE commonly inserts instruction after the insn. We can't
1779 do that easily for EH_REGION notes so disable GCSE on these
1780 for now. */
1781 && ! find_reg_note (insn, REG_EH_REGION, NULL_RTX)
1782 /* Is SET_DEST something we want to gcse? */
1783 && want_to_gcse_p (dest)
1784 /* Don't CSE a nop. */
1785 && ! set_noop_p (pat)
1786 /* Don't GCSE if it has attached REG_EQUIV note.
1787 At this point this only function parameters should have
1788 REG_EQUIV notes and if the argument slot is used somewhere
1789 explicitly, it means address of parameter has been taken,
1790 so we should not extend the lifetime of the pseudo. */
1791 && ((note = find_reg_note (insn, REG_EQUIV, NULL_RTX)) == 0
1792 || ! MEM_P (XEXP (note, 0))))
1793 {
1794 /* Stores are never anticipatable. */
1795 int antic_p = 0;
1796 /* An expression is not available if its operands are
1797 subsequently modified, including this insn. It's also not
1798 available if this is a branch, because we can't insert
1799 a set after the branch. */
1800 int avail_p = oprs_available_p (dest, insn)
1801 && ! JUMP_P (insn);
1802
1803 /* Record the memory expression (DEST) in the hash table. */
1804 insert_expr_in_table (dest, GET_MODE (dest), insn,
1805 antic_p, avail_p, table);
1806 }
1807 }
1808 }
1809
1810 static void
1811 hash_scan_clobber (rtx x ATTRIBUTE_UNUSED, rtx insn ATTRIBUTE_UNUSED,
1812 struct hash_table *table ATTRIBUTE_UNUSED)
1813 {
1814 /* Currently nothing to do. */
1815 }
1816
1817 static void
1818 hash_scan_call (rtx x ATTRIBUTE_UNUSED, rtx insn ATTRIBUTE_UNUSED,
1819 struct hash_table *table ATTRIBUTE_UNUSED)
1820 {
1821 /* Currently nothing to do. */
1822 }
1823
1824 /* Process INSN and add hash table entries as appropriate.
1825
1826 Only available expressions that set a single pseudo-reg are recorded.
1827
1828 Single sets in a PARALLEL could be handled, but it's an extra complication
1829 that isn't dealt with right now. The trick is handling the CLOBBERs that
1830 are also in the PARALLEL. Later.
1831
1832 If SET_P is nonzero, this is for the assignment hash table,
1833 otherwise it is for the expression hash table.
1834 If IN_LIBCALL_BLOCK nonzero, we are in a libcall block, and should
1835 not record any expressions. */
1836
1837 static void
1838 hash_scan_insn (rtx insn, struct hash_table *table, int in_libcall_block)
1839 {
1840 rtx pat = PATTERN (insn);
1841 int i;
1842
1843 if (in_libcall_block)
1844 return;
1845
1846 /* Pick out the sets of INSN and for other forms of instructions record
1847 what's been modified. */
1848
1849 if (GET_CODE (pat) == SET)
1850 hash_scan_set (pat, insn, table);
1851 else if (GET_CODE (pat) == PARALLEL)
1852 for (i = 0; i < XVECLEN (pat, 0); i++)
1853 {
1854 rtx x = XVECEXP (pat, 0, i);
1855
1856 if (GET_CODE (x) == SET)
1857 hash_scan_set (x, insn, table);
1858 else if (GET_CODE (x) == CLOBBER)
1859 hash_scan_clobber (x, insn, table);
1860 else if (GET_CODE (x) == CALL)
1861 hash_scan_call (x, insn, table);
1862 }
1863
1864 else if (GET_CODE (pat) == CLOBBER)
1865 hash_scan_clobber (pat, insn, table);
1866 else if (GET_CODE (pat) == CALL)
1867 hash_scan_call (pat, insn, table);
1868 }
1869
1870 static void
1871 dump_hash_table (FILE *file, const char *name, struct hash_table *table)
1872 {
1873 int i;
1874 /* Flattened out table, so it's printed in proper order. */
1875 struct expr **flat_table;
1876 unsigned int *hash_val;
1877 struct expr *expr;
1878
1879 flat_table = xcalloc (table->n_elems, sizeof (struct expr *));
1880 hash_val = xmalloc (table->n_elems * sizeof (unsigned int));
1881
1882 for (i = 0; i < (int) table->size; i++)
1883 for (expr = table->table[i]; expr != NULL; expr = expr->next_same_hash)
1884 {
1885 flat_table[expr->bitmap_index] = expr;
1886 hash_val[expr->bitmap_index] = i;
1887 }
1888
1889 fprintf (file, "%s hash table (%d buckets, %d entries)\n",
1890 name, table->size, table->n_elems);
1891
1892 for (i = 0; i < (int) table->n_elems; i++)
1893 if (flat_table[i] != 0)
1894 {
1895 expr = flat_table[i];
1896 fprintf (file, "Index %d (hash value %d)\n ",
1897 expr->bitmap_index, hash_val[i]);
1898 print_rtl (file, expr->expr);
1899 fprintf (file, "\n");
1900 }
1901
1902 fprintf (file, "\n");
1903
1904 free (flat_table);
1905 free (hash_val);
1906 }
1907
1908 /* Record register first/last/block set information for REGNO in INSN.
1909
1910 first_set records the first place in the block where the register
1911 is set and is used to compute "anticipatability".
1912
1913 last_set records the last place in the block where the register
1914 is set and is used to compute "availability".
1915
1916 last_bb records the block for which first_set and last_set are
1917 valid, as a quick test to invalidate them.
1918
1919 reg_set_in_block records whether the register is set in the block
1920 and is used to compute "transparency". */
1921
1922 static void
1923 record_last_reg_set_info (rtx insn, int regno)
1924 {
1925 struct reg_avail_info *info = &reg_avail_info[regno];
1926 int cuid = INSN_CUID (insn);
1927
1928 info->last_set = cuid;
1929 if (info->last_bb != current_bb)
1930 {
1931 info->last_bb = current_bb;
1932 info->first_set = cuid;
1933 SET_BIT (reg_set_in_block[current_bb->index], regno);
1934 }
1935 }
1936
1937
1938 /* Record all of the canonicalized MEMs of record_last_mem_set_info's insn.
1939 Note we store a pair of elements in the list, so they have to be
1940 taken off pairwise. */
1941
1942 static void
1943 canon_list_insert (rtx dest ATTRIBUTE_UNUSED, rtx unused1 ATTRIBUTE_UNUSED,
1944 void * v_insn)
1945 {
1946 rtx dest_addr, insn;
1947 int bb;
1948
1949 while (GET_CODE (dest) == SUBREG
1950 || GET_CODE (dest) == ZERO_EXTRACT
1951 || GET_CODE (dest) == STRICT_LOW_PART)
1952 dest = XEXP (dest, 0);
1953
1954 /* If DEST is not a MEM, then it will not conflict with a load. Note
1955 that function calls are assumed to clobber memory, but are handled
1956 elsewhere. */
1957
1958 if (! MEM_P (dest))
1959 return;
1960
1961 dest_addr = get_addr (XEXP (dest, 0));
1962 dest_addr = canon_rtx (dest_addr);
1963 insn = (rtx) v_insn;
1964 bb = BLOCK_NUM (insn);
1965
1966 canon_modify_mem_list[bb] =
1967 alloc_EXPR_LIST (VOIDmode, dest_addr, canon_modify_mem_list[bb]);
1968 canon_modify_mem_list[bb] =
1969 alloc_EXPR_LIST (VOIDmode, dest, canon_modify_mem_list[bb]);
1970 }
1971
1972 /* Record memory modification information for INSN. We do not actually care
1973 about the memory location(s) that are set, or even how they are set (consider
1974 a CALL_INSN). We merely need to record which insns modify memory. */
1975
1976 static void
1977 record_last_mem_set_info (rtx insn)
1978 {
1979 int bb = BLOCK_NUM (insn);
1980
1981 /* load_killed_in_block_p will handle the case of calls clobbering
1982 everything. */
1983 modify_mem_list[bb] = alloc_INSN_LIST (insn, modify_mem_list[bb]);
1984 bitmap_set_bit (modify_mem_list_set, bb);
1985
1986 if (CALL_P (insn))
1987 {
1988 /* Note that traversals of this loop (other than for free-ing)
1989 will break after encountering a CALL_INSN. So, there's no
1990 need to insert a pair of items, as canon_list_insert does. */
1991 canon_modify_mem_list[bb] =
1992 alloc_INSN_LIST (insn, canon_modify_mem_list[bb]);
1993 bitmap_set_bit (blocks_with_calls, bb);
1994 }
1995 else
1996 note_stores (PATTERN (insn), canon_list_insert, (void*) insn);
1997 }
1998
1999 /* Called from compute_hash_table via note_stores to handle one
2000 SET or CLOBBER in an insn. DATA is really the instruction in which
2001 the SET is taking place. */
2002
2003 static void
2004 record_last_set_info (rtx dest, rtx setter ATTRIBUTE_UNUSED, void *data)
2005 {
2006 rtx last_set_insn = (rtx) data;
2007
2008 if (GET_CODE (dest) == SUBREG)
2009 dest = SUBREG_REG (dest);
2010
2011 if (REG_P (dest))
2012 record_last_reg_set_info (last_set_insn, REGNO (dest));
2013 else if (MEM_P (dest)
2014 /* Ignore pushes, they clobber nothing. */
2015 && ! push_operand (dest, GET_MODE (dest)))
2016 record_last_mem_set_info (last_set_insn);
2017 }
2018
2019 /* Top level function to create an expression or assignment hash table.
2020
2021 Expression entries are placed in the hash table if
2022 - they are of the form (set (pseudo-reg) src),
2023 - src is something we want to perform GCSE on,
2024 - none of the operands are subsequently modified in the block
2025
2026 Assignment entries are placed in the hash table if
2027 - they are of the form (set (pseudo-reg) src),
2028 - src is something we want to perform const/copy propagation on,
2029 - none of the operands or target are subsequently modified in the block
2030
2031 Currently src must be a pseudo-reg or a const_int.
2032
2033 TABLE is the table computed. */
2034
2035 static void
2036 compute_hash_table_work (struct hash_table *table)
2037 {
2038 unsigned int i;
2039
2040 /* While we compute the hash table we also compute a bit array of which
2041 registers are set in which blocks.
2042 ??? This isn't needed during const/copy propagation, but it's cheap to
2043 compute. Later. */
2044 sbitmap_vector_zero (reg_set_in_block, last_basic_block);
2045
2046 /* re-Cache any INSN_LIST nodes we have allocated. */
2047 clear_modify_mem_tables ();
2048 /* Some working arrays used to track first and last set in each block. */
2049 reg_avail_info = gmalloc (max_gcse_regno * sizeof (struct reg_avail_info));
2050
2051 for (i = 0; i < max_gcse_regno; ++i)
2052 reg_avail_info[i].last_bb = NULL;
2053
2054 FOR_EACH_BB (current_bb)
2055 {
2056 rtx insn;
2057 unsigned int regno;
2058 int in_libcall_block;
2059
2060 /* First pass over the instructions records information used to
2061 determine when registers and memory are first and last set.
2062 ??? hard-reg reg_set_in_block computation
2063 could be moved to compute_sets since they currently don't change. */
2064
2065 FOR_BB_INSNS (current_bb, insn)
2066 {
2067 if (! INSN_P (insn))
2068 continue;
2069
2070 if (CALL_P (insn))
2071 {
2072 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
2073 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno))
2074 record_last_reg_set_info (insn, regno);
2075
2076 mark_call (insn);
2077 }
2078
2079 note_stores (PATTERN (insn), record_last_set_info, insn);
2080 }
2081
2082 /* Insert implicit sets in the hash table. */
2083 if (table->set_p
2084 && implicit_sets[current_bb->index] != NULL_RTX)
2085 hash_scan_set (implicit_sets[current_bb->index],
2086 BB_HEAD (current_bb), table);
2087
2088 /* The next pass builds the hash table. */
2089 in_libcall_block = 0;
2090 FOR_BB_INSNS (current_bb, insn)
2091 if (INSN_P (insn))
2092 {
2093 if (find_reg_note (insn, REG_LIBCALL, NULL_RTX))
2094 in_libcall_block = 1;
2095 else if (table->set_p && find_reg_note (insn, REG_RETVAL, NULL_RTX))
2096 in_libcall_block = 0;
2097 hash_scan_insn (insn, table, in_libcall_block);
2098 if (!table->set_p && find_reg_note (insn, REG_RETVAL, NULL_RTX))
2099 in_libcall_block = 0;
2100 }
2101 }
2102
2103 free (reg_avail_info);
2104 reg_avail_info = NULL;
2105 }
2106
2107 /* Allocate space for the set/expr hash TABLE.
2108 N_INSNS is the number of instructions in the function.
2109 It is used to determine the number of buckets to use.
2110 SET_P determines whether set or expression table will
2111 be created. */
2112
2113 static void
2114 alloc_hash_table (int n_insns, struct hash_table *table, int set_p)
2115 {
2116 int n;
2117
2118 table->size = n_insns / 4;
2119 if (table->size < 11)
2120 table->size = 11;
2121
2122 /* Attempt to maintain efficient use of hash table.
2123 Making it an odd number is simplest for now.
2124 ??? Later take some measurements. */
2125 table->size |= 1;
2126 n = table->size * sizeof (struct expr *);
2127 table->table = gmalloc (n);
2128 table->set_p = set_p;
2129 }
2130
2131 /* Free things allocated by alloc_hash_table. */
2132
2133 static void
2134 free_hash_table (struct hash_table *table)
2135 {
2136 free (table->table);
2137 }
2138
2139 /* Compute the hash TABLE for doing copy/const propagation or
2140 expression hash table. */
2141
2142 static void
2143 compute_hash_table (struct hash_table *table)
2144 {
2145 /* Initialize count of number of entries in hash table. */
2146 table->n_elems = 0;
2147 memset (table->table, 0, table->size * sizeof (struct expr *));
2148
2149 compute_hash_table_work (table);
2150 }
2151 \f
2152 /* Expression tracking support. */
2153
2154 /* Lookup REGNO in the set TABLE. The result is a pointer to the
2155 table entry, or NULL if not found. */
2156
2157 static struct expr *
2158 lookup_set (unsigned int regno, struct hash_table *table)
2159 {
2160 unsigned int hash = hash_set (regno, table->size);
2161 struct expr *expr;
2162
2163 expr = table->table[hash];
2164
2165 while (expr && REGNO (SET_DEST (expr->expr)) != regno)
2166 expr = expr->next_same_hash;
2167
2168 return expr;
2169 }
2170
2171 /* Return the next entry for REGNO in list EXPR. */
2172
2173 static struct expr *
2174 next_set (unsigned int regno, struct expr *expr)
2175 {
2176 do
2177 expr = expr->next_same_hash;
2178 while (expr && REGNO (SET_DEST (expr->expr)) != regno);
2179
2180 return expr;
2181 }
2182
2183 /* Like free_INSN_LIST_list or free_EXPR_LIST_list, except that the node
2184 types may be mixed. */
2185
2186 static void
2187 free_insn_expr_list_list (rtx *listp)
2188 {
2189 rtx list, next;
2190
2191 for (list = *listp; list ; list = next)
2192 {
2193 next = XEXP (list, 1);
2194 if (GET_CODE (list) == EXPR_LIST)
2195 free_EXPR_LIST_node (list);
2196 else
2197 free_INSN_LIST_node (list);
2198 }
2199
2200 *listp = NULL;
2201 }
2202
2203 /* Clear canon_modify_mem_list and modify_mem_list tables. */
2204 static void
2205 clear_modify_mem_tables (void)
2206 {
2207 unsigned i;
2208 bitmap_iterator bi;
2209
2210 EXECUTE_IF_SET_IN_BITMAP (modify_mem_list_set, 0, i, bi)
2211 {
2212 free_INSN_LIST_list (modify_mem_list + i);
2213 free_insn_expr_list_list (canon_modify_mem_list + i);
2214 }
2215 bitmap_clear (modify_mem_list_set);
2216 bitmap_clear (blocks_with_calls);
2217 }
2218
2219 /* Release memory used by modify_mem_list_set. */
2220
2221 static void
2222 free_modify_mem_tables (void)
2223 {
2224 clear_modify_mem_tables ();
2225 free (modify_mem_list);
2226 free (canon_modify_mem_list);
2227 modify_mem_list = 0;
2228 canon_modify_mem_list = 0;
2229 }
2230
2231 /* Reset tables used to keep track of what's still available [since the
2232 start of the block]. */
2233
2234 static void
2235 reset_opr_set_tables (void)
2236 {
2237 /* Maintain a bitmap of which regs have been set since beginning of
2238 the block. */
2239 CLEAR_REG_SET (reg_set_bitmap);
2240
2241 /* Also keep a record of the last instruction to modify memory.
2242 For now this is very trivial, we only record whether any memory
2243 location has been modified. */
2244 clear_modify_mem_tables ();
2245 }
2246
2247 /* Return nonzero if the operands of X are not set before INSN in
2248 INSN's basic block. */
2249
2250 static int
2251 oprs_not_set_p (rtx x, rtx insn)
2252 {
2253 int i, j;
2254 enum rtx_code code;
2255 const char *fmt;
2256
2257 if (x == 0)
2258 return 1;
2259
2260 code = GET_CODE (x);
2261 switch (code)
2262 {
2263 case PC:
2264 case CC0:
2265 case CONST:
2266 case CONST_INT:
2267 case CONST_DOUBLE:
2268 case CONST_VECTOR:
2269 case SYMBOL_REF:
2270 case LABEL_REF:
2271 case ADDR_VEC:
2272 case ADDR_DIFF_VEC:
2273 return 1;
2274
2275 case MEM:
2276 if (load_killed_in_block_p (BLOCK_FOR_INSN (insn),
2277 INSN_CUID (insn), x, 0))
2278 return 0;
2279 else
2280 return oprs_not_set_p (XEXP (x, 0), insn);
2281
2282 case REG:
2283 return ! REGNO_REG_SET_P (reg_set_bitmap, REGNO (x));
2284
2285 default:
2286 break;
2287 }
2288
2289 for (i = GET_RTX_LENGTH (code) - 1, fmt = GET_RTX_FORMAT (code); i >= 0; i--)
2290 {
2291 if (fmt[i] == 'e')
2292 {
2293 /* If we are about to do the last recursive call
2294 needed at this level, change it into iteration.
2295 This function is called enough to be worth it. */
2296 if (i == 0)
2297 return oprs_not_set_p (XEXP (x, i), insn);
2298
2299 if (! oprs_not_set_p (XEXP (x, i), insn))
2300 return 0;
2301 }
2302 else if (fmt[i] == 'E')
2303 for (j = 0; j < XVECLEN (x, i); j++)
2304 if (! oprs_not_set_p (XVECEXP (x, i, j), insn))
2305 return 0;
2306 }
2307
2308 return 1;
2309 }
2310
2311 /* Mark things set by a CALL. */
2312
2313 static void
2314 mark_call (rtx insn)
2315 {
2316 if (! CONST_OR_PURE_CALL_P (insn))
2317 record_last_mem_set_info (insn);
2318 }
2319
2320 /* Mark things set by a SET. */
2321
2322 static void
2323 mark_set (rtx pat, rtx insn)
2324 {
2325 rtx dest = SET_DEST (pat);
2326
2327 while (GET_CODE (dest) == SUBREG
2328 || GET_CODE (dest) == ZERO_EXTRACT
2329 || GET_CODE (dest) == STRICT_LOW_PART)
2330 dest = XEXP (dest, 0);
2331
2332 if (REG_P (dest))
2333 SET_REGNO_REG_SET (reg_set_bitmap, REGNO (dest));
2334 else if (MEM_P (dest))
2335 record_last_mem_set_info (insn);
2336
2337 if (GET_CODE (SET_SRC (pat)) == CALL)
2338 mark_call (insn);
2339 }
2340
2341 /* Record things set by a CLOBBER. */
2342
2343 static void
2344 mark_clobber (rtx pat, rtx insn)
2345 {
2346 rtx clob = XEXP (pat, 0);
2347
2348 while (GET_CODE (clob) == SUBREG || GET_CODE (clob) == STRICT_LOW_PART)
2349 clob = XEXP (clob, 0);
2350
2351 if (REG_P (clob))
2352 SET_REGNO_REG_SET (reg_set_bitmap, REGNO (clob));
2353 else
2354 record_last_mem_set_info (insn);
2355 }
2356
2357 /* Record things set by INSN.
2358 This data is used by oprs_not_set_p. */
2359
2360 static void
2361 mark_oprs_set (rtx insn)
2362 {
2363 rtx pat = PATTERN (insn);
2364 int i;
2365
2366 if (GET_CODE (pat) == SET)
2367 mark_set (pat, insn);
2368 else if (GET_CODE (pat) == PARALLEL)
2369 for (i = 0; i < XVECLEN (pat, 0); i++)
2370 {
2371 rtx x = XVECEXP (pat, 0, i);
2372
2373 if (GET_CODE (x) == SET)
2374 mark_set (x, insn);
2375 else if (GET_CODE (x) == CLOBBER)
2376 mark_clobber (x, insn);
2377 else if (GET_CODE (x) == CALL)
2378 mark_call (insn);
2379 }
2380
2381 else if (GET_CODE (pat) == CLOBBER)
2382 mark_clobber (pat, insn);
2383 else if (GET_CODE (pat) == CALL)
2384 mark_call (insn);
2385 }
2386
2387 \f
2388 /* Compute copy/constant propagation working variables. */
2389
2390 /* Local properties of assignments. */
2391 static sbitmap *cprop_pavloc;
2392 static sbitmap *cprop_absaltered;
2393
2394 /* Global properties of assignments (computed from the local properties). */
2395 static sbitmap *cprop_avin;
2396 static sbitmap *cprop_avout;
2397
2398 /* Allocate vars used for copy/const propagation. N_BLOCKS is the number of
2399 basic blocks. N_SETS is the number of sets. */
2400
2401 static void
2402 alloc_cprop_mem (int n_blocks, int n_sets)
2403 {
2404 cprop_pavloc = sbitmap_vector_alloc (n_blocks, n_sets);
2405 cprop_absaltered = sbitmap_vector_alloc (n_blocks, n_sets);
2406
2407 cprop_avin = sbitmap_vector_alloc (n_blocks, n_sets);
2408 cprop_avout = sbitmap_vector_alloc (n_blocks, n_sets);
2409 }
2410
2411 /* Free vars used by copy/const propagation. */
2412
2413 static void
2414 free_cprop_mem (void)
2415 {
2416 sbitmap_vector_free (cprop_pavloc);
2417 sbitmap_vector_free (cprop_absaltered);
2418 sbitmap_vector_free (cprop_avin);
2419 sbitmap_vector_free (cprop_avout);
2420 }
2421
2422 /* For each block, compute whether X is transparent. X is either an
2423 expression or an assignment [though we don't care which, for this context
2424 an assignment is treated as an expression]. For each block where an
2425 element of X is modified, set (SET_P == 1) or reset (SET_P == 0) the INDX
2426 bit in BMAP. */
2427
2428 static void
2429 compute_transp (rtx x, int indx, sbitmap *bmap, int set_p)
2430 {
2431 int i, j;
2432 basic_block bb;
2433 enum rtx_code code;
2434 reg_set *r;
2435 const char *fmt;
2436
2437 /* repeat is used to turn tail-recursion into iteration since GCC
2438 can't do it when there's no return value. */
2439 repeat:
2440
2441 if (x == 0)
2442 return;
2443
2444 code = GET_CODE (x);
2445 switch (code)
2446 {
2447 case REG:
2448 if (set_p)
2449 {
2450 if (REGNO (x) < FIRST_PSEUDO_REGISTER)
2451 {
2452 FOR_EACH_BB (bb)
2453 if (TEST_BIT (reg_set_in_block[bb->index], REGNO (x)))
2454 SET_BIT (bmap[bb->index], indx);
2455 }
2456 else
2457 {
2458 for (r = reg_set_table[REGNO (x)]; r != NULL; r = r->next)
2459 SET_BIT (bmap[r->bb_index], indx);
2460 }
2461 }
2462 else
2463 {
2464 if (REGNO (x) < FIRST_PSEUDO_REGISTER)
2465 {
2466 FOR_EACH_BB (bb)
2467 if (TEST_BIT (reg_set_in_block[bb->index], REGNO (x)))
2468 RESET_BIT (bmap[bb->index], indx);
2469 }
2470 else
2471 {
2472 for (r = reg_set_table[REGNO (x)]; r != NULL; r = r->next)
2473 RESET_BIT (bmap[r->bb_index], indx);
2474 }
2475 }
2476
2477 return;
2478
2479 case MEM:
2480 if (! MEM_READONLY_P (x))
2481 {
2482 bitmap_iterator bi;
2483 unsigned bb_index;
2484
2485 /* First handle all the blocks with calls. We don't need to
2486 do any list walking for them. */
2487 EXECUTE_IF_SET_IN_BITMAP (blocks_with_calls, 0, bb_index, bi)
2488 {
2489 if (set_p)
2490 SET_BIT (bmap[bb_index], indx);
2491 else
2492 RESET_BIT (bmap[bb_index], indx);
2493 }
2494
2495 /* Now iterate over the blocks which have memory modifications
2496 but which do not have any calls. */
2497 EXECUTE_IF_AND_COMPL_IN_BITMAP (modify_mem_list_set,
2498 blocks_with_calls,
2499 0, bb_index, bi)
2500 {
2501 rtx list_entry = canon_modify_mem_list[bb_index];
2502
2503 while (list_entry)
2504 {
2505 rtx dest, dest_addr;
2506
2507 /* LIST_ENTRY must be an INSN of some kind that sets memory.
2508 Examine each hunk of memory that is modified. */
2509
2510 dest = XEXP (list_entry, 0);
2511 list_entry = XEXP (list_entry, 1);
2512 dest_addr = XEXP (list_entry, 0);
2513
2514 if (canon_true_dependence (dest, GET_MODE (dest), dest_addr,
2515 x, rtx_addr_varies_p))
2516 {
2517 if (set_p)
2518 SET_BIT (bmap[bb_index], indx);
2519 else
2520 RESET_BIT (bmap[bb_index], indx);
2521 break;
2522 }
2523 list_entry = XEXP (list_entry, 1);
2524 }
2525 }
2526 }
2527
2528 x = XEXP (x, 0);
2529 goto repeat;
2530
2531 case PC:
2532 case CC0: /*FIXME*/
2533 case CONST:
2534 case CONST_INT:
2535 case CONST_DOUBLE:
2536 case CONST_VECTOR:
2537 case SYMBOL_REF:
2538 case LABEL_REF:
2539 case ADDR_VEC:
2540 case ADDR_DIFF_VEC:
2541 return;
2542
2543 default:
2544 break;
2545 }
2546
2547 for (i = GET_RTX_LENGTH (code) - 1, fmt = GET_RTX_FORMAT (code); i >= 0; i--)
2548 {
2549 if (fmt[i] == 'e')
2550 {
2551 /* If we are about to do the last recursive call
2552 needed at this level, change it into iteration.
2553 This function is called enough to be worth it. */
2554 if (i == 0)
2555 {
2556 x = XEXP (x, i);
2557 goto repeat;
2558 }
2559
2560 compute_transp (XEXP (x, i), indx, bmap, set_p);
2561 }
2562 else if (fmt[i] == 'E')
2563 for (j = 0; j < XVECLEN (x, i); j++)
2564 compute_transp (XVECEXP (x, i, j), indx, bmap, set_p);
2565 }
2566 }
2567
2568 /* Top level routine to do the dataflow analysis needed by copy/const
2569 propagation. */
2570
2571 static void
2572 compute_cprop_data (void)
2573 {
2574 compute_local_properties (cprop_absaltered, cprop_pavloc, NULL, &set_hash_table);
2575 compute_available (cprop_pavloc, cprop_absaltered,
2576 cprop_avout, cprop_avin);
2577 }
2578 \f
2579 /* Copy/constant propagation. */
2580
2581 /* Maximum number of register uses in an insn that we handle. */
2582 #define MAX_USES 8
2583
2584 /* Table of uses found in an insn.
2585 Allocated statically to avoid alloc/free complexity and overhead. */
2586 static struct reg_use reg_use_table[MAX_USES];
2587
2588 /* Index into `reg_use_table' while building it. */
2589 static int reg_use_count;
2590
2591 /* Set up a list of register numbers used in INSN. The found uses are stored
2592 in `reg_use_table'. `reg_use_count' is initialized to zero before entry,
2593 and contains the number of uses in the table upon exit.
2594
2595 ??? If a register appears multiple times we will record it multiple times.
2596 This doesn't hurt anything but it will slow things down. */
2597
2598 static void
2599 find_used_regs (rtx *xptr, void *data ATTRIBUTE_UNUSED)
2600 {
2601 int i, j;
2602 enum rtx_code code;
2603 const char *fmt;
2604 rtx x = *xptr;
2605
2606 /* repeat is used to turn tail-recursion into iteration since GCC
2607 can't do it when there's no return value. */
2608 repeat:
2609 if (x == 0)
2610 return;
2611
2612 code = GET_CODE (x);
2613 if (REG_P (x))
2614 {
2615 if (reg_use_count == MAX_USES)
2616 return;
2617
2618 reg_use_table[reg_use_count].reg_rtx = x;
2619 reg_use_count++;
2620 }
2621
2622 /* Recursively scan the operands of this expression. */
2623
2624 for (i = GET_RTX_LENGTH (code) - 1, fmt = GET_RTX_FORMAT (code); i >= 0; i--)
2625 {
2626 if (fmt[i] == 'e')
2627 {
2628 /* If we are about to do the last recursive call
2629 needed at this level, change it into iteration.
2630 This function is called enough to be worth it. */
2631 if (i == 0)
2632 {
2633 x = XEXP (x, 0);
2634 goto repeat;
2635 }
2636
2637 find_used_regs (&XEXP (x, i), data);
2638 }
2639 else if (fmt[i] == 'E')
2640 for (j = 0; j < XVECLEN (x, i); j++)
2641 find_used_regs (&XVECEXP (x, i, j), data);
2642 }
2643 }
2644
2645 /* Try to replace all non-SET_DEST occurrences of FROM in INSN with TO.
2646 Returns nonzero is successful. */
2647
2648 static int
2649 try_replace_reg (rtx from, rtx to, rtx insn)
2650 {
2651 rtx note = find_reg_equal_equiv_note (insn);
2652 rtx src = 0;
2653 int success = 0;
2654 rtx set = single_set (insn);
2655
2656 /* Usually we substitute easy stuff, so we won't copy everything.
2657 We however need to take care to not duplicate non-trivial CONST
2658 expressions. */
2659 to = copy_rtx (to);
2660
2661 validate_replace_src_group (from, to, insn);
2662 if (num_changes_pending () && apply_change_group ())
2663 success = 1;
2664
2665 /* Try to simplify SET_SRC if we have substituted a constant. */
2666 if (success && set && CONSTANT_P (to))
2667 {
2668 src = simplify_rtx (SET_SRC (set));
2669
2670 if (src)
2671 validate_change (insn, &SET_SRC (set), src, 0);
2672 }
2673
2674 /* If there is already a REG_EQUAL note, update the expression in it
2675 with our replacement. */
2676 if (note != 0 && REG_NOTE_KIND (note) == REG_EQUAL)
2677 set_unique_reg_note (insn, REG_EQUAL,
2678 simplify_replace_rtx (XEXP (note, 0), from, to));
2679 if (!success && set && reg_mentioned_p (from, SET_SRC (set)))
2680 {
2681 /* If above failed and this is a single set, try to simplify the source of
2682 the set given our substitution. We could perhaps try this for multiple
2683 SETs, but it probably won't buy us anything. */
2684 src = simplify_replace_rtx (SET_SRC (set), from, to);
2685
2686 if (!rtx_equal_p (src, SET_SRC (set))
2687 && validate_change (insn, &SET_SRC (set), src, 0))
2688 success = 1;
2689
2690 /* If we've failed to do replacement, have a single SET, don't already
2691 have a note, and have no special SET, add a REG_EQUAL note to not
2692 lose information. */
2693 if (!success && note == 0 && set != 0
2694 && GET_CODE (SET_DEST (set)) != ZERO_EXTRACT
2695 && GET_CODE (SET_DEST (set)) != STRICT_LOW_PART)
2696 note = set_unique_reg_note (insn, REG_EQUAL, copy_rtx (src));
2697 }
2698
2699 /* REG_EQUAL may get simplified into register.
2700 We don't allow that. Remove that note. This code ought
2701 not to happen, because previous code ought to synthesize
2702 reg-reg move, but be on the safe side. */
2703 if (note && REG_NOTE_KIND (note) == REG_EQUAL && REG_P (XEXP (note, 0)))
2704 remove_note (insn, note);
2705
2706 return success;
2707 }
2708
2709 /* Find a set of REGNOs that are available on entry to INSN's block. Returns
2710 NULL no such set is found. */
2711
2712 static struct expr *
2713 find_avail_set (int regno, rtx insn)
2714 {
2715 /* SET1 contains the last set found that can be returned to the caller for
2716 use in a substitution. */
2717 struct expr *set1 = 0;
2718
2719 /* Loops are not possible here. To get a loop we would need two sets
2720 available at the start of the block containing INSN. i.e. we would
2721 need two sets like this available at the start of the block:
2722
2723 (set (reg X) (reg Y))
2724 (set (reg Y) (reg X))
2725
2726 This can not happen since the set of (reg Y) would have killed the
2727 set of (reg X) making it unavailable at the start of this block. */
2728 while (1)
2729 {
2730 rtx src;
2731 struct expr *set = lookup_set (regno, &set_hash_table);
2732
2733 /* Find a set that is available at the start of the block
2734 which contains INSN. */
2735 while (set)
2736 {
2737 if (TEST_BIT (cprop_avin[BLOCK_NUM (insn)], set->bitmap_index))
2738 break;
2739 set = next_set (regno, set);
2740 }
2741
2742 /* If no available set was found we've reached the end of the
2743 (possibly empty) copy chain. */
2744 if (set == 0)
2745 break;
2746
2747 gcc_assert (GET_CODE (set->expr) == SET);
2748
2749 src = SET_SRC (set->expr);
2750
2751 /* We know the set is available.
2752 Now check that SRC is ANTLOC (i.e. none of the source operands
2753 have changed since the start of the block).
2754
2755 If the source operand changed, we may still use it for the next
2756 iteration of this loop, but we may not use it for substitutions. */
2757
2758 if (gcse_constant_p (src) || oprs_not_set_p (src, insn))
2759 set1 = set;
2760
2761 /* If the source of the set is anything except a register, then
2762 we have reached the end of the copy chain. */
2763 if (! REG_P (src))
2764 break;
2765
2766 /* Follow the copy chain, i.e. start another iteration of the loop
2767 and see if we have an available copy into SRC. */
2768 regno = REGNO (src);
2769 }
2770
2771 /* SET1 holds the last set that was available and anticipatable at
2772 INSN. */
2773 return set1;
2774 }
2775
2776 /* Subroutine of cprop_insn that tries to propagate constants into
2777 JUMP_INSNS. JUMP must be a conditional jump. If SETCC is non-NULL
2778 it is the instruction that immediately precedes JUMP, and must be a
2779 single SET of a register. FROM is what we will try to replace,
2780 SRC is the constant we will try to substitute for it. Returns nonzero
2781 if a change was made. */
2782
2783 static int
2784 cprop_jump (basic_block bb, rtx setcc, rtx jump, rtx from, rtx src)
2785 {
2786 rtx new, set_src, note_src;
2787 rtx set = pc_set (jump);
2788 rtx note = find_reg_equal_equiv_note (jump);
2789
2790 if (note)
2791 {
2792 note_src = XEXP (note, 0);
2793 if (GET_CODE (note_src) == EXPR_LIST)
2794 note_src = NULL_RTX;
2795 }
2796 else note_src = NULL_RTX;
2797
2798 /* Prefer REG_EQUAL notes except those containing EXPR_LISTs. */
2799 set_src = note_src ? note_src : SET_SRC (set);
2800
2801 /* First substitute the SETCC condition into the JUMP instruction,
2802 then substitute that given values into this expanded JUMP. */
2803 if (setcc != NULL_RTX
2804 && !modified_between_p (from, setcc, jump)
2805 && !modified_between_p (src, setcc, jump))
2806 {
2807 rtx setcc_src;
2808 rtx setcc_set = single_set (setcc);
2809 rtx setcc_note = find_reg_equal_equiv_note (setcc);
2810 setcc_src = (setcc_note && GET_CODE (XEXP (setcc_note, 0)) != EXPR_LIST)
2811 ? XEXP (setcc_note, 0) : SET_SRC (setcc_set);
2812 set_src = simplify_replace_rtx (set_src, SET_DEST (setcc_set),
2813 setcc_src);
2814 }
2815 else
2816 setcc = NULL_RTX;
2817
2818 new = simplify_replace_rtx (set_src, from, src);
2819
2820 /* If no simplification can be made, then try the next register. */
2821 if (rtx_equal_p (new, SET_SRC (set)))
2822 return 0;
2823
2824 /* If this is now a no-op delete it, otherwise this must be a valid insn. */
2825 if (new == pc_rtx)
2826 delete_insn (jump);
2827 else
2828 {
2829 /* Ensure the value computed inside the jump insn to be equivalent
2830 to one computed by setcc. */
2831 if (setcc && modified_in_p (new, setcc))
2832 return 0;
2833 if (! validate_change (jump, &SET_SRC (set), new, 0))
2834 {
2835 /* When (some) constants are not valid in a comparison, and there
2836 are two registers to be replaced by constants before the entire
2837 comparison can be folded into a constant, we need to keep
2838 intermediate information in REG_EQUAL notes. For targets with
2839 separate compare insns, such notes are added by try_replace_reg.
2840 When we have a combined compare-and-branch instruction, however,
2841 we need to attach a note to the branch itself to make this
2842 optimization work. */
2843
2844 if (!rtx_equal_p (new, note_src))
2845 set_unique_reg_note (jump, REG_EQUAL, copy_rtx (new));
2846 return 0;
2847 }
2848
2849 /* Remove REG_EQUAL note after simplification. */
2850 if (note_src)
2851 remove_note (jump, note);
2852 }
2853
2854 #ifdef HAVE_cc0
2855 /* Delete the cc0 setter. */
2856 if (setcc != NULL && CC0_P (SET_DEST (single_set (setcc))))
2857 delete_insn (setcc);
2858 #endif
2859
2860 run_jump_opt_after_gcse = 1;
2861
2862 global_const_prop_count++;
2863 if (dump_file != NULL)
2864 {
2865 fprintf (dump_file,
2866 "GLOBAL CONST-PROP: Replacing reg %d in jump_insn %d with constant ",
2867 REGNO (from), INSN_UID (jump));
2868 print_rtl (dump_file, src);
2869 fprintf (dump_file, "\n");
2870 }
2871 purge_dead_edges (bb);
2872
2873 return 1;
2874 }
2875
2876 static bool
2877 constprop_register (rtx insn, rtx from, rtx to, bool alter_jumps)
2878 {
2879 rtx sset;
2880
2881 /* Check for reg or cc0 setting instructions followed by
2882 conditional branch instructions first. */
2883 if (alter_jumps
2884 && (sset = single_set (insn)) != NULL
2885 && NEXT_INSN (insn)
2886 && any_condjump_p (NEXT_INSN (insn)) && onlyjump_p (NEXT_INSN (insn)))
2887 {
2888 rtx dest = SET_DEST (sset);
2889 if ((REG_P (dest) || CC0_P (dest))
2890 && cprop_jump (BLOCK_FOR_INSN (insn), insn, NEXT_INSN (insn), from, to))
2891 return 1;
2892 }
2893
2894 /* Handle normal insns next. */
2895 if (NONJUMP_INSN_P (insn)
2896 && try_replace_reg (from, to, insn))
2897 return 1;
2898
2899 /* Try to propagate a CONST_INT into a conditional jump.
2900 We're pretty specific about what we will handle in this
2901 code, we can extend this as necessary over time.
2902
2903 Right now the insn in question must look like
2904 (set (pc) (if_then_else ...)) */
2905 else if (alter_jumps && any_condjump_p (insn) && onlyjump_p (insn))
2906 return cprop_jump (BLOCK_FOR_INSN (insn), NULL, insn, from, to);
2907 return 0;
2908 }
2909
2910 /* Perform constant and copy propagation on INSN.
2911 The result is nonzero if a change was made. */
2912
2913 static int
2914 cprop_insn (rtx insn, int alter_jumps)
2915 {
2916 struct reg_use *reg_used;
2917 int changed = 0;
2918 rtx note;
2919
2920 if (!INSN_P (insn))
2921 return 0;
2922
2923 reg_use_count = 0;
2924 note_uses (&PATTERN (insn), find_used_regs, NULL);
2925
2926 note = find_reg_equal_equiv_note (insn);
2927
2928 /* We may win even when propagating constants into notes. */
2929 if (note)
2930 find_used_regs (&XEXP (note, 0), NULL);
2931
2932 for (reg_used = &reg_use_table[0]; reg_use_count > 0;
2933 reg_used++, reg_use_count--)
2934 {
2935 unsigned int regno = REGNO (reg_used->reg_rtx);
2936 rtx pat, src;
2937 struct expr *set;
2938
2939 /* Ignore registers created by GCSE.
2940 We do this because ... */
2941 if (regno >= max_gcse_regno)
2942 continue;
2943
2944 /* If the register has already been set in this block, there's
2945 nothing we can do. */
2946 if (! oprs_not_set_p (reg_used->reg_rtx, insn))
2947 continue;
2948
2949 /* Find an assignment that sets reg_used and is available
2950 at the start of the block. */
2951 set = find_avail_set (regno, insn);
2952 if (! set)
2953 continue;
2954
2955 pat = set->expr;
2956 /* ??? We might be able to handle PARALLELs. Later. */
2957 gcc_assert (GET_CODE (pat) == SET);
2958
2959 src = SET_SRC (pat);
2960
2961 /* Constant propagation. */
2962 if (gcse_constant_p (src))
2963 {
2964 if (constprop_register (insn, reg_used->reg_rtx, src, alter_jumps))
2965 {
2966 changed = 1;
2967 global_const_prop_count++;
2968 if (dump_file != NULL)
2969 {
2970 fprintf (dump_file, "GLOBAL CONST-PROP: Replacing reg %d in ", regno);
2971 fprintf (dump_file, "insn %d with constant ", INSN_UID (insn));
2972 print_rtl (dump_file, src);
2973 fprintf (dump_file, "\n");
2974 }
2975 if (INSN_DELETED_P (insn))
2976 return 1;
2977 }
2978 }
2979 else if (REG_P (src)
2980 && REGNO (src) >= FIRST_PSEUDO_REGISTER
2981 && REGNO (src) != regno)
2982 {
2983 if (try_replace_reg (reg_used->reg_rtx, src, insn))
2984 {
2985 changed = 1;
2986 global_copy_prop_count++;
2987 if (dump_file != NULL)
2988 {
2989 fprintf (dump_file, "GLOBAL COPY-PROP: Replacing reg %d in insn %d",
2990 regno, INSN_UID (insn));
2991 fprintf (dump_file, " with reg %d\n", REGNO (src));
2992 }
2993
2994 /* The original insn setting reg_used may or may not now be
2995 deletable. We leave the deletion to flow. */
2996 /* FIXME: If it turns out that the insn isn't deletable,
2997 then we may have unnecessarily extended register lifetimes
2998 and made things worse. */
2999 }
3000 }
3001 }
3002
3003 return changed;
3004 }
3005
3006 /* Like find_used_regs, but avoid recording uses that appear in
3007 input-output contexts such as zero_extract or pre_dec. This
3008 restricts the cases we consider to those for which local cprop
3009 can legitimately make replacements. */
3010
3011 static void
3012 local_cprop_find_used_regs (rtx *xptr, void *data)
3013 {
3014 rtx x = *xptr;
3015
3016 if (x == 0)
3017 return;
3018
3019 switch (GET_CODE (x))
3020 {
3021 case ZERO_EXTRACT:
3022 case SIGN_EXTRACT:
3023 case STRICT_LOW_PART:
3024 return;
3025
3026 case PRE_DEC:
3027 case PRE_INC:
3028 case POST_DEC:
3029 case POST_INC:
3030 case PRE_MODIFY:
3031 case POST_MODIFY:
3032 /* Can only legitimately appear this early in the context of
3033 stack pushes for function arguments, but handle all of the
3034 codes nonetheless. */
3035 return;
3036
3037 case SUBREG:
3038 /* Setting a subreg of a register larger than word_mode leaves
3039 the non-written words unchanged. */
3040 if (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x))) > BITS_PER_WORD)
3041 return;
3042 break;
3043
3044 default:
3045 break;
3046 }
3047
3048 find_used_regs (xptr, data);
3049 }
3050
3051 /* LIBCALL_SP is a zero-terminated array of insns at the end of a libcall;
3052 their REG_EQUAL notes need updating. */
3053
3054 static bool
3055 do_local_cprop (rtx x, rtx insn, bool alter_jumps, rtx *libcall_sp)
3056 {
3057 rtx newreg = NULL, newcnst = NULL;
3058
3059 /* Rule out USE instructions and ASM statements as we don't want to
3060 change the hard registers mentioned. */
3061 if (REG_P (x)
3062 && (REGNO (x) >= FIRST_PSEUDO_REGISTER
3063 || (GET_CODE (PATTERN (insn)) != USE
3064 && asm_noperands (PATTERN (insn)) < 0)))
3065 {
3066 cselib_val *val = cselib_lookup (x, GET_MODE (x), 0);
3067 struct elt_loc_list *l;
3068
3069 if (!val)
3070 return false;
3071 for (l = val->locs; l; l = l->next)
3072 {
3073 rtx this_rtx = l->loc;
3074 rtx note;
3075
3076 /* Don't CSE non-constant values out of libcall blocks. */
3077 if (l->in_libcall && ! CONSTANT_P (this_rtx))
3078 continue;
3079
3080 if (gcse_constant_p (this_rtx))
3081 newcnst = this_rtx;
3082 if (REG_P (this_rtx) && REGNO (this_rtx) >= FIRST_PSEUDO_REGISTER
3083 /* Don't copy propagate if it has attached REG_EQUIV note.
3084 At this point this only function parameters should have
3085 REG_EQUIV notes and if the argument slot is used somewhere
3086 explicitly, it means address of parameter has been taken,
3087 so we should not extend the lifetime of the pseudo. */
3088 && (!(note = find_reg_note (l->setting_insn, REG_EQUIV, NULL_RTX))
3089 || ! MEM_P (XEXP (note, 0))))
3090 newreg = this_rtx;
3091 }
3092 if (newcnst && constprop_register (insn, x, newcnst, alter_jumps))
3093 {
3094 /* If we find a case where we can't fix the retval REG_EQUAL notes
3095 match the new register, we either have to abandon this replacement
3096 or fix delete_trivially_dead_insns to preserve the setting insn,
3097 or make it delete the REG_EQUAL note, and fix up all passes that
3098 require the REG_EQUAL note there. */
3099 bool adjusted;
3100
3101 adjusted = adjust_libcall_notes (x, newcnst, insn, libcall_sp);
3102 gcc_assert (adjusted);
3103
3104 if (dump_file != NULL)
3105 {
3106 fprintf (dump_file, "LOCAL CONST-PROP: Replacing reg %d in ",
3107 REGNO (x));
3108 fprintf (dump_file, "insn %d with constant ",
3109 INSN_UID (insn));
3110 print_rtl (dump_file, newcnst);
3111 fprintf (dump_file, "\n");
3112 }
3113 local_const_prop_count++;
3114 return true;
3115 }
3116 else if (newreg && newreg != x && try_replace_reg (x, newreg, insn))
3117 {
3118 adjust_libcall_notes (x, newreg, insn, libcall_sp);
3119 if (dump_file != NULL)
3120 {
3121 fprintf (dump_file,
3122 "LOCAL COPY-PROP: Replacing reg %d in insn %d",
3123 REGNO (x), INSN_UID (insn));
3124 fprintf (dump_file, " with reg %d\n", REGNO (newreg));
3125 }
3126 local_copy_prop_count++;
3127 return true;
3128 }
3129 }
3130 return false;
3131 }
3132
3133 /* LIBCALL_SP is a zero-terminated array of insns at the end of a libcall;
3134 their REG_EQUAL notes need updating to reflect that OLDREG has been
3135 replaced with NEWVAL in INSN. Return true if all substitutions could
3136 be made. */
3137 static bool
3138 adjust_libcall_notes (rtx oldreg, rtx newval, rtx insn, rtx *libcall_sp)
3139 {
3140 rtx end;
3141
3142 while ((end = *libcall_sp++))
3143 {
3144 rtx note = find_reg_equal_equiv_note (end);
3145
3146 if (! note)
3147 continue;
3148
3149 if (REG_P (newval))
3150 {
3151 if (reg_set_between_p (newval, PREV_INSN (insn), end))
3152 {
3153 do
3154 {
3155 note = find_reg_equal_equiv_note (end);
3156 if (! note)
3157 continue;
3158 if (reg_mentioned_p (newval, XEXP (note, 0)))
3159 return false;
3160 }
3161 while ((end = *libcall_sp++));
3162 return true;
3163 }
3164 }
3165 XEXP (note, 0) = simplify_replace_rtx (XEXP (note, 0), oldreg, newval);
3166 df_notes_rescan (end);
3167 insn = end;
3168 }
3169 return true;
3170 }
3171
3172 #define MAX_NESTED_LIBCALLS 9
3173
3174 /* Do local const/copy propagation (i.e. within each basic block).
3175 If ALTER_JUMPS is true, allow propagating into jump insns, which
3176 could modify the CFG. */
3177
3178 static void
3179 local_cprop_pass (bool alter_jumps)
3180 {
3181 basic_block bb;
3182 rtx insn;
3183 struct reg_use *reg_used;
3184 rtx libcall_stack[MAX_NESTED_LIBCALLS + 1], *libcall_sp;
3185 bool changed = false;
3186
3187 cselib_init (false);
3188 libcall_sp = &libcall_stack[MAX_NESTED_LIBCALLS];
3189 *libcall_sp = 0;
3190 FOR_EACH_BB (bb)
3191 {
3192 FOR_BB_INSNS (bb, insn)
3193 {
3194 if (INSN_P (insn))
3195 {
3196 rtx note = find_reg_note (insn, REG_LIBCALL, NULL_RTX);
3197
3198 if (note)
3199 {
3200 gcc_assert (libcall_sp != libcall_stack);
3201 *--libcall_sp = XEXP (note, 0);
3202 }
3203 note = find_reg_note (insn, REG_RETVAL, NULL_RTX);
3204 if (note)
3205 libcall_sp++;
3206 note = find_reg_equal_equiv_note (insn);
3207 do
3208 {
3209 reg_use_count = 0;
3210 note_uses (&PATTERN (insn), local_cprop_find_used_regs,
3211 NULL);
3212 if (note)
3213 local_cprop_find_used_regs (&XEXP (note, 0), NULL);
3214
3215 for (reg_used = &reg_use_table[0]; reg_use_count > 0;
3216 reg_used++, reg_use_count--)
3217 {
3218 if (do_local_cprop (reg_used->reg_rtx, insn, alter_jumps,
3219 libcall_sp))
3220 {
3221 changed = true;
3222 break;
3223 }
3224 }
3225 if (INSN_DELETED_P (insn))
3226 break;
3227 }
3228 while (reg_use_count);
3229 }
3230 cselib_process_insn (insn);
3231 }
3232
3233 /* Forget everything at the end of a basic block. Make sure we are
3234 not inside a libcall, they should never cross basic blocks. */
3235 cselib_clear_table ();
3236 gcc_assert (libcall_sp == &libcall_stack[MAX_NESTED_LIBCALLS]);
3237 }
3238
3239 cselib_finish ();
3240
3241 /* Global analysis may get into infinite loops for unreachable blocks. */
3242 if (changed && alter_jumps)
3243 {
3244 delete_unreachable_blocks ();
3245 free_reg_set_mem ();
3246 alloc_reg_set_mem (max_reg_num ());
3247 compute_sets ();
3248 }
3249 }
3250
3251 /* Forward propagate copies. This includes copies and constants. Return
3252 nonzero if a change was made. */
3253
3254 static int
3255 cprop (int alter_jumps)
3256 {
3257 int changed;
3258 basic_block bb;
3259 rtx insn;
3260
3261 /* Note we start at block 1. */
3262 if (ENTRY_BLOCK_PTR->next_bb == EXIT_BLOCK_PTR)
3263 {
3264 if (dump_file != NULL)
3265 fprintf (dump_file, "\n");
3266 return 0;
3267 }
3268
3269 changed = 0;
3270 FOR_BB_BETWEEN (bb, ENTRY_BLOCK_PTR->next_bb->next_bb, EXIT_BLOCK_PTR, next_bb)
3271 {
3272 /* Reset tables used to keep track of what's still valid [since the
3273 start of the block]. */
3274 reset_opr_set_tables ();
3275
3276 FOR_BB_INSNS (bb, insn)
3277 if (INSN_P (insn))
3278 {
3279 changed |= cprop_insn (insn, alter_jumps);
3280
3281 /* Keep track of everything modified by this insn. */
3282 /* ??? Need to be careful w.r.t. mods done to INSN. Don't
3283 call mark_oprs_set if we turned the insn into a NOTE. */
3284 if (! NOTE_P (insn))
3285 mark_oprs_set (insn);
3286 }
3287 }
3288
3289 if (dump_file != NULL)
3290 fprintf (dump_file, "\n");
3291
3292 return changed;
3293 }
3294
3295 /* Similar to get_condition, only the resulting condition must be
3296 valid at JUMP, instead of at EARLIEST.
3297
3298 This differs from noce_get_condition in ifcvt.c in that we prefer not to
3299 settle for the condition variable in the jump instruction being integral.
3300 We prefer to be able to record the value of a user variable, rather than
3301 the value of a temporary used in a condition. This could be solved by
3302 recording the value of *every* register scanned by canonicalize_condition,
3303 but this would require some code reorganization. */
3304
3305 rtx
3306 fis_get_condition (rtx jump)
3307 {
3308 return get_condition (jump, NULL, false, true);
3309 }
3310
3311 /* Check the comparison COND to see if we can safely form an implicit set from
3312 it. COND is either an EQ or NE comparison. */
3313
3314 static bool
3315 implicit_set_cond_p (rtx cond)
3316 {
3317 enum machine_mode mode = GET_MODE (XEXP (cond, 0));
3318 rtx cst = XEXP (cond, 1);
3319
3320 /* We can't perform this optimization if either operand might be or might
3321 contain a signed zero. */
3322 if (HONOR_SIGNED_ZEROS (mode))
3323 {
3324 /* It is sufficient to check if CST is or contains a zero. We must
3325 handle float, complex, and vector. If any subpart is a zero, then
3326 the optimization can't be performed. */
3327 /* ??? The complex and vector checks are not implemented yet. We just
3328 always return zero for them. */
3329 if (GET_CODE (cst) == CONST_DOUBLE)
3330 {
3331 REAL_VALUE_TYPE d;
3332 REAL_VALUE_FROM_CONST_DOUBLE (d, cst);
3333 if (REAL_VALUES_EQUAL (d, dconst0))
3334 return 0;
3335 }
3336 else
3337 return 0;
3338 }
3339
3340 return gcse_constant_p (cst);
3341 }
3342
3343 /* Find the implicit sets of a function. An "implicit set" is a constraint
3344 on the value of a variable, implied by a conditional jump. For example,
3345 following "if (x == 2)", the then branch may be optimized as though the
3346 conditional performed an "explicit set", in this example, "x = 2". This
3347 function records the set patterns that are implicit at the start of each
3348 basic block. */
3349
3350 static void
3351 find_implicit_sets (void)
3352 {
3353 basic_block bb, dest;
3354 unsigned int count;
3355 rtx cond, new;
3356
3357 count = 0;
3358 FOR_EACH_BB (bb)
3359 /* Check for more than one successor. */
3360 if (EDGE_COUNT (bb->succs) > 1)
3361 {
3362 cond = fis_get_condition (BB_END (bb));
3363
3364 if (cond
3365 && (GET_CODE (cond) == EQ || GET_CODE (cond) == NE)
3366 && REG_P (XEXP (cond, 0))
3367 && REGNO (XEXP (cond, 0)) >= FIRST_PSEUDO_REGISTER
3368 && implicit_set_cond_p (cond))
3369 {
3370 dest = GET_CODE (cond) == EQ ? BRANCH_EDGE (bb)->dest
3371 : FALLTHRU_EDGE (bb)->dest;
3372
3373 if (dest && single_pred_p (dest)
3374 && dest != EXIT_BLOCK_PTR)
3375 {
3376 new = gen_rtx_SET (VOIDmode, XEXP (cond, 0),
3377 XEXP (cond, 1));
3378 implicit_sets[dest->index] = new;
3379 if (dump_file)
3380 {
3381 fprintf(dump_file, "Implicit set of reg %d in ",
3382 REGNO (XEXP (cond, 0)));
3383 fprintf(dump_file, "basic block %d\n", dest->index);
3384 }
3385 count++;
3386 }
3387 }
3388 }
3389
3390 if (dump_file)
3391 fprintf (dump_file, "Found %d implicit sets\n", count);
3392 }
3393
3394 /* Perform one copy/constant propagation pass.
3395 PASS is the pass count. If CPROP_JUMPS is true, perform constant
3396 propagation into conditional jumps. If BYPASS_JUMPS is true,
3397 perform conditional jump bypassing optimizations. */
3398
3399 static int
3400 one_cprop_pass (int pass, bool cprop_jumps, bool bypass_jumps)
3401 {
3402 int changed = 0;
3403
3404 global_const_prop_count = local_const_prop_count = 0;
3405 global_copy_prop_count = local_copy_prop_count = 0;
3406
3407 if (cprop_jumps)
3408 local_cprop_pass (cprop_jumps);
3409
3410 /* Determine implicit sets. */
3411 implicit_sets = XCNEWVEC (rtx, last_basic_block);
3412 find_implicit_sets ();
3413
3414 alloc_hash_table (max_cuid, &set_hash_table, 1);
3415 compute_hash_table (&set_hash_table);
3416
3417 /* Free implicit_sets before peak usage. */
3418 free (implicit_sets);
3419 implicit_sets = NULL;
3420
3421 if (dump_file)
3422 dump_hash_table (dump_file, "SET", &set_hash_table);
3423 if (set_hash_table.n_elems > 0)
3424 {
3425 alloc_cprop_mem (last_basic_block, set_hash_table.n_elems);
3426 compute_cprop_data ();
3427 changed = cprop (cprop_jumps);
3428 if (bypass_jumps)
3429 changed |= bypass_conditional_jumps ();
3430 free_cprop_mem ();
3431 }
3432
3433 free_hash_table (&set_hash_table);
3434
3435 if (dump_file)
3436 {
3437 fprintf (dump_file, "CPROP of %s, pass %d: %d bytes needed, ",
3438 current_function_name (), pass, bytes_used);
3439 fprintf (dump_file, "%d local const props, %d local copy props, ",
3440 local_const_prop_count, local_copy_prop_count);
3441 fprintf (dump_file, "%d global const props, %d global copy props\n\n",
3442 global_const_prop_count, global_copy_prop_count);
3443 }
3444 /* Global analysis may get into infinite loops for unreachable blocks. */
3445 if (changed && cprop_jumps)
3446 delete_unreachable_blocks ();
3447
3448 return changed;
3449 }
3450 \f
3451 /* Bypass conditional jumps. */
3452
3453 /* The value of last_basic_block at the beginning of the jump_bypass
3454 pass. The use of redirect_edge_and_branch_force may introduce new
3455 basic blocks, but the data flow analysis is only valid for basic
3456 block indices less than bypass_last_basic_block. */
3457
3458 static int bypass_last_basic_block;
3459
3460 /* Find a set of REGNO to a constant that is available at the end of basic
3461 block BB. Returns NULL if no such set is found. Based heavily upon
3462 find_avail_set. */
3463
3464 static struct expr *
3465 find_bypass_set (int regno, int bb)
3466 {
3467 struct expr *result = 0;
3468
3469 for (;;)
3470 {
3471 rtx src;
3472 struct expr *set = lookup_set (regno, &set_hash_table);
3473
3474 while (set)
3475 {
3476 if (TEST_BIT (cprop_avout[bb], set->bitmap_index))
3477 break;
3478 set = next_set (regno, set);
3479 }
3480
3481 if (set == 0)
3482 break;
3483
3484 gcc_assert (GET_CODE (set->expr) == SET);
3485
3486 src = SET_SRC (set->expr);
3487 if (gcse_constant_p (src))
3488 result = set;
3489
3490 if (! REG_P (src))
3491 break;
3492
3493 regno = REGNO (src);
3494 }
3495 return result;
3496 }
3497
3498
3499 /* Subroutine of bypass_block that checks whether a pseudo is killed by
3500 any of the instructions inserted on an edge. Jump bypassing places
3501 condition code setters on CFG edges using insert_insn_on_edge. This
3502 function is required to check that our data flow analysis is still
3503 valid prior to commit_edge_insertions. */
3504
3505 static bool
3506 reg_killed_on_edge (rtx reg, edge e)
3507 {
3508 rtx insn;
3509
3510 for (insn = e->insns.r; insn; insn = NEXT_INSN (insn))
3511 if (INSN_P (insn) && reg_set_p (reg, insn))
3512 return true;
3513
3514 return false;
3515 }
3516
3517 /* Subroutine of bypass_conditional_jumps that attempts to bypass the given
3518 basic block BB which has more than one predecessor. If not NULL, SETCC
3519 is the first instruction of BB, which is immediately followed by JUMP_INSN
3520 JUMP. Otherwise, SETCC is NULL, and JUMP is the first insn of BB.
3521 Returns nonzero if a change was made.
3522
3523 During the jump bypassing pass, we may place copies of SETCC instructions
3524 on CFG edges. The following routine must be careful to pay attention to
3525 these inserted insns when performing its transformations. */
3526
3527 static int
3528 bypass_block (basic_block bb, rtx setcc, rtx jump)
3529 {
3530 rtx insn, note;
3531 edge e, edest;
3532 int i, change;
3533 int may_be_loop_header;
3534 unsigned removed_p;
3535 edge_iterator ei;
3536
3537 insn = (setcc != NULL) ? setcc : jump;
3538
3539 /* Determine set of register uses in INSN. */
3540 reg_use_count = 0;
3541 note_uses (&PATTERN (insn), find_used_regs, NULL);
3542 note = find_reg_equal_equiv_note (insn);
3543 if (note)
3544 find_used_regs (&XEXP (note, 0), NULL);
3545
3546 may_be_loop_header = false;
3547 FOR_EACH_EDGE (e, ei, bb->preds)
3548 if (e->flags & EDGE_DFS_BACK)
3549 {
3550 may_be_loop_header = true;
3551 break;
3552 }
3553
3554 change = 0;
3555 for (ei = ei_start (bb->preds); (e = ei_safe_edge (ei)); )
3556 {
3557 removed_p = 0;
3558
3559 if (e->flags & EDGE_COMPLEX)
3560 {
3561 ei_next (&ei);
3562 continue;
3563 }
3564
3565 /* We can't redirect edges from new basic blocks. */
3566 if (e->src->index >= bypass_last_basic_block)
3567 {
3568 ei_next (&ei);
3569 continue;
3570 }
3571
3572 /* The irreducible loops created by redirecting of edges entering the
3573 loop from outside would decrease effectiveness of some of the following
3574 optimizations, so prevent this. */
3575 if (may_be_loop_header
3576 && !(e->flags & EDGE_DFS_BACK))
3577 {
3578 ei_next (&ei);
3579 continue;
3580 }
3581
3582 for (i = 0; i < reg_use_count; i++)
3583 {
3584 struct reg_use *reg_used = &reg_use_table[i];
3585 unsigned int regno = REGNO (reg_used->reg_rtx);
3586 basic_block dest, old_dest;
3587 struct expr *set;
3588 rtx src, new;
3589
3590 if (regno >= max_gcse_regno)
3591 continue;
3592
3593 set = find_bypass_set (regno, e->src->index);
3594
3595 if (! set)
3596 continue;
3597
3598 /* Check the data flow is valid after edge insertions. */
3599 if (e->insns.r && reg_killed_on_edge (reg_used->reg_rtx, e))
3600 continue;
3601
3602 src = SET_SRC (pc_set (jump));
3603
3604 if (setcc != NULL)
3605 src = simplify_replace_rtx (src,
3606 SET_DEST (PATTERN (setcc)),
3607 SET_SRC (PATTERN (setcc)));
3608
3609 new = simplify_replace_rtx (src, reg_used->reg_rtx,
3610 SET_SRC (set->expr));
3611
3612 /* Jump bypassing may have already placed instructions on
3613 edges of the CFG. We can't bypass an outgoing edge that
3614 has instructions associated with it, as these insns won't
3615 get executed if the incoming edge is redirected. */
3616
3617 if (new == pc_rtx)
3618 {
3619 edest = FALLTHRU_EDGE (bb);
3620 dest = edest->insns.r ? NULL : edest->dest;
3621 }
3622 else if (GET_CODE (new) == LABEL_REF)
3623 {
3624 dest = BLOCK_FOR_INSN (XEXP (new, 0));
3625 /* Don't bypass edges containing instructions. */
3626 edest = find_edge (bb, dest);
3627 if (edest && edest->insns.r)
3628 dest = NULL;
3629 }
3630 else
3631 dest = NULL;
3632
3633 /* Avoid unification of the edge with other edges from original
3634 branch. We would end up emitting the instruction on "both"
3635 edges. */
3636
3637 if (dest && setcc && !CC0_P (SET_DEST (PATTERN (setcc)))
3638 && find_edge (e->src, dest))
3639 dest = NULL;
3640
3641 old_dest = e->dest;
3642 if (dest != NULL
3643 && dest != old_dest
3644 && dest != EXIT_BLOCK_PTR)
3645 {
3646 redirect_edge_and_branch_force (e, dest);
3647
3648 /* Copy the register setter to the redirected edge.
3649 Don't copy CC0 setters, as CC0 is dead after jump. */
3650 if (setcc)
3651 {
3652 rtx pat = PATTERN (setcc);
3653 if (!CC0_P (SET_DEST (pat)))
3654 insert_insn_on_edge (copy_insn (pat), e);
3655 }
3656
3657 if (dump_file != NULL)
3658 {
3659 fprintf (dump_file, "JUMP-BYPASS: Proved reg %d "
3660 "in jump_insn %d equals constant ",
3661 regno, INSN_UID (jump));
3662 print_rtl (dump_file, SET_SRC (set->expr));
3663 fprintf (dump_file, "\nBypass edge from %d->%d to %d\n",
3664 e->src->index, old_dest->index, dest->index);
3665 }
3666 change = 1;
3667 removed_p = 1;
3668 break;
3669 }
3670 }
3671 if (!removed_p)
3672 ei_next (&ei);
3673 }
3674 return change;
3675 }
3676
3677 /* Find basic blocks with more than one predecessor that only contain a
3678 single conditional jump. If the result of the comparison is known at
3679 compile-time from any incoming edge, redirect that edge to the
3680 appropriate target. Returns nonzero if a change was made.
3681
3682 This function is now mis-named, because we also handle indirect jumps. */
3683
3684 static int
3685 bypass_conditional_jumps (void)
3686 {
3687 basic_block bb;
3688 int changed;
3689 rtx setcc;
3690 rtx insn;
3691 rtx dest;
3692
3693 /* Note we start at block 1. */
3694 if (ENTRY_BLOCK_PTR->next_bb == EXIT_BLOCK_PTR)
3695 return 0;
3696
3697 bypass_last_basic_block = last_basic_block;
3698 mark_dfs_back_edges ();
3699
3700 changed = 0;
3701 FOR_BB_BETWEEN (bb, ENTRY_BLOCK_PTR->next_bb->next_bb,
3702 EXIT_BLOCK_PTR, next_bb)
3703 {
3704 /* Check for more than one predecessor. */
3705 if (!single_pred_p (bb))
3706 {
3707 setcc = NULL_RTX;
3708 FOR_BB_INSNS (bb, insn)
3709 if (NONJUMP_INSN_P (insn))
3710 {
3711 if (setcc)
3712 break;
3713 if (GET_CODE (PATTERN (insn)) != SET)
3714 break;
3715
3716 dest = SET_DEST (PATTERN (insn));
3717 if (REG_P (dest) || CC0_P (dest))
3718 setcc = insn;
3719 else
3720 break;
3721 }
3722 else if (JUMP_P (insn))
3723 {
3724 if ((any_condjump_p (insn) || computed_jump_p (insn))
3725 && onlyjump_p (insn))
3726 changed |= bypass_block (bb, setcc, insn);
3727 break;
3728 }
3729 else if (INSN_P (insn))
3730 break;
3731 }
3732 }
3733
3734 /* If we bypassed any register setting insns, we inserted a
3735 copy on the redirected edge. These need to be committed. */
3736 if (changed)
3737 commit_edge_insertions ();
3738
3739 return changed;
3740 }
3741 \f
3742 /* Compute PRE+LCM working variables. */
3743
3744 /* Local properties of expressions. */
3745 /* Nonzero for expressions that are transparent in the block. */
3746 static sbitmap *transp;
3747
3748 /* Nonzero for expressions that are transparent at the end of the block.
3749 This is only zero for expressions killed by abnormal critical edge
3750 created by a calls. */
3751 static sbitmap *transpout;
3752
3753 /* Nonzero for expressions that are computed (available) in the block. */
3754 static sbitmap *comp;
3755
3756 /* Nonzero for expressions that are locally anticipatable in the block. */
3757 static sbitmap *antloc;
3758
3759 /* Nonzero for expressions where this block is an optimal computation
3760 point. */
3761 static sbitmap *pre_optimal;
3762
3763 /* Nonzero for expressions which are redundant in a particular block. */
3764 static sbitmap *pre_redundant;
3765
3766 /* Nonzero for expressions which should be inserted on a specific edge. */
3767 static sbitmap *pre_insert_map;
3768
3769 /* Nonzero for expressions which should be deleted in a specific block. */
3770 static sbitmap *pre_delete_map;
3771
3772 /* Contains the edge_list returned by pre_edge_lcm. */
3773 static struct edge_list *edge_list;
3774
3775 /* Redundant insns. */
3776 static sbitmap pre_redundant_insns;
3777
3778 /* Allocate vars used for PRE analysis. */
3779
3780 static void
3781 alloc_pre_mem (int n_blocks, int n_exprs)
3782 {
3783 transp = sbitmap_vector_alloc (n_blocks, n_exprs);
3784 comp = sbitmap_vector_alloc (n_blocks, n_exprs);
3785 antloc = sbitmap_vector_alloc (n_blocks, n_exprs);
3786
3787 pre_optimal = NULL;
3788 pre_redundant = NULL;
3789 pre_insert_map = NULL;
3790 pre_delete_map = NULL;
3791 ae_kill = sbitmap_vector_alloc (n_blocks, n_exprs);
3792
3793 /* pre_insert and pre_delete are allocated later. */
3794 }
3795
3796 /* Free vars used for PRE analysis. */
3797
3798 static void
3799 free_pre_mem (void)
3800 {
3801 sbitmap_vector_free (transp);
3802 sbitmap_vector_free (comp);
3803
3804 /* ANTLOC and AE_KILL are freed just after pre_lcm finishes. */
3805
3806 if (pre_optimal)
3807 sbitmap_vector_free (pre_optimal);
3808 if (pre_redundant)
3809 sbitmap_vector_free (pre_redundant);
3810 if (pre_insert_map)
3811 sbitmap_vector_free (pre_insert_map);
3812 if (pre_delete_map)
3813 sbitmap_vector_free (pre_delete_map);
3814
3815 transp = comp = NULL;
3816 pre_optimal = pre_redundant = pre_insert_map = pre_delete_map = NULL;
3817 }
3818
3819 /* Top level routine to do the dataflow analysis needed by PRE. */
3820
3821 static void
3822 compute_pre_data (void)
3823 {
3824 sbitmap trapping_expr;
3825 basic_block bb;
3826 unsigned int ui;
3827
3828 compute_local_properties (transp, comp, antloc, &expr_hash_table);
3829 sbitmap_vector_zero (ae_kill, last_basic_block);
3830
3831 /* Collect expressions which might trap. */
3832 trapping_expr = sbitmap_alloc (expr_hash_table.n_elems);
3833 sbitmap_zero (trapping_expr);
3834 for (ui = 0; ui < expr_hash_table.size; ui++)
3835 {
3836 struct expr *e;
3837 for (e = expr_hash_table.table[ui]; e != NULL; e = e->next_same_hash)
3838 if (may_trap_p (e->expr))
3839 SET_BIT (trapping_expr, e->bitmap_index);
3840 }
3841
3842 /* Compute ae_kill for each basic block using:
3843
3844 ~(TRANSP | COMP)
3845 */
3846
3847 FOR_EACH_BB (bb)
3848 {
3849 edge e;
3850 edge_iterator ei;
3851
3852 /* If the current block is the destination of an abnormal edge, we
3853 kill all trapping expressions because we won't be able to properly
3854 place the instruction on the edge. So make them neither
3855 anticipatable nor transparent. This is fairly conservative. */
3856 FOR_EACH_EDGE (e, ei, bb->preds)
3857 if (e->flags & EDGE_ABNORMAL)
3858 {
3859 sbitmap_difference (antloc[bb->index], antloc[bb->index], trapping_expr);
3860 sbitmap_difference (transp[bb->index], transp[bb->index], trapping_expr);
3861 break;
3862 }
3863
3864 sbitmap_a_or_b (ae_kill[bb->index], transp[bb->index], comp[bb->index]);
3865 sbitmap_not (ae_kill[bb->index], ae_kill[bb->index]);
3866 }
3867
3868 edge_list = pre_edge_lcm (expr_hash_table.n_elems, transp, comp, antloc,
3869 ae_kill, &pre_insert_map, &pre_delete_map);
3870 sbitmap_vector_free (antloc);
3871 antloc = NULL;
3872 sbitmap_vector_free (ae_kill);
3873 ae_kill = NULL;
3874 sbitmap_free (trapping_expr);
3875 }
3876 \f
3877 /* PRE utilities */
3878
3879 /* Return nonzero if an occurrence of expression EXPR in OCCR_BB would reach
3880 block BB.
3881
3882 VISITED is a pointer to a working buffer for tracking which BB's have
3883 been visited. It is NULL for the top-level call.
3884
3885 We treat reaching expressions that go through blocks containing the same
3886 reaching expression as "not reaching". E.g. if EXPR is generated in blocks
3887 2 and 3, INSN is in block 4, and 2->3->4, we treat the expression in block
3888 2 as not reaching. The intent is to improve the probability of finding
3889 only one reaching expression and to reduce register lifetimes by picking
3890 the closest such expression. */
3891
3892 static int
3893 pre_expr_reaches_here_p_work (basic_block occr_bb, struct expr *expr, basic_block bb, char *visited)
3894 {
3895 edge pred;
3896 edge_iterator ei;
3897
3898 FOR_EACH_EDGE (pred, ei, bb->preds)
3899 {
3900 basic_block pred_bb = pred->src;
3901
3902 if (pred->src == ENTRY_BLOCK_PTR
3903 /* Has predecessor has already been visited? */
3904 || visited[pred_bb->index])
3905 ;/* Nothing to do. */
3906
3907 /* Does this predecessor generate this expression? */
3908 else if (TEST_BIT (comp[pred_bb->index], expr->bitmap_index))
3909 {
3910 /* Is this the occurrence we're looking for?
3911 Note that there's only one generating occurrence per block
3912 so we just need to check the block number. */
3913 if (occr_bb == pred_bb)
3914 return 1;
3915
3916 visited[pred_bb->index] = 1;
3917 }
3918 /* Ignore this predecessor if it kills the expression. */
3919 else if (! TEST_BIT (transp[pred_bb->index], expr->bitmap_index))
3920 visited[pred_bb->index] = 1;
3921
3922 /* Neither gen nor kill. */
3923 else
3924 {
3925 visited[pred_bb->index] = 1;
3926 if (pre_expr_reaches_here_p_work (occr_bb, expr, pred_bb, visited))
3927 return 1;
3928 }
3929 }
3930
3931 /* All paths have been checked. */
3932 return 0;
3933 }
3934
3935 /* The wrapper for pre_expr_reaches_here_work that ensures that any
3936 memory allocated for that function is returned. */
3937
3938 static int
3939 pre_expr_reaches_here_p (basic_block occr_bb, struct expr *expr, basic_block bb)
3940 {
3941 int rval;
3942 char *visited = XCNEWVEC (char, last_basic_block);
3943
3944 rval = pre_expr_reaches_here_p_work (occr_bb, expr, bb, visited);
3945
3946 free (visited);
3947 return rval;
3948 }
3949 \f
3950
3951 /* Given an expr, generate RTL which we can insert at the end of a BB,
3952 or on an edge. Set the block number of any insns generated to
3953 the value of BB. */
3954
3955 static rtx
3956 process_insert_insn (struct expr *expr)
3957 {
3958 rtx reg = expr->reaching_reg;
3959 rtx exp = copy_rtx (expr->expr);
3960 rtx pat;
3961
3962 start_sequence ();
3963
3964 /* If the expression is something that's an operand, like a constant,
3965 just copy it to a register. */
3966 if (general_operand (exp, GET_MODE (reg)))
3967 emit_move_insn (reg, exp);
3968
3969 /* Otherwise, make a new insn to compute this expression and make sure the
3970 insn will be recognized (this also adds any needed CLOBBERs). Copy the
3971 expression to make sure we don't have any sharing issues. */
3972 else
3973 {
3974 rtx insn = emit_insn (gen_rtx_SET (VOIDmode, reg, exp));
3975
3976 if (insn_invalid_p (insn))
3977 gcc_unreachable ();
3978 }
3979
3980
3981 pat = get_insns ();
3982 end_sequence ();
3983
3984 return pat;
3985 }
3986
3987 /* Add EXPR to the end of basic block BB.
3988
3989 This is used by both the PRE and code hoisting.
3990
3991 For PRE, we want to verify that the expr is either transparent
3992 or locally anticipatable in the target block. This check makes
3993 no sense for code hoisting. */
3994
3995 static void
3996 insert_insn_end_basic_block (struct expr *expr, basic_block bb, int pre)
3997 {
3998 rtx insn = BB_END (bb);
3999 rtx new_insn;
4000 rtx reg = expr->reaching_reg;
4001 int regno = REGNO (reg);
4002 rtx pat, pat_end;
4003
4004 pat = process_insert_insn (expr);
4005 gcc_assert (pat && INSN_P (pat));
4006
4007 pat_end = pat;
4008 while (NEXT_INSN (pat_end) != NULL_RTX)
4009 pat_end = NEXT_INSN (pat_end);
4010
4011 /* If the last insn is a jump, insert EXPR in front [taking care to
4012 handle cc0, etc. properly]. Similarly we need to care trapping
4013 instructions in presence of non-call exceptions. */
4014
4015 if (JUMP_P (insn)
4016 || (NONJUMP_INSN_P (insn)
4017 && (!single_succ_p (bb)
4018 || single_succ_edge (bb)->flags & EDGE_ABNORMAL)))
4019 {
4020 #ifdef HAVE_cc0
4021 rtx note;
4022 #endif
4023 /* It should always be the case that we can put these instructions
4024 anywhere in the basic block with performing PRE optimizations.
4025 Check this. */
4026 gcc_assert (!NONJUMP_INSN_P (insn) || !pre
4027 || TEST_BIT (antloc[bb->index], expr->bitmap_index)
4028 || TEST_BIT (transp[bb->index], expr->bitmap_index));
4029
4030 /* If this is a jump table, then we can't insert stuff here. Since
4031 we know the previous real insn must be the tablejump, we insert
4032 the new instruction just before the tablejump. */
4033 if (GET_CODE (PATTERN (insn)) == ADDR_VEC
4034 || GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
4035 insn = prev_real_insn (insn);
4036
4037 #ifdef HAVE_cc0
4038 /* FIXME: 'twould be nice to call prev_cc0_setter here but it aborts
4039 if cc0 isn't set. */
4040 note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
4041 if (note)
4042 insn = XEXP (note, 0);
4043 else
4044 {
4045 rtx maybe_cc0_setter = prev_nonnote_insn (insn);
4046 if (maybe_cc0_setter
4047 && INSN_P (maybe_cc0_setter)
4048 && sets_cc0_p (PATTERN (maybe_cc0_setter)))
4049 insn = maybe_cc0_setter;
4050 }
4051 #endif
4052 /* FIXME: What if something in cc0/jump uses value set in new insn? */
4053 new_insn = emit_insn_before_noloc (pat, insn, bb);
4054 }
4055
4056 /* Likewise if the last insn is a call, as will happen in the presence
4057 of exception handling. */
4058 else if (CALL_P (insn)
4059 && (!single_succ_p (bb)
4060 || single_succ_edge (bb)->flags & EDGE_ABNORMAL))
4061 {
4062 /* Keeping in mind SMALL_REGISTER_CLASSES and parameters in registers,
4063 we search backward and place the instructions before the first
4064 parameter is loaded. Do this for everyone for consistency and a
4065 presumption that we'll get better code elsewhere as well.
4066
4067 It should always be the case that we can put these instructions
4068 anywhere in the basic block with performing PRE optimizations.
4069 Check this. */
4070
4071 gcc_assert (!pre
4072 || TEST_BIT (antloc[bb->index], expr->bitmap_index)
4073 || TEST_BIT (transp[bb->index], expr->bitmap_index));
4074
4075 /* Since different machines initialize their parameter registers
4076 in different orders, assume nothing. Collect the set of all
4077 parameter registers. */
4078 insn = find_first_parameter_load (insn, BB_HEAD (bb));
4079
4080 /* If we found all the parameter loads, then we want to insert
4081 before the first parameter load.
4082
4083 If we did not find all the parameter loads, then we might have
4084 stopped on the head of the block, which could be a CODE_LABEL.
4085 If we inserted before the CODE_LABEL, then we would be putting
4086 the insn in the wrong basic block. In that case, put the insn
4087 after the CODE_LABEL. Also, respect NOTE_INSN_BASIC_BLOCK. */
4088 while (LABEL_P (insn)
4089 || NOTE_INSN_BASIC_BLOCK_P (insn))
4090 insn = NEXT_INSN (insn);
4091
4092 new_insn = emit_insn_before_noloc (pat, insn, bb);
4093 }
4094 else
4095 new_insn = emit_insn_after_noloc (pat, insn, bb);
4096
4097 while (1)
4098 {
4099 if (INSN_P (pat))
4100 {
4101 add_label_notes (PATTERN (pat), new_insn);
4102 note_stores (PATTERN (pat), record_set_info, pat);
4103 }
4104 if (pat == pat_end)
4105 break;
4106 pat = NEXT_INSN (pat);
4107 }
4108
4109 gcse_create_count++;
4110
4111 if (dump_file)
4112 {
4113 fprintf (dump_file, "PRE/HOIST: end of bb %d, insn %d, ",
4114 bb->index, INSN_UID (new_insn));
4115 fprintf (dump_file, "copying expression %d to reg %d\n",
4116 expr->bitmap_index, regno);
4117 }
4118 }
4119
4120 /* Insert partially redundant expressions on edges in the CFG to make
4121 the expressions fully redundant. */
4122
4123 static int
4124 pre_edge_insert (struct edge_list *edge_list, struct expr **index_map)
4125 {
4126 int e, i, j, num_edges, set_size, did_insert = 0;
4127 sbitmap *inserted;
4128
4129 /* Where PRE_INSERT_MAP is nonzero, we add the expression on that edge
4130 if it reaches any of the deleted expressions. */
4131
4132 set_size = pre_insert_map[0]->size;
4133 num_edges = NUM_EDGES (edge_list);
4134 inserted = sbitmap_vector_alloc (num_edges, expr_hash_table.n_elems);
4135 sbitmap_vector_zero (inserted, num_edges);
4136
4137 for (e = 0; e < num_edges; e++)
4138 {
4139 int indx;
4140 basic_block bb = INDEX_EDGE_PRED_BB (edge_list, e);
4141
4142 for (i = indx = 0; i < set_size; i++, indx += SBITMAP_ELT_BITS)
4143 {
4144 SBITMAP_ELT_TYPE insert = pre_insert_map[e]->elms[i];
4145
4146 for (j = indx; insert && j < (int) expr_hash_table.n_elems; j++, insert >>= 1)
4147 if ((insert & 1) != 0 && index_map[j]->reaching_reg != NULL_RTX)
4148 {
4149 struct expr *expr = index_map[j];
4150 struct occr *occr;
4151
4152 /* Now look at each deleted occurrence of this expression. */
4153 for (occr = expr->antic_occr; occr != NULL; occr = occr->next)
4154 {
4155 if (! occr->deleted_p)
4156 continue;
4157
4158 /* Insert this expression on this edge if it would
4159 reach the deleted occurrence in BB. */
4160 if (!TEST_BIT (inserted[e], j))
4161 {
4162 rtx insn;
4163 edge eg = INDEX_EDGE (edge_list, e);
4164
4165 /* We can't insert anything on an abnormal and
4166 critical edge, so we insert the insn at the end of
4167 the previous block. There are several alternatives
4168 detailed in Morgans book P277 (sec 10.5) for
4169 handling this situation. This one is easiest for
4170 now. */
4171
4172 if (eg->flags & EDGE_ABNORMAL)
4173 insert_insn_end_basic_block (index_map[j], bb, 0);
4174 else
4175 {
4176 insn = process_insert_insn (index_map[j]);
4177 insert_insn_on_edge (insn, eg);
4178 }
4179
4180 if (dump_file)
4181 {
4182 fprintf (dump_file, "PRE/HOIST: edge (%d,%d), ",
4183 bb->index,
4184 INDEX_EDGE_SUCC_BB (edge_list, e)->index);
4185 fprintf (dump_file, "copy expression %d\n",
4186 expr->bitmap_index);
4187 }
4188
4189 update_ld_motion_stores (expr);
4190 SET_BIT (inserted[e], j);
4191 did_insert = 1;
4192 gcse_create_count++;
4193 }
4194 }
4195 }
4196 }
4197 }
4198
4199 sbitmap_vector_free (inserted);
4200 return did_insert;
4201 }
4202
4203 /* Copy the result of EXPR->EXPR generated by INSN to EXPR->REACHING_REG.
4204 Given "old_reg <- expr" (INSN), instead of adding after it
4205 reaching_reg <- old_reg
4206 it's better to do the following:
4207 reaching_reg <- expr
4208 old_reg <- reaching_reg
4209 because this way copy propagation can discover additional PRE
4210 opportunities. But if this fails, we try the old way.
4211 When "expr" is a store, i.e.
4212 given "MEM <- old_reg", instead of adding after it
4213 reaching_reg <- old_reg
4214 it's better to add it before as follows:
4215 reaching_reg <- old_reg
4216 MEM <- reaching_reg. */
4217
4218 static void
4219 pre_insert_copy_insn (struct expr *expr, rtx insn)
4220 {
4221 rtx reg = expr->reaching_reg;
4222 int regno = REGNO (reg);
4223 int indx = expr->bitmap_index;
4224 rtx pat = PATTERN (insn);
4225 rtx set, first_set, new_insn;
4226 rtx old_reg;
4227 int i;
4228
4229 /* This block matches the logic in hash_scan_insn. */
4230 switch (GET_CODE (pat))
4231 {
4232 case SET:
4233 set = pat;
4234 break;
4235
4236 case PARALLEL:
4237 /* Search through the parallel looking for the set whose
4238 source was the expression that we're interested in. */
4239 first_set = NULL_RTX;
4240 set = NULL_RTX;
4241 for (i = 0; i < XVECLEN (pat, 0); i++)
4242 {
4243 rtx x = XVECEXP (pat, 0, i);
4244 if (GET_CODE (x) == SET)
4245 {
4246 /* If the source was a REG_EQUAL or REG_EQUIV note, we
4247 may not find an equivalent expression, but in this
4248 case the PARALLEL will have a single set. */
4249 if (first_set == NULL_RTX)
4250 first_set = x;
4251 if (expr_equiv_p (SET_SRC (x), expr->expr))
4252 {
4253 set = x;
4254 break;
4255 }
4256 }
4257 }
4258
4259 gcc_assert (first_set);
4260 if (set == NULL_RTX)
4261 set = first_set;
4262 break;
4263
4264 default:
4265 gcc_unreachable ();
4266 }
4267
4268 if (REG_P (SET_DEST (set)))
4269 {
4270 old_reg = SET_DEST (set);
4271 /* Check if we can modify the set destination in the original insn. */
4272 if (validate_change (insn, &SET_DEST (set), reg, 0))
4273 {
4274 new_insn = gen_move_insn (old_reg, reg);
4275 new_insn = emit_insn_after (new_insn, insn);
4276
4277 /* Keep register set table up to date. */
4278 record_one_set (regno, insn);
4279 }
4280 else
4281 {
4282 new_insn = gen_move_insn (reg, old_reg);
4283 new_insn = emit_insn_after (new_insn, insn);
4284
4285 /* Keep register set table up to date. */
4286 record_one_set (regno, new_insn);
4287 }
4288 }
4289 else /* This is possible only in case of a store to memory. */
4290 {
4291 old_reg = SET_SRC (set);
4292 new_insn = gen_move_insn (reg, old_reg);
4293
4294 /* Check if we can modify the set source in the original insn. */
4295 if (validate_change (insn, &SET_SRC (set), reg, 0))
4296 new_insn = emit_insn_before (new_insn, insn);
4297 else
4298 new_insn = emit_insn_after (new_insn, insn);
4299
4300 /* Keep register set table up to date. */
4301 record_one_set (regno, new_insn);
4302 }
4303
4304 gcse_create_count++;
4305
4306 if (dump_file)
4307 fprintf (dump_file,
4308 "PRE: bb %d, insn %d, copy expression %d in insn %d to reg %d\n",
4309 BLOCK_NUM (insn), INSN_UID (new_insn), indx,
4310 INSN_UID (insn), regno);
4311 }
4312
4313 /* Copy available expressions that reach the redundant expression
4314 to `reaching_reg'. */
4315
4316 static void
4317 pre_insert_copies (void)
4318 {
4319 unsigned int i, added_copy;
4320 struct expr *expr;
4321 struct occr *occr;
4322 struct occr *avail;
4323
4324 /* For each available expression in the table, copy the result to
4325 `reaching_reg' if the expression reaches a deleted one.
4326
4327 ??? The current algorithm is rather brute force.
4328 Need to do some profiling. */
4329
4330 for (i = 0; i < expr_hash_table.size; i++)
4331 for (expr = expr_hash_table.table[i]; expr != NULL; expr = expr->next_same_hash)
4332 {
4333 /* If the basic block isn't reachable, PPOUT will be TRUE. However,
4334 we don't want to insert a copy here because the expression may not
4335 really be redundant. So only insert an insn if the expression was
4336 deleted. This test also avoids further processing if the
4337 expression wasn't deleted anywhere. */
4338 if (expr->reaching_reg == NULL)
4339 continue;
4340
4341 /* Set when we add a copy for that expression. */
4342 added_copy = 0;
4343
4344 for (occr = expr->antic_occr; occr != NULL; occr = occr->next)
4345 {
4346 if (! occr->deleted_p)
4347 continue;
4348
4349 for (avail = expr->avail_occr; avail != NULL; avail = avail->next)
4350 {
4351 rtx insn = avail->insn;
4352
4353 /* No need to handle this one if handled already. */
4354 if (avail->copied_p)
4355 continue;
4356
4357 /* Don't handle this one if it's a redundant one. */
4358 if (TEST_BIT (pre_redundant_insns, INSN_CUID (insn)))
4359 continue;
4360
4361 /* Or if the expression doesn't reach the deleted one. */
4362 if (! pre_expr_reaches_here_p (BLOCK_FOR_INSN (avail->insn),
4363 expr,
4364 BLOCK_FOR_INSN (occr->insn)))
4365 continue;
4366
4367 added_copy = 1;
4368
4369 /* Copy the result of avail to reaching_reg. */
4370 pre_insert_copy_insn (expr, insn);
4371 avail->copied_p = 1;
4372 }
4373 }
4374
4375 if (added_copy)
4376 update_ld_motion_stores (expr);
4377 }
4378 }
4379
4380 /* Emit move from SRC to DEST noting the equivalence with expression computed
4381 in INSN. */
4382 static rtx
4383 gcse_emit_move_after (rtx src, rtx dest, rtx insn)
4384 {
4385 rtx new;
4386 rtx set = single_set (insn), set2;
4387 rtx note;
4388 rtx eqv;
4389
4390 /* This should never fail since we're creating a reg->reg copy
4391 we've verified to be valid. */
4392
4393 new = emit_insn_after (gen_move_insn (dest, src), insn);
4394
4395 /* Note the equivalence for local CSE pass. */
4396 set2 = single_set (new);
4397 if (!set2 || !rtx_equal_p (SET_DEST (set2), dest))
4398 return new;
4399 if ((note = find_reg_equal_equiv_note (insn)))
4400 eqv = XEXP (note, 0);
4401 else
4402 eqv = SET_SRC (set);
4403
4404 set_unique_reg_note (new, REG_EQUAL, copy_insn_1 (eqv));
4405
4406 return new;
4407 }
4408
4409 /* Delete redundant computations.
4410 Deletion is done by changing the insn to copy the `reaching_reg' of
4411 the expression into the result of the SET. It is left to later passes
4412 (cprop, cse2, flow, combine, regmove) to propagate the copy or eliminate it.
4413
4414 Returns nonzero if a change is made. */
4415
4416 static int
4417 pre_delete (void)
4418 {
4419 unsigned int i;
4420 int changed;
4421 struct expr *expr;
4422 struct occr *occr;
4423
4424 changed = 0;
4425 for (i = 0; i < expr_hash_table.size; i++)
4426 for (expr = expr_hash_table.table[i];
4427 expr != NULL;
4428 expr = expr->next_same_hash)
4429 {
4430 int indx = expr->bitmap_index;
4431
4432 /* We only need to search antic_occr since we require
4433 ANTLOC != 0. */
4434
4435 for (occr = expr->antic_occr; occr != NULL; occr = occr->next)
4436 {
4437 rtx insn = occr->insn;
4438 rtx set;
4439 basic_block bb = BLOCK_FOR_INSN (insn);
4440
4441 /* We only delete insns that have a single_set. */
4442 if (TEST_BIT (pre_delete_map[bb->index], indx)
4443 && (set = single_set (insn)) != 0
4444 && dbg_cnt (pre_insn))
4445 {
4446 /* Create a pseudo-reg to store the result of reaching
4447 expressions into. Get the mode for the new pseudo from
4448 the mode of the original destination pseudo. */
4449 if (expr->reaching_reg == NULL)
4450 expr->reaching_reg
4451 = gen_reg_rtx (GET_MODE (SET_DEST (set)));
4452
4453 gcse_emit_move_after (expr->reaching_reg, SET_DEST (set), insn);
4454 delete_insn (insn);
4455 occr->deleted_p = 1;
4456 SET_BIT (pre_redundant_insns, INSN_CUID (insn));
4457 changed = 1;
4458 gcse_subst_count++;
4459
4460 if (dump_file)
4461 {
4462 fprintf (dump_file,
4463 "PRE: redundant insn %d (expression %d) in ",
4464 INSN_UID (insn), indx);
4465 fprintf (dump_file, "bb %d, reaching reg is %d\n",
4466 bb->index, REGNO (expr->reaching_reg));
4467 }
4468 }
4469 }
4470 }
4471
4472 return changed;
4473 }
4474
4475 /* Perform GCSE optimizations using PRE.
4476 This is called by one_pre_gcse_pass after all the dataflow analysis
4477 has been done.
4478
4479 This is based on the original Morel-Renvoise paper Fred Chow's thesis, and
4480 lazy code motion from Knoop, Ruthing and Steffen as described in Advanced
4481 Compiler Design and Implementation.
4482
4483 ??? A new pseudo reg is created to hold the reaching expression. The nice
4484 thing about the classical approach is that it would try to use an existing
4485 reg. If the register can't be adequately optimized [i.e. we introduce
4486 reload problems], one could add a pass here to propagate the new register
4487 through the block.
4488
4489 ??? We don't handle single sets in PARALLELs because we're [currently] not
4490 able to copy the rest of the parallel when we insert copies to create full
4491 redundancies from partial redundancies. However, there's no reason why we
4492 can't handle PARALLELs in the cases where there are no partial
4493 redundancies. */
4494
4495 static int
4496 pre_gcse (void)
4497 {
4498 unsigned int i;
4499 int did_insert, changed;
4500 struct expr **index_map;
4501 struct expr *expr;
4502
4503 /* Compute a mapping from expression number (`bitmap_index') to
4504 hash table entry. */
4505
4506 index_map = XCNEWVEC (struct expr *, expr_hash_table.n_elems);
4507 for (i = 0; i < expr_hash_table.size; i++)
4508 for (expr = expr_hash_table.table[i]; expr != NULL; expr = expr->next_same_hash)
4509 index_map[expr->bitmap_index] = expr;
4510
4511 /* Reset bitmap used to track which insns are redundant. */
4512 pre_redundant_insns = sbitmap_alloc (max_cuid);
4513 sbitmap_zero (pre_redundant_insns);
4514
4515 /* Delete the redundant insns first so that
4516 - we know what register to use for the new insns and for the other
4517 ones with reaching expressions
4518 - we know which insns are redundant when we go to create copies */
4519
4520 changed = pre_delete ();
4521 did_insert = pre_edge_insert (edge_list, index_map);
4522
4523 /* In other places with reaching expressions, copy the expression to the
4524 specially allocated pseudo-reg that reaches the redundant expr. */
4525 pre_insert_copies ();
4526 if (did_insert)
4527 {
4528 commit_edge_insertions ();
4529 changed = 1;
4530 }
4531
4532 free (index_map);
4533 sbitmap_free (pre_redundant_insns);
4534 return changed;
4535 }
4536
4537 /* Top level routine to perform one PRE GCSE pass.
4538
4539 Return nonzero if a change was made. */
4540
4541 static int
4542 one_pre_gcse_pass (int pass)
4543 {
4544 int changed = 0;
4545
4546 gcse_subst_count = 0;
4547 gcse_create_count = 0;
4548
4549 alloc_hash_table (max_cuid, &expr_hash_table, 0);
4550 add_noreturn_fake_exit_edges ();
4551 if (flag_gcse_lm)
4552 compute_ld_motion_mems ();
4553
4554 compute_hash_table (&expr_hash_table);
4555 trim_ld_motion_mems ();
4556 if (dump_file)
4557 dump_hash_table (dump_file, "Expression", &expr_hash_table);
4558
4559 if (expr_hash_table.n_elems > 0)
4560 {
4561 alloc_pre_mem (last_basic_block, expr_hash_table.n_elems);
4562 compute_pre_data ();
4563 changed |= pre_gcse ();
4564 free_edge_list (edge_list);
4565 free_pre_mem ();
4566 }
4567
4568 free_ldst_mems ();
4569 remove_fake_exit_edges ();
4570 free_hash_table (&expr_hash_table);
4571
4572 if (dump_file)
4573 {
4574 fprintf (dump_file, "\nPRE GCSE of %s, pass %d: %d bytes needed, ",
4575 current_function_name (), pass, bytes_used);
4576 fprintf (dump_file, "%d substs, %d insns created\n",
4577 gcse_subst_count, gcse_create_count);
4578 }
4579
4580 return changed;
4581 }
4582 \f
4583 /* If X contains any LABEL_REF's, add REG_LABEL notes for them to INSN.
4584 If notes are added to an insn which references a CODE_LABEL, the
4585 LABEL_NUSES count is incremented. We have to add REG_LABEL notes,
4586 because the following loop optimization pass requires them. */
4587
4588 /* ??? If there was a jump optimization pass after gcse and before loop,
4589 then we would not need to do this here, because jump would add the
4590 necessary REG_LABEL notes. */
4591
4592 static void
4593 add_label_notes (rtx x, rtx insn)
4594 {
4595 enum rtx_code code = GET_CODE (x);
4596 int i, j;
4597 const char *fmt;
4598
4599 if (code == LABEL_REF && !LABEL_REF_NONLOCAL_P (x))
4600 {
4601 /* This code used to ignore labels that referred to dispatch tables to
4602 avoid flow generating (slightly) worse code.
4603
4604 We no longer ignore such label references (see LABEL_REF handling in
4605 mark_jump_label for additional information). */
4606
4607 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_LABEL, XEXP (x, 0),
4608 REG_NOTES (insn));
4609 if (LABEL_P (XEXP (x, 0)))
4610 LABEL_NUSES (XEXP (x, 0))++;
4611 return;
4612 }
4613
4614 for (i = GET_RTX_LENGTH (code) - 1, fmt = GET_RTX_FORMAT (code); i >= 0; i--)
4615 {
4616 if (fmt[i] == 'e')
4617 add_label_notes (XEXP (x, i), insn);
4618 else if (fmt[i] == 'E')
4619 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
4620 add_label_notes (XVECEXP (x, i, j), insn);
4621 }
4622 }
4623
4624 /* Compute transparent outgoing information for each block.
4625
4626 An expression is transparent to an edge unless it is killed by
4627 the edge itself. This can only happen with abnormal control flow,
4628 when the edge is traversed through a call. This happens with
4629 non-local labels and exceptions.
4630
4631 This would not be necessary if we split the edge. While this is
4632 normally impossible for abnormal critical edges, with some effort
4633 it should be possible with exception handling, since we still have
4634 control over which handler should be invoked. But due to increased
4635 EH table sizes, this may not be worthwhile. */
4636
4637 static void
4638 compute_transpout (void)
4639 {
4640 basic_block bb;
4641 unsigned int i;
4642 struct expr *expr;
4643
4644 sbitmap_vector_ones (transpout, last_basic_block);
4645
4646 FOR_EACH_BB (bb)
4647 {
4648 /* Note that flow inserted a nop a the end of basic blocks that
4649 end in call instructions for reasons other than abnormal
4650 control flow. */
4651 if (! CALL_P (BB_END (bb)))
4652 continue;
4653
4654 for (i = 0; i < expr_hash_table.size; i++)
4655 for (expr = expr_hash_table.table[i]; expr ; expr = expr->next_same_hash)
4656 if (MEM_P (expr->expr))
4657 {
4658 if (GET_CODE (XEXP (expr->expr, 0)) == SYMBOL_REF
4659 && CONSTANT_POOL_ADDRESS_P (XEXP (expr->expr, 0)))
4660 continue;
4661
4662 /* ??? Optimally, we would use interprocedural alias
4663 analysis to determine if this mem is actually killed
4664 by this call. */
4665 RESET_BIT (transpout[bb->index], expr->bitmap_index);
4666 }
4667 }
4668 }
4669
4670 /* Code Hoisting variables and subroutines. */
4671
4672 /* Very busy expressions. */
4673 static sbitmap *hoist_vbein;
4674 static sbitmap *hoist_vbeout;
4675
4676 /* Hoistable expressions. */
4677 static sbitmap *hoist_exprs;
4678
4679 /* ??? We could compute post dominators and run this algorithm in
4680 reverse to perform tail merging, doing so would probably be
4681 more effective than the tail merging code in jump.c.
4682
4683 It's unclear if tail merging could be run in parallel with
4684 code hoisting. It would be nice. */
4685
4686 /* Allocate vars used for code hoisting analysis. */
4687
4688 static void
4689 alloc_code_hoist_mem (int n_blocks, int n_exprs)
4690 {
4691 antloc = sbitmap_vector_alloc (n_blocks, n_exprs);
4692 transp = sbitmap_vector_alloc (n_blocks, n_exprs);
4693 comp = sbitmap_vector_alloc (n_blocks, n_exprs);
4694
4695 hoist_vbein = sbitmap_vector_alloc (n_blocks, n_exprs);
4696 hoist_vbeout = sbitmap_vector_alloc (n_blocks, n_exprs);
4697 hoist_exprs = sbitmap_vector_alloc (n_blocks, n_exprs);
4698 transpout = sbitmap_vector_alloc (n_blocks, n_exprs);
4699 }
4700
4701 /* Free vars used for code hoisting analysis. */
4702
4703 static void
4704 free_code_hoist_mem (void)
4705 {
4706 sbitmap_vector_free (antloc);
4707 sbitmap_vector_free (transp);
4708 sbitmap_vector_free (comp);
4709
4710 sbitmap_vector_free (hoist_vbein);
4711 sbitmap_vector_free (hoist_vbeout);
4712 sbitmap_vector_free (hoist_exprs);
4713 sbitmap_vector_free (transpout);
4714
4715 free_dominance_info (CDI_DOMINATORS);
4716 }
4717
4718 /* Compute the very busy expressions at entry/exit from each block.
4719
4720 An expression is very busy if all paths from a given point
4721 compute the expression. */
4722
4723 static void
4724 compute_code_hoist_vbeinout (void)
4725 {
4726 int changed, passes;
4727 basic_block bb;
4728
4729 sbitmap_vector_zero (hoist_vbeout, last_basic_block);
4730 sbitmap_vector_zero (hoist_vbein, last_basic_block);
4731
4732 passes = 0;
4733 changed = 1;
4734
4735 while (changed)
4736 {
4737 changed = 0;
4738
4739 /* We scan the blocks in the reverse order to speed up
4740 the convergence. */
4741 FOR_EACH_BB_REVERSE (bb)
4742 {
4743 changed |= sbitmap_a_or_b_and_c_cg (hoist_vbein[bb->index], antloc[bb->index],
4744 hoist_vbeout[bb->index], transp[bb->index]);
4745 if (bb->next_bb != EXIT_BLOCK_PTR)
4746 sbitmap_intersection_of_succs (hoist_vbeout[bb->index], hoist_vbein, bb->index);
4747 }
4748
4749 passes++;
4750 }
4751
4752 if (dump_file)
4753 fprintf (dump_file, "hoisting vbeinout computation: %d passes\n", passes);
4754 }
4755
4756 /* Top level routine to do the dataflow analysis needed by code hoisting. */
4757
4758 static void
4759 compute_code_hoist_data (void)
4760 {
4761 compute_local_properties (transp, comp, antloc, &expr_hash_table);
4762 compute_transpout ();
4763 compute_code_hoist_vbeinout ();
4764 calculate_dominance_info (CDI_DOMINATORS);
4765 if (dump_file)
4766 fprintf (dump_file, "\n");
4767 }
4768
4769 /* Determine if the expression identified by EXPR_INDEX would
4770 reach BB unimpared if it was placed at the end of EXPR_BB.
4771
4772 It's unclear exactly what Muchnick meant by "unimpared". It seems
4773 to me that the expression must either be computed or transparent in
4774 *every* block in the path(s) from EXPR_BB to BB. Any other definition
4775 would allow the expression to be hoisted out of loops, even if
4776 the expression wasn't a loop invariant.
4777
4778 Contrast this to reachability for PRE where an expression is
4779 considered reachable if *any* path reaches instead of *all*
4780 paths. */
4781
4782 static int
4783 hoist_expr_reaches_here_p (basic_block expr_bb, int expr_index, basic_block bb, char *visited)
4784 {
4785 edge pred;
4786 edge_iterator ei;
4787 int visited_allocated_locally = 0;
4788
4789
4790 if (visited == NULL)
4791 {
4792 visited_allocated_locally = 1;
4793 visited = XCNEWVEC (char, last_basic_block);
4794 }
4795
4796 FOR_EACH_EDGE (pred, ei, bb->preds)
4797 {
4798 basic_block pred_bb = pred->src;
4799
4800 if (pred->src == ENTRY_BLOCK_PTR)
4801 break;
4802 else if (pred_bb == expr_bb)
4803 continue;
4804 else if (visited[pred_bb->index])
4805 continue;
4806
4807 /* Does this predecessor generate this expression? */
4808 else if (TEST_BIT (comp[pred_bb->index], expr_index))
4809 break;
4810 else if (! TEST_BIT (transp[pred_bb->index], expr_index))
4811 break;
4812
4813 /* Not killed. */
4814 else
4815 {
4816 visited[pred_bb->index] = 1;
4817 if (! hoist_expr_reaches_here_p (expr_bb, expr_index,
4818 pred_bb, visited))
4819 break;
4820 }
4821 }
4822 if (visited_allocated_locally)
4823 free (visited);
4824
4825 return (pred == NULL);
4826 }
4827 \f
4828 /* Actually perform code hoisting. */
4829
4830 static void
4831 hoist_code (void)
4832 {
4833 basic_block bb, dominated;
4834 VEC (basic_block, heap) *domby;
4835 unsigned int i,j;
4836 struct expr **index_map;
4837 struct expr *expr;
4838
4839 sbitmap_vector_zero (hoist_exprs, last_basic_block);
4840
4841 /* Compute a mapping from expression number (`bitmap_index') to
4842 hash table entry. */
4843
4844 index_map = XCNEWVEC (struct expr *, expr_hash_table.n_elems);
4845 for (i = 0; i < expr_hash_table.size; i++)
4846 for (expr = expr_hash_table.table[i]; expr != NULL; expr = expr->next_same_hash)
4847 index_map[expr->bitmap_index] = expr;
4848
4849 /* Walk over each basic block looking for potentially hoistable
4850 expressions, nothing gets hoisted from the entry block. */
4851 FOR_EACH_BB (bb)
4852 {
4853 int found = 0;
4854 int insn_inserted_p;
4855
4856 domby = get_dominated_by (CDI_DOMINATORS, bb);
4857 /* Examine each expression that is very busy at the exit of this
4858 block. These are the potentially hoistable expressions. */
4859 for (i = 0; i < hoist_vbeout[bb->index]->n_bits; i++)
4860 {
4861 int hoistable = 0;
4862
4863 if (TEST_BIT (hoist_vbeout[bb->index], i)
4864 && TEST_BIT (transpout[bb->index], i))
4865 {
4866 /* We've found a potentially hoistable expression, now
4867 we look at every block BB dominates to see if it
4868 computes the expression. */
4869 for (j = 0; VEC_iterate (basic_block, domby, j, dominated); j++)
4870 {
4871 /* Ignore self dominance. */
4872 if (bb == dominated)
4873 continue;
4874 /* We've found a dominated block, now see if it computes
4875 the busy expression and whether or not moving that
4876 expression to the "beginning" of that block is safe. */
4877 if (!TEST_BIT (antloc[dominated->index], i))
4878 continue;
4879
4880 /* Note if the expression would reach the dominated block
4881 unimpared if it was placed at the end of BB.
4882
4883 Keep track of how many times this expression is hoistable
4884 from a dominated block into BB. */
4885 if (hoist_expr_reaches_here_p (bb, i, dominated, NULL))
4886 hoistable++;
4887 }
4888
4889 /* If we found more than one hoistable occurrence of this
4890 expression, then note it in the bitmap of expressions to
4891 hoist. It makes no sense to hoist things which are computed
4892 in only one BB, and doing so tends to pessimize register
4893 allocation. One could increase this value to try harder
4894 to avoid any possible code expansion due to register
4895 allocation issues; however experiments have shown that
4896 the vast majority of hoistable expressions are only movable
4897 from two successors, so raising this threshold is likely
4898 to nullify any benefit we get from code hoisting. */
4899 if (hoistable > 1)
4900 {
4901 SET_BIT (hoist_exprs[bb->index], i);
4902 found = 1;
4903 }
4904 }
4905 }
4906 /* If we found nothing to hoist, then quit now. */
4907 if (! found)
4908 {
4909 VEC_free (basic_block, heap, domby);
4910 continue;
4911 }
4912
4913 /* Loop over all the hoistable expressions. */
4914 for (i = 0; i < hoist_exprs[bb->index]->n_bits; i++)
4915 {
4916 /* We want to insert the expression into BB only once, so
4917 note when we've inserted it. */
4918 insn_inserted_p = 0;
4919
4920 /* These tests should be the same as the tests above. */
4921 if (TEST_BIT (hoist_exprs[bb->index], i))
4922 {
4923 /* We've found a potentially hoistable expression, now
4924 we look at every block BB dominates to see if it
4925 computes the expression. */
4926 for (j = 0; VEC_iterate (basic_block, domby, j, dominated); j++)
4927 {
4928 /* Ignore self dominance. */
4929 if (bb == dominated)
4930 continue;
4931
4932 /* We've found a dominated block, now see if it computes
4933 the busy expression and whether or not moving that
4934 expression to the "beginning" of that block is safe. */
4935 if (!TEST_BIT (antloc[dominated->index], i))
4936 continue;
4937
4938 /* The expression is computed in the dominated block and
4939 it would be safe to compute it at the start of the
4940 dominated block. Now we have to determine if the
4941 expression would reach the dominated block if it was
4942 placed at the end of BB. */
4943 if (hoist_expr_reaches_here_p (bb, i, dominated, NULL))
4944 {
4945 struct expr *expr = index_map[i];
4946 struct occr *occr = expr->antic_occr;
4947 rtx insn;
4948 rtx set;
4949
4950 /* Find the right occurrence of this expression. */
4951 while (BLOCK_FOR_INSN (occr->insn) != dominated && occr)
4952 occr = occr->next;
4953
4954 gcc_assert (occr);
4955 insn = occr->insn;
4956 set = single_set (insn);
4957 gcc_assert (set);
4958
4959 /* Create a pseudo-reg to store the result of reaching
4960 expressions into. Get the mode for the new pseudo
4961 from the mode of the original destination pseudo. */
4962 if (expr->reaching_reg == NULL)
4963 expr->reaching_reg
4964 = gen_reg_rtx (GET_MODE (SET_DEST (set)));
4965
4966 gcse_emit_move_after (expr->reaching_reg, SET_DEST (set), insn);
4967 delete_insn (insn);
4968 occr->deleted_p = 1;
4969 if (!insn_inserted_p)
4970 {
4971 insert_insn_end_basic_block (index_map[i], bb, 0);
4972 insn_inserted_p = 1;
4973 }
4974 }
4975 }
4976 }
4977 }
4978 VEC_free (basic_block, heap, domby);
4979 }
4980
4981 free (index_map);
4982 }
4983
4984 /* Top level routine to perform one code hoisting (aka unification) pass
4985
4986 Return nonzero if a change was made. */
4987
4988 static int
4989 one_code_hoisting_pass (void)
4990 {
4991 int changed = 0;
4992
4993 alloc_hash_table (max_cuid, &expr_hash_table, 0);
4994 compute_hash_table (&expr_hash_table);
4995 if (dump_file)
4996 dump_hash_table (dump_file, "Code Hosting Expressions", &expr_hash_table);
4997
4998 if (expr_hash_table.n_elems > 0)
4999 {
5000 alloc_code_hoist_mem (last_basic_block, expr_hash_table.n_elems);
5001 compute_code_hoist_data ();
5002 hoist_code ();
5003 free_code_hoist_mem ();
5004 }
5005
5006 free_hash_table (&expr_hash_table);
5007
5008 return changed;
5009 }
5010 \f
5011 /* Here we provide the things required to do store motion towards
5012 the exit. In order for this to be effective, gcse also needed to
5013 be taught how to move a load when it is kill only by a store to itself.
5014
5015 int i;
5016 float a[10];
5017
5018 void foo(float scale)
5019 {
5020 for (i=0; i<10; i++)
5021 a[i] *= scale;
5022 }
5023
5024 'i' is both loaded and stored to in the loop. Normally, gcse cannot move
5025 the load out since its live around the loop, and stored at the bottom
5026 of the loop.
5027
5028 The 'Load Motion' referred to and implemented in this file is
5029 an enhancement to gcse which when using edge based lcm, recognizes
5030 this situation and allows gcse to move the load out of the loop.
5031
5032 Once gcse has hoisted the load, store motion can then push this
5033 load towards the exit, and we end up with no loads or stores of 'i'
5034 in the loop. */
5035
5036 static hashval_t
5037 pre_ldst_expr_hash (const void *p)
5038 {
5039 int do_not_record_p = 0;
5040 const struct ls_expr *x = p;
5041 return hash_rtx (x->pattern, GET_MODE (x->pattern), &do_not_record_p, NULL, false);
5042 }
5043
5044 static int
5045 pre_ldst_expr_eq (const void *p1, const void *p2)
5046 {
5047 const struct ls_expr *ptr1 = p1, *ptr2 = p2;
5048 return expr_equiv_p (ptr1->pattern, ptr2->pattern);
5049 }
5050
5051 /* This will search the ldst list for a matching expression. If it
5052 doesn't find one, we create one and initialize it. */
5053
5054 static struct ls_expr *
5055 ldst_entry (rtx x)
5056 {
5057 int do_not_record_p = 0;
5058 struct ls_expr * ptr;
5059 unsigned int hash;
5060 void **slot;
5061 struct ls_expr e;
5062
5063 hash = hash_rtx (x, GET_MODE (x), &do_not_record_p,
5064 NULL, /*have_reg_qty=*/false);
5065
5066 e.pattern = x;
5067 slot = htab_find_slot_with_hash (pre_ldst_table, &e, hash, INSERT);
5068 if (*slot)
5069 return (struct ls_expr *)*slot;
5070
5071 ptr = XNEW (struct ls_expr);
5072
5073 ptr->next = pre_ldst_mems;
5074 ptr->expr = NULL;
5075 ptr->pattern = x;
5076 ptr->pattern_regs = NULL_RTX;
5077 ptr->loads = NULL_RTX;
5078 ptr->stores = NULL_RTX;
5079 ptr->reaching_reg = NULL_RTX;
5080 ptr->invalid = 0;
5081 ptr->index = 0;
5082 ptr->hash_index = hash;
5083 pre_ldst_mems = ptr;
5084 *slot = ptr;
5085
5086 return ptr;
5087 }
5088
5089 /* Free up an individual ldst entry. */
5090
5091 static void
5092 free_ldst_entry (struct ls_expr * ptr)
5093 {
5094 free_INSN_LIST_list (& ptr->loads);
5095 free_INSN_LIST_list (& ptr->stores);
5096
5097 free (ptr);
5098 }
5099
5100 /* Free up all memory associated with the ldst list. */
5101
5102 static void
5103 free_ldst_mems (void)
5104 {
5105 if (pre_ldst_table)
5106 htab_delete (pre_ldst_table);
5107 pre_ldst_table = NULL;
5108
5109 while (pre_ldst_mems)
5110 {
5111 struct ls_expr * tmp = pre_ldst_mems;
5112
5113 pre_ldst_mems = pre_ldst_mems->next;
5114
5115 free_ldst_entry (tmp);
5116 }
5117
5118 pre_ldst_mems = NULL;
5119 }
5120
5121 /* Dump debugging info about the ldst list. */
5122
5123 static void
5124 print_ldst_list (FILE * file)
5125 {
5126 struct ls_expr * ptr;
5127
5128 fprintf (file, "LDST list: \n");
5129
5130 for (ptr = first_ls_expr (); ptr != NULL; ptr = next_ls_expr (ptr))
5131 {
5132 fprintf (file, " Pattern (%3d): ", ptr->index);
5133
5134 print_rtl (file, ptr->pattern);
5135
5136 fprintf (file, "\n Loads : ");
5137
5138 if (ptr->loads)
5139 print_rtl (file, ptr->loads);
5140 else
5141 fprintf (file, "(nil)");
5142
5143 fprintf (file, "\n Stores : ");
5144
5145 if (ptr->stores)
5146 print_rtl (file, ptr->stores);
5147 else
5148 fprintf (file, "(nil)");
5149
5150 fprintf (file, "\n\n");
5151 }
5152
5153 fprintf (file, "\n");
5154 }
5155
5156 /* Returns 1 if X is in the list of ldst only expressions. */
5157
5158 static struct ls_expr *
5159 find_rtx_in_ldst (rtx x)
5160 {
5161 struct ls_expr e;
5162 void **slot;
5163 if (!pre_ldst_table)
5164 return NULL;
5165 e.pattern = x;
5166 slot = htab_find_slot (pre_ldst_table, &e, NO_INSERT);
5167 if (!slot || ((struct ls_expr *)*slot)->invalid)
5168 return NULL;
5169 return *slot;
5170 }
5171
5172 /* Assign each element of the list of mems a monotonically increasing value. */
5173
5174 static int
5175 enumerate_ldsts (void)
5176 {
5177 struct ls_expr * ptr;
5178 int n = 0;
5179
5180 for (ptr = pre_ldst_mems; ptr != NULL; ptr = ptr->next)
5181 ptr->index = n++;
5182
5183 return n;
5184 }
5185
5186 /* Return first item in the list. */
5187
5188 static inline struct ls_expr *
5189 first_ls_expr (void)
5190 {
5191 return pre_ldst_mems;
5192 }
5193
5194 /* Return the next item in the list after the specified one. */
5195
5196 static inline struct ls_expr *
5197 next_ls_expr (struct ls_expr * ptr)
5198 {
5199 return ptr->next;
5200 }
5201 \f
5202 /* Load Motion for loads which only kill themselves. */
5203
5204 /* Return true if x is a simple MEM operation, with no registers or
5205 side effects. These are the types of loads we consider for the
5206 ld_motion list, otherwise we let the usual aliasing take care of it. */
5207
5208 static int
5209 simple_mem (rtx x)
5210 {
5211 if (! MEM_P (x))
5212 return 0;
5213
5214 if (MEM_VOLATILE_P (x))
5215 return 0;
5216
5217 if (GET_MODE (x) == BLKmode)
5218 return 0;
5219
5220 /* If we are handling exceptions, we must be careful with memory references
5221 that may trap. If we are not, the behavior is undefined, so we may just
5222 continue. */
5223 if (flag_non_call_exceptions && may_trap_p (x))
5224 return 0;
5225
5226 if (side_effects_p (x))
5227 return 0;
5228
5229 /* Do not consider function arguments passed on stack. */
5230 if (reg_mentioned_p (stack_pointer_rtx, x))
5231 return 0;
5232
5233 if (flag_float_store && FLOAT_MODE_P (GET_MODE (x)))
5234 return 0;
5235
5236 return 1;
5237 }
5238
5239 /* Make sure there isn't a buried reference in this pattern anywhere.
5240 If there is, invalidate the entry for it since we're not capable
5241 of fixing it up just yet.. We have to be sure we know about ALL
5242 loads since the aliasing code will allow all entries in the
5243 ld_motion list to not-alias itself. If we miss a load, we will get
5244 the wrong value since gcse might common it and we won't know to
5245 fix it up. */
5246
5247 static void
5248 invalidate_any_buried_refs (rtx x)
5249 {
5250 const char * fmt;
5251 int i, j;
5252 struct ls_expr * ptr;
5253
5254 /* Invalidate it in the list. */
5255 if (MEM_P (x) && simple_mem (x))
5256 {
5257 ptr = ldst_entry (x);
5258 ptr->invalid = 1;
5259 }
5260
5261 /* Recursively process the insn. */
5262 fmt = GET_RTX_FORMAT (GET_CODE (x));
5263
5264 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
5265 {
5266 if (fmt[i] == 'e')
5267 invalidate_any_buried_refs (XEXP (x, i));
5268 else if (fmt[i] == 'E')
5269 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
5270 invalidate_any_buried_refs (XVECEXP (x, i, j));
5271 }
5272 }
5273
5274 /* Find all the 'simple' MEMs which are used in LOADs and STORES. Simple
5275 being defined as MEM loads and stores to symbols, with no side effects
5276 and no registers in the expression. For a MEM destination, we also
5277 check that the insn is still valid if we replace the destination with a
5278 REG, as is done in update_ld_motion_stores. If there are any uses/defs
5279 which don't match this criteria, they are invalidated and trimmed out
5280 later. */
5281
5282 static void
5283 compute_ld_motion_mems (void)
5284 {
5285 struct ls_expr * ptr;
5286 basic_block bb;
5287 rtx insn;
5288
5289 pre_ldst_mems = NULL;
5290 pre_ldst_table = htab_create (13, pre_ldst_expr_hash,
5291 pre_ldst_expr_eq, NULL);
5292
5293 FOR_EACH_BB (bb)
5294 {
5295 FOR_BB_INSNS (bb, insn)
5296 {
5297 if (INSN_P (insn))
5298 {
5299 if (GET_CODE (PATTERN (insn)) == SET)
5300 {
5301 rtx src = SET_SRC (PATTERN (insn));
5302 rtx dest = SET_DEST (PATTERN (insn));
5303
5304 /* Check for a simple LOAD... */
5305 if (MEM_P (src) && simple_mem (src))
5306 {
5307 ptr = ldst_entry (src);
5308 if (REG_P (dest))
5309 ptr->loads = alloc_INSN_LIST (insn, ptr->loads);
5310 else
5311 ptr->invalid = 1;
5312 }
5313 else
5314 {
5315 /* Make sure there isn't a buried load somewhere. */
5316 invalidate_any_buried_refs (src);
5317 }
5318
5319 /* Check for stores. Don't worry about aliased ones, they
5320 will block any movement we might do later. We only care
5321 about this exact pattern since those are the only
5322 circumstance that we will ignore the aliasing info. */
5323 if (MEM_P (dest) && simple_mem (dest))
5324 {
5325 ptr = ldst_entry (dest);
5326
5327 if (! MEM_P (src)
5328 && GET_CODE (src) != ASM_OPERANDS
5329 /* Check for REG manually since want_to_gcse_p
5330 returns 0 for all REGs. */
5331 && can_assign_to_reg_p (src))
5332 ptr->stores = alloc_INSN_LIST (insn, ptr->stores);
5333 else
5334 ptr->invalid = 1;
5335 }
5336 }
5337 else
5338 invalidate_any_buried_refs (PATTERN (insn));
5339 }
5340 }
5341 }
5342 }
5343
5344 /* Remove any references that have been either invalidated or are not in the
5345 expression list for pre gcse. */
5346
5347 static void
5348 trim_ld_motion_mems (void)
5349 {
5350 struct ls_expr * * last = & pre_ldst_mems;
5351 struct ls_expr * ptr = pre_ldst_mems;
5352
5353 while (ptr != NULL)
5354 {
5355 struct expr * expr;
5356
5357 /* Delete if entry has been made invalid. */
5358 if (! ptr->invalid)
5359 {
5360 /* Delete if we cannot find this mem in the expression list. */
5361 unsigned int hash = ptr->hash_index % expr_hash_table.size;
5362
5363 for (expr = expr_hash_table.table[hash];
5364 expr != NULL;
5365 expr = expr->next_same_hash)
5366 if (expr_equiv_p (expr->expr, ptr->pattern))
5367 break;
5368 }
5369 else
5370 expr = (struct expr *) 0;
5371
5372 if (expr)
5373 {
5374 /* Set the expression field if we are keeping it. */
5375 ptr->expr = expr;
5376 last = & ptr->next;
5377 ptr = ptr->next;
5378 }
5379 else
5380 {
5381 *last = ptr->next;
5382 htab_remove_elt_with_hash (pre_ldst_table, ptr, ptr->hash_index);
5383 free_ldst_entry (ptr);
5384 ptr = * last;
5385 }
5386 }
5387
5388 /* Show the world what we've found. */
5389 if (dump_file && pre_ldst_mems != NULL)
5390 print_ldst_list (dump_file);
5391 }
5392
5393 /* This routine will take an expression which we are replacing with
5394 a reaching register, and update any stores that are needed if
5395 that expression is in the ld_motion list. Stores are updated by
5396 copying their SRC to the reaching register, and then storing
5397 the reaching register into the store location. These keeps the
5398 correct value in the reaching register for the loads. */
5399
5400 static void
5401 update_ld_motion_stores (struct expr * expr)
5402 {
5403 struct ls_expr * mem_ptr;
5404
5405 if ((mem_ptr = find_rtx_in_ldst (expr->expr)))
5406 {
5407 /* We can try to find just the REACHED stores, but is shouldn't
5408 matter to set the reaching reg everywhere... some might be
5409 dead and should be eliminated later. */
5410
5411 /* We replace (set mem expr) with (set reg expr) (set mem reg)
5412 where reg is the reaching reg used in the load. We checked in
5413 compute_ld_motion_mems that we can replace (set mem expr) with
5414 (set reg expr) in that insn. */
5415 rtx list = mem_ptr->stores;
5416
5417 for ( ; list != NULL_RTX; list = XEXP (list, 1))
5418 {
5419 rtx insn = XEXP (list, 0);
5420 rtx pat = PATTERN (insn);
5421 rtx src = SET_SRC (pat);
5422 rtx reg = expr->reaching_reg;
5423 rtx copy, new;
5424
5425 /* If we've already copied it, continue. */
5426 if (expr->reaching_reg == src)
5427 continue;
5428
5429 if (dump_file)
5430 {
5431 fprintf (dump_file, "PRE: store updated with reaching reg ");
5432 print_rtl (dump_file, expr->reaching_reg);
5433 fprintf (dump_file, ":\n ");
5434 print_inline_rtx (dump_file, insn, 8);
5435 fprintf (dump_file, "\n");
5436 }
5437
5438 copy = gen_move_insn ( reg, copy_rtx (SET_SRC (pat)));
5439 new = emit_insn_before (copy, insn);
5440 record_one_set (REGNO (reg), new);
5441 SET_SRC (pat) = reg;
5442 df_insn_rescan (insn);
5443
5444 /* un-recognize this pattern since it's probably different now. */
5445 INSN_CODE (insn) = -1;
5446 gcse_create_count++;
5447 }
5448 }
5449 }
5450 \f
5451 /* Store motion code. */
5452
5453 #define ANTIC_STORE_LIST(x) ((x)->loads)
5454 #define AVAIL_STORE_LIST(x) ((x)->stores)
5455 #define LAST_AVAIL_CHECK_FAILURE(x) ((x)->reaching_reg)
5456
5457 /* This is used to communicate the target bitvector we want to use in the
5458 reg_set_info routine when called via the note_stores mechanism. */
5459 static int * regvec;
5460
5461 /* And current insn, for the same routine. */
5462 static rtx compute_store_table_current_insn;
5463
5464 /* Used in computing the reverse edge graph bit vectors. */
5465 static sbitmap * st_antloc;
5466
5467 /* Global holding the number of store expressions we are dealing with. */
5468 static int num_stores;
5469
5470 /* Checks to set if we need to mark a register set. Called from
5471 note_stores. */
5472
5473 static void
5474 reg_set_info (rtx dest, rtx setter ATTRIBUTE_UNUSED,
5475 void *data)
5476 {
5477 sbitmap bb_reg = data;
5478
5479 if (GET_CODE (dest) == SUBREG)
5480 dest = SUBREG_REG (dest);
5481
5482 if (REG_P (dest))
5483 {
5484 regvec[REGNO (dest)] = INSN_UID (compute_store_table_current_insn);
5485 if (bb_reg)
5486 SET_BIT (bb_reg, REGNO (dest));
5487 }
5488 }
5489
5490 /* Clear any mark that says that this insn sets dest. Called from
5491 note_stores. */
5492
5493 static void
5494 reg_clear_last_set (rtx dest, rtx setter ATTRIBUTE_UNUSED,
5495 void *data)
5496 {
5497 int *dead_vec = data;
5498
5499 if (GET_CODE (dest) == SUBREG)
5500 dest = SUBREG_REG (dest);
5501
5502 if (REG_P (dest) &&
5503 dead_vec[REGNO (dest)] == INSN_UID (compute_store_table_current_insn))
5504 dead_vec[REGNO (dest)] = 0;
5505 }
5506
5507 /* Return zero if some of the registers in list X are killed
5508 due to set of registers in bitmap REGS_SET. */
5509
5510 static bool
5511 store_ops_ok (rtx x, int *regs_set)
5512 {
5513 rtx reg;
5514
5515 for (; x; x = XEXP (x, 1))
5516 {
5517 reg = XEXP (x, 0);
5518 if (regs_set[REGNO(reg)])
5519 return false;
5520 }
5521
5522 return true;
5523 }
5524
5525 /* Returns a list of registers mentioned in X. */
5526 static rtx
5527 extract_mentioned_regs (rtx x)
5528 {
5529 return extract_mentioned_regs_helper (x, NULL_RTX);
5530 }
5531
5532 /* Helper for extract_mentioned_regs; ACCUM is used to accumulate used
5533 registers. */
5534 static rtx
5535 extract_mentioned_regs_helper (rtx x, rtx accum)
5536 {
5537 int i;
5538 enum rtx_code code;
5539 const char * fmt;
5540
5541 /* Repeat is used to turn tail-recursion into iteration. */
5542 repeat:
5543
5544 if (x == 0)
5545 return accum;
5546
5547 code = GET_CODE (x);
5548 switch (code)
5549 {
5550 case REG:
5551 return alloc_EXPR_LIST (0, x, accum);
5552
5553 case MEM:
5554 x = XEXP (x, 0);
5555 goto repeat;
5556
5557 case PRE_DEC:
5558 case PRE_INC:
5559 case PRE_MODIFY:
5560 case POST_DEC:
5561 case POST_INC:
5562 case POST_MODIFY:
5563 /* We do not run this function with arguments having side effects. */
5564 gcc_unreachable ();
5565
5566 case PC:
5567 case CC0: /*FIXME*/
5568 case CONST:
5569 case CONST_INT:
5570 case CONST_DOUBLE:
5571 case CONST_VECTOR:
5572 case SYMBOL_REF:
5573 case LABEL_REF:
5574 case ADDR_VEC:
5575 case ADDR_DIFF_VEC:
5576 return accum;
5577
5578 default:
5579 break;
5580 }
5581
5582 i = GET_RTX_LENGTH (code) - 1;
5583 fmt = GET_RTX_FORMAT (code);
5584
5585 for (; i >= 0; i--)
5586 {
5587 if (fmt[i] == 'e')
5588 {
5589 rtx tem = XEXP (x, i);
5590
5591 /* If we are about to do the last recursive call
5592 needed at this level, change it into iteration. */
5593 if (i == 0)
5594 {
5595 x = tem;
5596 goto repeat;
5597 }
5598
5599 accum = extract_mentioned_regs_helper (tem, accum);
5600 }
5601 else if (fmt[i] == 'E')
5602 {
5603 int j;
5604
5605 for (j = 0; j < XVECLEN (x, i); j++)
5606 accum = extract_mentioned_regs_helper (XVECEXP (x, i, j), accum);
5607 }
5608 }
5609
5610 return accum;
5611 }
5612
5613 /* Determine whether INSN is MEM store pattern that we will consider moving.
5614 REGS_SET_BEFORE is bitmap of registers set before (and including) the
5615 current insn, REGS_SET_AFTER is bitmap of registers set after (and
5616 including) the insn in this basic block. We must be passing through BB from
5617 head to end, as we are using this fact to speed things up.
5618
5619 The results are stored this way:
5620
5621 -- the first anticipatable expression is added into ANTIC_STORE_LIST
5622 -- if the processed expression is not anticipatable, NULL_RTX is added
5623 there instead, so that we can use it as indicator that no further
5624 expression of this type may be anticipatable
5625 -- if the expression is available, it is added as head of AVAIL_STORE_LIST;
5626 consequently, all of them but this head are dead and may be deleted.
5627 -- if the expression is not available, the insn due to that it fails to be
5628 available is stored in reaching_reg.
5629
5630 The things are complicated a bit by fact that there already may be stores
5631 to the same MEM from other blocks; also caller must take care of the
5632 necessary cleanup of the temporary markers after end of the basic block.
5633 */
5634
5635 static void
5636 find_moveable_store (rtx insn, int *regs_set_before, int *regs_set_after)
5637 {
5638 struct ls_expr * ptr;
5639 rtx dest, set, tmp;
5640 int check_anticipatable, check_available;
5641 basic_block bb = BLOCK_FOR_INSN (insn);
5642
5643 set = single_set (insn);
5644 if (!set)
5645 return;
5646
5647 dest = SET_DEST (set);
5648
5649 if (! MEM_P (dest) || MEM_VOLATILE_P (dest)
5650 || GET_MODE (dest) == BLKmode)
5651 return;
5652
5653 if (side_effects_p (dest))
5654 return;
5655
5656 /* If we are handling exceptions, we must be careful with memory references
5657 that may trap. If we are not, the behavior is undefined, so we may just
5658 continue. */
5659 if (flag_non_call_exceptions && may_trap_p (dest))
5660 return;
5661
5662 /* Even if the destination cannot trap, the source may. In this case we'd
5663 need to handle updating the REG_EH_REGION note. */
5664 if (find_reg_note (insn, REG_EH_REGION, NULL_RTX))
5665 return;
5666
5667 /* Make sure that the SET_SRC of this store insns can be assigned to
5668 a register, or we will fail later on in replace_store_insn, which
5669 assumes that we can do this. But sometimes the target machine has
5670 oddities like MEM read-modify-write instruction. See for example
5671 PR24257. */
5672 if (!can_assign_to_reg_p (SET_SRC (set)))
5673 return;
5674
5675 ptr = ldst_entry (dest);
5676 if (!ptr->pattern_regs)
5677 ptr->pattern_regs = extract_mentioned_regs (dest);
5678
5679 /* Do not check for anticipatability if we either found one anticipatable
5680 store already, or tested for one and found out that it was killed. */
5681 check_anticipatable = 0;
5682 if (!ANTIC_STORE_LIST (ptr))
5683 check_anticipatable = 1;
5684 else
5685 {
5686 tmp = XEXP (ANTIC_STORE_LIST (ptr), 0);
5687 if (tmp != NULL_RTX
5688 && BLOCK_FOR_INSN (tmp) != bb)
5689 check_anticipatable = 1;
5690 }
5691 if (check_anticipatable)
5692 {
5693 if (store_killed_before (dest, ptr->pattern_regs, insn, bb, regs_set_before))
5694 tmp = NULL_RTX;
5695 else
5696 tmp = insn;
5697 ANTIC_STORE_LIST (ptr) = alloc_INSN_LIST (tmp,
5698 ANTIC_STORE_LIST (ptr));
5699 }
5700
5701 /* It is not necessary to check whether store is available if we did
5702 it successfully before; if we failed before, do not bother to check
5703 until we reach the insn that caused us to fail. */
5704 check_available = 0;
5705 if (!AVAIL_STORE_LIST (ptr))
5706 check_available = 1;
5707 else
5708 {
5709 tmp = XEXP (AVAIL_STORE_LIST (ptr), 0);
5710 if (BLOCK_FOR_INSN (tmp) != bb)
5711 check_available = 1;
5712 }
5713 if (check_available)
5714 {
5715 /* Check that we have already reached the insn at that the check
5716 failed last time. */
5717 if (LAST_AVAIL_CHECK_FAILURE (ptr))
5718 {
5719 for (tmp = BB_END (bb);
5720 tmp != insn && tmp != LAST_AVAIL_CHECK_FAILURE (ptr);
5721 tmp = PREV_INSN (tmp))
5722 continue;
5723 if (tmp == insn)
5724 check_available = 0;
5725 }
5726 else
5727 check_available = store_killed_after (dest, ptr->pattern_regs, insn,
5728 bb, regs_set_after,
5729 &LAST_AVAIL_CHECK_FAILURE (ptr));
5730 }
5731 if (!check_available)
5732 AVAIL_STORE_LIST (ptr) = alloc_INSN_LIST (insn, AVAIL_STORE_LIST (ptr));
5733 }
5734
5735 /* Find available and anticipatable stores. */
5736
5737 static int
5738 compute_store_table (void)
5739 {
5740 int ret;
5741 basic_block bb;
5742 unsigned regno;
5743 rtx insn, pat, tmp;
5744 int *last_set_in, *already_set;
5745 struct ls_expr * ptr, **prev_next_ptr_ptr;
5746
5747 max_gcse_regno = max_reg_num ();
5748
5749 reg_set_in_block = sbitmap_vector_alloc (last_basic_block,
5750 max_gcse_regno);
5751 sbitmap_vector_zero (reg_set_in_block, last_basic_block);
5752 pre_ldst_mems = 0;
5753 pre_ldst_table = htab_create (13, pre_ldst_expr_hash,
5754 pre_ldst_expr_eq, NULL);
5755 last_set_in = XCNEWVEC (int, max_gcse_regno);
5756 already_set = XNEWVEC (int, max_gcse_regno);
5757
5758 /* Find all the stores we care about. */
5759 FOR_EACH_BB (bb)
5760 {
5761 /* First compute the registers set in this block. */
5762 regvec = last_set_in;
5763
5764 FOR_BB_INSNS (bb, insn)
5765 {
5766 if (! INSN_P (insn))
5767 continue;
5768
5769 if (CALL_P (insn))
5770 {
5771 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
5772 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno))
5773 {
5774 last_set_in[regno] = INSN_UID (insn);
5775 SET_BIT (reg_set_in_block[bb->index], regno);
5776 }
5777 }
5778
5779 pat = PATTERN (insn);
5780 compute_store_table_current_insn = insn;
5781 note_stores (pat, reg_set_info, reg_set_in_block[bb->index]);
5782 }
5783
5784 /* Now find the stores. */
5785 memset (already_set, 0, sizeof (int) * max_gcse_regno);
5786 regvec = already_set;
5787 FOR_BB_INSNS (bb, insn)
5788 {
5789 if (! INSN_P (insn))
5790 continue;
5791
5792 if (CALL_P (insn))
5793 {
5794 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
5795 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno))
5796 already_set[regno] = 1;
5797 }
5798
5799 pat = PATTERN (insn);
5800 note_stores (pat, reg_set_info, NULL);
5801
5802 /* Now that we've marked regs, look for stores. */
5803 find_moveable_store (insn, already_set, last_set_in);
5804
5805 /* Unmark regs that are no longer set. */
5806 compute_store_table_current_insn = insn;
5807 note_stores (pat, reg_clear_last_set, last_set_in);
5808 if (CALL_P (insn))
5809 {
5810 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
5811 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno)
5812 && last_set_in[regno] == INSN_UID (insn))
5813 last_set_in[regno] = 0;
5814 }
5815 }
5816
5817 #ifdef ENABLE_CHECKING
5818 /* last_set_in should now be all-zero. */
5819 for (regno = 0; regno < max_gcse_regno; regno++)
5820 gcc_assert (!last_set_in[regno]);
5821 #endif
5822
5823 /* Clear temporary marks. */
5824 for (ptr = first_ls_expr (); ptr != NULL; ptr = next_ls_expr (ptr))
5825 {
5826 LAST_AVAIL_CHECK_FAILURE(ptr) = NULL_RTX;
5827 if (ANTIC_STORE_LIST (ptr)
5828 && (tmp = XEXP (ANTIC_STORE_LIST (ptr), 0)) == NULL_RTX)
5829 ANTIC_STORE_LIST (ptr) = XEXP (ANTIC_STORE_LIST (ptr), 1);
5830 }
5831 }
5832
5833 /* Remove the stores that are not available anywhere, as there will
5834 be no opportunity to optimize them. */
5835 for (ptr = pre_ldst_mems, prev_next_ptr_ptr = &pre_ldst_mems;
5836 ptr != NULL;
5837 ptr = *prev_next_ptr_ptr)
5838 {
5839 if (!AVAIL_STORE_LIST (ptr))
5840 {
5841 *prev_next_ptr_ptr = ptr->next;
5842 htab_remove_elt_with_hash (pre_ldst_table, ptr, ptr->hash_index);
5843 free_ldst_entry (ptr);
5844 }
5845 else
5846 prev_next_ptr_ptr = &ptr->next;
5847 }
5848
5849 ret = enumerate_ldsts ();
5850
5851 if (dump_file)
5852 {
5853 fprintf (dump_file, "ST_avail and ST_antic (shown under loads..)\n");
5854 print_ldst_list (dump_file);
5855 }
5856
5857 free (last_set_in);
5858 free (already_set);
5859 return ret;
5860 }
5861
5862 /* Check to see if the load X is aliased with STORE_PATTERN.
5863 AFTER is true if we are checking the case when STORE_PATTERN occurs
5864 after the X. */
5865
5866 static bool
5867 load_kills_store (rtx x, rtx store_pattern, int after)
5868 {
5869 if (after)
5870 return anti_dependence (x, store_pattern);
5871 else
5872 return true_dependence (store_pattern, GET_MODE (store_pattern), x,
5873 rtx_addr_varies_p);
5874 }
5875
5876 /* Go through the entire insn X, looking for any loads which might alias
5877 STORE_PATTERN. Return true if found.
5878 AFTER is true if we are checking the case when STORE_PATTERN occurs
5879 after the insn X. */
5880
5881 static bool
5882 find_loads (rtx x, rtx store_pattern, int after)
5883 {
5884 const char * fmt;
5885 int i, j;
5886 int ret = false;
5887
5888 if (!x)
5889 return false;
5890
5891 if (GET_CODE (x) == SET)
5892 x = SET_SRC (x);
5893
5894 if (MEM_P (x))
5895 {
5896 if (load_kills_store (x, store_pattern, after))
5897 return true;
5898 }
5899
5900 /* Recursively process the insn. */
5901 fmt = GET_RTX_FORMAT (GET_CODE (x));
5902
5903 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0 && !ret; i--)
5904 {
5905 if (fmt[i] == 'e')
5906 ret |= find_loads (XEXP (x, i), store_pattern, after);
5907 else if (fmt[i] == 'E')
5908 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
5909 ret |= find_loads (XVECEXP (x, i, j), store_pattern, after);
5910 }
5911 return ret;
5912 }
5913
5914 static inline bool
5915 store_killed_in_pat (rtx x, rtx pat, int after)
5916 {
5917 if (GET_CODE (pat) == SET)
5918 {
5919 rtx dest = SET_DEST (pat);
5920
5921 if (GET_CODE (dest) == ZERO_EXTRACT)
5922 dest = XEXP (dest, 0);
5923
5924 /* Check for memory stores to aliased objects. */
5925 if (MEM_P (dest)
5926 && !expr_equiv_p (dest, x))
5927 {
5928 if (after)
5929 {
5930 if (output_dependence (dest, x))
5931 return true;
5932 }
5933 else
5934 {
5935 if (output_dependence (x, dest))
5936 return true;
5937 }
5938 }
5939 }
5940
5941 if (find_loads (pat, x, after))
5942 return true;
5943
5944 return false;
5945 }
5946
5947 /* Check if INSN kills the store pattern X (is aliased with it).
5948 AFTER is true if we are checking the case when store X occurs
5949 after the insn. Return true if it does. */
5950
5951 static bool
5952 store_killed_in_insn (rtx x, rtx x_regs, rtx insn, int after)
5953 {
5954 rtx reg, base, note, pat;
5955
5956 if (!INSN_P (insn))
5957 return false;
5958
5959 if (CALL_P (insn))
5960 {
5961 /* A normal or pure call might read from pattern,
5962 but a const call will not. */
5963 if (! CONST_OR_PURE_CALL_P (insn) || pure_call_p (insn))
5964 return true;
5965
5966 /* But even a const call reads its parameters. Check whether the
5967 base of some of registers used in mem is stack pointer. */
5968 for (reg = x_regs; reg; reg = XEXP (reg, 1))
5969 {
5970 base = find_base_term (XEXP (reg, 0));
5971 if (!base
5972 || (GET_CODE (base) == ADDRESS
5973 && GET_MODE (base) == Pmode
5974 && XEXP (base, 0) == stack_pointer_rtx))
5975 return true;
5976 }
5977
5978 return false;
5979 }
5980
5981 pat = PATTERN (insn);
5982 if (GET_CODE (pat) == SET)
5983 {
5984 if (store_killed_in_pat (x, pat, after))
5985 return true;
5986 }
5987 else if (GET_CODE (pat) == PARALLEL)
5988 {
5989 int i;
5990
5991 for (i = 0; i < XVECLEN (pat, 0); i++)
5992 if (store_killed_in_pat (x, XVECEXP (pat, 0, i), after))
5993 return true;
5994 }
5995 else if (find_loads (PATTERN (insn), x, after))
5996 return true;
5997
5998 /* If this insn has a REG_EQUAL or REG_EQUIV note referencing a memory
5999 location aliased with X, then this insn kills X. */
6000 note = find_reg_equal_equiv_note (insn);
6001 if (! note)
6002 return false;
6003 note = XEXP (note, 0);
6004
6005 /* However, if the note represents a must alias rather than a may
6006 alias relationship, then it does not kill X. */
6007 if (expr_equiv_p (note, x))
6008 return false;
6009
6010 /* See if there are any aliased loads in the note. */
6011 return find_loads (note, x, after);
6012 }
6013
6014 /* Returns true if the expression X is loaded or clobbered on or after INSN
6015 within basic block BB. REGS_SET_AFTER is bitmap of registers set in
6016 or after the insn. X_REGS is list of registers mentioned in X. If the store
6017 is killed, return the last insn in that it occurs in FAIL_INSN. */
6018
6019 static bool
6020 store_killed_after (rtx x, rtx x_regs, rtx insn, basic_block bb,
6021 int *regs_set_after, rtx *fail_insn)
6022 {
6023 rtx last = BB_END (bb), act;
6024
6025 if (!store_ops_ok (x_regs, regs_set_after))
6026 {
6027 /* We do not know where it will happen. */
6028 if (fail_insn)
6029 *fail_insn = NULL_RTX;
6030 return true;
6031 }
6032
6033 /* Scan from the end, so that fail_insn is determined correctly. */
6034 for (act = last; act != PREV_INSN (insn); act = PREV_INSN (act))
6035 if (store_killed_in_insn (x, x_regs, act, false))
6036 {
6037 if (fail_insn)
6038 *fail_insn = act;
6039 return true;
6040 }
6041
6042 return false;
6043 }
6044
6045 /* Returns true if the expression X is loaded or clobbered on or before INSN
6046 within basic block BB. X_REGS is list of registers mentioned in X.
6047 REGS_SET_BEFORE is bitmap of registers set before or in this insn. */
6048 static bool
6049 store_killed_before (rtx x, rtx x_regs, rtx insn, basic_block bb,
6050 int *regs_set_before)
6051 {
6052 rtx first = BB_HEAD (bb);
6053
6054 if (!store_ops_ok (x_regs, regs_set_before))
6055 return true;
6056
6057 for ( ; insn != PREV_INSN (first); insn = PREV_INSN (insn))
6058 if (store_killed_in_insn (x, x_regs, insn, true))
6059 return true;
6060
6061 return false;
6062 }
6063
6064 /* Fill in available, anticipatable, transparent and kill vectors in
6065 STORE_DATA, based on lists of available and anticipatable stores. */
6066 static void
6067 build_store_vectors (void)
6068 {
6069 basic_block bb;
6070 int *regs_set_in_block;
6071 rtx insn, st;
6072 struct ls_expr * ptr;
6073 unsigned regno;
6074
6075 /* Build the gen_vector. This is any store in the table which is not killed
6076 by aliasing later in its block. */
6077 ae_gen = sbitmap_vector_alloc (last_basic_block, num_stores);
6078 sbitmap_vector_zero (ae_gen, last_basic_block);
6079
6080 st_antloc = sbitmap_vector_alloc (last_basic_block, num_stores);
6081 sbitmap_vector_zero (st_antloc, last_basic_block);
6082
6083 for (ptr = first_ls_expr (); ptr != NULL; ptr = next_ls_expr (ptr))
6084 {
6085 for (st = AVAIL_STORE_LIST (ptr); st != NULL; st = XEXP (st, 1))
6086 {
6087 insn = XEXP (st, 0);
6088 bb = BLOCK_FOR_INSN (insn);
6089
6090 /* If we've already seen an available expression in this block,
6091 we can delete this one (It occurs earlier in the block). We'll
6092 copy the SRC expression to an unused register in case there
6093 are any side effects. */
6094 if (TEST_BIT (ae_gen[bb->index], ptr->index))
6095 {
6096 rtx r = gen_reg_rtx (GET_MODE (ptr->pattern));
6097 if (dump_file)
6098 fprintf (dump_file, "Removing redundant store:\n");
6099 replace_store_insn (r, XEXP (st, 0), bb, ptr);
6100 continue;
6101 }
6102 SET_BIT (ae_gen[bb->index], ptr->index);
6103 }
6104
6105 for (st = ANTIC_STORE_LIST (ptr); st != NULL; st = XEXP (st, 1))
6106 {
6107 insn = XEXP (st, 0);
6108 bb = BLOCK_FOR_INSN (insn);
6109 SET_BIT (st_antloc[bb->index], ptr->index);
6110 }
6111 }
6112
6113 ae_kill = sbitmap_vector_alloc (last_basic_block, num_stores);
6114 sbitmap_vector_zero (ae_kill, last_basic_block);
6115
6116 transp = sbitmap_vector_alloc (last_basic_block, num_stores);
6117 sbitmap_vector_zero (transp, last_basic_block);
6118 regs_set_in_block = XNEWVEC (int, max_gcse_regno);
6119
6120 FOR_EACH_BB (bb)
6121 {
6122 for (regno = 0; regno < max_gcse_regno; regno++)
6123 regs_set_in_block[regno] = TEST_BIT (reg_set_in_block[bb->index], regno);
6124
6125 for (ptr = first_ls_expr (); ptr != NULL; ptr = next_ls_expr (ptr))
6126 {
6127 if (store_killed_after (ptr->pattern, ptr->pattern_regs, BB_HEAD (bb),
6128 bb, regs_set_in_block, NULL))
6129 {
6130 /* It should not be necessary to consider the expression
6131 killed if it is both anticipatable and available. */
6132 if (!TEST_BIT (st_antloc[bb->index], ptr->index)
6133 || !TEST_BIT (ae_gen[bb->index], ptr->index))
6134 SET_BIT (ae_kill[bb->index], ptr->index);
6135 }
6136 else
6137 SET_BIT (transp[bb->index], ptr->index);
6138 }
6139 }
6140
6141 free (regs_set_in_block);
6142
6143 if (dump_file)
6144 {
6145 dump_sbitmap_vector (dump_file, "st_antloc", "", st_antloc, last_basic_block);
6146 dump_sbitmap_vector (dump_file, "st_kill", "", ae_kill, last_basic_block);
6147 dump_sbitmap_vector (dump_file, "Transpt", "", transp, last_basic_block);
6148 dump_sbitmap_vector (dump_file, "st_avloc", "", ae_gen, last_basic_block);
6149 }
6150 }
6151
6152 /* Insert an instruction at the beginning of a basic block, and update
6153 the BB_HEAD if needed. */
6154
6155 static void
6156 insert_insn_start_basic_block (rtx insn, basic_block bb)
6157 {
6158 /* Insert at start of successor block. */
6159 rtx prev = PREV_INSN (BB_HEAD (bb));
6160 rtx before = BB_HEAD (bb);
6161 while (before != 0)
6162 {
6163 if (! LABEL_P (before)
6164 && !NOTE_INSN_BASIC_BLOCK_P (before))
6165 break;
6166 prev = before;
6167 if (prev == BB_END (bb))
6168 break;
6169 before = NEXT_INSN (before);
6170 }
6171
6172 insn = emit_insn_after_noloc (insn, prev, bb);
6173
6174 if (dump_file)
6175 {
6176 fprintf (dump_file, "STORE_MOTION insert store at start of BB %d:\n",
6177 bb->index);
6178 print_inline_rtx (dump_file, insn, 6);
6179 fprintf (dump_file, "\n");
6180 }
6181 }
6182
6183 /* This routine will insert a store on an edge. EXPR is the ldst entry for
6184 the memory reference, and E is the edge to insert it on. Returns nonzero
6185 if an edge insertion was performed. */
6186
6187 static int
6188 insert_store (struct ls_expr * expr, edge e)
6189 {
6190 rtx reg, insn;
6191 basic_block bb;
6192 edge tmp;
6193 edge_iterator ei;
6194
6195 /* We did all the deleted before this insert, so if we didn't delete a
6196 store, then we haven't set the reaching reg yet either. */
6197 if (expr->reaching_reg == NULL_RTX)
6198 return 0;
6199
6200 if (e->flags & EDGE_FAKE)
6201 return 0;
6202
6203 reg = expr->reaching_reg;
6204 insn = gen_move_insn (copy_rtx (expr->pattern), reg);
6205
6206 /* If we are inserting this expression on ALL predecessor edges of a BB,
6207 insert it at the start of the BB, and reset the insert bits on the other
6208 edges so we don't try to insert it on the other edges. */
6209 bb = e->dest;
6210 FOR_EACH_EDGE (tmp, ei, e->dest->preds)
6211 if (!(tmp->flags & EDGE_FAKE))
6212 {
6213 int index = EDGE_INDEX (edge_list, tmp->src, tmp->dest);
6214
6215 gcc_assert (index != EDGE_INDEX_NO_EDGE);
6216 if (! TEST_BIT (pre_insert_map[index], expr->index))
6217 break;
6218 }
6219
6220 /* If tmp is NULL, we found an insertion on every edge, blank the
6221 insertion vector for these edges, and insert at the start of the BB. */
6222 if (!tmp && bb != EXIT_BLOCK_PTR)
6223 {
6224 FOR_EACH_EDGE (tmp, ei, e->dest->preds)
6225 {
6226 int index = EDGE_INDEX (edge_list, tmp->src, tmp->dest);
6227 RESET_BIT (pre_insert_map[index], expr->index);
6228 }
6229 insert_insn_start_basic_block (insn, bb);
6230 return 0;
6231 }
6232
6233 /* We can't put stores in the front of blocks pointed to by abnormal
6234 edges since that may put a store where one didn't used to be. */
6235 gcc_assert (!(e->flags & EDGE_ABNORMAL));
6236
6237 insert_insn_on_edge (insn, e);
6238
6239 if (dump_file)
6240 {
6241 fprintf (dump_file, "STORE_MOTION insert insn on edge (%d, %d):\n",
6242 e->src->index, e->dest->index);
6243 print_inline_rtx (dump_file, insn, 6);
6244 fprintf (dump_file, "\n");
6245 }
6246
6247 return 1;
6248 }
6249
6250 /* Remove any REG_EQUAL or REG_EQUIV notes containing a reference to the
6251 memory location in SMEXPR set in basic block BB.
6252
6253 This could be rather expensive. */
6254
6255 static void
6256 remove_reachable_equiv_notes (basic_block bb, struct ls_expr *smexpr)
6257 {
6258 edge_iterator *stack, ei;
6259 int sp;
6260 edge act;
6261 sbitmap visited = sbitmap_alloc (last_basic_block);
6262 rtx last, insn, note;
6263 rtx mem = smexpr->pattern;
6264
6265 stack = XNEWVEC (edge_iterator, n_basic_blocks);
6266 sp = 0;
6267 ei = ei_start (bb->succs);
6268
6269 sbitmap_zero (visited);
6270
6271 act = (EDGE_COUNT (ei_container (ei)) > 0 ? EDGE_I (ei_container (ei), 0) : NULL);
6272 while (1)
6273 {
6274 if (!act)
6275 {
6276 if (!sp)
6277 {
6278 free (stack);
6279 sbitmap_free (visited);
6280 return;
6281 }
6282 act = ei_edge (stack[--sp]);
6283 }
6284 bb = act->dest;
6285
6286 if (bb == EXIT_BLOCK_PTR
6287 || TEST_BIT (visited, bb->index))
6288 {
6289 if (!ei_end_p (ei))
6290 ei_next (&ei);
6291 act = (! ei_end_p (ei)) ? ei_edge (ei) : NULL;
6292 continue;
6293 }
6294 SET_BIT (visited, bb->index);
6295
6296 if (TEST_BIT (st_antloc[bb->index], smexpr->index))
6297 {
6298 for (last = ANTIC_STORE_LIST (smexpr);
6299 BLOCK_FOR_INSN (XEXP (last, 0)) != bb;
6300 last = XEXP (last, 1))
6301 continue;
6302 last = XEXP (last, 0);
6303 }
6304 else
6305 last = NEXT_INSN (BB_END (bb));
6306
6307 for (insn = BB_HEAD (bb); insn != last; insn = NEXT_INSN (insn))
6308 if (INSN_P (insn))
6309 {
6310 note = find_reg_equal_equiv_note (insn);
6311 if (!note || !expr_equiv_p (XEXP (note, 0), mem))
6312 continue;
6313
6314 if (dump_file)
6315 fprintf (dump_file, "STORE_MOTION drop REG_EQUAL note at insn %d:\n",
6316 INSN_UID (insn));
6317 remove_note (insn, note);
6318 }
6319
6320 if (!ei_end_p (ei))
6321 ei_next (&ei);
6322 act = (! ei_end_p (ei)) ? ei_edge (ei) : NULL;
6323
6324 if (EDGE_COUNT (bb->succs) > 0)
6325 {
6326 if (act)
6327 stack[sp++] = ei;
6328 ei = ei_start (bb->succs);
6329 act = (EDGE_COUNT (ei_container (ei)) > 0 ? EDGE_I (ei_container (ei), 0) : NULL);
6330 }
6331 }
6332 }
6333
6334 /* This routine will replace a store with a SET to a specified register. */
6335
6336 static void
6337 replace_store_insn (rtx reg, rtx del, basic_block bb, struct ls_expr *smexpr)
6338 {
6339 rtx insn, mem, note, set, ptr, pair;
6340
6341 mem = smexpr->pattern;
6342 insn = gen_move_insn (reg, SET_SRC (single_set (del)));
6343
6344 for (ptr = ANTIC_STORE_LIST (smexpr); ptr; ptr = XEXP (ptr, 1))
6345 if (XEXP (ptr, 0) == del)
6346 {
6347 XEXP (ptr, 0) = insn;
6348 break;
6349 }
6350
6351 /* Move the notes from the deleted insn to its replacement, and patch
6352 up the LIBCALL notes. */
6353 REG_NOTES (insn) = REG_NOTES (del);
6354
6355 note = find_reg_note (insn, REG_RETVAL, NULL_RTX);
6356 if (note)
6357 {
6358 pair = XEXP (note, 0);
6359 note = find_reg_note (pair, REG_LIBCALL, NULL_RTX);
6360 XEXP (note, 0) = insn;
6361 }
6362 note = find_reg_note (insn, REG_LIBCALL, NULL_RTX);
6363 if (note)
6364 {
6365 pair = XEXP (note, 0);
6366 note = find_reg_note (pair, REG_RETVAL, NULL_RTX);
6367 XEXP (note, 0) = insn;
6368 }
6369
6370 /* Emit the insn AFTER all the notes are transferred.
6371 This is cheaper since we avoid df rescanning for the note change. */
6372 insn = emit_insn_after (insn, del);
6373
6374 if (dump_file)
6375 {
6376 fprintf (dump_file,
6377 "STORE_MOTION delete insn in BB %d:\n ", bb->index);
6378 print_inline_rtx (dump_file, del, 6);
6379 fprintf (dump_file, "\nSTORE MOTION replaced with insn:\n ");
6380 print_inline_rtx (dump_file, insn, 6);
6381 fprintf (dump_file, "\n");
6382 }
6383
6384 delete_insn (del);
6385
6386 /* Now we must handle REG_EQUAL notes whose contents is equal to the mem;
6387 they are no longer accurate provided that they are reached by this
6388 definition, so drop them. */
6389 for (; insn != NEXT_INSN (BB_END (bb)); insn = NEXT_INSN (insn))
6390 if (INSN_P (insn))
6391 {
6392 set = single_set (insn);
6393 if (!set)
6394 continue;
6395 if (expr_equiv_p (SET_DEST (set), mem))
6396 return;
6397 note = find_reg_equal_equiv_note (insn);
6398 if (!note || !expr_equiv_p (XEXP (note, 0), mem))
6399 continue;
6400
6401 if (dump_file)
6402 fprintf (dump_file, "STORE_MOTION drop REG_EQUAL note at insn %d:\n",
6403 INSN_UID (insn));
6404 remove_note (insn, note);
6405 }
6406 remove_reachable_equiv_notes (bb, smexpr);
6407 }
6408
6409
6410 /* Delete a store, but copy the value that would have been stored into
6411 the reaching_reg for later storing. */
6412
6413 static void
6414 delete_store (struct ls_expr * expr, basic_block bb)
6415 {
6416 rtx reg, i, del;
6417
6418 if (expr->reaching_reg == NULL_RTX)
6419 expr->reaching_reg = gen_reg_rtx (GET_MODE (expr->pattern));
6420
6421 reg = expr->reaching_reg;
6422
6423 for (i = AVAIL_STORE_LIST (expr); i; i = XEXP (i, 1))
6424 {
6425 del = XEXP (i, 0);
6426 if (BLOCK_FOR_INSN (del) == bb)
6427 {
6428 /* We know there is only one since we deleted redundant
6429 ones during the available computation. */
6430 replace_store_insn (reg, del, bb, expr);
6431 break;
6432 }
6433 }
6434 }
6435
6436 /* Free memory used by store motion. */
6437
6438 static void
6439 free_store_memory (void)
6440 {
6441 free_ldst_mems ();
6442
6443 if (ae_gen)
6444 sbitmap_vector_free (ae_gen);
6445 if (ae_kill)
6446 sbitmap_vector_free (ae_kill);
6447 if (transp)
6448 sbitmap_vector_free (transp);
6449 if (st_antloc)
6450 sbitmap_vector_free (st_antloc);
6451 if (pre_insert_map)
6452 sbitmap_vector_free (pre_insert_map);
6453 if (pre_delete_map)
6454 sbitmap_vector_free (pre_delete_map);
6455 if (reg_set_in_block)
6456 sbitmap_vector_free (reg_set_in_block);
6457
6458 ae_gen = ae_kill = transp = st_antloc = NULL;
6459 pre_insert_map = pre_delete_map = reg_set_in_block = NULL;
6460 }
6461
6462 /* Perform store motion. Much like gcse, except we move expressions the
6463 other way by looking at the flowgraph in reverse. */
6464
6465 static void
6466 store_motion (void)
6467 {
6468 basic_block bb;
6469 int x;
6470 struct ls_expr * ptr;
6471 int update_flow = 0;
6472
6473 if (dump_file)
6474 {
6475 fprintf (dump_file, "before store motion\n");
6476 print_rtl (dump_file, get_insns ());
6477 }
6478
6479 init_alias_analysis ();
6480
6481 /* Find all the available and anticipatable stores. */
6482 num_stores = compute_store_table ();
6483 if (num_stores == 0)
6484 {
6485 htab_delete (pre_ldst_table);
6486 pre_ldst_table = NULL;
6487 sbitmap_vector_free (reg_set_in_block);
6488 end_alias_analysis ();
6489 return;
6490 }
6491
6492 /* Now compute kill & transp vectors. */
6493 build_store_vectors ();
6494 add_noreturn_fake_exit_edges ();
6495 connect_infinite_loops_to_exit ();
6496
6497 edge_list = pre_edge_rev_lcm (num_stores, transp, ae_gen,
6498 st_antloc, ae_kill, &pre_insert_map,
6499 &pre_delete_map);
6500
6501 /* Now we want to insert the new stores which are going to be needed. */
6502 for (ptr = first_ls_expr (); ptr != NULL; ptr = next_ls_expr (ptr))
6503 {
6504 /* If any of the edges we have above are abnormal, we can't move this
6505 store. */
6506 for (x = NUM_EDGES (edge_list) - 1; x >= 0; x--)
6507 if (TEST_BIT (pre_insert_map[x], ptr->index)
6508 && (INDEX_EDGE (edge_list, x)->flags & EDGE_ABNORMAL))
6509 break;
6510
6511 if (x >= 0)
6512 {
6513 if (dump_file != NULL)
6514 fprintf (dump_file,
6515 "Can't replace store %d: abnormal edge from %d to %d\n",
6516 ptr->index, INDEX_EDGE (edge_list, x)->src->index,
6517 INDEX_EDGE (edge_list, x)->dest->index);
6518 continue;
6519 }
6520
6521 /* Now we want to insert the new stores which are going to be needed. */
6522
6523 FOR_EACH_BB (bb)
6524 if (TEST_BIT (pre_delete_map[bb->index], ptr->index))
6525 delete_store (ptr, bb);
6526
6527 for (x = 0; x < NUM_EDGES (edge_list); x++)
6528 if (TEST_BIT (pre_insert_map[x], ptr->index))
6529 update_flow |= insert_store (ptr, INDEX_EDGE (edge_list, x));
6530 }
6531
6532 if (update_flow)
6533 commit_edge_insertions ();
6534
6535 free_store_memory ();
6536 free_edge_list (edge_list);
6537 remove_fake_exit_edges ();
6538 end_alias_analysis ();
6539 }
6540
6541 \f
6542 /* Entry point for jump bypassing optimization pass. */
6543
6544 static int
6545 bypass_jumps (void)
6546 {
6547 int changed;
6548
6549 /* We do not construct an accurate cfg in functions which call
6550 setjmp, so just punt to be safe. */
6551 if (current_function_calls_setjmp)
6552 return 0;
6553
6554 /* Identify the basic block information for this function, including
6555 successors and predecessors. */
6556 max_gcse_regno = max_reg_num ();
6557
6558 if (dump_file)
6559 dump_flow_info (dump_file, dump_flags);
6560
6561 /* Return if there's nothing to do, or it is too expensive. */
6562 if (n_basic_blocks <= NUM_FIXED_BLOCKS + 1
6563 || is_too_expensive (_ ("jump bypassing disabled")))
6564 return 0;
6565
6566 gcc_obstack_init (&gcse_obstack);
6567 bytes_used = 0;
6568
6569 /* We need alias. */
6570 init_alias_analysis ();
6571
6572 /* Record where pseudo-registers are set. This data is kept accurate
6573 during each pass. ??? We could also record hard-reg information here
6574 [since it's unchanging], however it is currently done during hash table
6575 computation.
6576
6577 It may be tempting to compute MEM set information here too, but MEM sets
6578 will be subject to code motion one day and thus we need to compute
6579 information about memory sets when we build the hash tables. */
6580
6581 alloc_reg_set_mem (max_gcse_regno);
6582 compute_sets ();
6583
6584 max_gcse_regno = max_reg_num ();
6585 alloc_gcse_mem ();
6586 changed = one_cprop_pass (MAX_GCSE_PASSES + 2, true, true);
6587 free_gcse_mem ();
6588
6589 if (dump_file)
6590 {
6591 fprintf (dump_file, "BYPASS of %s: %d basic blocks, ",
6592 current_function_name (), n_basic_blocks);
6593 fprintf (dump_file, "%d bytes\n\n", bytes_used);
6594 }
6595
6596 obstack_free (&gcse_obstack, NULL);
6597 free_reg_set_mem ();
6598
6599 /* We are finished with alias. */
6600 end_alias_analysis ();
6601
6602 return changed;
6603 }
6604
6605 /* Return true if the graph is too expensive to optimize. PASS is the
6606 optimization about to be performed. */
6607
6608 static bool
6609 is_too_expensive (const char *pass)
6610 {
6611 /* Trying to perform global optimizations on flow graphs which have
6612 a high connectivity will take a long time and is unlikely to be
6613 particularly useful.
6614
6615 In normal circumstances a cfg should have about twice as many
6616 edges as blocks. But we do not want to punish small functions
6617 which have a couple switch statements. Rather than simply
6618 threshold the number of blocks, uses something with a more
6619 graceful degradation. */
6620 if (n_edges > 20000 + n_basic_blocks * 4)
6621 {
6622 warning (OPT_Wdisabled_optimization,
6623 "%s: %d basic blocks and %d edges/basic block",
6624 pass, n_basic_blocks, n_edges / n_basic_blocks);
6625
6626 return true;
6627 }
6628
6629 /* If allocating memory for the cprop bitmap would take up too much
6630 storage it's better just to disable the optimization. */
6631 if ((n_basic_blocks
6632 * SBITMAP_SET_SIZE (max_reg_num ())
6633 * sizeof (SBITMAP_ELT_TYPE)) > MAX_GCSE_MEMORY)
6634 {
6635 warning (OPT_Wdisabled_optimization,
6636 "%s: %d basic blocks and %d registers",
6637 pass, n_basic_blocks, max_reg_num ());
6638
6639 return true;
6640 }
6641
6642 return false;
6643 }
6644 \f
6645 static bool
6646 gate_handle_jump_bypass (void)
6647 {
6648 return optimize > 0 && flag_gcse;
6649 }
6650
6651 /* Perform jump bypassing and control flow optimizations. */
6652 static unsigned int
6653 rest_of_handle_jump_bypass (void)
6654 {
6655 delete_unreachable_blocks ();
6656 if (bypass_jumps ())
6657 {
6658 delete_trivially_dead_insns (get_insns (), max_reg_num ());
6659 rebuild_jump_labels (get_insns ());
6660 cleanup_cfg (0);
6661 }
6662 return 0;
6663 }
6664
6665 struct tree_opt_pass pass_jump_bypass =
6666 {
6667 "bypass", /* name */
6668 gate_handle_jump_bypass, /* gate */
6669 rest_of_handle_jump_bypass, /* execute */
6670 NULL, /* sub */
6671 NULL, /* next */
6672 0, /* static_pass_number */
6673 TV_BYPASS, /* tv_id */
6674 0, /* properties_required */
6675 0, /* properties_provided */
6676 0, /* properties_destroyed */
6677 0, /* todo_flags_start */
6678 TODO_dump_func |
6679 TODO_ggc_collect | TODO_verify_flow, /* todo_flags_finish */
6680 'G' /* letter */
6681 };
6682
6683
6684 static bool
6685 gate_handle_gcse (void)
6686 {
6687 return optimize > 0 && flag_gcse;
6688 }
6689
6690
6691 static unsigned int
6692 rest_of_handle_gcse (void)
6693 {
6694 int save_csb, save_cfj;
6695 int tem2 = 0, tem;
6696 tem = gcse_main (get_insns ());
6697 delete_trivially_dead_insns (get_insns (), max_reg_num ());
6698 rebuild_jump_labels (get_insns ());
6699 save_csb = flag_cse_skip_blocks;
6700 save_cfj = flag_cse_follow_jumps;
6701 flag_cse_skip_blocks = flag_cse_follow_jumps = 0;
6702
6703 /* If -fexpensive-optimizations, re-run CSE to clean up things done
6704 by gcse. */
6705 if (flag_expensive_optimizations)
6706 {
6707 timevar_push (TV_CSE);
6708 tem2 = cse_main (get_insns (), max_reg_num ());
6709 df_finish_pass ();
6710 purge_all_dead_edges ();
6711 delete_trivially_dead_insns (get_insns (), max_reg_num ());
6712 timevar_pop (TV_CSE);
6713 cse_not_expected = !flag_rerun_cse_after_loop;
6714 }
6715
6716 /* If gcse or cse altered any jumps, rerun jump optimizations to clean
6717 things up. */
6718 if (tem || tem2)
6719 {
6720 timevar_push (TV_JUMP);
6721 rebuild_jump_labels (get_insns ());
6722 cleanup_cfg (0);
6723 timevar_pop (TV_JUMP);
6724 }
6725
6726 flag_cse_skip_blocks = save_csb;
6727 flag_cse_follow_jumps = save_cfj;
6728 return 0;
6729 }
6730
6731 struct tree_opt_pass pass_gcse =
6732 {
6733 "gcse1", /* name */
6734 gate_handle_gcse, /* gate */
6735 rest_of_handle_gcse, /* execute */
6736 NULL, /* sub */
6737 NULL, /* next */
6738 0, /* static_pass_number */
6739 TV_GCSE, /* tv_id */
6740 0, /* properties_required */
6741 0, /* properties_provided */
6742 0, /* properties_destroyed */
6743 0, /* todo_flags_start */
6744 TODO_df_finish |
6745 TODO_dump_func |
6746 TODO_verify_flow | TODO_ggc_collect, /* todo_flags_finish */
6747 'G' /* letter */
6748 };
6749
6750
6751 #include "gt-gcse.h"