genrecog.c: Use ISO C90 prototypes.
[gcc.git] / gcc / genemit.c
1 /* Generate code from machine description to emit insns as rtl.
2 Copyright (C) 1987, 1988, 1991, 1994, 1995, 1997, 1998, 1999, 2000, 2001,
3 2003 Free Software Foundation, Inc.
4
5 This file is part of GCC.
6
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
10 version.
11
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
20 02111-1307, USA. */
21
22
23 #include "bconfig.h"
24 #include "system.h"
25 #include "coretypes.h"
26 #include "tm.h"
27 #include "rtl.h"
28 #include "errors.h"
29 #include "gensupport.h"
30
31
32 static int max_opno;
33 static int max_dup_opno;
34 static int max_scratch_opno;
35 static int register_constraints;
36 static int insn_code_number;
37 static int insn_index_number;
38
39 /* Data structure for recording the patterns of insns that have CLOBBERs.
40 We use this to output a function that adds these CLOBBERs to a
41 previously-allocated PARALLEL expression. */
42
43 struct clobber_pat
44 {
45 struct clobber_ent *insns;
46 rtx pattern;
47 int first_clobber;
48 struct clobber_pat *next;
49 int has_hard_reg;
50 } *clobber_list;
51
52 /* Records one insn that uses the clobber list. */
53
54 struct clobber_ent
55 {
56 int code_number; /* Counts only insns. */
57 struct clobber_ent *next;
58 };
59
60 static void max_operand_1 (rtx);
61 static int max_operand_vec (rtx, int);
62 static void print_code (RTX_CODE);
63 static void gen_exp (rtx, enum rtx_code, char *);
64 static void gen_insn (rtx, int);
65 static void gen_expand (rtx);
66 static void gen_split (rtx);
67 static void output_add_clobbers (void);
68 static void output_added_clobbers_hard_reg_p (void);
69 static void gen_rtx_scratch (rtx, enum rtx_code);
70 static void output_peephole2_scratches (rtx);
71
72 \f
73 static void
74 max_operand_1 (rtx x)
75 {
76 RTX_CODE code;
77 int i;
78 int len;
79 const char *fmt;
80
81 if (x == 0)
82 return;
83
84 code = GET_CODE (x);
85
86 if (code == MATCH_OPERAND && XSTR (x, 2) != 0 && *XSTR (x, 2) != '\0')
87 register_constraints = 1;
88 if (code == MATCH_SCRATCH && XSTR (x, 1) != 0 && *XSTR (x, 1) != '\0')
89 register_constraints = 1;
90 if (code == MATCH_OPERAND || code == MATCH_OPERATOR
91 || code == MATCH_PARALLEL)
92 max_opno = MAX (max_opno, XINT (x, 0));
93 if (code == MATCH_DUP || code == MATCH_OP_DUP || code == MATCH_PAR_DUP)
94 max_dup_opno = MAX (max_dup_opno, XINT (x, 0));
95 if (code == MATCH_SCRATCH)
96 max_scratch_opno = MAX (max_scratch_opno, XINT (x, 0));
97
98 fmt = GET_RTX_FORMAT (code);
99 len = GET_RTX_LENGTH (code);
100 for (i = 0; i < len; i++)
101 {
102 if (fmt[i] == 'e' || fmt[i] == 'u')
103 max_operand_1 (XEXP (x, i));
104 else if (fmt[i] == 'E')
105 {
106 int j;
107 for (j = 0; j < XVECLEN (x, i); j++)
108 max_operand_1 (XVECEXP (x, i, j));
109 }
110 }
111 }
112
113 static int
114 max_operand_vec (rtx insn, int arg)
115 {
116 int len = XVECLEN (insn, arg);
117 int i;
118
119 max_opno = -1;
120 max_dup_opno = -1;
121 max_scratch_opno = -1;
122
123 for (i = 0; i < len; i++)
124 max_operand_1 (XVECEXP (insn, arg, i));
125
126 return max_opno + 1;
127 }
128 \f
129 static void
130 print_code (RTX_CODE code)
131 {
132 const char *p1;
133 for (p1 = GET_RTX_NAME (code); *p1; p1++)
134 putchar (TOUPPER(*p1));
135 }
136
137 static void
138 gen_rtx_scratch (rtx x, enum rtx_code subroutine_type)
139 {
140 if (subroutine_type == DEFINE_PEEPHOLE2)
141 {
142 printf ("operand%d", XINT (x, 0));
143 }
144 else
145 {
146 printf ("gen_rtx_SCRATCH (%smode)", GET_MODE_NAME (GET_MODE (x)));
147 }
148 }
149
150 /* Print a C expression to construct an RTX just like X,
151 substituting any operand references appearing within. */
152
153 static void
154 gen_exp (rtx x, enum rtx_code subroutine_type, char *used)
155 {
156 RTX_CODE code;
157 int i;
158 int len;
159 const char *fmt;
160
161 if (x == 0)
162 {
163 printf ("NULL_RTX");
164 return;
165 }
166
167 code = GET_CODE (x);
168
169 switch (code)
170 {
171 case MATCH_OPERAND:
172 case MATCH_DUP:
173 if (used)
174 {
175 if (used[XINT (x, 0)])
176 {
177 printf ("copy_rtx (operand%d)", XINT (x, 0));
178 return;
179 }
180 used[XINT (x, 0)] = 1;
181 }
182 printf ("operand%d", XINT (x, 0));
183 return;
184
185 case MATCH_OP_DUP:
186 printf ("gen_rtx (GET_CODE (operand%d), ", XINT (x, 0));
187 if (GET_MODE (x) == VOIDmode)
188 printf ("GET_MODE (operand%d)", XINT (x, 0));
189 else
190 printf ("%smode", GET_MODE_NAME (GET_MODE (x)));
191 for (i = 0; i < XVECLEN (x, 1); i++)
192 {
193 printf (",\n\t\t");
194 gen_exp (XVECEXP (x, 1, i), subroutine_type, used);
195 }
196 printf (")");
197 return;
198
199 case MATCH_OPERATOR:
200 printf ("gen_rtx (GET_CODE (operand%d)", XINT (x, 0));
201 printf (", %smode", GET_MODE_NAME (GET_MODE (x)));
202 for (i = 0; i < XVECLEN (x, 2); i++)
203 {
204 printf (",\n\t\t");
205 gen_exp (XVECEXP (x, 2, i), subroutine_type, used);
206 }
207 printf (")");
208 return;
209
210 case MATCH_PARALLEL:
211 case MATCH_PAR_DUP:
212 printf ("operand%d", XINT (x, 0));
213 return;
214
215 case MATCH_SCRATCH:
216 gen_rtx_scratch (x, subroutine_type);
217 return;
218
219 case ADDRESS:
220 fatal ("ADDRESS expression code used in named instruction pattern");
221
222 case PC:
223 printf ("pc_rtx");
224 return;
225
226 case CC0:
227 printf ("cc0_rtx");
228 return;
229
230 case CONST_INT:
231 if (INTVAL (x) == 0)
232 printf ("const0_rtx");
233 else if (INTVAL (x) == 1)
234 printf ("const1_rtx");
235 else if (INTVAL (x) == -1)
236 printf ("constm1_rtx");
237 else if (INTVAL (x) == STORE_FLAG_VALUE)
238 printf ("const_true_rtx");
239 else
240 {
241 printf ("GEN_INT (");
242 printf (HOST_WIDE_INT_PRINT_DEC_C, INTVAL (x));
243 printf (")");
244 }
245 return;
246
247 case CONST_DOUBLE:
248 /* These shouldn't be written in MD files. Instead, the appropriate
249 routines in varasm.c should be called. */
250 abort ();
251
252 default:
253 break;
254 }
255
256 printf ("gen_rtx_");
257 print_code (code);
258 printf (" (%smode", GET_MODE_NAME (GET_MODE (x)));
259
260 fmt = GET_RTX_FORMAT (code);
261 len = GET_RTX_LENGTH (code);
262 for (i = 0; i < len; i++)
263 {
264 if (fmt[i] == '0')
265 break;
266 printf (",\n\t");
267 if (fmt[i] == 'e' || fmt[i] == 'u')
268 gen_exp (XEXP (x, i), subroutine_type, used);
269 else if (fmt[i] == 'i')
270 printf ("%u", XINT (x, i));
271 else if (fmt[i] == 's')
272 printf ("\"%s\"", XSTR (x, i));
273 else if (fmt[i] == 'E')
274 {
275 int j;
276 printf ("gen_rtvec (%d", XVECLEN (x, i));
277 for (j = 0; j < XVECLEN (x, i); j++)
278 {
279 printf (",\n\t\t");
280 gen_exp (XVECEXP (x, i, j), subroutine_type, used);
281 }
282 printf (")");
283 }
284 else
285 abort ();
286 }
287 printf (")");
288 }
289 \f
290 /* Generate the `gen_...' function for a DEFINE_INSN. */
291
292 static void
293 gen_insn (rtx insn, int lineno)
294 {
295 int operands;
296 int i;
297
298 /* See if the pattern for this insn ends with a group of CLOBBERs of (hard)
299 registers or MATCH_SCRATCHes. If so, store away the information for
300 later. */
301
302 if (XVEC (insn, 1))
303 {
304 int has_hard_reg = 0;
305
306 for (i = XVECLEN (insn, 1) - 1; i > 0; i--)
307 {
308 if (GET_CODE (XVECEXP (insn, 1, i)) != CLOBBER)
309 break;
310
311 if (GET_CODE (XEXP (XVECEXP (insn, 1, i), 0)) == REG)
312 has_hard_reg = 1;
313 else if (GET_CODE (XEXP (XVECEXP (insn, 1, i), 0)) != MATCH_SCRATCH)
314 break;
315 }
316
317 if (i != XVECLEN (insn, 1) - 1)
318 {
319 struct clobber_pat *p;
320 struct clobber_ent *link
321 = (struct clobber_ent *) xmalloc (sizeof (struct clobber_ent));
322 int j;
323
324 link->code_number = insn_code_number;
325
326 /* See if any previous CLOBBER_LIST entry is the same as this
327 one. */
328
329 for (p = clobber_list; p; p = p->next)
330 {
331 if (p->first_clobber != i + 1
332 || XVECLEN (p->pattern, 1) != XVECLEN (insn, 1))
333 continue;
334
335 for (j = i + 1; j < XVECLEN (insn, 1); j++)
336 {
337 rtx old = XEXP (XVECEXP (p->pattern, 1, j), 0);
338 rtx new = XEXP (XVECEXP (insn, 1, j), 0);
339
340 /* OLD and NEW are the same if both are to be a SCRATCH
341 of the same mode,
342 or if both are registers of the same mode and number. */
343 if (! (GET_MODE (old) == GET_MODE (new)
344 && ((GET_CODE (old) == MATCH_SCRATCH
345 && GET_CODE (new) == MATCH_SCRATCH)
346 || (GET_CODE (old) == REG && GET_CODE (new) == REG
347 && REGNO (old) == REGNO (new)))))
348 break;
349 }
350
351 if (j == XVECLEN (insn, 1))
352 break;
353 }
354
355 if (p == 0)
356 {
357 p = (struct clobber_pat *) xmalloc (sizeof (struct clobber_pat));
358
359 p->insns = 0;
360 p->pattern = insn;
361 p->first_clobber = i + 1;
362 p->next = clobber_list;
363 p->has_hard_reg = has_hard_reg;
364 clobber_list = p;
365 }
366
367 link->next = p->insns;
368 p->insns = link;
369 }
370 }
371
372 /* Don't mention instructions whose names are the null string
373 or begin with '*'. They are in the machine description just
374 to be recognized. */
375 if (XSTR (insn, 0)[0] == 0 || XSTR (insn, 0)[0] == '*')
376 return;
377
378 printf ("/* %s:%d */\n", read_rtx_filename, lineno);
379
380 /* Find out how many operands this function has,
381 and also whether any of them have register constraints. */
382 register_constraints = 0;
383 operands = max_operand_vec (insn, 1);
384 if (max_dup_opno >= operands)
385 fatal ("match_dup operand number has no match_operand");
386
387 /* Output the function name and argument declarations. */
388 printf ("rtx\ngen_%s (", XSTR (insn, 0));
389 for (i = 0; i < operands; i++)
390 if (i)
391 printf (", operand%d", i);
392 else
393 printf ("operand%d", i);
394 printf (")\n");
395 for (i = 0; i < operands; i++)
396 printf (" rtx operand%d ATTRIBUTE_UNUSED;\n", i);
397 printf ("{\n");
398
399 /* Output code to construct and return the rtl for the instruction body */
400
401 if (XVECLEN (insn, 1) == 1)
402 {
403 printf (" return ");
404 gen_exp (XVECEXP (insn, 1, 0), DEFINE_INSN, NULL);
405 printf (";\n}\n\n");
406 }
407 else
408 {
409 printf (" return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (%d",
410 XVECLEN (insn, 1));
411
412 for (i = 0; i < XVECLEN (insn, 1); i++)
413 {
414 printf (",\n\t\t");
415 gen_exp (XVECEXP (insn, 1, i), DEFINE_INSN, NULL);
416 }
417 printf ("));\n}\n\n");
418 }
419 }
420 \f
421 /* Generate the `gen_...' function for a DEFINE_EXPAND. */
422
423 static void
424 gen_expand (rtx expand)
425 {
426 int operands;
427 int i;
428
429 if (strlen (XSTR (expand, 0)) == 0)
430 fatal ("define_expand lacks a name");
431 if (XVEC (expand, 1) == 0)
432 fatal ("define_expand for %s lacks a pattern", XSTR (expand, 0));
433
434 /* Find out how many operands this function has,
435 and also whether any of them have register constraints. */
436 register_constraints = 0;
437
438 operands = max_operand_vec (expand, 1);
439
440 /* Output the function name and argument declarations. */
441 printf ("rtx\ngen_%s (", XSTR (expand, 0));
442 for (i = 0; i < operands; i++)
443 if (i)
444 printf (", operand%d", i);
445 else
446 printf ("operand%d", i);
447 printf (")\n");
448 for (i = 0; i < operands; i++)
449 printf (" rtx operand%d;\n", i);
450 printf ("{\n");
451
452 /* If we don't have any C code to write, only one insn is being written,
453 and no MATCH_DUPs are present, we can just return the desired insn
454 like we do for a DEFINE_INSN. This saves memory. */
455 if ((XSTR (expand, 3) == 0 || *XSTR (expand, 3) == '\0')
456 && operands > max_dup_opno
457 && XVECLEN (expand, 1) == 1)
458 {
459 printf (" return ");
460 gen_exp (XVECEXP (expand, 1, 0), DEFINE_EXPAND, NULL);
461 printf (";\n}\n\n");
462 return;
463 }
464
465 /* For each operand referred to only with MATCH_DUPs,
466 make a local variable. */
467 for (i = operands; i <= max_dup_opno; i++)
468 printf (" rtx operand%d;\n", i);
469 for (; i <= max_scratch_opno; i++)
470 printf (" rtx operand%d ATTRIBUTE_UNUSED;\n", i);
471 printf (" rtx _val = 0;\n");
472 printf (" start_sequence ();\n");
473
474 /* The fourth operand of DEFINE_EXPAND is some code to be executed
475 before the actual construction.
476 This code expects to refer to `operands'
477 just as the output-code in a DEFINE_INSN does,
478 but here `operands' is an automatic array.
479 So copy the operand values there before executing it. */
480 if (XSTR (expand, 3) && *XSTR (expand, 3))
481 {
482 printf (" {\n");
483 if (operands > 0 || max_dup_opno >= 0 || max_scratch_opno >= 0)
484 printf (" rtx operands[%d];\n",
485 MAX (operands, MAX (max_scratch_opno, max_dup_opno) + 1));
486 /* Output code to copy the arguments into `operands'. */
487 for (i = 0; i < operands; i++)
488 printf (" operands[%d] = operand%d;\n", i, i);
489
490 /* Output the special code to be executed before the sequence
491 is generated. */
492 printf ("%s\n", XSTR (expand, 3));
493
494 /* Output code to copy the arguments back out of `operands'
495 (unless we aren't going to use them at all). */
496 if (XVEC (expand, 1) != 0)
497 {
498 for (i = 0; i < operands; i++)
499 printf (" operand%d = operands[%d];\n", i, i);
500 for (; i <= max_dup_opno; i++)
501 printf (" operand%d = operands[%d];\n", i, i);
502 for (; i <= max_scratch_opno; i++)
503 printf (" operand%d = operands[%d];\n", i, i);
504 }
505 printf (" }\n");
506 }
507
508 /* Output code to construct the rtl for the instruction bodies.
509 Use emit_insn to add them to the sequence being accumulated.
510 But don't do this if the user's code has set `no_more' nonzero. */
511
512 for (i = 0; i < XVECLEN (expand, 1); i++)
513 {
514 rtx next = XVECEXP (expand, 1, i);
515 if ((GET_CODE (next) == SET && GET_CODE (SET_DEST (next)) == PC)
516 || (GET_CODE (next) == PARALLEL
517 && ((GET_CODE (XVECEXP (next, 0, 0)) == SET
518 && GET_CODE (SET_DEST (XVECEXP (next, 0, 0))) == PC)
519 || GET_CODE (XVECEXP (next, 0, 0)) == RETURN))
520 || GET_CODE (next) == RETURN)
521 printf (" emit_jump_insn (");
522 else if ((GET_CODE (next) == SET && GET_CODE (SET_SRC (next)) == CALL)
523 || GET_CODE (next) == CALL
524 || (GET_CODE (next) == PARALLEL
525 && GET_CODE (XVECEXP (next, 0, 0)) == SET
526 && GET_CODE (SET_SRC (XVECEXP (next, 0, 0))) == CALL)
527 || (GET_CODE (next) == PARALLEL
528 && GET_CODE (XVECEXP (next, 0, 0)) == CALL))
529 printf (" emit_call_insn (");
530 else if (GET_CODE (next) == CODE_LABEL)
531 printf (" emit_label (");
532 else if (GET_CODE (next) == MATCH_OPERAND
533 || GET_CODE (next) == MATCH_DUP
534 || GET_CODE (next) == MATCH_OPERATOR
535 || GET_CODE (next) == MATCH_OP_DUP
536 || GET_CODE (next) == MATCH_PARALLEL
537 || GET_CODE (next) == MATCH_PAR_DUP
538 || GET_CODE (next) == PARALLEL)
539 printf (" emit (");
540 else
541 printf (" emit_insn (");
542 gen_exp (next, DEFINE_EXPAND, NULL);
543 printf (");\n");
544 if (GET_CODE (next) == SET && GET_CODE (SET_DEST (next)) == PC
545 && GET_CODE (SET_SRC (next)) == LABEL_REF)
546 printf (" emit_barrier ();");
547 }
548
549 /* Call `get_insns' to extract the list of all the
550 insns emitted within this gen_... function. */
551
552 printf (" _val = get_insns ();\n");
553 printf (" end_sequence ();\n");
554 printf (" return _val;\n}\n\n");
555 }
556
557 /* Like gen_expand, but generates insns resulting from splitting SPLIT. */
558
559 static void
560 gen_split (rtx split)
561 {
562 int i;
563 int operands;
564 const char *const name =
565 ((GET_CODE (split) == DEFINE_PEEPHOLE2) ? "peephole2" : "split");
566 const char *unused;
567 char *used;
568
569 if (XVEC (split, 0) == 0)
570 fatal ("define_%s (definition %d) lacks a pattern", name,
571 insn_index_number);
572 else if (XVEC (split, 2) == 0)
573 fatal ("define_%s (definition %d) lacks a replacement pattern", name,
574 insn_index_number);
575
576 /* Find out how many operands this function has. */
577
578 max_operand_vec (split, 2);
579 operands = MAX (max_opno, MAX (max_dup_opno, max_scratch_opno)) + 1;
580 unused = (operands == 0 ? " ATTRIBUTE_UNUSED" : "");
581 used = xcalloc (1, operands);
582
583 /* Output the prototype, function name and argument declarations. */
584 if (GET_CODE (split) == DEFINE_PEEPHOLE2)
585 {
586 printf ("extern rtx gen_%s_%d (rtx, rtx *);\n",
587 name, insn_code_number);
588 printf ("rtx\ngen_%s_%d (curr_insn, operands)\n",
589 name, insn_code_number);
590 printf (" rtx curr_insn ATTRIBUTE_UNUSED;\n");
591 printf (" rtx *operands%s;\n", unused);
592 }
593 else
594 {
595 printf ("extern rtx gen_split_%d (rtx *);\n", insn_code_number);
596 printf ("rtx\ngen_%s_%d (operands)\n", name, insn_code_number);
597 printf (" rtx *operands%s;\n", unused);
598 }
599 printf ("{\n");
600
601 /* Declare all local variables. */
602 for (i = 0; i < operands; i++)
603 printf (" rtx operand%d;\n", i);
604 printf (" rtx _val = 0;\n");
605
606 if (GET_CODE (split) == DEFINE_PEEPHOLE2)
607 output_peephole2_scratches (split);
608
609 printf (" start_sequence ();\n");
610
611 /* The fourth operand of DEFINE_SPLIT is some code to be executed
612 before the actual construction. */
613
614 if (XSTR (split, 3))
615 printf ("%s\n", XSTR (split, 3));
616
617 /* Output code to copy the arguments back out of `operands' */
618 for (i = 0; i < operands; i++)
619 printf (" operand%d = operands[%d];\n", i, i);
620
621 /* Output code to construct the rtl for the instruction bodies.
622 Use emit_insn to add them to the sequence being accumulated.
623 But don't do this if the user's code has set `no_more' nonzero. */
624
625 for (i = 0; i < XVECLEN (split, 2); i++)
626 {
627 rtx next = XVECEXP (split, 2, i);
628 if ((GET_CODE (next) == SET && GET_CODE (SET_DEST (next)) == PC)
629 || (GET_CODE (next) == PARALLEL
630 && GET_CODE (XVECEXP (next, 0, 0)) == SET
631 && GET_CODE (SET_DEST (XVECEXP (next, 0, 0))) == PC)
632 || GET_CODE (next) == RETURN)
633 printf (" emit_jump_insn (");
634 else if ((GET_CODE (next) == SET && GET_CODE (SET_SRC (next)) == CALL)
635 || GET_CODE (next) == CALL
636 || (GET_CODE (next) == PARALLEL
637 && GET_CODE (XVECEXP (next, 0, 0)) == SET
638 && GET_CODE (SET_SRC (XVECEXP (next, 0, 0))) == CALL)
639 || (GET_CODE (next) == PARALLEL
640 && GET_CODE (XVECEXP (next, 0, 0)) == CALL))
641 printf (" emit_call_insn (");
642 else if (GET_CODE (next) == CODE_LABEL)
643 printf (" emit_label (");
644 else if (GET_CODE (next) == MATCH_OPERAND
645 || GET_CODE (next) == MATCH_OPERATOR
646 || GET_CODE (next) == MATCH_PARALLEL
647 || GET_CODE (next) == MATCH_OP_DUP
648 || GET_CODE (next) == MATCH_DUP
649 || GET_CODE (next) == PARALLEL)
650 printf (" emit (");
651 else
652 printf (" emit_insn (");
653 gen_exp (next, GET_CODE (split), used);
654 printf (");\n");
655 if (GET_CODE (next) == SET && GET_CODE (SET_DEST (next)) == PC
656 && GET_CODE (SET_SRC (next)) == LABEL_REF)
657 printf (" emit_barrier ();");
658 }
659
660 /* Call `get_insns' to make a list of all the
661 insns emitted within this gen_... function. */
662
663 printf (" _val = get_insns ();\n");
664 printf (" end_sequence ();\n");
665 printf (" return _val;\n}\n\n");
666
667 free (used);
668 }
669 \f
670 /* Write a function, `add_clobbers', that is given a PARALLEL of sufficient
671 size for the insn and an INSN_CODE, and inserts the required CLOBBERs at
672 the end of the vector. */
673
674 static void
675 output_add_clobbers ()
676 {
677 struct clobber_pat *clobber;
678 struct clobber_ent *ent;
679 int i;
680
681 printf ("\n\nvoid\nadd_clobbers (pattern, insn_code_number)\n");
682 printf (" rtx pattern ATTRIBUTE_UNUSED;\n int insn_code_number;\n");
683 printf ("{\n");
684 printf (" switch (insn_code_number)\n");
685 printf (" {\n");
686
687 for (clobber = clobber_list; clobber; clobber = clobber->next)
688 {
689 for (ent = clobber->insns; ent; ent = ent->next)
690 printf (" case %d:\n", ent->code_number);
691
692 for (i = clobber->first_clobber; i < XVECLEN (clobber->pattern, 1); i++)
693 {
694 printf (" XVECEXP (pattern, 0, %d) = ", i);
695 gen_exp (XVECEXP (clobber->pattern, 1, i),
696 GET_CODE (clobber->pattern), NULL);
697 printf (";\n");
698 }
699
700 printf (" break;\n\n");
701 }
702
703 printf (" default:\n");
704 printf (" abort ();\n");
705 printf (" }\n");
706 printf ("}\n");
707 }
708 \f
709 /* Write a function, `added_clobbers_hard_reg_p' this is given an insn_code
710 number that needs clobbers and returns 1 if they include a clobber of a
711 hard reg and 0 if they just clobber SCRATCH. */
712
713 static void
714 output_added_clobbers_hard_reg_p (void)
715 {
716 struct clobber_pat *clobber;
717 struct clobber_ent *ent;
718 int clobber_p, used;
719
720 printf ("\n\nint\nadded_clobbers_hard_reg_p (insn_code_number)\n");
721 printf (" int insn_code_number;\n");
722 printf ("{\n");
723 printf (" switch (insn_code_number)\n");
724 printf (" {\n");
725
726 for (clobber_p = 0; clobber_p <= 1; clobber_p++)
727 {
728 used = 0;
729 for (clobber = clobber_list; clobber; clobber = clobber->next)
730 if (clobber->has_hard_reg == clobber_p)
731 for (ent = clobber->insns; ent; ent = ent->next)
732 {
733 printf (" case %d:\n", ent->code_number);
734 used++;
735 }
736
737 if (used)
738 printf (" return %d;\n\n", clobber_p);
739 }
740
741 printf (" default:\n");
742 printf (" abort ();\n");
743 printf (" }\n");
744 printf ("}\n");
745 }
746 \f
747 /* Generate code to invoke find_free_register () as needed for the
748 scratch registers used by the peephole2 pattern in SPLIT. */
749
750 static void
751 output_peephole2_scratches (rtx split)
752 {
753 int i;
754 int insn_nr = 0;
755
756 printf (" HARD_REG_SET _regs_allocated;\n");
757 printf (" CLEAR_HARD_REG_SET (_regs_allocated);\n");
758
759 for (i = 0; i < XVECLEN (split, 0); i++)
760 {
761 rtx elt = XVECEXP (split, 0, i);
762 if (GET_CODE (elt) == MATCH_SCRATCH)
763 {
764 int last_insn_nr = insn_nr;
765 int cur_insn_nr = insn_nr;
766 int j;
767 for (j = i + 1; j < XVECLEN (split, 0); j++)
768 if (GET_CODE (XVECEXP (split, 0, j)) == MATCH_DUP)
769 {
770 if (XINT (XVECEXP (split, 0, j), 0) == XINT (elt, 0))
771 last_insn_nr = cur_insn_nr;
772 }
773 else if (GET_CODE (XVECEXP (split, 0, j)) != MATCH_SCRATCH)
774 cur_insn_nr++;
775
776 printf (" if ((operands[%d] = peep2_find_free_register (%d, %d, \"%s\", %smode, &_regs_allocated)) == NULL_RTX)\n\
777 return NULL;\n",
778 XINT (elt, 0),
779 insn_nr, last_insn_nr,
780 XSTR (elt, 1),
781 GET_MODE_NAME (GET_MODE (elt)));
782
783 }
784 else if (GET_CODE (elt) != MATCH_DUP)
785 insn_nr++;
786 }
787 }
788
789 int
790 main (int argc, char **argv)
791 {
792 rtx desc;
793
794 progname = "genemit";
795
796 if (argc <= 1)
797 fatal ("no input file name");
798
799 if (init_md_reader_args (argc, argv) != SUCCESS_EXIT_CODE)
800 return (FATAL_EXIT_CODE);
801
802 /* Assign sequential codes to all entries in the machine description
803 in parallel with the tables in insn-output.c. */
804
805 insn_code_number = 0;
806 insn_index_number = 0;
807
808 printf ("/* Generated automatically by the program `genemit'\n\
809 from the machine description file `md'. */\n\n");
810
811 printf ("#include \"config.h\"\n");
812 printf ("#include \"system.h\"\n");
813 printf ("#include \"coretypes.h\"\n");
814 printf ("#include \"tm.h\"\n");
815 printf ("#include \"rtl.h\"\n");
816 printf ("#include \"tm_p.h\"\n");
817 printf ("#include \"function.h\"\n");
818 printf ("#include \"expr.h\"\n");
819 printf ("#include \"optabs.h\"\n");
820 printf ("#include \"real.h\"\n");
821 printf ("#include \"flags.h\"\n");
822 printf ("#include \"output.h\"\n");
823 printf ("#include \"insn-config.h\"\n");
824 printf ("#include \"hard-reg-set.h\"\n");
825 printf ("#include \"recog.h\"\n");
826 printf ("#include \"resource.h\"\n");
827 printf ("#include \"reload.h\"\n");
828 printf ("#include \"toplev.h\"\n");
829 printf ("#include \"ggc.h\"\n\n");
830 printf ("#define FAIL return (end_sequence (), _val)\n");
831 printf ("#define DONE return (_val = get_insns (), end_sequence (), _val)\n\n");
832
833 /* Read the machine description. */
834
835 while (1)
836 {
837 int line_no;
838
839 desc = read_md_rtx (&line_no, &insn_code_number);
840 if (desc == NULL)
841 break;
842
843 switch (GET_CODE (desc))
844 {
845 case DEFINE_INSN:
846 gen_insn (desc, line_no);
847 break;
848
849 case DEFINE_EXPAND:
850 printf ("/* %s:%d */\n", read_rtx_filename, line_no);
851 gen_expand (desc);
852 break;
853
854 case DEFINE_SPLIT:
855 printf ("/* %s:%d */\n", read_rtx_filename, line_no);
856 gen_split (desc);
857 break;
858
859 case DEFINE_PEEPHOLE2:
860 printf ("/* %s:%d */\n", read_rtx_filename, line_no);
861 gen_split (desc);
862 break;
863
864 default:
865 break;
866 }
867 ++insn_index_number;
868 }
869
870 /* Write out the routines to add CLOBBERs to a pattern and say whether they
871 clobber a hard reg. */
872 output_add_clobbers ();
873 output_added_clobbers_hard_reg_p ();
874
875 fflush (stdout);
876 return (ferror (stdout) != 0 ? FATAL_EXIT_CODE : SUCCESS_EXIT_CODE);
877 }
878
879 /* Define this so we can link with print-rtl.o to get debug_rtx function. */
880 const char *
881 get_insn_name (int code ATTRIBUTE_UNUSED)
882 {
883 return NULL;
884 }