genattr.c (internal_dfa_insn_code): Output prototype.
[gcc.git] / gcc / genemit.c
1 /* Generate code from machine description to emit insns as rtl.
2 Copyright (C) 1987, 1988, 1991, 1994, 1995, 1997, 1998, 1999, 2000, 2001,
3 2003 Free Software Foundation, Inc.
4
5 This file is part of GCC.
6
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
10 version.
11
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
20 02111-1307, USA. */
21
22
23 #include "bconfig.h"
24 #include "system.h"
25 #include "coretypes.h"
26 #include "tm.h"
27 #include "rtl.h"
28 #include "errors.h"
29 #include "gensupport.h"
30
31
32 static int max_opno;
33 static int max_dup_opno;
34 static int max_scratch_opno;
35 static int register_constraints;
36 static int insn_code_number;
37 static int insn_index_number;
38
39 /* Data structure for recording the patterns of insns that have CLOBBERs.
40 We use this to output a function that adds these CLOBBERs to a
41 previously-allocated PARALLEL expression. */
42
43 struct clobber_pat
44 {
45 struct clobber_ent *insns;
46 rtx pattern;
47 int first_clobber;
48 struct clobber_pat *next;
49 int has_hard_reg;
50 } *clobber_list;
51
52 /* Records one insn that uses the clobber list. */
53
54 struct clobber_ent
55 {
56 int code_number; /* Counts only insns. */
57 struct clobber_ent *next;
58 };
59
60 static void max_operand_1 (rtx);
61 static int max_operand_vec (rtx, int);
62 static void print_code (RTX_CODE);
63 static void gen_exp (rtx, enum rtx_code, char *);
64 static void gen_insn (rtx, int);
65 static void gen_expand (rtx);
66 static void gen_split (rtx);
67 static void output_add_clobbers (void);
68 static void output_added_clobbers_hard_reg_p (void);
69 static void gen_rtx_scratch (rtx, enum rtx_code);
70 static void output_peephole2_scratches (rtx);
71
72 \f
73 static void
74 max_operand_1 (rtx x)
75 {
76 RTX_CODE code;
77 int i;
78 int len;
79 const char *fmt;
80
81 if (x == 0)
82 return;
83
84 code = GET_CODE (x);
85
86 if (code == MATCH_OPERAND && XSTR (x, 2) != 0 && *XSTR (x, 2) != '\0')
87 register_constraints = 1;
88 if (code == MATCH_SCRATCH && XSTR (x, 1) != 0 && *XSTR (x, 1) != '\0')
89 register_constraints = 1;
90 if (code == MATCH_OPERAND || code == MATCH_OPERATOR
91 || code == MATCH_PARALLEL)
92 max_opno = MAX (max_opno, XINT (x, 0));
93 if (code == MATCH_DUP || code == MATCH_OP_DUP || code == MATCH_PAR_DUP)
94 max_dup_opno = MAX (max_dup_opno, XINT (x, 0));
95 if (code == MATCH_SCRATCH)
96 max_scratch_opno = MAX (max_scratch_opno, XINT (x, 0));
97
98 fmt = GET_RTX_FORMAT (code);
99 len = GET_RTX_LENGTH (code);
100 for (i = 0; i < len; i++)
101 {
102 if (fmt[i] == 'e' || fmt[i] == 'u')
103 max_operand_1 (XEXP (x, i));
104 else if (fmt[i] == 'E')
105 {
106 int j;
107 for (j = 0; j < XVECLEN (x, i); j++)
108 max_operand_1 (XVECEXP (x, i, j));
109 }
110 }
111 }
112
113 static int
114 max_operand_vec (rtx insn, int arg)
115 {
116 int len = XVECLEN (insn, arg);
117 int i;
118
119 max_opno = -1;
120 max_dup_opno = -1;
121 max_scratch_opno = -1;
122
123 for (i = 0; i < len; i++)
124 max_operand_1 (XVECEXP (insn, arg, i));
125
126 return max_opno + 1;
127 }
128 \f
129 static void
130 print_code (RTX_CODE code)
131 {
132 const char *p1;
133 for (p1 = GET_RTX_NAME (code); *p1; p1++)
134 putchar (TOUPPER(*p1));
135 }
136
137 static void
138 gen_rtx_scratch (rtx x, enum rtx_code subroutine_type)
139 {
140 if (subroutine_type == DEFINE_PEEPHOLE2)
141 {
142 printf ("operand%d", XINT (x, 0));
143 }
144 else
145 {
146 printf ("gen_rtx_SCRATCH (%smode)", GET_MODE_NAME (GET_MODE (x)));
147 }
148 }
149
150 /* Print a C expression to construct an RTX just like X,
151 substituting any operand references appearing within. */
152
153 static void
154 gen_exp (rtx x, enum rtx_code subroutine_type, char *used)
155 {
156 RTX_CODE code;
157 int i;
158 int len;
159 const char *fmt;
160
161 if (x == 0)
162 {
163 printf ("NULL_RTX");
164 return;
165 }
166
167 code = GET_CODE (x);
168
169 switch (code)
170 {
171 case MATCH_OPERAND:
172 case MATCH_DUP:
173 if (used)
174 {
175 if (used[XINT (x, 0)])
176 {
177 printf ("copy_rtx (operand%d)", XINT (x, 0));
178 return;
179 }
180 used[XINT (x, 0)] = 1;
181 }
182 printf ("operand%d", XINT (x, 0));
183 return;
184
185 case MATCH_OP_DUP:
186 printf ("gen_rtx (GET_CODE (operand%d), ", XINT (x, 0));
187 if (GET_MODE (x) == VOIDmode)
188 printf ("GET_MODE (operand%d)", XINT (x, 0));
189 else
190 printf ("%smode", GET_MODE_NAME (GET_MODE (x)));
191 for (i = 0; i < XVECLEN (x, 1); i++)
192 {
193 printf (",\n\t\t");
194 gen_exp (XVECEXP (x, 1, i), subroutine_type, used);
195 }
196 printf (")");
197 return;
198
199 case MATCH_OPERATOR:
200 printf ("gen_rtx (GET_CODE (operand%d)", XINT (x, 0));
201 printf (", %smode", GET_MODE_NAME (GET_MODE (x)));
202 for (i = 0; i < XVECLEN (x, 2); i++)
203 {
204 printf (",\n\t\t");
205 gen_exp (XVECEXP (x, 2, i), subroutine_type, used);
206 }
207 printf (")");
208 return;
209
210 case MATCH_PARALLEL:
211 case MATCH_PAR_DUP:
212 printf ("operand%d", XINT (x, 0));
213 return;
214
215 case MATCH_SCRATCH:
216 gen_rtx_scratch (x, subroutine_type);
217 return;
218
219 case ADDRESS:
220 fatal ("ADDRESS expression code used in named instruction pattern");
221
222 case PC:
223 printf ("pc_rtx");
224 return;
225
226 case CC0:
227 printf ("cc0_rtx");
228 return;
229
230 case CONST_INT:
231 if (INTVAL (x) == 0)
232 printf ("const0_rtx");
233 else if (INTVAL (x) == 1)
234 printf ("const1_rtx");
235 else if (INTVAL (x) == -1)
236 printf ("constm1_rtx");
237 else if (INTVAL (x) == STORE_FLAG_VALUE)
238 printf ("const_true_rtx");
239 else
240 {
241 printf ("GEN_INT (");
242 printf (HOST_WIDE_INT_PRINT_DEC_C, INTVAL (x));
243 printf (")");
244 }
245 return;
246
247 case CONST_DOUBLE:
248 /* These shouldn't be written in MD files. Instead, the appropriate
249 routines in varasm.c should be called. */
250 abort ();
251
252 default:
253 break;
254 }
255
256 printf ("gen_rtx_");
257 print_code (code);
258 printf (" (%smode", GET_MODE_NAME (GET_MODE (x)));
259
260 fmt = GET_RTX_FORMAT (code);
261 len = GET_RTX_LENGTH (code);
262 for (i = 0; i < len; i++)
263 {
264 if (fmt[i] == '0')
265 break;
266 printf (",\n\t");
267 if (fmt[i] == 'e' || fmt[i] == 'u')
268 gen_exp (XEXP (x, i), subroutine_type, used);
269 else if (fmt[i] == 'i')
270 printf ("%u", XINT (x, i));
271 else if (fmt[i] == 's')
272 printf ("\"%s\"", XSTR (x, i));
273 else if (fmt[i] == 'E')
274 {
275 int j;
276 printf ("gen_rtvec (%d", XVECLEN (x, i));
277 for (j = 0; j < XVECLEN (x, i); j++)
278 {
279 printf (",\n\t\t");
280 gen_exp (XVECEXP (x, i, j), subroutine_type, used);
281 }
282 printf (")");
283 }
284 else
285 abort ();
286 }
287 printf (")");
288 }
289 \f
290 /* Generate the `gen_...' function for a DEFINE_INSN. */
291
292 static void
293 gen_insn (rtx insn, int lineno)
294 {
295 int operands;
296 int i;
297
298 /* See if the pattern for this insn ends with a group of CLOBBERs of (hard)
299 registers or MATCH_SCRATCHes. If so, store away the information for
300 later. */
301
302 if (XVEC (insn, 1))
303 {
304 int has_hard_reg = 0;
305
306 for (i = XVECLEN (insn, 1) - 1; i > 0; i--)
307 {
308 if (GET_CODE (XVECEXP (insn, 1, i)) != CLOBBER)
309 break;
310
311 if (GET_CODE (XEXP (XVECEXP (insn, 1, i), 0)) == REG)
312 has_hard_reg = 1;
313 else if (GET_CODE (XEXP (XVECEXP (insn, 1, i), 0)) != MATCH_SCRATCH)
314 break;
315 }
316
317 if (i != XVECLEN (insn, 1) - 1)
318 {
319 struct clobber_pat *p;
320 struct clobber_ent *link
321 = (struct clobber_ent *) xmalloc (sizeof (struct clobber_ent));
322 int j;
323
324 link->code_number = insn_code_number;
325
326 /* See if any previous CLOBBER_LIST entry is the same as this
327 one. */
328
329 for (p = clobber_list; p; p = p->next)
330 {
331 if (p->first_clobber != i + 1
332 || XVECLEN (p->pattern, 1) != XVECLEN (insn, 1))
333 continue;
334
335 for (j = i + 1; j < XVECLEN (insn, 1); j++)
336 {
337 rtx old = XEXP (XVECEXP (p->pattern, 1, j), 0);
338 rtx new = XEXP (XVECEXP (insn, 1, j), 0);
339
340 /* OLD and NEW are the same if both are to be a SCRATCH
341 of the same mode,
342 or if both are registers of the same mode and number. */
343 if (! (GET_MODE (old) == GET_MODE (new)
344 && ((GET_CODE (old) == MATCH_SCRATCH
345 && GET_CODE (new) == MATCH_SCRATCH)
346 || (GET_CODE (old) == REG && GET_CODE (new) == REG
347 && REGNO (old) == REGNO (new)))))
348 break;
349 }
350
351 if (j == XVECLEN (insn, 1))
352 break;
353 }
354
355 if (p == 0)
356 {
357 p = (struct clobber_pat *) xmalloc (sizeof (struct clobber_pat));
358
359 p->insns = 0;
360 p->pattern = insn;
361 p->first_clobber = i + 1;
362 p->next = clobber_list;
363 p->has_hard_reg = has_hard_reg;
364 clobber_list = p;
365 }
366
367 link->next = p->insns;
368 p->insns = link;
369 }
370 }
371
372 /* Don't mention instructions whose names are the null string
373 or begin with '*'. They are in the machine description just
374 to be recognized. */
375 if (XSTR (insn, 0)[0] == 0 || XSTR (insn, 0)[0] == '*')
376 return;
377
378 printf ("/* %s:%d */\n", read_rtx_filename, lineno);
379
380 /* Find out how many operands this function has,
381 and also whether any of them have register constraints. */
382 register_constraints = 0;
383 operands = max_operand_vec (insn, 1);
384 if (max_dup_opno >= operands)
385 fatal ("match_dup operand number has no match_operand");
386
387 /* Output the function name and argument declarations. */
388 printf ("rtx\ngen_%s (", XSTR (insn, 0));
389 if (operands)
390 for (i = 0; i < operands; i++)
391 if (i)
392 printf (",\n\trtx operand%d ATTRIBUTE_UNUSED", i);
393 else
394 printf ("rtx operand%d ATTRIBUTE_UNUSED", i);
395 else
396 printf ("void");
397 printf (")\n");
398 printf ("{\n");
399
400 /* Output code to construct and return the rtl for the instruction body */
401
402 if (XVECLEN (insn, 1) == 1)
403 {
404 printf (" return ");
405 gen_exp (XVECEXP (insn, 1, 0), DEFINE_INSN, NULL);
406 printf (";\n}\n\n");
407 }
408 else
409 {
410 printf (" return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (%d",
411 XVECLEN (insn, 1));
412
413 for (i = 0; i < XVECLEN (insn, 1); i++)
414 {
415 printf (",\n\t\t");
416 gen_exp (XVECEXP (insn, 1, i), DEFINE_INSN, NULL);
417 }
418 printf ("));\n}\n\n");
419 }
420 }
421 \f
422 /* Generate the `gen_...' function for a DEFINE_EXPAND. */
423
424 static void
425 gen_expand (rtx expand)
426 {
427 int operands;
428 int i;
429
430 if (strlen (XSTR (expand, 0)) == 0)
431 fatal ("define_expand lacks a name");
432 if (XVEC (expand, 1) == 0)
433 fatal ("define_expand for %s lacks a pattern", XSTR (expand, 0));
434
435 /* Find out how many operands this function has,
436 and also whether any of them have register constraints. */
437 register_constraints = 0;
438
439 operands = max_operand_vec (expand, 1);
440
441 /* Output the function name and argument declarations. */
442 printf ("rtx\ngen_%s (", XSTR (expand, 0));
443 if (operands)
444 for (i = 0; i < operands; i++)
445 if (i)
446 printf (",\n\trtx operand%d", i);
447 else
448 printf ("rtx operand%d", i);
449 else
450 printf ("void");
451 printf (")\n");
452 printf ("{\n");
453
454 /* If we don't have any C code to write, only one insn is being written,
455 and no MATCH_DUPs are present, we can just return the desired insn
456 like we do for a DEFINE_INSN. This saves memory. */
457 if ((XSTR (expand, 3) == 0 || *XSTR (expand, 3) == '\0')
458 && operands > max_dup_opno
459 && XVECLEN (expand, 1) == 1)
460 {
461 printf (" return ");
462 gen_exp (XVECEXP (expand, 1, 0), DEFINE_EXPAND, NULL);
463 printf (";\n}\n\n");
464 return;
465 }
466
467 /* For each operand referred to only with MATCH_DUPs,
468 make a local variable. */
469 for (i = operands; i <= max_dup_opno; i++)
470 printf (" rtx operand%d;\n", i);
471 for (; i <= max_scratch_opno; i++)
472 printf (" rtx operand%d ATTRIBUTE_UNUSED;\n", i);
473 printf (" rtx _val = 0;\n");
474 printf (" start_sequence ();\n");
475
476 /* The fourth operand of DEFINE_EXPAND is some code to be executed
477 before the actual construction.
478 This code expects to refer to `operands'
479 just as the output-code in a DEFINE_INSN does,
480 but here `operands' is an automatic array.
481 So copy the operand values there before executing it. */
482 if (XSTR (expand, 3) && *XSTR (expand, 3))
483 {
484 printf (" {\n");
485 if (operands > 0 || max_dup_opno >= 0 || max_scratch_opno >= 0)
486 printf (" rtx operands[%d];\n",
487 MAX (operands, MAX (max_scratch_opno, max_dup_opno) + 1));
488 /* Output code to copy the arguments into `operands'. */
489 for (i = 0; i < operands; i++)
490 printf (" operands[%d] = operand%d;\n", i, i);
491
492 /* Output the special code to be executed before the sequence
493 is generated. */
494 printf ("%s\n", XSTR (expand, 3));
495
496 /* Output code to copy the arguments back out of `operands'
497 (unless we aren't going to use them at all). */
498 if (XVEC (expand, 1) != 0)
499 {
500 for (i = 0; i < operands; i++)
501 printf (" operand%d = operands[%d];\n", i, i);
502 for (; i <= max_dup_opno; i++)
503 printf (" operand%d = operands[%d];\n", i, i);
504 for (; i <= max_scratch_opno; i++)
505 printf (" operand%d = operands[%d];\n", i, i);
506 }
507 printf (" }\n");
508 }
509
510 /* Output code to construct the rtl for the instruction bodies.
511 Use emit_insn to add them to the sequence being accumulated.
512 But don't do this if the user's code has set `no_more' nonzero. */
513
514 for (i = 0; i < XVECLEN (expand, 1); i++)
515 {
516 rtx next = XVECEXP (expand, 1, i);
517 if ((GET_CODE (next) == SET && GET_CODE (SET_DEST (next)) == PC)
518 || (GET_CODE (next) == PARALLEL
519 && ((GET_CODE (XVECEXP (next, 0, 0)) == SET
520 && GET_CODE (SET_DEST (XVECEXP (next, 0, 0))) == PC)
521 || GET_CODE (XVECEXP (next, 0, 0)) == RETURN))
522 || GET_CODE (next) == RETURN)
523 printf (" emit_jump_insn (");
524 else if ((GET_CODE (next) == SET && GET_CODE (SET_SRC (next)) == CALL)
525 || GET_CODE (next) == CALL
526 || (GET_CODE (next) == PARALLEL
527 && GET_CODE (XVECEXP (next, 0, 0)) == SET
528 && GET_CODE (SET_SRC (XVECEXP (next, 0, 0))) == CALL)
529 || (GET_CODE (next) == PARALLEL
530 && GET_CODE (XVECEXP (next, 0, 0)) == CALL))
531 printf (" emit_call_insn (");
532 else if (GET_CODE (next) == CODE_LABEL)
533 printf (" emit_label (");
534 else if (GET_CODE (next) == MATCH_OPERAND
535 || GET_CODE (next) == MATCH_DUP
536 || GET_CODE (next) == MATCH_OPERATOR
537 || GET_CODE (next) == MATCH_OP_DUP
538 || GET_CODE (next) == MATCH_PARALLEL
539 || GET_CODE (next) == MATCH_PAR_DUP
540 || GET_CODE (next) == PARALLEL)
541 printf (" emit (");
542 else
543 printf (" emit_insn (");
544 gen_exp (next, DEFINE_EXPAND, NULL);
545 printf (");\n");
546 if (GET_CODE (next) == SET && GET_CODE (SET_DEST (next)) == PC
547 && GET_CODE (SET_SRC (next)) == LABEL_REF)
548 printf (" emit_barrier ();");
549 }
550
551 /* Call `get_insns' to extract the list of all the
552 insns emitted within this gen_... function. */
553
554 printf (" _val = get_insns ();\n");
555 printf (" end_sequence ();\n");
556 printf (" return _val;\n}\n\n");
557 }
558
559 /* Like gen_expand, but generates insns resulting from splitting SPLIT. */
560
561 static void
562 gen_split (rtx split)
563 {
564 int i;
565 int operands;
566 const char *const name =
567 ((GET_CODE (split) == DEFINE_PEEPHOLE2) ? "peephole2" : "split");
568 const char *unused;
569 char *used;
570
571 if (XVEC (split, 0) == 0)
572 fatal ("define_%s (definition %d) lacks a pattern", name,
573 insn_index_number);
574 else if (XVEC (split, 2) == 0)
575 fatal ("define_%s (definition %d) lacks a replacement pattern", name,
576 insn_index_number);
577
578 /* Find out how many operands this function has. */
579
580 max_operand_vec (split, 2);
581 operands = MAX (max_opno, MAX (max_dup_opno, max_scratch_opno)) + 1;
582 unused = (operands == 0 ? " ATTRIBUTE_UNUSED" : "");
583 used = xcalloc (1, operands);
584
585 /* Output the prototype, function name and argument declarations. */
586 if (GET_CODE (split) == DEFINE_PEEPHOLE2)
587 {
588 printf ("extern rtx gen_%s_%d (rtx, rtx *);\n",
589 name, insn_code_number);
590 printf ("rtx\ngen_%s_%d (rtx curr_insn ATTRIBUTE_UNUSED, rtx *operands)\n",
591 name, insn_code_number);
592 }
593 else
594 {
595 printf ("extern rtx gen_split_%d (rtx *);\n", insn_code_number);
596 printf ("rtx\ngen_%s_%d (rtx *operands)\n", name, insn_code_number);
597 }
598 printf ("{\n");
599
600 /* Declare all local variables. */
601 for (i = 0; i < operands; i++)
602 printf (" rtx operand%d;\n", i);
603 printf (" rtx _val = 0;\n");
604
605 if (GET_CODE (split) == DEFINE_PEEPHOLE2)
606 output_peephole2_scratches (split);
607
608 printf (" start_sequence ();\n");
609
610 /* The fourth operand of DEFINE_SPLIT is some code to be executed
611 before the actual construction. */
612
613 if (XSTR (split, 3))
614 printf ("%s\n", XSTR (split, 3));
615
616 /* Output code to copy the arguments back out of `operands' */
617 for (i = 0; i < operands; i++)
618 printf (" operand%d = operands[%d];\n", i, i);
619
620 /* Output code to construct the rtl for the instruction bodies.
621 Use emit_insn to add them to the sequence being accumulated.
622 But don't do this if the user's code has set `no_more' nonzero. */
623
624 for (i = 0; i < XVECLEN (split, 2); i++)
625 {
626 rtx next = XVECEXP (split, 2, i);
627 if ((GET_CODE (next) == SET && GET_CODE (SET_DEST (next)) == PC)
628 || (GET_CODE (next) == PARALLEL
629 && GET_CODE (XVECEXP (next, 0, 0)) == SET
630 && GET_CODE (SET_DEST (XVECEXP (next, 0, 0))) == PC)
631 || GET_CODE (next) == RETURN)
632 printf (" emit_jump_insn (");
633 else if ((GET_CODE (next) == SET && GET_CODE (SET_SRC (next)) == CALL)
634 || GET_CODE (next) == CALL
635 || (GET_CODE (next) == PARALLEL
636 && GET_CODE (XVECEXP (next, 0, 0)) == SET
637 && GET_CODE (SET_SRC (XVECEXP (next, 0, 0))) == CALL)
638 || (GET_CODE (next) == PARALLEL
639 && GET_CODE (XVECEXP (next, 0, 0)) == CALL))
640 printf (" emit_call_insn (");
641 else if (GET_CODE (next) == CODE_LABEL)
642 printf (" emit_label (");
643 else if (GET_CODE (next) == MATCH_OPERAND
644 || GET_CODE (next) == MATCH_OPERATOR
645 || GET_CODE (next) == MATCH_PARALLEL
646 || GET_CODE (next) == MATCH_OP_DUP
647 || GET_CODE (next) == MATCH_DUP
648 || GET_CODE (next) == PARALLEL)
649 printf (" emit (");
650 else
651 printf (" emit_insn (");
652 gen_exp (next, GET_CODE (split), used);
653 printf (");\n");
654 if (GET_CODE (next) == SET && GET_CODE (SET_DEST (next)) == PC
655 && GET_CODE (SET_SRC (next)) == LABEL_REF)
656 printf (" emit_barrier ();");
657 }
658
659 /* Call `get_insns' to make a list of all the
660 insns emitted within this gen_... function. */
661
662 printf (" _val = get_insns ();\n");
663 printf (" end_sequence ();\n");
664 printf (" return _val;\n}\n\n");
665
666 free (used);
667 }
668 \f
669 /* Write a function, `add_clobbers', that is given a PARALLEL of sufficient
670 size for the insn and an INSN_CODE, and inserts the required CLOBBERs at
671 the end of the vector. */
672
673 static void
674 output_add_clobbers ()
675 {
676 struct clobber_pat *clobber;
677 struct clobber_ent *ent;
678 int i;
679
680 printf ("\n\nvoid\nadd_clobbers (rtx pattern ATTRIBUTE_UNUSED, int insn_code_number)\n");
681 printf ("{\n");
682 printf (" switch (insn_code_number)\n");
683 printf (" {\n");
684
685 for (clobber = clobber_list; clobber; clobber = clobber->next)
686 {
687 for (ent = clobber->insns; ent; ent = ent->next)
688 printf (" case %d:\n", ent->code_number);
689
690 for (i = clobber->first_clobber; i < XVECLEN (clobber->pattern, 1); i++)
691 {
692 printf (" XVECEXP (pattern, 0, %d) = ", i);
693 gen_exp (XVECEXP (clobber->pattern, 1, i),
694 GET_CODE (clobber->pattern), NULL);
695 printf (";\n");
696 }
697
698 printf (" break;\n\n");
699 }
700
701 printf (" default:\n");
702 printf (" abort ();\n");
703 printf (" }\n");
704 printf ("}\n");
705 }
706 \f
707 /* Write a function, `added_clobbers_hard_reg_p' this is given an insn_code
708 number that needs clobbers and returns 1 if they include a clobber of a
709 hard reg and 0 if they just clobber SCRATCH. */
710
711 static void
712 output_added_clobbers_hard_reg_p (void)
713 {
714 struct clobber_pat *clobber;
715 struct clobber_ent *ent;
716 int clobber_p, used;
717
718 printf ("\n\nint\nadded_clobbers_hard_reg_p (int insn_code_number)\n");
719 printf ("{\n");
720 printf (" switch (insn_code_number)\n");
721 printf (" {\n");
722
723 for (clobber_p = 0; clobber_p <= 1; clobber_p++)
724 {
725 used = 0;
726 for (clobber = clobber_list; clobber; clobber = clobber->next)
727 if (clobber->has_hard_reg == clobber_p)
728 for (ent = clobber->insns; ent; ent = ent->next)
729 {
730 printf (" case %d:\n", ent->code_number);
731 used++;
732 }
733
734 if (used)
735 printf (" return %d;\n\n", clobber_p);
736 }
737
738 printf (" default:\n");
739 printf (" abort ();\n");
740 printf (" }\n");
741 printf ("}\n");
742 }
743 \f
744 /* Generate code to invoke find_free_register () as needed for the
745 scratch registers used by the peephole2 pattern in SPLIT. */
746
747 static void
748 output_peephole2_scratches (rtx split)
749 {
750 int i;
751 int insn_nr = 0;
752
753 printf (" HARD_REG_SET _regs_allocated;\n");
754 printf (" CLEAR_HARD_REG_SET (_regs_allocated);\n");
755
756 for (i = 0; i < XVECLEN (split, 0); i++)
757 {
758 rtx elt = XVECEXP (split, 0, i);
759 if (GET_CODE (elt) == MATCH_SCRATCH)
760 {
761 int last_insn_nr = insn_nr;
762 int cur_insn_nr = insn_nr;
763 int j;
764 for (j = i + 1; j < XVECLEN (split, 0); j++)
765 if (GET_CODE (XVECEXP (split, 0, j)) == MATCH_DUP)
766 {
767 if (XINT (XVECEXP (split, 0, j), 0) == XINT (elt, 0))
768 last_insn_nr = cur_insn_nr;
769 }
770 else if (GET_CODE (XVECEXP (split, 0, j)) != MATCH_SCRATCH)
771 cur_insn_nr++;
772
773 printf (" if ((operands[%d] = peep2_find_free_register (%d, %d, \"%s\", %smode, &_regs_allocated)) == NULL_RTX)\n\
774 return NULL;\n",
775 XINT (elt, 0),
776 insn_nr, last_insn_nr,
777 XSTR (elt, 1),
778 GET_MODE_NAME (GET_MODE (elt)));
779
780 }
781 else if (GET_CODE (elt) != MATCH_DUP)
782 insn_nr++;
783 }
784 }
785
786 int
787 main (int argc, char **argv)
788 {
789 rtx desc;
790
791 progname = "genemit";
792
793 if (argc <= 1)
794 fatal ("no input file name");
795
796 if (init_md_reader_args (argc, argv) != SUCCESS_EXIT_CODE)
797 return (FATAL_EXIT_CODE);
798
799 /* Assign sequential codes to all entries in the machine description
800 in parallel with the tables in insn-output.c. */
801
802 insn_code_number = 0;
803 insn_index_number = 0;
804
805 printf ("/* Generated automatically by the program `genemit'\n\
806 from the machine description file `md'. */\n\n");
807
808 printf ("#include \"config.h\"\n");
809 printf ("#include \"system.h\"\n");
810 printf ("#include \"coretypes.h\"\n");
811 printf ("#include \"tm.h\"\n");
812 printf ("#include \"rtl.h\"\n");
813 printf ("#include \"tm_p.h\"\n");
814 printf ("#include \"function.h\"\n");
815 printf ("#include \"expr.h\"\n");
816 printf ("#include \"optabs.h\"\n");
817 printf ("#include \"real.h\"\n");
818 printf ("#include \"flags.h\"\n");
819 printf ("#include \"output.h\"\n");
820 printf ("#include \"insn-config.h\"\n");
821 printf ("#include \"hard-reg-set.h\"\n");
822 printf ("#include \"recog.h\"\n");
823 printf ("#include \"resource.h\"\n");
824 printf ("#include \"reload.h\"\n");
825 printf ("#include \"toplev.h\"\n");
826 printf ("#include \"ggc.h\"\n\n");
827 printf ("#define FAIL return (end_sequence (), _val)\n");
828 printf ("#define DONE return (_val = get_insns (), end_sequence (), _val)\n\n");
829
830 /* Read the machine description. */
831
832 while (1)
833 {
834 int line_no;
835
836 desc = read_md_rtx (&line_no, &insn_code_number);
837 if (desc == NULL)
838 break;
839
840 switch (GET_CODE (desc))
841 {
842 case DEFINE_INSN:
843 gen_insn (desc, line_no);
844 break;
845
846 case DEFINE_EXPAND:
847 printf ("/* %s:%d */\n", read_rtx_filename, line_no);
848 gen_expand (desc);
849 break;
850
851 case DEFINE_SPLIT:
852 printf ("/* %s:%d */\n", read_rtx_filename, line_no);
853 gen_split (desc);
854 break;
855
856 case DEFINE_PEEPHOLE2:
857 printf ("/* %s:%d */\n", read_rtx_filename, line_no);
858 gen_split (desc);
859 break;
860
861 default:
862 break;
863 }
864 ++insn_index_number;
865 }
866
867 /* Write out the routines to add CLOBBERs to a pattern and say whether they
868 clobber a hard reg. */
869 output_add_clobbers ();
870 output_added_clobbers_hard_reg_p ();
871
872 fflush (stdout);
873 return (ferror (stdout) != 0 ? FATAL_EXIT_CODE : SUCCESS_EXIT_CODE);
874 }
875
876 /* Define this so we can link with print-rtl.o to get debug_rtx function. */
877 const char *
878 get_insn_name (int code ATTRIBUTE_UNUSED)
879 {
880 return NULL;
881 }