alias.c [...]: Remove unnecessary casts.
[gcc.git] / gcc / genemit.c
1 /* Generate code from machine description to emit insns as rtl.
2 Copyright (C) 1987, 1988, 1991, 1994, 1995, 1997, 1998, 1999, 2000, 2001,
3 2003 Free Software Foundation, Inc.
4
5 This file is part of GCC.
6
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
10 version.
11
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
20 02111-1307, USA. */
21
22
23 #include "bconfig.h"
24 #include "system.h"
25 #include "coretypes.h"
26 #include "tm.h"
27 #include "rtl.h"
28 #include "errors.h"
29 #include "gensupport.h"
30
31
32 static int max_opno;
33 static int max_dup_opno;
34 static int max_scratch_opno;
35 static int register_constraints;
36 static int insn_code_number;
37 static int insn_index_number;
38
39 /* Data structure for recording the patterns of insns that have CLOBBERs.
40 We use this to output a function that adds these CLOBBERs to a
41 previously-allocated PARALLEL expression. */
42
43 struct clobber_pat
44 {
45 struct clobber_ent *insns;
46 rtx pattern;
47 int first_clobber;
48 struct clobber_pat *next;
49 int has_hard_reg;
50 } *clobber_list;
51
52 /* Records one insn that uses the clobber list. */
53
54 struct clobber_ent
55 {
56 int code_number; /* Counts only insns. */
57 struct clobber_ent *next;
58 };
59
60 static void max_operand_1 (rtx);
61 static int max_operand_vec (rtx, int);
62 static void print_code (RTX_CODE);
63 static void gen_exp (rtx, enum rtx_code, char *);
64 static void gen_insn (rtx, int);
65 static void gen_expand (rtx);
66 static void gen_split (rtx);
67 static void output_add_clobbers (void);
68 static void output_added_clobbers_hard_reg_p (void);
69 static void gen_rtx_scratch (rtx, enum rtx_code);
70 static void output_peephole2_scratches (rtx);
71
72 \f
73 static void
74 max_operand_1 (rtx x)
75 {
76 RTX_CODE code;
77 int i;
78 int len;
79 const char *fmt;
80
81 if (x == 0)
82 return;
83
84 code = GET_CODE (x);
85
86 if (code == MATCH_OPERAND && XSTR (x, 2) != 0 && *XSTR (x, 2) != '\0')
87 register_constraints = 1;
88 if (code == MATCH_SCRATCH && XSTR (x, 1) != 0 && *XSTR (x, 1) != '\0')
89 register_constraints = 1;
90 if (code == MATCH_OPERAND || code == MATCH_OPERATOR
91 || code == MATCH_PARALLEL)
92 max_opno = MAX (max_opno, XINT (x, 0));
93 if (code == MATCH_DUP || code == MATCH_OP_DUP || code == MATCH_PAR_DUP)
94 max_dup_opno = MAX (max_dup_opno, XINT (x, 0));
95 if (code == MATCH_SCRATCH)
96 max_scratch_opno = MAX (max_scratch_opno, XINT (x, 0));
97
98 fmt = GET_RTX_FORMAT (code);
99 len = GET_RTX_LENGTH (code);
100 for (i = 0; i < len; i++)
101 {
102 if (fmt[i] == 'e' || fmt[i] == 'u')
103 max_operand_1 (XEXP (x, i));
104 else if (fmt[i] == 'E')
105 {
106 int j;
107 for (j = 0; j < XVECLEN (x, i); j++)
108 max_operand_1 (XVECEXP (x, i, j));
109 }
110 }
111 }
112
113 static int
114 max_operand_vec (rtx insn, int arg)
115 {
116 int len = XVECLEN (insn, arg);
117 int i;
118
119 max_opno = -1;
120 max_dup_opno = -1;
121 max_scratch_opno = -1;
122
123 for (i = 0; i < len; i++)
124 max_operand_1 (XVECEXP (insn, arg, i));
125
126 return max_opno + 1;
127 }
128 \f
129 static void
130 print_code (RTX_CODE code)
131 {
132 const char *p1;
133 for (p1 = GET_RTX_NAME (code); *p1; p1++)
134 putchar (TOUPPER(*p1));
135 }
136
137 static void
138 gen_rtx_scratch (rtx x, enum rtx_code subroutine_type)
139 {
140 if (subroutine_type == DEFINE_PEEPHOLE2)
141 {
142 printf ("operand%d", XINT (x, 0));
143 }
144 else
145 {
146 printf ("gen_rtx_SCRATCH (%smode)", GET_MODE_NAME (GET_MODE (x)));
147 }
148 }
149
150 /* Print a C expression to construct an RTX just like X,
151 substituting any operand references appearing within. */
152
153 static void
154 gen_exp (rtx x, enum rtx_code subroutine_type, char *used)
155 {
156 RTX_CODE code;
157 int i;
158 int len;
159 const char *fmt;
160
161 if (x == 0)
162 {
163 printf ("NULL_RTX");
164 return;
165 }
166
167 code = GET_CODE (x);
168
169 switch (code)
170 {
171 case MATCH_OPERAND:
172 case MATCH_DUP:
173 if (used)
174 {
175 if (used[XINT (x, 0)])
176 {
177 printf ("copy_rtx (operand%d)", XINT (x, 0));
178 return;
179 }
180 used[XINT (x, 0)] = 1;
181 }
182 printf ("operand%d", XINT (x, 0));
183 return;
184
185 case MATCH_OP_DUP:
186 printf ("gen_rtx (GET_CODE (operand%d), ", XINT (x, 0));
187 if (GET_MODE (x) == VOIDmode)
188 printf ("GET_MODE (operand%d)", XINT (x, 0));
189 else
190 printf ("%smode", GET_MODE_NAME (GET_MODE (x)));
191 for (i = 0; i < XVECLEN (x, 1); i++)
192 {
193 printf (",\n\t\t");
194 gen_exp (XVECEXP (x, 1, i), subroutine_type, used);
195 }
196 printf (")");
197 return;
198
199 case MATCH_OPERATOR:
200 printf ("gen_rtx (GET_CODE (operand%d)", XINT (x, 0));
201 printf (", %smode", GET_MODE_NAME (GET_MODE (x)));
202 for (i = 0; i < XVECLEN (x, 2); i++)
203 {
204 printf (",\n\t\t");
205 gen_exp (XVECEXP (x, 2, i), subroutine_type, used);
206 }
207 printf (")");
208 return;
209
210 case MATCH_PARALLEL:
211 case MATCH_PAR_DUP:
212 printf ("operand%d", XINT (x, 0));
213 return;
214
215 case MATCH_SCRATCH:
216 gen_rtx_scratch (x, subroutine_type);
217 return;
218
219 case ADDRESS:
220 fatal ("ADDRESS expression code used in named instruction pattern");
221
222 case PC:
223 printf ("pc_rtx");
224 return;
225
226 case CC0:
227 printf ("cc0_rtx");
228 return;
229
230 case CONST_INT:
231 if (INTVAL (x) == 0)
232 printf ("const0_rtx");
233 else if (INTVAL (x) == 1)
234 printf ("const1_rtx");
235 else if (INTVAL (x) == -1)
236 printf ("constm1_rtx");
237 else if (INTVAL (x) == STORE_FLAG_VALUE)
238 printf ("const_true_rtx");
239 else
240 {
241 printf ("GEN_INT (");
242 printf (HOST_WIDE_INT_PRINT_DEC_C, INTVAL (x));
243 printf (")");
244 }
245 return;
246
247 case CONST_DOUBLE:
248 /* These shouldn't be written in MD files. Instead, the appropriate
249 routines in varasm.c should be called. */
250 abort ();
251
252 default:
253 break;
254 }
255
256 printf ("gen_rtx_");
257 print_code (code);
258 printf (" (%smode", GET_MODE_NAME (GET_MODE (x)));
259
260 fmt = GET_RTX_FORMAT (code);
261 len = GET_RTX_LENGTH (code);
262 for (i = 0; i < len; i++)
263 {
264 if (fmt[i] == '0')
265 break;
266 printf (",\n\t");
267 if (fmt[i] == 'e' || fmt[i] == 'u')
268 gen_exp (XEXP (x, i), subroutine_type, used);
269 else if (fmt[i] == 'i')
270 printf ("%u", XINT (x, i));
271 else if (fmt[i] == 's')
272 printf ("\"%s\"", XSTR (x, i));
273 else if (fmt[i] == 'E')
274 {
275 int j;
276 printf ("gen_rtvec (%d", XVECLEN (x, i));
277 for (j = 0; j < XVECLEN (x, i); j++)
278 {
279 printf (",\n\t\t");
280 gen_exp (XVECEXP (x, i, j), subroutine_type, used);
281 }
282 printf (")");
283 }
284 else
285 abort ();
286 }
287 printf (")");
288 }
289 \f
290 /* Generate the `gen_...' function for a DEFINE_INSN. */
291
292 static void
293 gen_insn (rtx insn, int lineno)
294 {
295 int operands;
296 int i;
297
298 /* See if the pattern for this insn ends with a group of CLOBBERs of (hard)
299 registers or MATCH_SCRATCHes. If so, store away the information for
300 later. */
301
302 if (XVEC (insn, 1))
303 {
304 int has_hard_reg = 0;
305
306 for (i = XVECLEN (insn, 1) - 1; i > 0; i--)
307 {
308 if (GET_CODE (XVECEXP (insn, 1, i)) != CLOBBER)
309 break;
310
311 if (GET_CODE (XEXP (XVECEXP (insn, 1, i), 0)) == REG)
312 has_hard_reg = 1;
313 else if (GET_CODE (XEXP (XVECEXP (insn, 1, i), 0)) != MATCH_SCRATCH)
314 break;
315 }
316
317 if (i != XVECLEN (insn, 1) - 1)
318 {
319 struct clobber_pat *p;
320 struct clobber_ent *link = xmalloc (sizeof (struct clobber_ent));
321 int j;
322
323 link->code_number = insn_code_number;
324
325 /* See if any previous CLOBBER_LIST entry is the same as this
326 one. */
327
328 for (p = clobber_list; p; p = p->next)
329 {
330 if (p->first_clobber != i + 1
331 || XVECLEN (p->pattern, 1) != XVECLEN (insn, 1))
332 continue;
333
334 for (j = i + 1; j < XVECLEN (insn, 1); j++)
335 {
336 rtx old = XEXP (XVECEXP (p->pattern, 1, j), 0);
337 rtx new = XEXP (XVECEXP (insn, 1, j), 0);
338
339 /* OLD and NEW are the same if both are to be a SCRATCH
340 of the same mode,
341 or if both are registers of the same mode and number. */
342 if (! (GET_MODE (old) == GET_MODE (new)
343 && ((GET_CODE (old) == MATCH_SCRATCH
344 && GET_CODE (new) == MATCH_SCRATCH)
345 || (GET_CODE (old) == REG && GET_CODE (new) == REG
346 && REGNO (old) == REGNO (new)))))
347 break;
348 }
349
350 if (j == XVECLEN (insn, 1))
351 break;
352 }
353
354 if (p == 0)
355 {
356 p = xmalloc (sizeof (struct clobber_pat));
357
358 p->insns = 0;
359 p->pattern = insn;
360 p->first_clobber = i + 1;
361 p->next = clobber_list;
362 p->has_hard_reg = has_hard_reg;
363 clobber_list = p;
364 }
365
366 link->next = p->insns;
367 p->insns = link;
368 }
369 }
370
371 /* Don't mention instructions whose names are the null string
372 or begin with '*'. They are in the machine description just
373 to be recognized. */
374 if (XSTR (insn, 0)[0] == 0 || XSTR (insn, 0)[0] == '*')
375 return;
376
377 printf ("/* %s:%d */\n", read_rtx_filename, lineno);
378
379 /* Find out how many operands this function has,
380 and also whether any of them have register constraints. */
381 register_constraints = 0;
382 operands = max_operand_vec (insn, 1);
383 if (max_dup_opno >= operands)
384 fatal ("match_dup operand number has no match_operand");
385
386 /* Output the function name and argument declarations. */
387 printf ("rtx\ngen_%s (", XSTR (insn, 0));
388 if (operands)
389 for (i = 0; i < operands; i++)
390 if (i)
391 printf (",\n\trtx operand%d ATTRIBUTE_UNUSED", i);
392 else
393 printf ("rtx operand%d ATTRIBUTE_UNUSED", i);
394 else
395 printf ("void");
396 printf (")\n");
397 printf ("{\n");
398
399 /* Output code to construct and return the rtl for the instruction body */
400
401 if (XVECLEN (insn, 1) == 1)
402 {
403 printf (" return ");
404 gen_exp (XVECEXP (insn, 1, 0), DEFINE_INSN, NULL);
405 printf (";\n}\n\n");
406 }
407 else
408 {
409 printf (" return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (%d",
410 XVECLEN (insn, 1));
411
412 for (i = 0; i < XVECLEN (insn, 1); i++)
413 {
414 printf (",\n\t\t");
415 gen_exp (XVECEXP (insn, 1, i), DEFINE_INSN, NULL);
416 }
417 printf ("));\n}\n\n");
418 }
419 }
420 \f
421 /* Generate the `gen_...' function for a DEFINE_EXPAND. */
422
423 static void
424 gen_expand (rtx expand)
425 {
426 int operands;
427 int i;
428
429 if (strlen (XSTR (expand, 0)) == 0)
430 fatal ("define_expand lacks a name");
431 if (XVEC (expand, 1) == 0)
432 fatal ("define_expand for %s lacks a pattern", XSTR (expand, 0));
433
434 /* Find out how many operands this function has,
435 and also whether any of them have register constraints. */
436 register_constraints = 0;
437
438 operands = max_operand_vec (expand, 1);
439
440 /* Output the function name and argument declarations. */
441 printf ("rtx\ngen_%s (", XSTR (expand, 0));
442 if (operands)
443 for (i = 0; i < operands; i++)
444 if (i)
445 printf (",\n\trtx operand%d", i);
446 else
447 printf ("rtx operand%d", i);
448 else
449 printf ("void");
450 printf (")\n");
451 printf ("{\n");
452
453 /* If we don't have any C code to write, only one insn is being written,
454 and no MATCH_DUPs are present, we can just return the desired insn
455 like we do for a DEFINE_INSN. This saves memory. */
456 if ((XSTR (expand, 3) == 0 || *XSTR (expand, 3) == '\0')
457 && operands > max_dup_opno
458 && XVECLEN (expand, 1) == 1)
459 {
460 printf (" return ");
461 gen_exp (XVECEXP (expand, 1, 0), DEFINE_EXPAND, NULL);
462 printf (";\n}\n\n");
463 return;
464 }
465
466 /* For each operand referred to only with MATCH_DUPs,
467 make a local variable. */
468 for (i = operands; i <= max_dup_opno; i++)
469 printf (" rtx operand%d;\n", i);
470 for (; i <= max_scratch_opno; i++)
471 printf (" rtx operand%d ATTRIBUTE_UNUSED;\n", i);
472 printf (" rtx _val = 0;\n");
473 printf (" start_sequence ();\n");
474
475 /* The fourth operand of DEFINE_EXPAND is some code to be executed
476 before the actual construction.
477 This code expects to refer to `operands'
478 just as the output-code in a DEFINE_INSN does,
479 but here `operands' is an automatic array.
480 So copy the operand values there before executing it. */
481 if (XSTR (expand, 3) && *XSTR (expand, 3))
482 {
483 printf (" {\n");
484 if (operands > 0 || max_dup_opno >= 0 || max_scratch_opno >= 0)
485 printf (" rtx operands[%d];\n",
486 MAX (operands, MAX (max_scratch_opno, max_dup_opno) + 1));
487 /* Output code to copy the arguments into `operands'. */
488 for (i = 0; i < operands; i++)
489 printf (" operands[%d] = operand%d;\n", i, i);
490
491 /* Output the special code to be executed before the sequence
492 is generated. */
493 printf ("%s\n", XSTR (expand, 3));
494
495 /* Output code to copy the arguments back out of `operands'
496 (unless we aren't going to use them at all). */
497 if (XVEC (expand, 1) != 0)
498 {
499 for (i = 0; i < operands; i++)
500 printf (" operand%d = operands[%d];\n", i, i);
501 for (; i <= max_dup_opno; i++)
502 printf (" operand%d = operands[%d];\n", i, i);
503 for (; i <= max_scratch_opno; i++)
504 printf (" operand%d = operands[%d];\n", i, i);
505 }
506 printf (" }\n");
507 }
508
509 /* Output code to construct the rtl for the instruction bodies.
510 Use emit_insn to add them to the sequence being accumulated.
511 But don't do this if the user's code has set `no_more' nonzero. */
512
513 for (i = 0; i < XVECLEN (expand, 1); i++)
514 {
515 rtx next = XVECEXP (expand, 1, i);
516 if ((GET_CODE (next) == SET && GET_CODE (SET_DEST (next)) == PC)
517 || (GET_CODE (next) == PARALLEL
518 && ((GET_CODE (XVECEXP (next, 0, 0)) == SET
519 && GET_CODE (SET_DEST (XVECEXP (next, 0, 0))) == PC)
520 || GET_CODE (XVECEXP (next, 0, 0)) == RETURN))
521 || GET_CODE (next) == RETURN)
522 printf (" emit_jump_insn (");
523 else if ((GET_CODE (next) == SET && GET_CODE (SET_SRC (next)) == CALL)
524 || GET_CODE (next) == CALL
525 || (GET_CODE (next) == PARALLEL
526 && GET_CODE (XVECEXP (next, 0, 0)) == SET
527 && GET_CODE (SET_SRC (XVECEXP (next, 0, 0))) == CALL)
528 || (GET_CODE (next) == PARALLEL
529 && GET_CODE (XVECEXP (next, 0, 0)) == CALL))
530 printf (" emit_call_insn (");
531 else if (GET_CODE (next) == CODE_LABEL)
532 printf (" emit_label (");
533 else if (GET_CODE (next) == MATCH_OPERAND
534 || GET_CODE (next) == MATCH_DUP
535 || GET_CODE (next) == MATCH_OPERATOR
536 || GET_CODE (next) == MATCH_OP_DUP
537 || GET_CODE (next) == MATCH_PARALLEL
538 || GET_CODE (next) == MATCH_PAR_DUP
539 || GET_CODE (next) == PARALLEL)
540 printf (" emit (");
541 else
542 printf (" emit_insn (");
543 gen_exp (next, DEFINE_EXPAND, NULL);
544 printf (");\n");
545 if (GET_CODE (next) == SET && GET_CODE (SET_DEST (next)) == PC
546 && GET_CODE (SET_SRC (next)) == LABEL_REF)
547 printf (" emit_barrier ();");
548 }
549
550 /* Call `get_insns' to extract the list of all the
551 insns emitted within this gen_... function. */
552
553 printf (" _val = get_insns ();\n");
554 printf (" end_sequence ();\n");
555 printf (" return _val;\n}\n\n");
556 }
557
558 /* Like gen_expand, but generates insns resulting from splitting SPLIT. */
559
560 static void
561 gen_split (rtx split)
562 {
563 int i;
564 int operands;
565 const char *const name =
566 ((GET_CODE (split) == DEFINE_PEEPHOLE2) ? "peephole2" : "split");
567 const char *unused;
568 char *used;
569
570 if (XVEC (split, 0) == 0)
571 fatal ("define_%s (definition %d) lacks a pattern", name,
572 insn_index_number);
573 else if (XVEC (split, 2) == 0)
574 fatal ("define_%s (definition %d) lacks a replacement pattern", name,
575 insn_index_number);
576
577 /* Find out how many operands this function has. */
578
579 max_operand_vec (split, 2);
580 operands = MAX (max_opno, MAX (max_dup_opno, max_scratch_opno)) + 1;
581 unused = (operands == 0 ? " ATTRIBUTE_UNUSED" : "");
582 used = xcalloc (1, operands);
583
584 /* Output the prototype, function name and argument declarations. */
585 if (GET_CODE (split) == DEFINE_PEEPHOLE2)
586 {
587 printf ("extern rtx gen_%s_%d (rtx, rtx *);\n",
588 name, insn_code_number);
589 printf ("rtx\ngen_%s_%d (rtx curr_insn ATTRIBUTE_UNUSED, rtx *operands%s)\n",
590 name, insn_code_number, unused);
591 }
592 else
593 {
594 printf ("extern rtx gen_split_%d (rtx *);\n", insn_code_number);
595 printf ("rtx\ngen_%s_%d (rtx *operands%s)\n", name, insn_code_number, unused);
596 }
597 printf ("{\n");
598
599 /* Declare all local variables. */
600 for (i = 0; i < operands; i++)
601 printf (" rtx operand%d;\n", i);
602 printf (" rtx _val = 0;\n");
603
604 if (GET_CODE (split) == DEFINE_PEEPHOLE2)
605 output_peephole2_scratches (split);
606
607 printf (" start_sequence ();\n");
608
609 /* The fourth operand of DEFINE_SPLIT is some code to be executed
610 before the actual construction. */
611
612 if (XSTR (split, 3))
613 printf ("%s\n", XSTR (split, 3));
614
615 /* Output code to copy the arguments back out of `operands' */
616 for (i = 0; i < operands; i++)
617 printf (" operand%d = operands[%d];\n", i, i);
618
619 /* Output code to construct the rtl for the instruction bodies.
620 Use emit_insn to add them to the sequence being accumulated.
621 But don't do this if the user's code has set `no_more' nonzero. */
622
623 for (i = 0; i < XVECLEN (split, 2); i++)
624 {
625 rtx next = XVECEXP (split, 2, i);
626 if ((GET_CODE (next) == SET && GET_CODE (SET_DEST (next)) == PC)
627 || (GET_CODE (next) == PARALLEL
628 && GET_CODE (XVECEXP (next, 0, 0)) == SET
629 && GET_CODE (SET_DEST (XVECEXP (next, 0, 0))) == PC)
630 || GET_CODE (next) == RETURN)
631 printf (" emit_jump_insn (");
632 else if ((GET_CODE (next) == SET && GET_CODE (SET_SRC (next)) == CALL)
633 || GET_CODE (next) == CALL
634 || (GET_CODE (next) == PARALLEL
635 && GET_CODE (XVECEXP (next, 0, 0)) == SET
636 && GET_CODE (SET_SRC (XVECEXP (next, 0, 0))) == CALL)
637 || (GET_CODE (next) == PARALLEL
638 && GET_CODE (XVECEXP (next, 0, 0)) == CALL))
639 printf (" emit_call_insn (");
640 else if (GET_CODE (next) == CODE_LABEL)
641 printf (" emit_label (");
642 else if (GET_CODE (next) == MATCH_OPERAND
643 || GET_CODE (next) == MATCH_OPERATOR
644 || GET_CODE (next) == MATCH_PARALLEL
645 || GET_CODE (next) == MATCH_OP_DUP
646 || GET_CODE (next) == MATCH_DUP
647 || GET_CODE (next) == PARALLEL)
648 printf (" emit (");
649 else
650 printf (" emit_insn (");
651 gen_exp (next, GET_CODE (split), used);
652 printf (");\n");
653 if (GET_CODE (next) == SET && GET_CODE (SET_DEST (next)) == PC
654 && GET_CODE (SET_SRC (next)) == LABEL_REF)
655 printf (" emit_barrier ();");
656 }
657
658 /* Call `get_insns' to make a list of all the
659 insns emitted within this gen_... function. */
660
661 printf (" _val = get_insns ();\n");
662 printf (" end_sequence ();\n");
663 printf (" return _val;\n}\n\n");
664
665 free (used);
666 }
667 \f
668 /* Write a function, `add_clobbers', that is given a PARALLEL of sufficient
669 size for the insn and an INSN_CODE, and inserts the required CLOBBERs at
670 the end of the vector. */
671
672 static void
673 output_add_clobbers (void)
674 {
675 struct clobber_pat *clobber;
676 struct clobber_ent *ent;
677 int i;
678
679 printf ("\n\nvoid\nadd_clobbers (rtx pattern ATTRIBUTE_UNUSED, int insn_code_number)\n");
680 printf ("{\n");
681 printf (" switch (insn_code_number)\n");
682 printf (" {\n");
683
684 for (clobber = clobber_list; clobber; clobber = clobber->next)
685 {
686 for (ent = clobber->insns; ent; ent = ent->next)
687 printf (" case %d:\n", ent->code_number);
688
689 for (i = clobber->first_clobber; i < XVECLEN (clobber->pattern, 1); i++)
690 {
691 printf (" XVECEXP (pattern, 0, %d) = ", i);
692 gen_exp (XVECEXP (clobber->pattern, 1, i),
693 GET_CODE (clobber->pattern), NULL);
694 printf (";\n");
695 }
696
697 printf (" break;\n\n");
698 }
699
700 printf (" default:\n");
701 printf (" abort ();\n");
702 printf (" }\n");
703 printf ("}\n");
704 }
705 \f
706 /* Write a function, `added_clobbers_hard_reg_p' this is given an insn_code
707 number that needs clobbers and returns 1 if they include a clobber of a
708 hard reg and 0 if they just clobber SCRATCH. */
709
710 static void
711 output_added_clobbers_hard_reg_p (void)
712 {
713 struct clobber_pat *clobber;
714 struct clobber_ent *ent;
715 int clobber_p, used;
716
717 printf ("\n\nint\nadded_clobbers_hard_reg_p (int insn_code_number)\n");
718 printf ("{\n");
719 printf (" switch (insn_code_number)\n");
720 printf (" {\n");
721
722 for (clobber_p = 0; clobber_p <= 1; clobber_p++)
723 {
724 used = 0;
725 for (clobber = clobber_list; clobber; clobber = clobber->next)
726 if (clobber->has_hard_reg == clobber_p)
727 for (ent = clobber->insns; ent; ent = ent->next)
728 {
729 printf (" case %d:\n", ent->code_number);
730 used++;
731 }
732
733 if (used)
734 printf (" return %d;\n\n", clobber_p);
735 }
736
737 printf (" default:\n");
738 printf (" abort ();\n");
739 printf (" }\n");
740 printf ("}\n");
741 }
742 \f
743 /* Generate code to invoke find_free_register () as needed for the
744 scratch registers used by the peephole2 pattern in SPLIT. */
745
746 static void
747 output_peephole2_scratches (rtx split)
748 {
749 int i;
750 int insn_nr = 0;
751
752 printf (" HARD_REG_SET _regs_allocated;\n");
753 printf (" CLEAR_HARD_REG_SET (_regs_allocated);\n");
754
755 for (i = 0; i < XVECLEN (split, 0); i++)
756 {
757 rtx elt = XVECEXP (split, 0, i);
758 if (GET_CODE (elt) == MATCH_SCRATCH)
759 {
760 int last_insn_nr = insn_nr;
761 int cur_insn_nr = insn_nr;
762 int j;
763 for (j = i + 1; j < XVECLEN (split, 0); j++)
764 if (GET_CODE (XVECEXP (split, 0, j)) == MATCH_DUP)
765 {
766 if (XINT (XVECEXP (split, 0, j), 0) == XINT (elt, 0))
767 last_insn_nr = cur_insn_nr;
768 }
769 else if (GET_CODE (XVECEXP (split, 0, j)) != MATCH_SCRATCH)
770 cur_insn_nr++;
771
772 printf (" if ((operands[%d] = peep2_find_free_register (%d, %d, \"%s\", %smode, &_regs_allocated)) == NULL_RTX)\n\
773 return NULL;\n",
774 XINT (elt, 0),
775 insn_nr, last_insn_nr,
776 XSTR (elt, 1),
777 GET_MODE_NAME (GET_MODE (elt)));
778
779 }
780 else if (GET_CODE (elt) != MATCH_DUP)
781 insn_nr++;
782 }
783 }
784
785 int
786 main (int argc, char **argv)
787 {
788 rtx desc;
789
790 progname = "genemit";
791
792 if (argc <= 1)
793 fatal ("no input file name");
794
795 if (init_md_reader_args (argc, argv) != SUCCESS_EXIT_CODE)
796 return (FATAL_EXIT_CODE);
797
798 /* Assign sequential codes to all entries in the machine description
799 in parallel with the tables in insn-output.c. */
800
801 insn_code_number = 0;
802 insn_index_number = 0;
803
804 printf ("/* Generated automatically by the program `genemit'\n\
805 from the machine description file `md'. */\n\n");
806
807 printf ("#include \"config.h\"\n");
808 printf ("#include \"system.h\"\n");
809 printf ("#include \"coretypes.h\"\n");
810 printf ("#include \"tm.h\"\n");
811 printf ("#include \"rtl.h\"\n");
812 printf ("#include \"tm_p.h\"\n");
813 printf ("#include \"function.h\"\n");
814 printf ("#include \"expr.h\"\n");
815 printf ("#include \"optabs.h\"\n");
816 printf ("#include \"real.h\"\n");
817 printf ("#include \"flags.h\"\n");
818 printf ("#include \"output.h\"\n");
819 printf ("#include \"insn-config.h\"\n");
820 printf ("#include \"hard-reg-set.h\"\n");
821 printf ("#include \"recog.h\"\n");
822 printf ("#include \"resource.h\"\n");
823 printf ("#include \"reload.h\"\n");
824 printf ("#include \"toplev.h\"\n");
825 printf ("#include \"ggc.h\"\n\n");
826 printf ("#define FAIL return (end_sequence (), _val)\n");
827 printf ("#define DONE return (_val = get_insns (), end_sequence (), _val)\n\n");
828
829 /* Read the machine description. */
830
831 while (1)
832 {
833 int line_no;
834
835 desc = read_md_rtx (&line_no, &insn_code_number);
836 if (desc == NULL)
837 break;
838
839 switch (GET_CODE (desc))
840 {
841 case DEFINE_INSN:
842 gen_insn (desc, line_no);
843 break;
844
845 case DEFINE_EXPAND:
846 printf ("/* %s:%d */\n", read_rtx_filename, line_no);
847 gen_expand (desc);
848 break;
849
850 case DEFINE_SPLIT:
851 printf ("/* %s:%d */\n", read_rtx_filename, line_no);
852 gen_split (desc);
853 break;
854
855 case DEFINE_PEEPHOLE2:
856 printf ("/* %s:%d */\n", read_rtx_filename, line_no);
857 gen_split (desc);
858 break;
859
860 default:
861 break;
862 }
863 ++insn_index_number;
864 }
865
866 /* Write out the routines to add CLOBBERs to a pattern and say whether they
867 clobber a hard reg. */
868 output_add_clobbers ();
869 output_added_clobbers_hard_reg_p ();
870
871 fflush (stdout);
872 return (ferror (stdout) != 0 ? FATAL_EXIT_CODE : SUCCESS_EXIT_CODE);
873 }
874
875 /* Define this so we can link with print-rtl.o to get debug_rtx function. */
876 const char *
877 get_insn_name (int code ATTRIBUTE_UNUSED)
878 {
879 return NULL;
880 }