1 /* If-conversion support.
2 Copyright (C) 2000-2015 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
11 GCC is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
14 License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
22 #include "coretypes.h"
38 #include "cfgcleanup.h"
42 #include "tree-pass.h"
44 #include "shrink-wrap.h"
48 #ifndef MAX_CONDITIONAL_EXECUTE
49 #define MAX_CONDITIONAL_EXECUTE \
50 (BRANCH_COST (optimize_function_for_speed_p (cfun), false) \
54 #define IFCVT_MULTIPLE_DUMPS 1
56 #define NULL_BLOCK ((basic_block) NULL)
58 /* True if after combine pass. */
59 static bool ifcvt_after_combine
;
61 /* True if the target has the cbranchcc4 optab. */
62 static bool have_cbranchcc4
;
64 /* # of IF-THEN or IF-THEN-ELSE blocks we looked at */
65 static int num_possible_if_blocks
;
67 /* # of IF-THEN or IF-THEN-ELSE blocks were converted to conditional
69 static int num_updated_if_blocks
;
71 /* # of changes made. */
72 static int num_true_changes
;
74 /* Whether conditional execution changes were made. */
75 static int cond_exec_changed_p
;
77 /* Forward references. */
78 static int count_bb_insns (const_basic_block
);
79 static bool cheap_bb_rtx_cost_p (const_basic_block
, int, int);
80 static rtx_insn
*first_active_insn (basic_block
);
81 static rtx_insn
*last_active_insn (basic_block
, int);
82 static rtx_insn
*find_active_insn_before (basic_block
, rtx_insn
*);
83 static rtx_insn
*find_active_insn_after (basic_block
, rtx_insn
*);
84 static basic_block
block_fallthru (basic_block
);
85 static int cond_exec_process_insns (ce_if_block
*, rtx_insn
*, rtx
, rtx
, int,
87 static rtx
cond_exec_get_condition (rtx_insn
*);
88 static rtx
noce_get_condition (rtx_insn
*, rtx_insn
**, bool);
89 static int noce_operand_ok (const_rtx
);
90 static void merge_if_block (ce_if_block
*);
91 static int find_cond_trap (basic_block
, edge
, edge
);
92 static basic_block
find_if_header (basic_block
, int);
93 static int block_jumps_and_fallthru_p (basic_block
, basic_block
);
94 static int noce_find_if_block (basic_block
, edge
, edge
, int);
95 static int cond_exec_find_if_block (ce_if_block
*);
96 static int find_if_case_1 (basic_block
, edge
, edge
);
97 static int find_if_case_2 (basic_block
, edge
, edge
);
98 static int dead_or_predicable (basic_block
, basic_block
, basic_block
,
100 static void noce_emit_move_insn (rtx
, rtx
);
101 static rtx_insn
*block_has_only_trap (basic_block
);
103 /* Count the number of non-jump active insns in BB. */
106 count_bb_insns (const_basic_block bb
)
109 rtx_insn
*insn
= BB_HEAD (bb
);
113 if (active_insn_p (insn
) && !JUMP_P (insn
))
116 if (insn
== BB_END (bb
))
118 insn
= NEXT_INSN (insn
);
124 /* Determine whether the total insn_rtx_cost on non-jump insns in
125 basic block BB is less than MAX_COST. This function returns
126 false if the cost of any instruction could not be estimated.
128 The cost of the non-jump insns in BB is scaled by REG_BR_PROB_BASE
129 as those insns are being speculated. MAX_COST is scaled with SCALE
130 plus a small fudge factor. */
133 cheap_bb_rtx_cost_p (const_basic_block bb
, int scale
, int max_cost
)
136 rtx_insn
*insn
= BB_HEAD (bb
);
137 bool speed
= optimize_bb_for_speed_p (bb
);
139 /* Set scale to REG_BR_PROB_BASE to void the identical scaling
140 applied to insn_rtx_cost when optimizing for size. Only do
141 this after combine because if-conversion might interfere with
142 passes before combine.
144 Use optimize_function_for_speed_p instead of the pre-defined
145 variable speed to make sure it is set to same value for all
146 basic blocks in one if-conversion transformation. */
147 if (!optimize_function_for_speed_p (cfun
) && ifcvt_after_combine
)
148 scale
= REG_BR_PROB_BASE
;
149 /* Our branch probability/scaling factors are just estimates and don't
150 account for cases where we can get speculation for free and other
151 secondary benefits. So we fudge the scale factor to make speculating
152 appear a little more profitable when optimizing for performance. */
154 scale
+= REG_BR_PROB_BASE
/ 8;
161 if (NONJUMP_INSN_P (insn
))
163 int cost
= insn_rtx_cost (PATTERN (insn
), speed
) * REG_BR_PROB_BASE
;
167 /* If this instruction is the load or set of a "stack" register,
168 such as a floating point register on x87, then the cost of
169 speculatively executing this insn may need to include
170 the additional cost of popping its result off of the
171 register stack. Unfortunately, correctly recognizing and
172 accounting for this additional overhead is tricky, so for
173 now we simply prohibit such speculative execution. */
176 rtx set
= single_set (insn
);
177 if (set
&& STACK_REG_P (SET_DEST (set
)))
183 if (count
>= max_cost
)
186 else if (CALL_P (insn
))
189 if (insn
== BB_END (bb
))
191 insn
= NEXT_INSN (insn
);
197 /* Return the first non-jump active insn in the basic block. */
200 first_active_insn (basic_block bb
)
202 rtx_insn
*insn
= BB_HEAD (bb
);
206 if (insn
== BB_END (bb
))
208 insn
= NEXT_INSN (insn
);
211 while (NOTE_P (insn
) || DEBUG_INSN_P (insn
))
213 if (insn
== BB_END (bb
))
215 insn
= NEXT_INSN (insn
);
224 /* Return the last non-jump active (non-jump) insn in the basic block. */
227 last_active_insn (basic_block bb
, int skip_use_p
)
229 rtx_insn
*insn
= BB_END (bb
);
230 rtx_insn
*head
= BB_HEAD (bb
);
234 || DEBUG_INSN_P (insn
)
236 && NONJUMP_INSN_P (insn
)
237 && GET_CODE (PATTERN (insn
)) == USE
))
241 insn
= PREV_INSN (insn
);
250 /* Return the active insn before INSN inside basic block CURR_BB. */
253 find_active_insn_before (basic_block curr_bb
, rtx_insn
*insn
)
255 if (!insn
|| insn
== BB_HEAD (curr_bb
))
258 while ((insn
= PREV_INSN (insn
)) != NULL_RTX
)
260 if (NONJUMP_INSN_P (insn
) || JUMP_P (insn
) || CALL_P (insn
))
263 /* No other active insn all the way to the start of the basic block. */
264 if (insn
== BB_HEAD (curr_bb
))
271 /* Return the active insn after INSN inside basic block CURR_BB. */
274 find_active_insn_after (basic_block curr_bb
, rtx_insn
*insn
)
276 if (!insn
|| insn
== BB_END (curr_bb
))
279 while ((insn
= NEXT_INSN (insn
)) != NULL_RTX
)
281 if (NONJUMP_INSN_P (insn
) || JUMP_P (insn
) || CALL_P (insn
))
284 /* No other active insn all the way to the end of the basic block. */
285 if (insn
== BB_END (curr_bb
))
292 /* Return the basic block reached by falling though the basic block BB. */
295 block_fallthru (basic_block bb
)
297 edge e
= find_fallthru_edge (bb
->succs
);
299 return (e
) ? e
->dest
: NULL_BLOCK
;
302 /* Return true if RTXs A and B can be safely interchanged. */
305 rtx_interchangeable_p (const_rtx a
, const_rtx b
)
307 if (!rtx_equal_p (a
, b
))
310 if (GET_CODE (a
) != MEM
)
313 /* A dead type-unsafe memory reference is legal, but a live type-unsafe memory
314 reference is not. Interchanging a dead type-unsafe memory reference with
315 a live type-safe one creates a live type-unsafe memory reference, in other
316 words, it makes the program illegal.
317 We check here conservatively whether the two memory references have equal
318 memory attributes. */
320 return mem_attrs_eq_p (get_mem_attrs (a
), get_mem_attrs (b
));
324 /* Go through a bunch of insns, converting them to conditional
325 execution format if possible. Return TRUE if all of the non-note
326 insns were processed. */
329 cond_exec_process_insns (ce_if_block
*ce_info ATTRIBUTE_UNUSED
,
330 /* if block information */rtx_insn
*start
,
331 /* first insn to look at */rtx end
,
332 /* last insn to look at */rtx test
,
333 /* conditional execution test */int prob_val
,
334 /* probability of branch taken. */int mod_ok
)
336 int must_be_last
= FALSE
;
344 for (insn
= start
; ; insn
= NEXT_INSN (insn
))
346 /* dwarf2out can't cope with conditional prologues. */
347 if (NOTE_P (insn
) && NOTE_KIND (insn
) == NOTE_INSN_PROLOGUE_END
)
350 if (NOTE_P (insn
) || DEBUG_INSN_P (insn
))
353 gcc_assert (NONJUMP_INSN_P (insn
) || CALL_P (insn
));
355 /* dwarf2out can't cope with conditional unwind info. */
356 if (RTX_FRAME_RELATED_P (insn
))
359 /* Remove USE insns that get in the way. */
360 if (reload_completed
&& GET_CODE (PATTERN (insn
)) == USE
)
362 /* ??? Ug. Actually unlinking the thing is problematic,
363 given what we'd have to coordinate with our callers. */
364 SET_INSN_DELETED (insn
);
368 /* Last insn wasn't last? */
372 if (modified_in_p (test
, insn
))
379 /* Now build the conditional form of the instruction. */
380 pattern
= PATTERN (insn
);
381 xtest
= copy_rtx (test
);
383 /* If this is already a COND_EXEC, rewrite the test to be an AND of the
385 if (GET_CODE (pattern
) == COND_EXEC
)
387 if (GET_MODE (xtest
) != GET_MODE (COND_EXEC_TEST (pattern
)))
390 xtest
= gen_rtx_AND (GET_MODE (xtest
), xtest
,
391 COND_EXEC_TEST (pattern
));
392 pattern
= COND_EXEC_CODE (pattern
);
395 pattern
= gen_rtx_COND_EXEC (VOIDmode
, xtest
, pattern
);
397 /* If the machine needs to modify the insn being conditionally executed,
398 say for example to force a constant integer operand into a temp
399 register, do so here. */
400 #ifdef IFCVT_MODIFY_INSN
401 IFCVT_MODIFY_INSN (ce_info
, pattern
, insn
);
406 validate_change (insn
, &PATTERN (insn
), pattern
, 1);
408 if (CALL_P (insn
) && prob_val
>= 0)
409 validate_change (insn
, ®_NOTES (insn
),
410 gen_rtx_INT_LIST ((machine_mode
) REG_BR_PROB
,
411 prob_val
, REG_NOTES (insn
)), 1);
421 /* Return the condition for a jump. Do not do any special processing. */
424 cond_exec_get_condition (rtx_insn
*jump
)
428 if (any_condjump_p (jump
))
429 test_if
= SET_SRC (pc_set (jump
));
432 cond
= XEXP (test_if
, 0);
434 /* If this branches to JUMP_LABEL when the condition is false,
435 reverse the condition. */
436 if (GET_CODE (XEXP (test_if
, 2)) == LABEL_REF
437 && LABEL_REF_LABEL (XEXP (test_if
, 2)) == JUMP_LABEL (jump
))
439 enum rtx_code rev
= reversed_comparison_code (cond
, jump
);
443 cond
= gen_rtx_fmt_ee (rev
, GET_MODE (cond
), XEXP (cond
, 0),
450 /* Given a simple IF-THEN or IF-THEN-ELSE block, attempt to convert it
451 to conditional execution. Return TRUE if we were successful at
452 converting the block. */
455 cond_exec_process_if_block (ce_if_block
* ce_info
,
456 /* if block information */int do_multiple_p
)
458 basic_block test_bb
= ce_info
->test_bb
; /* last test block */
459 basic_block then_bb
= ce_info
->then_bb
; /* THEN */
460 basic_block else_bb
= ce_info
->else_bb
; /* ELSE or NULL */
461 rtx test_expr
; /* expression in IF_THEN_ELSE that is tested */
462 rtx_insn
*then_start
; /* first insn in THEN block */
463 rtx_insn
*then_end
; /* last insn + 1 in THEN block */
464 rtx_insn
*else_start
= NULL
; /* first insn in ELSE block or NULL */
465 rtx_insn
*else_end
= NULL
; /* last insn + 1 in ELSE block */
466 int max
; /* max # of insns to convert. */
467 int then_mod_ok
; /* whether conditional mods are ok in THEN */
468 rtx true_expr
; /* test for else block insns */
469 rtx false_expr
; /* test for then block insns */
470 int true_prob_val
; /* probability of else block */
471 int false_prob_val
; /* probability of then block */
472 rtx_insn
*then_last_head
= NULL
; /* Last match at the head of THEN */
473 rtx_insn
*else_last_head
= NULL
; /* Last match at the head of ELSE */
474 rtx_insn
*then_first_tail
= NULL
; /* First match at the tail of THEN */
475 rtx_insn
*else_first_tail
= NULL
; /* First match at the tail of ELSE */
476 int then_n_insns
, else_n_insns
, n_insns
;
477 enum rtx_code false_code
;
480 /* If test is comprised of && or || elements, and we've failed at handling
481 all of them together, just use the last test if it is the special case of
482 && elements without an ELSE block. */
483 if (!do_multiple_p
&& ce_info
->num_multiple_test_blocks
)
485 if (else_bb
|| ! ce_info
->and_and_p
)
488 ce_info
->test_bb
= test_bb
= ce_info
->last_test_bb
;
489 ce_info
->num_multiple_test_blocks
= 0;
490 ce_info
->num_and_and_blocks
= 0;
491 ce_info
->num_or_or_blocks
= 0;
494 /* Find the conditional jump to the ELSE or JOIN part, and isolate
496 test_expr
= cond_exec_get_condition (BB_END (test_bb
));
500 /* If the conditional jump is more than just a conditional jump,
501 then we can not do conditional execution conversion on this block. */
502 if (! onlyjump_p (BB_END (test_bb
)))
505 /* Collect the bounds of where we're to search, skipping any labels, jumps
506 and notes at the beginning and end of the block. Then count the total
507 number of insns and see if it is small enough to convert. */
508 then_start
= first_active_insn (then_bb
);
509 then_end
= last_active_insn (then_bb
, TRUE
);
510 then_n_insns
= ce_info
->num_then_insns
= count_bb_insns (then_bb
);
511 n_insns
= then_n_insns
;
512 max
= MAX_CONDITIONAL_EXECUTE
;
519 else_start
= first_active_insn (else_bb
);
520 else_end
= last_active_insn (else_bb
, TRUE
);
521 else_n_insns
= ce_info
->num_else_insns
= count_bb_insns (else_bb
);
522 n_insns
+= else_n_insns
;
524 /* Look for matching sequences at the head and tail of the two blocks,
525 and limit the range of insns to be converted if possible. */
526 n_matching
= flow_find_cross_jump (then_bb
, else_bb
,
527 &then_first_tail
, &else_first_tail
,
529 if (then_first_tail
== BB_HEAD (then_bb
))
530 then_start
= then_end
= NULL
;
531 if (else_first_tail
== BB_HEAD (else_bb
))
532 else_start
= else_end
= NULL
;
537 then_end
= find_active_insn_before (then_bb
, then_first_tail
);
539 else_end
= find_active_insn_before (else_bb
, else_first_tail
);
540 n_insns
-= 2 * n_matching
;
545 && then_n_insns
> n_matching
546 && else_n_insns
> n_matching
)
548 int longest_match
= MIN (then_n_insns
- n_matching
,
549 else_n_insns
- n_matching
);
551 = flow_find_head_matching_sequence (then_bb
, else_bb
,
560 /* We won't pass the insns in the head sequence to
561 cond_exec_process_insns, so we need to test them here
562 to make sure that they don't clobber the condition. */
563 for (insn
= BB_HEAD (then_bb
);
564 insn
!= NEXT_INSN (then_last_head
);
565 insn
= NEXT_INSN (insn
))
566 if (!LABEL_P (insn
) && !NOTE_P (insn
)
567 && !DEBUG_INSN_P (insn
)
568 && modified_in_p (test_expr
, insn
))
572 if (then_last_head
== then_end
)
573 then_start
= then_end
= NULL
;
574 if (else_last_head
== else_end
)
575 else_start
= else_end
= NULL
;
580 then_start
= find_active_insn_after (then_bb
, then_last_head
);
582 else_start
= find_active_insn_after (else_bb
, else_last_head
);
583 n_insns
-= 2 * n_matching
;
591 /* Map test_expr/test_jump into the appropriate MD tests to use on
592 the conditionally executed code. */
594 true_expr
= test_expr
;
596 false_code
= reversed_comparison_code (true_expr
, BB_END (test_bb
));
597 if (false_code
!= UNKNOWN
)
598 false_expr
= gen_rtx_fmt_ee (false_code
, GET_MODE (true_expr
),
599 XEXP (true_expr
, 0), XEXP (true_expr
, 1));
601 false_expr
= NULL_RTX
;
603 #ifdef IFCVT_MODIFY_TESTS
604 /* If the machine description needs to modify the tests, such as setting a
605 conditional execution register from a comparison, it can do so here. */
606 IFCVT_MODIFY_TESTS (ce_info
, true_expr
, false_expr
);
608 /* See if the conversion failed. */
609 if (!true_expr
|| !false_expr
)
613 note
= find_reg_note (BB_END (test_bb
), REG_BR_PROB
, NULL_RTX
);
616 true_prob_val
= XINT (note
, 0);
617 false_prob_val
= REG_BR_PROB_BASE
- true_prob_val
;
625 /* If we have && or || tests, do them here. These tests are in the adjacent
626 blocks after the first block containing the test. */
627 if (ce_info
->num_multiple_test_blocks
> 0)
629 basic_block bb
= test_bb
;
630 basic_block last_test_bb
= ce_info
->last_test_bb
;
637 rtx_insn
*start
, *end
;
639 enum rtx_code f_code
;
641 bb
= block_fallthru (bb
);
642 start
= first_active_insn (bb
);
643 end
= last_active_insn (bb
, TRUE
);
645 && ! cond_exec_process_insns (ce_info
, start
, end
, false_expr
,
646 false_prob_val
, FALSE
))
649 /* If the conditional jump is more than just a conditional jump, then
650 we can not do conditional execution conversion on this block. */
651 if (! onlyjump_p (BB_END (bb
)))
654 /* Find the conditional jump and isolate the test. */
655 t
= cond_exec_get_condition (BB_END (bb
));
659 f_code
= reversed_comparison_code (t
, BB_END (bb
));
660 if (f_code
== UNKNOWN
)
663 f
= gen_rtx_fmt_ee (f_code
, GET_MODE (t
), XEXP (t
, 0), XEXP (t
, 1));
664 if (ce_info
->and_and_p
)
666 t
= gen_rtx_AND (GET_MODE (t
), true_expr
, t
);
667 f
= gen_rtx_IOR (GET_MODE (t
), false_expr
, f
);
671 t
= gen_rtx_IOR (GET_MODE (t
), true_expr
, t
);
672 f
= gen_rtx_AND (GET_MODE (t
), false_expr
, f
);
675 /* If the machine description needs to modify the tests, such as
676 setting a conditional execution register from a comparison, it can
678 #ifdef IFCVT_MODIFY_MULTIPLE_TESTS
679 IFCVT_MODIFY_MULTIPLE_TESTS (ce_info
, bb
, t
, f
);
681 /* See if the conversion failed. */
689 while (bb
!= last_test_bb
);
692 /* For IF-THEN-ELSE blocks, we don't allow modifications of the test
693 on then THEN block. */
694 then_mod_ok
= (else_bb
== NULL_BLOCK
);
696 /* Go through the THEN and ELSE blocks converting the insns if possible
697 to conditional execution. */
701 || ! cond_exec_process_insns (ce_info
, then_start
, then_end
,
702 false_expr
, false_prob_val
,
706 if (else_bb
&& else_end
707 && ! cond_exec_process_insns (ce_info
, else_start
, else_end
,
708 true_expr
, true_prob_val
, TRUE
))
711 /* If we cannot apply the changes, fail. Do not go through the normal fail
712 processing, since apply_change_group will call cancel_changes. */
713 if (! apply_change_group ())
715 #ifdef IFCVT_MODIFY_CANCEL
716 /* Cancel any machine dependent changes. */
717 IFCVT_MODIFY_CANCEL (ce_info
);
722 #ifdef IFCVT_MODIFY_FINAL
723 /* Do any machine dependent final modifications. */
724 IFCVT_MODIFY_FINAL (ce_info
);
727 /* Conversion succeeded. */
729 fprintf (dump_file
, "%d insn%s converted to conditional execution.\n",
730 n_insns
, (n_insns
== 1) ? " was" : "s were");
732 /* Merge the blocks! If we had matching sequences, make sure to delete one
733 copy at the appropriate location first: delete the copy in the THEN branch
734 for a tail sequence so that the remaining one is executed last for both
735 branches, and delete the copy in the ELSE branch for a head sequence so
736 that the remaining one is executed first for both branches. */
739 rtx_insn
*from
= then_first_tail
;
741 from
= find_active_insn_after (then_bb
, from
);
742 delete_insn_chain (from
, BB_END (then_bb
), false);
745 delete_insn_chain (first_active_insn (else_bb
), else_last_head
, false);
747 merge_if_block (ce_info
);
748 cond_exec_changed_p
= TRUE
;
752 #ifdef IFCVT_MODIFY_CANCEL
753 /* Cancel any machine dependent changes. */
754 IFCVT_MODIFY_CANCEL (ce_info
);
761 /* Used by noce_process_if_block to communicate with its subroutines.
763 The subroutines know that A and B may be evaluated freely. They
764 know that X is a register. They should insert new instructions
765 before cond_earliest. */
769 /* The basic blocks that make up the IF-THEN-{ELSE-,}JOIN block. */
770 basic_block test_bb
, then_bb
, else_bb
, join_bb
;
772 /* The jump that ends TEST_BB. */
775 /* The jump condition. */
778 /* New insns should be inserted before this one. */
779 rtx_insn
*cond_earliest
;
781 /* Insns in the THEN and ELSE block. There is always just this
782 one insns in those blocks. The insns are single_set insns.
783 If there was no ELSE block, INSN_B is the last insn before
784 COND_EARLIEST, or NULL_RTX. In the former case, the insn
785 operands are still valid, as if INSN_B was moved down below
787 rtx_insn
*insn_a
, *insn_b
;
789 /* The SET_SRC of INSN_A and INSN_B. */
792 /* The SET_DEST of INSN_A. */
795 /* True if this if block is not canonical. In the canonical form of
796 if blocks, the THEN_BB is the block reached via the fallthru edge
797 from TEST_BB. For the noce transformations, we allow the symmetric
799 bool then_else_reversed
;
801 /* True if the contents of then_bb and else_bb are a
802 simple single set instruction. */
806 /* The total rtx cost of the instructions in then_bb and else_bb. */
807 unsigned int then_cost
;
808 unsigned int else_cost
;
810 /* Estimated cost of the particular branch instruction. */
811 unsigned int branch_cost
;
814 static rtx
noce_emit_store_flag (struct noce_if_info
*, rtx
, int, int);
815 static int noce_try_move (struct noce_if_info
*);
816 static int noce_try_store_flag (struct noce_if_info
*);
817 static int noce_try_addcc (struct noce_if_info
*);
818 static int noce_try_store_flag_constants (struct noce_if_info
*);
819 static int noce_try_store_flag_mask (struct noce_if_info
*);
820 static rtx
noce_emit_cmove (struct noce_if_info
*, rtx
, enum rtx_code
, rtx
,
822 static int noce_try_cmove (struct noce_if_info
*);
823 static int noce_try_cmove_arith (struct noce_if_info
*);
824 static rtx
noce_get_alt_condition (struct noce_if_info
*, rtx
, rtx_insn
**);
825 static int noce_try_minmax (struct noce_if_info
*);
826 static int noce_try_abs (struct noce_if_info
*);
827 static int noce_try_sign_mask (struct noce_if_info
*);
829 /* Helper function for noce_try_store_flag*. */
832 noce_emit_store_flag (struct noce_if_info
*if_info
, rtx x
, int reversep
,
835 rtx cond
= if_info
->cond
;
839 cond_complex
= (! general_operand (XEXP (cond
, 0), VOIDmode
)
840 || ! general_operand (XEXP (cond
, 1), VOIDmode
));
842 /* If earliest == jump, or when the condition is complex, try to
843 build the store_flag insn directly. */
847 rtx set
= pc_set (if_info
->jump
);
848 cond
= XEXP (SET_SRC (set
), 0);
849 if (GET_CODE (XEXP (SET_SRC (set
), 2)) == LABEL_REF
850 && LABEL_REF_LABEL (XEXP (SET_SRC (set
), 2)) == JUMP_LABEL (if_info
->jump
))
851 reversep
= !reversep
;
852 if (if_info
->then_else_reversed
)
853 reversep
= !reversep
;
857 code
= reversed_comparison_code (cond
, if_info
->jump
);
859 code
= GET_CODE (cond
);
861 if ((if_info
->cond_earliest
== if_info
->jump
|| cond_complex
)
862 && (normalize
== 0 || STORE_FLAG_VALUE
== normalize
))
864 rtx src
= gen_rtx_fmt_ee (code
, GET_MODE (x
), XEXP (cond
, 0),
866 rtx set
= gen_rtx_SET (x
, src
);
869 rtx_insn
*insn
= emit_insn (set
);
871 if (recog_memoized (insn
) >= 0)
873 rtx_insn
*seq
= get_insns ();
877 if_info
->cond_earliest
= if_info
->jump
;
885 /* Don't even try if the comparison operands or the mode of X are weird. */
886 if (cond_complex
|| !SCALAR_INT_MODE_P (GET_MODE (x
)))
889 return emit_store_flag (x
, code
, XEXP (cond
, 0),
890 XEXP (cond
, 1), VOIDmode
,
891 (code
== LTU
|| code
== LEU
892 || code
== GEU
|| code
== GTU
), normalize
);
895 /* Emit instruction to move an rtx, possibly into STRICT_LOW_PART.
896 X is the destination/target and Y is the value to copy. */
899 noce_emit_move_insn (rtx x
, rtx y
)
901 machine_mode outmode
;
905 if (GET_CODE (x
) != STRICT_LOW_PART
)
907 rtx_insn
*seq
, *insn
;
912 /* Check that the SET_SRC is reasonable before calling emit_move_insn,
913 otherwise construct a suitable SET pattern ourselves. */
914 insn
= (OBJECT_P (y
) || CONSTANT_P (y
) || GET_CODE (y
) == SUBREG
)
915 ? emit_move_insn (x
, y
)
916 : emit_insn (gen_rtx_SET (x
, y
));
920 if (recog_memoized (insn
) <= 0)
922 if (GET_CODE (x
) == ZERO_EXTRACT
)
924 rtx op
= XEXP (x
, 0);
925 unsigned HOST_WIDE_INT size
= INTVAL (XEXP (x
, 1));
926 unsigned HOST_WIDE_INT start
= INTVAL (XEXP (x
, 2));
928 /* store_bit_field expects START to be relative to
929 BYTES_BIG_ENDIAN and adjusts this value for machines with
930 BITS_BIG_ENDIAN != BYTES_BIG_ENDIAN. In order to be able to
931 invoke store_bit_field again it is necessary to have the START
932 value from the first call. */
933 if (BITS_BIG_ENDIAN
!= BYTES_BIG_ENDIAN
)
936 start
= BITS_PER_UNIT
- start
- size
;
939 gcc_assert (REG_P (op
));
940 start
= BITS_PER_WORD
- start
- size
;
944 gcc_assert (start
< (MEM_P (op
) ? BITS_PER_UNIT
: BITS_PER_WORD
));
945 store_bit_field (op
, size
, start
, 0, 0, GET_MODE (x
), y
, false);
949 switch (GET_RTX_CLASS (GET_CODE (y
)))
952 ot
= code_to_optab (GET_CODE (y
));
956 target
= expand_unop (GET_MODE (y
), ot
, XEXP (y
, 0), x
, 0);
957 if (target
!= NULL_RTX
)
960 emit_move_insn (x
, target
);
969 ot
= code_to_optab (GET_CODE (y
));
973 target
= expand_binop (GET_MODE (y
), ot
,
974 XEXP (y
, 0), XEXP (y
, 1),
976 if (target
!= NULL_RTX
)
979 emit_move_insn (x
, target
);
996 inner
= XEXP (outer
, 0);
997 outmode
= GET_MODE (outer
);
998 bitpos
= SUBREG_BYTE (outer
) * BITS_PER_UNIT
;
999 store_bit_field (inner
, GET_MODE_BITSIZE (outmode
), bitpos
,
1000 0, 0, outmode
, y
, false);
1003 /* Return the CC reg if it is used in COND. */
1006 cc_in_cond (rtx cond
)
1008 if (have_cbranchcc4
&& cond
1009 && GET_MODE_CLASS (GET_MODE (XEXP (cond
, 0))) == MODE_CC
)
1010 return XEXP (cond
, 0);
1015 /* Return sequence of instructions generated by if conversion. This
1016 function calls end_sequence() to end the current stream, ensures
1017 that the instructions are unshared, recognizable non-jump insns.
1018 On failure, this function returns a NULL_RTX. */
1021 end_ifcvt_sequence (struct noce_if_info
*if_info
)
1024 rtx_insn
*seq
= get_insns ();
1025 rtx cc
= cc_in_cond (if_info
->cond
);
1027 set_used_flags (if_info
->x
);
1028 set_used_flags (if_info
->cond
);
1029 set_used_flags (if_info
->a
);
1030 set_used_flags (if_info
->b
);
1032 for (insn
= seq
; insn
; insn
= NEXT_INSN (insn
))
1033 set_used_flags (insn
);
1035 unshare_all_rtl_in_chain (seq
);
1038 /* Make sure that all of the instructions emitted are recognizable,
1039 and that we haven't introduced a new jump instruction.
1040 As an exercise for the reader, build a general mechanism that
1041 allows proper placement of required clobbers. */
1042 for (insn
= seq
; insn
; insn
= NEXT_INSN (insn
))
1044 || recog_memoized (insn
) == -1
1045 /* Make sure new generated code does not clobber CC. */
1046 || (cc
&& set_of (cc
, insn
)))
1052 /* Return true iff the then and else basic block (if it exists)
1053 consist of a single simple set instruction. */
1056 noce_simple_bbs (struct noce_if_info
*if_info
)
1058 if (!if_info
->then_simple
)
1061 if (if_info
->else_bb
)
1062 return if_info
->else_simple
;
1067 /* Convert "if (a != b) x = a; else x = b" into "x = a" and
1068 "if (a == b) x = a; else x = b" into "x = b". */
1071 noce_try_move (struct noce_if_info
*if_info
)
1073 rtx cond
= if_info
->cond
;
1074 enum rtx_code code
= GET_CODE (cond
);
1078 if (code
!= NE
&& code
!= EQ
)
1081 if (!noce_simple_bbs (if_info
))
1084 /* This optimization isn't valid if either A or B could be a NaN
1085 or a signed zero. */
1086 if (HONOR_NANS (if_info
->x
)
1087 || HONOR_SIGNED_ZEROS (if_info
->x
))
1090 /* Check whether the operands of the comparison are A and in
1092 if ((rtx_equal_p (if_info
->a
, XEXP (cond
, 0))
1093 && rtx_equal_p (if_info
->b
, XEXP (cond
, 1)))
1094 || (rtx_equal_p (if_info
->a
, XEXP (cond
, 1))
1095 && rtx_equal_p (if_info
->b
, XEXP (cond
, 0))))
1097 if (!rtx_interchangeable_p (if_info
->a
, if_info
->b
))
1100 y
= (code
== EQ
) ? if_info
->a
: if_info
->b
;
1102 /* Avoid generating the move if the source is the destination. */
1103 if (! rtx_equal_p (if_info
->x
, y
))
1106 noce_emit_move_insn (if_info
->x
, y
);
1107 seq
= end_ifcvt_sequence (if_info
);
1111 emit_insn_before_setloc (seq
, if_info
->jump
,
1112 INSN_LOCATION (if_info
->insn_a
));
1119 /* Convert "if (test) x = 1; else x = 0".
1121 Only try 0 and STORE_FLAG_VALUE here. Other combinations will be
1122 tried in noce_try_store_flag_constants after noce_try_cmove has had
1123 a go at the conversion. */
1126 noce_try_store_flag (struct noce_if_info
*if_info
)
1132 if (!noce_simple_bbs (if_info
))
1135 if (CONST_INT_P (if_info
->b
)
1136 && INTVAL (if_info
->b
) == STORE_FLAG_VALUE
1137 && if_info
->a
== const0_rtx
)
1139 else if (if_info
->b
== const0_rtx
1140 && CONST_INT_P (if_info
->a
)
1141 && INTVAL (if_info
->a
) == STORE_FLAG_VALUE
1142 && (reversed_comparison_code (if_info
->cond
, if_info
->jump
)
1150 target
= noce_emit_store_flag (if_info
, if_info
->x
, reversep
, 0);
1153 if (target
!= if_info
->x
)
1154 noce_emit_move_insn (if_info
->x
, target
);
1156 seq
= end_ifcvt_sequence (if_info
);
1160 emit_insn_before_setloc (seq
, if_info
->jump
,
1161 INSN_LOCATION (if_info
->insn_a
));
1172 /* Convert "if (test) x = -A; else x = A" into
1173 x = A; if (test) x = -x if the machine can do the
1174 conditional negate form of this cheaply.
1175 Try this before noce_try_cmove that will just load the
1176 immediates into two registers and do a conditional select
1177 between them. If the target has a conditional negate or
1178 conditional invert operation we can save a potentially
1179 expensive constant synthesis. */
1182 noce_try_inverse_constants (struct noce_if_info
*if_info
)
1184 if (!noce_simple_bbs (if_info
))
1187 if (!CONST_INT_P (if_info
->a
)
1188 || !CONST_INT_P (if_info
->b
)
1189 || !REG_P (if_info
->x
))
1192 machine_mode mode
= GET_MODE (if_info
->x
);
1194 HOST_WIDE_INT val_a
= INTVAL (if_info
->a
);
1195 HOST_WIDE_INT val_b
= INTVAL (if_info
->b
);
1197 rtx cond
= if_info
->cond
;
1205 if (val_b
!= HOST_WIDE_INT_MIN
&& val_a
== -val_b
)
1207 else if (val_a
== ~val_b
)
1215 rtx tmp
= gen_reg_rtx (mode
);
1216 noce_emit_move_insn (tmp
, if_info
->a
);
1218 target
= emit_conditional_neg_or_complement (x
, code
, mode
, cond
, tmp
, tmp
);
1222 rtx_insn
*seq
= get_insns ();
1230 if (target
!= if_info
->x
)
1231 noce_emit_move_insn (if_info
->x
, target
);
1233 seq
= end_ifcvt_sequence (if_info
);
1238 emit_insn_before_setloc (seq
, if_info
->jump
,
1239 INSN_LOCATION (if_info
->insn_a
));
1248 /* Convert "if (test) x = a; else x = b", for A and B constant.
1249 Also allow A = y + c1, B = y + c2, with a common y between A
1253 noce_try_store_flag_constants (struct noce_if_info
*if_info
)
1258 HOST_WIDE_INT itrue
, ifalse
, diff
, tmp
;
1261 machine_mode mode
= GET_MODE (if_info
->x
);;
1262 rtx common
= NULL_RTX
;
1267 /* Handle cases like x := test ? y + 3 : y + 4. */
1268 if (GET_CODE (a
) == PLUS
1269 && GET_CODE (b
) == PLUS
1270 && CONST_INT_P (XEXP (a
, 1))
1271 && CONST_INT_P (XEXP (b
, 1))
1272 && rtx_equal_p (XEXP (a
, 0), XEXP (b
, 0))
1273 && noce_operand_ok (XEXP (a
, 0))
1274 && if_info
->branch_cost
>= 2)
1276 common
= XEXP (a
, 0);
1281 if (!noce_simple_bbs (if_info
))
1287 ifalse
= INTVAL (a
);
1289 bool subtract_flag_p
= false;
1291 diff
= (unsigned HOST_WIDE_INT
) itrue
- ifalse
;
1292 /* Make sure we can represent the difference between the two values. */
1294 != ((ifalse
< 0) != (itrue
< 0) ? ifalse
< 0 : ifalse
< itrue
))
1297 diff
= trunc_int_for_mode (diff
, mode
);
1299 can_reverse
= (reversed_comparison_code (if_info
->cond
, if_info
->jump
)
1303 if (diff
== STORE_FLAG_VALUE
|| diff
== -STORE_FLAG_VALUE
)
1306 /* We could collapse these cases but it is easier to follow the
1307 diff/STORE_FLAG_VALUE combinations when they are listed
1311 => 4 + (test != 0). */
1312 if (diff
< 0 && STORE_FLAG_VALUE
< 0)
1315 => can_reverse | 4 + (test == 0)
1316 !can_reverse | 3 - (test != 0). */
1317 else if (diff
> 0 && STORE_FLAG_VALUE
< 0)
1319 reversep
= can_reverse
;
1320 subtract_flag_p
= !can_reverse
;
1321 /* If we need to subtract the flag and we have PLUS-immediate
1322 A and B then it is unlikely to be beneficial to play tricks
1324 if (subtract_flag_p
&& common
)
1328 => can_reverse | 3 + (test == 0)
1329 !can_reverse | 4 - (test != 0). */
1330 else if (diff
< 0 && STORE_FLAG_VALUE
> 0)
1332 reversep
= can_reverse
;
1333 subtract_flag_p
= !can_reverse
;
1334 /* If we need to subtract the flag and we have PLUS-immediate
1335 A and B then it is unlikely to be beneficial to play tricks
1337 if (subtract_flag_p
&& common
)
1341 => 4 + (test != 0). */
1342 else if (diff
> 0 && STORE_FLAG_VALUE
> 0)
1347 else if (ifalse
== 0 && exact_log2 (itrue
) >= 0
1348 && (STORE_FLAG_VALUE
== 1
1349 || if_info
->branch_cost
>= 2))
1351 else if (itrue
== 0 && exact_log2 (ifalse
) >= 0 && can_reverse
1352 && (STORE_FLAG_VALUE
== 1 || if_info
->branch_cost
>= 2))
1357 else if (itrue
== -1
1358 && (STORE_FLAG_VALUE
== -1
1359 || if_info
->branch_cost
>= 2))
1361 else if (ifalse
== -1 && can_reverse
1362 && (STORE_FLAG_VALUE
== -1 || if_info
->branch_cost
>= 2))
1372 std::swap (itrue
, ifalse
);
1373 diff
= trunc_int_for_mode (-(unsigned HOST_WIDE_INT
) diff
, mode
);
1378 /* If we have x := test ? x + 3 : x + 4 then move the original
1379 x out of the way while we store flags. */
1380 if (common
&& rtx_equal_p (common
, if_info
->x
))
1382 common
= gen_reg_rtx (mode
);
1383 noce_emit_move_insn (common
, if_info
->x
);
1386 target
= noce_emit_store_flag (if_info
, if_info
->x
, reversep
, normalize
);
1393 /* if (test) x = 3; else x = 4;
1394 => x = 3 + (test == 0); */
1395 if (diff
== STORE_FLAG_VALUE
|| diff
== -STORE_FLAG_VALUE
)
1397 /* Add the common part now. This may allow combine to merge this
1398 with the store flag operation earlier into some sort of conditional
1399 increment/decrement if the target allows it. */
1401 target
= expand_simple_binop (mode
, PLUS
,
1403 target
, 0, OPTAB_WIDEN
);
1405 /* Always use ifalse here. It should have been swapped with itrue
1406 when appropriate when reversep is true. */
1407 target
= expand_simple_binop (mode
, subtract_flag_p
? MINUS
: PLUS
,
1408 gen_int_mode (ifalse
, mode
), target
,
1409 if_info
->x
, 0, OPTAB_WIDEN
);
1411 /* Other cases are not beneficial when the original A and B are PLUS
1418 /* if (test) x = 8; else x = 0;
1419 => x = (test != 0) << 3; */
1420 else if (ifalse
== 0 && (tmp
= exact_log2 (itrue
)) >= 0)
1422 target
= expand_simple_binop (mode
, ASHIFT
,
1423 target
, GEN_INT (tmp
), if_info
->x
, 0,
1427 /* if (test) x = -1; else x = b;
1428 => x = -(test != 0) | b; */
1429 else if (itrue
== -1)
1431 target
= expand_simple_binop (mode
, IOR
,
1432 target
, gen_int_mode (ifalse
, mode
),
1433 if_info
->x
, 0, OPTAB_WIDEN
);
1447 if (target
!= if_info
->x
)
1448 noce_emit_move_insn (if_info
->x
, target
);
1450 seq
= end_ifcvt_sequence (if_info
);
1454 emit_insn_before_setloc (seq
, if_info
->jump
,
1455 INSN_LOCATION (if_info
->insn_a
));
1462 /* Convert "if (test) foo++" into "foo += (test != 0)", and
1463 similarly for "foo--". */
1466 noce_try_addcc (struct noce_if_info
*if_info
)
1470 int subtract
, normalize
;
1472 if (!noce_simple_bbs (if_info
))
1475 if (GET_CODE (if_info
->a
) == PLUS
1476 && rtx_equal_p (XEXP (if_info
->a
, 0), if_info
->b
)
1477 && (reversed_comparison_code (if_info
->cond
, if_info
->jump
)
1480 rtx cond
= if_info
->cond
;
1481 enum rtx_code code
= reversed_comparison_code (cond
, if_info
->jump
);
1483 /* First try to use addcc pattern. */
1484 if (general_operand (XEXP (cond
, 0), VOIDmode
)
1485 && general_operand (XEXP (cond
, 1), VOIDmode
))
1488 target
= emit_conditional_add (if_info
->x
, code
,
1493 XEXP (if_info
->a
, 1),
1494 GET_MODE (if_info
->x
),
1495 (code
== LTU
|| code
== GEU
1496 || code
== LEU
|| code
== GTU
));
1499 if (target
!= if_info
->x
)
1500 noce_emit_move_insn (if_info
->x
, target
);
1502 seq
= end_ifcvt_sequence (if_info
);
1506 emit_insn_before_setloc (seq
, if_info
->jump
,
1507 INSN_LOCATION (if_info
->insn_a
));
1513 /* If that fails, construct conditional increment or decrement using
1515 if (if_info
->branch_cost
>= 2
1516 && (XEXP (if_info
->a
, 1) == const1_rtx
1517 || XEXP (if_info
->a
, 1) == constm1_rtx
))
1520 if (STORE_FLAG_VALUE
== INTVAL (XEXP (if_info
->a
, 1)))
1521 subtract
= 0, normalize
= 0;
1522 else if (-STORE_FLAG_VALUE
== INTVAL (XEXP (if_info
->a
, 1)))
1523 subtract
= 1, normalize
= 0;
1525 subtract
= 0, normalize
= INTVAL (XEXP (if_info
->a
, 1));
1528 target
= noce_emit_store_flag (if_info
,
1529 gen_reg_rtx (GET_MODE (if_info
->x
)),
1533 target
= expand_simple_binop (GET_MODE (if_info
->x
),
1534 subtract
? MINUS
: PLUS
,
1535 if_info
->b
, target
, if_info
->x
,
1539 if (target
!= if_info
->x
)
1540 noce_emit_move_insn (if_info
->x
, target
);
1542 seq
= end_ifcvt_sequence (if_info
);
1546 emit_insn_before_setloc (seq
, if_info
->jump
,
1547 INSN_LOCATION (if_info
->insn_a
));
1557 /* Convert "if (test) x = 0;" to "x &= -(test == 0);" */
1560 noce_try_store_flag_mask (struct noce_if_info
*if_info
)
1566 if (!noce_simple_bbs (if_info
))
1570 if ((if_info
->branch_cost
>= 2
1571 || STORE_FLAG_VALUE
== -1)
1572 && ((if_info
->a
== const0_rtx
1573 && rtx_equal_p (if_info
->b
, if_info
->x
))
1574 || ((reversep
= (reversed_comparison_code (if_info
->cond
,
1577 && if_info
->b
== const0_rtx
1578 && rtx_equal_p (if_info
->a
, if_info
->x
))))
1581 target
= noce_emit_store_flag (if_info
,
1582 gen_reg_rtx (GET_MODE (if_info
->x
)),
1585 target
= expand_simple_binop (GET_MODE (if_info
->x
), AND
,
1587 target
, if_info
->x
, 0,
1592 int old_cost
, new_cost
, insn_cost
;
1595 if (target
!= if_info
->x
)
1596 noce_emit_move_insn (if_info
->x
, target
);
1598 seq
= end_ifcvt_sequence (if_info
);
1602 speed_p
= optimize_bb_for_speed_p (BLOCK_FOR_INSN (if_info
->insn_a
));
1603 insn_cost
= insn_rtx_cost (PATTERN (if_info
->insn_a
), speed_p
);
1604 old_cost
= COSTS_N_INSNS (if_info
->branch_cost
) + insn_cost
;
1605 new_cost
= seq_cost (seq
, speed_p
);
1607 if (new_cost
> old_cost
)
1610 emit_insn_before_setloc (seq
, if_info
->jump
,
1611 INSN_LOCATION (if_info
->insn_a
));
1621 /* Helper function for noce_try_cmove and noce_try_cmove_arith. */
1624 noce_emit_cmove (struct noce_if_info
*if_info
, rtx x
, enum rtx_code code
,
1625 rtx cmp_a
, rtx cmp_b
, rtx vfalse
, rtx vtrue
)
1627 rtx target ATTRIBUTE_UNUSED
;
1628 int unsignedp ATTRIBUTE_UNUSED
;
1630 /* If earliest == jump, try to build the cmove insn directly.
1631 This is helpful when combine has created some complex condition
1632 (like for alpha's cmovlbs) that we can't hope to regenerate
1633 through the normal interface. */
1635 if (if_info
->cond_earliest
== if_info
->jump
)
1637 rtx cond
= gen_rtx_fmt_ee (code
, GET_MODE (if_info
->cond
), cmp_a
, cmp_b
);
1638 rtx if_then_else
= gen_rtx_IF_THEN_ELSE (GET_MODE (x
),
1639 cond
, vtrue
, vfalse
);
1640 rtx set
= gen_rtx_SET (x
, if_then_else
);
1643 rtx_insn
*insn
= emit_insn (set
);
1645 if (recog_memoized (insn
) >= 0)
1647 rtx_insn
*seq
= get_insns ();
1657 /* Don't even try if the comparison operands are weird
1658 except that the target supports cbranchcc4. */
1659 if (! general_operand (cmp_a
, GET_MODE (cmp_a
))
1660 || ! general_operand (cmp_b
, GET_MODE (cmp_b
)))
1662 if (!have_cbranchcc4
1663 || GET_MODE_CLASS (GET_MODE (cmp_a
)) != MODE_CC
1664 || cmp_b
!= const0_rtx
)
1668 unsignedp
= (code
== LTU
|| code
== GEU
1669 || code
== LEU
|| code
== GTU
);
1671 target
= emit_conditional_move (x
, code
, cmp_a
, cmp_b
, VOIDmode
,
1672 vtrue
, vfalse
, GET_MODE (x
),
1677 /* We might be faced with a situation like:
1680 vtrue = (subreg:M (reg:N VTRUE) BYTE)
1681 vfalse = (subreg:M (reg:N VFALSE) BYTE)
1683 We can't do a conditional move in mode M, but it's possible that we
1684 could do a conditional move in mode N instead and take a subreg of
1687 If we can't create new pseudos, though, don't bother. */
1688 if (reload_completed
)
1691 if (GET_CODE (vtrue
) == SUBREG
&& GET_CODE (vfalse
) == SUBREG
)
1693 rtx reg_vtrue
= SUBREG_REG (vtrue
);
1694 rtx reg_vfalse
= SUBREG_REG (vfalse
);
1695 unsigned int byte_vtrue
= SUBREG_BYTE (vtrue
);
1696 unsigned int byte_vfalse
= SUBREG_BYTE (vfalse
);
1697 rtx promoted_target
;
1699 if (GET_MODE (reg_vtrue
) != GET_MODE (reg_vfalse
)
1700 || byte_vtrue
!= byte_vfalse
1701 || (SUBREG_PROMOTED_VAR_P (vtrue
)
1702 != SUBREG_PROMOTED_VAR_P (vfalse
))
1703 || (SUBREG_PROMOTED_GET (vtrue
)
1704 != SUBREG_PROMOTED_GET (vfalse
)))
1707 promoted_target
= gen_reg_rtx (GET_MODE (reg_vtrue
));
1709 target
= emit_conditional_move (promoted_target
, code
, cmp_a
, cmp_b
,
1710 VOIDmode
, reg_vtrue
, reg_vfalse
,
1711 GET_MODE (reg_vtrue
), unsignedp
);
1712 /* Nope, couldn't do it in that mode either. */
1716 target
= gen_rtx_SUBREG (GET_MODE (vtrue
), promoted_target
, byte_vtrue
);
1717 SUBREG_PROMOTED_VAR_P (target
) = SUBREG_PROMOTED_VAR_P (vtrue
);
1718 SUBREG_PROMOTED_SET (target
, SUBREG_PROMOTED_GET (vtrue
));
1719 emit_move_insn (x
, target
);
1726 /* Try only simple constants and registers here. More complex cases
1727 are handled in noce_try_cmove_arith after noce_try_store_flag_arith
1728 has had a go at it. */
1731 noce_try_cmove (struct noce_if_info
*if_info
)
1737 if (!noce_simple_bbs (if_info
))
1740 if ((CONSTANT_P (if_info
->a
) || register_operand (if_info
->a
, VOIDmode
))
1741 && (CONSTANT_P (if_info
->b
) || register_operand (if_info
->b
, VOIDmode
)))
1745 code
= GET_CODE (if_info
->cond
);
1746 target
= noce_emit_cmove (if_info
, if_info
->x
, code
,
1747 XEXP (if_info
->cond
, 0),
1748 XEXP (if_info
->cond
, 1),
1749 if_info
->a
, if_info
->b
);
1753 if (target
!= if_info
->x
)
1754 noce_emit_move_insn (if_info
->x
, target
);
1756 seq
= end_ifcvt_sequence (if_info
);
1760 emit_insn_before_setloc (seq
, if_info
->jump
,
1761 INSN_LOCATION (if_info
->insn_a
));
1764 /* If both a and b are constants try a last-ditch transformation:
1765 if (test) x = a; else x = b;
1766 => x = (-(test != 0) & (b - a)) + a;
1767 Try this only if the target-specific expansion above has failed.
1768 The target-specific expander may want to generate sequences that
1769 we don't know about, so give them a chance before trying this
1771 else if (!targetm
.have_conditional_execution ()
1772 && CONST_INT_P (if_info
->a
) && CONST_INT_P (if_info
->b
)
1773 && ((if_info
->branch_cost
>= 2 && STORE_FLAG_VALUE
== -1)
1774 || if_info
->branch_cost
>= 3))
1776 machine_mode mode
= GET_MODE (if_info
->x
);
1777 HOST_WIDE_INT ifalse
= INTVAL (if_info
->a
);
1778 HOST_WIDE_INT itrue
= INTVAL (if_info
->b
);
1779 rtx target
= noce_emit_store_flag (if_info
, if_info
->x
, false, -1);
1786 HOST_WIDE_INT diff
= (unsigned HOST_WIDE_INT
) itrue
- ifalse
;
1787 /* Make sure we can represent the difference
1788 between the two values. */
1790 != ((ifalse
< 0) != (itrue
< 0) ? ifalse
< 0 : ifalse
< itrue
))
1796 diff
= trunc_int_for_mode (diff
, mode
);
1797 target
= expand_simple_binop (mode
, AND
,
1798 target
, gen_int_mode (diff
, mode
),
1799 if_info
->x
, 0, OPTAB_WIDEN
);
1801 target
= expand_simple_binop (mode
, PLUS
,
1802 target
, gen_int_mode (ifalse
, mode
),
1803 if_info
->x
, 0, OPTAB_WIDEN
);
1806 if (target
!= if_info
->x
)
1807 noce_emit_move_insn (if_info
->x
, target
);
1809 seq
= end_ifcvt_sequence (if_info
);
1813 emit_insn_before_setloc (seq
, if_info
->jump
,
1814 INSN_LOCATION (if_info
->insn_a
));
1830 /* Return true if X contains a conditional code mode rtx. */
1833 contains_ccmode_rtx_p (rtx x
)
1835 subrtx_iterator::array_type array
;
1836 FOR_EACH_SUBRTX (iter
, array
, x
, ALL
)
1837 if (GET_MODE_CLASS (GET_MODE (*iter
)) == MODE_CC
)
1843 /* Helper for bb_valid_for_noce_process_p. Validate that
1844 the rtx insn INSN is a single set that does not set
1845 the conditional register CC and is in general valid for
1849 insn_valid_noce_process_p (rtx_insn
*insn
, rtx cc
)
1852 || !NONJUMP_INSN_P (insn
)
1853 || (cc
&& set_of (cc
, insn
)))
1856 rtx sset
= single_set (insn
);
1858 /* Currently support only simple single sets in test_bb. */
1860 || !noce_operand_ok (SET_DEST (sset
))
1861 || contains_ccmode_rtx_p (SET_DEST (sset
))
1862 || !noce_operand_ok (SET_SRC (sset
)))
1869 /* Return true iff the registers that the insns in BB_A set do not
1870 get used in BB_B. */
1873 bbs_ok_for_cmove_arith (basic_block bb_a
, basic_block bb_b
)
1876 bitmap bba_sets
= BITMAP_ALLOC (®_obstack
);
1881 FOR_BB_INSNS (bb_a
, a_insn
)
1883 if (!active_insn_p (a_insn
))
1886 rtx sset_a
= single_set (a_insn
);
1890 BITMAP_FREE (bba_sets
);
1894 /* Record all registers that BB_A sets. */
1895 FOR_EACH_INSN_DEF (def
, a_insn
)
1896 bitmap_set_bit (bba_sets
, DF_REF_REGNO (def
));
1901 FOR_BB_INSNS (bb_b
, b_insn
)
1903 if (!active_insn_p (b_insn
))
1906 rtx sset_b
= single_set (b_insn
);
1910 BITMAP_FREE (bba_sets
);
1914 /* Make sure this is a REG and not some instance
1915 of ZERO_EXTRACT or SUBREG or other dangerous stuff. */
1916 if (!REG_P (SET_DEST (sset_b
)))
1918 BITMAP_FREE (bba_sets
);
1922 /* If the insn uses a reg set in BB_A return false. */
1923 FOR_EACH_INSN_USE (use
, b_insn
)
1925 if (bitmap_bit_p (bba_sets
, DF_REF_REGNO (use
)))
1927 BITMAP_FREE (bba_sets
);
1934 BITMAP_FREE (bba_sets
);
1938 /* Emit copies of all the active instructions in BB except the last.
1939 This is a helper for noce_try_cmove_arith. */
1942 noce_emit_all_but_last (basic_block bb
)
1944 rtx_insn
*last
= last_active_insn (bb
, FALSE
);
1946 FOR_BB_INSNS (bb
, insn
)
1948 if (insn
!= last
&& active_insn_p (insn
))
1950 rtx_insn
*to_emit
= as_a
<rtx_insn
*> (copy_rtx (insn
));
1952 emit_insn (PATTERN (to_emit
));
1957 /* Helper for noce_try_cmove_arith. Emit the pattern TO_EMIT and return
1958 the resulting insn or NULL if it's not a valid insn. */
1961 noce_emit_insn (rtx to_emit
)
1963 gcc_assert (to_emit
);
1964 rtx_insn
*insn
= emit_insn (to_emit
);
1966 if (recog_memoized (insn
) < 0)
1972 /* Helper for noce_try_cmove_arith. Emit a copy of the insns up to
1973 and including the penultimate one in BB if it is not simple
1974 (as indicated by SIMPLE). Then emit LAST_INSN as the last
1975 insn in the block. The reason for that is that LAST_INSN may
1976 have been modified by the preparation in noce_try_cmove_arith. */
1979 noce_emit_bb (rtx last_insn
, basic_block bb
, bool simple
)
1982 noce_emit_all_but_last (bb
);
1984 if (last_insn
&& !noce_emit_insn (last_insn
))
1990 /* Try more complex cases involving conditional_move. */
1993 noce_try_cmove_arith (struct noce_if_info
*if_info
)
1999 rtx_insn
*insn_a
, *insn_b
;
2000 bool a_simple
= if_info
->then_simple
;
2001 bool b_simple
= if_info
->else_simple
;
2002 basic_block then_bb
= if_info
->then_bb
;
2003 basic_block else_bb
= if_info
->else_bb
;
2007 rtx_insn
*ifcvt_seq
;
2009 /* A conditional move from two memory sources is equivalent to a
2010 conditional on their addresses followed by a load. Don't do this
2011 early because it'll screw alias analysis. Note that we've
2012 already checked for no side effects. */
2013 /* ??? FIXME: Magic number 5. */
2014 if (cse_not_expected
2015 && MEM_P (a
) && MEM_P (b
)
2016 && MEM_ADDR_SPACE (a
) == MEM_ADDR_SPACE (b
)
2017 && if_info
->branch_cost
>= 5)
2019 machine_mode address_mode
= get_address_mode (a
);
2023 x
= gen_reg_rtx (address_mode
);
2027 /* ??? We could handle this if we knew that a load from A or B could
2028 not trap or fault. This is also true if we've already loaded
2029 from the address along the path from ENTRY. */
2030 else if (may_trap_or_fault_p (a
) || may_trap_or_fault_p (b
))
2033 /* if (test) x = a + b; else x = c - d;
2040 code
= GET_CODE (if_info
->cond
);
2041 insn_a
= if_info
->insn_a
;
2042 insn_b
= if_info
->insn_b
;
2044 machine_mode x_mode
= GET_MODE (x
);
2046 if (!can_conditionally_move_p (x_mode
))
2049 unsigned int then_cost
;
2050 unsigned int else_cost
;
2052 then_cost
= if_info
->then_cost
;
2057 else_cost
= if_info
->else_cost
;
2061 /* We're going to execute one of the basic blocks anyway, so
2062 bail out if the most expensive of the two blocks is unacceptable. */
2063 if (MAX (then_cost
, else_cost
) > COSTS_N_INSNS (if_info
->branch_cost
))
2066 /* Possibly rearrange operands to make things come out more natural. */
2067 if (reversed_comparison_code (if_info
->cond
, if_info
->jump
) != UNKNOWN
)
2070 if (rtx_equal_p (b
, x
))
2072 else if (general_operand (b
, GET_MODE (b
)))
2077 code
= reversed_comparison_code (if_info
->cond
, if_info
->jump
);
2079 std::swap (insn_a
, insn_b
);
2080 std::swap (a_simple
, b_simple
);
2081 std::swap (then_bb
, else_bb
);
2085 if (then_bb
&& else_bb
&& !a_simple
&& !b_simple
2086 && (!bbs_ok_for_cmove_arith (then_bb
, else_bb
)
2087 || !bbs_ok_for_cmove_arith (else_bb
, then_bb
)))
2092 /* If one of the blocks is empty then the corresponding B or A value
2093 came from the test block. The non-empty complex block that we will
2094 emit might clobber the register used by B or A, so move it to a pseudo
2097 rtx tmp_a
= NULL_RTX
;
2098 rtx tmp_b
= NULL_RTX
;
2100 if (b_simple
|| !else_bb
)
2101 tmp_b
= gen_reg_rtx (x_mode
);
2103 if (a_simple
|| !then_bb
)
2104 tmp_a
= gen_reg_rtx (x_mode
);
2109 rtx emit_a
= NULL_RTX
;
2110 rtx emit_b
= NULL_RTX
;
2111 rtx_insn
*tmp_insn
= NULL
;
2112 bool modified_in_a
= false;
2113 bool modified_in_b
= false;
2114 /* If either operand is complex, load it into a register first.
2115 The best way to do this is to copy the original insn. In this
2116 way we preserve any clobbers etc that the insn may have had.
2117 This is of course not possible in the IS_MEM case. */
2119 if (! general_operand (a
, GET_MODE (a
)) || tmp_a
)
2124 rtx reg
= gen_reg_rtx (GET_MODE (a
));
2125 emit_a
= gen_rtx_SET (reg
, a
);
2131 a
= tmp_a
? tmp_a
: gen_reg_rtx (GET_MODE (a
));
2133 rtx_insn
*copy_of_a
= as_a
<rtx_insn
*> (copy_rtx (insn_a
));
2134 rtx set
= single_set (copy_of_a
);
2137 emit_a
= PATTERN (copy_of_a
);
2141 rtx tmp_reg
= tmp_a
? tmp_a
: gen_reg_rtx (GET_MODE (a
));
2142 emit_a
= gen_rtx_SET (tmp_reg
, a
);
2148 if (! general_operand (b
, GET_MODE (b
)) || tmp_b
)
2152 rtx reg
= gen_reg_rtx (GET_MODE (b
));
2153 emit_b
= gen_rtx_SET (reg
, b
);
2159 b
= tmp_b
? tmp_b
: gen_reg_rtx (GET_MODE (b
));
2160 rtx_insn
*copy_of_b
= as_a
<rtx_insn
*> (copy_rtx (insn_b
));
2161 rtx set
= single_set (copy_of_b
);
2164 emit_b
= PATTERN (copy_of_b
);
2168 rtx tmp_reg
= tmp_b
? tmp_b
: gen_reg_rtx (GET_MODE (b
));
2169 emit_b
= gen_rtx_SET (tmp_reg
, b
);
2175 /* If insn to set up A clobbers any registers B depends on, try to
2176 swap insn that sets up A with the one that sets up B. If even
2177 that doesn't help, punt. */
2179 modified_in_a
= emit_a
!= NULL_RTX
&& modified_in_p (orig_b
, emit_a
);
2180 if (tmp_b
&& then_bb
)
2182 FOR_BB_INSNS (then_bb
, tmp_insn
)
2183 if (modified_in_p (orig_b
, tmp_insn
))
2185 modified_in_a
= true;
2190 if (emit_a
&& modified_in_a
)
2192 modified_in_b
= emit_b
!= NULL_RTX
&& modified_in_p (orig_a
, emit_b
);
2193 if (tmp_b
&& else_bb
)
2195 FOR_BB_INSNS (else_bb
, tmp_insn
)
2196 if (modified_in_p (orig_a
, tmp_insn
))
2198 modified_in_b
= true;
2204 goto end_seq_and_fail
;
2206 if (!noce_emit_bb (emit_b
, else_bb
, b_simple
))
2207 goto end_seq_and_fail
;
2209 if (!noce_emit_bb (emit_a
, then_bb
, a_simple
))
2210 goto end_seq_and_fail
;
2214 if (!noce_emit_bb (emit_a
, then_bb
, a_simple
))
2215 goto end_seq_and_fail
;
2217 if (!noce_emit_bb (emit_b
, else_bb
, b_simple
))
2218 goto end_seq_and_fail
;
2222 target
= noce_emit_cmove (if_info
, x
, code
, XEXP (if_info
->cond
, 0),
2223 XEXP (if_info
->cond
, 1), a
, b
);
2226 goto end_seq_and_fail
;
2228 /* If we're handling a memory for above, emit the load now. */
2231 rtx mem
= gen_rtx_MEM (GET_MODE (if_info
->x
), target
);
2233 /* Copy over flags as appropriate. */
2234 if (MEM_VOLATILE_P (if_info
->a
) || MEM_VOLATILE_P (if_info
->b
))
2235 MEM_VOLATILE_P (mem
) = 1;
2236 if (MEM_ALIAS_SET (if_info
->a
) == MEM_ALIAS_SET (if_info
->b
))
2237 set_mem_alias_set (mem
, MEM_ALIAS_SET (if_info
->a
));
2239 MIN (MEM_ALIGN (if_info
->a
), MEM_ALIGN (if_info
->b
)));
2241 gcc_assert (MEM_ADDR_SPACE (if_info
->a
) == MEM_ADDR_SPACE (if_info
->b
));
2242 set_mem_addr_space (mem
, MEM_ADDR_SPACE (if_info
->a
));
2244 noce_emit_move_insn (if_info
->x
, mem
);
2246 else if (target
!= x
)
2247 noce_emit_move_insn (x
, target
);
2249 ifcvt_seq
= end_ifcvt_sequence (if_info
);
2253 emit_insn_before_setloc (ifcvt_seq
, if_info
->jump
,
2254 INSN_LOCATION (if_info
->insn_a
));
2262 /* For most cases, the simplified condition we found is the best
2263 choice, but this is not the case for the min/max/abs transforms.
2264 For these we wish to know that it is A or B in the condition. */
2267 noce_get_alt_condition (struct noce_if_info
*if_info
, rtx target
,
2268 rtx_insn
**earliest
)
2274 /* If target is already mentioned in the known condition, return it. */
2275 if (reg_mentioned_p (target
, if_info
->cond
))
2277 *earliest
= if_info
->cond_earliest
;
2278 return if_info
->cond
;
2281 set
= pc_set (if_info
->jump
);
2282 cond
= XEXP (SET_SRC (set
), 0);
2284 = GET_CODE (XEXP (SET_SRC (set
), 2)) == LABEL_REF
2285 && LABEL_REF_LABEL (XEXP (SET_SRC (set
), 2)) == JUMP_LABEL (if_info
->jump
);
2286 if (if_info
->then_else_reversed
)
2289 /* If we're looking for a constant, try to make the conditional
2290 have that constant in it. There are two reasons why it may
2291 not have the constant we want:
2293 1. GCC may have needed to put the constant in a register, because
2294 the target can't compare directly against that constant. For
2295 this case, we look for a SET immediately before the comparison
2296 that puts a constant in that register.
2298 2. GCC may have canonicalized the conditional, for example
2299 replacing "if x < 4" with "if x <= 3". We can undo that (or
2300 make equivalent types of changes) to get the constants we need
2301 if they're off by one in the right direction. */
2303 if (CONST_INT_P (target
))
2305 enum rtx_code code
= GET_CODE (if_info
->cond
);
2306 rtx op_a
= XEXP (if_info
->cond
, 0);
2307 rtx op_b
= XEXP (if_info
->cond
, 1);
2308 rtx_insn
*prev_insn
;
2310 /* First, look to see if we put a constant in a register. */
2311 prev_insn
= prev_nonnote_insn (if_info
->cond_earliest
);
2313 && BLOCK_FOR_INSN (prev_insn
)
2314 == BLOCK_FOR_INSN (if_info
->cond_earliest
)
2315 && INSN_P (prev_insn
)
2316 && GET_CODE (PATTERN (prev_insn
)) == SET
)
2318 rtx src
= find_reg_equal_equiv_note (prev_insn
);
2320 src
= SET_SRC (PATTERN (prev_insn
));
2321 if (CONST_INT_P (src
))
2323 if (rtx_equal_p (op_a
, SET_DEST (PATTERN (prev_insn
))))
2325 else if (rtx_equal_p (op_b
, SET_DEST (PATTERN (prev_insn
))))
2328 if (CONST_INT_P (op_a
))
2330 std::swap (op_a
, op_b
);
2331 code
= swap_condition (code
);
2336 /* Now, look to see if we can get the right constant by
2337 adjusting the conditional. */
2338 if (CONST_INT_P (op_b
))
2340 HOST_WIDE_INT desired_val
= INTVAL (target
);
2341 HOST_WIDE_INT actual_val
= INTVAL (op_b
);
2346 if (actual_val
== desired_val
+ 1)
2349 op_b
= GEN_INT (desired_val
);
2353 if (actual_val
== desired_val
- 1)
2356 op_b
= GEN_INT (desired_val
);
2360 if (actual_val
== desired_val
- 1)
2363 op_b
= GEN_INT (desired_val
);
2367 if (actual_val
== desired_val
+ 1)
2370 op_b
= GEN_INT (desired_val
);
2378 /* If we made any changes, generate a new conditional that is
2379 equivalent to what we started with, but has the right
2381 if (code
!= GET_CODE (if_info
->cond
)
2382 || op_a
!= XEXP (if_info
->cond
, 0)
2383 || op_b
!= XEXP (if_info
->cond
, 1))
2385 cond
= gen_rtx_fmt_ee (code
, GET_MODE (cond
), op_a
, op_b
);
2386 *earliest
= if_info
->cond_earliest
;
2391 cond
= canonicalize_condition (if_info
->jump
, cond
, reverse
,
2392 earliest
, target
, have_cbranchcc4
, true);
2393 if (! cond
|| ! reg_mentioned_p (target
, cond
))
2396 /* We almost certainly searched back to a different place.
2397 Need to re-verify correct lifetimes. */
2399 /* X may not be mentioned in the range (cond_earliest, jump]. */
2400 for (insn
= if_info
->jump
; insn
!= *earliest
; insn
= PREV_INSN (insn
))
2401 if (INSN_P (insn
) && reg_overlap_mentioned_p (if_info
->x
, PATTERN (insn
)))
2404 /* A and B may not be modified in the range [cond_earliest, jump). */
2405 for (insn
= *earliest
; insn
!= if_info
->jump
; insn
= NEXT_INSN (insn
))
2407 && (modified_in_p (if_info
->a
, insn
)
2408 || modified_in_p (if_info
->b
, insn
)))
2414 /* Convert "if (a < b) x = a; else x = b;" to "x = min(a, b);", etc. */
2417 noce_try_minmax (struct noce_if_info
*if_info
)
2420 rtx_insn
*earliest
, *seq
;
2421 enum rtx_code code
, op
;
2424 if (!noce_simple_bbs (if_info
))
2427 /* ??? Reject modes with NaNs or signed zeros since we don't know how
2428 they will be resolved with an SMIN/SMAX. It wouldn't be too hard
2429 to get the target to tell us... */
2430 if (HONOR_SIGNED_ZEROS (if_info
->x
)
2431 || HONOR_NANS (if_info
->x
))
2434 cond
= noce_get_alt_condition (if_info
, if_info
->a
, &earliest
);
2438 /* Verify the condition is of the form we expect, and canonicalize
2439 the comparison code. */
2440 code
= GET_CODE (cond
);
2441 if (rtx_equal_p (XEXP (cond
, 0), if_info
->a
))
2443 if (! rtx_equal_p (XEXP (cond
, 1), if_info
->b
))
2446 else if (rtx_equal_p (XEXP (cond
, 1), if_info
->a
))
2448 if (! rtx_equal_p (XEXP (cond
, 0), if_info
->b
))
2450 code
= swap_condition (code
);
2455 /* Determine what sort of operation this is. Note that the code is for
2456 a taken branch, so the code->operation mapping appears backwards. */
2489 target
= expand_simple_binop (GET_MODE (if_info
->x
), op
,
2490 if_info
->a
, if_info
->b
,
2491 if_info
->x
, unsignedp
, OPTAB_WIDEN
);
2497 if (target
!= if_info
->x
)
2498 noce_emit_move_insn (if_info
->x
, target
);
2500 seq
= end_ifcvt_sequence (if_info
);
2504 emit_insn_before_setloc (seq
, if_info
->jump
, INSN_LOCATION (if_info
->insn_a
));
2505 if_info
->cond
= cond
;
2506 if_info
->cond_earliest
= earliest
;
2511 /* Convert "if (a < 0) x = -a; else x = a;" to "x = abs(a);",
2512 "if (a < 0) x = ~a; else x = a;" to "x = one_cmpl_abs(a);",
2516 noce_try_abs (struct noce_if_info
*if_info
)
2518 rtx cond
, target
, a
, b
, c
;
2519 rtx_insn
*earliest
, *seq
;
2521 bool one_cmpl
= false;
2523 if (!noce_simple_bbs (if_info
))
2526 /* Reject modes with signed zeros. */
2527 if (HONOR_SIGNED_ZEROS (if_info
->x
))
2530 /* Recognize A and B as constituting an ABS or NABS. The canonical
2531 form is a branch around the negation, taken when the object is the
2532 first operand of a comparison against 0 that evaluates to true. */
2535 if (GET_CODE (a
) == NEG
&& rtx_equal_p (XEXP (a
, 0), b
))
2537 else if (GET_CODE (b
) == NEG
&& rtx_equal_p (XEXP (b
, 0), a
))
2542 else if (GET_CODE (a
) == NOT
&& rtx_equal_p (XEXP (a
, 0), b
))
2547 else if (GET_CODE (b
) == NOT
&& rtx_equal_p (XEXP (b
, 0), a
))
2556 cond
= noce_get_alt_condition (if_info
, b
, &earliest
);
2560 /* Verify the condition is of the form we expect. */
2561 if (rtx_equal_p (XEXP (cond
, 0), b
))
2563 else if (rtx_equal_p (XEXP (cond
, 1), b
))
2571 /* Verify that C is zero. Search one step backward for a
2572 REG_EQUAL note or a simple source if necessary. */
2576 rtx_insn
*insn
= prev_nonnote_insn (earliest
);
2578 && BLOCK_FOR_INSN (insn
) == BLOCK_FOR_INSN (earliest
)
2579 && (set
= single_set (insn
))
2580 && rtx_equal_p (SET_DEST (set
), c
))
2582 rtx note
= find_reg_equal_equiv_note (insn
);
2592 && GET_CODE (XEXP (c
, 0)) == SYMBOL_REF
2593 && CONSTANT_POOL_ADDRESS_P (XEXP (c
, 0)))
2594 c
= get_pool_constant (XEXP (c
, 0));
2596 /* Work around funny ideas get_condition has wrt canonicalization.
2597 Note that these rtx constants are known to be CONST_INT, and
2598 therefore imply integer comparisons. */
2599 if (c
== constm1_rtx
&& GET_CODE (cond
) == GT
)
2601 else if (c
== const1_rtx
&& GET_CODE (cond
) == LT
)
2603 else if (c
!= CONST0_RTX (GET_MODE (b
)))
2606 /* Determine what sort of operation this is. */
2607 switch (GET_CODE (cond
))
2626 target
= expand_one_cmpl_abs_nojump (GET_MODE (if_info
->x
), b
,
2629 target
= expand_abs_nojump (GET_MODE (if_info
->x
), b
, if_info
->x
, 1);
2631 /* ??? It's a quandary whether cmove would be better here, especially
2632 for integers. Perhaps combine will clean things up. */
2633 if (target
&& negate
)
2636 target
= expand_simple_unop (GET_MODE (target
), NOT
, target
,
2639 target
= expand_simple_unop (GET_MODE (target
), NEG
, target
,
2649 if (target
!= if_info
->x
)
2650 noce_emit_move_insn (if_info
->x
, target
);
2652 seq
= end_ifcvt_sequence (if_info
);
2656 emit_insn_before_setloc (seq
, if_info
->jump
, INSN_LOCATION (if_info
->insn_a
));
2657 if_info
->cond
= cond
;
2658 if_info
->cond_earliest
= earliest
;
2663 /* Convert "if (m < 0) x = b; else x = 0;" to "x = (m >> C) & b;". */
2666 noce_try_sign_mask (struct noce_if_info
*if_info
)
2672 bool t_unconditional
;
2674 if (!noce_simple_bbs (if_info
))
2677 cond
= if_info
->cond
;
2678 code
= GET_CODE (cond
);
2683 if (if_info
->a
== const0_rtx
)
2685 if ((code
== LT
&& c
== const0_rtx
)
2686 || (code
== LE
&& c
== constm1_rtx
))
2689 else if (if_info
->b
== const0_rtx
)
2691 if ((code
== GE
&& c
== const0_rtx
)
2692 || (code
== GT
&& c
== constm1_rtx
))
2696 if (! t
|| side_effects_p (t
))
2699 /* We currently don't handle different modes. */
2700 mode
= GET_MODE (t
);
2701 if (GET_MODE (m
) != mode
)
2704 /* This is only profitable if T is unconditionally executed/evaluated in the
2705 original insn sequence or T is cheap. The former happens if B is the
2706 non-zero (T) value and if INSN_B was taken from TEST_BB, or there was no
2707 INSN_B which can happen for e.g. conditional stores to memory. For the
2708 cost computation use the block TEST_BB where the evaluation will end up
2709 after the transformation. */
2712 && (if_info
->insn_b
== NULL_RTX
2713 || BLOCK_FOR_INSN (if_info
->insn_b
) == if_info
->test_bb
));
2714 if (!(t_unconditional
2715 || (set_src_cost (t
, mode
, optimize_bb_for_speed_p (if_info
->test_bb
))
2716 < COSTS_N_INSNS (2))))
2720 /* Use emit_store_flag to generate "m < 0 ? -1 : 0" instead of expanding
2721 "(signed) m >> 31" directly. This benefits targets with specialized
2722 insns to obtain the signmask, but still uses ashr_optab otherwise. */
2723 m
= emit_store_flag (gen_reg_rtx (mode
), LT
, m
, const0_rtx
, mode
, 0, -1);
2724 t
= m
? expand_binop (mode
, and_optab
, m
, t
, NULL_RTX
, 0, OPTAB_DIRECT
)
2733 noce_emit_move_insn (if_info
->x
, t
);
2735 seq
= end_ifcvt_sequence (if_info
);
2739 emit_insn_before_setloc (seq
, if_info
->jump
, INSN_LOCATION (if_info
->insn_a
));
2744 /* Optimize away "if (x & C) x |= C" and similar bit manipulation
2748 noce_try_bitop (struct noce_if_info
*if_info
)
2750 rtx cond
, x
, a
, result
;
2757 cond
= if_info
->cond
;
2758 code
= GET_CODE (cond
);
2760 if (!noce_simple_bbs (if_info
))
2763 /* Check for no else condition. */
2764 if (! rtx_equal_p (x
, if_info
->b
))
2767 /* Check for a suitable condition. */
2768 if (code
!= NE
&& code
!= EQ
)
2770 if (XEXP (cond
, 1) != const0_rtx
)
2772 cond
= XEXP (cond
, 0);
2774 /* ??? We could also handle AND here. */
2775 if (GET_CODE (cond
) == ZERO_EXTRACT
)
2777 if (XEXP (cond
, 1) != const1_rtx
2778 || !CONST_INT_P (XEXP (cond
, 2))
2779 || ! rtx_equal_p (x
, XEXP (cond
, 0)))
2781 bitnum
= INTVAL (XEXP (cond
, 2));
2782 mode
= GET_MODE (x
);
2783 if (BITS_BIG_ENDIAN
)
2784 bitnum
= GET_MODE_BITSIZE (mode
) - 1 - bitnum
;
2785 if (bitnum
< 0 || bitnum
>= HOST_BITS_PER_WIDE_INT
)
2792 if (GET_CODE (a
) == IOR
|| GET_CODE (a
) == XOR
)
2794 /* Check for "if (X & C) x = x op C". */
2795 if (! rtx_equal_p (x
, XEXP (a
, 0))
2796 || !CONST_INT_P (XEXP (a
, 1))
2797 || (INTVAL (XEXP (a
, 1)) & GET_MODE_MASK (mode
))
2798 != (unsigned HOST_WIDE_INT
) 1 << bitnum
)
2801 /* if ((x & C) == 0) x |= C; is transformed to x |= C. */
2802 /* if ((x & C) != 0) x |= C; is transformed to nothing. */
2803 if (GET_CODE (a
) == IOR
)
2804 result
= (code
== NE
) ? a
: NULL_RTX
;
2805 else if (code
== NE
)
2807 /* if ((x & C) == 0) x ^= C; is transformed to x |= C. */
2808 result
= gen_int_mode ((HOST_WIDE_INT
) 1 << bitnum
, mode
);
2809 result
= simplify_gen_binary (IOR
, mode
, x
, result
);
2813 /* if ((x & C) != 0) x ^= C; is transformed to x &= ~C. */
2814 result
= gen_int_mode (~((HOST_WIDE_INT
) 1 << bitnum
), mode
);
2815 result
= simplify_gen_binary (AND
, mode
, x
, result
);
2818 else if (GET_CODE (a
) == AND
)
2820 /* Check for "if (X & C) x &= ~C". */
2821 if (! rtx_equal_p (x
, XEXP (a
, 0))
2822 || !CONST_INT_P (XEXP (a
, 1))
2823 || (INTVAL (XEXP (a
, 1)) & GET_MODE_MASK (mode
))
2824 != (~((HOST_WIDE_INT
) 1 << bitnum
) & GET_MODE_MASK (mode
)))
2827 /* if ((x & C) == 0) x &= ~C; is transformed to nothing. */
2828 /* if ((x & C) != 0) x &= ~C; is transformed to x &= ~C. */
2829 result
= (code
== EQ
) ? a
: NULL_RTX
;
2837 noce_emit_move_insn (x
, result
);
2838 seq
= end_ifcvt_sequence (if_info
);
2842 emit_insn_before_setloc (seq
, if_info
->jump
,
2843 INSN_LOCATION (if_info
->insn_a
));
2849 /* Similar to get_condition, only the resulting condition must be
2850 valid at JUMP, instead of at EARLIEST.
2852 If THEN_ELSE_REVERSED is true, the fallthrough does not go to the
2853 THEN block of the caller, and we have to reverse the condition. */
2856 noce_get_condition (rtx_insn
*jump
, rtx_insn
**earliest
, bool then_else_reversed
)
2861 if (! any_condjump_p (jump
))
2864 set
= pc_set (jump
);
2866 /* If this branches to JUMP_LABEL when the condition is false,
2867 reverse the condition. */
2868 reverse
= (GET_CODE (XEXP (SET_SRC (set
), 2)) == LABEL_REF
2869 && LABEL_REF_LABEL (XEXP (SET_SRC (set
), 2)) == JUMP_LABEL (jump
));
2871 /* We may have to reverse because the caller's if block is not canonical,
2872 i.e. the THEN block isn't the fallthrough block for the TEST block
2873 (see find_if_header). */
2874 if (then_else_reversed
)
2877 /* If the condition variable is a register and is MODE_INT, accept it. */
2879 cond
= XEXP (SET_SRC (set
), 0);
2880 tmp
= XEXP (cond
, 0);
2881 if (REG_P (tmp
) && GET_MODE_CLASS (GET_MODE (tmp
)) == MODE_INT
2882 && (GET_MODE (tmp
) != BImode
2883 || !targetm
.small_register_classes_for_mode_p (BImode
)))
2888 cond
= gen_rtx_fmt_ee (reverse_condition (GET_CODE (cond
)),
2889 GET_MODE (cond
), tmp
, XEXP (cond
, 1));
2893 /* Otherwise, fall back on canonicalize_condition to do the dirty
2894 work of manipulating MODE_CC values and COMPARE rtx codes. */
2895 tmp
= canonicalize_condition (jump
, cond
, reverse
, earliest
,
2896 NULL_RTX
, have_cbranchcc4
, true);
2898 /* We don't handle side-effects in the condition, like handling
2899 REG_INC notes and making sure no duplicate conditions are emitted. */
2900 if (tmp
!= NULL_RTX
&& side_effects_p (tmp
))
2906 /* Return true if OP is ok for if-then-else processing. */
2909 noce_operand_ok (const_rtx op
)
2911 if (side_effects_p (op
))
2914 /* We special-case memories, so handle any of them with
2915 no address side effects. */
2917 return ! side_effects_p (XEXP (op
, 0));
2919 return ! may_trap_p (op
);
2922 /* Return true if a write into MEM may trap or fault. */
2925 noce_mem_write_may_trap_or_fault_p (const_rtx mem
)
2929 if (MEM_READONLY_P (mem
))
2932 if (may_trap_or_fault_p (mem
))
2935 addr
= XEXP (mem
, 0);
2937 /* Call target hook to avoid the effects of -fpic etc.... */
2938 addr
= targetm
.delegitimize_address (addr
);
2941 switch (GET_CODE (addr
))
2949 addr
= XEXP (addr
, 0);
2953 addr
= XEXP (addr
, 1);
2956 if (CONST_INT_P (XEXP (addr
, 1)))
2957 addr
= XEXP (addr
, 0);
2964 if (SYMBOL_REF_DECL (addr
)
2965 && decl_readonly_section (SYMBOL_REF_DECL (addr
), 0))
2975 /* Return whether we can use store speculation for MEM. TOP_BB is the
2976 basic block above the conditional block where we are considering
2977 doing the speculative store. We look for whether MEM is set
2978 unconditionally later in the function. */
2981 noce_can_store_speculate_p (basic_block top_bb
, const_rtx mem
)
2983 basic_block dominator
;
2985 for (dominator
= get_immediate_dominator (CDI_POST_DOMINATORS
, top_bb
);
2987 dominator
= get_immediate_dominator (CDI_POST_DOMINATORS
, dominator
))
2991 FOR_BB_INSNS (dominator
, insn
)
2993 /* If we see something that might be a memory barrier, we
2994 have to stop looking. Even if the MEM is set later in
2995 the function, we still don't want to set it
2996 unconditionally before the barrier. */
2998 && (volatile_insn_p (PATTERN (insn
))
2999 || (CALL_P (insn
) && (!RTL_CONST_CALL_P (insn
)))))
3002 if (memory_must_be_modified_in_insn_p (mem
, insn
))
3004 if (modified_in_p (XEXP (mem
, 0), insn
))
3013 /* Return true if X contains a MEM subrtx. */
3016 contains_mem_rtx_p (rtx x
)
3018 subrtx_iterator::array_type array
;
3019 FOR_EACH_SUBRTX (iter
, array
, x
, ALL
)
3026 /* Return true iff basic block TEST_BB is valid for noce if-conversion.
3027 The condition used in this if-conversion is in COND.
3028 In practice, check that TEST_BB ends with a single set
3029 x := a and all previous computations
3030 in TEST_BB don't produce any values that are live after TEST_BB.
3031 In other words, all the insns in TEST_BB are there only
3032 to compute a value for x. Put the rtx cost of the insns
3033 in TEST_BB into COST. Record whether TEST_BB is a single simple
3034 set instruction in SIMPLE_P. */
3037 bb_valid_for_noce_process_p (basic_block test_bb
, rtx cond
,
3038 unsigned int *cost
, bool *simple_p
)
3043 rtx_insn
*last_insn
= last_active_insn (test_bb
, FALSE
);
3044 rtx last_set
= NULL_RTX
;
3046 rtx cc
= cc_in_cond (cond
);
3048 if (!insn_valid_noce_process_p (last_insn
, cc
))
3050 last_set
= single_set (last_insn
);
3052 rtx x
= SET_DEST (last_set
);
3053 rtx_insn
*first_insn
= first_active_insn (test_bb
);
3054 rtx first_set
= single_set (first_insn
);
3059 /* We have a single simple set, that's okay. */
3060 bool speed_p
= optimize_bb_for_speed_p (test_bb
);
3062 if (first_insn
== last_insn
)
3064 *simple_p
= noce_operand_ok (SET_DEST (first_set
));
3065 *cost
= insn_rtx_cost (first_set
, speed_p
);
3069 rtx_insn
*prev_last_insn
= PREV_INSN (last_insn
);
3070 gcc_assert (prev_last_insn
);
3072 /* For now, disallow setting x multiple times in test_bb. */
3073 if (REG_P (x
) && reg_set_between_p (x
, first_insn
, prev_last_insn
))
3076 bitmap test_bb_temps
= BITMAP_ALLOC (®_obstack
);
3078 /* The regs that are live out of test_bb. */
3079 bitmap test_bb_live_out
= df_get_live_out (test_bb
);
3081 int potential_cost
= insn_rtx_cost (last_set
, speed_p
);
3083 FOR_BB_INSNS (test_bb
, insn
)
3085 if (insn
!= last_insn
)
3087 if (!active_insn_p (insn
))
3090 if (!insn_valid_noce_process_p (insn
, cc
))
3091 goto free_bitmap_and_fail
;
3093 rtx sset
= single_set (insn
);
3096 if (contains_mem_rtx_p (SET_SRC (sset
))
3097 || !REG_P (SET_DEST (sset
))
3098 || reg_overlap_mentioned_p (SET_DEST (sset
), cond
))
3099 goto free_bitmap_and_fail
;
3101 potential_cost
+= insn_rtx_cost (sset
, speed_p
);
3102 bitmap_set_bit (test_bb_temps
, REGNO (SET_DEST (sset
)));
3106 /* If any of the intermediate results in test_bb are live after test_bb
3108 if (bitmap_intersect_p (test_bb_live_out
, test_bb_temps
))
3109 goto free_bitmap_and_fail
;
3111 BITMAP_FREE (test_bb_temps
);
3112 *cost
= potential_cost
;
3116 free_bitmap_and_fail
:
3117 BITMAP_FREE (test_bb_temps
);
3121 /* We have something like:
3124 { i = a; j = b; k = c; }
3128 tmp_i = (x > y) ? a : i;
3129 tmp_j = (x > y) ? b : j;
3130 tmp_k = (x > y) ? c : k;
3135 Subsequent passes are expected to clean up the extra moves.
3137 Look for special cases such as writes to one register which are
3138 read back in another SET, as might occur in a swap idiom or
3147 Which we want to rewrite to:
3149 tmp_i = (x > y) ? a : i;
3150 tmp_j = (x > y) ? tmp_i : j;
3154 We can catch these when looking at (SET x y) by keeping a list of the
3155 registers we would have targeted before if-conversion and looking back
3156 through it for an overlap with Y. If we find one, we rewire the
3157 conditional set to use the temporary we introduced earlier.
3159 IF_INFO contains the useful information about the block structure and
3160 jump instructions. */
3163 noce_convert_multiple_sets (struct noce_if_info
*if_info
)
3165 basic_block test_bb
= if_info
->test_bb
;
3166 basic_block then_bb
= if_info
->then_bb
;
3167 basic_block join_bb
= if_info
->join_bb
;
3168 rtx_insn
*jump
= if_info
->jump
;
3169 rtx_insn
*cond_earliest
;
3174 /* Decompose the condition attached to the jump. */
3175 rtx cond
= noce_get_condition (jump
, &cond_earliest
, false);
3176 rtx x
= XEXP (cond
, 0);
3177 rtx y
= XEXP (cond
, 1);
3178 rtx_code cond_code
= GET_CODE (cond
);
3180 /* The true targets for a conditional move. */
3181 auto_vec
<rtx
> targets
;
3182 /* The temporaries introduced to allow us to not consider register
3184 auto_vec
<rtx
> temporaries
;
3185 /* The insns we've emitted. */
3186 auto_vec
<rtx_insn
*> unmodified_insns
;
3189 FOR_BB_INSNS (then_bb
, insn
)
3191 /* Skip over non-insns. */
3192 if (!active_insn_p (insn
))
3195 rtx set
= single_set (insn
);
3196 gcc_checking_assert (set
);
3198 rtx target
= SET_DEST (set
);
3199 rtx temp
= gen_reg_rtx (GET_MODE (target
));
3200 rtx new_val
= SET_SRC (set
);
3201 rtx old_val
= target
;
3203 /* If we were supposed to read from an earlier write in this block,
3204 we've changed the register allocation. Rewire the read. While
3205 we are looking, also try to catch a swap idiom. */
3206 for (int i
= count
- 1; i
>= 0; --i
)
3207 if (reg_overlap_mentioned_p (new_val
, targets
[i
]))
3209 /* Catch a "swap" style idiom. */
3210 if (find_reg_note (insn
, REG_DEAD
, new_val
) != NULL_RTX
)
3211 /* The write to targets[i] is only live until the read
3212 here. As the condition codes match, we can propagate
3214 new_val
= SET_SRC (single_set (unmodified_insns
[i
]));
3216 new_val
= temporaries
[i
];
3220 /* If we had a non-canonical conditional jump (i.e. one where
3221 the fallthrough is to the "else" case) we need to reverse
3222 the conditional select. */
3223 if (if_info
->then_else_reversed
)
3224 std::swap (old_val
, new_val
);
3226 /* Actually emit the conditional move. */
3227 rtx temp_dest
= noce_emit_cmove (if_info
, temp
, cond_code
,
3228 x
, y
, new_val
, old_val
);
3230 /* If we failed to expand the conditional move, drop out and don't
3232 if (temp_dest
== NULL_RTX
)
3240 targets
.safe_push (target
);
3241 temporaries
.safe_push (temp_dest
);
3242 unmodified_insns
.safe_push (insn
);
3245 /* We must have seen some sort of insn to insert, otherwise we were
3246 given an empty BB to convert, and we can't handle that. */
3247 gcc_assert (!unmodified_insns
.is_empty ());
3249 /* Now fixup the assignments. */
3250 for (int i
= 0; i
< count
; i
++)
3251 noce_emit_move_insn (targets
[i
], temporaries
[i
]);
3253 /* Actually emit the sequence. */
3254 rtx_insn
*seq
= get_insns ();
3256 for (insn
= seq
; insn
; insn
= NEXT_INSN (insn
))
3257 set_used_flags (insn
);
3259 /* Mark all our temporaries and targets as used. */
3260 for (int i
= 0; i
< count
; i
++)
3262 set_used_flags (temporaries
[i
]);
3263 set_used_flags (targets
[i
]);
3266 set_used_flags (cond
);
3270 unshare_all_rtl_in_chain (seq
);
3276 for (insn
= seq
; insn
; insn
= NEXT_INSN (insn
))
3278 || recog_memoized (insn
) == -1)
3281 emit_insn_before_setloc (seq
, if_info
->jump
,
3282 INSN_LOCATION (unmodified_insns
.last ()));
3284 /* Clean up THEN_BB and the edges in and out of it. */
3285 remove_edge (find_edge (test_bb
, join_bb
));
3286 remove_edge (find_edge (then_bb
, join_bb
));
3287 redirect_edge_and_branch_force (single_succ_edge (test_bb
), join_bb
);
3288 delete_basic_block (then_bb
);
3291 /* Maybe merge blocks now the jump is simple enough. */
3292 if (can_merge_blocks_p (test_bb
, join_bb
))
3294 merge_blocks (test_bb
, join_bb
);
3298 num_updated_if_blocks
++;
3302 /* Return true iff basic block TEST_BB is comprised of only
3303 (SET (REG) (REG)) insns suitable for conversion to a series
3304 of conditional moves. FORNOW: Use II to find the expected cost of
3305 the branch into/over TEST_BB.
3307 TODO: This creates an implicit "magic number" for branch_cost.
3308 II->branch_cost now guides the maximum number of set instructions in
3309 a basic block which is considered profitable to completely
3313 bb_ok_for_noce_convert_multiple_sets (basic_block test_bb
,
3314 struct noce_if_info
*ii
)
3319 FOR_BB_INSNS (test_bb
, insn
)
3321 /* Skip over notes etc. */
3322 if (!active_insn_p (insn
))
3325 /* We only handle SET insns. */
3326 rtx set
= single_set (insn
);
3327 if (set
== NULL_RTX
)
3330 rtx dest
= SET_DEST (set
);
3331 rtx src
= SET_SRC (set
);
3333 /* We can possibly relax this, but for now only handle REG to REG
3334 moves. This avoids any issues that might come from introducing
3335 loads/stores that might violate data-race-freedom guarantees. */
3336 if (!(REG_P (src
) && REG_P (dest
)))
3339 /* Destination must be appropriate for a conditional write. */
3340 if (!noce_operand_ok (dest
))
3343 /* We must be able to conditionally move in this mode. */
3344 if (!can_conditionally_move_p (GET_MODE (dest
)))
3350 /* FORNOW: Our cost model is a count of the number of instructions we
3351 would if-convert. This is suboptimal, and should be improved as part
3352 of a wider rework of branch_cost. */
3353 if (count
> ii
->branch_cost
)
3359 /* Given a simple IF-THEN-JOIN or IF-THEN-ELSE-JOIN block, attempt to convert
3360 it without using conditional execution. Return TRUE if we were successful
3361 at converting the block. */
3364 noce_process_if_block (struct noce_if_info
*if_info
)
3366 basic_block test_bb
= if_info
->test_bb
; /* test block */
3367 basic_block then_bb
= if_info
->then_bb
; /* THEN */
3368 basic_block else_bb
= if_info
->else_bb
; /* ELSE or NULL */
3369 basic_block join_bb
= if_info
->join_bb
; /* JOIN */
3370 rtx_insn
*jump
= if_info
->jump
;
3371 rtx cond
= if_info
->cond
;
3372 rtx_insn
*insn_a
, *insn_b
;
3374 rtx orig_x
, x
, a
, b
;
3376 /* We're looking for patterns of the form
3378 (1) if (...) x = a; else x = b;
3379 (2) x = b; if (...) x = a;
3380 (3) if (...) x = a; // as if with an initial x = x.
3381 (4) if (...) { x = a; y = b; z = c; } // Like 3, for multiple SETS.
3382 The later patterns require jumps to be more expensive.
3383 For the if (...) x = a; else x = b; case we allow multiple insns
3384 inside the then and else blocks as long as their only effect is
3385 to calculate a value for x.
3386 ??? For future expansion, further expand the "multiple X" rules. */
3388 /* First look for multiple SETS. */
3390 && HAVE_conditional_move
3392 && bb_ok_for_noce_convert_multiple_sets (then_bb
, if_info
))
3394 if (noce_convert_multiple_sets (if_info
))
3398 if (! bb_valid_for_noce_process_p (then_bb
, cond
, &if_info
->then_cost
,
3399 &if_info
->then_simple
))
3403 && ! bb_valid_for_noce_process_p (else_bb
, cond
, &if_info
->else_cost
,
3404 &if_info
->else_simple
))
3407 insn_a
= last_active_insn (then_bb
, FALSE
);
3408 set_a
= single_set (insn_a
);
3411 x
= SET_DEST (set_a
);
3412 a
= SET_SRC (set_a
);
3414 /* Look for the other potential set. Make sure we've got equivalent
3416 /* ??? This is overconservative. Storing to two different mems is
3417 as easy as conditionally computing the address. Storing to a
3418 single mem merely requires a scratch memory to use as one of the
3419 destination addresses; often the memory immediately below the
3420 stack pointer is available for this. */
3424 insn_b
= last_active_insn (else_bb
, FALSE
);
3425 set_b
= single_set (insn_b
);
3428 if (!rtx_interchangeable_p (x
, SET_DEST (set_b
)))
3433 insn_b
= prev_nonnote_nondebug_insn (if_info
->cond_earliest
);
3434 /* We're going to be moving the evaluation of B down from above
3435 COND_EARLIEST to JUMP. Make sure the relevant data is still
3438 || BLOCK_FOR_INSN (insn_b
) != BLOCK_FOR_INSN (if_info
->cond_earliest
)
3439 || !NONJUMP_INSN_P (insn_b
)
3440 || (set_b
= single_set (insn_b
)) == NULL_RTX
3441 || ! rtx_interchangeable_p (x
, SET_DEST (set_b
))
3442 || ! noce_operand_ok (SET_SRC (set_b
))
3443 || reg_overlap_mentioned_p (x
, SET_SRC (set_b
))
3444 || modified_between_p (SET_SRC (set_b
), insn_b
, jump
)
3445 /* Avoid extending the lifetime of hard registers on small
3446 register class machines. */
3447 || (REG_P (SET_SRC (set_b
))
3448 && HARD_REGISTER_P (SET_SRC (set_b
))
3449 && targetm
.small_register_classes_for_mode_p
3450 (GET_MODE (SET_SRC (set_b
))))
3451 /* Likewise with X. In particular this can happen when
3452 noce_get_condition looks farther back in the instruction
3453 stream than one might expect. */
3454 || reg_overlap_mentioned_p (x
, cond
)
3455 || reg_overlap_mentioned_p (x
, a
)
3456 || modified_between_p (x
, insn_b
, jump
))
3463 /* If x has side effects then only the if-then-else form is safe to
3464 convert. But even in that case we would need to restore any notes
3465 (such as REG_INC) at then end. That can be tricky if
3466 noce_emit_move_insn expands to more than one insn, so disable the
3467 optimization entirely for now if there are side effects. */
3468 if (side_effects_p (x
))
3471 b
= (set_b
? SET_SRC (set_b
) : x
);
3473 /* Only operate on register destinations, and even then avoid extending
3474 the lifetime of hard registers on small register class machines. */
3477 || (HARD_REGISTER_P (x
)
3478 && targetm
.small_register_classes_for_mode_p (GET_MODE (x
))))
3480 if (GET_MODE (x
) == BLKmode
)
3483 if (GET_CODE (x
) == ZERO_EXTRACT
3484 && (!CONST_INT_P (XEXP (x
, 1))
3485 || !CONST_INT_P (XEXP (x
, 2))))
3488 x
= gen_reg_rtx (GET_MODE (GET_CODE (x
) == STRICT_LOW_PART
3489 ? XEXP (x
, 0) : x
));
3492 /* Don't operate on sources that may trap or are volatile. */
3493 if (! noce_operand_ok (a
) || ! noce_operand_ok (b
))
3497 /* Set up the info block for our subroutines. */
3498 if_info
->insn_a
= insn_a
;
3499 if_info
->insn_b
= insn_b
;
3504 /* Try optimizations in some approximation of a useful order. */
3505 /* ??? Should first look to see if X is live incoming at all. If it
3506 isn't, we don't need anything but an unconditional set. */
3508 /* Look and see if A and B are really the same. Avoid creating silly
3509 cmove constructs that no one will fix up later. */
3510 if (noce_simple_bbs (if_info
)
3511 && rtx_interchangeable_p (a
, b
))
3513 /* If we have an INSN_B, we don't have to create any new rtl. Just
3514 move the instruction that we already have. If we don't have an
3515 INSN_B, that means that A == X, and we've got a noop move. In
3516 that case don't do anything and let the code below delete INSN_A. */
3517 if (insn_b
&& else_bb
)
3521 if (else_bb
&& insn_b
== BB_END (else_bb
))
3522 BB_END (else_bb
) = PREV_INSN (insn_b
);
3523 reorder_insns (insn_b
, insn_b
, PREV_INSN (jump
));
3525 /* If there was a REG_EQUAL note, delete it since it may have been
3526 true due to this insn being after a jump. */
3527 if ((note
= find_reg_note (insn_b
, REG_EQUAL
, NULL_RTX
)) != 0)
3528 remove_note (insn_b
, note
);
3532 /* If we have "x = b; if (...) x = a;", and x has side-effects, then
3533 x must be executed twice. */
3534 else if (insn_b
&& side_effects_p (orig_x
))
3541 if (!set_b
&& MEM_P (orig_x
))
3543 /* Disallow the "if (...) x = a;" form (implicit "else x = x;")
3544 for optimizations if writing to x may trap or fault,
3545 i.e. it's a memory other than a static var or a stack slot,
3546 is misaligned on strict aligned machines or is read-only. If
3547 x is a read-only memory, then the program is valid only if we
3548 avoid the store into it. If there are stores on both the
3549 THEN and ELSE arms, then we can go ahead with the conversion;
3550 either the program is broken, or the condition is always
3551 false such that the other memory is selected. */
3552 if (noce_mem_write_may_trap_or_fault_p (orig_x
))
3555 /* Avoid store speculation: given "if (...) x = a" where x is a
3556 MEM, we only want to do the store if x is always set
3557 somewhere in the function. This avoids cases like
3558 if (pthread_mutex_trylock(mutex))
3560 where we only want global_variable to be changed if the mutex
3561 is held. FIXME: This should ideally be expressed directly in
3563 if (!noce_can_store_speculate_p (test_bb
, orig_x
))
3567 if (noce_try_move (if_info
))
3569 if (noce_try_store_flag (if_info
))
3571 if (noce_try_bitop (if_info
))
3573 if (noce_try_minmax (if_info
))
3575 if (noce_try_abs (if_info
))
3577 if (noce_try_inverse_constants (if_info
))
3579 if (!targetm
.have_conditional_execution ()
3580 && noce_try_store_flag_constants (if_info
))
3582 if (HAVE_conditional_move
3583 && noce_try_cmove (if_info
))
3585 if (! targetm
.have_conditional_execution ())
3587 if (noce_try_addcc (if_info
))
3589 if (noce_try_store_flag_mask (if_info
))
3591 if (HAVE_conditional_move
3592 && noce_try_cmove_arith (if_info
))
3594 if (noce_try_sign_mask (if_info
))
3598 if (!else_bb
&& set_b
)
3610 /* If we used a temporary, fix it up now. */
3616 noce_emit_move_insn (orig_x
, x
);
3618 set_used_flags (orig_x
);
3619 unshare_all_rtl_in_chain (seq
);
3622 emit_insn_before_setloc (seq
, BB_END (test_bb
), INSN_LOCATION (insn_a
));
3625 /* The original THEN and ELSE blocks may now be removed. The test block
3626 must now jump to the join block. If the test block and the join block
3627 can be merged, do so. */
3630 delete_basic_block (else_bb
);
3634 remove_edge (find_edge (test_bb
, join_bb
));
3636 remove_edge (find_edge (then_bb
, join_bb
));
3637 redirect_edge_and_branch_force (single_succ_edge (test_bb
), join_bb
);
3638 delete_basic_block (then_bb
);
3641 if (can_merge_blocks_p (test_bb
, join_bb
))
3643 merge_blocks (test_bb
, join_bb
);
3647 num_updated_if_blocks
++;
3651 /* Check whether a block is suitable for conditional move conversion.
3652 Every insn must be a simple set of a register to a constant or a
3653 register. For each assignment, store the value in the pointer map
3654 VALS, keyed indexed by register pointer, then store the register
3655 pointer in REGS. COND is the condition we will test. */
3658 check_cond_move_block (basic_block bb
,
3659 hash_map
<rtx
, rtx
> *vals
,
3664 rtx cc
= cc_in_cond (cond
);
3666 /* We can only handle simple jumps at the end of the basic block.
3667 It is almost impossible to update the CFG otherwise. */
3669 if (JUMP_P (insn
) && !onlyjump_p (insn
))
3672 FOR_BB_INSNS (bb
, insn
)
3676 if (!NONDEBUG_INSN_P (insn
) || JUMP_P (insn
))
3678 set
= single_set (insn
);
3682 dest
= SET_DEST (set
);
3683 src
= SET_SRC (set
);
3685 || (HARD_REGISTER_P (dest
)
3686 && targetm
.small_register_classes_for_mode_p (GET_MODE (dest
))))
3689 if (!CONSTANT_P (src
) && !register_operand (src
, VOIDmode
))
3692 if (side_effects_p (src
) || side_effects_p (dest
))
3695 if (may_trap_p (src
) || may_trap_p (dest
))
3698 /* Don't try to handle this if the source register was
3699 modified earlier in the block. */
3702 || (GET_CODE (src
) == SUBREG
&& REG_P (SUBREG_REG (src
))
3703 && vals
->get (SUBREG_REG (src
))))
3706 /* Don't try to handle this if the destination register was
3707 modified earlier in the block. */
3708 if (vals
->get (dest
))
3711 /* Don't try to handle this if the condition uses the
3712 destination register. */
3713 if (reg_overlap_mentioned_p (dest
, cond
))
3716 /* Don't try to handle this if the source register is modified
3717 later in the block. */
3718 if (!CONSTANT_P (src
)
3719 && modified_between_p (src
, insn
, NEXT_INSN (BB_END (bb
))))
3722 /* Skip it if the instruction to be moved might clobber CC. */
3723 if (cc
&& set_of (cc
, insn
))
3726 vals
->put (dest
, src
);
3728 regs
->safe_push (dest
);
3734 /* Given a basic block BB suitable for conditional move conversion,
3735 a condition COND, and pointer maps THEN_VALS and ELSE_VALS containing
3736 the register values depending on COND, emit the insns in the block as
3737 conditional moves. If ELSE_BLOCK is true, THEN_BB was already
3738 processed. The caller has started a sequence for the conversion.
3739 Return true if successful, false if something goes wrong. */
3742 cond_move_convert_if_block (struct noce_if_info
*if_infop
,
3743 basic_block bb
, rtx cond
,
3744 hash_map
<rtx
, rtx
> *then_vals
,
3745 hash_map
<rtx
, rtx
> *else_vals
,
3750 rtx cond_arg0
, cond_arg1
;
3752 code
= GET_CODE (cond
);
3753 cond_arg0
= XEXP (cond
, 0);
3754 cond_arg1
= XEXP (cond
, 1);
3756 FOR_BB_INSNS (bb
, insn
)
3758 rtx set
, target
, dest
, t
, e
;
3760 /* ??? Maybe emit conditional debug insn? */
3761 if (!NONDEBUG_INSN_P (insn
) || JUMP_P (insn
))
3763 set
= single_set (insn
);
3764 gcc_assert (set
&& REG_P (SET_DEST (set
)));
3766 dest
= SET_DEST (set
);
3768 rtx
*then_slot
= then_vals
->get (dest
);
3769 rtx
*else_slot
= else_vals
->get (dest
);
3770 t
= then_slot
? *then_slot
: NULL_RTX
;
3771 e
= else_slot
? *else_slot
: NULL_RTX
;
3775 /* If this register was set in the then block, we already
3776 handled this case there. */
3789 target
= noce_emit_cmove (if_infop
, dest
, code
, cond_arg0
, cond_arg1
,
3795 noce_emit_move_insn (dest
, target
);
3801 /* Given a simple IF-THEN-JOIN or IF-THEN-ELSE-JOIN block, attempt to convert
3802 it using only conditional moves. Return TRUE if we were successful at
3803 converting the block. */
3806 cond_move_process_if_block (struct noce_if_info
*if_info
)
3808 basic_block test_bb
= if_info
->test_bb
;
3809 basic_block then_bb
= if_info
->then_bb
;
3810 basic_block else_bb
= if_info
->else_bb
;
3811 basic_block join_bb
= if_info
->join_bb
;
3812 rtx_insn
*jump
= if_info
->jump
;
3813 rtx cond
= if_info
->cond
;
3814 rtx_insn
*seq
, *loc_insn
;
3817 vec
<rtx
> then_regs
= vNULL
;
3818 vec
<rtx
> else_regs
= vNULL
;
3820 int success_p
= FALSE
;
3822 /* Build a mapping for each block to the value used for each
3824 hash_map
<rtx
, rtx
> then_vals
;
3825 hash_map
<rtx
, rtx
> else_vals
;
3827 /* Make sure the blocks are suitable. */
3828 if (!check_cond_move_block (then_bb
, &then_vals
, &then_regs
, cond
)
3830 && !check_cond_move_block (else_bb
, &else_vals
, &else_regs
, cond
)))
3833 /* Make sure the blocks can be used together. If the same register
3834 is set in both blocks, and is not set to a constant in both
3835 cases, then both blocks must set it to the same register. We
3836 have already verified that if it is set to a register, that the
3837 source register does not change after the assignment. Also count
3838 the number of registers set in only one of the blocks. */
3840 FOR_EACH_VEC_ELT (then_regs
, i
, reg
)
3842 rtx
*then_slot
= then_vals
.get (reg
);
3843 rtx
*else_slot
= else_vals
.get (reg
);
3845 gcc_checking_assert (then_slot
);
3850 rtx then_val
= *then_slot
;
3851 rtx else_val
= *else_slot
;
3852 if (!CONSTANT_P (then_val
) && !CONSTANT_P (else_val
)
3853 && !rtx_equal_p (then_val
, else_val
))
3858 /* Finish off c for MAX_CONDITIONAL_EXECUTE. */
3859 FOR_EACH_VEC_ELT (else_regs
, i
, reg
)
3861 gcc_checking_assert (else_vals
.get (reg
));
3862 if (!then_vals
.get (reg
))
3866 /* Make sure it is reasonable to convert this block. What matters
3867 is the number of assignments currently made in only one of the
3868 branches, since if we convert we are going to always execute
3870 if (c
> MAX_CONDITIONAL_EXECUTE
)
3873 /* Try to emit the conditional moves. First do the then block,
3874 then do anything left in the else blocks. */
3876 if (!cond_move_convert_if_block (if_info
, then_bb
, cond
,
3877 &then_vals
, &else_vals
, false)
3879 && !cond_move_convert_if_block (if_info
, else_bb
, cond
,
3880 &then_vals
, &else_vals
, true)))
3885 seq
= end_ifcvt_sequence (if_info
);
3889 loc_insn
= first_active_insn (then_bb
);
3892 loc_insn
= first_active_insn (else_bb
);
3893 gcc_assert (loc_insn
);
3895 emit_insn_before_setloc (seq
, jump
, INSN_LOCATION (loc_insn
));
3899 delete_basic_block (else_bb
);
3903 remove_edge (find_edge (test_bb
, join_bb
));
3905 remove_edge (find_edge (then_bb
, join_bb
));
3906 redirect_edge_and_branch_force (single_succ_edge (test_bb
), join_bb
);
3907 delete_basic_block (then_bb
);
3910 if (can_merge_blocks_p (test_bb
, join_bb
))
3912 merge_blocks (test_bb
, join_bb
);
3916 num_updated_if_blocks
++;
3921 then_regs
.release ();
3922 else_regs
.release ();
3927 /* Determine if a given basic block heads a simple IF-THEN-JOIN or an
3928 IF-THEN-ELSE-JOIN block.
3930 If so, we'll try to convert the insns to not require the branch,
3931 using only transformations that do not require conditional execution.
3933 Return TRUE if we were successful at converting the block. */
3936 noce_find_if_block (basic_block test_bb
, edge then_edge
, edge else_edge
,
3939 basic_block then_bb
, else_bb
, join_bb
;
3940 bool then_else_reversed
= false;
3943 rtx_insn
*cond_earliest
;
3944 struct noce_if_info if_info
;
3946 /* We only ever should get here before reload. */
3947 gcc_assert (!reload_completed
);
3949 /* Recognize an IF-THEN-ELSE-JOIN block. */
3950 if (single_pred_p (then_edge
->dest
)
3951 && single_succ_p (then_edge
->dest
)
3952 && single_pred_p (else_edge
->dest
)
3953 && single_succ_p (else_edge
->dest
)
3954 && single_succ (then_edge
->dest
) == single_succ (else_edge
->dest
))
3956 then_bb
= then_edge
->dest
;
3957 else_bb
= else_edge
->dest
;
3958 join_bb
= single_succ (then_bb
);
3960 /* Recognize an IF-THEN-JOIN block. */
3961 else if (single_pred_p (then_edge
->dest
)
3962 && single_succ_p (then_edge
->dest
)
3963 && single_succ (then_edge
->dest
) == else_edge
->dest
)
3965 then_bb
= then_edge
->dest
;
3966 else_bb
= NULL_BLOCK
;
3967 join_bb
= else_edge
->dest
;
3969 /* Recognize an IF-ELSE-JOIN block. We can have those because the order
3970 of basic blocks in cfglayout mode does not matter, so the fallthrough
3971 edge can go to any basic block (and not just to bb->next_bb, like in
3973 else if (single_pred_p (else_edge
->dest
)
3974 && single_succ_p (else_edge
->dest
)
3975 && single_succ (else_edge
->dest
) == then_edge
->dest
)
3977 /* The noce transformations do not apply to IF-ELSE-JOIN blocks.
3978 To make this work, we have to invert the THEN and ELSE blocks
3979 and reverse the jump condition. */
3980 then_bb
= else_edge
->dest
;
3981 else_bb
= NULL_BLOCK
;
3982 join_bb
= single_succ (then_bb
);
3983 then_else_reversed
= true;
3986 /* Not a form we can handle. */
3989 /* The edges of the THEN and ELSE blocks cannot have complex edges. */
3990 if (single_succ_edge (then_bb
)->flags
& EDGE_COMPLEX
)
3993 && single_succ_edge (else_bb
)->flags
& EDGE_COMPLEX
)
3996 num_possible_if_blocks
++;
4001 "\nIF-THEN%s-JOIN block found, pass %d, test %d, then %d",
4002 (else_bb
) ? "-ELSE" : "",
4003 pass
, test_bb
->index
, then_bb
->index
);
4006 fprintf (dump_file
, ", else %d", else_bb
->index
);
4008 fprintf (dump_file
, ", join %d\n", join_bb
->index
);
4011 /* If the conditional jump is more than just a conditional
4012 jump, then we can not do if-conversion on this block. */
4013 jump
= BB_END (test_bb
);
4014 if (! onlyjump_p (jump
))
4017 /* If this is not a standard conditional jump, we can't parse it. */
4018 cond
= noce_get_condition (jump
, &cond_earliest
, then_else_reversed
);
4022 /* We must be comparing objects whose modes imply the size. */
4023 if (GET_MODE (XEXP (cond
, 0)) == BLKmode
)
4026 /* Initialize an IF_INFO struct to pass around. */
4027 memset (&if_info
, 0, sizeof if_info
);
4028 if_info
.test_bb
= test_bb
;
4029 if_info
.then_bb
= then_bb
;
4030 if_info
.else_bb
= else_bb
;
4031 if_info
.join_bb
= join_bb
;
4032 if_info
.cond
= cond
;
4033 if_info
.cond_earliest
= cond_earliest
;
4034 if_info
.jump
= jump
;
4035 if_info
.then_else_reversed
= then_else_reversed
;
4036 if_info
.branch_cost
= BRANCH_COST (optimize_bb_for_speed_p (test_bb
),
4037 predictable_edge_p (then_edge
));
4039 /* Do the real work. */
4041 if (noce_process_if_block (&if_info
))
4044 if (HAVE_conditional_move
4045 && cond_move_process_if_block (&if_info
))
4052 /* Merge the blocks and mark for local life update. */
4055 merge_if_block (struct ce_if_block
* ce_info
)
4057 basic_block test_bb
= ce_info
->test_bb
; /* last test block */
4058 basic_block then_bb
= ce_info
->then_bb
; /* THEN */
4059 basic_block else_bb
= ce_info
->else_bb
; /* ELSE or NULL */
4060 basic_block join_bb
= ce_info
->join_bb
; /* join block */
4061 basic_block combo_bb
;
4063 /* All block merging is done into the lower block numbers. */
4066 df_set_bb_dirty (test_bb
);
4068 /* Merge any basic blocks to handle && and || subtests. Each of
4069 the blocks are on the fallthru path from the predecessor block. */
4070 if (ce_info
->num_multiple_test_blocks
> 0)
4072 basic_block bb
= test_bb
;
4073 basic_block last_test_bb
= ce_info
->last_test_bb
;
4074 basic_block fallthru
= block_fallthru (bb
);
4079 fallthru
= block_fallthru (bb
);
4080 merge_blocks (combo_bb
, bb
);
4083 while (bb
!= last_test_bb
);
4086 /* Merge TEST block into THEN block. Normally the THEN block won't have a
4087 label, but it might if there were || tests. That label's count should be
4088 zero, and it normally should be removed. */
4092 /* If THEN_BB has no successors, then there's a BARRIER after it.
4093 If COMBO_BB has more than one successor (THEN_BB), then that BARRIER
4094 is no longer needed, and in fact it is incorrect to leave it in
4096 if (EDGE_COUNT (then_bb
->succs
) == 0
4097 && EDGE_COUNT (combo_bb
->succs
) > 1)
4099 rtx_insn
*end
= NEXT_INSN (BB_END (then_bb
));
4100 while (end
&& NOTE_P (end
) && !NOTE_INSN_BASIC_BLOCK_P (end
))
4101 end
= NEXT_INSN (end
);
4103 if (end
&& BARRIER_P (end
))
4106 merge_blocks (combo_bb
, then_bb
);
4110 /* The ELSE block, if it existed, had a label. That label count
4111 will almost always be zero, but odd things can happen when labels
4112 get their addresses taken. */
4115 /* If ELSE_BB has no successors, then there's a BARRIER after it.
4116 If COMBO_BB has more than one successor (ELSE_BB), then that BARRIER
4117 is no longer needed, and in fact it is incorrect to leave it in
4119 if (EDGE_COUNT (else_bb
->succs
) == 0
4120 && EDGE_COUNT (combo_bb
->succs
) > 1)
4122 rtx_insn
*end
= NEXT_INSN (BB_END (else_bb
));
4123 while (end
&& NOTE_P (end
) && !NOTE_INSN_BASIC_BLOCK_P (end
))
4124 end
= NEXT_INSN (end
);
4126 if (end
&& BARRIER_P (end
))
4129 merge_blocks (combo_bb
, else_bb
);
4133 /* If there was no join block reported, that means it was not adjacent
4134 to the others, and so we cannot merge them. */
4138 rtx_insn
*last
= BB_END (combo_bb
);
4140 /* The outgoing edge for the current COMBO block should already
4141 be correct. Verify this. */
4142 if (EDGE_COUNT (combo_bb
->succs
) == 0)
4143 gcc_assert (find_reg_note (last
, REG_NORETURN
, NULL
)
4144 || (NONJUMP_INSN_P (last
)
4145 && GET_CODE (PATTERN (last
)) == TRAP_IF
4146 && (TRAP_CONDITION (PATTERN (last
))
4147 == const_true_rtx
)));
4150 /* There should still be something at the end of the THEN or ELSE
4151 blocks taking us to our final destination. */
4152 gcc_assert (JUMP_P (last
)
4153 || (EDGE_SUCC (combo_bb
, 0)->dest
4154 == EXIT_BLOCK_PTR_FOR_FN (cfun
)
4156 && SIBLING_CALL_P (last
))
4157 || ((EDGE_SUCC (combo_bb
, 0)->flags
& EDGE_EH
)
4158 && can_throw_internal (last
)));
4161 /* The JOIN block may have had quite a number of other predecessors too.
4162 Since we've already merged the TEST, THEN and ELSE blocks, we should
4163 have only one remaining edge from our if-then-else diamond. If there
4164 is more than one remaining edge, it must come from elsewhere. There
4165 may be zero incoming edges if the THEN block didn't actually join
4166 back up (as with a call to a non-return function). */
4167 else if (EDGE_COUNT (join_bb
->preds
) < 2
4168 && join_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
4170 /* We can merge the JOIN cleanly and update the dataflow try
4171 again on this pass.*/
4172 merge_blocks (combo_bb
, join_bb
);
4177 /* We cannot merge the JOIN. */
4179 /* The outgoing edge for the current COMBO block should already
4180 be correct. Verify this. */
4181 gcc_assert (single_succ_p (combo_bb
)
4182 && single_succ (combo_bb
) == join_bb
);
4184 /* Remove the jump and cruft from the end of the COMBO block. */
4185 if (join_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
4186 tidy_fallthru_edge (single_succ_edge (combo_bb
));
4189 num_updated_if_blocks
++;
4192 /* Find a block ending in a simple IF condition and try to transform it
4193 in some way. When converting a multi-block condition, put the new code
4194 in the first such block and delete the rest. Return a pointer to this
4195 first block if some transformation was done. Return NULL otherwise. */
4198 find_if_header (basic_block test_bb
, int pass
)
4200 ce_if_block ce_info
;
4204 /* The kind of block we're looking for has exactly two successors. */
4205 if (EDGE_COUNT (test_bb
->succs
) != 2)
4208 then_edge
= EDGE_SUCC (test_bb
, 0);
4209 else_edge
= EDGE_SUCC (test_bb
, 1);
4211 if (df_get_bb_dirty (then_edge
->dest
))
4213 if (df_get_bb_dirty (else_edge
->dest
))
4216 /* Neither edge should be abnormal. */
4217 if ((then_edge
->flags
& EDGE_COMPLEX
)
4218 || (else_edge
->flags
& EDGE_COMPLEX
))
4221 /* Nor exit the loop. */
4222 if ((then_edge
->flags
& EDGE_LOOP_EXIT
)
4223 || (else_edge
->flags
& EDGE_LOOP_EXIT
))
4226 /* The THEN edge is canonically the one that falls through. */
4227 if (then_edge
->flags
& EDGE_FALLTHRU
)
4229 else if (else_edge
->flags
& EDGE_FALLTHRU
)
4230 std::swap (then_edge
, else_edge
);
4232 /* Otherwise this must be a multiway branch of some sort. */
4235 memset (&ce_info
, 0, sizeof (ce_info
));
4236 ce_info
.test_bb
= test_bb
;
4237 ce_info
.then_bb
= then_edge
->dest
;
4238 ce_info
.else_bb
= else_edge
->dest
;
4239 ce_info
.pass
= pass
;
4241 #ifdef IFCVT_MACHDEP_INIT
4242 IFCVT_MACHDEP_INIT (&ce_info
);
4245 if (!reload_completed
4246 && noce_find_if_block (test_bb
, then_edge
, else_edge
, pass
))
4249 if (reload_completed
4250 && targetm
.have_conditional_execution ()
4251 && cond_exec_find_if_block (&ce_info
))
4254 if (targetm
.have_trap ()
4255 && optab_handler (ctrap_optab
, word_mode
) != CODE_FOR_nothing
4256 && find_cond_trap (test_bb
, then_edge
, else_edge
))
4259 if (dom_info_state (CDI_POST_DOMINATORS
) >= DOM_NO_FAST_QUERY
4260 && (reload_completed
|| !targetm
.have_conditional_execution ()))
4262 if (find_if_case_1 (test_bb
, then_edge
, else_edge
))
4264 if (find_if_case_2 (test_bb
, then_edge
, else_edge
))
4272 fprintf (dump_file
, "Conversion succeeded on pass %d.\n", pass
);
4273 /* Set this so we continue looking. */
4274 cond_exec_changed_p
= TRUE
;
4275 return ce_info
.test_bb
;
4278 /* Return true if a block has two edges, one of which falls through to the next
4279 block, and the other jumps to a specific block, so that we can tell if the
4280 block is part of an && test or an || test. Returns either -1 or the number
4281 of non-note, non-jump, non-USE/CLOBBER insns in the block. */
4284 block_jumps_and_fallthru_p (basic_block cur_bb
, basic_block target_bb
)
4287 int fallthru_p
= FALSE
;
4294 if (!cur_bb
|| !target_bb
)
4297 /* If no edges, obviously it doesn't jump or fallthru. */
4298 if (EDGE_COUNT (cur_bb
->succs
) == 0)
4301 FOR_EACH_EDGE (cur_edge
, ei
, cur_bb
->succs
)
4303 if (cur_edge
->flags
& EDGE_COMPLEX
)
4304 /* Anything complex isn't what we want. */
4307 else if (cur_edge
->flags
& EDGE_FALLTHRU
)
4310 else if (cur_edge
->dest
== target_bb
)
4317 if ((jump_p
& fallthru_p
) == 0)
4320 /* Don't allow calls in the block, since this is used to group && and ||
4321 together for conditional execution support. ??? we should support
4322 conditional execution support across calls for IA-64 some day, but
4323 for now it makes the code simpler. */
4324 end
= BB_END (cur_bb
);
4325 insn
= BB_HEAD (cur_bb
);
4327 while (insn
!= NULL_RTX
)
4334 && !DEBUG_INSN_P (insn
)
4335 && GET_CODE (PATTERN (insn
)) != USE
4336 && GET_CODE (PATTERN (insn
)) != CLOBBER
)
4342 insn
= NEXT_INSN (insn
);
4348 /* Determine if a given basic block heads a simple IF-THEN or IF-THEN-ELSE
4349 block. If so, we'll try to convert the insns to not require the branch.
4350 Return TRUE if we were successful at converting the block. */
4353 cond_exec_find_if_block (struct ce_if_block
* ce_info
)
4355 basic_block test_bb
= ce_info
->test_bb
;
4356 basic_block then_bb
= ce_info
->then_bb
;
4357 basic_block else_bb
= ce_info
->else_bb
;
4358 basic_block join_bb
= NULL_BLOCK
;
4363 ce_info
->last_test_bb
= test_bb
;
4365 /* We only ever should get here after reload,
4366 and if we have conditional execution. */
4367 gcc_assert (reload_completed
&& targetm
.have_conditional_execution ());
4369 /* Discover if any fall through predecessors of the current test basic block
4370 were && tests (which jump to the else block) or || tests (which jump to
4372 if (single_pred_p (test_bb
)
4373 && single_pred_edge (test_bb
)->flags
== EDGE_FALLTHRU
)
4375 basic_block bb
= single_pred (test_bb
);
4376 basic_block target_bb
;
4377 int max_insns
= MAX_CONDITIONAL_EXECUTE
;
4380 /* Determine if the preceding block is an && or || block. */
4381 if ((n_insns
= block_jumps_and_fallthru_p (bb
, else_bb
)) >= 0)
4383 ce_info
->and_and_p
= TRUE
;
4384 target_bb
= else_bb
;
4386 else if ((n_insns
= block_jumps_and_fallthru_p (bb
, then_bb
)) >= 0)
4388 ce_info
->and_and_p
= FALSE
;
4389 target_bb
= then_bb
;
4392 target_bb
= NULL_BLOCK
;
4394 if (target_bb
&& n_insns
<= max_insns
)
4396 int total_insns
= 0;
4399 ce_info
->last_test_bb
= test_bb
;
4401 /* Found at least one && or || block, look for more. */
4404 ce_info
->test_bb
= test_bb
= bb
;
4405 total_insns
+= n_insns
;
4408 if (!single_pred_p (bb
))
4411 bb
= single_pred (bb
);
4412 n_insns
= block_jumps_and_fallthru_p (bb
, target_bb
);
4414 while (n_insns
>= 0 && (total_insns
+ n_insns
) <= max_insns
);
4416 ce_info
->num_multiple_test_blocks
= blocks
;
4417 ce_info
->num_multiple_test_insns
= total_insns
;
4419 if (ce_info
->and_and_p
)
4420 ce_info
->num_and_and_blocks
= blocks
;
4422 ce_info
->num_or_or_blocks
= blocks
;
4426 /* The THEN block of an IF-THEN combo must have exactly one predecessor,
4427 other than any || blocks which jump to the THEN block. */
4428 if ((EDGE_COUNT (then_bb
->preds
) - ce_info
->num_or_or_blocks
) != 1)
4431 /* The edges of the THEN and ELSE blocks cannot have complex edges. */
4432 FOR_EACH_EDGE (cur_edge
, ei
, then_bb
->preds
)
4434 if (cur_edge
->flags
& EDGE_COMPLEX
)
4438 FOR_EACH_EDGE (cur_edge
, ei
, else_bb
->preds
)
4440 if (cur_edge
->flags
& EDGE_COMPLEX
)
4444 /* The THEN block of an IF-THEN combo must have zero or one successors. */
4445 if (EDGE_COUNT (then_bb
->succs
) > 0
4446 && (!single_succ_p (then_bb
)
4447 || (single_succ_edge (then_bb
)->flags
& EDGE_COMPLEX
)
4448 || (epilogue_completed
4449 && tablejump_p (BB_END (then_bb
), NULL
, NULL
))))
4452 /* If the THEN block has no successors, conditional execution can still
4453 make a conditional call. Don't do this unless the ELSE block has
4454 only one incoming edge -- the CFG manipulation is too ugly otherwise.
4455 Check for the last insn of the THEN block being an indirect jump, which
4456 is listed as not having any successors, but confuses the rest of the CE
4457 code processing. ??? we should fix this in the future. */
4458 if (EDGE_COUNT (then_bb
->succs
) == 0)
4460 if (single_pred_p (else_bb
) && else_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
4462 rtx_insn
*last_insn
= BB_END (then_bb
);
4465 && NOTE_P (last_insn
)
4466 && last_insn
!= BB_HEAD (then_bb
))
4467 last_insn
= PREV_INSN (last_insn
);
4470 && JUMP_P (last_insn
)
4471 && ! simplejump_p (last_insn
))
4475 else_bb
= NULL_BLOCK
;
4481 /* If the THEN block's successor is the other edge out of the TEST block,
4482 then we have an IF-THEN combo without an ELSE. */
4483 else if (single_succ (then_bb
) == else_bb
)
4486 else_bb
= NULL_BLOCK
;
4489 /* If the THEN and ELSE block meet in a subsequent block, and the ELSE
4490 has exactly one predecessor and one successor, and the outgoing edge
4491 is not complex, then we have an IF-THEN-ELSE combo. */
4492 else if (single_succ_p (else_bb
)
4493 && single_succ (then_bb
) == single_succ (else_bb
)
4494 && single_pred_p (else_bb
)
4495 && !(single_succ_edge (else_bb
)->flags
& EDGE_COMPLEX
)
4496 && !(epilogue_completed
4497 && tablejump_p (BB_END (else_bb
), NULL
, NULL
)))
4498 join_bb
= single_succ (else_bb
);
4500 /* Otherwise it is not an IF-THEN or IF-THEN-ELSE combination. */
4504 num_possible_if_blocks
++;
4509 "\nIF-THEN%s block found, pass %d, start block %d "
4510 "[insn %d], then %d [%d]",
4511 (else_bb
) ? "-ELSE" : "",
4514 BB_HEAD (test_bb
) ? (int)INSN_UID (BB_HEAD (test_bb
)) : -1,
4516 BB_HEAD (then_bb
) ? (int)INSN_UID (BB_HEAD (then_bb
)) : -1);
4519 fprintf (dump_file
, ", else %d [%d]",
4521 BB_HEAD (else_bb
) ? (int)INSN_UID (BB_HEAD (else_bb
)) : -1);
4523 fprintf (dump_file
, ", join %d [%d]",
4525 BB_HEAD (join_bb
) ? (int)INSN_UID (BB_HEAD (join_bb
)) : -1);
4527 if (ce_info
->num_multiple_test_blocks
> 0)
4528 fprintf (dump_file
, ", %d %s block%s last test %d [%d]",
4529 ce_info
->num_multiple_test_blocks
,
4530 (ce_info
->and_and_p
) ? "&&" : "||",
4531 (ce_info
->num_multiple_test_blocks
== 1) ? "" : "s",
4532 ce_info
->last_test_bb
->index
,
4533 ((BB_HEAD (ce_info
->last_test_bb
))
4534 ? (int)INSN_UID (BB_HEAD (ce_info
->last_test_bb
))
4537 fputc ('\n', dump_file
);
4540 /* Make sure IF, THEN, and ELSE, blocks are adjacent. Actually, we get the
4541 first condition for free, since we've already asserted that there's a
4542 fallthru edge from IF to THEN. Likewise for the && and || blocks, since
4543 we checked the FALLTHRU flag, those are already adjacent to the last IF
4545 /* ??? As an enhancement, move the ELSE block. Have to deal with
4546 BLOCK notes, if by no other means than backing out the merge if they
4547 exist. Sticky enough I don't want to think about it now. */
4549 if (else_bb
&& (next
= next
->next_bb
) != else_bb
)
4551 if ((next
= next
->next_bb
) != join_bb
4552 && join_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
4560 /* Do the real work. */
4562 ce_info
->else_bb
= else_bb
;
4563 ce_info
->join_bb
= join_bb
;
4565 /* If we have && and || tests, try to first handle combining the && and ||
4566 tests into the conditional code, and if that fails, go back and handle
4567 it without the && and ||, which at present handles the && case if there
4568 was no ELSE block. */
4569 if (cond_exec_process_if_block (ce_info
, TRUE
))
4572 if (ce_info
->num_multiple_test_blocks
)
4576 if (cond_exec_process_if_block (ce_info
, FALSE
))
4583 /* Convert a branch over a trap, or a branch
4584 to a trap, into a conditional trap. */
4587 find_cond_trap (basic_block test_bb
, edge then_edge
, edge else_edge
)
4589 basic_block then_bb
= then_edge
->dest
;
4590 basic_block else_bb
= else_edge
->dest
;
4591 basic_block other_bb
, trap_bb
;
4592 rtx_insn
*trap
, *jump
;
4594 rtx_insn
*cond_earliest
;
4597 /* Locate the block with the trap instruction. */
4598 /* ??? While we look for no successors, we really ought to allow
4599 EH successors. Need to fix merge_if_block for that to work. */
4600 if ((trap
= block_has_only_trap (then_bb
)) != NULL
)
4601 trap_bb
= then_bb
, other_bb
= else_bb
;
4602 else if ((trap
= block_has_only_trap (else_bb
)) != NULL
)
4603 trap_bb
= else_bb
, other_bb
= then_bb
;
4609 fprintf (dump_file
, "\nTRAP-IF block found, start %d, trap %d\n",
4610 test_bb
->index
, trap_bb
->index
);
4613 /* If this is not a standard conditional jump, we can't parse it. */
4614 jump
= BB_END (test_bb
);
4615 cond
= noce_get_condition (jump
, &cond_earliest
, false);
4619 /* If the conditional jump is more than just a conditional jump, then
4620 we can not do if-conversion on this block. */
4621 if (! onlyjump_p (jump
))
4624 /* We must be comparing objects whose modes imply the size. */
4625 if (GET_MODE (XEXP (cond
, 0)) == BLKmode
)
4628 /* Reverse the comparison code, if necessary. */
4629 code
= GET_CODE (cond
);
4630 if (then_bb
== trap_bb
)
4632 code
= reversed_comparison_code (cond
, jump
);
4633 if (code
== UNKNOWN
)
4637 /* Attempt to generate the conditional trap. */
4638 rtx_insn
*seq
= gen_cond_trap (code
, copy_rtx (XEXP (cond
, 0)),
4639 copy_rtx (XEXP (cond
, 1)),
4640 TRAP_CODE (PATTERN (trap
)));
4644 /* Emit the new insns before cond_earliest. */
4645 emit_insn_before_setloc (seq
, cond_earliest
, INSN_LOCATION (trap
));
4647 /* Delete the trap block if possible. */
4648 remove_edge (trap_bb
== then_bb
? then_edge
: else_edge
);
4649 df_set_bb_dirty (test_bb
);
4650 df_set_bb_dirty (then_bb
);
4651 df_set_bb_dirty (else_bb
);
4653 if (EDGE_COUNT (trap_bb
->preds
) == 0)
4655 delete_basic_block (trap_bb
);
4659 /* Wire together the blocks again. */
4660 if (current_ir_type () == IR_RTL_CFGLAYOUT
)
4661 single_succ_edge (test_bb
)->flags
|= EDGE_FALLTHRU
;
4662 else if (trap_bb
== then_bb
)
4664 rtx lab
= JUMP_LABEL (jump
);
4665 rtx_insn
*seq
= targetm
.gen_jump (lab
);
4666 rtx_jump_insn
*newjump
= emit_jump_insn_after (seq
, jump
);
4667 LABEL_NUSES (lab
) += 1;
4668 JUMP_LABEL (newjump
) = lab
;
4669 emit_barrier_after (newjump
);
4673 if (can_merge_blocks_p (test_bb
, other_bb
))
4675 merge_blocks (test_bb
, other_bb
);
4679 num_updated_if_blocks
++;
4683 /* Subroutine of find_cond_trap: if BB contains only a trap insn,
4687 block_has_only_trap (basic_block bb
)
4691 /* We're not the exit block. */
4692 if (bb
== EXIT_BLOCK_PTR_FOR_FN (cfun
))
4695 /* The block must have no successors. */
4696 if (EDGE_COUNT (bb
->succs
) > 0)
4699 /* The only instruction in the THEN block must be the trap. */
4700 trap
= first_active_insn (bb
);
4701 if (! (trap
== BB_END (bb
)
4702 && GET_CODE (PATTERN (trap
)) == TRAP_IF
4703 && TRAP_CONDITION (PATTERN (trap
)) == const_true_rtx
))
4709 /* Look for IF-THEN-ELSE cases in which one of THEN or ELSE is
4710 transformable, but not necessarily the other. There need be no
4713 Return TRUE if we were successful at converting the block.
4715 Cases we'd like to look at:
4718 if (test) goto over; // x not live
4726 if (! test) goto label;
4729 if (test) goto E; // x not live
4743 (3) // This one's really only interesting for targets that can do
4744 // multiway branching, e.g. IA-64 BBB bundles. For other targets
4745 // it results in multiple branches on a cache line, which often
4746 // does not sit well with predictors.
4748 if (test1) goto E; // predicted not taken
4764 (A) Don't do (2) if the branch is predicted against the block we're
4765 eliminating. Do it anyway if we can eliminate a branch; this requires
4766 that the sole successor of the eliminated block postdominate the other
4769 (B) With CE, on (3) we can steal from both sides of the if, creating
4778 Again, this is most useful if J postdominates.
4780 (C) CE substitutes for helpful life information.
4782 (D) These heuristics need a lot of work. */
4784 /* Tests for case 1 above. */
4787 find_if_case_1 (basic_block test_bb
, edge then_edge
, edge else_edge
)
4789 basic_block then_bb
= then_edge
->dest
;
4790 basic_block else_bb
= else_edge
->dest
;
4792 int then_bb_index
, then_prob
;
4793 rtx else_target
= NULL_RTX
;
4795 /* If we are partitioning hot/cold basic blocks, we don't want to
4796 mess up unconditional or indirect jumps that cross between hot
4799 Basic block partitioning may result in some jumps that appear to
4800 be optimizable (or blocks that appear to be mergeable), but which really
4801 must be left untouched (they are required to make it safely across
4802 partition boundaries). See the comments at the top of
4803 bb-reorder.c:partition_hot_cold_basic_blocks for complete details. */
4805 if ((BB_END (then_bb
)
4806 && JUMP_P (BB_END (then_bb
))
4807 && CROSSING_JUMP_P (BB_END (then_bb
)))
4808 || (BB_END (test_bb
)
4809 && JUMP_P (BB_END (test_bb
))
4810 && CROSSING_JUMP_P (BB_END (test_bb
)))
4811 || (BB_END (else_bb
)
4812 && JUMP_P (BB_END (else_bb
))
4813 && CROSSING_JUMP_P (BB_END (else_bb
))))
4816 /* THEN has one successor. */
4817 if (!single_succ_p (then_bb
))
4820 /* THEN does not fall through, but is not strange either. */
4821 if (single_succ_edge (then_bb
)->flags
& (EDGE_COMPLEX
| EDGE_FALLTHRU
))
4824 /* THEN has one predecessor. */
4825 if (!single_pred_p (then_bb
))
4828 /* THEN must do something. */
4829 if (forwarder_block_p (then_bb
))
4832 num_possible_if_blocks
++;
4835 "\nIF-CASE-1 found, start %d, then %d\n",
4836 test_bb
->index
, then_bb
->index
);
4838 if (then_edge
->probability
)
4839 then_prob
= REG_BR_PROB_BASE
- then_edge
->probability
;
4841 then_prob
= REG_BR_PROB_BASE
/ 2;
4843 /* We're speculating from the THEN path, we want to make sure the cost
4844 of speculation is within reason. */
4845 if (! cheap_bb_rtx_cost_p (then_bb
, then_prob
,
4846 COSTS_N_INSNS (BRANCH_COST (optimize_bb_for_speed_p (then_edge
->src
),
4847 predictable_edge_p (then_edge
)))))
4850 if (else_bb
== EXIT_BLOCK_PTR_FOR_FN (cfun
))
4852 rtx_insn
*jump
= BB_END (else_edge
->src
);
4853 gcc_assert (JUMP_P (jump
));
4854 else_target
= JUMP_LABEL (jump
);
4857 /* Registers set are dead, or are predicable. */
4858 if (! dead_or_predicable (test_bb
, then_bb
, else_bb
,
4859 single_succ_edge (then_bb
), 1))
4862 /* Conversion went ok, including moving the insns and fixing up the
4863 jump. Adjust the CFG to match. */
4865 /* We can avoid creating a new basic block if then_bb is immediately
4866 followed by else_bb, i.e. deleting then_bb allows test_bb to fall
4867 through to else_bb. */
4869 if (then_bb
->next_bb
== else_bb
4870 && then_bb
->prev_bb
== test_bb
4871 && else_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
4873 redirect_edge_succ (FALLTHRU_EDGE (test_bb
), else_bb
);
4876 else if (else_bb
== EXIT_BLOCK_PTR_FOR_FN (cfun
))
4877 new_bb
= force_nonfallthru_and_redirect (FALLTHRU_EDGE (test_bb
),
4878 else_bb
, else_target
);
4880 new_bb
= redirect_edge_and_branch_force (FALLTHRU_EDGE (test_bb
),
4883 df_set_bb_dirty (test_bb
);
4884 df_set_bb_dirty (else_bb
);
4886 then_bb_index
= then_bb
->index
;
4887 delete_basic_block (then_bb
);
4889 /* Make rest of code believe that the newly created block is the THEN_BB
4890 block we removed. */
4893 df_bb_replace (then_bb_index
, new_bb
);
4894 /* This should have been done above via force_nonfallthru_and_redirect
4895 (possibly called from redirect_edge_and_branch_force). */
4896 gcc_checking_assert (BB_PARTITION (new_bb
) == BB_PARTITION (test_bb
));
4900 num_updated_if_blocks
++;
4905 /* Test for case 2 above. */
4908 find_if_case_2 (basic_block test_bb
, edge then_edge
, edge else_edge
)
4910 basic_block then_bb
= then_edge
->dest
;
4911 basic_block else_bb
= else_edge
->dest
;
4913 int then_prob
, else_prob
;
4915 /* We do not want to speculate (empty) loop latches. */
4917 && else_bb
->loop_father
->latch
== else_bb
)
4920 /* If we are partitioning hot/cold basic blocks, we don't want to
4921 mess up unconditional or indirect jumps that cross between hot
4924 Basic block partitioning may result in some jumps that appear to
4925 be optimizable (or blocks that appear to be mergeable), but which really
4926 must be left untouched (they are required to make it safely across
4927 partition boundaries). See the comments at the top of
4928 bb-reorder.c:partition_hot_cold_basic_blocks for complete details. */
4930 if ((BB_END (then_bb
)
4931 && JUMP_P (BB_END (then_bb
))
4932 && CROSSING_JUMP_P (BB_END (then_bb
)))
4933 || (BB_END (test_bb
)
4934 && JUMP_P (BB_END (test_bb
))
4935 && CROSSING_JUMP_P (BB_END (test_bb
)))
4936 || (BB_END (else_bb
)
4937 && JUMP_P (BB_END (else_bb
))
4938 && CROSSING_JUMP_P (BB_END (else_bb
))))
4941 /* ELSE has one successor. */
4942 if (!single_succ_p (else_bb
))
4945 else_succ
= single_succ_edge (else_bb
);
4947 /* ELSE outgoing edge is not complex. */
4948 if (else_succ
->flags
& EDGE_COMPLEX
)
4951 /* ELSE has one predecessor. */
4952 if (!single_pred_p (else_bb
))
4955 /* THEN is not EXIT. */
4956 if (then_bb
->index
< NUM_FIXED_BLOCKS
)
4959 if (else_edge
->probability
)
4961 else_prob
= else_edge
->probability
;
4962 then_prob
= REG_BR_PROB_BASE
- else_prob
;
4966 else_prob
= REG_BR_PROB_BASE
/ 2;
4967 then_prob
= REG_BR_PROB_BASE
/ 2;
4970 /* ELSE is predicted or SUCC(ELSE) postdominates THEN. */
4971 if (else_prob
> then_prob
)
4973 else if (else_succ
->dest
->index
< NUM_FIXED_BLOCKS
4974 || dominated_by_p (CDI_POST_DOMINATORS
, then_bb
,
4980 num_possible_if_blocks
++;
4983 "\nIF-CASE-2 found, start %d, else %d\n",
4984 test_bb
->index
, else_bb
->index
);
4986 /* We're speculating from the ELSE path, we want to make sure the cost
4987 of speculation is within reason. */
4988 if (! cheap_bb_rtx_cost_p (else_bb
, else_prob
,
4989 COSTS_N_INSNS (BRANCH_COST (optimize_bb_for_speed_p (else_edge
->src
),
4990 predictable_edge_p (else_edge
)))))
4993 /* Registers set are dead, or are predicable. */
4994 if (! dead_or_predicable (test_bb
, else_bb
, then_bb
, else_succ
, 0))
4997 /* Conversion went ok, including moving the insns and fixing up the
4998 jump. Adjust the CFG to match. */
5000 df_set_bb_dirty (test_bb
);
5001 df_set_bb_dirty (then_bb
);
5002 delete_basic_block (else_bb
);
5005 num_updated_if_blocks
++;
5007 /* ??? We may now fallthru from one of THEN's successors into a join
5008 block. Rerun cleanup_cfg? Examine things manually? Wait? */
5013 /* Used by the code above to perform the actual rtl transformations.
5014 Return TRUE if successful.
5016 TEST_BB is the block containing the conditional branch. MERGE_BB
5017 is the block containing the code to manipulate. DEST_EDGE is an
5018 edge representing a jump to the join block; after the conversion,
5019 TEST_BB should be branching to its destination.
5020 REVERSEP is true if the sense of the branch should be reversed. */
5023 dead_or_predicable (basic_block test_bb
, basic_block merge_bb
,
5024 basic_block other_bb
, edge dest_edge
, int reversep
)
5026 basic_block new_dest
= dest_edge
->dest
;
5027 rtx_insn
*head
, *end
, *jump
;
5028 rtx_insn
*earliest
= NULL
;
5030 bitmap merge_set
= NULL
;
5031 /* Number of pending changes. */
5032 int n_validated_changes
= 0;
5033 rtx new_dest_label
= NULL_RTX
;
5035 jump
= BB_END (test_bb
);
5037 /* Find the extent of the real code in the merge block. */
5038 head
= BB_HEAD (merge_bb
);
5039 end
= BB_END (merge_bb
);
5041 while (DEBUG_INSN_P (end
) && end
!= head
)
5042 end
= PREV_INSN (end
);
5044 /* If merge_bb ends with a tablejump, predicating/moving insn's
5045 into test_bb and then deleting merge_bb will result in the jumptable
5046 that follows merge_bb being removed along with merge_bb and then we
5047 get an unresolved reference to the jumptable. */
5048 if (tablejump_p (end
, NULL
, NULL
))
5052 head
= NEXT_INSN (head
);
5053 while (DEBUG_INSN_P (head
) && head
!= end
)
5054 head
= NEXT_INSN (head
);
5062 head
= NEXT_INSN (head
);
5063 while (DEBUG_INSN_P (head
) && head
!= end
)
5064 head
= NEXT_INSN (head
);
5069 if (!onlyjump_p (end
))
5076 end
= PREV_INSN (end
);
5077 while (DEBUG_INSN_P (end
) && end
!= head
)
5078 end
= PREV_INSN (end
);
5081 /* Don't move frame-related insn across the conditional branch. This
5082 can lead to one of the paths of the branch having wrong unwind info. */
5083 if (epilogue_completed
)
5085 rtx_insn
*insn
= head
;
5088 if (INSN_P (insn
) && RTX_FRAME_RELATED_P (insn
))
5092 insn
= NEXT_INSN (insn
);
5096 /* Disable handling dead code by conditional execution if the machine needs
5097 to do anything funny with the tests, etc. */
5098 #ifndef IFCVT_MODIFY_TESTS
5099 if (targetm
.have_conditional_execution ())
5101 /* In the conditional execution case, we have things easy. We know
5102 the condition is reversible. We don't have to check life info
5103 because we're going to conditionally execute the code anyway.
5104 All that's left is making sure the insns involved can actually
5109 cond
= cond_exec_get_condition (jump
);
5113 rtx note
= find_reg_note (jump
, REG_BR_PROB
, NULL_RTX
);
5114 int prob_val
= (note
? XINT (note
, 0) : -1);
5118 enum rtx_code rev
= reversed_comparison_code (cond
, jump
);
5121 cond
= gen_rtx_fmt_ee (rev
, GET_MODE (cond
), XEXP (cond
, 0),
5124 prob_val
= REG_BR_PROB_BASE
- prob_val
;
5127 if (cond_exec_process_insns (NULL
, head
, end
, cond
, prob_val
, 0)
5128 && verify_changes (0))
5129 n_validated_changes
= num_validated_changes ();
5137 /* If we allocated new pseudos (e.g. in the conditional move
5138 expander called from noce_emit_cmove), we must resize the
5140 if (max_regno
< max_reg_num ())
5141 max_regno
= max_reg_num ();
5143 /* Try the NCE path if the CE path did not result in any changes. */
5144 if (n_validated_changes
== 0)
5151 /* In the non-conditional execution case, we have to verify that there
5152 are no trapping operations, no calls, no references to memory, and
5153 that any registers modified are dead at the branch site. */
5155 if (!any_condjump_p (jump
))
5158 /* Find the extent of the conditional. */
5159 cond
= noce_get_condition (jump
, &earliest
, false);
5163 live
= BITMAP_ALLOC (®_obstack
);
5164 simulate_backwards_to_point (merge_bb
, live
, end
);
5165 success
= can_move_insns_across (head
, end
, earliest
, jump
,
5167 df_get_live_in (other_bb
), NULL
);
5172 /* Collect the set of registers set in MERGE_BB. */
5173 merge_set
= BITMAP_ALLOC (®_obstack
);
5175 FOR_BB_INSNS (merge_bb
, insn
)
5176 if (NONDEBUG_INSN_P (insn
))
5177 df_simulate_find_defs (insn
, merge_set
);
5179 /* If shrink-wrapping, disable this optimization when test_bb is
5180 the first basic block and merge_bb exits. The idea is to not
5181 move code setting up a return register as that may clobber a
5182 register used to pass function parameters, which then must be
5183 saved in caller-saved regs. A caller-saved reg requires the
5184 prologue, killing a shrink-wrap opportunity. */
5185 if ((SHRINK_WRAPPING_ENABLED
&& !epilogue_completed
)
5186 && ENTRY_BLOCK_PTR_FOR_FN (cfun
)->next_bb
== test_bb
5187 && single_succ_p (new_dest
)
5188 && single_succ (new_dest
) == EXIT_BLOCK_PTR_FOR_FN (cfun
)
5189 && bitmap_intersect_p (df_get_live_in (new_dest
), merge_set
))
5194 return_regs
= BITMAP_ALLOC (®_obstack
);
5196 /* Start off with the intersection of regs used to pass
5197 params and regs used to return values. */
5198 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
5199 if (FUNCTION_ARG_REGNO_P (i
)
5200 && targetm
.calls
.function_value_regno_p (i
))
5201 bitmap_set_bit (return_regs
, INCOMING_REGNO (i
));
5203 bitmap_and_into (return_regs
,
5204 df_get_live_out (ENTRY_BLOCK_PTR_FOR_FN (cfun
)));
5205 bitmap_and_into (return_regs
,
5206 df_get_live_in (EXIT_BLOCK_PTR_FOR_FN (cfun
)));
5207 if (!bitmap_empty_p (return_regs
))
5209 FOR_BB_INSNS_REVERSE (new_dest
, insn
)
5210 if (NONDEBUG_INSN_P (insn
))
5214 /* If this insn sets any reg in return_regs, add all
5215 reg uses to the set of regs we're interested in. */
5216 FOR_EACH_INSN_DEF (def
, insn
)
5217 if (bitmap_bit_p (return_regs
, DF_REF_REGNO (def
)))
5219 df_simulate_uses (insn
, return_regs
);
5223 if (bitmap_intersect_p (merge_set
, return_regs
))
5225 BITMAP_FREE (return_regs
);
5226 BITMAP_FREE (merge_set
);
5230 BITMAP_FREE (return_regs
);
5235 /* We don't want to use normal invert_jump or redirect_jump because
5236 we don't want to delete_insn called. Also, we want to do our own
5237 change group management. */
5239 old_dest
= JUMP_LABEL (jump
);
5240 if (other_bb
!= new_dest
)
5242 if (!any_condjump_p (jump
))
5245 if (JUMP_P (BB_END (dest_edge
->src
)))
5246 new_dest_label
= JUMP_LABEL (BB_END (dest_edge
->src
));
5247 else if (new_dest
== EXIT_BLOCK_PTR_FOR_FN (cfun
))
5248 new_dest_label
= ret_rtx
;
5250 new_dest_label
= block_label (new_dest
);
5252 rtx_jump_insn
*jump_insn
= as_a
<rtx_jump_insn
*> (jump
);
5254 ? ! invert_jump_1 (jump_insn
, new_dest_label
)
5255 : ! redirect_jump_1 (jump_insn
, new_dest_label
))
5259 if (verify_changes (n_validated_changes
))
5260 confirm_change_group ();
5264 if (other_bb
!= new_dest
)
5266 redirect_jump_2 (as_a
<rtx_jump_insn
*> (jump
), old_dest
, new_dest_label
,
5269 redirect_edge_succ (BRANCH_EDGE (test_bb
), new_dest
);
5272 std::swap (BRANCH_EDGE (test_bb
)->count
,
5273 FALLTHRU_EDGE (test_bb
)->count
);
5274 std::swap (BRANCH_EDGE (test_bb
)->probability
,
5275 FALLTHRU_EDGE (test_bb
)->probability
);
5276 update_br_prob_note (test_bb
);
5280 /* Move the insns out of MERGE_BB to before the branch. */
5285 if (end
== BB_END (merge_bb
))
5286 BB_END (merge_bb
) = PREV_INSN (head
);
5288 /* PR 21767: when moving insns above a conditional branch, the REG_EQUAL
5289 notes being moved might become invalid. */
5295 if (! INSN_P (insn
))
5297 note
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
5300 remove_note (insn
, note
);
5301 } while (insn
!= end
&& (insn
= NEXT_INSN (insn
)));
5303 /* PR46315: when moving insns above a conditional branch, the REG_EQUAL
5304 notes referring to the registers being set might become invalid. */
5310 EXECUTE_IF_SET_IN_BITMAP (merge_set
, 0, i
, bi
)
5311 remove_reg_equal_equiv_notes_for_regno (i
);
5313 BITMAP_FREE (merge_set
);
5316 reorder_insns (head
, end
, PREV_INSN (earliest
));
5319 /* Remove the jump and edge if we can. */
5320 if (other_bb
== new_dest
)
5323 remove_edge (BRANCH_EDGE (test_bb
));
5324 /* ??? Can't merge blocks here, as then_bb is still in use.
5325 At minimum, the merge will get done just before bb-reorder. */
5334 BITMAP_FREE (merge_set
);
5339 /* Main entry point for all if-conversion. AFTER_COMBINE is true if
5340 we are after combine pass. */
5343 if_convert (bool after_combine
)
5350 df_live_add_problem ();
5351 df_live_set_all_dirty ();
5354 /* Record whether we are after combine pass. */
5355 ifcvt_after_combine
= after_combine
;
5356 have_cbranchcc4
= (direct_optab_handler (cbranch_optab
, CCmode
)
5357 != CODE_FOR_nothing
);
5358 num_possible_if_blocks
= 0;
5359 num_updated_if_blocks
= 0;
5360 num_true_changes
= 0;
5362 loop_optimizer_init (AVOID_CFG_MODIFICATIONS
);
5363 mark_loop_exit_edges ();
5364 loop_optimizer_finalize ();
5365 free_dominance_info (CDI_DOMINATORS
);
5367 /* Compute postdominators. */
5368 calculate_dominance_info (CDI_POST_DOMINATORS
);
5370 df_set_flags (DF_LR_RUN_DCE
);
5372 /* Go through each of the basic blocks looking for things to convert. If we
5373 have conditional execution, we make multiple passes to allow us to handle
5374 IF-THEN{-ELSE} blocks within other IF-THEN{-ELSE} blocks. */
5379 /* Only need to do dce on the first pass. */
5380 df_clear_flags (DF_LR_RUN_DCE
);
5381 cond_exec_changed_p
= FALSE
;
5384 #ifdef IFCVT_MULTIPLE_DUMPS
5385 if (dump_file
&& pass
> 1)
5386 fprintf (dump_file
, "\n\n========== Pass %d ==========\n", pass
);
5389 FOR_EACH_BB_FN (bb
, cfun
)
5392 while (!df_get_bb_dirty (bb
)
5393 && (new_bb
= find_if_header (bb
, pass
)) != NULL
)
5397 #ifdef IFCVT_MULTIPLE_DUMPS
5398 if (dump_file
&& cond_exec_changed_p
)
5399 print_rtl_with_bb (dump_file
, get_insns (), dump_flags
);
5402 while (cond_exec_changed_p
);
5404 #ifdef IFCVT_MULTIPLE_DUMPS
5406 fprintf (dump_file
, "\n\n========== no more changes\n");
5409 free_dominance_info (CDI_POST_DOMINATORS
);
5414 clear_aux_for_blocks ();
5416 /* If we allocated new pseudos, we must resize the array for sched1. */
5417 if (max_regno
< max_reg_num ())
5418 max_regno
= max_reg_num ();
5420 /* Write the final stats. */
5421 if (dump_file
&& num_possible_if_blocks
> 0)
5424 "\n%d possible IF blocks searched.\n",
5425 num_possible_if_blocks
);
5427 "%d IF blocks converted.\n",
5428 num_updated_if_blocks
);
5430 "%d true changes made.\n\n\n",
5435 df_remove_problem (df_live
);
5437 checking_verify_flow_info ();
5440 /* If-conversion and CFG cleanup. */
5442 rest_of_handle_if_conversion (void)
5444 if (flag_if_conversion
)
5448 dump_reg_info (dump_file
);
5449 dump_flow_info (dump_file
, dump_flags
);
5451 cleanup_cfg (CLEANUP_EXPENSIVE
);
5461 const pass_data pass_data_rtl_ifcvt
=
5463 RTL_PASS
, /* type */
5465 OPTGROUP_NONE
, /* optinfo_flags */
5466 TV_IFCVT
, /* tv_id */
5467 0, /* properties_required */
5468 0, /* properties_provided */
5469 0, /* properties_destroyed */
5470 0, /* todo_flags_start */
5471 TODO_df_finish
, /* todo_flags_finish */
5474 class pass_rtl_ifcvt
: public rtl_opt_pass
5477 pass_rtl_ifcvt (gcc::context
*ctxt
)
5478 : rtl_opt_pass (pass_data_rtl_ifcvt
, ctxt
)
5481 /* opt_pass methods: */
5482 virtual bool gate (function
*)
5484 return (optimize
> 0) && dbg_cnt (if_conversion
);
5487 virtual unsigned int execute (function
*)
5489 return rest_of_handle_if_conversion ();
5492 }; // class pass_rtl_ifcvt
5497 make_pass_rtl_ifcvt (gcc::context
*ctxt
)
5499 return new pass_rtl_ifcvt (ctxt
);
5503 /* Rerun if-conversion, as combine may have simplified things enough
5504 to now meet sequence length restrictions. */
5508 const pass_data pass_data_if_after_combine
=
5510 RTL_PASS
, /* type */
5512 OPTGROUP_NONE
, /* optinfo_flags */
5513 TV_IFCVT
, /* tv_id */
5514 0, /* properties_required */
5515 0, /* properties_provided */
5516 0, /* properties_destroyed */
5517 0, /* todo_flags_start */
5518 TODO_df_finish
, /* todo_flags_finish */
5521 class pass_if_after_combine
: public rtl_opt_pass
5524 pass_if_after_combine (gcc::context
*ctxt
)
5525 : rtl_opt_pass (pass_data_if_after_combine
, ctxt
)
5528 /* opt_pass methods: */
5529 virtual bool gate (function
*)
5531 return optimize
> 0 && flag_if_conversion
5532 && dbg_cnt (if_after_combine
);
5535 virtual unsigned int execute (function
*)
5541 }; // class pass_if_after_combine
5546 make_pass_if_after_combine (gcc::context
*ctxt
)
5548 return new pass_if_after_combine (ctxt
);
5554 const pass_data pass_data_if_after_reload
=
5556 RTL_PASS
, /* type */
5558 OPTGROUP_NONE
, /* optinfo_flags */
5559 TV_IFCVT2
, /* tv_id */
5560 0, /* properties_required */
5561 0, /* properties_provided */
5562 0, /* properties_destroyed */
5563 0, /* todo_flags_start */
5564 TODO_df_finish
, /* todo_flags_finish */
5567 class pass_if_after_reload
: public rtl_opt_pass
5570 pass_if_after_reload (gcc::context
*ctxt
)
5571 : rtl_opt_pass (pass_data_if_after_reload
, ctxt
)
5574 /* opt_pass methods: */
5575 virtual bool gate (function
*)
5577 return optimize
> 0 && flag_if_conversion2
5578 && dbg_cnt (if_after_reload
);
5581 virtual unsigned int execute (function
*)
5587 }; // class pass_if_after_reload
5592 make_pass_if_after_reload (gcc::context
*ctxt
)
5594 return new pass_if_after_reload (ctxt
);