1 /* IRA hard register and memory cost calculation for allocnos or pseudos.
2 Copyright (C) 2006, 2007, 2008, 2009, 2010, 2011
3 Free Software Foundation, Inc.
4 Contributed by Vladimir Makarov <vmakarov@redhat.com>.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
24 #include "coretypes.h"
26 #include "hard-reg-set.h"
31 #include "basic-block.h"
33 #include "addresses.h"
34 #include "insn-config.h"
37 #include "diagnostic-core.h"
42 /* The flags is set up every time when we calculate pseudo register
43 classes through function ira_set_pseudo_classes. */
44 static bool pseudo_classes_defined_p
= false;
46 /* TRUE if we work with allocnos. Otherwise we work with pseudos. */
47 static bool allocno_p
;
49 /* Number of elements in arrays `in_inc_dec' and `costs'. */
50 static int cost_elements_num
;
52 #ifdef FORBIDDEN_INC_DEC_CLASSES
53 /* Indexed by n, is TRUE if allocno or pseudo with number N is used in
54 an auto-inc or auto-dec context. */
55 static bool *in_inc_dec
;
58 /* The `costs' struct records the cost of using hard registers of each
59 class considered for the calculation and of using memory for each
64 /* Costs for register classes start here. We process only some
69 #define max_struct_costs_size \
70 (this_target_ira_int->x_max_struct_costs_size)
72 (this_target_ira_int->x_init_cost)
74 (this_target_ira_int->x_temp_costs)
76 (this_target_ira_int->x_op_costs)
77 #define this_op_costs \
78 (this_target_ira_int->x_this_op_costs)
80 /* Costs of each class for each allocno or pseudo. */
81 static struct costs
*costs
;
83 /* Accumulated costs of each class for each allocno. */
84 static struct costs
*total_allocno_costs
;
86 /* It is the current size of struct costs. */
87 static int struct_costs_size
;
89 /* Return pointer to structure containing costs of allocno or pseudo
90 with given NUM in array ARR. */
91 #define COSTS(arr, num) \
92 ((struct costs *) ((char *) (arr) + (num) * struct_costs_size))
94 /* Return index in COSTS when processing reg with REGNO. */
95 #define COST_INDEX(regno) (allocno_p \
96 ? ALLOCNO_NUM (ira_curr_regno_allocno_map[regno]) \
99 /* Record register class preferences of each allocno or pseudo. Null
100 value means no preferences. It happens on the 1st iteration of the
102 static enum reg_class
*pref
;
104 /* Allocated buffers for pref. */
105 static enum reg_class
*pref_buffer
;
107 /* Record allocno class of each allocno with the same regno. */
108 static enum reg_class
*regno_aclass
;
110 /* Record cost gains for not allocating a register with an invariant
112 static int *regno_equiv_gains
;
114 /* Execution frequency of the current insn. */
115 static int frequency
;
119 /* Info about reg classes whose costs are calculated for a pseudo. */
122 /* Number of the cost classes in the subsequent array. */
124 /* Container of the cost classes. */
125 enum reg_class classes
[N_REG_CLASSES
];
126 /* Map reg class -> index of the reg class in the previous array.
127 -1 if it is not a cost classe. */
128 int index
[N_REG_CLASSES
];
129 /* Map hard regno index of first class in array CLASSES containing
130 the hard regno, -1 otherwise. */
131 int hard_regno_index
[FIRST_PSEUDO_REGISTER
];
134 /* Types of pointers to the structure above. */
135 typedef struct cost_classes
*cost_classes_t
;
136 typedef const struct cost_classes
*const_cost_classes_t
;
138 /* Info about cost classes for each pseudo. */
139 static cost_classes_t
*regno_cost_classes
;
141 /* Returns hash value for cost classes info V. */
143 cost_classes_hash (const void *v
)
145 const_cost_classes_t hv
= (const_cost_classes_t
) v
;
147 return iterative_hash (&hv
->classes
, sizeof (enum reg_class
) * hv
->num
, 0);
150 /* Compares cost classes info V1 and V2. */
152 cost_classes_eq (const void *v1
, const void *v2
)
154 const_cost_classes_t hv1
= (const_cost_classes_t
) v1
;
155 const_cost_classes_t hv2
= (const_cost_classes_t
) v2
;
157 return hv1
->num
== hv2
->num
&& memcmp (hv1
->classes
, hv2
->classes
,
158 sizeof (enum reg_class
) * hv1
->num
);
161 /* Delete cost classes info V from the hash table. */
163 cost_classes_del (void *v
)
168 /* Hash table of unique cost classes. */
169 static htab_t cost_classes_htab
;
171 /* Map allocno class -> cost classes for pseudo of given allocno
173 static cost_classes_t cost_classes_aclass_cache
[N_REG_CLASSES
];
175 /* Map mode -> cost classes for pseudo of give mode. */
176 static cost_classes_t cost_classes_mode_cache
[MAX_MACHINE_MODE
];
178 /* Initialize info about the cost classes for each pseudo. */
180 initiate_regno_cost_classes (void)
182 int size
= sizeof (cost_classes_t
) * max_reg_num ();
184 regno_cost_classes
= (cost_classes_t
*) ira_allocate (size
);
185 memset (regno_cost_classes
, 0, size
);
186 memset (cost_classes_aclass_cache
, 0,
187 sizeof (cost_classes_t
) * N_REG_CLASSES
);
188 memset (cost_classes_mode_cache
, 0,
189 sizeof (cost_classes_t
) * MAX_MACHINE_MODE
);
191 = htab_create (200, cost_classes_hash
, cost_classes_eq
, cost_classes_del
);
194 /* Create new cost classes from cost classes FROM and set up members
195 index and hard_regno_index. Return the new classes. The function
196 implements some common code of two functions
197 setup_regno_cost_classes_by_aclass and
198 setup_regno_cost_classes_by_mode. */
199 static cost_classes_t
200 setup_cost_classes (cost_classes_t from
)
202 cost_classes_t classes_ptr
;
204 int i
, j
, hard_regno
;
206 classes_ptr
= (cost_classes_t
) ira_allocate (sizeof (struct cost_classes
));
207 classes_ptr
->num
= from
->num
;
208 for (i
= 0; i
< N_REG_CLASSES
; i
++)
209 classes_ptr
->index
[i
] = -1;
210 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
211 classes_ptr
->hard_regno_index
[i
] = -1;
212 for (i
= 0; i
< from
->num
; i
++)
214 cl
= classes_ptr
->classes
[i
] = from
->classes
[i
];
215 classes_ptr
->index
[cl
] = i
;
216 for (j
= ira_class_hard_regs_num
[cl
] - 1; j
>= 0; j
--)
218 hard_regno
= ira_class_hard_regs
[cl
][j
];
219 if (classes_ptr
->hard_regno_index
[hard_regno
] < 0)
220 classes_ptr
->hard_regno_index
[hard_regno
] = i
;
226 /* Setup cost classes for pseudo REGNO whose allocno class is ACLASS.
227 This function is used when we know an initial approximation of
228 allocno class of the pseudo already, e.g. on the second iteration
229 of class cost calculation or after class cost calculation in
230 register-pressure sensitive insn scheduling or register-pressure
231 sensitive loop-invariant motion. */
233 setup_regno_cost_classes_by_aclass (int regno
, enum reg_class aclass
)
235 static struct cost_classes classes
;
236 cost_classes_t classes_ptr
;
240 HARD_REG_SET temp
, temp2
;
242 if ((classes_ptr
= cost_classes_aclass_cache
[aclass
]) == NULL
)
244 COPY_HARD_REG_SET (temp
, reg_class_contents
[aclass
]);
245 AND_COMPL_HARD_REG_SET (temp
, ira_no_alloc_regs
);
247 for (i
= 0; i
< ira_important_classes_num
; i
++)
249 cl
= ira_important_classes
[i
];
250 COPY_HARD_REG_SET (temp2
, reg_class_contents
[cl
]);
251 AND_COMPL_HARD_REG_SET (temp2
, ira_no_alloc_regs
);
252 if (! ira_reg_pressure_class_p
[cl
]
253 && hard_reg_set_subset_p (temp2
, temp
) && cl
!= aclass
)
255 classes
.classes
[classes
.num
++] = cl
;
257 slot
= htab_find_slot (cost_classes_htab
, &classes
, INSERT
);
260 classes_ptr
= setup_cost_classes (&classes
);
263 classes_ptr
= cost_classes_aclass_cache
[aclass
] = (cost_classes_t
) *slot
;
265 regno_cost_classes
[regno
] = classes_ptr
;
268 /* Setup cost classes for pseudo REGNO with MODE. Usage of MODE can
269 decrease number of cost classes for the pseudo, if hard registers
270 of some important classes can not hold a value of MODE. So the
271 pseudo can not get hard register of some important classes and cost
272 calculation for such important classes is only waisting CPU
275 setup_regno_cost_classes_by_mode (int regno
, enum machine_mode mode
)
277 static struct cost_classes classes
;
278 cost_classes_t classes_ptr
;
284 if ((classes_ptr
= cost_classes_mode_cache
[mode
]) == NULL
)
287 for (i
= 0; i
< ira_important_classes_num
; i
++)
289 cl
= ira_important_classes
[i
];
290 COPY_HARD_REG_SET (temp
, ira_prohibited_class_mode_regs
[cl
][mode
]);
291 IOR_HARD_REG_SET (temp
, ira_no_alloc_regs
);
292 if (hard_reg_set_subset_p (reg_class_contents
[cl
], temp
))
294 classes
.classes
[classes
.num
++] = cl
;
296 slot
= htab_find_slot (cost_classes_htab
, &classes
, INSERT
);
299 classes_ptr
= setup_cost_classes (&classes
);
303 classes_ptr
= (cost_classes_t
) *slot
;
304 cost_classes_mode_cache
[mode
] = (cost_classes_t
) *slot
;
306 regno_cost_classes
[regno
] = classes_ptr
;
309 /* Finilize info about the cost classes for each pseudo. */
311 finish_regno_cost_classes (void)
313 ira_free (regno_cost_classes
);
314 htab_delete (cost_classes_htab
);
319 /* Compute the cost of loading X into (if TO_P is TRUE) or from (if
320 TO_P is FALSE) a register of class RCLASS in mode MODE. X must not
321 be a pseudo register. */
323 copy_cost (rtx x
, enum machine_mode mode
, reg_class_t rclass
, bool to_p
,
324 secondary_reload_info
*prev_sri
)
326 secondary_reload_info sri
;
327 reg_class_t secondary_class
= NO_REGS
;
329 /* If X is a SCRATCH, there is actually nothing to move since we are
330 assuming optimal allocation. */
331 if (GET_CODE (x
) == SCRATCH
)
334 /* Get the class we will actually use for a reload. */
335 rclass
= targetm
.preferred_reload_class (x
, rclass
);
337 /* If we need a secondary reload for an intermediate, the cost is
338 that to load the input into the intermediate register, then to
340 sri
.prev_sri
= prev_sri
;
342 secondary_class
= targetm
.secondary_reload (to_p
, x
, rclass
, mode
, &sri
);
344 if (secondary_class
!= NO_REGS
)
346 if (!move_cost
[mode
])
347 init_move_cost (mode
);
348 return (move_cost
[mode
][(int) secondary_class
][(int) rclass
]
350 + copy_cost (x
, mode
, secondary_class
, to_p
, &sri
));
353 /* For memory, use the memory move cost, for (hard) registers, use
354 the cost to move between the register classes, and use 2 for
355 everything else (constants). */
356 if (MEM_P (x
) || rclass
== NO_REGS
)
357 return sri
.extra_cost
358 + ira_memory_move_cost
[mode
][(int) rclass
][to_p
!= 0];
361 if (!move_cost
[mode
])
362 init_move_cost (mode
);
363 return (sri
.extra_cost
364 + move_cost
[mode
][REGNO_REG_CLASS (REGNO (x
))][(int) rclass
]);
367 /* If this is a constant, we may eventually want to call rtx_cost
369 return sri
.extra_cost
+ COSTS_N_INSNS (1);
374 /* Record the cost of using memory or hard registers of various
375 classes for the operands in INSN.
377 N_ALTS is the number of alternatives.
378 N_OPS is the number of operands.
379 OPS is an array of the operands.
380 MODES are the modes of the operands, in case any are VOIDmode.
381 CONSTRAINTS are the constraints to use for the operands. This array
382 is modified by this procedure.
384 This procedure works alternative by alternative. For each
385 alternative we assume that we will be able to allocate all allocnos
386 to their ideal register class and calculate the cost of using that
387 alternative. Then we compute, for each operand that is a
388 pseudo-register, the cost of having the allocno allocated to each
389 register class and using it in that alternative. To this cost is
390 added the cost of the alternative.
392 The cost of each class for this insn is its lowest cost among all
395 record_reg_classes (int n_alts
, int n_ops
, rtx
*ops
,
396 enum machine_mode
*modes
, const char **constraints
,
397 rtx insn
, enum reg_class
*pref
)
402 int insn_allows_mem
[MAX_RECOG_OPERANDS
];
404 for (i
= 0; i
< n_ops
; i
++)
405 insn_allows_mem
[i
] = 0;
407 /* Process each alternative, each time minimizing an operand's cost
408 with the cost for each operand in that alternative. */
409 for (alt
= 0; alt
< n_alts
; alt
++)
411 enum reg_class classes
[MAX_RECOG_OPERANDS
];
412 int allows_mem
[MAX_RECOG_OPERANDS
];
413 enum reg_class rclass
;
415 int alt_cost
= 0, op_cost_add
;
417 if (!recog_data
.alternative_enabled_p
[alt
])
419 for (i
= 0; i
< recog_data
.n_operands
; i
++)
420 constraints
[i
] = skip_alternative (constraints
[i
]);
425 for (i
= 0; i
< n_ops
; i
++)
428 const char *p
= constraints
[i
];
430 enum machine_mode mode
= modes
[i
];
434 /* Initially show we know nothing about the register class. */
435 classes
[i
] = NO_REGS
;
438 /* If this operand has no constraints at all, we can
439 conclude nothing about it since anything is valid. */
442 if (REG_P (op
) && REGNO (op
) >= FIRST_PSEUDO_REGISTER
)
443 memset (this_op_costs
[i
], 0, struct_costs_size
);
447 /* If this alternative is only relevant when this operand
448 matches a previous operand, we do different things
449 depending on whether this operand is a allocno-reg or not.
450 We must process any modifiers for the operand before we
451 can make this test. */
452 while (*p
== '%' || *p
== '=' || *p
== '+' || *p
== '&')
455 if (p
[0] >= '0' && p
[0] <= '0' + i
&& (p
[1] == ',' || p
[1] == 0))
457 /* Copy class and whether memory is allowed from the
458 matching alternative. Then perform any needed cost
459 computations and/or adjustments. */
461 classes
[i
] = classes
[j
];
462 allows_mem
[i
] = allows_mem
[j
];
464 insn_allows_mem
[i
] = 1;
466 if (! REG_P (op
) || REGNO (op
) < FIRST_PSEUDO_REGISTER
)
468 /* If this matches the other operand, we have no
469 added cost and we win. */
470 if (rtx_equal_p (ops
[j
], op
))
472 /* If we can put the other operand into a register,
473 add to the cost of this alternative the cost to
474 copy this operand to the register used for the
476 else if (classes
[j
] != NO_REGS
)
478 alt_cost
+= copy_cost (op
, mode
, classes
[j
], 1, NULL
);
482 else if (! REG_P (ops
[j
])
483 || REGNO (ops
[j
]) < FIRST_PSEUDO_REGISTER
)
485 /* This op is an allocno but the one it matches is
488 /* If we can't put the other operand into a
489 register, this alternative can't be used. */
491 if (classes
[j
] == NO_REGS
)
493 /* Otherwise, add to the cost of this alternative
494 the cost to copy the other operand to the hard
495 register used for this operand. */
497 alt_cost
+= copy_cost (ops
[j
], mode
, classes
[j
], 1, NULL
);
501 /* The costs of this operand are not the same as the
502 other operand since move costs are not symmetric.
503 Moreover, if we cannot tie them, this alternative
504 needs to do a copy, which is one insn. */
505 struct costs
*pp
= this_op_costs
[i
];
506 int *pp_costs
= pp
->cost
;
507 cost_classes_t cost_classes_ptr
508 = regno_cost_classes
[REGNO (op
)];
509 enum reg_class
*cost_classes
= cost_classes_ptr
->classes
;
510 bool in_p
= recog_data
.operand_type
[i
] != OP_OUT
;
511 bool out_p
= recog_data
.operand_type
[i
] != OP_IN
;
512 enum reg_class op_class
= classes
[i
];
513 move_table
*move_in_cost
, *move_out_cost
;
515 ira_init_register_move_cost_if_necessary (mode
);
519 move_out_cost
= ira_may_move_out_cost
[mode
];
520 for (k
= cost_classes_ptr
->num
- 1; k
>= 0; k
--)
522 rclass
= cost_classes
[k
];
524 = move_out_cost
[op_class
][rclass
] * frequency
;
530 move_in_cost
= ira_may_move_in_cost
[mode
];
531 for (k
= cost_classes_ptr
->num
- 1; k
>= 0; k
--)
533 rclass
= cost_classes
[k
];
535 = move_in_cost
[rclass
][op_class
] * frequency
;
540 move_in_cost
= ira_may_move_in_cost
[mode
];
541 move_out_cost
= ira_may_move_out_cost
[mode
];
542 for (k
= cost_classes_ptr
->num
- 1; k
>= 0; k
--)
544 rclass
= cost_classes
[k
];
545 pp_costs
[k
] = ((move_in_cost
[rclass
][op_class
]
546 + move_out_cost
[op_class
][rclass
])
551 /* If the alternative actually allows memory, make
552 things a bit cheaper since we won't need an extra
555 = ((out_p
? ira_memory_move_cost
[mode
][op_class
][0] : 0)
556 + (in_p
? ira_memory_move_cost
[mode
][op_class
][1] : 0)
557 - allows_mem
[i
]) * frequency
;
559 /* If we have assigned a class to this allocno in
560 our first pass, add a cost to this alternative
561 corresponding to what we would add if this
562 allocno were not in the appropriate class. */
565 enum reg_class pref_class
= pref
[COST_INDEX (REGNO (op
))];
567 if (pref_class
== NO_REGS
)
570 ? ira_memory_move_cost
[mode
][op_class
][0] : 0)
572 ? ira_memory_move_cost
[mode
][op_class
][1]
574 else if (ira_reg_class_intersect
575 [pref_class
][op_class
] == NO_REGS
)
577 += ira_register_move_cost
[mode
][pref_class
][op_class
];
579 if (REGNO (ops
[i
]) != REGNO (ops
[j
])
580 && ! find_reg_note (insn
, REG_DEAD
, op
))
583 /* This is in place of ordinary cost computation for
584 this operand, so skip to the end of the
585 alternative (should be just one character). */
586 while (*p
&& *p
++ != ',')
594 /* Scan all the constraint letters. See if the operand
595 matches any of the constraints. Collect the valid
596 register classes and see if this operand accepts
605 /* Ignore the next letter for this pass. */
611 case '!': case '#': case '&':
612 case '0': case '1': case '2': case '3': case '4':
613 case '5': case '6': case '7': case '8': case '9':
618 win
= address_operand (op
, GET_MODE (op
));
619 /* We know this operand is an address, so we want it
620 to be allocated to a register that can be the
621 base of an address, i.e. BASE_REG_CLASS. */
623 = ira_reg_class_subunion
[classes
[i
]]
624 [base_reg_class (VOIDmode
, ADDRESS
, SCRATCH
)];
627 case 'm': case 'o': case 'V':
628 /* It doesn't seem worth distinguishing between
629 offsettable and non-offsettable addresses
631 insn_allows_mem
[i
] = allows_mem
[i
] = 1;
638 && (GET_CODE (XEXP (op
, 0)) == PRE_DEC
639 || GET_CODE (XEXP (op
, 0)) == POST_DEC
))
645 && (GET_CODE (XEXP (op
, 0)) == PRE_INC
646 || GET_CODE (XEXP (op
, 0)) == POST_INC
))
652 if (GET_CODE (op
) == CONST_DOUBLE
653 || (GET_CODE (op
) == CONST_VECTOR
654 && (GET_MODE_CLASS (GET_MODE (op
))
655 == MODE_VECTOR_FLOAT
)))
661 if (GET_CODE (op
) == CONST_DOUBLE
662 && CONST_DOUBLE_OK_FOR_CONSTRAINT_P (op
, c
, p
))
668 || (GET_CODE (op
) == CONST_DOUBLE
669 && GET_MODE (op
) == VOIDmode
))
674 && (! flag_pic
|| LEGITIMATE_PIC_OPERAND_P (op
)))
680 || (GET_CODE (op
) == CONST_DOUBLE
681 && GET_MODE (op
) == VOIDmode
))
694 && CONST_OK_FOR_CONSTRAINT_P (INTVAL (op
), c
, p
))
705 && (! flag_pic
|| LEGITIMATE_PIC_OPERAND_P (op
))))
707 insn_allows_mem
[i
] = allows_mem
[i
] = 1;
709 classes
[i
] = ira_reg_class_subunion
[classes
[i
]][GENERAL_REGS
];
713 if (REG_CLASS_FROM_CONSTRAINT (c
, p
) != NO_REGS
)
714 classes
[i
] = ira_reg_class_subunion
[classes
[i
]]
715 [REG_CLASS_FROM_CONSTRAINT (c
, p
)];
716 #ifdef EXTRA_CONSTRAINT_STR
717 else if (EXTRA_CONSTRAINT_STR (op
, c
, p
))
720 if (EXTRA_MEMORY_CONSTRAINT (c
, p
))
722 /* Every MEM can be reloaded to fit. */
723 insn_allows_mem
[i
] = allows_mem
[i
] = 1;
727 if (EXTRA_ADDRESS_CONSTRAINT (c
, p
))
729 /* Every address can be reloaded to fit. */
731 if (address_operand (op
, GET_MODE (op
)))
733 /* We know this operand is an address, so we
734 want it to be allocated to a hard register
735 that can be the base of an address,
736 i.e. BASE_REG_CLASS. */
738 = ira_reg_class_subunion
[classes
[i
]]
739 [base_reg_class (VOIDmode
, ADDRESS
, SCRATCH
)];
744 p
+= CONSTRAINT_LEN (c
, p
);
751 /* How we account for this operand now depends on whether it
752 is a pseudo register or not. If it is, we first check if
753 any register classes are valid. If not, we ignore this
754 alternative, since we want to assume that all allocnos get
755 allocated for register preferencing. If some register
756 class is valid, compute the costs of moving the allocno
758 if (REG_P (op
) && REGNO (op
) >= FIRST_PSEUDO_REGISTER
)
760 if (classes
[i
] == NO_REGS
)
762 /* We must always fail if the operand is a REG, but
763 we did not find a suitable class.
765 Otherwise we may perform an uninitialized read
766 from this_op_costs after the `continue' statement
772 unsigned int regno
= REGNO (op
);
773 struct costs
*pp
= this_op_costs
[i
];
774 int *pp_costs
= pp
->cost
;
775 cost_classes_t cost_classes_ptr
= regno_cost_classes
[regno
];
776 enum reg_class
*cost_classes
= cost_classes_ptr
->classes
;
777 bool in_p
= recog_data
.operand_type
[i
] != OP_OUT
;
778 bool out_p
= recog_data
.operand_type
[i
] != OP_IN
;
779 enum reg_class op_class
= classes
[i
];
780 move_table
*move_in_cost
, *move_out_cost
;
782 ira_init_register_move_cost_if_necessary (mode
);
786 move_out_cost
= ira_may_move_out_cost
[mode
];
787 for (k
= cost_classes_ptr
->num
- 1; k
>= 0; k
--)
789 rclass
= cost_classes
[k
];
791 = move_out_cost
[op_class
][rclass
] * frequency
;
797 move_in_cost
= ira_may_move_in_cost
[mode
];
798 for (k
= cost_classes_ptr
->num
- 1; k
>= 0; k
--)
800 rclass
= cost_classes
[k
];
802 = move_in_cost
[rclass
][op_class
] * frequency
;
807 move_in_cost
= ira_may_move_in_cost
[mode
];
808 move_out_cost
= ira_may_move_out_cost
[mode
];
809 for (k
= cost_classes_ptr
->num
- 1; k
>= 0; k
--)
811 rclass
= cost_classes
[k
];
812 pp_costs
[k
] = ((move_in_cost
[rclass
][op_class
]
813 + move_out_cost
[op_class
][rclass
])
818 /* If the alternative actually allows memory, make
819 things a bit cheaper since we won't need an extra
822 = ((out_p
? ira_memory_move_cost
[mode
][op_class
][0] : 0)
823 + (in_p
? ira_memory_move_cost
[mode
][op_class
][1] : 0)
824 - allows_mem
[i
]) * frequency
;
825 /* If we have assigned a class to this allocno in
826 our first pass, add a cost to this alternative
827 corresponding to what we would add if this
828 allocno were not in the appropriate class. */
831 enum reg_class pref_class
= pref
[COST_INDEX (REGNO (op
))];
833 if (pref_class
== NO_REGS
)
836 ? ira_memory_move_cost
[mode
][op_class
][0] : 0)
838 ? ira_memory_move_cost
[mode
][op_class
][1]
840 else if (ira_reg_class_intersect
[pref_class
][op_class
]
842 alt_cost
+= ira_register_move_cost
[mode
][pref_class
][op_class
];
847 /* Otherwise, if this alternative wins, either because we
848 have already determined that or if we have a hard
849 register of the proper class, there is no cost for this
851 else if (win
|| (REG_P (op
)
852 && reg_fits_class_p (op
, classes
[i
],
856 /* If registers are valid, the cost of this alternative
857 includes copying the object to and/or from a
859 else if (classes
[i
] != NO_REGS
)
861 if (recog_data
.operand_type
[i
] != OP_OUT
)
862 alt_cost
+= copy_cost (op
, mode
, classes
[i
], 1, NULL
);
864 if (recog_data
.operand_type
[i
] != OP_IN
)
865 alt_cost
+= copy_cost (op
, mode
, classes
[i
], 0, NULL
);
867 /* The only other way this alternative can be used is if
868 this is a constant that could be placed into memory. */
869 else if (CONSTANT_P (op
) && (allows_addr
|| allows_mem
[i
]))
870 alt_cost
+= ira_memory_move_cost
[mode
][classes
[i
]][1];
878 op_cost_add
= alt_cost
* frequency
;
879 /* Finally, update the costs with the information we've
880 calculated about this alternative. */
881 for (i
= 0; i
< n_ops
; i
++)
882 if (REG_P (ops
[i
]) && REGNO (ops
[i
]) >= FIRST_PSEUDO_REGISTER
)
884 struct costs
*pp
= op_costs
[i
], *qq
= this_op_costs
[i
];
885 int *pp_costs
= pp
->cost
, *qq_costs
= qq
->cost
;
886 int scale
= 1 + (recog_data
.operand_type
[i
] == OP_INOUT
);
887 cost_classes_t cost_classes_ptr
888 = regno_cost_classes
[REGNO (ops
[i
])];
890 pp
->mem_cost
= MIN (pp
->mem_cost
,
891 (qq
->mem_cost
+ op_cost_add
) * scale
);
893 for (k
= cost_classes_ptr
->num
- 1; k
>= 0; k
--)
895 = MIN (pp_costs
[k
], (qq_costs
[k
] + op_cost_add
) * scale
);
900 for (i
= 0; i
< n_ops
; i
++)
905 if (! REG_P (op
) || REGNO (op
) < FIRST_PSEUDO_REGISTER
)
907 a
= ira_curr_regno_allocno_map
[REGNO (op
)];
908 if (! ALLOCNO_BAD_SPILL_P (a
) && insn_allows_mem
[i
] == 0)
909 ALLOCNO_BAD_SPILL_P (a
) = true;
912 /* If this insn is a single set copying operand 1 to operand 0 and
913 one operand is an allocno with the other a hard reg or an allocno
914 that prefers a hard register that is in its own register class
915 then we may want to adjust the cost of that register class to -1.
917 Avoid the adjustment if the source does not die to avoid
918 stressing of register allocator by preferrencing two colliding
919 registers into single class.
921 Also avoid the adjustment if a copy between hard registers of the
922 class is expensive (ten times the cost of a default copy is
923 considered arbitrarily expensive). This avoids losing when the
924 preferred class is very expensive as the source of a copy
926 if ((set
= single_set (insn
)) != 0
927 && ops
[0] == SET_DEST (set
) && ops
[1] == SET_SRC (set
)
928 && REG_P (ops
[0]) && REG_P (ops
[1])
929 && find_regno_note (insn
, REG_DEAD
, REGNO (ops
[1])))
930 for (i
= 0; i
<= 1; i
++)
931 if (REGNO (ops
[i
]) >= FIRST_PSEUDO_REGISTER
932 && REGNO (ops
[!i
]) < FIRST_PSEUDO_REGISTER
)
934 unsigned int regno
= REGNO (ops
[i
]);
935 unsigned int other_regno
= REGNO (ops
[!i
]);
936 enum machine_mode mode
= GET_MODE (ops
[!i
]);
937 cost_classes_t cost_classes_ptr
= regno_cost_classes
[regno
];
938 enum reg_class
*cost_classes
= cost_classes_ptr
->classes
;
939 enum reg_class rclass
;
942 for (k
= cost_classes_ptr
->num
- 1; k
>= 0; k
--)
944 rclass
= cost_classes
[k
];
945 if (TEST_HARD_REG_BIT (reg_class_contents
[rclass
], other_regno
)
946 && (reg_class_size
[rclass
]
947 == (unsigned) CLASS_MAX_NREGS (rclass
, mode
)))
949 if (reg_class_size
[rclass
] == 1)
950 op_costs
[i
]->cost
[k
] = -frequency
;
954 nr
< hard_regno_nregs
[other_regno
][mode
];
956 if (! TEST_HARD_REG_BIT (reg_class_contents
[rclass
],
960 if (nr
== hard_regno_nregs
[other_regno
][mode
])
961 op_costs
[i
]->cost
[k
] = -frequency
;
970 /* Wrapper around REGNO_OK_FOR_INDEX_P, to allow pseudo registers. */
972 ok_for_index_p_nonstrict (rtx reg
)
974 unsigned regno
= REGNO (reg
);
976 return regno
>= FIRST_PSEUDO_REGISTER
|| REGNO_OK_FOR_INDEX_P (regno
);
979 /* A version of regno_ok_for_base_p for use here, when all
980 pseudo-registers should count as OK. Arguments as for
981 regno_ok_for_base_p. */
983 ok_for_base_p_nonstrict (rtx reg
, enum machine_mode mode
,
984 enum rtx_code outer_code
, enum rtx_code index_code
)
986 unsigned regno
= REGNO (reg
);
988 if (regno
>= FIRST_PSEUDO_REGISTER
)
990 return ok_for_base_p_1 (regno
, mode
, outer_code
, index_code
);
993 /* Record the pseudo registers we must reload into hard registers in a
994 subexpression of a memory address, X.
996 If CONTEXT is 0, we are looking at the base part of an address,
997 otherwise we are looking at the index part.
999 MODE is the mode of the memory reference; OUTER_CODE and INDEX_CODE
1000 give the context that the rtx appears in. These three arguments
1001 are passed down to base_reg_class.
1003 SCALE is twice the amount to multiply the cost by (it is twice so
1004 we can represent half-cost adjustments). */
1006 record_address_regs (enum machine_mode mode
, rtx x
, int context
,
1007 enum rtx_code outer_code
, enum rtx_code index_code
,
1010 enum rtx_code code
= GET_CODE (x
);
1011 enum reg_class rclass
;
1014 rclass
= INDEX_REG_CLASS
;
1016 rclass
= base_reg_class (mode
, outer_code
, index_code
);
1029 /* When we have an address that is a sum, we must determine
1030 whether registers are "base" or "index" regs. If there is a
1031 sum of two registers, we must choose one to be the "base".
1032 Luckily, we can use the REG_POINTER to make a good choice
1033 most of the time. We only need to do this on machines that
1034 can have two registers in an address and where the base and
1035 index register classes are different.
1037 ??? This code used to set REGNO_POINTER_FLAG in some cases,
1038 but that seems bogus since it should only be set when we are
1039 sure the register is being used as a pointer. */
1041 rtx arg0
= XEXP (x
, 0);
1042 rtx arg1
= XEXP (x
, 1);
1043 enum rtx_code code0
= GET_CODE (arg0
);
1044 enum rtx_code code1
= GET_CODE (arg1
);
1046 /* Look inside subregs. */
1047 if (code0
== SUBREG
)
1048 arg0
= SUBREG_REG (arg0
), code0
= GET_CODE (arg0
);
1049 if (code1
== SUBREG
)
1050 arg1
= SUBREG_REG (arg1
), code1
= GET_CODE (arg1
);
1052 /* If this machine only allows one register per address, it
1053 must be in the first operand. */
1054 if (MAX_REGS_PER_ADDRESS
== 1)
1055 record_address_regs (mode
, arg0
, 0, PLUS
, code1
, scale
);
1057 /* If index and base registers are the same on this machine,
1058 just record registers in any non-constant operands. We
1059 assume here, as well as in the tests below, that all
1060 addresses are in canonical form. */
1061 else if (INDEX_REG_CLASS
== base_reg_class (VOIDmode
, PLUS
, SCRATCH
))
1063 record_address_regs (mode
, arg0
, context
, PLUS
, code1
, scale
);
1064 if (! CONSTANT_P (arg1
))
1065 record_address_regs (mode
, arg1
, context
, PLUS
, code0
, scale
);
1068 /* If the second operand is a constant integer, it doesn't
1069 change what class the first operand must be. */
1070 else if (code1
== CONST_INT
|| code1
== CONST_DOUBLE
)
1071 record_address_regs (mode
, arg0
, context
, PLUS
, code1
, scale
);
1072 /* If the second operand is a symbolic constant, the first
1073 operand must be an index register. */
1074 else if (code1
== SYMBOL_REF
|| code1
== CONST
|| code1
== LABEL_REF
)
1075 record_address_regs (mode
, arg0
, 1, PLUS
, code1
, scale
);
1076 /* If both operands are registers but one is already a hard
1077 register of index or reg-base class, give the other the
1078 class that the hard register is not. */
1079 else if (code0
== REG
&& code1
== REG
1080 && REGNO (arg0
) < FIRST_PSEUDO_REGISTER
1081 && (ok_for_base_p_nonstrict (arg0
, mode
, PLUS
, REG
)
1082 || ok_for_index_p_nonstrict (arg0
)))
1083 record_address_regs (mode
, arg1
,
1084 ok_for_base_p_nonstrict (arg0
, mode
, PLUS
, REG
)
1087 else if (code0
== REG
&& code1
== REG
1088 && REGNO (arg1
) < FIRST_PSEUDO_REGISTER
1089 && (ok_for_base_p_nonstrict (arg1
, mode
, PLUS
, REG
)
1090 || ok_for_index_p_nonstrict (arg1
)))
1091 record_address_regs (mode
, arg0
,
1092 ok_for_base_p_nonstrict (arg1
, mode
, PLUS
, REG
)
1095 /* If one operand is known to be a pointer, it must be the
1096 base with the other operand the index. Likewise if the
1097 other operand is a MULT. */
1098 else if ((code0
== REG
&& REG_POINTER (arg0
)) || code1
== MULT
)
1100 record_address_regs (mode
, arg0
, 0, PLUS
, code1
, scale
);
1101 record_address_regs (mode
, arg1
, 1, PLUS
, code0
, scale
);
1103 else if ((code1
== REG
&& REG_POINTER (arg1
)) || code0
== MULT
)
1105 record_address_regs (mode
, arg0
, 1, PLUS
, code1
, scale
);
1106 record_address_regs (mode
, arg1
, 0, PLUS
, code0
, scale
);
1108 /* Otherwise, count equal chances that each might be a base or
1109 index register. This case should be rare. */
1112 record_address_regs (mode
, arg0
, 0, PLUS
, code1
, scale
/ 2);
1113 record_address_regs (mode
, arg0
, 1, PLUS
, code1
, scale
/ 2);
1114 record_address_regs (mode
, arg1
, 0, PLUS
, code0
, scale
/ 2);
1115 record_address_regs (mode
, arg1
, 1, PLUS
, code0
, scale
/ 2);
1120 /* Double the importance of an allocno that is incremented or
1121 decremented, since it would take two extra insns if it ends
1122 up in the wrong place. */
1125 record_address_regs (mode
, XEXP (x
, 0), 0, code
,
1126 GET_CODE (XEXP (XEXP (x
, 1), 1)), 2 * scale
);
1127 if (REG_P (XEXP (XEXP (x
, 1), 1)))
1128 record_address_regs (mode
, XEXP (XEXP (x
, 1), 1), 1, code
, REG
,
1136 /* Double the importance of an allocno that is incremented or
1137 decremented, since it would take two extra insns if it ends
1138 up in the wrong place. If the operand is a pseudo-register,
1139 show it is being used in an INC_DEC context. */
1140 #ifdef FORBIDDEN_INC_DEC_CLASSES
1141 if (REG_P (XEXP (x
, 0))
1142 && REGNO (XEXP (x
, 0)) >= FIRST_PSEUDO_REGISTER
)
1143 in_inc_dec
[COST_INDEX (REGNO (XEXP (x
, 0)))] = true;
1145 record_address_regs (mode
, XEXP (x
, 0), 0, code
, SCRATCH
, 2 * scale
);
1153 int k
, regno
, add_cost
;
1154 cost_classes_t cost_classes_ptr
;
1155 enum reg_class
*cost_classes
;
1156 move_table
*move_in_cost
;
1158 if (REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1163 ALLOCNO_BAD_SPILL_P (ira_curr_regno_allocno_map
[regno
]) = true;
1164 pp
= COSTS (costs
, COST_INDEX (regno
));
1165 add_cost
= (ira_memory_move_cost
[Pmode
][rclass
][1] * scale
) / 2;
1166 if (INT_MAX
- add_cost
< pp
->mem_cost
)
1167 pp
->mem_cost
= INT_MAX
;
1169 pp
->mem_cost
+= add_cost
;
1170 cost_classes_ptr
= regno_cost_classes
[regno
];
1171 cost_classes
= cost_classes_ptr
->classes
;
1172 pp_costs
= pp
->cost
;
1173 ira_init_register_move_cost_if_necessary (Pmode
);
1174 move_in_cost
= ira_may_move_in_cost
[Pmode
];
1175 for (k
= cost_classes_ptr
->num
- 1; k
>= 0; k
--)
1177 i
= cost_classes
[k
];
1178 add_cost
= (move_in_cost
[i
][rclass
] * scale
) / 2;
1179 if (INT_MAX
- add_cost
< pp_costs
[k
])
1180 pp_costs
[k
] = INT_MAX
;
1182 pp_costs
[k
] += add_cost
;
1189 const char *fmt
= GET_RTX_FORMAT (code
);
1191 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1193 record_address_regs (mode
, XEXP (x
, i
), context
, code
, SCRATCH
,
1201 /* Calculate the costs of insn operands. */
1203 record_operand_costs (rtx insn
, enum reg_class
*pref
)
1205 const char *constraints
[MAX_RECOG_OPERANDS
];
1206 enum machine_mode modes
[MAX_RECOG_OPERANDS
];
1209 for (i
= 0; i
< recog_data
.n_operands
; i
++)
1211 constraints
[i
] = recog_data
.constraints
[i
];
1212 modes
[i
] = recog_data
.operand_mode
[i
];
1215 /* If we get here, we are set up to record the costs of all the
1216 operands for this insn. Start by initializing the costs. Then
1217 handle any address registers. Finally record the desired classes
1218 for any allocnos, doing it twice if some pair of operands are
1220 for (i
= 0; i
< recog_data
.n_operands
; i
++)
1222 memcpy (op_costs
[i
], init_cost
, struct_costs_size
);
1224 if (GET_CODE (recog_data
.operand
[i
]) == SUBREG
)
1225 recog_data
.operand
[i
] = SUBREG_REG (recog_data
.operand
[i
]);
1227 if (MEM_P (recog_data
.operand
[i
]))
1228 record_address_regs (GET_MODE (recog_data
.operand
[i
]),
1229 XEXP (recog_data
.operand
[i
], 0),
1230 0, MEM
, SCRATCH
, frequency
* 2);
1231 else if (constraints
[i
][0] == 'p'
1232 || EXTRA_ADDRESS_CONSTRAINT (constraints
[i
][0],
1234 record_address_regs (VOIDmode
, recog_data
.operand
[i
], 0, ADDRESS
,
1235 SCRATCH
, frequency
* 2);
1238 /* Check for commutative in a separate loop so everything will have
1239 been initialized. We must do this even if one operand is a
1240 constant--see addsi3 in m68k.md. */
1241 for (i
= 0; i
< (int) recog_data
.n_operands
- 1; i
++)
1242 if (constraints
[i
][0] == '%')
1244 const char *xconstraints
[MAX_RECOG_OPERANDS
];
1247 /* Handle commutative operands by swapping the constraints.
1248 We assume the modes are the same. */
1249 for (j
= 0; j
< recog_data
.n_operands
; j
++)
1250 xconstraints
[j
] = constraints
[j
];
1252 xconstraints
[i
] = constraints
[i
+1];
1253 xconstraints
[i
+1] = constraints
[i
];
1254 record_reg_classes (recog_data
.n_alternatives
, recog_data
.n_operands
,
1255 recog_data
.operand
, modes
,
1256 xconstraints
, insn
, pref
);
1258 record_reg_classes (recog_data
.n_alternatives
, recog_data
.n_operands
,
1259 recog_data
.operand
, modes
,
1260 constraints
, insn
, pref
);
1265 /* Process one insn INSN. Scan it and record each time it would save
1266 code to put a certain allocnos in a certain class. Return the last
1267 insn processed, so that the scan can be continued from there. */
1269 scan_one_insn (rtx insn
)
1271 enum rtx_code pat_code
;
1276 if (!NONDEBUG_INSN_P (insn
))
1279 pat_code
= GET_CODE (PATTERN (insn
));
1280 if (pat_code
== USE
|| pat_code
== CLOBBER
|| pat_code
== ASM_INPUT
1281 || pat_code
== ADDR_VEC
|| pat_code
== ADDR_DIFF_VEC
)
1284 counted_mem
= false;
1285 set
= single_set (insn
);
1286 extract_insn (insn
);
1288 /* If this insn loads a parameter from its stack slot, then it
1289 represents a savings, rather than a cost, if the parameter is
1290 stored in memory. Record this fact.
1292 Similarly if we're loading other constants from memory (constant
1293 pool, TOC references, small data areas, etc) and this is the only
1294 assignment to the destination pseudo. */
1295 if (set
!= 0 && REG_P (SET_DEST (set
)) && MEM_P (SET_SRC (set
))
1296 && (note
= find_reg_note (insn
, REG_EQUIV
, NULL_RTX
)) != NULL_RTX
1297 && ((MEM_P (XEXP (note
, 0)))
1298 || (CONSTANT_P (XEXP (note
, 0))
1299 && targetm
.legitimate_constant_p (GET_MODE (SET_DEST (set
)),
1301 && REG_N_SETS (REGNO (SET_DEST (set
))) == 1)))
1303 enum reg_class cl
= GENERAL_REGS
;
1304 rtx reg
= SET_DEST (set
);
1305 int num
= COST_INDEX (REGNO (reg
));
1307 COSTS (costs
, num
)->mem_cost
1308 -= ira_memory_move_cost
[GET_MODE (reg
)][cl
][1] * frequency
;
1309 record_address_regs (GET_MODE (SET_SRC (set
)), XEXP (SET_SRC (set
), 0),
1310 0, MEM
, SCRATCH
, frequency
* 2);
1314 record_operand_costs (insn
, pref
);
1316 /* Now add the cost for each operand to the total costs for its
1318 for (i
= 0; i
< recog_data
.n_operands
; i
++)
1319 if (REG_P (recog_data
.operand
[i
])
1320 && REGNO (recog_data
.operand
[i
]) >= FIRST_PSEUDO_REGISTER
)
1322 int regno
= REGNO (recog_data
.operand
[i
]);
1323 struct costs
*p
= COSTS (costs
, COST_INDEX (regno
));
1324 struct costs
*q
= op_costs
[i
];
1325 int *p_costs
= p
->cost
, *q_costs
= q
->cost
;
1326 cost_classes_t cost_classes_ptr
= regno_cost_classes
[regno
];
1329 /* If the already accounted for the memory "cost" above, don't
1333 add_cost
= q
->mem_cost
;
1334 if (add_cost
> 0 && INT_MAX
- add_cost
< p
->mem_cost
)
1335 p
->mem_cost
= INT_MAX
;
1337 p
->mem_cost
+= add_cost
;
1339 for (k
= cost_classes_ptr
->num
- 1; k
>= 0; k
--)
1341 add_cost
= q_costs
[k
];
1342 if (add_cost
> 0 && INT_MAX
- add_cost
< p_costs
[k
])
1343 p_costs
[k
] = INT_MAX
;
1345 p_costs
[k
] += add_cost
;
1354 /* Print allocnos costs to file F. */
1356 print_allocno_costs (FILE *f
)
1360 ira_allocno_iterator ai
;
1362 ira_assert (allocno_p
);
1364 FOR_EACH_ALLOCNO (a
, ai
)
1368 int regno
= ALLOCNO_REGNO (a
);
1369 cost_classes_t cost_classes_ptr
= regno_cost_classes
[regno
];
1370 enum reg_class
*cost_classes
= cost_classes_ptr
->classes
;
1372 i
= ALLOCNO_NUM (a
);
1373 fprintf (f
, " a%d(r%d,", i
, regno
);
1374 if ((bb
= ALLOCNO_LOOP_TREE_NODE (a
)->bb
) != NULL
)
1375 fprintf (f
, "b%d", bb
->index
);
1377 fprintf (f
, "l%d", ALLOCNO_LOOP_TREE_NODE (a
)->loop
->num
);
1378 fprintf (f
, ") costs:");
1379 for (k
= 0; k
< cost_classes_ptr
->num
; k
++)
1381 rclass
= cost_classes
[k
];
1382 if (contains_reg_of_mode
[rclass
][PSEUDO_REGNO_MODE (regno
)]
1383 #ifdef FORBIDDEN_INC_DEC_CLASSES
1384 && (! in_inc_dec
[i
] || ! forbidden_inc_dec_class
[rclass
])
1386 #ifdef CANNOT_CHANGE_MODE_CLASS
1387 && ! invalid_mode_change_p (regno
, (enum reg_class
) rclass
)
1391 fprintf (f
, " %s:%d", reg_class_names
[rclass
],
1392 COSTS (costs
, i
)->cost
[k
]);
1393 if (flag_ira_region
== IRA_REGION_ALL
1394 || flag_ira_region
== IRA_REGION_MIXED
)
1395 fprintf (f
, ",%d", COSTS (total_allocno_costs
, i
)->cost
[k
]);
1398 fprintf (f
, " MEM:%i", COSTS (costs
, i
)->mem_cost
);
1399 if (flag_ira_region
== IRA_REGION_ALL
1400 || flag_ira_region
== IRA_REGION_MIXED
)
1401 fprintf (f
, ",%d", COSTS (total_allocno_costs
, i
)->mem_cost
);
1406 /* Print pseudo costs to file F. */
1408 print_pseudo_costs (FILE *f
)
1412 cost_classes_t cost_classes_ptr
;
1413 enum reg_class
*cost_classes
;
1415 ira_assert (! allocno_p
);
1417 for (regno
= max_reg_num () - 1; regno
>= FIRST_PSEUDO_REGISTER
; regno
--)
1419 if (REG_N_REFS (regno
) <= 0)
1421 cost_classes_ptr
= regno_cost_classes
[regno
];
1422 cost_classes
= cost_classes_ptr
->classes
;
1423 fprintf (f
, " r%d costs:", regno
);
1424 for (k
= 0; k
< cost_classes_ptr
->num
; k
++)
1426 rclass
= cost_classes
[k
];
1427 if (contains_reg_of_mode
[rclass
][PSEUDO_REGNO_MODE (regno
)]
1428 #ifdef FORBIDDEN_INC_DEC_CLASSES
1429 && (! in_inc_dec
[regno
] || ! forbidden_inc_dec_class
[rclass
])
1431 #ifdef CANNOT_CHANGE_MODE_CLASS
1432 && ! invalid_mode_change_p (regno
, (enum reg_class
) rclass
)
1435 fprintf (f
, " %s:%d", reg_class_names
[rclass
],
1436 COSTS (costs
, regno
)->cost
[k
]);
1438 fprintf (f
, " MEM:%i\n", COSTS (costs
, regno
)->mem_cost
);
1442 /* Traverse the BB represented by LOOP_TREE_NODE to update the allocno
1445 process_bb_for_costs (basic_block bb
)
1449 frequency
= REG_FREQ_FROM_BB (bb
);
1452 FOR_BB_INSNS (bb
, insn
)
1453 insn
= scan_one_insn (insn
);
1456 /* Traverse the BB represented by LOOP_TREE_NODE to update the allocno
1459 process_bb_node_for_costs (ira_loop_tree_node_t loop_tree_node
)
1463 bb
= loop_tree_node
->bb
;
1465 process_bb_for_costs (bb
);
1468 /* Find costs of register classes and memory for allocnos or pseudos
1469 and their best costs. Set up preferred, alternative and allocno
1470 classes for pseudos. */
1472 find_costs_and_classes (FILE *dump_file
)
1474 int i
, k
, start
, max_cost_classes_num
;
1477 enum reg_class
*regno_best_class
;
1480 #ifdef FORBIDDEN_INC_DEC_CLASSES
1481 in_inc_dec
= ira_allocate (sizeof (bool) * cost_elements_num
);
1482 #endif /* FORBIDDEN_INC_DEC_CLASSES */
1484 = (enum reg_class
*) ira_allocate (max_reg_num ()
1485 * sizeof (enum reg_class
));
1486 for (i
= max_reg_num () - 1; i
>= FIRST_PSEUDO_REGISTER
; i
--)
1487 regno_best_class
[i
] = NO_REGS
;
1488 if (!resize_reg_info () && allocno_p
1489 && pseudo_classes_defined_p
&& flag_expensive_optimizations
)
1492 ira_allocno_iterator ai
;
1495 max_cost_classes_num
= 1;
1496 FOR_EACH_ALLOCNO (a
, ai
)
1498 pref
[ALLOCNO_NUM (a
)] = reg_preferred_class (ALLOCNO_REGNO (a
));
1499 setup_regno_cost_classes_by_aclass
1500 (ALLOCNO_REGNO (a
), pref
[ALLOCNO_NUM (a
)]);
1501 max_cost_classes_num
1502 = MAX (max_cost_classes_num
,
1503 regno_cost_classes
[ALLOCNO_REGNO (a
)]->num
);
1510 max_cost_classes_num
= ira_important_classes_num
;
1511 for (i
= max_reg_num () - 1; i
>= FIRST_PSEUDO_REGISTER
; i
--)
1512 if (regno_reg_rtx
[i
] != NULL_RTX
)
1513 setup_regno_cost_classes_by_mode (i
, PSEUDO_REGNO_MODE (i
));
1515 setup_regno_cost_classes_by_aclass (i
, ALL_REGS
);
1519 /* Clear the flag for the next compiled function. */
1520 pseudo_classes_defined_p
= false;
1521 /* Normally we scan the insns once and determine the best class to
1522 use for each allocno. However, if -fexpensive-optimizations are
1523 on, we do so twice, the second time using the tentative best
1524 classes to guide the selection. */
1525 for (pass
= start
; pass
<= flag_expensive_optimizations
; pass
++)
1527 if ((!allocno_p
|| internal_flag_ira_verbose
> 0) && dump_file
)
1529 "\nPass %i for finding pseudo/allocno costs\n\n", pass
);
1533 max_cost_classes_num
= 1;
1534 for (i
= max_reg_num () - 1; i
>= FIRST_PSEUDO_REGISTER
; i
--)
1536 setup_regno_cost_classes_by_aclass (i
, regno_best_class
[i
]);
1537 max_cost_classes_num
1538 = MAX (max_cost_classes_num
, regno_cost_classes
[i
]->num
);
1543 = sizeof (struct costs
) + sizeof (int) * (max_cost_classes_num
- 1);
1544 /* Zero out our accumulation of the cost of each class for each
1546 memset (costs
, 0, cost_elements_num
* struct_costs_size
);
1547 #ifdef FORBIDDEN_INC_DEC_CLASSES
1548 memset (in_inc_dec
, 0, cost_elements_num
* sizeof (bool));
1553 /* Scan the instructions and record each time it would save code
1554 to put a certain allocno in a certain class. */
1555 ira_traverse_loop_tree (true, ira_loop_tree_root
,
1556 process_bb_node_for_costs
, NULL
);
1558 memcpy (total_allocno_costs
, costs
,
1559 max_struct_costs_size
* ira_allocnos_num
);
1566 process_bb_for_costs (bb
);
1572 /* Now for each allocno look at how desirable each class is and
1573 find which class is preferred. */
1574 for (i
= max_reg_num () - 1; i
>= FIRST_PSEUDO_REGISTER
; i
--)
1576 ira_allocno_t a
, parent_a
;
1577 int rclass
, a_num
, parent_a_num
, add_cost
;
1578 ira_loop_tree_node_t parent
;
1579 int best_cost
, allocno_cost
;
1580 enum reg_class best
, alt_class
;
1581 #ifdef FORBIDDEN_INC_DEC_CLASSES
1582 int inc_dec_p
= false;
1584 cost_classes_t cost_classes_ptr
= regno_cost_classes
[i
];
1585 enum reg_class
*cost_classes
= cost_classes_ptr
->classes
;
1586 int *i_costs
= temp_costs
->cost
;
1588 int equiv_savings
= regno_equiv_gains
[i
];
1592 if (regno_reg_rtx
[i
] == NULL_RTX
)
1594 #ifdef FORBIDDEN_INC_DEC_CLASSES
1595 inc_dec_p
= in_inc_dec
[i
];
1597 memcpy (temp_costs
, COSTS (costs
, i
), struct_costs_size
);
1598 i_mem_cost
= temp_costs
->mem_cost
;
1602 if (ira_regno_allocno_map
[i
] == NULL
)
1604 memset (temp_costs
, 0, struct_costs_size
);
1606 /* Find cost of all allocnos with the same regno. */
1607 for (a
= ira_regno_allocno_map
[i
];
1609 a
= ALLOCNO_NEXT_REGNO_ALLOCNO (a
))
1611 int *a_costs
, *p_costs
;
1613 a_num
= ALLOCNO_NUM (a
);
1614 if ((flag_ira_region
== IRA_REGION_ALL
1615 || flag_ira_region
== IRA_REGION_MIXED
)
1616 && (parent
= ALLOCNO_LOOP_TREE_NODE (a
)->parent
) != NULL
1617 && (parent_a
= parent
->regno_allocno_map
[i
]) != NULL
1618 /* There are no caps yet. */
1619 && bitmap_bit_p (ALLOCNO_LOOP_TREE_NODE
1620 (a
)->border_allocnos
,
1623 /* Propagate costs to upper levels in the region
1625 parent_a_num
= ALLOCNO_NUM (parent_a
);
1626 a_costs
= COSTS (total_allocno_costs
, a_num
)->cost
;
1627 p_costs
= COSTS (total_allocno_costs
, parent_a_num
)->cost
;
1628 for (k
= cost_classes_ptr
->num
- 1; k
>= 0; k
--)
1630 add_cost
= a_costs
[k
];
1631 if (add_cost
> 0 && INT_MAX
- add_cost
< p_costs
[k
])
1632 p_costs
[k
] = INT_MAX
;
1634 p_costs
[k
] += add_cost
;
1636 add_cost
= COSTS (total_allocno_costs
, a_num
)->mem_cost
;
1638 && (INT_MAX
- add_cost
1639 < COSTS (total_allocno_costs
,
1640 parent_a_num
)->mem_cost
))
1641 COSTS (total_allocno_costs
, parent_a_num
)->mem_cost
1644 COSTS (total_allocno_costs
, parent_a_num
)->mem_cost
1648 a_costs
= COSTS (costs
, a_num
)->cost
;
1649 for (k
= cost_classes_ptr
->num
- 1; k
>= 0; k
--)
1651 add_cost
= a_costs
[k
];
1652 if (add_cost
> 0 && INT_MAX
- add_cost
< i_costs
[k
])
1653 i_costs
[k
] = INT_MAX
;
1655 i_costs
[k
] += add_cost
;
1657 add_cost
= COSTS (costs
, a_num
)->mem_cost
;
1658 if (add_cost
> 0 && INT_MAX
- add_cost
< i_mem_cost
)
1659 i_mem_cost
= INT_MAX
;
1661 i_mem_cost
+= add_cost
;
1662 #ifdef FORBIDDEN_INC_DEC_CLASSES
1663 if (in_inc_dec
[a_num
])
1668 if (equiv_savings
< 0)
1669 i_mem_cost
= -equiv_savings
;
1670 else if (equiv_savings
> 0)
1673 for (k
= cost_classes_ptr
->num
- 1; k
>= 0; k
--)
1674 i_costs
[k
] += equiv_savings
;
1677 best_cost
= (1 << (HOST_BITS_PER_INT
- 2)) - 1;
1679 alt_class
= NO_REGS
;
1680 /* Find best common class for all allocnos with the same
1682 for (k
= 0; k
< cost_classes_ptr
->num
; k
++)
1684 rclass
= cost_classes
[k
];
1685 /* Ignore classes that are too small for this operand or
1686 invalid for an operand that was auto-incremented. */
1687 if (! contains_reg_of_mode
[rclass
][PSEUDO_REGNO_MODE (i
)]
1688 #ifdef FORBIDDEN_INC_DEC_CLASSES
1689 || (inc_dec_p
&& forbidden_inc_dec_class
[rclass
])
1691 #ifdef CANNOT_CHANGE_MODE_CLASS
1692 || invalid_mode_change_p (i
, (enum reg_class
) rclass
)
1696 if (i_costs
[k
] < best_cost
)
1698 best_cost
= i_costs
[k
];
1699 best
= (enum reg_class
) rclass
;
1701 else if (i_costs
[k
] == best_cost
)
1702 best
= ira_reg_class_subunion
[best
][rclass
];
1703 if (pass
== flag_expensive_optimizations
1704 && i_costs
[k
] < i_mem_cost
1705 && (reg_class_size
[reg_class_subunion
[alt_class
][rclass
]]
1706 > reg_class_size
[alt_class
]))
1707 alt_class
= reg_class_subunion
[alt_class
][rclass
];
1709 alt_class
= ira_allocno_class_translate
[alt_class
];
1710 if (best_cost
> i_mem_cost
)
1711 regno_aclass
[i
] = NO_REGS
;
1714 /* Make the common class the biggest class of best and
1717 = ira_reg_class_superunion
[best
][alt_class
];
1718 ira_assert (regno_aclass
[i
] != NO_REGS
1719 && ira_reg_allocno_class_p
[regno_aclass
[i
]]);
1721 if (pass
== flag_expensive_optimizations
)
1723 if (best_cost
> i_mem_cost
)
1724 best
= alt_class
= NO_REGS
;
1725 else if (best
== alt_class
)
1726 alt_class
= NO_REGS
;
1727 setup_reg_classes (i
, best
, alt_class
, regno_aclass
[i
]);
1728 if ((!allocno_p
|| internal_flag_ira_verbose
> 2)
1729 && dump_file
!= NULL
)
1731 " r%d: preferred %s, alternative %s, allocno %s\n",
1732 i
, reg_class_names
[best
], reg_class_names
[alt_class
],
1733 reg_class_names
[regno_aclass
[i
]]);
1735 regno_best_class
[i
] = best
;
1738 pref
[i
] = best_cost
> i_mem_cost
? NO_REGS
: best
;
1741 for (a
= ira_regno_allocno_map
[i
];
1743 a
= ALLOCNO_NEXT_REGNO_ALLOCNO (a
))
1745 a_num
= ALLOCNO_NUM (a
);
1746 if (regno_aclass
[i
] == NO_REGS
)
1750 int *total_a_costs
= COSTS (total_allocno_costs
, a_num
)->cost
;
1751 int *a_costs
= COSTS (costs
, a_num
)->cost
;
1753 /* Finding best class which is subset of the common
1755 best_cost
= (1 << (HOST_BITS_PER_INT
- 2)) - 1;
1756 allocno_cost
= best_cost
;
1758 for (k
= 0; k
< cost_classes_ptr
->num
; k
++)
1760 rclass
= cost_classes
[k
];
1761 if (! ira_class_subset_p
[rclass
][regno_aclass
[i
]])
1763 /* Ignore classes that are too small for this
1764 operand or invalid for an operand that was
1765 auto-incremented. */
1766 if (! contains_reg_of_mode
[rclass
][PSEUDO_REGNO_MODE (i
)]
1767 #ifdef FORBIDDEN_INC_DEC_CLASSES
1768 || (inc_dec_p
&& forbidden_inc_dec_class
[rclass
])
1770 #ifdef CANNOT_CHANGE_MODE_CLASS
1771 || invalid_mode_change_p (i
, (enum reg_class
) rclass
)
1775 else if (total_a_costs
[k
] < best_cost
)
1777 best_cost
= total_a_costs
[k
];
1778 allocno_cost
= a_costs
[k
];
1779 best
= (enum reg_class
) rclass
;
1781 else if (total_a_costs
[k
] == best_cost
)
1783 best
= ira_reg_class_subunion
[best
][rclass
];
1784 allocno_cost
= MAX (allocno_cost
, a_costs
[k
]);
1787 ALLOCNO_CLASS_COST (a
) = allocno_cost
;
1789 if (internal_flag_ira_verbose
> 2 && dump_file
!= NULL
1790 && (pass
== 0 || pref
[a_num
] != best
))
1792 fprintf (dump_file
, " a%d (r%d,", a_num
, i
);
1793 if ((bb
= ALLOCNO_LOOP_TREE_NODE (a
)->bb
) != NULL
)
1794 fprintf (dump_file
, "b%d", bb
->index
);
1796 fprintf (dump_file
, "l%d",
1797 ALLOCNO_LOOP_TREE_NODE (a
)->loop
->num
);
1798 fprintf (dump_file
, ") best %s, allocno %s\n",
1799 reg_class_names
[best
],
1800 reg_class_names
[regno_aclass
[i
]]);
1806 if (internal_flag_ira_verbose
> 4 && dump_file
)
1809 print_allocno_costs (dump_file
);
1811 print_pseudo_costs (dump_file
);
1812 fprintf (dump_file
,"\n");
1815 ira_free (regno_best_class
);
1816 #ifdef FORBIDDEN_INC_DEC_CLASSES
1817 ira_free (in_inc_dec
);
1823 /* Process moves involving hard regs to modify allocno hard register
1824 costs. We can do this only after determining allocno class. If a
1825 hard register forms a register class, than moves with the hard
1826 register are already taken into account in class costs for the
1829 process_bb_node_for_hard_reg_moves (ira_loop_tree_node_t loop_tree_node
)
1831 int i
, freq
, cost
, src_regno
, dst_regno
, hard_regno
;
1834 enum reg_class rclass
, hard_reg_class
;
1835 enum machine_mode mode
;
1837 rtx insn
, set
, src
, dst
;
1839 bb
= loop_tree_node
->bb
;
1842 freq
= REG_FREQ_FROM_BB (bb
);
1845 FOR_BB_INSNS (bb
, insn
)
1847 if (!NONDEBUG_INSN_P (insn
))
1849 set
= single_set (insn
);
1850 if (set
== NULL_RTX
)
1852 dst
= SET_DEST (set
);
1853 src
= SET_SRC (set
);
1854 if (! REG_P (dst
) || ! REG_P (src
))
1856 dst_regno
= REGNO (dst
);
1857 src_regno
= REGNO (src
);
1858 if (dst_regno
>= FIRST_PSEUDO_REGISTER
1859 && src_regno
< FIRST_PSEUDO_REGISTER
)
1861 hard_regno
= src_regno
;
1863 a
= ira_curr_regno_allocno_map
[dst_regno
];
1865 else if (src_regno
>= FIRST_PSEUDO_REGISTER
1866 && dst_regno
< FIRST_PSEUDO_REGISTER
)
1868 hard_regno
= dst_regno
;
1870 a
= ira_curr_regno_allocno_map
[src_regno
];
1874 rclass
= ALLOCNO_CLASS (a
);
1875 if (! TEST_HARD_REG_BIT (reg_class_contents
[rclass
], hard_regno
))
1877 i
= ira_class_hard_reg_index
[rclass
][hard_regno
];
1880 mode
= ALLOCNO_MODE (a
);
1881 hard_reg_class
= REGNO_REG_CLASS (hard_regno
);
1882 ira_init_register_move_cost_if_necessary (mode
);
1884 = (to_p
? ira_register_move_cost
[mode
][hard_reg_class
][rclass
]
1885 : ira_register_move_cost
[mode
][rclass
][hard_reg_class
]) * freq
;
1886 ira_allocate_and_set_costs (&ALLOCNO_HARD_REG_COSTS (a
), rclass
,
1887 ALLOCNO_CLASS_COST (a
));
1888 ira_allocate_and_set_costs (&ALLOCNO_CONFLICT_HARD_REG_COSTS (a
),
1890 ALLOCNO_HARD_REG_COSTS (a
)[i
] -= cost
;
1891 ALLOCNO_CONFLICT_HARD_REG_COSTS (a
)[i
] -= cost
;
1892 ALLOCNO_CLASS_COST (a
) = MIN (ALLOCNO_CLASS_COST (a
),
1893 ALLOCNO_HARD_REG_COSTS (a
)[i
]);
1897 /* After we find hard register and memory costs for allocnos, define
1898 its class and modify hard register cost because insns moving
1899 allocno to/from hard registers. */
1901 setup_allocno_class_and_costs (void)
1903 int i
, j
, n
, regno
, hard_regno
, num
;
1905 enum reg_class aclass
, rclass
;
1907 ira_allocno_iterator ai
;
1908 cost_classes_t cost_classes_ptr
;
1910 ira_assert (allocno_p
);
1911 FOR_EACH_ALLOCNO (a
, ai
)
1913 i
= ALLOCNO_NUM (a
);
1914 regno
= ALLOCNO_REGNO (a
);
1915 aclass
= regno_aclass
[regno
];
1916 cost_classes_ptr
= regno_cost_classes
[regno
];
1917 ira_assert (pref
[i
] == NO_REGS
|| aclass
!= NO_REGS
);
1918 ALLOCNO_MEMORY_COST (a
) = COSTS (costs
, i
)->mem_cost
;
1919 ira_set_allocno_class (a
, aclass
);
1920 if (aclass
== NO_REGS
)
1922 if (optimize
&& ALLOCNO_CLASS (a
) != pref
[i
])
1924 n
= ira_class_hard_regs_num
[aclass
];
1925 ALLOCNO_HARD_REG_COSTS (a
)
1926 = reg_costs
= ira_allocate_cost_vector (aclass
);
1927 for (j
= n
- 1; j
>= 0; j
--)
1929 hard_regno
= ira_class_hard_regs
[aclass
][j
];
1930 if (TEST_HARD_REG_BIT (reg_class_contents
[pref
[i
]], hard_regno
))
1931 reg_costs
[j
] = ALLOCNO_CLASS_COST (a
);
1934 rclass
= REGNO_REG_CLASS (hard_regno
);
1935 num
= cost_classes_ptr
->index
[rclass
];
1938 num
= cost_classes_ptr
->hard_regno_index
[hard_regno
];
1939 ira_assert (num
>= 0);
1941 reg_costs
[j
] = COSTS (costs
, i
)->cost
[num
];
1947 ira_traverse_loop_tree (true, ira_loop_tree_root
,
1948 process_bb_node_for_hard_reg_moves
, NULL
);
1953 /* Function called once during compiler work. */
1955 ira_init_costs_once (void)
1960 for (i
= 0; i
< MAX_RECOG_OPERANDS
; i
++)
1963 this_op_costs
[i
] = NULL
;
1968 /* Free allocated temporary cost vectors. */
1970 free_ira_costs (void)
1976 for (i
= 0; i
< MAX_RECOG_OPERANDS
; i
++)
1979 free (this_op_costs
[i
]);
1980 op_costs
[i
] = this_op_costs
[i
] = NULL
;
1986 /* This is called each time register related information is
1989 ira_init_costs (void)
1994 max_struct_costs_size
1995 = sizeof (struct costs
) + sizeof (int) * (ira_important_classes_num
- 1);
1996 /* Don't use ira_allocate because vectors live through several IRA
1998 init_cost
= (struct costs
*) xmalloc (max_struct_costs_size
);
1999 init_cost
->mem_cost
= 1000000;
2000 for (i
= 0; i
< ira_important_classes_num
; i
++)
2001 init_cost
->cost
[i
] = 1000000;
2002 for (i
= 0; i
< MAX_RECOG_OPERANDS
; i
++)
2004 op_costs
[i
] = (struct costs
*) xmalloc (max_struct_costs_size
);
2005 this_op_costs
[i
] = (struct costs
*) xmalloc (max_struct_costs_size
);
2007 temp_costs
= (struct costs
*) xmalloc (max_struct_costs_size
);
2010 /* Function called once at the end of compiler work. */
2012 ira_finish_costs_once (void)
2019 /* Common initialization function for ira_costs and
2020 ira_set_pseudo_classes. */
2024 init_subregs_of_mode ();
2025 costs
= (struct costs
*) ira_allocate (max_struct_costs_size
2026 * cost_elements_num
);
2027 pref_buffer
= (enum reg_class
*) ira_allocate (sizeof (enum reg_class
)
2028 * cost_elements_num
);
2029 regno_aclass
= (enum reg_class
*) ira_allocate (sizeof (enum reg_class
)
2031 regno_equiv_gains
= (int *) ira_allocate (sizeof (int) * max_reg_num ());
2032 memset (regno_equiv_gains
, 0, sizeof (int) * max_reg_num ());
2035 /* Common finalization function for ira_costs and
2036 ira_set_pseudo_classes. */
2040 finish_subregs_of_mode ();
2041 ira_free (regno_equiv_gains
);
2042 ira_free (regno_aclass
);
2043 ira_free (pref_buffer
);
2047 /* Entry function which defines register class, memory and hard
2048 register costs for each allocno. */
2053 cost_elements_num
= ira_allocnos_num
;
2055 total_allocno_costs
= (struct costs
*) ira_allocate (max_struct_costs_size
2056 * ira_allocnos_num
);
2057 initiate_regno_cost_classes ();
2058 calculate_elim_costs_all_insns ();
2059 find_costs_and_classes (ira_dump_file
);
2060 setup_allocno_class_and_costs ();
2061 finish_regno_cost_classes ();
2063 ira_free (total_allocno_costs
);
2066 /* Entry function which defines classes for pseudos. */
2068 ira_set_pseudo_classes (FILE *dump_file
)
2071 internal_flag_ira_verbose
= flag_ira_verbose
;
2072 cost_elements_num
= max_reg_num ();
2074 initiate_regno_cost_classes ();
2075 find_costs_and_classes (dump_file
);
2076 finish_regno_cost_classes ();
2077 pseudo_classes_defined_p
= true;
2083 /* Change hard register costs for allocnos which lives through
2084 function calls. This is called only when we found all intersected
2085 calls during building allocno live ranges. */
2087 ira_tune_allocno_costs (void)
2090 int cost
, min_cost
, *reg_costs
;
2091 enum reg_class aclass
, rclass
;
2092 enum machine_mode mode
;
2094 ira_allocno_iterator ai
;
2095 ira_allocno_object_iterator oi
;
2099 FOR_EACH_ALLOCNO (a
, ai
)
2101 aclass
= ALLOCNO_CLASS (a
);
2102 if (aclass
== NO_REGS
)
2104 mode
= ALLOCNO_MODE (a
);
2105 n
= ira_class_hard_regs_num
[aclass
];
2107 if (ALLOCNO_CALLS_CROSSED_NUM (a
) != 0)
2109 ira_allocate_and_set_costs
2110 (&ALLOCNO_HARD_REG_COSTS (a
), aclass
,
2111 ALLOCNO_CLASS_COST (a
));
2112 reg_costs
= ALLOCNO_HARD_REG_COSTS (a
);
2113 for (j
= n
- 1; j
>= 0; j
--)
2115 regno
= ira_class_hard_regs
[aclass
][j
];
2117 FOR_EACH_ALLOCNO_OBJECT (a
, obj
, oi
)
2119 if (! ira_hard_reg_not_in_set_p (regno
, mode
,
2120 OBJECT_CONFLICT_HARD_REGS
2129 rclass
= REGNO_REG_CLASS (regno
);
2131 if (! ira_hard_reg_not_in_set_p (regno
, mode
, call_used_reg_set
)
2132 || HARD_REGNO_CALL_PART_CLOBBERED (regno
, mode
))
2133 cost
+= (ALLOCNO_CALL_FREQ (a
)
2134 * (ira_memory_move_cost
[mode
][rclass
][0]
2135 + ira_memory_move_cost
[mode
][rclass
][1]));
2136 #ifdef IRA_HARD_REGNO_ADD_COST_MULTIPLIER
2137 cost
+= ((ira_memory_move_cost
[mode
][rclass
][0]
2138 + ira_memory_move_cost
[mode
][rclass
][1])
2140 * IRA_HARD_REGNO_ADD_COST_MULTIPLIER (regno
) / 2);
2142 if (INT_MAX
- cost
< reg_costs
[j
])
2143 reg_costs
[j
] = INT_MAX
;
2145 reg_costs
[j
] += cost
;
2146 if (min_cost
> reg_costs
[j
])
2147 min_cost
= reg_costs
[j
];
2150 if (min_cost
!= INT_MAX
)
2151 ALLOCNO_CLASS_COST (a
) = min_cost
;
2153 /* Some targets allow pseudos to be allocated to unaligned sequences
2154 of hard registers. However, selecting an unaligned sequence can
2155 unnecessarily restrict later allocations. So increase the cost of
2156 unaligned hard regs to encourage the use of aligned hard regs. */
2158 const int nregs
= ira_reg_class_max_nregs
[aclass
][ALLOCNO_MODE (a
)];
2162 ira_allocate_and_set_costs
2163 (&ALLOCNO_HARD_REG_COSTS (a
), aclass
, ALLOCNO_CLASS_COST (a
));
2164 reg_costs
= ALLOCNO_HARD_REG_COSTS (a
);
2165 for (j
= n
- 1; j
>= 0; j
--)
2167 regno
= ira_non_ordered_class_hard_regs
[aclass
][j
];
2168 if ((regno
% nregs
) != 0)
2170 int index
= ira_class_hard_reg_index
[aclass
][regno
];
2171 ira_assert (index
!= -1);
2172 reg_costs
[index
] += ALLOCNO_FREQ (a
);
2180 /* Add COST to the estimated gain for eliminating REGNO with its
2181 equivalence. If COST is zero, record that no such elimination is
2185 ira_adjust_equiv_reg_cost (unsigned regno
, int cost
)
2188 regno_equiv_gains
[regno
] = 0;
2190 regno_equiv_gains
[regno
] += cost
;