tm.texi (TARGET_IRA_COVER_CLASSES): Modify description.
[gcc.git] / gcc / ira-int.h
1 /* Integrated Register Allocator (IRA) intercommunication header file.
2 Copyright (C) 2006, 2007, 2008
3 Free Software Foundation, Inc.
4 Contributed by Vladimir Makarov <vmakarov@redhat.com>.
5
6 This file is part of GCC.
7
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
11 version.
12
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
21
22 #include "cfgloop.h"
23 #include "ira.h"
24 #include "alloc-pool.h"
25
26 /* To provide consistency in naming, all IRA external variables,
27 functions, common typedefs start with prefix ira_. */
28
29 #ifdef ENABLE_CHECKING
30 #define ENABLE_IRA_CHECKING
31 #endif
32
33 #ifdef ENABLE_IRA_CHECKING
34 #define ira_assert(c) gcc_assert (c)
35 #else
36 #define ira_assert(c)
37 #endif
38
39 /* Compute register frequency from edge frequency FREQ. It is
40 analogous to REG_FREQ_FROM_BB. When optimizing for size, or
41 profile driven feedback is available and the function is never
42 executed, frequency is always equivalent. Otherwise rescale the
43 edge frequency. */
44 #define REG_FREQ_FROM_EDGE_FREQ(freq) \
45 (optimize_size || (flag_branch_probabilities && !ENTRY_BLOCK_PTR->count) \
46 ? REG_FREQ_MAX : (freq * REG_FREQ_MAX / BB_FREQ_MAX) \
47 ? (freq * REG_FREQ_MAX / BB_FREQ_MAX) : 1)
48
49 /* All natural loops. */
50 extern struct loops ira_loops;
51
52 /* A modified value of flag `-fira-verbose' used internally. */
53 extern int internal_flag_ira_verbose;
54
55 /* Dump file of the allocator if it is not NULL. */
56 extern FILE *ira_dump_file;
57
58 /* Typedefs for pointers to allocno live range, allocno, and copy of
59 allocnos. */
60 typedef struct ira_allocno_live_range *allocno_live_range_t;
61 typedef struct ira_allocno *ira_allocno_t;
62 typedef struct ira_allocno_copy *ira_copy_t;
63
64 /* Definition of vector of allocnos and copies. */
65 DEF_VEC_P(ira_allocno_t);
66 DEF_VEC_ALLOC_P(ira_allocno_t, heap);
67 DEF_VEC_P(ira_copy_t);
68 DEF_VEC_ALLOC_P(ira_copy_t, heap);
69
70 /* Typedef for pointer to the subsequent structure. */
71 typedef struct ira_loop_tree_node *ira_loop_tree_node_t;
72
73 /* In general case, IRA is a regional allocator. The regions are
74 nested and form a tree. Currently regions are natural loops. The
75 following structure describes loop tree node (representing basic
76 block or loop). We need such tree because the loop tree from
77 cfgloop.h is not convenient for the optimization: basic blocks are
78 not a part of the tree from cfgloop.h. We also use the nodes for
79 storing additional information about basic blocks/loops for the
80 register allocation purposes. */
81 struct ira_loop_tree_node
82 {
83 /* The node represents basic block if children == NULL. */
84 basic_block bb; /* NULL for loop. */
85 struct loop *loop; /* NULL for BB. */
86 /* NEXT/SUBLOOP_NEXT is the next node/loop-node of the same parent.
87 SUBLOOP_NEXT is always NULL for BBs. */
88 ira_loop_tree_node_t subloop_next, next;
89 /* CHILDREN/SUBLOOPS is the first node/loop-node immediately inside
90 the node. They are NULL for BBs. */
91 ira_loop_tree_node_t subloops, children;
92 /* The node immediately containing given node. */
93 ira_loop_tree_node_t parent;
94
95 /* Loop level in range [0, ira_loop_tree_height). */
96 int level;
97
98 /* All the following members are defined only for nodes representing
99 loops. */
100
101 /* True if the loop was marked for removal from the register
102 allocation. */
103 bool to_remove_p;
104
105 /* Allocnos in the loop corresponding to their regnos. If it is
106 NULL the loop does not form a separate register allocation region
107 (e.g. because it has abnormal enter/exit edges and we can not put
108 code for register shuffling on the edges if a different
109 allocation is used for a pseudo-register on different sides of
110 the edges). Caps are not in the map (remember we can have more
111 one cap with the same regno in a region). */
112 ira_allocno_t *regno_allocno_map;
113
114 /* True if there is an entry to given loop not from its parent (or
115 grandparent) basic block. For example, it is possible for two
116 adjacent loops inside another loop. */
117 bool entered_from_non_parent_p;
118
119 /* Maximal register pressure inside loop for given register class
120 (defined only for the cover classes). */
121 int reg_pressure[N_REG_CLASSES];
122
123 /* Numbers of allocnos referred or living in the loop node (except
124 for its subloops). */
125 bitmap all_allocnos;
126
127 /* Numbers of allocnos living at the loop borders. */
128 bitmap border_allocnos;
129
130 /* Regnos of pseudos modified in the loop node (including its
131 subloops). */
132 bitmap modified_regnos;
133
134 /* Numbers of copies referred in the corresponding loop. */
135 bitmap local_copies;
136 };
137
138 /* The root of the loop tree corresponding to the all function. */
139 extern ira_loop_tree_node_t ira_loop_tree_root;
140
141 /* Height of the loop tree. */
142 extern int ira_loop_tree_height;
143
144 /* All nodes representing basic blocks are referred through the
145 following array. We can not use basic block member `aux' for this
146 because it is used for insertion of insns on edges. */
147 extern ira_loop_tree_node_t ira_bb_nodes;
148
149 /* Two access macros to the nodes representing basic blocks. */
150 #if defined ENABLE_IRA_CHECKING && (GCC_VERSION >= 2007)
151 #define IRA_BB_NODE_BY_INDEX(index) __extension__ \
152 (({ ira_loop_tree_node_t _node = (&ira_bb_nodes[index]); \
153 if (_node->children != NULL || _node->loop != NULL || _node->bb == NULL)\
154 { \
155 fprintf (stderr, \
156 "\n%s: %d: error in %s: it is not a block node\n", \
157 __FILE__, __LINE__, __FUNCTION__); \
158 gcc_unreachable (); \
159 } \
160 _node; }))
161 #else
162 #define IRA_BB_NODE_BY_INDEX(index) (&ira_bb_nodes[index])
163 #endif
164
165 #define IRA_BB_NODE(bb) IRA_BB_NODE_BY_INDEX ((bb)->index)
166
167 /* All nodes representing loops are referred through the following
168 array. */
169 extern ira_loop_tree_node_t ira_loop_nodes;
170
171 /* Two access macros to the nodes representing loops. */
172 #if defined ENABLE_IRA_CHECKING && (GCC_VERSION >= 2007)
173 #define IRA_LOOP_NODE_BY_INDEX(index) __extension__ \
174 (({ ira_loop_tree_node_t const _node = (&ira_loop_nodes[index]);\
175 if (_node->children == NULL || _node->bb != NULL || _node->loop == NULL)\
176 { \
177 fprintf (stderr, \
178 "\n%s: %d: error in %s: it is not a loop node\n", \
179 __FILE__, __LINE__, __FUNCTION__); \
180 gcc_unreachable (); \
181 } \
182 _node; }))
183 #else
184 #define IRA_LOOP_NODE_BY_INDEX(index) (&ira_loop_nodes[index])
185 #endif
186
187 #define IRA_LOOP_NODE(loop) IRA_LOOP_NODE_BY_INDEX ((loop)->num)
188
189 \f
190
191 /* The structure describes program points where a given allocno lives.
192 To save memory we store allocno conflicts only for the same cover
193 class allocnos which is enough to assign hard registers. To find
194 conflicts for other allocnos (e.g. to assign stack memory slot) we
195 use the live ranges. If the live ranges of two allocnos are
196 intersected, the allocnos are in conflict. */
197 struct ira_allocno_live_range
198 {
199 /* Allocno whose live range is described by given structure. */
200 ira_allocno_t allocno;
201 /* Program point range. */
202 int start, finish;
203 /* Next structure describing program points where the allocno
204 lives. */
205 allocno_live_range_t next;
206 /* Pointer to structures with the same start/finish. */
207 allocno_live_range_t start_next, finish_next;
208 };
209
210 /* Program points are enumerated by numbers from range
211 0..IRA_MAX_POINT-1. There are approximately two times more program
212 points than insns. Program points are places in the program where
213 liveness info can be changed. In most general case (there are more
214 complicated cases too) some program points correspond to places
215 where input operand dies and other ones correspond to places where
216 output operands are born. */
217 extern int ira_max_point;
218
219 /* Arrays of size IRA_MAX_POINT mapping a program point to the allocno
220 live ranges with given start/finish point. */
221 extern allocno_live_range_t *ira_start_point_ranges, *ira_finish_point_ranges;
222
223 /* A structure representing an allocno (allocation entity). Allocno
224 represents a pseudo-register in an allocation region. If
225 pseudo-register does not live in a region but it lives in the
226 nested regions, it is represented in the region by special allocno
227 called *cap*. There may be more one cap representing the same
228 pseudo-register in region. It means that the corresponding
229 pseudo-register lives in more one non-intersected subregion. */
230 struct ira_allocno
231 {
232 /* The allocno order number starting with 0. Each allocno has an
233 unique number and the number is never changed for the
234 allocno. */
235 int num;
236 /* Regno for allocno or cap. */
237 int regno;
238 /* Mode of the allocno which is the mode of the corresponding
239 pseudo-register. */
240 enum machine_mode mode;
241 /* Final rtx representation of the allocno. */
242 rtx reg;
243 /* Hard register assigned to given allocno. Negative value means
244 that memory was allocated to the allocno. During the reload,
245 spilled allocno has value equal to the corresponding stack slot
246 number (0, ...) - 2. Value -1 is used for allocnos spilled by the
247 reload (at this point pseudo-register has only one allocno) which
248 did not get stack slot yet. */
249 int hard_regno;
250 /* Allocnos with the same regno are linked by the following member.
251 Allocnos corresponding to inner loops are first in the list (it
252 corresponds to depth-first traverse of the loops). */
253 ira_allocno_t next_regno_allocno;
254 /* There may be different allocnos with the same regno in different
255 regions. Allocnos are bound to the corresponding loop tree node.
256 Pseudo-register may have only one regular allocno with given loop
257 tree node but more than one cap (see comments above). */
258 ira_loop_tree_node_t loop_tree_node;
259 /* Accumulated usage references of the allocno. Here and below,
260 word 'accumulated' means info for given region and all nested
261 subregions. In this case, 'accumulated' means sum of references
262 of the corresponding pseudo-register in this region and in all
263 nested subregions recursively. */
264 int nrefs;
265 /* Accumulated frequency of usage of the allocno. */
266 int freq;
267 /* Register class which should be used for allocation for given
268 allocno. NO_REGS means that we should use memory. */
269 enum reg_class cover_class;
270 /* Minimal accumulated and updated costs of usage register of the
271 cover class for the allocno. */
272 int cover_class_cost, updated_cover_class_cost;
273 /* Minimal accumulated, and updated costs of memory for the allocno.
274 At the allocation start, the original and updated costs are
275 equal. The updated cost may be changed after finishing
276 allocation in a region and starting allocation in a subregion.
277 The change reflects the cost of spill/restore code on the
278 subregion border if we assign memory to the pseudo in the
279 subregion. */
280 int memory_cost, updated_memory_cost;
281 /* Accumulated number of points where the allocno lives and there is
282 excess pressure for its class. Excess pressure for a register
283 class at some point means that there are more allocnos of given
284 register class living at the point than number of hard-registers
285 of the class available for the allocation. */
286 int excess_pressure_points_num;
287 /* Copies to other non-conflicting allocnos. The copies can
288 represent move insn or potential move insn usually because of two
289 operand insn constraints. */
290 ira_copy_t allocno_copies;
291 /* It is a allocno (cap) representing given allocno on upper loop tree
292 level. */
293 ira_allocno_t cap;
294 /* It is a link to allocno (cap) on lower loop level represented by
295 given cap. Null if given allocno is not a cap. */
296 ira_allocno_t cap_member;
297 /* Coalesced allocnos form a cyclic list. One allocno given by
298 FIRST_COALESCED_ALLOCNO represents all coalesced allocnos. The
299 list is chained by NEXT_COALESCED_ALLOCNO. */
300 ira_allocno_t first_coalesced_allocno;
301 ira_allocno_t next_coalesced_allocno;
302 /* Pointer to structures describing at what program point the
303 allocno lives. We always maintain the list in such way that *the
304 ranges in the list are not intersected and ordered by decreasing
305 their program points*. */
306 allocno_live_range_t live_ranges;
307 /* Before building conflicts the two member values are
308 correspondingly minimal and maximal points of the accumulated
309 allocno live ranges. After building conflicts the values are
310 correspondingly minimal and maximal conflict ids of allocnos with
311 which given allocno can conflict. */
312 int min, max;
313 /* The unique member value represents given allocno in conflict bit
314 vectors. */
315 int conflict_id;
316 /* Vector of accumulated conflicting allocnos with NULL end marker
317 (if CONFLICT_VEC_P is true) or conflict bit vector otherwise.
318 Only allocnos with the same cover class are in the vector or in
319 the bit vector. */
320 void *conflict_allocno_array;
321 /* Allocated size of the previous array. */
322 unsigned int conflict_allocno_array_size;
323 /* Number of accumulated conflicts in the vector of conflicting
324 allocnos. */
325 int conflict_allocnos_num;
326 /* Initial and accumulated hard registers conflicting with this
327 allocno and as a consequences can not be assigned to the allocno.
328 All non-allocatable hard regs and hard regs of cover classes
329 different from given allocno one are included in the sets. */
330 HARD_REG_SET conflict_hard_regs, total_conflict_hard_regs;
331 /* Accumulated frequency of calls which given allocno
332 intersects. */
333 int call_freq;
334 /* Length of the previous array (number of the intersected calls). */
335 int calls_crossed_num;
336 /* Non NULL if we remove restoring value from given allocno to
337 MEM_OPTIMIZED_DEST at loop exit (see ira-emit.c) because the
338 allocno value is not changed inside the loop. */
339 ira_allocno_t mem_optimized_dest;
340 /* TRUE if the allocno assigned to memory was a destination of
341 removed move (see ira-emit.c) at loop exit because the value of
342 the corresponding pseudo-register is not changed inside the
343 loop. */
344 unsigned int mem_optimized_dest_p : 1;
345 /* TRUE if the corresponding pseudo-register has disjoint live
346 ranges and the other allocnos of the pseudo-register except this
347 one changed REG. */
348 unsigned int somewhere_renamed_p : 1;
349 /* TRUE if allocno with the same REGNO in a subregion has been
350 renamed, in other words, got a new pseudo-register. */
351 unsigned int child_renamed_p : 1;
352 /* During the reload, value TRUE means that we should not reassign a
353 hard register to the allocno got memory earlier. It is set up
354 when we removed memory-memory move insn before each iteration of
355 the reload. */
356 unsigned int dont_reassign_p : 1;
357 #ifdef STACK_REGS
358 /* Set to TRUE if allocno can't be assigned to the stack hard
359 register correspondingly in this region and area including the
360 region and all its subregions recursively. */
361 unsigned int no_stack_reg_p : 1, total_no_stack_reg_p : 1;
362 #endif
363 /* TRUE value means that there is no sense to spill the allocno
364 during coloring because the spill will result in additional
365 reloads in reload pass. */
366 unsigned int bad_spill_p : 1;
367 /* TRUE value means that the allocno was not removed yet from the
368 conflicting graph during colouring. */
369 unsigned int in_graph_p : 1;
370 /* TRUE if a hard register or memory has been assigned to the
371 allocno. */
372 unsigned int assigned_p : 1;
373 /* TRUE if it is put on the stack to make other allocnos
374 colorable. */
375 unsigned int may_be_spilled_p : 1;
376 /* TRUE if the allocno was removed from the splay tree used to
377 choose allocn for spilling (see ira-color.c::. */
378 unsigned int splay_removed_p : 1;
379 /* TRUE if conflicts for given allocno are represented by vector of
380 pointers to the conflicting allocnos. Otherwise, we use a bit
381 vector where a bit with given index represents allocno with the
382 same number. */
383 unsigned int conflict_vec_p : 1;
384 /* Array of usage costs (accumulated and the one updated during
385 coloring) for each hard register of the allocno cover class. The
386 member value can be NULL if all costs are the same and equal to
387 COVER_CLASS_COST. For example, the costs of two different hard
388 registers can be different if one hard register is callee-saved
389 and another one is callee-used and the allocno lives through
390 calls. Another example can be case when for some insn the
391 corresponding pseudo-register value should be put in specific
392 register class (e.g. AREG for x86) which is a strict subset of
393 the allocno cover class (GENERAL_REGS for x86). We have updated
394 costs to reflect the situation when the usage cost of a hard
395 register is decreased because the allocno is connected to another
396 allocno by a copy and the another allocno has been assigned to
397 the hard register. */
398 int *hard_reg_costs, *updated_hard_reg_costs;
399 /* Array of decreasing costs (accumulated and the one updated during
400 coloring) for allocnos conflicting with given allocno for hard
401 regno of the allocno cover class. The member value can be NULL
402 if all costs are the same. These costs are used to reflect
403 preferences of other allocnos not assigned yet during assigning
404 to given allocno. */
405 int *conflict_hard_reg_costs, *updated_conflict_hard_reg_costs;
406 /* Number of the same cover class allocnos with TRUE in_graph_p
407 value and conflicting with given allocno during each point of
408 graph coloring. */
409 int left_conflicts_num;
410 /* Number of hard registers of the allocno cover class really
411 available for the allocno allocation. */
412 int available_regs_num;
413 /* Allocnos in a bucket (used in coloring) chained by the following
414 two members. */
415 ira_allocno_t next_bucket_allocno;
416 ira_allocno_t prev_bucket_allocno;
417 /* Used for temporary purposes. */
418 int temp;
419 };
420
421 /* All members of the allocno structures should be accessed only
422 through the following macros. */
423 #define ALLOCNO_NUM(A) ((A)->num)
424 #define ALLOCNO_REGNO(A) ((A)->regno)
425 #define ALLOCNO_REG(A) ((A)->reg)
426 #define ALLOCNO_NEXT_REGNO_ALLOCNO(A) ((A)->next_regno_allocno)
427 #define ALLOCNO_LOOP_TREE_NODE(A) ((A)->loop_tree_node)
428 #define ALLOCNO_CAP(A) ((A)->cap)
429 #define ALLOCNO_CAP_MEMBER(A) ((A)->cap_member)
430 #define ALLOCNO_CONFLICT_ALLOCNO_ARRAY(A) ((A)->conflict_allocno_array)
431 #define ALLOCNO_CONFLICT_ALLOCNO_ARRAY_SIZE(A) \
432 ((A)->conflict_allocno_array_size)
433 #define ALLOCNO_CONFLICT_ALLOCNOS_NUM(A) \
434 ((A)->conflict_allocnos_num)
435 #define ALLOCNO_CONFLICT_HARD_REGS(A) ((A)->conflict_hard_regs)
436 #define ALLOCNO_TOTAL_CONFLICT_HARD_REGS(A) ((A)->total_conflict_hard_regs)
437 #define ALLOCNO_NREFS(A) ((A)->nrefs)
438 #define ALLOCNO_FREQ(A) ((A)->freq)
439 #define ALLOCNO_HARD_REGNO(A) ((A)->hard_regno)
440 #define ALLOCNO_CALL_FREQ(A) ((A)->call_freq)
441 #define ALLOCNO_CALLS_CROSSED_NUM(A) ((A)->calls_crossed_num)
442 #define ALLOCNO_MEM_OPTIMIZED_DEST(A) ((A)->mem_optimized_dest)
443 #define ALLOCNO_MEM_OPTIMIZED_DEST_P(A) ((A)->mem_optimized_dest_p)
444 #define ALLOCNO_SOMEWHERE_RENAMED_P(A) ((A)->somewhere_renamed_p)
445 #define ALLOCNO_CHILD_RENAMED_P(A) ((A)->child_renamed_p)
446 #define ALLOCNO_DONT_REASSIGN_P(A) ((A)->dont_reassign_p)
447 #ifdef STACK_REGS
448 #define ALLOCNO_NO_STACK_REG_P(A) ((A)->no_stack_reg_p)
449 #define ALLOCNO_TOTAL_NO_STACK_REG_P(A) ((A)->total_no_stack_reg_p)
450 #endif
451 #define ALLOCNO_BAD_SPILL_P(A) ((A)->bad_spill_p)
452 #define ALLOCNO_IN_GRAPH_P(A) ((A)->in_graph_p)
453 #define ALLOCNO_ASSIGNED_P(A) ((A)->assigned_p)
454 #define ALLOCNO_MAY_BE_SPILLED_P(A) ((A)->may_be_spilled_p)
455 #define ALLOCNO_SPLAY_REMOVED_P(A) ((A)->splay_removed_p)
456 #define ALLOCNO_CONFLICT_VEC_P(A) ((A)->conflict_vec_p)
457 #define ALLOCNO_MODE(A) ((A)->mode)
458 #define ALLOCNO_COPIES(A) ((A)->allocno_copies)
459 #define ALLOCNO_HARD_REG_COSTS(A) ((A)->hard_reg_costs)
460 #define ALLOCNO_UPDATED_HARD_REG_COSTS(A) ((A)->updated_hard_reg_costs)
461 #define ALLOCNO_CONFLICT_HARD_REG_COSTS(A) \
462 ((A)->conflict_hard_reg_costs)
463 #define ALLOCNO_UPDATED_CONFLICT_HARD_REG_COSTS(A) \
464 ((A)->updated_conflict_hard_reg_costs)
465 #define ALLOCNO_LEFT_CONFLICTS_NUM(A) ((A)->left_conflicts_num)
466 #define ALLOCNO_COVER_CLASS(A) ((A)->cover_class)
467 #define ALLOCNO_COVER_CLASS_COST(A) ((A)->cover_class_cost)
468 #define ALLOCNO_UPDATED_COVER_CLASS_COST(A) ((A)->updated_cover_class_cost)
469 #define ALLOCNO_MEMORY_COST(A) ((A)->memory_cost)
470 #define ALLOCNO_UPDATED_MEMORY_COST(A) ((A)->updated_memory_cost)
471 #define ALLOCNO_EXCESS_PRESSURE_POINTS_NUM(A) ((A)->excess_pressure_points_num)
472 #define ALLOCNO_AVAILABLE_REGS_NUM(A) ((A)->available_regs_num)
473 #define ALLOCNO_NEXT_BUCKET_ALLOCNO(A) ((A)->next_bucket_allocno)
474 #define ALLOCNO_PREV_BUCKET_ALLOCNO(A) ((A)->prev_bucket_allocno)
475 #define ALLOCNO_TEMP(A) ((A)->temp)
476 #define ALLOCNO_FIRST_COALESCED_ALLOCNO(A) ((A)->first_coalesced_allocno)
477 #define ALLOCNO_NEXT_COALESCED_ALLOCNO(A) ((A)->next_coalesced_allocno)
478 #define ALLOCNO_LIVE_RANGES(A) ((A)->live_ranges)
479 #define ALLOCNO_MIN(A) ((A)->min)
480 #define ALLOCNO_MAX(A) ((A)->max)
481 #define ALLOCNO_CONFLICT_ID(A) ((A)->conflict_id)
482
483 /* Map regno -> allocnos with given regno (see comments for
484 allocno member `next_regno_allocno'). */
485 extern ira_allocno_t *ira_regno_allocno_map;
486
487 /* Array of references to all allocnos. The order number of the
488 allocno corresponds to the index in the array. Removed allocnos
489 have NULL element value. */
490 extern ira_allocno_t *ira_allocnos;
491
492 /* Sizes of the previous array. */
493 extern int ira_allocnos_num;
494
495 /* Map conflict id -> allocno with given conflict id (see comments for
496 allocno member `conflict_id'). */
497 extern ira_allocno_t *ira_conflict_id_allocno_map;
498
499 /* The following structure represents a copy of two allocnos. The
500 copies represent move insns or potential move insns usually because
501 of two operand insn constraints. To remove register shuffle, we
502 also create copies between allocno which is output of an insn and
503 allocno becoming dead in the insn. */
504 struct ira_allocno_copy
505 {
506 /* The unique order number of the copy node starting with 0. */
507 int num;
508 /* Allocnos connected by the copy. The first allocno should have
509 smaller order number than the second one. */
510 ira_allocno_t first, second;
511 /* Execution frequency of the copy. */
512 int freq;
513 bool constraint_p;
514 /* It is a move insn which is an origin of the copy. The member
515 value for the copy representing two operand insn constraints or
516 for the copy created to remove register shuffle is NULL. In last
517 case the copy frequency is smaller than the corresponding insn
518 execution frequency. */
519 rtx insn;
520 /* All copies with the same allocno as FIRST are linked by the two
521 following members. */
522 ira_copy_t prev_first_allocno_copy, next_first_allocno_copy;
523 /* All copies with the same allocno as SECOND are linked by the two
524 following members. */
525 ira_copy_t prev_second_allocno_copy, next_second_allocno_copy;
526 /* Region from which given copy is originated. */
527 ira_loop_tree_node_t loop_tree_node;
528 };
529
530 /* Array of references to all copies. The order number of the copy
531 corresponds to the index in the array. Removed copies have NULL
532 element value. */
533 extern ira_copy_t *ira_copies;
534
535 /* Size of the previous array. */
536 extern int ira_copies_num;
537
538 /* The following structure describes a stack slot used for spilled
539 pseudo-registers. */
540 struct ira_spilled_reg_stack_slot
541 {
542 /* pseudo-registers assigned to the stack slot. */
543 regset_head spilled_regs;
544 /* RTL representation of the stack slot. */
545 rtx mem;
546 /* Size of the stack slot. */
547 unsigned int width;
548 };
549
550 /* The number of elements in the following array. */
551 extern int ira_spilled_reg_stack_slots_num;
552
553 /* The following array contains info about spilled pseudo-registers
554 stack slots used in current function so far. */
555 extern struct ira_spilled_reg_stack_slot *ira_spilled_reg_stack_slots;
556
557 /* Correspondingly overall cost of the allocation, cost of the
558 allocnos assigned to hard-registers, cost of the allocnos assigned
559 to memory, cost of loads, stores and register move insns generated
560 for pseudo-register live range splitting (see ira-emit.c). */
561 extern int ira_overall_cost;
562 extern int ira_reg_cost, ira_mem_cost;
563 extern int ira_load_cost, ira_store_cost, ira_shuffle_cost;
564 extern int ira_move_loops_num, ira_additional_jumps_num;
565
566 /* Map: hard register number -> cover class it belongs to. If the
567 corresponding class is NO_REGS, the hard register is not available
568 for allocation. */
569 extern enum reg_class ira_hard_regno_cover_class[FIRST_PSEUDO_REGISTER];
570
571 /* Map: register class x machine mode -> number of hard registers of
572 given class needed to store value of given mode. If the number for
573 some hard-registers of the register class is different, the size
574 will be negative. */
575 extern int ira_reg_class_nregs[N_REG_CLASSES][MAX_MACHINE_MODE];
576
577 /* Maximal value of the previous array elements. */
578 extern int ira_max_nregs;
579
580 /* The number of bits in each element of array used to implement a bit
581 vector of allocnos and what type that element has. We use the
582 largest integer format on the host machine. */
583 #define IRA_INT_BITS HOST_BITS_PER_WIDE_INT
584 #define IRA_INT_TYPE HOST_WIDE_INT
585
586 /* Set, clear or test bit number I in R, a bit vector of elements with
587 minimal index and maximal index equal correspondingly to MIN and
588 MAX. */
589 #if defined ENABLE_IRA_CHECKING && (GCC_VERSION >= 2007)
590
591 #define SET_ALLOCNO_SET_BIT(R, I, MIN, MAX) __extension__ \
592 (({ int _min = (MIN), _max = (MAX), _i = (I); \
593 if (_i < _min || _i > _max) \
594 { \
595 fprintf (stderr, \
596 "\n%s: %d: error in %s: %d not in range [%d,%d]\n", \
597 __FILE__, __LINE__, __FUNCTION__, _i, _min, _max); \
598 gcc_unreachable (); \
599 } \
600 ((R)[(unsigned) (_i - _min) / IRA_INT_BITS] \
601 |= ((IRA_INT_TYPE) 1 << ((unsigned) (_i - _min) % IRA_INT_BITS))); }))
602
603
604 #define CLEAR_ALLOCNO_SET_BIT(R, I, MIN, MAX) __extension__ \
605 (({ int _min = (MIN), _max = (MAX), _i = (I); \
606 if (_i < _min || _i > _max) \
607 { \
608 fprintf (stderr, \
609 "\n%s: %d: error in %s: %d not in range [%d,%d]\n", \
610 __FILE__, __LINE__, __FUNCTION__, _i, _min, _max); \
611 gcc_unreachable (); \
612 } \
613 ((R)[(unsigned) (_i - _min) / IRA_INT_BITS] \
614 &= ~((IRA_INT_TYPE) 1 << ((unsigned) (_i - _min) % IRA_INT_BITS))); }))
615
616 #define TEST_ALLOCNO_SET_BIT(R, I, MIN, MAX) __extension__ \
617 (({ int _min = (MIN), _max = (MAX), _i = (I); \
618 if (_i < _min || _i > _max) \
619 { \
620 fprintf (stderr, \
621 "\n%s: %d: error in %s: %d not in range [%d,%d]\n", \
622 __FILE__, __LINE__, __FUNCTION__, _i, _min, _max); \
623 gcc_unreachable (); \
624 } \
625 ((R)[(unsigned) (_i - _min) / IRA_INT_BITS] \
626 & ((IRA_INT_TYPE) 1 << ((unsigned) (_i - _min) % IRA_INT_BITS))); }))
627
628 #else
629
630 #define SET_ALLOCNO_SET_BIT(R, I, MIN, MAX) \
631 ((R)[(unsigned) ((I) - (MIN)) / IRA_INT_BITS] \
632 |= ((IRA_INT_TYPE) 1 << ((unsigned) ((I) - (MIN)) % IRA_INT_BITS)))
633
634 #define CLEAR_ALLOCNO_SET_BIT(R, I, MIN, MAX) \
635 ((R)[(unsigned) ((I) - (MIN)) / IRA_INT_BITS] \
636 &= ~((IRA_INT_TYPE) 1 << ((unsigned) ((I) - (MIN)) % IRA_INT_BITS)))
637
638 #define TEST_ALLOCNO_SET_BIT(R, I, MIN, MAX) \
639 ((R)[(unsigned) ((I) - (MIN)) / IRA_INT_BITS] \
640 & ((IRA_INT_TYPE) 1 << ((unsigned) ((I) - (MIN)) % IRA_INT_BITS)))
641
642 #endif
643
644 /* The iterator for allocno set implemented ed as allocno bit
645 vector. */
646 typedef struct {
647
648 /* Array containing the allocno bit vector. */
649 IRA_INT_TYPE *vec;
650
651 /* The number of the current element in the vector. */
652 unsigned int word_num;
653
654 /* The number of bits in the bit vector. */
655 unsigned int nel;
656
657 /* The current bit index of the bit vector. */
658 unsigned int bit_num;
659
660 /* Index corresponding to the 1st bit of the bit vector. */
661 int start_val;
662
663 /* The word of the bit vector currently visited. */
664 unsigned IRA_INT_TYPE word;
665 } ira_allocno_set_iterator;
666
667 /* Initialize the iterator I for allocnos bit vector VEC containing
668 minimal and maximal values MIN and MAX. */
669 static inline void
670 ira_allocno_set_iter_init (ira_allocno_set_iterator *i,
671 IRA_INT_TYPE *vec, int min, int max)
672 {
673 i->vec = vec;
674 i->word_num = 0;
675 i->nel = max < min ? 0 : max - min + 1;
676 i->start_val = min;
677 i->bit_num = 0;
678 i->word = i->nel == 0 ? 0 : vec[0];
679 }
680
681 /* Return TRUE if we have more allocnos to visit, in which case *N is
682 set to the allocno number to be visited. Otherwise, return
683 FALSE. */
684 static inline bool
685 ira_allocno_set_iter_cond (ira_allocno_set_iterator *i, int *n)
686 {
687 /* Skip words that are zeros. */
688 for (; i->word == 0; i->word = i->vec[i->word_num])
689 {
690 i->word_num++;
691 i->bit_num = i->word_num * IRA_INT_BITS;
692
693 /* If we have reached the end, break. */
694 if (i->bit_num >= i->nel)
695 return false;
696 }
697
698 /* Skip bits that are zero. */
699 for (; (i->word & 1) == 0; i->word >>= 1)
700 i->bit_num++;
701
702 *n = (int) i->bit_num + i->start_val;
703
704 return true;
705 }
706
707 /* Advance to the next allocno in the set. */
708 static inline void
709 ira_allocno_set_iter_next (ira_allocno_set_iterator *i)
710 {
711 i->word >>= 1;
712 i->bit_num++;
713 }
714
715 /* Loop over all elements of allocno set given by bit vector VEC and
716 their minimal and maximal values MIN and MAX. In each iteration, N
717 is set to the number of next allocno. ITER is an instance of
718 ira_allocno_set_iterator used to iterate the allocnos in the set. */
719 #define FOR_EACH_ALLOCNO_IN_SET(VEC, MIN, MAX, N, ITER) \
720 for (ira_allocno_set_iter_init (&(ITER), (VEC), (MIN), (MAX)); \
721 ira_allocno_set_iter_cond (&(ITER), &(N)); \
722 ira_allocno_set_iter_next (&(ITER)))
723
724 /* ira.c: */
725
726 /* Map: hard regs X modes -> set of hard registers for storing value
727 of given mode starting with given hard register. */
728 extern HARD_REG_SET ira_reg_mode_hard_regset
729 [FIRST_PSEUDO_REGISTER][NUM_MACHINE_MODES];
730
731 /* Arrays analogous to macros MEMORY_MOVE_COST and
732 REGISTER_MOVE_COST. */
733 extern short ira_memory_move_cost[MAX_MACHINE_MODE][N_REG_CLASSES][2];
734 extern move_table *ira_register_move_cost[MAX_MACHINE_MODE];
735
736 /* Similar to may_move_in_cost but it is calculated in IRA instead of
737 regclass. Another difference we take only available hard registers
738 into account to figure out that one register class is a subset of
739 the another one. */
740 extern move_table *ira_may_move_in_cost[MAX_MACHINE_MODE];
741
742 /* Similar to may_move_out_cost but it is calculated in IRA instead of
743 regclass. Another difference we take only available hard registers
744 into account to figure out that one register class is a subset of
745 the another one. */
746 extern move_table *ira_may_move_out_cost[MAX_MACHINE_MODE];
747
748 /* Register class subset relation: TRUE if the first class is a subset
749 of the second one considering only hard registers available for the
750 allocation. */
751 extern int ira_class_subset_p[N_REG_CLASSES][N_REG_CLASSES];
752
753 /* Array of number of hard registers of given class which are
754 available for the allocation. The order is defined by the
755 allocation order. */
756 extern short ira_class_hard_regs[N_REG_CLASSES][FIRST_PSEUDO_REGISTER];
757
758 /* The number of elements of the above array for given register
759 class. */
760 extern int ira_class_hard_regs_num[N_REG_CLASSES];
761
762 /* Index (in ira_class_hard_regs) for given register class and hard
763 register (in general case a hard register can belong to several
764 register classes). The index is negative for hard registers
765 unavailable for the allocation. */
766 extern short ira_class_hard_reg_index[N_REG_CLASSES][FIRST_PSEUDO_REGISTER];
767
768 /* Function specific hard registers can not be used for the register
769 allocation. */
770 extern HARD_REG_SET ira_no_alloc_regs;
771
772 /* Number of given class hard registers available for the register
773 allocation for given classes. */
774 extern int ira_available_class_regs[N_REG_CLASSES];
775
776 /* Array whose values are hard regset of hard registers available for
777 the allocation of given register class whose HARD_REGNO_MODE_OK
778 values for given mode are zero. */
779 extern HARD_REG_SET prohibited_class_mode_regs
780 [N_REG_CLASSES][NUM_MACHINE_MODES];
781
782 /* Array whose values are hard regset of hard registers for which
783 move of the hard register in given mode into itself is
784 prohibited. */
785 extern HARD_REG_SET ira_prohibited_mode_move_regs[NUM_MACHINE_MODES];
786
787 /* Number of cover classes. Cover classes is non-intersected register
788 classes containing all hard-registers available for the
789 allocation. */
790 extern int ira_reg_class_cover_size;
791
792 /* The array containing cover classes (see also comments for macro
793 IRA_COVER_CLASSES). Only first IRA_REG_CLASS_COVER_SIZE elements are
794 used for this. */
795 extern enum reg_class ira_reg_class_cover[N_REG_CLASSES];
796
797 /* The value is number of elements in the subsequent array. */
798 extern int ira_important_classes_num;
799
800 /* The array containing non-empty classes (including non-empty cover
801 classes) which are subclasses of cover classes. Such classes is
802 important for calculation of the hard register usage costs. */
803 extern enum reg_class ira_important_classes[N_REG_CLASSES];
804
805 /* The array containing indexes of important classes in the previous
806 array. The array elements are defined only for important
807 classes. */
808 extern int ira_important_class_nums[N_REG_CLASSES];
809
810 /* Map of all register classes to corresponding cover class containing
811 the given class. If given class is not a subset of a cover class,
812 we translate it into the cheapest cover class. */
813 extern enum reg_class ira_class_translate[N_REG_CLASSES];
814
815 /* The biggest important class inside of intersection of the two
816 classes (that is calculated taking only hard registers available
817 for allocation into account). If the both classes contain no hard
818 registers available for allocation, the value is calculated with
819 taking all hard-registers including fixed ones into account. */
820 extern enum reg_class ira_reg_class_intersect[N_REG_CLASSES][N_REG_CLASSES];
821
822 /* True if the two classes (that is calculated taking only hard
823 registers available for allocation into account) are
824 intersected. */
825 extern bool ira_reg_classes_intersect_p[N_REG_CLASSES][N_REG_CLASSES];
826
827 /* Classes with end marker LIM_REG_CLASSES which are intersected with
828 given class (the first index). That includes given class itself.
829 This is calculated taking only hard registers available for
830 allocation into account. */
831 extern enum reg_class ira_reg_class_super_classes[N_REG_CLASSES][N_REG_CLASSES];
832 /* The biggest important class inside of union of the two classes
833 (that is calculated taking only hard registers available for
834 allocation into account). If the both classes contain no hard
835 registers available for allocation, the value is calculated with
836 taking all hard-registers including fixed ones into account. In
837 other words, the value is the corresponding reg_class_subunion
838 value. */
839 extern enum reg_class ira_reg_class_union[N_REG_CLASSES][N_REG_CLASSES];
840
841 extern void *ira_allocate (size_t);
842 extern void *ira_reallocate (void *, size_t);
843 extern void ira_free (void *addr);
844 extern bitmap ira_allocate_bitmap (void);
845 extern void ira_free_bitmap (bitmap);
846 extern void ira_print_disposition (FILE *);
847 extern void ira_debug_disposition (void);
848 extern void ira_debug_class_cover (void);
849 extern void ira_init_register_move_cost (enum machine_mode);
850
851 /* The length of the two following arrays. */
852 extern int ira_reg_equiv_len;
853
854 /* The element value is TRUE if the corresponding regno value is
855 invariant. */
856 extern bool *ira_reg_equiv_invariant_p;
857
858 /* The element value is equiv constant of given pseudo-register or
859 NULL_RTX. */
860 extern rtx *ira_reg_equiv_const;
861
862 /* ira-build.c */
863
864 /* The current loop tree node and its regno allocno map. */
865 extern ira_loop_tree_node_t ira_curr_loop_tree_node;
866 extern ira_allocno_t *ira_curr_regno_allocno_map;
867
868 extern void ira_debug_copy (ira_copy_t);
869 extern void ira_debug_copies (void);
870 extern void ira_debug_allocno_copies (ira_allocno_t);
871
872 extern void ira_traverse_loop_tree (bool, ira_loop_tree_node_t,
873 void (*) (ira_loop_tree_node_t),
874 void (*) (ira_loop_tree_node_t));
875 extern ira_allocno_t ira_create_allocno (int, bool, ira_loop_tree_node_t);
876 extern void ira_set_allocno_cover_class (ira_allocno_t, enum reg_class);
877 extern bool ira_conflict_vector_profitable_p (ira_allocno_t, int);
878 extern void ira_allocate_allocno_conflict_vec (ira_allocno_t, int);
879 extern void ira_allocate_allocno_conflicts (ira_allocno_t, int);
880 extern void ira_add_allocno_conflict (ira_allocno_t, ira_allocno_t);
881 extern void ira_print_expanded_allocno (ira_allocno_t);
882 extern allocno_live_range_t ira_create_allocno_live_range
883 (ira_allocno_t, int, int, allocno_live_range_t);
884 extern allocno_live_range_t ira_copy_allocno_live_range_list
885 (allocno_live_range_t);
886 extern allocno_live_range_t ira_merge_allocno_live_ranges
887 (allocno_live_range_t, allocno_live_range_t);
888 extern bool ira_allocno_live_ranges_intersect_p (allocno_live_range_t,
889 allocno_live_range_t);
890 extern void ira_finish_allocno_live_range (allocno_live_range_t);
891 extern void ira_finish_allocno_live_range_list (allocno_live_range_t);
892 extern void ira_free_allocno_updated_costs (ira_allocno_t);
893 extern ira_copy_t ira_create_copy (ira_allocno_t, ira_allocno_t,
894 int, bool, rtx, ira_loop_tree_node_t);
895 extern void ira_add_allocno_copy_to_list (ira_copy_t);
896 extern void ira_swap_allocno_copy_ends_if_necessary (ira_copy_t);
897 extern void ira_remove_allocno_copy_from_list (ira_copy_t);
898 extern ira_copy_t ira_add_allocno_copy (ira_allocno_t, ira_allocno_t, int,
899 bool, rtx, ira_loop_tree_node_t);
900
901 extern int *ira_allocate_cost_vector (enum reg_class);
902 extern void ira_free_cost_vector (int *, enum reg_class);
903
904 extern void ira_flattening (int, int);
905 extern bool ira_build (bool);
906 extern void ira_destroy (void);
907
908 /* ira-costs.c */
909 extern void ira_init_costs_once (void);
910 extern void ira_init_costs (void);
911 extern void ira_finish_costs_once (void);
912 extern void ira_costs (void);
913 extern void ira_tune_allocno_costs_and_cover_classes (void);
914
915 /* ira-lives.c */
916
917 extern void ira_rebuild_start_finish_chains (void);
918 extern void ira_print_live_range_list (FILE *, allocno_live_range_t);
919 extern void ira_debug_live_range_list (allocno_live_range_t);
920 extern void ira_debug_allocno_live_ranges (ira_allocno_t);
921 extern void ira_debug_live_ranges (void);
922 extern void ira_create_allocno_live_ranges (void);
923 extern void ira_compress_allocno_live_ranges (void);
924 extern void ira_finish_allocno_live_ranges (void);
925
926 /* ira-conflicts.c */
927 extern void ira_debug_conflicts (bool);
928 extern void ira_build_conflicts (void);
929
930 /* ira-color.c */
931 extern int ira_loop_edge_freq (ira_loop_tree_node_t, int, bool);
932 extern void ira_reassign_conflict_allocnos (int);
933 extern void ira_initiate_assign (void);
934 extern void ira_finish_assign (void);
935 extern void ira_color (void);
936
937 /* ira-emit.c */
938 extern void ira_emit (bool);
939
940 \f
941
942 /* The iterator for all allocnos. */
943 typedef struct {
944 /* The number of the current element in IRA_ALLOCNOS. */
945 int n;
946 } ira_allocno_iterator;
947
948 /* Initialize the iterator I. */
949 static inline void
950 ira_allocno_iter_init (ira_allocno_iterator *i)
951 {
952 i->n = 0;
953 }
954
955 /* Return TRUE if we have more allocnos to visit, in which case *A is
956 set to the allocno to be visited. Otherwise, return FALSE. */
957 static inline bool
958 ira_allocno_iter_cond (ira_allocno_iterator *i, ira_allocno_t *a)
959 {
960 int n;
961
962 for (n = i->n; n < ira_allocnos_num; n++)
963 if (ira_allocnos[n] != NULL)
964 {
965 *a = ira_allocnos[n];
966 i->n = n + 1;
967 return true;
968 }
969 return false;
970 }
971
972 /* Loop over all allocnos. In each iteration, A is set to the next
973 allocno. ITER is an instance of ira_allocno_iterator used to iterate
974 the allocnos. */
975 #define FOR_EACH_ALLOCNO(A, ITER) \
976 for (ira_allocno_iter_init (&(ITER)); \
977 ira_allocno_iter_cond (&(ITER), &(A));)
978
979
980 \f
981
982 /* The iterator for copies. */
983 typedef struct {
984 /* The number of the current element in IRA_COPIES. */
985 int n;
986 } ira_copy_iterator;
987
988 /* Initialize the iterator I. */
989 static inline void
990 ira_copy_iter_init (ira_copy_iterator *i)
991 {
992 i->n = 0;
993 }
994
995 /* Return TRUE if we have more copies to visit, in which case *CP is
996 set to the copy to be visited. Otherwise, return FALSE. */
997 static inline bool
998 ira_copy_iter_cond (ira_copy_iterator *i, ira_copy_t *cp)
999 {
1000 int n;
1001
1002 for (n = i->n; n < ira_copies_num; n++)
1003 if (ira_copies[n] != NULL)
1004 {
1005 *cp = ira_copies[n];
1006 i->n = n + 1;
1007 return true;
1008 }
1009 return false;
1010 }
1011
1012 /* Loop over all copies. In each iteration, C is set to the next
1013 copy. ITER is an instance of ira_copy_iterator used to iterate
1014 the copies. */
1015 #define FOR_EACH_COPY(C, ITER) \
1016 for (ira_copy_iter_init (&(ITER)); \
1017 ira_copy_iter_cond (&(ITER), &(C));)
1018
1019
1020 \f
1021
1022 /* The iterator for allocno conflicts. */
1023 typedef struct {
1024
1025 /* TRUE if the conflicts are represented by vector of allocnos. */
1026 bool allocno_conflict_vec_p;
1027
1028 /* The conflict vector or conflict bit vector. */
1029 void *vec;
1030
1031 /* The number of the current element in the vector (of type
1032 ira_allocno_t or IRA_INT_TYPE). */
1033 unsigned int word_num;
1034
1035 /* The bit vector size. It is defined only if
1036 ALLOCNO_CONFLICT_VEC_P is FALSE. */
1037 unsigned int size;
1038
1039 /* The current bit index of bit vector. It is defined only if
1040 ALLOCNO_CONFLICT_VEC_P is FALSE. */
1041 unsigned int bit_num;
1042
1043 /* Allocno conflict id corresponding to the 1st bit of the bit
1044 vector. It is defined only if ALLOCNO_CONFLICT_VEC_P is
1045 FALSE. */
1046 int base_conflict_id;
1047
1048 /* The word of bit vector currently visited. It is defined only if
1049 ALLOCNO_CONFLICT_VEC_P is FALSE. */
1050 unsigned IRA_INT_TYPE word;
1051 } ira_allocno_conflict_iterator;
1052
1053 /* Initialize the iterator I with ALLOCNO conflicts. */
1054 static inline void
1055 ira_allocno_conflict_iter_init (ira_allocno_conflict_iterator *i,
1056 ira_allocno_t allocno)
1057 {
1058 i->allocno_conflict_vec_p = ALLOCNO_CONFLICT_VEC_P (allocno);
1059 i->vec = ALLOCNO_CONFLICT_ALLOCNO_ARRAY (allocno);
1060 i->word_num = 0;
1061 if (i->allocno_conflict_vec_p)
1062 i->size = i->bit_num = i->base_conflict_id = i->word = 0;
1063 else
1064 {
1065 if (ALLOCNO_MIN (allocno) > ALLOCNO_MAX (allocno))
1066 i->size = 0;
1067 else
1068 i->size = ((ALLOCNO_MAX (allocno) - ALLOCNO_MIN (allocno)
1069 + IRA_INT_BITS)
1070 / IRA_INT_BITS) * sizeof (IRA_INT_TYPE);
1071 i->bit_num = 0;
1072 i->base_conflict_id = ALLOCNO_MIN (allocno);
1073 i->word = (i->size == 0 ? 0 : ((IRA_INT_TYPE *) i->vec)[0]);
1074 }
1075 }
1076
1077 /* Return TRUE if we have more conflicting allocnos to visit, in which
1078 case *A is set to the allocno to be visited. Otherwise, return
1079 FALSE. */
1080 static inline bool
1081 ira_allocno_conflict_iter_cond (ira_allocno_conflict_iterator *i,
1082 ira_allocno_t *a)
1083 {
1084 ira_allocno_t conflict_allocno;
1085
1086 if (i->allocno_conflict_vec_p)
1087 {
1088 conflict_allocno = ((ira_allocno_t *) i->vec)[i->word_num];
1089 if (conflict_allocno == NULL)
1090 return false;
1091 *a = conflict_allocno;
1092 return true;
1093 }
1094 else
1095 {
1096 /* Skip words that are zeros. */
1097 for (; i->word == 0; i->word = ((IRA_INT_TYPE *) i->vec)[i->word_num])
1098 {
1099 i->word_num++;
1100
1101 /* If we have reached the end, break. */
1102 if (i->word_num * sizeof (IRA_INT_TYPE) >= i->size)
1103 return false;
1104
1105 i->bit_num = i->word_num * IRA_INT_BITS;
1106 }
1107
1108 /* Skip bits that are zero. */
1109 for (; (i->word & 1) == 0; i->word >>= 1)
1110 i->bit_num++;
1111
1112 *a = ira_conflict_id_allocno_map[i->bit_num + i->base_conflict_id];
1113
1114 return true;
1115 }
1116 }
1117
1118 /* Advance to the next conflicting allocno. */
1119 static inline void
1120 ira_allocno_conflict_iter_next (ira_allocno_conflict_iterator *i)
1121 {
1122 if (i->allocno_conflict_vec_p)
1123 i->word_num++;
1124 else
1125 {
1126 i->word >>= 1;
1127 i->bit_num++;
1128 }
1129 }
1130
1131 /* Loop over all allocnos conflicting with ALLOCNO. In each
1132 iteration, A is set to the next conflicting allocno. ITER is an
1133 instance of ira_allocno_conflict_iterator used to iterate the
1134 conflicts. */
1135 #define FOR_EACH_ALLOCNO_CONFLICT(ALLOCNO, A, ITER) \
1136 for (ira_allocno_conflict_iter_init (&(ITER), (ALLOCNO)); \
1137 ira_allocno_conflict_iter_cond (&(ITER), &(A)); \
1138 ira_allocno_conflict_iter_next (&(ITER)))
1139
1140 \f
1141
1142 /* The function returns TRUE if hard registers starting with
1143 HARD_REGNO and containing value of MODE are not in set
1144 HARD_REGSET. */
1145 static inline bool
1146 ira_hard_reg_not_in_set_p (int hard_regno, enum machine_mode mode,
1147 HARD_REG_SET hard_regset)
1148 {
1149 int i;
1150
1151 ira_assert (hard_regno >= 0);
1152 for (i = hard_regno_nregs[hard_regno][mode] - 1; i >= 0; i--)
1153 if (TEST_HARD_REG_BIT (hard_regset, hard_regno + i))
1154 return false;
1155 return true;
1156 }
1157
1158 \f
1159
1160 /* To save memory we use a lazy approach for allocation and
1161 initialization of the cost vectors. We do this only when it is
1162 really necessary. */
1163
1164 /* Allocate cost vector *VEC for hard registers of COVER_CLASS and
1165 initialize the elements by VAL if it is necessary */
1166 static inline void
1167 ira_allocate_and_set_costs (int **vec, enum reg_class cover_class, int val)
1168 {
1169 int i, *reg_costs;
1170 int len;
1171
1172 if (*vec != NULL)
1173 return;
1174 *vec = reg_costs = ira_allocate_cost_vector (cover_class);
1175 len = ira_class_hard_regs_num[cover_class];
1176 for (i = 0; i < len; i++)
1177 reg_costs[i] = val;
1178 }
1179
1180 /* Allocate cost vector *VEC for hard registers of COVER_CLASS and
1181 copy values of vector SRC into the vector if it is necessary */
1182 static inline void
1183 ira_allocate_and_copy_costs (int **vec, enum reg_class cover_class, int *src)
1184 {
1185 int len;
1186
1187 if (*vec != NULL || src == NULL)
1188 return;
1189 *vec = ira_allocate_cost_vector (cover_class);
1190 len = ira_class_hard_regs_num[cover_class];
1191 memcpy (*vec, src, sizeof (int) * len);
1192 }
1193
1194 /* Allocate cost vector *VEC for hard registers of COVER_CLASS and
1195 add values of vector SRC into the vector if it is necessary */
1196 static inline void
1197 ira_allocate_and_accumulate_costs (int **vec, enum reg_class cover_class,
1198 int *src)
1199 {
1200 int i, len;
1201
1202 if (src == NULL)
1203 return;
1204 len = ira_class_hard_regs_num[cover_class];
1205 if (*vec == NULL)
1206 {
1207 *vec = ira_allocate_cost_vector (cover_class);
1208 memset (*vec, 0, sizeof (int) * len);
1209 }
1210 for (i = 0; i < len; i++)
1211 (*vec)[i] += src[i];
1212 }
1213
1214 /* Allocate cost vector *VEC for hard registers of COVER_CLASS and
1215 copy values of vector SRC into the vector or initialize it by VAL
1216 (if SRC is null). */
1217 static inline void
1218 ira_allocate_and_set_or_copy_costs (int **vec, enum reg_class cover_class,
1219 int val, int *src)
1220 {
1221 int i, *reg_costs;
1222 int len;
1223
1224 if (*vec != NULL)
1225 return;
1226 *vec = reg_costs = ira_allocate_cost_vector (cover_class);
1227 len = ira_class_hard_regs_num[cover_class];
1228 if (src != NULL)
1229 memcpy (reg_costs, src, sizeof (int) * len);
1230 else
1231 {
1232 for (i = 0; i < len; i++)
1233 reg_costs[i] = val;
1234 }
1235 }