1 /* Integrated Register Allocator (IRA) intercommunication header file.
2 Copyright (C) 2006, 2007, 2008, 2009, 2010
3 Free Software Foundation, Inc.
4 Contributed by Vladimir Makarov <vmakarov@redhat.com>.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
24 #include "alloc-pool.h"
26 /* To provide consistency in naming, all IRA external variables,
27 functions, common typedefs start with prefix ira_. */
29 #ifdef ENABLE_CHECKING
30 #define ENABLE_IRA_CHECKING
33 #ifdef ENABLE_IRA_CHECKING
34 #define ira_assert(c) gcc_assert (c)
36 /* Always define and include C, so that warnings for empty body in an
37 ‘if’ statement and unused variable do not occur. */
38 #define ira_assert(c) ((void)(0 && (c)))
41 /* Compute register frequency from edge frequency FREQ. It is
42 analogous to REG_FREQ_FROM_BB. When optimizing for size, or
43 profile driven feedback is available and the function is never
44 executed, frequency is always equivalent. Otherwise rescale the
46 #define REG_FREQ_FROM_EDGE_FREQ(freq) \
47 (optimize_size || (flag_branch_probabilities && !ENTRY_BLOCK_PTR->count) \
48 ? REG_FREQ_MAX : (freq * REG_FREQ_MAX / BB_FREQ_MAX) \
49 ? (freq * REG_FREQ_MAX / BB_FREQ_MAX) : 1)
51 /* All natural loops. */
52 extern struct loops ira_loops
;
54 /* A modified value of flag `-fira-verbose' used internally. */
55 extern int internal_flag_ira_verbose
;
57 /* Dump file of the allocator if it is not NULL. */
58 extern FILE *ira_dump_file
;
60 /* Typedefs for pointers to allocno live range, allocno, and copy of
62 typedef struct live_range
*live_range_t
;
63 typedef struct ira_allocno
*ira_allocno_t
;
64 typedef struct ira_allocno_copy
*ira_copy_t
;
65 typedef struct ira_object
*ira_object_t
;
67 /* Definition of vector of allocnos and copies. */
68 DEF_VEC_P(ira_allocno_t
);
69 DEF_VEC_ALLOC_P(ira_allocno_t
, heap
);
70 DEF_VEC_P(ira_object_t
);
71 DEF_VEC_ALLOC_P(ira_object_t
, heap
);
72 DEF_VEC_P(ira_copy_t
);
73 DEF_VEC_ALLOC_P(ira_copy_t
, heap
);
75 /* Typedef for pointer to the subsequent structure. */
76 typedef struct ira_loop_tree_node
*ira_loop_tree_node_t
;
78 typedef unsigned short move_table
[N_REG_CLASSES
];
80 /* In general case, IRA is a regional allocator. The regions are
81 nested and form a tree. Currently regions are natural loops. The
82 following structure describes loop tree node (representing basic
83 block or loop). We need such tree because the loop tree from
84 cfgloop.h is not convenient for the optimization: basic blocks are
85 not a part of the tree from cfgloop.h. We also use the nodes for
86 storing additional information about basic blocks/loops for the
87 register allocation purposes. */
88 struct ira_loop_tree_node
90 /* The node represents basic block if children == NULL. */
91 basic_block bb
; /* NULL for loop. */
92 /* NULL for BB or for loop tree root if we did not build CFG loop tree. */
94 /* NEXT/SUBLOOP_NEXT is the next node/loop-node of the same parent.
95 SUBLOOP_NEXT is always NULL for BBs. */
96 ira_loop_tree_node_t subloop_next
, next
;
97 /* CHILDREN/SUBLOOPS is the first node/loop-node immediately inside
98 the node. They are NULL for BBs. */
99 ira_loop_tree_node_t subloops
, children
;
100 /* The node immediately containing given node. */
101 ira_loop_tree_node_t parent
;
103 /* Loop level in range [0, ira_loop_tree_height). */
106 /* All the following members are defined only for nodes representing
109 /* The loop number from CFG loop tree. The root number is 0. */
112 /* True if the loop was marked for removal from the register
116 /* Allocnos in the loop corresponding to their regnos. If it is
117 NULL the loop does not form a separate register allocation region
118 (e.g. because it has abnormal enter/exit edges and we can not put
119 code for register shuffling on the edges if a different
120 allocation is used for a pseudo-register on different sides of
121 the edges). Caps are not in the map (remember we can have more
122 one cap with the same regno in a region). */
123 ira_allocno_t
*regno_allocno_map
;
125 /* True if there is an entry to given loop not from its parent (or
126 grandparent) basic block. For example, it is possible for two
127 adjacent loops inside another loop. */
128 bool entered_from_non_parent_p
;
130 /* Maximal register pressure inside loop for given register class
131 (defined only for the pressure classes). */
132 int reg_pressure
[N_REG_CLASSES
];
134 /* Numbers of allocnos referred or living in the loop node (except
135 for its subloops). */
138 /* Numbers of allocnos living at the loop borders. */
139 bitmap border_allocnos
;
141 /* Regnos of pseudos modified in the loop node (including its
143 bitmap modified_regnos
;
145 /* Numbers of copies referred in the corresponding loop. */
149 /* The root of the loop tree corresponding to the all function. */
150 extern ira_loop_tree_node_t ira_loop_tree_root
;
152 /* Height of the loop tree. */
153 extern int ira_loop_tree_height
;
155 /* All nodes representing basic blocks are referred through the
156 following array. We can not use basic block member `aux' for this
157 because it is used for insertion of insns on edges. */
158 extern ira_loop_tree_node_t ira_bb_nodes
;
160 /* Two access macros to the nodes representing basic blocks. */
161 #if defined ENABLE_IRA_CHECKING && (GCC_VERSION >= 2007)
162 #define IRA_BB_NODE_BY_INDEX(index) __extension__ \
163 (({ ira_loop_tree_node_t _node = (&ira_bb_nodes[index]); \
164 if (_node->children != NULL || _node->loop != NULL || _node->bb == NULL)\
167 "\n%s: %d: error in %s: it is not a block node\n", \
168 __FILE__, __LINE__, __FUNCTION__); \
169 gcc_unreachable (); \
173 #define IRA_BB_NODE_BY_INDEX(index) (&ira_bb_nodes[index])
176 #define IRA_BB_NODE(bb) IRA_BB_NODE_BY_INDEX ((bb)->index)
178 /* All nodes representing loops are referred through the following
180 extern ira_loop_tree_node_t ira_loop_nodes
;
182 /* Two access macros to the nodes representing loops. */
183 #if defined ENABLE_IRA_CHECKING && (GCC_VERSION >= 2007)
184 #define IRA_LOOP_NODE_BY_INDEX(index) __extension__ \
185 (({ ira_loop_tree_node_t const _node = (&ira_loop_nodes[index]); \
186 if (_node->children == NULL || _node->bb != NULL \
187 || (_node->loop == NULL && current_loops != NULL)) \
190 "\n%s: %d: error in %s: it is not a loop node\n", \
191 __FILE__, __LINE__, __FUNCTION__); \
192 gcc_unreachable (); \
196 #define IRA_LOOP_NODE_BY_INDEX(index) (&ira_loop_nodes[index])
199 #define IRA_LOOP_NODE(loop) IRA_LOOP_NODE_BY_INDEX ((loop)->num)
202 /* The structure describes program points where a given allocno lives.
203 If the live ranges of two allocnos are intersected, the allocnos
207 /* Object whose live range is described by given structure. */
209 /* Program point range. */
211 /* Next structure describing program points where the allocno
214 /* Pointer to structures with the same start/finish. */
215 live_range_t start_next
, finish_next
;
218 /* Program points are enumerated by numbers from range
219 0..IRA_MAX_POINT-1. There are approximately two times more program
220 points than insns. Program points are places in the program where
221 liveness info can be changed. In most general case (there are more
222 complicated cases too) some program points correspond to places
223 where input operand dies and other ones correspond to places where
224 output operands are born. */
225 extern int ira_max_point
;
227 /* Arrays of size IRA_MAX_POINT mapping a program point to the allocno
228 live ranges with given start/finish point. */
229 extern live_range_t
*ira_start_point_ranges
, *ira_finish_point_ranges
;
231 /* A structure representing conflict information for an allocno
232 (or one of its subwords). */
235 /* The allocno associated with this record. */
236 ira_allocno_t allocno
;
237 /* Vector of accumulated conflicting conflict_redords with NULL end
238 marker (if OBJECT_CONFLICT_VEC_P is true) or conflict bit vector
240 void *conflicts_array
;
241 /* Pointer to structures describing at what program point the
242 object lives. We always maintain the list in such way that *the
243 ranges in the list are not intersected and ordered by decreasing
244 their program points*. */
245 live_range_t live_ranges
;
246 /* The subword within ALLOCNO which is represented by this object.
247 Zero means the lowest-order subword (or the entire allocno in case
248 it is not being tracked in subwords). */
250 /* Allocated size of the conflicts array. */
251 unsigned int conflicts_array_size
;
252 /* A unique number for every instance of this structure, which is used
253 to represent it in conflict bit vectors. */
255 /* Before building conflicts, MIN and MAX are initialized to
256 correspondingly minimal and maximal points of the accumulated
257 live ranges. Afterwards, they hold the minimal and maximal ids
258 of other ira_objects that this one can conflict with. */
260 /* Initial and accumulated hard registers conflicting with this
261 object and as a consequences can not be assigned to the allocno.
262 All non-allocatable hard regs and hard regs of register classes
263 different from given allocno one are included in the sets. */
264 HARD_REG_SET conflict_hard_regs
, total_conflict_hard_regs
;
265 /* Number of accumulated conflicts in the vector of conflicting
267 int num_accumulated_conflicts
;
268 /* TRUE if conflicts are represented by a vector of pointers to
269 ira_object structures. Otherwise, we use a bit vector indexed
270 by conflict ID numbers. */
271 unsigned int conflict_vec_p
: 1;
274 /* A structure representing an allocno (allocation entity). Allocno
275 represents a pseudo-register in an allocation region. If
276 pseudo-register does not live in a region but it lives in the
277 nested regions, it is represented in the region by special allocno
278 called *cap*. There may be more one cap representing the same
279 pseudo-register in region. It means that the corresponding
280 pseudo-register lives in more one non-intersected subregion. */
283 /* The allocno order number starting with 0. Each allocno has an
284 unique number and the number is never changed for the
287 /* Regno for allocno or cap. */
289 /* Mode of the allocno which is the mode of the corresponding
291 ENUM_BITFIELD (machine_mode
) mode
: 8;
292 /* Register class which should be used for allocation for given
293 allocno. NO_REGS means that we should use memory. */
294 ENUM_BITFIELD (reg_class
) aclass
: 16;
295 /* During the reload, value TRUE means that we should not reassign a
296 hard register to the allocno got memory earlier. It is set up
297 when we removed memory-memory move insn before each iteration of
299 unsigned int dont_reassign_p
: 1;
301 /* Set to TRUE if allocno can't be assigned to the stack hard
302 register correspondingly in this region and area including the
303 region and all its subregions recursively. */
304 unsigned int no_stack_reg_p
: 1, total_no_stack_reg_p
: 1;
306 /* TRUE value means that there is no sense to spill the allocno
307 during coloring because the spill will result in additional
308 reloads in reload pass. */
309 unsigned int bad_spill_p
: 1;
310 /* TRUE if a hard register or memory has been assigned to the
312 unsigned int assigned_p
: 1;
313 /* TRUE if conflicts for given allocno are represented by vector of
314 pointers to the conflicting allocnos. Otherwise, we use a bit
315 vector where a bit with given index represents allocno with the
317 unsigned int conflict_vec_p
: 1;
318 /* Hard register assigned to given allocno. Negative value means
319 that memory was allocated to the allocno. During the reload,
320 spilled allocno has value equal to the corresponding stack slot
321 number (0, ...) - 2. Value -1 is used for allocnos spilled by the
322 reload (at this point pseudo-register has only one allocno) which
323 did not get stack slot yet. */
324 short int hard_regno
;
325 /* Allocnos with the same regno are linked by the following member.
326 Allocnos corresponding to inner loops are first in the list (it
327 corresponds to depth-first traverse of the loops). */
328 ira_allocno_t next_regno_allocno
;
329 /* There may be different allocnos with the same regno in different
330 regions. Allocnos are bound to the corresponding loop tree node.
331 Pseudo-register may have only one regular allocno with given loop
332 tree node but more than one cap (see comments above). */
333 ira_loop_tree_node_t loop_tree_node
;
334 /* Accumulated usage references of the allocno. Here and below,
335 word 'accumulated' means info for given region and all nested
336 subregions. In this case, 'accumulated' means sum of references
337 of the corresponding pseudo-register in this region and in all
338 nested subregions recursively. */
340 /* Accumulated frequency of usage of the allocno. */
342 /* Minimal accumulated and updated costs of usage register of the
344 int class_cost
, updated_class_cost
;
345 /* Minimal accumulated, and updated costs of memory for the allocno.
346 At the allocation start, the original and updated costs are
347 equal. The updated cost may be changed after finishing
348 allocation in a region and starting allocation in a subregion.
349 The change reflects the cost of spill/restore code on the
350 subregion border if we assign memory to the pseudo in the
352 int memory_cost
, updated_memory_cost
;
353 /* Accumulated number of points where the allocno lives and there is
354 excess pressure for its class. Excess pressure for a register
355 class at some point means that there are more allocnos of given
356 register class living at the point than number of hard-registers
357 of the class available for the allocation. */
358 int excess_pressure_points_num
;
359 /* Copies to other non-conflicting allocnos. The copies can
360 represent move insn or potential move insn usually because of two
361 operand insn constraints. */
362 ira_copy_t allocno_copies
;
363 /* It is a allocno (cap) representing given allocno on upper loop tree
366 /* It is a link to allocno (cap) on lower loop level represented by
367 given cap. Null if given allocno is not a cap. */
368 ira_allocno_t cap_member
;
369 /* The number of objects tracked in the following array. */
371 /* An array of structures describing conflict information and live
372 ranges for each object associated with the allocno. There may be
373 more than one such object in cases where the allocno represents a
374 multi-word register. */
375 ira_object_t objects
[2];
376 /* Accumulated frequency of calls which given allocno
379 /* Accumulated number of the intersected calls. */
380 int calls_crossed_num
;
381 /* The number of calls across which it is live, but which should not
382 affect register preferences. */
383 int cheap_calls_crossed_num
;
384 /* Array of usage costs (accumulated and the one updated during
385 coloring) for each hard register of the allocno class. The
386 member value can be NULL if all costs are the same and equal to
387 CLASS_COST. For example, the costs of two different hard
388 registers can be different if one hard register is callee-saved
389 and another one is callee-used and the allocno lives through
390 calls. Another example can be case when for some insn the
391 corresponding pseudo-register value should be put in specific
392 register class (e.g. AREG for x86) which is a strict subset of
393 the allocno class (GENERAL_REGS for x86). We have updated costs
394 to reflect the situation when the usage cost of a hard register
395 is decreased because the allocno is connected to another allocno
396 by a copy and the another allocno has been assigned to the hard
398 int *hard_reg_costs
, *updated_hard_reg_costs
;
399 /* Array of decreasing costs (accumulated and the one updated during
400 coloring) for allocnos conflicting with given allocno for hard
401 regno of the allocno class. The member value can be NULL if all
402 costs are the same. These costs are used to reflect preferences
403 of other allocnos not assigned yet during assigning to given
405 int *conflict_hard_reg_costs
, *updated_conflict_hard_reg_costs
;
406 /* Different additional data. It is used to decrease size of
407 allocno data footprint. */
412 /* All members of the allocno structures should be accessed only
413 through the following macros. */
414 #define ALLOCNO_NUM(A) ((A)->num)
415 #define ALLOCNO_REGNO(A) ((A)->regno)
416 #define ALLOCNO_REG(A) ((A)->reg)
417 #define ALLOCNO_NEXT_REGNO_ALLOCNO(A) ((A)->next_regno_allocno)
418 #define ALLOCNO_LOOP_TREE_NODE(A) ((A)->loop_tree_node)
419 #define ALLOCNO_CAP(A) ((A)->cap)
420 #define ALLOCNO_CAP_MEMBER(A) ((A)->cap_member)
421 #define ALLOCNO_NREFS(A) ((A)->nrefs)
422 #define ALLOCNO_FREQ(A) ((A)->freq)
423 #define ALLOCNO_HARD_REGNO(A) ((A)->hard_regno)
424 #define ALLOCNO_CALL_FREQ(A) ((A)->call_freq)
425 #define ALLOCNO_CALLS_CROSSED_NUM(A) ((A)->calls_crossed_num)
426 #define ALLOCNO_CHEAP_CALLS_CROSSED_NUM(A) ((A)->cheap_calls_crossed_num)
427 #define ALLOCNO_MEM_OPTIMIZED_DEST(A) ((A)->mem_optimized_dest)
428 #define ALLOCNO_MEM_OPTIMIZED_DEST_P(A) ((A)->mem_optimized_dest_p)
429 #define ALLOCNO_SOMEWHERE_RENAMED_P(A) ((A)->somewhere_renamed_p)
430 #define ALLOCNO_CHILD_RENAMED_P(A) ((A)->child_renamed_p)
431 #define ALLOCNO_DONT_REASSIGN_P(A) ((A)->dont_reassign_p)
433 #define ALLOCNO_NO_STACK_REG_P(A) ((A)->no_stack_reg_p)
434 #define ALLOCNO_TOTAL_NO_STACK_REG_P(A) ((A)->total_no_stack_reg_p)
436 #define ALLOCNO_BAD_SPILL_P(A) ((A)->bad_spill_p)
437 #define ALLOCNO_ASSIGNED_P(A) ((A)->assigned_p)
438 #define ALLOCNO_MODE(A) ((A)->mode)
439 #define ALLOCNO_COPIES(A) ((A)->allocno_copies)
440 #define ALLOCNO_HARD_REG_COSTS(A) ((A)->hard_reg_costs)
441 #define ALLOCNO_UPDATED_HARD_REG_COSTS(A) ((A)->updated_hard_reg_costs)
442 #define ALLOCNO_CONFLICT_HARD_REG_COSTS(A) \
443 ((A)->conflict_hard_reg_costs)
444 #define ALLOCNO_UPDATED_CONFLICT_HARD_REG_COSTS(A) \
445 ((A)->updated_conflict_hard_reg_costs)
446 #define ALLOCNO_CLASS(A) ((A)->aclass)
447 #define ALLOCNO_CLASS_COST(A) ((A)->class_cost)
448 #define ALLOCNO_UPDATED_CLASS_COST(A) ((A)->updated_class_cost)
449 #define ALLOCNO_MEMORY_COST(A) ((A)->memory_cost)
450 #define ALLOCNO_UPDATED_MEMORY_COST(A) ((A)->updated_memory_cost)
451 #define ALLOCNO_EXCESS_PRESSURE_POINTS_NUM(A) \
452 ((A)->excess_pressure_points_num)
453 #define ALLOCNO_OBJECT(A,N) ((A)->objects[N])
454 #define ALLOCNO_NUM_OBJECTS(A) ((A)->num_objects)
455 #define ALLOCNO_ADD_DATA(A) ((A)->add_data)
457 /* Typedef for pointer to the subsequent structure. */
458 typedef struct ira_emit_data
*ira_emit_data_t
;
460 /* Allocno bound data used for emit pseudo live range split insns and
464 /* TRUE if the allocno assigned to memory was a destination of
465 removed move (see ira-emit.c) at loop exit because the value of
466 the corresponding pseudo-register is not changed inside the
468 unsigned int mem_optimized_dest_p
: 1;
469 /* TRUE if the corresponding pseudo-register has disjoint live
470 ranges and the other allocnos of the pseudo-register except this
472 unsigned int somewhere_renamed_p
: 1;
473 /* TRUE if allocno with the same REGNO in a subregion has been
474 renamed, in other words, got a new pseudo-register. */
475 unsigned int child_renamed_p
: 1;
476 /* Final rtx representation of the allocno. */
478 /* Non NULL if we remove restoring value from given allocno to
479 MEM_OPTIMIZED_DEST at loop exit (see ira-emit.c) because the
480 allocno value is not changed inside the loop. */
481 ira_allocno_t mem_optimized_dest
;
484 #define ALLOCNO_EMIT_DATA(a) ((ira_emit_data_t) ALLOCNO_ADD_DATA (a))
486 /* Data used to emit live range split insns and to flattening IR. */
487 extern ira_emit_data_t ira_allocno_emit_data
;
489 /* Abbreviation for frequent emit data access. */
491 allocno_emit_reg (ira_allocno_t a
)
493 return ALLOCNO_EMIT_DATA (a
)->reg
;
496 #define OBJECT_ALLOCNO(O) ((O)->allocno)
497 #define OBJECT_SUBWORD(O) ((O)->subword)
498 #define OBJECT_CONFLICT_ARRAY(O) ((O)->conflicts_array)
499 #define OBJECT_CONFLICT_VEC(O) ((ira_object_t *)(O)->conflicts_array)
500 #define OBJECT_CONFLICT_BITVEC(O) ((IRA_INT_TYPE *)(O)->conflicts_array)
501 #define OBJECT_CONFLICT_ARRAY_SIZE(O) ((O)->conflicts_array_size)
502 #define OBJECT_CONFLICT_VEC_P(O) ((O)->conflict_vec_p)
503 #define OBJECT_NUM_CONFLICTS(O) ((O)->num_accumulated_conflicts)
504 #define OBJECT_CONFLICT_HARD_REGS(O) ((O)->conflict_hard_regs)
505 #define OBJECT_TOTAL_CONFLICT_HARD_REGS(O) ((O)->total_conflict_hard_regs)
506 #define OBJECT_MIN(O) ((O)->min)
507 #define OBJECT_MAX(O) ((O)->max)
508 #define OBJECT_CONFLICT_ID(O) ((O)->id)
509 #define OBJECT_LIVE_RANGES(O) ((O)->live_ranges)
511 /* Map regno -> allocnos with given regno (see comments for
512 allocno member `next_regno_allocno'). */
513 extern ira_allocno_t
*ira_regno_allocno_map
;
515 /* Array of references to all allocnos. The order number of the
516 allocno corresponds to the index in the array. Removed allocnos
517 have NULL element value. */
518 extern ira_allocno_t
*ira_allocnos
;
520 /* The size of the previous array. */
521 extern int ira_allocnos_num
;
523 /* Map a conflict id to its corresponding ira_object structure. */
524 extern ira_object_t
*ira_object_id_map
;
526 /* The size of the previous array. */
527 extern int ira_objects_num
;
529 /* The following structure represents a copy of two allocnos. The
530 copies represent move insns or potential move insns usually because
531 of two operand insn constraints. To remove register shuffle, we
532 also create copies between allocno which is output of an insn and
533 allocno becoming dead in the insn. */
534 struct ira_allocno_copy
536 /* The unique order number of the copy node starting with 0. */
538 /* Allocnos connected by the copy. The first allocno should have
539 smaller order number than the second one. */
540 ira_allocno_t first
, second
;
541 /* Execution frequency of the copy. */
544 /* It is a move insn which is an origin of the copy. The member
545 value for the copy representing two operand insn constraints or
546 for the copy created to remove register shuffle is NULL. In last
547 case the copy frequency is smaller than the corresponding insn
548 execution frequency. */
550 /* All copies with the same allocno as FIRST are linked by the two
551 following members. */
552 ira_copy_t prev_first_allocno_copy
, next_first_allocno_copy
;
553 /* All copies with the same allocno as SECOND are linked by the two
554 following members. */
555 ira_copy_t prev_second_allocno_copy
, next_second_allocno_copy
;
556 /* Region from which given copy is originated. */
557 ira_loop_tree_node_t loop_tree_node
;
560 /* Array of references to all copies. The order number of the copy
561 corresponds to the index in the array. Removed copies have NULL
563 extern ira_copy_t
*ira_copies
;
565 /* Size of the previous array. */
566 extern int ira_copies_num
;
568 /* The following structure describes a stack slot used for spilled
570 struct ira_spilled_reg_stack_slot
572 /* pseudo-registers assigned to the stack slot. */
573 bitmap_head spilled_regs
;
574 /* RTL representation of the stack slot. */
576 /* Size of the stack slot. */
580 /* The number of elements in the following array. */
581 extern int ira_spilled_reg_stack_slots_num
;
583 /* The following array contains info about spilled pseudo-registers
584 stack slots used in current function so far. */
585 extern struct ira_spilled_reg_stack_slot
*ira_spilled_reg_stack_slots
;
587 /* Correspondingly overall cost of the allocation, cost of the
588 allocnos assigned to hard-registers, cost of the allocnos assigned
589 to memory, cost of loads, stores and register move insns generated
590 for pseudo-register live range splitting (see ira-emit.c). */
591 extern int ira_overall_cost
;
592 extern int ira_reg_cost
, ira_mem_cost
;
593 extern int ira_load_cost
, ira_store_cost
, ira_shuffle_cost
;
594 extern int ira_move_loops_num
, ira_additional_jumps_num
;
597 /* This page contains a bitset implementation called 'min/max sets' used to
598 record conflicts in IRA.
599 They are named min/maxs set since we keep track of a minimum and a maximum
600 bit number for each set representing the bounds of valid elements. Otherwise,
601 the implementation resembles sbitmaps in that we store an array of integers
602 whose bits directly represent the members of the set. */
604 /* The type used as elements in the array, and the number of bits in
607 #define IRA_INT_BITS HOST_BITS_PER_WIDE_INT
608 #define IRA_INT_TYPE HOST_WIDE_INT
610 /* Set, clear or test bit number I in R, a bit vector of elements with
611 minimal index and maximal index equal correspondingly to MIN and
613 #if defined ENABLE_IRA_CHECKING && (GCC_VERSION >= 2007)
615 #define SET_MINMAX_SET_BIT(R, I, MIN, MAX) __extension__ \
616 (({ int _min = (MIN), _max = (MAX), _i = (I); \
617 if (_i < _min || _i > _max) \
620 "\n%s: %d: error in %s: %d not in range [%d,%d]\n", \
621 __FILE__, __LINE__, __FUNCTION__, _i, _min, _max); \
622 gcc_unreachable (); \
624 ((R)[(unsigned) (_i - _min) / IRA_INT_BITS] \
625 |= ((IRA_INT_TYPE) 1 << ((unsigned) (_i - _min) % IRA_INT_BITS))); }))
628 #define CLEAR_MINMAX_SET_BIT(R, I, MIN, MAX) __extension__ \
629 (({ int _min = (MIN), _max = (MAX), _i = (I); \
630 if (_i < _min || _i > _max) \
633 "\n%s: %d: error in %s: %d not in range [%d,%d]\n", \
634 __FILE__, __LINE__, __FUNCTION__, _i, _min, _max); \
635 gcc_unreachable (); \
637 ((R)[(unsigned) (_i - _min) / IRA_INT_BITS] \
638 &= ~((IRA_INT_TYPE) 1 << ((unsigned) (_i - _min) % IRA_INT_BITS))); }))
640 #define TEST_MINMAX_SET_BIT(R, I, MIN, MAX) __extension__ \
641 (({ int _min = (MIN), _max = (MAX), _i = (I); \
642 if (_i < _min || _i > _max) \
645 "\n%s: %d: error in %s: %d not in range [%d,%d]\n", \
646 __FILE__, __LINE__, __FUNCTION__, _i, _min, _max); \
647 gcc_unreachable (); \
649 ((R)[(unsigned) (_i - _min) / IRA_INT_BITS] \
650 & ((IRA_INT_TYPE) 1 << ((unsigned) (_i - _min) % IRA_INT_BITS))); }))
654 #define SET_MINMAX_SET_BIT(R, I, MIN, MAX) \
655 ((R)[(unsigned) ((I) - (MIN)) / IRA_INT_BITS] \
656 |= ((IRA_INT_TYPE) 1 << ((unsigned) ((I) - (MIN)) % IRA_INT_BITS)))
658 #define CLEAR_MINMAX_SET_BIT(R, I, MIN, MAX) \
659 ((R)[(unsigned) ((I) - (MIN)) / IRA_INT_BITS] \
660 &= ~((IRA_INT_TYPE) 1 << ((unsigned) ((I) - (MIN)) % IRA_INT_BITS)))
662 #define TEST_MINMAX_SET_BIT(R, I, MIN, MAX) \
663 ((R)[(unsigned) ((I) - (MIN)) / IRA_INT_BITS] \
664 & ((IRA_INT_TYPE) 1 << ((unsigned) ((I) - (MIN)) % IRA_INT_BITS)))
668 /* The iterator for min/max sets. */
671 /* Array containing the bit vector. */
674 /* The number of the current element in the vector. */
675 unsigned int word_num
;
677 /* The number of bits in the bit vector. */
680 /* The current bit index of the bit vector. */
681 unsigned int bit_num
;
683 /* Index corresponding to the 1st bit of the bit vector. */
686 /* The word of the bit vector currently visited. */
687 unsigned IRA_INT_TYPE word
;
688 } minmax_set_iterator
;
690 /* Initialize the iterator I for bit vector VEC containing minimal and
691 maximal values MIN and MAX. */
693 minmax_set_iter_init (minmax_set_iterator
*i
, IRA_INT_TYPE
*vec
, int min
,
698 i
->nel
= max
< min
? 0 : max
- min
+ 1;
701 i
->word
= i
->nel
== 0 ? 0 : vec
[0];
704 /* Return TRUE if we have more allocnos to visit, in which case *N is
705 set to the number of the element to be visited. Otherwise, return
708 minmax_set_iter_cond (minmax_set_iterator
*i
, int *n
)
710 /* Skip words that are zeros. */
711 for (; i
->word
== 0; i
->word
= i
->vec
[i
->word_num
])
714 i
->bit_num
= i
->word_num
* IRA_INT_BITS
;
716 /* If we have reached the end, break. */
717 if (i
->bit_num
>= i
->nel
)
721 /* Skip bits that are zero. */
722 for (; (i
->word
& 1) == 0; i
->word
>>= 1)
725 *n
= (int) i
->bit_num
+ i
->start_val
;
730 /* Advance to the next element in the set. */
732 minmax_set_iter_next (minmax_set_iterator
*i
)
738 /* Loop over all elements of a min/max set given by bit vector VEC and
739 their minimal and maximal values MIN and MAX. In each iteration, N
740 is set to the number of next allocno. ITER is an instance of
741 minmax_set_iterator used to iterate over the set. */
742 #define FOR_EACH_BIT_IN_MINMAX_SET(VEC, MIN, MAX, N, ITER) \
743 for (minmax_set_iter_init (&(ITER), (VEC), (MIN), (MAX)); \
744 minmax_set_iter_cond (&(ITER), &(N)); \
745 minmax_set_iter_next (&(ITER)))
747 struct target_ira_int
{
748 /* Initialized once. It is a maximal possible size of the allocated
750 int x_max_struct_costs_size
;
752 /* Allocated and initialized once, and used to initialize cost values
754 struct costs
*x_init_cost
;
756 /* Allocated once, and used for temporary purposes. */
757 struct costs
*x_temp_costs
;
759 /* Allocated once, and used for the cost calculation. */
760 struct costs
*x_op_costs
[MAX_RECOG_OPERANDS
];
761 struct costs
*x_this_op_costs
[MAX_RECOG_OPERANDS
];
763 /* Hard registers that can not be used for the register allocator for
764 all functions of the current compilation unit. */
765 HARD_REG_SET x_no_unit_alloc_regs
;
767 /* Map: hard regs X modes -> set of hard registers for storing value
768 of given mode starting with given hard register. */
769 HARD_REG_SET (x_ira_reg_mode_hard_regset
770 [FIRST_PSEUDO_REGISTER
][NUM_MACHINE_MODES
]);
772 /* Maximum cost of moving from a register in one class to a register
773 in another class. Based on TARGET_REGISTER_MOVE_COST. */
774 move_table
*x_move_cost
[MAX_MACHINE_MODE
];
776 /* Similar, but here we don't have to move if the first index is a
777 subset of the second so in that case the cost is zero. */
778 move_table
*x_may_move_in_cost
[MAX_MACHINE_MODE
];
780 /* Similar, but here we don't have to move if the first index is a
781 superset of the second so in that case the cost is zero. */
782 move_table
*x_may_move_out_cost
[MAX_MACHINE_MODE
];
784 /* Keep track of the last mode we initialized move costs for. */
785 int x_last_mode_for_init_move_cost
;
787 /* Array based on TARGET_REGISTER_MOVE_COST. Don't use
788 ira_register_move_cost directly. Use function of
789 ira_get_may_move_cost instead. */
790 move_table
*x_ira_register_move_cost
[MAX_MACHINE_MODE
];
792 /* Array analogs of the macros MEMORY_MOVE_COST and
793 REGISTER_MOVE_COST but they contain maximal cost not minimal as
794 the previous two ones do. */
795 short int x_ira_max_memory_move_cost
[MAX_MACHINE_MODE
][N_REG_CLASSES
][2];
796 move_table
*x_ira_max_register_move_cost
[MAX_MACHINE_MODE
];
798 /* Similar to may_move_in_cost but it is calculated in IRA instead of
799 regclass. Another difference we take only available hard registers
800 into account to figure out that one register class is a subset of
801 the another one. Don't use it directly. Use function of
802 ira_get_may_move_cost instead. */
803 move_table
*x_ira_may_move_in_cost
[MAX_MACHINE_MODE
];
805 /* Similar to may_move_out_cost but it is calculated in IRA instead of
806 regclass. Another difference we take only available hard registers
807 into account to figure out that one register class is a subset of
808 the another one. Don't use it directly. Use function of
809 ira_get_may_move_cost instead. */
810 move_table
*x_ira_may_move_out_cost
[MAX_MACHINE_MODE
];
812 /* Similar to ira_may_move_in_cost and ira_may_move_out_cost but they
813 return maximal cost. */
814 move_table
*x_ira_max_may_move_in_cost
[MAX_MACHINE_MODE
];
815 move_table
*x_ira_max_may_move_out_cost
[MAX_MACHINE_MODE
];
817 /* Map class->true if class is a possible allocno class, false
819 bool x_ira_reg_allocno_class_p
[N_REG_CLASSES
];
821 /* Map class->true if class is a pressure class, false otherwise. */
822 bool x_ira_reg_pressure_class_p
[N_REG_CLASSES
];
824 /* Register class subset relation: TRUE if the first class is a subset
825 of the second one considering only hard registers available for the
827 int x_ira_class_subset_p
[N_REG_CLASSES
][N_REG_CLASSES
];
829 /* Array of the number of hard registers of given class which are
830 available for allocation. The order is defined by the hard
832 short x_ira_non_ordered_class_hard_regs
[N_REG_CLASSES
][FIRST_PSEUDO_REGISTER
];
834 /* Index (in ira_class_hard_regs; for given register class and hard
835 register (in general case a hard register can belong to several
836 register classes;. The index is negative for hard registers
837 unavailable for the allocation. */
838 short x_ira_class_hard_reg_index
[N_REG_CLASSES
][FIRST_PSEUDO_REGISTER
];
840 /* Array whose values are hard regset of hard registers available for
841 the allocation of given register class whose HARD_REGNO_MODE_OK
842 values for given mode are zero. */
843 HARD_REG_SET x_ira_prohibited_class_mode_regs
[N_REG_CLASSES
][NUM_MACHINE_MODES
];
845 /* The value is number of elements in the subsequent array. */
846 int x_ira_important_classes_num
;
848 /* The array containing all non-empty classes. Such classes is
849 important for calculation of the hard register usage costs. */
850 enum reg_class x_ira_important_classes
[N_REG_CLASSES
];
852 /* The array containing indexes of important classes in the previous
853 array. The array elements are defined only for important
855 int x_ira_important_class_nums
[N_REG_CLASSES
];
857 /* The biggest important class inside of intersection of the two
858 classes (that is calculated taking only hard registers available
859 for allocation into account;. If the both classes contain no hard
860 registers available for allocation, the value is calculated with
861 taking all hard-registers including fixed ones into account. */
862 enum reg_class x_ira_reg_class_intersect
[N_REG_CLASSES
][N_REG_CLASSES
];
864 /* True if the two classes (that is calculated taking only hard
865 registers available for allocation into account; are
867 bool x_ira_reg_classes_intersect_p
[N_REG_CLASSES
][N_REG_CLASSES
];
869 /* Classes with end marker LIM_REG_CLASSES which are intersected with
870 given class (the first index;. That includes given class itself.
871 This is calculated taking only hard registers available for
872 allocation into account. */
873 enum reg_class x_ira_reg_class_super_classes
[N_REG_CLASSES
][N_REG_CLASSES
];
875 /* The biggest (smallest) important class inside of (covering) union
876 of the two classes (that is calculated taking only hard registers
877 available for allocation into account). If the both classes
878 contain no hard registers available for allocation, the value is
879 calculated with taking all hard-registers including fixed ones
880 into account. In other words, the value is the corresponding
881 reg_class_subunion (reg_class_superunion) value. */
882 enum reg_class x_ira_reg_class_subunion
[N_REG_CLASSES
][N_REG_CLASSES
];
883 enum reg_class x_ira_reg_class_superunion
[N_REG_CLASSES
][N_REG_CLASSES
];
885 /* For each reg class, table listing all the classes contained in it
886 (excluding the class itself. Non-allocatable registers are
887 excluded from the consideration;. */
888 enum reg_class x_alloc_reg_class_subclasses
[N_REG_CLASSES
][N_REG_CLASSES
];
890 /* Array whose values are hard regset of hard registers for which
891 move of the hard register in given mode into itself is
893 HARD_REG_SET x_ira_prohibited_mode_move_regs
[NUM_MACHINE_MODES
];
895 /* Flag of that the above array has been initialized. */
896 bool x_ira_prohibited_mode_move_regs_initialized_p
;
899 extern struct target_ira_int default_target_ira_int
;
900 #if SWITCHABLE_TARGET
901 extern struct target_ira_int
*this_target_ira_int
;
903 #define this_target_ira_int (&default_target_ira_int)
906 #define ira_reg_mode_hard_regset \
907 (this_target_ira_int->x_ira_reg_mode_hard_regset)
909 (this_target_ira_int->x_move_cost)
910 #define may_move_in_cost \
911 (this_target_ira_int->x_may_move_in_cost)
912 #define may_move_out_cost \
913 (this_target_ira_int->x_may_move_out_cost)
914 #define ira_register_move_cost \
915 (this_target_ira_int->x_ira_register_move_cost)
916 #define ira_max_memory_move_cost \
917 (this_target_ira_int->x_ira_max_memory_move_cost)
918 #define ira_max_register_move_cost \
919 (this_target_ira_int->x_ira_max_register_move_cost)
920 #define ira_may_move_in_cost \
921 (this_target_ira_int->x_ira_may_move_in_cost)
922 #define ira_may_move_out_cost \
923 (this_target_ira_int->x_ira_may_move_out_cost)
924 #define ira_max_may_move_in_cost \
925 (this_target_ira_int->x_ira_max_may_move_in_cost)
926 #define ira_max_may_move_out_cost \
927 (this_target_ira_int->x_ira_max_may_move_out_cost)
928 #define ira_reg_allocno_class_p \
929 (this_target_ira_int->x_ira_reg_allocno_class_p)
930 #define ira_reg_pressure_class_p \
931 (this_target_ira_int->x_ira_reg_pressure_class_p)
932 #define ira_class_subset_p \
933 (this_target_ira_int->x_ira_class_subset_p)
934 #define ira_non_ordered_class_hard_regs \
935 (this_target_ira_int->x_ira_non_ordered_class_hard_regs)
936 #define ira_class_hard_reg_index \
937 (this_target_ira_int->x_ira_class_hard_reg_index)
938 #define ira_prohibited_class_mode_regs \
939 (this_target_ira_int->x_ira_prohibited_class_mode_regs)
940 #define ira_important_classes_num \
941 (this_target_ira_int->x_ira_important_classes_num)
942 #define ira_important_classes \
943 (this_target_ira_int->x_ira_important_classes)
944 #define ira_important_class_nums \
945 (this_target_ira_int->x_ira_important_class_nums)
946 #define ira_reg_class_intersect \
947 (this_target_ira_int->x_ira_reg_class_intersect)
948 #define ira_reg_classes_intersect_p \
949 (this_target_ira_int->x_ira_reg_classes_intersect_p)
950 #define ira_reg_class_super_classes \
951 (this_target_ira_int->x_ira_reg_class_super_classes)
952 #define ira_reg_class_subunion \
953 (this_target_ira_int->x_ira_reg_class_subunion)
954 #define ira_reg_class_superunion \
955 (this_target_ira_int->x_ira_reg_class_superunion)
956 #define ira_prohibited_mode_move_regs \
957 (this_target_ira_int->x_ira_prohibited_mode_move_regs)
961 extern void *ira_allocate (size_t);
962 extern void ira_free (void *addr
);
963 extern bitmap
ira_allocate_bitmap (void);
964 extern void ira_free_bitmap (bitmap
);
965 extern void ira_print_disposition (FILE *);
966 extern void ira_debug_disposition (void);
967 extern void ira_debug_allocno_classes (void);
968 extern void ira_init_register_move_cost (enum machine_mode
);
970 /* The length of the two following arrays. */
971 extern int ira_reg_equiv_len
;
973 /* The element value is TRUE if the corresponding regno value is
975 extern bool *ira_reg_equiv_invariant_p
;
977 /* The element value is equiv constant of given pseudo-register or
979 extern rtx
*ira_reg_equiv_const
;
983 /* The current loop tree node and its regno allocno map. */
984 extern ira_loop_tree_node_t ira_curr_loop_tree_node
;
985 extern ira_allocno_t
*ira_curr_regno_allocno_map
;
987 extern void ira_debug_copy (ira_copy_t
);
988 extern void ira_debug_copies (void);
989 extern void ira_debug_allocno_copies (ira_allocno_t
);
991 extern void ira_traverse_loop_tree (bool, ira_loop_tree_node_t
,
992 void (*) (ira_loop_tree_node_t
),
993 void (*) (ira_loop_tree_node_t
));
994 extern ira_allocno_t
ira_parent_allocno (ira_allocno_t
);
995 extern ira_allocno_t
ira_parent_or_cap_allocno (ira_allocno_t
);
996 extern ira_allocno_t
ira_create_allocno (int, bool, ira_loop_tree_node_t
);
997 extern void ira_create_allocno_objects (ira_allocno_t
);
998 extern void ira_set_allocno_class (ira_allocno_t
, enum reg_class
);
999 extern bool ira_conflict_vector_profitable_p (ira_object_t
, int);
1000 extern void ira_allocate_conflict_vec (ira_object_t
, int);
1001 extern void ira_allocate_object_conflicts (ira_object_t
, int);
1002 extern void ior_hard_reg_conflicts (ira_allocno_t
, HARD_REG_SET
*);
1003 extern void ira_print_expanded_allocno (ira_allocno_t
);
1004 extern void ira_add_live_range_to_object (ira_object_t
, int, int);
1005 extern live_range_t
ira_create_live_range (ira_object_t
, int, int,
1007 extern live_range_t
ira_copy_live_range_list (live_range_t
);
1008 extern live_range_t
ira_merge_live_ranges (live_range_t
, live_range_t
);
1009 extern bool ira_live_ranges_intersect_p (live_range_t
, live_range_t
);
1010 extern void ira_finish_live_range (live_range_t
);
1011 extern void ira_finish_live_range_list (live_range_t
);
1012 extern void ira_free_allocno_updated_costs (ira_allocno_t
);
1013 extern ira_copy_t
ira_create_copy (ira_allocno_t
, ira_allocno_t
,
1014 int, bool, rtx
, ira_loop_tree_node_t
);
1015 extern void ira_add_allocno_copy_to_list (ira_copy_t
);
1016 extern void ira_swap_allocno_copy_ends_if_necessary (ira_copy_t
);
1017 extern ira_copy_t
ira_add_allocno_copy (ira_allocno_t
, ira_allocno_t
, int,
1018 bool, rtx
, ira_loop_tree_node_t
);
1020 extern int *ira_allocate_cost_vector (reg_class_t
);
1021 extern void ira_free_cost_vector (int *, reg_class_t
);
1023 extern void ira_flattening (int, int);
1024 extern bool ira_build (void);
1025 extern void ira_destroy (void);
1028 extern void ira_init_costs_once (void);
1029 extern void ira_init_costs (void);
1030 extern void ira_finish_costs_once (void);
1031 extern void ira_costs (void);
1032 extern void ira_tune_allocno_costs (void);
1036 extern void ira_rebuild_start_finish_chains (void);
1037 extern void ira_print_live_range_list (FILE *, live_range_t
);
1038 extern void ira_debug_live_range_list (live_range_t
);
1039 extern void ira_debug_allocno_live_ranges (ira_allocno_t
);
1040 extern void ira_debug_live_ranges (void);
1041 extern void ira_create_allocno_live_ranges (void);
1042 extern void ira_compress_allocno_live_ranges (void);
1043 extern void ira_finish_allocno_live_ranges (void);
1045 /* ira-conflicts.c */
1046 extern void ira_debug_conflicts (bool);
1047 extern void ira_build_conflicts (void);
1050 extern void ira_debug_hard_regs_forest (void);
1051 extern int ira_loop_edge_freq (ira_loop_tree_node_t
, int, bool);
1052 extern void ira_reassign_conflict_allocnos (int);
1053 extern void ira_initiate_assign (void);
1054 extern void ira_finish_assign (void);
1055 extern void ira_color (void);
1058 extern void ira_initiate_emit_data (void);
1059 extern void ira_finish_emit_data (void);
1060 extern void ira_emit (bool);
1064 /* Initialize register costs for MODE if necessary. */
1066 ira_init_register_move_cost_if_necessary (enum machine_mode mode
)
1068 if (ira_register_move_cost
[mode
] == NULL
)
1069 ira_init_register_move_cost (mode
);
1074 /* The iterator for all allocnos. */
1076 /* The number of the current element in IRA_ALLOCNOS. */
1078 } ira_allocno_iterator
;
1080 /* Initialize the iterator I. */
1082 ira_allocno_iter_init (ira_allocno_iterator
*i
)
1087 /* Return TRUE if we have more allocnos to visit, in which case *A is
1088 set to the allocno to be visited. Otherwise, return FALSE. */
1090 ira_allocno_iter_cond (ira_allocno_iterator
*i
, ira_allocno_t
*a
)
1094 for (n
= i
->n
; n
< ira_allocnos_num
; n
++)
1095 if (ira_allocnos
[n
] != NULL
)
1097 *a
= ira_allocnos
[n
];
1104 /* Loop over all allocnos. In each iteration, A is set to the next
1105 allocno. ITER is an instance of ira_allocno_iterator used to iterate
1107 #define FOR_EACH_ALLOCNO(A, ITER) \
1108 for (ira_allocno_iter_init (&(ITER)); \
1109 ira_allocno_iter_cond (&(ITER), &(A));)
1111 /* The iterator for all objects. */
1113 /* The number of the current element in ira_object_id_map. */
1115 } ira_object_iterator
;
1117 /* Initialize the iterator I. */
1119 ira_object_iter_init (ira_object_iterator
*i
)
1124 /* Return TRUE if we have more objects to visit, in which case *OBJ is
1125 set to the object to be visited. Otherwise, return FALSE. */
1127 ira_object_iter_cond (ira_object_iterator
*i
, ira_object_t
*obj
)
1131 for (n
= i
->n
; n
< ira_objects_num
; n
++)
1132 if (ira_object_id_map
[n
] != NULL
)
1134 *obj
= ira_object_id_map
[n
];
1141 /* Loop over all objects. In each iteration, OBJ is set to the next
1142 object. ITER is an instance of ira_object_iterator used to iterate
1144 #define FOR_EACH_OBJECT(OBJ, ITER) \
1145 for (ira_object_iter_init (&(ITER)); \
1146 ira_object_iter_cond (&(ITER), &(OBJ));)
1148 /* The iterator for objects associated with an allocno. */
1150 /* The number of the element the allocno's object array. */
1152 } ira_allocno_object_iterator
;
1154 /* Initialize the iterator I. */
1156 ira_allocno_object_iter_init (ira_allocno_object_iterator
*i
)
1161 /* Return TRUE if we have more objects to visit in allocno A, in which
1162 case *O is set to the object to be visited. Otherwise, return
1165 ira_allocno_object_iter_cond (ira_allocno_object_iterator
*i
, ira_allocno_t a
,
1169 if (n
< ALLOCNO_NUM_OBJECTS (a
))
1171 *o
= ALLOCNO_OBJECT (a
, n
);
1177 /* Loop over all objects associated with allocno A. In each
1178 iteration, O is set to the next object. ITER is an instance of
1179 ira_allocno_object_iterator used to iterate the conflicts. */
1180 #define FOR_EACH_ALLOCNO_OBJECT(A, O, ITER) \
1181 for (ira_allocno_object_iter_init (&(ITER)); \
1182 ira_allocno_object_iter_cond (&(ITER), (A), &(O));)
1185 /* The iterator for copies. */
1187 /* The number of the current element in IRA_COPIES. */
1189 } ira_copy_iterator
;
1191 /* Initialize the iterator I. */
1193 ira_copy_iter_init (ira_copy_iterator
*i
)
1198 /* Return TRUE if we have more copies to visit, in which case *CP is
1199 set to the copy to be visited. Otherwise, return FALSE. */
1201 ira_copy_iter_cond (ira_copy_iterator
*i
, ira_copy_t
*cp
)
1205 for (n
= i
->n
; n
< ira_copies_num
; n
++)
1206 if (ira_copies
[n
] != NULL
)
1208 *cp
= ira_copies
[n
];
1215 /* Loop over all copies. In each iteration, C is set to the next
1216 copy. ITER is an instance of ira_copy_iterator used to iterate
1218 #define FOR_EACH_COPY(C, ITER) \
1219 for (ira_copy_iter_init (&(ITER)); \
1220 ira_copy_iter_cond (&(ITER), &(C));)
1222 /* The iterator for object conflicts. */
1225 /* TRUE if the conflicts are represented by vector of allocnos. */
1226 bool conflict_vec_p
;
1228 /* The conflict vector or conflict bit vector. */
1231 /* The number of the current element in the vector (of type
1232 ira_object_t or IRA_INT_TYPE). */
1233 unsigned int word_num
;
1235 /* The bit vector size. It is defined only if
1236 OBJECT_CONFLICT_VEC_P is FALSE. */
1239 /* The current bit index of bit vector. It is defined only if
1240 OBJECT_CONFLICT_VEC_P is FALSE. */
1241 unsigned int bit_num
;
1243 /* The object id corresponding to the 1st bit of the bit vector. It
1244 is defined only if OBJECT_CONFLICT_VEC_P is FALSE. */
1245 int base_conflict_id
;
1247 /* The word of bit vector currently visited. It is defined only if
1248 OBJECT_CONFLICT_VEC_P is FALSE. */
1249 unsigned IRA_INT_TYPE word
;
1250 } ira_object_conflict_iterator
;
1252 /* Initialize the iterator I with ALLOCNO conflicts. */
1254 ira_object_conflict_iter_init (ira_object_conflict_iterator
*i
,
1257 i
->conflict_vec_p
= OBJECT_CONFLICT_VEC_P (obj
);
1258 i
->vec
= OBJECT_CONFLICT_ARRAY (obj
);
1260 if (i
->conflict_vec_p
)
1261 i
->size
= i
->bit_num
= i
->base_conflict_id
= i
->word
= 0;
1264 if (OBJECT_MIN (obj
) > OBJECT_MAX (obj
))
1267 i
->size
= ((OBJECT_MAX (obj
) - OBJECT_MIN (obj
)
1269 / IRA_INT_BITS
) * sizeof (IRA_INT_TYPE
);
1271 i
->base_conflict_id
= OBJECT_MIN (obj
);
1272 i
->word
= (i
->size
== 0 ? 0 : ((IRA_INT_TYPE
*) i
->vec
)[0]);
1276 /* Return TRUE if we have more conflicting allocnos to visit, in which
1277 case *A is set to the allocno to be visited. Otherwise, return
1280 ira_object_conflict_iter_cond (ira_object_conflict_iterator
*i
,
1285 if (i
->conflict_vec_p
)
1287 obj
= ((ira_object_t
*) i
->vec
)[i
->word_num
++];
1293 unsigned IRA_INT_TYPE word
= i
->word
;
1294 unsigned int bit_num
= i
->bit_num
;
1296 /* Skip words that are zeros. */
1297 for (; word
== 0; word
= ((IRA_INT_TYPE
*) i
->vec
)[i
->word_num
])
1301 /* If we have reached the end, break. */
1302 if (i
->word_num
* sizeof (IRA_INT_TYPE
) >= i
->size
)
1305 bit_num
= i
->word_num
* IRA_INT_BITS
;
1308 /* Skip bits that are zero. */
1309 for (; (word
& 1) == 0; word
>>= 1)
1312 obj
= ira_object_id_map
[bit_num
+ i
->base_conflict_id
];
1313 i
->bit_num
= bit_num
+ 1;
1314 i
->word
= word
>> 1;
1321 /* Loop over all objects conflicting with OBJ. In each iteration,
1322 CONF is set to the next conflicting object. ITER is an instance
1323 of ira_object_conflict_iterator used to iterate the conflicts. */
1324 #define FOR_EACH_OBJECT_CONFLICT(OBJ, CONF, ITER) \
1325 for (ira_object_conflict_iter_init (&(ITER), (OBJ)); \
1326 ira_object_conflict_iter_cond (&(ITER), &(CONF));)
1330 /* The function returns TRUE if at least one hard register from ones
1331 starting with HARD_REGNO and containing value of MODE are in set
1334 ira_hard_reg_set_intersection_p (int hard_regno
, enum machine_mode mode
,
1335 HARD_REG_SET hard_regset
)
1339 gcc_assert (hard_regno
>= 0);
1340 for (i
= hard_regno_nregs
[hard_regno
][mode
] - 1; i
>= 0; i
--)
1341 if (TEST_HARD_REG_BIT (hard_regset
, hard_regno
+ i
))
1346 /* Return number of hard registers in hard register SET. */
1348 hard_reg_set_size (HARD_REG_SET set
)
1352 for (size
= i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
1353 if (TEST_HARD_REG_BIT (set
, i
))
1358 /* The function returns TRUE if hard registers starting with
1359 HARD_REGNO and containing value of MODE are fully in set
1362 ira_hard_reg_in_set_p (int hard_regno
, enum machine_mode mode
,
1363 HARD_REG_SET hard_regset
)
1367 ira_assert (hard_regno
>= 0);
1368 for (i
= hard_regno_nregs
[hard_regno
][mode
] - 1; i
>= 0; i
--)
1369 if (!TEST_HARD_REG_BIT (hard_regset
, hard_regno
+ i
))
1376 /* To save memory we use a lazy approach for allocation and
1377 initialization of the cost vectors. We do this only when it is
1378 really necessary. */
1380 /* Allocate cost vector *VEC for hard registers of ACLASS and
1381 initialize the elements by VAL if it is necessary */
1383 ira_allocate_and_set_costs (int **vec
, reg_class_t aclass
, int val
)
1390 *vec
= reg_costs
= ira_allocate_cost_vector (aclass
);
1391 len
= ira_class_hard_regs_num
[(int) aclass
];
1392 for (i
= 0; i
< len
; i
++)
1396 /* Allocate cost vector *VEC for hard registers of ACLASS and copy
1397 values of vector SRC into the vector if it is necessary */
1399 ira_allocate_and_copy_costs (int **vec
, enum reg_class aclass
, int *src
)
1403 if (*vec
!= NULL
|| src
== NULL
)
1405 *vec
= ira_allocate_cost_vector (aclass
);
1406 len
= ira_class_hard_regs_num
[aclass
];
1407 memcpy (*vec
, src
, sizeof (int) * len
);
1410 /* Allocate cost vector *VEC for hard registers of ACLASS and add
1411 values of vector SRC into the vector if it is necessary */
1413 ira_allocate_and_accumulate_costs (int **vec
, enum reg_class aclass
, int *src
)
1419 len
= ira_class_hard_regs_num
[aclass
];
1422 *vec
= ira_allocate_cost_vector (aclass
);
1423 memset (*vec
, 0, sizeof (int) * len
);
1425 for (i
= 0; i
< len
; i
++)
1426 (*vec
)[i
] += src
[i
];
1429 /* Allocate cost vector *VEC for hard registers of ACLASS and copy
1430 values of vector SRC into the vector or initialize it by VAL (if
1433 ira_allocate_and_set_or_copy_costs (int **vec
, enum reg_class aclass
,
1441 *vec
= reg_costs
= ira_allocate_cost_vector (aclass
);
1442 len
= ira_class_hard_regs_num
[aclass
];
1444 memcpy (reg_costs
, src
, sizeof (int) * len
);
1447 for (i
= 0; i
< len
; i
++)
1452 extern rtx
ira_create_new_reg (rtx
);
1453 extern int first_moveable_pseudo
, last_moveable_pseudo
;