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flow.c (life_analysis_1): Do not clobber regs_ever_live after reload.
[gcc.git] / gcc / jump.c
1 /* Optimize jump instructions, for GNU compiler.
2 Copyright (C) 1987, 88, 89, 91-97, 1998 Free Software Foundation, Inc.
3
4 This file is part of GNU CC.
5
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
9 any later version.
10
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
20
21
22 /* This is the jump-optimization pass of the compiler.
23 It is run two or three times: once before cse, sometimes once after cse,
24 and once after reload (before final).
25
26 jump_optimize deletes unreachable code and labels that are not used.
27 It also deletes jumps that jump to the following insn,
28 and simplifies jumps around unconditional jumps and jumps
29 to unconditional jumps.
30
31 Each CODE_LABEL has a count of the times it is used
32 stored in the LABEL_NUSES internal field, and each JUMP_INSN
33 has one label that it refers to stored in the
34 JUMP_LABEL internal field. With this we can detect labels that
35 become unused because of the deletion of all the jumps that
36 formerly used them. The JUMP_LABEL info is sometimes looked
37 at by later passes.
38
39 Optionally, cross-jumping can be done. Currently it is done
40 only the last time (when after reload and before final).
41 In fact, the code for cross-jumping now assumes that register
42 allocation has been done, since it uses `rtx_renumbered_equal_p'.
43
44 Jump optimization is done after cse when cse's constant-propagation
45 causes jumps to become unconditional or to be deleted.
46
47 Unreachable loops are not detected here, because the labels
48 have references and the insns appear reachable from the labels.
49 find_basic_blocks in flow.c finds and deletes such loops.
50
51 The subroutines delete_insn, redirect_jump, and invert_jump are used
52 from other passes as well. */
53
54 #include "config.h"
55 #include "system.h"
56 #include "rtl.h"
57 #include "flags.h"
58 #include "hard-reg-set.h"
59 #include "regs.h"
60 #include "insn-config.h"
61 #include "insn-flags.h"
62 #include "recog.h"
63 #include "expr.h"
64 #include "real.h"
65 #include "except.h"
66 #include "toplev.h"
67
68 /* ??? Eventually must record somehow the labels used by jumps
69 from nested functions. */
70 /* Pre-record the next or previous real insn for each label?
71 No, this pass is very fast anyway. */
72 /* Condense consecutive labels?
73 This would make life analysis faster, maybe. */
74 /* Optimize jump y; x: ... y: jumpif... x?
75 Don't know if it is worth bothering with. */
76 /* Optimize two cases of conditional jump to conditional jump?
77 This can never delete any instruction or make anything dead,
78 or even change what is live at any point.
79 So perhaps let combiner do it. */
80
81 /* Vector indexed by uid.
82 For each CODE_LABEL, index by its uid to get first unconditional jump
83 that jumps to the label.
84 For each JUMP_INSN, index by its uid to get the next unconditional jump
85 that jumps to the same label.
86 Element 0 is the start of a chain of all return insns.
87 (It is safe to use element 0 because insn uid 0 is not used. */
88
89 static rtx *jump_chain;
90
91 /* List of labels referred to from initializers.
92 These can never be deleted. */
93 rtx forced_labels;
94
95 /* Maximum index in jump_chain. */
96
97 static int max_jump_chain;
98
99 /* Set nonzero by jump_optimize if control can fall through
100 to the end of the function. */
101 int can_reach_end;
102
103 /* Indicates whether death notes are significant in cross jump analysis.
104 Normally they are not significant, because of A and B jump to C,
105 and R dies in A, it must die in B. But this might not be true after
106 stack register conversion, and we must compare death notes in that
107 case. */
108
109 static int cross_jump_death_matters = 0;
110
111 static int duplicate_loop_exit_test PROTO((rtx));
112 static void find_cross_jump PROTO((rtx, rtx, int, rtx *, rtx *));
113 static void do_cross_jump PROTO((rtx, rtx, rtx));
114 static int jump_back_p PROTO((rtx, rtx));
115 static int tension_vector_labels PROTO((rtx, int));
116 static void mark_jump_label PROTO((rtx, rtx, int));
117 static void delete_computation PROTO((rtx));
118 static void delete_from_jump_chain PROTO((rtx));
119 static int delete_labelref_insn PROTO((rtx, rtx, int));
120 static void mark_modified_reg PROTO((rtx, rtx));
121 static void redirect_tablejump PROTO((rtx, rtx));
122 #ifndef HAVE_cc0
123 static rtx find_insert_position PROTO((rtx, rtx));
124 #endif
125 \f
126 /* Delete no-op jumps and optimize jumps to jumps
127 and jumps around jumps.
128 Delete unused labels and unreachable code.
129
130 If CROSS_JUMP is 1, detect matching code
131 before a jump and its destination and unify them.
132 If CROSS_JUMP is 2, do cross-jumping, but pay attention to death notes.
133
134 If NOOP_MOVES is nonzero, delete no-op move insns.
135
136 If AFTER_REGSCAN is nonzero, then this jump pass is being run immediately
137 after regscan, and it is safe to use regno_first_uid and regno_last_uid.
138
139 If `optimize' is zero, don't change any code,
140 just determine whether control drops off the end of the function.
141 This case occurs when we have -W and not -O.
142 It works because `delete_insn' checks the value of `optimize'
143 and refrains from actually deleting when that is 0. */
144
145 void
146 jump_optimize (f, cross_jump, noop_moves, after_regscan)
147 rtx f;
148 int cross_jump;
149 int noop_moves;
150 int after_regscan;
151 {
152 register rtx insn, next, note;
153 int changed;
154 int old_max_reg;
155 int first = 1;
156 int max_uid = 0;
157 rtx last_insn;
158
159 cross_jump_death_matters = (cross_jump == 2);
160
161 /* Initialize LABEL_NUSES and JUMP_LABEL fields. Delete any REG_LABEL
162 notes whose labels don't occur in the insn any more. */
163
164 for (insn = f; insn; insn = NEXT_INSN (insn))
165 {
166 if (GET_CODE (insn) == CODE_LABEL)
167 LABEL_NUSES (insn) = (LABEL_PRESERVE_P (insn) != 0);
168 else if (GET_CODE (insn) == JUMP_INSN)
169 JUMP_LABEL (insn) = 0;
170 else if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
171 for (note = REG_NOTES (insn); note; note = next)
172 {
173 next = XEXP (note, 1);
174 if (REG_NOTE_KIND (note) == REG_LABEL
175 && ! reg_mentioned_p (XEXP (note, 0), PATTERN (insn)))
176 remove_note (insn, note);
177 }
178
179 if (INSN_UID (insn) > max_uid)
180 max_uid = INSN_UID (insn);
181 }
182
183 max_uid++;
184
185 /* Delete insns following barriers, up to next label. */
186
187 for (insn = f; insn;)
188 {
189 if (GET_CODE (insn) == BARRIER)
190 {
191 insn = NEXT_INSN (insn);
192 while (insn != 0 && GET_CODE (insn) != CODE_LABEL)
193 {
194 if (GET_CODE (insn) == NOTE
195 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_FUNCTION_END)
196 insn = NEXT_INSN (insn);
197 else
198 insn = delete_insn (insn);
199 }
200 /* INSN is now the code_label. */
201 }
202 else
203 insn = NEXT_INSN (insn);
204 }
205
206 /* Leave some extra room for labels and duplicate exit test insns
207 we make. */
208 max_jump_chain = max_uid * 14 / 10;
209 jump_chain = (rtx *) alloca (max_jump_chain * sizeof (rtx));
210 bzero ((char *) jump_chain, max_jump_chain * sizeof (rtx));
211
212 /* Mark the label each jump jumps to.
213 Combine consecutive labels, and count uses of labels.
214
215 For each label, make a chain (using `jump_chain')
216 of all the *unconditional* jumps that jump to it;
217 also make a chain of all returns. */
218
219 for (insn = f; insn; insn = NEXT_INSN (insn))
220 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
221 {
222 mark_jump_label (PATTERN (insn), insn, cross_jump);
223 if (! INSN_DELETED_P (insn) && GET_CODE (insn) == JUMP_INSN)
224 {
225 if (JUMP_LABEL (insn) != 0 && simplejump_p (insn))
226 {
227 jump_chain[INSN_UID (insn)]
228 = jump_chain[INSN_UID (JUMP_LABEL (insn))];
229 jump_chain[INSN_UID (JUMP_LABEL (insn))] = insn;
230 }
231 if (GET_CODE (PATTERN (insn)) == RETURN)
232 {
233 jump_chain[INSN_UID (insn)] = jump_chain[0];
234 jump_chain[0] = insn;
235 }
236 }
237 }
238
239 /* Keep track of labels used from static data;
240 they cannot ever be deleted. */
241
242 for (insn = forced_labels; insn; insn = XEXP (insn, 1))
243 LABEL_NUSES (XEXP (insn, 0))++;
244
245 check_exception_handler_labels ();
246
247 /* Keep track of labels used for marking handlers for exception
248 regions; they cannot usually be deleted. */
249
250 for (insn = exception_handler_labels; insn; insn = XEXP (insn, 1))
251 LABEL_NUSES (XEXP (insn, 0))++;
252
253 exception_optimize ();
254
255 /* Delete all labels already not referenced.
256 Also find the last insn. */
257
258 last_insn = 0;
259 for (insn = f; insn; )
260 {
261 if (GET_CODE (insn) == CODE_LABEL && LABEL_NUSES (insn) == 0)
262 insn = delete_insn (insn);
263 else
264 {
265 last_insn = insn;
266 insn = NEXT_INSN (insn);
267 }
268 }
269
270 if (!optimize)
271 {
272 /* See if there is still a NOTE_INSN_FUNCTION_END in this function.
273 If so record that this function can drop off the end. */
274
275 insn = last_insn;
276 {
277 int n_labels = 1;
278 while (insn
279 /* One label can follow the end-note: the return label. */
280 && ((GET_CODE (insn) == CODE_LABEL && n_labels-- > 0)
281 /* Ordinary insns can follow it if returning a structure. */
282 || GET_CODE (insn) == INSN
283 /* If machine uses explicit RETURN insns, no epilogue,
284 then one of them follows the note. */
285 || (GET_CODE (insn) == JUMP_INSN
286 && GET_CODE (PATTERN (insn)) == RETURN)
287 /* A barrier can follow the return insn. */
288 || GET_CODE (insn) == BARRIER
289 /* Other kinds of notes can follow also. */
290 || (GET_CODE (insn) == NOTE
291 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_FUNCTION_END)))
292 insn = PREV_INSN (insn);
293 }
294
295 /* Report if control can fall through at the end of the function. */
296 if (insn && GET_CODE (insn) == NOTE
297 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_FUNCTION_END
298 && ! INSN_DELETED_P (insn))
299 can_reach_end = 1;
300
301 /* Zero the "deleted" flag of all the "deleted" insns. */
302 for (insn = f; insn; insn = NEXT_INSN (insn))
303 INSN_DELETED_P (insn) = 0;
304
305 /* Show that the jump chain is not valid. */
306 jump_chain = 0;
307 return;
308 }
309
310 #ifdef HAVE_return
311 if (HAVE_return)
312 {
313 /* If we fall through to the epilogue, see if we can insert a RETURN insn
314 in front of it. If the machine allows it at this point (we might be
315 after reload for a leaf routine), it will improve optimization for it
316 to be there. */
317 insn = get_last_insn ();
318 while (insn && GET_CODE (insn) == NOTE)
319 insn = PREV_INSN (insn);
320
321 if (insn && GET_CODE (insn) != BARRIER)
322 {
323 emit_jump_insn (gen_return ());
324 emit_barrier ();
325 }
326 }
327 #endif
328
329 if (noop_moves)
330 for (insn = f; insn; )
331 {
332 next = NEXT_INSN (insn);
333
334 if (GET_CODE (insn) == INSN)
335 {
336 register rtx body = PATTERN (insn);
337
338 /* Combine stack_adjusts with following push_insns. */
339 #ifdef PUSH_ROUNDING
340 if (GET_CODE (body) == SET
341 && SET_DEST (body) == stack_pointer_rtx
342 && GET_CODE (SET_SRC (body)) == PLUS
343 && XEXP (SET_SRC (body), 0) == stack_pointer_rtx
344 && GET_CODE (XEXP (SET_SRC (body), 1)) == CONST_INT
345 && INTVAL (XEXP (SET_SRC (body), 1)) > 0)
346 {
347 rtx p;
348 rtx stack_adjust_insn = insn;
349 int stack_adjust_amount = INTVAL (XEXP (SET_SRC (body), 1));
350 int total_pushed = 0;
351 int pushes = 0;
352
353 /* Find all successive push insns. */
354 p = insn;
355 /* Don't convert more than three pushes;
356 that starts adding too many displaced addresses
357 and the whole thing starts becoming a losing
358 proposition. */
359 while (pushes < 3)
360 {
361 rtx pbody, dest;
362 p = next_nonnote_insn (p);
363 if (p == 0 || GET_CODE (p) != INSN)
364 break;
365 pbody = PATTERN (p);
366 if (GET_CODE (pbody) != SET)
367 break;
368 dest = SET_DEST (pbody);
369 /* Allow a no-op move between the adjust and the push. */
370 if (GET_CODE (dest) == REG
371 && GET_CODE (SET_SRC (pbody)) == REG
372 && REGNO (dest) == REGNO (SET_SRC (pbody)))
373 continue;
374 if (! (GET_CODE (dest) == MEM
375 && GET_CODE (XEXP (dest, 0)) == POST_INC
376 && XEXP (XEXP (dest, 0), 0) == stack_pointer_rtx))
377 break;
378 pushes++;
379 if (total_pushed + GET_MODE_SIZE (GET_MODE (SET_DEST (pbody)))
380 > stack_adjust_amount)
381 break;
382 total_pushed += GET_MODE_SIZE (GET_MODE (SET_DEST (pbody)));
383 }
384
385 /* Discard the amount pushed from the stack adjust;
386 maybe eliminate it entirely. */
387 if (total_pushed >= stack_adjust_amount)
388 {
389 delete_computation (stack_adjust_insn);
390 total_pushed = stack_adjust_amount;
391 }
392 else
393 XEXP (SET_SRC (PATTERN (stack_adjust_insn)), 1)
394 = GEN_INT (stack_adjust_amount - total_pushed);
395
396 /* Change the appropriate push insns to ordinary stores. */
397 p = insn;
398 while (total_pushed > 0)
399 {
400 rtx pbody, dest;
401 p = next_nonnote_insn (p);
402 if (GET_CODE (p) != INSN)
403 break;
404 pbody = PATTERN (p);
405 if (GET_CODE (pbody) != SET)
406 break;
407 dest = SET_DEST (pbody);
408 /* Allow a no-op move between the adjust and the push. */
409 if (GET_CODE (dest) == REG
410 && GET_CODE (SET_SRC (pbody)) == REG
411 && REGNO (dest) == REGNO (SET_SRC (pbody)))
412 continue;
413 if (! (GET_CODE (dest) == MEM
414 && GET_CODE (XEXP (dest, 0)) == POST_INC
415 && XEXP (XEXP (dest, 0), 0) == stack_pointer_rtx))
416 break;
417 total_pushed -= GET_MODE_SIZE (GET_MODE (SET_DEST (pbody)));
418 /* If this push doesn't fully fit in the space
419 of the stack adjust that we deleted,
420 make another stack adjust here for what we
421 didn't use up. There should be peepholes
422 to recognize the resulting sequence of insns. */
423 if (total_pushed < 0)
424 {
425 emit_insn_before (gen_add2_insn (stack_pointer_rtx,
426 GEN_INT (- total_pushed)),
427 p);
428 break;
429 }
430 XEXP (dest, 0)
431 = plus_constant (stack_pointer_rtx, total_pushed);
432 }
433 }
434 #endif
435
436 /* Detect and delete no-op move instructions
437 resulting from not allocating a parameter in a register. */
438
439 if (GET_CODE (body) == SET
440 && (SET_DEST (body) == SET_SRC (body)
441 || (GET_CODE (SET_DEST (body)) == MEM
442 && GET_CODE (SET_SRC (body)) == MEM
443 && rtx_equal_p (SET_SRC (body), SET_DEST (body))))
444 && ! (GET_CODE (SET_DEST (body)) == MEM
445 && MEM_VOLATILE_P (SET_DEST (body)))
446 && ! (GET_CODE (SET_SRC (body)) == MEM
447 && MEM_VOLATILE_P (SET_SRC (body))))
448 delete_computation (insn);
449
450 /* Detect and ignore no-op move instructions
451 resulting from smart or fortuitous register allocation. */
452
453 else if (GET_CODE (body) == SET)
454 {
455 int sreg = true_regnum (SET_SRC (body));
456 int dreg = true_regnum (SET_DEST (body));
457
458 if (sreg == dreg && sreg >= 0)
459 delete_insn (insn);
460 else if (sreg >= 0 && dreg >= 0)
461 {
462 rtx trial;
463 rtx tem = find_equiv_reg (NULL_RTX, insn, 0,
464 sreg, NULL_PTR, dreg,
465 GET_MODE (SET_SRC (body)));
466
467 if (tem != 0
468 && GET_MODE (tem) == GET_MODE (SET_DEST (body)))
469 {
470 /* DREG may have been the target of a REG_DEAD note in
471 the insn which makes INSN redundant. If so, reorg
472 would still think it is dead. So search for such a
473 note and delete it if we find it. */
474 if (! find_regno_note (insn, REG_UNUSED, dreg))
475 for (trial = prev_nonnote_insn (insn);
476 trial && GET_CODE (trial) != CODE_LABEL;
477 trial = prev_nonnote_insn (trial))
478 if (find_regno_note (trial, REG_DEAD, dreg))
479 {
480 remove_death (dreg, trial);
481 break;
482 }
483
484 /* Deleting insn could lose a death-note for SREG. */
485 if ((trial = find_regno_note (insn, REG_DEAD, sreg)))
486 {
487 /* Change this into a USE so that we won't emit
488 code for it, but still can keep the note. */
489 PATTERN (insn)
490 = gen_rtx_USE (VOIDmode, XEXP (trial, 0));
491 INSN_CODE (insn) = -1;
492 /* Remove all reg notes but the REG_DEAD one. */
493 REG_NOTES (insn) = trial;
494 XEXP (trial, 1) = NULL_RTX;
495 }
496 else
497 delete_insn (insn);
498 }
499 }
500 else if (dreg >= 0 && CONSTANT_P (SET_SRC (body))
501 && find_equiv_reg (SET_SRC (body), insn, 0, dreg,
502 NULL_PTR, 0,
503 GET_MODE (SET_DEST (body))))
504 {
505 /* This handles the case where we have two consecutive
506 assignments of the same constant to pseudos that didn't
507 get a hard reg. Each SET from the constant will be
508 converted into a SET of the spill register and an
509 output reload will be made following it. This produces
510 two loads of the same constant into the same spill
511 register. */
512
513 rtx in_insn = insn;
514
515 /* Look back for a death note for the first reg.
516 If there is one, it is no longer accurate. */
517 while (in_insn && GET_CODE (in_insn) != CODE_LABEL)
518 {
519 if ((GET_CODE (in_insn) == INSN
520 || GET_CODE (in_insn) == JUMP_INSN)
521 && find_regno_note (in_insn, REG_DEAD, dreg))
522 {
523 remove_death (dreg, in_insn);
524 break;
525 }
526 in_insn = PREV_INSN (in_insn);
527 }
528
529 /* Delete the second load of the value. */
530 delete_insn (insn);
531 }
532 }
533 else if (GET_CODE (body) == PARALLEL)
534 {
535 /* If each part is a set between two identical registers or
536 a USE or CLOBBER, delete the insn. */
537 int i, sreg, dreg;
538 rtx tem;
539
540 for (i = XVECLEN (body, 0) - 1; i >= 0; i--)
541 {
542 tem = XVECEXP (body, 0, i);
543 if (GET_CODE (tem) == USE || GET_CODE (tem) == CLOBBER)
544 continue;
545
546 if (GET_CODE (tem) != SET
547 || (sreg = true_regnum (SET_SRC (tem))) < 0
548 || (dreg = true_regnum (SET_DEST (tem))) < 0
549 || dreg != sreg)
550 break;
551 }
552
553 if (i < 0)
554 delete_insn (insn);
555 }
556 /* Also delete insns to store bit fields if they are no-ops. */
557 /* Not worth the hair to detect this in the big-endian case. */
558 else if (! BYTES_BIG_ENDIAN
559 && GET_CODE (body) == SET
560 && GET_CODE (SET_DEST (body)) == ZERO_EXTRACT
561 && XEXP (SET_DEST (body), 2) == const0_rtx
562 && XEXP (SET_DEST (body), 0) == SET_SRC (body)
563 && ! (GET_CODE (SET_SRC (body)) == MEM
564 && MEM_VOLATILE_P (SET_SRC (body))))
565 delete_insn (insn);
566 }
567 insn = next;
568 }
569
570 /* If we haven't yet gotten to reload and we have just run regscan,
571 delete any insn that sets a register that isn't used elsewhere.
572 This helps some of the optimizations below by having less insns
573 being jumped around. */
574
575 if (! reload_completed && after_regscan)
576 for (insn = f; insn; insn = next)
577 {
578 rtx set = single_set (insn);
579
580 next = NEXT_INSN (insn);
581
582 if (set && GET_CODE (SET_DEST (set)) == REG
583 && REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER
584 && REGNO_FIRST_UID (REGNO (SET_DEST (set))) == INSN_UID (insn)
585 /* We use regno_last_note_uid so as not to delete the setting
586 of a reg that's used in notes. A subsequent optimization
587 might arrange to use that reg for real. */
588 && REGNO_LAST_NOTE_UID (REGNO (SET_DEST (set))) == INSN_UID (insn)
589 && ! side_effects_p (SET_SRC (set))
590 && ! find_reg_note (insn, REG_RETVAL, 0))
591 delete_insn (insn);
592 }
593
594 /* Now iterate optimizing jumps until nothing changes over one pass. */
595 changed = 1;
596 old_max_reg = max_reg_num ();
597 while (changed)
598 {
599 changed = 0;
600
601 for (insn = f; insn; insn = next)
602 {
603 rtx reallabelprev;
604 rtx temp, temp1, temp2, temp3, temp4, temp5, temp6;
605 rtx nlabel;
606 int this_is_simplejump, this_is_condjump, reversep = 0;
607 int this_is_condjump_in_parallel;
608
609 #if 0
610 /* If NOT the first iteration, if this is the last jump pass
611 (just before final), do the special peephole optimizations.
612 Avoiding the first iteration gives ordinary jump opts
613 a chance to work before peephole opts. */
614
615 if (reload_completed && !first && !flag_no_peephole)
616 if (GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN)
617 peephole (insn);
618 #endif
619
620 /* That could have deleted some insns after INSN, so check now
621 what the following insn is. */
622
623 next = NEXT_INSN (insn);
624
625 /* See if this is a NOTE_INSN_LOOP_BEG followed by an unconditional
626 jump. Try to optimize by duplicating the loop exit test if so.
627 This is only safe immediately after regscan, because it uses
628 the values of regno_first_uid and regno_last_uid. */
629 if (after_regscan && GET_CODE (insn) == NOTE
630 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG
631 && (temp1 = next_nonnote_insn (insn)) != 0
632 && simplejump_p (temp1))
633 {
634 temp = PREV_INSN (insn);
635 if (duplicate_loop_exit_test (insn))
636 {
637 changed = 1;
638 next = NEXT_INSN (temp);
639 continue;
640 }
641 }
642
643 if (GET_CODE (insn) != JUMP_INSN)
644 continue;
645
646 this_is_simplejump = simplejump_p (insn);
647 this_is_condjump = condjump_p (insn);
648 this_is_condjump_in_parallel = condjump_in_parallel_p (insn);
649
650 /* Tension the labels in dispatch tables. */
651
652 if (GET_CODE (PATTERN (insn)) == ADDR_VEC)
653 changed |= tension_vector_labels (PATTERN (insn), 0);
654 if (GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
655 changed |= tension_vector_labels (PATTERN (insn), 1);
656
657 /* If a dispatch table always goes to the same place,
658 get rid of it and replace the insn that uses it. */
659
660 if (GET_CODE (PATTERN (insn)) == ADDR_VEC
661 || GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
662 {
663 int i;
664 rtx pat = PATTERN (insn);
665 int diff_vec_p = GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC;
666 int len = XVECLEN (pat, diff_vec_p);
667 rtx dispatch = prev_real_insn (insn);
668
669 for (i = 0; i < len; i++)
670 if (XEXP (XVECEXP (pat, diff_vec_p, i), 0)
671 != XEXP (XVECEXP (pat, diff_vec_p, 0), 0))
672 break;
673 if (i == len
674 && dispatch != 0
675 && GET_CODE (dispatch) == JUMP_INSN
676 && JUMP_LABEL (dispatch) != 0
677 /* Don't mess with a casesi insn. */
678 && !(GET_CODE (PATTERN (dispatch)) == SET
679 && (GET_CODE (SET_SRC (PATTERN (dispatch)))
680 == IF_THEN_ELSE))
681 && next_real_insn (JUMP_LABEL (dispatch)) == insn)
682 {
683 redirect_tablejump (dispatch,
684 XEXP (XVECEXP (pat, diff_vec_p, 0), 0));
685 changed = 1;
686 }
687 }
688
689 reallabelprev = prev_active_insn (JUMP_LABEL (insn));
690
691 /* If a jump references the end of the function, try to turn
692 it into a RETURN insn, possibly a conditional one. */
693 if (JUMP_LABEL (insn)
694 && (next_active_insn (JUMP_LABEL (insn)) == 0
695 || GET_CODE (PATTERN (next_active_insn (JUMP_LABEL (insn))))
696 == RETURN))
697 changed |= redirect_jump (insn, NULL_RTX);
698
699 /* Detect jump to following insn. */
700 if (reallabelprev == insn && condjump_p (insn))
701 {
702 next = next_real_insn (JUMP_LABEL (insn));
703 delete_jump (insn);
704 changed = 1;
705 continue;
706 }
707
708 /* If we have an unconditional jump preceded by a USE, try to put
709 the USE before the target and jump there. This simplifies many
710 of the optimizations below since we don't have to worry about
711 dealing with these USE insns. We only do this if the label
712 being branch to already has the identical USE or if code
713 never falls through to that label. */
714
715 if (this_is_simplejump
716 && (temp = prev_nonnote_insn (insn)) != 0
717 && GET_CODE (temp) == INSN && GET_CODE (PATTERN (temp)) == USE
718 && (temp1 = prev_nonnote_insn (JUMP_LABEL (insn))) != 0
719 && (GET_CODE (temp1) == BARRIER
720 || (GET_CODE (temp1) == INSN
721 && rtx_equal_p (PATTERN (temp), PATTERN (temp1))))
722 /* Don't do this optimization if we have a loop containing only
723 the USE instruction, and the loop start label has a usage
724 count of 1. This is because we will redo this optimization
725 everytime through the outer loop, and jump opt will never
726 exit. */
727 && ! ((temp2 = prev_nonnote_insn (temp)) != 0
728 && temp2 == JUMP_LABEL (insn)
729 && LABEL_NUSES (temp2) == 1))
730 {
731 if (GET_CODE (temp1) == BARRIER)
732 {
733 emit_insn_after (PATTERN (temp), temp1);
734 temp1 = NEXT_INSN (temp1);
735 }
736
737 delete_insn (temp);
738 redirect_jump (insn, get_label_before (temp1));
739 reallabelprev = prev_real_insn (temp1);
740 changed = 1;
741 }
742
743 /* Simplify if (...) x = a; else x = b; by converting it
744 to x = b; if (...) x = a;
745 if B is sufficiently simple, the test doesn't involve X,
746 and nothing in the test modifies B or X.
747
748 If we have small register classes, we also can't do this if X
749 is a hard register.
750
751 If the "x = b;" insn has any REG_NOTES, we don't do this because
752 of the possibility that we are running after CSE and there is a
753 REG_EQUAL note that is only valid if the branch has already been
754 taken. If we move the insn with the REG_EQUAL note, we may
755 fold the comparison to always be false in a later CSE pass.
756 (We could also delete the REG_NOTES when moving the insn, but it
757 seems simpler to not move it.) An exception is that we can move
758 the insn if the only note is a REG_EQUAL or REG_EQUIV whose
759 value is the same as "b".
760
761 INSN is the branch over the `else' part.
762
763 We set:
764
765 TEMP to the jump insn preceding "x = a;"
766 TEMP1 to X
767 TEMP2 to the insn that sets "x = b;"
768 TEMP3 to the insn that sets "x = a;"
769 TEMP4 to the set of "x = b"; */
770
771 if (this_is_simplejump
772 && (temp3 = prev_active_insn (insn)) != 0
773 && GET_CODE (temp3) == INSN
774 && (temp4 = single_set (temp3)) != 0
775 && GET_CODE (temp1 = SET_DEST (temp4)) == REG
776 && (! SMALL_REGISTER_CLASSES
777 || REGNO (temp1) >= FIRST_PSEUDO_REGISTER)
778 && (temp2 = next_active_insn (insn)) != 0
779 && GET_CODE (temp2) == INSN
780 && (temp4 = single_set (temp2)) != 0
781 && rtx_equal_p (SET_DEST (temp4), temp1)
782 && ! side_effects_p (SET_SRC (temp4))
783 && ! may_trap_p (SET_SRC (temp4))
784 && (REG_NOTES (temp2) == 0
785 || ((REG_NOTE_KIND (REG_NOTES (temp2)) == REG_EQUAL
786 || REG_NOTE_KIND (REG_NOTES (temp2)) == REG_EQUIV)
787 && XEXP (REG_NOTES (temp2), 1) == 0
788 && rtx_equal_p (XEXP (REG_NOTES (temp2), 0),
789 SET_SRC (temp4))))
790 && (temp = prev_active_insn (temp3)) != 0
791 && condjump_p (temp) && ! simplejump_p (temp)
792 /* TEMP must skip over the "x = a;" insn */
793 && prev_real_insn (JUMP_LABEL (temp)) == insn
794 && no_labels_between_p (insn, JUMP_LABEL (temp))
795 /* There must be no other entries to the "x = b;" insn. */
796 && no_labels_between_p (JUMP_LABEL (temp), temp2)
797 /* INSN must either branch to the insn after TEMP2 or the insn
798 after TEMP2 must branch to the same place as INSN. */
799 && (reallabelprev == temp2
800 || ((temp5 = next_active_insn (temp2)) != 0
801 && simplejump_p (temp5)
802 && JUMP_LABEL (temp5) == JUMP_LABEL (insn))))
803 {
804 /* The test expression, X, may be a complicated test with
805 multiple branches. See if we can find all the uses of
806 the label that TEMP branches to without hitting a CALL_INSN
807 or a jump to somewhere else. */
808 rtx target = JUMP_LABEL (temp);
809 int nuses = LABEL_NUSES (target);
810 rtx p;
811 #ifdef HAVE_cc0
812 rtx q;
813 #endif
814
815 /* Set P to the first jump insn that goes around "x = a;". */
816 for (p = temp; nuses && p; p = prev_nonnote_insn (p))
817 {
818 if (GET_CODE (p) == JUMP_INSN)
819 {
820 if (condjump_p (p) && ! simplejump_p (p)
821 && JUMP_LABEL (p) == target)
822 {
823 nuses--;
824 if (nuses == 0)
825 break;
826 }
827 else
828 break;
829 }
830 else if (GET_CODE (p) == CALL_INSN)
831 break;
832 }
833
834 #ifdef HAVE_cc0
835 /* We cannot insert anything between a set of cc and its use
836 so if P uses cc0, we must back up to the previous insn. */
837 q = prev_nonnote_insn (p);
838 if (q && GET_RTX_CLASS (GET_CODE (q)) == 'i'
839 && sets_cc0_p (PATTERN (q)))
840 p = q;
841 #endif
842
843 if (p)
844 p = PREV_INSN (p);
845
846 /* If we found all the uses and there was no data conflict, we
847 can move the assignment unless we can branch into the middle
848 from somewhere. */
849 if (nuses == 0 && p
850 && no_labels_between_p (p, insn)
851 && ! reg_referenced_between_p (temp1, p, NEXT_INSN (temp3))
852 && ! reg_set_between_p (temp1, p, temp3)
853 && (GET_CODE (SET_SRC (temp4)) == CONST_INT
854 || ! modified_between_p (SET_SRC (temp4), p, temp2))
855 /* Verify that registers used by the jump are not clobbered
856 by the instruction being moved. */
857 && ! modified_between_p (PATTERN (temp), temp2,
858 NEXT_INSN (temp2)))
859 {
860 emit_insn_after_with_line_notes (PATTERN (temp2), p, temp2);
861 delete_insn (temp2);
862
863 /* Set NEXT to an insn that we know won't go away. */
864 next = next_active_insn (insn);
865
866 /* Delete the jump around the set. Note that we must do
867 this before we redirect the test jumps so that it won't
868 delete the code immediately following the assignment
869 we moved (which might be a jump). */
870
871 delete_insn (insn);
872
873 /* We either have two consecutive labels or a jump to
874 a jump, so adjust all the JUMP_INSNs to branch to where
875 INSN branches to. */
876 for (p = NEXT_INSN (p); p != next; p = NEXT_INSN (p))
877 if (GET_CODE (p) == JUMP_INSN)
878 redirect_jump (p, target);
879
880 changed = 1;
881 continue;
882 }
883 }
884
885 /* Simplify if (...) { x = a; goto l; } x = b; by converting it
886 to x = a; if (...) goto l; x = b;
887 if A is sufficiently simple, the test doesn't involve X,
888 and nothing in the test modifies A or X.
889
890 If we have small register classes, we also can't do this if X
891 is a hard register.
892
893 If the "x = a;" insn has any REG_NOTES, we don't do this because
894 of the possibility that we are running after CSE and there is a
895 REG_EQUAL note that is only valid if the branch has already been
896 taken. If we move the insn with the REG_EQUAL note, we may
897 fold the comparison to always be false in a later CSE pass.
898 (We could also delete the REG_NOTES when moving the insn, but it
899 seems simpler to not move it.) An exception is that we can move
900 the insn if the only note is a REG_EQUAL or REG_EQUIV whose
901 value is the same as "a".
902
903 INSN is the goto.
904
905 We set:
906
907 TEMP to the jump insn preceding "x = a;"
908 TEMP1 to X
909 TEMP2 to the insn that sets "x = b;"
910 TEMP3 to the insn that sets "x = a;"
911 TEMP4 to the set of "x = a"; */
912
913 if (this_is_simplejump
914 && (temp2 = next_active_insn (insn)) != 0
915 && GET_CODE (temp2) == INSN
916 && (temp4 = single_set (temp2)) != 0
917 && GET_CODE (temp1 = SET_DEST (temp4)) == REG
918 && (! SMALL_REGISTER_CLASSES
919 || REGNO (temp1) >= FIRST_PSEUDO_REGISTER)
920 && (temp3 = prev_active_insn (insn)) != 0
921 && GET_CODE (temp3) == INSN
922 && (temp4 = single_set (temp3)) != 0
923 && rtx_equal_p (SET_DEST (temp4), temp1)
924 && ! side_effects_p (SET_SRC (temp4))
925 && ! may_trap_p (SET_SRC (temp4))
926 && (REG_NOTES (temp3) == 0
927 || ((REG_NOTE_KIND (REG_NOTES (temp3)) == REG_EQUAL
928 || REG_NOTE_KIND (REG_NOTES (temp3)) == REG_EQUIV)
929 && XEXP (REG_NOTES (temp3), 1) == 0
930 && rtx_equal_p (XEXP (REG_NOTES (temp3), 0),
931 SET_SRC (temp4))))
932 && (temp = prev_active_insn (temp3)) != 0
933 && condjump_p (temp) && ! simplejump_p (temp)
934 /* TEMP must skip over the "x = a;" insn */
935 && prev_real_insn (JUMP_LABEL (temp)) == insn
936 && no_labels_between_p (temp, insn))
937 {
938 rtx prev_label = JUMP_LABEL (temp);
939 rtx insert_after = prev_nonnote_insn (temp);
940
941 #ifdef HAVE_cc0
942 /* We cannot insert anything between a set of cc and its use. */
943 if (insert_after && GET_RTX_CLASS (GET_CODE (insert_after)) == 'i'
944 && sets_cc0_p (PATTERN (insert_after)))
945 insert_after = prev_nonnote_insn (insert_after);
946 #endif
947 ++LABEL_NUSES (prev_label);
948
949 if (insert_after
950 && no_labels_between_p (insert_after, temp)
951 && ! reg_referenced_between_p (temp1, insert_after, temp3)
952 && ! reg_referenced_between_p (temp1, temp3,
953 NEXT_INSN (temp2))
954 && ! reg_set_between_p (temp1, insert_after, temp)
955 && ! modified_between_p (SET_SRC (temp4), insert_after, temp)
956 /* Verify that registers used by the jump are not clobbered
957 by the instruction being moved. */
958 && ! modified_between_p (PATTERN (temp), temp3,
959 NEXT_INSN (temp3))
960 && invert_jump (temp, JUMP_LABEL (insn)))
961 {
962 emit_insn_after_with_line_notes (PATTERN (temp3),
963 insert_after, temp3);
964 delete_insn (temp3);
965 delete_insn (insn);
966 /* Set NEXT to an insn that we know won't go away. */
967 next = temp2;
968 changed = 1;
969 }
970 if (prev_label && --LABEL_NUSES (prev_label) == 0)
971 delete_insn (prev_label);
972 if (changed)
973 continue;
974 }
975
976 #ifndef HAVE_cc0
977 /* If we have if (...) x = exp; and branches are expensive,
978 EXP is a single insn, does not have any side effects, cannot
979 trap, and is not too costly, convert this to
980 t = exp; if (...) x = t;
981
982 Don't do this when we have CC0 because it is unlikely to help
983 and we'd need to worry about where to place the new insn and
984 the potential for conflicts. We also can't do this when we have
985 notes on the insn for the same reason as above.
986
987 We set:
988
989 TEMP to the "x = exp;" insn.
990 TEMP1 to the single set in the "x = exp;" insn.
991 TEMP2 to "x". */
992
993 if (! reload_completed
994 && this_is_condjump && ! this_is_simplejump
995 && BRANCH_COST >= 3
996 && (temp = next_nonnote_insn (insn)) != 0
997 && GET_CODE (temp) == INSN
998 && REG_NOTES (temp) == 0
999 && (reallabelprev == temp
1000 || ((temp2 = next_active_insn (temp)) != 0
1001 && simplejump_p (temp2)
1002 && JUMP_LABEL (temp2) == JUMP_LABEL (insn)))
1003 && (temp1 = single_set (temp)) != 0
1004 && (temp2 = SET_DEST (temp1), GET_CODE (temp2) == REG)
1005 && (! SMALL_REGISTER_CLASSES
1006 || REGNO (temp2) >= FIRST_PSEUDO_REGISTER)
1007 && GET_CODE (SET_SRC (temp1)) != REG
1008 && GET_CODE (SET_SRC (temp1)) != SUBREG
1009 && GET_CODE (SET_SRC (temp1)) != CONST_INT
1010 && ! side_effects_p (SET_SRC (temp1))
1011 && ! may_trap_p (SET_SRC (temp1))
1012 && rtx_cost (SET_SRC (temp1), SET) < 10)
1013 {
1014 rtx new = gen_reg_rtx (GET_MODE (temp2));
1015
1016 if ((temp3 = find_insert_position (insn, temp))
1017 && validate_change (temp, &SET_DEST (temp1), new, 0))
1018 {
1019 next = emit_insn_after (gen_move_insn (temp2, new), insn);
1020 emit_insn_after_with_line_notes (PATTERN (temp),
1021 PREV_INSN (temp3), temp);
1022 delete_insn (temp);
1023 reallabelprev = prev_active_insn (JUMP_LABEL (insn));
1024
1025 if (after_regscan)
1026 {
1027 reg_scan_update (temp3, NEXT_INSN (next), old_max_reg);
1028 old_max_reg = max_reg_num ();
1029 }
1030 }
1031 }
1032
1033 /* Similarly, if it takes two insns to compute EXP but they
1034 have the same destination. Here TEMP3 will be the second
1035 insn and TEMP4 the SET from that insn. */
1036
1037 if (! reload_completed
1038 && this_is_condjump && ! this_is_simplejump
1039 && BRANCH_COST >= 4
1040 && (temp = next_nonnote_insn (insn)) != 0
1041 && GET_CODE (temp) == INSN
1042 && REG_NOTES (temp) == 0
1043 && (temp3 = next_nonnote_insn (temp)) != 0
1044 && GET_CODE (temp3) == INSN
1045 && REG_NOTES (temp3) == 0
1046 && (reallabelprev == temp3
1047 || ((temp2 = next_active_insn (temp3)) != 0
1048 && simplejump_p (temp2)
1049 && JUMP_LABEL (temp2) == JUMP_LABEL (insn)))
1050 && (temp1 = single_set (temp)) != 0
1051 && (temp2 = SET_DEST (temp1), GET_CODE (temp2) == REG)
1052 && GET_MODE_CLASS (GET_MODE (temp2)) == MODE_INT
1053 && (! SMALL_REGISTER_CLASSES
1054 || REGNO (temp2) >= FIRST_PSEUDO_REGISTER)
1055 && ! side_effects_p (SET_SRC (temp1))
1056 && ! may_trap_p (SET_SRC (temp1))
1057 && rtx_cost (SET_SRC (temp1), SET) < 10
1058 && (temp4 = single_set (temp3)) != 0
1059 && rtx_equal_p (SET_DEST (temp4), temp2)
1060 && ! side_effects_p (SET_SRC (temp4))
1061 && ! may_trap_p (SET_SRC (temp4))
1062 && rtx_cost (SET_SRC (temp4), SET) < 10)
1063 {
1064 rtx new = gen_reg_rtx (GET_MODE (temp2));
1065
1066 if ((temp5 = find_insert_position (insn, temp))
1067 && (temp6 = find_insert_position (insn, temp3))
1068 && validate_change (temp, &SET_DEST (temp1), new, 0))
1069 {
1070 /* Use the earliest of temp5 and temp6. */
1071 if (temp5 != insn)
1072 temp6 = temp5;
1073 next = emit_insn_after (gen_move_insn (temp2, new), insn);
1074 emit_insn_after_with_line_notes (PATTERN (temp),
1075 PREV_INSN (temp6), temp);
1076 emit_insn_after_with_line_notes
1077 (replace_rtx (PATTERN (temp3), temp2, new),
1078 PREV_INSN (temp6), temp3);
1079 delete_insn (temp);
1080 delete_insn (temp3);
1081 reallabelprev = prev_active_insn (JUMP_LABEL (insn));
1082
1083 if (after_regscan)
1084 {
1085 reg_scan_update (temp6, NEXT_INSN (next), old_max_reg);
1086 old_max_reg = max_reg_num ();
1087 }
1088 }
1089 }
1090
1091 /* Finally, handle the case where two insns are used to
1092 compute EXP but a temporary register is used. Here we must
1093 ensure that the temporary register is not used anywhere else. */
1094
1095 if (! reload_completed
1096 && after_regscan
1097 && this_is_condjump && ! this_is_simplejump
1098 && BRANCH_COST >= 4
1099 && (temp = next_nonnote_insn (insn)) != 0
1100 && GET_CODE (temp) == INSN
1101 && REG_NOTES (temp) == 0
1102 && (temp3 = next_nonnote_insn (temp)) != 0
1103 && GET_CODE (temp3) == INSN
1104 && REG_NOTES (temp3) == 0
1105 && (reallabelprev == temp3
1106 || ((temp2 = next_active_insn (temp3)) != 0
1107 && simplejump_p (temp2)
1108 && JUMP_LABEL (temp2) == JUMP_LABEL (insn)))
1109 && (temp1 = single_set (temp)) != 0
1110 && (temp5 = SET_DEST (temp1),
1111 (GET_CODE (temp5) == REG
1112 || (GET_CODE (temp5) == SUBREG
1113 && (temp5 = SUBREG_REG (temp5),
1114 GET_CODE (temp5) == REG))))
1115 && REGNO (temp5) >= FIRST_PSEUDO_REGISTER
1116 && REGNO_FIRST_UID (REGNO (temp5)) == INSN_UID (temp)
1117 && REGNO_LAST_UID (REGNO (temp5)) == INSN_UID (temp3)
1118 && ! side_effects_p (SET_SRC (temp1))
1119 && ! may_trap_p (SET_SRC (temp1))
1120 && rtx_cost (SET_SRC (temp1), SET) < 10
1121 && (temp4 = single_set (temp3)) != 0
1122 && (temp2 = SET_DEST (temp4), GET_CODE (temp2) == REG)
1123 && GET_MODE_CLASS (GET_MODE (temp2)) == MODE_INT
1124 && (! SMALL_REGISTER_CLASSES
1125 || REGNO (temp2) >= FIRST_PSEUDO_REGISTER)
1126 && rtx_equal_p (SET_DEST (temp4), temp2)
1127 && ! side_effects_p (SET_SRC (temp4))
1128 && ! may_trap_p (SET_SRC (temp4))
1129 && rtx_cost (SET_SRC (temp4), SET) < 10)
1130 {
1131 rtx new = gen_reg_rtx (GET_MODE (temp2));
1132
1133 if ((temp5 = find_insert_position (insn, temp))
1134 && (temp6 = find_insert_position (insn, temp3))
1135 && validate_change (temp3, &SET_DEST (temp4), new, 0))
1136 {
1137 /* Use the earliest of temp5 and temp6. */
1138 if (temp5 != insn)
1139 temp6 = temp5;
1140 next = emit_insn_after (gen_move_insn (temp2, new), insn);
1141 emit_insn_after_with_line_notes (PATTERN (temp),
1142 PREV_INSN (temp6), temp);
1143 emit_insn_after_with_line_notes (PATTERN (temp3),
1144 PREV_INSN (temp6), temp3);
1145 delete_insn (temp);
1146 delete_insn (temp3);
1147 reallabelprev = prev_active_insn (JUMP_LABEL (insn));
1148
1149 if (after_regscan)
1150 {
1151 reg_scan_update (temp6, NEXT_INSN (next), old_max_reg);
1152 old_max_reg = max_reg_num ();
1153 }
1154 }
1155 }
1156 #endif /* HAVE_cc0 */
1157
1158 /* Try to use a conditional move (if the target has them), or a
1159 store-flag insn. The general case is:
1160
1161 1) x = a; if (...) x = b; and
1162 2) if (...) x = b;
1163
1164 If the jump would be faster, the machine should not have defined
1165 the movcc or scc insns!. These cases are often made by the
1166 previous optimization.
1167
1168 The second case is treated as x = x; if (...) x = b;.
1169
1170 INSN here is the jump around the store. We set:
1171
1172 TEMP to the "x = b;" insn.
1173 TEMP1 to X.
1174 TEMP2 to B.
1175 TEMP3 to A (X in the second case).
1176 TEMP4 to the condition being tested.
1177 TEMP5 to the earliest insn used to find the condition. */
1178
1179 if (/* We can't do this after reload has completed. */
1180 ! reload_completed
1181 && this_is_condjump && ! this_is_simplejump
1182 /* Set TEMP to the "x = b;" insn. */
1183 && (temp = next_nonnote_insn (insn)) != 0
1184 && GET_CODE (temp) == INSN
1185 && GET_CODE (PATTERN (temp)) == SET
1186 && GET_CODE (temp1 = SET_DEST (PATTERN (temp))) == REG
1187 && (! SMALL_REGISTER_CLASSES
1188 || REGNO (temp1) >= FIRST_PSEUDO_REGISTER)
1189 && ! side_effects_p (temp2 = SET_SRC (PATTERN (temp)))
1190 && ! may_trap_p (temp2)
1191 /* Allow either form, but prefer the former if both apply.
1192 There is no point in using the old value of TEMP1 if
1193 it is a register, since cse will alias them. It can
1194 lose if the old value were a hard register since CSE
1195 won't replace hard registers. Avoid using TEMP3 if
1196 small register classes and it is a hard register. */
1197 && (((temp3 = reg_set_last (temp1, insn)) != 0
1198 && ! (SMALL_REGISTER_CLASSES && GET_CODE (temp3) == REG
1199 && REGNO (temp3) < FIRST_PSEUDO_REGISTER))
1200 /* Make the latter case look like x = x; if (...) x = b; */
1201 || (temp3 = temp1, 1))
1202 /* INSN must either branch to the insn after TEMP or the insn
1203 after TEMP must branch to the same place as INSN. */
1204 && (reallabelprev == temp
1205 || ((temp4 = next_active_insn (temp)) != 0
1206 && simplejump_p (temp4)
1207 && JUMP_LABEL (temp4) == JUMP_LABEL (insn)))
1208 && (temp4 = get_condition (insn, &temp5)) != 0
1209 /* We must be comparing objects whose modes imply the size.
1210 We could handle BLKmode if (1) emit_store_flag could
1211 and (2) we could find the size reliably. */
1212 && GET_MODE (XEXP (temp4, 0)) != BLKmode
1213 /* Even if branches are cheap, the store_flag optimization
1214 can win when the operation to be performed can be
1215 expressed directly. */
1216 #ifdef HAVE_cc0
1217 /* If the previous insn sets CC0 and something else, we can't
1218 do this since we are going to delete that insn. */
1219
1220 && ! ((temp6 = prev_nonnote_insn (insn)) != 0
1221 && GET_CODE (temp6) == INSN
1222 && (sets_cc0_p (PATTERN (temp6)) == -1
1223 || (sets_cc0_p (PATTERN (temp6)) == 1
1224 && FIND_REG_INC_NOTE (temp6, NULL_RTX))))
1225 #endif
1226 )
1227 {
1228 #ifdef HAVE_conditional_move
1229 /* First try a conditional move. */
1230 {
1231 enum rtx_code code = GET_CODE (temp4);
1232 rtx var = temp1;
1233 rtx cond0, cond1, aval, bval;
1234 rtx target;
1235
1236 /* Copy the compared variables into cond0 and cond1, so that
1237 any side effects performed in or after the old comparison,
1238 will not affect our compare which will come later. */
1239 /* ??? Is it possible to just use the comparison in the jump
1240 insn? After all, we're going to delete it. We'd have
1241 to modify emit_conditional_move to take a comparison rtx
1242 instead or write a new function. */
1243 cond0 = gen_reg_rtx (GET_MODE (XEXP (temp4, 0)));
1244 /* We want the target to be able to simplify comparisons with
1245 zero (and maybe other constants as well), so don't create
1246 pseudos for them. There's no need to either. */
1247 if (GET_CODE (XEXP (temp4, 1)) == CONST_INT
1248 || GET_CODE (XEXP (temp4, 1)) == CONST_DOUBLE)
1249 cond1 = XEXP (temp4, 1);
1250 else
1251 cond1 = gen_reg_rtx (GET_MODE (XEXP (temp4, 1)));
1252
1253 aval = temp3;
1254 bval = temp2;
1255
1256 start_sequence ();
1257 target = emit_conditional_move (var, code,
1258 cond0, cond1, VOIDmode,
1259 aval, bval, GET_MODE (var),
1260 (code == LTU || code == GEU
1261 || code == LEU || code == GTU));
1262
1263 if (target)
1264 {
1265 rtx seq1,seq2,last;
1266
1267 /* Save the conditional move sequence but don't emit it
1268 yet. On some machines, like the alpha, it is possible
1269 that temp5 == insn, so next generate the sequence that
1270 saves the compared values and then emit both
1271 sequences ensuring seq1 occurs before seq2. */
1272 seq2 = get_insns ();
1273 end_sequence ();
1274
1275 /* Now that we can't fail, generate the copy insns that
1276 preserve the compared values. */
1277 start_sequence ();
1278 emit_move_insn (cond0, XEXP (temp4, 0));
1279 if (cond1 != XEXP (temp4, 1))
1280 emit_move_insn (cond1, XEXP (temp4, 1));
1281 seq1 = get_insns ();
1282 end_sequence ();
1283
1284 emit_insns_before (seq1, temp5);
1285 /* Insert conditional move after insn, to be sure that
1286 the jump and a possible compare won't be separated */
1287 last = emit_insns_after (seq2, insn);
1288
1289 /* ??? We can also delete the insn that sets X to A.
1290 Flow will do it too though. */
1291 delete_insn (temp);
1292 next = NEXT_INSN (insn);
1293 delete_jump (insn);
1294
1295 if (after_regscan)
1296 {
1297 reg_scan_update (seq1, NEXT_INSN (last), old_max_reg);
1298 old_max_reg = max_reg_num ();
1299 }
1300
1301 changed = 1;
1302 continue;
1303 }
1304 else
1305 end_sequence ();
1306 }
1307 #endif
1308
1309 /* That didn't work, try a store-flag insn.
1310
1311 We further divide the cases into:
1312
1313 1) x = a; if (...) x = b; and either A or B is zero,
1314 2) if (...) x = 0; and jumps are expensive,
1315 3) x = a; if (...) x = b; and A and B are constants where all
1316 the set bits in A are also set in B and jumps are expensive,
1317 4) x = a; if (...) x = b; and A and B non-zero, and jumps are
1318 more expensive, and
1319 5) if (...) x = b; if jumps are even more expensive. */
1320
1321 if (GET_MODE_CLASS (GET_MODE (temp1)) == MODE_INT
1322 && ((GET_CODE (temp3) == CONST_INT)
1323 /* Make the latter case look like
1324 x = x; if (...) x = 0; */
1325 || (temp3 = temp1,
1326 ((BRANCH_COST >= 2
1327 && temp2 == const0_rtx)
1328 || BRANCH_COST >= 3)))
1329 /* If B is zero, OK; if A is zero, can only do (1) if we
1330 can reverse the condition. See if (3) applies possibly
1331 by reversing the condition. Prefer reversing to (4) when
1332 branches are very expensive. */
1333 && (((BRANCH_COST >= 2
1334 || STORE_FLAG_VALUE == -1
1335 || (STORE_FLAG_VALUE == 1
1336 /* Check that the mask is a power of two,
1337 so that it can probably be generated
1338 with a shift. */
1339 && GET_CODE (temp3) == CONST_INT
1340 && exact_log2 (INTVAL (temp3)) >= 0))
1341 && (reversep = 0, temp2 == const0_rtx))
1342 || ((BRANCH_COST >= 2
1343 || STORE_FLAG_VALUE == -1
1344 || (STORE_FLAG_VALUE == 1
1345 && GET_CODE (temp2) == CONST_INT
1346 && exact_log2 (INTVAL (temp2)) >= 0))
1347 && temp3 == const0_rtx
1348 && (reversep = can_reverse_comparison_p (temp4, insn)))
1349 || (BRANCH_COST >= 2
1350 && GET_CODE (temp2) == CONST_INT
1351 && GET_CODE (temp3) == CONST_INT
1352 && ((INTVAL (temp2) & INTVAL (temp3)) == INTVAL (temp2)
1353 || ((INTVAL (temp2) & INTVAL (temp3)) == INTVAL (temp3)
1354 && (reversep = can_reverse_comparison_p (temp4,
1355 insn)))))
1356 || BRANCH_COST >= 3)
1357 )
1358 {
1359 enum rtx_code code = GET_CODE (temp4);
1360 rtx uval, cval, var = temp1;
1361 int normalizep;
1362 rtx target;
1363
1364 /* If necessary, reverse the condition. */
1365 if (reversep)
1366 code = reverse_condition (code), uval = temp2, cval = temp3;
1367 else
1368 uval = temp3, cval = temp2;
1369
1370 /* If CVAL is non-zero, normalize to -1. Otherwise, if UVAL
1371 is the constant 1, it is best to just compute the result
1372 directly. If UVAL is constant and STORE_FLAG_VALUE
1373 includes all of its bits, it is best to compute the flag
1374 value unnormalized and `and' it with UVAL. Otherwise,
1375 normalize to -1 and `and' with UVAL. */
1376 normalizep = (cval != const0_rtx ? -1
1377 : (uval == const1_rtx ? 1
1378 : (GET_CODE (uval) == CONST_INT
1379 && (INTVAL (uval) & ~STORE_FLAG_VALUE) == 0)
1380 ? 0 : -1));
1381
1382 /* We will be putting the store-flag insn immediately in
1383 front of the comparison that was originally being done,
1384 so we know all the variables in TEMP4 will be valid.
1385 However, this might be in front of the assignment of
1386 A to VAR. If it is, it would clobber the store-flag
1387 we will be emitting.
1388
1389 Therefore, emit into a temporary which will be copied to
1390 VAR immediately after TEMP. */
1391
1392 start_sequence ();
1393 target = emit_store_flag (gen_reg_rtx (GET_MODE (var)), code,
1394 XEXP (temp4, 0), XEXP (temp4, 1),
1395 VOIDmode,
1396 (code == LTU || code == LEU
1397 || code == GEU || code == GTU),
1398 normalizep);
1399 if (target)
1400 {
1401 rtx seq;
1402 rtx before = insn;
1403
1404 seq = get_insns ();
1405 end_sequence ();
1406
1407 /* Put the store-flag insns in front of the first insn
1408 used to compute the condition to ensure that we
1409 use the same values of them as the current
1410 comparison. However, the remainder of the insns we
1411 generate will be placed directly in front of the
1412 jump insn, in case any of the pseudos we use
1413 are modified earlier. */
1414
1415 emit_insns_before (seq, temp5);
1416
1417 start_sequence ();
1418
1419 /* Both CVAL and UVAL are non-zero. */
1420 if (cval != const0_rtx && uval != const0_rtx)
1421 {
1422 rtx tem1, tem2;
1423
1424 tem1 = expand_and (uval, target, NULL_RTX);
1425 if (GET_CODE (cval) == CONST_INT
1426 && GET_CODE (uval) == CONST_INT
1427 && (INTVAL (cval) & INTVAL (uval)) == INTVAL (cval))
1428 tem2 = cval;
1429 else
1430 {
1431 tem2 = expand_unop (GET_MODE (var), one_cmpl_optab,
1432 target, NULL_RTX, 0);
1433 tem2 = expand_and (cval, tem2,
1434 (GET_CODE (tem2) == REG
1435 ? tem2 : 0));
1436 }
1437
1438 /* If we usually make new pseudos, do so here. This
1439 turns out to help machines that have conditional
1440 move insns. */
1441 /* ??? Conditional moves have already been handled.
1442 This may be obsolete. */
1443
1444 if (flag_expensive_optimizations)
1445 target = 0;
1446
1447 target = expand_binop (GET_MODE (var), ior_optab,
1448 tem1, tem2, target,
1449 1, OPTAB_WIDEN);
1450 }
1451 else if (normalizep != 1)
1452 {
1453 /* We know that either CVAL or UVAL is zero. If
1454 UVAL is zero, negate TARGET and `and' with CVAL.
1455 Otherwise, `and' with UVAL. */
1456 if (uval == const0_rtx)
1457 {
1458 target = expand_unop (GET_MODE (var), one_cmpl_optab,
1459 target, NULL_RTX, 0);
1460 uval = cval;
1461 }
1462
1463 target = expand_and (uval, target,
1464 (GET_CODE (target) == REG
1465 && ! preserve_subexpressions_p ()
1466 ? target : NULL_RTX));
1467 }
1468
1469 emit_move_insn (var, target);
1470 seq = get_insns ();
1471 end_sequence ();
1472 #ifdef HAVE_cc0
1473 /* If INSN uses CC0, we must not separate it from the
1474 insn that sets cc0. */
1475 if (reg_mentioned_p (cc0_rtx, PATTERN (before)))
1476 before = prev_nonnote_insn (before);
1477 #endif
1478 emit_insns_before (seq, before);
1479
1480 delete_insn (temp);
1481 next = NEXT_INSN (insn);
1482 delete_jump (insn);
1483
1484 if (after_regscan)
1485 {
1486 reg_scan_update (seq, NEXT_INSN (next), old_max_reg);
1487 old_max_reg = max_reg_num ();
1488 }
1489
1490 changed = 1;
1491 continue;
1492 }
1493 else
1494 end_sequence ();
1495 }
1496 }
1497
1498 /* If branches are expensive, convert
1499 if (foo) bar++; to bar += (foo != 0);
1500 and similarly for "bar--;"
1501
1502 INSN is the conditional branch around the arithmetic. We set:
1503
1504 TEMP is the arithmetic insn.
1505 TEMP1 is the SET doing the arithmetic.
1506 TEMP2 is the operand being incremented or decremented.
1507 TEMP3 to the condition being tested.
1508 TEMP4 to the earliest insn used to find the condition. */
1509
1510 if ((BRANCH_COST >= 2
1511 #ifdef HAVE_incscc
1512 || HAVE_incscc
1513 #endif
1514 #ifdef HAVE_decscc
1515 || HAVE_decscc
1516 #endif
1517 )
1518 && ! reload_completed
1519 && this_is_condjump && ! this_is_simplejump
1520 && (temp = next_nonnote_insn (insn)) != 0
1521 && (temp1 = single_set (temp)) != 0
1522 && (temp2 = SET_DEST (temp1),
1523 GET_MODE_CLASS (GET_MODE (temp2)) == MODE_INT)
1524 && GET_CODE (SET_SRC (temp1)) == PLUS
1525 && (XEXP (SET_SRC (temp1), 1) == const1_rtx
1526 || XEXP (SET_SRC (temp1), 1) == constm1_rtx)
1527 && rtx_equal_p (temp2, XEXP (SET_SRC (temp1), 0))
1528 && ! side_effects_p (temp2)
1529 && ! may_trap_p (temp2)
1530 /* INSN must either branch to the insn after TEMP or the insn
1531 after TEMP must branch to the same place as INSN. */
1532 && (reallabelprev == temp
1533 || ((temp3 = next_active_insn (temp)) != 0
1534 && simplejump_p (temp3)
1535 && JUMP_LABEL (temp3) == JUMP_LABEL (insn)))
1536 && (temp3 = get_condition (insn, &temp4)) != 0
1537 /* We must be comparing objects whose modes imply the size.
1538 We could handle BLKmode if (1) emit_store_flag could
1539 and (2) we could find the size reliably. */
1540 && GET_MODE (XEXP (temp3, 0)) != BLKmode
1541 && can_reverse_comparison_p (temp3, insn))
1542 {
1543 rtx temp6, target = 0, seq, init_insn = 0, init = temp2;
1544 enum rtx_code code = reverse_condition (GET_CODE (temp3));
1545
1546 start_sequence ();
1547
1548 /* It must be the case that TEMP2 is not modified in the range
1549 [TEMP4, INSN). The one exception we make is if the insn
1550 before INSN sets TEMP2 to something which is also unchanged
1551 in that range. In that case, we can move the initialization
1552 into our sequence. */
1553
1554 if ((temp5 = prev_active_insn (insn)) != 0
1555 && no_labels_between_p (temp5, insn)
1556 && GET_CODE (temp5) == INSN
1557 && (temp6 = single_set (temp5)) != 0
1558 && rtx_equal_p (temp2, SET_DEST (temp6))
1559 && (CONSTANT_P (SET_SRC (temp6))
1560 || GET_CODE (SET_SRC (temp6)) == REG
1561 || GET_CODE (SET_SRC (temp6)) == SUBREG))
1562 {
1563 emit_insn (PATTERN (temp5));
1564 init_insn = temp5;
1565 init = SET_SRC (temp6);
1566 }
1567
1568 if (CONSTANT_P (init)
1569 || ! reg_set_between_p (init, PREV_INSN (temp4), insn))
1570 target = emit_store_flag (gen_reg_rtx (GET_MODE (temp2)), code,
1571 XEXP (temp3, 0), XEXP (temp3, 1),
1572 VOIDmode,
1573 (code == LTU || code == LEU
1574 || code == GTU || code == GEU), 1);
1575
1576 /* If we can do the store-flag, do the addition or
1577 subtraction. */
1578
1579 if (target)
1580 target = expand_binop (GET_MODE (temp2),
1581 (XEXP (SET_SRC (temp1), 1) == const1_rtx
1582 ? add_optab : sub_optab),
1583 temp2, target, temp2, 0, OPTAB_WIDEN);
1584
1585 if (target != 0)
1586 {
1587 /* Put the result back in temp2 in case it isn't already.
1588 Then replace the jump, possible a CC0-setting insn in
1589 front of the jump, and TEMP, with the sequence we have
1590 made. */
1591
1592 if (target != temp2)
1593 emit_move_insn (temp2, target);
1594
1595 seq = get_insns ();
1596 end_sequence ();
1597
1598 emit_insns_before (seq, temp4);
1599 delete_insn (temp);
1600
1601 if (init_insn)
1602 delete_insn (init_insn);
1603
1604 next = NEXT_INSN (insn);
1605 #ifdef HAVE_cc0
1606 delete_insn (prev_nonnote_insn (insn));
1607 #endif
1608 delete_insn (insn);
1609
1610 if (after_regscan)
1611 {
1612 reg_scan_update (seq, NEXT_INSN (next), old_max_reg);
1613 old_max_reg = max_reg_num ();
1614 }
1615
1616 changed = 1;
1617 continue;
1618 }
1619 else
1620 end_sequence ();
1621 }
1622
1623 /* Simplify if (...) x = 1; else {...} if (x) ...
1624 We recognize this case scanning backwards as well.
1625
1626 TEMP is the assignment to x;
1627 TEMP1 is the label at the head of the second if. */
1628 /* ?? This should call get_condition to find the values being
1629 compared, instead of looking for a COMPARE insn when HAVE_cc0
1630 is not defined. This would allow it to work on the m88k. */
1631 /* ?? This optimization is only safe before cse is run if HAVE_cc0
1632 is not defined and the condition is tested by a separate compare
1633 insn. This is because the code below assumes that the result
1634 of the compare dies in the following branch.
1635
1636 Not only that, but there might be other insns between the
1637 compare and branch whose results are live. Those insns need
1638 to be executed.
1639
1640 A way to fix this is to move the insns at JUMP_LABEL (insn)
1641 to before INSN. If we are running before flow, they will
1642 be deleted if they aren't needed. But this doesn't work
1643 well after flow.
1644
1645 This is really a special-case of jump threading, anyway. The
1646 right thing to do is to replace this and jump threading with
1647 much simpler code in cse.
1648
1649 This code has been turned off in the non-cc0 case in the
1650 meantime. */
1651
1652 #ifdef HAVE_cc0
1653 else if (this_is_simplejump
1654 /* Safe to skip USE and CLOBBER insns here
1655 since they will not be deleted. */
1656 && (temp = prev_active_insn (insn))
1657 && no_labels_between_p (temp, insn)
1658 && GET_CODE (temp) == INSN
1659 && GET_CODE (PATTERN (temp)) == SET
1660 && GET_CODE (SET_DEST (PATTERN (temp))) == REG
1661 && CONSTANT_P (SET_SRC (PATTERN (temp)))
1662 && (temp1 = next_active_insn (JUMP_LABEL (insn)))
1663 /* If we find that the next value tested is `x'
1664 (TEMP1 is the insn where this happens), win. */
1665 && GET_CODE (temp1) == INSN
1666 && GET_CODE (PATTERN (temp1)) == SET
1667 #ifdef HAVE_cc0
1668 /* Does temp1 `tst' the value of x? */
1669 && SET_SRC (PATTERN (temp1)) == SET_DEST (PATTERN (temp))
1670 && SET_DEST (PATTERN (temp1)) == cc0_rtx
1671 && (temp1 = next_nonnote_insn (temp1))
1672 #else
1673 /* Does temp1 compare the value of x against zero? */
1674 && GET_CODE (SET_SRC (PATTERN (temp1))) == COMPARE
1675 && XEXP (SET_SRC (PATTERN (temp1)), 1) == const0_rtx
1676 && (XEXP (SET_SRC (PATTERN (temp1)), 0)
1677 == SET_DEST (PATTERN (temp)))
1678 && GET_CODE (SET_DEST (PATTERN (temp1))) == REG
1679 && (temp1 = find_next_ref (SET_DEST (PATTERN (temp1)), temp1))
1680 #endif
1681 && condjump_p (temp1))
1682 {
1683 /* Get the if_then_else from the condjump. */
1684 rtx choice = SET_SRC (PATTERN (temp1));
1685 if (GET_CODE (choice) == IF_THEN_ELSE)
1686 {
1687 enum rtx_code code = GET_CODE (XEXP (choice, 0));
1688 rtx val = SET_SRC (PATTERN (temp));
1689 rtx cond
1690 = simplify_relational_operation (code, GET_MODE (SET_DEST (PATTERN (temp))),
1691 val, const0_rtx);
1692 rtx ultimate;
1693
1694 if (cond == const_true_rtx)
1695 ultimate = XEXP (choice, 1);
1696 else if (cond == const0_rtx)
1697 ultimate = XEXP (choice, 2);
1698 else
1699 ultimate = 0;
1700
1701 if (ultimate == pc_rtx)
1702 ultimate = get_label_after (temp1);
1703 else if (ultimate && GET_CODE (ultimate) != RETURN)
1704 ultimate = XEXP (ultimate, 0);
1705
1706 if (ultimate && JUMP_LABEL(insn) != ultimate)
1707 changed |= redirect_jump (insn, ultimate);
1708 }
1709 }
1710 #endif
1711
1712 #if 0
1713 /* @@ This needs a bit of work before it will be right.
1714
1715 Any type of comparison can be accepted for the first and
1716 second compare. When rewriting the first jump, we must
1717 compute the what conditions can reach label3, and use the
1718 appropriate code. We can not simply reverse/swap the code
1719 of the first jump. In some cases, the second jump must be
1720 rewritten also.
1721
1722 For example,
1723 < == converts to > ==
1724 < != converts to == >
1725 etc.
1726
1727 If the code is written to only accept an '==' test for the second
1728 compare, then all that needs to be done is to swap the condition
1729 of the first branch.
1730
1731 It is questionable whether we want this optimization anyways,
1732 since if the user wrote code like this because he/she knew that
1733 the jump to label1 is taken most of the time, then rewriting
1734 this gives slower code. */
1735 /* @@ This should call get_condition to find the values being
1736 compared, instead of looking for a COMPARE insn when HAVE_cc0
1737 is not defined. This would allow it to work on the m88k. */
1738 /* @@ This optimization is only safe before cse is run if HAVE_cc0
1739 is not defined and the condition is tested by a separate compare
1740 insn. This is because the code below assumes that the result
1741 of the compare dies in the following branch. */
1742
1743 /* Simplify test a ~= b
1744 condjump label1;
1745 test a == b
1746 condjump label2;
1747 jump label3;
1748 label1:
1749
1750 rewriting as
1751 test a ~~= b
1752 condjump label3
1753 test a == b
1754 condjump label2
1755 label1:
1756
1757 where ~= is an inequality, e.g. >, and ~~= is the swapped
1758 inequality, e.g. <.
1759
1760 We recognize this case scanning backwards.
1761
1762 TEMP is the conditional jump to `label2';
1763 TEMP1 is the test for `a == b';
1764 TEMP2 is the conditional jump to `label1';
1765 TEMP3 is the test for `a ~= b'. */
1766 else if (this_is_simplejump
1767 && (temp = prev_active_insn (insn))
1768 && no_labels_between_p (temp, insn)
1769 && condjump_p (temp)
1770 && (temp1 = prev_active_insn (temp))
1771 && no_labels_between_p (temp1, temp)
1772 && GET_CODE (temp1) == INSN
1773 && GET_CODE (PATTERN (temp1)) == SET
1774 #ifdef HAVE_cc0
1775 && sets_cc0_p (PATTERN (temp1)) == 1
1776 #else
1777 && GET_CODE (SET_SRC (PATTERN (temp1))) == COMPARE
1778 && GET_CODE (SET_DEST (PATTERN (temp1))) == REG
1779 && (temp == find_next_ref (SET_DEST (PATTERN (temp1)), temp1))
1780 #endif
1781 && (temp2 = prev_active_insn (temp1))
1782 && no_labels_between_p (temp2, temp1)
1783 && condjump_p (temp2)
1784 && JUMP_LABEL (temp2) == next_nonnote_insn (NEXT_INSN (insn))
1785 && (temp3 = prev_active_insn (temp2))
1786 && no_labels_between_p (temp3, temp2)
1787 && GET_CODE (PATTERN (temp3)) == SET
1788 && rtx_equal_p (SET_DEST (PATTERN (temp3)),
1789 SET_DEST (PATTERN (temp1)))
1790 && rtx_equal_p (SET_SRC (PATTERN (temp1)),
1791 SET_SRC (PATTERN (temp3)))
1792 && ! inequality_comparisons_p (PATTERN (temp))
1793 && inequality_comparisons_p (PATTERN (temp2)))
1794 {
1795 rtx fallthrough_label = JUMP_LABEL (temp2);
1796
1797 ++LABEL_NUSES (fallthrough_label);
1798 if (swap_jump (temp2, JUMP_LABEL (insn)))
1799 {
1800 delete_insn (insn);
1801 changed = 1;
1802 }
1803
1804 if (--LABEL_NUSES (fallthrough_label) == 0)
1805 delete_insn (fallthrough_label);
1806 }
1807 #endif
1808 /* Simplify if (...) {... x = 1;} if (x) ...
1809
1810 We recognize this case backwards.
1811
1812 TEMP is the test of `x';
1813 TEMP1 is the assignment to `x' at the end of the
1814 previous statement. */
1815 /* @@ This should call get_condition to find the values being
1816 compared, instead of looking for a COMPARE insn when HAVE_cc0
1817 is not defined. This would allow it to work on the m88k. */
1818 /* @@ This optimization is only safe before cse is run if HAVE_cc0
1819 is not defined and the condition is tested by a separate compare
1820 insn. This is because the code below assumes that the result
1821 of the compare dies in the following branch. */
1822
1823 /* ??? This has to be turned off. The problem is that the
1824 unconditional jump might indirectly end up branching to the
1825 label between TEMP1 and TEMP. We can't detect this, in general,
1826 since it may become a jump to there after further optimizations.
1827 If that jump is done, it will be deleted, so we will retry
1828 this optimization in the next pass, thus an infinite loop.
1829
1830 The present code prevents this by putting the jump after the
1831 label, but this is not logically correct. */
1832 #if 0
1833 else if (this_is_condjump
1834 /* Safe to skip USE and CLOBBER insns here
1835 since they will not be deleted. */
1836 && (temp = prev_active_insn (insn))
1837 && no_labels_between_p (temp, insn)
1838 && GET_CODE (temp) == INSN
1839 && GET_CODE (PATTERN (temp)) == SET
1840 #ifdef HAVE_cc0
1841 && sets_cc0_p (PATTERN (temp)) == 1
1842 && GET_CODE (SET_SRC (PATTERN (temp))) == REG
1843 #else
1844 /* Temp must be a compare insn, we can not accept a register
1845 to register move here, since it may not be simply a
1846 tst insn. */
1847 && GET_CODE (SET_SRC (PATTERN (temp))) == COMPARE
1848 && XEXP (SET_SRC (PATTERN (temp)), 1) == const0_rtx
1849 && GET_CODE (XEXP (SET_SRC (PATTERN (temp)), 0)) == REG
1850 && GET_CODE (SET_DEST (PATTERN (temp))) == REG
1851 && insn == find_next_ref (SET_DEST (PATTERN (temp)), temp)
1852 #endif
1853 /* May skip USE or CLOBBER insns here
1854 for checking for opportunity, since we
1855 take care of them later. */
1856 && (temp1 = prev_active_insn (temp))
1857 && GET_CODE (temp1) == INSN
1858 && GET_CODE (PATTERN (temp1)) == SET
1859 #ifdef HAVE_cc0
1860 && SET_SRC (PATTERN (temp)) == SET_DEST (PATTERN (temp1))
1861 #else
1862 && (XEXP (SET_SRC (PATTERN (temp)), 0)
1863 == SET_DEST (PATTERN (temp1)))
1864 #endif
1865 && CONSTANT_P (SET_SRC (PATTERN (temp1)))
1866 /* If this isn't true, cse will do the job. */
1867 && ! no_labels_between_p (temp1, temp))
1868 {
1869 /* Get the if_then_else from the condjump. */
1870 rtx choice = SET_SRC (PATTERN (insn));
1871 if (GET_CODE (choice) == IF_THEN_ELSE
1872 && (GET_CODE (XEXP (choice, 0)) == EQ
1873 || GET_CODE (XEXP (choice, 0)) == NE))
1874 {
1875 int want_nonzero = (GET_CODE (XEXP (choice, 0)) == NE);
1876 rtx last_insn;
1877 rtx ultimate;
1878 rtx p;
1879
1880 /* Get the place that condjump will jump to
1881 if it is reached from here. */
1882 if ((SET_SRC (PATTERN (temp1)) != const0_rtx)
1883 == want_nonzero)
1884 ultimate = XEXP (choice, 1);
1885 else
1886 ultimate = XEXP (choice, 2);
1887 /* Get it as a CODE_LABEL. */
1888 if (ultimate == pc_rtx)
1889 ultimate = get_label_after (insn);
1890 else
1891 /* Get the label out of the LABEL_REF. */
1892 ultimate = XEXP (ultimate, 0);
1893
1894 /* Insert the jump immediately before TEMP, specifically
1895 after the label that is between TEMP1 and TEMP. */
1896 last_insn = PREV_INSN (temp);
1897
1898 /* If we would be branching to the next insn, the jump
1899 would immediately be deleted and the re-inserted in
1900 a subsequent pass over the code. So don't do anything
1901 in that case. */
1902 if (next_active_insn (last_insn)
1903 != next_active_insn (ultimate))
1904 {
1905 emit_barrier_after (last_insn);
1906 p = emit_jump_insn_after (gen_jump (ultimate),
1907 last_insn);
1908 JUMP_LABEL (p) = ultimate;
1909 ++LABEL_NUSES (ultimate);
1910 if (INSN_UID (ultimate) < max_jump_chain
1911 && INSN_CODE (p) < max_jump_chain)
1912 {
1913 jump_chain[INSN_UID (p)]
1914 = jump_chain[INSN_UID (ultimate)];
1915 jump_chain[INSN_UID (ultimate)] = p;
1916 }
1917 changed = 1;
1918 continue;
1919 }
1920 }
1921 }
1922 #endif
1923 /* Detect a conditional jump going to the same place
1924 as an immediately following unconditional jump. */
1925 else if (this_is_condjump
1926 && (temp = next_active_insn (insn)) != 0
1927 && simplejump_p (temp)
1928 && (next_active_insn (JUMP_LABEL (insn))
1929 == next_active_insn (JUMP_LABEL (temp))))
1930 {
1931 rtx tem = temp;
1932
1933 /* ??? Optional. Disables some optimizations, but makes
1934 gcov output more accurate with -O. */
1935 if (flag_test_coverage && !reload_completed)
1936 for (tem = insn; tem != temp; tem = NEXT_INSN (tem))
1937 if (GET_CODE (tem) == NOTE && NOTE_LINE_NUMBER (tem) > 0)
1938 break;
1939
1940 if (tem == temp)
1941 {
1942 delete_jump (insn);
1943 changed = 1;
1944 continue;
1945 }
1946 }
1947 #ifdef HAVE_trap
1948 /* Detect a conditional jump jumping over an unconditional trap. */
1949 else if (HAVE_trap
1950 && this_is_condjump && ! this_is_simplejump
1951 && reallabelprev != 0
1952 && GET_CODE (reallabelprev) == INSN
1953 && GET_CODE (PATTERN (reallabelprev)) == TRAP_IF
1954 && TRAP_CONDITION (PATTERN (reallabelprev)) == const_true_rtx
1955 && prev_active_insn (reallabelprev) == insn
1956 && no_labels_between_p (insn, reallabelprev)
1957 && (temp2 = get_condition (insn, &temp4))
1958 && can_reverse_comparison_p (temp2, insn))
1959 {
1960 rtx new = gen_cond_trap (reverse_condition (GET_CODE (temp2)),
1961 XEXP (temp2, 0), XEXP (temp2, 1),
1962 TRAP_CODE (PATTERN (reallabelprev)));
1963
1964 if (new)
1965 {
1966 emit_insn_before (new, temp4);
1967 delete_insn (reallabelprev);
1968 delete_jump (insn);
1969 changed = 1;
1970 continue;
1971 }
1972 }
1973 /* Detect a jump jumping to an unconditional trap. */
1974 else if (HAVE_trap && this_is_condjump
1975 && (temp = next_active_insn (JUMP_LABEL (insn)))
1976 && GET_CODE (temp) == INSN
1977 && GET_CODE (PATTERN (temp)) == TRAP_IF
1978 && (this_is_simplejump
1979 || (temp2 = get_condition (insn, &temp4))))
1980 {
1981 rtx tc = TRAP_CONDITION (PATTERN (temp));
1982
1983 if (tc == const_true_rtx
1984 || (! this_is_simplejump && rtx_equal_p (temp2, tc)))
1985 {
1986 rtx new;
1987 /* Replace an unconditional jump to a trap with a trap. */
1988 if (this_is_simplejump)
1989 {
1990 emit_barrier_after (emit_insn_before (gen_trap (), insn));
1991 delete_jump (insn);
1992 changed = 1;
1993 continue;
1994 }
1995 new = gen_cond_trap (GET_CODE (temp2), XEXP (temp2, 0),
1996 XEXP (temp2, 1),
1997 TRAP_CODE (PATTERN (temp)));
1998 if (new)
1999 {
2000 emit_insn_before (new, temp4);
2001 delete_jump (insn);
2002 changed = 1;
2003 continue;
2004 }
2005 }
2006 /* If the trap condition and jump condition are mutually
2007 exclusive, redirect the jump to the following insn. */
2008 else if (GET_RTX_CLASS (GET_CODE (tc)) == '<'
2009 && ! this_is_simplejump
2010 && swap_condition (GET_CODE (temp2)) == GET_CODE (tc)
2011 && rtx_equal_p (XEXP (tc, 0), XEXP (temp2, 0))
2012 && rtx_equal_p (XEXP (tc, 1), XEXP (temp2, 1))
2013 && redirect_jump (insn, get_label_after (temp)))
2014 {
2015 changed = 1;
2016 continue;
2017 }
2018 }
2019 #endif
2020
2021 /* Detect a conditional jump jumping over an unconditional jump. */
2022
2023 else if ((this_is_condjump || this_is_condjump_in_parallel)
2024 && ! this_is_simplejump
2025 && reallabelprev != 0
2026 && GET_CODE (reallabelprev) == JUMP_INSN
2027 && prev_active_insn (reallabelprev) == insn
2028 && no_labels_between_p (insn, reallabelprev)
2029 && simplejump_p (reallabelprev))
2030 {
2031 /* When we invert the unconditional jump, we will be
2032 decrementing the usage count of its old label.
2033 Make sure that we don't delete it now because that
2034 might cause the following code to be deleted. */
2035 rtx prev_uses = prev_nonnote_insn (reallabelprev);
2036 rtx prev_label = JUMP_LABEL (insn);
2037
2038 if (prev_label)
2039 ++LABEL_NUSES (prev_label);
2040
2041 if (invert_jump (insn, JUMP_LABEL (reallabelprev)))
2042 {
2043 /* It is very likely that if there are USE insns before
2044 this jump, they hold REG_DEAD notes. These REG_DEAD
2045 notes are no longer valid due to this optimization,
2046 and will cause the life-analysis that following passes
2047 (notably delayed-branch scheduling) to think that
2048 these registers are dead when they are not.
2049
2050 To prevent this trouble, we just remove the USE insns
2051 from the insn chain. */
2052
2053 while (prev_uses && GET_CODE (prev_uses) == INSN
2054 && GET_CODE (PATTERN (prev_uses)) == USE)
2055 {
2056 rtx useless = prev_uses;
2057 prev_uses = prev_nonnote_insn (prev_uses);
2058 delete_insn (useless);
2059 }
2060
2061 delete_insn (reallabelprev);
2062 next = insn;
2063 changed = 1;
2064 }
2065
2066 /* We can now safely delete the label if it is unreferenced
2067 since the delete_insn above has deleted the BARRIER. */
2068 if (prev_label && --LABEL_NUSES (prev_label) == 0)
2069 delete_insn (prev_label);
2070 continue;
2071 }
2072 else
2073 {
2074 /* Detect a jump to a jump. */
2075
2076 nlabel = follow_jumps (JUMP_LABEL (insn));
2077 if (nlabel != JUMP_LABEL (insn)
2078 && redirect_jump (insn, nlabel))
2079 {
2080 changed = 1;
2081 next = insn;
2082 }
2083
2084 /* Look for if (foo) bar; else break; */
2085 /* The insns look like this:
2086 insn = condjump label1;
2087 ...range1 (some insns)...
2088 jump label2;
2089 label1:
2090 ...range2 (some insns)...
2091 jump somewhere unconditionally
2092 label2: */
2093 {
2094 rtx label1 = next_label (insn);
2095 rtx range1end = label1 ? prev_active_insn (label1) : 0;
2096 /* Don't do this optimization on the first round, so that
2097 jump-around-a-jump gets simplified before we ask here
2098 whether a jump is unconditional.
2099
2100 Also don't do it when we are called after reload since
2101 it will confuse reorg. */
2102 if (! first
2103 && (reload_completed ? ! flag_delayed_branch : 1)
2104 /* Make sure INSN is something we can invert. */
2105 && condjump_p (insn)
2106 && label1 != 0
2107 && JUMP_LABEL (insn) == label1
2108 && LABEL_NUSES (label1) == 1
2109 && GET_CODE (range1end) == JUMP_INSN
2110 && simplejump_p (range1end))
2111 {
2112 rtx label2 = next_label (label1);
2113 rtx range2end = label2 ? prev_active_insn (label2) : 0;
2114 if (range1end != range2end
2115 && JUMP_LABEL (range1end) == label2
2116 && GET_CODE (range2end) == JUMP_INSN
2117 && GET_CODE (NEXT_INSN (range2end)) == BARRIER
2118 /* Invert the jump condition, so we
2119 still execute the same insns in each case. */
2120 && invert_jump (insn, label1))
2121 {
2122 rtx range1beg = next_active_insn (insn);
2123 rtx range2beg = next_active_insn (label1);
2124 rtx range1after, range2after;
2125 rtx range1before, range2before;
2126 rtx rangenext;
2127
2128 /* Include in each range any notes before it, to be
2129 sure that we get the line number note if any, even
2130 if there are other notes here. */
2131 while (PREV_INSN (range1beg)
2132 && GET_CODE (PREV_INSN (range1beg)) == NOTE)
2133 range1beg = PREV_INSN (range1beg);
2134
2135 while (PREV_INSN (range2beg)
2136 && GET_CODE (PREV_INSN (range2beg)) == NOTE)
2137 range2beg = PREV_INSN (range2beg);
2138
2139 /* Don't move NOTEs for blocks or loops; shift them
2140 outside the ranges, where they'll stay put. */
2141 range1beg = squeeze_notes (range1beg, range1end);
2142 range2beg = squeeze_notes (range2beg, range2end);
2143
2144 /* Get current surrounds of the 2 ranges. */
2145 range1before = PREV_INSN (range1beg);
2146 range2before = PREV_INSN (range2beg);
2147 range1after = NEXT_INSN (range1end);
2148 range2after = NEXT_INSN (range2end);
2149
2150 /* Splice range2 where range1 was. */
2151 NEXT_INSN (range1before) = range2beg;
2152 PREV_INSN (range2beg) = range1before;
2153 NEXT_INSN (range2end) = range1after;
2154 PREV_INSN (range1after) = range2end;
2155 /* Splice range1 where range2 was. */
2156 NEXT_INSN (range2before) = range1beg;
2157 PREV_INSN (range1beg) = range2before;
2158 NEXT_INSN (range1end) = range2after;
2159 PREV_INSN (range2after) = range1end;
2160
2161 /* Check for a loop end note between the end of
2162 range2, and the next code label. If there is one,
2163 then what we have really seen is
2164 if (foo) break; end_of_loop;
2165 and moved the break sequence outside the loop.
2166 We must move the LOOP_END note to where the
2167 loop really ends now, or we will confuse loop
2168 optimization. Stop if we find a LOOP_BEG note
2169 first, since we don't want to move the LOOP_END
2170 note in that case. */
2171 for (;range2after != label2; range2after = rangenext)
2172 {
2173 rangenext = NEXT_INSN (range2after);
2174 if (GET_CODE (range2after) == NOTE)
2175 {
2176 if (NOTE_LINE_NUMBER (range2after)
2177 == NOTE_INSN_LOOP_END)
2178 {
2179 NEXT_INSN (PREV_INSN (range2after))
2180 = rangenext;
2181 PREV_INSN (rangenext)
2182 = PREV_INSN (range2after);
2183 PREV_INSN (range2after)
2184 = PREV_INSN (range1beg);
2185 NEXT_INSN (range2after) = range1beg;
2186 NEXT_INSN (PREV_INSN (range1beg))
2187 = range2after;
2188 PREV_INSN (range1beg) = range2after;
2189 }
2190 else if (NOTE_LINE_NUMBER (range2after)
2191 == NOTE_INSN_LOOP_BEG)
2192 break;
2193 }
2194 }
2195 changed = 1;
2196 continue;
2197 }
2198 }
2199 }
2200
2201 /* Now that the jump has been tensioned,
2202 try cross jumping: check for identical code
2203 before the jump and before its target label. */
2204
2205 /* First, cross jumping of conditional jumps: */
2206
2207 if (cross_jump && condjump_p (insn))
2208 {
2209 rtx newjpos, newlpos;
2210 rtx x = prev_real_insn (JUMP_LABEL (insn));
2211
2212 /* A conditional jump may be crossjumped
2213 only if the place it jumps to follows
2214 an opposing jump that comes back here. */
2215
2216 if (x != 0 && ! jump_back_p (x, insn))
2217 /* We have no opposing jump;
2218 cannot cross jump this insn. */
2219 x = 0;
2220
2221 newjpos = 0;
2222 /* TARGET is nonzero if it is ok to cross jump
2223 to code before TARGET. If so, see if matches. */
2224 if (x != 0)
2225 find_cross_jump (insn, x, 2,
2226 &newjpos, &newlpos);
2227
2228 if (newjpos != 0)
2229 {
2230 do_cross_jump (insn, newjpos, newlpos);
2231 /* Make the old conditional jump
2232 into an unconditional one. */
2233 SET_SRC (PATTERN (insn))
2234 = gen_rtx_LABEL_REF (VOIDmode, JUMP_LABEL (insn));
2235 INSN_CODE (insn) = -1;
2236 emit_barrier_after (insn);
2237 /* Add to jump_chain unless this is a new label
2238 whose UID is too large. */
2239 if (INSN_UID (JUMP_LABEL (insn)) < max_jump_chain)
2240 {
2241 jump_chain[INSN_UID (insn)]
2242 = jump_chain[INSN_UID (JUMP_LABEL (insn))];
2243 jump_chain[INSN_UID (JUMP_LABEL (insn))] = insn;
2244 }
2245 changed = 1;
2246 next = insn;
2247 }
2248 }
2249
2250 /* Cross jumping of unconditional jumps:
2251 a few differences. */
2252
2253 if (cross_jump && simplejump_p (insn))
2254 {
2255 rtx newjpos, newlpos;
2256 rtx target;
2257
2258 newjpos = 0;
2259
2260 /* TARGET is nonzero if it is ok to cross jump
2261 to code before TARGET. If so, see if matches. */
2262 find_cross_jump (insn, JUMP_LABEL (insn), 1,
2263 &newjpos, &newlpos);
2264
2265 /* If cannot cross jump to code before the label,
2266 see if we can cross jump to another jump to
2267 the same label. */
2268 /* Try each other jump to this label. */
2269 if (INSN_UID (JUMP_LABEL (insn)) < max_uid)
2270 for (target = jump_chain[INSN_UID (JUMP_LABEL (insn))];
2271 target != 0 && newjpos == 0;
2272 target = jump_chain[INSN_UID (target)])
2273 if (target != insn
2274 && JUMP_LABEL (target) == JUMP_LABEL (insn)
2275 /* Ignore TARGET if it's deleted. */
2276 && ! INSN_DELETED_P (target))
2277 find_cross_jump (insn, target, 2,
2278 &newjpos, &newlpos);
2279
2280 if (newjpos != 0)
2281 {
2282 do_cross_jump (insn, newjpos, newlpos);
2283 changed = 1;
2284 next = insn;
2285 }
2286 }
2287
2288 /* This code was dead in the previous jump.c! */
2289 if (cross_jump && GET_CODE (PATTERN (insn)) == RETURN)
2290 {
2291 /* Return insns all "jump to the same place"
2292 so we can cross-jump between any two of them. */
2293
2294 rtx newjpos, newlpos, target;
2295
2296 newjpos = 0;
2297
2298 /* If cannot cross jump to code before the label,
2299 see if we can cross jump to another jump to
2300 the same label. */
2301 /* Try each other jump to this label. */
2302 for (target = jump_chain[0];
2303 target != 0 && newjpos == 0;
2304 target = jump_chain[INSN_UID (target)])
2305 if (target != insn
2306 && ! INSN_DELETED_P (target)
2307 && GET_CODE (PATTERN (target)) == RETURN)
2308 find_cross_jump (insn, target, 2,
2309 &newjpos, &newlpos);
2310
2311 if (newjpos != 0)
2312 {
2313 do_cross_jump (insn, newjpos, newlpos);
2314 changed = 1;
2315 next = insn;
2316 }
2317 }
2318 }
2319 }
2320
2321 first = 0;
2322 }
2323
2324 /* Delete extraneous line number notes.
2325 Note that two consecutive notes for different lines are not really
2326 extraneous. There should be some indication where that line belonged,
2327 even if it became empty. */
2328
2329 {
2330 rtx last_note = 0;
2331
2332 for (insn = f; insn; insn = NEXT_INSN (insn))
2333 if (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) >= 0)
2334 {
2335 /* Delete this note if it is identical to previous note. */
2336 if (last_note
2337 && NOTE_SOURCE_FILE (insn) == NOTE_SOURCE_FILE (last_note)
2338 && NOTE_LINE_NUMBER (insn) == NOTE_LINE_NUMBER (last_note))
2339 {
2340 delete_insn (insn);
2341 continue;
2342 }
2343
2344 last_note = insn;
2345 }
2346 }
2347
2348 #ifdef HAVE_return
2349 if (HAVE_return)
2350 {
2351 /* If we fall through to the epilogue, see if we can insert a RETURN insn
2352 in front of it. If the machine allows it at this point (we might be
2353 after reload for a leaf routine), it will improve optimization for it
2354 to be there. We do this both here and at the start of this pass since
2355 the RETURN might have been deleted by some of our optimizations. */
2356 insn = get_last_insn ();
2357 while (insn && GET_CODE (insn) == NOTE)
2358 insn = PREV_INSN (insn);
2359
2360 if (insn && GET_CODE (insn) != BARRIER)
2361 {
2362 emit_jump_insn (gen_return ());
2363 emit_barrier ();
2364 }
2365 }
2366 #endif
2367
2368 /* See if there is still a NOTE_INSN_FUNCTION_END in this function.
2369 If so, delete it, and record that this function can drop off the end. */
2370
2371 insn = last_insn;
2372 {
2373 int n_labels = 1;
2374 while (insn
2375 /* One label can follow the end-note: the return label. */
2376 && ((GET_CODE (insn) == CODE_LABEL && n_labels-- > 0)
2377 /* Ordinary insns can follow it if returning a structure. */
2378 || GET_CODE (insn) == INSN
2379 /* If machine uses explicit RETURN insns, no epilogue,
2380 then one of them follows the note. */
2381 || (GET_CODE (insn) == JUMP_INSN
2382 && GET_CODE (PATTERN (insn)) == RETURN)
2383 /* A barrier can follow the return insn. */
2384 || GET_CODE (insn) == BARRIER
2385 /* Other kinds of notes can follow also. */
2386 || (GET_CODE (insn) == NOTE
2387 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_FUNCTION_END)))
2388 insn = PREV_INSN (insn);
2389 }
2390
2391 /* Report if control can fall through at the end of the function. */
2392 if (insn && GET_CODE (insn) == NOTE
2393 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_FUNCTION_END)
2394 {
2395 can_reach_end = 1;
2396 delete_insn (insn);
2397 }
2398
2399 /* Show JUMP_CHAIN no longer valid. */
2400 jump_chain = 0;
2401 }
2402 \f
2403 /* LOOP_START is a NOTE_INSN_LOOP_BEG note that is followed by an unconditional
2404 jump. Assume that this unconditional jump is to the exit test code. If
2405 the code is sufficiently simple, make a copy of it before INSN,
2406 followed by a jump to the exit of the loop. Then delete the unconditional
2407 jump after INSN.
2408
2409 Return 1 if we made the change, else 0.
2410
2411 This is only safe immediately after a regscan pass because it uses the
2412 values of regno_first_uid and regno_last_uid. */
2413
2414 static int
2415 duplicate_loop_exit_test (loop_start)
2416 rtx loop_start;
2417 {
2418 rtx insn, set, reg, p, link;
2419 rtx copy = 0;
2420 int num_insns = 0;
2421 rtx exitcode = NEXT_INSN (JUMP_LABEL (next_nonnote_insn (loop_start)));
2422 rtx lastexit;
2423 int max_reg = max_reg_num ();
2424 rtx *reg_map = 0;
2425
2426 /* Scan the exit code. We do not perform this optimization if any insn:
2427
2428 is a CALL_INSN
2429 is a CODE_LABEL
2430 has a REG_RETVAL or REG_LIBCALL note (hard to adjust)
2431 is a NOTE_INSN_LOOP_BEG because this means we have a nested loop
2432 is a NOTE_INSN_BLOCK_{BEG,END} because duplicating these notes
2433 is not valid.
2434
2435 We also do not do this if we find an insn with ASM_OPERANDS. While
2436 this restriction should not be necessary, copying an insn with
2437 ASM_OPERANDS can confuse asm_noperands in some cases.
2438
2439 Also, don't do this if the exit code is more than 20 insns. */
2440
2441 for (insn = exitcode;
2442 insn
2443 && ! (GET_CODE (insn) == NOTE
2444 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END);
2445 insn = NEXT_INSN (insn))
2446 {
2447 switch (GET_CODE (insn))
2448 {
2449 case CODE_LABEL:
2450 case CALL_INSN:
2451 return 0;
2452 case NOTE:
2453 /* We could be in front of the wrong NOTE_INSN_LOOP_END if there is
2454 a jump immediately after the loop start that branches outside
2455 the loop but within an outer loop, near the exit test.
2456 If we copied this exit test and created a phony
2457 NOTE_INSN_LOOP_VTOP, this could make instructions immediately
2458 before the exit test look like these could be safely moved
2459 out of the loop even if they actually may be never executed.
2460 This can be avoided by checking here for NOTE_INSN_LOOP_CONT. */
2461
2462 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG
2463 || NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_CONT)
2464 return 0;
2465
2466 if (optimize < 2
2467 && (NOTE_LINE_NUMBER (insn) == NOTE_INSN_BLOCK_BEG
2468 || NOTE_LINE_NUMBER (insn) == NOTE_INSN_BLOCK_END))
2469 /* If we were to duplicate this code, we would not move
2470 the BLOCK notes, and so debugging the moved code would
2471 be difficult. Thus, we only move the code with -O2 or
2472 higher. */
2473 return 0;
2474
2475 break;
2476 case JUMP_INSN:
2477 case INSN:
2478 /* The code below would grossly mishandle REG_WAS_0 notes,
2479 so get rid of them here. */
2480 while ((p = find_reg_note (insn, REG_WAS_0, NULL_RTX)) != 0)
2481 remove_note (insn, p);
2482 if (++num_insns > 20
2483 || find_reg_note (insn, REG_RETVAL, NULL_RTX)
2484 || find_reg_note (insn, REG_LIBCALL, NULL_RTX)
2485 || asm_noperands (PATTERN (insn)) > 0)
2486 return 0;
2487 break;
2488 default:
2489 break;
2490 }
2491 }
2492
2493 /* Unless INSN is zero, we can do the optimization. */
2494 if (insn == 0)
2495 return 0;
2496
2497 lastexit = insn;
2498
2499 /* See if any insn sets a register only used in the loop exit code and
2500 not a user variable. If so, replace it with a new register. */
2501 for (insn = exitcode; insn != lastexit; insn = NEXT_INSN (insn))
2502 if (GET_CODE (insn) == INSN
2503 && (set = single_set (insn)) != 0
2504 && ((reg = SET_DEST (set), GET_CODE (reg) == REG)
2505 || (GET_CODE (reg) == SUBREG
2506 && (reg = SUBREG_REG (reg), GET_CODE (reg) == REG)))
2507 && REGNO (reg) >= FIRST_PSEUDO_REGISTER
2508 && REGNO_FIRST_UID (REGNO (reg)) == INSN_UID (insn))
2509 {
2510 for (p = NEXT_INSN (insn); p != lastexit; p = NEXT_INSN (p))
2511 if (REGNO_LAST_UID (REGNO (reg)) == INSN_UID (p))
2512 break;
2513
2514 if (p != lastexit)
2515 {
2516 /* We can do the replacement. Allocate reg_map if this is the
2517 first replacement we found. */
2518 if (reg_map == 0)
2519 {
2520 reg_map = (rtx *) alloca (max_reg * sizeof (rtx));
2521 bzero ((char *) reg_map, max_reg * sizeof (rtx));
2522 }
2523
2524 REG_LOOP_TEST_P (reg) = 1;
2525
2526 reg_map[REGNO (reg)] = gen_reg_rtx (GET_MODE (reg));
2527 }
2528 }
2529
2530 /* Now copy each insn. */
2531 for (insn = exitcode; insn != lastexit; insn = NEXT_INSN (insn))
2532 switch (GET_CODE (insn))
2533 {
2534 case BARRIER:
2535 copy = emit_barrier_before (loop_start);
2536 break;
2537 case NOTE:
2538 /* Only copy line-number notes. */
2539 if (NOTE_LINE_NUMBER (insn) >= 0)
2540 {
2541 copy = emit_note_before (NOTE_LINE_NUMBER (insn), loop_start);
2542 NOTE_SOURCE_FILE (copy) = NOTE_SOURCE_FILE (insn);
2543 }
2544 break;
2545
2546 case INSN:
2547 copy = emit_insn_before (copy_rtx (PATTERN (insn)), loop_start);
2548 if (reg_map)
2549 replace_regs (PATTERN (copy), reg_map, max_reg, 1);
2550
2551 mark_jump_label (PATTERN (copy), copy, 0);
2552
2553 /* Copy all REG_NOTES except REG_LABEL since mark_jump_label will
2554 make them. */
2555 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
2556 if (REG_NOTE_KIND (link) != REG_LABEL)
2557 REG_NOTES (copy)
2558 = copy_rtx (gen_rtx_EXPR_LIST (REG_NOTE_KIND (link),
2559 XEXP (link, 0),
2560 REG_NOTES (copy)));
2561 if (reg_map && REG_NOTES (copy))
2562 replace_regs (REG_NOTES (copy), reg_map, max_reg, 1);
2563 break;
2564
2565 case JUMP_INSN:
2566 copy = emit_jump_insn_before (copy_rtx (PATTERN (insn)), loop_start);
2567 if (reg_map)
2568 replace_regs (PATTERN (copy), reg_map, max_reg, 1);
2569 mark_jump_label (PATTERN (copy), copy, 0);
2570 if (REG_NOTES (insn))
2571 {
2572 REG_NOTES (copy) = copy_rtx (REG_NOTES (insn));
2573 if (reg_map)
2574 replace_regs (REG_NOTES (copy), reg_map, max_reg, 1);
2575 }
2576
2577 /* If this is a simple jump, add it to the jump chain. */
2578
2579 if (INSN_UID (copy) < max_jump_chain && JUMP_LABEL (copy)
2580 && simplejump_p (copy))
2581 {
2582 jump_chain[INSN_UID (copy)]
2583 = jump_chain[INSN_UID (JUMP_LABEL (copy))];
2584 jump_chain[INSN_UID (JUMP_LABEL (copy))] = copy;
2585 }
2586 break;
2587
2588 default:
2589 abort ();
2590 }
2591
2592 /* Now clean up by emitting a jump to the end label and deleting the jump
2593 at the start of the loop. */
2594 if (! copy || GET_CODE (copy) != BARRIER)
2595 {
2596 copy = emit_jump_insn_before (gen_jump (get_label_after (insn)),
2597 loop_start);
2598 mark_jump_label (PATTERN (copy), copy, 0);
2599 if (INSN_UID (copy) < max_jump_chain
2600 && INSN_UID (JUMP_LABEL (copy)) < max_jump_chain)
2601 {
2602 jump_chain[INSN_UID (copy)]
2603 = jump_chain[INSN_UID (JUMP_LABEL (copy))];
2604 jump_chain[INSN_UID (JUMP_LABEL (copy))] = copy;
2605 }
2606 emit_barrier_before (loop_start);
2607 }
2608
2609 /* Mark the exit code as the virtual top of the converted loop. */
2610 emit_note_before (NOTE_INSN_LOOP_VTOP, exitcode);
2611
2612 delete_insn (next_nonnote_insn (loop_start));
2613
2614 return 1;
2615 }
2616 \f
2617 /* Move all block-beg, block-end, loop-beg, loop-cont, loop-vtop, and
2618 loop-end notes between START and END out before START. Assume that
2619 END is not such a note. START may be such a note. Returns the value
2620 of the new starting insn, which may be different if the original start
2621 was such a note. */
2622
2623 rtx
2624 squeeze_notes (start, end)
2625 rtx start, end;
2626 {
2627 rtx insn;
2628 rtx next;
2629
2630 for (insn = start; insn != end; insn = next)
2631 {
2632 next = NEXT_INSN (insn);
2633 if (GET_CODE (insn) == NOTE
2634 && (NOTE_LINE_NUMBER (insn) == NOTE_INSN_BLOCK_END
2635 || NOTE_LINE_NUMBER (insn) == NOTE_INSN_BLOCK_BEG
2636 || NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG
2637 || NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END
2638 || NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_CONT
2639 || NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_VTOP))
2640 {
2641 if (insn == start)
2642 start = next;
2643 else
2644 {
2645 rtx prev = PREV_INSN (insn);
2646 PREV_INSN (insn) = PREV_INSN (start);
2647 NEXT_INSN (insn) = start;
2648 NEXT_INSN (PREV_INSN (insn)) = insn;
2649 PREV_INSN (NEXT_INSN (insn)) = insn;
2650 NEXT_INSN (prev) = next;
2651 PREV_INSN (next) = prev;
2652 }
2653 }
2654 }
2655
2656 return start;
2657 }
2658 \f
2659 /* Compare the instructions before insn E1 with those before E2
2660 to find an opportunity for cross jumping.
2661 (This means detecting identical sequences of insns followed by
2662 jumps to the same place, or followed by a label and a jump
2663 to that label, and replacing one with a jump to the other.)
2664
2665 Assume E1 is a jump that jumps to label E2
2666 (that is not always true but it might as well be).
2667 Find the longest possible equivalent sequences
2668 and store the first insns of those sequences into *F1 and *F2.
2669 Store zero there if no equivalent preceding instructions are found.
2670
2671 We give up if we find a label in stream 1.
2672 Actually we could transfer that label into stream 2. */
2673
2674 static void
2675 find_cross_jump (e1, e2, minimum, f1, f2)
2676 rtx e1, e2;
2677 int minimum;
2678 rtx *f1, *f2;
2679 {
2680 register rtx i1 = e1, i2 = e2;
2681 register rtx p1, p2;
2682 int lose = 0;
2683
2684 rtx last1 = 0, last2 = 0;
2685 rtx afterlast1 = 0, afterlast2 = 0;
2686
2687 *f1 = 0;
2688 *f2 = 0;
2689
2690 while (1)
2691 {
2692 i1 = prev_nonnote_insn (i1);
2693
2694 i2 = PREV_INSN (i2);
2695 while (i2 && (GET_CODE (i2) == NOTE || GET_CODE (i2) == CODE_LABEL))
2696 i2 = PREV_INSN (i2);
2697
2698 if (i1 == 0)
2699 break;
2700
2701 /* Don't allow the range of insns preceding E1 or E2
2702 to include the other (E2 or E1). */
2703 if (i2 == e1 || i1 == e2)
2704 break;
2705
2706 /* If we will get to this code by jumping, those jumps will be
2707 tensioned to go directly to the new label (before I2),
2708 so this cross-jumping won't cost extra. So reduce the minimum. */
2709 if (GET_CODE (i1) == CODE_LABEL)
2710 {
2711 --minimum;
2712 break;
2713 }
2714
2715 if (i2 == 0 || GET_CODE (i1) != GET_CODE (i2))
2716 break;
2717
2718 p1 = PATTERN (i1);
2719 p2 = PATTERN (i2);
2720
2721 /* If this is a CALL_INSN, compare register usage information.
2722 If we don't check this on stack register machines, the two
2723 CALL_INSNs might be merged leaving reg-stack.c with mismatching
2724 numbers of stack registers in the same basic block.
2725 If we don't check this on machines with delay slots, a delay slot may
2726 be filled that clobbers a parameter expected by the subroutine.
2727
2728 ??? We take the simple route for now and assume that if they're
2729 equal, they were constructed identically. */
2730
2731 if (GET_CODE (i1) == CALL_INSN
2732 && ! rtx_equal_p (CALL_INSN_FUNCTION_USAGE (i1),
2733 CALL_INSN_FUNCTION_USAGE (i2)))
2734 lose = 1;
2735
2736 #ifdef STACK_REGS
2737 /* If cross_jump_death_matters is not 0, the insn's mode
2738 indicates whether or not the insn contains any stack-like
2739 regs. */
2740
2741 if (!lose && cross_jump_death_matters && GET_MODE (i1) == QImode)
2742 {
2743 /* If register stack conversion has already been done, then
2744 death notes must also be compared before it is certain that
2745 the two instruction streams match. */
2746
2747 rtx note;
2748 HARD_REG_SET i1_regset, i2_regset;
2749
2750 CLEAR_HARD_REG_SET (i1_regset);
2751 CLEAR_HARD_REG_SET (i2_regset);
2752
2753 for (note = REG_NOTES (i1); note; note = XEXP (note, 1))
2754 if (REG_NOTE_KIND (note) == REG_DEAD
2755 && STACK_REG_P (XEXP (note, 0)))
2756 SET_HARD_REG_BIT (i1_regset, REGNO (XEXP (note, 0)));
2757
2758 for (note = REG_NOTES (i2); note; note = XEXP (note, 1))
2759 if (REG_NOTE_KIND (note) == REG_DEAD
2760 && STACK_REG_P (XEXP (note, 0)))
2761 SET_HARD_REG_BIT (i2_regset, REGNO (XEXP (note, 0)));
2762
2763 GO_IF_HARD_REG_EQUAL (i1_regset, i2_regset, done);
2764
2765 lose = 1;
2766
2767 done:
2768 ;
2769 }
2770 #endif
2771
2772 /* Don't allow old-style asm or volatile extended asms to be accepted
2773 for cross jumping purposes. It is conceptually correct to allow
2774 them, since cross-jumping preserves the dynamic instruction order
2775 even though it is changing the static instruction order. However,
2776 if an asm is being used to emit an assembler pseudo-op, such as
2777 the MIPS `.set reorder' pseudo-op, then the static instruction order
2778 matters and it must be preserved. */
2779 if (GET_CODE (p1) == ASM_INPUT || GET_CODE (p2) == ASM_INPUT
2780 || (GET_CODE (p1) == ASM_OPERANDS && MEM_VOLATILE_P (p1))
2781 || (GET_CODE (p2) == ASM_OPERANDS && MEM_VOLATILE_P (p2)))
2782 lose = 1;
2783
2784 if (lose || GET_CODE (p1) != GET_CODE (p2)
2785 || ! rtx_renumbered_equal_p (p1, p2))
2786 {
2787 /* The following code helps take care of G++ cleanups. */
2788 rtx equiv1;
2789 rtx equiv2;
2790
2791 if (!lose && GET_CODE (p1) == GET_CODE (p2)
2792 && ((equiv1 = find_reg_note (i1, REG_EQUAL, NULL_RTX)) != 0
2793 || (equiv1 = find_reg_note (i1, REG_EQUIV, NULL_RTX)) != 0)
2794 && ((equiv2 = find_reg_note (i2, REG_EQUAL, NULL_RTX)) != 0
2795 || (equiv2 = find_reg_note (i2, REG_EQUIV, NULL_RTX)) != 0)
2796 /* If the equivalences are not to a constant, they may
2797 reference pseudos that no longer exist, so we can't
2798 use them. */
2799 && CONSTANT_P (XEXP (equiv1, 0))
2800 && rtx_equal_p (XEXP (equiv1, 0), XEXP (equiv2, 0)))
2801 {
2802 rtx s1 = single_set (i1);
2803 rtx s2 = single_set (i2);
2804 if (s1 != 0 && s2 != 0
2805 && rtx_renumbered_equal_p (SET_DEST (s1), SET_DEST (s2)))
2806 {
2807 validate_change (i1, &SET_SRC (s1), XEXP (equiv1, 0), 1);
2808 validate_change (i2, &SET_SRC (s2), XEXP (equiv2, 0), 1);
2809 if (! rtx_renumbered_equal_p (p1, p2))
2810 cancel_changes (0);
2811 else if (apply_change_group ())
2812 goto win;
2813 }
2814 }
2815
2816 /* Insns fail to match; cross jumping is limited to the following
2817 insns. */
2818
2819 #ifdef HAVE_cc0
2820 /* Don't allow the insn after a compare to be shared by
2821 cross-jumping unless the compare is also shared.
2822 Here, if either of these non-matching insns is a compare,
2823 exclude the following insn from possible cross-jumping. */
2824 if (sets_cc0_p (p1) || sets_cc0_p (p2))
2825 last1 = afterlast1, last2 = afterlast2, ++minimum;
2826 #endif
2827
2828 /* If cross-jumping here will feed a jump-around-jump
2829 optimization, this jump won't cost extra, so reduce
2830 the minimum. */
2831 if (GET_CODE (i1) == JUMP_INSN
2832 && JUMP_LABEL (i1)
2833 && prev_real_insn (JUMP_LABEL (i1)) == e1)
2834 --minimum;
2835 break;
2836 }
2837
2838 win:
2839 if (GET_CODE (p1) != USE && GET_CODE (p1) != CLOBBER)
2840 {
2841 /* Ok, this insn is potentially includable in a cross-jump here. */
2842 afterlast1 = last1, afterlast2 = last2;
2843 last1 = i1, last2 = i2, --minimum;
2844 }
2845 }
2846
2847 if (minimum <= 0 && last1 != 0 && last1 != e1)
2848 *f1 = last1, *f2 = last2;
2849 }
2850
2851 static void
2852 do_cross_jump (insn, newjpos, newlpos)
2853 rtx insn, newjpos, newlpos;
2854 {
2855 /* Find an existing label at this point
2856 or make a new one if there is none. */
2857 register rtx label = get_label_before (newlpos);
2858
2859 /* Make the same jump insn jump to the new point. */
2860 if (GET_CODE (PATTERN (insn)) == RETURN)
2861 {
2862 /* Remove from jump chain of returns. */
2863 delete_from_jump_chain (insn);
2864 /* Change the insn. */
2865 PATTERN (insn) = gen_jump (label);
2866 INSN_CODE (insn) = -1;
2867 JUMP_LABEL (insn) = label;
2868 LABEL_NUSES (label)++;
2869 /* Add to new the jump chain. */
2870 if (INSN_UID (label) < max_jump_chain
2871 && INSN_UID (insn) < max_jump_chain)
2872 {
2873 jump_chain[INSN_UID (insn)] = jump_chain[INSN_UID (label)];
2874 jump_chain[INSN_UID (label)] = insn;
2875 }
2876 }
2877 else
2878 redirect_jump (insn, label);
2879
2880 /* Delete the matching insns before the jump. Also, remove any REG_EQUAL
2881 or REG_EQUIV note in the NEWLPOS stream that isn't also present in
2882 the NEWJPOS stream. */
2883
2884 while (newjpos != insn)
2885 {
2886 rtx lnote;
2887
2888 for (lnote = REG_NOTES (newlpos); lnote; lnote = XEXP (lnote, 1))
2889 if ((REG_NOTE_KIND (lnote) == REG_EQUAL
2890 || REG_NOTE_KIND (lnote) == REG_EQUIV)
2891 && ! find_reg_note (newjpos, REG_EQUAL, XEXP (lnote, 0))
2892 && ! find_reg_note (newjpos, REG_EQUIV, XEXP (lnote, 0)))
2893 remove_note (newlpos, lnote);
2894
2895 delete_insn (newjpos);
2896 newjpos = next_real_insn (newjpos);
2897 newlpos = next_real_insn (newlpos);
2898 }
2899 }
2900 \f
2901 /* Return the label before INSN, or put a new label there. */
2902
2903 rtx
2904 get_label_before (insn)
2905 rtx insn;
2906 {
2907 rtx label;
2908
2909 /* Find an existing label at this point
2910 or make a new one if there is none. */
2911 label = prev_nonnote_insn (insn);
2912
2913 if (label == 0 || GET_CODE (label) != CODE_LABEL)
2914 {
2915 rtx prev = PREV_INSN (insn);
2916
2917 label = gen_label_rtx ();
2918 emit_label_after (label, prev);
2919 LABEL_NUSES (label) = 0;
2920 }
2921 return label;
2922 }
2923
2924 /* Return the label after INSN, or put a new label there. */
2925
2926 rtx
2927 get_label_after (insn)
2928 rtx insn;
2929 {
2930 rtx label;
2931
2932 /* Find an existing label at this point
2933 or make a new one if there is none. */
2934 label = next_nonnote_insn (insn);
2935
2936 if (label == 0 || GET_CODE (label) != CODE_LABEL)
2937 {
2938 label = gen_label_rtx ();
2939 emit_label_after (label, insn);
2940 LABEL_NUSES (label) = 0;
2941 }
2942 return label;
2943 }
2944 \f
2945 /* Return 1 if INSN is a jump that jumps to right after TARGET
2946 only on the condition that TARGET itself would drop through.
2947 Assumes that TARGET is a conditional jump. */
2948
2949 static int
2950 jump_back_p (insn, target)
2951 rtx insn, target;
2952 {
2953 rtx cinsn, ctarget;
2954 enum rtx_code codei, codet;
2955
2956 if (simplejump_p (insn) || ! condjump_p (insn)
2957 || simplejump_p (target)
2958 || target != prev_real_insn (JUMP_LABEL (insn)))
2959 return 0;
2960
2961 cinsn = XEXP (SET_SRC (PATTERN (insn)), 0);
2962 ctarget = XEXP (SET_SRC (PATTERN (target)), 0);
2963
2964 codei = GET_CODE (cinsn);
2965 codet = GET_CODE (ctarget);
2966
2967 if (XEXP (SET_SRC (PATTERN (insn)), 1) == pc_rtx)
2968 {
2969 if (! can_reverse_comparison_p (cinsn, insn))
2970 return 0;
2971 codei = reverse_condition (codei);
2972 }
2973
2974 if (XEXP (SET_SRC (PATTERN (target)), 2) == pc_rtx)
2975 {
2976 if (! can_reverse_comparison_p (ctarget, target))
2977 return 0;
2978 codet = reverse_condition (codet);
2979 }
2980
2981 return (codei == codet
2982 && rtx_renumbered_equal_p (XEXP (cinsn, 0), XEXP (ctarget, 0))
2983 && rtx_renumbered_equal_p (XEXP (cinsn, 1), XEXP (ctarget, 1)));
2984 }
2985 \f
2986 /* Given a comparison, COMPARISON, inside a conditional jump insn, INSN,
2987 return non-zero if it is safe to reverse this comparison. It is if our
2988 floating-point is not IEEE, if this is an NE or EQ comparison, or if
2989 this is known to be an integer comparison. */
2990
2991 int
2992 can_reverse_comparison_p (comparison, insn)
2993 rtx comparison;
2994 rtx insn;
2995 {
2996 rtx arg0;
2997
2998 /* If this is not actually a comparison, we can't reverse it. */
2999 if (GET_RTX_CLASS (GET_CODE (comparison)) != '<')
3000 return 0;
3001
3002 if (TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
3003 /* If this is an NE comparison, it is safe to reverse it to an EQ
3004 comparison and vice versa, even for floating point. If no operands
3005 are NaNs, the reversal is valid. If some operand is a NaN, EQ is
3006 always false and NE is always true, so the reversal is also valid. */
3007 || flag_fast_math
3008 || GET_CODE (comparison) == NE
3009 || GET_CODE (comparison) == EQ)
3010 return 1;
3011
3012 arg0 = XEXP (comparison, 0);
3013
3014 /* Make sure ARG0 is one of the actual objects being compared. If we
3015 can't do this, we can't be sure the comparison can be reversed.
3016
3017 Handle cc0 and a MODE_CC register. */
3018 if ((GET_CODE (arg0) == REG && GET_MODE_CLASS (GET_MODE (arg0)) == MODE_CC)
3019 #ifdef HAVE_cc0
3020 || arg0 == cc0_rtx
3021 #endif
3022 )
3023 {
3024 rtx prev = prev_nonnote_insn (insn);
3025 rtx set = single_set (prev);
3026
3027 if (set == 0 || SET_DEST (set) != arg0)
3028 return 0;
3029
3030 arg0 = SET_SRC (set);
3031
3032 if (GET_CODE (arg0) == COMPARE)
3033 arg0 = XEXP (arg0, 0);
3034 }
3035
3036 /* We can reverse this if ARG0 is a CONST_INT or if its mode is
3037 not VOIDmode and neither a MODE_CC nor MODE_FLOAT type. */
3038 return (GET_CODE (arg0) == CONST_INT
3039 || (GET_MODE (arg0) != VOIDmode
3040 && GET_MODE_CLASS (GET_MODE (arg0)) != MODE_CC
3041 && GET_MODE_CLASS (GET_MODE (arg0)) != MODE_FLOAT));
3042 }
3043
3044 /* Given an rtx-code for a comparison, return the code
3045 for the negated comparison.
3046 WATCH OUT! reverse_condition is not safe to use on a jump
3047 that might be acting on the results of an IEEE floating point comparison,
3048 because of the special treatment of non-signaling nans in comparisons.
3049 Use can_reverse_comparison_p to be sure. */
3050
3051 enum rtx_code
3052 reverse_condition (code)
3053 enum rtx_code code;
3054 {
3055 switch (code)
3056 {
3057 case EQ:
3058 return NE;
3059
3060 case NE:
3061 return EQ;
3062
3063 case GT:
3064 return LE;
3065
3066 case GE:
3067 return LT;
3068
3069 case LT:
3070 return GE;
3071
3072 case LE:
3073 return GT;
3074
3075 case GTU:
3076 return LEU;
3077
3078 case GEU:
3079 return LTU;
3080
3081 case LTU:
3082 return GEU;
3083
3084 case LEU:
3085 return GTU;
3086
3087 default:
3088 abort ();
3089 return UNKNOWN;
3090 }
3091 }
3092
3093 /* Similar, but return the code when two operands of a comparison are swapped.
3094 This IS safe for IEEE floating-point. */
3095
3096 enum rtx_code
3097 swap_condition (code)
3098 enum rtx_code code;
3099 {
3100 switch (code)
3101 {
3102 case EQ:
3103 case NE:
3104 return code;
3105
3106 case GT:
3107 return LT;
3108
3109 case GE:
3110 return LE;
3111
3112 case LT:
3113 return GT;
3114
3115 case LE:
3116 return GE;
3117
3118 case GTU:
3119 return LTU;
3120
3121 case GEU:
3122 return LEU;
3123
3124 case LTU:
3125 return GTU;
3126
3127 case LEU:
3128 return GEU;
3129
3130 default:
3131 abort ();
3132 return UNKNOWN;
3133 }
3134 }
3135
3136 /* Given a comparison CODE, return the corresponding unsigned comparison.
3137 If CODE is an equality comparison or already an unsigned comparison,
3138 CODE is returned. */
3139
3140 enum rtx_code
3141 unsigned_condition (code)
3142 enum rtx_code code;
3143 {
3144 switch (code)
3145 {
3146 case EQ:
3147 case NE:
3148 case GTU:
3149 case GEU:
3150 case LTU:
3151 case LEU:
3152 return code;
3153
3154 case GT:
3155 return GTU;
3156
3157 case GE:
3158 return GEU;
3159
3160 case LT:
3161 return LTU;
3162
3163 case LE:
3164 return LEU;
3165
3166 default:
3167 abort ();
3168 }
3169 }
3170
3171 /* Similarly, return the signed version of a comparison. */
3172
3173 enum rtx_code
3174 signed_condition (code)
3175 enum rtx_code code;
3176 {
3177 switch (code)
3178 {
3179 case EQ:
3180 case NE:
3181 case GT:
3182 case GE:
3183 case LT:
3184 case LE:
3185 return code;
3186
3187 case GTU:
3188 return GT;
3189
3190 case GEU:
3191 return GE;
3192
3193 case LTU:
3194 return LT;
3195
3196 case LEU:
3197 return LE;
3198
3199 default:
3200 abort ();
3201 }
3202 }
3203 \f
3204 /* Return non-zero if CODE1 is more strict than CODE2, i.e., if the
3205 truth of CODE1 implies the truth of CODE2. */
3206
3207 int
3208 comparison_dominates_p (code1, code2)
3209 enum rtx_code code1, code2;
3210 {
3211 if (code1 == code2)
3212 return 1;
3213
3214 switch (code1)
3215 {
3216 case EQ:
3217 if (code2 == LE || code2 == LEU || code2 == GE || code2 == GEU)
3218 return 1;
3219 break;
3220
3221 case LT:
3222 if (code2 == LE || code2 == NE)
3223 return 1;
3224 break;
3225
3226 case GT:
3227 if (code2 == GE || code2 == NE)
3228 return 1;
3229 break;
3230
3231 case LTU:
3232 if (code2 == LEU || code2 == NE)
3233 return 1;
3234 break;
3235
3236 case GTU:
3237 if (code2 == GEU || code2 == NE)
3238 return 1;
3239 break;
3240
3241 default:
3242 break;
3243 }
3244
3245 return 0;
3246 }
3247 \f
3248 /* Return 1 if INSN is an unconditional jump and nothing else. */
3249
3250 int
3251 simplejump_p (insn)
3252 rtx insn;
3253 {
3254 return (GET_CODE (insn) == JUMP_INSN
3255 && GET_CODE (PATTERN (insn)) == SET
3256 && GET_CODE (SET_DEST (PATTERN (insn))) == PC
3257 && GET_CODE (SET_SRC (PATTERN (insn))) == LABEL_REF);
3258 }
3259
3260 /* Return nonzero if INSN is a (possibly) conditional jump
3261 and nothing more. */
3262
3263 int
3264 condjump_p (insn)
3265 rtx insn;
3266 {
3267 register rtx x = PATTERN (insn);
3268 if (GET_CODE (x) != SET)
3269 return 0;
3270 if (GET_CODE (SET_DEST (x)) != PC)
3271 return 0;
3272 if (GET_CODE (SET_SRC (x)) == LABEL_REF)
3273 return 1;
3274 if (GET_CODE (SET_SRC (x)) != IF_THEN_ELSE)
3275 return 0;
3276 if (XEXP (SET_SRC (x), 2) == pc_rtx
3277 && (GET_CODE (XEXP (SET_SRC (x), 1)) == LABEL_REF
3278 || GET_CODE (XEXP (SET_SRC (x), 1)) == RETURN))
3279 return 1;
3280 if (XEXP (SET_SRC (x), 1) == pc_rtx
3281 && (GET_CODE (XEXP (SET_SRC (x), 2)) == LABEL_REF
3282 || GET_CODE (XEXP (SET_SRC (x), 2)) == RETURN))
3283 return 1;
3284 return 0;
3285 }
3286
3287 /* Return nonzero if INSN is a (possibly) conditional jump
3288 and nothing more. */
3289
3290 int
3291 condjump_in_parallel_p (insn)
3292 rtx insn;
3293 {
3294 register rtx x = PATTERN (insn);
3295
3296 if (GET_CODE (x) != PARALLEL)
3297 return 0;
3298 else
3299 x = XVECEXP (x, 0, 0);
3300
3301 if (GET_CODE (x) != SET)
3302 return 0;
3303 if (GET_CODE (SET_DEST (x)) != PC)
3304 return 0;
3305 if (GET_CODE (SET_SRC (x)) == LABEL_REF)
3306 return 1;
3307 if (GET_CODE (SET_SRC (x)) != IF_THEN_ELSE)
3308 return 0;
3309 if (XEXP (SET_SRC (x), 2) == pc_rtx
3310 && (GET_CODE (XEXP (SET_SRC (x), 1)) == LABEL_REF
3311 || GET_CODE (XEXP (SET_SRC (x), 1)) == RETURN))
3312 return 1;
3313 if (XEXP (SET_SRC (x), 1) == pc_rtx
3314 && (GET_CODE (XEXP (SET_SRC (x), 2)) == LABEL_REF
3315 || GET_CODE (XEXP (SET_SRC (x), 2)) == RETURN))
3316 return 1;
3317 return 0;
3318 }
3319
3320 /* Return 1 if X is an RTX that does nothing but set the condition codes
3321 and CLOBBER or USE registers.
3322 Return -1 if X does explicitly set the condition codes,
3323 but also does other things. */
3324
3325 int
3326 sets_cc0_p (x)
3327 rtx x ATTRIBUTE_UNUSED;
3328 {
3329 #ifdef HAVE_cc0
3330 if (GET_CODE (x) == SET && SET_DEST (x) == cc0_rtx)
3331 return 1;
3332 if (GET_CODE (x) == PARALLEL)
3333 {
3334 int i;
3335 int sets_cc0 = 0;
3336 int other_things = 0;
3337 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
3338 {
3339 if (GET_CODE (XVECEXP (x, 0, i)) == SET
3340 && SET_DEST (XVECEXP (x, 0, i)) == cc0_rtx)
3341 sets_cc0 = 1;
3342 else if (GET_CODE (XVECEXP (x, 0, i)) == SET)
3343 other_things = 1;
3344 }
3345 return ! sets_cc0 ? 0 : other_things ? -1 : 1;
3346 }
3347 return 0;
3348 #else
3349 abort ();
3350 #endif
3351 }
3352 \f
3353 /* Follow any unconditional jump at LABEL;
3354 return the ultimate label reached by any such chain of jumps.
3355 If LABEL is not followed by a jump, return LABEL.
3356 If the chain loops or we can't find end, return LABEL,
3357 since that tells caller to avoid changing the insn.
3358
3359 If RELOAD_COMPLETED is 0, we do not chain across a NOTE_INSN_LOOP_BEG or
3360 a USE or CLOBBER. */
3361
3362 rtx
3363 follow_jumps (label)
3364 rtx label;
3365 {
3366 register rtx insn;
3367 register rtx next;
3368 register rtx value = label;
3369 register int depth;
3370
3371 for (depth = 0;
3372 (depth < 10
3373 && (insn = next_active_insn (value)) != 0
3374 && GET_CODE (insn) == JUMP_INSN
3375 && ((JUMP_LABEL (insn) != 0 && simplejump_p (insn))
3376 || GET_CODE (PATTERN (insn)) == RETURN)
3377 && (next = NEXT_INSN (insn))
3378 && GET_CODE (next) == BARRIER);
3379 depth++)
3380 {
3381 /* Don't chain through the insn that jumps into a loop
3382 from outside the loop,
3383 since that would create multiple loop entry jumps
3384 and prevent loop optimization. */
3385 rtx tem;
3386 if (!reload_completed)
3387 for (tem = value; tem != insn; tem = NEXT_INSN (tem))
3388 if (GET_CODE (tem) == NOTE
3389 && (NOTE_LINE_NUMBER (tem) == NOTE_INSN_LOOP_BEG
3390 /* ??? Optional. Disables some optimizations, but makes
3391 gcov output more accurate with -O. */
3392 || (flag_test_coverage && NOTE_LINE_NUMBER (tem) > 0)))
3393 return value;
3394
3395 /* If we have found a cycle, make the insn jump to itself. */
3396 if (JUMP_LABEL (insn) == label)
3397 return label;
3398
3399 tem = next_active_insn (JUMP_LABEL (insn));
3400 if (tem && (GET_CODE (PATTERN (tem)) == ADDR_VEC
3401 || GET_CODE (PATTERN (tem)) == ADDR_DIFF_VEC))
3402 break;
3403
3404 value = JUMP_LABEL (insn);
3405 }
3406 if (depth == 10)
3407 return label;
3408 return value;
3409 }
3410
3411 /* Assuming that field IDX of X is a vector of label_refs,
3412 replace each of them by the ultimate label reached by it.
3413 Return nonzero if a change is made.
3414 If IGNORE_LOOPS is 0, we do not chain across a NOTE_INSN_LOOP_BEG. */
3415
3416 static int
3417 tension_vector_labels (x, idx)
3418 register rtx x;
3419 register int idx;
3420 {
3421 int changed = 0;
3422 register int i;
3423 for (i = XVECLEN (x, idx) - 1; i >= 0; i--)
3424 {
3425 register rtx olabel = XEXP (XVECEXP (x, idx, i), 0);
3426 register rtx nlabel = follow_jumps (olabel);
3427 if (nlabel && nlabel != olabel)
3428 {
3429 XEXP (XVECEXP (x, idx, i), 0) = nlabel;
3430 ++LABEL_NUSES (nlabel);
3431 if (--LABEL_NUSES (olabel) == 0)
3432 delete_insn (olabel);
3433 changed = 1;
3434 }
3435 }
3436 return changed;
3437 }
3438 \f
3439 /* Find all CODE_LABELs referred to in X, and increment their use counts.
3440 If INSN is a JUMP_INSN and there is at least one CODE_LABEL referenced
3441 in INSN, then store one of them in JUMP_LABEL (INSN).
3442 If INSN is an INSN or a CALL_INSN and there is at least one CODE_LABEL
3443 referenced in INSN, add a REG_LABEL note containing that label to INSN.
3444 Also, when there are consecutive labels, canonicalize on the last of them.
3445
3446 Note that two labels separated by a loop-beginning note
3447 must be kept distinct if we have not yet done loop-optimization,
3448 because the gap between them is where loop-optimize
3449 will want to move invariant code to. CROSS_JUMP tells us
3450 that loop-optimization is done with.
3451
3452 Once reload has completed (CROSS_JUMP non-zero), we need not consider
3453 two labels distinct if they are separated by only USE or CLOBBER insns. */
3454
3455 static void
3456 mark_jump_label (x, insn, cross_jump)
3457 register rtx x;
3458 rtx insn;
3459 int cross_jump;
3460 {
3461 register RTX_CODE code = GET_CODE (x);
3462 register int i;
3463 register char *fmt;
3464
3465 switch (code)
3466 {
3467 case PC:
3468 case CC0:
3469 case REG:
3470 case SUBREG:
3471 case CONST_INT:
3472 case SYMBOL_REF:
3473 case CONST_DOUBLE:
3474 case CLOBBER:
3475 case CALL:
3476 return;
3477
3478 case MEM:
3479 /* If this is a constant-pool reference, see if it is a label. */
3480 if (GET_CODE (XEXP (x, 0)) == SYMBOL_REF
3481 && CONSTANT_POOL_ADDRESS_P (XEXP (x, 0)))
3482 mark_jump_label (get_pool_constant (XEXP (x, 0)), insn, cross_jump);
3483 break;
3484
3485 case LABEL_REF:
3486 {
3487 rtx label = XEXP (x, 0);
3488 rtx olabel = label;
3489 rtx note;
3490 rtx next;
3491
3492 if (GET_CODE (label) != CODE_LABEL)
3493 abort ();
3494
3495 /* Ignore references to labels of containing functions. */
3496 if (LABEL_REF_NONLOCAL_P (x))
3497 break;
3498
3499 /* If there are other labels following this one,
3500 replace it with the last of the consecutive labels. */
3501 for (next = NEXT_INSN (label); next; next = NEXT_INSN (next))
3502 {
3503 if (GET_CODE (next) == CODE_LABEL)
3504 label = next;
3505 else if (cross_jump && GET_CODE (next) == INSN
3506 && (GET_CODE (PATTERN (next)) == USE
3507 || GET_CODE (PATTERN (next)) == CLOBBER))
3508 continue;
3509 else if (GET_CODE (next) != NOTE)
3510 break;
3511 else if (! cross_jump
3512 && (NOTE_LINE_NUMBER (next) == NOTE_INSN_LOOP_BEG
3513 || NOTE_LINE_NUMBER (next) == NOTE_INSN_FUNCTION_END
3514 /* ??? Optional. Disables some optimizations, but
3515 makes gcov output more accurate with -O. */
3516 || (flag_test_coverage && NOTE_LINE_NUMBER (next) > 0)))
3517 break;
3518 }
3519
3520 XEXP (x, 0) = label;
3521 if (! insn || ! INSN_DELETED_P (insn))
3522 ++LABEL_NUSES (label);
3523
3524 if (insn)
3525 {
3526 if (GET_CODE (insn) == JUMP_INSN)
3527 JUMP_LABEL (insn) = label;
3528
3529 /* If we've changed OLABEL and we had a REG_LABEL note
3530 for it, update it as well. */
3531 else if (label != olabel
3532 && (note = find_reg_note (insn, REG_LABEL, olabel)) != 0)
3533 XEXP (note, 0) = label;
3534
3535 /* Otherwise, add a REG_LABEL note for LABEL unless there already
3536 is one. */
3537 else if (! find_reg_note (insn, REG_LABEL, label))
3538 {
3539 /* This code used to ignore labels which refered to dispatch
3540 tables to avoid flow.c generating worse code.
3541
3542 However, in the presense of global optimizations like
3543 gcse which call find_basic_blocks without calling
3544 life_analysis, not recording such labels will lead
3545 to compiler aborts because of inconsistencies in the
3546 flow graph. So we go ahead and record the label.
3547
3548 It may also be the case that the optimization argument
3549 is no longer valid because of the more accurate cfg
3550 we build in find_basic_blocks -- it no longer pessimizes
3551 code when it finds a REG_LABEL note. */
3552 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_LABEL, label,
3553 REG_NOTES (insn));
3554 }
3555 }
3556 return;
3557 }
3558
3559 /* Do walk the labels in a vector, but not the first operand of an
3560 ADDR_DIFF_VEC. Don't set the JUMP_LABEL of a vector. */
3561 case ADDR_VEC:
3562 case ADDR_DIFF_VEC:
3563 if (! INSN_DELETED_P (insn))
3564 {
3565 int eltnum = code == ADDR_DIFF_VEC ? 1 : 0;
3566
3567 for (i = 0; i < XVECLEN (x, eltnum); i++)
3568 mark_jump_label (XVECEXP (x, eltnum, i), NULL_RTX, cross_jump);
3569 }
3570 return;
3571
3572 default:
3573 break;
3574 }
3575
3576 fmt = GET_RTX_FORMAT (code);
3577 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3578 {
3579 if (fmt[i] == 'e')
3580 mark_jump_label (XEXP (x, i), insn, cross_jump);
3581 else if (fmt[i] == 'E')
3582 {
3583 register int j;
3584 for (j = 0; j < XVECLEN (x, i); j++)
3585 mark_jump_label (XVECEXP (x, i, j), insn, cross_jump);
3586 }
3587 }
3588 }
3589
3590 /* If all INSN does is set the pc, delete it,
3591 and delete the insn that set the condition codes for it
3592 if that's what the previous thing was. */
3593
3594 void
3595 delete_jump (insn)
3596 rtx insn;
3597 {
3598 register rtx set = single_set (insn);
3599
3600 if (set && GET_CODE (SET_DEST (set)) == PC)
3601 delete_computation (insn);
3602 }
3603
3604 /* Delete INSN and recursively delete insns that compute values used only
3605 by INSN. This uses the REG_DEAD notes computed during flow analysis.
3606 If we are running before flow.c, we need do nothing since flow.c will
3607 delete dead code. We also can't know if the registers being used are
3608 dead or not at this point.
3609
3610 Otherwise, look at all our REG_DEAD notes. If a previous insn does
3611 nothing other than set a register that dies in this insn, we can delete
3612 that insn as well.
3613
3614 On machines with CC0, if CC0 is used in this insn, we may be able to
3615 delete the insn that set it. */
3616
3617 static void
3618 delete_computation (insn)
3619 rtx insn;
3620 {
3621 rtx note, next;
3622
3623 #ifdef HAVE_cc0
3624 if (reg_referenced_p (cc0_rtx, PATTERN (insn)))
3625 {
3626 rtx prev = prev_nonnote_insn (insn);
3627 /* We assume that at this stage
3628 CC's are always set explicitly
3629 and always immediately before the jump that
3630 will use them. So if the previous insn
3631 exists to set the CC's, delete it
3632 (unless it performs auto-increments, etc.). */
3633 if (prev && GET_CODE (prev) == INSN
3634 && sets_cc0_p (PATTERN (prev)))
3635 {
3636 if (sets_cc0_p (PATTERN (prev)) > 0
3637 && !FIND_REG_INC_NOTE (prev, NULL_RTX))
3638 delete_computation (prev);
3639 else
3640 /* Otherwise, show that cc0 won't be used. */
3641 REG_NOTES (prev) = gen_rtx_EXPR_LIST (REG_UNUSED,
3642 cc0_rtx, REG_NOTES (prev));
3643 }
3644 }
3645 #endif
3646
3647 for (note = REG_NOTES (insn); note; note = next)
3648 {
3649 rtx our_prev;
3650
3651 next = XEXP (note, 1);
3652
3653 if (REG_NOTE_KIND (note) != REG_DEAD
3654 /* Verify that the REG_NOTE is legitimate. */
3655 || GET_CODE (XEXP (note, 0)) != REG)
3656 continue;
3657
3658 for (our_prev = prev_nonnote_insn (insn);
3659 our_prev && GET_CODE (our_prev) == INSN;
3660 our_prev = prev_nonnote_insn (our_prev))
3661 {
3662 /* If we reach a SEQUENCE, it is too complex to try to
3663 do anything with it, so give up. */
3664 if (GET_CODE (PATTERN (our_prev)) == SEQUENCE)
3665 break;
3666
3667 if (GET_CODE (PATTERN (our_prev)) == USE
3668 && GET_CODE (XEXP (PATTERN (our_prev), 0)) == INSN)
3669 /* reorg creates USEs that look like this. We leave them
3670 alone because reorg needs them for its own purposes. */
3671 break;
3672
3673 if (reg_set_p (XEXP (note, 0), PATTERN (our_prev)))
3674 {
3675 if (FIND_REG_INC_NOTE (our_prev, NULL_RTX))
3676 break;
3677
3678 if (GET_CODE (PATTERN (our_prev)) == PARALLEL)
3679 {
3680 /* If we find a SET of something else, we can't
3681 delete the insn. */
3682
3683 int i;
3684
3685 for (i = 0; i < XVECLEN (PATTERN (our_prev), 0); i++)
3686 {
3687 rtx part = XVECEXP (PATTERN (our_prev), 0, i);
3688
3689 if (GET_CODE (part) == SET
3690 && SET_DEST (part) != XEXP (note, 0))
3691 break;
3692 }
3693
3694 if (i == XVECLEN (PATTERN (our_prev), 0))
3695 delete_computation (our_prev);
3696 }
3697 else if (GET_CODE (PATTERN (our_prev)) == SET
3698 && SET_DEST (PATTERN (our_prev)) == XEXP (note, 0))
3699 delete_computation (our_prev);
3700
3701 break;
3702 }
3703
3704 /* If OUR_PREV references the register that dies here, it is an
3705 additional use. Hence any prior SET isn't dead. However, this
3706 insn becomes the new place for the REG_DEAD note. */
3707 if (reg_overlap_mentioned_p (XEXP (note, 0),
3708 PATTERN (our_prev)))
3709 {
3710 XEXP (note, 1) = REG_NOTES (our_prev);
3711 REG_NOTES (our_prev) = note;
3712 break;
3713 }
3714 }
3715 }
3716
3717 delete_insn (insn);
3718 }
3719 \f
3720 /* Delete insn INSN from the chain of insns and update label ref counts.
3721 May delete some following insns as a consequence; may even delete
3722 a label elsewhere and insns that follow it.
3723
3724 Returns the first insn after INSN that was not deleted. */
3725
3726 rtx
3727 delete_insn (insn)
3728 register rtx insn;
3729 {
3730 register rtx next = NEXT_INSN (insn);
3731 register rtx prev = PREV_INSN (insn);
3732 register int was_code_label = (GET_CODE (insn) == CODE_LABEL);
3733 register int dont_really_delete = 0;
3734
3735 while (next && INSN_DELETED_P (next))
3736 next = NEXT_INSN (next);
3737
3738 /* This insn is already deleted => return first following nondeleted. */
3739 if (INSN_DELETED_P (insn))
3740 return next;
3741
3742 /* Don't delete user-declared labels. Convert them to special NOTEs
3743 instead. */
3744 if (was_code_label && LABEL_NAME (insn) != 0
3745 && optimize && ! dont_really_delete)
3746 {
3747 PUT_CODE (insn, NOTE);
3748 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED_LABEL;
3749 NOTE_SOURCE_FILE (insn) = 0;
3750 dont_really_delete = 1;
3751 }
3752 else
3753 /* Mark this insn as deleted. */
3754 INSN_DELETED_P (insn) = 1;
3755
3756 /* If this is an unconditional jump, delete it from the jump chain. */
3757 if (simplejump_p (insn))
3758 delete_from_jump_chain (insn);
3759
3760 /* If instruction is followed by a barrier,
3761 delete the barrier too. */
3762
3763 if (next != 0 && GET_CODE (next) == BARRIER)
3764 {
3765 INSN_DELETED_P (next) = 1;
3766 next = NEXT_INSN (next);
3767 }
3768
3769 /* Patch out INSN (and the barrier if any) */
3770
3771 if (optimize && ! dont_really_delete)
3772 {
3773 if (prev)
3774 {
3775 NEXT_INSN (prev) = next;
3776 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
3777 NEXT_INSN (XVECEXP (PATTERN (prev), 0,
3778 XVECLEN (PATTERN (prev), 0) - 1)) = next;
3779 }
3780
3781 if (next)
3782 {
3783 PREV_INSN (next) = prev;
3784 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
3785 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
3786 }
3787
3788 if (prev && NEXT_INSN (prev) == 0)
3789 set_last_insn (prev);
3790 }
3791
3792 /* If deleting a jump, decrement the count of the label,
3793 and delete the label if it is now unused. */
3794
3795 if (GET_CODE (insn) == JUMP_INSN && JUMP_LABEL (insn))
3796 if (--LABEL_NUSES (JUMP_LABEL (insn)) == 0)
3797 {
3798 /* This can delete NEXT or PREV,
3799 either directly if NEXT is JUMP_LABEL (INSN),
3800 or indirectly through more levels of jumps. */
3801 delete_insn (JUMP_LABEL (insn));
3802 /* I feel a little doubtful about this loop,
3803 but I see no clean and sure alternative way
3804 to find the first insn after INSN that is not now deleted.
3805 I hope this works. */
3806 while (next && INSN_DELETED_P (next))
3807 next = NEXT_INSN (next);
3808 return next;
3809 }
3810
3811 /* Likewise if we're deleting a dispatch table. */
3812
3813 if (GET_CODE (insn) == JUMP_INSN
3814 && (GET_CODE (PATTERN (insn)) == ADDR_VEC
3815 || GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC))
3816 {
3817 rtx pat = PATTERN (insn);
3818 int i, diff_vec_p = GET_CODE (pat) == ADDR_DIFF_VEC;
3819 int len = XVECLEN (pat, diff_vec_p);
3820
3821 for (i = 0; i < len; i++)
3822 if (--LABEL_NUSES (XEXP (XVECEXP (pat, diff_vec_p, i), 0)) == 0)
3823 delete_insn (XEXP (XVECEXP (pat, diff_vec_p, i), 0));
3824 while (next && INSN_DELETED_P (next))
3825 next = NEXT_INSN (next);
3826 return next;
3827 }
3828
3829 while (prev && (INSN_DELETED_P (prev) || GET_CODE (prev) == NOTE))
3830 prev = PREV_INSN (prev);
3831
3832 /* If INSN was a label and a dispatch table follows it,
3833 delete the dispatch table. The tablejump must have gone already.
3834 It isn't useful to fall through into a table. */
3835
3836 if (was_code_label
3837 && NEXT_INSN (insn) != 0
3838 && GET_CODE (NEXT_INSN (insn)) == JUMP_INSN
3839 && (GET_CODE (PATTERN (NEXT_INSN (insn))) == ADDR_VEC
3840 || GET_CODE (PATTERN (NEXT_INSN (insn))) == ADDR_DIFF_VEC))
3841 next = delete_insn (NEXT_INSN (insn));
3842
3843 /* If INSN was a label, delete insns following it if now unreachable. */
3844
3845 if (was_code_label && prev && GET_CODE (prev) == BARRIER)
3846 {
3847 register RTX_CODE code;
3848 while (next != 0
3849 && (GET_RTX_CLASS (code = GET_CODE (next)) == 'i'
3850 || code == NOTE || code == BARRIER
3851 || (code == CODE_LABEL && INSN_DELETED_P (next))))
3852 {
3853 if (code == NOTE
3854 && NOTE_LINE_NUMBER (next) != NOTE_INSN_FUNCTION_END)
3855 next = NEXT_INSN (next);
3856 /* Keep going past other deleted labels to delete what follows. */
3857 else if (code == CODE_LABEL && INSN_DELETED_P (next))
3858 next = NEXT_INSN (next);
3859 else
3860 /* Note: if this deletes a jump, it can cause more
3861 deletion of unreachable code, after a different label.
3862 As long as the value from this recursive call is correct,
3863 this invocation functions correctly. */
3864 next = delete_insn (next);
3865 }
3866 }
3867
3868 return next;
3869 }
3870
3871 /* Advance from INSN till reaching something not deleted
3872 then return that. May return INSN itself. */
3873
3874 rtx
3875 next_nondeleted_insn (insn)
3876 rtx insn;
3877 {
3878 while (INSN_DELETED_P (insn))
3879 insn = NEXT_INSN (insn);
3880 return insn;
3881 }
3882 \f
3883 /* Delete a range of insns from FROM to TO, inclusive.
3884 This is for the sake of peephole optimization, so assume
3885 that whatever these insns do will still be done by a new
3886 peephole insn that will replace them. */
3887
3888 void
3889 delete_for_peephole (from, to)
3890 register rtx from, to;
3891 {
3892 register rtx insn = from;
3893
3894 while (1)
3895 {
3896 register rtx next = NEXT_INSN (insn);
3897 register rtx prev = PREV_INSN (insn);
3898
3899 if (GET_CODE (insn) != NOTE)
3900 {
3901 INSN_DELETED_P (insn) = 1;
3902
3903 /* Patch this insn out of the chain. */
3904 /* We don't do this all at once, because we
3905 must preserve all NOTEs. */
3906 if (prev)
3907 NEXT_INSN (prev) = next;
3908
3909 if (next)
3910 PREV_INSN (next) = prev;
3911 }
3912
3913 if (insn == to)
3914 break;
3915 insn = next;
3916 }
3917
3918 /* Note that if TO is an unconditional jump
3919 we *do not* delete the BARRIER that follows,
3920 since the peephole that replaces this sequence
3921 is also an unconditional jump in that case. */
3922 }
3923 \f
3924 /* Invert the condition of the jump JUMP, and make it jump
3925 to label NLABEL instead of where it jumps now. */
3926
3927 int
3928 invert_jump (jump, nlabel)
3929 rtx jump, nlabel;
3930 {
3931 /* We have to either invert the condition and change the label or
3932 do neither. Either operation could fail. We first try to invert
3933 the jump. If that succeeds, we try changing the label. If that fails,
3934 we invert the jump back to what it was. */
3935
3936 if (! invert_exp (PATTERN (jump), jump))
3937 return 0;
3938
3939 if (redirect_jump (jump, nlabel))
3940 {
3941 if (flag_branch_probabilities)
3942 {
3943 rtx note = find_reg_note (jump, REG_BR_PROB, 0);
3944
3945 /* An inverted jump means that a probability taken becomes a
3946 probability not taken. Subtract the branch probability from the
3947 probability base to convert it back to a taken probability.
3948 (We don't flip the probability on a branch that's never taken. */
3949 if (note && XINT (XEXP (note, 0), 0) >= 0)
3950 XINT (XEXP (note, 0), 0) = REG_BR_PROB_BASE - XINT (XEXP (note, 0), 0);
3951 }
3952
3953 return 1;
3954 }
3955
3956 if (! invert_exp (PATTERN (jump), jump))
3957 /* This should just be putting it back the way it was. */
3958 abort ();
3959
3960 return 0;
3961 }
3962
3963 /* Invert the jump condition of rtx X contained in jump insn, INSN.
3964
3965 Return 1 if we can do so, 0 if we cannot find a way to do so that
3966 matches a pattern. */
3967
3968 int
3969 invert_exp (x, insn)
3970 rtx x;
3971 rtx insn;
3972 {
3973 register RTX_CODE code;
3974 register int i;
3975 register char *fmt;
3976
3977 code = GET_CODE (x);
3978
3979 if (code == IF_THEN_ELSE)
3980 {
3981 register rtx comp = XEXP (x, 0);
3982 register rtx tem;
3983
3984 /* We can do this in two ways: The preferable way, which can only
3985 be done if this is not an integer comparison, is to reverse
3986 the comparison code. Otherwise, swap the THEN-part and ELSE-part
3987 of the IF_THEN_ELSE. If we can't do either, fail. */
3988
3989 if (can_reverse_comparison_p (comp, insn)
3990 && validate_change (insn, &XEXP (x, 0),
3991 gen_rtx_fmt_ee (reverse_condition (GET_CODE (comp)),
3992 GET_MODE (comp), XEXP (comp, 0),
3993 XEXP (comp, 1)), 0))
3994 return 1;
3995
3996 tem = XEXP (x, 1);
3997 validate_change (insn, &XEXP (x, 1), XEXP (x, 2), 1);
3998 validate_change (insn, &XEXP (x, 2), tem, 1);
3999 return apply_change_group ();
4000 }
4001
4002 fmt = GET_RTX_FORMAT (code);
4003 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4004 {
4005 if (fmt[i] == 'e')
4006 if (! invert_exp (XEXP (x, i), insn))
4007 return 0;
4008 if (fmt[i] == 'E')
4009 {
4010 register int j;
4011 for (j = 0; j < XVECLEN (x, i); j++)
4012 if (!invert_exp (XVECEXP (x, i, j), insn))
4013 return 0;
4014 }
4015 }
4016
4017 return 1;
4018 }
4019 \f
4020 /* Make jump JUMP jump to label NLABEL instead of where it jumps now.
4021 If the old jump target label is unused as a result,
4022 it and the code following it may be deleted.
4023
4024 If NLABEL is zero, we are to turn the jump into a (possibly conditional)
4025 RETURN insn.
4026
4027 The return value will be 1 if the change was made, 0 if it wasn't (this
4028 can only occur for NLABEL == 0). */
4029
4030 int
4031 redirect_jump (jump, nlabel)
4032 rtx jump, nlabel;
4033 {
4034 register rtx olabel = JUMP_LABEL (jump);
4035
4036 if (nlabel == olabel)
4037 return 1;
4038
4039 if (! redirect_exp (&PATTERN (jump), olabel, nlabel, jump))
4040 return 0;
4041
4042 /* If this is an unconditional branch, delete it from the jump_chain of
4043 OLABEL and add it to the jump_chain of NLABEL (assuming both labels
4044 have UID's in range and JUMP_CHAIN is valid). */
4045 if (jump_chain && (simplejump_p (jump)
4046 || GET_CODE (PATTERN (jump)) == RETURN))
4047 {
4048 int label_index = nlabel ? INSN_UID (nlabel) : 0;
4049
4050 delete_from_jump_chain (jump);
4051 if (label_index < max_jump_chain
4052 && INSN_UID (jump) < max_jump_chain)
4053 {
4054 jump_chain[INSN_UID (jump)] = jump_chain[label_index];
4055 jump_chain[label_index] = jump;
4056 }
4057 }
4058
4059 JUMP_LABEL (jump) = nlabel;
4060 if (nlabel)
4061 ++LABEL_NUSES (nlabel);
4062
4063 if (olabel && --LABEL_NUSES (olabel) == 0)
4064 delete_insn (olabel);
4065
4066 return 1;
4067 }
4068
4069 /* Delete the instruction JUMP from any jump chain it might be on. */
4070
4071 static void
4072 delete_from_jump_chain (jump)
4073 rtx jump;
4074 {
4075 int index;
4076 rtx olabel = JUMP_LABEL (jump);
4077
4078 /* Handle unconditional jumps. */
4079 if (jump_chain && olabel != 0
4080 && INSN_UID (olabel) < max_jump_chain
4081 && simplejump_p (jump))
4082 index = INSN_UID (olabel);
4083 /* Handle return insns. */
4084 else if (jump_chain && GET_CODE (PATTERN (jump)) == RETURN)
4085 index = 0;
4086 else return;
4087
4088 if (jump_chain[index] == jump)
4089 jump_chain[index] = jump_chain[INSN_UID (jump)];
4090 else
4091 {
4092 rtx insn;
4093
4094 for (insn = jump_chain[index];
4095 insn != 0;
4096 insn = jump_chain[INSN_UID (insn)])
4097 if (jump_chain[INSN_UID (insn)] == jump)
4098 {
4099 jump_chain[INSN_UID (insn)] = jump_chain[INSN_UID (jump)];
4100 break;
4101 }
4102 }
4103 }
4104
4105 /* If NLABEL is nonzero, throughout the rtx at LOC,
4106 alter (LABEL_REF OLABEL) to (LABEL_REF NLABEL). If OLABEL is
4107 zero, alter (RETURN) to (LABEL_REF NLABEL).
4108
4109 If NLABEL is zero, alter (LABEL_REF OLABEL) to (RETURN) and check
4110 validity with validate_change. Convert (set (pc) (label_ref olabel))
4111 to (return).
4112
4113 Return 0 if we found a change we would like to make but it is invalid.
4114 Otherwise, return 1. */
4115
4116 int
4117 redirect_exp (loc, olabel, nlabel, insn)
4118 rtx *loc;
4119 rtx olabel, nlabel;
4120 rtx insn;
4121 {
4122 register rtx x = *loc;
4123 register RTX_CODE code = GET_CODE (x);
4124 register int i;
4125 register char *fmt;
4126
4127 if (code == LABEL_REF)
4128 {
4129 if (XEXP (x, 0) == olabel)
4130 {
4131 if (nlabel)
4132 XEXP (x, 0) = nlabel;
4133 else
4134 return validate_change (insn, loc, gen_rtx_RETURN (VOIDmode), 0);
4135 return 1;
4136 }
4137 }
4138 else if (code == RETURN && olabel == 0)
4139 {
4140 x = gen_rtx_LABEL_REF (VOIDmode, nlabel);
4141 if (loc == &PATTERN (insn))
4142 x = gen_rtx_SET (VOIDmode, pc_rtx, x);
4143 return validate_change (insn, loc, x, 0);
4144 }
4145
4146 if (code == SET && nlabel == 0 && SET_DEST (x) == pc_rtx
4147 && GET_CODE (SET_SRC (x)) == LABEL_REF
4148 && XEXP (SET_SRC (x), 0) == olabel)
4149 return validate_change (insn, loc, gen_rtx_RETURN (VOIDmode), 0);
4150
4151 fmt = GET_RTX_FORMAT (code);
4152 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4153 {
4154 if (fmt[i] == 'e')
4155 if (! redirect_exp (&XEXP (x, i), olabel, nlabel, insn))
4156 return 0;
4157 if (fmt[i] == 'E')
4158 {
4159 register int j;
4160 for (j = 0; j < XVECLEN (x, i); j++)
4161 if (! redirect_exp (&XVECEXP (x, i, j), olabel, nlabel, insn))
4162 return 0;
4163 }
4164 }
4165
4166 return 1;
4167 }
4168 \f
4169 /* Make jump JUMP jump to label NLABEL, assuming it used to be a tablejump.
4170
4171 If the old jump target label (before the dispatch table) becomes unused,
4172 it and the dispatch table may be deleted. In that case, find the insn
4173 before the jump references that label and delete it and logical successors
4174 too. */
4175
4176 static void
4177 redirect_tablejump (jump, nlabel)
4178 rtx jump, nlabel;
4179 {
4180 register rtx olabel = JUMP_LABEL (jump);
4181
4182 /* Add this jump to the jump_chain of NLABEL. */
4183 if (jump_chain && INSN_UID (nlabel) < max_jump_chain
4184 && INSN_UID (jump) < max_jump_chain)
4185 {
4186 jump_chain[INSN_UID (jump)] = jump_chain[INSN_UID (nlabel)];
4187 jump_chain[INSN_UID (nlabel)] = jump;
4188 }
4189
4190 PATTERN (jump) = gen_jump (nlabel);
4191 JUMP_LABEL (jump) = nlabel;
4192 ++LABEL_NUSES (nlabel);
4193 INSN_CODE (jump) = -1;
4194
4195 if (--LABEL_NUSES (olabel) == 0)
4196 {
4197 delete_labelref_insn (jump, olabel, 0);
4198 delete_insn (olabel);
4199 }
4200 }
4201
4202 /* Find the insn referencing LABEL that is a logical predecessor of INSN.
4203 If we found one, delete it and then delete this insn if DELETE_THIS is
4204 non-zero. Return non-zero if INSN or a predecessor references LABEL. */
4205
4206 static int
4207 delete_labelref_insn (insn, label, delete_this)
4208 rtx insn, label;
4209 int delete_this;
4210 {
4211 int deleted = 0;
4212 rtx link;
4213
4214 if (GET_CODE (insn) != NOTE
4215 && reg_mentioned_p (label, PATTERN (insn)))
4216 {
4217 if (delete_this)
4218 {
4219 delete_insn (insn);
4220 deleted = 1;
4221 }
4222 else
4223 return 1;
4224 }
4225
4226 for (link = LOG_LINKS (insn); link; link = XEXP (link, 1))
4227 if (delete_labelref_insn (XEXP (link, 0), label, 1))
4228 {
4229 if (delete_this)
4230 {
4231 delete_insn (insn);
4232 deleted = 1;
4233 }
4234 else
4235 return 1;
4236 }
4237
4238 return deleted;
4239 }
4240 \f
4241 /* Like rtx_equal_p except that it considers two REGs as equal
4242 if they renumber to the same value and considers two commutative
4243 operations to be the same if the order of the operands has been
4244 reversed.
4245
4246 ??? Addition is not commutative on the PA due to the weird implicit
4247 space register selection rules for memory addresses. Therefore, we
4248 don't consider a + b == b + a.
4249
4250 We could/should make this test a little tighter. Possibly only
4251 disabling it on the PA via some backend macro or only disabling this
4252 case when the PLUS is inside a MEM. */
4253
4254 int
4255 rtx_renumbered_equal_p (x, y)
4256 rtx x, y;
4257 {
4258 register int i;
4259 register RTX_CODE code = GET_CODE (x);
4260 register char *fmt;
4261
4262 if (x == y)
4263 return 1;
4264
4265 if ((code == REG || (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG))
4266 && (GET_CODE (y) == REG || (GET_CODE (y) == SUBREG
4267 && GET_CODE (SUBREG_REG (y)) == REG)))
4268 {
4269 int reg_x = -1, reg_y = -1;
4270 int word_x = 0, word_y = 0;
4271
4272 if (GET_MODE (x) != GET_MODE (y))
4273 return 0;
4274
4275 /* If we haven't done any renumbering, don't
4276 make any assumptions. */
4277 if (reg_renumber == 0)
4278 return rtx_equal_p (x, y);
4279
4280 if (code == SUBREG)
4281 {
4282 reg_x = REGNO (SUBREG_REG (x));
4283 word_x = SUBREG_WORD (x);
4284
4285 if (reg_renumber[reg_x] >= 0)
4286 {
4287 reg_x = reg_renumber[reg_x] + word_x;
4288 word_x = 0;
4289 }
4290 }
4291
4292 else
4293 {
4294 reg_x = REGNO (x);
4295 if (reg_renumber[reg_x] >= 0)
4296 reg_x = reg_renumber[reg_x];
4297 }
4298
4299 if (GET_CODE (y) == SUBREG)
4300 {
4301 reg_y = REGNO (SUBREG_REG (y));
4302 word_y = SUBREG_WORD (y);
4303
4304 if (reg_renumber[reg_y] >= 0)
4305 {
4306 reg_y = reg_renumber[reg_y];
4307 word_y = 0;
4308 }
4309 }
4310
4311 else
4312 {
4313 reg_y = REGNO (y);
4314 if (reg_renumber[reg_y] >= 0)
4315 reg_y = reg_renumber[reg_y];
4316 }
4317
4318 return reg_x >= 0 && reg_x == reg_y && word_x == word_y;
4319 }
4320
4321 /* Now we have disposed of all the cases
4322 in which different rtx codes can match. */
4323 if (code != GET_CODE (y))
4324 return 0;
4325
4326 switch (code)
4327 {
4328 case PC:
4329 case CC0:
4330 case ADDR_VEC:
4331 case ADDR_DIFF_VEC:
4332 return 0;
4333
4334 case CONST_INT:
4335 return INTVAL (x) == INTVAL (y);
4336
4337 case LABEL_REF:
4338 /* We can't assume nonlocal labels have their following insns yet. */
4339 if (LABEL_REF_NONLOCAL_P (x) || LABEL_REF_NONLOCAL_P (y))
4340 return XEXP (x, 0) == XEXP (y, 0);
4341
4342 /* Two label-refs are equivalent if they point at labels
4343 in the same position in the instruction stream. */
4344 return (next_real_insn (XEXP (x, 0))
4345 == next_real_insn (XEXP (y, 0)));
4346
4347 case SYMBOL_REF:
4348 return XSTR (x, 0) == XSTR (y, 0);
4349
4350 default:
4351 break;
4352 }
4353
4354 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
4355
4356 if (GET_MODE (x) != GET_MODE (y))
4357 return 0;
4358
4359 /* For commutative operations, the RTX match if the operand match in any
4360 order. Also handle the simple binary and unary cases without a loop.
4361
4362 ??? Don't consider PLUS a commutative operator; see comments above. */
4363 if ((code == EQ || code == NE || GET_RTX_CLASS (code) == 'c')
4364 && code != PLUS)
4365 return ((rtx_renumbered_equal_p (XEXP (x, 0), XEXP (y, 0))
4366 && rtx_renumbered_equal_p (XEXP (x, 1), XEXP (y, 1)))
4367 || (rtx_renumbered_equal_p (XEXP (x, 0), XEXP (y, 1))
4368 && rtx_renumbered_equal_p (XEXP (x, 1), XEXP (y, 0))));
4369 else if (GET_RTX_CLASS (code) == '<' || GET_RTX_CLASS (code) == '2')
4370 return (rtx_renumbered_equal_p (XEXP (x, 0), XEXP (y, 0))
4371 && rtx_renumbered_equal_p (XEXP (x, 1), XEXP (y, 1)));
4372 else if (GET_RTX_CLASS (code) == '1')
4373 return rtx_renumbered_equal_p (XEXP (x, 0), XEXP (y, 0));
4374
4375 /* Compare the elements. If any pair of corresponding elements
4376 fail to match, return 0 for the whole things. */
4377
4378 fmt = GET_RTX_FORMAT (code);
4379 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4380 {
4381 register int j;
4382 switch (fmt[i])
4383 {
4384 case 'w':
4385 if (XWINT (x, i) != XWINT (y, i))
4386 return 0;
4387 break;
4388
4389 case 'i':
4390 if (XINT (x, i) != XINT (y, i))
4391 return 0;
4392 break;
4393
4394 case 's':
4395 if (strcmp (XSTR (x, i), XSTR (y, i)))
4396 return 0;
4397 break;
4398
4399 case 'e':
4400 if (! rtx_renumbered_equal_p (XEXP (x, i), XEXP (y, i)))
4401 return 0;
4402 break;
4403
4404 case 'u':
4405 if (XEXP (x, i) != XEXP (y, i))
4406 return 0;
4407 /* fall through. */
4408 case '0':
4409 break;
4410
4411 case 'E':
4412 if (XVECLEN (x, i) != XVECLEN (y, i))
4413 return 0;
4414 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
4415 if (!rtx_renumbered_equal_p (XVECEXP (x, i, j), XVECEXP (y, i, j)))
4416 return 0;
4417 break;
4418
4419 default:
4420 abort ();
4421 }
4422 }
4423 return 1;
4424 }
4425 \f
4426 /* If X is a hard register or equivalent to one or a subregister of one,
4427 return the hard register number. If X is a pseudo register that was not
4428 assigned a hard register, return the pseudo register number. Otherwise,
4429 return -1. Any rtx is valid for X. */
4430
4431 int
4432 true_regnum (x)
4433 rtx x;
4434 {
4435 if (GET_CODE (x) == REG)
4436 {
4437 if (REGNO (x) >= FIRST_PSEUDO_REGISTER && reg_renumber[REGNO (x)] >= 0)
4438 return reg_renumber[REGNO (x)];
4439 return REGNO (x);
4440 }
4441 if (GET_CODE (x) == SUBREG)
4442 {
4443 int base = true_regnum (SUBREG_REG (x));
4444 if (base >= 0 && base < FIRST_PSEUDO_REGISTER)
4445 return SUBREG_WORD (x) + base;
4446 }
4447 return -1;
4448 }
4449 \f
4450 /* Optimize code of the form:
4451
4452 for (x = a[i]; x; ...)
4453 ...
4454 for (x = a[i]; x; ...)
4455 ...
4456 foo:
4457
4458 Loop optimize will change the above code into
4459
4460 if (x = a[i])
4461 for (;;)
4462 { ...; if (! (x = ...)) break; }
4463 if (x = a[i])
4464 for (;;)
4465 { ...; if (! (x = ...)) break; }
4466 foo:
4467
4468 In general, if the first test fails, the program can branch
4469 directly to `foo' and skip the second try which is doomed to fail.
4470 We run this after loop optimization and before flow analysis. */
4471
4472 /* When comparing the insn patterns, we track the fact that different
4473 pseudo-register numbers may have been used in each computation.
4474 The following array stores an equivalence -- same_regs[I] == J means
4475 that pseudo register I was used in the first set of tests in a context
4476 where J was used in the second set. We also count the number of such
4477 pending equivalences. If nonzero, the expressions really aren't the
4478 same. */
4479
4480 static int *same_regs;
4481
4482 static int num_same_regs;
4483
4484 /* Track any registers modified between the target of the first jump and
4485 the second jump. They never compare equal. */
4486
4487 static char *modified_regs;
4488
4489 /* Record if memory was modified. */
4490
4491 static int modified_mem;
4492
4493 /* Called via note_stores on each insn between the target of the first
4494 branch and the second branch. It marks any changed registers. */
4495
4496 static void
4497 mark_modified_reg (dest, x)
4498 rtx dest;
4499 rtx x ATTRIBUTE_UNUSED;
4500 {
4501 int regno, i;
4502
4503 if (GET_CODE (dest) == SUBREG)
4504 dest = SUBREG_REG (dest);
4505
4506 if (GET_CODE (dest) == MEM)
4507 modified_mem = 1;
4508
4509 if (GET_CODE (dest) != REG)
4510 return;
4511
4512 regno = REGNO (dest);
4513 if (regno >= FIRST_PSEUDO_REGISTER)
4514 modified_regs[regno] = 1;
4515 else
4516 for (i = 0; i < HARD_REGNO_NREGS (regno, GET_MODE (dest)); i++)
4517 modified_regs[regno + i] = 1;
4518 }
4519
4520 /* F is the first insn in the chain of insns. */
4521
4522 void
4523 thread_jumps (f, max_reg, flag_before_loop)
4524 rtx f;
4525 int max_reg;
4526 int flag_before_loop;
4527 {
4528 /* Basic algorithm is to find a conditional branch,
4529 the label it may branch to, and the branch after
4530 that label. If the two branches test the same condition,
4531 walk back from both branch paths until the insn patterns
4532 differ, or code labels are hit. If we make it back to
4533 the target of the first branch, then we know that the first branch
4534 will either always succeed or always fail depending on the relative
4535 senses of the two branches. So adjust the first branch accordingly
4536 in this case. */
4537
4538 rtx label, b1, b2, t1, t2;
4539 enum rtx_code code1, code2;
4540 rtx b1op0, b1op1, b2op0, b2op1;
4541 int changed = 1;
4542 int i;
4543 int *all_reset;
4544
4545 /* Allocate register tables and quick-reset table. */
4546 modified_regs = (char *) alloca (max_reg * sizeof (char));
4547 same_regs = (int *) alloca (max_reg * sizeof (int));
4548 all_reset = (int *) alloca (max_reg * sizeof (int));
4549 for (i = 0; i < max_reg; i++)
4550 all_reset[i] = -1;
4551
4552 while (changed)
4553 {
4554 changed = 0;
4555
4556 for (b1 = f; b1; b1 = NEXT_INSN (b1))
4557 {
4558 /* Get to a candidate branch insn. */
4559 if (GET_CODE (b1) != JUMP_INSN
4560 || ! condjump_p (b1) || simplejump_p (b1)
4561 || JUMP_LABEL (b1) == 0)
4562 continue;
4563
4564 bzero (modified_regs, max_reg * sizeof (char));
4565 modified_mem = 0;
4566
4567 bcopy ((char *) all_reset, (char *) same_regs,
4568 max_reg * sizeof (int));
4569 num_same_regs = 0;
4570
4571 label = JUMP_LABEL (b1);
4572
4573 /* Look for a branch after the target. Record any registers and
4574 memory modified between the target and the branch. Stop when we
4575 get to a label since we can't know what was changed there. */
4576 for (b2 = NEXT_INSN (label); b2; b2 = NEXT_INSN (b2))
4577 {
4578 if (GET_CODE (b2) == CODE_LABEL)
4579 break;
4580
4581 else if (GET_CODE (b2) == JUMP_INSN)
4582 {
4583 /* If this is an unconditional jump and is the only use of
4584 its target label, we can follow it. */
4585 if (simplejump_p (b2)
4586 && JUMP_LABEL (b2) != 0
4587 && LABEL_NUSES (JUMP_LABEL (b2)) == 1)
4588 {
4589 b2 = JUMP_LABEL (b2);
4590 continue;
4591 }
4592 else
4593 break;
4594 }
4595
4596 if (GET_CODE (b2) != CALL_INSN && GET_CODE (b2) != INSN)
4597 continue;
4598
4599 if (GET_CODE (b2) == CALL_INSN)
4600 {
4601 modified_mem = 1;
4602 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
4603 if (call_used_regs[i] && ! fixed_regs[i]
4604 && i != STACK_POINTER_REGNUM
4605 && i != FRAME_POINTER_REGNUM
4606 && i != HARD_FRAME_POINTER_REGNUM
4607 && i != ARG_POINTER_REGNUM)
4608 modified_regs[i] = 1;
4609 }
4610
4611 note_stores (PATTERN (b2), mark_modified_reg);
4612 }
4613
4614 /* Check the next candidate branch insn from the label
4615 of the first. */
4616 if (b2 == 0
4617 || GET_CODE (b2) != JUMP_INSN
4618 || b2 == b1
4619 || ! condjump_p (b2)
4620 || simplejump_p (b2))
4621 continue;
4622
4623 /* Get the comparison codes and operands, reversing the
4624 codes if appropriate. If we don't have comparison codes,
4625 we can't do anything. */
4626 b1op0 = XEXP (XEXP (SET_SRC (PATTERN (b1)), 0), 0);
4627 b1op1 = XEXP (XEXP (SET_SRC (PATTERN (b1)), 0), 1);
4628 code1 = GET_CODE (XEXP (SET_SRC (PATTERN (b1)), 0));
4629 if (XEXP (SET_SRC (PATTERN (b1)), 1) == pc_rtx)
4630 code1 = reverse_condition (code1);
4631
4632 b2op0 = XEXP (XEXP (SET_SRC (PATTERN (b2)), 0), 0);
4633 b2op1 = XEXP (XEXP (SET_SRC (PATTERN (b2)), 0), 1);
4634 code2 = GET_CODE (XEXP (SET_SRC (PATTERN (b2)), 0));
4635 if (XEXP (SET_SRC (PATTERN (b2)), 1) == pc_rtx)
4636 code2 = reverse_condition (code2);
4637
4638 /* If they test the same things and knowing that B1 branches
4639 tells us whether or not B2 branches, check if we
4640 can thread the branch. */
4641 if (rtx_equal_for_thread_p (b1op0, b2op0, b2)
4642 && rtx_equal_for_thread_p (b1op1, b2op1, b2)
4643 && (comparison_dominates_p (code1, code2)
4644 || (comparison_dominates_p (code1, reverse_condition (code2))
4645 && can_reverse_comparison_p (XEXP (SET_SRC (PATTERN (b1)),
4646 0),
4647 b1))))
4648 {
4649 t1 = prev_nonnote_insn (b1);
4650 t2 = prev_nonnote_insn (b2);
4651
4652 while (t1 != 0 && t2 != 0)
4653 {
4654 if (t2 == label)
4655 {
4656 /* We have reached the target of the first branch.
4657 If there are no pending register equivalents,
4658 we know that this branch will either always
4659 succeed (if the senses of the two branches are
4660 the same) or always fail (if not). */
4661 rtx new_label;
4662
4663 if (num_same_regs != 0)
4664 break;
4665
4666 if (comparison_dominates_p (code1, code2))
4667 new_label = JUMP_LABEL (b2);
4668 else
4669 new_label = get_label_after (b2);
4670
4671 if (JUMP_LABEL (b1) != new_label)
4672 {
4673 rtx prev = PREV_INSN (new_label);
4674
4675 if (flag_before_loop
4676 && GET_CODE (prev) == NOTE
4677 && NOTE_LINE_NUMBER (prev) == NOTE_INSN_LOOP_BEG)
4678 {
4679 /* Don't thread to the loop label. If a loop
4680 label is reused, loop optimization will
4681 be disabled for that loop. */
4682 new_label = gen_label_rtx ();
4683 emit_label_after (new_label, PREV_INSN (prev));
4684 }
4685 changed |= redirect_jump (b1, new_label);
4686 }
4687 break;
4688 }
4689
4690 /* If either of these is not a normal insn (it might be
4691 a JUMP_INSN, CALL_INSN, or CODE_LABEL) we fail. (NOTEs
4692 have already been skipped above.) Similarly, fail
4693 if the insns are different. */
4694 if (GET_CODE (t1) != INSN || GET_CODE (t2) != INSN
4695 || recog_memoized (t1) != recog_memoized (t2)
4696 || ! rtx_equal_for_thread_p (PATTERN (t1),
4697 PATTERN (t2), t2))
4698 break;
4699
4700 t1 = prev_nonnote_insn (t1);
4701 t2 = prev_nonnote_insn (t2);
4702 }
4703 }
4704 }
4705 }
4706 }
4707 \f
4708 /* This is like RTX_EQUAL_P except that it knows about our handling of
4709 possibly equivalent registers and knows to consider volatile and
4710 modified objects as not equal.
4711
4712 YINSN is the insn containing Y. */
4713
4714 int
4715 rtx_equal_for_thread_p (x, y, yinsn)
4716 rtx x, y;
4717 rtx yinsn;
4718 {
4719 register int i;
4720 register int j;
4721 register enum rtx_code code;
4722 register char *fmt;
4723
4724 code = GET_CODE (x);
4725 /* Rtx's of different codes cannot be equal. */
4726 if (code != GET_CODE (y))
4727 return 0;
4728
4729 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent.
4730 (REG:SI x) and (REG:HI x) are NOT equivalent. */
4731
4732 if (GET_MODE (x) != GET_MODE (y))
4733 return 0;
4734
4735 /* For floating-point, consider everything unequal. This is a bit
4736 pessimistic, but this pass would only rarely do anything for FP
4737 anyway. */
4738 if (TARGET_FLOAT_FORMAT == IEEE_FLOAT_FORMAT
4739 && FLOAT_MODE_P (GET_MODE (x)) && ! flag_fast_math)
4740 return 0;
4741
4742 /* For commutative operations, the RTX match if the operand match in any
4743 order. Also handle the simple binary and unary cases without a loop. */
4744 if (code == EQ || code == NE || GET_RTX_CLASS (code) == 'c')
4745 return ((rtx_equal_for_thread_p (XEXP (x, 0), XEXP (y, 0), yinsn)
4746 && rtx_equal_for_thread_p (XEXP (x, 1), XEXP (y, 1), yinsn))
4747 || (rtx_equal_for_thread_p (XEXP (x, 0), XEXP (y, 1), yinsn)
4748 && rtx_equal_for_thread_p (XEXP (x, 1), XEXP (y, 0), yinsn)));
4749 else if (GET_RTX_CLASS (code) == '<' || GET_RTX_CLASS (code) == '2')
4750 return (rtx_equal_for_thread_p (XEXP (x, 0), XEXP (y, 0), yinsn)
4751 && rtx_equal_for_thread_p (XEXP (x, 1), XEXP (y, 1), yinsn));
4752 else if (GET_RTX_CLASS (code) == '1')
4753 return rtx_equal_for_thread_p (XEXP (x, 0), XEXP (y, 0), yinsn);
4754
4755 /* Handle special-cases first. */
4756 switch (code)
4757 {
4758 case REG:
4759 if (REGNO (x) == REGNO (y) && ! modified_regs[REGNO (x)])
4760 return 1;
4761
4762 /* If neither is user variable or hard register, check for possible
4763 equivalence. */
4764 if (REG_USERVAR_P (x) || REG_USERVAR_P (y)
4765 || REGNO (x) < FIRST_PSEUDO_REGISTER
4766 || REGNO (y) < FIRST_PSEUDO_REGISTER)
4767 return 0;
4768
4769 if (same_regs[REGNO (x)] == -1)
4770 {
4771 same_regs[REGNO (x)] = REGNO (y);
4772 num_same_regs++;
4773
4774 /* If this is the first time we are seeing a register on the `Y'
4775 side, see if it is the last use. If not, we can't thread the
4776 jump, so mark it as not equivalent. */
4777 if (REGNO_LAST_UID (REGNO (y)) != INSN_UID (yinsn))
4778 return 0;
4779
4780 return 1;
4781 }
4782 else
4783 return (same_regs[REGNO (x)] == REGNO (y));
4784
4785 break;
4786
4787 case MEM:
4788 /* If memory modified or either volatile, not equivalent.
4789 Else, check address. */
4790 if (modified_mem || MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y))
4791 return 0;
4792
4793 return rtx_equal_for_thread_p (XEXP (x, 0), XEXP (y, 0), yinsn);
4794
4795 case ASM_INPUT:
4796 if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y))
4797 return 0;
4798
4799 break;
4800
4801 case SET:
4802 /* Cancel a pending `same_regs' if setting equivalenced registers.
4803 Then process source. */
4804 if (GET_CODE (SET_DEST (x)) == REG
4805 && GET_CODE (SET_DEST (y)) == REG)
4806 {
4807 if (same_regs[REGNO (SET_DEST (x))] == REGNO (SET_DEST (y)))
4808 {
4809 same_regs[REGNO (SET_DEST (x))] = -1;
4810 num_same_regs--;
4811 }
4812 else if (REGNO (SET_DEST (x)) != REGNO (SET_DEST (y)))
4813 return 0;
4814 }
4815 else
4816 if (rtx_equal_for_thread_p (SET_DEST (x), SET_DEST (y), yinsn) == 0)
4817 return 0;
4818
4819 return rtx_equal_for_thread_p (SET_SRC (x), SET_SRC (y), yinsn);
4820
4821 case LABEL_REF:
4822 return XEXP (x, 0) == XEXP (y, 0);
4823
4824 case SYMBOL_REF:
4825 return XSTR (x, 0) == XSTR (y, 0);
4826
4827 default:
4828 break;
4829 }
4830
4831 if (x == y)
4832 return 1;
4833
4834 fmt = GET_RTX_FORMAT (code);
4835 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4836 {
4837 switch (fmt[i])
4838 {
4839 case 'w':
4840 if (XWINT (x, i) != XWINT (y, i))
4841 return 0;
4842 break;
4843
4844 case 'n':
4845 case 'i':
4846 if (XINT (x, i) != XINT (y, i))
4847 return 0;
4848 break;
4849
4850 case 'V':
4851 case 'E':
4852 /* Two vectors must have the same length. */
4853 if (XVECLEN (x, i) != XVECLEN (y, i))
4854 return 0;
4855
4856 /* And the corresponding elements must match. */
4857 for (j = 0; j < XVECLEN (x, i); j++)
4858 if (rtx_equal_for_thread_p (XVECEXP (x, i, j),
4859 XVECEXP (y, i, j), yinsn) == 0)
4860 return 0;
4861 break;
4862
4863 case 'e':
4864 if (rtx_equal_for_thread_p (XEXP (x, i), XEXP (y, i), yinsn) == 0)
4865 return 0;
4866 break;
4867
4868 case 'S':
4869 case 's':
4870 if (strcmp (XSTR (x, i), XSTR (y, i)))
4871 return 0;
4872 break;
4873
4874 case 'u':
4875 /* These are just backpointers, so they don't matter. */
4876 break;
4877
4878 case '0':
4879 break;
4880
4881 /* It is believed that rtx's at this level will never
4882 contain anything but integers and other rtx's,
4883 except for within LABEL_REFs and SYMBOL_REFs. */
4884 default:
4885 abort ();
4886 }
4887 }
4888 return 1;
4889 }
4890 \f
4891
4892 #ifndef HAVE_cc0
4893 /* Return the insn that NEW can be safely inserted in front of starting at
4894 the jump insn INSN. Return 0 if it is not safe to do this jump
4895 optimization. Note that NEW must contain a single set. */
4896
4897 static rtx
4898 find_insert_position (insn, new)
4899 rtx insn;
4900 rtx new;
4901 {
4902 int i;
4903 rtx prev;
4904
4905 /* If NEW does not clobber, it is safe to insert NEW before INSN. */
4906 if (GET_CODE (PATTERN (new)) != PARALLEL)
4907 return insn;
4908
4909 for (i = XVECLEN (PATTERN (new), 0) - 1; i >= 0; i--)
4910 if (GET_CODE (XVECEXP (PATTERN (new), 0, i)) == CLOBBER
4911 && reg_overlap_mentioned_p (XEXP (XVECEXP (PATTERN (new), 0, i), 0),
4912 insn))
4913 break;
4914
4915 if (i < 0)
4916 return insn;
4917
4918 /* There is a good chance that the previous insn PREV sets the thing
4919 being clobbered (often the CC in a hard reg). If PREV does not
4920 use what NEW sets, we can insert NEW before PREV. */
4921
4922 prev = prev_active_insn (insn);
4923 for (i = XVECLEN (PATTERN (new), 0) - 1; i >= 0; i--)
4924 if (GET_CODE (XVECEXP (PATTERN (new), 0, i)) == CLOBBER
4925 && reg_overlap_mentioned_p (XEXP (XVECEXP (PATTERN (new), 0, i), 0),
4926 insn)
4927 && ! modified_in_p (XEXP (XVECEXP (PATTERN (new), 0, i), 0),
4928 prev))
4929 return 0;
4930
4931 return reg_mentioned_p (SET_DEST (single_set (new)), prev) ? 0 : prev;
4932 }
4933 #endif /* !HAVE_cc0 */