tree.def (UNNE_EXPR): Remove.
[gcc.git] / gcc / jump.c
1 /* Optimize jump instructions, for GNU compiler.
2 Copyright (C) 1987, 88, 89, 91-99, 2000 Free Software Foundation, Inc.
3
4 This file is part of GNU CC.
5
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
9 any later version.
10
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
20
21
22 /* This is the jump-optimization pass of the compiler.
23 It is run two or three times: once before cse, sometimes once after cse,
24 and once after reload (before final).
25
26 jump_optimize deletes unreachable code and labels that are not used.
27 It also deletes jumps that jump to the following insn,
28 and simplifies jumps around unconditional jumps and jumps
29 to unconditional jumps.
30
31 Each CODE_LABEL has a count of the times it is used
32 stored in the LABEL_NUSES internal field, and each JUMP_INSN
33 has one label that it refers to stored in the
34 JUMP_LABEL internal field. With this we can detect labels that
35 become unused because of the deletion of all the jumps that
36 formerly used them. The JUMP_LABEL info is sometimes looked
37 at by later passes.
38
39 Optionally, cross-jumping can be done. Currently it is done
40 only the last time (when after reload and before final).
41 In fact, the code for cross-jumping now assumes that register
42 allocation has been done, since it uses `rtx_renumbered_equal_p'.
43
44 Jump optimization is done after cse when cse's constant-propagation
45 causes jumps to become unconditional or to be deleted.
46
47 Unreachable loops are not detected here, because the labels
48 have references and the insns appear reachable from the labels.
49 find_basic_blocks in flow.c finds and deletes such loops.
50
51 The subroutines delete_insn, redirect_jump, and invert_jump are used
52 from other passes as well. */
53
54 #include "config.h"
55 #include "system.h"
56 #include "rtl.h"
57 #include "tm_p.h"
58 #include "flags.h"
59 #include "hard-reg-set.h"
60 #include "regs.h"
61 #include "insn-config.h"
62 #include "insn-flags.h"
63 #include "insn-attr.h"
64 #include "recog.h"
65 #include "function.h"
66 #include "expr.h"
67 #include "real.h"
68 #include "except.h"
69 #include "toplev.h"
70
71 /* ??? Eventually must record somehow the labels used by jumps
72 from nested functions. */
73 /* Pre-record the next or previous real insn for each label?
74 No, this pass is very fast anyway. */
75 /* Condense consecutive labels?
76 This would make life analysis faster, maybe. */
77 /* Optimize jump y; x: ... y: jumpif... x?
78 Don't know if it is worth bothering with. */
79 /* Optimize two cases of conditional jump to conditional jump?
80 This can never delete any instruction or make anything dead,
81 or even change what is live at any point.
82 So perhaps let combiner do it. */
83
84 /* Vector indexed by uid.
85 For each CODE_LABEL, index by its uid to get first unconditional jump
86 that jumps to the label.
87 For each JUMP_INSN, index by its uid to get the next unconditional jump
88 that jumps to the same label.
89 Element 0 is the start of a chain of all return insns.
90 (It is safe to use element 0 because insn uid 0 is not used. */
91
92 static rtx *jump_chain;
93
94 /* Maximum index in jump_chain. */
95
96 static int max_jump_chain;
97
98 /* Set nonzero by jump_optimize if control can fall through
99 to the end of the function. */
100 int can_reach_end;
101
102 /* Indicates whether death notes are significant in cross jump analysis.
103 Normally they are not significant, because of A and B jump to C,
104 and R dies in A, it must die in B. But this might not be true after
105 stack register conversion, and we must compare death notes in that
106 case. */
107
108 static int cross_jump_death_matters = 0;
109
110 static int init_label_info PARAMS ((rtx));
111 static void delete_barrier_successors PARAMS ((rtx));
112 static void mark_all_labels PARAMS ((rtx, int));
113 static rtx delete_unreferenced_labels PARAMS ((rtx));
114 static void delete_noop_moves PARAMS ((rtx));
115 static int calculate_can_reach_end PARAMS ((rtx, int));
116 static int duplicate_loop_exit_test PARAMS ((rtx));
117 static void find_cross_jump PARAMS ((rtx, rtx, int, rtx *, rtx *));
118 static void do_cross_jump PARAMS ((rtx, rtx, rtx));
119 static int jump_back_p PARAMS ((rtx, rtx));
120 static int tension_vector_labels PARAMS ((rtx, int));
121 static void mark_jump_label PARAMS ((rtx, rtx, int));
122 static void delete_computation PARAMS ((rtx));
123 static void delete_from_jump_chain PARAMS ((rtx));
124 static int delete_labelref_insn PARAMS ((rtx, rtx, int));
125 static void mark_modified_reg PARAMS ((rtx, rtx, void *));
126 static void redirect_tablejump PARAMS ((rtx, rtx));
127 static void jump_optimize_1 PARAMS ((rtx, int, int, int, int));
128 #if ! defined(HAVE_cc0) && ! defined(HAVE_conditional_arithmetic)
129 static rtx find_insert_position PARAMS ((rtx, rtx));
130 #endif
131 static int returnjump_p_1 PARAMS ((rtx *, void *));
132 static void delete_prior_computation PARAMS ((rtx, rtx));
133
134 /* Main external entry point into the jump optimizer. See comments before
135 jump_optimize_1 for descriptions of the arguments. */
136 void
137 jump_optimize (f, cross_jump, noop_moves, after_regscan)
138 rtx f;
139 int cross_jump;
140 int noop_moves;
141 int after_regscan;
142 {
143 jump_optimize_1 (f, cross_jump, noop_moves, after_regscan, 0);
144 }
145
146 /* Alternate entry into the jump optimizer. This entry point only rebuilds
147 the JUMP_LABEL field in jumping insns and REG_LABEL notes in non-jumping
148 instructions. */
149 void
150 rebuild_jump_labels (f)
151 rtx f;
152 {
153 jump_optimize_1 (f, 0, 0, 0, 1);
154 }
155
156 \f
157 /* Delete no-op jumps and optimize jumps to jumps
158 and jumps around jumps.
159 Delete unused labels and unreachable code.
160
161 If CROSS_JUMP is 1, detect matching code
162 before a jump and its destination and unify them.
163 If CROSS_JUMP is 2, do cross-jumping, but pay attention to death notes.
164
165 If NOOP_MOVES is nonzero, delete no-op move insns.
166
167 If AFTER_REGSCAN is nonzero, then this jump pass is being run immediately
168 after regscan, and it is safe to use regno_first_uid and regno_last_uid.
169
170 If MARK_LABELS_ONLY is nonzero, then we only rebuild the jump chain
171 and JUMP_LABEL field for jumping insns.
172
173 If `optimize' is zero, don't change any code,
174 just determine whether control drops off the end of the function.
175 This case occurs when we have -W and not -O.
176 It works because `delete_insn' checks the value of `optimize'
177 and refrains from actually deleting when that is 0. */
178
179 static void
180 jump_optimize_1 (f, cross_jump, noop_moves, after_regscan, mark_labels_only)
181 rtx f;
182 int cross_jump;
183 int noop_moves;
184 int after_regscan;
185 int mark_labels_only;
186 {
187 register rtx insn, next;
188 int changed;
189 int old_max_reg;
190 int first = 1;
191 int max_uid = 0;
192 rtx last_insn;
193
194 cross_jump_death_matters = (cross_jump == 2);
195 max_uid = init_label_info (f) + 1;
196
197 /* If we are performing cross jump optimizations, then initialize
198 tables mapping UIDs to EH regions to avoid incorrect movement
199 of insns from one EH region to another. */
200 if (flag_exceptions && cross_jump)
201 init_insn_eh_region (f, max_uid);
202
203 delete_barrier_successors (f);
204
205 /* Leave some extra room for labels and duplicate exit test insns
206 we make. */
207 max_jump_chain = max_uid * 14 / 10;
208 jump_chain = (rtx *) xcalloc (max_jump_chain, sizeof (rtx));
209
210 mark_all_labels (f, cross_jump);
211
212 /* Keep track of labels used from static data;
213 they cannot ever be deleted. */
214
215 for (insn = forced_labels; insn; insn = XEXP (insn, 1))
216 LABEL_NUSES (XEXP (insn, 0))++;
217
218 check_exception_handler_labels ();
219
220 /* Keep track of labels used for marking handlers for exception
221 regions; they cannot usually be deleted. */
222
223 for (insn = exception_handler_labels; insn; insn = XEXP (insn, 1))
224 LABEL_NUSES (XEXP (insn, 0))++;
225
226 /* Quit now if we just wanted to rebuild the JUMP_LABEL and REG_LABEL
227 notes and recompute LABEL_NUSES. */
228 if (mark_labels_only)
229 goto end;
230
231 exception_optimize ();
232
233 last_insn = delete_unreferenced_labels (f);
234
235 #ifdef HAVE_return
236 if (optimize && HAVE_return)
237 {
238 /* If we fall through to the epilogue, see if we can insert a RETURN insn
239 in front of it. If the machine allows it at this point (we might be
240 after reload for a leaf routine), it will improve optimization for it
241 to be there. */
242 insn = get_last_insn ();
243 while (insn && GET_CODE (insn) == NOTE)
244 insn = PREV_INSN (insn);
245
246 if (insn && GET_CODE (insn) != BARRIER)
247 {
248 emit_jump_insn (gen_return ());
249 emit_barrier ();
250 }
251 }
252 #endif
253
254 if (noop_moves)
255 delete_noop_moves (f);
256
257 /* If we haven't yet gotten to reload and we have just run regscan,
258 delete any insn that sets a register that isn't used elsewhere.
259 This helps some of the optimizations below by having less insns
260 being jumped around. */
261
262 if (optimize && ! reload_completed && after_regscan)
263 for (insn = f; insn; insn = next)
264 {
265 rtx set = single_set (insn);
266
267 next = NEXT_INSN (insn);
268
269 if (set && GET_CODE (SET_DEST (set)) == REG
270 && REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER
271 && REGNO_FIRST_UID (REGNO (SET_DEST (set))) == INSN_UID (insn)
272 /* We use regno_last_note_uid so as not to delete the setting
273 of a reg that's used in notes. A subsequent optimization
274 might arrange to use that reg for real. */
275 && REGNO_LAST_NOTE_UID (REGNO (SET_DEST (set))) == INSN_UID (insn)
276 && ! side_effects_p (SET_SRC (set))
277 && ! find_reg_note (insn, REG_RETVAL, 0)
278 /* An ADDRESSOF expression can turn into a use of the internal arg
279 pointer, so do not delete the initialization of the internal
280 arg pointer yet. If it is truly dead, flow will delete the
281 initializing insn. */
282 && SET_DEST (set) != current_function_internal_arg_pointer)
283 delete_insn (insn);
284 }
285
286 /* Now iterate optimizing jumps until nothing changes over one pass. */
287 changed = 1;
288 old_max_reg = max_reg_num ();
289 while (changed)
290 {
291 changed = 0;
292
293 for (insn = f; insn; insn = next)
294 {
295 rtx reallabelprev;
296 rtx temp, temp1, temp2 = NULL_RTX, temp3, temp4, temp5, temp6;
297 rtx nlabel;
298 int this_is_simplejump, this_is_condjump, reversep = 0;
299 int this_is_condjump_in_parallel;
300
301 next = NEXT_INSN (insn);
302
303 /* See if this is a NOTE_INSN_LOOP_BEG followed by an unconditional
304 jump. Try to optimize by duplicating the loop exit test if so.
305 This is only safe immediately after regscan, because it uses
306 the values of regno_first_uid and regno_last_uid. */
307 if (after_regscan && GET_CODE (insn) == NOTE
308 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG
309 && (temp1 = next_nonnote_insn (insn)) != 0
310 && simplejump_p (temp1))
311 {
312 temp = PREV_INSN (insn);
313 if (duplicate_loop_exit_test (insn))
314 {
315 changed = 1;
316 next = NEXT_INSN (temp);
317 continue;
318 }
319 }
320
321 if (GET_CODE (insn) != JUMP_INSN)
322 continue;
323
324 this_is_simplejump = simplejump_p (insn);
325 this_is_condjump = condjump_p (insn);
326 this_is_condjump_in_parallel = condjump_in_parallel_p (insn);
327
328 /* Tension the labels in dispatch tables. */
329
330 if (GET_CODE (PATTERN (insn)) == ADDR_VEC)
331 changed |= tension_vector_labels (PATTERN (insn), 0);
332 if (GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
333 changed |= tension_vector_labels (PATTERN (insn), 1);
334
335 /* See if this jump goes to another jump and redirect if so. */
336 nlabel = follow_jumps (JUMP_LABEL (insn));
337 if (nlabel != JUMP_LABEL (insn))
338 changed |= redirect_jump (insn, nlabel);
339
340 if (! optimize)
341 continue;
342
343 /* If a dispatch table always goes to the same place,
344 get rid of it and replace the insn that uses it. */
345
346 if (GET_CODE (PATTERN (insn)) == ADDR_VEC
347 || GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
348 {
349 int i;
350 rtx pat = PATTERN (insn);
351 int diff_vec_p = GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC;
352 int len = XVECLEN (pat, diff_vec_p);
353 rtx dispatch = prev_real_insn (insn);
354 rtx set;
355
356 for (i = 0; i < len; i++)
357 if (XEXP (XVECEXP (pat, diff_vec_p, i), 0)
358 != XEXP (XVECEXP (pat, diff_vec_p, 0), 0))
359 break;
360
361 if (i == len
362 && dispatch != 0
363 && GET_CODE (dispatch) == JUMP_INSN
364 && JUMP_LABEL (dispatch) != 0
365 /* Don't mess with a casesi insn.
366 XXX according to the comment before computed_jump_p(),
367 all casesi insns should be a parallel of the jump
368 and a USE of a LABEL_REF. */
369 && ! ((set = single_set (dispatch)) != NULL
370 && (GET_CODE (SET_SRC (set)) == IF_THEN_ELSE))
371 && next_real_insn (JUMP_LABEL (dispatch)) == insn)
372 {
373 redirect_tablejump (dispatch,
374 XEXP (XVECEXP (pat, diff_vec_p, 0), 0));
375 changed = 1;
376 }
377 }
378
379 /* If a jump references the end of the function, try to turn
380 it into a RETURN insn, possibly a conditional one. */
381 if (JUMP_LABEL (insn) != 0
382 && (next_active_insn (JUMP_LABEL (insn)) == 0
383 || GET_CODE (PATTERN (next_active_insn (JUMP_LABEL (insn))))
384 == RETURN))
385 changed |= redirect_jump (insn, NULL_RTX);
386
387 reallabelprev = prev_active_insn (JUMP_LABEL (insn));
388
389 /* Detect jump to following insn. */
390 if (reallabelprev == insn && this_is_condjump)
391 {
392 next = next_real_insn (JUMP_LABEL (insn));
393 delete_jump (insn);
394 changed = 1;
395 continue;
396 }
397
398 /* Detect a conditional jump going to the same place
399 as an immediately following unconditional jump. */
400 else if (this_is_condjump
401 && (temp = next_active_insn (insn)) != 0
402 && simplejump_p (temp)
403 && (next_active_insn (JUMP_LABEL (insn))
404 == next_active_insn (JUMP_LABEL (temp))))
405 {
406 /* Don't mess up test coverage analysis. */
407 temp2 = temp;
408 if (flag_test_coverage && !reload_completed)
409 for (temp2 = insn; temp2 != temp; temp2 = NEXT_INSN (temp2))
410 if (GET_CODE (temp2) == NOTE && NOTE_LINE_NUMBER (temp2) > 0)
411 break;
412
413 if (temp2 == temp)
414 {
415 delete_jump (insn);
416 changed = 1;
417 continue;
418 }
419 }
420
421 /* Detect a conditional jump jumping over an unconditional jump. */
422
423 else if ((this_is_condjump || this_is_condjump_in_parallel)
424 && ! this_is_simplejump
425 && reallabelprev != 0
426 && GET_CODE (reallabelprev) == JUMP_INSN
427 && prev_active_insn (reallabelprev) == insn
428 && no_labels_between_p (insn, reallabelprev)
429 && simplejump_p (reallabelprev))
430 {
431 /* When we invert the unconditional jump, we will be
432 decrementing the usage count of its old label.
433 Make sure that we don't delete it now because that
434 might cause the following code to be deleted. */
435 rtx prev_uses = prev_nonnote_insn (reallabelprev);
436 rtx prev_label = JUMP_LABEL (insn);
437
438 if (prev_label)
439 ++LABEL_NUSES (prev_label);
440
441 if (invert_jump (insn, JUMP_LABEL (reallabelprev)))
442 {
443 /* It is very likely that if there are USE insns before
444 this jump, they hold REG_DEAD notes. These REG_DEAD
445 notes are no longer valid due to this optimization,
446 and will cause the life-analysis that following passes
447 (notably delayed-branch scheduling) to think that
448 these registers are dead when they are not.
449
450 To prevent this trouble, we just remove the USE insns
451 from the insn chain. */
452
453 while (prev_uses && GET_CODE (prev_uses) == INSN
454 && GET_CODE (PATTERN (prev_uses)) == USE)
455 {
456 rtx useless = prev_uses;
457 prev_uses = prev_nonnote_insn (prev_uses);
458 delete_insn (useless);
459 }
460
461 delete_insn (reallabelprev);
462 changed = 1;
463 }
464
465 /* We can now safely delete the label if it is unreferenced
466 since the delete_insn above has deleted the BARRIER. */
467 if (prev_label && --LABEL_NUSES (prev_label) == 0)
468 delete_insn (prev_label);
469
470 next = NEXT_INSN (insn);
471 }
472
473 /* If we have an unconditional jump preceded by a USE, try to put
474 the USE before the target and jump there. This simplifies many
475 of the optimizations below since we don't have to worry about
476 dealing with these USE insns. We only do this if the label
477 being branch to already has the identical USE or if code
478 never falls through to that label. */
479
480 else if (this_is_simplejump
481 && (temp = prev_nonnote_insn (insn)) != 0
482 && GET_CODE (temp) == INSN
483 && GET_CODE (PATTERN (temp)) == USE
484 && (temp1 = prev_nonnote_insn (JUMP_LABEL (insn))) != 0
485 && (GET_CODE (temp1) == BARRIER
486 || (GET_CODE (temp1) == INSN
487 && rtx_equal_p (PATTERN (temp), PATTERN (temp1))))
488 /* Don't do this optimization if we have a loop containing
489 only the USE instruction, and the loop start label has
490 a usage count of 1. This is because we will redo this
491 optimization everytime through the outer loop, and jump
492 opt will never exit. */
493 && ! ((temp2 = prev_nonnote_insn (temp)) != 0
494 && temp2 == JUMP_LABEL (insn)
495 && LABEL_NUSES (temp2) == 1))
496 {
497 if (GET_CODE (temp1) == BARRIER)
498 {
499 emit_insn_after (PATTERN (temp), temp1);
500 temp1 = NEXT_INSN (temp1);
501 }
502
503 delete_insn (temp);
504 redirect_jump (insn, get_label_before (temp1));
505 reallabelprev = prev_real_insn (temp1);
506 changed = 1;
507 next = NEXT_INSN (insn);
508 }
509
510 /* Simplify if (...) x = a; else x = b; by converting it
511 to x = b; if (...) x = a;
512 if B is sufficiently simple, the test doesn't involve X,
513 and nothing in the test modifies B or X.
514
515 If we have small register classes, we also can't do this if X
516 is a hard register.
517
518 If the "x = b;" insn has any REG_NOTES, we don't do this because
519 of the possibility that we are running after CSE and there is a
520 REG_EQUAL note that is only valid if the branch has already been
521 taken. If we move the insn with the REG_EQUAL note, we may
522 fold the comparison to always be false in a later CSE pass.
523 (We could also delete the REG_NOTES when moving the insn, but it
524 seems simpler to not move it.) An exception is that we can move
525 the insn if the only note is a REG_EQUAL or REG_EQUIV whose
526 value is the same as "b".
527
528 INSN is the branch over the `else' part.
529
530 We set:
531
532 TEMP to the jump insn preceding "x = a;"
533 TEMP1 to X
534 TEMP2 to the insn that sets "x = b;"
535 TEMP3 to the insn that sets "x = a;"
536 TEMP4 to the set of "x = b"; */
537
538 if (this_is_simplejump
539 && (temp3 = prev_active_insn (insn)) != 0
540 && GET_CODE (temp3) == INSN
541 && (temp4 = single_set (temp3)) != 0
542 && GET_CODE (temp1 = SET_DEST (temp4)) == REG
543 && (! SMALL_REGISTER_CLASSES
544 || REGNO (temp1) >= FIRST_PSEUDO_REGISTER)
545 && (temp2 = next_active_insn (insn)) != 0
546 && GET_CODE (temp2) == INSN
547 && (temp4 = single_set (temp2)) != 0
548 && rtx_equal_p (SET_DEST (temp4), temp1)
549 && ! side_effects_p (SET_SRC (temp4))
550 && ! may_trap_p (SET_SRC (temp4))
551 && (REG_NOTES (temp2) == 0
552 || ((REG_NOTE_KIND (REG_NOTES (temp2)) == REG_EQUAL
553 || REG_NOTE_KIND (REG_NOTES (temp2)) == REG_EQUIV)
554 && XEXP (REG_NOTES (temp2), 1) == 0
555 && rtx_equal_p (XEXP (REG_NOTES (temp2), 0),
556 SET_SRC (temp4))))
557 && (temp = prev_active_insn (temp3)) != 0
558 && condjump_p (temp) && ! simplejump_p (temp)
559 /* TEMP must skip over the "x = a;" insn */
560 && prev_real_insn (JUMP_LABEL (temp)) == insn
561 && no_labels_between_p (insn, JUMP_LABEL (temp))
562 /* There must be no other entries to the "x = b;" insn. */
563 && no_labels_between_p (JUMP_LABEL (temp), temp2)
564 /* INSN must either branch to the insn after TEMP2 or the insn
565 after TEMP2 must branch to the same place as INSN. */
566 && (reallabelprev == temp2
567 || ((temp5 = next_active_insn (temp2)) != 0
568 && simplejump_p (temp5)
569 && JUMP_LABEL (temp5) == JUMP_LABEL (insn))))
570 {
571 /* The test expression, X, may be a complicated test with
572 multiple branches. See if we can find all the uses of
573 the label that TEMP branches to without hitting a CALL_INSN
574 or a jump to somewhere else. */
575 rtx target = JUMP_LABEL (temp);
576 int nuses = LABEL_NUSES (target);
577 rtx p;
578 #ifdef HAVE_cc0
579 rtx q;
580 #endif
581
582 /* Set P to the first jump insn that goes around "x = a;". */
583 for (p = temp; nuses && p; p = prev_nonnote_insn (p))
584 {
585 if (GET_CODE (p) == JUMP_INSN)
586 {
587 if (condjump_p (p) && ! simplejump_p (p)
588 && JUMP_LABEL (p) == target)
589 {
590 nuses--;
591 if (nuses == 0)
592 break;
593 }
594 else
595 break;
596 }
597 else if (GET_CODE (p) == CALL_INSN)
598 break;
599 }
600
601 #ifdef HAVE_cc0
602 /* We cannot insert anything between a set of cc and its use
603 so if P uses cc0, we must back up to the previous insn. */
604 q = prev_nonnote_insn (p);
605 if (q && GET_RTX_CLASS (GET_CODE (q)) == 'i'
606 && sets_cc0_p (PATTERN (q)))
607 p = q;
608 #endif
609
610 if (p)
611 p = PREV_INSN (p);
612
613 /* If we found all the uses and there was no data conflict, we
614 can move the assignment unless we can branch into the middle
615 from somewhere. */
616 if (nuses == 0 && p
617 && no_labels_between_p (p, insn)
618 && ! reg_referenced_between_p (temp1, p, NEXT_INSN (temp3))
619 && ! reg_set_between_p (temp1, p, temp3)
620 && (GET_CODE (SET_SRC (temp4)) == CONST_INT
621 || ! modified_between_p (SET_SRC (temp4), p, temp2))
622 /* Verify that registers used by the jump are not clobbered
623 by the instruction being moved. */
624 && ! regs_set_between_p (PATTERN (temp),
625 PREV_INSN (temp2),
626 NEXT_INSN (temp2)))
627 {
628 emit_insn_after_with_line_notes (PATTERN (temp2), p, temp2);
629 delete_insn (temp2);
630
631 /* Set NEXT to an insn that we know won't go away. */
632 next = next_active_insn (insn);
633
634 /* Delete the jump around the set. Note that we must do
635 this before we redirect the test jumps so that it won't
636 delete the code immediately following the assignment
637 we moved (which might be a jump). */
638
639 delete_insn (insn);
640
641 /* We either have two consecutive labels or a jump to
642 a jump, so adjust all the JUMP_INSNs to branch to where
643 INSN branches to. */
644 for (p = NEXT_INSN (p); p != next; p = NEXT_INSN (p))
645 if (GET_CODE (p) == JUMP_INSN)
646 redirect_jump (p, target);
647
648 changed = 1;
649 next = NEXT_INSN (insn);
650 continue;
651 }
652 }
653
654 /* Simplify if (...) { x = a; goto l; } x = b; by converting it
655 to x = a; if (...) goto l; x = b;
656 if A is sufficiently simple, the test doesn't involve X,
657 and nothing in the test modifies A or X.
658
659 If we have small register classes, we also can't do this if X
660 is a hard register.
661
662 If the "x = a;" insn has any REG_NOTES, we don't do this because
663 of the possibility that we are running after CSE and there is a
664 REG_EQUAL note that is only valid if the branch has already been
665 taken. If we move the insn with the REG_EQUAL note, we may
666 fold the comparison to always be false in a later CSE pass.
667 (We could also delete the REG_NOTES when moving the insn, but it
668 seems simpler to not move it.) An exception is that we can move
669 the insn if the only note is a REG_EQUAL or REG_EQUIV whose
670 value is the same as "a".
671
672 INSN is the goto.
673
674 We set:
675
676 TEMP to the jump insn preceding "x = a;"
677 TEMP1 to X
678 TEMP2 to the insn that sets "x = b;"
679 TEMP3 to the insn that sets "x = a;"
680 TEMP4 to the set of "x = a"; */
681
682 if (this_is_simplejump
683 && (temp2 = next_active_insn (insn)) != 0
684 && GET_CODE (temp2) == INSN
685 && (temp4 = single_set (temp2)) != 0
686 && GET_CODE (temp1 = SET_DEST (temp4)) == REG
687 && (! SMALL_REGISTER_CLASSES
688 || REGNO (temp1) >= FIRST_PSEUDO_REGISTER)
689 && (temp3 = prev_active_insn (insn)) != 0
690 && GET_CODE (temp3) == INSN
691 && (temp4 = single_set (temp3)) != 0
692 && rtx_equal_p (SET_DEST (temp4), temp1)
693 && ! side_effects_p (SET_SRC (temp4))
694 && ! may_trap_p (SET_SRC (temp4))
695 && (REG_NOTES (temp3) == 0
696 || ((REG_NOTE_KIND (REG_NOTES (temp3)) == REG_EQUAL
697 || REG_NOTE_KIND (REG_NOTES (temp3)) == REG_EQUIV)
698 && XEXP (REG_NOTES (temp3), 1) == 0
699 && rtx_equal_p (XEXP (REG_NOTES (temp3), 0),
700 SET_SRC (temp4))))
701 && (temp = prev_active_insn (temp3)) != 0
702 && condjump_p (temp) && ! simplejump_p (temp)
703 /* TEMP must skip over the "x = a;" insn */
704 && prev_real_insn (JUMP_LABEL (temp)) == insn
705 && no_labels_between_p (temp, insn))
706 {
707 rtx prev_label = JUMP_LABEL (temp);
708 rtx insert_after = prev_nonnote_insn (temp);
709
710 #ifdef HAVE_cc0
711 /* We cannot insert anything between a set of cc and its use. */
712 if (insert_after && GET_RTX_CLASS (GET_CODE (insert_after)) == 'i'
713 && sets_cc0_p (PATTERN (insert_after)))
714 insert_after = prev_nonnote_insn (insert_after);
715 #endif
716 ++LABEL_NUSES (prev_label);
717
718 if (insert_after
719 && no_labels_between_p (insert_after, temp)
720 && ! reg_referenced_between_p (temp1, insert_after, temp3)
721 && ! reg_referenced_between_p (temp1, temp3,
722 NEXT_INSN (temp2))
723 && ! reg_set_between_p (temp1, insert_after, temp)
724 && ! modified_between_p (SET_SRC (temp4), insert_after, temp)
725 /* Verify that registers used by the jump are not clobbered
726 by the instruction being moved. */
727 && ! regs_set_between_p (PATTERN (temp),
728 PREV_INSN (temp3),
729 NEXT_INSN (temp3))
730 && invert_jump (temp, JUMP_LABEL (insn)))
731 {
732 emit_insn_after_with_line_notes (PATTERN (temp3),
733 insert_after, temp3);
734 delete_insn (temp3);
735 delete_insn (insn);
736 /* Set NEXT to an insn that we know won't go away. */
737 next = temp2;
738 changed = 1;
739 }
740 if (prev_label && --LABEL_NUSES (prev_label) == 0)
741 delete_insn (prev_label);
742 if (changed)
743 continue;
744 }
745
746 #if !defined(HAVE_cc0) && !defined(HAVE_conditional_arithmetic)
747
748 /* If we have if (...) x = exp; and branches are expensive,
749 EXP is a single insn, does not have any side effects, cannot
750 trap, and is not too costly, convert this to
751 t = exp; if (...) x = t;
752
753 Don't do this when we have CC0 because it is unlikely to help
754 and we'd need to worry about where to place the new insn and
755 the potential for conflicts. We also can't do this when we have
756 notes on the insn for the same reason as above.
757
758 If we have conditional arithmetic, this will make this
759 harder to optimize later and isn't needed, so don't do it
760 in that case either.
761
762 We set:
763
764 TEMP to the "x = exp;" insn.
765 TEMP1 to the single set in the "x = exp;" insn.
766 TEMP2 to "x". */
767
768 if (! reload_completed
769 && this_is_condjump && ! this_is_simplejump
770 && BRANCH_COST >= 3
771 && (temp = next_nonnote_insn (insn)) != 0
772 && GET_CODE (temp) == INSN
773 && REG_NOTES (temp) == 0
774 && (reallabelprev == temp
775 || ((temp2 = next_active_insn (temp)) != 0
776 && simplejump_p (temp2)
777 && JUMP_LABEL (temp2) == JUMP_LABEL (insn)))
778 && (temp1 = single_set (temp)) != 0
779 && (temp2 = SET_DEST (temp1), GET_CODE (temp2) == REG)
780 && (! SMALL_REGISTER_CLASSES
781 || REGNO (temp2) >= FIRST_PSEUDO_REGISTER)
782 && GET_CODE (SET_SRC (temp1)) != REG
783 && GET_CODE (SET_SRC (temp1)) != SUBREG
784 && GET_CODE (SET_SRC (temp1)) != CONST_INT
785 && ! side_effects_p (SET_SRC (temp1))
786 && ! may_trap_p (SET_SRC (temp1))
787 && rtx_cost (SET_SRC (temp1), SET) < 10)
788 {
789 rtx new = gen_reg_rtx (GET_MODE (temp2));
790
791 if ((temp3 = find_insert_position (insn, temp))
792 && validate_change (temp, &SET_DEST (temp1), new, 0))
793 {
794 next = emit_insn_after (gen_move_insn (temp2, new), insn);
795 emit_insn_after_with_line_notes (PATTERN (temp),
796 PREV_INSN (temp3), temp);
797 delete_insn (temp);
798 reallabelprev = prev_active_insn (JUMP_LABEL (insn));
799
800 if (after_regscan)
801 {
802 reg_scan_update (temp3, NEXT_INSN (next), old_max_reg);
803 old_max_reg = max_reg_num ();
804 }
805 }
806 }
807
808 /* Similarly, if it takes two insns to compute EXP but they
809 have the same destination. Here TEMP3 will be the second
810 insn and TEMP4 the SET from that insn. */
811
812 if (! reload_completed
813 && this_is_condjump && ! this_is_simplejump
814 && BRANCH_COST >= 4
815 && (temp = next_nonnote_insn (insn)) != 0
816 && GET_CODE (temp) == INSN
817 && REG_NOTES (temp) == 0
818 && (temp3 = next_nonnote_insn (temp)) != 0
819 && GET_CODE (temp3) == INSN
820 && REG_NOTES (temp3) == 0
821 && (reallabelprev == temp3
822 || ((temp2 = next_active_insn (temp3)) != 0
823 && simplejump_p (temp2)
824 && JUMP_LABEL (temp2) == JUMP_LABEL (insn)))
825 && (temp1 = single_set (temp)) != 0
826 && (temp2 = SET_DEST (temp1), GET_CODE (temp2) == REG)
827 && GET_MODE_CLASS (GET_MODE (temp2)) == MODE_INT
828 && (! SMALL_REGISTER_CLASSES
829 || REGNO (temp2) >= FIRST_PSEUDO_REGISTER)
830 && ! side_effects_p (SET_SRC (temp1))
831 && ! may_trap_p (SET_SRC (temp1))
832 && rtx_cost (SET_SRC (temp1), SET) < 10
833 && (temp4 = single_set (temp3)) != 0
834 && rtx_equal_p (SET_DEST (temp4), temp2)
835 && ! side_effects_p (SET_SRC (temp4))
836 && ! may_trap_p (SET_SRC (temp4))
837 && rtx_cost (SET_SRC (temp4), SET) < 10)
838 {
839 rtx new = gen_reg_rtx (GET_MODE (temp2));
840
841 if ((temp5 = find_insert_position (insn, temp))
842 && (temp6 = find_insert_position (insn, temp3))
843 && validate_change (temp, &SET_DEST (temp1), new, 0))
844 {
845 /* Use the earliest of temp5 and temp6. */
846 if (temp5 != insn)
847 temp6 = temp5;
848 next = emit_insn_after (gen_move_insn (temp2, new), insn);
849 emit_insn_after_with_line_notes (PATTERN (temp),
850 PREV_INSN (temp6), temp);
851 emit_insn_after_with_line_notes
852 (replace_rtx (PATTERN (temp3), temp2, new),
853 PREV_INSN (temp6), temp3);
854 delete_insn (temp);
855 delete_insn (temp3);
856 reallabelprev = prev_active_insn (JUMP_LABEL (insn));
857
858 if (after_regscan)
859 {
860 reg_scan_update (temp6, NEXT_INSN (next), old_max_reg);
861 old_max_reg = max_reg_num ();
862 }
863 }
864 }
865
866 /* Finally, handle the case where two insns are used to
867 compute EXP but a temporary register is used. Here we must
868 ensure that the temporary register is not used anywhere else. */
869
870 if (! reload_completed
871 && after_regscan
872 && this_is_condjump && ! this_is_simplejump
873 && BRANCH_COST >= 4
874 && (temp = next_nonnote_insn (insn)) != 0
875 && GET_CODE (temp) == INSN
876 && REG_NOTES (temp) == 0
877 && (temp3 = next_nonnote_insn (temp)) != 0
878 && GET_CODE (temp3) == INSN
879 && REG_NOTES (temp3) == 0
880 && (reallabelprev == temp3
881 || ((temp2 = next_active_insn (temp3)) != 0
882 && simplejump_p (temp2)
883 && JUMP_LABEL (temp2) == JUMP_LABEL (insn)))
884 && (temp1 = single_set (temp)) != 0
885 && (temp5 = SET_DEST (temp1),
886 (GET_CODE (temp5) == REG
887 || (GET_CODE (temp5) == SUBREG
888 && (temp5 = SUBREG_REG (temp5),
889 GET_CODE (temp5) == REG))))
890 && REGNO (temp5) >= FIRST_PSEUDO_REGISTER
891 && REGNO_FIRST_UID (REGNO (temp5)) == INSN_UID (temp)
892 && REGNO_LAST_UID (REGNO (temp5)) == INSN_UID (temp3)
893 && ! side_effects_p (SET_SRC (temp1))
894 && ! may_trap_p (SET_SRC (temp1))
895 && rtx_cost (SET_SRC (temp1), SET) < 10
896 && (temp4 = single_set (temp3)) != 0
897 && (temp2 = SET_DEST (temp4), GET_CODE (temp2) == REG)
898 && GET_MODE_CLASS (GET_MODE (temp2)) == MODE_INT
899 && (! SMALL_REGISTER_CLASSES
900 || REGNO (temp2) >= FIRST_PSEUDO_REGISTER)
901 && rtx_equal_p (SET_DEST (temp4), temp2)
902 && ! side_effects_p (SET_SRC (temp4))
903 && ! may_trap_p (SET_SRC (temp4))
904 && rtx_cost (SET_SRC (temp4), SET) < 10)
905 {
906 rtx new = gen_reg_rtx (GET_MODE (temp2));
907
908 if ((temp5 = find_insert_position (insn, temp))
909 && (temp6 = find_insert_position (insn, temp3))
910 && validate_change (temp3, &SET_DEST (temp4), new, 0))
911 {
912 /* Use the earliest of temp5 and temp6. */
913 if (temp5 != insn)
914 temp6 = temp5;
915 next = emit_insn_after (gen_move_insn (temp2, new), insn);
916 emit_insn_after_with_line_notes (PATTERN (temp),
917 PREV_INSN (temp6), temp);
918 emit_insn_after_with_line_notes (PATTERN (temp3),
919 PREV_INSN (temp6), temp3);
920 delete_insn (temp);
921 delete_insn (temp3);
922 reallabelprev = prev_active_insn (JUMP_LABEL (insn));
923
924 if (after_regscan)
925 {
926 reg_scan_update (temp6, NEXT_INSN (next), old_max_reg);
927 old_max_reg = max_reg_num ();
928 }
929 }
930 }
931 #endif /* HAVE_cc0 */
932
933 #ifdef HAVE_conditional_arithmetic
934 /* ??? This is disabled in genconfig, as this simple-minded
935 transformation can incredibly lengthen register lifetimes.
936
937 Consider this example from cexp.c's yyparse:
938
939 234 (set (pc)
940 (if_then_else (ne (reg:DI 149) (const_int 0 [0x0]))
941 (label_ref 248) (pc)))
942 237 (set (reg/i:DI 0 $0) (const_int 1 [0x1]))
943 239 (set (pc) (label_ref 2382))
944 248 (code_label ("yybackup"))
945
946 This will be transformed to:
947
948 237 (set (reg/i:DI 0 $0)
949 (if_then_else:DI (eq (reg:DI 149) (const_int 0 [0x0]))
950 (const_int 1 [0x1]) (reg/i:DI 0 $0)))
951 239 (set (pc)
952 (if_then_else (eq (reg:DI 149) (const_int 0 [0x0]))
953 (label_ref 2382) (pc)))
954
955 which, from this narrow viewpoint looks fine. Except that
956 between this and 3 other ocurrences of the same pattern, $0
957 is now live for basically the entire function, and we'll
958 get an abort in caller_save.
959
960 Any replacement for this code should recall that a set of
961 a register that is not live need not, and indeed should not,
962 be conditionalized. Either that, or delay the transformation
963 until after register allocation. */
964
965 /* See if this is a conditional jump around a small number of
966 instructions that we can conditionalize. Don't do this before
967 the initial CSE pass or after reload.
968
969 We reject any insns that have side effects or may trap.
970 Strictly speaking, this is not needed since the machine may
971 support conditionalizing these too, but we won't deal with that
972 now. Specifically, this means that we can't conditionalize a
973 CALL_INSN, which some machines, such as the ARC, can do, but
974 this is a very minor optimization. */
975 if (this_is_condjump && ! this_is_simplejump
976 && cse_not_expected && ! reload_completed
977 && BRANCH_COST > 2
978 && can_reverse_comparison_p (XEXP (SET_SRC (PATTERN (insn)), 0),
979 insn))
980 {
981 rtx ourcond = XEXP (SET_SRC (PATTERN (insn)), 0);
982 int num_insns = 0;
983 char *storage = (char *) oballoc (0);
984 int last_insn = 0, failed = 0;
985 rtx changed_jump = 0;
986
987 ourcond = gen_rtx (reverse_condition (GET_CODE (ourcond)),
988 VOIDmode, XEXP (ourcond, 0),
989 XEXP (ourcond, 1));
990
991 /* Scan forward BRANCH_COST real insns looking for the JUMP_LABEL
992 of this insn. We see if we think we can conditionalize the
993 insns we pass. For now, we only deal with insns that have
994 one SET. We stop after an insn that modifies anything in
995 OURCOND, if we have too many insns, or if we have an insn
996 with a side effect or that may trip. Note that we will
997 be modifying any unconditional jumps we encounter to be
998 conditional; this will have the effect of also doing this
999 optimization on the "else" the next time around. */
1000 for (temp1 = NEXT_INSN (insn);
1001 num_insns <= BRANCH_COST && ! failed && temp1 != 0
1002 && GET_CODE (temp1) != CODE_LABEL;
1003 temp1 = NEXT_INSN (temp1))
1004 {
1005 /* Ignore everything but an active insn. */
1006 if (GET_RTX_CLASS (GET_CODE (temp1)) != 'i'
1007 || GET_CODE (PATTERN (temp1)) == USE
1008 || GET_CODE (PATTERN (temp1)) == CLOBBER)
1009 continue;
1010
1011 /* If this was an unconditional jump, record it since we'll
1012 need to remove the BARRIER if we succeed. We can only
1013 have one such jump since there must be a label after
1014 the BARRIER and it's either ours, in which case it's the
1015 only one or some other, in which case we'd fail.
1016 Likewise if it's a CALL_INSN followed by a BARRIER. */
1017
1018 if (simplejump_p (temp1)
1019 || (GET_CODE (temp1) == CALL_INSN
1020 && NEXT_INSN (temp1) != 0
1021 && GET_CODE (NEXT_INSN (temp1)) == BARRIER))
1022 {
1023 if (changed_jump == 0)
1024 changed_jump = temp1;
1025 else
1026 changed_jump
1027 = gen_rtx_INSN_LIST (VOIDmode, temp1, changed_jump);
1028 }
1029
1030 /* See if we are allowed another insn and if this insn
1031 if one we think we may be able to handle. */
1032 if (++num_insns > BRANCH_COST
1033 || last_insn
1034 || (((temp2 = single_set (temp1)) == 0
1035 || side_effects_p (SET_SRC (temp2))
1036 || may_trap_p (SET_SRC (temp2)))
1037 && GET_CODE (temp1) != CALL_INSN))
1038 failed = 1;
1039 else if (temp2 != 0)
1040 validate_change (temp1, &SET_SRC (temp2),
1041 gen_rtx_IF_THEN_ELSE
1042 (GET_MODE (SET_DEST (temp2)),
1043 copy_rtx (ourcond),
1044 SET_SRC (temp2), SET_DEST (temp2)),
1045 1);
1046 else
1047 {
1048 /* This is a CALL_INSN that doesn't have a SET. */
1049 rtx *call_loc = &PATTERN (temp1);
1050
1051 if (GET_CODE (*call_loc) == PARALLEL)
1052 call_loc = &XVECEXP (*call_loc, 0, 0);
1053
1054 validate_change (temp1, call_loc,
1055 gen_rtx_IF_THEN_ELSE
1056 (VOIDmode, copy_rtx (ourcond),
1057 *call_loc, const0_rtx),
1058 1);
1059 }
1060
1061
1062 if (modified_in_p (ourcond, temp1))
1063 last_insn = 1;
1064 }
1065
1066 /* If we've reached our jump label, haven't failed, and all
1067 the changes above are valid, we can delete this jump
1068 insn. Also remove a BARRIER after any jump that used
1069 to be unconditional and remove any REG_EQUAL or REG_EQUIV
1070 that might have previously been present on insns we
1071 made conditional. */
1072 if (temp1 == JUMP_LABEL (insn) && ! failed
1073 && apply_change_group ())
1074 {
1075 for (temp1 = NEXT_INSN (insn); temp1 != JUMP_LABEL (insn);
1076 temp1 = NEXT_INSN (temp1))
1077 if (GET_RTX_CLASS (GET_CODE (temp1)) == 'i')
1078 for (temp2 = REG_NOTES (temp1); temp2 != 0;
1079 temp2 = XEXP (temp2, 1))
1080 if (REG_NOTE_KIND (temp2) == REG_EQUAL
1081 || REG_NOTE_KIND (temp2) == REG_EQUIV)
1082 remove_note (temp1, temp2);
1083
1084 if (changed_jump != 0)
1085 {
1086 while (GET_CODE (changed_jump) == INSN_LIST)
1087 {
1088 delete_barrier (NEXT_INSN (XEXP (changed_jump, 0)));
1089 changed_jump = XEXP (changed_jump, 1);
1090 }
1091
1092 delete_barrier (NEXT_INSN (changed_jump));
1093 }
1094
1095 delete_insn (insn);
1096 changed = 1;
1097 continue;
1098 }
1099 else
1100 {
1101 cancel_changes (0);
1102 obfree (storage);
1103 }
1104 }
1105 #endif
1106 /* If branches are expensive, convert
1107 if (foo) bar++; to bar += (foo != 0);
1108 and similarly for "bar--;"
1109
1110 INSN is the conditional branch around the arithmetic. We set:
1111
1112 TEMP is the arithmetic insn.
1113 TEMP1 is the SET doing the arithmetic.
1114 TEMP2 is the operand being incremented or decremented.
1115 TEMP3 to the condition being tested.
1116 TEMP4 to the earliest insn used to find the condition. */
1117
1118 if ((BRANCH_COST >= 2
1119 #ifdef HAVE_incscc
1120 || HAVE_incscc
1121 #endif
1122 #ifdef HAVE_decscc
1123 || HAVE_decscc
1124 #endif
1125 )
1126 && ! reload_completed
1127 && this_is_condjump && ! this_is_simplejump
1128 && (temp = next_nonnote_insn (insn)) != 0
1129 && (temp1 = single_set (temp)) != 0
1130 && (temp2 = SET_DEST (temp1),
1131 GET_MODE_CLASS (GET_MODE (temp2)) == MODE_INT)
1132 && GET_CODE (SET_SRC (temp1)) == PLUS
1133 && (XEXP (SET_SRC (temp1), 1) == const1_rtx
1134 || XEXP (SET_SRC (temp1), 1) == constm1_rtx)
1135 && rtx_equal_p (temp2, XEXP (SET_SRC (temp1), 0))
1136 && ! side_effects_p (temp2)
1137 && ! may_trap_p (temp2)
1138 /* INSN must either branch to the insn after TEMP or the insn
1139 after TEMP must branch to the same place as INSN. */
1140 && (reallabelprev == temp
1141 || ((temp3 = next_active_insn (temp)) != 0
1142 && simplejump_p (temp3)
1143 && JUMP_LABEL (temp3) == JUMP_LABEL (insn)))
1144 && (temp3 = get_condition (insn, &temp4)) != 0
1145 /* We must be comparing objects whose modes imply the size.
1146 We could handle BLKmode if (1) emit_store_flag could
1147 and (2) we could find the size reliably. */
1148 && GET_MODE (XEXP (temp3, 0)) != BLKmode
1149 && can_reverse_comparison_p (temp3, insn))
1150 {
1151 rtx temp6, target = 0, seq, init_insn = 0, init = temp2;
1152 enum rtx_code code = reverse_condition (GET_CODE (temp3));
1153
1154 start_sequence ();
1155
1156 /* It must be the case that TEMP2 is not modified in the range
1157 [TEMP4, INSN). The one exception we make is if the insn
1158 before INSN sets TEMP2 to something which is also unchanged
1159 in that range. In that case, we can move the initialization
1160 into our sequence. */
1161
1162 if ((temp5 = prev_active_insn (insn)) != 0
1163 && no_labels_between_p (temp5, insn)
1164 && GET_CODE (temp5) == INSN
1165 && (temp6 = single_set (temp5)) != 0
1166 && rtx_equal_p (temp2, SET_DEST (temp6))
1167 && (CONSTANT_P (SET_SRC (temp6))
1168 || GET_CODE (SET_SRC (temp6)) == REG
1169 || GET_CODE (SET_SRC (temp6)) == SUBREG))
1170 {
1171 emit_insn (PATTERN (temp5));
1172 init_insn = temp5;
1173 init = SET_SRC (temp6);
1174 }
1175
1176 if (CONSTANT_P (init)
1177 || ! reg_set_between_p (init, PREV_INSN (temp4), insn))
1178 target = emit_store_flag (gen_reg_rtx (GET_MODE (temp2)), code,
1179 XEXP (temp3, 0), XEXP (temp3, 1),
1180 VOIDmode,
1181 (code == LTU || code == LEU
1182 || code == GTU || code == GEU), 1);
1183
1184 /* If we can do the store-flag, do the addition or
1185 subtraction. */
1186
1187 if (target)
1188 target = expand_binop (GET_MODE (temp2),
1189 (XEXP (SET_SRC (temp1), 1) == const1_rtx
1190 ? add_optab : sub_optab),
1191 temp2, target, temp2, 0, OPTAB_WIDEN);
1192
1193 if (target != 0)
1194 {
1195 /* Put the result back in temp2 in case it isn't already.
1196 Then replace the jump, possible a CC0-setting insn in
1197 front of the jump, and TEMP, with the sequence we have
1198 made. */
1199
1200 if (target != temp2)
1201 emit_move_insn (temp2, target);
1202
1203 seq = get_insns ();
1204 end_sequence ();
1205
1206 emit_insns_before (seq, temp4);
1207 delete_insn (temp);
1208
1209 if (init_insn)
1210 delete_insn (init_insn);
1211
1212 next = NEXT_INSN (insn);
1213 #ifdef HAVE_cc0
1214 delete_insn (prev_nonnote_insn (insn));
1215 #endif
1216 delete_insn (insn);
1217
1218 if (after_regscan)
1219 {
1220 reg_scan_update (seq, NEXT_INSN (next), old_max_reg);
1221 old_max_reg = max_reg_num ();
1222 }
1223
1224 changed = 1;
1225 continue;
1226 }
1227 else
1228 end_sequence ();
1229 }
1230
1231 /* Try to use a conditional move (if the target has them), or a
1232 store-flag insn. If the target has conditional arithmetic as
1233 well as conditional move, the above code will have done something.
1234 Note that we prefer the above code since it is more general: the
1235 code below can make changes that require work to undo.
1236
1237 The general case here is:
1238
1239 1) x = a; if (...) x = b; and
1240 2) if (...) x = b;
1241
1242 If the jump would be faster, the machine should not have defined
1243 the movcc or scc insns!. These cases are often made by the
1244 previous optimization.
1245
1246 The second case is treated as x = x; if (...) x = b;.
1247
1248 INSN here is the jump around the store. We set:
1249
1250 TEMP to the "x op= b;" insn.
1251 TEMP1 to X.
1252 TEMP2 to B.
1253 TEMP3 to A (X in the second case).
1254 TEMP4 to the condition being tested.
1255 TEMP5 to the earliest insn used to find the condition.
1256 TEMP6 to the SET of TEMP. */
1257
1258 if (/* We can't do this after reload has completed. */
1259 ! reload_completed
1260 #ifdef HAVE_conditional_arithmetic
1261 /* Defer this until after CSE so the above code gets the
1262 first crack at it. */
1263 && cse_not_expected
1264 #endif
1265 && this_is_condjump && ! this_is_simplejump
1266 /* Set TEMP to the "x = b;" insn. */
1267 && (temp = next_nonnote_insn (insn)) != 0
1268 && GET_CODE (temp) == INSN
1269 && (temp6 = single_set (temp)) != NULL_RTX
1270 && GET_CODE (temp1 = SET_DEST (temp6)) == REG
1271 && (! SMALL_REGISTER_CLASSES
1272 || REGNO (temp1) >= FIRST_PSEUDO_REGISTER)
1273 && ! side_effects_p (temp2 = SET_SRC (temp6))
1274 && ! may_trap_p (temp2)
1275 /* Allow either form, but prefer the former if both apply.
1276 There is no point in using the old value of TEMP1 if
1277 it is a register, since cse will alias them. It can
1278 lose if the old value were a hard register since CSE
1279 won't replace hard registers. Avoid using TEMP3 if
1280 small register classes and it is a hard register. */
1281 && (((temp3 = reg_set_last (temp1, insn)) != 0
1282 && ! (SMALL_REGISTER_CLASSES && GET_CODE (temp3) == REG
1283 && REGNO (temp3) < FIRST_PSEUDO_REGISTER))
1284 /* Make the latter case look like x = x; if (...) x = b; */
1285 || (temp3 = temp1, 1))
1286 /* INSN must either branch to the insn after TEMP or the insn
1287 after TEMP must branch to the same place as INSN. */
1288 && (reallabelprev == temp
1289 || ((temp4 = next_active_insn (temp)) != 0
1290 && simplejump_p (temp4)
1291 && JUMP_LABEL (temp4) == JUMP_LABEL (insn)))
1292 && (temp4 = get_condition (insn, &temp5)) != 0
1293 /* We must be comparing objects whose modes imply the size.
1294 We could handle BLKmode if (1) emit_store_flag could
1295 and (2) we could find the size reliably. */
1296 && GET_MODE (XEXP (temp4, 0)) != BLKmode
1297 /* Even if branches are cheap, the store_flag optimization
1298 can win when the operation to be performed can be
1299 expressed directly. */
1300 #ifdef HAVE_cc0
1301 /* If the previous insn sets CC0 and something else, we can't
1302 do this since we are going to delete that insn. */
1303
1304 && ! ((temp6 = prev_nonnote_insn (insn)) != 0
1305 && GET_CODE (temp6) == INSN
1306 && (sets_cc0_p (PATTERN (temp6)) == -1
1307 || (sets_cc0_p (PATTERN (temp6)) == 1
1308 && FIND_REG_INC_NOTE (temp6, NULL_RTX))))
1309 #endif
1310 )
1311 {
1312 #ifdef HAVE_conditional_move
1313 /* First try a conditional move. */
1314 {
1315 enum rtx_code code = GET_CODE (temp4);
1316 rtx var = temp1;
1317 rtx cond0, cond1, aval, bval;
1318 rtx target, new_insn;
1319
1320 /* Copy the compared variables into cond0 and cond1, so that
1321 any side effects performed in or after the old comparison,
1322 will not affect our compare which will come later. */
1323 /* ??? Is it possible to just use the comparison in the jump
1324 insn? After all, we're going to delete it. We'd have
1325 to modify emit_conditional_move to take a comparison rtx
1326 instead or write a new function. */
1327 cond0 = gen_reg_rtx (GET_MODE (XEXP (temp4, 0)));
1328 /* We want the target to be able to simplify comparisons with
1329 zero (and maybe other constants as well), so don't create
1330 pseudos for them. There's no need to either. */
1331 if (GET_CODE (XEXP (temp4, 1)) == CONST_INT
1332 || GET_CODE (XEXP (temp4, 1)) == CONST_DOUBLE)
1333 cond1 = XEXP (temp4, 1);
1334 else
1335 cond1 = gen_reg_rtx (GET_MODE (XEXP (temp4, 1)));
1336
1337 /* Careful about copying these values -- an IOR or what may
1338 need to do other things, like clobber flags. */
1339 /* ??? Assume for the moment that AVAL is ok. */
1340 aval = temp3;
1341
1342 start_sequence ();
1343
1344 /* We're dealing with a single_set insn with no side effects
1345 on SET_SRC. We do need to be reasonably certain that if
1346 we need to force BVAL into a register that we won't
1347 clobber the flags -- general_operand should suffice. */
1348 if (general_operand (temp2, GET_MODE (var)))
1349 bval = temp2;
1350 else
1351 {
1352 bval = gen_reg_rtx (GET_MODE (var));
1353 new_insn = copy_rtx (temp);
1354 temp6 = single_set (new_insn);
1355 SET_DEST (temp6) = bval;
1356 emit_insn (PATTERN (new_insn));
1357 }
1358
1359 target = emit_conditional_move (var, code,
1360 cond0, cond1, VOIDmode,
1361 aval, bval, GET_MODE (var),
1362 (code == LTU || code == GEU
1363 || code == LEU || code == GTU));
1364
1365 if (target)
1366 {
1367 rtx seq1, seq2, last;
1368 int copy_ok;
1369
1370 /* Save the conditional move sequence but don't emit it
1371 yet. On some machines, like the alpha, it is possible
1372 that temp5 == insn, so next generate the sequence that
1373 saves the compared values and then emit both
1374 sequences ensuring seq1 occurs before seq2. */
1375 seq2 = get_insns ();
1376 end_sequence ();
1377
1378 /* "Now that we can't fail..." Famous last words.
1379 Generate the copy insns that preserve the compared
1380 values. */
1381 start_sequence ();
1382 emit_move_insn (cond0, XEXP (temp4, 0));
1383 if (cond1 != XEXP (temp4, 1))
1384 emit_move_insn (cond1, XEXP (temp4, 1));
1385 seq1 = get_insns ();
1386 end_sequence ();
1387
1388 /* Validate the sequence -- this may be some weird
1389 bit-extract-and-test instruction for which there
1390 exists no complimentary bit-extract insn. */
1391 copy_ok = 1;
1392 for (last = seq1; last ; last = NEXT_INSN (last))
1393 if (recog_memoized (last) < 0)
1394 {
1395 copy_ok = 0;
1396 break;
1397 }
1398
1399 if (copy_ok)
1400 {
1401 emit_insns_before (seq1, temp5);
1402
1403 /* Insert conditional move after insn, to be sure
1404 that the jump and a possible compare won't be
1405 separated. */
1406 last = emit_insns_after (seq2, insn);
1407
1408 /* ??? We can also delete the insn that sets X to A.
1409 Flow will do it too though. */
1410 delete_insn (temp);
1411 next = NEXT_INSN (insn);
1412 delete_jump (insn);
1413
1414 if (after_regscan)
1415 {
1416 reg_scan_update (seq1, NEXT_INSN (last),
1417 old_max_reg);
1418 old_max_reg = max_reg_num ();
1419 }
1420
1421 changed = 1;
1422 continue;
1423 }
1424 }
1425 else
1426 end_sequence ();
1427 }
1428 #endif
1429
1430 /* That didn't work, try a store-flag insn.
1431
1432 We further divide the cases into:
1433
1434 1) x = a; if (...) x = b; and either A or B is zero,
1435 2) if (...) x = 0; and jumps are expensive,
1436 3) x = a; if (...) x = b; and A and B are constants where all
1437 the set bits in A are also set in B and jumps are expensive,
1438 4) x = a; if (...) x = b; and A and B non-zero, and jumps are
1439 more expensive, and
1440 5) if (...) x = b; if jumps are even more expensive. */
1441
1442 if (GET_MODE_CLASS (GET_MODE (temp1)) == MODE_INT
1443 /* We will be passing this as operand into expand_and. No
1444 good if it's not valid as an operand. */
1445 && general_operand (temp2, GET_MODE (temp2))
1446 && ((GET_CODE (temp3) == CONST_INT)
1447 /* Make the latter case look like
1448 x = x; if (...) x = 0; */
1449 || (temp3 = temp1,
1450 ((BRANCH_COST >= 2
1451 && temp2 == const0_rtx)
1452 || BRANCH_COST >= 3)))
1453 /* If B is zero, OK; if A is zero, can only do (1) if we
1454 can reverse the condition. See if (3) applies possibly
1455 by reversing the condition. Prefer reversing to (4) when
1456 branches are very expensive. */
1457 && (((BRANCH_COST >= 2
1458 || STORE_FLAG_VALUE == -1
1459 || (STORE_FLAG_VALUE == 1
1460 /* Check that the mask is a power of two,
1461 so that it can probably be generated
1462 with a shift. */
1463 && GET_CODE (temp3) == CONST_INT
1464 && exact_log2 (INTVAL (temp3)) >= 0))
1465 && (reversep = 0, temp2 == const0_rtx))
1466 || ((BRANCH_COST >= 2
1467 || STORE_FLAG_VALUE == -1
1468 || (STORE_FLAG_VALUE == 1
1469 && GET_CODE (temp2) == CONST_INT
1470 && exact_log2 (INTVAL (temp2)) >= 0))
1471 && temp3 == const0_rtx
1472 && (reversep = can_reverse_comparison_p (temp4, insn)))
1473 || (BRANCH_COST >= 2
1474 && GET_CODE (temp2) == CONST_INT
1475 && GET_CODE (temp3) == CONST_INT
1476 && ((INTVAL (temp2) & INTVAL (temp3)) == INTVAL (temp2)
1477 || ((INTVAL (temp2) & INTVAL (temp3)) == INTVAL (temp3)
1478 && (reversep = can_reverse_comparison_p (temp4,
1479 insn)))))
1480 || BRANCH_COST >= 3)
1481 )
1482 {
1483 enum rtx_code code = GET_CODE (temp4);
1484 rtx uval, cval, var = temp1;
1485 int normalizep;
1486 rtx target;
1487
1488 /* If necessary, reverse the condition. */
1489 if (reversep)
1490 code = reverse_condition (code), uval = temp2, cval = temp3;
1491 else
1492 uval = temp3, cval = temp2;
1493
1494 /* If CVAL is non-zero, normalize to -1. Otherwise, if UVAL
1495 is the constant 1, it is best to just compute the result
1496 directly. If UVAL is constant and STORE_FLAG_VALUE
1497 includes all of its bits, it is best to compute the flag
1498 value unnormalized and `and' it with UVAL. Otherwise,
1499 normalize to -1 and `and' with UVAL. */
1500 normalizep = (cval != const0_rtx ? -1
1501 : (uval == const1_rtx ? 1
1502 : (GET_CODE (uval) == CONST_INT
1503 && (INTVAL (uval) & ~STORE_FLAG_VALUE) == 0)
1504 ? 0 : -1));
1505
1506 /* We will be putting the store-flag insn immediately in
1507 front of the comparison that was originally being done,
1508 so we know all the variables in TEMP4 will be valid.
1509 However, this might be in front of the assignment of
1510 A to VAR. If it is, it would clobber the store-flag
1511 we will be emitting.
1512
1513 Therefore, emit into a temporary which will be copied to
1514 VAR immediately after TEMP. */
1515
1516 start_sequence ();
1517 target = emit_store_flag (gen_reg_rtx (GET_MODE (var)), code,
1518 XEXP (temp4, 0), XEXP (temp4, 1),
1519 VOIDmode,
1520 (code == LTU || code == LEU
1521 || code == GEU || code == GTU),
1522 normalizep);
1523 if (target)
1524 {
1525 rtx seq;
1526 rtx before = insn;
1527
1528 seq = get_insns ();
1529 end_sequence ();
1530
1531 /* Put the store-flag insns in front of the first insn
1532 used to compute the condition to ensure that we
1533 use the same values of them as the current
1534 comparison. However, the remainder of the insns we
1535 generate will be placed directly in front of the
1536 jump insn, in case any of the pseudos we use
1537 are modified earlier. */
1538
1539 emit_insns_before (seq, temp5);
1540
1541 start_sequence ();
1542
1543 /* Both CVAL and UVAL are non-zero. */
1544 if (cval != const0_rtx && uval != const0_rtx)
1545 {
1546 rtx tem1, tem2;
1547
1548 tem1 = expand_and (uval, target, NULL_RTX);
1549 if (GET_CODE (cval) == CONST_INT
1550 && GET_CODE (uval) == CONST_INT
1551 && (INTVAL (cval) & INTVAL (uval)) == INTVAL (cval))
1552 tem2 = cval;
1553 else
1554 {
1555 tem2 = expand_unop (GET_MODE (var), one_cmpl_optab,
1556 target, NULL_RTX, 0);
1557 tem2 = expand_and (cval, tem2,
1558 (GET_CODE (tem2) == REG
1559 ? tem2 : 0));
1560 }
1561
1562 /* If we usually make new pseudos, do so here. This
1563 turns out to help machines that have conditional
1564 move insns. */
1565 /* ??? Conditional moves have already been handled.
1566 This may be obsolete. */
1567
1568 if (flag_expensive_optimizations)
1569 target = 0;
1570
1571 target = expand_binop (GET_MODE (var), ior_optab,
1572 tem1, tem2, target,
1573 1, OPTAB_WIDEN);
1574 }
1575 else if (normalizep != 1)
1576 {
1577 /* We know that either CVAL or UVAL is zero. If
1578 UVAL is zero, negate TARGET and `and' with CVAL.
1579 Otherwise, `and' with UVAL. */
1580 if (uval == const0_rtx)
1581 {
1582 target = expand_unop (GET_MODE (var), one_cmpl_optab,
1583 target, NULL_RTX, 0);
1584 uval = cval;
1585 }
1586
1587 target = expand_and (uval, target,
1588 (GET_CODE (target) == REG
1589 && ! preserve_subexpressions_p ()
1590 ? target : NULL_RTX));
1591 }
1592
1593 emit_move_insn (var, target);
1594 seq = get_insns ();
1595 end_sequence ();
1596 #ifdef HAVE_cc0
1597 /* If INSN uses CC0, we must not separate it from the
1598 insn that sets cc0. */
1599 if (reg_mentioned_p (cc0_rtx, PATTERN (before)))
1600 before = prev_nonnote_insn (before);
1601 #endif
1602 emit_insns_before (seq, before);
1603
1604 delete_insn (temp);
1605 next = NEXT_INSN (insn);
1606 delete_jump (insn);
1607
1608 if (after_regscan)
1609 {
1610 reg_scan_update (seq, NEXT_INSN (next), old_max_reg);
1611 old_max_reg = max_reg_num ();
1612 }
1613
1614 changed = 1;
1615 continue;
1616 }
1617 else
1618 end_sequence ();
1619 }
1620 }
1621
1622
1623 /* Simplify if (...) x = 1; else {...} if (x) ...
1624 We recognize this case scanning backwards as well.
1625
1626 TEMP is the assignment to x;
1627 TEMP1 is the label at the head of the second if. */
1628 /* ?? This should call get_condition to find the values being
1629 compared, instead of looking for a COMPARE insn when HAVE_cc0
1630 is not defined. This would allow it to work on the m88k. */
1631 /* ?? This optimization is only safe before cse is run if HAVE_cc0
1632 is not defined and the condition is tested by a separate compare
1633 insn. This is because the code below assumes that the result
1634 of the compare dies in the following branch.
1635
1636 Not only that, but there might be other insns between the
1637 compare and branch whose results are live. Those insns need
1638 to be executed.
1639
1640 A way to fix this is to move the insns at JUMP_LABEL (insn)
1641 to before INSN. If we are running before flow, they will
1642 be deleted if they aren't needed. But this doesn't work
1643 well after flow.
1644
1645 This is really a special-case of jump threading, anyway. The
1646 right thing to do is to replace this and jump threading with
1647 much simpler code in cse.
1648
1649 This code has been turned off in the non-cc0 case in the
1650 meantime. */
1651
1652 #ifdef HAVE_cc0
1653 else if (this_is_simplejump
1654 /* Safe to skip USE and CLOBBER insns here
1655 since they will not be deleted. */
1656 && (temp = prev_active_insn (insn))
1657 && no_labels_between_p (temp, insn)
1658 && GET_CODE (temp) == INSN
1659 && GET_CODE (PATTERN (temp)) == SET
1660 && GET_CODE (SET_DEST (PATTERN (temp))) == REG
1661 && CONSTANT_P (SET_SRC (PATTERN (temp)))
1662 && (temp1 = next_active_insn (JUMP_LABEL (insn)))
1663 /* If we find that the next value tested is `x'
1664 (TEMP1 is the insn where this happens), win. */
1665 && GET_CODE (temp1) == INSN
1666 && GET_CODE (PATTERN (temp1)) == SET
1667 #ifdef HAVE_cc0
1668 /* Does temp1 `tst' the value of x? */
1669 && SET_SRC (PATTERN (temp1)) == SET_DEST (PATTERN (temp))
1670 && SET_DEST (PATTERN (temp1)) == cc0_rtx
1671 && (temp1 = next_nonnote_insn (temp1))
1672 #else
1673 /* Does temp1 compare the value of x against zero? */
1674 && GET_CODE (SET_SRC (PATTERN (temp1))) == COMPARE
1675 && XEXP (SET_SRC (PATTERN (temp1)), 1) == const0_rtx
1676 && (XEXP (SET_SRC (PATTERN (temp1)), 0)
1677 == SET_DEST (PATTERN (temp)))
1678 && GET_CODE (SET_DEST (PATTERN (temp1))) == REG
1679 && (temp1 = find_next_ref (SET_DEST (PATTERN (temp1)), temp1))
1680 #endif
1681 && condjump_p (temp1))
1682 {
1683 /* Get the if_then_else from the condjump. */
1684 rtx choice = SET_SRC (PATTERN (temp1));
1685 if (GET_CODE (choice) == IF_THEN_ELSE)
1686 {
1687 enum rtx_code code = GET_CODE (XEXP (choice, 0));
1688 rtx val = SET_SRC (PATTERN (temp));
1689 rtx cond
1690 = simplify_relational_operation (code, GET_MODE (SET_DEST (PATTERN (temp))),
1691 val, const0_rtx);
1692 rtx ultimate;
1693
1694 if (cond == const_true_rtx)
1695 ultimate = XEXP (choice, 1);
1696 else if (cond == const0_rtx)
1697 ultimate = XEXP (choice, 2);
1698 else
1699 ultimate = 0;
1700
1701 if (ultimate == pc_rtx)
1702 ultimate = get_label_after (temp1);
1703 else if (ultimate && GET_CODE (ultimate) != RETURN)
1704 ultimate = XEXP (ultimate, 0);
1705
1706 if (ultimate && JUMP_LABEL(insn) != ultimate)
1707 changed |= redirect_jump (insn, ultimate);
1708 }
1709 }
1710 #endif
1711
1712 #if 0
1713 /* @@ This needs a bit of work before it will be right.
1714
1715 Any type of comparison can be accepted for the first and
1716 second compare. When rewriting the first jump, we must
1717 compute the what conditions can reach label3, and use the
1718 appropriate code. We can not simply reverse/swap the code
1719 of the first jump. In some cases, the second jump must be
1720 rewritten also.
1721
1722 For example,
1723 < == converts to > ==
1724 < != converts to == >
1725 etc.
1726
1727 If the code is written to only accept an '==' test for the second
1728 compare, then all that needs to be done is to swap the condition
1729 of the first branch.
1730
1731 It is questionable whether we want this optimization anyways,
1732 since if the user wrote code like this because he/she knew that
1733 the jump to label1 is taken most of the time, then rewriting
1734 this gives slower code. */
1735 /* @@ This should call get_condition to find the values being
1736 compared, instead of looking for a COMPARE insn when HAVE_cc0
1737 is not defined. This would allow it to work on the m88k. */
1738 /* @@ This optimization is only safe before cse is run if HAVE_cc0
1739 is not defined and the condition is tested by a separate compare
1740 insn. This is because the code below assumes that the result
1741 of the compare dies in the following branch. */
1742
1743 /* Simplify test a ~= b
1744 condjump label1;
1745 test a == b
1746 condjump label2;
1747 jump label3;
1748 label1:
1749
1750 rewriting as
1751 test a ~~= b
1752 condjump label3
1753 test a == b
1754 condjump label2
1755 label1:
1756
1757 where ~= is an inequality, e.g. >, and ~~= is the swapped
1758 inequality, e.g. <.
1759
1760 We recognize this case scanning backwards.
1761
1762 TEMP is the conditional jump to `label2';
1763 TEMP1 is the test for `a == b';
1764 TEMP2 is the conditional jump to `label1';
1765 TEMP3 is the test for `a ~= b'. */
1766 else if (this_is_simplejump
1767 && (temp = prev_active_insn (insn))
1768 && no_labels_between_p (temp, insn)
1769 && condjump_p (temp)
1770 && (temp1 = prev_active_insn (temp))
1771 && no_labels_between_p (temp1, temp)
1772 && GET_CODE (temp1) == INSN
1773 && GET_CODE (PATTERN (temp1)) == SET
1774 #ifdef HAVE_cc0
1775 && sets_cc0_p (PATTERN (temp1)) == 1
1776 #else
1777 && GET_CODE (SET_SRC (PATTERN (temp1))) == COMPARE
1778 && GET_CODE (SET_DEST (PATTERN (temp1))) == REG
1779 && (temp == find_next_ref (SET_DEST (PATTERN (temp1)), temp1))
1780 #endif
1781 && (temp2 = prev_active_insn (temp1))
1782 && no_labels_between_p (temp2, temp1)
1783 && condjump_p (temp2)
1784 && JUMP_LABEL (temp2) == next_nonnote_insn (NEXT_INSN (insn))
1785 && (temp3 = prev_active_insn (temp2))
1786 && no_labels_between_p (temp3, temp2)
1787 && GET_CODE (PATTERN (temp3)) == SET
1788 && rtx_equal_p (SET_DEST (PATTERN (temp3)),
1789 SET_DEST (PATTERN (temp1)))
1790 && rtx_equal_p (SET_SRC (PATTERN (temp1)),
1791 SET_SRC (PATTERN (temp3)))
1792 && ! inequality_comparisons_p (PATTERN (temp))
1793 && inequality_comparisons_p (PATTERN (temp2)))
1794 {
1795 rtx fallthrough_label = JUMP_LABEL (temp2);
1796
1797 ++LABEL_NUSES (fallthrough_label);
1798 if (swap_jump (temp2, JUMP_LABEL (insn)))
1799 {
1800 delete_insn (insn);
1801 changed = 1;
1802 }
1803
1804 if (--LABEL_NUSES (fallthrough_label) == 0)
1805 delete_insn (fallthrough_label);
1806 }
1807 #endif
1808 /* Simplify if (...) {... x = 1;} if (x) ...
1809
1810 We recognize this case backwards.
1811
1812 TEMP is the test of `x';
1813 TEMP1 is the assignment to `x' at the end of the
1814 previous statement. */
1815 /* @@ This should call get_condition to find the values being
1816 compared, instead of looking for a COMPARE insn when HAVE_cc0
1817 is not defined. This would allow it to work on the m88k. */
1818 /* @@ This optimization is only safe before cse is run if HAVE_cc0
1819 is not defined and the condition is tested by a separate compare
1820 insn. This is because the code below assumes that the result
1821 of the compare dies in the following branch. */
1822
1823 /* ??? This has to be turned off. The problem is that the
1824 unconditional jump might indirectly end up branching to the
1825 label between TEMP1 and TEMP. We can't detect this, in general,
1826 since it may become a jump to there after further optimizations.
1827 If that jump is done, it will be deleted, so we will retry
1828 this optimization in the next pass, thus an infinite loop.
1829
1830 The present code prevents this by putting the jump after the
1831 label, but this is not logically correct. */
1832 #if 0
1833 else if (this_is_condjump
1834 /* Safe to skip USE and CLOBBER insns here
1835 since they will not be deleted. */
1836 && (temp = prev_active_insn (insn))
1837 && no_labels_between_p (temp, insn)
1838 && GET_CODE (temp) == INSN
1839 && GET_CODE (PATTERN (temp)) == SET
1840 #ifdef HAVE_cc0
1841 && sets_cc0_p (PATTERN (temp)) == 1
1842 && GET_CODE (SET_SRC (PATTERN (temp))) == REG
1843 #else
1844 /* Temp must be a compare insn, we can not accept a register
1845 to register move here, since it may not be simply a
1846 tst insn. */
1847 && GET_CODE (SET_SRC (PATTERN (temp))) == COMPARE
1848 && XEXP (SET_SRC (PATTERN (temp)), 1) == const0_rtx
1849 && GET_CODE (XEXP (SET_SRC (PATTERN (temp)), 0)) == REG
1850 && GET_CODE (SET_DEST (PATTERN (temp))) == REG
1851 && insn == find_next_ref (SET_DEST (PATTERN (temp)), temp)
1852 #endif
1853 /* May skip USE or CLOBBER insns here
1854 for checking for opportunity, since we
1855 take care of them later. */
1856 && (temp1 = prev_active_insn (temp))
1857 && GET_CODE (temp1) == INSN
1858 && GET_CODE (PATTERN (temp1)) == SET
1859 #ifdef HAVE_cc0
1860 && SET_SRC (PATTERN (temp)) == SET_DEST (PATTERN (temp1))
1861 #else
1862 && (XEXP (SET_SRC (PATTERN (temp)), 0)
1863 == SET_DEST (PATTERN (temp1)))
1864 #endif
1865 && CONSTANT_P (SET_SRC (PATTERN (temp1)))
1866 /* If this isn't true, cse will do the job. */
1867 && ! no_labels_between_p (temp1, temp))
1868 {
1869 /* Get the if_then_else from the condjump. */
1870 rtx choice = SET_SRC (PATTERN (insn));
1871 if (GET_CODE (choice) == IF_THEN_ELSE
1872 && (GET_CODE (XEXP (choice, 0)) == EQ
1873 || GET_CODE (XEXP (choice, 0)) == NE))
1874 {
1875 int want_nonzero = (GET_CODE (XEXP (choice, 0)) == NE);
1876 rtx last_insn;
1877 rtx ultimate;
1878 rtx p;
1879
1880 /* Get the place that condjump will jump to
1881 if it is reached from here. */
1882 if ((SET_SRC (PATTERN (temp1)) != const0_rtx)
1883 == want_nonzero)
1884 ultimate = XEXP (choice, 1);
1885 else
1886 ultimate = XEXP (choice, 2);
1887 /* Get it as a CODE_LABEL. */
1888 if (ultimate == pc_rtx)
1889 ultimate = get_label_after (insn);
1890 else
1891 /* Get the label out of the LABEL_REF. */
1892 ultimate = XEXP (ultimate, 0);
1893
1894 /* Insert the jump immediately before TEMP, specifically
1895 after the label that is between TEMP1 and TEMP. */
1896 last_insn = PREV_INSN (temp);
1897
1898 /* If we would be branching to the next insn, the jump
1899 would immediately be deleted and the re-inserted in
1900 a subsequent pass over the code. So don't do anything
1901 in that case. */
1902 if (next_active_insn (last_insn)
1903 != next_active_insn (ultimate))
1904 {
1905 emit_barrier_after (last_insn);
1906 p = emit_jump_insn_after (gen_jump (ultimate),
1907 last_insn);
1908 JUMP_LABEL (p) = ultimate;
1909 ++LABEL_NUSES (ultimate);
1910 if (INSN_UID (ultimate) < max_jump_chain
1911 && INSN_CODE (p) < max_jump_chain)
1912 {
1913 jump_chain[INSN_UID (p)]
1914 = jump_chain[INSN_UID (ultimate)];
1915 jump_chain[INSN_UID (ultimate)] = p;
1916 }
1917 changed = 1;
1918 continue;
1919 }
1920 }
1921 }
1922 #endif
1923 #ifdef HAVE_trap
1924 /* Detect a conditional jump jumping over an unconditional trap. */
1925 else if (HAVE_trap
1926 && this_is_condjump && ! this_is_simplejump
1927 && reallabelprev != 0
1928 && GET_CODE (reallabelprev) == INSN
1929 && GET_CODE (PATTERN (reallabelprev)) == TRAP_IF
1930 && TRAP_CONDITION (PATTERN (reallabelprev)) == const_true_rtx
1931 && prev_active_insn (reallabelprev) == insn
1932 && no_labels_between_p (insn, reallabelprev)
1933 && (temp2 = get_condition (insn, &temp4))
1934 && can_reverse_comparison_p (temp2, insn))
1935 {
1936 rtx new = gen_cond_trap (reverse_condition (GET_CODE (temp2)),
1937 XEXP (temp2, 0), XEXP (temp2, 1),
1938 TRAP_CODE (PATTERN (reallabelprev)));
1939
1940 if (new)
1941 {
1942 emit_insn_before (new, temp4);
1943 delete_insn (reallabelprev);
1944 delete_jump (insn);
1945 changed = 1;
1946 continue;
1947 }
1948 }
1949 /* Detect a jump jumping to an unconditional trap. */
1950 else if (HAVE_trap && this_is_condjump
1951 && (temp = next_active_insn (JUMP_LABEL (insn)))
1952 && GET_CODE (temp) == INSN
1953 && GET_CODE (PATTERN (temp)) == TRAP_IF
1954 && (this_is_simplejump
1955 || (temp2 = get_condition (insn, &temp4))))
1956 {
1957 rtx tc = TRAP_CONDITION (PATTERN (temp));
1958
1959 if (tc == const_true_rtx
1960 || (! this_is_simplejump && rtx_equal_p (temp2, tc)))
1961 {
1962 rtx new;
1963 /* Replace an unconditional jump to a trap with a trap. */
1964 if (this_is_simplejump)
1965 {
1966 emit_barrier_after (emit_insn_before (gen_trap (), insn));
1967 delete_jump (insn);
1968 changed = 1;
1969 continue;
1970 }
1971 new = gen_cond_trap (GET_CODE (temp2), XEXP (temp2, 0),
1972 XEXP (temp2, 1),
1973 TRAP_CODE (PATTERN (temp)));
1974 if (new)
1975 {
1976 emit_insn_before (new, temp4);
1977 delete_jump (insn);
1978 changed = 1;
1979 continue;
1980 }
1981 }
1982 /* If the trap condition and jump condition are mutually
1983 exclusive, redirect the jump to the following insn. */
1984 else if (GET_RTX_CLASS (GET_CODE (tc)) == '<'
1985 && ! this_is_simplejump
1986 && swap_condition (GET_CODE (temp2)) == GET_CODE (tc)
1987 && rtx_equal_p (XEXP (tc, 0), XEXP (temp2, 0))
1988 && rtx_equal_p (XEXP (tc, 1), XEXP (temp2, 1))
1989 && redirect_jump (insn, get_label_after (temp)))
1990 {
1991 changed = 1;
1992 continue;
1993 }
1994 }
1995 #endif
1996 else
1997 {
1998 /* Look for if (foo) bar; else break; */
1999 /* The insns look like this:
2000 insn = condjump label1;
2001 ...range1 (some insns)...
2002 jump label2;
2003 label1:
2004 ...range2 (some insns)...
2005 jump somewhere unconditionally
2006 label2: */
2007 {
2008 rtx label1 = next_label (insn);
2009 rtx range1end = label1 ? prev_active_insn (label1) : 0;
2010 /* Don't do this optimization on the first round, so that
2011 jump-around-a-jump gets simplified before we ask here
2012 whether a jump is unconditional.
2013
2014 Also don't do it when we are called after reload since
2015 it will confuse reorg. */
2016 if (! first
2017 && (reload_completed ? ! flag_delayed_branch : 1)
2018 /* Make sure INSN is something we can invert. */
2019 && condjump_p (insn)
2020 && label1 != 0
2021 && JUMP_LABEL (insn) == label1
2022 && LABEL_NUSES (label1) == 1
2023 && GET_CODE (range1end) == JUMP_INSN
2024 && simplejump_p (range1end))
2025 {
2026 rtx label2 = next_label (label1);
2027 rtx range2end = label2 ? prev_active_insn (label2) : 0;
2028 if (range1end != range2end
2029 && JUMP_LABEL (range1end) == label2
2030 && GET_CODE (range2end) == JUMP_INSN
2031 && GET_CODE (NEXT_INSN (range2end)) == BARRIER
2032 /* Invert the jump condition, so we
2033 still execute the same insns in each case. */
2034 && invert_jump (insn, label1))
2035 {
2036 rtx range1beg = next_active_insn (insn);
2037 rtx range2beg = next_active_insn (label1);
2038 rtx range1after, range2after;
2039 rtx range1before, range2before;
2040 rtx rangenext;
2041
2042 /* Include in each range any notes before it, to be
2043 sure that we get the line number note if any, even
2044 if there are other notes here. */
2045 while (PREV_INSN (range1beg)
2046 && GET_CODE (PREV_INSN (range1beg)) == NOTE)
2047 range1beg = PREV_INSN (range1beg);
2048
2049 while (PREV_INSN (range2beg)
2050 && GET_CODE (PREV_INSN (range2beg)) == NOTE)
2051 range2beg = PREV_INSN (range2beg);
2052
2053 /* Don't move NOTEs for blocks or loops; shift them
2054 outside the ranges, where they'll stay put. */
2055 range1beg = squeeze_notes (range1beg, range1end);
2056 range2beg = squeeze_notes (range2beg, range2end);
2057
2058 /* Get current surrounds of the 2 ranges. */
2059 range1before = PREV_INSN (range1beg);
2060 range2before = PREV_INSN (range2beg);
2061 range1after = NEXT_INSN (range1end);
2062 range2after = NEXT_INSN (range2end);
2063
2064 /* Splice range2 where range1 was. */
2065 NEXT_INSN (range1before) = range2beg;
2066 PREV_INSN (range2beg) = range1before;
2067 NEXT_INSN (range2end) = range1after;
2068 PREV_INSN (range1after) = range2end;
2069 /* Splice range1 where range2 was. */
2070 NEXT_INSN (range2before) = range1beg;
2071 PREV_INSN (range1beg) = range2before;
2072 NEXT_INSN (range1end) = range2after;
2073 PREV_INSN (range2after) = range1end;
2074
2075 /* Check for loop notes between the end of
2076 range2, and the next code label. If there is one,
2077 then what we have really seen is
2078 if (foo) break; end_of_loop;
2079 and moved the break sequence outside the loop.
2080 We must move LOOP_END, LOOP_VTOP and LOOP_CONT
2081 notes (in order) to where the loop really ends now,
2082 or we will confuse loop optimization. Stop if we
2083 find a LOOP_BEG note first, since we don't want to
2084 move the notes in that case. */
2085 for (;range2after != label2; range2after = rangenext)
2086 {
2087 rangenext = NEXT_INSN (range2after);
2088 if (GET_CODE (range2after) == NOTE)
2089 {
2090 int kind = NOTE_LINE_NUMBER (range2after);
2091 if (kind == NOTE_INSN_LOOP_END
2092 || kind == NOTE_INSN_LOOP_VTOP
2093 || kind == NOTE_INSN_LOOP_CONT)
2094 {
2095 NEXT_INSN (PREV_INSN (range2after))
2096 = rangenext;
2097 PREV_INSN (rangenext)
2098 = PREV_INSN (range2after);
2099 PREV_INSN (range2after)
2100 = PREV_INSN (range1beg);
2101 NEXT_INSN (range2after) = range1beg;
2102 NEXT_INSN (PREV_INSN (range1beg))
2103 = range2after;
2104 PREV_INSN (range1beg) = range2after;
2105 }
2106 else if (NOTE_LINE_NUMBER (range2after)
2107 == NOTE_INSN_LOOP_BEG)
2108 break;
2109 }
2110 }
2111 changed = 1;
2112 continue;
2113 }
2114 }
2115 }
2116
2117 /* Now that the jump has been tensioned,
2118 try cross jumping: check for identical code
2119 before the jump and before its target label. */
2120
2121 /* First, cross jumping of conditional jumps: */
2122
2123 if (cross_jump && condjump_p (insn))
2124 {
2125 rtx newjpos, newlpos;
2126 rtx x = prev_real_insn (JUMP_LABEL (insn));
2127
2128 /* A conditional jump may be crossjumped
2129 only if the place it jumps to follows
2130 an opposing jump that comes back here. */
2131
2132 if (x != 0 && ! jump_back_p (x, insn))
2133 /* We have no opposing jump;
2134 cannot cross jump this insn. */
2135 x = 0;
2136
2137 newjpos = 0;
2138 /* TARGET is nonzero if it is ok to cross jump
2139 to code before TARGET. If so, see if matches. */
2140 if (x != 0)
2141 find_cross_jump (insn, x, 2,
2142 &newjpos, &newlpos);
2143
2144 if (newjpos != 0)
2145 {
2146 do_cross_jump (insn, newjpos, newlpos);
2147 /* Make the old conditional jump
2148 into an unconditional one. */
2149 SET_SRC (PATTERN (insn))
2150 = gen_rtx_LABEL_REF (VOIDmode, JUMP_LABEL (insn));
2151 INSN_CODE (insn) = -1;
2152 emit_barrier_after (insn);
2153 /* Add to jump_chain unless this is a new label
2154 whose UID is too large. */
2155 if (INSN_UID (JUMP_LABEL (insn)) < max_jump_chain)
2156 {
2157 jump_chain[INSN_UID (insn)]
2158 = jump_chain[INSN_UID (JUMP_LABEL (insn))];
2159 jump_chain[INSN_UID (JUMP_LABEL (insn))] = insn;
2160 }
2161 changed = 1;
2162 next = insn;
2163 }
2164 }
2165
2166 /* Cross jumping of unconditional jumps:
2167 a few differences. */
2168
2169 if (cross_jump && simplejump_p (insn))
2170 {
2171 rtx newjpos, newlpos;
2172 rtx target;
2173
2174 newjpos = 0;
2175
2176 /* TARGET is nonzero if it is ok to cross jump
2177 to code before TARGET. If so, see if matches. */
2178 find_cross_jump (insn, JUMP_LABEL (insn), 1,
2179 &newjpos, &newlpos);
2180
2181 /* If cannot cross jump to code before the label,
2182 see if we can cross jump to another jump to
2183 the same label. */
2184 /* Try each other jump to this label. */
2185 if (INSN_UID (JUMP_LABEL (insn)) < max_uid)
2186 for (target = jump_chain[INSN_UID (JUMP_LABEL (insn))];
2187 target != 0 && newjpos == 0;
2188 target = jump_chain[INSN_UID (target)])
2189 if (target != insn
2190 && JUMP_LABEL (target) == JUMP_LABEL (insn)
2191 /* Ignore TARGET if it's deleted. */
2192 && ! INSN_DELETED_P (target))
2193 find_cross_jump (insn, target, 2,
2194 &newjpos, &newlpos);
2195
2196 if (newjpos != 0)
2197 {
2198 do_cross_jump (insn, newjpos, newlpos);
2199 changed = 1;
2200 next = insn;
2201 }
2202 }
2203
2204 /* This code was dead in the previous jump.c! */
2205 if (cross_jump && GET_CODE (PATTERN (insn)) == RETURN)
2206 {
2207 /* Return insns all "jump to the same place"
2208 so we can cross-jump between any two of them. */
2209
2210 rtx newjpos, newlpos, target;
2211
2212 newjpos = 0;
2213
2214 /* If cannot cross jump to code before the label,
2215 see if we can cross jump to another jump to
2216 the same label. */
2217 /* Try each other jump to this label. */
2218 for (target = jump_chain[0];
2219 target != 0 && newjpos == 0;
2220 target = jump_chain[INSN_UID (target)])
2221 if (target != insn
2222 && ! INSN_DELETED_P (target)
2223 && GET_CODE (PATTERN (target)) == RETURN)
2224 find_cross_jump (insn, target, 2,
2225 &newjpos, &newlpos);
2226
2227 if (newjpos != 0)
2228 {
2229 do_cross_jump (insn, newjpos, newlpos);
2230 changed = 1;
2231 next = insn;
2232 }
2233 }
2234 }
2235 }
2236
2237 first = 0;
2238 }
2239
2240 /* Delete extraneous line number notes.
2241 Note that two consecutive notes for different lines are not really
2242 extraneous. There should be some indication where that line belonged,
2243 even if it became empty. */
2244
2245 {
2246 rtx last_note = 0;
2247
2248 for (insn = f; insn; insn = NEXT_INSN (insn))
2249 if (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) >= 0)
2250 {
2251 /* Delete this note if it is identical to previous note. */
2252 if (last_note
2253 && NOTE_SOURCE_FILE (insn) == NOTE_SOURCE_FILE (last_note)
2254 && NOTE_LINE_NUMBER (insn) == NOTE_LINE_NUMBER (last_note))
2255 {
2256 delete_insn (insn);
2257 continue;
2258 }
2259
2260 last_note = insn;
2261 }
2262 }
2263
2264 #ifdef HAVE_return
2265 if (HAVE_return)
2266 {
2267 /* If we fall through to the epilogue, see if we can insert a RETURN insn
2268 in front of it. If the machine allows it at this point (we might be
2269 after reload for a leaf routine), it will improve optimization for it
2270 to be there. We do this both here and at the start of this pass since
2271 the RETURN might have been deleted by some of our optimizations. */
2272 insn = get_last_insn ();
2273 while (insn && GET_CODE (insn) == NOTE)
2274 insn = PREV_INSN (insn);
2275
2276 if (insn && GET_CODE (insn) != BARRIER)
2277 {
2278 emit_jump_insn (gen_return ());
2279 emit_barrier ();
2280 }
2281 }
2282 #endif
2283
2284 /* CAN_REACH_END is persistent for each function. Once set it should
2285 not be cleared. This is especially true for the case where we
2286 delete the NOTE_FUNCTION_END note. CAN_REACH_END is cleared by
2287 the front-end before compiling each function. */
2288 if (calculate_can_reach_end (last_insn, optimize != 0))
2289 can_reach_end = 1;
2290
2291 end:
2292 /* Clean up. */
2293 free (jump_chain);
2294 jump_chain = 0;
2295 }
2296 \f
2297 /* Initialize LABEL_NUSES and JUMP_LABEL fields. Delete any REG_LABEL
2298 notes whose labels don't occur in the insn any more. Returns the
2299 largest INSN_UID found. */
2300 static int
2301 init_label_info (f)
2302 rtx f;
2303 {
2304 int largest_uid = 0;
2305 rtx insn;
2306
2307 for (insn = f; insn; insn = NEXT_INSN (insn))
2308 {
2309 if (GET_CODE (insn) == CODE_LABEL)
2310 LABEL_NUSES (insn) = (LABEL_PRESERVE_P (insn) != 0);
2311 else if (GET_CODE (insn) == JUMP_INSN)
2312 JUMP_LABEL (insn) = 0;
2313 else if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
2314 {
2315 rtx note, next;
2316
2317 for (note = REG_NOTES (insn); note; note = next)
2318 {
2319 next = XEXP (note, 1);
2320 if (REG_NOTE_KIND (note) == REG_LABEL
2321 && ! reg_mentioned_p (XEXP (note, 0), PATTERN (insn)))
2322 remove_note (insn, note);
2323 }
2324 }
2325 if (INSN_UID (insn) > largest_uid)
2326 largest_uid = INSN_UID (insn);
2327 }
2328
2329 return largest_uid;
2330 }
2331
2332 /* Delete insns following barriers, up to next label.
2333
2334 Also delete no-op jumps created by gcse. */
2335 static void
2336 delete_barrier_successors (f)
2337 rtx f;
2338 {
2339 rtx insn;
2340
2341 for (insn = f; insn;)
2342 {
2343 if (GET_CODE (insn) == BARRIER)
2344 {
2345 insn = NEXT_INSN (insn);
2346
2347 never_reached_warning (insn);
2348
2349 while (insn != 0 && GET_CODE (insn) != CODE_LABEL)
2350 {
2351 if (GET_CODE (insn) == NOTE
2352 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_FUNCTION_END)
2353 insn = NEXT_INSN (insn);
2354 else
2355 insn = delete_insn (insn);
2356 }
2357 /* INSN is now the code_label. */
2358 }
2359 /* Also remove (set (pc) (pc)) insns which can be created by
2360 gcse. We eliminate such insns now to avoid having them
2361 cause problems later. */
2362 else if (GET_CODE (insn) == JUMP_INSN
2363 && GET_CODE (PATTERN (insn)) == SET
2364 && SET_SRC (PATTERN (insn)) == pc_rtx
2365 && SET_DEST (PATTERN (insn)) == pc_rtx)
2366 insn = delete_insn (insn);
2367
2368 else
2369 insn = NEXT_INSN (insn);
2370 }
2371 }
2372
2373 /* Mark the label each jump jumps to.
2374 Combine consecutive labels, and count uses of labels.
2375
2376 For each label, make a chain (using `jump_chain')
2377 of all the *unconditional* jumps that jump to it;
2378 also make a chain of all returns.
2379
2380 CROSS_JUMP indicates whether we are doing cross jumping
2381 and if we are whether we will be paying attention to
2382 death notes or not. */
2383
2384 static void
2385 mark_all_labels (f, cross_jump)
2386 rtx f;
2387 int cross_jump;
2388 {
2389 rtx insn;
2390
2391 for (insn = f; insn; insn = NEXT_INSN (insn))
2392 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
2393 {
2394 mark_jump_label (PATTERN (insn), insn, cross_jump);
2395 if (! INSN_DELETED_P (insn) && GET_CODE (insn) == JUMP_INSN)
2396 {
2397 if (JUMP_LABEL (insn) != 0 && simplejump_p (insn))
2398 {
2399 jump_chain[INSN_UID (insn)]
2400 = jump_chain[INSN_UID (JUMP_LABEL (insn))];
2401 jump_chain[INSN_UID (JUMP_LABEL (insn))] = insn;
2402 }
2403 if (GET_CODE (PATTERN (insn)) == RETURN)
2404 {
2405 jump_chain[INSN_UID (insn)] = jump_chain[0];
2406 jump_chain[0] = insn;
2407 }
2408 }
2409 }
2410 }
2411
2412 /* Delete all labels already not referenced.
2413 Also find and return the last insn. */
2414
2415 static rtx
2416 delete_unreferenced_labels (f)
2417 rtx f;
2418 {
2419 rtx final = NULL_RTX;
2420 rtx insn;
2421
2422 for (insn = f; insn; )
2423 {
2424 if (GET_CODE (insn) == CODE_LABEL
2425 && LABEL_NUSES (insn) == 0
2426 && LABEL_ALTERNATE_NAME (insn) == NULL)
2427 insn = delete_insn (insn);
2428 else
2429 {
2430 final = insn;
2431 insn = NEXT_INSN (insn);
2432 }
2433 }
2434
2435 return final;
2436 }
2437
2438 /* Delete various simple forms of moves which have no necessary
2439 side effect. */
2440
2441 static void
2442 delete_noop_moves (f)
2443 rtx f;
2444 {
2445 rtx insn, next;
2446
2447 for (insn = f; insn; )
2448 {
2449 next = NEXT_INSN (insn);
2450
2451 if (GET_CODE (insn) == INSN)
2452 {
2453 register rtx body = PATTERN (insn);
2454
2455 /* Combine stack_adjusts with following push_insns. */
2456 #ifdef PUSH_ROUNDING
2457 if (GET_CODE (body) == SET
2458 && SET_DEST (body) == stack_pointer_rtx
2459 && GET_CODE (SET_SRC (body)) == PLUS
2460 && XEXP (SET_SRC (body), 0) == stack_pointer_rtx
2461 && GET_CODE (XEXP (SET_SRC (body), 1)) == CONST_INT
2462 && INTVAL (XEXP (SET_SRC (body), 1)) > 0)
2463 {
2464 rtx p;
2465 rtx stack_adjust_insn = insn;
2466 int stack_adjust_amount = INTVAL (XEXP (SET_SRC (body), 1));
2467 int total_pushed = 0;
2468 int pushes = 0;
2469
2470 /* Find all successive push insns. */
2471 p = insn;
2472 /* Don't convert more than three pushes;
2473 that starts adding too many displaced addresses
2474 and the whole thing starts becoming a losing
2475 proposition. */
2476 while (pushes < 3)
2477 {
2478 rtx pbody, dest;
2479 p = next_nonnote_insn (p);
2480 if (p == 0 || GET_CODE (p) != INSN)
2481 break;
2482 pbody = PATTERN (p);
2483 if (GET_CODE (pbody) != SET)
2484 break;
2485 dest = SET_DEST (pbody);
2486 /* Allow a no-op move between the adjust and the push. */
2487 if (GET_CODE (dest) == REG
2488 && GET_CODE (SET_SRC (pbody)) == REG
2489 && REGNO (dest) == REGNO (SET_SRC (pbody)))
2490 continue;
2491 if (! (GET_CODE (dest) == MEM
2492 && GET_CODE (XEXP (dest, 0)) == POST_INC
2493 && XEXP (XEXP (dest, 0), 0) == stack_pointer_rtx))
2494 break;
2495 pushes++;
2496 if (total_pushed + GET_MODE_SIZE (GET_MODE (SET_DEST (pbody)))
2497 > stack_adjust_amount)
2498 break;
2499 total_pushed += GET_MODE_SIZE (GET_MODE (SET_DEST (pbody)));
2500 }
2501
2502 /* Discard the amount pushed from the stack adjust;
2503 maybe eliminate it entirely. */
2504 if (total_pushed >= stack_adjust_amount)
2505 {
2506 delete_computation (stack_adjust_insn);
2507 total_pushed = stack_adjust_amount;
2508 }
2509 else
2510 XEXP (SET_SRC (PATTERN (stack_adjust_insn)), 1)
2511 = GEN_INT (stack_adjust_amount - total_pushed);
2512
2513 /* Change the appropriate push insns to ordinary stores. */
2514 p = insn;
2515 while (total_pushed > 0)
2516 {
2517 rtx pbody, dest;
2518 p = next_nonnote_insn (p);
2519 if (GET_CODE (p) != INSN)
2520 break;
2521 pbody = PATTERN (p);
2522 if (GET_CODE (pbody) != SET)
2523 break;
2524 dest = SET_DEST (pbody);
2525 /* Allow a no-op move between the adjust and the push. */
2526 if (GET_CODE (dest) == REG
2527 && GET_CODE (SET_SRC (pbody)) == REG
2528 && REGNO (dest) == REGNO (SET_SRC (pbody)))
2529 continue;
2530 if (! (GET_CODE (dest) == MEM
2531 && GET_CODE (XEXP (dest, 0)) == POST_INC
2532 && XEXP (XEXP (dest, 0), 0) == stack_pointer_rtx))
2533 break;
2534 total_pushed -= GET_MODE_SIZE (GET_MODE (SET_DEST (pbody)));
2535 /* If this push doesn't fully fit in the space
2536 of the stack adjust that we deleted,
2537 make another stack adjust here for what we
2538 didn't use up. There should be peepholes
2539 to recognize the resulting sequence of insns. */
2540 if (total_pushed < 0)
2541 {
2542 emit_insn_before (gen_add2_insn (stack_pointer_rtx,
2543 GEN_INT (- total_pushed)),
2544 p);
2545 break;
2546 }
2547 XEXP (dest, 0)
2548 = plus_constant (stack_pointer_rtx, total_pushed);
2549 }
2550 }
2551 #endif
2552
2553 /* Detect and delete no-op move instructions
2554 resulting from not allocating a parameter in a register. */
2555
2556 if (GET_CODE (body) == SET
2557 && (SET_DEST (body) == SET_SRC (body)
2558 || (GET_CODE (SET_DEST (body)) == MEM
2559 && GET_CODE (SET_SRC (body)) == MEM
2560 && rtx_equal_p (SET_SRC (body), SET_DEST (body))))
2561 && ! (GET_CODE (SET_DEST (body)) == MEM
2562 && MEM_VOLATILE_P (SET_DEST (body)))
2563 && ! (GET_CODE (SET_SRC (body)) == MEM
2564 && MEM_VOLATILE_P (SET_SRC (body))))
2565 delete_computation (insn);
2566
2567 /* Detect and ignore no-op move instructions
2568 resulting from smart or fortuitous register allocation. */
2569
2570 else if (GET_CODE (body) == SET)
2571 {
2572 int sreg = true_regnum (SET_SRC (body));
2573 int dreg = true_regnum (SET_DEST (body));
2574
2575 if (sreg == dreg && sreg >= 0)
2576 delete_insn (insn);
2577 else if (sreg >= 0 && dreg >= 0)
2578 {
2579 rtx trial;
2580 rtx tem = find_equiv_reg (NULL_RTX, insn, 0,
2581 sreg, NULL_PTR, dreg,
2582 GET_MODE (SET_SRC (body)));
2583
2584 if (tem != 0
2585 && GET_MODE (tem) == GET_MODE (SET_DEST (body)))
2586 {
2587 /* DREG may have been the target of a REG_DEAD note in
2588 the insn which makes INSN redundant. If so, reorg
2589 would still think it is dead. So search for such a
2590 note and delete it if we find it. */
2591 if (! find_regno_note (insn, REG_UNUSED, dreg))
2592 for (trial = prev_nonnote_insn (insn);
2593 trial && GET_CODE (trial) != CODE_LABEL;
2594 trial = prev_nonnote_insn (trial))
2595 if (find_regno_note (trial, REG_DEAD, dreg))
2596 {
2597 remove_death (dreg, trial);
2598 break;
2599 }
2600
2601 /* Deleting insn could lose a death-note for SREG. */
2602 if ((trial = find_regno_note (insn, REG_DEAD, sreg)))
2603 {
2604 /* Change this into a USE so that we won't emit
2605 code for it, but still can keep the note. */
2606 PATTERN (insn)
2607 = gen_rtx_USE (VOIDmode, XEXP (trial, 0));
2608 INSN_CODE (insn) = -1;
2609 /* Remove all reg notes but the REG_DEAD one. */
2610 REG_NOTES (insn) = trial;
2611 XEXP (trial, 1) = NULL_RTX;
2612 }
2613 else
2614 delete_insn (insn);
2615 }
2616 }
2617 else if (dreg >= 0 && CONSTANT_P (SET_SRC (body))
2618 && find_equiv_reg (SET_SRC (body), insn, 0, dreg,
2619 NULL_PTR, 0,
2620 GET_MODE (SET_DEST (body))))
2621 {
2622 /* This handles the case where we have two consecutive
2623 assignments of the same constant to pseudos that didn't
2624 get a hard reg. Each SET from the constant will be
2625 converted into a SET of the spill register and an
2626 output reload will be made following it. This produces
2627 two loads of the same constant into the same spill
2628 register. */
2629
2630 rtx in_insn = insn;
2631
2632 /* Look back for a death note for the first reg.
2633 If there is one, it is no longer accurate. */
2634 while (in_insn && GET_CODE (in_insn) != CODE_LABEL)
2635 {
2636 if ((GET_CODE (in_insn) == INSN
2637 || GET_CODE (in_insn) == JUMP_INSN)
2638 && find_regno_note (in_insn, REG_DEAD, dreg))
2639 {
2640 remove_death (dreg, in_insn);
2641 break;
2642 }
2643 in_insn = PREV_INSN (in_insn);
2644 }
2645
2646 /* Delete the second load of the value. */
2647 delete_insn (insn);
2648 }
2649 }
2650 else if (GET_CODE (body) == PARALLEL)
2651 {
2652 /* If each part is a set between two identical registers or
2653 a USE or CLOBBER, delete the insn. */
2654 int i, sreg, dreg;
2655 rtx tem;
2656
2657 for (i = XVECLEN (body, 0) - 1; i >= 0; i--)
2658 {
2659 tem = XVECEXP (body, 0, i);
2660 if (GET_CODE (tem) == USE || GET_CODE (tem) == CLOBBER)
2661 continue;
2662
2663 if (GET_CODE (tem) != SET
2664 || (sreg = true_regnum (SET_SRC (tem))) < 0
2665 || (dreg = true_regnum (SET_DEST (tem))) < 0
2666 || dreg != sreg)
2667 break;
2668 }
2669
2670 if (i < 0)
2671 delete_insn (insn);
2672 }
2673 /* Also delete insns to store bit fields if they are no-ops. */
2674 /* Not worth the hair to detect this in the big-endian case. */
2675 else if (! BYTES_BIG_ENDIAN
2676 && GET_CODE (body) == SET
2677 && GET_CODE (SET_DEST (body)) == ZERO_EXTRACT
2678 && XEXP (SET_DEST (body), 2) == const0_rtx
2679 && XEXP (SET_DEST (body), 0) == SET_SRC (body)
2680 && ! (GET_CODE (SET_SRC (body)) == MEM
2681 && MEM_VOLATILE_P (SET_SRC (body))))
2682 delete_insn (insn);
2683 }
2684 insn = next;
2685 }
2686 }
2687
2688 /* See if there is still a NOTE_INSN_FUNCTION_END in this function.
2689 If so indicate that this function can drop off the end by returning
2690 1, else return 0.
2691
2692 CHECK_DELETED indicates whether we must check if the note being
2693 searched for has the deleted flag set.
2694
2695 DELETE_FINAL_NOTE indicates whether we should delete the note
2696 if we find it. */
2697
2698 static int
2699 calculate_can_reach_end (last, delete_final_note)
2700 rtx last;
2701 int delete_final_note;
2702 {
2703 rtx insn = last;
2704 int n_labels = 1;
2705
2706 while (insn != NULL_RTX)
2707 {
2708 int ok = 0;
2709
2710 /* One label can follow the end-note: the return label. */
2711 if (GET_CODE (insn) == CODE_LABEL && n_labels-- > 0)
2712 ok = 1;
2713 /* Ordinary insns can follow it if returning a structure. */
2714 else if (GET_CODE (insn) == INSN)
2715 ok = 1;
2716 /* If machine uses explicit RETURN insns, no epilogue,
2717 then one of them follows the note. */
2718 else if (GET_CODE (insn) == JUMP_INSN
2719 && GET_CODE (PATTERN (insn)) == RETURN)
2720 ok = 1;
2721 /* A barrier can follow the return insn. */
2722 else if (GET_CODE (insn) == BARRIER)
2723 ok = 1;
2724 /* Other kinds of notes can follow also. */
2725 else if (GET_CODE (insn) == NOTE
2726 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_FUNCTION_END)
2727 ok = 1;
2728
2729 if (ok != 1)
2730 break;
2731
2732 insn = PREV_INSN (insn);
2733 }
2734
2735 /* See if we backed up to the appropriate type of note. */
2736 if (insn != NULL_RTX
2737 && GET_CODE (insn) == NOTE
2738 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_FUNCTION_END)
2739 {
2740 if (delete_final_note)
2741 delete_insn (insn);
2742 return 1;
2743 }
2744
2745 return 0;
2746 }
2747
2748 /* LOOP_START is a NOTE_INSN_LOOP_BEG note that is followed by an unconditional
2749 jump. Assume that this unconditional jump is to the exit test code. If
2750 the code is sufficiently simple, make a copy of it before INSN,
2751 followed by a jump to the exit of the loop. Then delete the unconditional
2752 jump after INSN.
2753
2754 Return 1 if we made the change, else 0.
2755
2756 This is only safe immediately after a regscan pass because it uses the
2757 values of regno_first_uid and regno_last_uid. */
2758
2759 static int
2760 duplicate_loop_exit_test (loop_start)
2761 rtx loop_start;
2762 {
2763 rtx insn, set, reg, p, link;
2764 rtx copy = 0, first_copy = 0;
2765 int num_insns = 0;
2766 rtx exitcode = NEXT_INSN (JUMP_LABEL (next_nonnote_insn (loop_start)));
2767 rtx lastexit;
2768 int max_reg = max_reg_num ();
2769 rtx *reg_map = 0;
2770
2771 /* Scan the exit code. We do not perform this optimization if any insn:
2772
2773 is a CALL_INSN
2774 is a CODE_LABEL
2775 has a REG_RETVAL or REG_LIBCALL note (hard to adjust)
2776 is a NOTE_INSN_LOOP_BEG because this means we have a nested loop
2777 is a NOTE_INSN_BLOCK_{BEG,END} because duplicating these notes
2778 is not valid.
2779
2780 We also do not do this if we find an insn with ASM_OPERANDS. While
2781 this restriction should not be necessary, copying an insn with
2782 ASM_OPERANDS can confuse asm_noperands in some cases.
2783
2784 Also, don't do this if the exit code is more than 20 insns. */
2785
2786 for (insn = exitcode;
2787 insn
2788 && ! (GET_CODE (insn) == NOTE
2789 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END);
2790 insn = NEXT_INSN (insn))
2791 {
2792 switch (GET_CODE (insn))
2793 {
2794 case CODE_LABEL:
2795 case CALL_INSN:
2796 return 0;
2797 case NOTE:
2798 /* We could be in front of the wrong NOTE_INSN_LOOP_END if there is
2799 a jump immediately after the loop start that branches outside
2800 the loop but within an outer loop, near the exit test.
2801 If we copied this exit test and created a phony
2802 NOTE_INSN_LOOP_VTOP, this could make instructions immediately
2803 before the exit test look like these could be safely moved
2804 out of the loop even if they actually may be never executed.
2805 This can be avoided by checking here for NOTE_INSN_LOOP_CONT. */
2806
2807 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG
2808 || NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_CONT)
2809 return 0;
2810
2811 if (optimize < 2
2812 && (NOTE_LINE_NUMBER (insn) == NOTE_INSN_BLOCK_BEG
2813 || NOTE_LINE_NUMBER (insn) == NOTE_INSN_BLOCK_END))
2814 /* If we were to duplicate this code, we would not move
2815 the BLOCK notes, and so debugging the moved code would
2816 be difficult. Thus, we only move the code with -O2 or
2817 higher. */
2818 return 0;
2819
2820 break;
2821 case JUMP_INSN:
2822 case INSN:
2823 /* The code below would grossly mishandle REG_WAS_0 notes,
2824 so get rid of them here. */
2825 while ((p = find_reg_note (insn, REG_WAS_0, NULL_RTX)) != 0)
2826 remove_note (insn, p);
2827 if (++num_insns > 20
2828 || find_reg_note (insn, REG_RETVAL, NULL_RTX)
2829 || find_reg_note (insn, REG_LIBCALL, NULL_RTX))
2830 return 0;
2831 break;
2832 default:
2833 break;
2834 }
2835 }
2836
2837 /* Unless INSN is zero, we can do the optimization. */
2838 if (insn == 0)
2839 return 0;
2840
2841 lastexit = insn;
2842
2843 /* See if any insn sets a register only used in the loop exit code and
2844 not a user variable. If so, replace it with a new register. */
2845 for (insn = exitcode; insn != lastexit; insn = NEXT_INSN (insn))
2846 if (GET_CODE (insn) == INSN
2847 && (set = single_set (insn)) != 0
2848 && ((reg = SET_DEST (set), GET_CODE (reg) == REG)
2849 || (GET_CODE (reg) == SUBREG
2850 && (reg = SUBREG_REG (reg), GET_CODE (reg) == REG)))
2851 && REGNO (reg) >= FIRST_PSEUDO_REGISTER
2852 && REGNO_FIRST_UID (REGNO (reg)) == INSN_UID (insn))
2853 {
2854 for (p = NEXT_INSN (insn); p != lastexit; p = NEXT_INSN (p))
2855 if (REGNO_LAST_UID (REGNO (reg)) == INSN_UID (p))
2856 break;
2857
2858 if (p != lastexit)
2859 {
2860 /* We can do the replacement. Allocate reg_map if this is the
2861 first replacement we found. */
2862 if (reg_map == 0)
2863 reg_map = (rtx *) xcalloc (max_reg, sizeof (rtx));
2864
2865 REG_LOOP_TEST_P (reg) = 1;
2866
2867 reg_map[REGNO (reg)] = gen_reg_rtx (GET_MODE (reg));
2868 }
2869 }
2870
2871 /* Now copy each insn. */
2872 for (insn = exitcode; insn != lastexit; insn = NEXT_INSN (insn))
2873 {
2874 switch (GET_CODE (insn))
2875 {
2876 case BARRIER:
2877 copy = emit_barrier_before (loop_start);
2878 break;
2879 case NOTE:
2880 /* Only copy line-number notes. */
2881 if (NOTE_LINE_NUMBER (insn) >= 0)
2882 {
2883 copy = emit_note_before (NOTE_LINE_NUMBER (insn), loop_start);
2884 NOTE_SOURCE_FILE (copy) = NOTE_SOURCE_FILE (insn);
2885 }
2886 break;
2887
2888 case INSN:
2889 copy = emit_insn_before (copy_insn (PATTERN (insn)), loop_start);
2890 if (reg_map)
2891 replace_regs (PATTERN (copy), reg_map, max_reg, 1);
2892
2893 mark_jump_label (PATTERN (copy), copy, 0);
2894
2895 /* Copy all REG_NOTES except REG_LABEL since mark_jump_label will
2896 make them. */
2897 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
2898 if (REG_NOTE_KIND (link) != REG_LABEL)
2899 REG_NOTES (copy)
2900 = copy_insn_1 (gen_rtx_EXPR_LIST (REG_NOTE_KIND (link),
2901 XEXP (link, 0),
2902 REG_NOTES (copy)));
2903 if (reg_map && REG_NOTES (copy))
2904 replace_regs (REG_NOTES (copy), reg_map, max_reg, 1);
2905 break;
2906
2907 case JUMP_INSN:
2908 copy = emit_jump_insn_before (copy_insn (PATTERN (insn)), loop_start);
2909 if (reg_map)
2910 replace_regs (PATTERN (copy), reg_map, max_reg, 1);
2911 mark_jump_label (PATTERN (copy), copy, 0);
2912 if (REG_NOTES (insn))
2913 {
2914 REG_NOTES (copy) = copy_insn_1 (REG_NOTES (insn));
2915 if (reg_map)
2916 replace_regs (REG_NOTES (copy), reg_map, max_reg, 1);
2917 }
2918
2919 /* If this is a simple jump, add it to the jump chain. */
2920
2921 if (INSN_UID (copy) < max_jump_chain && JUMP_LABEL (copy)
2922 && simplejump_p (copy))
2923 {
2924 jump_chain[INSN_UID (copy)]
2925 = jump_chain[INSN_UID (JUMP_LABEL (copy))];
2926 jump_chain[INSN_UID (JUMP_LABEL (copy))] = copy;
2927 }
2928 break;
2929
2930 default:
2931 abort ();
2932 }
2933
2934 /* Record the first insn we copied. We need it so that we can
2935 scan the copied insns for new pseudo registers. */
2936 if (! first_copy)
2937 first_copy = copy;
2938 }
2939
2940 /* Now clean up by emitting a jump to the end label and deleting the jump
2941 at the start of the loop. */
2942 if (! copy || GET_CODE (copy) != BARRIER)
2943 {
2944 copy = emit_jump_insn_before (gen_jump (get_label_after (insn)),
2945 loop_start);
2946
2947 /* Record the first insn we copied. We need it so that we can
2948 scan the copied insns for new pseudo registers. This may not
2949 be strictly necessary since we should have copied at least one
2950 insn above. But I am going to be safe. */
2951 if (! first_copy)
2952 first_copy = copy;
2953
2954 mark_jump_label (PATTERN (copy), copy, 0);
2955 if (INSN_UID (copy) < max_jump_chain
2956 && INSN_UID (JUMP_LABEL (copy)) < max_jump_chain)
2957 {
2958 jump_chain[INSN_UID (copy)]
2959 = jump_chain[INSN_UID (JUMP_LABEL (copy))];
2960 jump_chain[INSN_UID (JUMP_LABEL (copy))] = copy;
2961 }
2962 emit_barrier_before (loop_start);
2963 }
2964
2965 /* Now scan from the first insn we copied to the last insn we copied
2966 (copy) for new pseudo registers. Do this after the code to jump to
2967 the end label since that might create a new pseudo too. */
2968 reg_scan_update (first_copy, copy, max_reg);
2969
2970 /* Mark the exit code as the virtual top of the converted loop. */
2971 emit_note_before (NOTE_INSN_LOOP_VTOP, exitcode);
2972
2973 delete_insn (next_nonnote_insn (loop_start));
2974
2975 /* Clean up. */
2976 if (reg_map)
2977 free (reg_map);
2978
2979 return 1;
2980 }
2981 \f
2982 /* Move all block-beg, block-end, loop-beg, loop-cont, loop-vtop, and
2983 loop-end notes between START and END out before START. Assume that
2984 END is not such a note. START may be such a note. Returns the value
2985 of the new starting insn, which may be different if the original start
2986 was such a note. */
2987
2988 rtx
2989 squeeze_notes (start, end)
2990 rtx start, end;
2991 {
2992 rtx insn;
2993 rtx next;
2994
2995 for (insn = start; insn != end; insn = next)
2996 {
2997 next = NEXT_INSN (insn);
2998 if (GET_CODE (insn) == NOTE
2999 && (NOTE_LINE_NUMBER (insn) == NOTE_INSN_BLOCK_END
3000 || NOTE_LINE_NUMBER (insn) == NOTE_INSN_BLOCK_BEG
3001 || NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG
3002 || NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END
3003 || NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_CONT
3004 || NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_VTOP))
3005 {
3006 if (insn == start)
3007 start = next;
3008 else
3009 {
3010 rtx prev = PREV_INSN (insn);
3011 PREV_INSN (insn) = PREV_INSN (start);
3012 NEXT_INSN (insn) = start;
3013 NEXT_INSN (PREV_INSN (insn)) = insn;
3014 PREV_INSN (NEXT_INSN (insn)) = insn;
3015 NEXT_INSN (prev) = next;
3016 PREV_INSN (next) = prev;
3017 }
3018 }
3019 }
3020
3021 return start;
3022 }
3023 \f
3024 /* Compare the instructions before insn E1 with those before E2
3025 to find an opportunity for cross jumping.
3026 (This means detecting identical sequences of insns followed by
3027 jumps to the same place, or followed by a label and a jump
3028 to that label, and replacing one with a jump to the other.)
3029
3030 Assume E1 is a jump that jumps to label E2
3031 (that is not always true but it might as well be).
3032 Find the longest possible equivalent sequences
3033 and store the first insns of those sequences into *F1 and *F2.
3034 Store zero there if no equivalent preceding instructions are found.
3035
3036 We give up if we find a label in stream 1.
3037 Actually we could transfer that label into stream 2. */
3038
3039 static void
3040 find_cross_jump (e1, e2, minimum, f1, f2)
3041 rtx e1, e2;
3042 int minimum;
3043 rtx *f1, *f2;
3044 {
3045 register rtx i1 = e1, i2 = e2;
3046 register rtx p1, p2;
3047 int lose = 0;
3048
3049 rtx last1 = 0, last2 = 0;
3050 rtx afterlast1 = 0, afterlast2 = 0;
3051
3052 *f1 = 0;
3053 *f2 = 0;
3054
3055 while (1)
3056 {
3057 i1 = prev_nonnote_insn (i1);
3058
3059 i2 = PREV_INSN (i2);
3060 while (i2 && (GET_CODE (i2) == NOTE || GET_CODE (i2) == CODE_LABEL))
3061 i2 = PREV_INSN (i2);
3062
3063 if (i1 == 0)
3064 break;
3065
3066 /* Don't allow the range of insns preceding E1 or E2
3067 to include the other (E2 or E1). */
3068 if (i2 == e1 || i1 == e2)
3069 break;
3070
3071 /* If we will get to this code by jumping, those jumps will be
3072 tensioned to go directly to the new label (before I2),
3073 so this cross-jumping won't cost extra. So reduce the minimum. */
3074 if (GET_CODE (i1) == CODE_LABEL)
3075 {
3076 --minimum;
3077 break;
3078 }
3079
3080 if (i2 == 0 || GET_CODE (i1) != GET_CODE (i2))
3081 break;
3082
3083 /* Avoid moving insns across EH regions if either of the insns
3084 can throw. */
3085 if (flag_exceptions
3086 && (asynchronous_exceptions || GET_CODE (i1) == CALL_INSN)
3087 && !in_same_eh_region (i1, i2))
3088 break;
3089
3090 p1 = PATTERN (i1);
3091 p2 = PATTERN (i2);
3092
3093 /* If this is a CALL_INSN, compare register usage information.
3094 If we don't check this on stack register machines, the two
3095 CALL_INSNs might be merged leaving reg-stack.c with mismatching
3096 numbers of stack registers in the same basic block.
3097 If we don't check this on machines with delay slots, a delay slot may
3098 be filled that clobbers a parameter expected by the subroutine.
3099
3100 ??? We take the simple route for now and assume that if they're
3101 equal, they were constructed identically. */
3102
3103 if (GET_CODE (i1) == CALL_INSN
3104 && ! rtx_equal_p (CALL_INSN_FUNCTION_USAGE (i1),
3105 CALL_INSN_FUNCTION_USAGE (i2)))
3106 lose = 1;
3107
3108 #ifdef STACK_REGS
3109 /* If cross_jump_death_matters is not 0, the insn's mode
3110 indicates whether or not the insn contains any stack-like
3111 regs. */
3112
3113 if (!lose && cross_jump_death_matters && stack_regs_mentioned (i1))
3114 {
3115 /* If register stack conversion has already been done, then
3116 death notes must also be compared before it is certain that
3117 the two instruction streams match. */
3118
3119 rtx note;
3120 HARD_REG_SET i1_regset, i2_regset;
3121
3122 CLEAR_HARD_REG_SET (i1_regset);
3123 CLEAR_HARD_REG_SET (i2_regset);
3124
3125 for (note = REG_NOTES (i1); note; note = XEXP (note, 1))
3126 if (REG_NOTE_KIND (note) == REG_DEAD
3127 && STACK_REG_P (XEXP (note, 0)))
3128 SET_HARD_REG_BIT (i1_regset, REGNO (XEXP (note, 0)));
3129
3130 for (note = REG_NOTES (i2); note; note = XEXP (note, 1))
3131 if (REG_NOTE_KIND (note) == REG_DEAD
3132 && STACK_REG_P (XEXP (note, 0)))
3133 SET_HARD_REG_BIT (i2_regset, REGNO (XEXP (note, 0)));
3134
3135 GO_IF_HARD_REG_EQUAL (i1_regset, i2_regset, done);
3136
3137 lose = 1;
3138
3139 done:
3140 ;
3141 }
3142 #endif
3143
3144 /* Don't allow old-style asm or volatile extended asms to be accepted
3145 for cross jumping purposes. It is conceptually correct to allow
3146 them, since cross-jumping preserves the dynamic instruction order
3147 even though it is changing the static instruction order. However,
3148 if an asm is being used to emit an assembler pseudo-op, such as
3149 the MIPS `.set reorder' pseudo-op, then the static instruction order
3150 matters and it must be preserved. */
3151 if (GET_CODE (p1) == ASM_INPUT || GET_CODE (p2) == ASM_INPUT
3152 || (GET_CODE (p1) == ASM_OPERANDS && MEM_VOLATILE_P (p1))
3153 || (GET_CODE (p2) == ASM_OPERANDS && MEM_VOLATILE_P (p2)))
3154 lose = 1;
3155
3156 if (lose || GET_CODE (p1) != GET_CODE (p2)
3157 || ! rtx_renumbered_equal_p (p1, p2))
3158 {
3159 /* The following code helps take care of G++ cleanups. */
3160 rtx equiv1;
3161 rtx equiv2;
3162
3163 if (!lose && GET_CODE (p1) == GET_CODE (p2)
3164 && ((equiv1 = find_reg_note (i1, REG_EQUAL, NULL_RTX)) != 0
3165 || (equiv1 = find_reg_note (i1, REG_EQUIV, NULL_RTX)) != 0)
3166 && ((equiv2 = find_reg_note (i2, REG_EQUAL, NULL_RTX)) != 0
3167 || (equiv2 = find_reg_note (i2, REG_EQUIV, NULL_RTX)) != 0)
3168 /* If the equivalences are not to a constant, they may
3169 reference pseudos that no longer exist, so we can't
3170 use them. */
3171 && CONSTANT_P (XEXP (equiv1, 0))
3172 && rtx_equal_p (XEXP (equiv1, 0), XEXP (equiv2, 0)))
3173 {
3174 rtx s1 = single_set (i1);
3175 rtx s2 = single_set (i2);
3176 if (s1 != 0 && s2 != 0
3177 && rtx_renumbered_equal_p (SET_DEST (s1), SET_DEST (s2)))
3178 {
3179 validate_change (i1, &SET_SRC (s1), XEXP (equiv1, 0), 1);
3180 validate_change (i2, &SET_SRC (s2), XEXP (equiv2, 0), 1);
3181 if (! rtx_renumbered_equal_p (p1, p2))
3182 cancel_changes (0);
3183 else if (apply_change_group ())
3184 goto win;
3185 }
3186 }
3187
3188 /* Insns fail to match; cross jumping is limited to the following
3189 insns. */
3190
3191 #ifdef HAVE_cc0
3192 /* Don't allow the insn after a compare to be shared by
3193 cross-jumping unless the compare is also shared.
3194 Here, if either of these non-matching insns is a compare,
3195 exclude the following insn from possible cross-jumping. */
3196 if (sets_cc0_p (p1) || sets_cc0_p (p2))
3197 last1 = afterlast1, last2 = afterlast2, ++minimum;
3198 #endif
3199
3200 /* If cross-jumping here will feed a jump-around-jump
3201 optimization, this jump won't cost extra, so reduce
3202 the minimum. */
3203 if (GET_CODE (i1) == JUMP_INSN
3204 && JUMP_LABEL (i1)
3205 && prev_real_insn (JUMP_LABEL (i1)) == e1)
3206 --minimum;
3207 break;
3208 }
3209
3210 win:
3211 if (GET_CODE (p1) != USE && GET_CODE (p1) != CLOBBER)
3212 {
3213 /* Ok, this insn is potentially includable in a cross-jump here. */
3214 afterlast1 = last1, afterlast2 = last2;
3215 last1 = i1, last2 = i2, --minimum;
3216 }
3217 }
3218
3219 if (minimum <= 0 && last1 != 0 && last1 != e1)
3220 *f1 = last1, *f2 = last2;
3221 }
3222
3223 static void
3224 do_cross_jump (insn, newjpos, newlpos)
3225 rtx insn, newjpos, newlpos;
3226 {
3227 /* Find an existing label at this point
3228 or make a new one if there is none. */
3229 register rtx label = get_label_before (newlpos);
3230
3231 /* Make the same jump insn jump to the new point. */
3232 if (GET_CODE (PATTERN (insn)) == RETURN)
3233 {
3234 /* Remove from jump chain of returns. */
3235 delete_from_jump_chain (insn);
3236 /* Change the insn. */
3237 PATTERN (insn) = gen_jump (label);
3238 INSN_CODE (insn) = -1;
3239 JUMP_LABEL (insn) = label;
3240 LABEL_NUSES (label)++;
3241 /* Add to new the jump chain. */
3242 if (INSN_UID (label) < max_jump_chain
3243 && INSN_UID (insn) < max_jump_chain)
3244 {
3245 jump_chain[INSN_UID (insn)] = jump_chain[INSN_UID (label)];
3246 jump_chain[INSN_UID (label)] = insn;
3247 }
3248 }
3249 else
3250 redirect_jump (insn, label);
3251
3252 /* Delete the matching insns before the jump. Also, remove any REG_EQUAL
3253 or REG_EQUIV note in the NEWLPOS stream that isn't also present in
3254 the NEWJPOS stream. */
3255
3256 while (newjpos != insn)
3257 {
3258 rtx lnote;
3259
3260 for (lnote = REG_NOTES (newlpos); lnote; lnote = XEXP (lnote, 1))
3261 if ((REG_NOTE_KIND (lnote) == REG_EQUAL
3262 || REG_NOTE_KIND (lnote) == REG_EQUIV)
3263 && ! find_reg_note (newjpos, REG_EQUAL, XEXP (lnote, 0))
3264 && ! find_reg_note (newjpos, REG_EQUIV, XEXP (lnote, 0)))
3265 remove_note (newlpos, lnote);
3266
3267 delete_insn (newjpos);
3268 newjpos = next_real_insn (newjpos);
3269 newlpos = next_real_insn (newlpos);
3270 }
3271 }
3272 \f
3273 /* Return the label before INSN, or put a new label there. */
3274
3275 rtx
3276 get_label_before (insn)
3277 rtx insn;
3278 {
3279 rtx label;
3280
3281 /* Find an existing label at this point
3282 or make a new one if there is none. */
3283 label = prev_nonnote_insn (insn);
3284
3285 if (label == 0 || GET_CODE (label) != CODE_LABEL)
3286 {
3287 rtx prev = PREV_INSN (insn);
3288
3289 label = gen_label_rtx ();
3290 emit_label_after (label, prev);
3291 LABEL_NUSES (label) = 0;
3292 }
3293 return label;
3294 }
3295
3296 /* Return the label after INSN, or put a new label there. */
3297
3298 rtx
3299 get_label_after (insn)
3300 rtx insn;
3301 {
3302 rtx label;
3303
3304 /* Find an existing label at this point
3305 or make a new one if there is none. */
3306 label = next_nonnote_insn (insn);
3307
3308 if (label == 0 || GET_CODE (label) != CODE_LABEL)
3309 {
3310 label = gen_label_rtx ();
3311 emit_label_after (label, insn);
3312 LABEL_NUSES (label) = 0;
3313 }
3314 return label;
3315 }
3316 \f
3317 /* Return 1 if INSN is a jump that jumps to right after TARGET
3318 only on the condition that TARGET itself would drop through.
3319 Assumes that TARGET is a conditional jump. */
3320
3321 static int
3322 jump_back_p (insn, target)
3323 rtx insn, target;
3324 {
3325 rtx cinsn, ctarget;
3326 enum rtx_code codei, codet;
3327
3328 if (simplejump_p (insn) || ! condjump_p (insn)
3329 || simplejump_p (target)
3330 || target != prev_real_insn (JUMP_LABEL (insn)))
3331 return 0;
3332
3333 cinsn = XEXP (SET_SRC (PATTERN (insn)), 0);
3334 ctarget = XEXP (SET_SRC (PATTERN (target)), 0);
3335
3336 codei = GET_CODE (cinsn);
3337 codet = GET_CODE (ctarget);
3338
3339 if (XEXP (SET_SRC (PATTERN (insn)), 1) == pc_rtx)
3340 {
3341 if (! can_reverse_comparison_p (cinsn, insn))
3342 return 0;
3343 codei = reverse_condition (codei);
3344 }
3345
3346 if (XEXP (SET_SRC (PATTERN (target)), 2) == pc_rtx)
3347 {
3348 if (! can_reverse_comparison_p (ctarget, target))
3349 return 0;
3350 codet = reverse_condition (codet);
3351 }
3352
3353 return (codei == codet
3354 && rtx_renumbered_equal_p (XEXP (cinsn, 0), XEXP (ctarget, 0))
3355 && rtx_renumbered_equal_p (XEXP (cinsn, 1), XEXP (ctarget, 1)));
3356 }
3357 \f
3358 /* Given a comparison, COMPARISON, inside a conditional jump insn, INSN,
3359 return non-zero if it is safe to reverse this comparison. It is if our
3360 floating-point is not IEEE, if this is an NE or EQ comparison, or if
3361 this is known to be an integer comparison. */
3362
3363 int
3364 can_reverse_comparison_p (comparison, insn)
3365 rtx comparison;
3366 rtx insn;
3367 {
3368 rtx arg0;
3369
3370 /* If this is not actually a comparison, we can't reverse it. */
3371 if (GET_RTX_CLASS (GET_CODE (comparison)) != '<')
3372 return 0;
3373
3374 if (TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
3375 /* If this is an NE comparison, it is safe to reverse it to an EQ
3376 comparison and vice versa, even for floating point. If no operands
3377 are NaNs, the reversal is valid. If some operand is a NaN, EQ is
3378 always false and NE is always true, so the reversal is also valid. */
3379 || flag_fast_math
3380 || GET_CODE (comparison) == NE
3381 || GET_CODE (comparison) == EQ)
3382 return 1;
3383
3384 arg0 = XEXP (comparison, 0);
3385
3386 /* Make sure ARG0 is one of the actual objects being compared. If we
3387 can't do this, we can't be sure the comparison can be reversed.
3388
3389 Handle cc0 and a MODE_CC register. */
3390 if ((GET_CODE (arg0) == REG && GET_MODE_CLASS (GET_MODE (arg0)) == MODE_CC)
3391 #ifdef HAVE_cc0
3392 || arg0 == cc0_rtx
3393 #endif
3394 )
3395 {
3396 rtx prev = prev_nonnote_insn (insn);
3397 rtx set;
3398
3399 /* First see if the condition code mode alone if enough to say we can
3400 reverse the condition. If not, then search backwards for a set of
3401 ARG0. We do not need to check for an insn clobbering it since valid
3402 code will contain set a set with no intervening clobber. But
3403 stop when we reach a label. */
3404 #ifdef REVERSIBLE_CC_MODE
3405 if (GET_MODE_CLASS (GET_MODE (arg0)) == MODE_CC
3406 && REVERSIBLE_CC_MODE (GET_MODE (arg0)))
3407 return 1;
3408 #endif
3409
3410 for (prev = prev_nonnote_insn (insn);
3411 prev != 0 && GET_CODE (prev) != CODE_LABEL;
3412 prev = prev_nonnote_insn (prev))
3413 if ((set = single_set (prev)) != 0
3414 && rtx_equal_p (SET_DEST (set), arg0))
3415 {
3416 arg0 = SET_SRC (set);
3417
3418 if (GET_CODE (arg0) == COMPARE)
3419 arg0 = XEXP (arg0, 0);
3420 break;
3421 }
3422 }
3423
3424 /* We can reverse this if ARG0 is a CONST_INT or if its mode is
3425 not VOIDmode and neither a MODE_CC nor MODE_FLOAT type. */
3426 return (GET_CODE (arg0) == CONST_INT
3427 || (GET_MODE (arg0) != VOIDmode
3428 && GET_MODE_CLASS (GET_MODE (arg0)) != MODE_CC
3429 && GET_MODE_CLASS (GET_MODE (arg0)) != MODE_FLOAT));
3430 }
3431
3432 /* Given an rtx-code for a comparison, return the code for the negated
3433 comparison. If no such code exists, return UNKNOWN.
3434
3435 WATCH OUT! reverse_condition is not safe to use on a jump that might
3436 be acting on the results of an IEEE floating point comparison, because
3437 of the special treatment of non-signaling nans in comparisons.
3438 Use can_reverse_comparison_p to be sure. */
3439
3440 enum rtx_code
3441 reverse_condition (code)
3442 enum rtx_code code;
3443 {
3444 switch (code)
3445 {
3446 case EQ:
3447 return NE;
3448 case NE:
3449 return EQ;
3450 case GT:
3451 return LE;
3452 case GE:
3453 return LT;
3454 case LT:
3455 return GE;
3456 case LE:
3457 return GT;
3458 case GTU:
3459 return LEU;
3460 case GEU:
3461 return LTU;
3462 case LTU:
3463 return GEU;
3464 case LEU:
3465 return GTU;
3466 case UNORDERED:
3467 return ORDERED;
3468 case ORDERED:
3469 return UNORDERED;
3470
3471 case UNLT:
3472 case UNLE:
3473 case UNGT:
3474 case UNGE:
3475 case UNEQ:
3476 case LTGT:
3477 return UNKNOWN;
3478
3479 default:
3480 abort ();
3481 }
3482 }
3483
3484 /* Similar, but we're allowed to generate unordered comparisons, which
3485 makes it safe for IEEE floating-point. Of course, we have to recognize
3486 that the target will support them too... */
3487
3488 enum rtx_code
3489 reverse_condition_maybe_unordered (code)
3490 enum rtx_code code;
3491 {
3492 /* Non-IEEE formats don't have unordered conditions. */
3493 if (TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT)
3494 return reverse_condition (code);
3495
3496 switch (code)
3497 {
3498 case EQ:
3499 return NE;
3500 case NE:
3501 return EQ;
3502 case GT:
3503 return UNLE;
3504 case GE:
3505 return UNLT;
3506 case LT:
3507 return UNGE;
3508 case LE:
3509 return UNGT;
3510 case LTGT:
3511 return UNEQ;
3512 case GTU:
3513 return LEU;
3514 case GEU:
3515 return LTU;
3516 case LTU:
3517 return GEU;
3518 case LEU:
3519 return GTU;
3520 case UNORDERED:
3521 return ORDERED;
3522 case ORDERED:
3523 return UNORDERED;
3524 case UNLT:
3525 return GE;
3526 case UNLE:
3527 return GT;
3528 case UNGT:
3529 return LE;
3530 case UNGE:
3531 return LT;
3532 case UNEQ:
3533 return LTGT;
3534
3535 default:
3536 abort ();
3537 }
3538 }
3539
3540 /* Similar, but return the code when two operands of a comparison are swapped.
3541 This IS safe for IEEE floating-point. */
3542
3543 enum rtx_code
3544 swap_condition (code)
3545 enum rtx_code code;
3546 {
3547 switch (code)
3548 {
3549 case EQ:
3550 case NE:
3551 case UNORDERED:
3552 case ORDERED:
3553 case UNEQ:
3554 case LTGT:
3555 return code;
3556
3557 case GT:
3558 return LT;
3559 case GE:
3560 return LE;
3561 case LT:
3562 return GT;
3563 case LE:
3564 return GE;
3565 case GTU:
3566 return LTU;
3567 case GEU:
3568 return LEU;
3569 case LTU:
3570 return GTU;
3571 case LEU:
3572 return GEU;
3573 case UNLT:
3574 return UNGT;
3575 case UNLE:
3576 return UNGE;
3577 case UNGT:
3578 return UNLT;
3579 case UNGE:
3580 return UNLE;
3581
3582 default:
3583 abort ();
3584 }
3585 }
3586
3587 /* Given a comparison CODE, return the corresponding unsigned comparison.
3588 If CODE is an equality comparison or already an unsigned comparison,
3589 CODE is returned. */
3590
3591 enum rtx_code
3592 unsigned_condition (code)
3593 enum rtx_code code;
3594 {
3595 switch (code)
3596 {
3597 case EQ:
3598 case NE:
3599 case GTU:
3600 case GEU:
3601 case LTU:
3602 case LEU:
3603 return code;
3604
3605 case GT:
3606 return GTU;
3607 case GE:
3608 return GEU;
3609 case LT:
3610 return LTU;
3611 case LE:
3612 return LEU;
3613
3614 default:
3615 abort ();
3616 }
3617 }
3618
3619 /* Similarly, return the signed version of a comparison. */
3620
3621 enum rtx_code
3622 signed_condition (code)
3623 enum rtx_code code;
3624 {
3625 switch (code)
3626 {
3627 case EQ:
3628 case NE:
3629 case GT:
3630 case GE:
3631 case LT:
3632 case LE:
3633 return code;
3634
3635 case GTU:
3636 return GT;
3637 case GEU:
3638 return GE;
3639 case LTU:
3640 return LT;
3641 case LEU:
3642 return LE;
3643
3644 default:
3645 abort ();
3646 }
3647 }
3648 \f
3649 /* Return non-zero if CODE1 is more strict than CODE2, i.e., if the
3650 truth of CODE1 implies the truth of CODE2. */
3651
3652 int
3653 comparison_dominates_p (code1, code2)
3654 enum rtx_code code1, code2;
3655 {
3656 if (code1 == code2)
3657 return 1;
3658
3659 switch (code1)
3660 {
3661 case EQ:
3662 if (code2 == LE || code2 == LEU || code2 == GE || code2 == GEU
3663 || code2 == ORDERED)
3664 return 1;
3665 break;
3666
3667 case LT:
3668 if (code2 == LE || code2 == NE || code2 == ORDERED)
3669 return 1;
3670 break;
3671
3672 case GT:
3673 if (code2 == GE || code2 == NE || code2 == ORDERED)
3674 return 1;
3675 break;
3676
3677 case GE:
3678 case LE:
3679 if (code2 == ORDERED)
3680 return 1;
3681 break;
3682
3683 case LTGT:
3684 if (code2 == NE || code2 == ORDERED)
3685 return 1;
3686 break;
3687
3688 case LTU:
3689 if (code2 == LEU || code2 == NE)
3690 return 1;
3691 break;
3692
3693 case GTU:
3694 if (code2 == GEU || code2 == NE)
3695 return 1;
3696 break;
3697
3698 case UNORDERED:
3699 if (code2 == NE)
3700 return 1;
3701 break;
3702
3703 default:
3704 break;
3705 }
3706
3707 return 0;
3708 }
3709 \f
3710 /* Return 1 if INSN is an unconditional jump and nothing else. */
3711
3712 int
3713 simplejump_p (insn)
3714 rtx insn;
3715 {
3716 return (GET_CODE (insn) == JUMP_INSN
3717 && GET_CODE (PATTERN (insn)) == SET
3718 && GET_CODE (SET_DEST (PATTERN (insn))) == PC
3719 && GET_CODE (SET_SRC (PATTERN (insn))) == LABEL_REF);
3720 }
3721
3722 /* Return nonzero if INSN is a (possibly) conditional jump
3723 and nothing more. */
3724
3725 int
3726 condjump_p (insn)
3727 rtx insn;
3728 {
3729 register rtx x = PATTERN (insn);
3730
3731 if (GET_CODE (x) != SET
3732 || GET_CODE (SET_DEST (x)) != PC)
3733 return 0;
3734
3735 x = SET_SRC (x);
3736 if (GET_CODE (x) == LABEL_REF)
3737 return 1;
3738 else return (GET_CODE (x) == IF_THEN_ELSE
3739 && ((GET_CODE (XEXP (x, 2)) == PC
3740 && (GET_CODE (XEXP (x, 1)) == LABEL_REF
3741 || GET_CODE (XEXP (x, 1)) == RETURN))
3742 || (GET_CODE (XEXP (x, 1)) == PC
3743 && (GET_CODE (XEXP (x, 2)) == LABEL_REF
3744 || GET_CODE (XEXP (x, 2)) == RETURN))));
3745
3746 return 0;
3747 }
3748
3749 /* Return nonzero if INSN is a (possibly) conditional jump inside a
3750 PARALLEL. */
3751
3752 int
3753 condjump_in_parallel_p (insn)
3754 rtx insn;
3755 {
3756 register rtx x = PATTERN (insn);
3757
3758 if (GET_CODE (x) != PARALLEL)
3759 return 0;
3760 else
3761 x = XVECEXP (x, 0, 0);
3762
3763 if (GET_CODE (x) != SET)
3764 return 0;
3765 if (GET_CODE (SET_DEST (x)) != PC)
3766 return 0;
3767 if (GET_CODE (SET_SRC (x)) == LABEL_REF)
3768 return 1;
3769 if (GET_CODE (SET_SRC (x)) != IF_THEN_ELSE)
3770 return 0;
3771 if (XEXP (SET_SRC (x), 2) == pc_rtx
3772 && (GET_CODE (XEXP (SET_SRC (x), 1)) == LABEL_REF
3773 || GET_CODE (XEXP (SET_SRC (x), 1)) == RETURN))
3774 return 1;
3775 if (XEXP (SET_SRC (x), 1) == pc_rtx
3776 && (GET_CODE (XEXP (SET_SRC (x), 2)) == LABEL_REF
3777 || GET_CODE (XEXP (SET_SRC (x), 2)) == RETURN))
3778 return 1;
3779 return 0;
3780 }
3781
3782 /* Return the label of a conditional jump. */
3783
3784 rtx
3785 condjump_label (insn)
3786 rtx insn;
3787 {
3788 register rtx x = PATTERN (insn);
3789
3790 if (GET_CODE (x) == PARALLEL)
3791 x = XVECEXP (x, 0, 0);
3792 if (GET_CODE (x) != SET)
3793 return NULL_RTX;
3794 if (GET_CODE (SET_DEST (x)) != PC)
3795 return NULL_RTX;
3796 x = SET_SRC (x);
3797 if (GET_CODE (x) == LABEL_REF)
3798 return x;
3799 if (GET_CODE (x) != IF_THEN_ELSE)
3800 return NULL_RTX;
3801 if (XEXP (x, 2) == pc_rtx && GET_CODE (XEXP (x, 1)) == LABEL_REF)
3802 return XEXP (x, 1);
3803 if (XEXP (x, 1) == pc_rtx && GET_CODE (XEXP (x, 2)) == LABEL_REF)
3804 return XEXP (x, 2);
3805 return NULL_RTX;
3806 }
3807
3808 /* Return true if INSN is a (possibly conditional) return insn. */
3809
3810 static int
3811 returnjump_p_1 (loc, data)
3812 rtx *loc;
3813 void *data ATTRIBUTE_UNUSED;
3814 {
3815 rtx x = *loc;
3816 return x && GET_CODE (x) == RETURN;
3817 }
3818
3819 int
3820 returnjump_p (insn)
3821 rtx insn;
3822 {
3823 return for_each_rtx (&PATTERN (insn), returnjump_p_1, NULL);
3824 }
3825
3826 /* Return true if INSN is a jump that only transfers control and
3827 nothing more. */
3828
3829 int
3830 onlyjump_p (insn)
3831 rtx insn;
3832 {
3833 rtx set;
3834
3835 if (GET_CODE (insn) != JUMP_INSN)
3836 return 0;
3837
3838 set = single_set (insn);
3839 if (set == NULL)
3840 return 0;
3841 if (GET_CODE (SET_DEST (set)) != PC)
3842 return 0;
3843 if (side_effects_p (SET_SRC (set)))
3844 return 0;
3845
3846 return 1;
3847 }
3848
3849 #ifdef HAVE_cc0
3850
3851 /* Return 1 if X is an RTX that does nothing but set the condition codes
3852 and CLOBBER or USE registers.
3853 Return -1 if X does explicitly set the condition codes,
3854 but also does other things. */
3855
3856 int
3857 sets_cc0_p (x)
3858 rtx x ATTRIBUTE_UNUSED;
3859 {
3860 if (GET_CODE (x) == SET && SET_DEST (x) == cc0_rtx)
3861 return 1;
3862 if (GET_CODE (x) == PARALLEL)
3863 {
3864 int i;
3865 int sets_cc0 = 0;
3866 int other_things = 0;
3867 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
3868 {
3869 if (GET_CODE (XVECEXP (x, 0, i)) == SET
3870 && SET_DEST (XVECEXP (x, 0, i)) == cc0_rtx)
3871 sets_cc0 = 1;
3872 else if (GET_CODE (XVECEXP (x, 0, i)) == SET)
3873 other_things = 1;
3874 }
3875 return ! sets_cc0 ? 0 : other_things ? -1 : 1;
3876 }
3877 return 0;
3878 }
3879 #endif
3880 \f
3881 /* Follow any unconditional jump at LABEL;
3882 return the ultimate label reached by any such chain of jumps.
3883 If LABEL is not followed by a jump, return LABEL.
3884 If the chain loops or we can't find end, return LABEL,
3885 since that tells caller to avoid changing the insn.
3886
3887 If RELOAD_COMPLETED is 0, we do not chain across a NOTE_INSN_LOOP_BEG or
3888 a USE or CLOBBER. */
3889
3890 rtx
3891 follow_jumps (label)
3892 rtx label;
3893 {
3894 register rtx insn;
3895 register rtx next;
3896 register rtx value = label;
3897 register int depth;
3898
3899 for (depth = 0;
3900 (depth < 10
3901 && (insn = next_active_insn (value)) != 0
3902 && GET_CODE (insn) == JUMP_INSN
3903 && ((JUMP_LABEL (insn) != 0 && simplejump_p (insn))
3904 || GET_CODE (PATTERN (insn)) == RETURN)
3905 && (next = NEXT_INSN (insn))
3906 && GET_CODE (next) == BARRIER);
3907 depth++)
3908 {
3909 /* Don't chain through the insn that jumps into a loop
3910 from outside the loop,
3911 since that would create multiple loop entry jumps
3912 and prevent loop optimization. */
3913 rtx tem;
3914 if (!reload_completed)
3915 for (tem = value; tem != insn; tem = NEXT_INSN (tem))
3916 if (GET_CODE (tem) == NOTE
3917 && (NOTE_LINE_NUMBER (tem) == NOTE_INSN_LOOP_BEG
3918 /* ??? Optional. Disables some optimizations, but makes
3919 gcov output more accurate with -O. */
3920 || (flag_test_coverage && NOTE_LINE_NUMBER (tem) > 0)))
3921 return value;
3922
3923 /* If we have found a cycle, make the insn jump to itself. */
3924 if (JUMP_LABEL (insn) == label)
3925 return label;
3926
3927 tem = next_active_insn (JUMP_LABEL (insn));
3928 if (tem && (GET_CODE (PATTERN (tem)) == ADDR_VEC
3929 || GET_CODE (PATTERN (tem)) == ADDR_DIFF_VEC))
3930 break;
3931
3932 value = JUMP_LABEL (insn);
3933 }
3934 if (depth == 10)
3935 return label;
3936 return value;
3937 }
3938
3939 /* Assuming that field IDX of X is a vector of label_refs,
3940 replace each of them by the ultimate label reached by it.
3941 Return nonzero if a change is made.
3942 If IGNORE_LOOPS is 0, we do not chain across a NOTE_INSN_LOOP_BEG. */
3943
3944 static int
3945 tension_vector_labels (x, idx)
3946 register rtx x;
3947 register int idx;
3948 {
3949 int changed = 0;
3950 register int i;
3951 for (i = XVECLEN (x, idx) - 1; i >= 0; i--)
3952 {
3953 register rtx olabel = XEXP (XVECEXP (x, idx, i), 0);
3954 register rtx nlabel = follow_jumps (olabel);
3955 if (nlabel && nlabel != olabel)
3956 {
3957 XEXP (XVECEXP (x, idx, i), 0) = nlabel;
3958 ++LABEL_NUSES (nlabel);
3959 if (--LABEL_NUSES (olabel) == 0)
3960 delete_insn (olabel);
3961 changed = 1;
3962 }
3963 }
3964 return changed;
3965 }
3966 \f
3967 /* Find all CODE_LABELs referred to in X, and increment their use counts.
3968 If INSN is a JUMP_INSN and there is at least one CODE_LABEL referenced
3969 in INSN, then store one of them in JUMP_LABEL (INSN).
3970 If INSN is an INSN or a CALL_INSN and there is at least one CODE_LABEL
3971 referenced in INSN, add a REG_LABEL note containing that label to INSN.
3972 Also, when there are consecutive labels, canonicalize on the last of them.
3973
3974 Note that two labels separated by a loop-beginning note
3975 must be kept distinct if we have not yet done loop-optimization,
3976 because the gap between them is where loop-optimize
3977 will want to move invariant code to. CROSS_JUMP tells us
3978 that loop-optimization is done with.
3979
3980 Once reload has completed (CROSS_JUMP non-zero), we need not consider
3981 two labels distinct if they are separated by only USE or CLOBBER insns. */
3982
3983 static void
3984 mark_jump_label (x, insn, cross_jump)
3985 register rtx x;
3986 rtx insn;
3987 int cross_jump;
3988 {
3989 register RTX_CODE code = GET_CODE (x);
3990 register int i;
3991 register const char *fmt;
3992
3993 switch (code)
3994 {
3995 case PC:
3996 case CC0:
3997 case REG:
3998 case SUBREG:
3999 case CONST_INT:
4000 case SYMBOL_REF:
4001 case CONST_DOUBLE:
4002 case CLOBBER:
4003 case CALL:
4004 return;
4005
4006 case MEM:
4007 /* If this is a constant-pool reference, see if it is a label. */
4008 if (GET_CODE (XEXP (x, 0)) == SYMBOL_REF
4009 && CONSTANT_POOL_ADDRESS_P (XEXP (x, 0)))
4010 mark_jump_label (get_pool_constant (XEXP (x, 0)), insn, cross_jump);
4011 break;
4012
4013 case LABEL_REF:
4014 {
4015 rtx label = XEXP (x, 0);
4016 rtx olabel = label;
4017 rtx note;
4018 rtx next;
4019
4020 if (GET_CODE (label) != CODE_LABEL)
4021 abort ();
4022
4023 /* Ignore references to labels of containing functions. */
4024 if (LABEL_REF_NONLOCAL_P (x))
4025 break;
4026
4027 /* If there are other labels following this one,
4028 replace it with the last of the consecutive labels. */
4029 for (next = NEXT_INSN (label); next; next = NEXT_INSN (next))
4030 {
4031 if (GET_CODE (next) == CODE_LABEL)
4032 label = next;
4033 else if (cross_jump && GET_CODE (next) == INSN
4034 && (GET_CODE (PATTERN (next)) == USE
4035 || GET_CODE (PATTERN (next)) == CLOBBER))
4036 continue;
4037 else if (GET_CODE (next) != NOTE)
4038 break;
4039 else if (! cross_jump
4040 && (NOTE_LINE_NUMBER (next) == NOTE_INSN_LOOP_BEG
4041 || NOTE_LINE_NUMBER (next) == NOTE_INSN_FUNCTION_END
4042 /* ??? Optional. Disables some optimizations, but
4043 makes gcov output more accurate with -O. */
4044 || (flag_test_coverage && NOTE_LINE_NUMBER (next) > 0)))
4045 break;
4046 }
4047
4048 XEXP (x, 0) = label;
4049 if (! insn || ! INSN_DELETED_P (insn))
4050 ++LABEL_NUSES (label);
4051
4052 if (insn)
4053 {
4054 if (GET_CODE (insn) == JUMP_INSN)
4055 JUMP_LABEL (insn) = label;
4056
4057 /* If we've changed OLABEL and we had a REG_LABEL note
4058 for it, update it as well. */
4059 else if (label != olabel
4060 && (note = find_reg_note (insn, REG_LABEL, olabel)) != 0)
4061 XEXP (note, 0) = label;
4062
4063 /* Otherwise, add a REG_LABEL note for LABEL unless there already
4064 is one. */
4065 else if (! find_reg_note (insn, REG_LABEL, label))
4066 {
4067 /* This code used to ignore labels which refered to dispatch
4068 tables to avoid flow.c generating worse code.
4069
4070 However, in the presense of global optimizations like
4071 gcse which call find_basic_blocks without calling
4072 life_analysis, not recording such labels will lead
4073 to compiler aborts because of inconsistencies in the
4074 flow graph. So we go ahead and record the label.
4075
4076 It may also be the case that the optimization argument
4077 is no longer valid because of the more accurate cfg
4078 we build in find_basic_blocks -- it no longer pessimizes
4079 code when it finds a REG_LABEL note. */
4080 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_LABEL, label,
4081 REG_NOTES (insn));
4082 }
4083 }
4084 return;
4085 }
4086
4087 /* Do walk the labels in a vector, but not the first operand of an
4088 ADDR_DIFF_VEC. Don't set the JUMP_LABEL of a vector. */
4089 case ADDR_VEC:
4090 case ADDR_DIFF_VEC:
4091 if (! INSN_DELETED_P (insn))
4092 {
4093 int eltnum = code == ADDR_DIFF_VEC ? 1 : 0;
4094
4095 for (i = 0; i < XVECLEN (x, eltnum); i++)
4096 mark_jump_label (XVECEXP (x, eltnum, i), NULL_RTX, cross_jump);
4097 }
4098 return;
4099
4100 default:
4101 break;
4102 }
4103
4104 fmt = GET_RTX_FORMAT (code);
4105 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4106 {
4107 if (fmt[i] == 'e')
4108 mark_jump_label (XEXP (x, i), insn, cross_jump);
4109 else if (fmt[i] == 'E')
4110 {
4111 register int j;
4112 for (j = 0; j < XVECLEN (x, i); j++)
4113 mark_jump_label (XVECEXP (x, i, j), insn, cross_jump);
4114 }
4115 }
4116 }
4117
4118 /* If all INSN does is set the pc, delete it,
4119 and delete the insn that set the condition codes for it
4120 if that's what the previous thing was. */
4121
4122 void
4123 delete_jump (insn)
4124 rtx insn;
4125 {
4126 register rtx set = single_set (insn);
4127
4128 if (set && GET_CODE (SET_DEST (set)) == PC)
4129 delete_computation (insn);
4130 }
4131
4132 /* Verify INSN is a BARRIER and delete it. */
4133
4134 void
4135 delete_barrier (insn)
4136 rtx insn;
4137 {
4138 if (GET_CODE (insn) != BARRIER)
4139 abort ();
4140
4141 delete_insn (insn);
4142 }
4143
4144 /* Recursively delete prior insns that compute the value (used only by INSN
4145 which the caller is deleting) stored in the register mentioned by NOTE
4146 which is a REG_DEAD note associated with INSN. */
4147
4148 static void
4149 delete_prior_computation (note, insn)
4150 rtx note;
4151 rtx insn;
4152 {
4153 rtx our_prev;
4154 rtx reg = XEXP (note, 0);
4155
4156 for (our_prev = prev_nonnote_insn (insn);
4157 our_prev && (GET_CODE (our_prev) == INSN
4158 || GET_CODE (our_prev) == CALL_INSN);
4159 our_prev = prev_nonnote_insn (our_prev))
4160 {
4161 rtx pat = PATTERN (our_prev);
4162
4163 /* If we reach a CALL which is not calling a const function
4164 or the callee pops the arguments, then give up. */
4165 if (GET_CODE (our_prev) == CALL_INSN
4166 && (! CONST_CALL_P (our_prev)
4167 || GET_CODE (pat) != SET || GET_CODE (SET_SRC (pat)) != CALL))
4168 break;
4169
4170 /* If we reach a SEQUENCE, it is too complex to try to
4171 do anything with it, so give up. */
4172 if (GET_CODE (pat) == SEQUENCE)
4173 break;
4174
4175 if (GET_CODE (pat) == USE
4176 && GET_CODE (XEXP (pat, 0)) == INSN)
4177 /* reorg creates USEs that look like this. We leave them
4178 alone because reorg needs them for its own purposes. */
4179 break;
4180
4181 if (reg_set_p (reg, pat))
4182 {
4183 if (side_effects_p (pat) && GET_CODE (our_prev) != CALL_INSN)
4184 break;
4185
4186 if (GET_CODE (pat) == PARALLEL)
4187 {
4188 /* If we find a SET of something else, we can't
4189 delete the insn. */
4190
4191 int i;
4192
4193 for (i = 0; i < XVECLEN (pat, 0); i++)
4194 {
4195 rtx part = XVECEXP (pat, 0, i);
4196
4197 if (GET_CODE (part) == SET
4198 && SET_DEST (part) != reg)
4199 break;
4200 }
4201
4202 if (i == XVECLEN (pat, 0))
4203 delete_computation (our_prev);
4204 }
4205 else if (GET_CODE (pat) == SET
4206 && GET_CODE (SET_DEST (pat)) == REG)
4207 {
4208 int dest_regno = REGNO (SET_DEST (pat));
4209 int dest_endregno
4210 = dest_regno + (dest_regno < FIRST_PSEUDO_REGISTER
4211 ? HARD_REGNO_NREGS (dest_regno,
4212 GET_MODE (SET_DEST (pat))) : 1);
4213 int regno = REGNO (reg);
4214 int endregno = regno + (regno < FIRST_PSEUDO_REGISTER
4215 ? HARD_REGNO_NREGS (regno, GET_MODE (reg)) : 1);
4216
4217 if (dest_regno >= regno
4218 && dest_endregno <= endregno)
4219 delete_computation (our_prev);
4220
4221 /* We may have a multi-word hard register and some, but not
4222 all, of the words of the register are needed in subsequent
4223 insns. Write REG_UNUSED notes for those parts that were not
4224 needed. */
4225 else if (dest_regno <= regno
4226 && dest_endregno >= endregno)
4227 {
4228 int i;
4229
4230 REG_NOTES (our_prev)
4231 = gen_rtx_EXPR_LIST (REG_UNUSED, reg, REG_NOTES (our_prev));
4232
4233 for (i = dest_regno; i < dest_endregno; i++)
4234 if (! find_regno_note (our_prev, REG_UNUSED, i))
4235 break;
4236
4237 if (i == dest_endregno)
4238 delete_computation (our_prev);
4239 }
4240 }
4241
4242 break;
4243 }
4244
4245 /* If PAT references the register that dies here, it is an
4246 additional use. Hence any prior SET isn't dead. However, this
4247 insn becomes the new place for the REG_DEAD note. */
4248 if (reg_overlap_mentioned_p (reg, pat))
4249 {
4250 XEXP (note, 1) = REG_NOTES (our_prev);
4251 REG_NOTES (our_prev) = note;
4252 break;
4253 }
4254 }
4255 }
4256
4257 /* Delete INSN and recursively delete insns that compute values used only
4258 by INSN. This uses the REG_DEAD notes computed during flow analysis.
4259 If we are running before flow.c, we need do nothing since flow.c will
4260 delete dead code. We also can't know if the registers being used are
4261 dead or not at this point.
4262
4263 Otherwise, look at all our REG_DEAD notes. If a previous insn does
4264 nothing other than set a register that dies in this insn, we can delete
4265 that insn as well.
4266
4267 On machines with CC0, if CC0 is used in this insn, we may be able to
4268 delete the insn that set it. */
4269
4270 static void
4271 delete_computation (insn)
4272 rtx insn;
4273 {
4274 rtx note, next;
4275 rtx set;
4276
4277 #ifdef HAVE_cc0
4278 if (reg_referenced_p (cc0_rtx, PATTERN (insn)))
4279 {
4280 rtx prev = prev_nonnote_insn (insn);
4281 /* We assume that at this stage
4282 CC's are always set explicitly
4283 and always immediately before the jump that
4284 will use them. So if the previous insn
4285 exists to set the CC's, delete it
4286 (unless it performs auto-increments, etc.). */
4287 if (prev && GET_CODE (prev) == INSN
4288 && sets_cc0_p (PATTERN (prev)))
4289 {
4290 if (sets_cc0_p (PATTERN (prev)) > 0
4291 && ! side_effects_p (PATTERN (prev)))
4292 delete_computation (prev);
4293 else
4294 /* Otherwise, show that cc0 won't be used. */
4295 REG_NOTES (prev) = gen_rtx_EXPR_LIST (REG_UNUSED,
4296 cc0_rtx, REG_NOTES (prev));
4297 }
4298 }
4299 #endif
4300
4301 #ifdef INSN_SCHEDULING
4302 /* ?!? The schedulers do not keep REG_DEAD notes accurate after
4303 reload has completed. The schedulers need to be fixed. Until
4304 they are, we must not rely on the death notes here. */
4305 if (reload_completed && flag_schedule_insns_after_reload)
4306 {
4307 delete_insn (insn);
4308 return;
4309 }
4310 #endif
4311
4312 /* The REG_DEAD note may have been omitted for a register
4313 which is both set and used by the insn. */
4314 set = single_set (insn);
4315 if (set && GET_CODE (SET_DEST (set)) == REG)
4316 {
4317 int dest_regno = REGNO (SET_DEST (set));
4318 int dest_endregno
4319 = dest_regno + (dest_regno < FIRST_PSEUDO_REGISTER
4320 ? HARD_REGNO_NREGS (dest_regno,
4321 GET_MODE (SET_DEST (set))) : 1);
4322 int i;
4323
4324 for (i = dest_regno; i < dest_endregno; i++)
4325 {
4326 if (! refers_to_regno_p (i, i + 1, SET_SRC (set), NULL_PTR)
4327 || find_regno_note (insn, REG_DEAD, i))
4328 continue;
4329
4330 note = gen_rtx_EXPR_LIST (REG_DEAD, (i < FIRST_PSEUDO_REGISTER
4331 ? gen_rtx_REG (reg_raw_mode[i], i)
4332 : SET_DEST (set)), NULL_RTX);
4333 delete_prior_computation (note, insn);
4334 }
4335 }
4336
4337 for (note = REG_NOTES (insn); note; note = next)
4338 {
4339 next = XEXP (note, 1);
4340
4341 if (REG_NOTE_KIND (note) != REG_DEAD
4342 /* Verify that the REG_NOTE is legitimate. */
4343 || GET_CODE (XEXP (note, 0)) != REG)
4344 continue;
4345
4346 delete_prior_computation (note, insn);
4347 }
4348
4349 delete_insn (insn);
4350 }
4351 \f
4352 /* Delete insn INSN from the chain of insns and update label ref counts.
4353 May delete some following insns as a consequence; may even delete
4354 a label elsewhere and insns that follow it.
4355
4356 Returns the first insn after INSN that was not deleted. */
4357
4358 rtx
4359 delete_insn (insn)
4360 register rtx insn;
4361 {
4362 register rtx next = NEXT_INSN (insn);
4363 register rtx prev = PREV_INSN (insn);
4364 register int was_code_label = (GET_CODE (insn) == CODE_LABEL);
4365 register int dont_really_delete = 0;
4366
4367 while (next && INSN_DELETED_P (next))
4368 next = NEXT_INSN (next);
4369
4370 /* This insn is already deleted => return first following nondeleted. */
4371 if (INSN_DELETED_P (insn))
4372 return next;
4373
4374 if (was_code_label)
4375 remove_node_from_expr_list (insn, &nonlocal_goto_handler_labels);
4376
4377 /* Don't delete user-declared labels. Convert them to special NOTEs
4378 instead. */
4379 if (was_code_label && LABEL_NAME (insn) != 0 && ! dont_really_delete)
4380 {
4381 PUT_CODE (insn, NOTE);
4382 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED_LABEL;
4383 NOTE_SOURCE_FILE (insn) = 0;
4384 dont_really_delete = 1;
4385 }
4386 else
4387 /* Mark this insn as deleted. */
4388 INSN_DELETED_P (insn) = 1;
4389
4390 /* If this is an unconditional jump, delete it from the jump chain. */
4391 if (simplejump_p (insn))
4392 delete_from_jump_chain (insn);
4393
4394 /* If instruction is followed by a barrier,
4395 delete the barrier too. */
4396
4397 if (next != 0 && GET_CODE (next) == BARRIER)
4398 {
4399 INSN_DELETED_P (next) = 1;
4400 next = NEXT_INSN (next);
4401 }
4402
4403 /* Patch out INSN (and the barrier if any) */
4404
4405 if (! dont_really_delete)
4406 {
4407 if (prev)
4408 {
4409 NEXT_INSN (prev) = next;
4410 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
4411 NEXT_INSN (XVECEXP (PATTERN (prev), 0,
4412 XVECLEN (PATTERN (prev), 0) - 1)) = next;
4413 }
4414
4415 if (next)
4416 {
4417 PREV_INSN (next) = prev;
4418 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
4419 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
4420 }
4421
4422 if (prev && NEXT_INSN (prev) == 0)
4423 set_last_insn (prev);
4424 }
4425
4426 /* If deleting a jump, decrement the count of the label,
4427 and delete the label if it is now unused. */
4428
4429 if (GET_CODE (insn) == JUMP_INSN && JUMP_LABEL (insn))
4430 {
4431 rtx lab = JUMP_LABEL (insn), lab_next;
4432
4433 if (--LABEL_NUSES (lab) == 0)
4434 {
4435 /* This can delete NEXT or PREV,
4436 either directly if NEXT is JUMP_LABEL (INSN),
4437 or indirectly through more levels of jumps. */
4438 delete_insn (lab);
4439
4440 /* I feel a little doubtful about this loop,
4441 but I see no clean and sure alternative way
4442 to find the first insn after INSN that is not now deleted.
4443 I hope this works. */
4444 while (next && INSN_DELETED_P (next))
4445 next = NEXT_INSN (next);
4446 return next;
4447 }
4448 else if ((lab_next = next_nonnote_insn (lab)) != NULL
4449 && GET_CODE (lab_next) == JUMP_INSN
4450 && (GET_CODE (PATTERN (lab_next)) == ADDR_VEC
4451 || GET_CODE (PATTERN (lab_next)) == ADDR_DIFF_VEC))
4452 {
4453 /* If we're deleting the tablejump, delete the dispatch table.
4454 We may not be able to kill the label immediately preceeding
4455 just yet, as it might be referenced in code leading up to
4456 the tablejump. */
4457 delete_insn (lab_next);
4458 }
4459 }
4460
4461 /* Likewise if we're deleting a dispatch table. */
4462
4463 if (GET_CODE (insn) == JUMP_INSN
4464 && (GET_CODE (PATTERN (insn)) == ADDR_VEC
4465 || GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC))
4466 {
4467 rtx pat = PATTERN (insn);
4468 int i, diff_vec_p = GET_CODE (pat) == ADDR_DIFF_VEC;
4469 int len = XVECLEN (pat, diff_vec_p);
4470
4471 for (i = 0; i < len; i++)
4472 if (--LABEL_NUSES (XEXP (XVECEXP (pat, diff_vec_p, i), 0)) == 0)
4473 delete_insn (XEXP (XVECEXP (pat, diff_vec_p, i), 0));
4474 while (next && INSN_DELETED_P (next))
4475 next = NEXT_INSN (next);
4476 return next;
4477 }
4478
4479 while (prev && (INSN_DELETED_P (prev) || GET_CODE (prev) == NOTE))
4480 prev = PREV_INSN (prev);
4481
4482 /* If INSN was a label and a dispatch table follows it,
4483 delete the dispatch table. The tablejump must have gone already.
4484 It isn't useful to fall through into a table. */
4485
4486 if (was_code_label
4487 && NEXT_INSN (insn) != 0
4488 && GET_CODE (NEXT_INSN (insn)) == JUMP_INSN
4489 && (GET_CODE (PATTERN (NEXT_INSN (insn))) == ADDR_VEC
4490 || GET_CODE (PATTERN (NEXT_INSN (insn))) == ADDR_DIFF_VEC))
4491 next = delete_insn (NEXT_INSN (insn));
4492
4493 /* If INSN was a label, delete insns following it if now unreachable. */
4494
4495 if (was_code_label && prev && GET_CODE (prev) == BARRIER)
4496 {
4497 register RTX_CODE code;
4498 while (next != 0
4499 && (GET_RTX_CLASS (code = GET_CODE (next)) == 'i'
4500 || code == NOTE || code == BARRIER
4501 || (code == CODE_LABEL && INSN_DELETED_P (next))))
4502 {
4503 if (code == NOTE
4504 && NOTE_LINE_NUMBER (next) != NOTE_INSN_FUNCTION_END)
4505 next = NEXT_INSN (next);
4506 /* Keep going past other deleted labels to delete what follows. */
4507 else if (code == CODE_LABEL && INSN_DELETED_P (next))
4508 next = NEXT_INSN (next);
4509 else
4510 /* Note: if this deletes a jump, it can cause more
4511 deletion of unreachable code, after a different label.
4512 As long as the value from this recursive call is correct,
4513 this invocation functions correctly. */
4514 next = delete_insn (next);
4515 }
4516 }
4517
4518 return next;
4519 }
4520
4521 /* Advance from INSN till reaching something not deleted
4522 then return that. May return INSN itself. */
4523
4524 rtx
4525 next_nondeleted_insn (insn)
4526 rtx insn;
4527 {
4528 while (INSN_DELETED_P (insn))
4529 insn = NEXT_INSN (insn);
4530 return insn;
4531 }
4532 \f
4533 /* Delete a range of insns from FROM to TO, inclusive.
4534 This is for the sake of peephole optimization, so assume
4535 that whatever these insns do will still be done by a new
4536 peephole insn that will replace them. */
4537
4538 void
4539 delete_for_peephole (from, to)
4540 register rtx from, to;
4541 {
4542 register rtx insn = from;
4543
4544 while (1)
4545 {
4546 register rtx next = NEXT_INSN (insn);
4547 register rtx prev = PREV_INSN (insn);
4548
4549 if (GET_CODE (insn) != NOTE)
4550 {
4551 INSN_DELETED_P (insn) = 1;
4552
4553 /* Patch this insn out of the chain. */
4554 /* We don't do this all at once, because we
4555 must preserve all NOTEs. */
4556 if (prev)
4557 NEXT_INSN (prev) = next;
4558
4559 if (next)
4560 PREV_INSN (next) = prev;
4561 }
4562
4563 if (insn == to)
4564 break;
4565 insn = next;
4566 }
4567
4568 /* Note that if TO is an unconditional jump
4569 we *do not* delete the BARRIER that follows,
4570 since the peephole that replaces this sequence
4571 is also an unconditional jump in that case. */
4572 }
4573 \f
4574 /* We have determined that INSN is never reached, and are about to
4575 delete it. Print a warning if the user asked for one.
4576
4577 To try to make this warning more useful, this should only be called
4578 once per basic block not reached, and it only warns when the basic
4579 block contains more than one line from the current function, and
4580 contains at least one operation. CSE and inlining can duplicate insns,
4581 so it's possible to get spurious warnings from this. */
4582
4583 void
4584 never_reached_warning (avoided_insn)
4585 rtx avoided_insn;
4586 {
4587 rtx insn;
4588 rtx a_line_note = NULL;
4589 int two_avoided_lines = 0;
4590 int contains_insn = 0;
4591
4592 if (! warn_notreached)
4593 return;
4594
4595 /* Scan forwards, looking at LINE_NUMBER notes, until
4596 we hit a LABEL or we run out of insns. */
4597
4598 for (insn = avoided_insn; insn != NULL; insn = NEXT_INSN (insn))
4599 {
4600 if (GET_CODE (insn) == CODE_LABEL)
4601 break;
4602 else if (GET_CODE (insn) == NOTE /* A line number note? */
4603 && NOTE_LINE_NUMBER (insn) >= 0)
4604 {
4605 if (a_line_note == NULL)
4606 a_line_note = insn;
4607 else
4608 two_avoided_lines |= (NOTE_LINE_NUMBER (a_line_note)
4609 != NOTE_LINE_NUMBER (insn));
4610 }
4611 else if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
4612 contains_insn = 1;
4613 }
4614 if (two_avoided_lines && contains_insn)
4615 warning_with_file_and_line (NOTE_SOURCE_FILE (a_line_note),
4616 NOTE_LINE_NUMBER (a_line_note),
4617 "will never be executed");
4618 }
4619 \f
4620 /* Invert the condition of the jump JUMP, and make it jump
4621 to label NLABEL instead of where it jumps now. */
4622
4623 int
4624 invert_jump (jump, nlabel)
4625 rtx jump, nlabel;
4626 {
4627 /* We have to either invert the condition and change the label or
4628 do neither. Either operation could fail. We first try to invert
4629 the jump. If that succeeds, we try changing the label. If that fails,
4630 we invert the jump back to what it was. */
4631
4632 if (! invert_exp (PATTERN (jump), jump))
4633 return 0;
4634
4635 if (redirect_jump (jump, nlabel))
4636 {
4637 if (flag_branch_probabilities)
4638 {
4639 rtx note = find_reg_note (jump, REG_BR_PROB, 0);
4640
4641 /* An inverted jump means that a probability taken becomes a
4642 probability not taken. Subtract the branch probability from the
4643 probability base to convert it back to a taken probability.
4644 (We don't flip the probability on a branch that's never taken. */
4645 if (note && XINT (XEXP (note, 0), 0) >= 0)
4646 XINT (XEXP (note, 0), 0) = REG_BR_PROB_BASE - XINT (XEXP (note, 0), 0);
4647 }
4648
4649 return 1;
4650 }
4651
4652 if (! invert_exp (PATTERN (jump), jump))
4653 /* This should just be putting it back the way it was. */
4654 abort ();
4655
4656 return 0;
4657 }
4658
4659 /* Invert the jump condition of rtx X contained in jump insn, INSN.
4660
4661 Return 1 if we can do so, 0 if we cannot find a way to do so that
4662 matches a pattern. */
4663
4664 int
4665 invert_exp (x, insn)
4666 rtx x;
4667 rtx insn;
4668 {
4669 register RTX_CODE code;
4670 register int i;
4671 register const char *fmt;
4672
4673 code = GET_CODE (x);
4674
4675 if (code == IF_THEN_ELSE)
4676 {
4677 register rtx comp = XEXP (x, 0);
4678 register rtx tem;
4679
4680 /* We can do this in two ways: The preferable way, which can only
4681 be done if this is not an integer comparison, is to reverse
4682 the comparison code. Otherwise, swap the THEN-part and ELSE-part
4683 of the IF_THEN_ELSE. If we can't do either, fail. */
4684
4685 if (can_reverse_comparison_p (comp, insn)
4686 && validate_change (insn, &XEXP (x, 0),
4687 gen_rtx_fmt_ee (reverse_condition (GET_CODE (comp)),
4688 GET_MODE (comp), XEXP (comp, 0),
4689 XEXP (comp, 1)), 0))
4690 return 1;
4691
4692 tem = XEXP (x, 1);
4693 validate_change (insn, &XEXP (x, 1), XEXP (x, 2), 1);
4694 validate_change (insn, &XEXP (x, 2), tem, 1);
4695 return apply_change_group ();
4696 }
4697
4698 fmt = GET_RTX_FORMAT (code);
4699 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4700 {
4701 if (fmt[i] == 'e')
4702 {
4703 if (! invert_exp (XEXP (x, i), insn))
4704 return 0;
4705 }
4706 else if (fmt[i] == 'E')
4707 {
4708 register int j;
4709 for (j = 0; j < XVECLEN (x, i); j++)
4710 if (!invert_exp (XVECEXP (x, i, j), insn))
4711 return 0;
4712 }
4713 }
4714
4715 return 1;
4716 }
4717 \f
4718 /* Make jump JUMP jump to label NLABEL instead of where it jumps now.
4719 If the old jump target label is unused as a result,
4720 it and the code following it may be deleted.
4721
4722 If NLABEL is zero, we are to turn the jump into a (possibly conditional)
4723 RETURN insn.
4724
4725 The return value will be 1 if the change was made, 0 if it wasn't (this
4726 can only occur for NLABEL == 0). */
4727
4728 int
4729 redirect_jump (jump, nlabel)
4730 rtx jump, nlabel;
4731 {
4732 register rtx olabel = JUMP_LABEL (jump);
4733
4734 if (nlabel == olabel)
4735 return 1;
4736
4737 if (! redirect_exp (&PATTERN (jump), olabel, nlabel, jump))
4738 return 0;
4739
4740 /* If this is an unconditional branch, delete it from the jump_chain of
4741 OLABEL and add it to the jump_chain of NLABEL (assuming both labels
4742 have UID's in range and JUMP_CHAIN is valid). */
4743 if (jump_chain && (simplejump_p (jump)
4744 || GET_CODE (PATTERN (jump)) == RETURN))
4745 {
4746 int label_index = nlabel ? INSN_UID (nlabel) : 0;
4747
4748 delete_from_jump_chain (jump);
4749 if (label_index < max_jump_chain
4750 && INSN_UID (jump) < max_jump_chain)
4751 {
4752 jump_chain[INSN_UID (jump)] = jump_chain[label_index];
4753 jump_chain[label_index] = jump;
4754 }
4755 }
4756
4757 JUMP_LABEL (jump) = nlabel;
4758 if (nlabel)
4759 ++LABEL_NUSES (nlabel);
4760
4761 if (olabel && --LABEL_NUSES (olabel) == 0)
4762 delete_insn (olabel);
4763
4764 return 1;
4765 }
4766
4767 /* Delete the instruction JUMP from any jump chain it might be on. */
4768
4769 static void
4770 delete_from_jump_chain (jump)
4771 rtx jump;
4772 {
4773 int index;
4774 rtx olabel = JUMP_LABEL (jump);
4775
4776 /* Handle unconditional jumps. */
4777 if (jump_chain && olabel != 0
4778 && INSN_UID (olabel) < max_jump_chain
4779 && simplejump_p (jump))
4780 index = INSN_UID (olabel);
4781 /* Handle return insns. */
4782 else if (jump_chain && GET_CODE (PATTERN (jump)) == RETURN)
4783 index = 0;
4784 else return;
4785
4786 if (jump_chain[index] == jump)
4787 jump_chain[index] = jump_chain[INSN_UID (jump)];
4788 else
4789 {
4790 rtx insn;
4791
4792 for (insn = jump_chain[index];
4793 insn != 0;
4794 insn = jump_chain[INSN_UID (insn)])
4795 if (jump_chain[INSN_UID (insn)] == jump)
4796 {
4797 jump_chain[INSN_UID (insn)] = jump_chain[INSN_UID (jump)];
4798 break;
4799 }
4800 }
4801 }
4802
4803 /* If NLABEL is nonzero, throughout the rtx at LOC,
4804 alter (LABEL_REF OLABEL) to (LABEL_REF NLABEL). If OLABEL is
4805 zero, alter (RETURN) to (LABEL_REF NLABEL).
4806
4807 If NLABEL is zero, alter (LABEL_REF OLABEL) to (RETURN) and check
4808 validity with validate_change. Convert (set (pc) (label_ref olabel))
4809 to (return).
4810
4811 Return 0 if we found a change we would like to make but it is invalid.
4812 Otherwise, return 1. */
4813
4814 int
4815 redirect_exp (loc, olabel, nlabel, insn)
4816 rtx *loc;
4817 rtx olabel, nlabel;
4818 rtx insn;
4819 {
4820 register rtx x = *loc;
4821 register RTX_CODE code = GET_CODE (x);
4822 register int i;
4823 register const char *fmt;
4824
4825 if (code == LABEL_REF)
4826 {
4827 if (XEXP (x, 0) == olabel)
4828 {
4829 if (nlabel)
4830 XEXP (x, 0) = nlabel;
4831 else
4832 return validate_change (insn, loc, gen_rtx_RETURN (VOIDmode), 0);
4833 return 1;
4834 }
4835 }
4836 else if (code == RETURN && olabel == 0)
4837 {
4838 x = gen_rtx_LABEL_REF (VOIDmode, nlabel);
4839 if (loc == &PATTERN (insn))
4840 x = gen_rtx_SET (VOIDmode, pc_rtx, x);
4841 return validate_change (insn, loc, x, 0);
4842 }
4843
4844 if (code == SET && nlabel == 0 && SET_DEST (x) == pc_rtx
4845 && GET_CODE (SET_SRC (x)) == LABEL_REF
4846 && XEXP (SET_SRC (x), 0) == olabel)
4847 return validate_change (insn, loc, gen_rtx_RETURN (VOIDmode), 0);
4848
4849 fmt = GET_RTX_FORMAT (code);
4850 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4851 {
4852 if (fmt[i] == 'e')
4853 {
4854 if (! redirect_exp (&XEXP (x, i), olabel, nlabel, insn))
4855 return 0;
4856 }
4857 else if (fmt[i] == 'E')
4858 {
4859 register int j;
4860 for (j = 0; j < XVECLEN (x, i); j++)
4861 if (! redirect_exp (&XVECEXP (x, i, j), olabel, nlabel, insn))
4862 return 0;
4863 }
4864 }
4865
4866 return 1;
4867 }
4868 \f
4869 /* Make jump JUMP jump to label NLABEL, assuming it used to be a tablejump.
4870
4871 If the old jump target label (before the dispatch table) becomes unused,
4872 it and the dispatch table may be deleted. In that case, find the insn
4873 before the jump references that label and delete it and logical successors
4874 too. */
4875
4876 static void
4877 redirect_tablejump (jump, nlabel)
4878 rtx jump, nlabel;
4879 {
4880 register rtx olabel = JUMP_LABEL (jump);
4881
4882 /* Add this jump to the jump_chain of NLABEL. */
4883 if (jump_chain && INSN_UID (nlabel) < max_jump_chain
4884 && INSN_UID (jump) < max_jump_chain)
4885 {
4886 jump_chain[INSN_UID (jump)] = jump_chain[INSN_UID (nlabel)];
4887 jump_chain[INSN_UID (nlabel)] = jump;
4888 }
4889
4890 PATTERN (jump) = gen_jump (nlabel);
4891 JUMP_LABEL (jump) = nlabel;
4892 ++LABEL_NUSES (nlabel);
4893 INSN_CODE (jump) = -1;
4894
4895 if (--LABEL_NUSES (olabel) == 0)
4896 {
4897 delete_labelref_insn (jump, olabel, 0);
4898 delete_insn (olabel);
4899 }
4900 }
4901
4902 /* Find the insn referencing LABEL that is a logical predecessor of INSN.
4903 If we found one, delete it and then delete this insn if DELETE_THIS is
4904 non-zero. Return non-zero if INSN or a predecessor references LABEL. */
4905
4906 static int
4907 delete_labelref_insn (insn, label, delete_this)
4908 rtx insn, label;
4909 int delete_this;
4910 {
4911 int deleted = 0;
4912 rtx link;
4913
4914 if (GET_CODE (insn) != NOTE
4915 && reg_mentioned_p (label, PATTERN (insn)))
4916 {
4917 if (delete_this)
4918 {
4919 delete_insn (insn);
4920 deleted = 1;
4921 }
4922 else
4923 return 1;
4924 }
4925
4926 for (link = LOG_LINKS (insn); link; link = XEXP (link, 1))
4927 if (delete_labelref_insn (XEXP (link, 0), label, 1))
4928 {
4929 if (delete_this)
4930 {
4931 delete_insn (insn);
4932 deleted = 1;
4933 }
4934 else
4935 return 1;
4936 }
4937
4938 return deleted;
4939 }
4940 \f
4941 /* Like rtx_equal_p except that it considers two REGs as equal
4942 if they renumber to the same value and considers two commutative
4943 operations to be the same if the order of the operands has been
4944 reversed.
4945
4946 ??? Addition is not commutative on the PA due to the weird implicit
4947 space register selection rules for memory addresses. Therefore, we
4948 don't consider a + b == b + a.
4949
4950 We could/should make this test a little tighter. Possibly only
4951 disabling it on the PA via some backend macro or only disabling this
4952 case when the PLUS is inside a MEM. */
4953
4954 int
4955 rtx_renumbered_equal_p (x, y)
4956 rtx x, y;
4957 {
4958 register int i;
4959 register RTX_CODE code = GET_CODE (x);
4960 register const char *fmt;
4961
4962 if (x == y)
4963 return 1;
4964
4965 if ((code == REG || (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG))
4966 && (GET_CODE (y) == REG || (GET_CODE (y) == SUBREG
4967 && GET_CODE (SUBREG_REG (y)) == REG)))
4968 {
4969 int reg_x = -1, reg_y = -1;
4970 int word_x = 0, word_y = 0;
4971
4972 if (GET_MODE (x) != GET_MODE (y))
4973 return 0;
4974
4975 /* If we haven't done any renumbering, don't
4976 make any assumptions. */
4977 if (reg_renumber == 0)
4978 return rtx_equal_p (x, y);
4979
4980 if (code == SUBREG)
4981 {
4982 reg_x = REGNO (SUBREG_REG (x));
4983 word_x = SUBREG_WORD (x);
4984
4985 if (reg_renumber[reg_x] >= 0)
4986 {
4987 reg_x = reg_renumber[reg_x] + word_x;
4988 word_x = 0;
4989 }
4990 }
4991
4992 else
4993 {
4994 reg_x = REGNO (x);
4995 if (reg_renumber[reg_x] >= 0)
4996 reg_x = reg_renumber[reg_x];
4997 }
4998
4999 if (GET_CODE (y) == SUBREG)
5000 {
5001 reg_y = REGNO (SUBREG_REG (y));
5002 word_y = SUBREG_WORD (y);
5003
5004 if (reg_renumber[reg_y] >= 0)
5005 {
5006 reg_y = reg_renumber[reg_y];
5007 word_y = 0;
5008 }
5009 }
5010
5011 else
5012 {
5013 reg_y = REGNO (y);
5014 if (reg_renumber[reg_y] >= 0)
5015 reg_y = reg_renumber[reg_y];
5016 }
5017
5018 return reg_x >= 0 && reg_x == reg_y && word_x == word_y;
5019 }
5020
5021 /* Now we have disposed of all the cases
5022 in which different rtx codes can match. */
5023 if (code != GET_CODE (y))
5024 return 0;
5025
5026 switch (code)
5027 {
5028 case PC:
5029 case CC0:
5030 case ADDR_VEC:
5031 case ADDR_DIFF_VEC:
5032 return 0;
5033
5034 case CONST_INT:
5035 return INTVAL (x) == INTVAL (y);
5036
5037 case LABEL_REF:
5038 /* We can't assume nonlocal labels have their following insns yet. */
5039 if (LABEL_REF_NONLOCAL_P (x) || LABEL_REF_NONLOCAL_P (y))
5040 return XEXP (x, 0) == XEXP (y, 0);
5041
5042 /* Two label-refs are equivalent if they point at labels
5043 in the same position in the instruction stream. */
5044 return (next_real_insn (XEXP (x, 0))
5045 == next_real_insn (XEXP (y, 0)));
5046
5047 case SYMBOL_REF:
5048 return XSTR (x, 0) == XSTR (y, 0);
5049
5050 case CODE_LABEL:
5051 /* If we didn't match EQ equality above, they aren't the same. */
5052 return 0;
5053
5054 default:
5055 break;
5056 }
5057
5058 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
5059
5060 if (GET_MODE (x) != GET_MODE (y))
5061 return 0;
5062
5063 /* For commutative operations, the RTX match if the operand match in any
5064 order. Also handle the simple binary and unary cases without a loop.
5065
5066 ??? Don't consider PLUS a commutative operator; see comments above. */
5067 if ((code == EQ || code == NE || GET_RTX_CLASS (code) == 'c')
5068 && code != PLUS)
5069 return ((rtx_renumbered_equal_p (XEXP (x, 0), XEXP (y, 0))
5070 && rtx_renumbered_equal_p (XEXP (x, 1), XEXP (y, 1)))
5071 || (rtx_renumbered_equal_p (XEXP (x, 0), XEXP (y, 1))
5072 && rtx_renumbered_equal_p (XEXP (x, 1), XEXP (y, 0))));
5073 else if (GET_RTX_CLASS (code) == '<' || GET_RTX_CLASS (code) == '2')
5074 return (rtx_renumbered_equal_p (XEXP (x, 0), XEXP (y, 0))
5075 && rtx_renumbered_equal_p (XEXP (x, 1), XEXP (y, 1)));
5076 else if (GET_RTX_CLASS (code) == '1')
5077 return rtx_renumbered_equal_p (XEXP (x, 0), XEXP (y, 0));
5078
5079 /* Compare the elements. If any pair of corresponding elements
5080 fail to match, return 0 for the whole things. */
5081
5082 fmt = GET_RTX_FORMAT (code);
5083 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5084 {
5085 register int j;
5086 switch (fmt[i])
5087 {
5088 case 'w':
5089 if (XWINT (x, i) != XWINT (y, i))
5090 return 0;
5091 break;
5092
5093 case 'i':
5094 if (XINT (x, i) != XINT (y, i))
5095 return 0;
5096 break;
5097
5098 case 's':
5099 if (strcmp (XSTR (x, i), XSTR (y, i)))
5100 return 0;
5101 break;
5102
5103 case 'e':
5104 if (! rtx_renumbered_equal_p (XEXP (x, i), XEXP (y, i)))
5105 return 0;
5106 break;
5107
5108 case 'u':
5109 if (XEXP (x, i) != XEXP (y, i))
5110 return 0;
5111 /* fall through. */
5112 case '0':
5113 break;
5114
5115 case 'E':
5116 if (XVECLEN (x, i) != XVECLEN (y, i))
5117 return 0;
5118 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
5119 if (!rtx_renumbered_equal_p (XVECEXP (x, i, j), XVECEXP (y, i, j)))
5120 return 0;
5121 break;
5122
5123 default:
5124 abort ();
5125 }
5126 }
5127 return 1;
5128 }
5129 \f
5130 /* If X is a hard register or equivalent to one or a subregister of one,
5131 return the hard register number. If X is a pseudo register that was not
5132 assigned a hard register, return the pseudo register number. Otherwise,
5133 return -1. Any rtx is valid for X. */
5134
5135 int
5136 true_regnum (x)
5137 rtx x;
5138 {
5139 if (GET_CODE (x) == REG)
5140 {
5141 if (REGNO (x) >= FIRST_PSEUDO_REGISTER && reg_renumber[REGNO (x)] >= 0)
5142 return reg_renumber[REGNO (x)];
5143 return REGNO (x);
5144 }
5145 if (GET_CODE (x) == SUBREG)
5146 {
5147 int base = true_regnum (SUBREG_REG (x));
5148 if (base >= 0 && base < FIRST_PSEUDO_REGISTER)
5149 return SUBREG_WORD (x) + base;
5150 }
5151 return -1;
5152 }
5153 \f
5154 /* Optimize code of the form:
5155
5156 for (x = a[i]; x; ...)
5157 ...
5158 for (x = a[i]; x; ...)
5159 ...
5160 foo:
5161
5162 Loop optimize will change the above code into
5163
5164 if (x = a[i])
5165 for (;;)
5166 { ...; if (! (x = ...)) break; }
5167 if (x = a[i])
5168 for (;;)
5169 { ...; if (! (x = ...)) break; }
5170 foo:
5171
5172 In general, if the first test fails, the program can branch
5173 directly to `foo' and skip the second try which is doomed to fail.
5174 We run this after loop optimization and before flow analysis. */
5175
5176 /* When comparing the insn patterns, we track the fact that different
5177 pseudo-register numbers may have been used in each computation.
5178 The following array stores an equivalence -- same_regs[I] == J means
5179 that pseudo register I was used in the first set of tests in a context
5180 where J was used in the second set. We also count the number of such
5181 pending equivalences. If nonzero, the expressions really aren't the
5182 same. */
5183
5184 static int *same_regs;
5185
5186 static int num_same_regs;
5187
5188 /* Track any registers modified between the target of the first jump and
5189 the second jump. They never compare equal. */
5190
5191 static char *modified_regs;
5192
5193 /* Record if memory was modified. */
5194
5195 static int modified_mem;
5196
5197 /* Called via note_stores on each insn between the target of the first
5198 branch and the second branch. It marks any changed registers. */
5199
5200 static void
5201 mark_modified_reg (dest, x, data)
5202 rtx dest;
5203 rtx x ATTRIBUTE_UNUSED;
5204 void *data ATTRIBUTE_UNUSED;
5205 {
5206 int regno, i;
5207
5208 if (GET_CODE (dest) == SUBREG)
5209 dest = SUBREG_REG (dest);
5210
5211 if (GET_CODE (dest) == MEM)
5212 modified_mem = 1;
5213
5214 if (GET_CODE (dest) != REG)
5215 return;
5216
5217 regno = REGNO (dest);
5218 if (regno >= FIRST_PSEUDO_REGISTER)
5219 modified_regs[regno] = 1;
5220 else
5221 for (i = 0; i < HARD_REGNO_NREGS (regno, GET_MODE (dest)); i++)
5222 modified_regs[regno + i] = 1;
5223 }
5224
5225 /* F is the first insn in the chain of insns. */
5226
5227 void
5228 thread_jumps (f, max_reg, flag_before_loop)
5229 rtx f;
5230 int max_reg;
5231 int flag_before_loop;
5232 {
5233 /* Basic algorithm is to find a conditional branch,
5234 the label it may branch to, and the branch after
5235 that label. If the two branches test the same condition,
5236 walk back from both branch paths until the insn patterns
5237 differ, or code labels are hit. If we make it back to
5238 the target of the first branch, then we know that the first branch
5239 will either always succeed or always fail depending on the relative
5240 senses of the two branches. So adjust the first branch accordingly
5241 in this case. */
5242
5243 rtx label, b1, b2, t1, t2;
5244 enum rtx_code code1, code2;
5245 rtx b1op0, b1op1, b2op0, b2op1;
5246 int changed = 1;
5247 int i;
5248 int *all_reset;
5249
5250 /* Allocate register tables and quick-reset table. */
5251 modified_regs = (char *) xmalloc (max_reg * sizeof (char));
5252 same_regs = (int *) xmalloc (max_reg * sizeof (int));
5253 all_reset = (int *) xmalloc (max_reg * sizeof (int));
5254 for (i = 0; i < max_reg; i++)
5255 all_reset[i] = -1;
5256
5257 while (changed)
5258 {
5259 changed = 0;
5260
5261 for (b1 = f; b1; b1 = NEXT_INSN (b1))
5262 {
5263 /* Get to a candidate branch insn. */
5264 if (GET_CODE (b1) != JUMP_INSN
5265 || ! condjump_p (b1) || simplejump_p (b1)
5266 || JUMP_LABEL (b1) == 0)
5267 continue;
5268
5269 bzero (modified_regs, max_reg * sizeof (char));
5270 modified_mem = 0;
5271
5272 bcopy ((char *) all_reset, (char *) same_regs,
5273 max_reg * sizeof (int));
5274 num_same_regs = 0;
5275
5276 label = JUMP_LABEL (b1);
5277
5278 /* Look for a branch after the target. Record any registers and
5279 memory modified between the target and the branch. Stop when we
5280 get to a label since we can't know what was changed there. */
5281 for (b2 = NEXT_INSN (label); b2; b2 = NEXT_INSN (b2))
5282 {
5283 if (GET_CODE (b2) == CODE_LABEL)
5284 break;
5285
5286 else if (GET_CODE (b2) == JUMP_INSN)
5287 {
5288 /* If this is an unconditional jump and is the only use of
5289 its target label, we can follow it. */
5290 if (simplejump_p (b2)
5291 && JUMP_LABEL (b2) != 0
5292 && LABEL_NUSES (JUMP_LABEL (b2)) == 1)
5293 {
5294 b2 = JUMP_LABEL (b2);
5295 continue;
5296 }
5297 else
5298 break;
5299 }
5300
5301 if (GET_CODE (b2) != CALL_INSN && GET_CODE (b2) != INSN)
5302 continue;
5303
5304 if (GET_CODE (b2) == CALL_INSN)
5305 {
5306 modified_mem = 1;
5307 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
5308 if (call_used_regs[i] && ! fixed_regs[i]
5309 && i != STACK_POINTER_REGNUM
5310 && i != FRAME_POINTER_REGNUM
5311 && i != HARD_FRAME_POINTER_REGNUM
5312 && i != ARG_POINTER_REGNUM)
5313 modified_regs[i] = 1;
5314 }
5315
5316 note_stores (PATTERN (b2), mark_modified_reg, NULL);
5317 }
5318
5319 /* Check the next candidate branch insn from the label
5320 of the first. */
5321 if (b2 == 0
5322 || GET_CODE (b2) != JUMP_INSN
5323 || b2 == b1
5324 || ! condjump_p (b2)
5325 || simplejump_p (b2))
5326 continue;
5327
5328 /* Get the comparison codes and operands, reversing the
5329 codes if appropriate. If we don't have comparison codes,
5330 we can't do anything. */
5331 b1op0 = XEXP (XEXP (SET_SRC (PATTERN (b1)), 0), 0);
5332 b1op1 = XEXP (XEXP (SET_SRC (PATTERN (b1)), 0), 1);
5333 code1 = GET_CODE (XEXP (SET_SRC (PATTERN (b1)), 0));
5334 if (XEXP (SET_SRC (PATTERN (b1)), 1) == pc_rtx)
5335 code1 = reverse_condition (code1);
5336
5337 b2op0 = XEXP (XEXP (SET_SRC (PATTERN (b2)), 0), 0);
5338 b2op1 = XEXP (XEXP (SET_SRC (PATTERN (b2)), 0), 1);
5339 code2 = GET_CODE (XEXP (SET_SRC (PATTERN (b2)), 0));
5340 if (XEXP (SET_SRC (PATTERN (b2)), 1) == pc_rtx)
5341 code2 = reverse_condition (code2);
5342
5343 /* If they test the same things and knowing that B1 branches
5344 tells us whether or not B2 branches, check if we
5345 can thread the branch. */
5346 if (rtx_equal_for_thread_p (b1op0, b2op0, b2)
5347 && rtx_equal_for_thread_p (b1op1, b2op1, b2)
5348 && (comparison_dominates_p (code1, code2)
5349 || (can_reverse_comparison_p (XEXP (SET_SRC (PATTERN (b1)),
5350 0),
5351 b1)
5352 && comparison_dominates_p (code1, reverse_condition (code2)))))
5353
5354 {
5355 t1 = prev_nonnote_insn (b1);
5356 t2 = prev_nonnote_insn (b2);
5357
5358 while (t1 != 0 && t2 != 0)
5359 {
5360 if (t2 == label)
5361 {
5362 /* We have reached the target of the first branch.
5363 If there are no pending register equivalents,
5364 we know that this branch will either always
5365 succeed (if the senses of the two branches are
5366 the same) or always fail (if not). */
5367 rtx new_label;
5368
5369 if (num_same_regs != 0)
5370 break;
5371
5372 if (comparison_dominates_p (code1, code2))
5373 new_label = JUMP_LABEL (b2);
5374 else
5375 new_label = get_label_after (b2);
5376
5377 if (JUMP_LABEL (b1) != new_label)
5378 {
5379 rtx prev = PREV_INSN (new_label);
5380
5381 if (flag_before_loop
5382 && GET_CODE (prev) == NOTE
5383 && NOTE_LINE_NUMBER (prev) == NOTE_INSN_LOOP_BEG)
5384 {
5385 /* Don't thread to the loop label. If a loop
5386 label is reused, loop optimization will
5387 be disabled for that loop. */
5388 new_label = gen_label_rtx ();
5389 emit_label_after (new_label, PREV_INSN (prev));
5390 }
5391 changed |= redirect_jump (b1, new_label);
5392 }
5393 break;
5394 }
5395
5396 /* If either of these is not a normal insn (it might be
5397 a JUMP_INSN, CALL_INSN, or CODE_LABEL) we fail. (NOTEs
5398 have already been skipped above.) Similarly, fail
5399 if the insns are different. */
5400 if (GET_CODE (t1) != INSN || GET_CODE (t2) != INSN
5401 || recog_memoized (t1) != recog_memoized (t2)
5402 || ! rtx_equal_for_thread_p (PATTERN (t1),
5403 PATTERN (t2), t2))
5404 break;
5405
5406 t1 = prev_nonnote_insn (t1);
5407 t2 = prev_nonnote_insn (t2);
5408 }
5409 }
5410 }
5411 }
5412
5413 /* Clean up. */
5414 free (modified_regs);
5415 free (same_regs);
5416 free (all_reset);
5417 }
5418 \f
5419 /* This is like RTX_EQUAL_P except that it knows about our handling of
5420 possibly equivalent registers and knows to consider volatile and
5421 modified objects as not equal.
5422
5423 YINSN is the insn containing Y. */
5424
5425 int
5426 rtx_equal_for_thread_p (x, y, yinsn)
5427 rtx x, y;
5428 rtx yinsn;
5429 {
5430 register int i;
5431 register int j;
5432 register enum rtx_code code;
5433 register const char *fmt;
5434
5435 code = GET_CODE (x);
5436 /* Rtx's of different codes cannot be equal. */
5437 if (code != GET_CODE (y))
5438 return 0;
5439
5440 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent.
5441 (REG:SI x) and (REG:HI x) are NOT equivalent. */
5442
5443 if (GET_MODE (x) != GET_MODE (y))
5444 return 0;
5445
5446 /* For floating-point, consider everything unequal. This is a bit
5447 pessimistic, but this pass would only rarely do anything for FP
5448 anyway. */
5449 if (TARGET_FLOAT_FORMAT == IEEE_FLOAT_FORMAT
5450 && FLOAT_MODE_P (GET_MODE (x)) && ! flag_fast_math)
5451 return 0;
5452
5453 /* For commutative operations, the RTX match if the operand match in any
5454 order. Also handle the simple binary and unary cases without a loop. */
5455 if (code == EQ || code == NE || GET_RTX_CLASS (code) == 'c')
5456 return ((rtx_equal_for_thread_p (XEXP (x, 0), XEXP (y, 0), yinsn)
5457 && rtx_equal_for_thread_p (XEXP (x, 1), XEXP (y, 1), yinsn))
5458 || (rtx_equal_for_thread_p (XEXP (x, 0), XEXP (y, 1), yinsn)
5459 && rtx_equal_for_thread_p (XEXP (x, 1), XEXP (y, 0), yinsn)));
5460 else if (GET_RTX_CLASS (code) == '<' || GET_RTX_CLASS (code) == '2')
5461 return (rtx_equal_for_thread_p (XEXP (x, 0), XEXP (y, 0), yinsn)
5462 && rtx_equal_for_thread_p (XEXP (x, 1), XEXP (y, 1), yinsn));
5463 else if (GET_RTX_CLASS (code) == '1')
5464 return rtx_equal_for_thread_p (XEXP (x, 0), XEXP (y, 0), yinsn);
5465
5466 /* Handle special-cases first. */
5467 switch (code)
5468 {
5469 case REG:
5470 if (REGNO (x) == REGNO (y) && ! modified_regs[REGNO (x)])
5471 return 1;
5472
5473 /* If neither is user variable or hard register, check for possible
5474 equivalence. */
5475 if (REG_USERVAR_P (x) || REG_USERVAR_P (y)
5476 || REGNO (x) < FIRST_PSEUDO_REGISTER
5477 || REGNO (y) < FIRST_PSEUDO_REGISTER)
5478 return 0;
5479
5480 if (same_regs[REGNO (x)] == -1)
5481 {
5482 same_regs[REGNO (x)] = REGNO (y);
5483 num_same_regs++;
5484
5485 /* If this is the first time we are seeing a register on the `Y'
5486 side, see if it is the last use. If not, we can't thread the
5487 jump, so mark it as not equivalent. */
5488 if (REGNO_LAST_UID (REGNO (y)) != INSN_UID (yinsn))
5489 return 0;
5490
5491 return 1;
5492 }
5493 else
5494 return (same_regs[REGNO (x)] == REGNO (y));
5495
5496 break;
5497
5498 case MEM:
5499 /* If memory modified or either volatile, not equivalent.
5500 Else, check address. */
5501 if (modified_mem || MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y))
5502 return 0;
5503
5504 return rtx_equal_for_thread_p (XEXP (x, 0), XEXP (y, 0), yinsn);
5505
5506 case ASM_INPUT:
5507 if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y))
5508 return 0;
5509
5510 break;
5511
5512 case SET:
5513 /* Cancel a pending `same_regs' if setting equivalenced registers.
5514 Then process source. */
5515 if (GET_CODE (SET_DEST (x)) == REG
5516 && GET_CODE (SET_DEST (y)) == REG)
5517 {
5518 if (same_regs[REGNO (SET_DEST (x))] == REGNO (SET_DEST (y)))
5519 {
5520 same_regs[REGNO (SET_DEST (x))] = -1;
5521 num_same_regs--;
5522 }
5523 else if (REGNO (SET_DEST (x)) != REGNO (SET_DEST (y)))
5524 return 0;
5525 }
5526 else
5527 if (rtx_equal_for_thread_p (SET_DEST (x), SET_DEST (y), yinsn) == 0)
5528 return 0;
5529
5530 return rtx_equal_for_thread_p (SET_SRC (x), SET_SRC (y), yinsn);
5531
5532 case LABEL_REF:
5533 return XEXP (x, 0) == XEXP (y, 0);
5534
5535 case SYMBOL_REF:
5536 return XSTR (x, 0) == XSTR (y, 0);
5537
5538 default:
5539 break;
5540 }
5541
5542 if (x == y)
5543 return 1;
5544
5545 fmt = GET_RTX_FORMAT (code);
5546 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5547 {
5548 switch (fmt[i])
5549 {
5550 case 'w':
5551 if (XWINT (x, i) != XWINT (y, i))
5552 return 0;
5553 break;
5554
5555 case 'n':
5556 case 'i':
5557 if (XINT (x, i) != XINT (y, i))
5558 return 0;
5559 break;
5560
5561 case 'V':
5562 case 'E':
5563 /* Two vectors must have the same length. */
5564 if (XVECLEN (x, i) != XVECLEN (y, i))
5565 return 0;
5566
5567 /* And the corresponding elements must match. */
5568 for (j = 0; j < XVECLEN (x, i); j++)
5569 if (rtx_equal_for_thread_p (XVECEXP (x, i, j),
5570 XVECEXP (y, i, j), yinsn) == 0)
5571 return 0;
5572 break;
5573
5574 case 'e':
5575 if (rtx_equal_for_thread_p (XEXP (x, i), XEXP (y, i), yinsn) == 0)
5576 return 0;
5577 break;
5578
5579 case 'S':
5580 case 's':
5581 if (strcmp (XSTR (x, i), XSTR (y, i)))
5582 return 0;
5583 break;
5584
5585 case 'u':
5586 /* These are just backpointers, so they don't matter. */
5587 break;
5588
5589 case '0':
5590 case 't':
5591 break;
5592
5593 /* It is believed that rtx's at this level will never
5594 contain anything but integers and other rtx's,
5595 except for within LABEL_REFs and SYMBOL_REFs. */
5596 default:
5597 abort ();
5598 }
5599 }
5600 return 1;
5601 }
5602 \f
5603
5604 #if !defined(HAVE_cc0) && !defined(HAVE_conditional_arithmetic)
5605 /* Return the insn that NEW can be safely inserted in front of starting at
5606 the jump insn INSN. Return 0 if it is not safe to do this jump
5607 optimization. Note that NEW must contain a single set. */
5608
5609 static rtx
5610 find_insert_position (insn, new)
5611 rtx insn;
5612 rtx new;
5613 {
5614 int i;
5615 rtx prev;
5616
5617 /* If NEW does not clobber, it is safe to insert NEW before INSN. */
5618 if (GET_CODE (PATTERN (new)) != PARALLEL)
5619 return insn;
5620
5621 for (i = XVECLEN (PATTERN (new), 0) - 1; i >= 0; i--)
5622 if (GET_CODE (XVECEXP (PATTERN (new), 0, i)) == CLOBBER
5623 && reg_overlap_mentioned_p (XEXP (XVECEXP (PATTERN (new), 0, i), 0),
5624 insn))
5625 break;
5626
5627 if (i < 0)
5628 return insn;
5629
5630 /* There is a good chance that the previous insn PREV sets the thing
5631 being clobbered (often the CC in a hard reg). If PREV does not
5632 use what NEW sets, we can insert NEW before PREV. */
5633
5634 prev = prev_active_insn (insn);
5635 for (i = XVECLEN (PATTERN (new), 0) - 1; i >= 0; i--)
5636 if (GET_CODE (XVECEXP (PATTERN (new), 0, i)) == CLOBBER
5637 && reg_overlap_mentioned_p (XEXP (XVECEXP (PATTERN (new), 0, i), 0),
5638 insn)
5639 && ! modified_in_p (XEXP (XVECEXP (PATTERN (new), 0, i), 0),
5640 prev))
5641 return 0;
5642
5643 return reg_mentioned_p (SET_DEST (single_set (new)), prev) ? 0 : prev;
5644 }
5645 #endif /* !HAVE_cc0 */