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(jump_optimize_1): More accurately detect casesi insns.
[gcc.git] / gcc / jump.c
1 /* Optimize jump instructions, for GNU compiler.
2 Copyright (C) 1987, 88, 89, 91-98, 1999 Free Software Foundation, Inc.
3
4 This file is part of GNU CC.
5
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
9 any later version.
10
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
20
21
22 /* This is the jump-optimization pass of the compiler.
23 It is run two or three times: once before cse, sometimes once after cse,
24 and once after reload (before final).
25
26 jump_optimize deletes unreachable code and labels that are not used.
27 It also deletes jumps that jump to the following insn,
28 and simplifies jumps around unconditional jumps and jumps
29 to unconditional jumps.
30
31 Each CODE_LABEL has a count of the times it is used
32 stored in the LABEL_NUSES internal field, and each JUMP_INSN
33 has one label that it refers to stored in the
34 JUMP_LABEL internal field. With this we can detect labels that
35 become unused because of the deletion of all the jumps that
36 formerly used them. The JUMP_LABEL info is sometimes looked
37 at by later passes.
38
39 Optionally, cross-jumping can be done. Currently it is done
40 only the last time (when after reload and before final).
41 In fact, the code for cross-jumping now assumes that register
42 allocation has been done, since it uses `rtx_renumbered_equal_p'.
43
44 Jump optimization is done after cse when cse's constant-propagation
45 causes jumps to become unconditional or to be deleted.
46
47 Unreachable loops are not detected here, because the labels
48 have references and the insns appear reachable from the labels.
49 find_basic_blocks in flow.c finds and deletes such loops.
50
51 The subroutines delete_insn, redirect_jump, and invert_jump are used
52 from other passes as well. */
53
54 #include "config.h"
55 #include "system.h"
56 #include "rtl.h"
57 #include "tm_p.h"
58 #include "flags.h"
59 #include "hard-reg-set.h"
60 #include "regs.h"
61 #include "insn-config.h"
62 #include "insn-flags.h"
63 #include "insn-attr.h"
64 #include "recog.h"
65 #include "function.h"
66 #include "expr.h"
67 #include "real.h"
68 #include "except.h"
69 #include "toplev.h"
70
71 /* ??? Eventually must record somehow the labels used by jumps
72 from nested functions. */
73 /* Pre-record the next or previous real insn for each label?
74 No, this pass is very fast anyway. */
75 /* Condense consecutive labels?
76 This would make life analysis faster, maybe. */
77 /* Optimize jump y; x: ... y: jumpif... x?
78 Don't know if it is worth bothering with. */
79 /* Optimize two cases of conditional jump to conditional jump?
80 This can never delete any instruction or make anything dead,
81 or even change what is live at any point.
82 So perhaps let combiner do it. */
83
84 /* Vector indexed by uid.
85 For each CODE_LABEL, index by its uid to get first unconditional jump
86 that jumps to the label.
87 For each JUMP_INSN, index by its uid to get the next unconditional jump
88 that jumps to the same label.
89 Element 0 is the start of a chain of all return insns.
90 (It is safe to use element 0 because insn uid 0 is not used. */
91
92 static rtx *jump_chain;
93
94 /* Maximum index in jump_chain. */
95
96 static int max_jump_chain;
97
98 /* Set nonzero by jump_optimize if control can fall through
99 to the end of the function. */
100 int can_reach_end;
101
102 /* Indicates whether death notes are significant in cross jump analysis.
103 Normally they are not significant, because of A and B jump to C,
104 and R dies in A, it must die in B. But this might not be true after
105 stack register conversion, and we must compare death notes in that
106 case. */
107
108 static int cross_jump_death_matters = 0;
109
110 static int init_label_info PROTO((rtx));
111 static void delete_barrier_successors PROTO((rtx));
112 static void mark_all_labels PROTO((rtx, int));
113 static rtx delete_unreferenced_labels PROTO((rtx));
114 static void delete_noop_moves PROTO((rtx));
115 static int calculate_can_reach_end PROTO((rtx, int, int));
116 static int duplicate_loop_exit_test PROTO((rtx));
117 static void find_cross_jump PROTO((rtx, rtx, int, rtx *, rtx *));
118 static void do_cross_jump PROTO((rtx, rtx, rtx));
119 static int jump_back_p PROTO((rtx, rtx));
120 static int tension_vector_labels PROTO((rtx, int));
121 static void mark_jump_label PROTO((rtx, rtx, int));
122 static void delete_computation PROTO((rtx));
123 static void delete_from_jump_chain PROTO((rtx));
124 static int delete_labelref_insn PROTO((rtx, rtx, int));
125 static void mark_modified_reg PROTO((rtx, rtx));
126 static void redirect_tablejump PROTO((rtx, rtx));
127 static void jump_optimize_1 PROTO ((rtx, int, int, int, int));
128 #if ! defined(HAVE_cc0) && ! defined(HAVE_conditional_arithmetic)
129 static rtx find_insert_position PROTO((rtx, rtx));
130 #endif
131 static int returnjump_p_1 PROTO((rtx *, void *));
132 static void delete_prior_computation PROTO((rtx, rtx));
133
134 /* Main external entry point into the jump optimizer. See comments before
135 jump_optimize_1 for descriptions of the arguments. */
136 void
137 jump_optimize (f, cross_jump, noop_moves, after_regscan)
138 rtx f;
139 int cross_jump;
140 int noop_moves;
141 int after_regscan;
142 {
143 jump_optimize_1 (f, cross_jump, noop_moves, after_regscan, 0);
144 }
145
146 /* Alternate entry into the jump optimizer. This entry point only rebuilds
147 the JUMP_LABEL field in jumping insns and REG_LABEL notes in non-jumping
148 instructions. */
149 void
150 rebuild_jump_labels (f)
151 rtx f;
152 {
153 jump_optimize_1 (f, 0, 0, 0, 1);
154 }
155
156 \f
157 /* Delete no-op jumps and optimize jumps to jumps
158 and jumps around jumps.
159 Delete unused labels and unreachable code.
160
161 If CROSS_JUMP is 1, detect matching code
162 before a jump and its destination and unify them.
163 If CROSS_JUMP is 2, do cross-jumping, but pay attention to death notes.
164
165 If NOOP_MOVES is nonzero, delete no-op move insns.
166
167 If AFTER_REGSCAN is nonzero, then this jump pass is being run immediately
168 after regscan, and it is safe to use regno_first_uid and regno_last_uid.
169
170 If MARK_LABELS_ONLY is nonzero, then we only rebuild the jump chain
171 and JUMP_LABEL field for jumping insns.
172
173 If `optimize' is zero, don't change any code,
174 just determine whether control drops off the end of the function.
175 This case occurs when we have -W and not -O.
176 It works because `delete_insn' checks the value of `optimize'
177 and refrains from actually deleting when that is 0. */
178
179 static void
180 jump_optimize_1 (f, cross_jump, noop_moves, after_regscan, mark_labels_only)
181 rtx f;
182 int cross_jump;
183 int noop_moves;
184 int after_regscan;
185 int mark_labels_only;
186 {
187 register rtx insn, next;
188 int changed;
189 int old_max_reg;
190 int first = 1;
191 int max_uid = 0;
192 rtx last_insn;
193
194 cross_jump_death_matters = (cross_jump == 2);
195 max_uid = init_label_info (f) + 1;
196
197 /* If we are performing cross jump optimizations, then initialize
198 tables mapping UIDs to EH regions to avoid incorrect movement
199 of insns from one EH region to another. */
200 if (flag_exceptions && cross_jump)
201 init_insn_eh_region (f, max_uid);
202
203 delete_barrier_successors (f);
204
205 /* Leave some extra room for labels and duplicate exit test insns
206 we make. */
207 max_jump_chain = max_uid * 14 / 10;
208 jump_chain = (rtx *) alloca (max_jump_chain * sizeof (rtx));
209 bzero ((char *) jump_chain, max_jump_chain * sizeof (rtx));
210
211 mark_all_labels (f, cross_jump);
212
213 /* Keep track of labels used from static data;
214 they cannot ever be deleted. */
215
216 for (insn = forced_labels; insn; insn = XEXP (insn, 1))
217 LABEL_NUSES (XEXP (insn, 0))++;
218
219 check_exception_handler_labels ();
220
221 /* Keep track of labels used for marking handlers for exception
222 regions; they cannot usually be deleted. */
223
224 for (insn = exception_handler_labels; insn; insn = XEXP (insn, 1))
225 LABEL_NUSES (XEXP (insn, 0))++;
226
227 /* Quit now if we just wanted to rebuild the JUMP_LABEL and REG_LABEL
228 notes and recompute LABEL_NUSES. */
229 if (mark_labels_only)
230 return;
231
232 exception_optimize ();
233
234 last_insn = delete_unreferenced_labels (f);
235
236 if (optimize == 0)
237 {
238 /* CAN_REACH_END is persistent for each function. Once set it should
239 not be cleared. This is especially true for the case where we
240 delete the NOTE_FUNCTION_END note. CAN_REACH_END is cleared by
241 the front-end before compiling each function. */
242 if (calculate_can_reach_end (last_insn, 1, 0))
243 can_reach_end = 1;
244
245 /* Zero the "deleted" flag of all the "deleted" insns. */
246 for (insn = f; insn; insn = NEXT_INSN (insn))
247 INSN_DELETED_P (insn) = 0;
248
249 /* Show that the jump chain is not valid. */
250 jump_chain = 0;
251 return;
252 }
253
254 #ifdef HAVE_return
255 if (HAVE_return)
256 {
257 /* If we fall through to the epilogue, see if we can insert a RETURN insn
258 in front of it. If the machine allows it at this point (we might be
259 after reload for a leaf routine), it will improve optimization for it
260 to be there. */
261 insn = get_last_insn ();
262 while (insn && GET_CODE (insn) == NOTE)
263 insn = PREV_INSN (insn);
264
265 if (insn && GET_CODE (insn) != BARRIER)
266 {
267 emit_jump_insn (gen_return ());
268 emit_barrier ();
269 }
270 }
271 #endif
272
273 if (noop_moves)
274 delete_noop_moves (f);
275
276 /* If we haven't yet gotten to reload and we have just run regscan,
277 delete any insn that sets a register that isn't used elsewhere.
278 This helps some of the optimizations below by having less insns
279 being jumped around. */
280
281 if (! reload_completed && after_regscan)
282 for (insn = f; insn; insn = next)
283 {
284 rtx set = single_set (insn);
285
286 next = NEXT_INSN (insn);
287
288 if (set && GET_CODE (SET_DEST (set)) == REG
289 && REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER
290 && REGNO_FIRST_UID (REGNO (SET_DEST (set))) == INSN_UID (insn)
291 /* We use regno_last_note_uid so as not to delete the setting
292 of a reg that's used in notes. A subsequent optimization
293 might arrange to use that reg for real. */
294 && REGNO_LAST_NOTE_UID (REGNO (SET_DEST (set))) == INSN_UID (insn)
295 && ! side_effects_p (SET_SRC (set))
296 && ! find_reg_note (insn, REG_RETVAL, 0)
297 /* An ADDRESSOF expression can turn into a use of the internal arg
298 pointer, so do not delete the initialization of the internal
299 arg pointer yet. If it is truly dead, flow will delete the
300 initializing insn. */
301 && SET_DEST (set) != current_function_internal_arg_pointer)
302 delete_insn (insn);
303 }
304
305 /* Now iterate optimizing jumps until nothing changes over one pass. */
306 changed = 1;
307 old_max_reg = max_reg_num ();
308 while (changed)
309 {
310 changed = 0;
311
312 for (insn = f; insn; insn = next)
313 {
314 rtx reallabelprev;
315 rtx temp, temp1, temp2, temp3, temp4, temp5, temp6;
316 rtx nlabel;
317 int this_is_simplejump, this_is_condjump, reversep = 0;
318 int this_is_condjump_in_parallel;
319
320 next = NEXT_INSN (insn);
321
322 /* See if this is a NOTE_INSN_LOOP_BEG followed by an unconditional
323 jump. Try to optimize by duplicating the loop exit test if so.
324 This is only safe immediately after regscan, because it uses
325 the values of regno_first_uid and regno_last_uid. */
326 if (after_regscan && GET_CODE (insn) == NOTE
327 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG
328 && (temp1 = next_nonnote_insn (insn)) != 0
329 && simplejump_p (temp1))
330 {
331 temp = PREV_INSN (insn);
332 if (duplicate_loop_exit_test (insn))
333 {
334 changed = 1;
335 next = NEXT_INSN (temp);
336 continue;
337 }
338 }
339
340 if (GET_CODE (insn) != JUMP_INSN)
341 continue;
342
343 this_is_simplejump = simplejump_p (insn);
344 this_is_condjump = condjump_p (insn);
345 this_is_condjump_in_parallel = condjump_in_parallel_p (insn);
346
347 /* Tension the labels in dispatch tables. */
348
349 if (GET_CODE (PATTERN (insn)) == ADDR_VEC)
350 changed |= tension_vector_labels (PATTERN (insn), 0);
351 if (GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
352 changed |= tension_vector_labels (PATTERN (insn), 1);
353
354 /* See if this jump goes to another jump and redirect if so. */
355 nlabel = follow_jumps (JUMP_LABEL (insn));
356 if (nlabel != JUMP_LABEL (insn))
357 changed |= redirect_jump (insn, nlabel);
358
359 /* If a dispatch table always goes to the same place,
360 get rid of it and replace the insn that uses it. */
361
362 if (GET_CODE (PATTERN (insn)) == ADDR_VEC
363 || GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
364 {
365 int i;
366 rtx pat = PATTERN (insn);
367 int diff_vec_p = GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC;
368 int len = XVECLEN (pat, diff_vec_p);
369 rtx dispatch = prev_real_insn (insn);
370 rtx set;
371
372 for (i = 0; i < len; i++)
373 if (XEXP (XVECEXP (pat, diff_vec_p, i), 0)
374 != XEXP (XVECEXP (pat, diff_vec_p, 0), 0))
375 break;
376
377 if (i == len
378 && dispatch != 0
379 && GET_CODE (dispatch) == JUMP_INSN
380 && JUMP_LABEL (dispatch) != 0
381 /* Don't mess with a casesi insn.
382 XXX according to the comment before computed_jump_p(),
383 all casesi insns should be a parallel of the jump
384 and a USE of a LABEL_REF. */
385 && ! ((set = single_set (dispatch)) != NULL
386 && (GET_CODE (SET_SRC (set)) == IF_THEN_ELSE))
387 && next_real_insn (JUMP_LABEL (dispatch)) == insn)
388 {
389 redirect_tablejump (dispatch,
390 XEXP (XVECEXP (pat, diff_vec_p, 0), 0));
391 changed = 1;
392 }
393 }
394
395 /* If a jump references the end of the function, try to turn
396 it into a RETURN insn, possibly a conditional one. */
397 if (JUMP_LABEL (insn) != 0
398 && (next_active_insn (JUMP_LABEL (insn)) == 0
399 || GET_CODE (PATTERN (next_active_insn (JUMP_LABEL (insn))))
400 == RETURN))
401 changed |= redirect_jump (insn, NULL_RTX);
402
403 reallabelprev = prev_active_insn (JUMP_LABEL (insn));
404
405 /* Detect jump to following insn. */
406 if (reallabelprev == insn && this_is_condjump)
407 {
408 next = next_real_insn (JUMP_LABEL (insn));
409 delete_jump (insn);
410 changed = 1;
411 continue;
412 }
413
414 /* Detect a conditional jump going to the same place
415 as an immediately following unconditional jump. */
416 else if (this_is_condjump
417 && (temp = next_active_insn (insn)) != 0
418 && simplejump_p (temp)
419 && (next_active_insn (JUMP_LABEL (insn))
420 == next_active_insn (JUMP_LABEL (temp))))
421 {
422 /* Don't mess up test coverage analysis. */
423 temp2 = temp;
424 if (flag_test_coverage && !reload_completed)
425 for (temp2 = insn; temp2 != temp; temp2 = NEXT_INSN (temp2))
426 if (GET_CODE (temp2) == NOTE && NOTE_LINE_NUMBER (temp2) > 0)
427 break;
428
429 if (temp2 == temp)
430 {
431 delete_jump (insn);
432 changed = 1;
433 continue;
434 }
435 }
436
437 /* Detect a conditional jump jumping over an unconditional jump. */
438
439 else if ((this_is_condjump || this_is_condjump_in_parallel)
440 && ! this_is_simplejump
441 && reallabelprev != 0
442 && GET_CODE (reallabelprev) == JUMP_INSN
443 && prev_active_insn (reallabelprev) == insn
444 && no_labels_between_p (insn, reallabelprev)
445 && simplejump_p (reallabelprev))
446 {
447 /* When we invert the unconditional jump, we will be
448 decrementing the usage count of its old label.
449 Make sure that we don't delete it now because that
450 might cause the following code to be deleted. */
451 rtx prev_uses = prev_nonnote_insn (reallabelprev);
452 rtx prev_label = JUMP_LABEL (insn);
453
454 if (prev_label)
455 ++LABEL_NUSES (prev_label);
456
457 if (invert_jump (insn, JUMP_LABEL (reallabelprev)))
458 {
459 /* It is very likely that if there are USE insns before
460 this jump, they hold REG_DEAD notes. These REG_DEAD
461 notes are no longer valid due to this optimization,
462 and will cause the life-analysis that following passes
463 (notably delayed-branch scheduling) to think that
464 these registers are dead when they are not.
465
466 To prevent this trouble, we just remove the USE insns
467 from the insn chain. */
468
469 while (prev_uses && GET_CODE (prev_uses) == INSN
470 && GET_CODE (PATTERN (prev_uses)) == USE)
471 {
472 rtx useless = prev_uses;
473 prev_uses = prev_nonnote_insn (prev_uses);
474 delete_insn (useless);
475 }
476
477 delete_insn (reallabelprev);
478 changed = 1;
479 }
480
481 /* We can now safely delete the label if it is unreferenced
482 since the delete_insn above has deleted the BARRIER. */
483 if (prev_label && --LABEL_NUSES (prev_label) == 0)
484 delete_insn (prev_label);
485
486 next = NEXT_INSN (insn);
487 }
488
489 /* If we have an unconditional jump preceded by a USE, try to put
490 the USE before the target and jump there. This simplifies many
491 of the optimizations below since we don't have to worry about
492 dealing with these USE insns. We only do this if the label
493 being branch to already has the identical USE or if code
494 never falls through to that label. */
495
496 else if (this_is_simplejump
497 && (temp = prev_nonnote_insn (insn)) != 0
498 && GET_CODE (temp) == INSN
499 && GET_CODE (PATTERN (temp)) == USE
500 && (temp1 = prev_nonnote_insn (JUMP_LABEL (insn))) != 0
501 && (GET_CODE (temp1) == BARRIER
502 || (GET_CODE (temp1) == INSN
503 && rtx_equal_p (PATTERN (temp), PATTERN (temp1))))
504 /* Don't do this optimization if we have a loop containing
505 only the USE instruction, and the loop start label has
506 a usage count of 1. This is because we will redo this
507 optimization everytime through the outer loop, and jump
508 opt will never exit. */
509 && ! ((temp2 = prev_nonnote_insn (temp)) != 0
510 && temp2 == JUMP_LABEL (insn)
511 && LABEL_NUSES (temp2) == 1))
512 {
513 if (GET_CODE (temp1) == BARRIER)
514 {
515 emit_insn_after (PATTERN (temp), temp1);
516 temp1 = NEXT_INSN (temp1);
517 }
518
519 delete_insn (temp);
520 redirect_jump (insn, get_label_before (temp1));
521 reallabelprev = prev_real_insn (temp1);
522 changed = 1;
523 next = NEXT_INSN (insn);
524 }
525
526 /* Simplify if (...) x = a; else x = b; by converting it
527 to x = b; if (...) x = a;
528 if B is sufficiently simple, the test doesn't involve X,
529 and nothing in the test modifies B or X.
530
531 If we have small register classes, we also can't do this if X
532 is a hard register.
533
534 If the "x = b;" insn has any REG_NOTES, we don't do this because
535 of the possibility that we are running after CSE and there is a
536 REG_EQUAL note that is only valid if the branch has already been
537 taken. If we move the insn with the REG_EQUAL note, we may
538 fold the comparison to always be false in a later CSE pass.
539 (We could also delete the REG_NOTES when moving the insn, but it
540 seems simpler to not move it.) An exception is that we can move
541 the insn if the only note is a REG_EQUAL or REG_EQUIV whose
542 value is the same as "b".
543
544 INSN is the branch over the `else' part.
545
546 We set:
547
548 TEMP to the jump insn preceding "x = a;"
549 TEMP1 to X
550 TEMP2 to the insn that sets "x = b;"
551 TEMP3 to the insn that sets "x = a;"
552 TEMP4 to the set of "x = b"; */
553
554 if (this_is_simplejump
555 && (temp3 = prev_active_insn (insn)) != 0
556 && GET_CODE (temp3) == INSN
557 && (temp4 = single_set (temp3)) != 0
558 && GET_CODE (temp1 = SET_DEST (temp4)) == REG
559 && (! SMALL_REGISTER_CLASSES
560 || REGNO (temp1) >= FIRST_PSEUDO_REGISTER)
561 && (temp2 = next_active_insn (insn)) != 0
562 && GET_CODE (temp2) == INSN
563 && (temp4 = single_set (temp2)) != 0
564 && rtx_equal_p (SET_DEST (temp4), temp1)
565 && ! side_effects_p (SET_SRC (temp4))
566 && ! may_trap_p (SET_SRC (temp4))
567 && (REG_NOTES (temp2) == 0
568 || ((REG_NOTE_KIND (REG_NOTES (temp2)) == REG_EQUAL
569 || REG_NOTE_KIND (REG_NOTES (temp2)) == REG_EQUIV)
570 && XEXP (REG_NOTES (temp2), 1) == 0
571 && rtx_equal_p (XEXP (REG_NOTES (temp2), 0),
572 SET_SRC (temp4))))
573 && (temp = prev_active_insn (temp3)) != 0
574 && condjump_p (temp) && ! simplejump_p (temp)
575 /* TEMP must skip over the "x = a;" insn */
576 && prev_real_insn (JUMP_LABEL (temp)) == insn
577 && no_labels_between_p (insn, JUMP_LABEL (temp))
578 /* There must be no other entries to the "x = b;" insn. */
579 && no_labels_between_p (JUMP_LABEL (temp), temp2)
580 /* INSN must either branch to the insn after TEMP2 or the insn
581 after TEMP2 must branch to the same place as INSN. */
582 && (reallabelprev == temp2
583 || ((temp5 = next_active_insn (temp2)) != 0
584 && simplejump_p (temp5)
585 && JUMP_LABEL (temp5) == JUMP_LABEL (insn))))
586 {
587 /* The test expression, X, may be a complicated test with
588 multiple branches. See if we can find all the uses of
589 the label that TEMP branches to without hitting a CALL_INSN
590 or a jump to somewhere else. */
591 rtx target = JUMP_LABEL (temp);
592 int nuses = LABEL_NUSES (target);
593 rtx p;
594 #ifdef HAVE_cc0
595 rtx q;
596 #endif
597
598 /* Set P to the first jump insn that goes around "x = a;". */
599 for (p = temp; nuses && p; p = prev_nonnote_insn (p))
600 {
601 if (GET_CODE (p) == JUMP_INSN)
602 {
603 if (condjump_p (p) && ! simplejump_p (p)
604 && JUMP_LABEL (p) == target)
605 {
606 nuses--;
607 if (nuses == 0)
608 break;
609 }
610 else
611 break;
612 }
613 else if (GET_CODE (p) == CALL_INSN)
614 break;
615 }
616
617 #ifdef HAVE_cc0
618 /* We cannot insert anything between a set of cc and its use
619 so if P uses cc0, we must back up to the previous insn. */
620 q = prev_nonnote_insn (p);
621 if (q && GET_RTX_CLASS (GET_CODE (q)) == 'i'
622 && sets_cc0_p (PATTERN (q)))
623 p = q;
624 #endif
625
626 if (p)
627 p = PREV_INSN (p);
628
629 /* If we found all the uses and there was no data conflict, we
630 can move the assignment unless we can branch into the middle
631 from somewhere. */
632 if (nuses == 0 && p
633 && no_labels_between_p (p, insn)
634 && ! reg_referenced_between_p (temp1, p, NEXT_INSN (temp3))
635 && ! reg_set_between_p (temp1, p, temp3)
636 && (GET_CODE (SET_SRC (temp4)) == CONST_INT
637 || ! modified_between_p (SET_SRC (temp4), p, temp2))
638 /* Verify that registers used by the jump are not clobbered
639 by the instruction being moved. */
640 && ! regs_set_between_p (PATTERN (temp),
641 PREV_INSN (temp2),
642 NEXT_INSN (temp2)))
643 {
644 emit_insn_after_with_line_notes (PATTERN (temp2), p, temp2);
645 delete_insn (temp2);
646
647 /* Set NEXT to an insn that we know won't go away. */
648 next = next_active_insn (insn);
649
650 /* Delete the jump around the set. Note that we must do
651 this before we redirect the test jumps so that it won't
652 delete the code immediately following the assignment
653 we moved (which might be a jump). */
654
655 delete_insn (insn);
656
657 /* We either have two consecutive labels or a jump to
658 a jump, so adjust all the JUMP_INSNs to branch to where
659 INSN branches to. */
660 for (p = NEXT_INSN (p); p != next; p = NEXT_INSN (p))
661 if (GET_CODE (p) == JUMP_INSN)
662 redirect_jump (p, target);
663
664 changed = 1;
665 next = NEXT_INSN (insn);
666 continue;
667 }
668 }
669
670 /* Simplify if (...) { x = a; goto l; } x = b; by converting it
671 to x = a; if (...) goto l; x = b;
672 if A is sufficiently simple, the test doesn't involve X,
673 and nothing in the test modifies A or X.
674
675 If we have small register classes, we also can't do this if X
676 is a hard register.
677
678 If the "x = a;" insn has any REG_NOTES, we don't do this because
679 of the possibility that we are running after CSE and there is a
680 REG_EQUAL note that is only valid if the branch has already been
681 taken. If we move the insn with the REG_EQUAL note, we may
682 fold the comparison to always be false in a later CSE pass.
683 (We could also delete the REG_NOTES when moving the insn, but it
684 seems simpler to not move it.) An exception is that we can move
685 the insn if the only note is a REG_EQUAL or REG_EQUIV whose
686 value is the same as "a".
687
688 INSN is the goto.
689
690 We set:
691
692 TEMP to the jump insn preceding "x = a;"
693 TEMP1 to X
694 TEMP2 to the insn that sets "x = b;"
695 TEMP3 to the insn that sets "x = a;"
696 TEMP4 to the set of "x = a"; */
697
698 if (this_is_simplejump
699 && (temp2 = next_active_insn (insn)) != 0
700 && GET_CODE (temp2) == INSN
701 && (temp4 = single_set (temp2)) != 0
702 && GET_CODE (temp1 = SET_DEST (temp4)) == REG
703 && (! SMALL_REGISTER_CLASSES
704 || REGNO (temp1) >= FIRST_PSEUDO_REGISTER)
705 && (temp3 = prev_active_insn (insn)) != 0
706 && GET_CODE (temp3) == INSN
707 && (temp4 = single_set (temp3)) != 0
708 && rtx_equal_p (SET_DEST (temp4), temp1)
709 && ! side_effects_p (SET_SRC (temp4))
710 && ! may_trap_p (SET_SRC (temp4))
711 && (REG_NOTES (temp3) == 0
712 || ((REG_NOTE_KIND (REG_NOTES (temp3)) == REG_EQUAL
713 || REG_NOTE_KIND (REG_NOTES (temp3)) == REG_EQUIV)
714 && XEXP (REG_NOTES (temp3), 1) == 0
715 && rtx_equal_p (XEXP (REG_NOTES (temp3), 0),
716 SET_SRC (temp4))))
717 && (temp = prev_active_insn (temp3)) != 0
718 && condjump_p (temp) && ! simplejump_p (temp)
719 /* TEMP must skip over the "x = a;" insn */
720 && prev_real_insn (JUMP_LABEL (temp)) == insn
721 && no_labels_between_p (temp, insn))
722 {
723 rtx prev_label = JUMP_LABEL (temp);
724 rtx insert_after = prev_nonnote_insn (temp);
725
726 #ifdef HAVE_cc0
727 /* We cannot insert anything between a set of cc and its use. */
728 if (insert_after && GET_RTX_CLASS (GET_CODE (insert_after)) == 'i'
729 && sets_cc0_p (PATTERN (insert_after)))
730 insert_after = prev_nonnote_insn (insert_after);
731 #endif
732 ++LABEL_NUSES (prev_label);
733
734 if (insert_after
735 && no_labels_between_p (insert_after, temp)
736 && ! reg_referenced_between_p (temp1, insert_after, temp3)
737 && ! reg_referenced_between_p (temp1, temp3,
738 NEXT_INSN (temp2))
739 && ! reg_set_between_p (temp1, insert_after, temp)
740 && ! modified_between_p (SET_SRC (temp4), insert_after, temp)
741 /* Verify that registers used by the jump are not clobbered
742 by the instruction being moved. */
743 && ! regs_set_between_p (PATTERN (temp),
744 PREV_INSN (temp3),
745 NEXT_INSN (temp3))
746 && invert_jump (temp, JUMP_LABEL (insn)))
747 {
748 emit_insn_after_with_line_notes (PATTERN (temp3),
749 insert_after, temp3);
750 delete_insn (temp3);
751 delete_insn (insn);
752 /* Set NEXT to an insn that we know won't go away. */
753 next = temp2;
754 changed = 1;
755 }
756 if (prev_label && --LABEL_NUSES (prev_label) == 0)
757 delete_insn (prev_label);
758 if (changed)
759 continue;
760 }
761
762 #if !defined(HAVE_cc0) && !defined(HAVE_conditional_arithmetic)
763
764 /* If we have if (...) x = exp; and branches are expensive,
765 EXP is a single insn, does not have any side effects, cannot
766 trap, and is not too costly, convert this to
767 t = exp; if (...) x = t;
768
769 Don't do this when we have CC0 because it is unlikely to help
770 and we'd need to worry about where to place the new insn and
771 the potential for conflicts. We also can't do this when we have
772 notes on the insn for the same reason as above.
773
774 If we have conditional arithmetic, this will make this
775 harder to optimize later and isn't needed, so don't do it
776 in that case either.
777
778 We set:
779
780 TEMP to the "x = exp;" insn.
781 TEMP1 to the single set in the "x = exp;" insn.
782 TEMP2 to "x". */
783
784 if (! reload_completed
785 && this_is_condjump && ! this_is_simplejump
786 && BRANCH_COST >= 3
787 && (temp = next_nonnote_insn (insn)) != 0
788 && GET_CODE (temp) == INSN
789 && REG_NOTES (temp) == 0
790 && (reallabelprev == temp
791 || ((temp2 = next_active_insn (temp)) != 0
792 && simplejump_p (temp2)
793 && JUMP_LABEL (temp2) == JUMP_LABEL (insn)))
794 && (temp1 = single_set (temp)) != 0
795 && (temp2 = SET_DEST (temp1), GET_CODE (temp2) == REG)
796 && (! SMALL_REGISTER_CLASSES
797 || REGNO (temp2) >= FIRST_PSEUDO_REGISTER)
798 && GET_CODE (SET_SRC (temp1)) != REG
799 && GET_CODE (SET_SRC (temp1)) != SUBREG
800 && GET_CODE (SET_SRC (temp1)) != CONST_INT
801 && ! side_effects_p (SET_SRC (temp1))
802 && ! may_trap_p (SET_SRC (temp1))
803 && rtx_cost (SET_SRC (temp1), SET) < 10)
804 {
805 rtx new = gen_reg_rtx (GET_MODE (temp2));
806
807 if ((temp3 = find_insert_position (insn, temp))
808 && validate_change (temp, &SET_DEST (temp1), new, 0))
809 {
810 next = emit_insn_after (gen_move_insn (temp2, new), insn);
811 emit_insn_after_with_line_notes (PATTERN (temp),
812 PREV_INSN (temp3), temp);
813 delete_insn (temp);
814 reallabelprev = prev_active_insn (JUMP_LABEL (insn));
815
816 if (after_regscan)
817 {
818 reg_scan_update (temp3, NEXT_INSN (next), old_max_reg);
819 old_max_reg = max_reg_num ();
820 }
821 }
822 }
823
824 /* Similarly, if it takes two insns to compute EXP but they
825 have the same destination. Here TEMP3 will be the second
826 insn and TEMP4 the SET from that insn. */
827
828 if (! reload_completed
829 && this_is_condjump && ! this_is_simplejump
830 && BRANCH_COST >= 4
831 && (temp = next_nonnote_insn (insn)) != 0
832 && GET_CODE (temp) == INSN
833 && REG_NOTES (temp) == 0
834 && (temp3 = next_nonnote_insn (temp)) != 0
835 && GET_CODE (temp3) == INSN
836 && REG_NOTES (temp3) == 0
837 && (reallabelprev == temp3
838 || ((temp2 = next_active_insn (temp3)) != 0
839 && simplejump_p (temp2)
840 && JUMP_LABEL (temp2) == JUMP_LABEL (insn)))
841 && (temp1 = single_set (temp)) != 0
842 && (temp2 = SET_DEST (temp1), GET_CODE (temp2) == REG)
843 && GET_MODE_CLASS (GET_MODE (temp2)) == MODE_INT
844 && (! SMALL_REGISTER_CLASSES
845 || REGNO (temp2) >= FIRST_PSEUDO_REGISTER)
846 && ! side_effects_p (SET_SRC (temp1))
847 && ! may_trap_p (SET_SRC (temp1))
848 && rtx_cost (SET_SRC (temp1), SET) < 10
849 && (temp4 = single_set (temp3)) != 0
850 && rtx_equal_p (SET_DEST (temp4), temp2)
851 && ! side_effects_p (SET_SRC (temp4))
852 && ! may_trap_p (SET_SRC (temp4))
853 && rtx_cost (SET_SRC (temp4), SET) < 10)
854 {
855 rtx new = gen_reg_rtx (GET_MODE (temp2));
856
857 if ((temp5 = find_insert_position (insn, temp))
858 && (temp6 = find_insert_position (insn, temp3))
859 && validate_change (temp, &SET_DEST (temp1), new, 0))
860 {
861 /* Use the earliest of temp5 and temp6. */
862 if (temp5 != insn)
863 temp6 = temp5;
864 next = emit_insn_after (gen_move_insn (temp2, new), insn);
865 emit_insn_after_with_line_notes (PATTERN (temp),
866 PREV_INSN (temp6), temp);
867 emit_insn_after_with_line_notes
868 (replace_rtx (PATTERN (temp3), temp2, new),
869 PREV_INSN (temp6), temp3);
870 delete_insn (temp);
871 delete_insn (temp3);
872 reallabelprev = prev_active_insn (JUMP_LABEL (insn));
873
874 if (after_regscan)
875 {
876 reg_scan_update (temp6, NEXT_INSN (next), old_max_reg);
877 old_max_reg = max_reg_num ();
878 }
879 }
880 }
881
882 /* Finally, handle the case where two insns are used to
883 compute EXP but a temporary register is used. Here we must
884 ensure that the temporary register is not used anywhere else. */
885
886 if (! reload_completed
887 && after_regscan
888 && this_is_condjump && ! this_is_simplejump
889 && BRANCH_COST >= 4
890 && (temp = next_nonnote_insn (insn)) != 0
891 && GET_CODE (temp) == INSN
892 && REG_NOTES (temp) == 0
893 && (temp3 = next_nonnote_insn (temp)) != 0
894 && GET_CODE (temp3) == INSN
895 && REG_NOTES (temp3) == 0
896 && (reallabelprev == temp3
897 || ((temp2 = next_active_insn (temp3)) != 0
898 && simplejump_p (temp2)
899 && JUMP_LABEL (temp2) == JUMP_LABEL (insn)))
900 && (temp1 = single_set (temp)) != 0
901 && (temp5 = SET_DEST (temp1),
902 (GET_CODE (temp5) == REG
903 || (GET_CODE (temp5) == SUBREG
904 && (temp5 = SUBREG_REG (temp5),
905 GET_CODE (temp5) == REG))))
906 && REGNO (temp5) >= FIRST_PSEUDO_REGISTER
907 && REGNO_FIRST_UID (REGNO (temp5)) == INSN_UID (temp)
908 && REGNO_LAST_UID (REGNO (temp5)) == INSN_UID (temp3)
909 && ! side_effects_p (SET_SRC (temp1))
910 && ! may_trap_p (SET_SRC (temp1))
911 && rtx_cost (SET_SRC (temp1), SET) < 10
912 && (temp4 = single_set (temp3)) != 0
913 && (temp2 = SET_DEST (temp4), GET_CODE (temp2) == REG)
914 && GET_MODE_CLASS (GET_MODE (temp2)) == MODE_INT
915 && (! SMALL_REGISTER_CLASSES
916 || REGNO (temp2) >= FIRST_PSEUDO_REGISTER)
917 && rtx_equal_p (SET_DEST (temp4), temp2)
918 && ! side_effects_p (SET_SRC (temp4))
919 && ! may_trap_p (SET_SRC (temp4))
920 && rtx_cost (SET_SRC (temp4), SET) < 10)
921 {
922 rtx new = gen_reg_rtx (GET_MODE (temp2));
923
924 if ((temp5 = find_insert_position (insn, temp))
925 && (temp6 = find_insert_position (insn, temp3))
926 && validate_change (temp3, &SET_DEST (temp4), new, 0))
927 {
928 /* Use the earliest of temp5 and temp6. */
929 if (temp5 != insn)
930 temp6 = temp5;
931 next = emit_insn_after (gen_move_insn (temp2, new), insn);
932 emit_insn_after_with_line_notes (PATTERN (temp),
933 PREV_INSN (temp6), temp);
934 emit_insn_after_with_line_notes (PATTERN (temp3),
935 PREV_INSN (temp6), temp3);
936 delete_insn (temp);
937 delete_insn (temp3);
938 reallabelprev = prev_active_insn (JUMP_LABEL (insn));
939
940 if (after_regscan)
941 {
942 reg_scan_update (temp6, NEXT_INSN (next), old_max_reg);
943 old_max_reg = max_reg_num ();
944 }
945 }
946 }
947 #endif /* HAVE_cc0 */
948
949 #ifdef HAVE_conditional_arithmetic
950 /* ??? This is disabled in genconfig, as this simple-minded
951 transformation can incredibly lengthen register lifetimes.
952
953 Consider this example from cexp.c's yyparse:
954
955 234 (set (pc)
956 (if_then_else (ne (reg:DI 149) (const_int 0 [0x0]))
957 (label_ref 248) (pc)))
958 237 (set (reg/i:DI 0 $0) (const_int 1 [0x1]))
959 239 (set (pc) (label_ref 2382))
960 248 (code_label ("yybackup"))
961
962 This will be transformed to:
963
964 237 (set (reg/i:DI 0 $0)
965 (if_then_else:DI (eq (reg:DI 149) (const_int 0 [0x0]))
966 (const_int 1 [0x1]) (reg/i:DI 0 $0)))
967 239 (set (pc)
968 (if_then_else (eq (reg:DI 149) (const_int 0 [0x0]))
969 (label_ref 2382) (pc)))
970
971 which, from this narrow viewpoint looks fine. Except that
972 between this and 3 other ocurrences of the same pattern, $0
973 is now live for basically the entire function, and we'll
974 get an abort in caller_save.
975
976 Any replacement for this code should recall that a set of
977 a register that is not live need not, and indeed should not,
978 be conditionalized. Either that, or delay the transformation
979 until after register allocation. */
980
981 /* See if this is a conditional jump around a small number of
982 instructions that we can conditionalize. Don't do this before
983 the initial CSE pass or after reload.
984
985 We reject any insns that have side effects or may trap.
986 Strictly speaking, this is not needed since the machine may
987 support conditionalizing these too, but we won't deal with that
988 now. Specifically, this means that we can't conditionalize a
989 CALL_INSN, which some machines, such as the ARC, can do, but
990 this is a very minor optimization. */
991 if (this_is_condjump && ! this_is_simplejump
992 && cse_not_expected && optimize > 0 && ! reload_completed
993 && BRANCH_COST > 2
994 && can_reverse_comparison_p (XEXP (SET_SRC (PATTERN (insn)), 0),
995 insn))
996 {
997 rtx ourcond = XEXP (SET_SRC (PATTERN (insn)), 0);
998 int num_insns = 0;
999 char *storage = (char *) oballoc (0);
1000 int last_insn = 0, failed = 0;
1001 rtx changed_jump = 0;
1002
1003 ourcond = gen_rtx (reverse_condition (GET_CODE (ourcond)),
1004 VOIDmode, XEXP (ourcond, 0),
1005 XEXP (ourcond, 1));
1006
1007 /* Scan forward BRANCH_COST real insns looking for the JUMP_LABEL
1008 of this insn. We see if we think we can conditionalize the
1009 insns we pass. For now, we only deal with insns that have
1010 one SET. We stop after an insn that modifies anything in
1011 OURCOND, if we have too many insns, or if we have an insn
1012 with a side effect or that may trip. Note that we will
1013 be modifying any unconditional jumps we encounter to be
1014 conditional; this will have the effect of also doing this
1015 optimization on the "else" the next time around. */
1016 for (temp1 = NEXT_INSN (insn);
1017 num_insns <= BRANCH_COST && ! failed && temp1 != 0
1018 && GET_CODE (temp1) != CODE_LABEL;
1019 temp1 = NEXT_INSN (temp1))
1020 {
1021 /* Ignore everything but an active insn. */
1022 if (GET_RTX_CLASS (GET_CODE (temp1)) != 'i'
1023 || GET_CODE (PATTERN (temp1)) == USE
1024 || GET_CODE (PATTERN (temp1)) == CLOBBER)
1025 continue;
1026
1027 /* If this was an unconditional jump, record it since we'll
1028 need to remove the BARRIER if we succeed. We can only
1029 have one such jump since there must be a label after
1030 the BARRIER and it's either ours, in which case it's the
1031 only one or some other, in which case we'd fail. */
1032
1033 if (simplejump_p (temp1))
1034 changed_jump = temp1;
1035
1036 /* See if we are allowed another insn and if this insn
1037 if one we think we may be able to handle. */
1038 if (++num_insns > BRANCH_COST
1039 || last_insn
1040 || (temp2 = single_set (temp1)) == 0
1041 || side_effects_p (SET_SRC (temp2))
1042 || may_trap_p (SET_SRC (temp2)))
1043 failed = 1;
1044 else
1045 validate_change (temp1, &SET_SRC (temp2),
1046 gen_rtx_IF_THEN_ELSE
1047 (GET_MODE (SET_DEST (temp2)),
1048 copy_rtx (ourcond),
1049 SET_SRC (temp2), SET_DEST (temp2)),
1050 1);
1051
1052 if (modified_in_p (ourcond, temp1))
1053 last_insn = 1;
1054 }
1055
1056 /* If we've reached our jump label, haven't failed, and all
1057 the changes above are valid, we can delete this jump
1058 insn. Also remove a BARRIER after any jump that used
1059 to be unconditional and remove any REG_EQUAL or REG_EQUIV
1060 that might have previously been present on insns we
1061 made conditional. */
1062 if (temp1 == JUMP_LABEL (insn) && ! failed
1063 && apply_change_group ())
1064 {
1065 for (temp1 = NEXT_INSN (insn); temp1 != JUMP_LABEL (insn);
1066 temp1 = NEXT_INSN (temp1))
1067 if (GET_RTX_CLASS (GET_CODE (temp1)) == 'i')
1068 for (temp2 = REG_NOTES (temp1); temp2 != 0;
1069 temp2 = XEXP (temp2, 1))
1070 if (REG_NOTE_KIND (temp2) == REG_EQUAL
1071 || REG_NOTE_KIND (temp2) == REG_EQUIV)
1072 remove_note (temp1, temp2);
1073
1074 if (changed_jump != 0)
1075 {
1076 if (GET_CODE (NEXT_INSN (changed_jump)) != BARRIER)
1077 abort ();
1078
1079 delete_insn (NEXT_INSN (changed_jump));
1080 }
1081
1082 delete_insn (insn);
1083 changed = 1;
1084 continue;
1085 }
1086 else
1087 {
1088 cancel_changes (0);
1089 obfree (storage);
1090 }
1091 }
1092 #endif
1093
1094 /* Try to use a conditional move (if the target has them), or a
1095 store-flag insn. If the target has conditional arithmetic as
1096 well as conditional move, the above code will have done something.
1097 Note that we prefer the above code since it is more general: the
1098 code below can make changes that require work to undo.
1099
1100 The general case here is:
1101
1102 1) x = a; if (...) x = b; and
1103 2) if (...) x = b;
1104
1105 If the jump would be faster, the machine should not have defined
1106 the movcc or scc insns!. These cases are often made by the
1107 previous optimization.
1108
1109 The second case is treated as x = x; if (...) x = b;.
1110
1111 INSN here is the jump around the store. We set:
1112
1113 TEMP to the "x op= b;" insn.
1114 TEMP1 to X.
1115 TEMP2 to B.
1116 TEMP3 to A (X in the second case).
1117 TEMP4 to the condition being tested.
1118 TEMP5 to the earliest insn used to find the condition.
1119 TEMP6 to the SET of TEMP. */
1120
1121 if (/* We can't do this after reload has completed. */
1122 ! reload_completed
1123 #ifdef HAVE_conditional_arithmetic
1124 /* Defer this until after CSE so the above code gets the
1125 first crack at it. */
1126 && cse_not_expected
1127 #endif
1128 && this_is_condjump && ! this_is_simplejump
1129 /* Set TEMP to the "x = b;" insn. */
1130 && (temp = next_nonnote_insn (insn)) != 0
1131 && GET_CODE (temp) == INSN
1132 && (temp6 = single_set (temp)) != NULL_RTX
1133 && GET_CODE (temp1 = SET_DEST (temp6)) == REG
1134 && (! SMALL_REGISTER_CLASSES
1135 || REGNO (temp1) >= FIRST_PSEUDO_REGISTER)
1136 && ! side_effects_p (temp2 = SET_SRC (temp6))
1137 && ! may_trap_p (temp2)
1138 /* Allow either form, but prefer the former if both apply.
1139 There is no point in using the old value of TEMP1 if
1140 it is a register, since cse will alias them. It can
1141 lose if the old value were a hard register since CSE
1142 won't replace hard registers. Avoid using TEMP3 if
1143 small register classes and it is a hard register. */
1144 && (((temp3 = reg_set_last (temp1, insn)) != 0
1145 && ! (SMALL_REGISTER_CLASSES && GET_CODE (temp3) == REG
1146 && REGNO (temp3) < FIRST_PSEUDO_REGISTER))
1147 /* Make the latter case look like x = x; if (...) x = b; */
1148 || (temp3 = temp1, 1))
1149 /* INSN must either branch to the insn after TEMP or the insn
1150 after TEMP must branch to the same place as INSN. */
1151 && (reallabelprev == temp
1152 || ((temp4 = next_active_insn (temp)) != 0
1153 && simplejump_p (temp4)
1154 && JUMP_LABEL (temp4) == JUMP_LABEL (insn)))
1155 && (temp4 = get_condition (insn, &temp5)) != 0
1156 /* We must be comparing objects whose modes imply the size.
1157 We could handle BLKmode if (1) emit_store_flag could
1158 and (2) we could find the size reliably. */
1159 && GET_MODE (XEXP (temp4, 0)) != BLKmode
1160 /* Even if branches are cheap, the store_flag optimization
1161 can win when the operation to be performed can be
1162 expressed directly. */
1163 #ifdef HAVE_cc0
1164 /* If the previous insn sets CC0 and something else, we can't
1165 do this since we are going to delete that insn. */
1166
1167 && ! ((temp6 = prev_nonnote_insn (insn)) != 0
1168 && GET_CODE (temp6) == INSN
1169 && (sets_cc0_p (PATTERN (temp6)) == -1
1170 || (sets_cc0_p (PATTERN (temp6)) == 1
1171 && FIND_REG_INC_NOTE (temp6, NULL_RTX))))
1172 #endif
1173 )
1174 {
1175 #ifdef HAVE_conditional_move
1176 /* First try a conditional move. */
1177 {
1178 enum rtx_code code = GET_CODE (temp4);
1179 rtx var = temp1;
1180 rtx cond0, cond1, aval, bval;
1181 rtx target, new_insn;
1182
1183 /* Copy the compared variables into cond0 and cond1, so that
1184 any side effects performed in or after the old comparison,
1185 will not affect our compare which will come later. */
1186 /* ??? Is it possible to just use the comparison in the jump
1187 insn? After all, we're going to delete it. We'd have
1188 to modify emit_conditional_move to take a comparison rtx
1189 instead or write a new function. */
1190 cond0 = gen_reg_rtx (GET_MODE (XEXP (temp4, 0)));
1191 /* We want the target to be able to simplify comparisons with
1192 zero (and maybe other constants as well), so don't create
1193 pseudos for them. There's no need to either. */
1194 if (GET_CODE (XEXP (temp4, 1)) == CONST_INT
1195 || GET_CODE (XEXP (temp4, 1)) == CONST_DOUBLE)
1196 cond1 = XEXP (temp4, 1);
1197 else
1198 cond1 = gen_reg_rtx (GET_MODE (XEXP (temp4, 1)));
1199
1200 /* Careful about copying these values -- an IOR or what may
1201 need to do other things, like clobber flags. */
1202 /* ??? Assume for the moment that AVAL is ok. */
1203 aval = temp3;
1204
1205 start_sequence ();
1206
1207 /* We're dealing with a single_set insn with no side effects
1208 on SET_SRC. We do need to be reasonably certain that if
1209 we need to force BVAL into a register that we won't
1210 clobber the flags -- general_operand should suffice. */
1211 if (general_operand (temp2, GET_MODE (var)))
1212 bval = temp2;
1213 else
1214 {
1215 bval = gen_reg_rtx (GET_MODE (var));
1216 new_insn = copy_rtx (temp);
1217 temp6 = single_set (new_insn);
1218 SET_DEST (temp6) = bval;
1219 emit_insn (PATTERN (new_insn));
1220 }
1221
1222 target = emit_conditional_move (var, code,
1223 cond0, cond1, VOIDmode,
1224 aval, bval, GET_MODE (var),
1225 (code == LTU || code == GEU
1226 || code == LEU || code == GTU));
1227
1228 if (target)
1229 {
1230 rtx seq1, seq2, last;
1231 int copy_ok;
1232
1233 /* Save the conditional move sequence but don't emit it
1234 yet. On some machines, like the alpha, it is possible
1235 that temp5 == insn, so next generate the sequence that
1236 saves the compared values and then emit both
1237 sequences ensuring seq1 occurs before seq2. */
1238 seq2 = get_insns ();
1239 end_sequence ();
1240
1241 /* "Now that we can't fail..." Famous last words.
1242 Generate the copy insns that preserve the compared
1243 values. */
1244 start_sequence ();
1245 emit_move_insn (cond0, XEXP (temp4, 0));
1246 if (cond1 != XEXP (temp4, 1))
1247 emit_move_insn (cond1, XEXP (temp4, 1));
1248 seq1 = get_insns ();
1249 end_sequence ();
1250
1251 /* Validate the sequence -- this may be some weird
1252 bit-extract-and-test instruction for which there
1253 exists no complimentary bit-extract insn. */
1254 copy_ok = 1;
1255 for (last = seq1; last ; last = NEXT_INSN (last))
1256 if (recog_memoized (last) < 0)
1257 {
1258 copy_ok = 0;
1259 break;
1260 }
1261
1262 if (copy_ok)
1263 {
1264 emit_insns_before (seq1, temp5);
1265
1266 /* Insert conditional move after insn, to be sure
1267 that the jump and a possible compare won't be
1268 separated. */
1269 last = emit_insns_after (seq2, insn);
1270
1271 /* ??? We can also delete the insn that sets X to A.
1272 Flow will do it too though. */
1273 delete_insn (temp);
1274 next = NEXT_INSN (insn);
1275 delete_jump (insn);
1276
1277 if (after_regscan)
1278 {
1279 reg_scan_update (seq1, NEXT_INSN (last),
1280 old_max_reg);
1281 old_max_reg = max_reg_num ();
1282 }
1283
1284 changed = 1;
1285 continue;
1286 }
1287 }
1288 else
1289 end_sequence ();
1290 }
1291 #endif
1292
1293 /* That didn't work, try a store-flag insn.
1294
1295 We further divide the cases into:
1296
1297 1) x = a; if (...) x = b; and either A or B is zero,
1298 2) if (...) x = 0; and jumps are expensive,
1299 3) x = a; if (...) x = b; and A and B are constants where all
1300 the set bits in A are also set in B and jumps are expensive,
1301 4) x = a; if (...) x = b; and A and B non-zero, and jumps are
1302 more expensive, and
1303 5) if (...) x = b; if jumps are even more expensive. */
1304
1305 if (GET_MODE_CLASS (GET_MODE (temp1)) == MODE_INT
1306 && ((GET_CODE (temp3) == CONST_INT)
1307 /* Make the latter case look like
1308 x = x; if (...) x = 0; */
1309 || (temp3 = temp1,
1310 ((BRANCH_COST >= 2
1311 && temp2 == const0_rtx)
1312 || BRANCH_COST >= 3)))
1313 /* If B is zero, OK; if A is zero, can only do (1) if we
1314 can reverse the condition. See if (3) applies possibly
1315 by reversing the condition. Prefer reversing to (4) when
1316 branches are very expensive. */
1317 && (((BRANCH_COST >= 2
1318 || STORE_FLAG_VALUE == -1
1319 || (STORE_FLAG_VALUE == 1
1320 /* Check that the mask is a power of two,
1321 so that it can probably be generated
1322 with a shift. */
1323 && GET_CODE (temp3) == CONST_INT
1324 && exact_log2 (INTVAL (temp3)) >= 0))
1325 && (reversep = 0, temp2 == const0_rtx))
1326 || ((BRANCH_COST >= 2
1327 || STORE_FLAG_VALUE == -1
1328 || (STORE_FLAG_VALUE == 1
1329 && GET_CODE (temp2) == CONST_INT
1330 && exact_log2 (INTVAL (temp2)) >= 0))
1331 && temp3 == const0_rtx
1332 && (reversep = can_reverse_comparison_p (temp4, insn)))
1333 || (BRANCH_COST >= 2
1334 && GET_CODE (temp2) == CONST_INT
1335 && GET_CODE (temp3) == CONST_INT
1336 && ((INTVAL (temp2) & INTVAL (temp3)) == INTVAL (temp2)
1337 || ((INTVAL (temp2) & INTVAL (temp3)) == INTVAL (temp3)
1338 && (reversep = can_reverse_comparison_p (temp4,
1339 insn)))))
1340 || BRANCH_COST >= 3)
1341 )
1342 {
1343 enum rtx_code code = GET_CODE (temp4);
1344 rtx uval, cval, var = temp1;
1345 int normalizep;
1346 rtx target;
1347
1348 /* If necessary, reverse the condition. */
1349 if (reversep)
1350 code = reverse_condition (code), uval = temp2, cval = temp3;
1351 else
1352 uval = temp3, cval = temp2;
1353
1354 /* If CVAL is non-zero, normalize to -1. Otherwise, if UVAL
1355 is the constant 1, it is best to just compute the result
1356 directly. If UVAL is constant and STORE_FLAG_VALUE
1357 includes all of its bits, it is best to compute the flag
1358 value unnormalized and `and' it with UVAL. Otherwise,
1359 normalize to -1 and `and' with UVAL. */
1360 normalizep = (cval != const0_rtx ? -1
1361 : (uval == const1_rtx ? 1
1362 : (GET_CODE (uval) == CONST_INT
1363 && (INTVAL (uval) & ~STORE_FLAG_VALUE) == 0)
1364 ? 0 : -1));
1365
1366 /* We will be putting the store-flag insn immediately in
1367 front of the comparison that was originally being done,
1368 so we know all the variables in TEMP4 will be valid.
1369 However, this might be in front of the assignment of
1370 A to VAR. If it is, it would clobber the store-flag
1371 we will be emitting.
1372
1373 Therefore, emit into a temporary which will be copied to
1374 VAR immediately after TEMP. */
1375
1376 start_sequence ();
1377 target = emit_store_flag (gen_reg_rtx (GET_MODE (var)), code,
1378 XEXP (temp4, 0), XEXP (temp4, 1),
1379 VOIDmode,
1380 (code == LTU || code == LEU
1381 || code == GEU || code == GTU),
1382 normalizep);
1383 if (target)
1384 {
1385 rtx seq;
1386 rtx before = insn;
1387
1388 seq = get_insns ();
1389 end_sequence ();
1390
1391 /* Put the store-flag insns in front of the first insn
1392 used to compute the condition to ensure that we
1393 use the same values of them as the current
1394 comparison. However, the remainder of the insns we
1395 generate will be placed directly in front of the
1396 jump insn, in case any of the pseudos we use
1397 are modified earlier. */
1398
1399 emit_insns_before (seq, temp5);
1400
1401 start_sequence ();
1402
1403 /* Both CVAL and UVAL are non-zero. */
1404 if (cval != const0_rtx && uval != const0_rtx)
1405 {
1406 rtx tem1, tem2;
1407
1408 tem1 = expand_and (uval, target, NULL_RTX);
1409 if (GET_CODE (cval) == CONST_INT
1410 && GET_CODE (uval) == CONST_INT
1411 && (INTVAL (cval) & INTVAL (uval)) == INTVAL (cval))
1412 tem2 = cval;
1413 else
1414 {
1415 tem2 = expand_unop (GET_MODE (var), one_cmpl_optab,
1416 target, NULL_RTX, 0);
1417 tem2 = expand_and (cval, tem2,
1418 (GET_CODE (tem2) == REG
1419 ? tem2 : 0));
1420 }
1421
1422 /* If we usually make new pseudos, do so here. This
1423 turns out to help machines that have conditional
1424 move insns. */
1425 /* ??? Conditional moves have already been handled.
1426 This may be obsolete. */
1427
1428 if (flag_expensive_optimizations)
1429 target = 0;
1430
1431 target = expand_binop (GET_MODE (var), ior_optab,
1432 tem1, tem2, target,
1433 1, OPTAB_WIDEN);
1434 }
1435 else if (normalizep != 1)
1436 {
1437 /* We know that either CVAL or UVAL is zero. If
1438 UVAL is zero, negate TARGET and `and' with CVAL.
1439 Otherwise, `and' with UVAL. */
1440 if (uval == const0_rtx)
1441 {
1442 target = expand_unop (GET_MODE (var), one_cmpl_optab,
1443 target, NULL_RTX, 0);
1444 uval = cval;
1445 }
1446
1447 target = expand_and (uval, target,
1448 (GET_CODE (target) == REG
1449 && ! preserve_subexpressions_p ()
1450 ? target : NULL_RTX));
1451 }
1452
1453 emit_move_insn (var, target);
1454 seq = get_insns ();
1455 end_sequence ();
1456 #ifdef HAVE_cc0
1457 /* If INSN uses CC0, we must not separate it from the
1458 insn that sets cc0. */
1459 if (reg_mentioned_p (cc0_rtx, PATTERN (before)))
1460 before = prev_nonnote_insn (before);
1461 #endif
1462 emit_insns_before (seq, before);
1463
1464 delete_insn (temp);
1465 next = NEXT_INSN (insn);
1466 delete_jump (insn);
1467
1468 if (after_regscan)
1469 {
1470 reg_scan_update (seq, NEXT_INSN (next), old_max_reg);
1471 old_max_reg = max_reg_num ();
1472 }
1473
1474 changed = 1;
1475 continue;
1476 }
1477 else
1478 end_sequence ();
1479 }
1480 }
1481
1482 /* If branches are expensive, convert
1483 if (foo) bar++; to bar += (foo != 0);
1484 and similarly for "bar--;"
1485
1486 INSN is the conditional branch around the arithmetic. We set:
1487
1488 TEMP is the arithmetic insn.
1489 TEMP1 is the SET doing the arithmetic.
1490 TEMP2 is the operand being incremented or decremented.
1491 TEMP3 to the condition being tested.
1492 TEMP4 to the earliest insn used to find the condition. */
1493
1494 if ((BRANCH_COST >= 2
1495 #ifdef HAVE_incscc
1496 || HAVE_incscc
1497 #endif
1498 #ifdef HAVE_decscc
1499 || HAVE_decscc
1500 #endif
1501 )
1502 && ! reload_completed
1503 && this_is_condjump && ! this_is_simplejump
1504 && (temp = next_nonnote_insn (insn)) != 0
1505 && (temp1 = single_set (temp)) != 0
1506 && (temp2 = SET_DEST (temp1),
1507 GET_MODE_CLASS (GET_MODE (temp2)) == MODE_INT)
1508 && GET_CODE (SET_SRC (temp1)) == PLUS
1509 && (XEXP (SET_SRC (temp1), 1) == const1_rtx
1510 || XEXP (SET_SRC (temp1), 1) == constm1_rtx)
1511 && rtx_equal_p (temp2, XEXP (SET_SRC (temp1), 0))
1512 && ! side_effects_p (temp2)
1513 && ! may_trap_p (temp2)
1514 /* INSN must either branch to the insn after TEMP or the insn
1515 after TEMP must branch to the same place as INSN. */
1516 && (reallabelprev == temp
1517 || ((temp3 = next_active_insn (temp)) != 0
1518 && simplejump_p (temp3)
1519 && JUMP_LABEL (temp3) == JUMP_LABEL (insn)))
1520 && (temp3 = get_condition (insn, &temp4)) != 0
1521 /* We must be comparing objects whose modes imply the size.
1522 We could handle BLKmode if (1) emit_store_flag could
1523 and (2) we could find the size reliably. */
1524 && GET_MODE (XEXP (temp3, 0)) != BLKmode
1525 && can_reverse_comparison_p (temp3, insn))
1526 {
1527 rtx temp6, target = 0, seq, init_insn = 0, init = temp2;
1528 enum rtx_code code = reverse_condition (GET_CODE (temp3));
1529
1530 start_sequence ();
1531
1532 /* It must be the case that TEMP2 is not modified in the range
1533 [TEMP4, INSN). The one exception we make is if the insn
1534 before INSN sets TEMP2 to something which is also unchanged
1535 in that range. In that case, we can move the initialization
1536 into our sequence. */
1537
1538 if ((temp5 = prev_active_insn (insn)) != 0
1539 && no_labels_between_p (temp5, insn)
1540 && GET_CODE (temp5) == INSN
1541 && (temp6 = single_set (temp5)) != 0
1542 && rtx_equal_p (temp2, SET_DEST (temp6))
1543 && (CONSTANT_P (SET_SRC (temp6))
1544 || GET_CODE (SET_SRC (temp6)) == REG
1545 || GET_CODE (SET_SRC (temp6)) == SUBREG))
1546 {
1547 emit_insn (PATTERN (temp5));
1548 init_insn = temp5;
1549 init = SET_SRC (temp6);
1550 }
1551
1552 if (CONSTANT_P (init)
1553 || ! reg_set_between_p (init, PREV_INSN (temp4), insn))
1554 target = emit_store_flag (gen_reg_rtx (GET_MODE (temp2)), code,
1555 XEXP (temp3, 0), XEXP (temp3, 1),
1556 VOIDmode,
1557 (code == LTU || code == LEU
1558 || code == GTU || code == GEU), 1);
1559
1560 /* If we can do the store-flag, do the addition or
1561 subtraction. */
1562
1563 if (target)
1564 target = expand_binop (GET_MODE (temp2),
1565 (XEXP (SET_SRC (temp1), 1) == const1_rtx
1566 ? add_optab : sub_optab),
1567 temp2, target, temp2, 0, OPTAB_WIDEN);
1568
1569 if (target != 0)
1570 {
1571 /* Put the result back in temp2 in case it isn't already.
1572 Then replace the jump, possible a CC0-setting insn in
1573 front of the jump, and TEMP, with the sequence we have
1574 made. */
1575
1576 if (target != temp2)
1577 emit_move_insn (temp2, target);
1578
1579 seq = get_insns ();
1580 end_sequence ();
1581
1582 emit_insns_before (seq, temp4);
1583 delete_insn (temp);
1584
1585 if (init_insn)
1586 delete_insn (init_insn);
1587
1588 next = NEXT_INSN (insn);
1589 #ifdef HAVE_cc0
1590 delete_insn (prev_nonnote_insn (insn));
1591 #endif
1592 delete_insn (insn);
1593
1594 if (after_regscan)
1595 {
1596 reg_scan_update (seq, NEXT_INSN (next), old_max_reg);
1597 old_max_reg = max_reg_num ();
1598 }
1599
1600 changed = 1;
1601 continue;
1602 }
1603 else
1604 end_sequence ();
1605 }
1606
1607 /* Simplify if (...) x = 1; else {...} if (x) ...
1608 We recognize this case scanning backwards as well.
1609
1610 TEMP is the assignment to x;
1611 TEMP1 is the label at the head of the second if. */
1612 /* ?? This should call get_condition to find the values being
1613 compared, instead of looking for a COMPARE insn when HAVE_cc0
1614 is not defined. This would allow it to work on the m88k. */
1615 /* ?? This optimization is only safe before cse is run if HAVE_cc0
1616 is not defined and the condition is tested by a separate compare
1617 insn. This is because the code below assumes that the result
1618 of the compare dies in the following branch.
1619
1620 Not only that, but there might be other insns between the
1621 compare and branch whose results are live. Those insns need
1622 to be executed.
1623
1624 A way to fix this is to move the insns at JUMP_LABEL (insn)
1625 to before INSN. If we are running before flow, they will
1626 be deleted if they aren't needed. But this doesn't work
1627 well after flow.
1628
1629 This is really a special-case of jump threading, anyway. The
1630 right thing to do is to replace this and jump threading with
1631 much simpler code in cse.
1632
1633 This code has been turned off in the non-cc0 case in the
1634 meantime. */
1635
1636 #ifdef HAVE_cc0
1637 else if (this_is_simplejump
1638 /* Safe to skip USE and CLOBBER insns here
1639 since they will not be deleted. */
1640 && (temp = prev_active_insn (insn))
1641 && no_labels_between_p (temp, insn)
1642 && GET_CODE (temp) == INSN
1643 && GET_CODE (PATTERN (temp)) == SET
1644 && GET_CODE (SET_DEST (PATTERN (temp))) == REG
1645 && CONSTANT_P (SET_SRC (PATTERN (temp)))
1646 && (temp1 = next_active_insn (JUMP_LABEL (insn)))
1647 /* If we find that the next value tested is `x'
1648 (TEMP1 is the insn where this happens), win. */
1649 && GET_CODE (temp1) == INSN
1650 && GET_CODE (PATTERN (temp1)) == SET
1651 #ifdef HAVE_cc0
1652 /* Does temp1 `tst' the value of x? */
1653 && SET_SRC (PATTERN (temp1)) == SET_DEST (PATTERN (temp))
1654 && SET_DEST (PATTERN (temp1)) == cc0_rtx
1655 && (temp1 = next_nonnote_insn (temp1))
1656 #else
1657 /* Does temp1 compare the value of x against zero? */
1658 && GET_CODE (SET_SRC (PATTERN (temp1))) == COMPARE
1659 && XEXP (SET_SRC (PATTERN (temp1)), 1) == const0_rtx
1660 && (XEXP (SET_SRC (PATTERN (temp1)), 0)
1661 == SET_DEST (PATTERN (temp)))
1662 && GET_CODE (SET_DEST (PATTERN (temp1))) == REG
1663 && (temp1 = find_next_ref (SET_DEST (PATTERN (temp1)), temp1))
1664 #endif
1665 && condjump_p (temp1))
1666 {
1667 /* Get the if_then_else from the condjump. */
1668 rtx choice = SET_SRC (PATTERN (temp1));
1669 if (GET_CODE (choice) == IF_THEN_ELSE)
1670 {
1671 enum rtx_code code = GET_CODE (XEXP (choice, 0));
1672 rtx val = SET_SRC (PATTERN (temp));
1673 rtx cond
1674 = simplify_relational_operation (code, GET_MODE (SET_DEST (PATTERN (temp))),
1675 val, const0_rtx);
1676 rtx ultimate;
1677
1678 if (cond == const_true_rtx)
1679 ultimate = XEXP (choice, 1);
1680 else if (cond == const0_rtx)
1681 ultimate = XEXP (choice, 2);
1682 else
1683 ultimate = 0;
1684
1685 if (ultimate == pc_rtx)
1686 ultimate = get_label_after (temp1);
1687 else if (ultimate && GET_CODE (ultimate) != RETURN)
1688 ultimate = XEXP (ultimate, 0);
1689
1690 if (ultimate && JUMP_LABEL(insn) != ultimate)
1691 changed |= redirect_jump (insn, ultimate);
1692 }
1693 }
1694 #endif
1695
1696 #if 0
1697 /* @@ This needs a bit of work before it will be right.
1698
1699 Any type of comparison can be accepted for the first and
1700 second compare. When rewriting the first jump, we must
1701 compute the what conditions can reach label3, and use the
1702 appropriate code. We can not simply reverse/swap the code
1703 of the first jump. In some cases, the second jump must be
1704 rewritten also.
1705
1706 For example,
1707 < == converts to > ==
1708 < != converts to == >
1709 etc.
1710
1711 If the code is written to only accept an '==' test for the second
1712 compare, then all that needs to be done is to swap the condition
1713 of the first branch.
1714
1715 It is questionable whether we want this optimization anyways,
1716 since if the user wrote code like this because he/she knew that
1717 the jump to label1 is taken most of the time, then rewriting
1718 this gives slower code. */
1719 /* @@ This should call get_condition to find the values being
1720 compared, instead of looking for a COMPARE insn when HAVE_cc0
1721 is not defined. This would allow it to work on the m88k. */
1722 /* @@ This optimization is only safe before cse is run if HAVE_cc0
1723 is not defined and the condition is tested by a separate compare
1724 insn. This is because the code below assumes that the result
1725 of the compare dies in the following branch. */
1726
1727 /* Simplify test a ~= b
1728 condjump label1;
1729 test a == b
1730 condjump label2;
1731 jump label3;
1732 label1:
1733
1734 rewriting as
1735 test a ~~= b
1736 condjump label3
1737 test a == b
1738 condjump label2
1739 label1:
1740
1741 where ~= is an inequality, e.g. >, and ~~= is the swapped
1742 inequality, e.g. <.
1743
1744 We recognize this case scanning backwards.
1745
1746 TEMP is the conditional jump to `label2';
1747 TEMP1 is the test for `a == b';
1748 TEMP2 is the conditional jump to `label1';
1749 TEMP3 is the test for `a ~= b'. */
1750 else if (this_is_simplejump
1751 && (temp = prev_active_insn (insn))
1752 && no_labels_between_p (temp, insn)
1753 && condjump_p (temp)
1754 && (temp1 = prev_active_insn (temp))
1755 && no_labels_between_p (temp1, temp)
1756 && GET_CODE (temp1) == INSN
1757 && GET_CODE (PATTERN (temp1)) == SET
1758 #ifdef HAVE_cc0
1759 && sets_cc0_p (PATTERN (temp1)) == 1
1760 #else
1761 && GET_CODE (SET_SRC (PATTERN (temp1))) == COMPARE
1762 && GET_CODE (SET_DEST (PATTERN (temp1))) == REG
1763 && (temp == find_next_ref (SET_DEST (PATTERN (temp1)), temp1))
1764 #endif
1765 && (temp2 = prev_active_insn (temp1))
1766 && no_labels_between_p (temp2, temp1)
1767 && condjump_p (temp2)
1768 && JUMP_LABEL (temp2) == next_nonnote_insn (NEXT_INSN (insn))
1769 && (temp3 = prev_active_insn (temp2))
1770 && no_labels_between_p (temp3, temp2)
1771 && GET_CODE (PATTERN (temp3)) == SET
1772 && rtx_equal_p (SET_DEST (PATTERN (temp3)),
1773 SET_DEST (PATTERN (temp1)))
1774 && rtx_equal_p (SET_SRC (PATTERN (temp1)),
1775 SET_SRC (PATTERN (temp3)))
1776 && ! inequality_comparisons_p (PATTERN (temp))
1777 && inequality_comparisons_p (PATTERN (temp2)))
1778 {
1779 rtx fallthrough_label = JUMP_LABEL (temp2);
1780
1781 ++LABEL_NUSES (fallthrough_label);
1782 if (swap_jump (temp2, JUMP_LABEL (insn)))
1783 {
1784 delete_insn (insn);
1785 changed = 1;
1786 }
1787
1788 if (--LABEL_NUSES (fallthrough_label) == 0)
1789 delete_insn (fallthrough_label);
1790 }
1791 #endif
1792 /* Simplify if (...) {... x = 1;} if (x) ...
1793
1794 We recognize this case backwards.
1795
1796 TEMP is the test of `x';
1797 TEMP1 is the assignment to `x' at the end of the
1798 previous statement. */
1799 /* @@ This should call get_condition to find the values being
1800 compared, instead of looking for a COMPARE insn when HAVE_cc0
1801 is not defined. This would allow it to work on the m88k. */
1802 /* @@ This optimization is only safe before cse is run if HAVE_cc0
1803 is not defined and the condition is tested by a separate compare
1804 insn. This is because the code below assumes that the result
1805 of the compare dies in the following branch. */
1806
1807 /* ??? This has to be turned off. The problem is that the
1808 unconditional jump might indirectly end up branching to the
1809 label between TEMP1 and TEMP. We can't detect this, in general,
1810 since it may become a jump to there after further optimizations.
1811 If that jump is done, it will be deleted, so we will retry
1812 this optimization in the next pass, thus an infinite loop.
1813
1814 The present code prevents this by putting the jump after the
1815 label, but this is not logically correct. */
1816 #if 0
1817 else if (this_is_condjump
1818 /* Safe to skip USE and CLOBBER insns here
1819 since they will not be deleted. */
1820 && (temp = prev_active_insn (insn))
1821 && no_labels_between_p (temp, insn)
1822 && GET_CODE (temp) == INSN
1823 && GET_CODE (PATTERN (temp)) == SET
1824 #ifdef HAVE_cc0
1825 && sets_cc0_p (PATTERN (temp)) == 1
1826 && GET_CODE (SET_SRC (PATTERN (temp))) == REG
1827 #else
1828 /* Temp must be a compare insn, we can not accept a register
1829 to register move here, since it may not be simply a
1830 tst insn. */
1831 && GET_CODE (SET_SRC (PATTERN (temp))) == COMPARE
1832 && XEXP (SET_SRC (PATTERN (temp)), 1) == const0_rtx
1833 && GET_CODE (XEXP (SET_SRC (PATTERN (temp)), 0)) == REG
1834 && GET_CODE (SET_DEST (PATTERN (temp))) == REG
1835 && insn == find_next_ref (SET_DEST (PATTERN (temp)), temp)
1836 #endif
1837 /* May skip USE or CLOBBER insns here
1838 for checking for opportunity, since we
1839 take care of them later. */
1840 && (temp1 = prev_active_insn (temp))
1841 && GET_CODE (temp1) == INSN
1842 && GET_CODE (PATTERN (temp1)) == SET
1843 #ifdef HAVE_cc0
1844 && SET_SRC (PATTERN (temp)) == SET_DEST (PATTERN (temp1))
1845 #else
1846 && (XEXP (SET_SRC (PATTERN (temp)), 0)
1847 == SET_DEST (PATTERN (temp1)))
1848 #endif
1849 && CONSTANT_P (SET_SRC (PATTERN (temp1)))
1850 /* If this isn't true, cse will do the job. */
1851 && ! no_labels_between_p (temp1, temp))
1852 {
1853 /* Get the if_then_else from the condjump. */
1854 rtx choice = SET_SRC (PATTERN (insn));
1855 if (GET_CODE (choice) == IF_THEN_ELSE
1856 && (GET_CODE (XEXP (choice, 0)) == EQ
1857 || GET_CODE (XEXP (choice, 0)) == NE))
1858 {
1859 int want_nonzero = (GET_CODE (XEXP (choice, 0)) == NE);
1860 rtx last_insn;
1861 rtx ultimate;
1862 rtx p;
1863
1864 /* Get the place that condjump will jump to
1865 if it is reached from here. */
1866 if ((SET_SRC (PATTERN (temp1)) != const0_rtx)
1867 == want_nonzero)
1868 ultimate = XEXP (choice, 1);
1869 else
1870 ultimate = XEXP (choice, 2);
1871 /* Get it as a CODE_LABEL. */
1872 if (ultimate == pc_rtx)
1873 ultimate = get_label_after (insn);
1874 else
1875 /* Get the label out of the LABEL_REF. */
1876 ultimate = XEXP (ultimate, 0);
1877
1878 /* Insert the jump immediately before TEMP, specifically
1879 after the label that is between TEMP1 and TEMP. */
1880 last_insn = PREV_INSN (temp);
1881
1882 /* If we would be branching to the next insn, the jump
1883 would immediately be deleted and the re-inserted in
1884 a subsequent pass over the code. So don't do anything
1885 in that case. */
1886 if (next_active_insn (last_insn)
1887 != next_active_insn (ultimate))
1888 {
1889 emit_barrier_after (last_insn);
1890 p = emit_jump_insn_after (gen_jump (ultimate),
1891 last_insn);
1892 JUMP_LABEL (p) = ultimate;
1893 ++LABEL_NUSES (ultimate);
1894 if (INSN_UID (ultimate) < max_jump_chain
1895 && INSN_CODE (p) < max_jump_chain)
1896 {
1897 jump_chain[INSN_UID (p)]
1898 = jump_chain[INSN_UID (ultimate)];
1899 jump_chain[INSN_UID (ultimate)] = p;
1900 }
1901 changed = 1;
1902 continue;
1903 }
1904 }
1905 }
1906 #endif
1907 #ifdef HAVE_trap
1908 /* Detect a conditional jump jumping over an unconditional trap. */
1909 else if (HAVE_trap
1910 && this_is_condjump && ! this_is_simplejump
1911 && reallabelprev != 0
1912 && GET_CODE (reallabelprev) == INSN
1913 && GET_CODE (PATTERN (reallabelprev)) == TRAP_IF
1914 && TRAP_CONDITION (PATTERN (reallabelprev)) == const_true_rtx
1915 && prev_active_insn (reallabelprev) == insn
1916 && no_labels_between_p (insn, reallabelprev)
1917 && (temp2 = get_condition (insn, &temp4))
1918 && can_reverse_comparison_p (temp2, insn))
1919 {
1920 rtx new = gen_cond_trap (reverse_condition (GET_CODE (temp2)),
1921 XEXP (temp2, 0), XEXP (temp2, 1),
1922 TRAP_CODE (PATTERN (reallabelprev)));
1923
1924 if (new)
1925 {
1926 emit_insn_before (new, temp4);
1927 delete_insn (reallabelprev);
1928 delete_jump (insn);
1929 changed = 1;
1930 continue;
1931 }
1932 }
1933 /* Detect a jump jumping to an unconditional trap. */
1934 else if (HAVE_trap && this_is_condjump
1935 && (temp = next_active_insn (JUMP_LABEL (insn)))
1936 && GET_CODE (temp) == INSN
1937 && GET_CODE (PATTERN (temp)) == TRAP_IF
1938 && (this_is_simplejump
1939 || (temp2 = get_condition (insn, &temp4))))
1940 {
1941 rtx tc = TRAP_CONDITION (PATTERN (temp));
1942
1943 if (tc == const_true_rtx
1944 || (! this_is_simplejump && rtx_equal_p (temp2, tc)))
1945 {
1946 rtx new;
1947 /* Replace an unconditional jump to a trap with a trap. */
1948 if (this_is_simplejump)
1949 {
1950 emit_barrier_after (emit_insn_before (gen_trap (), insn));
1951 delete_jump (insn);
1952 changed = 1;
1953 continue;
1954 }
1955 new = gen_cond_trap (GET_CODE (temp2), XEXP (temp2, 0),
1956 XEXP (temp2, 1),
1957 TRAP_CODE (PATTERN (temp)));
1958 if (new)
1959 {
1960 emit_insn_before (new, temp4);
1961 delete_jump (insn);
1962 changed = 1;
1963 continue;
1964 }
1965 }
1966 /* If the trap condition and jump condition are mutually
1967 exclusive, redirect the jump to the following insn. */
1968 else if (GET_RTX_CLASS (GET_CODE (tc)) == '<'
1969 && ! this_is_simplejump
1970 && swap_condition (GET_CODE (temp2)) == GET_CODE (tc)
1971 && rtx_equal_p (XEXP (tc, 0), XEXP (temp2, 0))
1972 && rtx_equal_p (XEXP (tc, 1), XEXP (temp2, 1))
1973 && redirect_jump (insn, get_label_after (temp)))
1974 {
1975 changed = 1;
1976 continue;
1977 }
1978 }
1979 #endif
1980 else
1981 {
1982 /* Detect a jump to a jump. */
1983
1984 /* Look for if (foo) bar; else break; */
1985 /* The insns look like this:
1986 insn = condjump label1;
1987 ...range1 (some insns)...
1988 jump label2;
1989 label1:
1990 ...range2 (some insns)...
1991 jump somewhere unconditionally
1992 label2: */
1993 {
1994 rtx label1 = next_label (insn);
1995 rtx range1end = label1 ? prev_active_insn (label1) : 0;
1996 /* Don't do this optimization on the first round, so that
1997 jump-around-a-jump gets simplified before we ask here
1998 whether a jump is unconditional.
1999
2000 Also don't do it when we are called after reload since
2001 it will confuse reorg. */
2002 if (! first
2003 && (reload_completed ? ! flag_delayed_branch : 1)
2004 /* Make sure INSN is something we can invert. */
2005 && condjump_p (insn)
2006 && label1 != 0
2007 && JUMP_LABEL (insn) == label1
2008 && LABEL_NUSES (label1) == 1
2009 && GET_CODE (range1end) == JUMP_INSN
2010 && simplejump_p (range1end))
2011 {
2012 rtx label2 = next_label (label1);
2013 rtx range2end = label2 ? prev_active_insn (label2) : 0;
2014 if (range1end != range2end
2015 && JUMP_LABEL (range1end) == label2
2016 && GET_CODE (range2end) == JUMP_INSN
2017 && GET_CODE (NEXT_INSN (range2end)) == BARRIER
2018 /* Invert the jump condition, so we
2019 still execute the same insns in each case. */
2020 && invert_jump (insn, label1))
2021 {
2022 rtx range1beg = next_active_insn (insn);
2023 rtx range2beg = next_active_insn (label1);
2024 rtx range1after, range2after;
2025 rtx range1before, range2before;
2026 rtx rangenext;
2027
2028 /* Include in each range any notes before it, to be
2029 sure that we get the line number note if any, even
2030 if there are other notes here. */
2031 while (PREV_INSN (range1beg)
2032 && GET_CODE (PREV_INSN (range1beg)) == NOTE)
2033 range1beg = PREV_INSN (range1beg);
2034
2035 while (PREV_INSN (range2beg)
2036 && GET_CODE (PREV_INSN (range2beg)) == NOTE)
2037 range2beg = PREV_INSN (range2beg);
2038
2039 /* Don't move NOTEs for blocks or loops; shift them
2040 outside the ranges, where they'll stay put. */
2041 range1beg = squeeze_notes (range1beg, range1end);
2042 range2beg = squeeze_notes (range2beg, range2end);
2043
2044 /* Get current surrounds of the 2 ranges. */
2045 range1before = PREV_INSN (range1beg);
2046 range2before = PREV_INSN (range2beg);
2047 range1after = NEXT_INSN (range1end);
2048 range2after = NEXT_INSN (range2end);
2049
2050 /* Splice range2 where range1 was. */
2051 NEXT_INSN (range1before) = range2beg;
2052 PREV_INSN (range2beg) = range1before;
2053 NEXT_INSN (range2end) = range1after;
2054 PREV_INSN (range1after) = range2end;
2055 /* Splice range1 where range2 was. */
2056 NEXT_INSN (range2before) = range1beg;
2057 PREV_INSN (range1beg) = range2before;
2058 NEXT_INSN (range1end) = range2after;
2059 PREV_INSN (range2after) = range1end;
2060
2061 /* Check for a loop end note between the end of
2062 range2, and the next code label. If there is one,
2063 then what we have really seen is
2064 if (foo) break; end_of_loop;
2065 and moved the break sequence outside the loop.
2066 We must move the LOOP_END note to where the
2067 loop really ends now, or we will confuse loop
2068 optimization. Stop if we find a LOOP_BEG note
2069 first, since we don't want to move the LOOP_END
2070 note in that case. */
2071 for (;range2after != label2; range2after = rangenext)
2072 {
2073 rangenext = NEXT_INSN (range2after);
2074 if (GET_CODE (range2after) == NOTE)
2075 {
2076 if (NOTE_LINE_NUMBER (range2after)
2077 == NOTE_INSN_LOOP_END)
2078 {
2079 NEXT_INSN (PREV_INSN (range2after))
2080 = rangenext;
2081 PREV_INSN (rangenext)
2082 = PREV_INSN (range2after);
2083 PREV_INSN (range2after)
2084 = PREV_INSN (range1beg);
2085 NEXT_INSN (range2after) = range1beg;
2086 NEXT_INSN (PREV_INSN (range1beg))
2087 = range2after;
2088 PREV_INSN (range1beg) = range2after;
2089 }
2090 else if (NOTE_LINE_NUMBER (range2after)
2091 == NOTE_INSN_LOOP_BEG)
2092 break;
2093 }
2094 }
2095 changed = 1;
2096 continue;
2097 }
2098 }
2099 }
2100
2101 /* Now that the jump has been tensioned,
2102 try cross jumping: check for identical code
2103 before the jump and before its target label. */
2104
2105 /* First, cross jumping of conditional jumps: */
2106
2107 if (cross_jump && condjump_p (insn))
2108 {
2109 rtx newjpos, newlpos;
2110 rtx x = prev_real_insn (JUMP_LABEL (insn));
2111
2112 /* A conditional jump may be crossjumped
2113 only if the place it jumps to follows
2114 an opposing jump that comes back here. */
2115
2116 if (x != 0 && ! jump_back_p (x, insn))
2117 /* We have no opposing jump;
2118 cannot cross jump this insn. */
2119 x = 0;
2120
2121 newjpos = 0;
2122 /* TARGET is nonzero if it is ok to cross jump
2123 to code before TARGET. If so, see if matches. */
2124 if (x != 0)
2125 find_cross_jump (insn, x, 2,
2126 &newjpos, &newlpos);
2127
2128 if (newjpos != 0)
2129 {
2130 do_cross_jump (insn, newjpos, newlpos);
2131 /* Make the old conditional jump
2132 into an unconditional one. */
2133 SET_SRC (PATTERN (insn))
2134 = gen_rtx_LABEL_REF (VOIDmode, JUMP_LABEL (insn));
2135 INSN_CODE (insn) = -1;
2136 emit_barrier_after (insn);
2137 /* Add to jump_chain unless this is a new label
2138 whose UID is too large. */
2139 if (INSN_UID (JUMP_LABEL (insn)) < max_jump_chain)
2140 {
2141 jump_chain[INSN_UID (insn)]
2142 = jump_chain[INSN_UID (JUMP_LABEL (insn))];
2143 jump_chain[INSN_UID (JUMP_LABEL (insn))] = insn;
2144 }
2145 changed = 1;
2146 next = insn;
2147 }
2148 }
2149
2150 /* Cross jumping of unconditional jumps:
2151 a few differences. */
2152
2153 if (cross_jump && simplejump_p (insn))
2154 {
2155 rtx newjpos, newlpos;
2156 rtx target;
2157
2158 newjpos = 0;
2159
2160 /* TARGET is nonzero if it is ok to cross jump
2161 to code before TARGET. If so, see if matches. */
2162 find_cross_jump (insn, JUMP_LABEL (insn), 1,
2163 &newjpos, &newlpos);
2164
2165 /* If cannot cross jump to code before the label,
2166 see if we can cross jump to another jump to
2167 the same label. */
2168 /* Try each other jump to this label. */
2169 if (INSN_UID (JUMP_LABEL (insn)) < max_uid)
2170 for (target = jump_chain[INSN_UID (JUMP_LABEL (insn))];
2171 target != 0 && newjpos == 0;
2172 target = jump_chain[INSN_UID (target)])
2173 if (target != insn
2174 && JUMP_LABEL (target) == JUMP_LABEL (insn)
2175 /* Ignore TARGET if it's deleted. */
2176 && ! INSN_DELETED_P (target))
2177 find_cross_jump (insn, target, 2,
2178 &newjpos, &newlpos);
2179
2180 if (newjpos != 0)
2181 {
2182 do_cross_jump (insn, newjpos, newlpos);
2183 changed = 1;
2184 next = insn;
2185 }
2186 }
2187
2188 /* This code was dead in the previous jump.c! */
2189 if (cross_jump && GET_CODE (PATTERN (insn)) == RETURN)
2190 {
2191 /* Return insns all "jump to the same place"
2192 so we can cross-jump between any two of them. */
2193
2194 rtx newjpos, newlpos, target;
2195
2196 newjpos = 0;
2197
2198 /* If cannot cross jump to code before the label,
2199 see if we can cross jump to another jump to
2200 the same label. */
2201 /* Try each other jump to this label. */
2202 for (target = jump_chain[0];
2203 target != 0 && newjpos == 0;
2204 target = jump_chain[INSN_UID (target)])
2205 if (target != insn
2206 && ! INSN_DELETED_P (target)
2207 && GET_CODE (PATTERN (target)) == RETURN)
2208 find_cross_jump (insn, target, 2,
2209 &newjpos, &newlpos);
2210
2211 if (newjpos != 0)
2212 {
2213 do_cross_jump (insn, newjpos, newlpos);
2214 changed = 1;
2215 next = insn;
2216 }
2217 }
2218 }
2219 }
2220
2221 first = 0;
2222 }
2223
2224 /* Delete extraneous line number notes.
2225 Note that two consecutive notes for different lines are not really
2226 extraneous. There should be some indication where that line belonged,
2227 even if it became empty. */
2228
2229 {
2230 rtx last_note = 0;
2231
2232 for (insn = f; insn; insn = NEXT_INSN (insn))
2233 if (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) >= 0)
2234 {
2235 /* Delete this note if it is identical to previous note. */
2236 if (last_note
2237 && NOTE_SOURCE_FILE (insn) == NOTE_SOURCE_FILE (last_note)
2238 && NOTE_LINE_NUMBER (insn) == NOTE_LINE_NUMBER (last_note))
2239 {
2240 delete_insn (insn);
2241 continue;
2242 }
2243
2244 last_note = insn;
2245 }
2246 }
2247
2248 #ifdef HAVE_return
2249 if (HAVE_return)
2250 {
2251 /* If we fall through to the epilogue, see if we can insert a RETURN insn
2252 in front of it. If the machine allows it at this point (we might be
2253 after reload for a leaf routine), it will improve optimization for it
2254 to be there. We do this both here and at the start of this pass since
2255 the RETURN might have been deleted by some of our optimizations. */
2256 insn = get_last_insn ();
2257 while (insn && GET_CODE (insn) == NOTE)
2258 insn = PREV_INSN (insn);
2259
2260 if (insn && GET_CODE (insn) != BARRIER)
2261 {
2262 emit_jump_insn (gen_return ());
2263 emit_barrier ();
2264 }
2265 }
2266 #endif
2267
2268 /* CAN_REACH_END is persistent for each function. Once set it should
2269 not be cleared. This is especially true for the case where we
2270 delete the NOTE_FUNCTION_END note. CAN_REACH_END is cleared by
2271 the front-end before compiling each function. */
2272 if (calculate_can_reach_end (last_insn, 0, 1))
2273 can_reach_end = 1;
2274
2275 /* Show JUMP_CHAIN no longer valid. */
2276 jump_chain = 0;
2277 }
2278 \f
2279 /* Initialize LABEL_NUSES and JUMP_LABEL fields. Delete any REG_LABEL
2280 notes whose labels don't occur in the insn any more. Returns the
2281 largest INSN_UID found. */
2282 static int
2283 init_label_info (f)
2284 rtx f;
2285 {
2286 int largest_uid = 0;
2287 rtx insn;
2288
2289 for (insn = f; insn; insn = NEXT_INSN (insn))
2290 {
2291 if (GET_CODE (insn) == CODE_LABEL)
2292 LABEL_NUSES (insn) = (LABEL_PRESERVE_P (insn) != 0);
2293 else if (GET_CODE (insn) == JUMP_INSN)
2294 JUMP_LABEL (insn) = 0;
2295 else if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
2296 {
2297 rtx note, next;
2298
2299 for (note = REG_NOTES (insn); note; note = next)
2300 {
2301 next = XEXP (note, 1);
2302 if (REG_NOTE_KIND (note) == REG_LABEL
2303 && ! reg_mentioned_p (XEXP (note, 0), PATTERN (insn)))
2304 remove_note (insn, note);
2305 }
2306 }
2307 if (INSN_UID (insn) > largest_uid)
2308 largest_uid = INSN_UID (insn);
2309 }
2310
2311 return largest_uid;
2312 }
2313
2314 /* Delete insns following barriers, up to next label.
2315
2316 Also delete no-op jumps created by gcse. */
2317 static void
2318 delete_barrier_successors (f)
2319 rtx f;
2320 {
2321 rtx insn;
2322
2323 for (insn = f; insn;)
2324 {
2325 if (GET_CODE (insn) == BARRIER)
2326 {
2327 insn = NEXT_INSN (insn);
2328
2329 never_reached_warning (insn);
2330
2331 while (insn != 0 && GET_CODE (insn) != CODE_LABEL)
2332 {
2333 if (GET_CODE (insn) == NOTE
2334 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_FUNCTION_END)
2335 insn = NEXT_INSN (insn);
2336 else
2337 insn = delete_insn (insn);
2338 }
2339 /* INSN is now the code_label. */
2340 }
2341 /* Also remove (set (pc) (pc)) insns which can be created by
2342 gcse. We eliminate such insns now to avoid having them
2343 cause problems later. */
2344 else if (GET_CODE (insn) == JUMP_INSN
2345 && GET_CODE (PATTERN (insn)) == SET
2346 && SET_SRC (PATTERN (insn)) == pc_rtx
2347 && SET_DEST (PATTERN (insn)) == pc_rtx)
2348 insn = delete_insn (insn);
2349
2350 else
2351 insn = NEXT_INSN (insn);
2352 }
2353 }
2354
2355 /* Mark the label each jump jumps to.
2356 Combine consecutive labels, and count uses of labels.
2357
2358 For each label, make a chain (using `jump_chain')
2359 of all the *unconditional* jumps that jump to it;
2360 also make a chain of all returns.
2361
2362 CROSS_JUMP indicates whether we are doing cross jumping
2363 and if we are whether we will be paying attention to
2364 death notes or not. */
2365
2366 static void
2367 mark_all_labels (f, cross_jump)
2368 rtx f;
2369 int cross_jump;
2370 {
2371 rtx insn;
2372
2373 for (insn = f; insn; insn = NEXT_INSN (insn))
2374 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
2375 {
2376 mark_jump_label (PATTERN (insn), insn, cross_jump);
2377 if (! INSN_DELETED_P (insn) && GET_CODE (insn) == JUMP_INSN)
2378 {
2379 if (JUMP_LABEL (insn) != 0 && simplejump_p (insn))
2380 {
2381 jump_chain[INSN_UID (insn)]
2382 = jump_chain[INSN_UID (JUMP_LABEL (insn))];
2383 jump_chain[INSN_UID (JUMP_LABEL (insn))] = insn;
2384 }
2385 if (GET_CODE (PATTERN (insn)) == RETURN)
2386 {
2387 jump_chain[INSN_UID (insn)] = jump_chain[0];
2388 jump_chain[0] = insn;
2389 }
2390 }
2391 }
2392 }
2393
2394 /* Delete all labels already not referenced.
2395 Also find and return the last insn. */
2396
2397 static rtx
2398 delete_unreferenced_labels (f)
2399 rtx f;
2400 {
2401 rtx final = NULL_RTX;
2402 rtx insn;
2403
2404 for (insn = f; insn; )
2405 {
2406 if (GET_CODE (insn) == CODE_LABEL && LABEL_NUSES (insn) == 0)
2407 insn = delete_insn (insn);
2408 else
2409 {
2410 final = insn;
2411 insn = NEXT_INSN (insn);
2412 }
2413 }
2414
2415 return final;
2416 }
2417
2418 /* Delete various simple forms of moves which have no necessary
2419 side effect. */
2420
2421 static void
2422 delete_noop_moves (f)
2423 rtx f;
2424 {
2425 rtx insn, next;
2426
2427 for (insn = f; insn; )
2428 {
2429 next = NEXT_INSN (insn);
2430
2431 if (GET_CODE (insn) == INSN)
2432 {
2433 register rtx body = PATTERN (insn);
2434
2435 /* Combine stack_adjusts with following push_insns. */
2436 #ifdef PUSH_ROUNDING
2437 if (GET_CODE (body) == SET
2438 && SET_DEST (body) == stack_pointer_rtx
2439 && GET_CODE (SET_SRC (body)) == PLUS
2440 && XEXP (SET_SRC (body), 0) == stack_pointer_rtx
2441 && GET_CODE (XEXP (SET_SRC (body), 1)) == CONST_INT
2442 && INTVAL (XEXP (SET_SRC (body), 1)) > 0)
2443 {
2444 rtx p;
2445 rtx stack_adjust_insn = insn;
2446 int stack_adjust_amount = INTVAL (XEXP (SET_SRC (body), 1));
2447 int total_pushed = 0;
2448 int pushes = 0;
2449
2450 /* Find all successive push insns. */
2451 p = insn;
2452 /* Don't convert more than three pushes;
2453 that starts adding too many displaced addresses
2454 and the whole thing starts becoming a losing
2455 proposition. */
2456 while (pushes < 3)
2457 {
2458 rtx pbody, dest;
2459 p = next_nonnote_insn (p);
2460 if (p == 0 || GET_CODE (p) != INSN)
2461 break;
2462 pbody = PATTERN (p);
2463 if (GET_CODE (pbody) != SET)
2464 break;
2465 dest = SET_DEST (pbody);
2466 /* Allow a no-op move between the adjust and the push. */
2467 if (GET_CODE (dest) == REG
2468 && GET_CODE (SET_SRC (pbody)) == REG
2469 && REGNO (dest) == REGNO (SET_SRC (pbody)))
2470 continue;
2471 if (! (GET_CODE (dest) == MEM
2472 && GET_CODE (XEXP (dest, 0)) == POST_INC
2473 && XEXP (XEXP (dest, 0), 0) == stack_pointer_rtx))
2474 break;
2475 pushes++;
2476 if (total_pushed + GET_MODE_SIZE (GET_MODE (SET_DEST (pbody)))
2477 > stack_adjust_amount)
2478 break;
2479 total_pushed += GET_MODE_SIZE (GET_MODE (SET_DEST (pbody)));
2480 }
2481
2482 /* Discard the amount pushed from the stack adjust;
2483 maybe eliminate it entirely. */
2484 if (total_pushed >= stack_adjust_amount)
2485 {
2486 delete_computation (stack_adjust_insn);
2487 total_pushed = stack_adjust_amount;
2488 }
2489 else
2490 XEXP (SET_SRC (PATTERN (stack_adjust_insn)), 1)
2491 = GEN_INT (stack_adjust_amount - total_pushed);
2492
2493 /* Change the appropriate push insns to ordinary stores. */
2494 p = insn;
2495 while (total_pushed > 0)
2496 {
2497 rtx pbody, dest;
2498 p = next_nonnote_insn (p);
2499 if (GET_CODE (p) != INSN)
2500 break;
2501 pbody = PATTERN (p);
2502 if (GET_CODE (pbody) != SET)
2503 break;
2504 dest = SET_DEST (pbody);
2505 /* Allow a no-op move between the adjust and the push. */
2506 if (GET_CODE (dest) == REG
2507 && GET_CODE (SET_SRC (pbody)) == REG
2508 && REGNO (dest) == REGNO (SET_SRC (pbody)))
2509 continue;
2510 if (! (GET_CODE (dest) == MEM
2511 && GET_CODE (XEXP (dest, 0)) == POST_INC
2512 && XEXP (XEXP (dest, 0), 0) == stack_pointer_rtx))
2513 break;
2514 total_pushed -= GET_MODE_SIZE (GET_MODE (SET_DEST (pbody)));
2515 /* If this push doesn't fully fit in the space
2516 of the stack adjust that we deleted,
2517 make another stack adjust here for what we
2518 didn't use up. There should be peepholes
2519 to recognize the resulting sequence of insns. */
2520 if (total_pushed < 0)
2521 {
2522 emit_insn_before (gen_add2_insn (stack_pointer_rtx,
2523 GEN_INT (- total_pushed)),
2524 p);
2525 break;
2526 }
2527 XEXP (dest, 0)
2528 = plus_constant (stack_pointer_rtx, total_pushed);
2529 }
2530 }
2531 #endif
2532
2533 /* Detect and delete no-op move instructions
2534 resulting from not allocating a parameter in a register. */
2535
2536 if (GET_CODE (body) == SET
2537 && (SET_DEST (body) == SET_SRC (body)
2538 || (GET_CODE (SET_DEST (body)) == MEM
2539 && GET_CODE (SET_SRC (body)) == MEM
2540 && rtx_equal_p (SET_SRC (body), SET_DEST (body))))
2541 && ! (GET_CODE (SET_DEST (body)) == MEM
2542 && MEM_VOLATILE_P (SET_DEST (body)))
2543 && ! (GET_CODE (SET_SRC (body)) == MEM
2544 && MEM_VOLATILE_P (SET_SRC (body))))
2545 delete_computation (insn);
2546
2547 /* Detect and ignore no-op move instructions
2548 resulting from smart or fortuitous register allocation. */
2549
2550 else if (GET_CODE (body) == SET)
2551 {
2552 int sreg = true_regnum (SET_SRC (body));
2553 int dreg = true_regnum (SET_DEST (body));
2554
2555 if (sreg == dreg && sreg >= 0)
2556 delete_insn (insn);
2557 else if (sreg >= 0 && dreg >= 0)
2558 {
2559 rtx trial;
2560 rtx tem = find_equiv_reg (NULL_RTX, insn, 0,
2561 sreg, NULL_PTR, dreg,
2562 GET_MODE (SET_SRC (body)));
2563
2564 if (tem != 0
2565 && GET_MODE (tem) == GET_MODE (SET_DEST (body)))
2566 {
2567 /* DREG may have been the target of a REG_DEAD note in
2568 the insn which makes INSN redundant. If so, reorg
2569 would still think it is dead. So search for such a
2570 note and delete it if we find it. */
2571 if (! find_regno_note (insn, REG_UNUSED, dreg))
2572 for (trial = prev_nonnote_insn (insn);
2573 trial && GET_CODE (trial) != CODE_LABEL;
2574 trial = prev_nonnote_insn (trial))
2575 if (find_regno_note (trial, REG_DEAD, dreg))
2576 {
2577 remove_death (dreg, trial);
2578 break;
2579 }
2580
2581 /* Deleting insn could lose a death-note for SREG. */
2582 if ((trial = find_regno_note (insn, REG_DEAD, sreg)))
2583 {
2584 /* Change this into a USE so that we won't emit
2585 code for it, but still can keep the note. */
2586 PATTERN (insn)
2587 = gen_rtx_USE (VOIDmode, XEXP (trial, 0));
2588 INSN_CODE (insn) = -1;
2589 /* Remove all reg notes but the REG_DEAD one. */
2590 REG_NOTES (insn) = trial;
2591 XEXP (trial, 1) = NULL_RTX;
2592 }
2593 else
2594 delete_insn (insn);
2595 }
2596 }
2597 else if (dreg >= 0 && CONSTANT_P (SET_SRC (body))
2598 && find_equiv_reg (SET_SRC (body), insn, 0, dreg,
2599 NULL_PTR, 0,
2600 GET_MODE (SET_DEST (body))))
2601 {
2602 /* This handles the case where we have two consecutive
2603 assignments of the same constant to pseudos that didn't
2604 get a hard reg. Each SET from the constant will be
2605 converted into a SET of the spill register and an
2606 output reload will be made following it. This produces
2607 two loads of the same constant into the same spill
2608 register. */
2609
2610 rtx in_insn = insn;
2611
2612 /* Look back for a death note for the first reg.
2613 If there is one, it is no longer accurate. */
2614 while (in_insn && GET_CODE (in_insn) != CODE_LABEL)
2615 {
2616 if ((GET_CODE (in_insn) == INSN
2617 || GET_CODE (in_insn) == JUMP_INSN)
2618 && find_regno_note (in_insn, REG_DEAD, dreg))
2619 {
2620 remove_death (dreg, in_insn);
2621 break;
2622 }
2623 in_insn = PREV_INSN (in_insn);
2624 }
2625
2626 /* Delete the second load of the value. */
2627 delete_insn (insn);
2628 }
2629 }
2630 else if (GET_CODE (body) == PARALLEL)
2631 {
2632 /* If each part is a set between two identical registers or
2633 a USE or CLOBBER, delete the insn. */
2634 int i, sreg, dreg;
2635 rtx tem;
2636
2637 for (i = XVECLEN (body, 0) - 1; i >= 0; i--)
2638 {
2639 tem = XVECEXP (body, 0, i);
2640 if (GET_CODE (tem) == USE || GET_CODE (tem) == CLOBBER)
2641 continue;
2642
2643 if (GET_CODE (tem) != SET
2644 || (sreg = true_regnum (SET_SRC (tem))) < 0
2645 || (dreg = true_regnum (SET_DEST (tem))) < 0
2646 || dreg != sreg)
2647 break;
2648 }
2649
2650 if (i < 0)
2651 delete_insn (insn);
2652 }
2653 /* Also delete insns to store bit fields if they are no-ops. */
2654 /* Not worth the hair to detect this in the big-endian case. */
2655 else if (! BYTES_BIG_ENDIAN
2656 && GET_CODE (body) == SET
2657 && GET_CODE (SET_DEST (body)) == ZERO_EXTRACT
2658 && XEXP (SET_DEST (body), 2) == const0_rtx
2659 && XEXP (SET_DEST (body), 0) == SET_SRC (body)
2660 && ! (GET_CODE (SET_SRC (body)) == MEM
2661 && MEM_VOLATILE_P (SET_SRC (body))))
2662 delete_insn (insn);
2663 }
2664 insn = next;
2665 }
2666 }
2667
2668 /* See if there is still a NOTE_INSN_FUNCTION_END in this function.
2669 If so indicate that this function can drop off the end by returning
2670 1, else return 0.
2671
2672 CHECK_DELETED indicates whether we must check if the note being
2673 searched for has the deleted flag set.
2674
2675 DELETE_FINAL_NOTE indicates whether we should delete the note
2676 if we find it. */
2677
2678 static int
2679 calculate_can_reach_end (last, check_deleted, delete_final_note)
2680 rtx last;
2681 int check_deleted;
2682 int delete_final_note;
2683 {
2684 rtx insn = last;
2685 int n_labels = 1;
2686
2687 while (insn != NULL_RTX)
2688 {
2689 int ok = 0;
2690
2691 /* One label can follow the end-note: the return label. */
2692 if (GET_CODE (insn) == CODE_LABEL && n_labels-- > 0)
2693 ok = 1;
2694 /* Ordinary insns can follow it if returning a structure. */
2695 else if (GET_CODE (insn) == INSN)
2696 ok = 1;
2697 /* If machine uses explicit RETURN insns, no epilogue,
2698 then one of them follows the note. */
2699 else if (GET_CODE (insn) == JUMP_INSN
2700 && GET_CODE (PATTERN (insn)) == RETURN)
2701 ok = 1;
2702 /* A barrier can follow the return insn. */
2703 else if (GET_CODE (insn) == BARRIER)
2704 ok = 1;
2705 /* Other kinds of notes can follow also. */
2706 else if (GET_CODE (insn) == NOTE
2707 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_FUNCTION_END)
2708 ok = 1;
2709
2710 if (ok != 1)
2711 break;
2712
2713 insn = PREV_INSN (insn);
2714 }
2715
2716 /* See if we backed up to the appropriate type of note. */
2717 if (insn != NULL_RTX
2718 && GET_CODE (insn) == NOTE
2719 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_FUNCTION_END
2720 && (check_deleted == 0
2721 || ! INSN_DELETED_P (insn)))
2722 {
2723 if (delete_final_note)
2724 delete_insn (insn);
2725 return 1;
2726 }
2727
2728 return 0;
2729 }
2730
2731 /* LOOP_START is a NOTE_INSN_LOOP_BEG note that is followed by an unconditional
2732 jump. Assume that this unconditional jump is to the exit test code. If
2733 the code is sufficiently simple, make a copy of it before INSN,
2734 followed by a jump to the exit of the loop. Then delete the unconditional
2735 jump after INSN.
2736
2737 Return 1 if we made the change, else 0.
2738
2739 This is only safe immediately after a regscan pass because it uses the
2740 values of regno_first_uid and regno_last_uid. */
2741
2742 static int
2743 duplicate_loop_exit_test (loop_start)
2744 rtx loop_start;
2745 {
2746 rtx insn, set, reg, p, link;
2747 rtx copy = 0, first_copy = 0;
2748 int num_insns = 0;
2749 rtx exitcode = NEXT_INSN (JUMP_LABEL (next_nonnote_insn (loop_start)));
2750 rtx lastexit;
2751 int max_reg = max_reg_num ();
2752 rtx *reg_map = 0;
2753
2754 /* Scan the exit code. We do not perform this optimization if any insn:
2755
2756 is a CALL_INSN
2757 is a CODE_LABEL
2758 has a REG_RETVAL or REG_LIBCALL note (hard to adjust)
2759 is a NOTE_INSN_LOOP_BEG because this means we have a nested loop
2760 is a NOTE_INSN_BLOCK_{BEG,END} because duplicating these notes
2761 is not valid.
2762
2763 We also do not do this if we find an insn with ASM_OPERANDS. While
2764 this restriction should not be necessary, copying an insn with
2765 ASM_OPERANDS can confuse asm_noperands in some cases.
2766
2767 Also, don't do this if the exit code is more than 20 insns. */
2768
2769 for (insn = exitcode;
2770 insn
2771 && ! (GET_CODE (insn) == NOTE
2772 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END);
2773 insn = NEXT_INSN (insn))
2774 {
2775 switch (GET_CODE (insn))
2776 {
2777 case CODE_LABEL:
2778 case CALL_INSN:
2779 return 0;
2780 case NOTE:
2781 /* We could be in front of the wrong NOTE_INSN_LOOP_END if there is
2782 a jump immediately after the loop start that branches outside
2783 the loop but within an outer loop, near the exit test.
2784 If we copied this exit test and created a phony
2785 NOTE_INSN_LOOP_VTOP, this could make instructions immediately
2786 before the exit test look like these could be safely moved
2787 out of the loop even if they actually may be never executed.
2788 This can be avoided by checking here for NOTE_INSN_LOOP_CONT. */
2789
2790 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG
2791 || NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_CONT)
2792 return 0;
2793
2794 if (optimize < 2
2795 && (NOTE_LINE_NUMBER (insn) == NOTE_INSN_BLOCK_BEG
2796 || NOTE_LINE_NUMBER (insn) == NOTE_INSN_BLOCK_END))
2797 /* If we were to duplicate this code, we would not move
2798 the BLOCK notes, and so debugging the moved code would
2799 be difficult. Thus, we only move the code with -O2 or
2800 higher. */
2801 return 0;
2802
2803 break;
2804 case JUMP_INSN:
2805 case INSN:
2806 /* The code below would grossly mishandle REG_WAS_0 notes,
2807 so get rid of them here. */
2808 while ((p = find_reg_note (insn, REG_WAS_0, NULL_RTX)) != 0)
2809 remove_note (insn, p);
2810 if (++num_insns > 20
2811 || find_reg_note (insn, REG_RETVAL, NULL_RTX)
2812 || find_reg_note (insn, REG_LIBCALL, NULL_RTX))
2813 return 0;
2814 break;
2815 default:
2816 break;
2817 }
2818 }
2819
2820 /* Unless INSN is zero, we can do the optimization. */
2821 if (insn == 0)
2822 return 0;
2823
2824 lastexit = insn;
2825
2826 /* See if any insn sets a register only used in the loop exit code and
2827 not a user variable. If so, replace it with a new register. */
2828 for (insn = exitcode; insn != lastexit; insn = NEXT_INSN (insn))
2829 if (GET_CODE (insn) == INSN
2830 && (set = single_set (insn)) != 0
2831 && ((reg = SET_DEST (set), GET_CODE (reg) == REG)
2832 || (GET_CODE (reg) == SUBREG
2833 && (reg = SUBREG_REG (reg), GET_CODE (reg) == REG)))
2834 && REGNO (reg) >= FIRST_PSEUDO_REGISTER
2835 && REGNO_FIRST_UID (REGNO (reg)) == INSN_UID (insn))
2836 {
2837 for (p = NEXT_INSN (insn); p != lastexit; p = NEXT_INSN (p))
2838 if (REGNO_LAST_UID (REGNO (reg)) == INSN_UID (p))
2839 break;
2840
2841 if (p != lastexit)
2842 {
2843 /* We can do the replacement. Allocate reg_map if this is the
2844 first replacement we found. */
2845 if (reg_map == 0)
2846 {
2847 reg_map = (rtx *) alloca (max_reg * sizeof (rtx));
2848 bzero ((char *) reg_map, max_reg * sizeof (rtx));
2849 }
2850
2851 REG_LOOP_TEST_P (reg) = 1;
2852
2853 reg_map[REGNO (reg)] = gen_reg_rtx (GET_MODE (reg));
2854 }
2855 }
2856
2857 /* Now copy each insn. */
2858 for (insn = exitcode; insn != lastexit; insn = NEXT_INSN (insn))
2859 {
2860 switch (GET_CODE (insn))
2861 {
2862 case BARRIER:
2863 copy = emit_barrier_before (loop_start);
2864 break;
2865 case NOTE:
2866 /* Only copy line-number notes. */
2867 if (NOTE_LINE_NUMBER (insn) >= 0)
2868 {
2869 copy = emit_note_before (NOTE_LINE_NUMBER (insn), loop_start);
2870 NOTE_SOURCE_FILE (copy) = NOTE_SOURCE_FILE (insn);
2871 }
2872 break;
2873
2874 case INSN:
2875 copy = emit_insn_before (copy_insn (PATTERN (insn)), loop_start);
2876 if (reg_map)
2877 replace_regs (PATTERN (copy), reg_map, max_reg, 1);
2878
2879 mark_jump_label (PATTERN (copy), copy, 0);
2880
2881 /* Copy all REG_NOTES except REG_LABEL since mark_jump_label will
2882 make them. */
2883 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
2884 if (REG_NOTE_KIND (link) != REG_LABEL)
2885 REG_NOTES (copy)
2886 = copy_insn_1 (gen_rtx_EXPR_LIST (REG_NOTE_KIND (link),
2887 XEXP (link, 0),
2888 REG_NOTES (copy)));
2889 if (reg_map && REG_NOTES (copy))
2890 replace_regs (REG_NOTES (copy), reg_map, max_reg, 1);
2891 break;
2892
2893 case JUMP_INSN:
2894 copy = emit_jump_insn_before (copy_insn (PATTERN (insn)), loop_start);
2895 if (reg_map)
2896 replace_regs (PATTERN (copy), reg_map, max_reg, 1);
2897 mark_jump_label (PATTERN (copy), copy, 0);
2898 if (REG_NOTES (insn))
2899 {
2900 REG_NOTES (copy) = copy_insn_1 (REG_NOTES (insn));
2901 if (reg_map)
2902 replace_regs (REG_NOTES (copy), reg_map, max_reg, 1);
2903 }
2904
2905 /* If this is a simple jump, add it to the jump chain. */
2906
2907 if (INSN_UID (copy) < max_jump_chain && JUMP_LABEL (copy)
2908 && simplejump_p (copy))
2909 {
2910 jump_chain[INSN_UID (copy)]
2911 = jump_chain[INSN_UID (JUMP_LABEL (copy))];
2912 jump_chain[INSN_UID (JUMP_LABEL (copy))] = copy;
2913 }
2914 break;
2915
2916 default:
2917 abort ();
2918 }
2919
2920 /* Record the first insn we copied. We need it so that we can
2921 scan the copied insns for new pseudo registers. */
2922 if (! first_copy)
2923 first_copy = copy;
2924 }
2925
2926 /* Now clean up by emitting a jump to the end label and deleting the jump
2927 at the start of the loop. */
2928 if (! copy || GET_CODE (copy) != BARRIER)
2929 {
2930 copy = emit_jump_insn_before (gen_jump (get_label_after (insn)),
2931 loop_start);
2932
2933 /* Record the first insn we copied. We need it so that we can
2934 scan the copied insns for new pseudo registers. This may not
2935 be strictly necessary since we should have copied at least one
2936 insn above. But I am going to be safe. */
2937 if (! first_copy)
2938 first_copy = copy;
2939
2940 mark_jump_label (PATTERN (copy), copy, 0);
2941 if (INSN_UID (copy) < max_jump_chain
2942 && INSN_UID (JUMP_LABEL (copy)) < max_jump_chain)
2943 {
2944 jump_chain[INSN_UID (copy)]
2945 = jump_chain[INSN_UID (JUMP_LABEL (copy))];
2946 jump_chain[INSN_UID (JUMP_LABEL (copy))] = copy;
2947 }
2948 emit_barrier_before (loop_start);
2949 }
2950
2951 /* Now scan from the first insn we copied to the last insn we copied
2952 (copy) for new pseudo registers. Do this after the code to jump to
2953 the end label since that might create a new pseudo too. */
2954 reg_scan_update (first_copy, copy, max_reg);
2955
2956 /* Mark the exit code as the virtual top of the converted loop. */
2957 emit_note_before (NOTE_INSN_LOOP_VTOP, exitcode);
2958
2959 delete_insn (next_nonnote_insn (loop_start));
2960
2961 return 1;
2962 }
2963 \f
2964 /* Move all block-beg, block-end, loop-beg, loop-cont, loop-vtop, and
2965 loop-end notes between START and END out before START. Assume that
2966 END is not such a note. START may be such a note. Returns the value
2967 of the new starting insn, which may be different if the original start
2968 was such a note. */
2969
2970 rtx
2971 squeeze_notes (start, end)
2972 rtx start, end;
2973 {
2974 rtx insn;
2975 rtx next;
2976
2977 for (insn = start; insn != end; insn = next)
2978 {
2979 next = NEXT_INSN (insn);
2980 if (GET_CODE (insn) == NOTE
2981 && (NOTE_LINE_NUMBER (insn) == NOTE_INSN_BLOCK_END
2982 || NOTE_LINE_NUMBER (insn) == NOTE_INSN_BLOCK_BEG
2983 || NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG
2984 || NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END
2985 || NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_CONT
2986 || NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_VTOP))
2987 {
2988 if (insn == start)
2989 start = next;
2990 else
2991 {
2992 rtx prev = PREV_INSN (insn);
2993 PREV_INSN (insn) = PREV_INSN (start);
2994 NEXT_INSN (insn) = start;
2995 NEXT_INSN (PREV_INSN (insn)) = insn;
2996 PREV_INSN (NEXT_INSN (insn)) = insn;
2997 NEXT_INSN (prev) = next;
2998 PREV_INSN (next) = prev;
2999 }
3000 }
3001 }
3002
3003 return start;
3004 }
3005 \f
3006 /* Compare the instructions before insn E1 with those before E2
3007 to find an opportunity for cross jumping.
3008 (This means detecting identical sequences of insns followed by
3009 jumps to the same place, or followed by a label and a jump
3010 to that label, and replacing one with a jump to the other.)
3011
3012 Assume E1 is a jump that jumps to label E2
3013 (that is not always true but it might as well be).
3014 Find the longest possible equivalent sequences
3015 and store the first insns of those sequences into *F1 and *F2.
3016 Store zero there if no equivalent preceding instructions are found.
3017
3018 We give up if we find a label in stream 1.
3019 Actually we could transfer that label into stream 2. */
3020
3021 static void
3022 find_cross_jump (e1, e2, minimum, f1, f2)
3023 rtx e1, e2;
3024 int minimum;
3025 rtx *f1, *f2;
3026 {
3027 register rtx i1 = e1, i2 = e2;
3028 register rtx p1, p2;
3029 int lose = 0;
3030
3031 rtx last1 = 0, last2 = 0;
3032 rtx afterlast1 = 0, afterlast2 = 0;
3033
3034 *f1 = 0;
3035 *f2 = 0;
3036
3037 while (1)
3038 {
3039 i1 = prev_nonnote_insn (i1);
3040
3041 i2 = PREV_INSN (i2);
3042 while (i2 && (GET_CODE (i2) == NOTE || GET_CODE (i2) == CODE_LABEL))
3043 i2 = PREV_INSN (i2);
3044
3045 if (i1 == 0)
3046 break;
3047
3048 /* Don't allow the range of insns preceding E1 or E2
3049 to include the other (E2 or E1). */
3050 if (i2 == e1 || i1 == e2)
3051 break;
3052
3053 /* If we will get to this code by jumping, those jumps will be
3054 tensioned to go directly to the new label (before I2),
3055 so this cross-jumping won't cost extra. So reduce the minimum. */
3056 if (GET_CODE (i1) == CODE_LABEL)
3057 {
3058 --minimum;
3059 break;
3060 }
3061
3062 if (i2 == 0 || GET_CODE (i1) != GET_CODE (i2))
3063 break;
3064
3065 /* Avoid moving insns across EH regions if either of the insns
3066 can throw. */
3067 if (flag_exceptions
3068 && (asynchronous_exceptions || GET_CODE (i1) == CALL_INSN)
3069 && !in_same_eh_region (i1, i2))
3070 break;
3071
3072 p1 = PATTERN (i1);
3073 p2 = PATTERN (i2);
3074
3075 /* If this is a CALL_INSN, compare register usage information.
3076 If we don't check this on stack register machines, the two
3077 CALL_INSNs might be merged leaving reg-stack.c with mismatching
3078 numbers of stack registers in the same basic block.
3079 If we don't check this on machines with delay slots, a delay slot may
3080 be filled that clobbers a parameter expected by the subroutine.
3081
3082 ??? We take the simple route for now and assume that if they're
3083 equal, they were constructed identically. */
3084
3085 if (GET_CODE (i1) == CALL_INSN
3086 && ! rtx_equal_p (CALL_INSN_FUNCTION_USAGE (i1),
3087 CALL_INSN_FUNCTION_USAGE (i2)))
3088 lose = 1;
3089
3090 #ifdef STACK_REGS
3091 /* If cross_jump_death_matters is not 0, the insn's mode
3092 indicates whether or not the insn contains any stack-like
3093 regs. */
3094
3095 if (!lose && cross_jump_death_matters && stack_regs_mentioned (i1))
3096 {
3097 /* If register stack conversion has already been done, then
3098 death notes must also be compared before it is certain that
3099 the two instruction streams match. */
3100
3101 rtx note;
3102 HARD_REG_SET i1_regset, i2_regset;
3103
3104 CLEAR_HARD_REG_SET (i1_regset);
3105 CLEAR_HARD_REG_SET (i2_regset);
3106
3107 for (note = REG_NOTES (i1); note; note = XEXP (note, 1))
3108 if (REG_NOTE_KIND (note) == REG_DEAD
3109 && STACK_REG_P (XEXP (note, 0)))
3110 SET_HARD_REG_BIT (i1_regset, REGNO (XEXP (note, 0)));
3111
3112 for (note = REG_NOTES (i2); note; note = XEXP (note, 1))
3113 if (REG_NOTE_KIND (note) == REG_DEAD
3114 && STACK_REG_P (XEXP (note, 0)))
3115 SET_HARD_REG_BIT (i2_regset, REGNO (XEXP (note, 0)));
3116
3117 GO_IF_HARD_REG_EQUAL (i1_regset, i2_regset, done);
3118
3119 lose = 1;
3120
3121 done:
3122 ;
3123 }
3124 #endif
3125
3126 /* Don't allow old-style asm or volatile extended asms to be accepted
3127 for cross jumping purposes. It is conceptually correct to allow
3128 them, since cross-jumping preserves the dynamic instruction order
3129 even though it is changing the static instruction order. However,
3130 if an asm is being used to emit an assembler pseudo-op, such as
3131 the MIPS `.set reorder' pseudo-op, then the static instruction order
3132 matters and it must be preserved. */
3133 if (GET_CODE (p1) == ASM_INPUT || GET_CODE (p2) == ASM_INPUT
3134 || (GET_CODE (p1) == ASM_OPERANDS && MEM_VOLATILE_P (p1))
3135 || (GET_CODE (p2) == ASM_OPERANDS && MEM_VOLATILE_P (p2)))
3136 lose = 1;
3137
3138 if (lose || GET_CODE (p1) != GET_CODE (p2)
3139 || ! rtx_renumbered_equal_p (p1, p2))
3140 {
3141 /* The following code helps take care of G++ cleanups. */
3142 rtx equiv1;
3143 rtx equiv2;
3144
3145 if (!lose && GET_CODE (p1) == GET_CODE (p2)
3146 && ((equiv1 = find_reg_note (i1, REG_EQUAL, NULL_RTX)) != 0
3147 || (equiv1 = find_reg_note (i1, REG_EQUIV, NULL_RTX)) != 0)
3148 && ((equiv2 = find_reg_note (i2, REG_EQUAL, NULL_RTX)) != 0
3149 || (equiv2 = find_reg_note (i2, REG_EQUIV, NULL_RTX)) != 0)
3150 /* If the equivalences are not to a constant, they may
3151 reference pseudos that no longer exist, so we can't
3152 use them. */
3153 && CONSTANT_P (XEXP (equiv1, 0))
3154 && rtx_equal_p (XEXP (equiv1, 0), XEXP (equiv2, 0)))
3155 {
3156 rtx s1 = single_set (i1);
3157 rtx s2 = single_set (i2);
3158 if (s1 != 0 && s2 != 0
3159 && rtx_renumbered_equal_p (SET_DEST (s1), SET_DEST (s2)))
3160 {
3161 validate_change (i1, &SET_SRC (s1), XEXP (equiv1, 0), 1);
3162 validate_change (i2, &SET_SRC (s2), XEXP (equiv2, 0), 1);
3163 if (! rtx_renumbered_equal_p (p1, p2))
3164 cancel_changes (0);
3165 else if (apply_change_group ())
3166 goto win;
3167 }
3168 }
3169
3170 /* Insns fail to match; cross jumping is limited to the following
3171 insns. */
3172
3173 #ifdef HAVE_cc0
3174 /* Don't allow the insn after a compare to be shared by
3175 cross-jumping unless the compare is also shared.
3176 Here, if either of these non-matching insns is a compare,
3177 exclude the following insn from possible cross-jumping. */
3178 if (sets_cc0_p (p1) || sets_cc0_p (p2))
3179 last1 = afterlast1, last2 = afterlast2, ++minimum;
3180 #endif
3181
3182 /* If cross-jumping here will feed a jump-around-jump
3183 optimization, this jump won't cost extra, so reduce
3184 the minimum. */
3185 if (GET_CODE (i1) == JUMP_INSN
3186 && JUMP_LABEL (i1)
3187 && prev_real_insn (JUMP_LABEL (i1)) == e1)
3188 --minimum;
3189 break;
3190 }
3191
3192 win:
3193 if (GET_CODE (p1) != USE && GET_CODE (p1) != CLOBBER)
3194 {
3195 /* Ok, this insn is potentially includable in a cross-jump here. */
3196 afterlast1 = last1, afterlast2 = last2;
3197 last1 = i1, last2 = i2, --minimum;
3198 }
3199 }
3200
3201 if (minimum <= 0 && last1 != 0 && last1 != e1)
3202 *f1 = last1, *f2 = last2;
3203 }
3204
3205 static void
3206 do_cross_jump (insn, newjpos, newlpos)
3207 rtx insn, newjpos, newlpos;
3208 {
3209 /* Find an existing label at this point
3210 or make a new one if there is none. */
3211 register rtx label = get_label_before (newlpos);
3212
3213 /* Make the same jump insn jump to the new point. */
3214 if (GET_CODE (PATTERN (insn)) == RETURN)
3215 {
3216 /* Remove from jump chain of returns. */
3217 delete_from_jump_chain (insn);
3218 /* Change the insn. */
3219 PATTERN (insn) = gen_jump (label);
3220 INSN_CODE (insn) = -1;
3221 JUMP_LABEL (insn) = label;
3222 LABEL_NUSES (label)++;
3223 /* Add to new the jump chain. */
3224 if (INSN_UID (label) < max_jump_chain
3225 && INSN_UID (insn) < max_jump_chain)
3226 {
3227 jump_chain[INSN_UID (insn)] = jump_chain[INSN_UID (label)];
3228 jump_chain[INSN_UID (label)] = insn;
3229 }
3230 }
3231 else
3232 redirect_jump (insn, label);
3233
3234 /* Delete the matching insns before the jump. Also, remove any REG_EQUAL
3235 or REG_EQUIV note in the NEWLPOS stream that isn't also present in
3236 the NEWJPOS stream. */
3237
3238 while (newjpos != insn)
3239 {
3240 rtx lnote;
3241
3242 for (lnote = REG_NOTES (newlpos); lnote; lnote = XEXP (lnote, 1))
3243 if ((REG_NOTE_KIND (lnote) == REG_EQUAL
3244 || REG_NOTE_KIND (lnote) == REG_EQUIV)
3245 && ! find_reg_note (newjpos, REG_EQUAL, XEXP (lnote, 0))
3246 && ! find_reg_note (newjpos, REG_EQUIV, XEXP (lnote, 0)))
3247 remove_note (newlpos, lnote);
3248
3249 delete_insn (newjpos);
3250 newjpos = next_real_insn (newjpos);
3251 newlpos = next_real_insn (newlpos);
3252 }
3253 }
3254 \f
3255 /* Return the label before INSN, or put a new label there. */
3256
3257 rtx
3258 get_label_before (insn)
3259 rtx insn;
3260 {
3261 rtx label;
3262
3263 /* Find an existing label at this point
3264 or make a new one if there is none. */
3265 label = prev_nonnote_insn (insn);
3266
3267 if (label == 0 || GET_CODE (label) != CODE_LABEL)
3268 {
3269 rtx prev = PREV_INSN (insn);
3270
3271 label = gen_label_rtx ();
3272 emit_label_after (label, prev);
3273 LABEL_NUSES (label) = 0;
3274 }
3275 return label;
3276 }
3277
3278 /* Return the label after INSN, or put a new label there. */
3279
3280 rtx
3281 get_label_after (insn)
3282 rtx insn;
3283 {
3284 rtx label;
3285
3286 /* Find an existing label at this point
3287 or make a new one if there is none. */
3288 label = next_nonnote_insn (insn);
3289
3290 if (label == 0 || GET_CODE (label) != CODE_LABEL)
3291 {
3292 label = gen_label_rtx ();
3293 emit_label_after (label, insn);
3294 LABEL_NUSES (label) = 0;
3295 }
3296 return label;
3297 }
3298 \f
3299 /* Return 1 if INSN is a jump that jumps to right after TARGET
3300 only on the condition that TARGET itself would drop through.
3301 Assumes that TARGET is a conditional jump. */
3302
3303 static int
3304 jump_back_p (insn, target)
3305 rtx insn, target;
3306 {
3307 rtx cinsn, ctarget;
3308 enum rtx_code codei, codet;
3309
3310 if (simplejump_p (insn) || ! condjump_p (insn)
3311 || simplejump_p (target)
3312 || target != prev_real_insn (JUMP_LABEL (insn)))
3313 return 0;
3314
3315 cinsn = XEXP (SET_SRC (PATTERN (insn)), 0);
3316 ctarget = XEXP (SET_SRC (PATTERN (target)), 0);
3317
3318 codei = GET_CODE (cinsn);
3319 codet = GET_CODE (ctarget);
3320
3321 if (XEXP (SET_SRC (PATTERN (insn)), 1) == pc_rtx)
3322 {
3323 if (! can_reverse_comparison_p (cinsn, insn))
3324 return 0;
3325 codei = reverse_condition (codei);
3326 }
3327
3328 if (XEXP (SET_SRC (PATTERN (target)), 2) == pc_rtx)
3329 {
3330 if (! can_reverse_comparison_p (ctarget, target))
3331 return 0;
3332 codet = reverse_condition (codet);
3333 }
3334
3335 return (codei == codet
3336 && rtx_renumbered_equal_p (XEXP (cinsn, 0), XEXP (ctarget, 0))
3337 && rtx_renumbered_equal_p (XEXP (cinsn, 1), XEXP (ctarget, 1)));
3338 }
3339 \f
3340 /* Given a comparison, COMPARISON, inside a conditional jump insn, INSN,
3341 return non-zero if it is safe to reverse this comparison. It is if our
3342 floating-point is not IEEE, if this is an NE or EQ comparison, or if
3343 this is known to be an integer comparison. */
3344
3345 int
3346 can_reverse_comparison_p (comparison, insn)
3347 rtx comparison;
3348 rtx insn;
3349 {
3350 rtx arg0;
3351
3352 /* If this is not actually a comparison, we can't reverse it. */
3353 if (GET_RTX_CLASS (GET_CODE (comparison)) != '<')
3354 return 0;
3355
3356 if (TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
3357 /* If this is an NE comparison, it is safe to reverse it to an EQ
3358 comparison and vice versa, even for floating point. If no operands
3359 are NaNs, the reversal is valid. If some operand is a NaN, EQ is
3360 always false and NE is always true, so the reversal is also valid. */
3361 || flag_fast_math
3362 || GET_CODE (comparison) == NE
3363 || GET_CODE (comparison) == EQ)
3364 return 1;
3365
3366 arg0 = XEXP (comparison, 0);
3367
3368 /* Make sure ARG0 is one of the actual objects being compared. If we
3369 can't do this, we can't be sure the comparison can be reversed.
3370
3371 Handle cc0 and a MODE_CC register. */
3372 if ((GET_CODE (arg0) == REG && GET_MODE_CLASS (GET_MODE (arg0)) == MODE_CC)
3373 #ifdef HAVE_cc0
3374 || arg0 == cc0_rtx
3375 #endif
3376 )
3377 {
3378 rtx prev = prev_nonnote_insn (insn);
3379 rtx set;
3380
3381 /* First see if the condition code mode alone if enough to say we can
3382 reverse the condition. If not, then search backwards for a set of
3383 ARG0. We do not need to check for an insn clobbering it since valid
3384 code will contain set a set with no intervening clobber. But
3385 stop when we reach a label. */
3386 #ifdef REVERSIBLE_CC_MODE
3387 if (GET_MODE_CLASS (GET_MODE (arg0)) == MODE_CC
3388 && REVERSIBLE_CC_MODE (GET_MODE (arg0)))
3389 return 1;
3390 #endif
3391
3392 for (prev = prev_nonnote_insn (insn);
3393 prev != 0 && GET_CODE (prev) != CODE_LABEL;
3394 prev = prev_nonnote_insn (prev))
3395 if ((set = single_set (prev)) != 0
3396 && rtx_equal_p (SET_DEST (set), arg0))
3397 {
3398 arg0 = SET_SRC (set);
3399
3400 if (GET_CODE (arg0) == COMPARE)
3401 arg0 = XEXP (arg0, 0);
3402 break;
3403 }
3404 }
3405
3406 /* We can reverse this if ARG0 is a CONST_INT or if its mode is
3407 not VOIDmode and neither a MODE_CC nor MODE_FLOAT type. */
3408 return (GET_CODE (arg0) == CONST_INT
3409 || (GET_MODE (arg0) != VOIDmode
3410 && GET_MODE_CLASS (GET_MODE (arg0)) != MODE_CC
3411 && GET_MODE_CLASS (GET_MODE (arg0)) != MODE_FLOAT));
3412 }
3413
3414 /* Given an rtx-code for a comparison, return the code
3415 for the negated comparison.
3416 WATCH OUT! reverse_condition is not safe to use on a jump
3417 that might be acting on the results of an IEEE floating point comparison,
3418 because of the special treatment of non-signaling nans in comparisons.
3419 Use can_reverse_comparison_p to be sure. */
3420
3421 enum rtx_code
3422 reverse_condition (code)
3423 enum rtx_code code;
3424 {
3425 switch (code)
3426 {
3427 case EQ:
3428 return NE;
3429
3430 case NE:
3431 return EQ;
3432
3433 case GT:
3434 return LE;
3435
3436 case GE:
3437 return LT;
3438
3439 case LT:
3440 return GE;
3441
3442 case LE:
3443 return GT;
3444
3445 case GTU:
3446 return LEU;
3447
3448 case GEU:
3449 return LTU;
3450
3451 case LTU:
3452 return GEU;
3453
3454 case LEU:
3455 return GTU;
3456
3457 default:
3458 abort ();
3459 return UNKNOWN;
3460 }
3461 }
3462
3463 /* Similar, but return the code when two operands of a comparison are swapped.
3464 This IS safe for IEEE floating-point. */
3465
3466 enum rtx_code
3467 swap_condition (code)
3468 enum rtx_code code;
3469 {
3470 switch (code)
3471 {
3472 case EQ:
3473 case NE:
3474 return code;
3475
3476 case GT:
3477 return LT;
3478
3479 case GE:
3480 return LE;
3481
3482 case LT:
3483 return GT;
3484
3485 case LE:
3486 return GE;
3487
3488 case GTU:
3489 return LTU;
3490
3491 case GEU:
3492 return LEU;
3493
3494 case LTU:
3495 return GTU;
3496
3497 case LEU:
3498 return GEU;
3499
3500 default:
3501 abort ();
3502 return UNKNOWN;
3503 }
3504 }
3505
3506 /* Given a comparison CODE, return the corresponding unsigned comparison.
3507 If CODE is an equality comparison or already an unsigned comparison,
3508 CODE is returned. */
3509
3510 enum rtx_code
3511 unsigned_condition (code)
3512 enum rtx_code code;
3513 {
3514 switch (code)
3515 {
3516 case EQ:
3517 case NE:
3518 case GTU:
3519 case GEU:
3520 case LTU:
3521 case LEU:
3522 return code;
3523
3524 case GT:
3525 return GTU;
3526
3527 case GE:
3528 return GEU;
3529
3530 case LT:
3531 return LTU;
3532
3533 case LE:
3534 return LEU;
3535
3536 default:
3537 abort ();
3538 }
3539 }
3540
3541 /* Similarly, return the signed version of a comparison. */
3542
3543 enum rtx_code
3544 signed_condition (code)
3545 enum rtx_code code;
3546 {
3547 switch (code)
3548 {
3549 case EQ:
3550 case NE:
3551 case GT:
3552 case GE:
3553 case LT:
3554 case LE:
3555 return code;
3556
3557 case GTU:
3558 return GT;
3559
3560 case GEU:
3561 return GE;
3562
3563 case LTU:
3564 return LT;
3565
3566 case LEU:
3567 return LE;
3568
3569 default:
3570 abort ();
3571 }
3572 }
3573 \f
3574 /* Return non-zero if CODE1 is more strict than CODE2, i.e., if the
3575 truth of CODE1 implies the truth of CODE2. */
3576
3577 int
3578 comparison_dominates_p (code1, code2)
3579 enum rtx_code code1, code2;
3580 {
3581 if (code1 == code2)
3582 return 1;
3583
3584 switch (code1)
3585 {
3586 case EQ:
3587 if (code2 == LE || code2 == LEU || code2 == GE || code2 == GEU)
3588 return 1;
3589 break;
3590
3591 case LT:
3592 if (code2 == LE || code2 == NE)
3593 return 1;
3594 break;
3595
3596 case GT:
3597 if (code2 == GE || code2 == NE)
3598 return 1;
3599 break;
3600
3601 case LTU:
3602 if (code2 == LEU || code2 == NE)
3603 return 1;
3604 break;
3605
3606 case GTU:
3607 if (code2 == GEU || code2 == NE)
3608 return 1;
3609 break;
3610
3611 default:
3612 break;
3613 }
3614
3615 return 0;
3616 }
3617 \f
3618 /* Return 1 if INSN is an unconditional jump and nothing else. */
3619
3620 int
3621 simplejump_p (insn)
3622 rtx insn;
3623 {
3624 return (GET_CODE (insn) == JUMP_INSN
3625 && GET_CODE (PATTERN (insn)) == SET
3626 && GET_CODE (SET_DEST (PATTERN (insn))) == PC
3627 && GET_CODE (SET_SRC (PATTERN (insn))) == LABEL_REF);
3628 }
3629
3630 /* Return nonzero if INSN is a (possibly) conditional jump
3631 and nothing more. */
3632
3633 int
3634 condjump_p (insn)
3635 rtx insn;
3636 {
3637 register rtx x = PATTERN (insn);
3638
3639 if (GET_CODE (x) != SET
3640 || GET_CODE (SET_DEST (x)) != PC)
3641 return 0;
3642
3643 x = SET_SRC (x);
3644 if (GET_CODE (x) == LABEL_REF)
3645 return 1;
3646 else return (GET_CODE (x) == IF_THEN_ELSE
3647 && ((GET_CODE (XEXP (x, 2)) == PC
3648 && (GET_CODE (XEXP (x, 1)) == LABEL_REF
3649 || GET_CODE (XEXP (x, 1)) == RETURN))
3650 || (GET_CODE (XEXP (x, 1)) == PC
3651 && (GET_CODE (XEXP (x, 2)) == LABEL_REF
3652 || GET_CODE (XEXP (x, 2)) == RETURN))));
3653
3654 return 0;
3655 }
3656
3657 /* Return nonzero if INSN is a (possibly) conditional jump inside a
3658 PARALLEL. */
3659
3660 int
3661 condjump_in_parallel_p (insn)
3662 rtx insn;
3663 {
3664 register rtx x = PATTERN (insn);
3665
3666 if (GET_CODE (x) != PARALLEL)
3667 return 0;
3668 else
3669 x = XVECEXP (x, 0, 0);
3670
3671 if (GET_CODE (x) != SET)
3672 return 0;
3673 if (GET_CODE (SET_DEST (x)) != PC)
3674 return 0;
3675 if (GET_CODE (SET_SRC (x)) == LABEL_REF)
3676 return 1;
3677 if (GET_CODE (SET_SRC (x)) != IF_THEN_ELSE)
3678 return 0;
3679 if (XEXP (SET_SRC (x), 2) == pc_rtx
3680 && (GET_CODE (XEXP (SET_SRC (x), 1)) == LABEL_REF
3681 || GET_CODE (XEXP (SET_SRC (x), 1)) == RETURN))
3682 return 1;
3683 if (XEXP (SET_SRC (x), 1) == pc_rtx
3684 && (GET_CODE (XEXP (SET_SRC (x), 2)) == LABEL_REF
3685 || GET_CODE (XEXP (SET_SRC (x), 2)) == RETURN))
3686 return 1;
3687 return 0;
3688 }
3689
3690 /* Return the label of a conditional jump. */
3691
3692 rtx
3693 condjump_label (insn)
3694 rtx insn;
3695 {
3696 register rtx x = PATTERN (insn);
3697
3698 if (GET_CODE (x) == PARALLEL)
3699 x = XVECEXP (x, 0, 0);
3700 if (GET_CODE (x) != SET)
3701 return NULL_RTX;
3702 if (GET_CODE (SET_DEST (x)) != PC)
3703 return NULL_RTX;
3704 x = SET_SRC (x);
3705 if (GET_CODE (x) == LABEL_REF)
3706 return x;
3707 if (GET_CODE (x) != IF_THEN_ELSE)
3708 return NULL_RTX;
3709 if (XEXP (x, 2) == pc_rtx && GET_CODE (XEXP (x, 1)) == LABEL_REF)
3710 return XEXP (x, 1);
3711 if (XEXP (x, 1) == pc_rtx && GET_CODE (XEXP (x, 2)) == LABEL_REF)
3712 return XEXP (x, 2);
3713 return NULL_RTX;
3714 }
3715
3716 /* Return true if INSN is a (possibly conditional) return insn. */
3717
3718 static int
3719 returnjump_p_1 (loc, data)
3720 rtx *loc;
3721 void *data ATTRIBUTE_UNUSED;
3722 {
3723 rtx x = *loc;
3724 return GET_CODE (x) == RETURN;
3725 }
3726
3727 int
3728 returnjump_p (insn)
3729 rtx insn;
3730 {
3731 return for_each_rtx (&PATTERN (insn), returnjump_p_1, NULL);
3732 }
3733
3734 /* Return true if INSN is a jump that only transfers control and
3735 nothing more. */
3736
3737 int
3738 onlyjump_p (insn)
3739 rtx insn;
3740 {
3741 rtx set;
3742
3743 if (GET_CODE (insn) != JUMP_INSN)
3744 return 0;
3745
3746 set = single_set (insn);
3747 if (set == NULL)
3748 return 0;
3749 if (GET_CODE (SET_DEST (set)) != PC)
3750 return 0;
3751 if (side_effects_p (SET_SRC (set)))
3752 return 0;
3753
3754 return 1;
3755 }
3756
3757 #ifdef HAVE_cc0
3758
3759 /* Return 1 if X is an RTX that does nothing but set the condition codes
3760 and CLOBBER or USE registers.
3761 Return -1 if X does explicitly set the condition codes,
3762 but also does other things. */
3763
3764 int
3765 sets_cc0_p (x)
3766 rtx x ATTRIBUTE_UNUSED;
3767 {
3768 if (GET_CODE (x) == SET && SET_DEST (x) == cc0_rtx)
3769 return 1;
3770 if (GET_CODE (x) == PARALLEL)
3771 {
3772 int i;
3773 int sets_cc0 = 0;
3774 int other_things = 0;
3775 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
3776 {
3777 if (GET_CODE (XVECEXP (x, 0, i)) == SET
3778 && SET_DEST (XVECEXP (x, 0, i)) == cc0_rtx)
3779 sets_cc0 = 1;
3780 else if (GET_CODE (XVECEXP (x, 0, i)) == SET)
3781 other_things = 1;
3782 }
3783 return ! sets_cc0 ? 0 : other_things ? -1 : 1;
3784 }
3785 return 0;
3786 }
3787 #endif
3788 \f
3789 /* Follow any unconditional jump at LABEL;
3790 return the ultimate label reached by any such chain of jumps.
3791 If LABEL is not followed by a jump, return LABEL.
3792 If the chain loops or we can't find end, return LABEL,
3793 since that tells caller to avoid changing the insn.
3794
3795 If RELOAD_COMPLETED is 0, we do not chain across a NOTE_INSN_LOOP_BEG or
3796 a USE or CLOBBER. */
3797
3798 rtx
3799 follow_jumps (label)
3800 rtx label;
3801 {
3802 register rtx insn;
3803 register rtx next;
3804 register rtx value = label;
3805 register int depth;
3806
3807 for (depth = 0;
3808 (depth < 10
3809 && (insn = next_active_insn (value)) != 0
3810 && GET_CODE (insn) == JUMP_INSN
3811 && ((JUMP_LABEL (insn) != 0 && simplejump_p (insn))
3812 || GET_CODE (PATTERN (insn)) == RETURN)
3813 && (next = NEXT_INSN (insn))
3814 && GET_CODE (next) == BARRIER);
3815 depth++)
3816 {
3817 /* Don't chain through the insn that jumps into a loop
3818 from outside the loop,
3819 since that would create multiple loop entry jumps
3820 and prevent loop optimization. */
3821 rtx tem;
3822 if (!reload_completed)
3823 for (tem = value; tem != insn; tem = NEXT_INSN (tem))
3824 if (GET_CODE (tem) == NOTE
3825 && (NOTE_LINE_NUMBER (tem) == NOTE_INSN_LOOP_BEG
3826 /* ??? Optional. Disables some optimizations, but makes
3827 gcov output more accurate with -O. */
3828 || (flag_test_coverage && NOTE_LINE_NUMBER (tem) > 0)))
3829 return value;
3830
3831 /* If we have found a cycle, make the insn jump to itself. */
3832 if (JUMP_LABEL (insn) == label)
3833 return label;
3834
3835 tem = next_active_insn (JUMP_LABEL (insn));
3836 if (tem && (GET_CODE (PATTERN (tem)) == ADDR_VEC
3837 || GET_CODE (PATTERN (tem)) == ADDR_DIFF_VEC))
3838 break;
3839
3840 value = JUMP_LABEL (insn);
3841 }
3842 if (depth == 10)
3843 return label;
3844 return value;
3845 }
3846
3847 /* Assuming that field IDX of X is a vector of label_refs,
3848 replace each of them by the ultimate label reached by it.
3849 Return nonzero if a change is made.
3850 If IGNORE_LOOPS is 0, we do not chain across a NOTE_INSN_LOOP_BEG. */
3851
3852 static int
3853 tension_vector_labels (x, idx)
3854 register rtx x;
3855 register int idx;
3856 {
3857 int changed = 0;
3858 register int i;
3859 for (i = XVECLEN (x, idx) - 1; i >= 0; i--)
3860 {
3861 register rtx olabel = XEXP (XVECEXP (x, idx, i), 0);
3862 register rtx nlabel = follow_jumps (olabel);
3863 if (nlabel && nlabel != olabel)
3864 {
3865 XEXP (XVECEXP (x, idx, i), 0) = nlabel;
3866 ++LABEL_NUSES (nlabel);
3867 if (--LABEL_NUSES (olabel) == 0)
3868 delete_insn (olabel);
3869 changed = 1;
3870 }
3871 }
3872 return changed;
3873 }
3874 \f
3875 /* Find all CODE_LABELs referred to in X, and increment their use counts.
3876 If INSN is a JUMP_INSN and there is at least one CODE_LABEL referenced
3877 in INSN, then store one of them in JUMP_LABEL (INSN).
3878 If INSN is an INSN or a CALL_INSN and there is at least one CODE_LABEL
3879 referenced in INSN, add a REG_LABEL note containing that label to INSN.
3880 Also, when there are consecutive labels, canonicalize on the last of them.
3881
3882 Note that two labels separated by a loop-beginning note
3883 must be kept distinct if we have not yet done loop-optimization,
3884 because the gap between them is where loop-optimize
3885 will want to move invariant code to. CROSS_JUMP tells us
3886 that loop-optimization is done with.
3887
3888 Once reload has completed (CROSS_JUMP non-zero), we need not consider
3889 two labels distinct if they are separated by only USE or CLOBBER insns. */
3890
3891 static void
3892 mark_jump_label (x, insn, cross_jump)
3893 register rtx x;
3894 rtx insn;
3895 int cross_jump;
3896 {
3897 register RTX_CODE code = GET_CODE (x);
3898 register int i;
3899 register const char *fmt;
3900
3901 switch (code)
3902 {
3903 case PC:
3904 case CC0:
3905 case REG:
3906 case SUBREG:
3907 case CONST_INT:
3908 case SYMBOL_REF:
3909 case CONST_DOUBLE:
3910 case CLOBBER:
3911 case CALL:
3912 return;
3913
3914 case MEM:
3915 /* If this is a constant-pool reference, see if it is a label. */
3916 if (GET_CODE (XEXP (x, 0)) == SYMBOL_REF
3917 && CONSTANT_POOL_ADDRESS_P (XEXP (x, 0)))
3918 mark_jump_label (get_pool_constant (XEXP (x, 0)), insn, cross_jump);
3919 break;
3920
3921 case LABEL_REF:
3922 {
3923 rtx label = XEXP (x, 0);
3924 rtx olabel = label;
3925 rtx note;
3926 rtx next;
3927
3928 if (GET_CODE (label) != CODE_LABEL)
3929 abort ();
3930
3931 /* Ignore references to labels of containing functions. */
3932 if (LABEL_REF_NONLOCAL_P (x))
3933 break;
3934
3935 /* If there are other labels following this one,
3936 replace it with the last of the consecutive labels. */
3937 for (next = NEXT_INSN (label); next; next = NEXT_INSN (next))
3938 {
3939 if (GET_CODE (next) == CODE_LABEL)
3940 label = next;
3941 else if (cross_jump && GET_CODE (next) == INSN
3942 && (GET_CODE (PATTERN (next)) == USE
3943 || GET_CODE (PATTERN (next)) == CLOBBER))
3944 continue;
3945 else if (GET_CODE (next) != NOTE)
3946 break;
3947 else if (! cross_jump
3948 && (NOTE_LINE_NUMBER (next) == NOTE_INSN_LOOP_BEG
3949 || NOTE_LINE_NUMBER (next) == NOTE_INSN_FUNCTION_END
3950 /* ??? Optional. Disables some optimizations, but
3951 makes gcov output more accurate with -O. */
3952 || (flag_test_coverage && NOTE_LINE_NUMBER (next) > 0)))
3953 break;
3954 }
3955
3956 XEXP (x, 0) = label;
3957 if (! insn || ! INSN_DELETED_P (insn))
3958 ++LABEL_NUSES (label);
3959
3960 if (insn)
3961 {
3962 if (GET_CODE (insn) == JUMP_INSN)
3963 JUMP_LABEL (insn) = label;
3964
3965 /* If we've changed OLABEL and we had a REG_LABEL note
3966 for it, update it as well. */
3967 else if (label != olabel
3968 && (note = find_reg_note (insn, REG_LABEL, olabel)) != 0)
3969 XEXP (note, 0) = label;
3970
3971 /* Otherwise, add a REG_LABEL note for LABEL unless there already
3972 is one. */
3973 else if (! find_reg_note (insn, REG_LABEL, label))
3974 {
3975 /* This code used to ignore labels which refered to dispatch
3976 tables to avoid flow.c generating worse code.
3977
3978 However, in the presense of global optimizations like
3979 gcse which call find_basic_blocks without calling
3980 life_analysis, not recording such labels will lead
3981 to compiler aborts because of inconsistencies in the
3982 flow graph. So we go ahead and record the label.
3983
3984 It may also be the case that the optimization argument
3985 is no longer valid because of the more accurate cfg
3986 we build in find_basic_blocks -- it no longer pessimizes
3987 code when it finds a REG_LABEL note. */
3988 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_LABEL, label,
3989 REG_NOTES (insn));
3990 }
3991 }
3992 return;
3993 }
3994
3995 /* Do walk the labels in a vector, but not the first operand of an
3996 ADDR_DIFF_VEC. Don't set the JUMP_LABEL of a vector. */
3997 case ADDR_VEC:
3998 case ADDR_DIFF_VEC:
3999 if (! INSN_DELETED_P (insn))
4000 {
4001 int eltnum = code == ADDR_DIFF_VEC ? 1 : 0;
4002
4003 for (i = 0; i < XVECLEN (x, eltnum); i++)
4004 mark_jump_label (XVECEXP (x, eltnum, i), NULL_RTX, cross_jump);
4005 }
4006 return;
4007
4008 default:
4009 break;
4010 }
4011
4012 fmt = GET_RTX_FORMAT (code);
4013 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4014 {
4015 if (fmt[i] == 'e')
4016 mark_jump_label (XEXP (x, i), insn, cross_jump);
4017 else if (fmt[i] == 'E')
4018 {
4019 register int j;
4020 for (j = 0; j < XVECLEN (x, i); j++)
4021 mark_jump_label (XVECEXP (x, i, j), insn, cross_jump);
4022 }
4023 }
4024 }
4025
4026 /* If all INSN does is set the pc, delete it,
4027 and delete the insn that set the condition codes for it
4028 if that's what the previous thing was. */
4029
4030 void
4031 delete_jump (insn)
4032 rtx insn;
4033 {
4034 register rtx set = single_set (insn);
4035
4036 if (set && GET_CODE (SET_DEST (set)) == PC)
4037 delete_computation (insn);
4038 }
4039
4040 /* Recursively delete prior insns that compute the value (used only by INSN
4041 which the caller is deleting) stored in the register mentioned by NOTE
4042 which is a REG_DEAD note associated with INSN. */
4043
4044 static void
4045 delete_prior_computation (note, insn)
4046 rtx note;
4047 rtx insn;
4048 {
4049 rtx our_prev;
4050 rtx reg = XEXP (note, 0);
4051
4052 for (our_prev = prev_nonnote_insn (insn);
4053 our_prev && (GET_CODE (our_prev) == INSN
4054 || GET_CODE (our_prev) == CALL_INSN);
4055 our_prev = prev_nonnote_insn (our_prev))
4056 {
4057 rtx pat = PATTERN (our_prev);
4058
4059 /* If we reach a CALL which is not calling a const function
4060 or the callee pops the arguments, then give up. */
4061 if (GET_CODE (our_prev) == CALL_INSN
4062 && (! CONST_CALL_P (our_prev)
4063 || GET_CODE (pat) != SET || GET_CODE (SET_SRC (pat)) != CALL))
4064 break;
4065
4066 /* If we reach a SEQUENCE, it is too complex to try to
4067 do anything with it, so give up. */
4068 if (GET_CODE (pat) == SEQUENCE)
4069 break;
4070
4071 if (GET_CODE (pat) == USE
4072 && GET_CODE (XEXP (pat, 0)) == INSN)
4073 /* reorg creates USEs that look like this. We leave them
4074 alone because reorg needs them for its own purposes. */
4075 break;
4076
4077 if (reg_set_p (reg, pat))
4078 {
4079 if (side_effects_p (pat) && GET_CODE (our_prev) != CALL_INSN)
4080 break;
4081
4082 if (GET_CODE (pat) == PARALLEL)
4083 {
4084 /* If we find a SET of something else, we can't
4085 delete the insn. */
4086
4087 int i;
4088
4089 for (i = 0; i < XVECLEN (pat, 0); i++)
4090 {
4091 rtx part = XVECEXP (pat, 0, i);
4092
4093 if (GET_CODE (part) == SET
4094 && SET_DEST (part) != reg)
4095 break;
4096 }
4097
4098 if (i == XVECLEN (pat, 0))
4099 delete_computation (our_prev);
4100 }
4101 else if (GET_CODE (pat) == SET
4102 && GET_CODE (SET_DEST (pat)) == REG)
4103 {
4104 int dest_regno = REGNO (SET_DEST (pat));
4105 int dest_endregno
4106 = dest_regno + (dest_regno < FIRST_PSEUDO_REGISTER
4107 ? HARD_REGNO_NREGS (dest_regno,
4108 GET_MODE (SET_DEST (pat))) : 1);
4109 int regno = REGNO (reg);
4110 int endregno = regno + (regno < FIRST_PSEUDO_REGISTER
4111 ? HARD_REGNO_NREGS (regno, GET_MODE (reg)) : 1);
4112
4113 if (dest_regno >= regno
4114 && dest_endregno <= endregno)
4115 delete_computation (our_prev);
4116
4117 /* We may have a multi-word hard register and some, but not
4118 all, of the words of the register are needed in subsequent
4119 insns. Write REG_UNUSED notes for those parts that were not
4120 needed. */
4121 else if (dest_regno <= regno
4122 && dest_endregno >= endregno)
4123 {
4124 int i;
4125
4126 REG_NOTES (our_prev)
4127 = gen_rtx_EXPR_LIST (REG_UNUSED, reg, REG_NOTES (our_prev));
4128
4129 for (i = dest_regno; i < dest_endregno; i++)
4130 if (! find_regno_note (our_prev, REG_UNUSED, i))
4131 break;
4132
4133 if (i == dest_endregno)
4134 delete_computation (our_prev);
4135 }
4136 }
4137
4138 break;
4139 }
4140
4141 /* If PAT references the register that dies here, it is an
4142 additional use. Hence any prior SET isn't dead. However, this
4143 insn becomes the new place for the REG_DEAD note. */
4144 if (reg_overlap_mentioned_p (reg, pat))
4145 {
4146 XEXP (note, 1) = REG_NOTES (our_prev);
4147 REG_NOTES (our_prev) = note;
4148 break;
4149 }
4150 }
4151 }
4152
4153 /* Delete INSN and recursively delete insns that compute values used only
4154 by INSN. This uses the REG_DEAD notes computed during flow analysis.
4155 If we are running before flow.c, we need do nothing since flow.c will
4156 delete dead code. We also can't know if the registers being used are
4157 dead or not at this point.
4158
4159 Otherwise, look at all our REG_DEAD notes. If a previous insn does
4160 nothing other than set a register that dies in this insn, we can delete
4161 that insn as well.
4162
4163 On machines with CC0, if CC0 is used in this insn, we may be able to
4164 delete the insn that set it. */
4165
4166 static void
4167 delete_computation (insn)
4168 rtx insn;
4169 {
4170 rtx note, next;
4171 rtx set;
4172
4173 #ifdef HAVE_cc0
4174 if (reg_referenced_p (cc0_rtx, PATTERN (insn)))
4175 {
4176 rtx prev = prev_nonnote_insn (insn);
4177 /* We assume that at this stage
4178 CC's are always set explicitly
4179 and always immediately before the jump that
4180 will use them. So if the previous insn
4181 exists to set the CC's, delete it
4182 (unless it performs auto-increments, etc.). */
4183 if (prev && GET_CODE (prev) == INSN
4184 && sets_cc0_p (PATTERN (prev)))
4185 {
4186 if (sets_cc0_p (PATTERN (prev)) > 0
4187 && ! side_effects_p (PATTERN (prev)))
4188 delete_computation (prev);
4189 else
4190 /* Otherwise, show that cc0 won't be used. */
4191 REG_NOTES (prev) = gen_rtx_EXPR_LIST (REG_UNUSED,
4192 cc0_rtx, REG_NOTES (prev));
4193 }
4194 }
4195 #endif
4196
4197 #ifdef INSN_SCHEDULING
4198 /* ?!? The schedulers do not keep REG_DEAD notes accurate after
4199 reload has completed. The schedulers need to be fixed. Until
4200 they are, we must not rely on the death notes here. */
4201 if (reload_completed && flag_schedule_insns_after_reload)
4202 {
4203 delete_insn (insn);
4204 return;
4205 }
4206 #endif
4207
4208 /* The REG_DEAD note may have been omitted for a register
4209 which is both set and used by the insn. */
4210 set = single_set (insn);
4211 if (set && GET_CODE (SET_DEST (set)) == REG)
4212 {
4213 int dest_regno = REGNO (SET_DEST (set));
4214 int dest_endregno
4215 = dest_regno + (dest_regno < FIRST_PSEUDO_REGISTER
4216 ? HARD_REGNO_NREGS (dest_regno,
4217 GET_MODE (SET_DEST (set))) : 1);
4218 int i;
4219
4220 for (i = dest_regno; i < dest_endregno; i++)
4221 {
4222 if (! refers_to_regno_p (i, i + 1, SET_SRC (set), NULL_PTR)
4223 || find_regno_note (insn, REG_DEAD, i))
4224 continue;
4225
4226 note = gen_rtx_EXPR_LIST (REG_DEAD, (i < FIRST_PSEUDO_REGISTER
4227 ? gen_rtx_REG (reg_raw_mode[i], i)
4228 : SET_DEST (set)), NULL_RTX);
4229 delete_prior_computation (note, insn);
4230 }
4231 }
4232
4233 for (note = REG_NOTES (insn); note; note = next)
4234 {
4235 next = XEXP (note, 1);
4236
4237 if (REG_NOTE_KIND (note) != REG_DEAD
4238 /* Verify that the REG_NOTE is legitimate. */
4239 || GET_CODE (XEXP (note, 0)) != REG)
4240 continue;
4241
4242 delete_prior_computation (note, insn);
4243 }
4244
4245 delete_insn (insn);
4246 }
4247 \f
4248 /* Delete insn INSN from the chain of insns and update label ref counts.
4249 May delete some following insns as a consequence; may even delete
4250 a label elsewhere and insns that follow it.
4251
4252 Returns the first insn after INSN that was not deleted. */
4253
4254 rtx
4255 delete_insn (insn)
4256 register rtx insn;
4257 {
4258 register rtx next = NEXT_INSN (insn);
4259 register rtx prev = PREV_INSN (insn);
4260 register int was_code_label = (GET_CODE (insn) == CODE_LABEL);
4261 register int dont_really_delete = 0;
4262
4263 while (next && INSN_DELETED_P (next))
4264 next = NEXT_INSN (next);
4265
4266 /* This insn is already deleted => return first following nondeleted. */
4267 if (INSN_DELETED_P (insn))
4268 return next;
4269
4270 if (was_code_label)
4271 remove_node_from_expr_list (insn, &nonlocal_goto_handler_labels);
4272
4273 /* Don't delete user-declared labels. Convert them to special NOTEs
4274 instead. */
4275 if (was_code_label && LABEL_NAME (insn) != 0
4276 && optimize && ! dont_really_delete)
4277 {
4278 PUT_CODE (insn, NOTE);
4279 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED_LABEL;
4280 NOTE_SOURCE_FILE (insn) = 0;
4281 dont_really_delete = 1;
4282 }
4283 else
4284 /* Mark this insn as deleted. */
4285 INSN_DELETED_P (insn) = 1;
4286
4287 /* If this is an unconditional jump, delete it from the jump chain. */
4288 if (simplejump_p (insn))
4289 delete_from_jump_chain (insn);
4290
4291 /* If instruction is followed by a barrier,
4292 delete the barrier too. */
4293
4294 if (next != 0 && GET_CODE (next) == BARRIER)
4295 {
4296 INSN_DELETED_P (next) = 1;
4297 next = NEXT_INSN (next);
4298 }
4299
4300 /* Patch out INSN (and the barrier if any) */
4301
4302 if (optimize && ! dont_really_delete)
4303 {
4304 if (prev)
4305 {
4306 NEXT_INSN (prev) = next;
4307 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
4308 NEXT_INSN (XVECEXP (PATTERN (prev), 0,
4309 XVECLEN (PATTERN (prev), 0) - 1)) = next;
4310 }
4311
4312 if (next)
4313 {
4314 PREV_INSN (next) = prev;
4315 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
4316 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
4317 }
4318
4319 if (prev && NEXT_INSN (prev) == 0)
4320 set_last_insn (prev);
4321 }
4322
4323 /* If deleting a jump, decrement the count of the label,
4324 and delete the label if it is now unused. */
4325
4326 if (GET_CODE (insn) == JUMP_INSN && JUMP_LABEL (insn))
4327 {
4328 rtx lab = JUMP_LABEL (insn), lab_next;
4329
4330 if (--LABEL_NUSES (lab) == 0)
4331 {
4332 /* This can delete NEXT or PREV,
4333 either directly if NEXT is JUMP_LABEL (INSN),
4334 or indirectly through more levels of jumps. */
4335 delete_insn (lab);
4336
4337 /* I feel a little doubtful about this loop,
4338 but I see no clean and sure alternative way
4339 to find the first insn after INSN that is not now deleted.
4340 I hope this works. */
4341 while (next && INSN_DELETED_P (next))
4342 next = NEXT_INSN (next);
4343 return next;
4344 }
4345 else if ((lab_next = next_nonnote_insn (lab)) != NULL
4346 && GET_CODE (lab_next) == JUMP_INSN
4347 && (GET_CODE (PATTERN (lab_next)) == ADDR_VEC
4348 || GET_CODE (PATTERN (lab_next)) == ADDR_DIFF_VEC))
4349 {
4350 /* If we're deleting the tablejump, delete the dispatch table.
4351 We may not be able to kill the label immediately preceeding
4352 just yet, as it might be referenced in code leading up to
4353 the tablejump. */
4354 delete_insn (lab_next);
4355 }
4356 }
4357
4358 /* Likewise if we're deleting a dispatch table. */
4359
4360 if (GET_CODE (insn) == JUMP_INSN
4361 && (GET_CODE (PATTERN (insn)) == ADDR_VEC
4362 || GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC))
4363 {
4364 rtx pat = PATTERN (insn);
4365 int i, diff_vec_p = GET_CODE (pat) == ADDR_DIFF_VEC;
4366 int len = XVECLEN (pat, diff_vec_p);
4367
4368 for (i = 0; i < len; i++)
4369 if (--LABEL_NUSES (XEXP (XVECEXP (pat, diff_vec_p, i), 0)) == 0)
4370 delete_insn (XEXP (XVECEXP (pat, diff_vec_p, i), 0));
4371 while (next && INSN_DELETED_P (next))
4372 next = NEXT_INSN (next);
4373 return next;
4374 }
4375
4376 while (prev && (INSN_DELETED_P (prev) || GET_CODE (prev) == NOTE))
4377 prev = PREV_INSN (prev);
4378
4379 /* If INSN was a label and a dispatch table follows it,
4380 delete the dispatch table. The tablejump must have gone already.
4381 It isn't useful to fall through into a table. */
4382
4383 if (was_code_label
4384 && NEXT_INSN (insn) != 0
4385 && GET_CODE (NEXT_INSN (insn)) == JUMP_INSN
4386 && (GET_CODE (PATTERN (NEXT_INSN (insn))) == ADDR_VEC
4387 || GET_CODE (PATTERN (NEXT_INSN (insn))) == ADDR_DIFF_VEC))
4388 next = delete_insn (NEXT_INSN (insn));
4389
4390 /* If INSN was a label, delete insns following it if now unreachable. */
4391
4392 if (was_code_label && prev && GET_CODE (prev) == BARRIER)
4393 {
4394 register RTX_CODE code;
4395 while (next != 0
4396 && (GET_RTX_CLASS (code = GET_CODE (next)) == 'i'
4397 || code == NOTE || code == BARRIER
4398 || (code == CODE_LABEL && INSN_DELETED_P (next))))
4399 {
4400 if (code == NOTE
4401 && NOTE_LINE_NUMBER (next) != NOTE_INSN_FUNCTION_END)
4402 next = NEXT_INSN (next);
4403 /* Keep going past other deleted labels to delete what follows. */
4404 else if (code == CODE_LABEL && INSN_DELETED_P (next))
4405 next = NEXT_INSN (next);
4406 else
4407 /* Note: if this deletes a jump, it can cause more
4408 deletion of unreachable code, after a different label.
4409 As long as the value from this recursive call is correct,
4410 this invocation functions correctly. */
4411 next = delete_insn (next);
4412 }
4413 }
4414
4415 return next;
4416 }
4417
4418 /* Advance from INSN till reaching something not deleted
4419 then return that. May return INSN itself. */
4420
4421 rtx
4422 next_nondeleted_insn (insn)
4423 rtx insn;
4424 {
4425 while (INSN_DELETED_P (insn))
4426 insn = NEXT_INSN (insn);
4427 return insn;
4428 }
4429 \f
4430 /* Delete a range of insns from FROM to TO, inclusive.
4431 This is for the sake of peephole optimization, so assume
4432 that whatever these insns do will still be done by a new
4433 peephole insn that will replace them. */
4434
4435 void
4436 delete_for_peephole (from, to)
4437 register rtx from, to;
4438 {
4439 register rtx insn = from;
4440
4441 while (1)
4442 {
4443 register rtx next = NEXT_INSN (insn);
4444 register rtx prev = PREV_INSN (insn);
4445
4446 if (GET_CODE (insn) != NOTE)
4447 {
4448 INSN_DELETED_P (insn) = 1;
4449
4450 /* Patch this insn out of the chain. */
4451 /* We don't do this all at once, because we
4452 must preserve all NOTEs. */
4453 if (prev)
4454 NEXT_INSN (prev) = next;
4455
4456 if (next)
4457 PREV_INSN (next) = prev;
4458 }
4459
4460 if (insn == to)
4461 break;
4462 insn = next;
4463 }
4464
4465 /* Note that if TO is an unconditional jump
4466 we *do not* delete the BARRIER that follows,
4467 since the peephole that replaces this sequence
4468 is also an unconditional jump in that case. */
4469 }
4470 \f
4471 /* We have determined that INSN is never reached, and are about to
4472 delete it. Print a warning if the user asked for one.
4473
4474 To try to make this warning more useful, this should only be called
4475 once per basic block not reached, and it only warns when the basic
4476 block contains more than one line from the current function, and
4477 contains at least one operation. CSE and inlining can duplicate insns,
4478 so it's possible to get spurious warnings from this. */
4479
4480 void
4481 never_reached_warning (avoided_insn)
4482 rtx avoided_insn;
4483 {
4484 rtx insn;
4485 rtx a_line_note = NULL;
4486 int two_avoided_lines = 0;
4487 int contains_insn = 0;
4488
4489 if (! warn_notreached)
4490 return;
4491
4492 /* Scan forwards, looking at LINE_NUMBER notes, until
4493 we hit a LABEL or we run out of insns. */
4494
4495 for (insn = avoided_insn; insn != NULL; insn = NEXT_INSN (insn))
4496 {
4497 if (GET_CODE (insn) == CODE_LABEL)
4498 break;
4499 else if (GET_CODE (insn) == NOTE /* A line number note? */
4500 && NOTE_LINE_NUMBER (insn) >= 0)
4501 {
4502 if (a_line_note == NULL)
4503 a_line_note = insn;
4504 else
4505 two_avoided_lines |= (NOTE_LINE_NUMBER (a_line_note)
4506 != NOTE_LINE_NUMBER (insn));
4507 }
4508 else if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
4509 contains_insn = 1;
4510 }
4511 if (two_avoided_lines && contains_insn)
4512 warning_with_file_and_line (NOTE_SOURCE_FILE (a_line_note),
4513 NOTE_LINE_NUMBER (a_line_note),
4514 "will never be executed");
4515 }
4516 \f
4517 /* Invert the condition of the jump JUMP, and make it jump
4518 to label NLABEL instead of where it jumps now. */
4519
4520 int
4521 invert_jump (jump, nlabel)
4522 rtx jump, nlabel;
4523 {
4524 /* We have to either invert the condition and change the label or
4525 do neither. Either operation could fail. We first try to invert
4526 the jump. If that succeeds, we try changing the label. If that fails,
4527 we invert the jump back to what it was. */
4528
4529 if (! invert_exp (PATTERN (jump), jump))
4530 return 0;
4531
4532 if (redirect_jump (jump, nlabel))
4533 {
4534 if (flag_branch_probabilities)
4535 {
4536 rtx note = find_reg_note (jump, REG_BR_PROB, 0);
4537
4538 /* An inverted jump means that a probability taken becomes a
4539 probability not taken. Subtract the branch probability from the
4540 probability base to convert it back to a taken probability.
4541 (We don't flip the probability on a branch that's never taken. */
4542 if (note && XINT (XEXP (note, 0), 0) >= 0)
4543 XINT (XEXP (note, 0), 0) = REG_BR_PROB_BASE - XINT (XEXP (note, 0), 0);
4544 }
4545
4546 return 1;
4547 }
4548
4549 if (! invert_exp (PATTERN (jump), jump))
4550 /* This should just be putting it back the way it was. */
4551 abort ();
4552
4553 return 0;
4554 }
4555
4556 /* Invert the jump condition of rtx X contained in jump insn, INSN.
4557
4558 Return 1 if we can do so, 0 if we cannot find a way to do so that
4559 matches a pattern. */
4560
4561 int
4562 invert_exp (x, insn)
4563 rtx x;
4564 rtx insn;
4565 {
4566 register RTX_CODE code;
4567 register int i;
4568 register const char *fmt;
4569
4570 code = GET_CODE (x);
4571
4572 if (code == IF_THEN_ELSE)
4573 {
4574 register rtx comp = XEXP (x, 0);
4575 register rtx tem;
4576
4577 /* We can do this in two ways: The preferable way, which can only
4578 be done if this is not an integer comparison, is to reverse
4579 the comparison code. Otherwise, swap the THEN-part and ELSE-part
4580 of the IF_THEN_ELSE. If we can't do either, fail. */
4581
4582 if (can_reverse_comparison_p (comp, insn)
4583 && validate_change (insn, &XEXP (x, 0),
4584 gen_rtx_fmt_ee (reverse_condition (GET_CODE (comp)),
4585 GET_MODE (comp), XEXP (comp, 0),
4586 XEXP (comp, 1)), 0))
4587 return 1;
4588
4589 tem = XEXP (x, 1);
4590 validate_change (insn, &XEXP (x, 1), XEXP (x, 2), 1);
4591 validate_change (insn, &XEXP (x, 2), tem, 1);
4592 return apply_change_group ();
4593 }
4594
4595 fmt = GET_RTX_FORMAT (code);
4596 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4597 {
4598 if (fmt[i] == 'e')
4599 if (! invert_exp (XEXP (x, i), insn))
4600 return 0;
4601 if (fmt[i] == 'E')
4602 {
4603 register int j;
4604 for (j = 0; j < XVECLEN (x, i); j++)
4605 if (!invert_exp (XVECEXP (x, i, j), insn))
4606 return 0;
4607 }
4608 }
4609
4610 return 1;
4611 }
4612 \f
4613 /* Make jump JUMP jump to label NLABEL instead of where it jumps now.
4614 If the old jump target label is unused as a result,
4615 it and the code following it may be deleted.
4616
4617 If NLABEL is zero, we are to turn the jump into a (possibly conditional)
4618 RETURN insn.
4619
4620 The return value will be 1 if the change was made, 0 if it wasn't (this
4621 can only occur for NLABEL == 0). */
4622
4623 int
4624 redirect_jump (jump, nlabel)
4625 rtx jump, nlabel;
4626 {
4627 register rtx olabel = JUMP_LABEL (jump);
4628
4629 if (nlabel == olabel)
4630 return 1;
4631
4632 if (! redirect_exp (&PATTERN (jump), olabel, nlabel, jump))
4633 return 0;
4634
4635 /* If this is an unconditional branch, delete it from the jump_chain of
4636 OLABEL and add it to the jump_chain of NLABEL (assuming both labels
4637 have UID's in range and JUMP_CHAIN is valid). */
4638 if (jump_chain && (simplejump_p (jump)
4639 || GET_CODE (PATTERN (jump)) == RETURN))
4640 {
4641 int label_index = nlabel ? INSN_UID (nlabel) : 0;
4642
4643 delete_from_jump_chain (jump);
4644 if (label_index < max_jump_chain
4645 && INSN_UID (jump) < max_jump_chain)
4646 {
4647 jump_chain[INSN_UID (jump)] = jump_chain[label_index];
4648 jump_chain[label_index] = jump;
4649 }
4650 }
4651
4652 JUMP_LABEL (jump) = nlabel;
4653 if (nlabel)
4654 ++LABEL_NUSES (nlabel);
4655
4656 if (olabel && --LABEL_NUSES (olabel) == 0)
4657 delete_insn (olabel);
4658
4659 return 1;
4660 }
4661
4662 /* Delete the instruction JUMP from any jump chain it might be on. */
4663
4664 static void
4665 delete_from_jump_chain (jump)
4666 rtx jump;
4667 {
4668 int index;
4669 rtx olabel = JUMP_LABEL (jump);
4670
4671 /* Handle unconditional jumps. */
4672 if (jump_chain && olabel != 0
4673 && INSN_UID (olabel) < max_jump_chain
4674 && simplejump_p (jump))
4675 index = INSN_UID (olabel);
4676 /* Handle return insns. */
4677 else if (jump_chain && GET_CODE (PATTERN (jump)) == RETURN)
4678 index = 0;
4679 else return;
4680
4681 if (jump_chain[index] == jump)
4682 jump_chain[index] = jump_chain[INSN_UID (jump)];
4683 else
4684 {
4685 rtx insn;
4686
4687 for (insn = jump_chain[index];
4688 insn != 0;
4689 insn = jump_chain[INSN_UID (insn)])
4690 if (jump_chain[INSN_UID (insn)] == jump)
4691 {
4692 jump_chain[INSN_UID (insn)] = jump_chain[INSN_UID (jump)];
4693 break;
4694 }
4695 }
4696 }
4697
4698 /* If NLABEL is nonzero, throughout the rtx at LOC,
4699 alter (LABEL_REF OLABEL) to (LABEL_REF NLABEL). If OLABEL is
4700 zero, alter (RETURN) to (LABEL_REF NLABEL).
4701
4702 If NLABEL is zero, alter (LABEL_REF OLABEL) to (RETURN) and check
4703 validity with validate_change. Convert (set (pc) (label_ref olabel))
4704 to (return).
4705
4706 Return 0 if we found a change we would like to make but it is invalid.
4707 Otherwise, return 1. */
4708
4709 int
4710 redirect_exp (loc, olabel, nlabel, insn)
4711 rtx *loc;
4712 rtx olabel, nlabel;
4713 rtx insn;
4714 {
4715 register rtx x = *loc;
4716 register RTX_CODE code = GET_CODE (x);
4717 register int i;
4718 register const char *fmt;
4719
4720 if (code == LABEL_REF)
4721 {
4722 if (XEXP (x, 0) == olabel)
4723 {
4724 if (nlabel)
4725 XEXP (x, 0) = nlabel;
4726 else
4727 return validate_change (insn, loc, gen_rtx_RETURN (VOIDmode), 0);
4728 return 1;
4729 }
4730 }
4731 else if (code == RETURN && olabel == 0)
4732 {
4733 x = gen_rtx_LABEL_REF (VOIDmode, nlabel);
4734 if (loc == &PATTERN (insn))
4735 x = gen_rtx_SET (VOIDmode, pc_rtx, x);
4736 return validate_change (insn, loc, x, 0);
4737 }
4738
4739 if (code == SET && nlabel == 0 && SET_DEST (x) == pc_rtx
4740 && GET_CODE (SET_SRC (x)) == LABEL_REF
4741 && XEXP (SET_SRC (x), 0) == olabel)
4742 return validate_change (insn, loc, gen_rtx_RETURN (VOIDmode), 0);
4743
4744 fmt = GET_RTX_FORMAT (code);
4745 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4746 {
4747 if (fmt[i] == 'e')
4748 if (! redirect_exp (&XEXP (x, i), olabel, nlabel, insn))
4749 return 0;
4750 if (fmt[i] == 'E')
4751 {
4752 register int j;
4753 for (j = 0; j < XVECLEN (x, i); j++)
4754 if (! redirect_exp (&XVECEXP (x, i, j), olabel, nlabel, insn))
4755 return 0;
4756 }
4757 }
4758
4759 return 1;
4760 }
4761 \f
4762 /* Make jump JUMP jump to label NLABEL, assuming it used to be a tablejump.
4763
4764 If the old jump target label (before the dispatch table) becomes unused,
4765 it and the dispatch table may be deleted. In that case, find the insn
4766 before the jump references that label and delete it and logical successors
4767 too. */
4768
4769 static void
4770 redirect_tablejump (jump, nlabel)
4771 rtx jump, nlabel;
4772 {
4773 register rtx olabel = JUMP_LABEL (jump);
4774
4775 /* Add this jump to the jump_chain of NLABEL. */
4776 if (jump_chain && INSN_UID (nlabel) < max_jump_chain
4777 && INSN_UID (jump) < max_jump_chain)
4778 {
4779 jump_chain[INSN_UID (jump)] = jump_chain[INSN_UID (nlabel)];
4780 jump_chain[INSN_UID (nlabel)] = jump;
4781 }
4782
4783 PATTERN (jump) = gen_jump (nlabel);
4784 JUMP_LABEL (jump) = nlabel;
4785 ++LABEL_NUSES (nlabel);
4786 INSN_CODE (jump) = -1;
4787
4788 if (--LABEL_NUSES (olabel) == 0)
4789 {
4790 delete_labelref_insn (jump, olabel, 0);
4791 delete_insn (olabel);
4792 }
4793 }
4794
4795 /* Find the insn referencing LABEL that is a logical predecessor of INSN.
4796 If we found one, delete it and then delete this insn if DELETE_THIS is
4797 non-zero. Return non-zero if INSN or a predecessor references LABEL. */
4798
4799 static int
4800 delete_labelref_insn (insn, label, delete_this)
4801 rtx insn, label;
4802 int delete_this;
4803 {
4804 int deleted = 0;
4805 rtx link;
4806
4807 if (GET_CODE (insn) != NOTE
4808 && reg_mentioned_p (label, PATTERN (insn)))
4809 {
4810 if (delete_this)
4811 {
4812 delete_insn (insn);
4813 deleted = 1;
4814 }
4815 else
4816 return 1;
4817 }
4818
4819 for (link = LOG_LINKS (insn); link; link = XEXP (link, 1))
4820 if (delete_labelref_insn (XEXP (link, 0), label, 1))
4821 {
4822 if (delete_this)
4823 {
4824 delete_insn (insn);
4825 deleted = 1;
4826 }
4827 else
4828 return 1;
4829 }
4830
4831 return deleted;
4832 }
4833 \f
4834 /* Like rtx_equal_p except that it considers two REGs as equal
4835 if they renumber to the same value and considers two commutative
4836 operations to be the same if the order of the operands has been
4837 reversed.
4838
4839 ??? Addition is not commutative on the PA due to the weird implicit
4840 space register selection rules for memory addresses. Therefore, we
4841 don't consider a + b == b + a.
4842
4843 We could/should make this test a little tighter. Possibly only
4844 disabling it on the PA via some backend macro or only disabling this
4845 case when the PLUS is inside a MEM. */
4846
4847 int
4848 rtx_renumbered_equal_p (x, y)
4849 rtx x, y;
4850 {
4851 register int i;
4852 register RTX_CODE code = GET_CODE (x);
4853 register const char *fmt;
4854
4855 if (x == y)
4856 return 1;
4857
4858 if ((code == REG || (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG))
4859 && (GET_CODE (y) == REG || (GET_CODE (y) == SUBREG
4860 && GET_CODE (SUBREG_REG (y)) == REG)))
4861 {
4862 int reg_x = -1, reg_y = -1;
4863 int word_x = 0, word_y = 0;
4864
4865 if (GET_MODE (x) != GET_MODE (y))
4866 return 0;
4867
4868 /* If we haven't done any renumbering, don't
4869 make any assumptions. */
4870 if (reg_renumber == 0)
4871 return rtx_equal_p (x, y);
4872
4873 if (code == SUBREG)
4874 {
4875 reg_x = REGNO (SUBREG_REG (x));
4876 word_x = SUBREG_WORD (x);
4877
4878 if (reg_renumber[reg_x] >= 0)
4879 {
4880 reg_x = reg_renumber[reg_x] + word_x;
4881 word_x = 0;
4882 }
4883 }
4884
4885 else
4886 {
4887 reg_x = REGNO (x);
4888 if (reg_renumber[reg_x] >= 0)
4889 reg_x = reg_renumber[reg_x];
4890 }
4891
4892 if (GET_CODE (y) == SUBREG)
4893 {
4894 reg_y = REGNO (SUBREG_REG (y));
4895 word_y = SUBREG_WORD (y);
4896
4897 if (reg_renumber[reg_y] >= 0)
4898 {
4899 reg_y = reg_renumber[reg_y];
4900 word_y = 0;
4901 }
4902 }
4903
4904 else
4905 {
4906 reg_y = REGNO (y);
4907 if (reg_renumber[reg_y] >= 0)
4908 reg_y = reg_renumber[reg_y];
4909 }
4910
4911 return reg_x >= 0 && reg_x == reg_y && word_x == word_y;
4912 }
4913
4914 /* Now we have disposed of all the cases
4915 in which different rtx codes can match. */
4916 if (code != GET_CODE (y))
4917 return 0;
4918
4919 switch (code)
4920 {
4921 case PC:
4922 case CC0:
4923 case ADDR_VEC:
4924 case ADDR_DIFF_VEC:
4925 return 0;
4926
4927 case CONST_INT:
4928 return INTVAL (x) == INTVAL (y);
4929
4930 case LABEL_REF:
4931 /* We can't assume nonlocal labels have their following insns yet. */
4932 if (LABEL_REF_NONLOCAL_P (x) || LABEL_REF_NONLOCAL_P (y))
4933 return XEXP (x, 0) == XEXP (y, 0);
4934
4935 /* Two label-refs are equivalent if they point at labels
4936 in the same position in the instruction stream. */
4937 return (next_real_insn (XEXP (x, 0))
4938 == next_real_insn (XEXP (y, 0)));
4939
4940 case SYMBOL_REF:
4941 return XSTR (x, 0) == XSTR (y, 0);
4942
4943 case CODE_LABEL:
4944 /* If we didn't match EQ equality above, they aren't the same. */
4945 return 0;
4946
4947 default:
4948 break;
4949 }
4950
4951 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
4952
4953 if (GET_MODE (x) != GET_MODE (y))
4954 return 0;
4955
4956 /* For commutative operations, the RTX match if the operand match in any
4957 order. Also handle the simple binary and unary cases without a loop.
4958
4959 ??? Don't consider PLUS a commutative operator; see comments above. */
4960 if ((code == EQ || code == NE || GET_RTX_CLASS (code) == 'c')
4961 && code != PLUS)
4962 return ((rtx_renumbered_equal_p (XEXP (x, 0), XEXP (y, 0))
4963 && rtx_renumbered_equal_p (XEXP (x, 1), XEXP (y, 1)))
4964 || (rtx_renumbered_equal_p (XEXP (x, 0), XEXP (y, 1))
4965 && rtx_renumbered_equal_p (XEXP (x, 1), XEXP (y, 0))));
4966 else if (GET_RTX_CLASS (code) == '<' || GET_RTX_CLASS (code) == '2')
4967 return (rtx_renumbered_equal_p (XEXP (x, 0), XEXP (y, 0))
4968 && rtx_renumbered_equal_p (XEXP (x, 1), XEXP (y, 1)));
4969 else if (GET_RTX_CLASS (code) == '1')
4970 return rtx_renumbered_equal_p (XEXP (x, 0), XEXP (y, 0));
4971
4972 /* Compare the elements. If any pair of corresponding elements
4973 fail to match, return 0 for the whole things. */
4974
4975 fmt = GET_RTX_FORMAT (code);
4976 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4977 {
4978 register int j;
4979 switch (fmt[i])
4980 {
4981 case 'w':
4982 if (XWINT (x, i) != XWINT (y, i))
4983 return 0;
4984 break;
4985
4986 case 'i':
4987 if (XINT (x, i) != XINT (y, i))
4988 return 0;
4989 break;
4990
4991 case 's':
4992 if (strcmp (XSTR (x, i), XSTR (y, i)))
4993 return 0;
4994 break;
4995
4996 case 'e':
4997 if (! rtx_renumbered_equal_p (XEXP (x, i), XEXP (y, i)))
4998 return 0;
4999 break;
5000
5001 case 'u':
5002 if (XEXP (x, i) != XEXP (y, i))
5003 return 0;
5004 /* fall through. */
5005 case '0':
5006 break;
5007
5008 case 'E':
5009 if (XVECLEN (x, i) != XVECLEN (y, i))
5010 return 0;
5011 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
5012 if (!rtx_renumbered_equal_p (XVECEXP (x, i, j), XVECEXP (y, i, j)))
5013 return 0;
5014 break;
5015
5016 default:
5017 abort ();
5018 }
5019 }
5020 return 1;
5021 }
5022 \f
5023 /* If X is a hard register or equivalent to one or a subregister of one,
5024 return the hard register number. If X is a pseudo register that was not
5025 assigned a hard register, return the pseudo register number. Otherwise,
5026 return -1. Any rtx is valid for X. */
5027
5028 int
5029 true_regnum (x)
5030 rtx x;
5031 {
5032 if (GET_CODE (x) == REG)
5033 {
5034 if (REGNO (x) >= FIRST_PSEUDO_REGISTER && reg_renumber[REGNO (x)] >= 0)
5035 return reg_renumber[REGNO (x)];
5036 return REGNO (x);
5037 }
5038 if (GET_CODE (x) == SUBREG)
5039 {
5040 int base = true_regnum (SUBREG_REG (x));
5041 if (base >= 0 && base < FIRST_PSEUDO_REGISTER)
5042 return SUBREG_WORD (x) + base;
5043 }
5044 return -1;
5045 }
5046 \f
5047 /* Optimize code of the form:
5048
5049 for (x = a[i]; x; ...)
5050 ...
5051 for (x = a[i]; x; ...)
5052 ...
5053 foo:
5054
5055 Loop optimize will change the above code into
5056
5057 if (x = a[i])
5058 for (;;)
5059 { ...; if (! (x = ...)) break; }
5060 if (x = a[i])
5061 for (;;)
5062 { ...; if (! (x = ...)) break; }
5063 foo:
5064
5065 In general, if the first test fails, the program can branch
5066 directly to `foo' and skip the second try which is doomed to fail.
5067 We run this after loop optimization and before flow analysis. */
5068
5069 /* When comparing the insn patterns, we track the fact that different
5070 pseudo-register numbers may have been used in each computation.
5071 The following array stores an equivalence -- same_regs[I] == J means
5072 that pseudo register I was used in the first set of tests in a context
5073 where J was used in the second set. We also count the number of such
5074 pending equivalences. If nonzero, the expressions really aren't the
5075 same. */
5076
5077 static int *same_regs;
5078
5079 static int num_same_regs;
5080
5081 /* Track any registers modified between the target of the first jump and
5082 the second jump. They never compare equal. */
5083
5084 static char *modified_regs;
5085
5086 /* Record if memory was modified. */
5087
5088 static int modified_mem;
5089
5090 /* Called via note_stores on each insn between the target of the first
5091 branch and the second branch. It marks any changed registers. */
5092
5093 static void
5094 mark_modified_reg (dest, x)
5095 rtx dest;
5096 rtx x ATTRIBUTE_UNUSED;
5097 {
5098 int regno, i;
5099
5100 if (GET_CODE (dest) == SUBREG)
5101 dest = SUBREG_REG (dest);
5102
5103 if (GET_CODE (dest) == MEM)
5104 modified_mem = 1;
5105
5106 if (GET_CODE (dest) != REG)
5107 return;
5108
5109 regno = REGNO (dest);
5110 if (regno >= FIRST_PSEUDO_REGISTER)
5111 modified_regs[regno] = 1;
5112 else
5113 for (i = 0; i < HARD_REGNO_NREGS (regno, GET_MODE (dest)); i++)
5114 modified_regs[regno + i] = 1;
5115 }
5116
5117 /* F is the first insn in the chain of insns. */
5118
5119 void
5120 thread_jumps (f, max_reg, flag_before_loop)
5121 rtx f;
5122 int max_reg;
5123 int flag_before_loop;
5124 {
5125 /* Basic algorithm is to find a conditional branch,
5126 the label it may branch to, and the branch after
5127 that label. If the two branches test the same condition,
5128 walk back from both branch paths until the insn patterns
5129 differ, or code labels are hit. If we make it back to
5130 the target of the first branch, then we know that the first branch
5131 will either always succeed or always fail depending on the relative
5132 senses of the two branches. So adjust the first branch accordingly
5133 in this case. */
5134
5135 rtx label, b1, b2, t1, t2;
5136 enum rtx_code code1, code2;
5137 rtx b1op0, b1op1, b2op0, b2op1;
5138 int changed = 1;
5139 int i;
5140 int *all_reset;
5141
5142 /* Allocate register tables and quick-reset table. */
5143 modified_regs = (char *) alloca (max_reg * sizeof (char));
5144 same_regs = (int *) alloca (max_reg * sizeof (int));
5145 all_reset = (int *) alloca (max_reg * sizeof (int));
5146 for (i = 0; i < max_reg; i++)
5147 all_reset[i] = -1;
5148
5149 while (changed)
5150 {
5151 changed = 0;
5152
5153 for (b1 = f; b1; b1 = NEXT_INSN (b1))
5154 {
5155 /* Get to a candidate branch insn. */
5156 if (GET_CODE (b1) != JUMP_INSN
5157 || ! condjump_p (b1) || simplejump_p (b1)
5158 || JUMP_LABEL (b1) == 0)
5159 continue;
5160
5161 bzero (modified_regs, max_reg * sizeof (char));
5162 modified_mem = 0;
5163
5164 bcopy ((char *) all_reset, (char *) same_regs,
5165 max_reg * sizeof (int));
5166 num_same_regs = 0;
5167
5168 label = JUMP_LABEL (b1);
5169
5170 /* Look for a branch after the target. Record any registers and
5171 memory modified between the target and the branch. Stop when we
5172 get to a label since we can't know what was changed there. */
5173 for (b2 = NEXT_INSN (label); b2; b2 = NEXT_INSN (b2))
5174 {
5175 if (GET_CODE (b2) == CODE_LABEL)
5176 break;
5177
5178 else if (GET_CODE (b2) == JUMP_INSN)
5179 {
5180 /* If this is an unconditional jump and is the only use of
5181 its target label, we can follow it. */
5182 if (simplejump_p (b2)
5183 && JUMP_LABEL (b2) != 0
5184 && LABEL_NUSES (JUMP_LABEL (b2)) == 1)
5185 {
5186 b2 = JUMP_LABEL (b2);
5187 continue;
5188 }
5189 else
5190 break;
5191 }
5192
5193 if (GET_CODE (b2) != CALL_INSN && GET_CODE (b2) != INSN)
5194 continue;
5195
5196 if (GET_CODE (b2) == CALL_INSN)
5197 {
5198 modified_mem = 1;
5199 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
5200 if (call_used_regs[i] && ! fixed_regs[i]
5201 && i != STACK_POINTER_REGNUM
5202 && i != FRAME_POINTER_REGNUM
5203 && i != HARD_FRAME_POINTER_REGNUM
5204 && i != ARG_POINTER_REGNUM)
5205 modified_regs[i] = 1;
5206 }
5207
5208 note_stores (PATTERN (b2), mark_modified_reg);
5209 }
5210
5211 /* Check the next candidate branch insn from the label
5212 of the first. */
5213 if (b2 == 0
5214 || GET_CODE (b2) != JUMP_INSN
5215 || b2 == b1
5216 || ! condjump_p (b2)
5217 || simplejump_p (b2))
5218 continue;
5219
5220 /* Get the comparison codes and operands, reversing the
5221 codes if appropriate. If we don't have comparison codes,
5222 we can't do anything. */
5223 b1op0 = XEXP (XEXP (SET_SRC (PATTERN (b1)), 0), 0);
5224 b1op1 = XEXP (XEXP (SET_SRC (PATTERN (b1)), 0), 1);
5225 code1 = GET_CODE (XEXP (SET_SRC (PATTERN (b1)), 0));
5226 if (XEXP (SET_SRC (PATTERN (b1)), 1) == pc_rtx)
5227 code1 = reverse_condition (code1);
5228
5229 b2op0 = XEXP (XEXP (SET_SRC (PATTERN (b2)), 0), 0);
5230 b2op1 = XEXP (XEXP (SET_SRC (PATTERN (b2)), 0), 1);
5231 code2 = GET_CODE (XEXP (SET_SRC (PATTERN (b2)), 0));
5232 if (XEXP (SET_SRC (PATTERN (b2)), 1) == pc_rtx)
5233 code2 = reverse_condition (code2);
5234
5235 /* If they test the same things and knowing that B1 branches
5236 tells us whether or not B2 branches, check if we
5237 can thread the branch. */
5238 if (rtx_equal_for_thread_p (b1op0, b2op0, b2)
5239 && rtx_equal_for_thread_p (b1op1, b2op1, b2)
5240 && (comparison_dominates_p (code1, code2)
5241 || (comparison_dominates_p (code1, reverse_condition (code2))
5242 && can_reverse_comparison_p (XEXP (SET_SRC (PATTERN (b1)),
5243 0),
5244 b1))))
5245 {
5246 t1 = prev_nonnote_insn (b1);
5247 t2 = prev_nonnote_insn (b2);
5248
5249 while (t1 != 0 && t2 != 0)
5250 {
5251 if (t2 == label)
5252 {
5253 /* We have reached the target of the first branch.
5254 If there are no pending register equivalents,
5255 we know that this branch will either always
5256 succeed (if the senses of the two branches are
5257 the same) or always fail (if not). */
5258 rtx new_label;
5259
5260 if (num_same_regs != 0)
5261 break;
5262
5263 if (comparison_dominates_p (code1, code2))
5264 new_label = JUMP_LABEL (b2);
5265 else
5266 new_label = get_label_after (b2);
5267
5268 if (JUMP_LABEL (b1) != new_label)
5269 {
5270 rtx prev = PREV_INSN (new_label);
5271
5272 if (flag_before_loop
5273 && GET_CODE (prev) == NOTE
5274 && NOTE_LINE_NUMBER (prev) == NOTE_INSN_LOOP_BEG)
5275 {
5276 /* Don't thread to the loop label. If a loop
5277 label is reused, loop optimization will
5278 be disabled for that loop. */
5279 new_label = gen_label_rtx ();
5280 emit_label_after (new_label, PREV_INSN (prev));
5281 }
5282 changed |= redirect_jump (b1, new_label);
5283 }
5284 break;
5285 }
5286
5287 /* If either of these is not a normal insn (it might be
5288 a JUMP_INSN, CALL_INSN, or CODE_LABEL) we fail. (NOTEs
5289 have already been skipped above.) Similarly, fail
5290 if the insns are different. */
5291 if (GET_CODE (t1) != INSN || GET_CODE (t2) != INSN
5292 || recog_memoized (t1) != recog_memoized (t2)
5293 || ! rtx_equal_for_thread_p (PATTERN (t1),
5294 PATTERN (t2), t2))
5295 break;
5296
5297 t1 = prev_nonnote_insn (t1);
5298 t2 = prev_nonnote_insn (t2);
5299 }
5300 }
5301 }
5302 }
5303 }
5304 \f
5305 /* This is like RTX_EQUAL_P except that it knows about our handling of
5306 possibly equivalent registers and knows to consider volatile and
5307 modified objects as not equal.
5308
5309 YINSN is the insn containing Y. */
5310
5311 int
5312 rtx_equal_for_thread_p (x, y, yinsn)
5313 rtx x, y;
5314 rtx yinsn;
5315 {
5316 register int i;
5317 register int j;
5318 register enum rtx_code code;
5319 register const char *fmt;
5320
5321 code = GET_CODE (x);
5322 /* Rtx's of different codes cannot be equal. */
5323 if (code != GET_CODE (y))
5324 return 0;
5325
5326 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent.
5327 (REG:SI x) and (REG:HI x) are NOT equivalent. */
5328
5329 if (GET_MODE (x) != GET_MODE (y))
5330 return 0;
5331
5332 /* For floating-point, consider everything unequal. This is a bit
5333 pessimistic, but this pass would only rarely do anything for FP
5334 anyway. */
5335 if (TARGET_FLOAT_FORMAT == IEEE_FLOAT_FORMAT
5336 && FLOAT_MODE_P (GET_MODE (x)) && ! flag_fast_math)
5337 return 0;
5338
5339 /* For commutative operations, the RTX match if the operand match in any
5340 order. Also handle the simple binary and unary cases without a loop. */
5341 if (code == EQ || code == NE || GET_RTX_CLASS (code) == 'c')
5342 return ((rtx_equal_for_thread_p (XEXP (x, 0), XEXP (y, 0), yinsn)
5343 && rtx_equal_for_thread_p (XEXP (x, 1), XEXP (y, 1), yinsn))
5344 || (rtx_equal_for_thread_p (XEXP (x, 0), XEXP (y, 1), yinsn)
5345 && rtx_equal_for_thread_p (XEXP (x, 1), XEXP (y, 0), yinsn)));
5346 else if (GET_RTX_CLASS (code) == '<' || GET_RTX_CLASS (code) == '2')
5347 return (rtx_equal_for_thread_p (XEXP (x, 0), XEXP (y, 0), yinsn)
5348 && rtx_equal_for_thread_p (XEXP (x, 1), XEXP (y, 1), yinsn));
5349 else if (GET_RTX_CLASS (code) == '1')
5350 return rtx_equal_for_thread_p (XEXP (x, 0), XEXP (y, 0), yinsn);
5351
5352 /* Handle special-cases first. */
5353 switch (code)
5354 {
5355 case REG:
5356 if (REGNO (x) == REGNO (y) && ! modified_regs[REGNO (x)])
5357 return 1;
5358
5359 /* If neither is user variable or hard register, check for possible
5360 equivalence. */
5361 if (REG_USERVAR_P (x) || REG_USERVAR_P (y)
5362 || REGNO (x) < FIRST_PSEUDO_REGISTER
5363 || REGNO (y) < FIRST_PSEUDO_REGISTER)
5364 return 0;
5365
5366 if (same_regs[REGNO (x)] == -1)
5367 {
5368 same_regs[REGNO (x)] = REGNO (y);
5369 num_same_regs++;
5370
5371 /* If this is the first time we are seeing a register on the `Y'
5372 side, see if it is the last use. If not, we can't thread the
5373 jump, so mark it as not equivalent. */
5374 if (REGNO_LAST_UID (REGNO (y)) != INSN_UID (yinsn))
5375 return 0;
5376
5377 return 1;
5378 }
5379 else
5380 return (same_regs[REGNO (x)] == REGNO (y));
5381
5382 break;
5383
5384 case MEM:
5385 /* If memory modified or either volatile, not equivalent.
5386 Else, check address. */
5387 if (modified_mem || MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y))
5388 return 0;
5389
5390 return rtx_equal_for_thread_p (XEXP (x, 0), XEXP (y, 0), yinsn);
5391
5392 case ASM_INPUT:
5393 if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y))
5394 return 0;
5395
5396 break;
5397
5398 case SET:
5399 /* Cancel a pending `same_regs' if setting equivalenced registers.
5400 Then process source. */
5401 if (GET_CODE (SET_DEST (x)) == REG
5402 && GET_CODE (SET_DEST (y)) == REG)
5403 {
5404 if (same_regs[REGNO (SET_DEST (x))] == REGNO (SET_DEST (y)))
5405 {
5406 same_regs[REGNO (SET_DEST (x))] = -1;
5407 num_same_regs--;
5408 }
5409 else if (REGNO (SET_DEST (x)) != REGNO (SET_DEST (y)))
5410 return 0;
5411 }
5412 else
5413 if (rtx_equal_for_thread_p (SET_DEST (x), SET_DEST (y), yinsn) == 0)
5414 return 0;
5415
5416 return rtx_equal_for_thread_p (SET_SRC (x), SET_SRC (y), yinsn);
5417
5418 case LABEL_REF:
5419 return XEXP (x, 0) == XEXP (y, 0);
5420
5421 case SYMBOL_REF:
5422 return XSTR (x, 0) == XSTR (y, 0);
5423
5424 default:
5425 break;
5426 }
5427
5428 if (x == y)
5429 return 1;
5430
5431 fmt = GET_RTX_FORMAT (code);
5432 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5433 {
5434 switch (fmt[i])
5435 {
5436 case 'w':
5437 if (XWINT (x, i) != XWINT (y, i))
5438 return 0;
5439 break;
5440
5441 case 'n':
5442 case 'i':
5443 if (XINT (x, i) != XINT (y, i))
5444 return 0;
5445 break;
5446
5447 case 'V':
5448 case 'E':
5449 /* Two vectors must have the same length. */
5450 if (XVECLEN (x, i) != XVECLEN (y, i))
5451 return 0;
5452
5453 /* And the corresponding elements must match. */
5454 for (j = 0; j < XVECLEN (x, i); j++)
5455 if (rtx_equal_for_thread_p (XVECEXP (x, i, j),
5456 XVECEXP (y, i, j), yinsn) == 0)
5457 return 0;
5458 break;
5459
5460 case 'e':
5461 if (rtx_equal_for_thread_p (XEXP (x, i), XEXP (y, i), yinsn) == 0)
5462 return 0;
5463 break;
5464
5465 case 'S':
5466 case 's':
5467 if (strcmp (XSTR (x, i), XSTR (y, i)))
5468 return 0;
5469 break;
5470
5471 case 'u':
5472 /* These are just backpointers, so they don't matter. */
5473 break;
5474
5475 case '0':
5476 case 't':
5477 break;
5478
5479 /* It is believed that rtx's at this level will never
5480 contain anything but integers and other rtx's,
5481 except for within LABEL_REFs and SYMBOL_REFs. */
5482 default:
5483 abort ();
5484 }
5485 }
5486 return 1;
5487 }
5488 \f
5489
5490 #if !defined(HAVE_cc0) && !defined(HAVE_conditional_arithmetic)
5491 /* Return the insn that NEW can be safely inserted in front of starting at
5492 the jump insn INSN. Return 0 if it is not safe to do this jump
5493 optimization. Note that NEW must contain a single set. */
5494
5495 static rtx
5496 find_insert_position (insn, new)
5497 rtx insn;
5498 rtx new;
5499 {
5500 int i;
5501 rtx prev;
5502
5503 /* If NEW does not clobber, it is safe to insert NEW before INSN. */
5504 if (GET_CODE (PATTERN (new)) != PARALLEL)
5505 return insn;
5506
5507 for (i = XVECLEN (PATTERN (new), 0) - 1; i >= 0; i--)
5508 if (GET_CODE (XVECEXP (PATTERN (new), 0, i)) == CLOBBER
5509 && reg_overlap_mentioned_p (XEXP (XVECEXP (PATTERN (new), 0, i), 0),
5510 insn))
5511 break;
5512
5513 if (i < 0)
5514 return insn;
5515
5516 /* There is a good chance that the previous insn PREV sets the thing
5517 being clobbered (often the CC in a hard reg). If PREV does not
5518 use what NEW sets, we can insert NEW before PREV. */
5519
5520 prev = prev_active_insn (insn);
5521 for (i = XVECLEN (PATTERN (new), 0) - 1; i >= 0; i--)
5522 if (GET_CODE (XVECEXP (PATTERN (new), 0, i)) == CLOBBER
5523 && reg_overlap_mentioned_p (XEXP (XVECEXP (PATTERN (new), 0, i), 0),
5524 insn)
5525 && ! modified_in_p (XEXP (XVECEXP (PATTERN (new), 0, i), 0),
5526 prev))
5527 return 0;
5528
5529 return reg_mentioned_p (SET_DEST (single_set (new)), prev) ? 0 : prev;
5530 }
5531 #endif /* !HAVE_cc0 */